From a85ced47d088c36094536361d082ac35631164b2 Mon Sep 17 00:00:00 2001 From: MHeinrichs Date: Sat, 30 Dec 2017 01:39:22 +0100 Subject: [PATCH] dma improved --- Layout and PCB/68030-TK-9g.zip | Bin 523249 -> 0 bytes Layout and PCB/68030-TK-V09g.brd | 26 +- Logic/68030-68000-bus.vhd | 57 +- Logic/68030_TK.STY | 2 - Logic/68030_TK.cmi | 8 +- Logic/68030_TK.lci | 5 +- Logic/68030_TK.lct | 5 +- Logic/68030_TK.tcl | 6713 ++++++++++ Logic/68030_tk.bl2 | 2556 ++-- Logic/68030_tk.bl3 | 1008 +- Logic/68030_tk.crf | 2 +- Logic/68030_tk.eq3 | 451 +- Logic/68030_tk.fti | 256 +- Logic/68030_tk.grp | 40 +- Logic/68030_tk.ipr | 2 +- Logic/68030_tk.jed | 947 +- Logic/68030_tk.lco | 136 +- Logic/68030_tk.out | 10845 ++-------------- Logic/68030_tk.plc | 156 +- Logic/68030_tk.prd | 1143 +- Logic/68030_tk.rpt | 1259 +- Logic/68030_tk.tal | 41 +- Logic/68030_tk.tt2 | 943 +- Logic/68030_tk.tt3 | 943 +- Logic/68030_tk.tt4 | 480 +- Logic/68030_tk.tte | 480 +- Logic/68030_tk.vcl | 89 +- Logic/68030_tk.vco | 138 +- Logic/68030_tk.vct | 5 +- Logic/68030_tk.xrf | 2 +- Logic/BUS68030.bl0 | 2761 ++-- Logic/BUS68030.bl1 | 2556 ++-- Logic/BUS68030.edi | 4745 +++---- Logic/BUS68030.fse | 20 +- Logic/BUS68030.prj | 2 +- Logic/BUS68030.srm | 4835 ++++--- Logic/BUS68030.srr | 57 +- Logic/BUS68030.srs | Bin 13150 -> 11646 bytes Logic/Programming.xcf | 4 +- Logic/bus68030.exf | 860 +- Logic/bus68030.srf | 78 +- Logic/dm/BUS68030_comp.xdm | 2 +- Logic/run_options.txt | 2 +- Logic/synlog/BUS68030_multi_srs_gen.srr | 2 +- Logic/synlog/bus68030_fpga_mapper.srr | 21 +- .../report/BUS68030_compiler_errors.txt | 2 +- .../synlog/report/BUS68030_compiler_notes.txt | 4 +- .../report/BUS68030_compiler_runstatus.xml | 4 +- .../report/BUS68030_compiler_warnings.txt | 26 +- .../report/BUS68030_fpga_mapper_runstatus.xml | 2 +- Logic/syntmp/BUS68030_srr.htm | 79 +- Logic/syntmp/BUS68030_toc.htm | 2 +- Logic/syntmp/run_option.xml | 2 +- Logic/syntmp/statusReport.html | 8 +- Logic/synwork/BUS68030_comp.fdep | 2 +- Logic/synwork/BUS68030_comp.fdeporig | 2 +- Logic/synwork/BUS68030_comp.srs | Bin 12719 -> 11440 bytes Logic/synwork/BUS68030_comp.tlg | 30 +- Logic/synwork/BUS68030_mult.srs | Bin 13150 -> 11646 bytes Logic/synwork/BUS68030_mult_srs/skeleton.srs | Bin 1283 -> 1307 bytes Logic/synwork/BUS68030_s.srs | Bin 12719 -> 11440 bytes 61 files changed, 20318 insertions(+), 24528 deletions(-) delete mode 100644 Layout and PCB/68030-TK-9g.zip diff --git a/Layout and PCB/68030-TK-9g.zip b/Layout and PCB/68030-TK-9g.zip deleted file mode 100644 index 4912b57229ef5417338f82161d11fdc76737fb41..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 523249 zcmb5VcT`is*C=WQr78-9t|B76mr#O=fKn9%A_xftq<2D1K#77%6Qoz^9TKXvU<5)B z9Rd-M-g^lU%H{Wc@2&Ulz3cvQ*P1zHpE+mt*|TTQF0)^0UA=bq(xpo`E~WZC(CoNI z;bil@e94bOb?Np6R90SGN?hcPmWYu!&_>k5#WAIEg7Chml-p-ge@bof;rO@TCp@_o zF-FF23CkQnlRo*zTbcLO(@PRZx{Wv7dQXFTV-O?z+aPfSm0 z&Ri_c#Ln{i1i}N)n`WABpXQy;8*V_(zfCutm>%lge}A_3Y)1Xr`K_dMQ!thAX*_F( zeqmn-vq52+{(kfLd5zZa*5+Wi^!<-L;7(}Jei93d|2g{g3aY0!zGegWD;$-xSM4uu7OyYm z)N*n#pXcQuI?It927|qhthp-*)@tti$uH^jSo@e7E=J|Fbk+(XgyhDanJ23R%wNm8 zZGK!OKdyBZ?^zF-s1-ba0R{=}`G}Rc-flwkmYz4>>76t(A;! zbr*+UH*ji~e**ywPW|w5;9ru0)iMm?@h^JHMEMhr(}pI9dZ((#cI-p1c@cW(zNxb# zV&N*XSIB$3-7bE$b?a&B1cK6?kTzvfk+_@WFEh1^j#-+&j}H*!2RnK-NO%phhOfKD zydESuv-O9S?D1vny_3xK4R0bFaQw9~(-j}4ip-Lpqjw}PL+HIYTMLpaoV;OrW`?@r zCP|vRPcy9Mp5E-StpBSjv@#K93>&MypJ0y~{TW(Nr%d#6a}3H!*!`n_ICqG9LVD+z z38{TE-kOPjGx5%8f+_H=98p%Xv+21Ot${jF;1u>BO7wgbEzUWPh{vRNc936cAk2dg^4&O^)O}Usx|uK@Ano0OmTf z%%)L9G0B=}?ADUC!3`f(x-Ql}$yna^ANqX-q$rp1+m{qD;-jU-r zrTbVe#EQ~@$tx9X^L*Kuc&f2twWL&IGdxr>OawAkQ!-a+a>u{d)r*;*a~FR)8^0H3 zSNAYzf@}wajUV*STQvx9kRHrOpJJ6@r1{F!{H743FFGMSoIo6O{vh-C;CpG8mjR7! zmXvx{c#SCi-(+_Pw=k(rQg)asLbXfi8Re~&0Zl&<^htIf=l9WFnDNHCO%#V-ttH8o z61`5oR#cnp{&pa5X`0j5NPc+bDlbn06w~rOC zDThovVKq0A$ZgXS`EfLfPdlr6-Az`1THiPaLF&cAIHcy^uN}Op6EUW4+|yF7sR5pBRJ+X3Oc!lAuMG2ZT6Wj> z{^Y!O<+zzZROSSwaPV3x??xbILL+41Mt}w`H_B?S zFl1i-WYc%PGW=zyTzB;nQ(EpjIwNYOFi3X!%fzLIA10=j)Hf>WJk@VA#bRb61LZ z)z>C6?=CBSdFe%=k!kT{4v4hN&N=2^Xx|*U%z5J z`z&zaKT`F@!~|un>zU>G5;g&sOj%EB>UcliXJ8PKG zmzMc9{@7n%Zrb7>lODvELVL816I>cW0FIGu#z*rH z8dr73w>qQF(h7wfUJWyA@As~DRcocezd9VpkZj)ELH*(bWhE&kPI-v)7=U6#Mjxq{ zLH^;Ym5?hJa>kXy4~Q^6ezr6V1T^j(WmHraEvT+s@Juym>*Pz<{%uI3%#n1%v7Fam z%1twAJhK1)Be`Dfx3lL*<}zn3MB3xK*`*=AaH(pX=f)fQCRd;}?TgyHz`|1K;4S~I zD(AIaB2~&qEsn5d>{6X}(}=#DleGMl0@yCNZSl=Q{AikcSiz?6y5_mPoKk61n?s$U zyz!5!GD zdWp;M>@=qJ#Xm|A^^H58mzm+-aJc7I_I^&= zeGJcSIVc7B&m^Rl{cU=1{w#z4fUYz)0T9Zd-h{tm*@64@w~|HVV$}nJtDJ0w&)J2( zFjE&XjBpk!6479qCVV-HZ_%GSF7;wfbjMFyjAeWb;R^}ij^i5l2fHr}G?$~8L*$f% z6%*`v&)B;dj5v!Gz#ixgXtSkX&nJjwowMus4P8jkpiPKg$F#xD;hSR(f_(dcIjjS> zQzj8IDsA+izP-^F5^v*0)frg0gu&W9rtS+Oz}>h8Uk(;62E9ibUXN^g9{#Td`A}n$ zUqkGnM&LsY@|DL4$brpVkNUeJvx z@3b+X;IieCUmjy9jSyIOg+-Vj?1ha_-Mk=A#}PMhig(e!|H#}E%bK!zozf`3M!pb2 zrfmzGZ`Tqt^Il4hWT(bcMN%7zk zBmZ@4xGwO@@814DgY7|AEZ;fXKlbb5(yrn_iydEJWbXbSb(bP@&qJQ(zBzkHP!Q(2Dzp3`WVeo%I?EeRz>!t?oJ|!T&OY!{QTy`Wz&UI_J zFYp3)qf(AuM5GMO2OBsOz4RuQ5MuIEvUwJ-(z1xf=&rgJ8DgO}i-ZPippXG?v?=L}M}pvjN$O z5n7E;+7(IdzzvjPW}suZXjBwRjhdDv`EL0I(=9*=K4$;Le$#zo@?cMKcl6vvqr2;~ zWtcT+#|86Tuu`ZU`|}W^{tP=$TQRWP(%M#1DDXss;XJB2aBhnSc*4qc7Rqq07IL0h z5s@hsvD94~3atFbprR3yp4HsjKW*cFn8+FMC?vgO+D2Jpdo-arZ*EHfh|pw6R}az4 zYR>DQ9$eb8^Bght#NXz+=!@U1`@bQF(((v)P7pmqI#q}ss@XwwVGH7VC?3+i-o>OaJ&y`eO`djwX*6zQ48e<`Wb< z-N+TP_0Xn&)s~MIm5B^>R(Q^~^%=OP78KUS<ljOstFbL9}W&df~z zqd8SO1diw=KZu8EcV3Uuxdx-vrhJx(K&Ij5(o zRwnZ>OBpcdUzHWx_~()dePSQNQqy6PtRF!uN-m%LT;HHl;aFKVD%FX{t4co+x=JqW ztEcNzNtxl+-+><&MXa))E*$mPdPKF_Pb({{SJD`{HE0)E2e5~&Gv(A5%!G5|s4T-r zqcR)2li4>FUj5p2bCNG7qWA8kr{W89mcKAOGS|(o_e{lo(z~5J_dQ?Icx4SGAqqC;&KB`N;vUK{J!Z=WuJSyG(4$Yj)`c%ufigFwz^Oq#JlvL&ZW%` z{cTa7Y%!1E6*E^cImJ2vuH^5WiFc~HEzYh^q@tEy<@EAtNsd=94$(_gJIS!L<317O zn`Szri6u&4?iK1}`wf{FD$)A35gay^Z3gfjT1e+ zrI;5+NMi8Q+4Vyyd$G$Ph=Wucy?oWW7B&&LXrEmjT3j>e1OF)Q>ae^$H=LvVwpflx zk^>&8Q`FD}%Wm{L%N9nIa$7V&ZY0)4U@+9o8Dyxb_yO8X|a-=P6ThS|W>#iilomr+cfq=`wL0LnT&CZ8mxyq*oRVN<8vS1)ibv z9uag7p-!RHBuPs<>E937ir(Nl;>RmXn!`=q*G@ESgSoH86Z7P}hWyxpRUmJ3Z4!kgNxXl{0VMfYS_4&F(z<)7DxO?TrVr)*%ul zNjvmiXRMg}0aPI&brbdN+-t=(mx#@I`GF2H3B+plABstx&c@XZxe%&=w9e81Vn$=T z*lQ-A4Z)zi zNO43xHkDQcbk$vBLmvzZh*f8b(Xs3}P?qYe@=_2kKf`W8Xj_nG^$+C^xvi=1Oolhv zW$h3JD_=LG0bf(U*eI^q3B#^2gp10(aQ{?KEq?kTQMCBkfN}3rgCX zHEOaNtepR8I!ha|+Y)fK#d9Q~BK`K!vk{F0iaV#xL*g<|+0+-rtFhdEz^064g`ZYc z2Hv0a&*OfdX~_A5LkLXoGZRfcwdWfFo zlhIPvcPYWoGRr)87|X)TaEVR)7p$21;N@8fshZoajB!~hw=1U$$ z*3N$U6*(gl9?(CRlA}B3e3JKat?K7t4Cw}g3bnj}%2`qW?H_;nwsxWkU76#|Dhn8q zXXofHhc#HsDfDhr%%4O5rOhGV*a$s~-Q|<(PQGVp_(CfuHA*ELPt2O}Y`)bvz#a+J zjYnY+H~*C-UqN9$z~`yljX+3MgYDDaBXNn+yZxI|DlO%M$44DNx!)e)vx{vW;YV&G zQudA!=ihuznTYQSs;toFyQE-jy65OUlJu$n{@baK$MD*M*|rcfuBNWrT zp*mc2l3ZM?zp0@8NRr zegU-Hi`$r@uJ$EJghrrvl*5t~>sYo#WmH7*9qgZaUXjaQhu^FL14nDa(!u^rPOufQ z%HEN=ugghiTLe8|S5y`~U_D?{G6i192Sn)$s~cg9L#2d6`bHl}UYR{}Sf~1-jJY%V ztT)l`d@j};)g6B8m?0otApF{Hmp6Lm9zcvFwmPHG$M>W46%Us- zVfcGnFZp|$$Apcr&w>Jen3{OtsT#gjAJlQwLB1mE)r2BUM zqW%$=A;hybyYu$o@2?pbgQlt{ThuDe5}<6kn2er)ij38U5l+g_t=Au7 zv0DMJ(9MCx98r)*W^{~Psqy_R&~roKr9q|u(WOB_VXdLW9-R0{nQQUWm;V-LewF3- zjz&7yIm-xm)cg~X1FN4QtSDCZ2J?@{>(WlBi z8#N3#QwS4rbrP6o-4b6JaeijHGXCO``rKL|N2eKxBe|L_jpt?k3Ij`ESy8?EGa)$t z%kfv+)MJO2A~;<-I^9xpT+;iC9HFbV85e;e*MK}XQQ3^~bmP#}(<4{$3UVl*Ui0Y! z*?T@lY`t>&@Gd*$=ho-kJ9=E5Whd{AHMY|j)|mQD9Y~DxeHs+iiG<6F2k8@9`ga2P z$0OWzGckkeXz)>Z2`i^!n1`@%ByD>xSVg;xEr+az7u22^xN-OvfnF=2 ztb2Qr>*(T{vINnw$wU*z&`WpHEHtK{3d zipMzYe51?R+;5xrgm;d~fPG2?g>4qhh+4VA<+^PjgX7y??p5M_KzCixz52UUFV*!c z?XGlLD(Ss^xHlsa0bSVxA`RjMVKuB7V>9osiEfSo8ybXGTTU- zW!hsC`3M%wY+gTDx*-l&)`zl4%i;AVrwPziR!}D8f#X|< zh_X?EXBxcQ8@YhEj&kD;qMr4lo^-lhZ0K`Y)X`MW2J+ria7Y$J(d%3m&M_7HB$+9Y zS1wjjnhKVj_hd1|$DH3=JKtw-vaowg)oHnl()`5F+3+L{DR?GAva z+~3(OEHw6^wiRX&ce8EF+~2r{#cz0gwL%Z7q{uOu++P^@h8c1+>$Y>3*oz&=4^AKR z8Ujx(`r?2TM0x5aa>za4vdXT)w_Cjmt81IBH~e2#Ye^eriWnbEgr!OxG)ITf8`O-< zK?g)9o7TABV{5FUafhuKRxOuv{fK^?c726?1z?xCTB4`yJ?6oDOs_i`_{3bi16Hxu z96A5c{4IKrH4dI{+zRr+Kv&AAv|(!oNO5zQ6=88JcX5OG!jPP^gGisiGt1$jc^{r| zH^O)7)!beto^8uus+r!`33D7{5#270IreB?j~Ir3N3IgxkkS0WgqqyI?}40B89wX9 zNCJ;n=eqy*%N{jmjfL)a)}%N}Y_fYrsmSA{8~AsE2(o%thr~>14~Q`?@WMPm7Dz;; z`ozW7wfcZObrs8}W<4evrzmJmhWDiTliOnN$8T|%!4OT_7QinNLB2nvl0Ve`v;75F zrI~Xh+&r|5S`F&n_)|~gF>aeleOrrH5iGs_C{Ij4vtCfQNdbHjNak)jfLLIU*Cq;7 zF4ZgKaGc%22BMG09hk~?pnO=T_S803se|-6c%VdeBS%`BH}#$5%crg}-NbU@JwZ_N zY}_?P4}v5=y^OiLxIl=+_xtQ&yXePj?dak;fmPmcxB9UKCLeKM8MTfUeUUEX%hdaHgi);Jn5W0C;8L<0`raf=KCfs_EYEj*Q zh^gS|t`q_)LyDW$7ZNyylf4#WDoR_4*T;A>H*rGV#~Le>nTNdJH`@e4cKxxV^r_qa z9-t%?vw@rpN&Ol7_hxF9SX!?DJ8)n`-;>l1H_^?XgyBPmeuht161gtESI27@+5ytD z*zrr~49B13VOpxwcG8(PZT{)1GBj*5bVfkA$r68gsU~~#6+f4NwGVtk=7 z9{_(y8-dU4ij%RgqL7LB%#!33S$!nM`-FuNKczY))HHeoZCw+CDeqqPPwA{~=)7%` z6tYcrb@>gXg=nu7Dska(JEq2j8|KAL@Urut;M!dG9}&*@`LQo(h_Zh;$8-<(@fTxzn}^BLaXJ(7 zYx11Q@Qu8&+}B=ia7SwlOu{C9ZCM(BDiksG3?|(CW&^=ys*x_8o@yJmNl^xn!~iPU zz2etAdQ|`h-rCt4zZ+5pSU&yuL$7685^4bAOw;>F4uNaY{~j5eVD}Q&Jeo&qr9vS&{g%3 zEDh8sfwrB&l8Z7#Zq0|?#r)nW%+hK19p@I-G*eoQCHvgPpRW2i8`iZlwS`}c$y?MW z;vOvUci%=2Qgt0f6*p#J9+ux6weO;G&`2}!9UeY2CXB`E84|{r@d}K+7(VA+Tw%(` zS!^;);mX1b7IOp1XPz;5Nw(V8Y77F}w!`ZU0&9JfE4-|{#N@QP>>UMlT(49ie2f@LQI3V7H6gBMon4JIvqaph@De88 zmKDv0EU13OA>m02*bHQ#@A2HNt1f>k2?uEJ>XjwDK>ystJSiT=J;bZGK280_5lbpc za%-Omy0o3pCKu#@7xEqr^NSA}6)V;1a5;d!ofA##eNzq?+c(0OiGOtfDkM6dXu;R6 zZnxPBU(#EtmwTE@>PjlWZy?0K3fS995q+{l)p+%C{!R?KrNj+aiRPMjl^_C5QrjwY z``xolxK+rBF`NpXuVKyGg-2!?T(6udH}^v?{7OHact$b~)8d!zTB~@Z%Xl5CE!I&d zLrAWjSXNSA5x{k1n;jOg;iCfNYK*k`)!nPp$p6PL*Dx>eo16kPPqd9)9%yZ*-MTDy zASK;~Z$W<0@PB}j+rmn9aayBpO*thxuoHxK-co$xetRzaXgug7Z$*6iJKau<_ZZcg zXyd+!3ZASt%61@&H|5oWC{jTMiZXd(ghsAK(8O2R5Flc9oDU&JwOhLLwhY<^viAMC zfqKcAh2IKDEcd=MUCZ8P`VdYK0RNHmIo!w%&=T1par$6gCoKmOknyi)2K4a_9h{4C zu4VT@pR)-!zD%XRJScspk3BXpZXMWGe0j(+xEzYV0<%BI0n##B2}jw(XJ1aG*?)LH z-VVPAi~On*6K)I9C7GcXw2pgki+HjOJJLqNcIQy&xI0IV2}D z|Ks%)pJ%x|SRS}|cbmxUuuC#0-F$k(YQ|(X&;|J~tze6!@N(?l2|gS@=k&m);ZxnS z$xWQRI#6-MTHTMy^MPyON z-o2?!9GR0qiN3u1L8#6aoB7FK$k$YRv1n25TC+H@k}KfMTzQj9fKnLPkkK}hN}d~1 zsN2lQNc9olZG8SqZz18W@9b9C)hT7ARsD^b>7*!swS;7#yYNJGA(asQ=~qWy0hQ<$ zuf+(7{&%A1)toS$qX)iXV~uWLo^JyJZznMx8zEN?%H$7OeJ|HI6$pyau?9S?a9Z{< zcUp+Qj>p2`;^t#W4k>J^_`oLCa-3D ziD(qlPy6pYGktWJ<~M9O`H9=2^0SV?uI0)+5jDM98B}2G$QWEU!%YY2Rd#tjE7VHe zJQ~LsEOtbbYrey*-B^tf@BejE0`c)}yn&0gki#1EFllX>R_pQH{nO|b+!k}cB7@KJ zei$oc0tD#gYr2u!wQWbpkm`MnciVGp$}`_lM%?O2x=%PP_F1xICjB=4ELOcddUc0( zbiUh?dUjM>;oz<9a8!uAs>#Z2EWcQ!cQ!3^=yuQEkZS{{%=fL&@XSX$*N-2R2`q^0 zGmhW}lmI4ws8zKN_dY|`du|?QnoEHISU-eB+?JyIHq>^ElTIXg&K7>E4C0G%@BB~m zBx+UK^~#TN$GE=CQNV!SruGIgfdG3_f5>#QPTO!CfHAB2M;vmPqi#0tx^7Sw#6t(U zt^&Xwq{hI5BwshpAjJ`_6h!1=iQyV;uLgCU_MM05v(MNqdeqSE*`>cjPtI53N8sr< zN5ZPhrCA)%;7Yh^6lN{^DCf`I@Na5f17q_FfAMm7vXim-Tg3z`MZ4?b-7TIz(aPa3tAuKn z4bSCQ=|9rvDQ9>iKaB2L{wpwaFjT6ld)Mc|Flqn!E2~Mz)$Ih(eCCn)(r`do5!N$Q zAaV+~C4B$|loZY-J+DfGN8IkEZvL`Z#5$LIbA|V7JFfOkjar0gGwC~Zv*`~FMuyM= z+Y9UD?!T(hdwv_^eqkBwSj=gCOGY4}4g(htJ7dyTqv8&uGutbPMoo*vqAae} zLCaZawi>OTCn-gMW4>Hno2o4cciIxkrtu48f5`dyyCD#y{EG6}+%#XTDvuH~YjF0B z^0a#N*;CUuYSTR2e@I-^ysARTt20{<)!TXKvUvnPyS9=RC~^+cwLBo)qNx^2>Cw!rxmSIf{%7Td6>_E`C=dGkN`sJ zrR3@jyqqaNm4c?Vu*F)+ziIX%w!&)$VU&y{+|Lnp;r zxM`=|800%o+YskV`q#)lkY;zQf}Q&P^SXm6=c`DQXM_1COM=YK z-?li{7gG=WNEG!)wKm7i4!U(Pd3RcP<*KrF#}&@|P??(BXek4_Qt~~ozjsprtSSlT zRcLV0RcKFm0n5WkR(1RruooS-wF+SyOS~b`*GhP@ z#kd?ic5*DcF|6VGV;1UDu`n`$ys23YTey|u|4^$vBOOsDI8KIGXfo~~Ufk`*%`r3o zV@=fR^b(z)FB()qOfN@x$E!lDqDQCuU2-9Eb;qdvpcxecF)^x*+J>g2Gvby?hKcE6 z;l*Jm`kxuUtS19ZJM|_cwer#PpyIYzTXCJ zD+h=h5)!+RXkRg+B-KG9+@?kDFezTS`U}Nme|(5bjHF5o_S0E}96T zhft>bAN&`0%Nch*c3L7xeAT@F`~_FfGib3&o_3wc{tE?s@a|_f$X1w|wFHZ{;~CZQ z33NqCt&zc1yt^`RwVdm+Gprxt7h-q0>ooP!UlH0;rqt)IpzPatqi)tbQ3Cgns*_l3?{y z=RKF&JUNQ4=aYk0qqDCMD`Z1S($Ui(em$CcHr_7to7->J52b5!jkL#&!(FOvvdv+= zZR#t3$hJ*r!m8?+>aALjbs^BXn(4i5U#B*t-1gg?o!4lmdTuaP>K~iXm3Jwlwcm7r z{W4WMYP_`_m|gIUws<2KG7+pZ#qd$LU9qsAt&STf?bh-ud;M#Z{D_$>q8W31Dn#I44r(J7a;Hk3vF<2w9I5qK?ED&nB8z^Sd2jsXyo-#j6PO*N?r(56?62MYHg_6S!hhy;ad3)R%Y*2&c>&)*(u(3ik7VpW<#v z*}+~sOz(^jy6r$#X8iqdQf8X;fQdDEt=^PhuMyv;g@su!?=kf<6X*feIYN`zyZ&ad z9d_FH2TaBJqqFnF_qxGcEeEabhqHIQoL!K_rlrZAyiMAd7R#C)f&J5r9Vg>2dDaj3zpGJH1X8NBB8QnS3rtD(0QKo44VZLJBo$chth z<-n!Y7I2HZ6Rh?(nQ1hf3msS8o6WyO+cgOs`_PK9-u&PtBoPgxD-D)3K39W^a( zk8jq;fjHZ~z3QP8i`fb<(f>yAU(V`!cR1flV{(Mfy&YHWUi^GYa?g^>*D7!lzDhrnJN)g=bzzsuB}~KY7Fs3eW2s{8h-Gae z_QExWOp8-Pv{hdTHD}j`1IpAp0=LhPW&!18k9UGd+(RMOlQ{XB;MWB zb?YEJz7@{X$T4Z){ zBJak6m?mz>MU^rbCM=oc7wzw%s$>>5yhlYyZ2p~2jc_SR<2rByn6lcEGU47b{~>*K zsXowy_cC}=`Z2TB8u8ec>*OllE71AgCf^VLTnmW?@JlKY)M777oO`vaEZ9@2)va0>D3IgLsbk6L)*w=~J&?mU z68@qIwX8ig);HODG0Lb~B_s~0f>fWBhpBQaNIx-GtbCTHB;C5k6mn4Y@WP3(i(l>8 zRLP7biSB;?<4TW(yPZBb=>M7M9=rcj(AY=h!{3CRLIg3^LCHlqeDjejRCxl2t*g7; zb^joSL(BL(s`2>oa1AGHlm&|Xx=v_x@h7DwpIVHks(-PQ8$PQ}CW)^vbXLFpH0seZ z+Dbe%hx&`;Z2DUxh!;_sKH8$a{jxox*rWMxdpTh)4b)v0(ArMoXgpJmNDf*F98xIk z?2%`W{~89=N?Fz8FnE{lX=9yrv2%^{+hWRSb@#~ZcUIRSA5)HC z(FU=>Jw?C(+i9(eh4}<(`kf|ZC`Bus*`-p_oV&A@9otz8z$!@W5~<50ca2%HaUBEIl}sx!Kqt?c!}^Hf(1j8#db5 zY|lqS8WBs)hON8kuJ>BNf97y=Z45Ra7!MMf{C65PlQCWtWg+5~#%t^CtP+j0{9DPt z69H5ewMY zlM9X(_1gcp&;iHV!EI^!HmY;-ML2e?g1-7k0P2rR65KTySKPzkTM_YCCsF*xM&bv% zjhCx;`illkjANlC<(6x+b@JrC~s=jt>HSWfCwJ5 zg)Y8cu}~CimWs%bRR_RO(##J!FvFzP+Qr#kK5_--x0r3{zj zfy;fLEb~!k5bTBj>xuxu5@Of6r<0Z!)G$vG!4;=S?nhU9mx~$&+Gg6h_w<{cOR% z*ub;?qMn2EmfW@!24n{D3s{tlOSd85^&B|^4Cj_Q5jH-t0^^Unkb!$3l`unQ_gp93_YL! z@k9AW>aNBj_n01+)S3?Ud??Zb+r-+*-=>)3j@eb7EGykh`z}yX6{=imJb%l7DQI1= zJ2|qx&1~VSe|zV@oZL>Q z(`12r)yU%|p7hzdx_hA-V~gyc0@_|jGJ-BY!UhsK!s>brzCan>Hp(0v2Ul=&4RlST zWcHzTuLD&689m6@VD|gy>W~k0deQXJ3IMV2c@fRpeDvG@@W1BD<@7Y{zuMiF0|Yc~ zp>OUpH?>fDkKV`iCSbMJ)o&K*qxNC84RA&(vA%wqIB_teWit}|4KbM|ZaKyJ-W!r= z&Kb78=Az;uu?8s|4s%NKd+%t6-lTRX9T!Eg=YjwY=Cz~v#S zsn%%ftVD6g<$T~>jmx=Yhq)^3uk+E`w!m1e+2>Y~(Ggl_s;eriC5qVHLsIacq=xYu zaIu4JJBGCyxWxBBV0&%)AF55(dtL9%d*uPb5>sToxVZwxa-96+gU`LJz8HDDsa%fB zh1dVZY&~lDSaE4Dmpr?XXyQkwRm7WXY;N1)8_qAC#(b)*GwL5DyqL8D*v;C46geEUtEO zgqN{(|4kXyxr74Fh7)|Uq|Dv%TK_puE``Y{{5NQ_uLjh4cm-@7cz`mz*zqy?t9OXU zv26IS3dwS1rqSpE5feivtBXt*s+#Tfu7#a{zs8J&pr+1qXX_55l9t6(p%xAI7upVQ z?yk^K*+|rg-KvKlD>Z3u5;YG`#O?@ntCn1?MmqCR{d_vMYqSM#YyHWgwagU~awYTW!%~%cBbUTo09qWB#qhc@|5PbAA6JmZGMD%-#fE{Xv zY^CE5b5P?dkiJfds)h3KzRRRN2d*XK<6H>pS6M8|dejM$GUB)XUDoKevm@62){nZi z<8qAH!Op^XKQR}FlJRRYhB>;_$2z$TH?d!kWcJ@lwqJvRh$H)lK&OdiYr4Zt%ino| zHhp>t#_<>iFXFORh}87pBDaN82hp!Pm`eGN39|{D=36ctcI_hhj`hIEgQIcXF+8VX zp&X@?YBC0*2_J6kU4_~}=m=)|4kYIRBJsd5#3LoN2RYs9_pgp7%gp)1)OItraiirx zej(;!Icv+nlv9*$;N8$E!3Cz+MqJ&Mzw~&wpQ?kNt8=UzVf3hv6TrnUr0X0We68Fd zma8pHy=5X45Y-o;t^qU*VsT3~-Cn5PIpS66!nRQH^L*2pQd-QjA6L2vzUaobMEG`V zXwNKTHEfa>YoDaIbCkND7l#)}RP)0p zP<9*@tu)V6Df96^r8XAkMp`5bH>ig5fv7+@GiV^53z1=A)kK>dS(2qeI_hW6{ z^p53S{Ye){`!Wykls7N1e;ML=%$jWECoW>wc(R?1O{s30S-UAi!Dy+sb~26%)(pKm zhm6ohT`EU<)hQA;v<@vN<6S})ug-1IATWS3$S<+#I1L$MHSc?lpY^-dyxfi?x=^EL zD4S26J?GgF{n%5Oo`%gLN>^x3#XwtY`A=cCQ>BycqRF8zp#c{1n2GT|A} zHw@h6yxDeFAjieYOqlV|{I7#aBc1eEp#qo)*qevm%F;!OH}%y-*gjtn3J;$U#p>%S zdL8351DfJTN?<5B8%Oal>S;RbL4~@GV_dT~l^_`w!O95;Y3!ROztD!=#AFwj;{2 z-;ax!nlGOXCv?j{Tufni5ozwrNdq#ns4BojvHxX2xQgb8*%S2Al;-H!l4mmhRO&a# z*5NuM&IcVb6j!q@cU*a1oZ9~6G6_@yff5(rAIGc8 z%pRiMW>-anDKU0pPG*WsYkX~!5D;-e2I1!N?M5~4U9TN!FJj=s3@tR6zamnT01_-f z-d)90&m#2i{|U&&q;MWKR+D|hQXQ{<_SKIid0#Sy92=L4Lein;9D7h8$vwRrhrj+}eV~~nltfZXC_hK;AdW|RXVlTmk;q^i8(a01~jDl?xHJ*#zLB_duZezp# z2~S%>`2&cHU5!(yiceo#CsgFMz`jRokE6up}Ncf&~gLAx@=sAvn8qcQOiT> z+CTQP;0P;hyq47Z1~ES`kdIG_fnc21W(w97tcwBBoiYS_;v4cWbOAHm(1qUo?__BY zhyxC?nFj6VtD>$g8ig3$B-AkIY%~1HKnCrWUl=PMZU2w4vaxVKT%v5*O+YyAQ)E@y{=$5^r zdx~#a__s_s6H6rG);pre9oveJGa4#7w!hz0zU-nZDmmS~RT#bK%=wL_|h$ z^6&yd>H{GBI`#c*=C1^UgevV2aT&MVh9Ei(&VGXKQnZ6+fCC zI;N}UwoJ<1p8AR0+N?KdN#F-<_9y&D&T*!KH1c};mv?bAJIs`uJi?Mxb&4DH5TR}6 zEnEjZZJlE9dR79-BcJ0c>}S1L?hM29dI-;djBJIS?7bXR=@$xvQ48x}yduf+1l!RW za=K&Xyj} z5JY+l2nwNv5+Jk?Admo|{DXV%@4WAK-tVk`o%R1~U6cEsOvntGXJ+ntJ-P3^Z}QTfqHo{2RUDdvDk9qpMb(@(oaMaHjDCR;)d*ToCLH#7;@?$62ANT;(;<+P_bqKL;n0{#1$GU=m`p-E zu3|Zv^`n)Wx4JVm$|)S=IvvJJANC)WgLE_s=R`lT2|_JBiC!2JR1b*2jc39F=EnrL z`+q?}KuDM)Jwk^x)fc4ZEA(HgCRkuw;ctv^M$nov_q-n$GX!Y76OWS@lsq-`oYDdi zGL1Wml?;PM+?f*^dVIv~kM^Y3FVZic@{bkr=xsAGm($Rbl#p(HEyeK7Hf{#-jRS39 z9lWw2q9HCYQI#ObxN($R`>vWD2xF#g2|%Y|?QeQT#K95&x}sMlQXV=DOM<+-L`a>i z7L5_j?d@2iCdr;J3<;9U5e99*b~|Ub-gm4?o;%bDoUP^1T|zB;rm*Gq%}29cfE6fu zc*0bF?e^F1f2{*2aNRbceMMBbdqEKdk2OMN4UpzHfRHpw!pmyEktXD$r9s_>e~Zl$ z{k=pF!!zcKnmoy%Ejbu4+1x}bka0Zt%I_u{Xb z>o7&84)INGBPREi)h4u|zfHqrUJ*|h{7DVmx7{9`^;FgA#xL06`~^U|0>y97biG!! z5GWS-9ZnKOl)yuu|Jc6S+2MGb@b&maLKK<+#q~;no~nbMj(|8Xk~E*CQI9}zOznTI zYy=&lzDGFQGirpo7hr$eE@kt3Kh`pqaN`g6-$V21YP_00dAY*(DT-TPjc9?W|fW=xHnyVZrQDBMs{Vc?}-!V-a0aIez51- z5VKR>acX_cIK?xy_B%51@u0M@zuQ+xE?M(ruJs5u`c=)jeq3Jt{BFx?A@^GuTF*Vj z*(dXmn(|(kAuh&m#6M>pdq*bZ^HOBErXR>AHE_T18n-SC8Qz9xP;TH*e&Zm!ZD@m@ zFm0Hn%QpXv6ZNJfcU?#=U07KuS@jbqW6)q+{R^CW&tJ0vXhmmo)V}W^s4Vx&c;ovc z+hn_)l2Mt4_qP1&)JkLCU|(amS13R{_Bs?;WbG8`Sk1x>@yo&+K4@dk6{tqQz91x) zyKc9;){&G|zpDvera@Zviu>GV2Dn^hl2?RB?>rS4NrEny%-|h{(M_eU5qE9$TwH&l z*n1@)mM3_*L9=_rae3R8&&5-oHj>=5dfJH|986J&V0U+KQ#s{N3Ypy*H70(0h=+CH zv-RyY7+v|5bDFk57=>#3L=72EXEhvv45hR31eMw?53{_JBdjUVmha99%kJ?2hkfY- zCHpsOQXs07x=*021ta5G1HXq*K*2Bf-%OmL3tzI!Irir2(s~PcxMs=h+rDQ_YqF3m zDYKtwT9e0-l!qZY14sAC11Iw&L1Psx}iplg;YcW3) zWY~E-ckF4-v^001%@_Zy0WaUywQa%g0qxW%-#2fk^^rW)p?65{_olL`n@mlZ!fqA{ zCj6V`XDm0Hw%vpXK-gjo`iN>Zs<~jRZj83JQx8R`Nk!mIj5ayZxdPo0tpq44gtqrG zqqj#=PgCV1wbN=1HyT;@blZM=slSP3@_^C$oftSf;^Bl@a@yXh&Fn&u3Tl1q~T&3!P07%4gJa;(4Oav3XZ8%kGV1o(yO--&8zO zz8fY1@<9d%@86DdA-9rQ6{a7amx}U3ErBohIT8Je-2Uj7E5GI_e9^FlcCTDJx%2WR zp4G-}q4h2|^EIvpo&2rhnH099%9Td^o?D8i4a5Ehmj31ZeRVyFV%O|RdnYZ1^;?}V&WaiWZEcrrZHSN_JbbQSC+qE1!bXf~+v!D*0ow> z`-`R}7f{pMyb;p_e$`v+Wm{fC(Y-DraZ8P7=MqwaW3-Sbp^5irH}gxDfAmzwxCh+) z&)(sGIf{)7cHTSOY5ON~L;p)1ZIDnjJa~-XH)QR|b7$x^(c;8L6I-@C_+dXcFR94Q zd|3(~IyMKq(z%lJR~+LZMbzOAihQw*Q?laLhNwf4`U32mwVy)e%bLa7G=@V_EtWzm z*v=kJJmFojons%#I)EmV#f!#V=oWD2?5I)=-Zk4&ugMP`k#3Q z?bUb8Gb{QZ-T-o%{)35O*kp&z6B72?)`0 zl>!$Z^4`mTf2INuQSZtQ)5=hL^+V^g5)-WC!lS5jM4MbmjU$9q=)}@*)Vno=OPYo3$P9D%x+xEof!R4 zB{Mf{hL{~FB4zERg58!;-!h<2Fg>wVNsjZSX(u2x=XHZdZ5o#$b$MknIJRG$Uak&dcCG&uL(5dlHk{q~?Hrp00DY&XQsN=P%g-G7xEIcOVn;1Fn5 zPL19>s@t#45~gZw4rXutI;80w+@PeU5KVD=BBiMNg}o?W-ixU%n88ByW9&u{Hy``S z2~aY%V(Hy)!5T-wfu!B2doTP=`M>dxub$43eSn6SjQ!x+lpcDFLEpQcUpx+`sTUu| z+C@ZbbrI#Bqpi0fU4LXZDPF|QH`zF$ITcRA>Whq3&d&$q&0 zmcTQZIV&j!(p7OEIK?5?frGg6KZ!^h?gzAOI;8yHy-rG!xx~YuO?xZb!gt{=;55zS z9UVIHe+ys4=pOAyZS3oy3qzKJV1>5YI_oBZm}a=!>CjpsvvHoe#|FV3FWp1WxH~2D z2PiClV{SIFW1EwvXpDqD10HA0bQ>c(=H_sH)VVEv96o6>(5(db-R@y_a+kh|A4-u@ zeeiBlFjtWyW(@-hFinJ+EC0I?)f@Z^pzV{1i72^40qfmdQ0%ImY5yC`1=1wKE$E8j zmH#eYdg;tv)+m+v1zb&WY8s=q<1b;1vK(~Q`x_v-Un0y-^?wp3=*r<`6uRf%&H6g( zi9)gvj-@KIWUsa9^Ya=j)c^YWzxVR*B5y?Crn|tMfeUt0Ah^+CCm$^ID2tW3s1uM1>DxIjc#hftbNj6 z3o&+bWW6rsI!fu5tv`i8ok<9b(L1nZgI+Oi9P_V>=LF5di|1Pg;mFU#rAlFHV|xgs zMJm2Up_jjP?&K?oc#NR2*5)?1qK4|G2l8q`_ISf762h}VZ`09Z=)Fbh4?W?J2}VOy#Eyr;V&Y=4+VPIc(#uI>$Du#wgR zJWfKn*Q}6bN*U>&>uHK}EtYi=F;jK0@}VcKV=4eS5b&J+!;g6NLRZg*D6;~b!=ot= z9bS*%Vt+j0`Mvy75-1WNU_vXCWtoZ9|I6rmzhS&)H@S8RRV0PJKm>83_7vo&OkOM6 z4L?++wV1+ru4;P(?&QpId+t^(GqQFu(hGVgc_Be8`vQCnq#!7M=_T# zM6F6Vpu&x(2pxahZsSrRU*x7tmh~@yTfpLTCd!ppLL!wePMLh>I*GbuxUf1Qm(17J z7|%Hq9BKF2rp4TC>GDiNUezN=I3Cffp11WnO!NojE!~&bkwwqoQtBo9QTnr`G_{GL z=E=Q49K9mreOT?SXt?VoZl=^%wFN&Xfb@G*-Wt^IV#6?5app#yQ&ZJ6C;P?Xk@6FP z;7Ry&#|<=J^s%L`<7ig5M`2tmFc$v1B{dU#knyvPLJ2AWPnU!@;+9_nC&Qkx-|fLP z;ZGSu0*zAdkF4FPfZ9FKbf3armD0C+CQcH&48q%c@UTG*ivm+@xR>$6$ouSr3iRw7 z(LHyzTg>{?!=0mv7YZf=v%Ln^zP8x+BX?q?J8MJGjd(epX6fKsyJf|3=VwYp)5m$buuj*6qbm*7?w(NU8TJ2xkLCLP+T4o$yN?3Y_pQkX zPrd-z0}^!EpKFk*>iL>Ci#z*DOS2YI(ty#_p8<=R^&A}(TH9wEu9Y6Cg;OM-un2J% zoS5{<8~sYJUHRb~<*9}L&2eD|=Tu#!6$&eN`DX9e)xZq#?;lz9V4GKPb#z*FAw}fz zv`eEx;|_0k)Zm?C5Pt$#N9M}Ie24?E_0-34rLTeCCBBceg6m=jU7${1d-a38*l4f+ z8k2o~Lt07PtUVjf4Xg(n9|pCOTs?f!qqLRmLto}_F)k|^I-Pn&V`=&)iFbR%G^E0* zQR$#?h(k&Y!>Xd=q1g~${KUq21{>nfcp8=%^yhV(q%(yfjAxup{;a*rhoV`YG0Tvx_JVgTW)}PDn?!ozk4z=^Bx%0vZ z+ql6iVO&Y%_@#?U<(m<$_|TC__;^$}m{98%qK@#Yvd|0Sna>zT?kpA#lj_BNCnyh4Kq2h0DO)xa9|(vk_ssaTO=HYFk|VGf?7%gD1T}m_e^Vkm^AvpB(eh(0 z_z5KLKFh{mMvO~-xgfbL%WN4Sx2jRp=45L(GbZd)^O?g8$IT`O%f%!|X@H(;}B@Iz38& z2i1~L!7&>(@sE+Fbrver%KK4xpDT)xF26^u^1~C+S#-x%pk$`(OK|H^SLnTI-ec=! z&58v-o#lRXbS1VEZ+moA9D%qsi{`1&$dc3jXX|1({Pdl$-&DSA+;))6p||jTpi~I5 z=8Sp@wEej=q^m%j*F>HmRTW!<&oKqX2Tll17RGTh4FdrTtM2?@xxS8E+10@|vLa^F zr;V9nZO!*JmyFU^5miPqotu9jL z8!-}5dZ8~#eJyrXWwE@BKJxpYOs5##b_Kl4%~y^XC#Adk2rj|*QX|uP(a+nEW%Ob} zlI}AfwxjT1+8a@D97}qLe2K9vjXX@Df2(qBATxh~93=H2+T_DMLfZ7h`t^}q?dkDY(N3aVNi-o^qZ-EpxU7%BpHGl*yV}qX#OpuRBAXvf2L^D2MaV3N4IP$AeW=Z@ z2Ph9YU%@2c_h2$`Gfbn?fM&B&AEvduU$aB$C#H^4^Q0hR%bm^hTYA%j7G$@`8D5VD z;RaiGp4a4R^LH)WP4(2tt?^&CduI<-dFImUQt4+DnV!AHNejn#QDqOyXvjIkXs6_R zD(}(G@>sv}*gGHEZg8XniE;)AS^1qOAemTZ>qmL_M{w|*Xf>{d+U zvNorPRLjaHbz`RomCJ`1kzrgq!SxYpWHBAa8{QG^Drk8hoeP&8wVoMM?bzpS>gGwE|t3~uJfY4&}njb5tWyf0MnDKuuY z?e{kui*cJ`J^9*Z>e=T0`-kzR?)f;s^ZSc&eoDK*OU3L@VM)QC`PyPG8*S=eLO0u* zql;GMAsDkz3?56jE!?+Ap2}P-2>%Py1>pby{mbAn(%zpZmTSYZy#{ak{0q=K#FlEC zd~G3vk&+#!`U>Zfp2P3*QnlJ!vmeu~+zBfMc8QAqpc>vGkXOr+uLenm5Dlk)^3LWGJ zEybj5>c*~!=+Wb|f`9WfPQ>86WtZ&H0a?K}S#{|zb#>{JT0@ruLIG1p)+}b_q!!<} zV!#Tp38R)U2hl1(Ilv^X79t1|5$cb%c?@ZQo<0-emDvmd2XeTCO{ed8w4n zG=7eG^ysd@_x1$8myV-9@m^J&iV)6L&ke6RY1$KDahx-B($uS6Y2?FMac3N_quRge z#uyHC$6g){TI#@A#rYFPN~kpZx^b0dj9c{R<8ho-zCYn18hCH4$OghG=84}_sao+T zq}V|C5kWT?!kN2KuQUs=>Pp%#HeDHVyGJTXFgdel{+_BTT2fy(^Qb8;T&v8s zW$e`phm{{DNICQAcU`->iZc(={9B7yDM`4Ns@`Cw)@`1Sj7alPKAdOZrtA@>^Ozdj)xt@{d- z8MFj@K~I!e)rdP@>*|<59BQN;cQlU4WfzQV))*doUt z^LdoHJ}Pozh5uzrb5U6B`-%OcWbyaZ>j{af8!hTiJo&8@i8I}L1!+_>hnvA^oQ$RrN$y6C=q)+TKozkb-l3`=w`UUMGit_brP?Yn_KuVx{NZnU0=lB!jW?1 zaW@3g1e$k(jZk3&q{$7C8l1xjmF?xdwGSNFSGo_$GYwTSE62PZ(z^ij-VyLX<<{r# zUGx#EccPL-Pa@&f`uw!ubLW^49E|jBXFay4Mr#C5wCXBd zHoFKYKU(^BtbKDYabyaOl$6RnqTa8T* zF{sO;huDREi0>kDiYb+73Pog7Yu8vycHjwCHetCB^d$bl(t ze>^wNF&TqPOolFGBDvke7%bZqSzVqeX+Nf&Q~pA4ffDHC+7}LNUK2GVu64f$Ah}aj zn9vkvy5ftenxA+Ito4Ej2jYQDZi%OG_dYMfev?wcX~uk{$-HMOe{R(jw)F)RVk(IJ z!eM9HV(xM9GiSxxLp!0>AG`BrYA-y!A@Bp6w`}Gb{pkt9W642?Bhv~?w=5ZaZtLVy z4qOoLWf>qW_6pOgk`pDOeeiOjHjhV&?y~c3=?)zf@whdqvS2_753vE4J07IuxJ5=E zov>qT6R{vShH%nItfSQDq=6bWJVMsN=I8cK8ollm=Y<*@jGnh#`%mAcvws_ccYC&z z4Edr)%^xyvWQX_Up2~+8hxdOBWziXjFTUV(mh}!J3nUoZG_LLszVq87D^7^3Sh%na zfv8&STIa}4U)&2uSHPl7j(@R5k&cMJ%duX=<`=C(capEYNw&X0K)*uDq^&qJy z!yC(z)6Y#c()JcCxqDrYn~)Umo2R$j;Xjp#eekZ10bgcux2o(lji~kMYEHYsAsGEf z(z1r6$;(fMWt0L}61al-6jMv=vg!7E1^XZQRDUtHlO%ZZ*S&;83wb#Fe?N-)~@eWtjZw3Zu7hxOiW4j6QAxrw>#Dt%vj zd%I2Vf}pTvNXVnn3!>$1l3mSq_V%pH^dGMLr_VJ7WGlA@d;x0w96}O*#Mrb%t*8ij zj9-4e^z1+|qBRf`YbUFYsOL$C)1ypVyRjPTjFtK2x~wuvEbd=c{6hl2uT9-` z;=i}n2%dOaf*C?I2fqrT?6p+xTSUz@InLBx<9HX@i03|U+MR5F%_Vy2mAH!()`ER0 zT9%osSJaQI)$=$P(XWIu29e;H^O+3Wlall7_ETcNT^8%;?jk5?FbpO1(&V4S4MFxbqUoJmtw#z(G)3?RhSn7ODD76PwiI=N+h8#VWDWfYq?WRgsK@x@=ZQ1Ekx@A*9SXeOVhZmu=@t$ij=-HNX$Z?d|Em z?QoOHT9Ktm`Lf^7op==`G5GV4O{C0gpd;SldTgUUQ#RA_0r{e?3^tp#vZBp=w0d2c zJlDh(zcWOYr-~tbPfvgiH6WgB@ph1G%VjH}_bKtblO!gAR1FF4gsj<1HDz_ekg%gsk9FN}y#O5u;al>zNicl9fE zIm&}Wdzv-@v=?lZz5K*!Xw*^mV-%L3pu6$lEFm@z((yhdY-*i;zE%DF(yK<-qNC7B zYc}ZPv0D4EF_k`o8vI`J1}_<@s8SB&VDB@#Af@j6hQsEQ4syOv^dHra^IQqJ_svCP z5?#Rwm0osyAqlieJtxC`+fj?j$q5x5ac1YyF~*}1gYU(Ad`y;S@y1ym&%Yx0ZfYCa zYqMvf#7a=F`i#pGL_7+J0w)M8xBg5$OW{uQ3A9+9pSJ&l-nZQd)RWucFb=5RU4SHC z*r2O~x7$*2rhpe{;Rm_DN>kRsrHK4@0`Gq)y(45gGWDVJ2?DiO{!s;M|4eQvamsRR zg)P^Z;d4&}S5!MSiZO#?kGnI`)ZTi2jt#k1d()|@RWfSjJC9Gaa;v&9o71Q4qR8~5 z!&BU-G4s~*N_e=Sc1`Tb=Vpwe#pV|+a(bN!i=kviYkj8h^!;J@v(`tLWLdKPY7V_n zV;Owgsh_)BOQp`>!YFk#H6bzDnMKFyc3`1~d&&O`c&oX4tNHSB*u2s~PW3teXVs#1 zev7+EKXy;={}xpPZ&Paj+ZpDD&fny)Y0qQ@`HDoy%=Co|)c&#{03+i68gba-GieOI zM#2z~`{A%D)j=-ziE8+E{C9P_FI&x5g2N_K2l;HpthF z!zM)s`F~IsIBW!hk^i4U6-4ubE|1UP>pIW@iB1%;HiBVneX2n4|1TQ`W_DKeWwb>+ zm#MrbVqvKk&!B#!$>n%edzv#THMk@l0{9&tD4TeLIyk9k=|tQ207N|p#HOgEX58zx z_9lLN=c(r(0Tc2@g6ohF3!IBU!(rQ5e$&Q@b;uZ4XFoDDuf`hyEzgxzDca@rpUDz0dv+Qzd(Y2AIBez>!MFTVfYV(#jd%LHZn| zGY#9xcpOpv)6=LxQa);SGMItOi1KT%^F!~XPi0WtJSLFVm?(=;_e__^Vg3j4C~-3t z;qoJXAmseaT^^Q(lS8A=YTa6bd%-Lp^+$p(%9C1}0|oeqK3AovYU(sm;H6RRR9qJK zy#AEW28Z9a)?1E!k`(0J=5wV#pKotl4G8BDOh`ct>BHt9tYi=TyJj=9&ja{Dr3T`m=PS zC$DOWn6h<;@NMIt(hQ*}udD~7$S?;~b`ju4Wj_AnST9Temj`Eq{;)0hE`9)=QWfXl zDig1quuEnL%~OM9yBaSNrtP^_B+@BbfaCa0uya5gqbg!?buEhD(gKeUFb;&vdKNex zBw^XYFLk%!(o1fhJ=Gsnb<}nHoYm8(j_lYfn93GU+K`Y(5p5koY4opyC3TH9jD_*) ztvn_4w<_)V*ImYh$f0>`rCOskYaClcW{9`H`VPI6@H?tnEH2 zA-i|;-V$^GbUuDqK{#_GK>BzH((z5nICI*#VFAa=gdESzv5u}UgxO~YgZ=~dAN+09 zLhE?a8l*kwCmiF}rTW+h^BQ2~2^JW9q|rnCk@QRWnU1x=^qdDT`~!e8bTU})HDjlQ zc|tOk`3xbhlU13gFl{A2Mx#=RrqKvanj(L{H{g}^RU_*%2`B^f=bz1*cq*mBE5${v z7s%fxTifYzQwzAUVKpvI#wdjLE4`o0iG94hysy4(bLcI0dMbbzo&Tdk(w3Dy%` zWFF9|NSR=A!>`1`w3IlRpUz1T$%U&D8)<^ExkdJ0*yl`^Sq-tF41=uFZlTrKX*_*` zCMfbX88u}n%-6hIP}0837Nl*4?eapeHTU1hdLz%s9dt zpJu(cnQNKmp`_R@1QL`DecA#gwxROzI+DfusuuPSpNH6vF+5=)y9dpoCFMJwbF5K+8qyW>xIy*Q(v6l-8OZr0*(I4D+qTZNZ0#mW zwDC=4b0jW-|4vC0-EV2;{qf~@b?dTX@pa}#Vq1ht@sk9K?a5pIHE{FIcTS9q$^FF{ zr&6Gqu9K`ZcH`I)}7N ziYr*d_$d;OVc&-31@X7wM)8$b5sgM*PH4+VoxFRSUQOr(m91vaRnw>t0|4Vwc;TVq9= z%(>v_Up(KnnqWLCaFt99vjHg~VlrcJ`@ea1xe_RnsoGuO6EtQj(WOBy23BTgq1!v! z+L^INn|16XC6n>i-T78z#MH(KI%{rkwVeg`ZwLJ0@lzFX%*WLi%b)K>6_d-bu7QT%KOjEB%Yi&2PS(=as_Hmj^|m$lE`c76rE@mA^BAHAHIoo*_v{$yIx zCUt%09r~3qXF6A0;_QG1q}m0uy}9*F3WZQIR3r2va;n&uQL_VIgI!y4BXJx0BgOD} zS>V*XsaRcYY~GPv%F*Jr%dno%57i1rj(R~$P}|P$qc{tbdL9Zryn)hYAV$!-x>B5* zcB7ou;D=<@OH5eL1hu5S7QAtxJk10sB3UZb_6qxGW1G)QIGx7B$eUtsoF$w_1)cCn z*EeFD(Zxfay*dW@4Z*YeIhsg6yb+XKFtVFuZya?E)LD%#{L23#g82mDv}XCW)mM|5 zZqKWZa+39r2@`-!Dd;eSj{-vY$e{VgKR@^^2k4^KRswW|YXMDoCtHOronAAeD2!nl zp!&-R0Qu4gAYVEJ_b|W+mz3Js9hgIy?mwcUDqZDq2`P1(T(R9gh{u3!-A$R-hR1AJygH-sSjArHLLN=y$7VMctSuzSa z%4qzIrt|D-vdKB7?!yIpQ6gmh66(~imhIi&?am9|LA|xZ;p2-r*y9g43geAA4d0@y zM9OHrYMR~rvN+0iMr(>CqpD~+%zhC2By3-d9QySK9;)cxfQH;1h@|JIaW0knp-^UDqHkCb24Xs*&$S2FE*WO!Vg>sy?p#h z2QQg_Px`I!oz$6>YnGSF%}a01-RVehk8oy*dZqepGdgR`0S*Yy1NrUkxF%pis3W*QV;SvDlr^z2AqPTsV7s=QR?tFTnH9Kf~lRFYwH zqF#oTvGLvmC^scKessmr<5i97+WB)s+xcAufCbaeA0Y!Qh^IaH3R5*RZc<2##D*)5 zIB9_^o#4+J(5A6Y@;^#sW&|@lU-B1!BLX}fy5l6pU9%(OwVRGY>7kR#0bq58>Qi?+ zyK9U~8W@J$)^5l;Uu$4CXB5l1`o2r=GBM@y&c@?auPYesY4zju#}#aoihQ))Xu$X}tg!cV&68#|OxV<@k7n$I(_xJX!?&ON zTfp+?-uQ#XSaxW*Am5Ld6q0=5wXHl(LwRwaKzbpcdC1sKvbt)Z*G$hfUB`*l%`~ z;A+N?K)w}5v;^4kHNVQ(&r>tyVcC<@TM4Y%O)Yz|_Oj5%psOK;uemr%mDyt3~!EcpIFQb5%f zLX|}kH!#CweOX$t(5nf3V5+h&R*5bBCGa!L#-m#%wJ$eVM;d1B2}b-+2z()Ni1{d> z0LvS}Y4gA?Wq`z7d3gbRSzDNG5HOXNh)as?ul2R#&jjG|Yr?+bo9J8hU3IJV1|F_X z2Szrf0Uv(`4xO-9w9V)$-TuAG3b+X;NkghFO5Iyqemso9*j?;aJTqLB^=uYj6m`1m z-5YZ47Wu=V@->{pk$@hUx{uv)o;K&>)n%m#DZ3R;KVP*>uDEkpg&tPY3rR&($=2w| za4o=A;$gR2ljMaX`!1?ZGG+c8TlkF3sma3#Te-Lf=C8#zHSND+u3f3@5t1sel1&s} zAj9~qAbIG*Xf;{(vlEtP<-aowwG0P-m;|~32BKU8P;WE^cU_5^t|)W4sSMRAo1H^_VPmRd46OAO1CINpL*9v_$SLSJX?b1)^>Fk zniiq(k4txjsr8$$`|L(?YZsHE#wlx{lUt7=nqpgzWnZB)O{bgWRD5}n!GueA!mf+a za}8=6PR84H-@ZLJ*XtF7k;@*_vftSemZ$RI01F*M%7RtenyJidXi08}(}%qlN`}e{ zPj2FK>eHVKfO(nuTJz$^1w_Pav_8|Kam{d|W(M?}zEp85$y`Ds01Hs7PUx7-n(fDI zy|Wsc@jvL?S}|>HEtj3J)U)MumM-9UO`Wa2&^n#%7CahbRQG5>VOw^{6_ZF&rCd`_ z)Nw7PCJl*px)NOKvM?dnIfUbFSY3Nxx=%Us92gkwDh_XvtW-zgA0Fn<6quH}hYrS2 zMo`3A>XCP%Gwo-;)qnOfr|_rO3xk4hL1_sc!!R)jWRdKUUN1Ae2lTx29XzESJs(|c z-~V+*wqwOyytMbt`}$xS?y+`anX5L>2r*Y?gvcUU@qzN5!k+bJ&Gt{T$%^*igi|%2 zuX^y_vkI?~T4rstzIJn9t~&@ehXKI|X&?wLP1O~bsz~bjK;_nto>I4~IeQ|CJIckw zw$A9_a85OVAOVPL?j5QzNaCeYg85j`sOttho$no;cSgzSo{Hyz8Zfo4zt9&~guLp{ zMjAtrvvATdCF;H7qjNx$j#X&+!#`9!dAsm}l%!!#6l!8^W$$K~;${=e_|(A4s$0NT zxkku{AehX7@{cgCYsv*uq0Cw?A0?JBu{EQY5XJ-8f8YM=&+>%$mnMvOXC4vMGtjQ! z`y4JFCuuiXy7E%DdphQ4+}yHJe)m#X~oZLpB1Qq>Bk4Fjh&qE&zrr9oM-Ed4f zHZfGs%sUVw_rqFYkGbD?Yq95OoqS8(ee<;IvNp>&Pod@e)*Sp zW!`Yozm0#ZunNyu!C(HCu~$MXXg12 z_7VDNJ1JK75-+T8UXIrgHr1=7bRz6Q`R^Qs2|A3KJ}?OOA+5%M19BxoHR12>TrX&# zD#%?V$i30hs>9OiPRfS|F5mrDHhp${6ROkJ3M5{9lItP;!~9J`TIQ+zYh3 zw?1b8)&h3zM+=zoaT=@yVvNizyC;?z8{xnp5cU`}mK-HS5O-d8b(k5kSs5TLIthwR3y&(CWw;VYmjL; z^c29BVGz+but|z4C2)j1(hq|oNjM-tQ4$}nxnRcibWlW<@kOm&zE08^~Wf1{K$00{OL}`)BD~T;o#Bc z1XqyGfW^DymN>+RiR|PFRtu#3>vUX**Fo@M!CHH0=#Bz&w=9Xt^C*^;$Cd zmA^xQJ%6L4)d3hkIKVz+Hm79~b!VV-6A=}k3L5ehE`JSc4!XnNTx{sEG~*`eG+t~3`52w}s*oX?Yd7@5D`A$7!B?oxW6@=qDLJ1TJ+eCjZ zuP|FXg`hr9KfR0%==ZJ{jg@>{O*lK@k`O0~jU-VRq6|53ZlAPC9g2}?y3*EksH zp~z(lzJGpCaI|?bdxF=>zW(EU_r92x@LNjnpFvR}y}CWcZ7iW*BoQ%MyXKKC$GSYy z^o8`Is?CBh(f~C~t$|?t5hu`_TJabGTfz6tqe_2v$>`O z3jsP|?VhV61XU1aBD@Rr5Ha{S=g!l0l9M82Q)?cII^mgvwd^8fepLqoWG(pd& z!hnWH@q=5%2%ookUZL_k+5NS5DwYuPP>G6*J7?z%OU_2*S+TC_F1FZXB7XigkMVCR zIg1km+^ao>YyB;n^{d0)4TD^-*R+mpoFn)v#uk?LoItcm7&|rK^Ucu$06mq5xkK@a zF5ktug)P+Mi#+R5K(|ih!D(PFh`0#K5bstO-NgDi=SD~zm2aNn1BTDK#>@w6P3Q=d z_Xq@%TkRdYK2Cw}s=Fb^Jys5&ytx=^T$PYR!*zyH=+afEa|2&=Jl3IKWIV3IGkBK( zLY%Kv!_$Ln4Q)UkB5RG79Wh7%7oSgkj9iB0{6-fIXNG&-KRSv|6C|9_a<3p}1fH1l zDmY}qgSC#PJY+C}Ia?KO4&NDT7_8-G>77+2bi>>TPzR|eY`u;O8NGLEqFs3aMr><< zd$q_1XL6{t_vXs1QyT&GM++?G*LLrELAG9Hg$%ztH7^f8|A&x3sK(;V&Fz5!1>vF4 zXNS>8i32U*=P5tOMN8^30`)TQ>uA4T7r9J(r_&Jk4N?Am*z86_)e;NubZA~D>7HGR z?I=r^$lP#&Hr^1Jq3}M?s!BFF9qe&sQaJ`*c{_N>zM0yZpVe8HV~)$Chxj>Oig*C} zN`OvmZ?t^v-Ml=Ag?U`Nj3qU|-Y^d|^xq75gg=%4)EV!|)FrV@7RHF@mYBreRGlDd zF75=UnM7~SN+XGvql}H@-wliB@^sP?P1yXtc1Y0dbbLZyL(V$NXo1PS)&B zdktD+eN=^o?Lp081cDf7wqnVsKe`L;^oy{oZIT_ILIU&G!nU$OyZr({36EV$lWflv za%ELN;E{j8BbxUkT8Tp4i8`EU1U1a^gET0|v@Rj);ifUvEZ^sjm%FlU$MeGZOEslj zd&fSkA(Nb{oKl=e%BU$>4zVrmHxnpmEYHtP%)T-tSvj7YI0t=C7O zA}mS$+Vx=IL)NYNLsmGKbX7#CDfNa(7k>zn*7(YXq&)0rn`%Rn9`VD~eBKBIA>ZZb z=liEC<}7p*x3qqd*@@C`_x|r>b`OdXg*JCQfX|y^2 z31x|z5DKnWE@Pavw;N2vUjs@ST44n2-jjI&RAI>t3jO{JV~y`z{WI71EczuwT7L3# zGk{IGz&ban2{%iQW?!`ByK3m3x!A}jeiR``D8WWW%0o|va zJ!`F1W1m?+K$|I2`A}gM4-mAo(elEZ(6bZXSv;0WUo9{A*j5ahN?9P)+@d4SHDpCf z=U+Pb=oKmD#P2Azq-0jsxCOV^(?Yn~R&`MZm-e}6h50_`(c(UsaPr;T$o`1TiN<)` z-$9Z_;K#~lQEPYyHr~$)@X+$t2{ZEcx>lY7ZR+#Y(xCNY&!r7z{439&lROVKMTmv^ zSxA;zlyk@!C|rEPkOWLexBXRl%W=}lw{5QQXM5$T6?gu&u{=2WM}9HopgHB!!6Gi= zFyg^6@-tagPdkQeKP-Xt1jVEIg109J!uSBX0EG)(ciEm_Q$-KS*pg_)HW=KlU0tA! zY9M*~UG4CJQTK9aV)I^>^rnM1;!3i*dm<%I5#(l`K7RM$2QMmGCtbKBa1&%A$C!BY zVUHqI@gBDx~Ufu8CM2Lk>bTt zcUQHN4BLtFrRgyNwVzG$j#JUH`SJ!P<0Biy2s;7WLmXsB>%NW)a zb+U#<3hlfU8B{!jht8+HUEh0lv{a&NnDHAg?&<8Z;Pe+Wj$5s(n%nj$+pUt`q}qwF z>MsLc5!GMbkf|dar4l4eZ=8B_Q(>PeHgtRV<+;VwHW48iQmGU0F4oXs#qC;wYuHai z*S-3Y6t^mJHUGGFhQ1aDqU}~3azg&Q?}7$FZ-8Qd$CbD3S98i=G*mUcOpYr!yzcxf zW+ulijzZ?<9l?~?*8$VXG$yKk2M}QvELLqecx~oY2c4+l{g)7%gV4}Mlk!$k*2Y3c z&0Ah>jsJ(NF9CC+NcKudvP>9Z z7L#Q{#+uy>S;jWTI%ACCJ>CE3d9LSu-|PB0XU;j!Smt-m`7WPD+i210P|)t*59TFG zmiL7RwGGwD3@@`XO@~9<^v>zi%k~CuJ^`K!nfb@^TBes3>azl8?n?sQxU|01V1Jjk zh;%ru`x}n>Te@+qQjkgRGu`^xn1AE%-VAu&(Xa6*`gk|`2FY`=b?XJIkOr^^j8=t) z(^wAW%UWT*zbtaxCvy@r#V33)8$RUKSsrG_cj|(sMWtN(CRQm8PVOoOCh>pHm(X+k z`;0SG3h4ImJ+DN+DbYIeq@i}Q>a*sW(9(HCp4jd&_RW&@?7y2SG=ft9_lv(&# zva9%6$}p(@XRGVw`DYsD*m3O3CABueL=EDD4s4eoUA1}byN%bkQ=6gMFBNTEJ=%7$ zW#rG))jYU@syjk=J3&(VfTLkRKMQmaF2-k{SF8-UO8At>o8zK;#T-C6y<+K7#E`yd zimVrIr5C&KmwI%}X=Y{jTxpj_xj3z_9c!R_4hij;si-??>ty7c`xMD41%e8`jf`<{ zi;tz%83MjLu$PEG+$1X>9d&r8@)l0#MX zeVr97{cDiowyP>?Y2__6>=nMY!@*PJ0SWrm_sJlrZ%4t~USUJ34|LC=_429CFOGAa zLEY4&YY)!O?eBTGM$RId(*}!eka73>Alt}?uRx?%EY+Qm=)*pku?7gFbV7(tDZM|c zf44*b0zz?}XAUZP;_N-szPX;8cb&d2hc;HsK4IEhkGlGKEKF`>EH$K_Gx0G#x@V#) z#?euheBYIcys-19BL3D97%3X{;En#Dl$^OG3WXH#>8G*N`T6Gl`WP0ZS7H00p?4MT zjO`7wA9CqmN~w!Z1}SJg)X(H`l~(!rQ1Mx)wBG^FEM-tK&DObUtuu9v_0J{dOLW-0 zSY{ohq;?2lBgT4nszD=_d*PLHpa*gfYFl>eF9;K#6>MB<2PKh zAf^+>!)sjM?IvRN3hCQ>tA02Q?&zudQEYN?TD|hD8LTQt_NKxvOxwMt$XdkvWaIDE zN5{A06dmIup+{E@)6lYs8Z(t02nygp@&*e++iGYAVm*q!2>XVvA5 zNp+kSCts`ir!v}^=I}uY#i)_0PpQ9YZ{1ZH|4J#w%I1AUYOipgZkaz|Y`Euj&dq)t z(pUVXkK%aa;fT>>4N0@GV9kVJCi1j|5>;QNU;1Liwmh$3t)9qQ;TRe$t3eNzjjaxH z=S!~zb-sdI?Z^f})`I$}cG=jEMi$w=)dE@II4TX|7(z{l$Oluk=!6uw+*oT))l`O4 z*q6z%;vCa174o|lef{ZAEuru?`>Y$2Q9Gu8g!x#aC$*zG7`)6^wF`o032d$)>*fB8 zN@X@Q!*CC&a!MQ5Cj4mdvOOZ3Y2{-K9d7K~Bcyh4J;i2C2}m(Zb+0*Jh2^!~Su}|+ z!awkA-?4zc3-A>8dfxbvr}&GVR#|T!#?;1l{z4hRrC0Ay0$Mu}Jv zfRy{&KNMHB<{B^I9iiooj!${rpm{c4wd*i+Ef04~^zAdY?3BMMlBPpQHa4o;5UyTy z8F2DRKh;4su@`=}o&Vequ`i?-LYyeZL7~yrb9LpphWWo2( z1|e3%EKGO0WYK#k_PBw!{u0os*w9ixivtB^AAbhJE2T0Vax>p}rit!meK29lNTjQA zT}xjlr%jkNwyx75m)k-*xb1B-T~P@$Gk6 zZ|+(o4p`S9_4*^xY;zC>_E({4`jB~DVC+LR%Nv^o=q$T=t~O^FCM^iyI9$bw2(3@e zdw5qO<+@?{pqa|ZC#3tx()Fp9n%+wSM~Hn}RHGu)5Z7r~H}{s2$RERn=Wn zrqSO}YQV~itWvt7o0XmKujwYZ`CB?|>Tt`Oq_oi{FNrUK#`xH=KA#(dZwNxp)uH9< zN32$>AFNOFjwmcmR&u@9wy^^hMbXjw0L_nZOIPcvz8n?FQMnVzwT9*CtCYUnWsY+P zCwI7Piddq&Qj+WS$RG2hvQL6dkwS)kKE_aloHJx2Q8B%bK`C3BK=oA^+?FReu;2Q6 ztY1gl77F(i_fKMQU@^sI*W#NnX5YQDd+>>Uc~M65`TNC1I#x8?L=#YK%0-QBMV}(x zY)v)TZWHa6x784xjnDM0T~dJV-{o`KD0<2`Lw_-527-k0mG^H-nWbH=5kI-KZSr!X zmfw4St@q9|iLC2M%5l&1UF7xX!l%J1?_R(8nV*;O$FXiK#X6w%vSWq&y)SH;jE$wD zmgwx?Y4f8F%qY+S$-|L}2lFFN!w++4%0D%qn`{6sSFYCJB-}nEuSDPGdehv&v_w|j zV#=PVvvqePJ$2-+^&i_=%0zm0WmJ210b7^<-GXOUd%^)nwnsZl?Gzqch0c7m3VkRx z(7)4{-Rs^E2u=+IuUd;GHimB_9YPYe?+?U(Q}M7kd*tt!KWZ_rkbYot$z{7+?Q%uO zlT+Nx0;z89uENjpYeUwVR^#~InHb!b!r17pI-P^qJhcjBqEB&;d5uYd3~%BPpPV{Zz<*f&vp_mIHcqe+_m#G+%9&L~}4>An;euBn_It&|;|%*_Wi^CMLRT546&(TRr`!C7?jsAqQVARS1aH>@U)da@bnr_XwpUgHmeR)olG${E`h!BG-GD!VAh0t2< zaln@&04>sn1rx}8Od5PzXE{ni_NJz8ExP%`?0D0T{-Fl8Jv>kTfLOK!z#BeA?D;skg&Fq#Y@)q)Xbdv$tUwy z)b?>YOuST0TL>->W_*ReDk=Z+_#_sQu zfnlb!D@!Axzai;2=-oiQB%C@Phr99y#g_gZzVk7wtL>gP9;8YfpIBsSJ5tLf(gNVSz_@!O0`J&TdWZsqGQa+w3$pfp3FR(Y z#Wb?dLeKCw6o`mY_pK>nmmaSQf9foz>N`2Z)SIB%v*~uAW^3ZY344oE9-Rouk)G!@ z+h!f7*N4>Yi_0}4x*VCP2%*LRuWe(O;}}Qel+r5iOU1lUFIaD49`(9^jnoV0)0UE}{=@lQ2w_)(vT+ab>?8ZX z)fXNsx_bI8O@Z}>rRYWvjreE@9h9XVI$BZ@BTt$cH4-tNFvql=%&Y&fh_N33zV7tP zgRyf7(%F(Pq2qCai~KU|OS2Cg{~l}%O|?h2`MNtgDL!&93)-E1{%k_qtxB|yUdg%k zN;%hI8?ixyi4*MjQpZ=5C_M?Ry0_?b;LHg}v8d(qG*p6);_Q##Mv8~j3OL)x=XU;_ z-?_B!FyY;N_P4So+}~mCSY9R`6>>Jx={MIp%-yWd7fm zD#^XHEZvdiZKW|K>f1sVqtPLYbCx{LKTIT)fDrO`ERE5K;(*9uUs#Tq?CbqCz@UqW(ST-fw#7q*iqYZwrHA6D7MhyKrwDzAMd#B{u(V}DJr(@rGU&65qpmp?EgGB9QlC=gd{}3HR|8}W#hW%fw$icobpIte;J%von8~DjN#T~ zvt3D6lm#p&CI03_g4{{T*@BoVdvPH|xrbvodxe3D{_XEs;!-!(Z#-z>txk2q+drLp#x}61TeapllS3*X_w{x^l zF$L^ZH*#+bFY8z0I-RnB)P~I(GJLC`j?n=pnRQ1vu3FpO!^`L}^_aDj5)bixhL zVC7Lo>eJktcHTaAGT6-sap4I<=p-JFN_r7As^1|((9y&ZIe%ALc{)Sq*EAE}NJehd zE)hi$t=2Wt^J&?e6HcuL+CzG#W0~Gf?aF3D>mQt>>{HA<#Jk4U(%+@!*ogT)d>+O? zwuI>l%1Gl{fA}ViS%LDtu;;{bnY@VD;XtG4C=hklETvE@EhIO?+phE#QjW$=R+|sF zeKLB zu3?W^oqb@Rpqh=m9Dn^v?|~z!MFVklcs2A*!}mKmv1ZdrLVe37xjBX|*;s2f7dzCz zmKWtC#tk?caEyU^j7nn)2u_Rxfa!JC9e3x{i1a@kwb@mCo4xLq`UUbv3Sy30hF!B7 z@sM9!KfM!uIvo@1m@Ujz7Kg&MI4BL_1+TbF@=GlhNwDJBH?3dXTbgI>0D0p4`y*`1 zUEW+>-tzsJW8yDbE)4;u0k_{-%Cbt;qi@||X$viO=g(gq-nR~|#L-bm{!@g0{Hbx9sAq25#skkTi>o*N1VxTYa?b@5)6^d^k``yTT_#<1ERU zk^Wcrm9gEgMQF4Zo#-<&V(UWltt<8U4{OI?m4Fi8S0^0Q_q zJ$b7A@Z*hHY(M@C2gW2=HBYMYt)3jt=|`OU*%F33_qnE$;5J9Ic;KXzVavta1*r0|v z>Y7>)<`Xxr@v)g8#6WGJL<`&SUOa?6JLU2n1n&dWyQ_ckui2EqRgD-G_n7rCh0|49 z!Wqt0i9Di|aFj9R3lXb4u!;@u;X9YmoVacrc)Y! zY6w74%LnTw9rYAv@f$5|uFP8<8z{~DiuLTJ&#UK$Ojn8afhf``kMGAPeS5&r@XR*r zTHeFqDv!U~!P*&A_~w;Hn!ya->vmO_&|9NE8aZHMy654+z`(D8e596aSaaVn-;ewX z1oRF-E56OS&-g8VeB(ZvpOi$i%@^adD-;QCs?5MUr2M7t4&igOBbxi{Cn1tUF{c`D zl_jTO-a7hQor?u(80%rXigafEK zJ`jU8$w-&XRVt055oZlG(oQu_6p)9Kf@Zk){wc<*aCcBwxJfvS0H6-K4_fRp+yfKrb9 zr8w62Er6tfsqLC4SuFgdp&28IxF@U8uN(NAKa|Q+qsx6w0SrUqq7hKQ((2afl+2C) z)OHot)OT2X@BYIjdyCqsXwL!U+4AW7SU{a>GOjnB5ph9{>^OP+`QDO(fDsuKIU2x- z=F2rBpA*qSVI`U{Ul|G7gR7$2$C7o`#ifZ$}gjOdt>1`g8yxT@-hCy_9HoF9uC8?>L2`0 z+SAOVwE-O61E`KBXBC!G*qC<^Q1q_j(z*RO7dt8p1LFI~Y&t#RgCs=`0KV<4SjPeO z+8l4|Bt0FMA0huoOoGw%U=9_}FuyT&neTfcUMWCK?o!ILa>I#)yidH{(BMhIyhHC%6$Z5>cuO;#?OpA1M+E{j9w-)YJVzQRei>SXfz0pmF> z6FP5iIJE_cU2ebOIX%_cst>vT@zwHq#gJwe_tBW4>hr~U3 zfSEriIZ-CJy8#GBmMoi)@+ugW+%%*g04@P?Ot$6d#?hbL=gV&kRzqg~gd5@a6<414 zyRZ?P*q$BZ6P6&)3!HiV(xP`s)#&eFcVFTmG?ViC6M+FhRGOKQ9|&z&LN>qMeM-_n zcV!SJYdUeDYhr}}m^seQY)FtGA^n;dQqRJ=jz*SfvN0iqxVYjV+Z5W}(L0b#t?;MZo%bx#{- zbUBOc<@$JYf{+sHC2$BqJ;SH(YrH0R<`gs<2#-qsf%a+vmEdLli{1u(HJ5#!w z28D0PG?px;KZ$O=3PD39CqMxg}92F>o%L(S4OxHJ5YV)hYW8LIny z69}xPFMrOp(2%!BO?;|^d2W2-iMRlivMJE!T5h zPYD(ve<;VqW@5+wcEJF=5(VwGoqZ=T+o9F~t}ysO(k$`{X|vON)6H|>a>H%^0sSA} zZz)7aSN)f?oF8I2q48bsiov^6tD%5yqT@TNo*-1+^Iu3^Vkiq>H~fe3@m+{my`t|m zQCY*(-nA0#C;JSiW?i_joz9F^%$snwJOEQ$Dxo;INVX(wjdZsjV276OK-|1O3@kuG zJZXQ&pKY3~4B}DMq2w#inS>vXsr6x24mM%O@#+nIekp@flf~&S_h1F=02F@HX_Dam z<$o?AKt*b$COEQ#?+y8;qu8Iyu#sePU4Cl3j(1pWaU|P|;c7t9f~>lTRK{+gd5Ds14n(|?gbv!i$%ubY{rslXThj~_) z`&oEa|ASXbB2vPdfsWm<@I!J2q|$Rkv{|7UYmy|-pXpZbSUaCY3;{CE5Y2Lc*-*YE z7R7l0cq$C=cR!?_EcYX$0f~;K@#4C+u9LdU$6@EJVrq+9T%nqIdQX<|55=I_a`&LK z9gQxU98~;>SZ;fgmK8J0S5yd?SlaZKlxkJ_%~ChPN1{F1vm{hf*FTN(W&V#Jze;~r z@~_(h%srwXsl#u9e05IJ5)co{%nNhVT<07tYVMa~ZUVu$EB$d5_D6%R!2BDgBk`+q z(75|XM63xztw+P~)oKj(6;Ip1Sq6$AAmdH$=`q8AL$fa8O?2-O`Ca`waW`AnU9O?y zZSnix#aBp5&JAW)KEEUpqYh+2Ki<_6IlFCEauS+rAiIFjwdLQH-G8?1M2h1lxCiI3 z`fP~4v6@CCD1Xob^*PTJ$kl1d$=nrCy(>cFFt1s z^XS>IzXf9*Gx#oVEwVaN%1n_<(agH@uUcY@z3AusDh;jo8X0_o!uc@j(K|GmJjyd8iZU1F(RauArjRsMy9uFonKQKr;*V@5M zmr133m&rIS6Kv#h@kOp~NkC27sj7%HM3`I}HH;9h4n$?lJ-r%kDdP6Uu2o7(r9+f( z^O~~w7_>2osm4*bvT?qq%K)Zk2~3W)B1?g2Y`kH_0xB|6W|+oiIj7YFy{k@b_s zv!EJ$r_w^ZvT5fZ5ND)hW5{X{mK_?VSTdcGkarVmpa`@?sFX(-2^z1Lys%_BKswf{ zp|U%ir}5lvO#{3h=x=5^$0_Ny+d63h3_vt12?Ee1gqv{Uz8@ShxYJ^2!|2lVNQCx)&2*}ImMRDeVljkYz z7)Wpja0^F9Fl0+ivTkW}&==CT+IMq>5T@V9c6Vc3F&bpPv=cepv~KAfJN|W<=~WuW z((^sXLAd24JDpCJ7v)CggXV>qGS}FfOWh5Ehk=|zFJ^NG|93r;>Ahu1+tkk@)sox> zwh7!8U5v~>or+o)>czot@v<_>V|8pgS-5t1NW={`-09^k`-ANN}28IRZ-} zodb!C?}Yg>k#ZJ!)DX>2&Pk+WnTTS!-%Ql)Xj23 zmiIN!SLLQ-wcw>jem<&p^Lj>natR5ttVKP~%ZxA4&^(LPH&d`i&uUwdX^VIXwa3Am zbY|qefTe3Tp&EtMT4NqB&2+A8&}J-@$8ZDqL+B7DOJtl}jgH!|k|;d0mEe5(?zIQk zpV#abwn07D6_8TsVY3d-GhyjtpW6s%zY)USyM!4MNyEx?{RvHPQzkOZN3N!1vT~8Q zt3f!9t$Z4jYLA@m z)9|&$NbDUWa&!aVTz!;@aARdMs!ZD08$G13qBsqY)>ndQNuvo*2Gwg~Fx&Zz@Ou?< z%kZ9YXK9rGdrhpk4G_$FSXcT->MMC)?r_nqx85%RN@uaX;5k#V9`nW!MC_z4ytHkQ z(_ufXZQJ|sD^-_XEk9QQAW>Aw2m7bHwo6(boR$kiZxau2(u`bOf2_Y(B>PD4PbGaE zdh-21a^G)-(V}lLl=TFux_^m_=oes>MI{7J$B_VkL-l z{0$JR$c#z-92kY<&lRCW2b7%(D=?UZi^*-Oe~s7>_rPNB-?9}38UQ0sQpy6d6Xcd3 zanM(Y@~VsZXXP#wReaNs0KVdt9r5e;N^;A_(KkP?PLK|_$K~FEz;}ahM@A;r-@BVy zggd5nO4sS@rKFc9*n8=vUkTA@&7LEnr@p&mbB?Wwy{{MACf*vRE~M16eJ{}c8i7>@ zt2HA@BJXk4tk-!fD}9SESslYQaZ&4brI5p%=}@2{1j*jI@T=()5~$f1*0_-@xBvb*M*s+YYA-o0_qAG^Pl9w7z)7RVxMooc}pL`+L1 zs=-H$N8VU15UYy(*xY?&{k-)`xpCN5p!Z5=Lq)Wh5Ri(3$U#kWV=ww0Y{T(!F^n1$TYQ~^5?=7V2s0(B%6dK=?5fPveE+@qg z@O>D|x*N8i-j`Ki+6)rL8Tg=MV}=*!c@6d%6DRn8;KlP=T3RinFOvL8=&b$=Tvhc! zH(!YSdc)iqCrinipvi!9qV3fpouClF$}oazc{$QX%x}Ajq`bp1L;Sg4J=gkFf%GD?;Ae z!gcMTbidzj36f6%1gOkYh5*%shJ43&HjUiL`2HXGKW_q^4LqF|xgZpxWf z`?@SBk|CQ6H|)Ts2o5UPMhUWFC=N1kIi%y!pEu8UJ@_ot^1G+?dd;v`$~+{8bsNEpA?MdPPg1rfo)-ZRk4IlKLh^fkrfR?K@7l;>mpD6@0alzn}9FkZbvn( z&Exi8e>hYprEVD#hOc79j#&sN3`M`tbUHC36yrN+zR;SOBl&X>DiVcno>m-C&5!Wp zXPj;4RI#3_2UCUchjZcC<7Hky%e=&_00ZJ?GRxuC`qZehfY%d z&^L8o@E{=6;|m*6IAgFZo59;JM&1?e{Io8DGD>z~s_&+Ti2gJ~5Te9S;<*ltPbda1s?^Gqiy;UL?jV$m|k0h@UyYC{{8jDUd zN%{EuE6re*dH(QJtdil_i~my30viTlL+E)~xaFhrkQZW#7o$r)*4cH8c1%ORO_CLH%rill__xotyqdMGZ6tr$XHLAwFB6hh|NZi2k%WGl-uWc>u7S<*ED$U>lxiq4x1L+Xh6 zF%)7x@Nt@;(VO!oMM3&wZi@{h^i{gnZ6654bPp5fr1gE5eLw2RPLxJH4Zg{8?DRY& zet(-K%3~i&T0%sl$1^BWd0qq^^Z~zIdZYH;3DqZ}Z>5#$0pr99S5Dk302_2qyr&hF zQ9WG#ftkX|OlT68=5n4)C}yA!G1K8Vxuv!~4D%QD(4=UwTzbZ1L_>t>$o}>#U1%|_ zk+{(bk3L-AGsqgDZC;3=McClV^@=XKdJqn}9isiUkD^B5!h+_t|DbNa>{s~h#+h@3 zVzH+zsBdz{nsDb|LnHs83LOUq?fAIcZox4VM2?-jW4fFpQY*I7lYjp*Gl8>8^Kt^@qx>)&CH-r#?BrGK|wk%@7|W82H34s>c8v~4jYhV@03}48a~K8AU~gZ zEf#u^kC@+Z-Njnsu>r@dc?zlT)nE!FZF+fal7;nKS?P3n28$qhR!ms_JQs=92zEQd z&zQho45$9b1TqC^8l2JZN-08SLGsaD=Xmv-db-E3KDOm25@j#jcvIRpT?~N0UhyaQ zF!^%LtCCLT%5MSveK}vwM(n150Naj3{N>*3!0XzbkgZl zHd!)!y0KBk>Wc^CcSup8XW!rPmvinNF}}2P+UjT&?n=hfAKvcr3)9-Fne3_4z6)ty z&O?(8=CZKigJd}ifS?`VY+f61d(^c488xv)n~JuITTIS*Cwf-dgc0)uY>M` zKEJyq0^Uryn*vppU1%99IT?d1+4mq!I96vR2`?JyJmkYE_ zuiFb%EiY~$#y4HcjmHZkJX;ifgKAY7zpws`$Y7s`P7IY5)S4BMmTDKt31f;UsHPXO z5ifdJOh294ffIQJjbB-pvH$mIns%lmj1|9@`W=<{S>KFL{jpXQe?D01jAVUZlv&ly zLzRW4zgRyU9@<0&)a>&aGJk@T|9bvwW5M9@ys>{7A&qh4wFqrJd~kD8=()&aA&ZF3 z<4ER9z4nJ5@q$bVKKccmVJXmi=abDTi1_EN^t=*~5O(Cg0>8X|(%Q3mWYsz>o zjjPX8+&V~xeq0l8HzaRmXR(;=GLDk!!H_z%u>FZ+IEd}S(qzaduT-G1*4o5_doIt^xsA* zxfI!(g7^K!KJz5V(ZKn;;bEGZzcZluI^%D!1pta^rVs%?GanUBRxyn5(5j4h(3Mg0H@zl}Hk$nMZwm3*uKr}T7-o~bkY>s@(CL2BP<+zðcdt zNF970I^!h?uX#kjObb&2Gvj*mqLv$dkagfw1!dL(6JveB9B2F3i*#D3nB|ObPgz0k z5Kb#OQ(dZ_VO{fv&Ogv)dzMMAEcVtw+s5{AHW0tjVE3OLJ^HUZfx3ctGw|R}Gz3}@-XvAiw^0l3b+&R4;nDZN=t6dHfV z%Jc_7Jmk-j2PN+VZb#p-;fjL_)L>mL+StR%DatcU2sUqz9{f{ami!q*_~A_OE1KLT zqPsz5XQXoDBY8jM>6u{NHRN|J-gjW8#m&3*kyzp1WHGWJxE_6T)|1f^UMgRhx8$Wh zdIQ917pL#Nn?7ol(sMrKY@P@qAM_5dwUa6-{z9O93Ll*zb?kL08@o6KcTJ!yfzywT z?j=B4Xuev7nGKHSr3pQ;u$^xhCZeQwKImqa8t=Pm*0}Ojjo>n1s}4DwSIHn6I}AYw|RRAvAsF z&QLqL!nPW(-Il06mEJC-b70(9+33f{+D!*^7`tRXvYotQ(pmz_cq1n|A6-1|JmHo? zVP@h=+s?DN9T+`%(qrhHHAsavGGD zu))kZ#sb?7DJGlr5@PTZOm-Z0Ilwn8LtHk}$P4E7NYdR6e@BihP^jO};EfoiKJ&?D zqoBUp1qS{mic+)2vv~0s4IxyUM~B|~4d~a~50PwQLSx_v_p#8|>7g|-(dKHnM&8HR zK1^AsQul=M=59{?&H2UTC+pl;v)_Ipa>0XGDYfgW{(?^NKfl-;OM^D@R0^Vek@X3j zGKOSNH|t@9Md;VlM5`x`kTT0(?c#^=c#9Bda8q0+tbOCy%$ zpcscf?Ts#Pgzch)I|R>`(cj*hW3Oj^vSzRQ83|c6MdpUqDTyC-AGh?GY>f;)#-k59 z3HK?6@Ozzjayf*(JC=BE$Fi9hKXLazZZh65=>`f)Gx3oh{>2s^!BTFltFJCj_$CB; zm13JqA=>;ZsW*XLyZVDiX@Jwof|uCqx^2D*a(C%w#%8|)twSFR&e#iY&3|pF+Wf<% z^{Y!p^Asi>3|SnxMPvr~ifab)qhxJo-;y^df1ACl;#H-{JC|&*E$6P$PqL5rf<8D$ zbBjP{N!(-NR@4WS%Aq~EvZ8@wv}(Co;ee-=_px};Jove|(D+wuL35Ri+oAkz>PZCPXjM`X1n@k6uyIO2^wB`N5Vx?4((@I79O?i_~j5)5xh1*k%9j7 zaa}flS?j~6)h;P*C;tRHHi9)!XY;fcy;iM-<<6)oFqa1&6FSCG2i!F6NuIG2ErvSv z6{c$&`cE>3n2J91B-Fh1+)DjSp2~B7+%Ch%26Ur4Nmj4RWaf@z#64XXO#T=wKh<_9 zwf*K*Sx734C^8D>zn6@;IsIHflyX3mC6#_w*rd!9BFmj;P~zxqOk_iWLsPqpa=9); z_Ta0IUCXlde7!)J+n z!`IeFrM4XY<73fY-Mbe$h;ezIt3K;KylwWgg^gWLdgEV*-rY6=%ivjYJ*wIJ+(LZV|~@^G5TZPYkp$ zvvribbC0X5mSlI!vvy9VJT7POPAU2_KRa5GI$W-_YV=y!>$8nKWZrCkFkN)1cu%|; zG8_d@tu)S^?7kBs2EEd+>r4LUVPyO1qk}%Cm&Q$1@&4EF{y*`KJ>=z6+EO$7@amou z{-LXzbB6|wIhgWv|Pyu^+&nYphUxmxsO{g8h_{W=ZMJU}w0A zlP`lCd;nJFuT-9HB2NK8`hnWp-j#po5rw{aK48hLdKDng($S5>39b$IZ7d@xeGT2( z1GTP%z^S(}_~O^WPwYdmh^_N6?Lsl#*J`u|s$JiqySqhB!`FaNEN_3V2k0#w4QSS^ zAsoZ|w99XjO8w8cXSPAe$PW+oKM-DheM6zYlSsroe|TSU#cuQn3t{@K8 z@vc1arox`Q@nvjHs(tx{r<9?^ki$#geLwSW`M;`gDaE3a!L)C894hbjAKuq|#mkNr zVO{02{*}{pqHc#P_^n;bGIZt(8uh0J?oH0-&6AfzGVFcz&O#9WYbFqK#-B|;guDtN z+*Q7cxQxf@`#KI~E5>#fN_IQ`cDUYjyfNG&EP2A|;OIaKJm9(CmSyxiT+9b+^9}HT z^=WoLFcU9Te@d!Rp+Z9Anvf?J-ZJXfHYzWb`|&b}Au;Dk3#%qoUC;TcAg*4!{tvAv z6*6Ce6>lQd01$QEHdaTAxNa_THwW%WF(htk+j?3bmlFMR^^%2`^RjwM>jvK6cO+SS zvjP$EWdDToAnHJ;Pua|-{I$58GV#=Ji><*kCF<3vAz%@&eU2OJsYSEPc8xbX1pVCH zw0_!L*qF61Z#@Or=4EoQmnE=mSwd~%T3ExI#pm`BR zGJ|K&=GO2`T!XVN+@ZA{X=LhL&0Z#$NM++bR}WtAX6gtRo{mA>ANcVrEp<%O=X{)5 zk3-8b_Cv=nn@#J#rApwAc7LL;251^vj-b@5{VnnPo1PbI8Z!=Eqaig<9=}c;)HpeD zb?m!qEVzp463Y2Us=jnc2mHddN~&H?Ly<1Ig(3?xAC9|J%25klVp|QziGA`Gp^RDk z%|7mM`9v=g+F+f1=W9FV7-uSroM^~ZJNdStyjvrLZ$~m1A5%2-@S8Fdlgrtq#jDhi zY75tVvA9JWsKr2}hNSJI1%Dr96Ji>%`rqhJjrK57@7I;l;fUdk)j#qtfpq>dpjxj9 zSnx%9wQ6K9qS?}~$o52!wM@R=JBGp(0K0T>8b!ubf|?^E&qJ~XO@C71THlSnxn1Bl z%x^5Ezj?&;;N->u>Re5NRJMPMVQ(lKG_7+muoNawWIwo?{o5#2G7_P$#7w%u_Ad^u zXDTv`vW$+6xhXm?f+gy&CDF!CkCdGuvd$ipTurj;jEWp}WRPQAMHyap&>_=Uw(*$M z5$fBpwj{$P74oUrfPKkKN$!E%C3K!bVzhx%)%Gn%QNXl$A8-%4)aAcBn>wwyo=7uz z1Yo&Y4myFhsfwwe>7hg^f^^L~*OlHk1*1(^2dQ+dhzDMJas4LDOygc|j7n+|J&MGT z?azWy2HOK>I3c)Y0J;_tE$Z`RZRl7nrtkn+S>c46iPV|J^eLIK(4bYKU+-vTsv zI*;XSNZgz7_qsRoYqp(Ko3;F}X=nH{Ki+c!-(vhpYf?{7Z1jqr6U4MPXzvE7@*@Ld zI`Uze)Uy1Gij_c3vi{B8#hbW?ORm(sI+Yvo3h_|x6*b_$r1bLT2t`FW1h(5y_*c5+ z`V&yZ8}SkK002ie;ujbUFoV4^whRxZ zj(0a0ozyQLX=$lac={VmB`pVg# zu=@l1cuLCFEoRll&6>rdwQZ+1xADL%qvPS|jOvb;jM~)@=t)glQ8%oJ9y0Mus0X%B zg*Y+aFO{V9*7eIUG9<-mD?xz@maPl8MttjBol*UuZS8O-TUrL};i(BLXYZH_Gh&!Q zj*)5#)?70Gm`?mSJ)w@!8Yg!}{UHk=Zzh=qc~k)TNc}v!dfsT#u_T^7x0d7F$E{om z7x85jt|Dn40|fMCuLOWD)*M;N_Ab(SG$M%&b_H76>w$A6<$M;PR_8Ta)cus@EP{^^ zASJ^vuoB9%fIClmZ^~@vQ?*68Df*ko>Jfxkul0#N5XzAckAUfXK~6;L5d@#v+Ly`j zll0h;eQZ(wZX=C*eWUR)@3I{1iHH1~yqXB3%8W_!P!ij@)V0UK*5fLQmZjETJq0(i zFAjZM0q+=(4baZd02`%_HT33gwG)sKkJ0c@QW?WXmGlPMn1)}KihTDBN?v*3n-)C0 zea3cje**3h*D!{R(7`J*l6HyQ=zu>#a*q=dl#U+f7jbLU#|09srHwSBfD8~He$>% z7jOFa;oynZw{TMa+H+|8NoQ%|jRg{=p&c~(z3R25*eh1o)3BXlwp!-Tpb!!IbHfQu z(!7f*=mpejaX-bTIBF@2-Nu{pRD-2QypoiF*)}y6^gLVCm5X#JBj(uX^poBbUiS@r zaZBPj{85WkUWxaEiTi}+-*FqbS1)CT9qyDGbgu?68K0F-2}eTU*Rh7>>J5yY5n=(P z#G{%a2@`8`A`8w*n;!(z9>S;g_;Gh=ElrMie`{uu@PF^X^`y`p#uZip3kP)YIK7zjTrGdQ8=2|cK`zPY>0Ck;A&^$w24N5ZL5{Kum%NKg!Rba2^LPA181 z+V1tM{K*g-ZQauk{`BV2^%s4*nza^vWZp3@$w+Cw|~o zD2Es^y92U+agI==DM^mL@KqO5G$K^|ExGUcSkCFvlJE9jrQ)p)c%2a5!xTXIXmp!9P@ zyZ+J*wCnqZkWyFw4_WU4)kN2J4XdcAG&>+oMFpe;L^=eOTeuYj6_MUWM0yP&2~iPH zX(GLg2#84Ugd~I#dgz@Hdgvhp5+DTr@p;~NeeYWTTA9q8GnvV(lgZ3A*WTCOhtCz( z(h*f-p_`NZV`zxZmoF7OZRIffNaK2UFVcgOYcmm`33-sbE8KqGl-Z8;#P9;@%ABm5 zjw0@B3iC)6-`>MJYYAwvmj{BQVUkF~C?#}1&|o)|J7@pNbK~6R~>*N z6KAszI&EKKIEB(yxq=l34x`8YeL~A9Wp+P)C>*OlbLS$~0()em!zBy7FUB(5hsaHl1#79p z^Z$~}cI^E2P+(<@eo;rirbPmKqi^8ehn0OBqvnM*RO4eei^HQkhsxk*%)^D8+t|Ie z0ikwCBj0kzoyrWOrH*#T_rH;G0Z1m`qD~W0D`cYYcx}KoU zJd^&|z@Rb7O2d+2E^lTqjQ2aeyi`l;f1_au3*7Dv@V|x)*aIj~mb)@_GeO(MJ00wC z!{2A}YrP?FFt^n}pW_)BMURPGO7yUesxuCLhBt^s zX^xedrR16X<5VS{*2(Hn6fS$caVeF$V6*h?srD(>`5kfYG!4CoS$DgDNV@>?KJET{ z>DwdXe5kA7tPhwCSK9DV&zkE>zuU(f9ha}n(t5tg6?(H=%(!lfK{#=-uM#2GN_ftA zciyG*pXhP;Y@e30Nu!N(aj`zKi^e(HMg3P&-s7_W-UD&_?C#UuC$*wvhN6VQ#*PMx7 z5flC5%N}Xo=@;-|45?0lWARIUoq%oN&A`%!J(=e<^A^RZG15QO=d1g2Tx23OU5`4D zsg|O6&vM|=_vRi%qblDB;v3Bva!E$ z??Zo!-YEOe3TY|}Cf)2U^UMEBPyAm&YKx#8nWp24K!IP~%xBk(%I;$nRRfW~DtU=K z5SO@Jp7kd`(~!o+#<{<|-dT>Sw8q+#Qe^<6;(ozDzx>g+_wC?^1$Ny3;AH)#TMc>g zM=Q|sA2!q>oO6B2t58j_Ot!*p^<}*~EqC|#68sKCH*<^Ro zEQ5x;utc~h8sZf&u|v>}DvCAqsyAstUC$e5!lJTXDLvKK3o;ryak5Ugnk3G1xF@w} z(8_4Kuzqg7@Xg1~iCIoxp7^#9b@8Hc*CP0cYm~zs9P?d=;Z0B+G-G=5cc03al8&HG zuOrm5BA1`Wg=1tM`1(Jx1{=-a(Xs+*lEvtHIbwod;6Z(rO!$2BTYZDW-(Lp*aU?#& zK)9=9cD`9~?vzprlBYWY8xy+%e3yUJS#SlB%`>h>ND2pyExG73zP|Qr`1+-7r6V#BcmcN zlPM+h%iH(H@*@dHRt5{kW7oo5x&l~g%)sZgH_6*?No@#V0EekbPesmK-fK3>s?lV_ z7``pD((6|ft>ZFSrGe$*UG2;Z0Vg!adar1gzGakglt04mqL9R<>SrGd1l!JeaXe-r zY)9u8-LJ`id@?e`ohb(UwG1%BCk=U*h@UwW;Vv4^NHT6uAATLn4% zyGyuuB}(NQPXqT|NJ;*%tLEHV!I70q#G|MEe237CRpLq4a&zqY)z}p#<~n6~p%~+0 zo?!#g7@@g#eS5c}-NB2ZsXwqP)_^Xt;PyW;cdH@b`Q%Ms z?vK;VFBZ@15+#(b4(SSITC5fdIDyx;rI9%r?Nw!a$4cJ#N1T;9|N{ZNXL0qivC$Eo-@Y&{sz3T9SOVj$Ih2j#}G?&|iw zBTOS4Cz{KC_u{wwPrII8+0eG#b+^OHz+@xtx`&_&B`P?{E9DfujkeHX_Sl7!7w2v)g8uKs z0b2)q2T=Yq86T#jx>F}n23jq+|1Nb0Yd|ub)&HlPUn%>74Ck!)O(&jN@n~0N3Onaj z=L*ZtENRxf$sRnj#Dy;*&n3;MxF6f@vlZfPTN!4lA}$32dV_h?)_M_E`i4a0hDG9- zFp60^2!JM-Z5U1;5L7`yrB4+PML#hrej^+HUW;ym`_T~pz-evGO(kMlNv6^lU3X$5 zD+tayj+(F3kfW@f-FdFr$y}!_Jq3n6(>Q`1s0q!){PK$Mf-QSRY}%(#HuwHubs6#j z6J}BUk>>Wq2h^fcy|)LwFv~8i;x4KctM3Vnoa+3eVV1e!VKxL$?NNI~dErIU4w%FA zs$JEHy0Sa51RW5sOh``%%k8dnxk!FgB;c%$shEq+uhW@U9e5ltl&S40c&7!4ar7L8 z)hFcjjyt0hq$^nCB>kF!Frt6}+I;{f$`oHhS3cuZKo2VhIOj3ewION&l){)Hs?a-L zpF)Iz)QG9ltFHS2E1kW4upz^_j0QcGib&Dd!;XB`!AV|ki4Qy1`>!I;pyodro9XM` zuC&P7nbg)7rEomfZ%gQJb$U$fdp1@XTx7`Av^g5}9^~g+O_;Z_@;b;0mat5szx&q9 z`(ZfehuulTz~bOc_Y=)A^pa2H6Fkm0a%C>R0LQnQ1QIy-5l@0A)i3dUnpBSi9j8EV zgU=j;&3zElq_&2#T5*Qz>?|@H0JBq{{=UEAkxmQSe&pk zPOs%#folFPfqAXdMq@@>bSYHZuaSjx|Hz2UcA{sH7cU#pt|f7QtI5!910$j~A<{dZ zQlL9uBsltp_wsi)Ud!byh;3R4C87y;zNva&cGa6VO;Vd_X^~-Y*tau;)zbN({>7H? z)xYbc>g&vHey>|635b*ncqkb@ba{5$%3eN+J|k>PBL+uvoncm)JR-aO6kT`Z_tQM{ znIUa)p(-qXniTrpa;k?4SPgaXMb0mAMD8xhx8pOp92Pg;IXt1=w%30-?S!{@+rU)l zF3WCgvoxI;)g)-KFv!a5}T&yz0c*gI-10FOSaYMpqCuY zziyVC6L?2Q*@B(J*N*+x*bKW%x_S7hAKT#g=%G$r*`+?+z?2Y>i)PRM1wE?i;(ueY z$n33$5j9(;Z6Q4&%&F=30nRdYSC;0N>QVcmvpaa!$Zx^UtYHBXawd*x8GkLJ*cCviuuXaj)c`ZPv0GB!fAqJjooa zcl7hk;JrginL)pr^Ny-b2p0u2GFQsFSw1$*xLQi27xoK-xQhBt>E=QEBLijYqJWei zIM8vcn87@s@svm@qIL~gU+rU+(|MIKmll!5IX;R9>}pD8^7D~VsWM`Gdm5?k-$`1l z7umU3;%=53S=D@d4y&AoQP$daBH>$jn$f}4ihlDW^E{RTtIy9o@d+^oTiq=wA;jYnd zX7%+_zA*u~I;?V{lku`WKIKuuo|5^xwcXfdeUgHS4NPrpD2dxO$T6UzAbt18T75J@ ze#}acgTb@b4mbX}*3GV^dfZUa-^pNfY8N$jGHRAyp|kaYwcC1hECW!GST$mlIOcSIIBTuZ3aM-ZNui4E+ORH`uZpyPPDlRkBH4h4tC^ zL!R2Prq0x7G~NAF%jxeqtm1Yh;nE^%JSU~9lAvvz~JkT_Cq(^ zsDDZTIf$IpJsCT?I-8GpXRIOozTVPjX0Xg6stzI#TsX&&#tHWw=MkBlTcj=@%JW+j zxu;&THG!gQFAbmH)$Rh+VfLPTQlf!B<0gHnb|rOqRmpEiVw@NE0`Pv!iNIz;-|eI3 z&m^#k>{%@d$Cvn*H1N&seTPu;HIz|40mkLBd{vV*8g*66aBh#1(_4Pv*&V(*c5_5F zMz2Q=cI~kCgUa{XKPo%%dcA%f(cl-___8YK@H%{=W8=s|Ho^M;c09@yH$6ysY$o5eC z8tKd+AXHIrTU zdqQe0KeLmxmS}kQsh(7D@FU6(BVw9!spiOcwX2p1El=##F&eWPKWrq9RVqqpQP#rn zZz!fFUdzYu2hUwY+^}J@ekDWgL6?3eI63pLb;s)XIUZ{@s2L#9f0Py&NTPTJmZ&AR zot*_q9@0r7uQ38M-Y4z#s#;2xVwPz3!{+4=m35v)a^m!A!u?v(JDSzgb3}GJ!9xX2 zjuhKYcolx9=UK1FTsYL9E{xZMX@uu$v}zr+83E033ZjJnEApqcoZtKxpZCHIWenMz z@s+Q-kinal<&q*P+Rly!)1xp|!1<+EMH(GWq_;+e&qgHDubymcK7*;6QA6Ti3H=VD z2V2R?%v`nf$t#2FcSEfcYV7i1w5TISa+vn3B_{(&goUT5j2_{tRU#)OvKRjHTN8UxZhougE};obkfr{>Cmd4AUhbw?}<1a*rDbtin_QV)Gh zd`~vo#n*cmY&lHr8t?s)%Xu>FAiU@5-2luFIIYng>8ModouQ~3$!!`TQRjl2rbce8l;8M>g_Y9qOzGP2-S~N7t=}4 z67BAdCNKV{TXj>4EI#=6Dv(ts{Ewr?Cqh6mcXRV50F}L+l!QLQS{tBQvyhcSP)tnA z`Pm-!P3-bwN74?sh^LxFYAcg@O$IeNW4zwUeT)=*cZf6Pk;V3m4XYNMD?VJ;TjoV= z_CXOx4?hk0qaRO+Tysy*ZrB;Pi1oMi2<_cjTev3xne`M{3?q)@8r$!?joVB(4hlDy z%91YC81PBL`h-aJs6@i7nrzXt+>r~=?}tV_pXD~P(0rQ@7k7mICU5W&nut6P2xKpO zm&WZ{P^bQegjh_je8s%O$0$P7PRg{5I70S|yH9S|W<)~AgOsv9(@wgMjfFm2{n*ui zhHtl;+h0EUJW~#s)yi%r32h8PY<&v(HVT#6(u#45dXBQCnTzx*-Td2@7|CJQEX?i+ zJ2qozi>@ky`6}{m8h9G+e(*oy%Tn2(4gDQD|KtVhu_>9u%_Eay)>b&Rg$_f13LMHq z`2i9VUg%wkplDLtnT4%i@g_qTg|5eZv5K~A=8g7j)=c8~(yh#n-i;6Z-k6c_k4~^M zCC$$8H2sejm8l)MW|v?UpTOz4IIIdl)5EEER}Zd1F1$Tlq=3taYGo1$^qY4Pvua|X zaOSZ}j1VD$5oM5JVe%Ti(=Vp^CzhAF)i!Rmv(?5VZY+Uvkrpe=kjqT=+8i++XtnCbr?u z$9)vv1`xXaN6$U{f8*Pb9{io3P}xn0pGw^on-+C-%R5$56rJ?l%*IB+zX7h2RSn63 z_1NCA@PTFgqbHz_!kMt-AX4fz;qPD-L4;S`-csQ>XrZfP3!=V3zDqQ^&4McL(fqfm zY4Oy?ndTh}dM`>=<*-5hO5B<;+rqe6q7yfFVuJ3`GDqrN)eMEZ@vFOVTNmu}wG!l? zgY~ljH^Kc=1pC5n;v<(6T(Xt?_hll|o?8uJH|*+Rng30A%64ai*j5K}yV)k&1;@0{ z@bFwV51Ah{6BSPXjn?tU63+ggP~$giBd#@(90W$QnlMq@gE`<+~XN(W|O=#d%AtLSJO`^UO~7DXt|~ zlWLBa-I9@NH&xeCiSDO#*2qRX_Q=5&=zZjrD%o@qe!`735<6!r%Uf=PM8vK950z9A zKh9fij6xJmGbb(+UlRZsE-`=y&m?V3WlF zDS-9K{s~HYf>aUKwD~ew@B9((A93%XqRsjEW=#oC^_3_^XhglIbI|Z9K@#4*FHW!= z=Y4X1-tJxt?x~*vOnjD%Qs&h^^dJbTdbkM%3|61E9@sf^ST0z%*_ZPtMs^|C4!kS} zO7fLZXAGRzloI}fP%Jf+aV#-H?5puLNml#fWRl;`R_NQtBJl&4^blIhAB6N7-CHLJ zpUjbNyk)AA@mj0>reV@z;Jn`xW?ta&E(v3+@h*CzDCes;u#K}P?FrDMWfUT_cc-Iog*cttd-W-oNTH}q=N5{mui+bWc{l6$ir2=b#b5T8@ z*Ux*bf5bTy1q2;8bhxJkmOxOzDe{eO5#kN(vS!`mB7}I$FgSMB8Ne3S(@QvkcIdD+ zOzx*>o#I%3`Zw~%*c*exf&EWK5%iw?1@i#c@=#cSxz&BJ$6;U5#Kp0XeoJtw~zz8aoXk zzFji%+OG2Mh-o_o{LI+c3~KAWaWtbN9;BA;Zp*o^JEu2nr2cdvqc$U6ex_bI&MUsD zO52E#dSTY8ebna%4@ZWrW4&@Rdt>!Cc;SElrueNnOy|22&6;j`yYQzuu6F6qrg3_F z-my>xYT**i66hq*w-J22EQMnKa0U(Tm*fz$U3ra2galf8GmesKlFLLrQ>%Us*?U&+yb< z;JYH+Hj6LH;P%)nnGnp`=n)*WVHc$0>tOuvrsWIatfp6%nSYy^AxZN{7^w=ICA(iplYG z*2k6?Es;ASRpwO|&g>Ne>Y9rju$2#>)#l`OXtyt}>g8m$q&3kTfLtBQ8Q&?Cv8s_4 z5jc`p8~kR`TM%N%i<-UfUfUB2Wy*zwr9m$~5_yoZNO3*7H^*@jJfx=NQ#axS3PM)8 z@gOQeC&5!Cmu8Ocz0*ziu`Dd>(u!MwgIgec??D(yv+e#|CUn3 z<^JZM6LbDu%WEs)n=)76S+`mWnkhMW%*+naH8-zvLVQLm3Wz3{lb0<2G?>0AcAp&U z9ng3LEq=t%aDKSE)!*hWaaX&>oR>bD;%CPHjYuE8?< znxgJxJca!N^ri0!feme!C!$xXA{j>?6g7MV`4?*J8}e;V+W0Fj3dRVMIHbde*x<-= z@mb2ta++bF-FEuYP%uMpJVea>X^~)TJ!OE3cyaE)7N(n&)Lfo0fAA|F#H$|<%gKI@ zu$N&xyEIfR#dui}$UF!|zzJSJrE6!tB;TKsDp0{Op+54#nnXh7!4lYX9UuQ#^GFu@ zPXo~|9#vAYV3Tp7Lzlqw_dd+A`^yb>WtOt=JmcX0zsEageFU z+`oH5HX9sINgKn5dNz&c3a+;2**xav4)N9=GxXNQZrz5S!-&_M zKXBTm&290JDLje%qNo;7w%v$^aPjH+e+n^b@xcncO6P5oUcry?EZ-3FK0Fq_{#;;= zWyV*~%(bpE%x;Q3b7^cg^|EkfKZy0oa!l|K5^^tLGJRIdJxF7>XZ$f@(ew zmnF+Prqbw&p}n5J#Y^Km^j}YO<~%t_W(_LepF*ToQXi_yF8+YoFhK=jfwS-D&(iSH zEMhh5qZ8(-o??XO`pGVGdY`=TzMp=S05)lOwu4$2C-@=|SvZ%Su9S4un4KvWfUadk zkl}kDytlXb$;+8fx{RjZC+BxcY8azhfrTa}se4d{wjYyl7pAXmHPm(&NzM|@joG$T zmUo57tD58ZU4)XB1m8IpXFuyV3wNw7W$U+GEpGuA`fFS4$q=7R@yodz3|jAXn%d>; z-1T3OD)|Q%(zR>>8_R#?-XKp^Rh2E8(zEcJ3ANq}M{L8C?UAa7kk{6sH#gOq3H$$@>Tr0KSSCXr>H>K2Z-VGq^d@I&?amu0)*V=Wzj@7{{jFC62WYK`TZW{b~*_ z6Y}rNj3xUcUTYuqf>UAvK0Mv5?>#Aa>6oMPMh$#r`0Sn*6Keg)1xw z@n`@tpW4Dg@r`+4nd3~!W zp4#)wK5#Kuc_;yty&Z}?+p@7a+W3{5hqlP-uU&^c|O zS7*t?uif%7hap#@k{(4po%Jg|47M`BBh81I>$rOd+(P2Hp;ocvM&4MM0@B@bh-V+-#R>F3K?e29yk!CVDBk@|E zcjwyyxhifK$~8Z;IRj0NHNb)Bp5qgAqyb4|ZE%07IT!s+leJskqLT77S3eC=RUVm6 zg9z7oUqh1d_U>eem4Cc?;@hHJJBor|Y9nZ2z$uFM;!&1DfXDah4@KSHrANDR8(hQ5zOjs?imu3o4qr(m)!KvL-UND6rjDO?XY4W zAUd}9aq?3oI8*6|rNJU#1DIX#9c}nV@(u5$vD;$?o>Ex)ukN#}I^NrSi42;y_(~tJ_)7U*bCqT2eSZ-M0TzwC z@9+E|AEQyKyst&QYN;bbI@PcjUY068N4#>Sem5Ci`*wKVp~@TcMuGPvwg%XQx+`Yt z-4X;pHBdV~%41c4N+W$=-Ue$>@9|pS&|ZVwvI-rRVYVm`m1p`<1vlNQfBhzIWE6i3lJW#U~QWjBpA>lp=DHxlJz%M z;e_aK3U{TLU1V1_tiR@*x68T((i+@_dfft|ETr{QJDxz>OL&y=Oj4AY_+`yG9usfP zKou!0bZb6Geg4N>|M85E1W51i)CQNDmy=!vJM)~EafK5Gh2FuQ>FC6>v+A&~NDubk z-_&7OyJH<6&d-k53iqY}v9ML+FVIv`!p)Z>b~gScnm-Gg_j_{Wa=5&tEXS6A@wiq* zhE^tTYMJvdWfsgG^vNw~_Al6qBLOhrY5FBUr&)`WPu;klB;`yr4?qN#*7i`LieJeM z)bd#MgtnEVbJp4SjCfJ36-Az@LN$=zSfhmqW0e7ir1`28xhH#Ec0_FkK0i9IANgoa}2!Iif7B7f9e%orkY-O_GePU!t zfN25}y0B{TdHWxD=+JrciPj6uPB^a0E%dJ?kMLscPj4rw@`J6L9vH|f&1~pLc0p;x zOX_zoIJ7zccFnP`xxU3uIG{+m@3VGS*>g2w6Sj%3=YMacW#W~KUcOiBW9e6eO}m!BoE%|0TF#isrkBY(Bn|7O)m&l*Hi+6|(C4N=N zqc%U~FK&lexSTjWdq>FpDBfWPM))Qt)BpdH7qT)jTiG@iIrbo2wcZ1BE)dUcyu*2` zLHg#!{S_ICBwpjZs`~$8FEpa4))jkGE!9Z9>*yr=wcD6i7`12n9fGu%R27Iyn7zy0 zNZa4|H9I~XK&DZkAOk3kAU#a#gu7cmKd$F;=MqVgOrU$hl{%;`T$h_d*!f7ge18y? zoI$?Tlt+T{=)2)!Bcp^OS-Sby+k>F#KA0R zi{+c<;}Z?9i1pOC)PHaLJ>&OkIWMf&jC!QwzQ^^S{FTf%%&(D$j_8JwhYwP|So*B5 z%lbVl^x`?H-l~o?TK#cDrBzlt3JBPQ(YL`7<+-xEg8p~euX~hANTJQAV{IvxBU9rx^J417YgQI_?*2I^qD0bJ7LW^Y=;{VR1e@L80{7& z_XBuekVK3@5$;1*S`Ak14`<#1|KwqRz!ZUBSX79dx9v!1#;IF=;t6E<7 z)m6XET7VVZugFYLS|eo9iRO=L_;Ci)6G#tEUf+bl5hc?EfyPP((ft15>&IPm_s8qz zb(*yda}VUetqE!xEVWZrc2Z>CyAU|?B(LT4({hH~l%$KVJF=_L#~B1CIyON9R-S5~_**RB)!)f^vLQZ%`^-7F3MsL|w zVr6a5)hW74dxP$qvyTqd*z&Tl+ol&Q21*7Ua8{gP#>1G=qZ6=kQaI^E1GAKZID^TX zW)K$T6;tX2g33tYqZo&YJ%9PNY~1dEQH`p3`TXq+wgCYK%}S6|9n~P`EkuJ~gak$ZTqyJiMFmteMI_Hlq-I^lQ$uiK(|vzWrwyyk%3L`<-6FR=-SmTZd0<@& zlZZzyujh`APbn0QfS%Ltda9c>GsSBnJ;JZIR2kW~QO<8Aa^x&3^R;J`=gz&r zsDG2Ovu8}xFLh|bK0|9@tKPx}+fBtkOAdA-*ToX&@A9FXxt3ms1 z4*y*_o6>bqQesEXq6kT};t@Ju=Eut15$>WmEDg^*meC%RM<=A1yF{@NUnAGT6gY*d z(8nAz1q?X}go=%n^bz|9wIc&NOOCGJdW!B4l){Wh||mBs_1a8mAKiC`+qEW!as zpHmb5oodsXZ^#QZ`q_P9;cX4{!SxNRneF=-+3WYl&h+QYs~$g#fP+(C@`KGQ5?K=SI682;Lwo7zZT z*r-u~yG07#)!|MSW$%g(T4=rR?QbMxWfaQjnnrlzOI7Vng+|{*y4=+n`Yq}_nB?A- zzAU<+ZPP4-v4$HD{L= z-%SFGu`l;jQ^EdcdqoSucjbCfi1z^>Vb{Kn9Q93waVK)VVJ9^eqi%T9yEBhy z1%f1ABMk25W%}>gX8a-28ysV5NL(3f3tL59-T1O%oVTnN5p@~JA`V@eJ0@vrXBiR6 z*HYWZ*HUDd*i>V<_DEfQn<(MTy;XEPus_P@Vx(^FqO>4ZpPKE#$<~YwyOxm@`5);y zoJl%nDlr3`<#NhZN-LRN1F4wQC|S-clJ4hE@&;brf3q?@|3ya*WyaMm;Y)LtY?21H zN>|@vrUdsFS}t%btxHtDE<-A=AC)E99L&_|A=}v8^}Y2TqjgkN`}}=>cJZQyCp``4 z&&socC~rIa-ox*A##+KDL+Fm zc*KiZ>lJ+ANSIDlX@P}E&x}Vnj)YAo`71llP{&RHDF6-^>+VN&hhAo}smd9GbLA#{ z zkw)Zn!$>ss-viL^)K)aW{0OXiO(^?7DhQ@oTorn5-0LYjrz^d+Zb;4cO66-N8}jbL zWd*CuZXTWsPibN^^72^zAt=Z>w>)&Brk1aLDKE?`K=vzh5W73?qBQRzJZOehzm@<> zZ8^O#U%)}zEVNbb&fhsYrCzkZz)raZs3@gW^G!U7P1e_UnBwR@QI}HfJMCr{Rg_Bl zZZYluA@4!WbAKN36AlrKcgNvvf)rW(pAq}hs!ekyi1Z&tIKG>NbHb_{QHa=pchz)W zj%GX8NSkp()qFT)3Drd}x=*OpYUy+NkzEBWH39+??3WKJtn%l}LY-6(&Kuf)B$MWB zas-#pouOe;0vE%Sgf;u3)9Avgv6DY#4Y_B2JLz@vU+VBC_#9PWA9N%6DPwKc!tum}0O!46r)@|aYnPV*H& zFLh`KSFhwAdRvBw_2^V0bl>5tdX~yMF4>YTDv9pmn%z5D;Pzdya zzGdeHFWGQiW4i;pL4>27K*IV^aJ3IF2R}hRZb1N_Jx=jyE4nz-msZP{ux@uYp>VD< zaN=yj`l9b*nWfjS3=xI|V=vZS#B#;Zirz73J?03*s_hm3lG`|k@#PpxInE|B4Sd;0 z$l)jMjdNCq$eH-KHFcIQ^OSpl=IV0$Sx24rG^OCFeiTL*?6p&gc}3{{=)S@u#AiO& z^SXH#W`OOh zkmb3nJC{84b9QlwU<0vFN#$}f3B81S481G%!mCy5JUK4nspe|gIe18v!-p!jnEUYuot`fVl8WH*Z}!~p{|CrIm9K3?{WW;9GS|KGMqq&v@p&~Dl6C{CKc*!NXcEf7lh62hZJG&+l6l5B=ev)bs!BA^`mz^1y%5FhpjKqj@KXb3SXL@q-?1?2j6|- z{!!40S8~?$kWYT?nUqAoa8p99N%FK4=!wN)YY`a#d4;rJ+@Yze)*|c45u36WuWB`R|ACr40+54KTQ!6;(e$PsE0~?hz154fVN z&QA%A6>v~`Wa1mM5@cVGnLjwb_6)9rmqEWW=Q&3Z$#vtLb#i}SEZigDg1_cZIPe6cN-Q_daur|yh+_f{dqw)k>F!`g{`ndWC>wuko> z#S@kq?ulUe+JD-xtqSC#-$T6iiL9ncy1P%0P;lf?&uiT1ES#|QSR}b}Q1I8dUtveE zQIocRF=pE^Y;dc5*b#|Qqhs9nbSPjhp^J_!J-Q5?5YWY{h7AMRX2;C`s!S`#1D59t z6OPgXdMWYO7T(7zEDU}$i44t^|4=Aamr?Q>V6WC}1b$VJ0JE}3MAd_PjP7x8 z{dN0^RP3iwaAS?Rt*~ols=V=Gtg&cBu114i4L8|8*b+}U%~o&Jx~1*x}xUgcBHydKLRUGDxsq}znM!D_}l#|h+@ z-0}El_JKXdza4WJoMIMR{%UL-Cjigo3(P?ML;o-4s*qf&H!; zBy1m&4yChJ7tb}ovULPGx4*3}-W=`q*0&t+9tr%uowK_5WVE+&NB!5fESTpCTIPa5 zoRt{;e73^ROJ4?0$lgv~*xnBADOS_>8CH`o zombyd9rTL4Um_ht-;W;E&gqs)t)7w#J~$Rr;9IFA;NyVC zZgzJ`kw(c2BLkYS(Ap_}rkcpJ8nCchzzc}$hX~tY zP29jnn;`6_4&w@62YqO5 zJ4wWJG(&f1W{0$U4zshLqw#4JNwM6Ryb5ESTouXOOBhvpxD7mgeXOD2m|udXSvoki zb6t+U8D7gXh<4mYAYd8EObVJtbOVf24faN6)(6OA5wv1RPeJ~AmRV`Z<4S#+Z9=!8 z_X&!C{N(*f*7^0zMS?#;m@ku{K}6PS!ZLLy`U)j@U4U6?`L%im&3l$pG)F4T6@R>y>zZpNTSWlzp}2~P-P2Cx_i6XB$c8d%mj zcDuVxA}$B4ugUMpzys{|99aC56LsV3tX<_)?^r{bfcaF)Ei$StQ&h$0MkuIlTGwkQ zRS+!ZIPp#1tt~oeZdat3lo<#DkLWx?^NKX_&c{?7FSb}6yR*ZJ4*-F8G*AH`0`%e_ zvu>uYTap69vR+T_g}7z0+3o~xV1|PkL4d(&&)TzXU1qE6A9;Fjw94!0dUgFIZ#M3Y zOV<7SJ1YwHix|JO&zUmh8-gb`<3#>6pnjyi-~W5<$6dAFUD6GP&*ye?0c*yt%q6L+ zzxi6UzwujZJuVF%B^xe}_bfQMnvn1p?s!rGUULe^rkHKF^i_s>y-Q>ew-RQlY&lB> z+szM8BcY5i63yY5V`W{N1 zbYHl+kQE?b^lB}4ccJZ-Ef%@ajUk;lTx~Y&6Y3?wTGDpmYu&R5ah^`}mKdrxx2PRW)J*+T{RWvSABoQcVD*rKeaYR@4~4k_F*lQ#fHUJUQ+YFjs{6kgU<1Nhvo4gllH6hdp-T<|t( zg>Y%JQZ`Pm^vKCMe(X`h-SXbKqtzCVl((t#n5KQ4m~&LWweZ-lCBj}GXZ}S}Ya@Q9 zlLwwsvZqtakLjw0#!1p(@0?o=tk3!z$b&*-m-d;Bz!M4j0jSjg_?&*H3Cj7!$=rz|zPB+dV z?SHQ~3kxB(gI5C{V}BP-##Y8P_eD#hMW4d+;KP|a&vl`5_u#P?Gvr$=2RDZwCbW2} zc~8fXO27Gtk>{9Ct^l4Br_?VW8rK;pOAMSF}=I4h&(AqoWYDOweZZ*lSH6!Mg^E3W-Ek8TS z{_uXRY~*aPoJ`ipLpi*|T%8f0x6Nti)<9ucDE!&qx0i`B zxp-q+WBvYoF<`gX&_FUQHvJQ@D&R*0LA{8g`u9nOoC3f>bFo1*pI0nXd$*cVy+gmr z4|aQu`TO+;^J14b4hka-s=Y;TlwqWz-;m58?r-lnvYbs#AB^RQtEH!!Qx_+u}<1_>;8RjdJ6q)R~2~#yT@K zrxg$)0Za1+?^>Q=%KzGz$)>Wv3oe_q4>@Ak4pnFPh>DJ_@Mxo^n9h3C?rRPL>n%&1 zJ}4H~Xdwd~0+9$3Vo>)NFd$F+ZwinCY?c%={*?fsxzoabdujoL;`MH1sRO_ojr7<5 z@u@M(sB=?WOlKATSR+*J&Fzfw%Sag*z*-HdCB61-fhljL7}=+6FD;(BvrvqD71&Wt z#2yhP+G##vC+c`zuoWH%Ix2LYa##hxGIohEMtk4nAkKWC!{=oO;J}(wD)H;!e&Nxs z?6Eps6q<+mzI%MZ7!vGnGT?==*;HpM!p1Ooi$ZISJch6z445!<~P7@t7-qP>YF zb<3+(){i4-?wOo734>X$#1-1)2Z5A1LtKlO$CVbFA4D4XD z+NeiP15AdJ3hFthbBc4c6%g6Qrr-s&y=9|lu63n`;br4k$MP^qcJ>7b2ebycZ z3qf@U-K=I#nAmgr=n)V(#r2gb*;f|WSH4?IhqtiJsf5G}yIiEwPPlw?5tr(PrKUYT zId_|C?iTD2IeS)CtitA;7brKmBS=9ep&efQ!|Sy-@r>U*T29@>jvu7et0*j$!Gava zJ9~bVhrLSC`~21M?q$NYh#F;kTNdbqx=7o>Nt*ae!n0(o@^O(6udC1_$o~lUsB0i_ zw3a3L<$qWBl122qJ|=_!2Ei3;S;v^m|3V4_XpBbxPEC;w18y__xg+rUn4RrRo}Ec8 zC|vSST7-|r)=`qPU9q$N@4>xylzjNl+0zv zhFMyrq1j!;YodUqXyGu50$o)Yxx~1VkKETkK8b|GcqZmWILCEYMe@f`fYvD@gP{By zX@`9dm*DsJWmr!wX_VzU?OL4KSSA=P$ZvuidiZ6m?*M{|dv=-AK6}4kujljeL{4lZ#*Z;CWjCHKQhrT-+ccl4$GH-u zNd4u*XQfn;NaRGdwQGVFwX}j<{W_Q&>F@oV^g}F69P_^2&%*`fz1{yv zS@jtUUtZC%Nf4f1WyS8i)`$+n+i?3y-l#dMu6Po-jn~9|g>>?IVy7*anQ^;w&j_gYqodxj(ipmbF@v>J*%@gXQ;~ zV8F$Gln?Nz?U0Q6-|2aJ@>-Q4vU0A`50{IM+d?;Hp}Jk zF0WeTjB)pb{`6WhR1&s%1G^N4aaGCfk(!p!VQ5ovqSG4Cm7;)VL#O9VSYaKx6Gqw3Esr<`wlBHpoYg-jm&W8pF1<|CLQKD&+n6sEz>?eB!>H+3O&owYA1a*lS$~BF3Lu~-UO-sz zZtAL{47u>X|q$VvEC$bPv*noDG9pVV+ zmYijQ26CHN1q!3qDY&Okl%5HmSQ)buZE=))=jNuo9*!3!ZUQpu$v12(a{i7lA@KI5 z^=9y_oa8D=4Y!ZxalrY|W+(cVf8U`7`_ak+&2c_kWdyD0_rB%pyfBQ#6Yy9go*64B ziF^@5fy^|ck4!f=M$Ve&WJ6WLWGPMxwp5iSRCv4d@apBxQ>(W+&#tC;Sg(dl zqW_0g6-zxQ_FI&6#a?6v>?RHRstoUcxzX~&uAxoB=y;o5g+-YuQPtDpGk}?cIsAj- zb8EXFyARVQgf|I~SFsuw%1G){+dUR(b31kWqe!%WqKDr2&Un)Wa{gMkJ#cFxH7+n7 zZGLsv+BfV@Gf2ugdXsBIiR-3 zL~z{=ZeD0pJF;)p3k<=A)|&j&@;x_QC?c!Mu0S75UhYB?0}vzf(g7clZAya-=>)FM zvcZKGpmz3Ibf!8@wUCSHoiXYE8wbv2ra)V zFR8utZ{qwEmOQAfp6X+7zTmPoTM|FV?#~q_dBCXF2iSAp5mKd*t;c$@)OwsO)JXC{ z0TCPLVo(RSNBqX#XLBoGY`>F^f5(P~PV)mlzzem6IsHTzs+cD^N#h!M+huVn zu0=S9uVZgph4a``4!5cil%T(A5ZOAYM_CJ;x@=UCe2_UQm18pccEE0X_F?^pzMqM_ zqK-2UxA>`+fCO+O;@>6mU{NQ=*f=)q(jA?nxGRT|jI_AbUjuGlNkHpe#m>M6aVnP;EyZ zX-`Mh{wmvHG=Ccv&g@}lYcBgHQ^pRS1gD8b)^A%q0!cpQRJWvX?lf4)Qv0Hin}nDN zoO)~SF5jQmYlB}3zWP)Sq}j2n=_u0sdQ46F$=dGtXJw$xs%w?*A}!fB zdk&+rXuS3*d-M0WFs3FzEeTcRun0B>6^1Dq1#gJVgl(W}eRD(l=5~?^Buyx)5|teJ zjqx;^-+v+NJ%7T|+~iTjH);_l6UgOGG0OXcTa;YPwy(+>a9 zXWt$k+hCu4bCYO>sJx5)i!)fH(tyyhx$gYtmfxwpZ=oJbSm}jlTR_yoj%`Jc(_m$^ z8{??~?h-Auvd3wrPRM;OS^AmFJ(XnN;t}^<|1k;#YpZkg_sJ858*kbvWn8H06znP` z2dZUMs4szuq%#*A%=WJ~n_^d511XiCCtJTcoO(_=G3a!vLD&`H)jcBK*C;vgC4+ZU zLi@Vk}_qgoHrciYitkyGelmID(U?(5dI@B z_SK!$$eTHqW5=`os#)RI6^xE23w1Wz{l${HXL^Dk$XR>g1_s4ICH9$2;hB0`K|U?` ztRa{<(9GHhcFs|QKFHVo`b*MwA+aRTIH+ExUTE(2p&s|C_D;h72LEA^I#Ak$)Mkzg zfAKgXeEwu`WZz?DkP)6#To&thDI@ZiW=AF{?aHO$-=@+f%bOw-w=-QlPD?t#vpPSh z(0Tpoi(_BPT;|2ImS`f;mE2&10h{yK@{OR+7QXIrflbRoR(?20x}hI@mLZH2@CF-& zUi0#Y*bw}dovgn4mP69lTIZaDHqn;O!FtCpP1;+lt_vj^)@|lZ#`#j;-R56RNU^@+ zZlZh2)c9J7=x`8J+=OZN!F>y=y0}VIa2Km!yB$YAVEwgL9QhoFbWf;EvNj=*KvrIk zBj;;C`J-p{=fj`-8@xrSh9Phj#6eEN4Yh40qnX&O`3b^zPq)wF@7g3N1w^CJJi-lw z!O(MVNrKmnquG>FI|3_9%r?ay5-F&wgufsO~t z1%B$Bkx9^AFbe8VSX=|^?kJk=#`ZK$u9ZKq-94<>KzK0)kI^s&c_*6nP+(GPAPPfE=N>GejGeuz0=hHcod}`KQZ6rqGW2JV zo854g5x+@%RgOIWOv8OSgIb*#A3j(7g?A}}^2i3A%?%Lri-$y`Yp3fjY5P0xVDwsc z-3=z;H44aMWs)>SlT7&W)&eERCgBSRp5vQz?1JD6&p!f3jn5;WZT zyiM-A!v{V82;_FY8oxMA6Td1+-OpM+X+POorgE8)u-AX-5dE3m*FB;B!VmcSMaip) z-Ymk?F}kR}%B82$DRnB*TL8fFGkIe_pc8mh(#?e)??n#cb#GmJvUObf=PAlO`s&t5 z`@ul@uUz5GEs3^=t{W;jlov{Z?t~h~)|oJNFskx$piGORBYzI4s$p}fG-wy-hDoV1 z&p1sHA(X-*QGp~AR^}>cjiOd3_Np}jwe4F@jy})pL?3!BS zzIs^U3H!2-=|0%31Kr^q5-h$)yxmImR7;Zbt2v*;20_Tk2O<=b4@%(_Y?(tLMfEzh ztqP9dVtyxIAX@_WR0<#9Loq?kHm{P~7=MZ;E>COGfFBGY#|epOlSQ@^$MNdBrM!VYrlp^`D#(gi*_H*HO6;+_$BPd7TOLkS3*r;EQk2k_P;P;?X z&M#e6GnS9DyKnkOUCNn>d(I0}8zh?pdw?5wUDdLxHNSw@2|w6xez^)|=>Pckyz~o( zw0d;@p5D8tKtKmpX(jb!otCphWroM~SjL zZ-6(s@KG&I<2HZi$3ir){@ph-uIc&S5!9c;s|Z%r0exBb=qn9E-u)Le(x5#Cty-X- zmR7*=O0QQ9?m&am6i30#Z$QXgS;Jm?-$qN{!cpN6?}3?fMdvbjKG^bTl=iZ%2p6s< zn&haN!5W0+W&{F>%z^NA@GHS9f|-N`b&5b~ZwuOv|D7lZBB8fMV$=TMi|)MHWsUzM~CMzTmTw}srD4^ z4`s>sbkKlmzt;x`Gyn4zDlj}J;klpfl(yp;GBoyU+U0Ee&R;K8*O0oRQ%`h68{RcC zCM0*bz7cwzMJQ3{bLX<{53VQ`o%KGrLHErc2P2&v(@V~sP)p|Hw+Pri*MEP>-qvJ( zq;bF6Lt)9+=1afr&luF6!X%Mblh4Fn_j&LLvI-x#ZFGL!rm%79xgviFf+qD|t~`Tc zXc0EOHc4oISQbu;rmv_Mt%eg;QVelRX?#28TjmN`%Y&PD+Dt#e=h-Qw(D^*ld$&p0 zh1u^1*C&Cb#hFfn3YZvP4l?5@RG* z%$aGaxw&Y4jGpaoK5no1xtLPN(C}=u9K<{?)F=2Nj(d8FdwxKz^(UywW9CimResx! zrpW9**%@nRs`kQ%$Txb9{HXmr=VH3m9hdZGCD%Z71zh3d$VyV%8B?V&r3B}+0+WFR zEN3&vDU(mlY4(#?M(CGOc0oQA8v$^m%$3rsG3nG2N{T%ulthe3ZCw08ox(`Tk&At+ zSGxS){@hOA$&!wk2&1K|hTQU5ZME+?=favib`0zy}mg>Vc95E zY_7iV=|c48BnjObf&v?*l%F?%0?AjgGXPB~!5Dyw^unB3b0v{XSN`d=J9OUONZy|c z|D_8pX4uTH%GN_|cT$0%Z=?{r;M zZGpUW1cf{Hf>dO-Ic#@#d?}0Sq87APb2c0%M)EiT=yvELEq=Mx&Uff=wGQy?#ze03 z;f32Z547sJo;v$&wI*^TZivVuPnfSih^S4Q?C%ju~CD2$4Q{ z!s`6gkZwR1I`M*PVbGpM@y@Zv-)cshBj$0hyvf_mqLYhMr*XZiv>uEDyhBoYJyttj zj*{SV&$sa`#pe0;iGfDR73+Z7_0)Lnw3Y3O9w{m^?FCn3gA`Y3A&hKgA~7`B;s#N+ ztz26>{O1tM8xr0;FJ2C=U!oEopAMCo_Kyv~G!M$lQV%G29(0Mm6h;mRt4!S`|Z&0w#QP__)1a*M9niT3%pgWhWZr5Y*uzkz_#XuG~&+FQ>VO|Y~u?G-=Hq2as0jZA&476R(eo|;_z(K>{Pt>PT_1S^u9tTJ(xS_pT4_VDCl zP3us7ToqizSVS&S<&FgM(}T(9zhe%~-^hX7e}bKFzZ3Z2lgQj)?s#Z}h#JB|`A{~TnAp7h5VnW}LcyZN$m1ntf zBL1!G zSE>76#v7370>_yA01irm*RPH(b^nso0pxv4%LTe&OTszz>b_&*n*VNx#^g0Kq0Pyx ziS~_v2VtSi7m{MqiSZy~VvG#!&)v(9wHi(dGh>>!CgSN&iBPStY7#@Di6uhD{n0Y@ z&Bk@FMO`<+#&bnG~L!^x9!^d?o$GH`8GlXJBp55 z`j#YfC8bBLm7G}iJAZ{Y8&V4Lvegf9&6wSu&yJL*QI0zaw%zy-n`~G~U}Qqo==;;j z{es41sl@D3;z~znu_x%?iN1tBLMxR0bnS`8^c-g!M&B23_fI=;M4>D3ZqVi%D)W41 zu~SY}y9%4EZ74V+IMF$kY%rSxi%vJoeEW*2V6Gho4(ZVLw>XbSn|>(^H4IS=Gt_1| z(izeXXg&I}BVE2N{EotTA}}$ zZa97FdkHxxA^q8CS>qAmck;27%N>l2VP|3@wtq6bvOcE~R;T-a9iB5w04Qk+uj@IJ zO{s!$rYJ+5g;nU=Ghr7c9bI(lz6S(6=guo=H`H|y)-)v?J#^|i0@$l_i!(jHK!y3z zrpDCtM7)~hj)%@>XTVzS+?-*enU-YM(-r+EWwX-$ZXZ9OT3!{b)S&soY0FY=v(+>4 zcf;Cdfp6F~;+X7tEq}K^r-ln3x8R!*+x2=Mwm?&JB5~8=`AM~Y@hbb>!xx&;sll43 z4bkA!hPv!cSyYik$DDi&Y#HdUg>qNY1e~;I>Iq!mr?UryB?%KIPdAQAK=@ryyL4RvAqD7sDz_R9P>b3p2T zB@QS?P(J8Z?`5@#7%^+#hAOJh3Yp&X^U(PLyT|MsgrEPyd5lwwX7&k31HYDK-23Vx zN-+zbA6ib_iJQlr>N(Pf&?wZLhr3S|Nw05Rct3N5qOLr2TK|{JM`_V`lGY&QjfUMZ zR=sXHL3O8dWM4;jrK4L!uBM-N>V%1~M5H?K1pF3$q&zwFFrg5Xw&Rlsa9A_$sZN*|FxP$cs#yd(6l{9JoaUaF5nRO!&rYpH>Rob z{>iZ${LGn(frq4pO4_=|qIxT~xyt$Tlysq5;;$_6lDGVZ$d%r#3a3(XKflSEm4^Ew z<0^}%k;YY)A&PcoHaELO1@4cBg;fYM&!60Ljk)dCG7~oY3@-W3-Fj(sMY{i;^|%a1 z^;dxls6CQ$`@!gH+C8frykP&p@k?Gy;w6Pe`iUH15B@iIs+e~oQ8$0~wdnp>Cz3T5 zE%d2#1uaY3N4#~J0{Z2SiVO(^@28zd+B!08$-33T-A0>U&ohr;?@8T{^lw-$$eENd z1xK&Wx~V3SM!&Fne9A|wN+!fAFNPX_Aiac35yUD_+GX^LRj!P97hnL~Fh(S?^#f^7 zu_D(E0B&}cl1~(@=rzHv|EM-!fZm-Bu%sEy+|eW7XMesw^UmqV?tS|FQYvFeXfjT! zq#55W(3aM$$+ytp>=YmDtky_4uB$PvnZ6CFb_EZKuFPe9a-wq>bAL{7mZ`}zV^qZ2iHel6$pl0{ksj?E81o^Vs0$` z~2&qBlc^pFC+# zvVNU2<+3rBbZP3!A)~UOQ;bLSFV}2jNP3|19hcHdvQCQUc7-Q667aJjvQ;=mh}a=R zlMuX#_IejQDg3Vm-)v@GM%#A(qJ;|C&&PoN0B6jj_ZQKrb5#nOPJp*>z%eST>Pq4I zKJs0j_Qhn<4<_G}Xk4>>G?LL`_1C34{alvP zT9$R?f3SRonR$F_7E78lM3A@{mX*>&d!GK=x#@$=-#-9S+B44sEdf}FNfljGoo+N| zj=g(1seQ}m{k-$5>asarUnMm&Dy`4HvvlOpNl-1#E-DQlEMvkyq|@kP4IY}w?#>Gp zsGCW4!QgP&(L3>bhH1=baM|iSwg0){Z8?7Th2DrPfBQo$;v^cZxXQh!I@WmVj#*oO z#$H{w*CJ#Ig%VZeqUj9cS5^c1UFn6W@=7AnsjuKym`yV|jH za6j$Ooj(NJ?)jQSEPQ3ZRMUUkIepn#%99yp`sU|ObecW#qCa-!CKume6Jp67Ze!Jj1 ztnPAlm!t{U0RSy8J~i3LQ!O8Dtxa(AQaa41R=uNQqN*Zd?BPT}G!Fi_B%7YHknpH@ zH4b)Em#(R5Q;6^7af`zSi$;iMm2Le1<|;k`dO>OE8S{KcfvaiMReSvlhP-HsexT^h%%k=uU4EJ?Mm+qNt2NR@?0p(=*gDsDg%o%X-66*NNlx+l5q@<8Ps^ z`UavcfAfek2JU5mBfy5^a_%pqkeU9vJ?_=cWq8q_7|AbN&F$9iKl52G-tV?6YP^~3 zemiyz=Ilj1(bky!;A7H8++IxL7AwHhb3}9*++_wcarYT%zdsfjF%BI!4ysI^wh&ok zZwW1f>XCQT*Tm+XhA)$y^v2njV{}D_K@b6@(|U zVn4f3BklRX8?s7cLO-2g_uc^x5uNJC1|oivHIJW1dgVB-xtQcfKxFM?jm6}ODuFn$ zK-<7vGJ-F>;v4xy-O_LKx2>mIvux}BS`v`Q@B^3GN*9RDGwpArwFXWYn_W{hwc@6~ z3gO#2*;=D1IuvZ>_*$c;(NU>GQwMm5I4^8tj+h9%k*avDTqOoUkw;^}kEKmZs=l!0 zmLj~sCn?^IqI*&fkGrK6NwSw-mr&Lc+KOUI*HhNnFBeo=Pul_|W{J`vAvaYJg5Qk3_}^})*hP{x ze?MS1RCSiLNs8$zWzBzoFPs_q2g4M`YP+iIGVUXqRx9`zK) zy^fn&IVaTX^>t9@u=hl3u#iQ1$h!$ul8d1BHjR(Qz&; z7bS7}D%ReHUYAqq;;OFBY~=Nwr?Fd448I~2I=Xwi+na1XnU>xkI;JBU^(UJ)BCvbG z%z0Vj>82p$A9O8iXjBDcgbLB%TYk2(pRxYeRu{YY;0)nkMp>G}zl^fh)$&s&BT^lE z+$iuK=fpNpdY&d{)2&2SftPHaJONW+i6vbNdaUnTN%jnrAzwMiUm0!ewAUg)LeRr{ z*y4f;6`)OQ7EQ-@=T4_}7ZYy-)>P|_BKr4ak=otQYSf!Xi|Ml3TYcc#Q3|-Hb&--l zKfDzX?c0eA3kjh@cE^yp{VMD^NZ*oi9A{|B`0;4?8%MveW96^DX-*Rxns90si4&y) zEllx*1yc0F*;T0#ny7spZWv%yZ&{7g(@&qY z3=Rq1;)h*vm6EK@EQ;fu0rhUi13lKd>?VkQKc$&?19Gr%wDMRJoTjD2H_v#Ycp0Br z*N(=y*h1O}3lA)GG&-e+k)(!e^<=_01RPX*a1!Y>dWAXzfP38z&3U| zG!?j2vC>ZbH{yL*5&U|9(P8qayy3DFM&EaCrGrLoy;k-==WdkbrGExqVMj#?w9P8AGO`bFwws+`({ zFQNE{=|6I=l!{C2+LnvYoeBlGY6J6?dKmmN zoH`SDfQc}3WR@LeA|TTI)yJAb9}gQkNeYIbm}HhO;yW;HuGACVm?^=(7R*JFYLA8E z0kO(OsnA~rvczmiPNjKc=!2Es>+c#kji+fN2V6Y#Rx2s07jOC6uOml8hp=s=+Qn!>PY#w(s{tj_+!}iYVfe)Bg_dU6!1uP z`!^thBB1}xc=&Sf?ML}1l$s4bfUf>Tnn=r+Pv)xkbQI)}4rjUa&ra(8S z5GQ4TuP`rn!RQb354;TD5qP^)B&N&Qr(%r{mKwn1g)uQe$R|nWjR??HeigtQ#ivs- zzFThL&VsWCs(RiD&mE93xz3`m?rdy8)qoB_b)$T!2=g;pK4M#l=i7vMd2^+tqcl2J z8QoJ&#RZf*N&FhCg}r`=b!ElB8m8B_IDFH@V%|k&L;B-o46X|O$3<#^&EM}6n-H;iG`H{Q zt08q4orR;Jn-*BA+s0U2s-KkO@Fu2gi2eG~pXzn$A8jq7C9&l8o0+VK66-CX`mZLC zGF|=SUCNJ>0BJH*!H?=>1CyJ6<^nGd9*GNcvShTHL2i9P#eFv4bvu_+bd8faK?rZ*L`>rkMWb>mUS ztijpp+iTKp!)}*%&lLK6Htdt`j7ugD{=Nqkx4lH+a@WBS=DWW2FymqY|b>1!-&smWlnl21ghOv^_h09~vuRW?k!}&IEO%^^SNxlWdOeM1d zMnT5FEBH9#N!2_{1kg(j;J>}p9e-RusBJH#!{j(g)jwj=E8`}&rffDORq*DNgX*6o z8sPZA3EV2O>ThNdJfbY1lG$~WX*P~qEfw!nmojN-46(hyxEr6vmdm~?nvz7R=GUI5 zoylVp+QF^eiH(VCU+^+|l5*v3C|x ztPi^U#3lF-e0^<_VAz@ZeeTlEv-K&(TjA)XDOD6_QzZ-RX|iW7K}47Scf!bG@Iy~s z33pC?fV6?}-d&B@GxCG)8Y785X4Ue`JA%L`jvKl&w_Wl-Xte>~UAwvBQnPLtdZqe8 zP-8v$gxbdgaHmX~>e)4s+2cu`{PO$i#act$7CTJxp(hp}zM~yi3)(Vf8C^YS?R1U* zh|*)Fd?b45X&>BAd)xOcB9G@g^$o2%I<`8-=7u>5x@}SGHYngjyQfc%))Hpo#$e{v zmGoK%ZL>UiD$ zY)LB4`o1DqqXAm?R#sHo5h2&UgegC-Yw$Qi8`j~!ZKgqe9IYM9>09ffw*L0yl_}FR zwu&60G$vDMn)#2BpBawM3iQ4G3zm$E=q%_(qtKnVTE`ym6lvsQwFNkXkAEI9EN&aoZpVPWtXK#q;A3N#Jpc4acYod}I9YAb!}yZ0Qw zNszR*4Rp7p-rMs@QNyRn0H+Wng-)VF}M+x>^T zHMTAK#quXJk`Eb;~#y|7JIwEALyH` z>nxsI0DoD3q)$M_0%6DK8ZxqTV)G4PMI7D=riM{+LQ*ExrBsYqn>@Zq|IX{1{IoP~ zDR$DU44h+*2QK7u4`8Zg*F$Ga`OZ}!F&qz zFXwoB%Zlgg$mY}qo0Vme>tazp4co;uNl@%hPon$l#!siH=TyiWRvl5Lbo#9JEvLPJ zhxF7c(=@CN9_~3dBE`M`W!0}hv~hF0{=tgwF=uWD)t0kz4(U0WL@uWcT@k@SRi%;n zwbs;6fy1jK{km0snhLF-R6~P8)`h}7^VbvJU*X5njz}T%3xUT-#NC+_*N6~?w$Wa3 zaWiyy5O(28Fv-JvNw%H|9t*P3&wE{-qivkL{SGF^U4I9&O`^VA(luV6$!v4~xK?ZkN6fjDQq4RYC0aL{_=BX<%L_6R>%#0*zE#SA5@vCf1~Hfag# zx0sJ!Noj7yGktlk4b6S!vXqHdInObM^JYboQy$-X#Vz)=6Q2I->8tlX@%kRo?k}PuZ5NrcEsHQ`Iy^+N{V0kK1K$XVpC%G7UUQ4Xy;nsr4Oq?-70S;4*G z$b^^C&X+a@twILs@vi~gE$oDsxw}@Hh)liI^am|ythOAaME^qe=^(rcT z-Gp~F=`^Zh{8rHbAO*0?C@-nu{`cwBma~^_{UEKVz=Kg8^EC(`_cdq}IM3eM3J>;R zB=RSQgn2MrglGo=)7pA=HuOb^`#W9+7^N&epQQsZIdHkA!a?f?NC#u+`)8W(00VL` zL}#Lb%#DhOom;CN(DHlzxct`$__i?};dtG+0HgVye0!ztOb(Y(BZbl6yphCINqvHH zB>@{a{KRyrc23rGdH?yS)|kX%^yOWZ{W}6xQNEiPRi}m1o`aEC?L)~5Rb=y74t(b)dl8PKm zX!4pbP&U37(=1vWo4nsnN{_UsIJ`o=cvI}~4kbBl52+K|u%r_=%OXpWdnf^P(cNQw zTVCf8tV?8>^IL!8nLjRAyDrT%1qSNv)2S*-WELe~GT~o|nhY1kO9*cNgcgHAq3LAJ z*{nBnaZ{1^ky4qUd%rF{3=dYtmQD7Z&B&OZBfRFA#w0yY3|R;jrJ$ZV_rJ;?gfJJ5 zn%J8$Caw@|P))@JBSD=#466gkvJ$>V_bIp7M42Kfwr9fy_iT!WZUf@F5R>wj>ubf( zk1J|j^3cE|Z1rcn{uG|dOhx(al2!$NqE zwZ}us=urcF%GM3OkGQn;>z#AC?mD8slWmvWo9n|?L|hijDx0StrEOFK<{G^8gW=P> z2XZO26EFyqqmoHG9ELJ^h&({sbQFAYTtxAax~G$dO-$@m(Bpkbvv%L))W)bxZ^d@6 z&u^>`FZCV5IXa6{PTW*!{6e|#J5$Z3GDK5^7_xOAq0gDA&w`13;oU8hGHe@PjnA|0 zKi`TzgH=yP@$-q3|ATtyxD*DBWdo4@$*U5>4?{y#3FX}7#{lXf-F|U7ynfXN&@&bM zS3VR6$cKtdF7f)``B4ARVo?`Fj^}ugKC!f50&PMwqh_59gne*4W zW36K`Z@neNH#yOanRF4C#RT{13=Pew=Qq+?Q}m75NmN&-u}FFGzc>YLyfv(0NulA$ z0WfI)#v2Kz1ole6I5K}ZyleYkHsF7_Wncer%Y^2%F1%Wk8oG{`5HsdwVV{LTVEfzh zh5CQK|C&1$lNeX9n;z*jwgzw5WYvGew}*b{M^_Crh4yU--z&BDN%I_24oe(ZaF)K5 z^HgGAMQ{ZP@h-H}(O}WOjRQA%!SRbEvw%gc7P@TSnR#Z27dXUsAA4L{M`v2^wlH97 z-97%WO^9d+Y-P%5fWP(hZZ&Z!^fJ>d0NdpLxr4q5Y#qke;pEV$fE&Q2pe)HDkbU9; z^n|p|V=sUL)X&Zo+DxfZpl?%gXUAwu$jg{7kp!r!f zFZfx_(7?`f$Oe}4!p9_UlvZqw>-Gc*cedR!Td7FS+PgA@ejn(JC*(P6RO@#EX@`>b zcMv|u>l_5x^+jbmRY1M(bzQ7*rL2N@>|lI~&~;T0fj4y>CsXE3i#qnj_LX%qKJml_ zM41zV-z*pRrYXi-;MFw^L>qO7I1bMO-;8B9(H~S+uMhIN=Yv@x&1`sE%fblL~LM9 zklcz#n~k*&#|NrvFTA<{yz98)oucNTI=f&X=uz>K)CwChS2#L+W$tG-Po+)6lIm!p zgyfs7di-CsuapHUkh){P6z5kAyox7B9xtZ2i~Xi+fn!x<^(+B882$b(FdTROGvpl6 zrR&V7TGMavSJJg&sy9^{C%OT9?zP8yp$Evp!RcQRm2af+0f{4}8yB8&iX1Y=R=8mz zo$_655FY5333K!Q3?&s7DmdD&9$hJY9L*n^^o4oeQ}2tqlvEmprNxDuaQ+Q^rjbSn zI@|2&86NQeIRr^+d7VGGi81O1bu#4QrOrm}9Di|%)vHPTX>mm;IvuAjVutv)P{6iz ztsV8-3{(B@V$hPE;3};P`Qu6){qdyMv8T0mqKyktRei0OivZSL(M=7^15)^BqkiQ0 zBD#f==t(-ukq(}25Y2S;bJS{f5)7!a7YV3}dtL@#h$w?sM$|?1Du1#+u)l7$RG@CQ z_0;^ydzf6`GorKKZ&K*_!VOk68vq+t3p8 zuJhzfeX5r4Y!LR=vr0eshFe2HZ?V2Ev)hN=6;jzdA^w)svY$`K)Nxs+2Plw)d!4GH z^Ge8%m4G^V?i0Dil~^C=VBxF;Dq~zbpte^D=N*shUT|#ZfeOy$EjFNq4CI6qCzao^lQmiJ ztF0JM;aimF{4hEE?!~B^fcv`_y3^;(^)RQ47-ktpFahYWO8m^psp{KTrh(Bhy&>*7 z_5?{3$vg@XoLX~p-fkI@8ii4qSItI74BEXAbI-n!&`!(Jbz#pXs?n&|yNrK9>>5(e zh#)1}HB^_3;j6Hyltrl1A?13&&N5sS1}zbxTR?ikru!2gdd{SsN?Jnnu?7L&wEft%6??qeZtr6-~o6eJ4`wDjH+KjQmO{Jff4dV8z zwMdRjk;Cbs@AZ}UCt>{9wc;7!6}P7|p$kn}3xs9TdT*=lz*+p&;F-Gl-#B>+whZzX ziTN12c{V}Z-5HTlBqP+FbBy(@ve^7+xslc8173v*KhphTZ_d6*JquLa&zCxZA8JT0 z)#phsH}|xDAF6-2FTQ_JOub`&Y3s2Szk=&M)6^H+_5w0eUCZ24N+r;oM&x?)v&1+g zem{VlLX?KV4VtTW#F2Udf-idzvt#5>%Fafhz7@ZVdgSqMVkJo%@gDrhSrNfcTye2raKpSo0BU^HwLjewU99o^dlwD%s| z7`FI&o@#kP{y)-jk#kZ2T<+l#vK^4oo$c&Osf6Ia&k~YQ72$ z*Zy!%x=B%#3h@YkP!N+E=ZN)tHDFe;^A=R*0?!gmpzmWJ=NjFjr5Y&33@VFIp})MC zWsE&*FE`h~7Tcb;nPZ9#IQ|XH{H0EVb8jDpp>+8jLwpH|OpNAaHa~&}??-Zok-0xL z1D%>(%!=d|a^jFM)w`q0IL-5+F|Mk-vSDvfG~(-@1)JpK(WAIyzi4bE=WV2ZMybSE zTjt%equiE9*jrJYSQfWwxZZ99;tE`3&+ zvMEMLy8@{Ktau62exxH$WF80{T}pmDXl`{ELIrZXS&T>W=K&k7+ z>P7EgQG%x4#hfVlP;ztZ&6Oq0+s()mMZO`8X9BTcr`@tAPpEy$j;cme{O1N!w{8TU znf^{$oNvA8<1N-jPB*U*I8d7y^lK$nt+V*>6GZ$Nk5ONQ{J8hsM~D3pj-eRGfSUv8 z1-N;8KxJp~j|Tp&PDsDAX~(|0g+7LV{9j{EPdDN7ZosB)ZGQ}9e3{vMop-R1D5FI? zlF8B!^bg~spYB;XDiLxpfju|+_j17tXeE$Y_A}q2jN~$7)$SlNy=JEl(}ac28C^_! zoN(YlTd()E;DJm_OgNCkSmsKwZN54IWDt+3O*w&s<~{@}=k9nQ1P`aBI3y=(r#z{^ zt6kO<_)1CI3s*}Xm`n`fwJ+#TZEvYcI1{?tCaMRPA=mNt6XDB1Oa?mf6p*AM26jF~ zp&i)0RSL?{H~qyzr=QA?B=G(Kgg7QqL(IaBlm+?Coho{!+NQvZQVhR zU0-7yiwl3HSYr4<+!cr?XAYh2<;||3DdsUF@GdK~v*;{PocVN2%IP_v=7?KG_tP(59rF~oMV-o{Cj~SgnT96Smh#}6QhhtcwRfoKL3y4139Dq z)Z#i+Mtm+LKs8-}Uolujj&Wj~%Jq#7RKC}M%?kRKCwRn1tiL9G&?wEtaRd|ef>2j0 zbN8^-k$hag%g2$&CCl$@YK)mXU2u6w?wqrScxhh#$~XB?TQd#kcJS!`3+emq>0koH z^x^cL!IjX~`ZzsCfnEc%0{pKJ<^SaRM!otUxxRn)Z9ukf$TdcvAR@bKCw8IArC=PV zpJXf_EDeHb?3{CM2q7V8;TLz;!1;}_E}tLt>UOp+g>DXW%^j;(0jil$1kCSnCgQ;7 z;-xdf(VSBR?7$%9Q)BxH83+MHjP8h(xjvtVU+A|D+ zFxIW8vi-}GGchEKAlTRimp*E-JGTK1SJcwj?rF}4!izPPkg7u&yAjjtUtl;hwT-uw z9$hX^)$Fi+IB(Qp4C(i+!^r&Fdz!x#!n7XD@6akbcnsAfNkfdt)6uHSzLO1HqwhZa zY>3aG7*Amh4m$tew)d0)J=AHXN3OSw1-u1p>GI`QH=$0o3 zcI;R%#l^Ekl~FsWpd}Bu_Y?-Nzwn3c+5rO-JQYT&*I04;(&Jrzj|vE=^LD(wnxPUk zNY-2_<=kNA*@cX{{-!9V28(O&zxvC;St>ZE>qeQNx+-U7Fve8mb7$SjGV$!7xn~0|gA;ZKc zvsKbr2)jR?HtE%7<0jX>mPin6)0PhFN4sAHD^f${qD#V~Bd8-Pt{}S0iSR~#Z_Q_b zm>F#3&y%LR6l%EeTF1acDjNA=>PrIdzsFNY)c~U9=}|`8Cim`^yx+v!zPnB1u}A?e zS>@2{G-jo?h~xAcoNh=Tt_i0q{_dOq6LR2VicRM8d3>xyJjbCOVeh<)`u*kZ*oZdG zmi1{`v|sSpLv?mZz@+f9b0D9fGS`BqbJ-Rr^MVX#Y}uFjKq22xiG-Hjt1m+ep)$K` zfA&mG%Nf5yIuC3I>`H~-Y}i`WP9~?2rnK;HYY}pmx-3m*#;)DJam6m~YQA3XYP`k1 zu2Z>SV!(~uLPCwCOBD9H1ed$8mxve zvwUoZzg&8OMsSJ=dCo{Nh`KMmG|t1^0PnnB7Q|RMpU&(7R$;Yd$DB{2jigIrOlMUW zhTEY%?Z2lgh@4O|x0xZ~y9E#CDNh)5JZah<;{ZBur$p!g8vK({U%@Vw2fJMPzS`rp z0IwJdW+yq;b2_6^*SJV8^Q0#L0uoBB9_P)Mq~A*epnAbcqlYPHTwLtTw5H-0zI#vj#0zEqpWhMZd2&hazhF z^}6@UZZXmPi)YHIUB zKNXoJtaf?AKDz#*(7;zwHJ`hc-AmMSLIYXatIt$C{vx;pFFN)})ZY1vr+N>xj^~BT zP{Il82^Q}^OVyNAhb)7>pcb2j`rC(vPRHdmGS|^Qeu?9u28N=_ie#Uv`i@-~uhAKo zI)i`OGCi${$c~!!{L{M#kt{2D#`>i2nkuzBxqx zB_c$wcU_h^=UGNUEo%ysX`bMpcr9K!Te^ZAoz0Scj|+(Dt+i7c862A#*D6#)-!)G6 z4x7dq? zDL!KY<_V-d-(tqo((R&wv$U*Z$BWp`(cY9@58k*qW=KuLU3e_B`=5D+@%m%MP7S;* zOFwHE^;}1BUsz|+?R4ZVr6VoH9`Tvp1CkMQezXbye|V34HA~SJJ{?kOa~F_aQL&cy z61uURwC>`>s`XVJl|`ObIW1p8099FVQ}7fkMda`HK%dUC zV->8${ee&VRSfsD$ZQNIaAa&myoH6)^V`XBB z(VlIYyOZY}qmGdxZ@xm^2uaSIc%%GX^`n*`1hBZSjrV)!n8G$p;0(M|ZQxKIY=r`s z1?%q$)x3c?&kHa79=@jvU?Pp)mssZP{0DbCf$;|VXOIorQ5mthWOE*$UBPZtkLOx7 zFl57d8%!Uqo(gja*2V-o0_GWop3eg$g_gmMHcufAv&b%99+azHrCOhru5c!HX(#x8 zr?{e;X7L!7Cs>m!Tr+cEJvAnli@eT#|DVkrZFQt4{*)4|lTWawC>_n_ zIs9md4(W0VChYBj3{~5uAgUbq-)vhi*Wb8HYx0$g8a3_y~u{Ot@K?~_LCb7m~iS-4jSFo#Y zU}sUA|J142T?s-x*EI~|RdhMfEvNR3Tq>MS`PTSU5D^k+@_dctnqSG~QrM+>YR>&s zuASC8h?{F@ool}DZNwkgkfH}^aB%=8rveRu46pKgHL6SBhN0hj{U zb;MYm`Ak)D?piR-j#tYL@EDSzwxQ(!r z?kbJ%ttOptPCqKJ&zx(BW zc0v8;Ye5@RLV@I1b!DB5G*RqyJm69DKPLO@WT5`rUWulQl1thKk^w7yb&ekRc%BYCBGub<8D{O@J7Q{|AQ)oY|9Jj+b=1h3@mSDxAA=uX;; z^%4twmf+0K)2>BObuhUWg`Skx$zC5lMq#_pg+@Z&^+^a1JjdKj+I=<#O|o7W7tOI^0_nv zMq8m`WWak(C3qVJJn3&N;CMimqwn?IaOc~uTWiCb)d$V4vsV{MqTDH)QMKM%LnrHo z2Mh=W5k(RjMZ(px(yX3$==o6)vaKnt^jc4OiD_8%CSJe< z>OP{w`|p$4Dmq28^~dHwGbl|`=4B0Zdv?n5G7@)`cjhn3ND{)iP_M5iS%GO_W<_F1tC zbqw!$r|5EM2PT$%+Iww!HQ3+NvZ+_d-ftFnr9L^qJ911AEM1y;fj)a>3#+;?OGG3- z+b^{sZ@ZeI3b!59{D1b80O0ASB&btNh!o*~XWyJNJVdH{-SuItH99{kL`wA|m%Y$# zE!%TV@$t>a>%pd`HAbe=m19bkl7x$?9nBb%N{7-=#pUB zf0r91#pse7cz0fFGrEafqqpn4=To^x`Gp%Z=nEaZS5)1N+Rd`}gQX;RAs^t1H}5y9 zu%s7kGi zdUUzh3qybJdXH;nl48}Y1+Vv=Un1S+JB!L%4z$niWgnk(^ly{5y=AfRQ{n?rec+lfVVSH>7=igV(-Pi$XOn4W#mmlN1Ij)5#!5HKYBV+li(Np{xn1*MMhm|EZ4X$9jHzERTAscQ zum48vCwK@Dr2V#Ic6P^*-oEOZ{w^gyH7_4Fga^7(n+g$HIe$FRx96$8Cn+vf zAXyvHTcQ6=%TaojC-xvE6(T8t=tXt>GPfK*G#Gd~8NBpe@d`-T|M2bli*ry1=Yb{V zXWe9lr!-Yu@XF$8Sp&)CVXjf$Fqqb;JE3harjXg7H)<+CXaZ|y#lGk{r#MUd%LNfr zhqwHk&ch1L)XBN0Ax7421+1*^+JXFuzb>z3Kw=cA+i{I@Ytlv?kl)}HzATvc=D}`=-g)^!a`JM0cw;~F+yjVQ0}5>mwpeNSZr&^vtCU~ z8%_=nfp1woF0Dw~npyqn5cH{1;m#M%PE#OMVNB;UNUv7q(^7K9M3^d6uF&Gnj_7}c zB4qEay#zN7wD`cv!!{JFb9FLCI8Lt?vmIb*)e=zJ)T1BBsmUAP^t4}#6}|r|zb;SX zy_8dr*do(n&F6D4m~8;XU$#)Uk$NF*N|;{yz`D5;pF^@+G7u%%a@K54|5%ZC2W)y^ zOFPt^xY(6o=3r*K9-cYxRQ$L3kBu}8fL7edi*t=eC+h8X_$d`m&a{jU9BB3Mxozc1 zLvp9~w$x(o5m1NI$vFxyqlKdz46l&cJ7y%(C!O;zWa^Dp=~_mkr&SEDUuB&>g{q!Y@Dv;x$>zmkVuNAx1 z*f85w&REwRh=1=RTF7<3P5@>J;tVeXInFB2^P(X6K|UocG*8g0J|2TV8>w^m{G!h% zsU}G+T|Wat+fDIAzr8tB>E$R^J;*6RkE#6?>-IpCo2T{X6;raoq%I4Cnt*JU#%ac3 z0`IK#?FD+qc`kCX_}_4~dk*t#noEDF=N+JcSowwQYgvn3Xwz;1B}Lh~Z5#4H3Pjk+ zB$LBmgdxA45nBq$6CAxCBDn#2Cg>-VXaG|GcZKqcfog>q@TL6GJDvpQ{cg zcfp2)V=V*({h2z8e0iZm!acWj_|!;>v8Y$xBPyKvABSSg3nmS{@i@oq`NlH$hkaSG zP&CkDFE4{X?n8I17t1Mi6tR`bNr#sy0l#$Bz|mbhNG}jl$nM}q;UumBWc;#}=pnNn zH3VCTgGl~Sn`yT`PJ1i89`Mq7DRL&@2Ryezrf|YZZP_vi@3I-AI>Jnvb`f!7rgli? zEk_}Idwe&LPZ=u{qIJ`G7NVI-RR+o#1ul3`H%TK#i0kfvGC!k367W{4vo>1qGQX;I z>U>;b;$Hi1z4tv&bEDu2_veQWvpI^f``NQORd=ahU#*YbEk4>|?FzUVv_oCvS07x@ zu*eE1QPZ?!^9=r}b}2SD0WFyMq&*D+^fXuRznDb(EDrCVwMYa!JtMYqPp;oHs68FF zfX|QGL*e|L8a{~_9-itI?XJ!3c!69D6+&-9*_&<>^Id7ujGv9TCDgcWYjVa z7Wi&7FhQDUs27dh>fotdhdpO`K;iVBC(WkS4{668mTWGv+LjlGdcTx=A(OsS-9ICh zH=mO&u20#OE__@AEI?Dw13|L@;1|(<@+Mm~e%t-bJ7y(5lHpy3ZS*Q*S9`D|D9H|a zL$1Q|`AbB?PEnum0N0b$;@tv&t^uM8G>KtD>s=D~;J<`z`#UT=gGkE{H(5 za^9m9N-bgS+;&0K>&9w17`b-giRYvGi0ci`0xpFI;>7&HLwg|;y0arbASW}|tgvZA zjg_i{FWS^dR*ZH2wrxmdGogFT?T9_XCu&#`v4TT)iP$m?`p)3%ERwY@X=tG&Lz|dA zN>NP?SChH%RG_Ih@awupiW=f((k1x8cakdh26e=GQGMtND_=(3=x%FAk*P1yzq&3+ zJQKE7KXM;#SG2tb1R3<*brD1e7Etqs-SUG}~4H4RfBz5F16QlHuUMD=GUV8Ja6+m0jt zYS{T9pt(wogM0nX*k8ICfDMszlR;~E4b(j<+XwlUA=ucGW(;|jHF!5Dl@WU&-dNx+ z1;nG_x6Uu<0LWEX00yAJX#cIb3v{W>XF+D+8%1oiZk{m4JTSs4Zp}{q1oWjCSV7v# z+1BC4s&zxp*WvclMqXs^-ze{BX!1DWEd23Yqgg`=VDn;?vzg{%Ks9e~dXl;G045UL zslD=J{WN>0zxBn5^+dQinvED_ZuL_`455pNG(I>wIaaBz3l_uj1?v}E4QA|eU&nI& z#K(DUQ80%~wpnEep~{-rg5f4kdWZg!E^lF3JYJv>q86=VbJ#S>4Z*8(rP*lj>bgao zDh2SDTO~TC)^B2CtJ%NS=-{w#WnA0CsP`S4xJwJ}u4{Zgt)o!R!MA@|i+$-Q@2Wyx z15-8oE_p&JP0Pa?W~rYUS6DKVq(${T2zK(D_K_>WE;n_y=Ee9t-9o8CS@u2rtOKI2 zFSWyiaZ)C3Z>&7%-=Et2cgHwW>;EjSJAu-h{3 zwuY3DiQm`sU;4GCB8~Gm)1;C=tsURW?WNSHwJEO26~bhxO(t_mYHd>}C$Dnx74Q6} zg`I}aAFFa&G|Q{QyvDa(kVgs;IPhUJel?n#o(5*0U^^qgGl^PAICv(wFQyd|S|hzA z!xOe02v7Dgw#?+|*ke|0C};5wDos6`BnsHo*H~6)-l~z_IdU?W+{4q+c>1MD2>NwN z3n$=0OY>CyX&4uedAFj!Z}&URn;7cZ6Y-j4D^MHb*{&HuhA~nikWHb>)apj&1?u=c zV6bs*-xT+*g9af!7%yf`#Jad>d=IAOqXE`Wi&{2dFEXYGz^6+cB>`sp_Vd4HOxmYF z3y-3zEzy)ZKiO?C6*htw%anTzgss^EUP0sL2rmvC1~W$j((6=&Lt~Co(>s6xQM#a( zi+;5RKz`*|Rn3#0_nz4mS{6tUn5bmk{U)Q-oG~O{Bo+SKQjA9eYDDR-%AyytG?BAj?cNBvcMhpN$hnAocISbAO;WA1+-Oft2 z<)!r#pa%xi{SJ=rONxaq-c_sKQV-@9ah*qxW4#Xl@>RD^v=xRN*?b0^5k~hdpN7sd z>pQc3;ce!&dT29O-BQaFR^z|fINHdX%#BPz*7p#vqgn*87rn;UV+axve#H%k6F>E8 z1aW=T1J}8V8SfVn78%a9vnN6Dv&Zr2FIPQdbabpvl7S$4{Sf*vtyy@}? zFhd}WB)kB#1z0^6Ojh}VyuHNn!s&ESShd2MP$tCiWtmnkhflb+KnCe;^*f~_U!}ek z-FgxA!te>ix%0a^G25DxWa75@F1AlpO(|{(r~VD{pDVv{>Y*cDUHPdf#eVs4|$ljir0c?pDG${%; z*u{PK(naW$Xf3W%!Zbll`~ETwziC0sDRFUw4N=lB*p43JU>)I>K0(-4&=idIq<1CL*U>)dlUeSZK75M%)x&#iKwlSw&C9?ual~ridzr|wyY0#9!idD*^F)pmQ4>;?8g{AWBKCW9T8~1I+zU_ihdzrS zw5{ggCP%MMkZhMk5b=)w05B*tY3u-f?~z&=2sHrrio)c2bp>9;j08Hj25+vhh;w-c zY|@KWAFECpSxpG#_avPaUh)pLJ(&1Cf0olTWEO4MYmE|lJib@e((Nxev)5gt(QA#a ze%zPr+ks4yVb#`j3S_(rzJQmS7AE+Okz(|G*=7P2H-_w1S7wG9Yu`Q^Q4$tpC|UE@iy zM@KRFaia@d?>Ad}|LNY!h~00%S@6J1l}3=3wE(;MTi>&lQPoVUOEahyj*!MVmyj6s zIJSxBIUcvuu0!0vm8k4;uw7kH+Z|eE|2$CL3G5Rl^YG8qeDp(AjLvBb#!Sxrkcu0) z_@Q!qJo)>Ni`e^<)(-FQ}70%X|%wKmb27 zTkgIv@ch!=0E=l4YKdvziTHTwt4a5VwR^xq$+TaRk@Ms<-YU`Vt>$4E7PpZRV@c3} z!#p_VcL{*um(E#B&^_6ays^FFjkF6PdN(XOHd!n^PCoF6UpLwpMFb8tDdfFI2r~3H zDK;+Z*9_A6;&2&?j6#}<30Lk!mSAOWgMx5>lOYe_V|P!6GX2@AeEo%HW?dH{>|OwV zNTI}+dxqvySArYk-gV}h)e|h7HLFP?;jfsg^CBOPeq^TEqy{{RsB^L_{38@TTvQrv zq?X3-whB%7YeF9m@LleIKS*ti-da*UKRam!;MzQMcP@s)8AsQ1Sko;kIY+`5W(ZHJd#|+1vfjLv zQvf?duK4uUq{Q-C~IC^o6J>fKNUEcF1#RrZ4=RcI#kKKRS&ByaeHXm2G? zi?yco_J&=aV2O$1Z?lhON98PMjiZ%EZDpbgAufgFnyy@F$Q}o{<{PClSQ~=VidtA- zyEtzfSbFnEa&@FXXPI{cX!n{~J+O_0SZk)oP_qbzjU^4poIin`qnx`?9CP z(PMTV6gy?v+k^>Uhm^uHL)^`3p{5}9{@N9A!d z#mf$;`bD-$isB&-Q?lDjV+vBo6&H3smc7^6{<*=r|9>&hc>?W^Z2 zZqC9+m`}(aIX?>Tp5SRgq|xeMH5wx^$t%%Aq9x-29m}cMk3tZuVXE!l2;}DMq{z3U zmmCawk+Y{HU`~rDAqPtDIkeuSfdb%x&v15}ta9;$QO2o*7k4dmZ{Yj^qt>Oy(O~5d z^)FCTle>vR0piRk+?en{?&>h$xSfAo8%3kepm0*1)d&ZjWDu)^4v*gWLQZixdQ&+8 zsbwg9)}283S+_WIYr>Gmat_))rTrjSqCVmsM03IJ-B1#nf(CvXF-|Gw$Tm~^^&6mJ zY;=H=A$$Hs$bMo?{i)!#n6TIR%SI!BmdOme^fYt8eMg}lVUGSXtOekS18q8 zbK!W6g|&mC9QssK)m_)fx+b?&>Jwi?H|6E_zJp|y)oOxd(~|c%P4H1QE&ka7GBYfsbbhsc9>USL;(c_T6jN3 zn?_PJ*BfCJh3(`r-)&3(-0Qpf+FC1^%{-ovp82s35tvPjU;-qf=)xQ?#n? z6A#N{%!cSgl}e2&w@eN?&Ti&;bMh_3J=c9OipcURXKTz_1kTV10@k8C$}bclz3-lusB@5Wf4_@QtX>2Eo z%R{*w%QIWdS`yN~Tl|b9Qb3*)k(+@V%~~(-7e#C>KcETTBb>`o?yl8awsnmO*ecau z|DnV}Ok5IR+EQzwUyCCb$&K#9*(u+brf2ELDJh`#D9fhb^`#g>wq#bx{15GrQyhy= zolyRsFEh(W9}XG_;6mTbw7;kSeFo|YkTvd1M(=-h|CI`UVNu{xUCE&iVsjU5Mi%rd z{knEwdf(|r6FgUQp=Zee=H@wumnu}wKX4dzKQ9!_mAjn7>k}>$EIqUbG7ZFdnullq z$5U`hOG;ZWBI#1D2@vI?z3WNw;SHb(x8DgAS3H}pKaw&1>py6;mAWH< z-rX`tbp7M(nN5qc6<1%lcH3SpJkfNT3oYRH|WhDBrtZ_4HZoRs(Swj^P=CJ&)rRR~(p@gXCHMrr6c` zvcP(}#~;CK4AdwE6zW4K!+Wfqa>G71s|_Uqvd4RwO9*N*%ox33XF~Xa4JhTbTeN_8 zKDPA>(Q^{+^B2wsLK*ZfElRllhEsVJb1E7q@6w!aqq2!K-RF4 z(qBtQ034CF(9+KW5NJ7k-jn#<2P;~qsqS$vbUpQ6wD{D%TkkyYM-V6yV2m?ivI6BK z{K>FkAtnHUFmZ6+5&hbOI32c6YRIh9y#>5$p^m+6AL3abxux}rf6kCRH86*yf6*|& z=f~|#A=5z!-#koX3|${-_f|raV#p;cFI-pom7WiOJ*>ha*<0BEEtw15`n=)gC~jlN+}w30am*L629nG+kG};Dmx=injUUWF^Qy_~WAT z*DvDlD+v2^Jl(VKmB>7^;R%sByylqvN2I;~Nw6wZWY?RJMkj+j@Pezmsf=5l?dPnm zRQDGt{`f4QDx-!mCmUXqQ>%H7PAOlmM(>O46Aqc4=rSKWcjU;C6GxCimmk%Cun-o$ zaOB9I=aD1aK&q08tb(l6b6qK8Syd-#s1L*!iRQFd_6VmjZCpt0`(pbpyI8mL?MW8i z&ijr-A%{GXR~{M7|FK^ChH9ech(@0C)#yAN>cJmwY8_A+B8PkUrbG9Gg*e3C=K~O_ z>0l0jNZ%GGG^tP!2b)-}!yVeeWYa+~Nei*RABU&wfkXP^4n+G7my(CgIWPEgn^}_^i8}^hVNlcQjjGFmvgi5(n zUj1-o6|)!IKO+BI`-7a#G1H^i2TuvBUS_O? zOvZBx>S(-Kr2C55@j|9iCIP$|i?c$&eHMrAFTH%jQel3#3tuVS>&?lb6do~Va((67 zeBXX1;>3;!la|?i$vut51Z5OTN-np{RiiD{I?)S9c?WZ24M;}RJ zE3JJccdr>I+N^wRC;W)k>3;0-HfAO-?OVOvr_+wL$ugDcziK+MCdqUl-fVDur{ZFh zNOK7%Gep$>;-c(3lMk;|j`6+w^x<{D@l@TkCWX_j7n$YQ<^O)bPs{(NvD3NjzaV&( z2nP%v{*R+FzL*B<$i!`o$o<&!1t90B5uv2pA$;@V7qysn<+|c-haB4w{a}4`Hz!3T zCIxRRt+gW8)EXSZF+X-Iq*?gb>h1rdh<~MVrc~!B^+B`nNt`GX?21j?vDN=B@neNf zxt=d{>vtYmo;GEVp4~kAA@kLqe3wkv-l?vVS9{mHN<#PeyGmZ~sdbfv?Xh%uw(Zs9 z#V2_zL;k-i@;_CReYK@o`2R{AUA@#S{GZ~Ye$e!hI_^x^(3vio*L%-;u~lefa&$_j zCxK}q@Gfe)QUulT0AY)HZanWyU^H0Y13j~~7exh-C@Jh!GA|KbNu|;=! zMo7y1NN&c+GMDS~K6~8v-IhfyzmU|`gA=5^8*}FVsi3>!{{uTZv@WGzaOPa$608IB~M^Cg`>8WFyz;HsAJ~fc*QUg+8n2 zTRh!$N&Fj;HOYOLL))_+1_pE8*EaJgeIuj#7KS!4sK^lwO4Tjpy4E1Fk}*+##gYS{ zYy7OrH~(h2@;P4d0B0NIXMetw#qUNy!xj=g z*!bPrwXzPuJ(ryG9wNi9{EL*~Gy>Isw9p+;*YcjdHch^lySa=fPr%b}*-@)f?t$6+ z=vT3?q?y3)>&D}cF#n?j*MTeb_i{)xgIUy=fTVFShDhm=X{q+`QIF;0QLI2i~cM9SFye7TYXo`kNHTfjOOau|L1`neW5d( ziQ8TOsU?`27Kd9pz(jEKF^jqZ)Vl7d&+(_C{QS-lNdh?q! z#~0$?;#9$!c^v0VC0;T8hf*H(VFxCA-vpxa;-D1^pr%LvU!8A|J}w}%=oZNLug1ek z@?S)OiLv#TX9!uAU5*8>s>4@DvLS(PVB6M5<7()|+0?Q3zE@=n4UyTt7bBc+Udf(pzSlb@!C?!(MFTK*abyrQ-vhAaUAwmVG8(t+Nk`W zhC9hsb_b=|u1N=G6-zU9dT|z;p~kpXz3arA8K}e$wUt#d?T-{BDaMTz&mrb$^O3;) z^q=Z{i5`RGpPjBlvn?+Y3_?^%=jYi!ox{1gwQe{nC>`t2STX$;s}~~QA;gt&qfe_> zKX26iw9creJ9gM71gC3bzbeOY9jpCvcT^K44BbWIw-#Y}DG^^O9E5~nofaI=phBLz}^+Pkx%V*zv`#b$f^6T=I}_NoprM3~e7I^9=cBAkz}5|+yJ323e)F`aGZl|6dnUNz@9Gx3#T^DX$L zzYQ3c7fr`_nL1vbwBeH-qi!J`nvcn{L?6+O-&MNUZ+vVb;nt*x@huRubr}1O2=gK2 zH-ddH?)4$}n%2<+o#w+6TcSs|FWNx6Zdq`zIUPOFYtB5mqri-C{EcPbOMR^c6BzJk z*-LnxDZggO67s0o;N*_P-^NnjF}lF(pwlmyk7}OeTQfZRchlLmp<{bDnY14N{i@jY z>QL-A;^dC?zsCXESol}$J8Vpdht1Y!){>9yi7_GM+_&u-CO=gi$V(k&bcrqCF_k>o`BILGA! zjHa`-H(nG6YA5z=qrlDw3gr#Vdo~ct%b%0!mfkjZ2$h(r!Sq91VRp0k(cYQ7Iyc-N z#v=+%DdiqAwupoBFQzQzzaUAJJ`+V#a{)r;J6uKK1am>qH&1*@h=N7jeL~1rhtDGM zwn0N4{-s=yDhCC3#bFP7&xqXI-gHNWe36$`o_k6~5rO2O1(2+*hQxU&%(wWfcF0PL z!jeUo{V!dC#nP zQOpgiYJ5kO-KIz1Jn>yD{3vPTFcw2fU0he3lqPy_RDee_wkp8$)eX)(-4j@MRN*?b z=5`t3>x%36XjU}z*EG(|`$BlNohM>#>ngBxE+K1H7U% z<1|2f*}hWQ*gCV^Q&={9q9Z;Y<)3xngqDAQ zO#w1oYjoQ&y5}L}Pf4{Rct-)Z(VAn0g+?r7h8THq4L=CS^t;{^h*Y?eA z6fK}ktoz?|D8BJ5Bjf|cebcsM|Mm(txAz;xaEI~WaVE&ktdgtvgaZx}*PT?N1dpg! zwOFwVtBS|;nHJ)SDV^iJwT}L-X-3L21GHv$24HWu8vOV(`7Ms_*z<=^Ezb1oDAfo~ zf#b?oRTslJrbWu2QQzc#!AHJ-pAH}L;?l#wZhL560qN7zM(=r6O;nF5eOXs#F~{d`jkGt$5Tv8-#|4IZdlr-Wc`GV%Vj05Qd99E1|?mYF06H#dd#T=79nPqUl%RNm@{7G{bi} zaoBd^Q~k8Yib;Tjcsa$_VU$oV0llEgU|-}@^D9|L%T6<&W=vJE+KdIJJ|K`5rK-{~ zR^ea~=No>|gZf`xQ20&E1a=~Ls_L^YY;;wrnm9FDJdVXx6rcD^1??J*QTGL)b6+OH zez?P?YhKbIaZ;)}7Uk2d-4BQ8a)HUIwRP){J>4b_lYcVdEC^tGhws0#PTFI%tiTf z|H#OMao$`nNL?}bknCmNRjrXpsPk1{cHS?AV1*^8#uLAbyc5WKyUlV9Rer6aEYhem zm*kW@v7qZV<^oPdZu)P>Xs%jjV9iYT?pP~tFEBWGCXF8wuKRJ(abXcs_}!1z3RD{; zSDE!8wam9#xQ?}oYX-j>+>NF4o1AJ?>U=ln>Ib$kd>~1HDfh|kU(cB4nj>i!BW^(5 z9B0&0C}39HLWl2a(WvOSLPSB<2fW}z zNXT?zj!rH~9XzI@|Z3OnkGQ-)$k)?;49!mUTPZ@wjz5ARIr z$+;KHxqnTmenl__?lBp#4(G^S-w*gByD_G5+Y4X2>@=u4=0~Hj=VO6+`}7#*o9F6J zC5I7Jf#ozkXpfUy>PO7jYVDO61^;8cn%b$J$!NFLgrJG`jM@vxxC$xgpz6oS$AqbI zM2d)#sqwT5fXoi0VSO4=xDVRtm~cFkQMO9 zN8d5m;cmZ;qOj+L7Avcga4{% zl4B$dEL&yXgrF^bghl{n91$F*T8h(%BOwN-VcB$J>oTXa;4uro^jd3TH#Oa~v!9Q1 zm2T2>%$6j14{f=sR!dSkUy~;WD@^pjo(aJAwINYUA;_O47nYD`^QnSPy%OElakOi7 zizY}oP570Qi)b0t!Gk~IhX&qd0yEOaT%6bF7hhjfAt2EChReQ3_*-+47(>yw4{cS><v|ir#Vym9aAicDblb| z27fAy%i&8haN}|X^H^g5B`dAa^e-c0#HSB#=Wp|Yuw#mgybFs*LGDnZM^(hMiCIL8 zn#VZfgLy)*y406{O9yLa`c+#6{KY_4i_AzS_W(&g>8v#Z~BF)z2e-T=i?Z z=1!!xjHm#Bz82_Wu^Nsk z)-LNd0f^1J>1n_{QR|Mc!D?X*_gZARrFr@;vc~ zLkd=_4-tGwa;5v5AMTM#v>Ffk_i7fmGn)=~3ACosrh}bL$o}CNke3AY+r4Z}Pri95 z-jrRe6tbt=`2C>#iuIhP=9Rv$)_*&ac|vSAh-U|2&k+#6=pNYf5oP1zr5h7XGZ zKZjUqcQPWXLmv3<_usm2ExEiTV}Ij{Zo`MbcY$9-9vaqc`JWNcKwN?9oya|=5b6+m zKGY~wG1NCS=B$EutN{9$ zhLd---qx?uJ3c+7vL>3Hr&_MJ@VBV7bVT0cJozW{bjGPa3aF;}49RuYM|{L)MpQqB%4s-%3zFuF}xbV~LYhp4)&H#TO6Su~{e9ae5O zEqX^*v=MW{I(n_=#9{Q>@QKWr^^nt6?$K@c-*abXwOK!n-nsOiTkE0RY{|6?i;KWM zt=H}c^R~a^%HpjJJ11Ii;vIMGKAF`_Eq2oM z>V|y0)7=d2z(?~E@#1$gP6tMI>E@~P<<-X=4;(ZI6o}g3j~{!dZpU?rdiwt;9<&KZ z;zYS&SM1{MuExL9I8&x`nfl))O5j8mSW4UM}GdM0OGH&RpE+kdWEX`~yC*@dl^;PUHWtNWf`FYW!b`Xk6<%jsFsv(Q_<( z${1ft?VWkC%QDD~P%Co1efq|?4Ay~76_OtoK1tHv<3ZAu*UovJ64VV`xBwC0gFt zEVt!`>ldCa~Hwu`Yr+Jr61aQ~-*AD>1OOs}SJ>z%xMOjrDZ@5Q?&cYLnjr3pyh z#lCSpC%R|&OH1ruarT$irMhb1 zkN%1~0oVUikkdXuPYk?1t^X`~?fD6Vw`(`KGp_y`x*PEMgu&TA{OuyM5l~Z%0vBkst&EA(y z$>K^+GD@C?*2ly^J=&qYb(H4bU`qp5rHTq>v?%kUnk;i*EtR>TdpneYl2h0DBxWFQ zC+(TkBkR8q6IJM`H=V@cqd4Vp8JFxHTSc=xPk3#-x~ZfEL>g73bM;oz1CN&)a|Mof zKD^!A8JVDLyrq(MLBt=NOA~rRaIPRUr1%9AZ%xkVA_&vaTtOIFOvp(fC$=r0IXeu@;rdF*hX=hA&N(Q(>8FqZpg0 zl+dStoPwoF+aZ~^3LAt7BgW}6T~)ae#ksU?udeA8sDgJn9fDnsy8IqloBDZ7zu4<|V1FB^=u%U+F5>tYshGg8 zLZ-V4QK!H%LK`0?$VTKcmm` zn$*SV{!aUU82j$1CYx_v1p$$!qV%F7g0xTs3{?a{0VyI7dI<;^AP{;

>>3=}1)+ zP+E{CEfE5tcj-+^2oO3Xlt8$A-}&R7b=L2!d)Inb)~v})-aWH-W@gXKex4r$l<0c- zrq`Rek{N|JO)v2>%SE+~5s0C!ss|lv?g2&k)dS0e6-9Xyu0E?B@FY9_*s9}Z#b$cT z^!E=8GL{Ee$%6g06HHUAeY{#M7iQ~LYf)Bkzdv0izD6eelCE6)yep8{q?(M!_afc( zdI_y22|l7Q@Spj`zl{Qleo~b9Wzcv`iV(|BS8JvyvU*lO(rHg(VPC1^wvFFk>l0>c zzAH#UeVPN)Of*lGtxoyWpk_|y_uE^_%PtXF5bN3+B-ifsElNJcb%vA4vT_+tqXe}^ z$d}CrwBlaxlpRCbe>auz?7d~$lC^a=oYr~=HH)5dd*?aH(&P2;{m}<;)d_tz=a3u%-lySNn#}!mq&Dk&VcfY!Z*r-7LTM zfq3Bd!}j+C?ctBA{STu8C-7}Pwfy}z(f2*)96ng2|LXsERaD7ZTNOr;bl=s;395UM zs~)nD?z}xwM&09At7kN@`n3O~%Xj8sD1cNi6)dz&0s1Uyaw|rvqX|IbBh)X|=N#O7 zHJL5eyYbMDxJJn3ShUxsIXi^Bexh^u>Ep0Uz8%U)bY&Ghg38_r}MX zZKsiU_7!ZhiLoSMnmsa0)y93vj6cqb{JFQ?syMu^;g#0hW}W!xx*|#U&YQB`RMW6c zvJ)sO%$?mZZT+bGBOH-(r~blR0;!h+}R?egRL zj-86lBTFi90vZ2i1gBHxL20xwR}b!1sm(j5Q!yN5+2AlRoTaF^{hiV7)-+AO=z64q zQR$6)ra5;v{xgdgTIzcYaVvWGUQy5tAwmI>jd8GDH>72vlS#+pZc z?yHKP+QFW7>8W6wd8uLqFvQP&|7~64rr)={h8|}82pPxclcHqWjM%I>rz4u9AS&M~ z|Jgf-0)z5Hcycg72Bv1GSkggehioa#!wnnND_a7AC@fD>x<1qNpu<}c=@QK0WX}w+ z9nD%}6}sm_lQV1*+T-;#FjnSadE)|*l-rc{ z`Lht5B<-7Eap@THq6v%j_fF6mhaT|dTXL>ZH{?j$y3g2r9`VZJ*?o0a8An8>A?(ZW z&#XZC0r4+A=TFei95__kCxia z@D^?)kG*eHTZ-G`N$v9jDfCMj)p?a=5kBRdKX_!GlLh5ZsNP6B4Y%N#NROoEx1}R4 zlup-poj|h(Q~MWdcSd;ONGW@;mv~Ns=q4~A{u0Ust*GD795CD`zYCO~w|q`Ud}YN1 zIglBwlhe-Ww)VsoPI%MSb1dSw`c|XjxET;D*nw1Tbu_tUDV=-qZ(KG3o9^VfvOhy0 zlGF?&rIYUXc=!}*fil8%sfQpQD{~W;zi8+S|`Ev)jehwNFamv&?RZAVY={Y}@8+W^W+0j$g zI)O{<51H&9o)fycm8jlpZKB6!yTriHPJe`SQnSFXIud zJa~mC4Ko}l)`JvPi(svN#W1Mb6dF_nRK}y-*FP8Y%|3;P@S<;TQ@(zlGZq(GKKd0- zX^zJq`kn)QBLEd_@?-ZANqK$b*sMRLPD`I=Ygz+sGQF;o7Ur}#mM1=)@I=5rEa5ND zjo-yrzT;}C3sTl=TxfUhZJ)T!0?Fd+Ab&*vLd&lob&=@UAUlXy?lLFp%sGxV=q!J` zBudannI-BoJR~UY$bW2M5m~lfN7KJ7+es9ndV|}TN-&o{OtaFb}%S+n@=<9xentD95LHdpAB66&IGN2>7$*9lFJdkv7;M}P8idS7ioAv5urxJ2g z*?7sNMu0z8h13Nn+2l6{rytNuk^Y>Tibe&f%I$M(S(~ep)w%kX=jOwGDGK8afTS<^ME2bn9v(&Jc?bZ_CykBK=?XYL+^2skq41R(Jz zcVij@R3tg5v65#l#P)NSH&RvQj5Nm|GQgi3atb_E?9D|}whnU77Ix*+j?n1SBRu}B z*XG>yl{zEuotIhdvQix^q}*Rc?;EXUwcDJ1(eF|1O###=uxO)$wN(XA@$KOsZl}1v zWBM3*PygMUVh$$Nr$iq<4aQDZ!@(a|oBMHDLvueaJUeWgbn)64lgLhQ;^9x8A2Mugl)Nx68gj@V0AtDvxcwG}^6%lhb~aB3%(ZKCR{6 zqzZa=)UyBgLbsd!&85^=-n=9Wmoj++_v+JlM#6}pkjYW=-F`UZMXRs+*;QJjB_V_%D(Tzp|V8O)T7=ZUkl^J#;K|y=Y|bYuetsr zSjwrG=)qzSM6Zgh+55nk{|9hy6T(H^Nd9UMKd?F_FD`Ota}hv*G|!IS`~1hAyzMIK zYZW#vzq}i+V#}uhOu+T5ckz2qmEygIk+c12bX~Hle+^v@*!eR2(DpucGiUyHqXhPh zHuEaUmG;P-qtggn(%6D<7t%kb9%QMREsns& zthq^zGnv}zfbYq+y`BnwQ9)a;J7-*i2^?;}sh;g5X30?^4}R4?*{KNjNRk4}uGvfR z`qYdk1Xc1}bF;0xJJ|)(tNM;Ba1QFW+ldt$Ypblv;^?1-IqfrbR}4mqv1{2>X7R#@ zU_tv<4b;=^e)Y-mM3{Kwbk^}_ejOmGxp6L_&WJnGN;m<7NM1pDT?h6F%%9HV3$)O= zP;TL|le{>Q2J}ir^-TGs?c`~B+$B#3#1D>v4At6riYo$bceGUfFj`t{_KO5tnxRw7 z98x}E&o(TDWxzxfn)lokp*B^n^vbOnf8Yq6utT3doUjJm}`{oS-5qlW!H)!ZaS8km~2PpIFzI80Y znRV>f>5oe}mBo>b!=q|W6|gq*+2k4jLJ4j_89Ry0E4_?Bt793;v+KY%2tyIgwbO5E z)o{BXxmaObn~r(d9|nki>ukEE{7v+>yLVXEdz^2_2mEr-l6CEnU&l&|P0|jw7_cJB z{XO_0Ev<0N#KuWa-^Gha;ev>TcXs}7*LmPDX5_^!}ODw;BeE{(z*%p{W?Pc|Ar~v_O3?3e| zGindr$Tl?}=jN32;BWIk`W^kJe6v(`wbtqo`)Pv3A!;B^Qe+o3+p;f*3P_997}g&) zlCkzKtK>7{#;;+mY%}5b6zF4U>@a4g z-AA7N>M`qfE8L+r#lCUsWtR&%ygF(Jk*Y(Rb2Rjg#!A;||8uqcezha@ey5}8{*0s1 z{?1kY;(DDiWz4fRqYbeVr2`Y~)7{%BG3uLhM9sxNYtJGQ z&)A$FL%5+2`0TCY)v&`=fmwwx{aJ-!qs}LsnTWT3_J$EVnpUWSxt-PSu`&~sHGO&o|>Yfju6ya5k7=B@vMsjZ4YK2?hH*k7*Pjr2<7_EKZs_; zZ06p}29`!y^*j?AkL$2EVp^YEmQw6xYM5vf0#j|hvkw~9VMA^jAqOUS+HaIhwtfc7 ze__U)Ul?pvnExy)BG=3jo6VhT?l?YGGAS_y7K(CxY`k6i((Q5hOrrbD&ckrzGu`z^ zM_CFEfxZJ=KJQi#z zwZ1ad3b_%Re-32#oGI2co@41PupKPxEu>tq_^!)dHQc2Z7xj*ns$cLD$pRQTK%0|! zx$tfdhC@g!hwxB$S6t{-OIZ=FZ=hnICsPVR%;YD%EXfqZQ?o0<1NJr ztW{^nmK#_)VP{LW;_jbo&4k4wyz|RcvWLP-js85tHO2gwOAotS@fnfj!V&tL$JUtp z5jHv*<<%bYpY%m&2^m{8e;bw;#iy&;7`nI%cFv;+2HNb4!^_pgXsf?sJHNEOzG4$; zrrW-1d$4*7;bIHC!_;~b%dsWj4SXlJJ*_dHZ4Zpyql_Ae1wXL^N)1zd>+VJP>j%ZR zWrfupwx|@9l+5Lh@d+%KKh7`9AxDm%iuE&U;Qj=R&GXKCQ+Z})4mR0)$crnmBe;N?NVu-v>l_r+eqK9V zzkc#ATu`#cOW+6nLPrIy-^{{> zOTuc@kqXsT%j?NS7{;>fk8**09UnA*=UQ<-FY47!&5r#^M7mr(@kZh$n^a{VRiPqG<7|@-tnLNAWdwj*oNT6*QQERMxy#9 zk>$-oR?n`==$RJr5t{7Zj#XsoSrtq_Ppf}D$8x>=r#VW`I%=LFQ4TF}y`^hPip~GI zBDBCj`G8e)^>68L!yT)pR~y_W*!yD@dAWNp{7>sGL-m?7B~S^EaY(i1&0O%!Vqbj9 z9~SOQJw6gInb*G#A1@p&FJN2z5b@28(?l<^6{^M%-8ssCJ3PxckHqj%yh9TsM0Me7 z(3SrXi2-)=C^?;Cc2i^)ztSYI!@eC_W3ZXlPAz!#y2sVVb>f-o89VDfOQh(po)FJ=&yLV% zfV0Xfw6@~e3HlUGu{k50;ZHWsC}+oGM|&YhAt&W$c%s3<*~hc?WB%16z#0Frh|gL7 znH7cq+X=sZFSIV?RJ8DH@9gPWdvfN>(>q7E5fwEE(2?rg)6)=ihb}opB_z2C%|CfG zuSO|6p_~r%vxtu!M4B8QU_S6`pXKh74={gH_jk#gF!71VM*MDK!ttrWb;^Jr1<`?z zOc`<^9~vg_sn2XweMN}hADW^&`ln79$v6HWQVD;6S#?89dev$Nk{{p={vH{ZTFdFidR)!GrgE-&5p z)3K=gm;VT0Qis*}z6agi4k@U@kB2BHSDw?&KOXOJJQa16sI{np0Y^Tmh>4o4`MVHi z{ptpNk5Y_Wdp4Z$V(6_hL!N>S>PeO`XmC}bxFMObyHsU7_$y)TRomUzczJ}q&Stg{-Vod1HR`=SX|2`z{L$!9C@`_-G$3sZc>YO0Ko zi*5|4!O)tjyk7AY3kLrID(mVuh2npe?F?0K6kl{>LK%kD{K@N;U9n*DH=wp2c~dC+ z7tVwgZqa^&yP(6@t@zvIP45Nni)QuXi-@M)E(cm|QsO0a0X9sl{lN#xH7~GL1%EFS#ZN63|9!Cfmjd z4{}{AF%<-jX(K5qw%Jv(axKo;jQ+-9JEd=V{yegNealofo&SG*KE!c#7%(lB)52`1 z>&lyREW?@_{z;$a(FSTTor7oY*W*k45S^#Rt!CrDjTJ4}13BFkR9sGNp4 zl855@V;Xv_ZD7N^)~yD=Uj#Th-X#(5YZ7rdf>A6XQw=Ut1mH;EiPd7p3eYWn4BP2w z_FuA9f=TiL|7Z4BTcsD0eD^sLZp3O`!3xkUehl4t+U)MRnnH^6XZy^9;-!<&A+s07`pTSkDE8t@E$zxb^zH^W^(S=spu4EDUMR6)c!cguFcMc40EBwnHad!;9eQH z)8aG@+%Mq*4a(?n<_2XnxYq_{w74tD#r^f8lsC6GB5D3B``-fp7X7!kCBG+1Zl2{pvz+64fe|t0mN&qcKkP2MpZ_lrv5o;>xsfu3cV__or>C z^+pyATe6XBbvUFNw3IXa1~WQ7nt5ORHN25)LJaNce|HM}?|7sN7R|G2mNyw-YnhBY z6$NCtdDZOcgc_??#Gn7!N%^OyvvOQsSvDdaj{GUekQ4{e>5Kr-@!&Hrbj5B|bAxmh zjhnykg%*nO&r|BTJ+jW%;2g!$Y;4J{7) zwoU?`7vRPqZ6+D=Bpx=)x`}!~ZH;K{Ijj*TC%nzBxE|J^YwCW0>)!BAD+WyQ%AJ27 zDS8l(U@Dd9+2$;98SAB4v58&$6c)N;X8HA8H3~{x!N!j zhKKv+T@E~|h=#*FCOflFD=3Rck@LM3b`6S?shRn19>u$Mr*UERNV7DI?Mp^Nox-Gb zO#Vib|D+ku*>PWd$l^p2uSwFwa{euP%~m4#1#Q{=je*CzpEbcxr8%9+J&R5%uaYQdeBmm5g%*!u$B=6bmr(Y zZbNt-+dSE{*Y5U0p&fp)LX3UgTaJ5}Gr>St{@yHPj=lyjxLR>?_MH5t$}@6^J~Cl7A}$-5 zfpr}cr9N6=HL#rBn8CFyJKbeAurwWKQe9Vi&+7TOd&e(Dyxi*x*GBDT^>tffKZpg% zW-I&qzt&?xfC=6jDpy+2z}(f$i{~l26P=5x)FqcdOy{Lq$tO-FH0R0dw!q(s?df#D zzsAh|pQvX=N2yilezMuWJxO^)(Y_TT_yK*r!-jbYK)0Jlebn8o)TO2hlU%;dwk<-p zn?)Va_f`r2C`ad3zu*V_^$sukrHpprGfsx3s!K3)Dxmn=tmQ{~UbhN?ABK54T$q{V4tXf&);ShJkm3|1-Z@EVRK~(K(m`hb=3X#1owynyTyH; zsl&V^NVA(r74YnB$a{WZv3UIi^_RYojN1 z5;2GvNB=myfir0>UIY4=xnPbDC;VVX|IQ)R9dE#7cy^Jh9uA+&rzkhWFxCD_jgs+A zK60ew0Q%SO=w#7W8Cde|f;!86jNE7;iS>tm#fA$VNqwvKaxttQXaWQA^FdaE%){xb z7dHNYn7LtE37%#A5vS>9%Cy&#j$yRA!T7%9BfBS97*%;qtc7Ms{{xyZ@@nD}=C0oy zyZ2AuY@y!PGZ#PER1rPQS1GhN&3(FE87puPCwDPeF+Tg5y zCZvhmR=-DU=fi%A-fjGL17NXF1;-i$J6+kY?U=rk8}Ib~;pqhxRlMhz&ED^FVMyge z>x=`$lL=$MS%mcW!3+Hr*QLxbuhb@&kQx6>w_o9=b+EnuH3408cltRl!L{euDElwo z%HthjKN|o}l;`OHb^ipg3jwQ7y0H@rt5kazwurn*X(2DuL`p(Pp< z$&X9CcNUv#qE4(p*K-Tii0|)(D}C@en1FpWZMp>Vt>O|7Lx{5(d)dLx7;~stwrIG2 zu?dN%@#r&jj<7K`CF$nCZsf~V9un=~i-+|~@pD$oicv)RvwQwJjbqOM5fn%+Ua1Vg z_BI9tge-W$-V&dT&NO;7L5=S~L{pO}?)yW|((c87KNTTRoLxjg-1U;@`9-RdRZ!5S z3j=zK7pokjl=2H)iO(&C9QE+@3Q;4G!HD7VZ&Unw6)GQ1PHuKEXa%3~S6{9W1YMkr zyuCV|do#gt_v^JIOwGDAO_;Lw>0Rk{L-A*sp3HKCZu~c|BTJ-J2Gw7=kdZ2@04zZ6 z{j&d|^t2ycTUM+%E)U)Cetm(`P-y!nbrK46URFif&CQuDaZXwaJ`PomEeQ4lTR1SI zL~qy@q7p0MVC|QOUn_19F2;XcdG+nfba##^*NSDocP1V8*R-b&^1J0ZK%=LlYc~kA zq*~lE>ULmj!=DAql&7RPH=x3DxLbvPp8KF~o*T+{cfCl>#}W1mARvbgW}CzbTOe0J3(E@A_!Gzw>h0n1?8An>p! z=3!$2nY&AKSmx3unq}iiB4;DB!=~kFsmW3U&E)iJV@2vUmPgKHVQW4?oKJ3VDV{e*qGli_39 z9mFYpKHLB+z_QddF5aScHD=Lu<&5o*xdZY_JXTsQ^}>6(wRF#dqtkn5XzCbzw;^ z?ql?eh8p}L!4xZUG6oUFv}XA&Bz-ygiJ7Q?qFE5>a*C|dSp1T6@hfD;yJtCyRgozI z>JLb;ILur`CEtZ59J>!5Vq-UwWL$4^Tc-r*1#k=A`<~bPVk3}dtiF&s z@YQ3=dlq6#LoI_iBl(N=hJNWh0=lC4_rJyy8%y9AD z+!|ZdTXCnT8TzD}-@laUntcc%X8pRX`?oQ)+W`GlC|&lw%$&>CFLKLev3F(nOnJ(9 zuogI|susC&T>8qy*Cugww`pJ)T$}|6UPL(Hu1`)i9M|Dt;4Nd?0d3Xm=eYNE>uW*2 zFKp(%)QBa}=kgDRLv;r~(jvgoGpShc>(QDBaM=NuM@~R(LfBhMn(^E%xO5CfOU}Jp zV4*T!;^|gr<@kglf#)1c@UnBlt{~@+>r_I#9a{~s z9G9r~d^@f?81M~M;qfm~LTv?wGi}2Q6Do90<1G1GU6j-?SUCPiR$(RC{W~V4)=_^d zqHtqknDn396XBZ@!(w zc3%s8x8hks7acewaRuTJ$f#Y5zZh}8^gOcXD9iQ{w%P8hj#05j_CE8z3(DM|&Dh(# zJ0kz7@cC1V#J+?jsVptyJ$_sGb1$L82Inq}E0B$APEn{|+{x=uQhutSM9eM;w&sBpGkflulkPd+P02&z>7SKcT+~VaV?O;~OVuuBZq=vi^WCW>^^Lxx#%~ zKs6HhB6_E|dnnp|Y^Yp zY&R&&>AXWY^l*|?*dk2d$$UJRrQ`i-OH1f(!=r22x$9K@+tECKf!f_Wr**N0dw6&m z^tFSn|g zdCrJ`3)0=+(I!#P^zUqLDyMfhwpRXHg1%l!GSJwRV!=X^lIo(<;{tBDHH zc%s~JcU9|&;?qRLhlJ%KLa0-4|9#w#VwV1g{hFvO${hmyNhWlZn73;d zTnDo_j2+yFxP6v$B*3u=eb%_nwNx2IV&@e2({8$Y-VZm|sw3e^GM$+eMq~k`L6I#H!RmaMRB5byB{quYK9Bc24@qeMb$EM<>7>#;9K+XB? zW77`SjF%&ckvUv)Vx*L3b3ejyVx(VJEH<0tDZDezUIeh-`b1FpWNZRfFSq*$#?PIKf8hk zlOlsw5BN6tNp3g_rfT|%v+0Yt@{6Um3-2Mpn+klxb`RW>ck-{^;^p2DM)OJw6wF=;tuEoa7BG_@*vxT{O?Hs#rctpRn8tmSGsy^Pf1^B) zFVY4Xh7@!fQPo?z*_O2m@}N#eo`ddF?y{pZ;$8OVAh+`giG z1`Heowe*JEcD03{Gymbt@N{5~1pB?`4u0`-T!Yb|b$mokRCv5pbiffeN_e9sz?v%O z#dN~Z4}9xaS*oV{v20BeSBRy54_|~FHH3|^?`-RhzuF&{WK@3 zu7X*o?9GOYvf{PGnUj)Qg+l(`Zy}^)A+LZR6!s>era^i$<$^$v7YD08CbscKLhHM8 z$nwCv5I5TL6lm`tBOIwuFb^f9*j3>_I`!lpwGc*f(Gb2Qm<~osxUHA734ShMN0wpi zf!ddw-I;-ajOjBBtS*^f6Y?c65dj&_l+mjU8RTdi@4WmfcokoLdB^*7je5&;GHIkZ zg^=WG--Bliyc5(pdH6-%?Y6G;$3c~R>mU+S_m60$fpsLOjcxfHDuy5eBy9M z))0NMa8kLJ?@>4G^ET(5Ry{Zzoc!(D>Yvx9tLbGNoc zFn7JO{mGM@kCl6_uf1QW!=(F8(KDm zqj$JIY?7?T-*JnZ`vDm7A9t?EjJ#^0UEeWQ*2cEhgMcjC-R!P5Vh{^t4_b}L`FcU3vfrJM7S{G<^Wh0R<%%9bFU&zGQv8C zot9h`fGCJa50?Mk)!+U~+mug?)1shN5{=7FH^p>fL1k>;Y zMeO}Ou!j{h>x|3S8%w@!QdQh4F#K&&Mh51O zw-TSY2xTW+g4{LbQjU;z=g78_{Lv=~k9p|Fp#xXV@c#6fgByHgPwd~d)%x>oo zirqGI!AK+&%+_+HBX@@)`{$&~P6PZvlVruCGh8VPW#4`MOyfeIIOa75=J;#t#b{*0 zLFn5?rJtV5k&T;Odts8wx7jjhnP7>FA#lH?X z;77Fe@szzPm>R zHuSMzAABlji;Ro+jgT6KlY*+;6KE9FjWPx81~Z0#h8%kFO(+K0Qh#G)DG}24&C~tO2eHf~X&k54$X88ugs{KDGYaug`mgerUiThy{%PvV1G|pC{XrhQY zhOyYArZ(WK@7e~D$rAh=%bDbfk&=(~{$y8g<_QYl`x|z%R!>AzVfwQ7FU}Q@=#jTx z{P?<&NW$Bpc-xu0*uV&v2-L(|w#uDTH{i^{+YpR*(>!vt7$UQ0)_)UO{=-yZ10Ny9 z;;Q*D+m-tzs^k zFx8bq=XHqCoh&4#j6a#XIwiSE#UZN!{yOM9H!Ch@tgvWHlAcu;S{2k8lN_64ND7Ge z6N?}|2_8Ik_Ai;Ad}lU(#qMr{6<%=KErg?Q1evvF`Bxu&&WGwudXr^%maqFc+E8;a zl%pIXJ`nkUA#eJ8_*v1_&Ddqc=mvyKDgla21Ir$2M$0N;*5tPt4JUU&EZ)$zd!tSy z{HVKb<%6sGvO4OwXJtw^cYdM9K?@wRP==qejIp=3n2fBdLd&K@n{;JlrE_JkB(*>7 z8{cQ@k>~_%?lYAqbj!!j?@%OW13Z17C5ryUq`XEUkQ8G@#jy1kSS!pD4agT;+g`9k?MQ5ezf*^q1G)~N62ptH>gj$Aq3;`kKEHIDGm6%g zI=j^tN}}^@=d}+w5kf;a^L`Hacem3+951wpf!p z4A1yql-$~iX?!RM&4R3KCpI zJ+cVcIGCx3KYDN?;fpH3+HuI`)~5#oCIjp(lKa34-PgSR7Rgo{n4j%yu%LX$PguBY z464FIPgK)Mp&G+9oliBDRg?MV zI2tFO_YhG5{YcsEOwpyvr!a%odms+7-}w^E#pV|JY0TC0^W%6fH0jM=VxZc(d3zY~ zNhM%Fp^W2LNaeXoeNm%+;6~@gdnzwUafaFD#)Gco=*|M)W&Q0=VcBta^o=(_R zF+Y=wl>R_>pFw=mk4C5IOQY_4qtGC{lOCQTRPts=Jl#G^!mCifcjqj zZ!sL!KUlW=iAc8{M~F*$mMQw!LChuYw=Ng|J%lmMQ6Z&&->R3fQYn?tSn<;(CkDNt zIhAP7iuzdVpvLQ=RSsHvSm-qpq^GKRJ7UqqVOk_U^OdrOjpz(F{jlqu?{5Lw_Mfsl zC3`x4<9t1dF22{X9hAho7L3?dPtpx@R#9yIgu=7HFRwDki&TwhqtTfb>B?=BN_r&- z3AD_!*|l0dTqA(2)lh)xC`+`+4YBfkxlh^;->~6nE@lDF!3T97RMLZ&wgk-PW%rV6 zpz#-yq*~G~Fxz~jk&Dc)1^kc zH&2^mV*X)wkzIOR)vW?fsqdCpnQX`Eo;o1oM#CrZl)lc0dF9sPTLt<~f+hB@b742z zgW8a7%6(Y0YfSrk_(x1hJp}iN?(w9W;e`Q&PBzs$@ ztdB1VJU07rlhDk|)r5V83subHo4y#ArxIw^-!;z=94`3-N=qD!L72x|M~l5{a@uXM z+@VaEZ{`!-Ce$oQ0q^l6e#k7_tL^ROCS0Ro$CtWSD%Hy^u3!OXY%P4eN@~C{mOXBX zztsC;m!xY4(tf=z@Y<&_63Y(}YYKHa7v&kl;?M1yJ?Q&|9Lu)?QYO8#jY|00Q>TD7 z_B@|nVFYs(;j6T#zixKlut+HPHn-Rg*N-mLp;?UnQFcx3q&@sd4pPT9AjeaC4`P4L z!(n#D)%MwCmZfL$NqHPsM0p%y$NOiQAw1M)pZ*WjJDNsW?vPt2^a$m%nHd~*exO3A zRw%i-&W-x;dT}SKrTmCwTWL+Wh~9qvws-q*A$iDT`a|4SBo9 zA;oh@U&7i!f|Ms4|C`{Nhg7X%vu_qM_8X#@fJu3qr636v&GqQa-(#KY+-i+Cn_NlN zH1-xHSqBaCX&g*O`IT7 z=&zr3d%g^yOCKO@NGY9}{5;KM6yMOo!anlX9`e~uXSaU00ePYpjztE-KdT~p^MB*x ze@0{?t{xKao9t{F!B2%%9tFp9PPMgt;;z}rI#^*OjB^lvN$nbe`c?*i5oSqQJ3 zJ;fnThAS91jh1KtI4`x>_1TjJliRU}jc2R!p^aBN6Tab!^5B!ZCV3LJ%!KFeyK~QQze$k0BW0H@~BnXT+2cQ!*QlEp?f!d`rz-e7U!rc zTpbyW&-h;Tt861Fzh-F__Wd2lVVsgr!W49=8+{R_Jsp3v$sm)CI-jL3q5(!t_lFdp(P2%o40c~dA*!#>?*gsh7FdkX9{l=RPV0P23olMHh`zxzr_g=h zwwxxaUA>sIC0c$<#PiIqCInG+lIW_aRhGxol;}o$&(DcRbG@e9Bx7MV18mJhB)9o< z=DQ|H15)|P=6tXQppx>u&UB}N%(nA7`^54SS+8rS7)K*D6eBAnvPxC@8rYIrvUpA_ z+pHKWp8#nfC8Uz(;gO0}q}P-DuYw2DoaL7o3ddZSrY2M8*TA}{so!VTdpur1oLcu; z1Ypvp3r+4@UWD#6*c1ij)Vv!Pu_;S)(&L3&N}g&qLnSrqd}EHgjr3j;OCO1C1O!)b zFC`707n2!ALzSxbFzejM3l_KNVsSgexN4OE<*fanB+))%T!o?!C~ zi#08iBFkex+|Og_!N#7&R`Ym7Ih_=DYMwx7J!J z)rpL3;pqHoe=8)~P*o+?KaZm`!d94$f3#NAH0MmQM9#*Y(Pq%(0g0lf-^sd`CW*#M1=q#nw7cLCjV71pWdr(ZW5oBmK1qhEI zc-U_@m)`P;m0UMCc)i4KY2iybc{r5q`}b2Sl|dUu zVv?jnMq-jJj|Y{Il$|li5@U+2V@y&MBOy!Ks!1x#SjRGqW$e4`>)6*}?6Vo(`}uy~ z_dVYKet*8l;WMstKIeV8#(mGVoacF+S341PXkH>sDIiTFjd47c@8z4ocOCHY)<=*H zj&fv4_Pkz9x#S@}bRK7y z-$(p-IN!4#+AMl-&(QhwMKn5Q6BUl;sh7|I(WU!>qXRy@vUoEXOsC6E(e)T-nNf5* z9S_0;-V@C76Ghe!@ZF8lRJk-D@`Jy=!LcCmiT_61hL<&GL?kW^?u%XZW% zN3m=Fs$3?cDoHTfuFfp`Fe5R-2e+J;6ac}uBL%#V-J#71F|N%!ZBR~Uvu?8WJ42F8 z>MuJ#nqIi#{3xFYeQ!ry!6%snWiaEaES(J7&S$Q9ty2@#kgIAW`sxf>O>ERLYxgCEfJdK%0i@Q~rH5O(cDl3CJ8mo|x;8R=|%{l=8J3F+~R~T-w z@y-ZyJO`zOu!8GAo<-@nGi_%zSf*k}%1qPQJAx!~H%99g7PgR~buLW@pJ+FaP@=}_pwf^O?MK;d|JAeZ(yb^h-NAo90YRqf(`p15t zd`}^b_QVwRsD_*2pLQ2HUrSYnM)1#8JJ@EI*{?)*G^Ko6H;+37^;Gn--{XG%e0)Vb`TvcRDxUtbv~%56C!gJ`CA{hZnm%U|fyfTtRuPPPqW~tb`rm*NIL)-VvC;g=Sa^^0Eq81Zsh_Jx9SSJ8Sn`&Q6mEcqhcMH$ z$}PRX^AdbsQ?h!Rd#X*5Oj>H@x!h^X4YRGkX9e`=?*~UNeNojyQ+9+l)G<1^p;n>pZaj5 z*B=dxg)^2LBxVmO&er&%52t@hNRbvHq9Q!xMmGTbDGmzg)U+h53@M zdHv${R}Fnd&-5m~*7%fn&)Wl>%*VfMR~!ezR%6lfGIY0xDa*^0Yv8$ppNqzWbxNdB zM&62cRS4=Jv~U}BuDR&9%MY@r(3WM(qXY>`;r9*W&f+)F0tl$5yEUp??6_du#Q~+c z1XDR_kH`wh?VZ8k9T>6ls^CG~O0_LRPaV|^8x$DzGfcNFdxqJH`kB%n?*1(}(PPpI zGE~by&E624Rx#bXLtAO+h_WVZ*=Yab{8MA3$M$zZ%cDX>AW+d&v+Zrt#S7wu{~(-a$WAjD=;U@ChLvKI8${4ZoX$KZw?Lr)u2a48Slx<&ze>agHR8(97gG| zUy*F^AC6fj43I)ge+2BmSE#)fv+Ks+}2UX@cFCN|5G~d*c zuYNuOuTS;_J&0e`EMc2`;kQJ>zN5fI1Zs2%UNGQ0`%L1UW`}!+jXmFm>02)B-=HJ=dJk6iS~Av57Y{=+9=mpLbt)(d-ZItoO38X%xGwd*JG9 z`{^;cIxp%S5*Cb=0)kck!0IwD>r;>B)lpZpa8)s31B6qnCc|@QFcinmUsx*A3`aIm zN#lYxgM#Z+nR+kfJ6-CTVv(%u;G#QO+lQ&(=JiL4dkszRGtZFRR+h)GQgyNOZi3{I z!g)8bv`l%X-dpL;9^s&pCo&|qrg%x&5nxPw*{RI*ML0g_%E(3$`$y5Z3#0_7E3D170+x>P!>*oB=N>RS@-q2LF zHO)zZQRp8!zT$^!SLF7t*;>WR`PM2~8H*q4g{P|0pSS1x!9ta6UrTHDtUwy5UxJ!= zsAWvDEaSi)$k%Z`1=bCdZZSL?-=j44o&A~ZIh)K&%arCmfDnxBIxvS>I7`d|DZ_$- zI!YMiHLR*(1qqD|3hu6M^Lz5mNX~jGvxpzy>A@u*u$gnUG;-A&&Sa}4#!GvQmQ;%z#Xah%ojI~<3igEGU<<8+LXUrSbd;tZ!ABlNam^y-(wA| zMFmoNuT|Nk@C>miUZpE>L9zu!&9o-bZJ+`jwoV}AYCw}q% zrhsS1g8`v>9TQLpYx^ZfOoK$?)C! zDgPE(jCb_BN>Q14Qb0y%{TLUM(_)-v6RzZBo9{%e_CwnX<4(`4KXu@Fe82Tq)nAQU z%jGrs1G9E8niy_TOccy#tQvR56h02dtIq={sza61Z2&tlD>4lC*Rc} zDr|B7cuhfCefie$kK0d;k6uknQWQp7SXdY1|>Z6Xo5k zox8|2&yA-DB0*AhYa|EslaYtVgLr2RuM~^srw}K^ob+RZ&UonG3mLO+%=wn1JM$5# zmyju6o0K{J{-WmImQgW+&e8Vc+zi&N4t{|wRiTQS1r-U4KOTW42rtplF_hMskdK1BSEzWq9;@~&fI)A;xN%Y5{^AldpJ zJ?i;AUEsS&!M4i2lN{Ej9Yu5}$!rZF0w(?ciJ6~rw7w~z!+3d$CL}#5doR!Y15)WL zYGptewP_dvFGVasB-dj$4ovD_d&PHsjB- zDU}J$GWL|Y@<)T+!1<9g9pX@Uscwse?Ucos@K=Uvf|SNxqC9SsFY74?Hq)}5qLe`2 z8hi1~PpVZTruCO~N&^Mqglj74?UL?hhXbPu7Vd>069(XX&N%}EuS9$Lcr-r7F&+fC z_Fb<$m+%35SMJ2S3QROi-tlvdI^NGS;b-V8h09k|7W(QJm7EqLn{ihNyRv};d?WWr zvHM35-`4rJ5)^UjHE(>UR=h<|UNX^{S^oyER96j3IKerB_#G2V`#iVA(*JaaMtXhs z2t3eoC{MH~;0QG-&3x-y2!f<)6*zmlswS!E$=4Dx0(`)^NSdj)USZW2&3anj13XUc zn@?lr;~c<4_C-p}hOG*#o@iAvl+(RBAvUrZ(SHtDqnO$e^zy>qiERBS`wgx<^Q#CL zNH#0JC5G^e+4(Y#lC_hFhv&%%^~^U3c3%@jWWmc;o?~Fk^KD9zcBll!a_GBrhV|R{ zOKDY0D<|!rdE+Yri`2GqPuae)JMimsjE{qA`=Q7oQ@i#F|DWGypeagWD?1~M$6EgV zXvSHEfJ_biCfa9ex$)gnP~xH(o^FM8zo#g8#{ILh2tMSD0dvD3tHXM(<|1e5^}s73 zd{g)O&ua|W83TTQXxi+y{fU_C&f*(m8+ajHm1KAP{uYVgeW^==(1=rrjvmsu^eNDe zZXMq3hgV6b(MC(8Z#f@qT_X9Xg2*|Od>4L=QvKgYT{G>Cm3w}{+$_BfhJz|+PX&!^ z96zdiL@bQ6m;1%|>?H;J(ZLgAVoRoU^S~#DaG?f`VE3(KOABV6->Vcdk&?FK(1`a9 zZx^#5%nM`QYi`(leVX^^Ez9yQ4jc0*7c=P6?bBVz{v#6b)@=KM^Zmx7N}I>^?2LSt zWX=86E`oI%G;lnEZLbEUd24wRBtOc^CcYP;CpA~Tl>)b3)9;Wap67Y#eBqLUZv1-u z`C+(Xhtn5{xSP>0G%Wm8z>V%jxe?ymLubUpifkY*o3X{O72l=IgW#{8TW?rOEs!wu z)!|bEGDyqQt>U20Ya3TRbrp6?swCpJm%g?OP{@nJMo2{u*dUM7ShWZUX>6Iat)1T* zXEz*fCz-(S=j``h#!@MJ-)`5QZeD0|NP-xslEa4->{bnU*~oRlfAEs}8J%~~@_?tu z?pJw{u<`w!vAGVR-GVd4L(q5kvXlBAZfONdvMG09J<6a?NQ6fCEx+-3)EW9G6gYL- zy{qJ>CatkAq0sX~sy0#(*rea*8_WtysjPD554tFIpRV*afqt`1L1m3)c*gyQ@AD0V zNAP>N!*)}xicp#F6_!oU=Od8n2Rt#PqkbTad2HU)^a&yK5fDb~;*lHEVkwX5d?yOU z-;PJu+cx_uybG~P3inNASeojywy zC-2vn9muu`VRToaJ$KZg(#? zU*DLq?C;Hru#>P|2|8A(4Kk?Cmm60|l5SP+x;}bObI^SmqxeNAn}*fTO3ONJcSr@N ze$aH{Sh);H10dPG#u#2gIQ3<#&f1?bQ&&op}ClD`oPMVJoMNwdy^5 zBN(mc6>3JyKN{r9zg6B=|C<2Xo{&W24JXLp2Y@U7ae4y7#{}|=Kr?Y%%j6Dri5X0lDOJG+w1~nYmTG?$Bq^oiaeyJ@-km4cQX@eP2 zpRf9*a5YmsN&81)v&!~GAja{@;^W~r)F#sl-s@szSpy z^KZ8f$-d4xQh}N>X(q_XlyL&y-v{>8&1X2UC`ISGp8nu(aZQAmWrE&PVZs$wS5J27 zI^m&uqIncAg5hQjG!zqv{17qZzYzKD^aXG9+V!n|^U-x(6a_k6;@~Z9QMgHiIJ=Xa zqX)CcxJATt=gZ(>=FH)j{0eJ9MA9Lb^m7_69D?E`=>6W1 zU2V*=&t;G3q({#P;xSpViGYgN$(KGQ4JxigpOT}$>1uk zjbh6m-#N0wn>=+Bkq;=R3V4Jo#L}C3S-&5QjxRI_@8P~x9E*c9>d@)eiuT8;TyyaQ zjaLzsqC13Ji;2WwQK+(ke?#Jhj>&od6L{L?upw11jrmjo-!ws;;hV{;5I2a%=##08 zqYbg=@ed_wsz(p5Bvc-g5-249jo}wYj?w8v$BlI6Q<tN{SF|tWIAAr()NF%k8&C@p@UA#BkW4aoo(cP_70r7^V^TQF;rHD zqD#)KijCj4rlt)&qzC^4W=w0vg**{jt~h~>1D@`K^=6Luk3A3o$k z&4K56MD6~ksv8>~^5+*TxyN`~2RP0R5XJBDHgmB4xv>P762Joh;g*kMT4e}FH*b%Z zJKBlv7?0e~zjjZ|ekMH^8Gvc0tIVg&kCpfpmj!&-q#H_1_azVRd%|Cva6E8F(YA-RX4N{j8+F2X=3f4HTPi+N4ySwKr;bmw9!%&NTk{)UTGC>wq2oaO~49&+$}$W8Ekiv zOZ?4lu;kF+IbEvk(CKiVy=S7qzO{z-JgMSse8FcGHWg_4__5;N$oLf zIDKEpfcvI+F5lJ$qsx9y<{&oPHkGl{CRs(S#S8Wq7@T?TmOTdIA+_S44>K-lw72aE z-bKrOQ}$RP$wyz%q^oGjw0JRcK2G^RIG&Ad$$FSDePu3QX*}_B*0TQV!`!F_M%DD= zE!&u{d};*^+!LR^?`azNl35$<_VHa=cY1QC?vB&h=nDyfXG;Vrz&H4VWKOh`VU@x4 zUn^2WeZhIS>2np0(|*g1gO5G;#}R=45`Sye>y@sfuv z)wm_wTyeom*IX=eO5yJz38EBsOYU?oT}G$9Pak#sYFJP(GZCdJVq5rp^q$(R>!^gs zI~!#=24$6=@Z3>0-fN(wYnZj*{tAJ?LqO9_bxO?kN$52i#_xqq1-7)plZHv3fMJto zQi6?Mjv$2QGP++S79cABB3K1i@>568=Zzbz=AFpmnR!|zygCr=b}L&XDQn&g#xVIZ zYO`IpDq~UDsE+*fCA8wxsCYjc*xNm7wgy{rudEvWcklUl{S^6%p8B1fQH!C?Em-Gs z$DHlp9^!F!BsbOmD#q>)2nVt;6j1i`sq8tL)+WLV{vo)=P)V&OX^cM)9^Ad%`^#TFCT% zgq|&WRm@G*-}e9ONs2W$2oFk8(%>VmD!SZvnl=ep^_kZA{naMb`}nL^p%-RsJGD^2 zewkM6n&GiQcJ~x-Srio>_Xw{0M_uc0(9VqSc=5D%HNJ&Z7&0d%V?|l>urKl#$U{LB z#8<)*W#b8yy3Ga5z*Iw8eWjF&z!8h@1%T_r}QVRJg;kr>ouu!ZN8e4lNyV_U1|6+2%A zIW?;|+g?9IBPo#26}+x(#FA{U@GUj$rhHNs)3)&IYYVXwuC(@x#95cRg+f8GXC%e< znGNn*D^NX>YPLAb(W-t;!l9_A#07R}_^ZnGx`QKC4yp)j`0y+Heee>$h<$X@E1PY+ zqgjxabCHz0kAGQ&qJq1!g^YWiQNMj^_QWSf4ln>{a5?Un zsasc;;ja-A>CaMklfCxOOw(J~ZAsbFy@Iy%UsdG_C*Uvk&+jd2_WYnYhx+{71|0Ll zBxBF-V4kW4zo6(w2VE>jS|S8zsP8`5(%gNm|L|u@k^CJFg1Lj+i2_2HFI4{HE%QoZ zgzc{756y$9qj%LUYSwR(*E;>bRJ?`oI5tjC)B-VK?YGAK=2aEcH(sHUnt@Y)som+Z z3Fq0#`B6SSct=e@kDZRVjGgP-py$2qhpKx&wH98549^t<(XZFic*Pp;1QaJuUzr_$ zJYMo~c`W)UA4e>Tj;+sHAYITA>Ho1D-g0r<{E1)Z3&$X0qTkB+i(Xj2Y|CTne1(;J zWq#N#L$UeMvHmbF%pm!gY}sg0gvQy;Qa7}I>H{aKI+fPGe27P{{O~z}9woKas<27x z)19Mg+demyFyNvL$k=*qiz>y7dI(KykFfAdn&I>O$pNbz=}oM=Rz0{Zw&p1{giu8f zAKHm^NxmY1W_*k^Q)Gwzd1%ef>Zt>7=eT1{>^f4{qH<_Xcc62HT^s&ww8nPm%}jN4 zr>_^_m~TBnI@8>zK0c0HeV>4f0&U{p|r~K6PxALBV=olQfPqjd9>|$ z7edwy%_m+g`TY*%=jbOs+!evA%q%eBsA(E;l7%CRslqfZ^vB(`o{bG=sL>WySd~>9 zTz-Emo;0)0o+1t7o(=WNyhT?n&<+qOH0R?3}^Z{`~c$)ibgLPt^!@^u}9)k!_C7`dS2()p+>CThJUW66yd zt8Q$YD=rb1rhDNvM|S)!y<4pzw+D4};NGP^v&ZsNls(c&@BXnX2%9{s63uX4Dz$4b zl%Wo)p7yh$Xo8sP^_oL6YeRVgL21ZT`nR0mB~JgzBPXGqXZ?VF$nQ%^ip#b8-!_k@ z#0jB$#a%bwP2A~>@lyk7Xw7RDbf3jF-cm(4f-3#ZRi{VJ2d)*@-w5A!8z`%CQq zSd^Lo_GQBk?nS-C{*OhC3AiA0fM;*}CH8+T%1^-gm;(p*ieF;?Pf>Y_s;)VUM7)Tu zNPp=kgL<}`@Ay!U91~74O85ekY48Q>{WW(we%tvXTerC~{FNA5=h2&lJV|hnA7k3! z)u$IA;4F}@-PYz?sJ+wu8w%4Mc;z&XM3?CJ0&6bMYp3gv;@{T!?_!$nk+3TGc`+Bd zvqwbw$v z^b(K9$1R!czr*JH`x28bjP}ig3rvZUetx9e7z0e^$&o_Xd3EDNb~wQoqdHeEB@T%<0w_I6+u~3H8A+ zF0i?W75ca|GC=;ki}>&fz7GYY&CbWWufS@G9yBbfi1|LG0-+xa3yYyv{dpL4J3&Lb z_WbfpXw;J8y30h#t%hfVBAma1L{Gtq^Dipk6Fts@Db3virIB~xyJl4*v9~sihl3D0 z4t3RL>EZq1gGGa7&mB(@)+rycT3XRAI`R5#NFxkEeln;^bcueUKUsTW^-OJ0;+`_V;1&e$HV2Bc?^kR=LD^aC3 z-kE^7-kMaYQh1-&jG9JEjO0ct(Q6@+`*UHFl0BN=C?S4y$z5Ly=|BI)f|r!m-4O`H zZr$IqXsOTCG!B8>JGT4a-bDDrgV@?r%oy9G2Jbiv64 zWi8s2TUK-5z{H9_CD76n7g)o2bHOF$x-Diw2017Poh$n&NNOxW4_UM}>(w^}XJC|m zjRleOaAi3d+Glp|=JQ`$ zw)lGbSs))uVH*kJ{SI^z{xN}h0ldyKbbPVN;@^EX{iEoHXT)TRrRAJh$EU~dSDU;a zxVZ^j4fAHJcIKjumeFyYqLYpDec#)exntL)suS$Te>^^zYMiciP?vqg`ejsZS6~`a1*V?5;?8Vju zmz(eNG$`zS*K)XHZD&Yv6qe$%6m~Zuof#~Wc(ZBG<6-r<;cDDVtgs}}RT6>4TnTJuWv&JvNJuvCe6MKBxd38ViQ$j(3^NpKgzUeCRwS3%#^nRhLEl$FD9wyG3?XwvMblc;9RO zWqwScbA%#2dij zKEJB$B;Vj&vUo75vh79KZH49#yI7vei-!a69^Z;Rvmkw?%i!Uc#P1Wi^6R$AB?Bwf zb|pOM)J4r2+b05Bw;IA`rnQsX3Ug_Kg)CV`5z)e8!*^x=WKNtihN4jiHM>=JaYwf9 z6np26oTU*|WX`BX%eAmB={x^2^&>d0NSpW5DaQ@F@G-6-->zVouCs#fv`cb{)H6&WmqYng5L^d#F2S||38)LAG#5W@s^5sXJ z-ytW-#bj~8&-MBT2%m@LVlu-d=|TqMF1XoyxF_H}P>ccZt!&7QP)YJK*7*|4r!OW3&Ti;rI~ zEIa92%ErP_U+$+_yg9AIiRZdksS?;9D} zTDaM0vsKgTV6EiQbUb(Olakk*M`^l&0DpyG9yeu`$9LHeBd9`F!OoibVor1THqSTP zg4VCPd)}DxuH#@Y$6-U)lUn_b_3Xre+_WC_XIEX0YY_Q3_LXz6h1rEUFkfro5M8ah ziRcofJlnIvIA!+Jzk#|-xl7)GubU6lKa$n+Q#0@oj9T_Cx4R*Mpb|T{b6XDOBG*Cm zH)+phA->V72|6?wcHY)A3(l8{FCXw@G{bAztKK`_+@z-^)xqk^PE`Tyb9Xn|do=2e zLLG~YgG8gdSIf!OyIc=A6qtu?+Y5G!Ki7b22zxhZU`BwXjadbRJ+H2Kl}B*SB8gz! zNM4d{UVWxEsNI`zWJQ+n%BPsVEokkhx+&HiqHt_25F>gMoM!%yFIE-9bE)*ma#$XRM}vNsSVUO{lwW$JD&{ zYv1QYFUKiagznx@N#OT7E7pKCllTX`ep@k5C@AQFbxn9kE~C4ayoRuEWxCcRtRtR< zuXopqHxM9C%Gnb}Gh(n(M;7yXRQD7la6@Cy9FqGK=@}m75QgwA)e`P19D$@ zP3nL?pPwD%h@UG&e)KEGqIIlqz{_uYo7R7-CYP;uEteb*t-sIkQi>r~-zK`dj~P zSkQQVbmO($(dJgmgEaPPS(V%YUj|ZDRD^aG@7-@NN`JP;%+p`-+3uTd+?}~ow&dR0 zzBryZ!gGkUB-YyQ27K!G``pJ6_KX_A+wGOboxf^IHQ&k3v!VUF6eByyT-5E{ zuY$5YD**uA_b;8x9)5;Svp2_JN;PihWs&hxw%ak|-v`fm3Vsn;2C4bgnq&NpJq9H_ z1y2C!T^q3}%gHmQxr5EWnzjv_3Ymxu5=(OMF?_`{`2NPcdA3gqBvvca=g+Yx{L7xf zM}7NXw-#S>C}j5Ux-%*;t+kZ_LF@K*!J6DXPwe>Tk@S)UpQjla1HbrN_bQ};dffhV zk$G}51ZZLL(p)&uw94{-{{&?5;5`El*`ctUmA_W3LNW8%)Bzf7JGOg*Hjd?6g*2vJ zPD+R?NiG|0y8Um4*sJoG0VplJ+d&JYLk7!l)I(>Hq4NatR3aII;PoQHC1Oa zGKjZb9>WLu4BngNk8AUq!8>?$hNoeFufz@T0(Mm{R|&p%B`kvfyfmyvxB3UsA6K2BsTp}+T##OeW5ggj8=8y(qlm1}&_u+^eFU_^r`fO_t91Yf|2fTl>zNz|3LrU9HDrQj3942O^<= zmVrTW%cGcnU8Qn7cUOno$qZ*xp~(lMlG7x2!Rw;mmOp(b?dc8Hj$YWmVpcv4Y)%)= zR+Uf>{5DP?iX?U|~PM=lvVx?H9s_7m372UYt>zi}Ok=4^S# zcLZGRyr^)sQ_ehQmuqQcxf-c8KdD~j<`%WKGyhd}<)@8(ri#_D`$J{ggvb~XK zDi&6r(=DJdoh{4zFT()tekH(Y=9!M%dIy|bh4NQ{;yTWTqz?a|yN)k>0MrZWG}DW8 zk)sGf#SFmrn z{du!3U!yp~E?ujx9NuA|9cq_`O9||*Yfp<@MU-*0Y}aY>k`5`S``cJQw15X6#rZ9` z(xMmXJG(x1S}g#fR_st#y8Xm)Rh)9~`SLHI8z~0FfvNt)u?TD9!=$C<`WywZU1Kee zGbL%qfqtsc8V>ZN)0zJVSMt?T5IdkCqqO`ZHK@~2f+jH2&irpyn3b_SB!!U`2&-I{l2EnHHE zmWfIM;{KNivc`plN5D(pdOX4_soSwtXBC=axX+2GAvS;c~#Kl%mLldp!+|I$oKF}w@w;T&&>#XrV%{!qJ_?1@#0;&5EZ zyQa8~BWgEwXcO7_p-RmH9oN)uPJ3X5BWAavH+G{HZ)L4a+%E|&qzZJrRbfoZ-QC=+ zb!{K2`CQ07>s&->rWRjXwKp6Mj#9R=apcD6@h2;fC;?4TnBpXo*3N?Eb~etPw`%&1)>@Wd(dOQrho-df(dmDl}EzyrM4tJd|aWS~1r z*yjc1&O9}w1Lb}wO_DgH)TmTfBA~5W8;t&_78i6&=K&<`jq@|CYAB~wbQIn(vFCM! zk*HK!mD0`4SUJ$%ER-tEk1t#l==d>`?h_^4SsvCs6u|2;ztTAcJfzPl3m#RWh1?zD zLHv_c$vh2O^-f-;yyFo@Y*-A^iI*6&f|S>bBnnfSd<%I-+INWO@w(O@5Kh*^AxJm0 zb$s`?oEB&SW~F+kxKh5|)dZ%5^YFfBKrBPvinaD@?sq9aGc0h7v<=PEJ>?s(Gja)G zu38j-%6IvFYmS%`I`!D9Z|f-AJ`XXQe(ZbiGwE*4(;7t^9+E6P1plL~*@U$d|!aR%a>?x4oQ{>1k?2B~lb6${pz{1iOU$uUEPCJceq zJ1)=kZ>_v9`mp;8EB8LY+htzA(c6Vq3c=D8HjS4^d2=4ehc$_hG5NsfIZvwpZ{25G zsp+#HXEpN-4g(EX`vg^$CIOk-&FfwMo_lellYgW+=VTVamvGWxs#hU;aK1t)LUP+ zX0KE=gp#r3zZmHPWv*r6;JYj!v?7?8 zp>L>G76P5Wjj`O20d1ZLV%hP4yuq}--;Fmq)dtIUY!;txhNjwF9W3E>U!JN7Ro&BY zEZj+ls)u_9xV#y+9o~@ObKLOc>$w_+0&5tc$yKC^b024CCu)MU`k#4iBgAM#gN?i{ zYir=&ZIhLLPD5z?s6tjM{kmBP;PU{?d*pNT&4^xSg-&D40l|CKp`#egt3HtG)r2OD ze1KXuB6&7A%b_FwSJ|Ry+~&c#lBAmP%2(*vCq(luctTU_@1IJS6JmHTU^|V!px&lj zzqHZzZ>?=uo{>`v^|D=338{+@uqKu7w$AltT*Gy|5bFp?B!{`w(Z#;VXxo>pj>4V?T8b*4(wAhN;fNbocpsUut z^E1+@Whi0BP-xEWmg<2|jKu|py58c<+;skpWYys{Vuh(8<9^sAYZUs?v@i#+zU+5* zwHR|ls|a!~^`nA%!q8Cr-$PA3ETfTfZC}<3ooC!|of52mbGw^cE3hi!`wT9L z`o4}iyum^_$)Al5&kQ$z;a3n!id&&Oco^1^l7yJHvhrgq;4nX3y+}XZu*tEw?y0dj zgn#0bA^_m=C{cL;VSY$}MgnvyK&K-7MO=#jfXC&}$^!`ViwEd<*)@`xRXOJdi2g82 znEsHTLbAlylPoD~xdX22xdYG&H5DrWAo@3e{sz!UfJOrJs4HMk*a!t|pOs=^ek`Ca zmTZ$?!Hl@T2EYGKm*b``oCgnp0_6VK^4PLvzM#*|@v_XoVdS&Xnq)27pOJ0`#T5W_ zOImSQd;V}u7p&g38&(h9@=>$`0K&N7gfT8=A0SR&qm>8r$r^f*WR0+|gb&@{2prN#6M!}WXkh#x#3L3+Pl^D5fz4s^0K&*m0Q!kP4FAxGh%_` zTm%5j{sSod0TcoNg#h6Cbm01Q#Dbb@5dbjz!dZC$VdN-)j-slnj%|i=ziW|hmoq-K zrU&v;+iUy^>EYe6#y+s^nEzls3R)tz^{2C3hnZ2D0#AW`6Xu=50 zXmSFaie^m9LIXYlKU{U#zgjirF`+(E9G@oF=1ec%Wh;Sx<*oFJB`Kh?Y|?^DK%c&5 z{0Lz>Vx9alIKc+OdE{Bu3D)BXvn}nmV~l5aIA0J&gm3Ay=5Sw55zw9tha!4%jvxb5 z-^BaSt(o_s;va)Qs)dDivC)_m%=vf~UB6kTZ8Ludb;YD?YGlC5clK3~TbLx=`HNut zZOC=2DewOjK8I-D;K8^aVRwPHzKSmBD0PMZSL6Q^q4z})!yZ(i-zGG z_zt4qBb*?|r#ATUgRiQ`oxnqcR}}}sOgyyh1(k3#cWt{+(V4qRA(b7_g8jn*BA|cO z(pF#9^>O~MQ5x}3>n8K&@v{CZ5j|5!2go$<0vMv~v z?0b1=e@JvX5^&e~!#wcI$oT{8$&molOLI0?4*167N$<|@x6-sd4vf29-(S$|^?%F* zH~LLr4IY%$XXN?A&=?UqFm4+rh4G=F{Ppo6XnA7;X(dauLIh?7pbF$~ zJvGm_Gt#LAqW*?j1!dJj{W(+kHzf+1AnG6B4Fkv7t9#N_+}-VgWe8x&MPVxL{-Y&_ z9b8A$l<1h*E>p-}23)vsKTL}zn@QGiqAqC3DTSdjf;4ZhnYH|$*SH#pt`G868G;?6 zl-RVHyT%Yc*vHYtxZ$?jlh#UFRH>qUW%E^0qHiK6sG`Ykbk|P^=rFwo=)oQVJjYux z!LJ^y&KuwHo%L>T-uo0ifKs=kcKJj#%9!6E&+&y#tIZld`H&bbJTptVv!~Z#wCDR6 z(tcojg^jR*unvEs-(Vlc?DhT{U(u=hA_yQ;ewxs#&=izkqp&cKZ6O!WlNLm_x?jOR zASOh%Hqm3A;uorbIcwE%oQ4XLVk-=+MnTnJXc7As7n;f zz&yhcfOSXo5BpC47U^Q#OfSerAKst0pp@GLwA)CyF7g^y2{6~z(IGzfIoFnw z!XDcg1Og7S|CnoKVRN<}Q>XG$5M5-pRSjXM(mRh@aouXBPlU5J%{8!A7_Zv&8g-`? zVrS4%?IGB>^@yNhqFUUp!_8oqSV4-?`|c^xMko-;P;`3Q;tWM836R^MH+wXS9D@eU zsR5fGJKo+iaQTNa(Z;H8ss6M{X=1oiSd8C-9UX!z-689=-ALK9xm7fD(d4<#T}mN0 zJcizVgj4evGAN;Gm8YR@fqn886Rk1`E7dHD+Lau?2i?#Zw#Sw&0m~45K4P+<6cx|E z^EFE|PrkBfMS&<^IhY^wpE~-0Isk+52G*8Hs3aAZiLPv|2h5Bv0YGfx~O*11yjl6=y0kaxC%7VZ{w?%=6iWTm_s>59gw|XZ&Vf7Ah zjIIhkgDFvAPFljN+0?J)wgcmCJG9&p7?vG{ajU~B<5kZwLA>M|fuO!{6(_u|SOMaN zepQVT1`s^~u>>)rlUMUT7!dsdu>vtOombO=?F;ui1dPgu!eRs)!q7*5N7JEl!9sK> zND30e&$tK}BO4ux0DxI}m*oM3`P~N8Z->Q1NBxP7j&ktV2c{GHPr$6duE+x*{?X84 z3LrUNohF0v90cBWHZ9HIQ(~SIFJ_ASnV75KYnq46nxrALEEG zZD*(XM%}?Gmr|6Cf`V|!DJu50P_JWgyU0!&0@4<(-;5lyK<0b_RTdRb`;9D*#4TTS zBB>Uwjgt`aIw|aA)v5a9XSo@vI~(3wIf03%X$gt(bc|J=yT;{b&icKTo>Sr@e3CdVEL#kQtFoY^zp zO*gL}+Poe;uG!Yo?$dB?JZB#|NKMm_OB9oh#U5qAD5vUvYksaqSFNSE*ax*L{Q?dU zva|VLoPBpxQ%m&jRa8`(6@rwgC^o7Hk(Pj5L8V!)(n}};QX(KtlAxlX5{e>4X(|^R zy_Y~JfzSy>LMLE=Py!(dB#@Bsj^6j)`n`YOT4yquv**kStf_l{``bPGwCrto!HH=@ z%u`?eEZy#{^YP*rK876gy~-w*P?NsswJ!j6w3lDF`te8={gz|WMOn)%e#u0w>TcFqFW5U6k>Zh zD*}|xf!SWBM}S5pp!yj0#et#p@oX_VzE^Q$A;S4^SL^l*9}HM|7zERo^i4iJyFTPz zy7h?kj?V4f!*y1vn9aT#j)gl@BZiu{0LbkY_RRO?8Nyv9nP8e#q2?C;vCIVgOcp8k zHX=G`6{Rr>-GYER<48sOd1m=bmcy)k@N!^VlE%K_B~d%+qQ^eQMBw;uw5}Vdljq(W zl4aD}IY2^l2I!MNWwnSQcF~(~Q06PUq|#%V@uSs;+vi(7k^9ttK20LNqug$dRF{ST z$JP42p#a|nstQ+se>L}tD3fbrcfP=TbWX%u$N2f+U%VuqoBf(lTjkoS4ej9bqkX2m znZCoGFEjYxn$kKXNc~ww`?;YnHMMo4L90J9(j5xLQ+6D7*uC-!OrvSUR|U@(4!iZ@ z`hKh_NX^8gk7%SH9BVILpNC?x=)Z?yD>5D5+4+q&-P}DDKMD~E3X2(F69|61PHPVH z%4coSJ)gC8R(`3KJ?JbK(Tu1GxIS~f>4u5zV2pw&DK}oLDM2d-<}#cdol}6Y9D2@4 z3q4&cT(@H5WPwVhRxQ-syzu;$ER9waF*+B~7WvHkZ&DejdsbLM46q~c5u&lL0C!`KZ$agVj2_@N@qCq?Q0$uXnWTSw3!EaN?RGUxQuXqjsF}Fe}LbDHgw`OsLtb8Ygf@ol=B(o4Qc%$J(yi z51qPCsy@H!dry>DeuH;pm%bgY5pd+2RGwlxfHL3b)ra1{=!2K0@%E%QE-q4KUwG8S z2h*`o9R+9&a&rmDQn_CqB?z(LpZG%)M#GQ6>74-&RXQ81m4vA!vgw^FW~2SLR7qMK zM+frW3nhs1TDd5mHe>dyrC=*CmGcM+5he1-kZ(8|P1rbw4V>)d`#OGrgX!&^?R!QH zMUAkp`#w9gsFg_oikfKAF|_gt-c8-&XN6+&8_Y*jg|4|KHiwA7HD@}Epr#}9O`@?L55UJ(?LYZ00F|(3GcS}O6vE^&HL``h zmgG>Kos;nn4!{(;h%g>$DaLdpZ6`!TMBd_AV0vO-Ehlj8?)W3mDd-CHh3~d{RKuu@ z19l?uX^YF3aDVo>HUr#iitE@@*iqvB^s!F>3xxbN!o zs}wsyl-2h4+6K8DfR?#7@Hj15vkHHlR;d_=9hX4{rGyLR3u;y@9%cNCJ&d2n-tBp? zHbF7zBbh>=x`$&F4@N;CVlR%6Xz#jfy%XhRrOl=D}9Jnbvjp(N`8uMPd0 z!p@}+p9GGGGk?)D#PH!XC)k7WcqUc-HP>_tJNiry^~xRNjB3}xO)YWScK`^E^U>tf z!2fG%2mFnhKuki^X!0;{G!1(-3?UM=-*qm0z|Y3TzNz2dp7&wgiUxAAdtFGQZlMxW)IWsIJqcQgeAefX%%+fC4lYMePb&C^eE>W=>P;sn zDm}a&>4pB&9mM+4i2X>o^E&$GWaYDvgi!#t&F!SHB{rEMpoq$l_?!iWGgoStpK%J_h?~+&izxABV~uP_z!^jyx++UafOgk^Kv)#zlmSB6!dqeX6f1CI4okc{95i% zHJ4NfjWFvvs=fo@WEZ%UeX9pWQKhp_lZ{y(89gSikdk8fKn@iwLR~pY-K`TMvpie+ zO~CAxVCA-^p6i;pFpEpQhw%lJi+^Jz>3@sjhrP2~hQ0Btj%}U{$2K*L7{nGxqAuMq z+n1W#Y8VHg>;Ms^4+7N(56!LQa4%O(s=XZC_B?TK8?VMDd#ba^YHg=i`>v=wmB5b! z=b!3*qIjNOb_-7ruNLyG&t+v7{7Bn~>DvBlsWNy^k2}V(@lL?rvB}K@7VRQD!qYPCNxJU+|rnn`3 zDCSP9>?z)id1JaFU8aqL-Mv1|<@+_ta zm+bO#;m^+}s^a#DaPHQ{I0`KI3ox^VVG$TZo-VKQ^S zdXkg*GNDvEY^Hen7AnM+6qYDY2 zj<)sgck|qRvFxT}=5F7K;nF8yB@hcF!j)-j+&|;IJD^BNd-$m=%|JZ(xUfhoGGl8e zMqeZ*{epo<=q|?q|3=%3(Y0ZZ;k=b-xaU~iG_S162@fjSyabv zhC)Tzl^$rYz0#&Y!B|h_BJxqi>Qd7BPBJ6a1 ziTs=oD*&6Ug+Yg4J3*;#zp2vm0GyQDK`DYdv0+ zljVDonyn@A{Y+DjE%VE$f!VTEj=lBhZe&YVcd2mdJE62RXCmZgrlz33a|K-Vgy@)w z@X@tx2{=yt9S^)Mkj+d#TsT4%k1RfqG$!ZU46eLn+7A{8FEuJ%j0o8c&Eoa$4gVl4 zXmCZmQh1^1k>^SgFW$+x?3yX7@x5^)&L0_PBsx^zH^`BloBFnx-IE&ES5tiDaZf+; zW()jis}b*(I-(M8NCrYj6fUTBC-wqCL*ZsisqHOg$0}Z`4z!d(QCZ>xy63qC&O+49 z1f-XcYx7(?3=RKvMqkb9Ylq*<_362>hEUlI4XFybd^pGs0942nBYa?-S0puzQ^ss_ z+Qlz=RiUFoX1J%!Gs9S)iL%3}g*6$>pvD}r+F#el(7s8Dk96e#J{v@nJ4pL1MUT8f zS<$VsFB?_RiG~VU@X$mN>Q`qNyj5bhDUN<==nRy!<-ll}W4|J@jU!6WgHnqc zuP(z+2!cKC_|#J~D>FsCZ{4VWV}%2mxf~JneL?M2&S_h`;)4B^80fAa8oP$m8uu2J z4kbSq1m)IMq{)n3_3Vsw$9Pzcrk@B7lp~jj=x%Oi$w}Ay6PBBLq_MSe(&9#TQGI?~ zKUIhpXNlTb78Rspb&aR9V)uGl{}t_%#2&_}(w>E4E0T(B%lVBRAYYraSi0b#%RXN} z)^H5j?A`=C@MHRZ<=S@Vnx9{^meNP0gHFA-!)|I{d;GlTE+)QGTMiD=I7Z~dQg~lM zD61h^f}4CX^prPf-D*hZS4_dHOY*`O3JWi^@!x9@F)vC78SwjN?#m1NRKIXl4( zu!TT{)^=>*d~!+3#6%rNL(%tyExrNP#7$mJN3O`I=HYbU=N?(y%4^ae)>&E@NPcRa z<)?oWLyAp|#|))-5QDvYR5Zu{toiXkWKbiTKimptNq|Txt=}bB&PdRj>(}L>fj2Su z$7z1bl9(Z%PqXEyi~qVR=sS_|?%zw1KJ3 zsco7oVzcgg7kW=PovDysN~AZXNrLYw_Ga=%zuFVj--h}(eIa~^>^3Tf^zCwfyZsma zK3MvLyzVBd|5@#$sKI5gB}*{k!;*G$$66Vt9dbiOitRI%pzx39K=!#4PCp}*8+2xb zC2_UiUn3lIJT@n!vIa`iIo^6IN~$^L5YkPL;X9MVe~&F?whBzp>#yrPcFog^$r_4m zo(@x)SP0_;mz7zi>rXYY8DwX`;nA!zzHVmymNX;^(Fl!5snj1J!t(0wm!$+t&5)}l zoM|({XyQx@yqmSA-CY?GxzAD^lHh`P?2yVUL~~VY+o*x@cx!#=RcUgmdR{M7p{)8B z6h*^gyzKTDBtEN?+A;{oz47ciN>PU)d~gJUL@re<-s)vT{K*Vn(Ir{du&km0 z>g5dG-y+G~eQuc$D$9s?rS_{aa4vAmn<+T$8gRy>79!f(=BZs!lJ}RcZ{udJby)KL zhMtVJr0A*fHy5>fP@eCL=0H(PrTvc8QYOSLRIhkr^(!lqwbd=sCmW1pW^Kk%zE~S-A054?PBLG~zT(p$XPUx~EZ)qN zxs%p#2QS&?1!G)+Xj#}vrjMBP2fUo6P*#2Pmk9H*{ckK#bxo<>c2`8{&~ijwq{=9_ z+Q~hyJw&EJc>9Ph_vYeL3EP*&PNO67Is|0O;VcgBP)zj#(e~n@`JI-iI~|6C;lmIf z2{4(2b)>GoD`I9+3b_`J?VPIk>hQ`k3I6(GpQ&+^{T5Sk)qrRC2J+N|5E}bf=4?0h zz!Hcu(vueCdK2Tp87|(|2NB#X)_r&Jj5B`4#L^D}ru)_z)+U^V)?mj*+Jo84h+n!d z8R)lX=JFS~^-($wyn4c!v-fP(11g4jh zK7fhLNrx1inH;l2?aCpJV+Z(Byz?XhBkXenf*oN<)*MdnwhMX0adU~W31$47B{v)MKgLYRPm&u;I%1HB`Vm6Px(jkQB` z#;VRP-O)DKh9#!#%~it6A4cgBZZ|~k&9$hHFOC>WzPYjuhY9v5;O3F8X5>RAP>TG+ zp=h2kfPX~d(~Gd(311_Nz9B-YJqtIYk&TeCeb|mhnN@bT_A9zR|f5HTT;2qpAMV z`}qtRFH7Xl1`r22^l91ILo@GL{%oTK?*X2LcoUG&nWs7!GwripX87n{mv3DTN(}jT z&G2C(%rEjzTHjp`Sbd&;_Opmvm8sm-we;tVb2e+~yR=@v$xZh*B+FgzneZGq)*7PN zC)azK{!1SSbq-klwyO}kN#RR&Pi0S$D)(zCFUiE^uwx0gdB(2aQQ5^mar|vxrR_b~ z&_Qf#e{ERd#p|yBmYBMFU5s<}3p@db?OJjZd0Rbb)lz+W*$!lKK5+e72)xi%6Y1dHKXuEq@hSFUA@971*J-S2TUMPZ8 zVCMA|@e;((iAUltDjGIfeU41HXUrwhiqLT@ zTuulSi23M&CK;M_8lq}7cJIdJP8f$IJ!WU?cE6v^EOilYU-r5Cb57z8?`Ri`^d*g2 zvGPlAdo;RwCLgTkXB-2tFi?&Q1D;JnzXlytrtUsJjb#0^VS+x=0V_eA-PWlax%5-~ zN=ThY7jIAfZC|J7{=7x7`j@-d-L6436>jAd&S?Wb3J?LRJ$l#X>Zj=)+we4-Ujh|h=>FikirJ#f4)%7W>b}_D^WZxvz)Rt*>T{dw zLv2Z$kss~f!}g*pJKpcB=dB(m^EVhrn2R^WHI=O7*%N%_rRJ`$ICS_88yA^_T^*Y5 z2Lc7mq+`olv18G(WZes@zT1GkE?bDhQk=UBu1&PLMBSePsP;_AR{>LH1XY=^5-{up zbjoH}bJ;j8ptTYmRxFL}FwE2a zz-*2L&79*3eL+-(nSA7l@WFSw#WN#vAHmjKNs-j&v$LcV%Dm} ztg5wyZIOJLv%Y8Jx*4gyFU`K~;H`n|0XRWtIDs{*+QlUde_yS-jNnr}*0EuAfV+UEM9-s|5`C4}gs z?}f^14!)iC)&^CITKY*E}%@^kNb2Cb;Z-#ay z?V&-|ru&ux1HZJ%C}6r(%G8ph#4gL|MW;u0leLLO`xy@;g1NVZYc+0Kn89DVwb zjf!aMRjy&hs3OPWZX-8Y^;oHBh+ap(wvg*T$v=fRQIq9{lP9Iya#;eiC_QxvEw=)} z%5j*$(7sQC=fMnUcVh6KE$n=#0)#)fxzpj}t{MZeM^BHybR`^HC+pVy>{a6s_5 z;k$7p9iS(c1)r2;RBzc$4%8}z*YKCM&1(4hN`unJdMa6LV&E}{O8dI@fBmW-1JoG- zcaI~sETcYTpyld(^>We_VRC{#2Ptq2@E3)z&&|Df5Kc$=-FF9GlRSWH0%wGPMCg;>+THmp7g@xD+wWk}YJ?k}ccYmXPjYxc2A48!xC z%LwO{^NTB-R(>twHF*;+1ts}auT!d(Fx%B_h355om0q~A` zi&`ltg?G;e`Cdh|aK9=X)vHQ2Xt_qj`B;vvpdH+T<{c@5CBa!p%5ZVek z^U~^9u3;)JMbqO+W1U-A-3}teS=E$VA@0f*KiIz*rpDhQfobVdDrPL}?X3@DrU_Q_ zVwEYiJul_ztvasvcn`!AXI0UqJ)_YGk_~LWy9PNKIRjae_t|^z)A*|evIwBtKE>%d ze_S=d!zgeYe=|xnGN^4)rpRO@#AJPWNoEFd|9!oXr$>tB=Vx2y?XbU>2>r&v0J{(Okv}}Zkz$@;Rq;2FlL}8b!Z7V8!#^bO9AWS%7v5)`yqzHY zNw$qEN|#3aKIMqQFeF-_Rvjr=1_D^e|4j4~5;G#eR6e5t=;l8}zMSB7(H#i!!mBEj z=xHp**v<d_hQz2Rw?>b243KjliB+kIEz=)-~z!5(Uf zNuVSUpcOwQ%7#}FJyBD5AF>1Rv25q5F@#nE>Zyh0di<)TF{6%esAWBG7siL3)Ak0* zv?5lTdeY~(r?y2RtX$AlC{{DtAGX$gVv*i4#&DM-|23BdZ}V7g{X_TgP^nz`(p>-j zWU&RA&V*Ix$og8wgGi@3#-m7ZB?BEP5wot))Fd#b@SGUuxBTexrUUCnZf|)pfvaaY zP4(pP@8t9-&IUAN580GIC)shVr;!OkiBK2YBVHi#(d4VTpWqv$Mel~KqL{D$hy#Na zol@k95fmVzP81%%5~RW`0i$ab;Uv4gj#mGV#gPAb59&=4et~6 zuV3Vj5eB`svzx-m(0r&@1`So<$gm7+N}M+&eW0633(CV}>0cb<6%!HdH~{B3u4#)5 z98yD?0-$JR2LRFx_{4=MX6a4QViLdLmiOTT$neRb{NLGI%)!n5BVl_`FK!Qo zC@`?W!J8-!s_lfsy8gsv+)Hb+m0tz_!qBOD;#U5$Q*|E<3j5*9gTGgQ$>MsR=vl%a z?^()zak&s6Dk!XdC%NLm47{oD8+ExbUh-EhRMZ76?^9lXdG5^E*pmY+R$r4epl;j@ z^Wp%!3&$NPzAOn~L98VVIJHOYW*l?UUIjxkKW}eDKcz34h~RR;d!R93t*A1M}905=~A={+tDq?R6-=}3r>=enF-4nR&B%(dCl-L+^tL^S7{ib ze|dH^if_b}+kby)AuM~g@lab}Qu@1xmRruuiR6!9>dN2hyp_vb+gyEDyGaIW;K2l? z@3=$({3y-dnD>%URnNdVF!BE?ADwI~*V0hjJoze^qoBGLt6$?C00D zKAzp2P`O|5^?SPhKWZ}BI?p5a4ef1r65U)vFPj!YURz86D@Cc3{8-V9k&0Q`A?6g4 z(iiM(DGAVz-6L09hLLwPYMKOS6z=l2(C2l@phd&CUWpx|4eUNeUu>(d)^tZ5G+Rom zo6E(Sh@Xnq_{nKYXggYgsIaB8yU%aBeyXRZt5`+AMy?9FSy4M#h#R!Majljs{yl9F zPo$L)%}T|A$zK;F-QMGBqc(LnrIsp2^R8YV(Mt}}Hy4jgcLDpp7sz1RKZsR$&vgz}PPd+2UM5`g z;a)N(T#(I{;N??nCKo>iZLND;=itv3o1Wai7U>VSa%gW zBPQ2M_P(1&%!EUn1Vg950tyK9g^8dU`dMi~ZElCh#5wKL zY88Sr-u1)WEKxqPb~3l+H@jcyhJqEPa7k&BsQWjvA}fr~JYbDV9uW80onJl7l`tB^ zV?$A?s7j?+p=kEtN&h4IcPXL)BK9dGm&2L zPWK%Y^*9wB<2|<3LSWZZ@za7_{zj$s-?^aLXkPhlVkBv9on#!gNN%X3TGd#hd37uDdGCn?4sSMc`AmZ;JP_ zZ~VSr{Tvl&NK#XRRLqcD0^&bz(OQOdUTL|tv?=NX4zL=oo)j(HGJlyUE!GKipqmCn z)OQs?*@ohKzmRA2B}*16%j5Fp>56Om$7|AxxKk@LpOWmoABHf|MjbnxQsGh_D9-4D3}X>SkFZXtysZC zSG-}iRfT-Ds%^gKw1DI5v>8KB1a4Uh)T*-3UesuZWs$kH{c~$CGFXeFf^j}3Iz_7K zZ>``P7LLJ_7LM}k4egyTUeQgI3%YevssCLUQmOMY&VW(viG+|-BrxfVK}EOPpth?D zJm6FrK15~1L&#ftWIbYwN$FjPA8~;cE90tTT(=2~$@sAk=y6c)GfkLZqaOMHUV6lo zwaR~5!&mohsjWWU!tH=20Lx4Qu*?_$%ZvfKtjYp9ycL5w4zmTsKoul$VixZw*j-Y* zC0|rY7Rn58)Jh%`3b^4X5lX&T=S~S)#<^1n&0i~P^pBr`eO0BcuC4#YC@B^iu^tO)Pvnc-!EID$C1&xuQYsSPnR4U{hc)H(C&Fu8hC)ng zIH7>c^8Mf03N9x+9(W@HFLzUSQ*f@Z*NR-6nd`sJRDKc0iZIEOROj1@8O;?y&XO2f@h* z(Rv7`~yQpe-ZGeRFx+s$<;uPa1f#jA!E_EFyro7*pyp$-}^mkRcP3J>OoDgpGSI`Tj7 z%Rv^?;#3(1vrj_Zhhe^fiW!Dp`idpNNs-of6CE&j`D!mwe3XKxMzdo?*@19A{6HXY z@qGPd`=zn=`m|0@=ai09U|G=4T)VA<3j9mwZ~fRhtigTe&mfB+|P%)q+S!-;1#80309$EBOLF*yr`B`VV&M zg^%R5Gr%kjK!@QG>bo?HhibQ-6vi*)rDjdzkHhemq*eJV>TSf;zW$6Nm!tHZM6ATS ztZ4`=YG7IohL?F9sMbbo0Ek~dI_xjb9j|Wv?YU#;9C?OzzA`*;_8KHDcYOBoA)K=| zMFbU+QROOFIR?N2`ugRPT$-h{&uBQEirB{(@q7a~V3+^QP&p3jH0;zTukRx)d*|pn z{3an8P0lU+OnmN=KM{NY=)*dTqBq9;yRVy^@xhNQ9>p%E<&U$j6_NEG&rV72gb)E| zeqD7Ithxhyf0jF9l=TH0rUDw`AmwLncm>K8;C|7FuN~Iq(iZQ6M{UyPch+h1N?ib2 zk!P}JeGA(MA?fCK0k?gdFS&^1g+;rbFFydXk>*@f*`vurKBqj+{DWDNiNB8=Is?#? z_y=EU!Et+PWi?f;oVq&)hf)$#)W>l*3-zb!6j1*htqoMByaPP4Tkbz&ub1pH6%U_N z?Im&K8K^i}q_(Bt3uI7GRb0|gUq|N@P#TL+twW2Ay-~GES`B+f)sGtKrVO^GB2$nH zWvC#Y)*au^h>$L%j_cW1MEl8NQ_} zwx&R=$pc(%d}`PGvaR&%fAFTakE@D@j^oV(Ka%ZM>1UsE!x7ZJNt>_Y%a=4B$F#uXkCrK zYm4#>NcWC=Uq~pQ9r{$VbHo}=KHo{VlbEAU0gpv)YHvJ}S}z)ksLi{=DbfZgdT}UU z@r^@mg#B)=drH)WM*aY9z)`d8CA-d4=F}%;h*m9{`=Q#8zt)(pa?I5cri@?u3Q;7l za~C4Dfty=;;Ku)ZS;sjmnW!b}gF59g?hEWVnBrH-jx*?>rxh4gwVT5b?!d)!Dl;S+Et zg~V!D$^-uRTP&TW$jz{ywLM&Cw0yaNmhEvF<%HN{ZN_45*?V-n#U7E4&F5+M+IW8~ zB^h|+Kkcy<$|(OW0K_G?ghswS_4#R__28o`$)GjwX`GFaTEru;qV7V zoSz1c500y9CZrr{Gu=0nvn$+kA3O69P5<<8_>CgYJ7@a2#>qR+>b~wOxwUiT>{Fk2 z23j|c%lyAm)Evs>FHa}k$LF3xrCl9cMQQg>7o{aN_}$xywb@6zFQw?){xt5rO)HW= z2f8EgHlBSX{P0zBjpL}S%%pfl22|Q5acg^*_t-+Jlp^^>dcG6yaj?$)2S6mA2V?D* zT`v+xV7E5XZ9`n!Q!!&{YIykfN!RzBOb$fFY%c6GHe^}Yg+%`87uJ&syXOV&THXQl z!La)gcHUV4!ApiU z-Y2FUZR^}W_^A)Tk9hC6 zj79>0oC>^u8s;&_4vbQx7%~Iz`@uXi={h(y#Xn!~|EVP1MiBko$^GFTJzXo*E*iS$ zzwi`@?y76WWzh}f z+E;!GbCsv{c@E-~zh^QoH|C{JwpzAnkcnnVqv-brr+euSSyh{$a zbM9WR$=_Zg9i_{$otw7%08*Ia+r6doKP9k1BADo#qqy-cYaynD^s+U;mYwp4+)B9( zwzdFGBwgske*tdzqjb$7uwB?kU3$M6t$q}mL10?7OY8yHuYam*wrw+M8nbwGcuQ?3 zN{1`jqk(T-GI;iDqR6tQj z2=0;~X}0H66nrbKS<-%Z{-C0V|Jo<6nv>J>tK=MZH{?uLY&+y^d|Mcqu3vg*+#wM# zS)MoT;eABpT|{7?%oJjmh2LaM6WK2#UNbhY;W|^x;%TSv5JFr@7lX z=%h2DO`hZbIG*$YBF0z57rAPDu4qFGoMY#n{fvgj+;K~1XKG6}M!xCxARB((Uzc^$+3k1%@`Ak4)apXv#Ulx_X_WB1x;*~1R<$U+;Ay4h^KK0NariD-$)fNua9nv)xRRD; z0QBgL497E|A*(yMW#QNUC{2$u5x*Nmj!7Kh5h&x|hdyL%{T_2_^e&`p{SoZw(15Sg z9iV|z)Wga^b7qymK_?fASwhMEfYO!wGZcO&dh0KX^~<@+DW9r-^-yNW*pvO8!j>nKHIBG4`HPu;rlEzj`kO~yA* zpcY|$z4mvTXH@B1p?C6YxE%p3Bjo9JL6;ygD}wsy&lAu;104YjbikJ}4P*jqK?J@v z|MZ%^_=uIAP5cZG2Z--LmGt-he_D*y`|~RcMgP>#jhr*t211ex$T73W511-jxc($e@+EpYqra|38EKRsLerjLfi8`Sw01(Zf9QH&4j#&#{s1Hje%B z!<6{PGo1pDEKbDh;`)4Kin{S--dQ8MMdC_<{hDl?yerfoBsXV-wYk^C3PG|Ex%b{OU<@ z4XIS!OIS|(j%DRI+mpKzgsw2zXW1E6@yp)#yQEaKN^IViE_L^3I3P$fw8x2C$XRC-u~exKM=06F*d`SAMvR!tK?Xc;0dR{X7g-;hOqy!xi! zNtx_2)idOH`;6Fog#OsHQm`2^q^D@VHdKDHP=beJ;A}X|Ff8}jT>RZUqqz95;NR*1 zxOVeNXvAz!CXxX)hxoY+Q5Z*g;LfMR`)nMWGur}A2b(0rijNkhABzfbwhjn3%e3P< ze25%{9&=h2Zhy*7nYp@oB_L-@VKZiCEvtuI-{^_yNi))$t0)Lc*?!@k|MeEaW{GO< zoa~UDuL2Vzz5vrr_55aGG{oh(@ConY^4&wf?rnW=p#BJ{K3|iG*(^+Vei*Et_eA~{ zmdzo<59Y%k#(Vmndr0^mcvfP+^ZJ?)%XIJr^83R~^dr84jHkw9u-`lNR;~Eb;Lj4@ z0c*!Ifq3m15*L(67q2ZGWa}$)_}8Y0?tF6qjOTPHJ;F;VqKr35G1qz+Z-sdjHTrcx z8qIGBSVnZLW5*-T7)=BC;t$1&OFLo_7h2j49Y)$ajc7AJexRQ)t%8U~+RBGw%$PnP zwvqY=J6mvU8ajnwHD(ga_FJmAGZ5y0E9 zU4UY-i)RF&_yc}4+XpCCxOjpgwq@}V)&Z=@<>l9(_>-P}=tAop-d~^cAAvuDCRIVo zqjyEKdHZv6fS`q|0B08i;Owfgyk!d{Q98gdL-zp0@_<+#5Ce`Uf;P39_}jKX5~WuH z;>sfwUddZDXvl+4oCO0DIc8ArtKpQ9#QLPM#RDA>8@o!0&V(VPzF*IdfGS!JstHXtGfSfR<+A~rC-^6 zrONQEuu}sBs!>7EhaCZC5lSW)*cZh56D5Gvjax;H2G02N97GwAKrJ$7m4Ot+5HXHn zh(z7ed)|Lr@3{-e30?+r`UFI-+pFB_4T!;j7z~JC0peFKpe&a%Ac0!2z|&YjtO5M! zL_iz|h~r%T4;xyG$T?*oMKMf(r%hh_>m~LE=mEhF!2p*}wjZd)4iMV`Vmm-=2Rxk$ zJe>*$mY&zD8kk>$?~;EF9>H%w0Gc)k{w#31J(p>rjv;E;0txer4~Y4@vNsHKayAU{ zX91G8bH7R65SMI$BuY8$4OQX)zB+&_PkM^;`(4b+QqcGo?lDGBNu#i1?P;BB=nZuZ42|?B-fW!q`C$pI;6VtEdZT*VEJKoJ0UFaWnhhzQ;%BLL4^0oxt9=3K+gr` z*>ovPz%Y;(0p(vn-fSfrNE@=DM%zRX$9k=L&^bBj{MXYme+AWZhPU=KL}rBSnK$2& zlLOg(1P|H&qZVR}IP!DUL7TE8Swoa;9LlC{!tbrrp6)>?gOqXQ&LG@`bJ<34q|2J* z^ZtIj15wjshm2zorl2UqU7*5UI0%P=mtE$F;VUlzgRTY0wL2K__BE~Oq}&zzP6P_5 z84c8wa{=M5-W~{ZdO3OW992IEJ=W~W@IBlzubdLVY+~A}L@9?@HX*8k>eX!yGWD}A z!%tW_DAxwGo3+DFNLV-!<|jW`%^u(X-mcuo{!Fg(zY^UnMRVyYLH<$a>uR-~I<s1*S9t)!^ znIFJ#37;~qc_XT(>%OlkG*y8q>+W13wnW$qk6>Rw5x;f!fkxX*Y$M81?uk2LwfjVN z3j_#AU-=m$Nq$`-_%(LNi5x{&#ksqexrYj-$E=NG=%0~#L7cEHQZoD>C;hPNRk-u4 zk}96DUlu%xBox;Aeb16%Am>vT4F6CMBiTx^3miu&$0NM(?S{4j^8$%T-d`=YF9NTQ zQc<6h;g$eUZ@x7Uql54j>uq%s){2$`V`A@z;7QOBE~b7S}JWIyZ5d1xR5b z2LWn#A6(f>+cRs%%{9{^OeUttpRFt}(HJ`ZJeg4Wjz-w3J6Pj&G#hbNxjd(BZ14nW zDsu%j!(F}P3hR*>5+h%~jcN5w*Ektp=yFQ^{C>T3sjK zjR-aCsp*bLQRf>=;9}T4N`W7W-X^EZz%xXPlPxp9KIasbh@02wY7c8%zbVe_qxyF2X-L>MqwYfTD|$&w}kzEc~G(J8F%#)`2WYO)31+PdD@tC(-S1Dc|AQQA3j(KLcEKY4sx z8qd#nldjZ$7Vz9qdmy_1Z9r&!5UoKyO0YBP=rA__HxvAB`V*#fr6Fg}=`8J+!KB-N zue3*)hr(=`)_!G$H|%;j3Q1_!Fw0LbbcZDHsQX`6=A8Qxk8Foz^Ihn7Rw2rpKNcV= zd0?M|^q6->+GlN@LXcseiTG8ymiP)C$Ae#x3$8kj>(gQDWi5=?YLw2s0Oyor(i1C8 ztV&s?)v3gmMON*PZr1A_lZ%y)C)-l2$W`jTP7RR;j*tJS)g;?GU${3WQ%uu5w-W*5 zB_CC>zcn&S`wGnVg9%rxsmA%7XDQWG#4USwN#D*9&!;~2)(3sUaqm_(Z*S>6n5q13 zZIP+^FJc(7*ZbM*$L<|YJHx!5*8Zmvle#BS@s`qgr-$)EeY!C_P8auXdh_-dYA0Ze z({s9UT=n!Hm6`NED>M^~vUi~W@Gg|zG6cPwod}9#Bnm@A{|>P(e^p2+~wg zR0vh+MMdC4nu>I!ihz^|2%#iFML|gb0cp|%1XMbN5=tV3&>lskUE zbMHC#zwSM2&7Sw&)3Vo|ne5qbd7d4ZqiedjblXE|$Bk**$23q-nrf}CopW}meQqZKtW1|47?vj4T2OiN(O zR_8f^!+LVjr)K9i1;JAWoQ(b>SoABI|8G@e%7BN_e-yj(OI2*Chv&WA)k-I9hsy-| z#%|TpJz=iYtwrE9rGA@~@rp3oJoUgDwNVZ^9pL-5{?A8v>QTYjca`{~>a(D5#2Zns zpZqOf!3(MDl|doc(*c1W?TZ>6uaICt&7~w5rc^;UWwJFFq!>A8y%G8{@*>wzgP zV0#zkzp5TMbS~n&l9q3=H^O!}wteW+@@QI6*Vy{-=`P@MbAsLNdp12=NpdSTbl=SU zBvyU>xWd)?{2E~ozl$6rBo+1KIzQ#1!qR6r`h~6my^l)*Vx=japZDy-#yz%eNDa>@ zsIo-;$%8gG!K$ja$u_N|KLTs7N)=q!16-FCzGlz|qHOfrqsA(1F+P%&wLZ>(!(doYhM^@Kl1f0y)){3TUuy2;J^~v^M|4OPzR|bhrnlxW}_U~=Ov2p(s!yx zs%TIrL#nG)i-XdI?*ua4vU)xOAuByMPQm-}fut*hEED6{$+REcF7;v;p z>S(l5=WwM7r4jsI@DT}1k6N!RxBM8&&A7hs^82hJTlpnT=j7JRU3IMQETi@#@dGmo zSUD}=<62T6bNF@Z-h*1W)2Bq3(>ZO?)L)I%c?n``$su?EN->6|nF4=>3U!-B7>mr< zu*+HAmjtXCe9fErK9g=|mX{!!TSo62WtwykE#?AT2EU)ir{?}Lv6Ytus)y7UESQ*0g|0=hVL+&WEWljz zc334ReSx@D8N}gxh-I@fmY}xNz3S@ZJW%PLbLZ}2F~+5 ztih~_CvZOobMA?}C#hh#qyVnfz|Hcg71*|ro7ou6AX;;`u9#J=`bb)B6_5vArSm}@ zoq`jH&d&S@aCPYMfFh3?Zy56e^9jX|`wIX+=_4$U8mtW1?GJpilzq@wTUAv+9dPzR zz=Gw{_0#G>B@gVlB$H>wh)l;JD=~-N&qoBZ#*#;l9xGx_uZst3ZuUZ(qO zV4YH(q*yA<9#HeM^#zA!xa69g?Q3E09lsUrC2Dk%){tFtbcEJW-U_j@>!@JNqt(iL zWk@<^+~b22)TW~$@mkAPQPj?Zd&X>atg#78X^3`^tgCiV5V^&d4UsCjHfH;}D2T0U zp6q4d9yHc((-V_h4bJ^f?d-;F%050UWWsEDX0Lf%ZpKu6cx&Pz)!(A51RLz8HXmJv zcx(-&Omnu(2tTnaqt-ntzPp+%wa>-5mpaMCOYuJ9SMw=RbGg7|SD3%KS;P6U=CYs| z?R#1>UdLTxM3GJKG_NZKr1N&bv5fe3(YJA!43`m5=x`r+wdRztUv%h+Ife*OucBK5jh9zZJI# z&-jKd0fUZyvusJbB>=bt-j*qyC{5+~SkbckQHf^9h`=aviP>Kgh>=SatbVN$`V!W9 zTMNjK9jiHbhOrQY^HSN42JOp^a-287V#CYCD5o;$#r!Q^!l8H9L*R2(tD$m}ft5fL;4<|nj{5R#~TAf}vh}UWs@!rrk)GXkG3_#+mmCo7h znikdv0}>x%0`2yl96X~I8m;^HMjuynD3GsP6N>ybESGBSov&~lD=7=_`#ceLt8Ppa zPALF_T4bE}Rdc&*4sIl_Jptz$F{+{+Vipwu2)S9NYH_+Q(%F6Z?XG`ireCCkI*HlL z2uy*%nLC3?nGpESUtx1ead+1N7>`abed2k}sT-6dp7FKs^R+!Mbin;kL2^OdzIlho zmAxW-(MkjJ*5&4XcT%{$nrIo+LxOP7Z@KSgLSo0N<(JE?O{fr5=OlJ%DeD@?OV*yK z=MtcXTm>I9*QWpMm!?`+a+kf&Cu@Dm!Zjw^BL(6slU-~FoiaGf`8LvGE0bHb2c1Ne ztdK!4mnat%*{%|TIzJk_x^*doa}+!OuOKaMWqC*+KiFTfJ)O!Cg(>n-o)6C|)L&Ig ztQ6&mEZ}h&l1<~hh2+_|xPLhFz<98Urp)3is@r~I3k45GbtKfnFn(3pilK7v0xdp0 z-v6RmNqGRb-<`T^(_039vgN)kG+DWl(+TbP@G%!6uo3>8CErqdJ$x%6yX?&;=PXf? zuVhc_H&2{DkVQ0{Cdq~^es=}pFduhQzUD8_J7|ldcsz``N2R^F6*oJ3sft}mc`F`% z7?ojJTzOBUA~H41>#7pR*swRZ-S9{?D1I+$DIWe2C&{`}ZL%%0syD=FnduSl;vaEM z4h_Fm{p{dh;$sFpp{3r2>j%k#2A3QV@ZC~9OKClqeo3Z8%yIWek<4K}zz!Ni)tdXA zSylipuj0)MIkaU&KiQ*l!-JQ0l0t@v2#-u8E7W+fWL-<0JmS+GVU{;7Ist^Q7a2S$ zNy%ZBWAc5)G9v{ktuR+Vf(T116^l$cm+@~n$^;rI zLxI;KL&Gm+R{qD|g)jS6)tl^*s;`KKbTJZunj>p*=B})xZ|H{dY9wNt~qo zz2uI+(Uj$NO8wHmg|YcYoaa^rYLnjpXWr&tc@ZAeBJ9#YKdck@?P!(tRUf;&%Y3o zIm!)Rr=FBJHYhjT1A5#%-R^SoZ&wwWwK^SNonC0=xcEWA!&QW(${ce3(Iu?yR(^6ax_?S+2$#Uk?ObL#aq`wYngHs}QWL z#kDjiQ8Nxx;M&TQX+5%FWWw4miVy%VI)=yEB@OuoPXNLDo2K0o+RX3d^hTxWBk<}^ z@ix(0KAmF~>ASIrlAUAvIR1n7CEF}?Bj$}KxK=N=h^&TtsPYpFmrbfm8}X_L@mMRL zaI+Z>$O&p(GoGv8flYjHQ>k|js&Lr%pD3$OK~jB7ZY@dEpONcuEHYadKvxKr{!kJruvtK<{6CctMmC4g$7QL$^MG<2{ zEWO)E>C<{+a+*4F>qhNC2mTXxtTXP{4;X4-Y(v{utNNh2?(I-rxlLTKMy%#?yjHv8 zt9{!ESGm-a!ak~6_RDRfv{Ea*yKXt%F__Q7ZJ=3BMIq3rb`GA?m*Rd|mZ47tV> zzQB%%u(vzDrnW1)sdm$PQ_XPZ0ELJE!Z(Expv~DRK?4h|N#$JMt=XJ+2-x}&-?hBF zMPu&IbH}e7T(YA6i5^*p^)r5miba*|C^j)JfOihstqsX9yYqYjUe2ukI8v6=H2^dY zFqbf2191 zC&tu%p@4>c!E(Z2HvZCBv61GLX^2QG_-xv2J8sym4>v5kZUKaOhLYox()Tif3uc}Y z3w@q@CGiS58KNLdtKN3PZf%r`aVlPD^gG2{4Kn+g@Okjj#@anvZ z(B;XWSD#xE6#*>aCTPb6 zy}Yd~0B%7hrCEiMqv7{@hV;_dbT`%MoC&=$s2MbSQZ%(>#j2n|G%a%npH3Hkj$$#o5Ee3>?-#e1Lt>=&pL%P&F z7mJ=i6P4g|_%yA`j9rdT82knq+*QD+UoaE zj1GXIHFu+(vF~CpQEkz(o4(il6niPD7t7m9FCM|&sv-`pw(T6Ngr8|yG36TanLS)Q z8`+0-ApL|-v!s^+{|?Jgs|;o9{dLiIa1*SOy-?@jMSnup*m8EQ78TH)t%GqFU}46E z`)+a7^~q^*yG8Liv2(HR+9n0|fe%kHg+C4lCN=?dy0O(vz{h!XP+A|P-vM`T~{ zZ&o`&XUS}+TH5E|mUH2^I^2937F(g=e!T+V`7a7wexqAHlfQD(0>T}m0RT9mAOLR% z3E0yC>I-W31@Qcdn_Q%lTh?8|!x5YOBs{>*#B(l(?q4^z|CR2)CAet^`0GL%!lzj{ z;G_fKq!WT*Y=j30YvPG!XqGuLCd>M=Gh-bY2;U@_`zE5i<8(tSuuG)Ek%6t~0SA*X zC99K2MQfOhwOnwh^^i}nSidZcIO;~z05I<0o;d`1*(tn`vMzGRo(m7fM)8q$5Zj+N z*p;w?-e`t*jU$75r-E3>!&+3U6>0DQwiRO>8OF7J*`hElY|!p%ZQsn~H&Dau?H_1iPk}~dWBirkT?$*dDA`Tu$|KYd7 zA1~0S>n`h^=c1-BsVr@yD0|N#drt5wd&P)b=tcvPwbPQHay+k_L-utn+bI7O?-$6O z#DzRfDpk6~YHTB}6ZfJ@Gc*n^drs{|M02bLDSCh7A7k{8$%mZZ7}@d7Lw{}SfU1a0 zLC0Z|`oJ!4xcnzdS!!&d%Ws1RS2vb75+{Zhf;(&GY-TWDb`)in)9CKr0^puI?PR>4 znOs~Jk6$kO^?nn@nm0G;Nh7Q{E|bt6vDH(U`5pU zrl1aAs_wb1&e+ZfRV3~I#Q7}U-1b&(;DkWp!=gVCu4=3Hn+*QM^-Rh}_~T_eLcXIv z(I0hY88g~77T(^}DrN@D^1sL!v;7(5?RS`h>1Io#C;}T&)o0VHwskC(iG4hphXYFd zr9&@o5M+N42en3XZbNX3g3|m~Gfy@7KkA&e!aqGuyg(A%0wsMx2L?Pu_1vY3iHAOM zy%eIQ$)C^5J(_=Ba>~RR{cgSggn7ll2_XL5<3$9k?ap3lre}S*A`mv31&sGcsgna` zekZp7JbOgyGUonEE*BVKbDvde!u_>dO+^L7FpqIkm=^X{!_2Xfa`fj>%_;ON$^{XW0NhENcARWzWbaj!^7 zG<1?ABK&=lmD@Lia0jj8uJF5xv0j@0P3MiqroN%(eGz^Cq!vuO!UoenoO#BtR=s8R zP{4|)ILC?70?kjR08_~=)FA7aB{~AJ)R30)Ep3&u`D84fR#yeZ@5)-IiK_hePa3Eu zd`olus&@_i=S<|K0~FtmD<~?Wzd!IRdGl%xfp!bES$Z?Q{+jN3K3Y69Ja#fAzT%Xt zTI+wV5FQ(qEi9^C^{{P^Yee17qy|WTBaA%ApiPKwx8LzmOp$`ve>A$9ne0+U`?eb! z)hde?0HAzPT-t)4`m#^mmn(O_4jw@R)s#Nz9x+(Q^b^BGdccD8JUnnt+Ld~}Z_GGy z8aki}L9LC|M>=Yu_*hvWnvVMi8Dg?pYVLn1Lk&8|<~KoOhEf3Ll6IY;_z?JpvkXL=QAfxAEJY$E@9#BBnWpuNUEhc{Wi}ifX11tOLGinP)Q*Z1OTxOq#GrJB{Q8xir8#k@ z1DcO-c~Kd28#2*idt{ClU%=XRjRFQT&ldqC5lm=m{*Y`}YZUMhw;U~_ronuz z9;kFekYp)rs_#mo=6>z$#p*diOO01I$7zC>DYosG@%S+^5?0}|?@y63{5u(P91ppW zyYEkE7#rJ2cJ6hPYyIN%soK!}I%H&^AYSRvMxww<_8z^t$yD=Ie!f;$hgtiXS3&iK znq9M7j#`<%NOwZLgVr*@{~^2kgL+*;h3le8lb+2VuiK5XCT}X)HpIo-D_;kl)f}DP z2A~pI`wlpU6IoWKd2C)3NMusyl{ih2=~191;Ooy5ne_*?>*nI!F0X?mq7~+zZr*)4jjfC%Qm0v$?lnRhdRI6 zyYH8xW-smi+`R$0ITQiF1FSbosmi2{TYWN_pC+}-Dd=auO}mv+c88LZgM5Tdy=ki{ zGJ8FdCCgYHsE@}V!m$#UEVMMO7g{465uzTP^K?0`bruZ$kwn2if48Oc^7R{PS$+Qk zLkX5~8SkbZEGsfwzj7}qBtuwr&!4LUTMBomGNI&*X}aow?As-!hhsuZxEdn# zOO;M|wbY-cz$y5O5aF|^*4a~U!hKz(kGCw56kL2@M3EcACF9>Aj}S=SF{$C!BzoHJ z4WB?`73Nn5d$^unXngTht(@kv#p$`n#)I&jCF)@7etr3kdfUO4$2X&EvD&)^tlHf=Zt29&d>2OZKK2t5OV~@zb=9qKj zs?QEl28Y#%4D_?qQu&Zpe9MY;42b%4k*mJvRJm+1nN(z~Vdhtwc-I9;)C zkaRyW=d-Tef0^udJgb8LKC;b#JJ}Q+5AQ zE0z^d?SUx!{X8BI&eF@y$AX+XyybP@`U~@XHS>IWEuYoIAaotbdfNArG+c zE@v3U&zVn_SWC7~Sg1$7|8|_SPCdD|dKOthJ~yglY#42Mwl})MdwR$H^G4dkW&E?B z>`|@Io{!ZRsw}1X1oeL>(Yq^{tK5#Vk6DRuxRbAg7GD6FyaaGL+a2GDtIm788vE~N1 z~t42lMlKRc&|;2qo8y)>%=~1TE%_B%%W9^3r9>I$ zeCscmtp<)Uca49-u^ZdTA|x+OGUyshZ3PoL!BdsTJsv(0eKqc?=M z$@7*`?Z5PBTXWEobnvL2Yg@VK%A(LR6=PrqbGK-{d;rqcBq4UsZ@3BI%j&)UWQO*5 z_#O0IwkPS9s)H`ZcNO$WnY3ODryt!sPsiiy_k(9yCiT8J19|aMNsnw%i>o@JCCewV z;-3e!+cX?E#+)gS-8AArMdvqcLN^d-_cF&t8|3W+VRmR&kmOs1c~X!oRz(T6JQga2 zV)m6`)$!EQ{w(kxdh(atdY-eKLz;|LCq7-pNBnz6Xz62LPZ^EKELFrW7eIJurI}SK zVu_(K1gh=xy4XJEVUJ&grdPKvl5XYVlPPt1#|sBE5BcgNECGVcZ**}UNyfxRxUXnp zQ-6#ScV$Q12oMa0OKRcCcX zQ9#$U=hMoaw4IreHVHwJRi}gp7_`H?mGG5ljn$wHVRceBtvZ{6AMWkV9~u6M=~X$q z{tovV=I(NiK!Frz8`pzSV*x%<&&M;o*nLag+>H*a1TxuXIBQfRwh|)l>}KU3%+S4O z{uId;L((c}-w|kz@LRea0 zriH_)6^Ee)-@$#Gv6IdcdCykbe-#!rfkrP%D;A!j%a-yElx{!0Ft}=nAI;Cki56)R z5%Q1IE6?{4aWs4sM$*guW@;NBYMVpN*s2 zKK`U_n9$js$jYx6LY^u;U=;2|ST@zAhh(fc{mAu(Ud{4w2*`XaLr68xFok6qW zIGcIK)AipL05+|3KD;O(wQ^jGi~Py`p>ZeL*P7P#=y!x~2l`q*>cfVqx~bV#)~+15 z!~TRhPRg%)A?e)xJ`(s+Dpfw5bn26&2@HBFdVAWSJ$B$FnP>2~j#|031$04p0Gq4Y zy&LsO>FiL^xj*AvLq%v&&P9L8=^5dCC+sDvvfH zFG7B4entLb+7$=AgvrpNWh>-s&PdF6!WT^3{SICaS76`lW;GU?Z8f@{LatJTZF_`e4tbb z=@wIe1KMZ8tR!#5BhXV44YG?eOnsAJ)h~ozo6@BBrgOM^F)8nsnK4gWKIgjbK znj_E-l3H9|R2RRk2%QhF!MJ_+WbhX-F?m?f*1AmTctJdnkEXrb{(Vh*yAzuBTy$|mWJp|k)M(oseRFQN^fQQqc;D)i zxC4F4!d+JdFtd^9y+>xt>-a#uoY!#zqqp3>kR)Ny=k*|7L&x039o%8DP1Ci`{t5XNUvK^;1GdCbFCh@?8$BBmcP6f#r12bN zZ4%8(w7^3DY-(E7L;qY6+#6cpdc1(sr5fpACo?JrL(5Dvq-m?)`)tosGlG>75i=SC z4NK>#DSXe?ncIP|T>|UdeQGj+QM~e_y~6gH9M$z&0QQE(GArdS^}{<`xvT4s?X6?; znNG?1pWWq5{8Jt-h3O%K)8u+(kW~m(y-J=J% zYn7kFOYbqz99z3Q0y^l#znGH0Ank#$$`~ycYuqx<=*~=f#iCo zJr^k<=>(+P49+l4cc-PRIV)_Cbj-EGSxVV5UYc-1jH?8V983mF*MjOBSfCGmxTwecN3~M@f}I!ZpQAJmyv@9_gt)(sf1$(s~P%hkX}1&6vx0!pe#TRy4ZKd z35F4Bxgsz}xik~U6-)v%y7q2snxO8i_h8EV=&0$yuIEEBALRad46hM+;+djmlq9yC zP(jnZy7N8K-#;Ld@_K0#P1Aj}(3)4Q5a|~_z!T_!Cc036T&-YER z8+qZ>M*;?G#tdfLj^*dX!Nw!?2UAtY`uLvv{Zj?GbgVnfrQ%t4!Qxs8ch*5iDQKZN zf9SIvhv`>kxfHvYs*bDYj? zu6a6|xUC{HQ_6&gAg& zT`|9ye_xFjDBVIfmO_GVj5`9qrpDD`eMm(a!YRG|yLvVtf*T4lL?X;kQ6Ed;TaG2z zcn^c-(uXw4Jl{FAr1}0_$h6;M($lqySzFX?dYx zT|TxI{L8rK5~c?o(Bs#vir<>9HRC9Z`T?)m2LdR4_FTAz{PGA}X-^-GazyoD-@<#_ z5PaLZ!h@3+RT8#22eS8?Eb+SoNqjxmM9eQ$T^cZ7J8_h0%*`Kk+8tkia67Z$#{!PL`6` zc>`!r-y^2vHDhCkAGQ^8wI>G1Q>%b3l%dawYF(N1Le@doqvD{{?&}f2!J0b2!EYgl zfY0x>TYsk#SkCu8nBZM27tGA3RJsxW!qIJ+GiAmy;aG8=u(}VAn@TOUhL34{Vq%W+ z%NdTfuZTM*n=`}TJAP);2F}VE@&|NG*Bt{!vJ(j~q7K)^5O1z)v2JP0glXcykvx&i(q@h`|F*cmT$nb`>+$#ad;qGNH!b`d`e>V zP+2m(1KBdX&I^JBG*CcHYdJ8}y3*UJa2=j8WuH%bzmVEbWtnXn`N(~RgQ9XjQoNmh zYI2c-dM64$QYvGJwOC_%QZ`nz9Rgy7&~37Dv&@pL`j_jKXV=T~%m>%YNBJx3QG&Dl zWWoj1#q^)v3Iqqm5PcypyV&)m3>(VY??bKH( zEz1}PXf)k$W5tBh?$p?(n{6qrEMNVByRJsfrm7U3&5^LI-*0ZT5CQ}>Yt19U18TO27t+I1++znY_D;gWY$P87g82x znQo1mmLNvORees)VwT{T`5nP$OJX85J7#Gnf#w64hFU9^!F2o#VZoLSZVSY) z04ERAYea3;g@M1VexibP+ZP?NZWg!Wsv*0d)rrJ{z&JqNCx zCUhIWx9E5(7Teh1K52N1Ebs8pX&Cs#+qW}ZSFsqd?{EcoUa9pvPxg*Jvnddte1k*N z`RoAsA~xpdV-;nY*kq{)ip<#%--J#0y1ZDAdQ(XIyL7nvq=BY&O%e<=j`tqjHJHTD z8v?BD&}Y{5&`FPXJ$=>T>uKkwRHp5;dV-|V)VxQT1{rGe_vK#dV01MHvu!zFRJX0$ z5;fU~YJRy}r-)Xf;Is-&t{$t6v)9r&<*Hws~800dqcl-cN)cXFR&XH}-} z;37#Q8$h3?RPktIU%=avmh>daE@?sHWU|vWnF8z&vdigATACL0GiP8A&hy>&#F=_# zPX>s3icb+&2e7&jN8i(vg1&BSpQp<32lVvO_I-a_cw&wOJ+R04;bQ1fb>mQuok}X2 zZB=jx`p27Zmg%pm$4^!z|BeGjE0T-#uC()u&>a9bZ{6`lC?+s;QgdpLJmaoTuY3X7 za+{uf?yNmw?`?P9KNLg$@`Kg+d%o}29(lAWx_I@P?Igd8Z|$C*lJ& z!~YJP?ljDkM?jp;W87Ur&2^O5_m!)Gz|bJU zxPRpf5<_p%XmtPVuURTaz(WE1Mg_O5Viq88vb0peOxqCY~>GZdDh^= z&O)5<>=OPY;pl109D4hkZ6}{2=G2{Di8|D8#z-=`rQ`dQtKD|ag{WM$m>G&`&+z_! zMC^h48B(%@Ze%li1Nnr{b17{R#k}robsr{KJD{~IxpyeGKXH%UU~IaS;J9rk;lR%~ z2(tn|2asmNCe-|c@ci~^_p2%AW_`+pPOg2LG|2lv0-aMcaM)XuX|&qFTc?EcP5x6z z6@g!r>laiDNNen;@MGO#yi#ZKTLo-J&&sOiOvo8%7WS&(eqMu?e!XId2+_K%dVcVpV9|;_<=ubFICmkxlQu%rnIPgG<4pS znJOi;K(r=<{;g~dt)k);joy~(Z8 zaOC{=ChmiCD+DPM{;Pr3(e~aT9h#0)ySv}|sL*=Win53bci4GVEf8VtrmA`rw@D6u zVB!B%YOrVbOfSUv925okd9b?KcPS^J4lms0TzhOPBn>;}#2pep_w)sF*i% zg%t>qo{sXT|JQY2{#A8?>mFa?mvHuI>)v(i`FAm9eICHhqf1m)Jd9bj1K3q`iQ3B2 z|4R)Yz)qtf$}4``(mu*7g2t@B8!CBxAMr<;G`Q!ttQp6ocU_T6vso8Fp6DUk5 zb{8$m&`L|IDWhuDv-?Pq`Jqh25UE6yJDMuba*7baODca zl^!1^^*dVg1V^Vzz-yhRUL^;r79Tr8m({=Lun;f1or+A)<}c+X8aa;*-FH^_!)*B= zDUDNWs`7GSwL!1S^c-0kDUs%aF?0(z9C+Qw8heMP9H%nd_85ZmeEww8H z?Iad~+IqFG(rh}+!?YaUe-tu2RYx(r;}}GW^)8umFI7COM!i*q+?5?ZG_v5cG+=v` zd5y4F40W6`@hkh>$m8I3vcK`CQtt1)Vk1YFR<2kyYPxXy&Sxv7W_`we%ZE< zw2j9q4$Uf*O_(*3Sj{q4gx88f2LYnmnJWRCnN8kW7o}zHhtItVg;*aAMobZRwNAnW^s@ zJGk%YI*|mlK`B@T&1%2WRlRZQoiM!e*BKysCLbrfJ0>7`QP9>Nzdb=!9GhQ7W7NF7 zjZ?1#jGgTx#g?)|G!iegxpwg~RrV<- z%Fc`V|9jc&eK87i=jb7^PJJMIg~)KhcJ;Ei9qkygRWZRLN8t;z|6C}LkigGyuBFTz zO24!xn-Bl(Ztu^q5Z*V72>m@RO6ah{M=V`&6yDn@$l?7z77W;!bz#(Ei;+TM$C?L) z_*^LLuO&?jszf`MZs@XVPNq_WEqT^77n|XA$-B~o-(=rbQEx|wfw!|t`K1-2ya2R%tb?*m&u)+o)c-xS}HX z+HWf2N-_(n?~03|QEjpncmgSLpnOa<{63r=Z>SGIvGC5rN4A z_7K=Xl*KBL+N+OxY6QT-J=z8!v$9v~0c(Bm?y(JH=e)8}o7>B2-FFHL?$NByD+-Sy z&$nsY>8V?W!x~T@>bK&1j)f)LU_esB>DPdO0LaZzXJnPFC)iz?UeX;|-eTF}W59v8 zJ-srAF|*9_(^wO8<|6g1U~W^g{hk+g9U2ZAN;PPe)1tMVQ#59YgB{le8-}ZFrKUfR zyQ`l?IQIu$96UyX2hiyz^z`4%~F3$@iP?q9_ANKUh zhutouPWK0lYmY;I*4MLQqJx%Pr~FPAQqy9$jxSwt*7>D3{E>B16-OL^LDBA`N*5(g z(U1B`_=HY#yE(cRJpiTa^t@&D8g5M|XVSBR-ky_U_j}e`yY}zxGnz;|<2>XgvIb0f z8r5CBPb)>z3&hB;*L{1I&aS4L*p7J2kLl4&Rw67`Daog9GHERUoFP3-z6pZnk_7Qyz(Y-L<6~h!(q`H zSkBIIohLA-oAW8MiBQde=$|K}Tp*_v;>$EIg}N2otiEV2L0Eq{93)ZCQoN;jPiT5$ zH86^!Wm1zGe_q#>4VWezo+(c%5PMb$s)E?x0~KcO#V$|@iF&=d(dI&?E%H1aLauS zc31f>Er6)at2fb)j^sfNxn*XT zdb$Z9FNVJE!8md8b&_^Q0bbw7T^~hR@S$xZr)p8c9~&rBF%5evA2RVra2{oOG*K#G zPDSxOM#$Lk?Qg7O8Q0D){D(#~YrCC<%}_Og4ZeYEF2J;gXN z!S>jwxi($jr(#zc3;blH%K~18M7H5(O=_O_XJJ*xvIxG-IPo3mw&4k94Gz_fkCxJJ z&Bl26kJ@R7SZYe>8OMv|11{#dHh15-n<~Da-x_8x98cz`p^y324xk>f;=qYwxXAdnDv+jH;#-hFSpG4{?}duETd`zmvO^P82qm^W;sd2-I@ z(z9VFRLiECHB@@s7YF~EE4pJT=P(?Q2p-8lCJQ(JfmyO$op2YkV02Vww;054ml=KM z1CPvn-M>^h#&r=1vpk;%32)c7CXHV5dPsdg%H#o>WV zpej*SI~AI`yDJ62gA612)dGkSX>X^1o}HM^|Kcic6g*b>If|rzAiMo0%k!&iHjOwM z>mQL+K7YuXq&5CbzK(p)vX1+dsT?lO8+7<+&(~Iu^tfh|vBY;*xcHr0Z0s}LmCee0 z?16@DD+LEQRo;R-o<`a~>80%44}=-isgBlPU)}V%%l+BN*Iw#d`pnx<-2Jp@?>WBM zOI}JcLtQ3$%^Kg`AQT{9n2tV|*P7Y%4S$_*?U!ED{{C$Bh^8IkV8glh2(1AN@P?kl zOAfR|=_Tjy?R>+cA9&Lor6dlN@0gcezvJuqc?unfkeE`UB`D{1p&jM zG114di87DN6E82MCw9GaH4dkbIO&?JTf#B@A}Eg~sqQxsqC#@08p+WI1)ohE)h1ab z`0%q&*3Ld-Gn9uYk~Sw#?H(LN{uBPon1#M7@0?z| zMEgI9J8)X&dyLB7;f!n`iNn((!LLnzTWSHb-j(A1nNe>T$_!R-JsL6;071zg@yrVL zTEg6X9~G@))%LO`HIojP*Bhc)lEZki0b|vhXIA^b8%pgT=*4Zy0KH$Dnn_A#=0@O| z6|$3JYkD?sJ{JA{eg?!~=rm#QOCk{A`FP9;j|Al+>RG1Y-5NAM0q$e4f5%Pnr`>tlBRCA z?S7xIL;%PV2<{{k9m0IDnz~!{nz}XER=!$Z^L7ibecLoxjg^aYoj1slBp!BmwzcK^ zU}ZrrbhcIU8+~&5QGLfUElBNwv~7`AKzwi6E}r zqhD)RI!EVDjL!6!t-!(>_#silAP|eQ7{_c{>E2WBdfi-97!&qW^2f&1&JCla2%ERZ z20VAsWw(14(*Y0YAY|^N=!l$m2D%qCX2A{#BZr~l51SqL7AOo%kMz|I6)iGvH-2b_Vg>g$<8Pwc6;j} zne$8gVHLAoIcn3l!N=6=uCak>5v2as%1gI5Dmat9pTo$_6CA92u)ffqPo*or9_mRnRL zsby|EO3q_T15~MFOo5MaE$Qz-#K138^O4(s2I73RN4*{&knpR zJBny4sFXS&-FBP)>r^| zIS9sxUW_Y0HM}F`77ZDQk!orb*@nt3TmGs)Z0L`drF8OjK_-_zDuf5}C!WI>)+oGk z(LKjZj5qoDn07s#(+wGo$9-}vJ>rjbF92^~<}!sUO(vJ_>ds0X*|3;AF;(*$+6pyb zB&D|})?;pbu*nUP=`m=ZQ-z#BrMi5{sy4jX_an?dcaiHaPs%jTmz*V!h8lxdBw3!p zHml>Uzx*s~wB;aVv$uN7aGrmR+W<17otQf^uoMA+7~_h6{(%pIHQKTS`?0b`1=`6q zMTC&+miZ|#s|_vNuH{7DT*w4+)95s4?4d%Wt?tEzJj3)Q9S`(&ZbHgzA39O=Lwj-{|OlNZ~CT8!_b{+X*eu(d8|UanR!vpU&`?| z37V}%R+~3-5nTK1ovxtEz_NP`d%kYD%0!Zgsur?jzWK+G1Q+W=Zka;JHRm+`GV|l( zwp36-q}M8dCt@npL?%LV+{QFD_m$smSk*5)%RDB-0=Myj`z+`?@U{*^l;&eliW{yA zhOQ`d(N}3BY%RZ;y_>$6h}_(jAMCAt8z;&hT<4~$k8u6^Y1g(BZiEk`FJ0bC72WPY zAFegXHoCUlpOSBgYW65k!1TP=Gfwd7{>uK^fnt3R<*2CN$lHS}vEz0z$?7HTz+KX&= zr!-`+Tz+d{90Ou@=y*}yMWBKOyy)6z-9qzRAl!bNc&d1NsD1;PJ;_5af8hi}gT+`J zLa678`V!KTwvhjsITswka@pmZx2mNc^f7pC;sJYu;c*&YH7sU$A7vH!DQk6muW*ol zjZnGiSMb`IvINv}{G0bqMxis`U#0%05{5;)nS!u)7U6n<;FNmWQ_0?9hMUEBz5+;KPglTg~)_vQ&LS_dh*rg2gF&wakXvT{dZC|Lb-T)R2Q^Wd$t&2mBA7* zU)kCHKFx!n9%Rru0DzfPxM@#40XwotoCIh38THH%`sN0R(x79jms)u}j2WN}?Ed@2 zY6EXpQY>f@(~y=BvM}2azLdM;e|`Zbq8A@bu~EET_>Yc@a^6D0)xNaY&m8N2^9Ygj zC-Ty+HnGPkX;^hkX-Cr)7-1hJZ7Cw8)PjaE9P@gl>9Sed-Hr%B4U5fO-yS1Ghyi>e zZjZO?QyJbpW@K9XeXP@;tuMtChlK(WCQZ25k*MPW3zbnsNRKxJs(Q)bqS`wKcyXCm z4lL_d-3bJ0?sB?8sQeG1u{AbdLtA3(_+Q)oPJ9$@wyeK+%c=mbrPMG{IPMo*XWgl{6%&cMV% z)k3BCa9gfZmS`fK%sqD3_%lR$esfrY7Cx1uh?j}$D&g!Q(jMICY zU6J#Cn#^0XfrS$*Zw8)iJ6?!;6S2gc!LT(Ba{|qr0n1brd!L{`Gv|vPej9>a?4e)!5M&=j~2t_tjS1Xds>~R7bgpY%Ybk+BW;W zOXU)Q)H|jBK!^`aL#YxhtV%8Y(kL>KeS)S`bb#}#;C?Cgl7-pj0C0PGBCj2s0#azF zB0n8RMJ1I-e&P7o_R^(&-HvJV*KRwf2hxK**3pjLVLV<*M-!H>N%OU-T@|FS{o}Yr zJ;r?dW@g3*BX>6CSbflgf(dwmw~aNRwmeJdDeS9I7Co!JV)H3;Bf4a`da193@Ma_J zXZs`U^ZWzbJDh;oFL{N1|ET0Gz`fPp&I%BQ9SR>|<-pMFPU2(XJVdBot!Qi*NmhLK zXx_r&&)6E#s?`z=FN3|oH|th^J{6JWc9u1E)$O_b%P#u`Y}qfA0gJ7 zeN($~pZN2~m6Xv6+G-j>22Gve-rAIZw0`#$&D zZvAtQR=0BKjC3?Som>FuV)6mqG3E_r`WOi0#{~wzx~tv1xSaa;Yn)_`78OMrX!g2swyMNZy<@S!Q$Id!cUJcK>x439VXn9Qn%PEcoG<6bFyb zb`hnY4w`LbrjC9=M3?hQA_>#-)ztPH0&DrqCL&JhM(P)DBb4Ej=#X92LKXEbQaa?L zMhRA>Z|73gkMHB8v$BUf3x7T6;w7dFeBu7|H6UAMN*P=t0hc;}^ocNoHG#iAVoLWCli^EciXhUh@4VamwB4Tg{VF z{>6OAes&mZHW9Rcwl;(P*i9+t3S0!KnhYXpu&Vzv1hqQ;HO8$v%NHtO;zigq=1OO}_ z*#nv)A=;gc&~-8H5XsEGZ&bM!cx4}Xrrac`MsBoQKQF?QdkdG|#&$867cF@c|3KeD zM5h?K-$RKtbn+!Q2j--$hBvT3n%8~eC_*n`;j=S?+Hl`b<{X z;T9JShVFG}ilkJ zr94f&6@V!p+5uzci=%w8@{uI#^D8zB-<`En>MZ}(CHaJADeKP-iE;}o;kBusi>GTx z+DGXfHC5*D>Ua&KqUatOX|ruH$L(D{{9nW?&O`F}U0pSW1TJ(?ugNXRkD8$%@C zBHbmWi9XsvYPzI~(tD~3*CmZ!&VuL;UnY8f`=hnKz;ya-j%dkC>FR&>Q#MIZo9_~5 z&EkU4ByAWfD+6jmNtJi$IU9iPxYbzy_2O3y`$FDEpjHs>lQf+$Rp--jvrqsxrA4f$ zp{PbKiVjTIRgyN=Wn0pp-FFpg)@(d9Od6&wMV%fd&r*B8ih$l|7LcuFwuC95DmcFJS<_p~HLE-<(c zeM5KFN*NX3H|-xPnm<#nDV5#s)?t&SAWtuZO~K~#(|bmoTm6Q-v9TOR5;xMN_D~-t zw{67(06u!8LbctUt+m~a1C4ou8XF@|w0z5EtpZzFs~Yn@n|q|4@x@o%r!O#9${<8> z))a2rhZL%bLS#T8lvL24`w>-(x)sP=3p~tLEB5B@+?X8kp{)p?n`(S5>F1l@RuP!r z2A(v9DovVx>PSH@5aGqw5uwwh!aE-vAi$m~q14IRhUde7~NWn2)3)Bs0KWIycAGagf@?jf(GW|Rky-u#5$(|y!;ImkY+(b_wlGv6n^F3Q!WO~1+*<7>Ng6X${@Y~PB0&zL^kbw{O5Y#XE&Wd01shxD&Eh)M68=<@d zx?}*boqUK!ei8N_AO16(GqRMOy-)z!xna*;TczEwr@q)NEo*A6-rTg<8oC%sr~_cR zbpS$CW#9voSvF<-@LP&zPWb9#@dn#CzKLBH+cze<4l#+}3qe-Ej2IHjp^$6pXq5Een82Glkx=!en4fv8_8ogs7hw z=$7n$tm42)^^frU7$H8&}7`&_lU(v4~r$MjkR zBmE1AO9rp0oHluY)s%j=9tp;?vxLb27CA@qAOPpBJ(hYw@0hPNJi1zH#$!IqawRf@j%Nl{h}1paov2Pedu2S4T?L{MCN-Wu zSD6JVa=4A>J?ao$^Z?rCv&ldv?~1o-Wbm)X^Z)3anLHrJ9}-%0YgkOGQB+Dt+zcB0 z7W$*UzaLm;jQ&JI*@%58SHA9&iL|zH0TVT}+~ppADW8C74oidU?0qXZ#hL&{Jwy zhDv$VLFtOmOpvNS4-XJQxkfp42$SP&Q>5yZ;Q@{Tj5Y=}v#S(dj_Ppki0_TJ&5){3 zWuJ6)ap|B?;wLB-uGMOh+@}o2{<8AoP72{PoSVo1AW`MaTNHvkJfw-i;FXo9^ib^H zvgtJ%PJ034=@%nIZ1dV1l~FYSigg^W>tPH;P_&nqSNBmS5pb6SBX9*DieZ_b-P=r7 z3L~Q_ly0NH+ZH5@3Pb=O8=?)Ir2+lgiT{;h4^_&tccN=6!s*Bnm_2!N`<)*tHB*hm z$gpyz_gsX#ydQz>cd~cXHk(s>q;2LT*yoxi+6TCE)c{zo8jX=5<3bmN0YIz~ctQYW zuG~*KJJWBM0azgDlc(TpJ_aO~eI%6moP7j0)yOw6-N=UuG-<7PkO3MANnwoFKcY*^ z!`Yf6wd8J!t$DyQsmxD<#Eu9YCWYBs71B4C zXKLm~J(@xJ6!2ufn$l#y3!S11$Lx-*%5-Ldp3NA%kf*@U{1#1|^i3?vtzS$Y zPS6=yUFwQ2zPlOvQZoEAW6RKXBCTJS!MWnR4yp%pqDtd$?3GjsXl^X21^n{<7nHCw zR`z+@Aa&Nh3k+g@ceK+cbzkDV0)~s3&Y_0@<3%?6`*p!hE664Z)j=@)gwk%PTthG( z=CcDkYar_r3tP(fJ1{v~1c76@ga;kfAG8Q323Nn{r3MjA_m9TU>KdnJqzv{;{QoXm zd0km*i6XP*9Yi7_2=*CKo+Xk;NRP7WJ7hNVu%VI2Jy^D0`iTl_6DeTq@T#m~Jj4pU(|IXi^x|2je3D4%V4rph zcr{E5K$TySrwjR`C$AV5YVwqf!^;O~jCBn-&sKl!LJG#;<|hwT4B8- ztL~I|`*M=;!w=tK`G_|f=a%bTUmj)V61l%t5Lyj*VW1d7&&=RN{?AEhxeQkq@0!w$ zBKk3zn14os3|<4`B;4~2Q|3ZadQBf3bK|h=q+YYK}F%$EFL#YQdm2)$l_h^e6q zdm=9mkCmZLZ@Pe%Xu+ z?j!oR0m>kt+(tJ(Lp0P7KyeWXGQ`?Sw$tI`{+Gxr0E#27gNhcd;~`Bq*z4)H}A{1Y!+JSr=615!`n#t{2N875O_wz zhSlt)Tx@Rhnl}49_kMmDwYJZU+ErfWmfJE~O$V|QOjNpL=h^Uf?4^_SH7Z`S))g#z zFl5Gj{eg9|g>o7*d2?dPC)|)XZ3wkLg4#XNfQg|OnxHPZ)CID|73X_Ez&AbNpnYF^^&Eeaa%w!I?#It&Cbk@mHYP3d*w8rpr%gieib zZA~{~cZ1J^aU@r9EzRoN->I1o-It)K7gTqF@nM3x0Ao{0pIC6|)zpbmM6u*}ziy$N zn*L`#U=`%rc7j%2XG&-X?2Sq0P&IvW)+N*nFw2D64d0I=DKll~^B!3@Pik;3HKb5I z)u{JC`}d6JuPTnLINY%!M_39nWf}ZU=$258EAbcdgkBp=CoK{~G4h&&JfYWnaof+q zEN}T69haT7sBVVsl80piUSerm%l{Ipt`oV9WhVuvBN5V9vKotRhP0{G;qTZ23czZ} zsV8fH<_x3F>v;rvUOwLIY!p1CcR2oj)Hc-NY{gAa+PA* z{ZtT8XLrF4F-Iem!9m7ida3Mj{RZobNOrCS{B)c%Bl@K{{B#cJTW&8Yp8D_>cf#R6 zl_QcAf3r~n?&#TqlaeXHgwgt)502$qI3ky8NP za!U`0I(t0B(j5Zv>=QP^EH^}<_(KOI@Ly`_f#egO9?y8!hF7FZF&%GTD*4RgVquum zy|p54l+2rc%hzXlrXTAwBbgF@mEg=Ib-Hm|P*idT#*)bUVk9eX4BYgfrpI59Bvmh~~h<2LS(9w{ujcf9{k zxSuNj(kCUkC?o5~e-xVl4`N_1=#6|Mg0WGZ$tA_Z?haks23X)I*!x%PD+B14IA1aw zYCjvSI5mYmc+t2iHL`ST>r2v#>If~XpcXD?wC1feF~6J&^hrv9D6ycex-AM#rp_K~ zCDzyo(`@G!iyNDI&VSPZlkorgAsD@eTYM?Rs+&?WoHr%j=qv%knc1W-DzO?K{VT93 za3jY-u~ssEdr_s6lExNl_-E{s$Hf8! zSI#>MG6TGJC`~A7B@}gjOmv(*u3ilDbnK%z%rK36qC!x8ML}MUeZ~z14W%yf3zh#F z{sh!@hx1Erqhc^Oeh~U2e|I#Gr#UL>+KKa8%bsywmLBrXKuktR;%i_}Imp)0K?qr6CQp`~+M_i)zd`Hz#$y9L@ClF&EY(-L)G{h1H@j9ph24a`-@P3qL%3OcdiT~gYj!=K#b&2U=HAvmfeM>U_!p|{ zfxvZ)K@@KC71^U1-QhjUJ|VpOwyDsx*9@N8t0-6JK1( zD*C5PNsEx5{-{83MZjhBZ|)ea$+@C-yS;yON-kAHqb2X@#` zqYvH#22;5iocSMhEXOheSdN1CV;ftBdLmp_d>6KTp%3ie1&7%HuYH={A310dnFSF8 zMnXCCjz6}aNv@JrEGUE*mv004?|+SzMw$*ClA7I^QNN}cl?Hjy#Yv8iPzs(bwqsO! z(?!P+>drv;(}JNCy<h{Ouux*K=R>+0SASEWL9gT+7N$dr$H1e@L+YTxWe zAaJmP!5+LIdllq4KpC$>CIP#~Uf)O_GBl)Yuy_Ngvp4f9}b# zJJ<*F$rBf?P7+dZ8$f#igiq9sFUCjd5MIo@zlj#>0_JQNcXc)3DeIQD`8A>uF`t-=X`wxm=_KIv_Wt&HC$b+Ye__u1%X&2MdL zVs4Mrnsrk$?*%L;q7^igXLV~I-(VDSg_tn|p0QCQ++4;u#7RCL88B(|b#6b+DKk|| zz>u#%Z+uBI%e*7|ThLx|rp+{b-_x*&VCV?JdZm%|Noi|x+wlZNDb;*EVm7Q2pnq6L zddHpC`GNGVE99*M&DJ6@ikX>a(U}r^2lvdfFZdQ!f_&T`D^O5JaQas&C?1>(Wxy+9 zb++L&OT8CRNJuy}p~-kn-tp#Jk4GYU=q@$V$B)~F)Q9BvN^ey@U~x$9#VV_=^HqP` zB)AhSbL&d{9O9j?tWmKV6*Sv;LF_~6vqK5$Z(m0+I;&HqO-ZXH#=#g-yvM_ zId9~Kqe%B$t_U3yP+oHL;>b~f*(kxVH@HK4O*hLHks??}id1$RN%9A11$NYP$a8z% zKss}$0~zMQprq}aJJzeT5-X|mf`&Yj@C)g~zrK(F#%hQ)lU9cdj?AEu9rm@(D*`8H z7+){6u>yHY&sD_q_HxKBAa@#e1k&*VjApW0-^UJgvI20T<*$uC?DUE# zn07-@;qK+~`JnxFP-aLe>PHJbrUU&Cd|uWn=neX0g_O)3o?K}cXH>(7VisVEXJ@*_R8O&!@qOPpILme<9eSo0!D$>sv9jFF5zKwRN9#Q?Cz#s4}Q!Z zidVJ=5M4V7tncYfP1$ta_8;III`f6uzCGd*l_9H6VVl1@20jce8wj|wi4IGX6}Dd| z(Bt338O0j&8-*#Z0t}49QIv8X!iX} zg}$HV6Rk-hD>~lml!8sB#};ybDBFTYG*QKGBH!=TC~c`nj|sZS7JI)Q+gf#aP7D9E zQPzT8YCSztcwlTiUI_#>t^MPA6{FRUbI$0~Y&q{2HkHK7c&npk$#82yQBr zyM^26w>mL;bE!?|t@`)Tz|c({GV5bGe?_fyafzg(w8=ntLQXa-i*fl`rsS7bY~Col zldJw=p7-v`oxa=$4huo|C4L{wFi4`jYu9#UWOEh)ln*O<>^ZRFSkYX$`Tn_QsRq1d z*4wGi?+l{Y;n@ZgZwdk_^B)^BQibjrTj)k658(N;$A>*UV=DuVb?~Caud)m(-!#0R z{OS~zdQ#R@82Z3CR1B&!PsJlC*3xoY&%u4P;~V1b)7?K@&cQS0MhvcomM^J(hluXQ zKWpUrjb0D7aG)kb9DYWuX1j6e{HLG~yns9sGiX+W!ebU|Kb1+L6EFR_z%S!IBvg&I z6s1PUtO&chawf04CGAa{S8Zjsah*-J&t%)2>(Wu0)Jy~U7)>fyaN?!nq#wN3}-@hUTIS*H|lD~9b#z`;f#)DF6tJ!hF8;tBjz z7tTf8fqJokj%BBPBcviIz|20a_Xj_n{q)37a(}zjG^aN8{R7LFoEoJkq5}l=ayLkW zZLnqbsr<~*eYI3}|K*9y&@kDcdZaF6p$psC01PVXl+{-n?a$={(Uxusp=?Jel}U1K z3Mn=H8AtszF?Nk76f?0Yql6Nl#Gz^0M&IP<^}iXu#{($Z`UfOllnOInFh|w&UzTRv z&u-?V3ETu2I!Uen5?*PQN)SqHkhHAAznPyJexXtC<8Ok@{E$7!`JRKuFi^T~`*R-Y zpGMzlg;+Efx^j08!KfGOgOkUIADa0HA^6WXVn2oC!=@w>N?rk;h);ZNya``aU(MBq zdtS6?hw51M#oCQb+i*YC^zD9lLnVOZyrSy4Z%nbGAX`ds+Cg!&oIk-*ZLw9DybFx% zN|ZxsyrGxHy@2=CA52JjBslcaKwzOpBWyk!>e&s~TUTp&zr}@|2l}q6^~mR@O(wH2k}0rS^OzQDos0SK6nS z)Z6Z%UGh2MzIqT(X73LTE$Z27geL!P33KQ12y(XXFJDy~qi>HH@Nyf=GlENX3FNTK z+Gk29x;k>?UG00?QexC)R%@{#6sf|MLbZ|(AZJZV+-9Z;AuNze<8b*sNEsWL69Ju0o10)?Bmw4z1ZHBZIi6# zRFGL{3wj@Gi{0&MAJWxi%ocbaj;;8(J=_6P5#3qjjYk~X-5~H5&h7>4a_w81CjGwc zpo}{IMxA2YK)QLnqSxFpgbceHa&6f={N=bk;b3jk4%dFxZZ)g>na9nZ0u|mfi@hg= zXTktC1izN4<2(NB_#|q&x9mc^H4W2?vQ(5?#oI# z^3YZ&)8pVw*tg6GfG=9XKwT?&rV8k{rkfj;M<#ur3a5AM`KRSOtK0$)YkdDUQ?+gl zozbV?Lys$ie6%@Twz;$KhaWGX(yrHP1-(tQnOptcWC2+cdNDqb_UXqHH)~rldjFkL z{;#M*Aywz7N2|v-Dh4H#VMMXj8LC!BSV+1ZsDLCA~9d5BN_P|HprdDKh^b z0!@M9l;#wLndjjc<%0+sOqMi5QG$Bmkh(s?!E@ikXJffSYy2dg>lZeNAKH9CrFEOg zh58RRmluBmY?(y>k3vrI5wkfT@3X2(?!-0FP_7bNFQtCh=Yu3_x<1pj9g~gN;+Vd* z%D2b9_FF@iMx*ly(OUE@wdh7(;ilkE$3XLDm*e~D>EVH!&EPE4XjYsBWjS-3!N;b6 zh-z6Ok>6JZ=NwNswoIs{*`3Vl$|z5_y9i`9ejgh4B~g&9t9hio082$nITM6jgtb_ngBFsC;MzTJKf}0(g?zFIL)a;VVUP^Mu=aFT z(Y%#lUy@38`!;K?Tr-~#DoP(o>6;$su32T_L3GK9eq^|2L<)!L7)a^fn1U@z7+NYE z+s=MfIo$=xVCGqO6W4c|(b0|D=>^Kw_UC@1M}Bt*3m0=s*I!$)k}s=0(Y?6+Acl*- z&TMGo8GO(w)U;4$6GZ!x0N#;iomF{@k^mKPEp-J(sqWZ5{}=8N-z2)7n9r96Q0mkk z$k)~vylWLw(=?XGnSf#Pp|Es~;(e1zD)8jxrKzF}x7DIhRJA1a347__)??MGs=uGU zp}mcr!)gE9)P8vUQ?jvEsnEmhs2GkH@Cd)n*Bc9@SB_QL0QApCv}=He=mKOaFl9-T z;y4N&OGs6(HeD;)T=|yrSiP=L0(X&u#P?Mo}s>=Ox+uAGtO`<8Ma>2)_N|bkWpCQYJz2 z;XjW;`-MHZiI>#~jgQ_|Xu5zSV3z9iACflC>X`>xGQuiO3zOQLov9C1v2x`z#ri$G~{E%iM9GoXiu-ccV%$1q}RH+`^eG?B5U&T zWt{sHZoMU*xwAN7=sZDFzdN-2P^o5d4(MF_xRJ0aFWTw(7xh@fRFQa&9BXRYl7RL% z2dO)spDmA2pWj{1IgnnNcu}_p$KS^N0Cyi3@MLU?k>3zN;Cv-pUHxdi6;+%`VBdl3 zJ(^!kaC5xnlN!-WNySV=r{CF-f1ly+e3qy9dYz_7wKqLZwJ6DISP_WW%G_9fB4xBW zqw9DG^{OA}+<7--miw1FF7_LR!!w{4?URGv@_f0j1<7%*c0bs}@7M>oS-yx4nn~Yn zj-ZkMULFx(x<{loJ!mSXV!4yuq1XYY?WSpDSaIo`T@xkI`g_myFBq{R0qc0yMNeFBzTsoAjRSN1a&{ zH;wu<5`9Agh}uUu74vqLhzZaVUb*O$N^~Q7gB6n;YQE^-;Bx%P7$3AaqgqaP>^b9L zsqsMl?OGChOtj*_ugpA4my3<```aU*m1?}45E?|nV11Z_u>k3tvxDFacuicIbiaXi z`*9;#3#IoSj2PDMZcJ(LuC3;jXb7(%}pI zJsJQxuV&wYyueq%dJeRj5p<&Lo#fn_BWv}EF89L#zs9<5s}oe<^SP%Xi1ls7F&Oikit^CzZ$y_X*NbZ_HFB_xri%_N+(g<<=?uBQCg-+5@55<1L*mvaeK_=n_AnFlrM!)Xd-q&%L~@WKvOOa|5+8p`!HwqV%;(>?E^JlzVIsSUkp z)#=XF0S%0{^~DX|aLE22?xEgKgX5S&cZ*jW|6aIE(74h_VnhBV0yHz5W+NvmFkv@w z^KV?qncg*Cs}0BJmUm8U*iME}P3XAyjlnk^dkX~$hp(p>?~2S7WgT~KPf`G}W=#_7 z>uen-RuYE~BL&7U-$<-??=uMC5D}vk1JND<7$7Z0l^vH!lTcNcl^gpSHEw7b&#W=`apPFUbWGf7`r**n{I?HB5V2{syB@cFDp6#lwL_ZeV?Xo@95dE4FXe? zJ6NB6lxyFXh*jClX<60_QqqGYUxoR-0FmFrzw|e0Uj~AmYSVeG5A}S-81}ywjti_sk0D{SV2|vY6;sE zqz9AwWnakUqjxjHU(&mAQ`#rvnF}R^5`2|rE%HTQ>dZs9r2W9u);r-2%o9yQ0de)E zRJ;nK1W^OA|7nv2g-Wx9@8CL0*l&$u*?fkgPqbS!#C`&Cxq&8<edxW~FVgNz+A74wZ2jtw!ApCF`scN8mHxjsXD~uvYsb*yb5Bby z-W#s?MC9_wW{`qr-CzTJ?TobfPoc*ubR#7F-F|Uh?@E9fNG0YYkc~jUiS|W>-L%eyU^1@dE^xBRIi%Q8>XooYt@;QWnCM zd6dB_Rws)=T>^1FyQeq1^fl(rWu+@(N}tvSpNou)y(&E!<@EDB3VU+&a4iKQ8j)jr z&sJ!2VEmT!rb%r=L+A}LqUNEDy?2{x0(j~ht!;oe~n5G*~3cG19#)y=oM=GdxuyHC_z7*57+vJ6GAQ@K5KKU*yVEgQ}2so_2vhb$S+L}9VAux6gQE?fCAQ@bb3o&V*fjZd!Z zhgd34v|TcZch>&kh<$~8Qsbrtcck(L)9xTCH{X?%I{=$1n~D_2-v!pEGgqm};Yuoo z@_>UHk7PvagmEO`Ej2B{7tu_|a&Y=ehk8L2FF~3;ztHX@yf)qe>(mmZpGqOZIya^y zA2EO@=CQ4je1c-X5Hw~$O`yxVyVIVs;<|-$?3Zh<##b0~X}HqM@OGo_uP3or04Ec2 zvUl&Cgl^mJ9Xstw5xMyeDMP64a%${$%bd@D0lQ$Xec-pU5pO4L$liI<%oOtSwDncL zCUYCJn+89ehq7#<`t@qhmL}i%0$L7fh3U!Q$n7&0ugP?KcI8M>ia1jUOm11I`w=IV zZUznTFz%<8!VaK1<~0GujA{U5vNS+fR z91NK;jpi5fvl*~yW<^wHnJlQ_3|u#mg@*Gm_oH*bz!IQ3&Fe<$0;L?AL;vxHQU_w% zT>9|^@;7vqMXlA*Cs#rbc331E=1Qddc!tN_N!7o^x`-^iUR121hQH^o?_EO$>w|dr z(vn^yiFc(jptPwwHh)ig=u1|_p-C*l zqaxDJUAw0Tk6c*vOyyXoI~S?vFp*wBI*8tSze+h2ULKfd&2_7~w~s1QD^H7&%|Jw( z%J6qw-S*vEkU+E#^hdZw(Tm-Bmc_3o3+2>pg>}IFu$Z1NPqW-~o&9tzT|A;X-2*Ql zD6t*)P$iEb=pv3gyR!Xg^v73^Go?&9@!Ks$5MS!Xe%2iyEOZP8E}P4a`UFsNXLo-F zUa*W{R2VQDRMgW{u^RHRL&GvsY#l6xn8qpTeTe({r$pTU(*PH z$E7QZxm@Htj)^V(JbVx7v7lL2`gx|=FRbkIOf)GkUKX6LwF#)H>7}1hea^~?zUnNc zAvY4hN1`~>k`)(dneiGw7jOC^Py-|Zj*ZGk8^+eU{*E+MLaB0F|Q?3 zvGtEgMGxJkwnG9U)YRCZ<|2R7NYJc5Eg)7^@iq>lYhdxQqLF@SURbwkhSQTtiJsi^ z_Vt(&(y6`Kl*>D!7fw>hE6_jGF{adn4^?<%0nKwP7Srui{z%gA=5Nb5Z}oRxYQWP8 zRS&El)cEqIJE^Vdj?+G^ z3tmhG)^8U7MO;G{*SRka02PS8FxHfKa?MDAV_f;G=)qF-XiwUewb>^3RG=5e$_K$M zZo7vNl&@~^Q=Ch+8b^Oe-N}?YM4gGU+{AgF!ZaB`0MF7x!ls9eMuv_1!-@DO@hpw=9@Y8kDdDw-Nqlgrsn9SLD?zP8B9rH-eJ2^FA-=DHEKzc`ryg7EE;CWx)!BeiDpeE8h` zUIeF;eV#k?`R$vEaq3~03<@`yITu$yF1xF)=J-Y#pd00bm{B(WHtR%PR+YCX{_-p# zo)ET`i5}WKi8?>mp>gB6CJrtkuljpyg<49wKVhA>af^bI6s`U=-;s}E^dZfliDod4 zht-4rG;V3IYt+vAUHP&=zawT+&Pv-*k?F-V=F70wj9#*7K8*Lrk!Wf{tRLj8hg^*erEA ziWr`vPDy&q`30lv#n?E=jLKWs5qNsKc6ezEn?{G7BCiWvT6X#Q+ua^h?Q&C5x9ii}vzu^zJAGS&9( z`H!yaY7&x3=VNT1R9pI>h|c-)-?v;t#-FZ}utyYztXn-Fur#ym``gD##;%MG!lUF5 zfU+%zfZ$Q7rg03$_x;8tFK9Z1*;Pfoafz|lS1t_pSu z8@Wpz8(4bjx-@NBsPNyhRCb5JyXAI!ILEPax9fgjIQa@pmXp=wyx~k!=~myuJsNTz zY=BDs$C1w6jHQ;FWif?+A-fvmvS1BmKTB1aIo7Nn0qLZ<(fQjOIT41{gg^Tm-!SSv z@Cd_irb_6jjCz3|Sxhk|Uc+6=Ps{`S|k+q=uX%h^`gUYx|F54fL9tatI9pAxrfXMUYk9EBU`#iC6|Oz zFg|;BA5Qts;i}?XnF0QTBJ|C8&K-J`3M83Qr~dDZ3IEh)Y<;g{W;8YKWK^BlP{FZ> z^Fy~9aaq}~l+`Y2e#A70KReppP3`|gY>L=(yt0hTsqof6ADSozDRVNuR*1!Z!K zAJ#QgRObEHrO8T2%3a(!uH?>76BAZqi5INIlqxbIQ#`%`Q#^%`sm5uE8CAvRIJ~Mo z?bJaH`*RlLc$lH~Ihokv%XWqCi{r)*+*ij_@4Kscv~yKX;bQQOd>wk70&%}9)?@1*?6d6*c!~tHeJ=(Cyc=AbA ziv{KTqA_0`1!w6(1tN;xh`CkgV>>@Y3WG4m?uAqnRz6@$H#T@@!%ZR|Zw~!@f2?_Z zkJUh75p&s;k`o^;&bIw5>q6R7JgS4-Ft>VD?}w0gM~Tjr@R|37=jD0g-^Mvh%_5-tKQ$BoZb^AAxJjs+`BIZ%u8={Fq-f6sY1g8zWIGcpv2d4N(xnB_ja z#E>p^odQIC{kuecul_etAHl|OInc&*Ib!nVxMGu_s;DY}5(5VyR7 zAzX_Nu0HER-duIgyrjS7qL+?To;LQ&$E;XffxQIKKj^%K&bw`D#UfcUGf(jQ9!3H| z0zZC&9%>NxJ!HufPEtA!saEsGq~yf%%u}m3u#QxHl}>eI^WB{f-3wi ze2ZWm-?we@oZ9oQjwHo5FW}-!Ui0d59DrqRILII36eg79Z$@znJ1HLZ6?m5^sx+{z zz2$`3%MMr|oG{S%L4>hN30QwX8mmalo`s-S#0 z##2ugAoh{oiB0sAUZMGtz?0&W`yIZ~EH;7+oUP)Vpe^Dj6CS;0rxvHfeaYT*cetzX z%EFn(5?89n>uQkYoX#vW3%GN#nh*wwuaa}}b#2#OMX0wZ^nX~$Uk8vc1pDtt?dx9ZQ z@Qzt^AGbCXILk+B1o}|+L+U)gm9^2|t>LR9SYg^C4$`gsITkjm0qq#YDpZbha@mqM zH(a&1%-=XJm7PMZZO@k_=aLGkCHH~+M!JsqOZ=4DdEZ3usasAje3W&Z0)3PlfLc}& z1BYs5YEg)I;P>;ezVw>ib5?#?gN0?Qu5P|%um!8U|6+)wFP5lIT=VhMksjq%2wFNk zRN^J1Wm;WmX&i>GFcN*f^>*oER%ytZkZ$ObGPKHDR9>#Sl})(Ve6+(lJ|TaQUMk>< zoz^p=%@;3=js7Kzse>5IR~22AR|RTq8lqy8U?smWBPB0sHycG*R_I0Ys(ayiT)@s&G`Jn-E%%ZDWc}J&A6Yo)E57SEZTdlg!Q9z$6 zOtH_yhajHlhGKf6OYfMUAgi|^^(UW|tiD3H79u01!r_hTHRQW%SMI7dqH4%7H6SCj zW_7}5Qd_pJ5mI>{7sDOt_&p>cpK;sv>Gf15klX%l*Yqy)t z?#=S5aEgldh-B&%s1uX1WvjBhsNSOT5l+%rV$2wa5}>-u=G{|0`K)u}$yK{Gn*j+Lskv+5R4cFDMyT`eo=W|5 z>W$q~)j_E}T&IDb4!0j%HIVja6SAAD4PrQ70jC4locgmVzPlL=ig|^T-QAP|mA}F% z?_O53yXn3M)Z^Ox0#w;7d#q#PW#m50Q8&1277)#mYIX$esV?3vSw;IQsCw!iXvJte zH~g+%Lfmfo?kc;NXYIDQ`Oxn7EZ(h9rREw?yQD4LpZdJ(-~rdP^(4#;u&hUgq3}m~ ziPC>+eq4RO`01S9vjrU7H9S1#g5jIN^yUe9$>w!XP%cTmv#f$zt?{?@H`7a=X+OG) zVv3}$fbL++?Y2Rb3;rNWsKj89+e~*r5j5oi%Ih2Ud*~~y0x0$gC^p*@?y3(OCIE_E z*pic6;N^WcF-D z^*7<6HtsNv>((~a3<>t|hL)yJqsqnCo@n}dEcW7!v^gH9h~dG05&tfXtwEB&in+Ew zsiiI%uwa^7JXy4=6A#$b*~l5+vg8m}UiDJ&>tI!v*C8astEs+!KCU$9Ci05|v0zsE z70c1NkLz3nB0s`Vv|IVsnwU9Vc_h?Ge0}(({OH$lYyi?N*^Ky)tG?UTtWD$k?7PG0 z0~?#0wMCTKexnJE<~0di?!r28v2K)oVESD?y*}PeaK2+GU%zWAROK#FbVp#N&Nx>+ zy!_EMjz{>4&V~(+LTIH=6~2O(_m=bd^j$r7cL~ke=ylV0jLg%gEaFhGrpYz8&kP|D z)GUMo-ktyO@KAt0zJUwBfeRmlVClzUN!h15K4%-Nth-F~M^mMl1rh-^J`JD8ObYU@ zN~;HN6}L8HpgpRgtTkG4g26-7=UjJD*&bEMKJ~N{&y|Bbn=8Zhh5A$@_~+t-{SufC z6@O0u&s~E8|BPJshrYKF0QTqET=f%ZzI=A{O@9Dex9~Gt-kkj@hk?O4LI6m z!Xb{XKKB3!LlyN^Ifj4r0P1TnSRF%s?S4JxZz4<_y1Mvv>U&E+c&11RyG% zq-0)hm!LJ&*2cR(*0B+>+pqIk%k@+j4Ga3^*$YjW@V{Z>w&{}97kZIRD@_v`eMm3!!~MZb>mN9nR2Zs@yI)Jqj{<4$k|;k-;lK$ z8##*!kCuh*SAPE4-lsghaq!*h-R3&9tP=!~a>%j|Sq~$OLo}9hqVFVP@iF6cd@f+v zs;hOs0Mbhk712;vs|c{M@9!kGaIRD$`|TT;r^Lit0?IDWEUMD>&I8$9ZU+>QqY6Cq zQtSE$aib z%XE>^es~)mG{zgDNf3^>6MDXIGD1+9cCSK1ZykhE$<_Um8mcqPcyBo)EfKTvI5Cy- zF)clN;^~Z2aooo9pfU@@(zo4-?q6F6r#4S}jxYrsD6hQ4A}8a#Yuvgj&RW0g$~&4B zxTjgPw#y_`u(g1RchMy6&EO59Pfx`=9pU=b&HejGm}+N@Gk5FJj~qe9D{XFmb^Djc z;{YL%1MCIeY%^3VA8mE{J6;STr#?*W2tn`vPEW6xpl!h$Y=W8Tm z&~W4M?FI|s+ojoqQ$pPSUiY0AR{f7`(z@Qc0t^E|O_t05GP-1E^Jo=L6m_WUN|wGQ zyX5?X4y3AKIxHPPtz?Fd!ZQ5iul1g?L%oH#$q#l~+KbBabiEIKwuDrD+G_-j*DiI_ zYSHPW6wOO^M!bLb8$C0)C_z+`PJHgOz2&`m;@y}I{bY|b@hzbra>lT*{OY!xML_)L zqgdv2sbT0?3Ac|L?^u$8Qk$W3B2%vtS$4%;Qriq>rEmWHj%Rhd7NF76-$^oCo|Lb@ zBZ+&P5@Gkiv-z96ovpI7hU$mG6_12-!7*uk4^&6;*0>rwNGEZpc@oWqGoF_9&wEMtQeC*Jo%RpyS^9W!@%E${_6Eu6*H7;_FIhf{MrOS0>~ye~ zt=2fP*y-z{R5lGCJH=UNnfT-Jt4eOco7;37g zq_p!u+Ev9(IFOtx(?b_7kF;DbeGD~Op!Iznj=+#!!#AJHu@Q60B5=BfdiCJzLL`@# zg`Plz^EQ7~DPlc-oxhdMovipe0Au3z1$(B{Nymfh1pI(!J=wm-Xxep1L%mh5!2`8t z>^&VonIbqr6oLv})N{eW1rk?-aIVmJVxHO?eR+T{FRMypsq58L{2o@1dY18y1iJ^* zGy&WJtt}ywybHaBVT^)d!JilR&w9!IT>an<@v}dy&TqFR(Q={yK`i(wNEKyn>LlLH za8+l^c~6o6SW+l=P#c3i^@{ip!fTG%c<5xPIhC_mq9VCc?Y-_rabt zj~|8dCw*S1QF+XzHI^f+^-lJftX?6dA6|>gObPDeK^8&$@dzG|L*2nY0?I>w1oVS7 z=Zr_)e0Hk@LH;VibbIRoAs}%jhCQ@`v0liGRbND&rw9)DdA%+>xA2Serp@1LrtFft zcDaLQ;}{cW(z%>L)F)Ql09sl*9 zQh}JnDTV00*x6v!cjnKPW8tusAX7X$ksitj%0R6khLU~%Mon9^+i#ElRR$vI9#mQc z0&0&y_=@lE1nY&Q9UXKHm)2TGPUg$)OJPaAdfC_M1X)3O8XY`r>A~<7m@(_lmIQ;# zJsH~Ej~@PD;=@g*;M{&fY0}PP@dO)$mZNxwARLdqGMnfA9STUZIx+T3L3YAwYn>G-{$cW@iu6Tb|<=lP<49 zKeFxB!LVIUa~?YC_)$K;zpNo@FoSc~L~(1lIAUw9PinH}S3!L;b-iC#n4+N>_J%xH zoaC&Sdc8jkPF}r`@aV8fHfxjmkI$-~=HwW0P+V!b;Uu=Y%K`Qp+pIR9n76+q*m-MQ z^EkFAKPV9sjveKnPxNk5&Z~K<5f~hM`EbMKG~wS0cNcmu6(AA&j)5_#{o%b#pv+_G zYh1WZ)~kvQ2Ka7-7H?fwse% znX)d~VAjvyuzLSC&Z$0TV*|0FPtMj?W7Al&bFF}FGZjb(ZZ%d7i^k1XVL`{0ttAIy zmjYKal@}AY+A1~FiQ1oF|0J&Wq)l_>v@9NtUYge&?EM7$iA+PTUSCSxiQh`zxgvU^ z(Bzl$<5xc@S4c0~vMu|Sw?NbepqV|nRR&#-aE$Z?^1}+U;an&cif-tby0Nrz){O+a zmP>t0^89X>L)cfdx}ua<5vNw?dZ~z0ftxrN^Q`&dU(6_Y{FJ}7e<+4hfZs@TtUH-t zmW+SoG&Lneop5-12uF?iD&LWKbau9Phy$0Mk^Wy2hP40GwVU?WkzT3j1dp5BBm;C&qhir-n=9W<`f7RtcxGUr8>dE*HcFE}WW&s4Zw-_e4 zx;2lcVRIS?mt=OLhR?76b@Ryy|E5_XiG|z?>o0F}2|0L~YhIjVl+u3+yPpvjy@n}w znc*uQyQ+x@@g@+%ON*eiP0@9B%qI^ccf^OffnO6XRg9p&_{;oZKDz0HEc;)y0I(cJ2|SqJU`;J+VFm=bxmG!Yt% z*<^aul`jtM$W3D(WQ}YIS#Jm(o4RRfZsMV;AF-1I+s_aJQ`w8vZ;r=IDh>sUv1oJP{zyI#B`r*;op?6NX8QH)piT(n)rYV;>T|@obBAl2qsuMc+U!sa!XbtURw7uwR zlJgAkq#dXZ{InS_fZA?y?L(9ltjni9`S_Qs^noVj%EY1h+lA=gQ(yaQo(pqISR6Ap z0X|MQ5vW$vns7l3srggT0#!@4WkF*c52Y>v$J@NCq{M2L?ayCc*M0dczacBid7uR8 zr93GMT;}FIrAZY`bV`$2I3tDpNKi{C#z;>~%M-1nYnY_Y%(vbFp*%3bShrD?eBdw z%y{9rl<@+Nz*-t3uthN{4MpTp8Pr?!3l$;3lsLuC*$&B;6LR|dEwY+nQXVV6bZQIo-i356IEz@hM^Tz}t zNkJ43$A&&?5oOG)>=Iw~bsOWA2+NFrN~`kcw{y;s4tr&}|HUsjYtXISaA_4DG>=`a z6An%-2U4iEJnJ>&TENhUh~cmCw|1>tvNaZ_haSQdldqaXwboI_?=@+65`SlD)iX;u zvhhGZmFW*RHJtkQdggbAEX2plO5;0&;?^3$#&d6waL+!bGotxcZBbHy_uhZ|zZUz{ zuL5gC4=;dm2C{5F3zv`aEd|%xt4r1yT~>n&|+iaiJ`y5Pg1(1-ade_p1lf>yi?x&^`Y#F^^ChjcW_toq6+7 zdP~4e{eR8GGXQ~g7xTX-<`gsgK67ABMUTXK_OSCu->7$t3VGoRL(l{38lRaovoP(9 z8m|XoT!gBnH}h+pkfk@PbB0tOabs1wwFXuV?u+V2s=IB|K;+eyRFE)W!_n za9SFOQP-TJDE{@}XjesoiPE=cE`aPN(K83?j>c~R0q$fklYky5AzDFI zzCYx&p)IG*RQE$%#WW$v)pISu<)9r-T(?VV1F(um9Q!`P-63WHKvC0#ME@@N%A;5^ zm6CU(WTCC=(`sl=H?q&MOPmbgnLSRBec1W7mt`!4od3HET@*1aW97WCzewP^GRgkV9~bm+@sX9_=8pHkMT#HA=s4<h@e0nI&bvQ1FWhFMXr7H0C!K6|+SCzNyGfwwBde~$QMYxZ^ng!*J zR6JQRgUqg_?r2)`(Z%SDTVZ|5OY=MPH8KU|ps_v`>;sLOO9wWr#b77v7pe|eiFH4G z1?j;30a5RB|Le5fTKDZ@xzW3(7@F{3z;t(V%=R>Eavh(XS>HBbIB`%~jL=uS575Q- zK9c^H_wc@b=GSK9GouGqJXi9ni;yAjTyUOeqs2M}(kd1Qn}KVHF^<==e&Z34Cs!2n zU+3RV$p5V7biJuJ-kmpR`ID&@tU)^_)$~^=r(>u>+^s@9^ss3HEfP2?rkRnDiVAMyNuk-LH zw7XBH&&m<=NT@^a#!6DZfwcjBp4vkK29%GrPO7^@g#{Nco;wB>vb69)`06JLO8Z!9 z-_&&K=zo30tUtzY?m0gDZan2vX8X;ozq|h3KHeuU5b974G+QdAW_`3Q#p5}@N2kvS zxO*75{*O=HpPERzoqsB{zU-M1lJ?W+m?{d3iJ3F;^f363kLYOg#@d6MGK27!jBuBl zyi`M_o&pk+Iga7B6CaT5#Io+^q-4$f^=^$3=Pzs42bPYZc=9XfeH*WNt!mD}6q zEt8L8HM6Svy33-G3Xz-)VNFp1KKqNSY@>>j7U1vX6h5a_QKK3ooJsfv7aY$#2k(=7 zPxyw{52K$0m!<6MsOGq8`>-?QF3E2YXKhAF&*T?{w+5+H_${OmLm8o?42yUV3=)% z|K31&wQeeH`8sVMvzY(qB_f>Yv|qQuSQ+RM8h8C5)!5=>dCbRwlqlQ*L>GY zMb=9hr5{J#U%@>dSRBfm-5B!v9uj-gncv<9VOa8r4cOsq8+CN1P6wpB9b)1m>C#pJ z9pu~Evd2Bp94DW{q`6ypKcqXz@?j|bD$Z9d)RMexHO2Z0yyU7Kr}`gr_YM70j z61_Sh*=SAE1TBsda$*zTb0|h59BwO2UUb4KMnqWQao+G*3-EJ)DUa`D! z0C9xb=d`w9V;7q6>_+RwAUZT~?#*jP20&!_oXE9U+zug~+msQn)1XMpZ^bDd56uM7 z)rW9;^T)ItM+a)@FXoY&_p*S^w=G19`oPP=8$w_euv>XEIFyg937edP8fdi6)IS-!0zcb%0n>zDEw z-EZa3KSEj)dK!v2R5XMF?28)n62p1N(xoXRE$otqOf)P z1Ilg~QB^8!ePSM4T-k}zG0E_~S<74FR&1`r|@|s!H*F+1frg$&xv%$4B7kZR)Gv}@T z)9C(5SyXoB2<;A9L3ZZNHO|E(@Ew`n@;L;WMc&KHDw?7GOgXaVwLR=!dcT3Q@N5M>YnPk$tQL zoJPiLQ*=o==niS3K8WH5i>lnZRZpNCVUDfTz1hG797eqEWvg#twABQt3Aeu~CWY6+ z=4hers@2gxR5Ig(#J;Xdbj}{65>lz4j3vb5W7Y6VA4>bn7bpXefEMm^9lDxS*ilUC zQ(x_1#O1>BWdEIo`Rv*XcaFMob}CGiHAb-tF9u;^lplp?#ed}T!6xU1YBbDQeIlyM z5J2QEN{+8!=C#Zd+-Im$8LOS3O(JebKO~M;oyfknOHq}!bI!25=6(F+~XxK zIgp&9(C?MDWX8hPmfC+AB^r%AZgl6lp#-hMD+Dpex}+w#aE8s0$HaKpFNmt<*K#-f zF^gZDDw~|8&3^=s$0$Gj4MD7ByS=y=9usvWUU6^7#Q-&aQqA`s-C`HpBlQ!gLTSqQ zB_4|yuGWbA|0-K)Myn>?)^ux5g<*~=a%piU879~TBRgjkQ{ASmkNM87@M5L#sNFR% z=l2y9_1LQ?;=g=$4h0h~>nr`AgMyd5%~S8%7a7z5dRW4RzE!O?a5V$jA5$Gb3vpp8JsyX9c@8Zd>!gPun@-qknPovxdn zt_%5Lgg2b&cqee-mkQ6$K?AoBXLeLuVtLkE1a)%KLZ=$p)}|IZ_E|R?eesT{>QxkR zDnNMg%~Z;fn~SzBkRM}X_;`fE9>$h;*}x$$3L`vE|4dkSgS#EYpW`q3gS>zFtzvXr zRwyTf0SMVt-PKZfo_`e{;$wAf;mV)C{5A9JBS0!;r|%zgb=)`pp?Rut8Bx@|$}2f* z@_5hq1z}ad&cZX>AcZf;kSD6|?WO2Q_W`Cjf+MMXef;YCO_cFC45cEv9v}F9NrjO{ zhzvjvwDdOtdacXeisdJ6c!Rj5_>BvciWYmczL8JQLe0e+<=a8#eN{yRb%EYTJw8zs zxekrFB_*&4KJ{}YDzX{Zj`Z+yd@E&0#4 zeCT~&bg|6P3=DTGCW><}Y)klz*GAQ2xZ5odH*(TFn)eKTu1alAGp0bRbhh_U=rN9C z6wmdQo5OB$vwl~ z+KUb&;loxgQ!f2t3&MbI02-kbim(qDNl@q*O>oJq8-N4SV7OwCSJ#J8{}A=rTa3QF zH1l!BXGR-UY(vznF9dIq!m=hgILPz2GF;H-c=&5tDSIOLefD*IZqLu&lMr{)!v89K zEP$ciJnsII0u$iFKlm^M7GX&{+<-;=Bx+jVes;u>js5T-{1x3${FM(2@_}eKjVa%D z;3rslW@ii%4=xQjlhXvXES{uZw|GKZJi-I!!7{hBohH$*$v_nk<-j zCs~+QxANn2z(&d_xsDT$XT08cDr39U^;JY&mvZ^BlxBgCQ#HeWF|!R@9$2g)FAFkH zaLh_CpQ=H=MZdWbVu$GZCI1}Jce?zUFr7WAJ$_%3X9C=d=6$CrpEg%9o9+RdZ|)>V zPjw>2Tf#;*EiLo_+fx$ET-~!^rOK&W|J2q-BHBT~&2n?rSi-_+CEKan;>6bM0r2jc zw&-3S30=%~irrjnEf2@tZYu}qgO_+K<6rV&Nfcm`eS6n}q<>-Kg@y6RzGmpgB=G)& zfKUnsc>ghBN$4SF1XbDk(v7Q{in25Iv{vo#SuHw(_S0*!?IokJsx>&mv5ox(zJfy; zgCtWMUvH=JWA)YQeEaLwd8=X04NPPT!-O%u^OAxFMWO-wy3oY+XbM`H^(sf)*tw65 zYAH;gKVBayGar@MFhyWZGG6hXo{LwiWpK}@Ci;`&pjzs4GtySUt1g@50J9phLpMCg z(>g+m^)81G`|W0b!Zqpn=D1+3mBNT59Fzay%Sn3Fo78pX$Ct)P9;{zuaGlGZG90M2 zub_^S(uZNXOxa_Kg6wjjLY=@j{pCP7nGwrB&%xN-TM&rhXLIL~zp`QOUp}#6%ng-c zyj|PTGU5pOMMTr;&67wa$Uaz{w)Bv=Igihihn!~B)J0NnRc5^zQQs_Fp=f7tD+a<@ zbE_Z0$##t5=BbO@g#IvgIi!kXlS&0_i^JROHcuaWcN^289f17Xxp;tGZbD5i>2NHV}iJ4DnTAQId*1^32h!<}C+^Fvo3H6nHuTGAu3 zX2o?oyF+8O!5Fbmz-y$fKz^aJ>OvyqgL|qzc)<90vXTS65s-$?MsYBYOaH@(C_lR1 znnK000+5FaDITn-c6~n|!<2Z*6|-Tt>32UTZf%0+!h3_%>#Db>-+h|V(hN+vY}Vj- ztD@HN);M<%{_v{>fdJyw$Hl)f6h)s|3?;0yWh$US6@RX732wS7xaGx>^x=OumRAcf z8US|q&&43*2Y}%CP`A{kI}wjM3~S1t6C$>ZuldNKG{3DnFI~d*IKh5DF_I_Bi)0X5 zyiRt}JEPsB{bm^(PvahISm5^U7*%NgHo4hsE_){1k|gmx<#9$L{e>j_}vl5-Bp2PxTA6n;W8wC%gs66Jc? z9!^hwyn3e4-dhr){wXd`Z{R$RG_1hr#&kfL~=hD(G3xx3^ua$9_Z#|S| zU~3$f*7qBi8`4rwh7v!(!`OWd#SO=o%)5m(Tua~!485Nm9qN|I33Z+7*a@^{d~fKh zjps->&o!L9xni}1opG2(1(c==*6xigSV049>yHc8 zk0Gz6&(D6hhe*$g)Bm~)E8IVe;z9YBud$(on6YuK4A)eu(O8((+_LEThw3yr3xtL< z&1hOTl+-FO>2?_Clj=;In6{aHCA?oZRP`{lDxNEzy~ka&bo1C-Ek8$i@Lp65B)KLT zsEve)Mr6OO&4$-%YL9n&7t7}$>t!WprR~j*`4p3a{!A%os0b4w`SWx2wV_&` z9$DqzL-%QOu!nk6b$e2*M~UtaHGK7T|4t%W2)i`CyGe2gpukRGuTFEWEUlz4w8M#- zwX!uFpql#CL-U-EaE})^V<_7O9&Z!*%3(CkKr)n5XEGh@p|5FeJ$RU)0kxdzvg6S@ov&_i3 z>VyhC-7+rZOZrO6Mmr{M7ze2rUn_{9iCJ0r@~tMHtW9`-uGzIJp6%3Sl5tm0t}&RS z5P}mxo17v`3@M36Kc%;Nty+t4u#Q;%)xk{@(F3^9@pn1V&*o}KH6jYyRJ*%KC$uch8mO+w5TSF03?H3o(riRT_^7LO;4Gy@8c z(R%d5?Y>Ty1IP^R-4)oHywh0!T49!u?a=xQ;eswJXOqGm?|p}ICa zW)Zn!#p`2z(1c%j&2JK=Grt*shaOf=RqIkNj9)NK8YYS;L3}b^z|M8t3ZvZ3fpLYp zzbK15pZKZzRGkGE%#@};xRPq*q_egE&6}fG&VXKg3w&7ktU&Jd{hmX<8Ki*A5v0A( z9pHWni%I1@xf7&va*!P~Ibqxdb+d=3%Gzru@^JLN{!y#w1aN5bxU(f;iVuR&iMw;0^OBj%P?s*R|d-$Q-RYwG%X@hjel!M=dkmTx$m*_oLY z8n?g|$bvIx+cr~JOLdd67F!zI8P+i0mJd`UvJHErk)7xj8GJpkqF5ZI;#>Ijt!Va( z1oxsgbs!zlC@*-9Hq$;2BmO?ZsQd}>u&T07sIPeBej4{09)q0gpgKk!VJkN#Zz(M9 zj1~Md@O98G7jn3-U`kJ9?2ha+-#N1|!~7igv~br{arl{FAn+cAoaQQT!zoZ6^91H=I`kA5IQPXmei+&#c|qVb`BXJH0U3U(1T%j z_3OeU61Z#O=&3}#dKyOYf{lZfO~;FjOpT*U`)!s1`Ab-!<%~auTrSkfVwc=da=qc3JTboh4=I zRLoSr=S?nt!Jt)d-Z2U)yz->R&ReJ&I>VWp=FDZlbVFykP(`A)_8Rrg8=j7UnjM-& z=zS!gmj?zxS><6P&l3|?;~TEvS-9wEm}kTF`Yr$UAx+~Fi=UfIPV%wHuvx7*zXocu z{&mfvSl&em{sw}P43VySd~rQt>1R=yq9|0EcIRje|HKRUAOF{3Ls*EL%$U(a^@Y3i zOmYoBT~<%?@O;U2%~1?mqM_{(cQoK|XAh={50}7L>*Jgs<1=R<{;FFmry94?cK*>u zXdL=6{@b8cRiAMKF*S1|Sc8W)w)7Wm%<7YcsO&T$f-4z6FE!*J~2bxhZt0rhM~>bA~8Lbunu zq0qF*2nNprwd3C{b*wi%r36Y=J}^Q4$$WDiJLid@|0`~XizuVSt!l8oF=}rFD&K_o zWBr@T$GA>Y+9K#7)wP5#c76$p4U&!s2Y?#kA1drRmCNCd3(yd-c#;b$>Ip=i0E@Rr3elGjv@D(EJvH2=y zJi8KeZAO`{Zf)&zIr^WV!vjR$2|fBxZJUNxpPsRXN6gkKo4SQI-f8z-o3D|jXJZse zApc5|D`#O^Ig>@|rK>pafyH%F6w}&j>>4aM61W$v%{LH(G3olO$CeIH_K!W- zIHF%{>grv;A;@CM(u*&^FLVQ?Jyyy}SChgcY$NKgL+Bg3d@(jKfqs)$Gz z{h!=f%g-=^Z|{iXf%3?}>y@qMCD24%{+M!U$10v#_(3D>q$lgxYY>+rL?}=;rQcgS z@=$#F+uOOy{-!sAu}{Kvm9!<}#NXKj&)4qjuYuBj z*LqrvpdMR9UiMs%63VC(=;vtvWNphzgcRrI;MngM-}G!Bu(D>fr&C@{uzI^c-niR( zJcx6V_LKEAp^ptZM&b!aZl)k3{YCDT&CosU)b&M(^T+(cQ(XReBND0D1$(k%U(eJu zx0XqEp<=}G=KUZqFG^JvI^Vp0!?oG?wY#K2e4fyPP`E@Pq$Udf{z&TeUP~U^H;#9^pjy4M zUE1yhMK2kcesWf}7Ge#^#mb*=@ZJG(=F|j2f~xgRM}c?L)TALvB};jSEHeHhB+gNOg>A zNTIyZ^<;1KbJ8C8rfAUY%EceQ=g;&ArI-=_=8{g{RP4HveX`y6_-wa5JZZB{1Xlxx zMGo=5D0@g-@)bQY_d{J&N7~_u_QFdN!i%BKY`tVuO^WBpJ=1=*Z_8)d4s!u z<;QbVxS!Yhm|6%Jpz>@6#zn?O-a%GkyS7xSVDrD|eSz2k? zcycQWmYM@ct^};iy(-I*D>Jno_tsP#C=L`Hxd%BAH!eUx^u2q2zyEvv-|Kp>>;7^$ zhjW99_kG6qGt>uvdZs?JT!)(1CAJa!kX{!avw%;%tAb z6u!T%UiJoPJiCiYF)qk+L3PF0N3jxsM@K0AOoA}`o0!{J=OKWNvfmyRRH>%{+@g*6ffW9|QOK2|N+rD3 z#>u;~+;1=1oP9&Nac?4d7fRsjdNG~(?_1!0CvLcZ`bN*jeZBMVSx;)yo{le%8Y;;> zhHx1C)omVZ???a)YPWmaj$_0=?L+!mxLdWOiNeQViq zfqC5koJX3b6vaMFRhnUJui3P2lP7B4k_k2NV}vX?@#MN+yXCUCq1Lq?aiYa~X8&vo zJs1LzRRSQdJ(grXtJe&_AZ`W8%Lly^?^52nB;DlJH5hY;0pp!t9+sa6z*?O{0QI9_ zLg1psFUUoUHW4|CO8j1oE!)_%7w6K^U@eIgU0$8UH-`6(G1`dl-2NJzJ#!W-%g*lI zuT^W5nu14CBf+*rpHMZkPZ+9CobkX4Nkgi)(kiKbj)znnf0`sJv;zM=Sl9%1ngVrfZ@D@x;0vDs6pE0+ZxlV(9{CXG48I`rAuLb+h)EANL- zH9T&z#MaYI(l*nn0H)|yl0?MJ6aVq#4BFFt%Vd`cvu$4C*Znewha`0 z#bINLe!F&tivb_yzCul544*eZi0rJ#Q!f@yY+razT)ac~fDJi_txNcWOhez7>{?fU z!2axWygAV?;K1#=2cRWd5`~I2G=-dcy5F@fH_laDIVB->Jf4@+IQ)&QVgLKh#m>MN zPP#wW3ThXsHci$->Lk|lOC)7zgSPiq33oC{`+Lx@=sMW;4|Y(>A1n5DpaB{pmBD7T zx9#r@M6($~A%GfkkP3}VF3KIxf>@UsG^LDYMLeUEYm@@{TXoxgPXL0)-MOd9mqakW zX8_Fk8SKWSe3q|f(7LZj>k0A71osZfF{_Cb9mA;VTO7>0_Gy031LppN`b`7s8?DjR zCBjLSd<{wS#U8)IBjT)81h~Tj@8TiPM8a#TW5B*aAjI*g}ELlocJ86vJ*@ zx{KDYf0q_Yvng+?R7pf+v(x5@nCNQP{rI3t0k>xf3fR4M!7%qpy|3@G>y1B_8wIz$ zTKPRC8?NA9aeYfSPIAEk71FrL7O`g#^;il~{U{R}2l-2JiCC}&o)|NuRoeU_Ev*_x zsw-biQzrKgNpBq|Gy*baGg?2JGaDYP3VBbXJT5+5ht4+WrH}r-)xhqmm?nJRrWFLV z2L)^D!#)ra-46ksT-$?KY_4e)+hD^<70`usMdhN}l3LN}5ReiO7uFvGb+bCrX#!9u z0QKP3Mphdu^BuDSmW2d;s1DfHg`dj*#odwY6kX+7VHx}#X;`TDD?w&hYPqB`D@tVm&);YrJXtXj0w*4vNMvy`i(4HguPViB zK}#kt=Sfh4e=bEd*xWRwb5Jhj_*z7zJdSjx{3b`_U6V1S2^xs=IyRBJiBQ3epX=jw=_zdVr34lv~Qo@!;y>c z{X6QH++oHfi$-9n=imC3lvtd(=L%<4mcm3j+W!ayIno|I5E@s8m`L|cnBD&C3X8TtK zu3boso7i@Fh!w+VCAv>$CRltiu_sh+%MZkE&d@}?9X(4A{#oClm_yDD99s^R2B(-?B1nR+*fI>VT6|0+B8fA1ICSEMAx z65@61Q)CIs3;*6i{#Vo7Y!7|2(naq)0Rc<}5&z>Tt6?OU%G@aS;C2}zNeOJ+S8hgT zrt{3kQ{uExHT^-=yPg&L_IrHZHKK>RjMROfOg=$_2~!)ll4N-)Ux9tkU{TB;rH1-n z@`+k$OhA!*lUBaG*G57G-UwrN@9ApAm`f8O`F({M|zCO zdo^J|N$vL8cMLFr>7wv6^~~dIkuL~BoMu}0Bie5oq$97rpdGq@|K0rjkvl+<`+YI? zh6A0K6WO9%-7^JOZoAEbAR+_}Yf|Du2%^|hvleXApMZp)=-5x^691jNFz<5betgpW ze~MedP(M8HzT11ca_K(y8a*foT6Y5ucR&VtQk8Z7- zuxCkW;`ly_KfB?X(jkH?$j$7vRDR-)edOpoDO@CmoAS_08aOzssei10^G;;E*$pqm z$v1O}UK1xXXt(l_{jQJ~<02U}4-O`#IKI8+AeQR1^SQ6AVDgJk|KckDX63YoLy?1B ztQ#k+)~Nk%*%7a}X!)i_+Z?FufhF*`mUW<-j4NBLQopbj&{oA-3bw2lGqm}=dCL9J zg5J1AgZUR^mFmFrU?r@5Rim&O|8DM$_bT!hd&{&ot;e0~?%##xHgBDBb2-l{@lP+< zL4Tc1Q4KHmE<3FCS1tNn;5A}9y=fB78_cmD(dSpwbPT#lS$)SHs#9|7CQ9~n*-C^w zsGP)UbmjbtVpSUDQLMrk`g6sSaU<*0s!CVZJg%#yXg2`dLZ0{|39AItOsY|W_Q2DC zaRYr!?5FODa{r*AwT9TnQy7+g#Zp8>(Em+-Io)=!7`_R(bLbcLi60qFR;vG|x7ro> zRqH5A*Lr(iUnNuYr%yTQ-a07L92|#?`jDnMp->%ysTlD3Eh0C(qSL#lGOI6ji zDEqGnhV_NA|L97OWr~5rubeM63&`ATRxOW2f9QVJtg0ae(e;ICHT(8QqSMFq!+eM3 z4LL_RH@w*k`((FEtNua!5|T|Lk<~TK;tKdj8hgrDUAF$D2_7&j4-Q>i<@;Iz2;nyn zPdaaaCB{xWZ|FSUQSk#%SdjkM42AWhfw~*v5o4{>kBnflMyh@b0-ckyiV!v_WV@*c=8SLwlMK(#N5rIg>)H6uNE?x0vI zIY1pBc-|S2s{Xk`*w1;clP4LYBR=gro52U0#b3}0Q16-^14h>|P`Iy}=AR?WwH*+_ zqiOt3e@J>4(vm7o=Y7f_d9nJ85&7_0?(Fww;@A$}Q_^=br61t=g799xE#{5_Lth9= zQsLyYv7a24F%`o5%9&kWED#sjx>I)QmW`CAv&rLCx=Oh31x?@2xETpvO+u5pvmSu? zAYX+Aa_{dBgc1yt$r(y@2z|8XtbS%w41F^;+wAF=lnbr-SAOj<%>H5a!Q%-VeFv9* zB}(7eg?MZ2kgZ{3Qh;u%fYEvBmouS)?`cbR-S^&7l|u2m5x_M{Sv|dnnHGbMko5-) zVqN*H2|NZKtdd2?L(H3f5lIEMuiZsZ;j!Y3k9DqXQD zpyGk@T_$$%cTnY zUIA4*?JA1k_dkFZaCHWEwP3b@{3f_~zWwem)ITDL2w^Ho$jxFnc_j|OjKi$^(J@a- z0h_hcFc;fG&b8!V07n>+QeM}-S1Qj<-n05R2aog-5%Oh2dPil;t$hoCyKo z2W*ep#EeJ$V7_$+DRpyUKO|G5EVp8#0s+$%h7P*UF&;?7?HA3qi74Dhyv8+Mp1U?3 z6c4}Rig?QM1T4U4N~1wtx+lsE(lW@&<~`dn#~Qs|>*I1R?hLKifUaEJkskcI596f* zFhJBZ)5Tz80}*Gt-*AVzG{sv<^>tb|>tY;PfBaQb7Ad*^o88$kDRT~vt6Mq!KQ60Y zsFNQ>@US;8(|votNICP8mvOI8@dl5qkUmiY)CqL>E}@@hI1L)TXbm zC3`^P|2ej{UN-Lq*4aAz!J+;adq$cD(NWb;ICRak-az4N{Xh7o}^weAtEKP+rh&U(7 zFou2eNt$f@9LjzyC90BtSFx+}^u#3v3lR)^c))_~NUY6ZdL3XZYeVKF9@I+PR&FPc z3mhN2eNfhvX-m2T<7W*$9T|ZE0AS`^Y_`D&PBF32{Y%qd zA%^px>qOVpEboIg&f-)T-Z|Epjo}5}vo`Uv@9Xolv^*R3G(`-XuHq9yQLeEw46eah z29~9qp4@=Y@v<+c`Q%OFQaOP2cbVlyjrXzb-CE4%kT}==kTvKP^VQOQHvlLH2)-Pg zft^cQ%ROD@t`bhZ2h2e4#YS1yC!4p8H;PV^fL!((=mPW*#9EMN7rH3WS_y<`W(imc zh;XtW(BDr_0wUwRAK==~fV6A&*h;rQ5h6$FNlF`f>sx{MEB+B6=mf7XG*pOm+q|NG zI6e2cfVq)bF|zMyOYHKNrQB1*63nSHjpxbHt-*J&8}{W;1RRh{69PV4h&cIpcDfF_ zx2XVb=y+xg1TSS5;7RX_Vs!NL+I94?8}TJ^iEh@Dn@SU_lTAa>FC!5IFx*v^$i6s? zj1~leja}Vpko@5c3p@Ae(H$u+->P2U5^(!Z(2u4Rn`*wFt^O#a6^D==xoGHBW_MQ$*^b6mzm&0hhEfUtDKYz6DX7UX6%NL>;1Tj*D{k?n@ zX0@J?R|@d~mA3$9NM$EYkprGzDbWn?33=r~8)O|Dl4sHQmZ1+)#mUY=pMaDAjY`d=tcE-!}s5|;1p zQP8Qi>!Xj!P$c*^_%^0&sO|dP4lVKl@7Mubh<3obPX@R~KA}(eT}|W$d`N5FfOm$z ziyF$_X*wg9KnW8KyA-jC6S+%9a+l>@=y#c6M;| z(yVe8xB*wPR+v1id_V$aVa){t7_p9~8QOSjMd%`VM=rTwN`-`y^+q#zmWf_zz${=@@tAUggPjIB0l7V!rM7q^mL-9e0~j z$eCoeN|b#Q#_Q>8Jh9XIZO5uLV3M@##C2`|NAR$spv+Cc zdh%Im>IvNTde~n%x|tQ!jsl7MXwk4w;@hh_^(fK8kuAf!b zVE*?&e&=8s=KC>gA&zr8WiI7H6&G~MJj#VQosN|L?W+4AL1#`d zV>1#Tc*I%vjjB|OSibe8H`mTAza zB^z!ve4B*-uIr{AJ4IG`q5lo<*|42X%;N0wJ^#|;B1oJ5p8O~d<~+kV(Qb2+Y)ij< z68XwVdSNfD6p80P!qqZ}|?<$;~)ZO2}qB z{G%;3W9IhX{1jdyLv`}{z|XUkv&K4%`L>J;0FHk_bKh$#{>6?jL3#bQbk+=>n&F)j zPpZxHiojI{M&LxJj{#%&F<^w~0Y-?P*qID9;4C#@;e{T??U+oxPI#p4_<$JYe2V^F zvy)w9<^W{V^DKxOMr3h5g8D=h_fM4E!r}Hi&014S{1U|5u_%OHc)Ib($hDr-m~3-4(>`u%$~ZlpR2`}CDbbbmioaB2>c!spNA?K*67Q)(d%zqfV1AN zF07QixpJTV$@dWXiVir=D{JR-XsFNI~?i}gji`2MN7^g|3XU!p^o1o2rz`hz=(+} zi)*EU6Ro6;qMq^OPZ3DB>6VQ(zQNfEaqNZ?p_7f7)()iX&3N=#b2o`*KW~!zgG8B0 zJO6q~PjdIKW2S4|o4p^KchG`})FZUr8*trh38EyhE%Ngsc@kWo;+v3>9=tj~35(gs zUxRO!HW47d=l<+R=&zRBi0nD)Fz3axa0@&|ANAv0aaPlPoS*hxE`-(^*aLl;=Aj~>xZu= za!V%V#FeCn0+Atc91(JAh%LC}-r!um`KcmtPDV#ds{B8NPbIk8KID1=;Jq6r;n7np z;lW!4?^n$|8Z1Z{W09)R| zgHgA7D_v|r07RkE`&YncRY|y>j`!Gz#8u)HgklI{ufP?O&I06ml!@@>= z?oTeQww3K8hR!TT2Ktmlq6)n|eoBM0eBtxB0bs2th}w6vj7KgxX>AwN`;YIBrDtTp zrFP~RLh41Bc_67hI`}kRk0-SEp_|eX zAhfE03>~Vn4;r0-kN-oX1sQlha6Ud3m7EqD2d^hP3^1V_h~lm`Ir|k;jX4022cYOXTXH}7Tx*C3j$2FnTUuB;Z^h=pFqM>En7)uGa<@_i zp0A)pXY8K1T}L2I>O}>8T(iLf$hZ5e=bmIC4O4yfz#rQ8dNnR+Er+@jo%DIB0B;H9 z$h$L?!-=GVG<}0By%uQyEvp0ja3tF%mmS zyefaAJpd0(e%s|2?n2VWh!)!bKtjM=k{@UdjcrMt$O%)ei2%y4di2@Ag(Q=+6TKH79vYcXzYJgPwH)4C0;E5Q1X)O1&(82!&1)-h1tVx`Uk$Ag~f7 zW&c{{@e{o))u`@^VS3v7?+nFhpqo#4WbYn!AX09daK~Ir^F#m&C!RmZ;*c+gJkXn* zm!LK9$WP+=h7KB;+{4Bzv3ts6SIdzakT;9Q_1c202?hU%-zIaS(k%{hrw0GCYuqZZ zj}>Gvgq;iD&K+zG)ek{ACft1v8tTGC3D-Yv zy89lKQc$Jaj~w%rF1|7tz__#K#|(Y&vVhd-Cg|6_Z$hwJtgy21pT2!I*F_V2h(C`N z4(JGeYaB&^ez*oqpX;NK2pk8$%=+*zA7h_=17veaC0NbO6q+M<9q zuH&BeS+6+0sh-lg`ubDx#3SqTybDi%yg(mvuH(s}!*6XQxQ9NZ|%nk6jJN&HQQbdqv+5X zoe~4b5482A6DE}gCq1rTf@QRv?HTG=CUY?%i zU-fLLrHG%~&{~S)c(m>pZ{M<60Fg&j!Uw1(DLQ*zEVLibE)#3F&27*< zHWD54G!SNSeC+G#bzYON6)LZ%YA|n-h(dE3=YX+6nF=lMonf{vxRze^^3X*g^|JZv zEnf$iF&K^faY{w6+;mAluDctQ_6OTxe=F@Vm8l*#J$MvW3t2qkSmC2`qBdtg^0Rx% zro?uyUYPZ30NzJ#sSEZ_u}ng&B1u*(B^=wqDLDN-`t4NRYhys2bAZys79rA$B`G}KPRoX(|w%C z&1{OeKDY(0FFmLTG_EwayYbBR9*?*Ec6*7Ji{D(xd^nr!T)FYv7v?A62!{H_k;i zH;}mY#eQWckBb&*QqrIH`8X9|0f_Kq?;RDY%(jSmh=9A}hP1x+2B4$RB(cv6EuRav zHjZRDL&(^yni)!tgc z^qQ8p_!x>>-;?v7?O1GkcITqf2Vb~b{MNo03hkd3mUaqj2mD-poeHrgs z`l=dMtA+l3|Jyeq)tgX88~6K45e)p4wwtg=-ROPp(3dq*ydF2Y(^eeab{+PoB~Im9 znJ%u{E+UnRRRu7p`5%5MmLmFSL=gGIo@aEm(mS2=WK(#FOu+5wv{1l_SRYBYv0_l0`x#u4m~IJe?$b`1Qth<5r=lDq|kTkQ5gXO7j-M zmTCRJMmAPgpybOILlNZq*f_8$5`!mRF;=DC^Nzo>tr7bVfCyU(^%am=DG1bPu{_iD zE7>b6pv;&2Wf>D3d4vAEsyTx?crS3ln|hH(UvhQ~J&yy_#DLVDgn+%s&kFO%O+ZWx zp%T9J;o`FoACqnPNeLqwfZEnuUC6lmh!ofW(CYgm*@vcfTIJjTa^8Og`>yMI&wbKA z>XeX!a-4e0B(>jYMUC1zlt^rmu;))A9C=qv)GfxWH>3LvO=A#2q8p@k)Zsrn%YVRE z9S?7yy$~1YP09fe&9xKs7Z*gP&>@3$#v|2Rg`3a}M{8SWQ4G~XiRWGkd}(*8llsBc zyV10E7`>laCpS!FC)yK6(6`C!-N6xiCTnsK#KlpQD_nJn=vs$!;it(hXMXDUWK@FU z;b1=`v;-%*o^eax@d>}Lq<8v}*n8cg>uagPbXu%q{8_-g=X&hSn4ycaa%4rs16KnD zp93!m?jE-9oMvQz{2_pG`JUx`_`*se1$x+_Tz^w4!gW)RA2uub;4jmm2ud`%HgBVN z5iKN0dDWSG6V35eSM7s}lgS?<$JgUf{F0Q!$sHC24@{DyY{u z(eTyRxFtC6*0gU(dx}L)8coL{F~Vbd53XP+Ex$ z{uoqe^B!C6UGjADIN#adL0V5eTl^IK3yzG5O|A0o;2aEYx|)#n-qtNucx2pV`*jE~ zTUcAL4EdT~fi>=U=3reZCTb{tUR(Y43->eew<6W~U@o$^I*g)8qijn+Qo?Tu^lmtNCb8gyIk)wc(W2xn?B?RS-o58`V}^Kvm-Cc z9Nw^-0=xn|jlU;UG;Qgj{t|}!QRWJb#8yXkh?tKHZ(`qLf7GUofZnjoSox-JOdCpADq+se_w z`ERKthlyl>YUl#V(|~?$GTF#qS0VbHJunY5+*TnraB4~+jKk(y0z9B*7OO}lSRf=# zer>1?>7f8oo(c$uQhoh*keM%taZLS$?Yswt(qmQzxIA=jvg8%5dE;>+77&n;{L-XS&4DcvO$sqpoDKRt7Wa=p$6Wh* z^R|qxDzj-Cef3U7Qkahk9&_&Hp{j$p%5ETKE z2;D#9v9;NmrMIp-!MgX2)SGN}+>eHdWOd=%G-`whXZ(JSFl>&Dyr5wEGoIljHEu>mGKT=`oNHky`!-X)7 zG6Rri?kTqVIX~PR=1G`6l;5CvI~uG_3V*K_uhz^wxBJ%zw~DS~ff-QLhIg-I{ z;OW_RgU3Xd0OXrq?;-Aej`rWYw_Rs=6?$2#cSwYfF(YG%cqPr?Hw-SK#|!mv>O*_& z5rHj}F~Ho^>)CgY*Q$oV8IOQ79)UFnZP#>y`E&;-*I0N%JLIl#qJ!50bBUuz+NN05 zEjLWncIaNqd~hSauttEfsHjO-rLAx|`BCLSxbQwrYk=HhRa@e(h3Q^$4d8 z4YK>bW<3~o+R@?qrDZL>c)>2QrRIm*mECJqO<#lz_8C4pdEWM^1Y^4HFLplM`nQgA*{=6QxlW09J;|QL2@^Sjv5b7>+Y+aOH9x8Z zM0nYm8!=^PVpB&?<*AijT&26F1jLkCi8DP2=-@TlLfA|Y0ey=_me_m+|Bi=b9H~PyvzxK)QRtRl*fCd=3mGXc0A2?lS_wR-S#}; zh=m9HG%q0ElQ4L8V9c8FMZF@21##!b7aqrYM0OIgRNqVdzIU2tkoDr00PhQE&VJqt z*e=a#@fQRkdk=&#QTluK5V}qnuQSiDL(ibA@_o-DUyP^|z46W4*RsAW5Uo=(IXndVAR|yVI=F6M75oXg@jLVn?zF?m$#TL1Y19{ z6&LQT(?OHz`J}k^nf11glF9nHULP1?Q5s(N4M@-R9`|3@t7C2`e{|sRy#ro*rE}+v zQkdV6#wJp&_2sKcQB#wYqLPl!NaWi(=E-^NiSf5V+oCu%TPo>gmyt@!NP??Lss*yj z);R#^aArZ$X*@iLTWsZov0^1)ilnN(arw1t2QsN|#5!b1!(@kA^weONd9;EWx4j=x z1aD3|8!fkE0`_RF5XJhS7X%%P(LN<{z*{{>FLZpTPxyZnm>wG0QZq0z8`(SCGo&$~ zW^mM(+WVqcpw%6z`ppe>;@L_X*ls%%WC6K5vX@dzJDN23Z=X+ry$MnDt3#-$f6p8N zq2l&#ztz&o?*L9(SQZzB$g4kUVE9b$GWY85f$LG1RfP$MaS>Ye7r6`!M184pv8fK@ zZ^1&bMPclJRJaWc{C~OBEo15@-wgc*CPc;P@Uj!86CmLmrAz--|QDf zD4*q303gNZ)9a@$bM8#UBe~Yg0Jltyl1pRpV%u0%b+AZCQ9e3~@q2}4e7UEA@3u#( zsBD1GFFGGrjQrGv)Zsy4gSpzI`GIpcRg!g|1m@qO-Idc zOj{a4wmH(sd^inr?%nH;&hu`!WK}f#W-u_b@hwv$MQ3X^f)e2Q$ZH408Q+$g_Jyvg z_a@lgJME=Np#Q}o&(ftwWfrSl|dWI zekCy>A1S$(J*OgLx^{EAB4CG9F7PE7Qf%i8jT|dcoh7vRDbAycY;Y-ED9OJeCkjIy zKbY~143(bx2C-6bcbATn;@xLPaj1}T#HXWIU;v>18_iQi6Vi`=&^m&ZVk4;BJ zLWxSV_?w`5OEa71WEsoQJr$V>yIA$38D%}fedORh!;04jAAK~%-94l(t$FuM^u2xB z6L#O($1R#OVFv9DH|idfZPiv?icf4`)NLP-a;F%)$!e1Mye-vwmV0pdn%G1!&3*&P)aM5Emzy#)G?ps z!&7{#0_U&JoH^s~ZqMH}ze(1UEbekVY1V6_{2F9CC#Jf>OP_;`#+ZX`4eONN z4Z2hX2c85y*lb7&8XD*w4EGn>Mh_vVb7754)*0eKm<5IMfmbZ{Y41)>g=gzN?Su+C zUE}!WgW)qKdzh-UvUo~5wc@}_wAUmwuEI0S(}RTilqNGZ>LO(W*kd&7lCn>zKg1^V zp6Jm_OBA_0QFGODm}{K(Z4veRE{!b|+<)BMknYioAC|P#5vKE^)$>7haI%gi6 z4eco$OdZ+&J(3`aj`z0iphX?RNB3CM9Q%u!x(8jcF#G+uj3`10d0aR$bvN*3g5bFL zjTjo1U(bscGqB*@^|~zLZHSA2$C96ao4lbA_2MSy+EFV)e|(>s6!F>ugUkPI2D}T( zv9ld)eoDYD%d8N%WsJbBDt)`VYb`iP;)EcktmvN_!IiG!Hk4%j5{zxZa#xup+$c6QCPM=PM|>(l6}b{#%leXx6v;nLdryAyy6e zPnsq2IU^>aF<%pcjb8_6)r}X5ig%~DN{3)76TmxRJW9;gc5|css5sZ%5j+aJ+ZrZ} zoOv^|8?6*QS3tY?-+K05uRpDH*ytbkjyEc{^h3XS1X72M(xtcOU({^F#vWk^38`Z! zb#&64ars*Cm=|EBEl^eAh&uXgSLF73@18>jY@u%PW;*%r_~G%L=KZ;G_P1VAp>!$b zzFw<+I*xjcq>V-AemI@TgvvB=Hhda*wuyROxxA0)eMGDaeZEI{lTAEVbyffJnVw%G zcZ<>JqzZb1ViE9raO|BO7v2a}NcwFD$-cKyT;fodT!0R(V;*l~p5eihmcQHihrnxYaMaZP+^~{?hN9 zsd-A@_%ebR8u1Qk8+}znx7M##avUeVNH*;GgrS`2`J~FeX4>6eAyQ71%W!ED?=sd= zj1`AgPd*}Gl4W~7#pFUr&?SqyBXAC&GcMPb)aQ&xDsoOsdXm|?*ssut>T8+D+8x#e zd6B2|`cgTVSG3o}c>uG4s5^e_PFAl>LVwU-ThXNMjk}=vC-PcqRB9`!R4JEG&>KdO zDTT+%2)w)`0?7ofOwdNtZJWM>a~?(qF*|&0ZoRD0hBv5i)HEH($rj95oqB_c!ILj8 z65pX3N-aYA56)4=Vw+;nS6!u<1K*?xD+yguvu+)RtmreU#7rTMrt40{*WYILx6pnw|hHz2qv-?x*-quWA!&g zNAsI9d76@BW?#3Ya2tjHPuOcae<&22N=-mM_mgK-#CeKnU7J#N%d}D)*c2P9dgBM~ zwieKOX~il*RBt^>OEzFAcSH2Rzw34o^dfQr{OPsK{NW|>jfJ7|tR=+D1swWZ&#(o@ zd==EX^&1*ZG@c|h*wRk_`Mw#s)+*9@x_ZHRp9h~p1Q(VSiH!s`qdzj|)`fXE^gr+F zEy}pymddF;(STk9>E+K=#nwu6h54`dUIvDhvh4-vR0jj!>4>MM%O)%|#Qxmjx|sVY z6!u%wr|$NnZd*YUZ^1uGB(k2Hq||@UR7(K;D0y5Lt1qCP16L1!ReG3yTc?Z1QClRw z$hjLVV5-%!QO};FmJ(0%vScbp1zO&z=w)uIA*_7WUh4BGZCRBbN6RhQ+-k&H@@)T8 z5*9Qx(n6Q3lte(@@YRa{y0d>~(sh(c>ck!)8X7Qs#0Hu8Gfhdtmc;wh8rT<*>vJ){ zxpNNOxTx79UadIW6sT8eVtO`lDh? ztZjRQEr81e74>t!5o4c}X39-7fo_mv;Y>4^xId`IAAMi-PxDeM`o5wT*p>bC8!=3K zPz4H9WM!~uizzgABWAE)R?<}IOkqOZ4=bYZV48{rA+4}j0=7G)b^;Sp6CX%5bSaa5 zBLjIW%qahxwu2D1p09Aw^z;jNn>=Eub;9~1N6Ulax5A|7?8WJ6hiUO(*jVq_gi1`v z(1c1DH2z+l&pPC%k9XeS(`C{l&MPbv&HGq~$Upjw;qI&B^tpw_gU>l0bQepoY*(M77a^bO$erCE#v} zFJg9biJdNk5jARwwWX$`H}$#giLcb9#o1A*H1M-Ps>tdsmQ7Ek+>SRa*A~gMIoqN? zwApYsaaC=8$v^$&v?AA<5N`)UdOUFKosWWH^r4a?ilvl0pFD1~Iq7v!PF6og{^buO z&z%*AMLbtG2#zefoLKnpwYLSq`|*eU@#7z3Lti(!il=giB0at~;=Xq_p`a&?if#uF zfA2qQe-|tvyWU|?CQ{^ZqDjWX^#u241%Iy>>F}A(cNn9MN}byN5JRvbPISj&*%0j% z%?H|>=z6D{74Ybqft1c)LkSc5q>Z`y99E;mJOXEeuW494J6nME!SOV{Ul_N52U!(t z%Bi@K8t0!Dl_xhSgd^}Z?z&|n9*v}1<4|ma{`^ykkf@g9j5kJH>_?BzW}?8C-7+p{ z1v(1uX_>9gI~*M1sIUDvr(rVzcQMiO?>g#0{+LL4S=0kU%Vk-zs;prK3uDsvN?ngL zVw1GjER|2FZ;F%T-Cyam#hDlc|y zZ-u2&_BmB6Nu8fC&wd6zkYzZXH4~)R*;_81FtEo@933vXEIJuxG0sb#if*wo{gJVL zK5Vw5;TrF^^)N59%PgfyA)fGHXm-0^nM19-u=W4Hsp09~>47fcleT;b;}$<>Ym@mgEbSizY(6NMD<|OL^6tlzS~B@|BA#Kug3U zNbss(zsSYP#h6pP$h2~KDT6h?K@OIC2afwW$O4ZL0bAgAfCqktb1A{dfaQr0`CS!) zBirG4+@u~`@2+3z$T{$Qxr=CGlkBo)RBPHd7_ZqLkeIpmQu?kfUb@0-4cO3;gd^L! zWEgqpl$U__YPOWObXHK~&BC`nFf}{s>GE4biyv|s@x7mWq~5qsybTtKrmTvsB`2=H z9bL$Mb|#3GJxrhHENbu1tS_9#QOn*)d zjjicQVSDykAU6T3&KcqbSU6zfz+r=Kn@d!myHKg=c_~qWyTJ_X^Pr31(A^u+&=b*6 zDWm}<<-U(iL-lm*;yZRT=_fBk7L`^TH5$niDRe~Iy8u6AjzS($?!a19d(w7aHg%~m(8%T6+ zk55>r5SB+m8IGWfBd%}*hfG!Vlgz&_=D{59C#n-N%tQSK40BpujuFxv#WA8+w_?yB zp(bof95sh|dDzUxeUDfdp#x2j%GtkbaE1Z7Y*cn}QNXQmq>p>Nvu3}oFQ2K=(8*148oYGH_g|C-{`HU&Xx%xS?Pk&|Hs+t~w6pM_d??#U4thSQqw-UbpWG zd#_US8eQ@+q!XI@!a1y7;LX!gA-AV&-nzS&va0mJnz&^390Py(P{twED^3eZ7_a@~ zN_gV9*l|IU1qd8)8E<6BjGRJ2y3 zc~eb+h(~I)D{HYK-|v@Op@uf|u9+=%Q4-dNXKS?nt>LF_(>7XUwc8*FTRNPf+EUM1 zl-SS!s5T&wRBT|B@(i4*}SnX(YtiiImTlk6`;w! zCA74K31x9i+d=iY8w@bINXHA#`AEBVCY3R|Ui)PgQH8#&)7T)b=O&lS7k7 z#e0!FpdT%6Vqke{L7h2NBL$Zdt#h^)6N3xXg;X)rMC|9(JD+tXFkaK0_W^*0ItQ+? z{d?1bep?U>=@{5_uJh;9^{c;P^1qvWOqw{%d|pKvbS&=ue!#oH;$i-BP(knd2-s&! zX{0D7W9_7idH(Tr$N;BQ)Ok(K?m{a(qa?#uzKoyc@Hkz5-4q$b3(3NpxMcM~Sw}Fy z-vtO!D3g?CgXV@Q?8@TP3fz1kxHAUb;V`X?^@(g;b%v}vKAvNp-?G!K zKtXS_G%ia`^t27tcFSl&m-iiVVsfBw!H+IHHpI(LCI&ntnGS-`#K zWv}f?1TkYpepdrGAnciUdQm<<%}|Z$&${Uj^XMbde%I>=s&?Bh{m%>%VngQOsCO3W z6TpVxsD5ajPhL~xox09o1BGN}Z}KlVdSfhwt(-9>hQ2%=qk;{g@?;64MjVRM|B&&- zFRtflbjmeb#=Mh#wQW}Y3RU|8y1V>JH8$mQ*+{UumGqU_9B%EPk;A?>2V*q4W- zuYJ+8Eb*F_RFEph*qp!ECwVL8(`|N`EBr}UeKQ4OyFYPrZ54{9 zkM-#+x%FJPhvxYf9CmI6KPH0mJj(WW#WvPoUVh;j2KLZ7G%g*ma9WY^1tfB`QEjc% zh@31uR{<+5=@0tO_&SLDK*=2Y%wFXo563|tb6=E}dzqut`+RnPDz|EOg=u;U z$1sy$!bN^Y?)~p>TYtk}>-j&i6KG0jX8jqdtok#NBxM&V^njP$g8Z{BK6a@rb}?4c zr#Y`+F%XVJJ4P|w#;NGczsME;l-`aqPBYB5A!5j`A;JdK^fwAH5GLh})at_)S?l{w z5bOK0u@)E20pnQs`j&U$>#4R{@tlrY@fKM_iD!t+_oI*I)(MZNQ-fbDb+a5>vs#NP|(L~ef378Td8G^$A))r`I&J{)ty?9uH*v_K3hwBiHUHcVg`{VU1`;>!XILjI|l1 za0oYt6pY$CT7cTJt_yCnQx9oU&YIC2NX#xn^A`_mn7m^@E;pJev0uZUbeW{TED?3j zZc#qkvEVzkMjf5(MWwE@q070*XFIL^!P#Fe^DC>5`d6?&`kkgQRR`I8irocwaTmIH zn>{#stnhQ2)AP=pTDF|T=)tQ(zCF7hoL1`jwY%0|1&K8BheAKwj{`a^T~HOrA3~cH zsaUj{+#fwZi!9J$3ldh+2d-d+7gQL;ZMQO|t`?3!Yny&DBkJ$s2-DkR1k2SisK4H0 z2BkH4N~!!b%40U98n&{=aBZx*zBhOj!|Ou8<$>txCy6T7c7e9OgWYh#y1`iq|AM;2 zuWMhn%^gqaXZ9cuUM9P%dMTwE>AqIOS8~|~`=P8XX0xhBS~Xn8LLA&aqvvoB>ax5_ zp5szIgj~kmm$J?3`B^OPOq?!1eF+dGv|xFXvV7%oDSfs++E(kWB7RL^`@S>Fz)HaU z1V^^L8-g;4ebC1O6M?WQri_I3=ciW8rH*4gV?zzTqilG@9b6w5C@9{9*;MKV*5h!+ zmRxQ&W(h;AN8?i86X4l4$VV~NH3$|rkCx_S6Z3N7<+jGqp?UlrS**(~sda@*ZH+O& z?tNJ-yO`9fR*R>{4ODH-MGo4lM{1rkMl}QrCoi%notyUQm0q*;GstxMIjK#9=h=~- zV{Acy+-@WM%wl?YBlTB|zybW`GRwBsf;FNHypk|86^@Py*fHl*?Q|7I5lLIs9j+or zZ*sVeoS@jj-IeKFg-KL|_jQ4FXKo0qSDl@aon>k1Xn~-eOuBB57b3F)F4viz8`tg! zkCRHmX5CAdc-mJ{(SNO@_RDK6Z%GJ_?PI_j-%~IQ{yc}9Sm_}4*`XCo--{6|)xngl zzO*-ieb&bZ(}x@%iCU~`*~wU3vhTM+YnGRB(CDQyd-F`0saWcSO_s@b?(?IRu8tI* z%y8l<#qRE5~mo)617v_~Ws za;k!=BGk~?&~rLl|7uS_Lz^&B8N<31kk<&#vfofZTbmXW%<51#GT?mbHPIR2a4q(; zMCGMZKKB+(DXhO2CzBnK@2NJkerF}F78Ye~39R2Q0xkb7FU%*^rTcaNZ{@;paxf8i z9@!EpcSw>fxznJ|N5NiC>Zd=3zx5tk5riZ!R#e3ZyveL`opg}ZT~rFP+lsey^*M@E zak)mi9AbB#T|i(ZJQ7}hzbBO1s*1gugitTSnv`;FvuFWb@vHRNGQ_c94@H<3apMES z+<7Ld<~&U5lElmM0l!zj52ROeXwA(D-#}P=6&1JNu_GNz&TP*5#$_$gL@i-14Vnqe zslTE|xXNQgBw^X~zXJ0Ntp!>-v0*@om_ijdT~JpgIXPL21gP??105Lt^s$FvVdE{kBrq^a2Mv-l0Q?XTOXhbWHFN22KfJv zdAl&-GXF2r1;w`7=f90kdYrfyuXkk&{Op87 z{QO$;P1nY8eKLB7Dl;M6auq#bcO+2uy5-LV8WbqjxtDcqfWODsea&UEbIc>Fpa_{? zU5`W++{u{wG`c2?)5bZHuIsqCf?I}?U+qXoSLAEfwR*p)^LA?E@9UMuzGV&Su9evv znQY1cJ5>VVJRJe7&BWn`i3;k6MeQb3oNSBu7z9n{sRWmw& zB_0`}8SRnDnjJNiJE*hHx0U0{OgT0M_f+$v1us`?E+k&yK&WRohAKXbhf1@WfHz;C zW&!_kWPpS)2a>Sgt2)`qHnSouY8;FAH>v{1qBNC;>u<4DE$MTK6Yt7z*Q_6}5X+tk zzZMy+%B+M*46gh=sE*dn;+Lm}&ret)iE57CyJ-i#sl#ky_sY0mowms8i7+dwnYyf_ zVMa#8Ry@mc%JUN`3D+g-;@OFVBmt4k8BYJUTe_+Xm7vVi7fWn>9BOHQK`rc-sJgSz zzP$h#B0~w&`5#xx`MR#+VUR190U5v9_z0t@-wAndA9h^@0)>$%TL3>J}Wmo&*CM`B;gdp?00NeAUMX1OS`5DB`;ya}? z&!PE{Fj`6DF+aRZ=oa>(L`Diq^r7tF={1`&ir_kno!3RiSx$^2h{yFjCNimMTACT9 z`l9z^V+@UoOAPk&skMC1{N=Y>Z$mBs9X3whPyc2247|s(fxYBxbzkj;k7#LlsCV<1 z*Rn%a)QDY=nN`@Wn`SRB|Iwz^NLE zJ*?|#&omrG9R@$&@`#v}KP$DFcB)My5f@nQc#&i8aZV)JEz>A+nRx>H-?ng#(JVcK z3M0LJzu=ePH@jl28y47|4aN?%fp!H8?RXRN)rj;Q92+&_o5$ngxlm8{-E5xS-+VH^ zzIfmHuJtLMgHeUki$;(Sj`?xAS`&jIv#a3;6kE9UZVSR#asl_<#k#2{R1@oxpye^W z_7j?z#5?}7!_(smm=s6R^!Nv-DWf8*r~`C?)hu^Q?>CC?Hf@IshBdBXZ+|2c!{ff8 zY(&HyXulQq)i58)q_jr=0;Q2YYxQ3Ag?-U#k!>Sc)JHj-L8<1S|Atck?D0>WFafUy zRrw8T=KCqfq6cePYw1r2WW8^VXrrC@`r&`i_`&_U{&SuZ9cW%BX(OSy4G|uW-A3Hu zSMq5cqzvl&|C5YnFR#N3{)QPVQaP_)e%gFBc1E+L%DJFXW4%KE+7vCKYJ}iMGyRR> zToAq7=KmOAi`)U`%g>!4hR*Bl5jAGxP-&tq|(A51cqTIQQ=C_0VLO2`oL`H>O;TNbdD zjP)Gj^WGuM4E}Ay=sFIAhYk!0CU^O>J(S%B zYLF4GFK{ByMfcS)nQ_a+q};4-|I5F8Wh`edLp1O~kHo*dOm=^Fm%e~~42T$vOUtx!b`-`1K6xOb4ffyit0 z@2(B@)Uw9rHSr_;EwkGmShMcyXUXmGr3ub5NEt&kfwJmD-`JxtGvN;d)mWXVvn9i? z-!x)$Uc0_STmF~}f?BQ?={3y;4O^6Qv66>7TNl`Y?WaLJKOqK>dRSpJ9v>XKmpkzr z{M+ssRNav)X3uG~y&!dzjTxkma2|!}z1+D=e5g9#b@vxaR}s_Q@nO*H=`ZgHlAiAP zNRxg4pUxv+WANH&G*IM~q@9}$uiI6oFWn;u)W=Um{PEhz*%g^npI2;>&8w{F=aM*| zAja(27u1OQ&g1rl8%|Ilp0jaR@AH$l5f34$2k&woE+a6Xt|l7~+L?!uG2ElHj~o%K zXw*H}rJ;m}5XGXHS)OnHv#~){NZ4V58VjyQj+@o1%p%Yz-4IDUU61Pgb;? zN9VyDo8(>eMYCK5;>jMX`ShbrshzO| zK3XrD_$F9Sus4S7tI_Ci$Xg`5{1*2JbpK)<7>dsV>2gIsREh5W3ct6TlacBNuLg9k3iw<3h9eG!(qb0svx-DDK_R9T9%Q&0W6T z(5=&ekwZq=jyZ!?O)I6Z(tgS?_v84okMWvAI;?PFtgv<;_1x}xJ5}92lJCI>Hxg2)gn>!Mg`5lA1{@vP0<&kZlf93N(Uz`_)5PymP6@rL z;j~&CEO$;v@R>*&03b0XLEC0d9|0U#Lk#6)bS~2SD(V*76*9|js|oX=4X-~g!Z!j% zvBe~{AMvXSQhL?@L}>(_dntb#J0<#?k-g>q!>*kBa&efJ_G-~=%?C2?md69eIjrS- zI|m*NPPE7P^Y)43>l@UIi+3%slgFDi-hbs)wb~r4s|dXqeGVqRuO{TD-kCys(;ioY zcl-FK2!XD_y?lWlQ`-rUHpl-7uP7%^^U5zxJBSEOE1{Ai*n|#MS|w0(Zwt3*5!=Ck z{x{3vy~!ZJaxja1*}oHRKeCfzKe2V1G^^zJZjW<^bit+ zJwe@nU`1CBKRSjUdCGnIi-!v*8&H_+#QJ+QDPR!_X0?@ztTx4{>4-fAcR?BzXKuUm<-!6sOmiu&&S$dbQ3 z`rkh|vugt@Qvj|@SpF~II8W$0zOIzRP zHfT@Xd-q;b0kmQTj1-PktMP>bWHH%5OFThfLEV!pkYj)^3mG&pw!P82BWY_HWQU1$|M`(*QBO)1 zi%MOP2V!hx5V{3nL?`O+rJgzARvT+B8zVc}q@ZM$Tb+J10G;)e`6uw0rq}A&Gvh*g zp&b)c^oaa6wb49BDYDGnZf5|8ju>MLf**FlNZ^FvbRCB!U7AgdqW^k$}@QfzyD{*5QYtFVkmZ zZPh;w*{OfBNgXtB3i`eC;XMh6X_0`KRvQr0Y6Hnr93H#O_n&IpSIFtuS7?zHHgxLG ze2S4p8#+PIhO)5}Jm!FLEF1%;AD?RT*Usti*KU#3eChBbOw~EOJO8(W^A=J}^Y3$znvW$C4w2b`%ym`X1o0`9| zhwV<}cr#^I3C+5XKmoCMm`8(#}UTVxegXByM~vb%9vM`(DE&hS{jF9BKv z&sX=o@k9OS=b4_^CEG|6FJAK=UF>FwLaBWGx(O5pqc2suS@7;cv0|wCQeWnVm6B2)KO%a zB?(78wf#}*gW#9jeBK`TM|T0H%R)?Qw%-1Wb9TPdeN(>Mz8BGMq9AmVC~E&jmd*Z6 zfCzkKp~{?oey8651E<~k{BUzYviGM>@cR1QfQX(GLEb|GAM@KZ|B>y3VO8*on&qrV zrX8%wY9!Xv_)asyueAo#elm?0gIjMdRbCI;es6|@Wt+QZV9!k@^NV4?o7%f#bwiYr zHw#5FLgVM!j61ca%X|ZMaO);XgXPE1k6MmQWT%Z}>TPZnxJgeOSvq-zNP{-_)QDa3 z45p!ni@kR`5=`C zp*t}ji>i3JMNN8HRf0Y}Q(LA8FK==#GyZvr){yNI$iC(K`p3Knr>RY2c^B*~dE*T0 zUf#3Z+6Pg?g2h`mi)>~Y1hE?}9{r?WO&3i(I8Baa^%-&F5si^P7OWsqOyf8=Yo* zPmNX&PiWLt%Dex`ye$yO9zY4l#9+ zTIy-Rxm9>1m}W|C?XuvXHXKV%-XYtXbJFv7HO}b%{j)IXt4`)k%ZAuq7WV6^BZjF&@!b8<<^t z9n?1g?FZ+qO+)1^JFa#P|4i601|{_Qs>NFrOpiMts4pi^t8_JVR%~y7D#|93p;%)~ zoriLb9J$xiT?}edn(ROLT!>0WJU`$d6%{pQh>+FFm@ip~S>7`X2jnC7W7uHG-qa#t zW^VB%i)*X)-hx5Ma}4`Hg!jsCh2hAF8?BDU(v}Rljy}H&L2(xJ-hGE^Gh3tu#$#vA z!dBqaL~qrWZj&`HK4ng|(MikVPLBd^?F+5SyCwmGNEa@JdFE8W z_Gyco$nEVzV0`TbO%sz<8VMg*>a-lqyx#ODtqARH$e&m*wr5!BG!Gy@HD)*A_F9j| z67G?IqRW{BVm6oRFW(_=-YJdi*l#{(7rItoj`a*tNicAeMZ46&Z$nM@w;?yMSN9DxiXa1prIxzX!8esf^n(k*?oL=)%yF0)C)y?x(7?vrpvc< zv|#ayGlcv--aVmv?cXiC_-IpTVjz_mF=i>PsZ)ASC?T5qZu7bH*TT(%@&;|Keld#uG=lqWNt*F6e#WuSxgb<=w|dUnlxkg7 zlxDJsDMxM1H5{n4(ftfi!tnIaf*hI$FPv2Iwtgf!F4YPdTSr%Ih!aN%;dL(;cleG? z*wwEVZTS`rz1TW9_hP!Fn;um350oW8mnmv%>Spgun~AnWGP0-U_ZUr%TM)q>KPf&G!gI*VC+}Y_mj`po-9uLH95}DJeVLz)ypcfS|`s@#Gen8>l*K zYE9vnQaabtYRqzq9Z;oJ45M9Qg3K9r*&M_@F)Xwb2M~M3+U!CgQv+x17*Y6U^J||Rnv<`&? zB4U4BMhWSiQ+m-8*Y7i?1aCqIZ7ShtQbNf{tw&!gTy@LFRt}zNr)Pykr@`O(P>(_z zoi4jjU$Mv6q4@1}=ngO61=zfd3y2^+Z8eTnyMz}A;oAG(obW;Num7%=0EzK3Zjy{$ z>Gbynaiv*H%PC9J^U{ff&2*W)FGWp@`Yx28WmW!3MN(G8*kg}@q73YVDyy|s^OL2o zlVl4;`vGMGkIi~gDQb;v^h>a;!@gvLw&uiS8BqUF-klWpT7qpv3E&i#qZQZ^%Zx}K zjq8G=nl0r`#D+8&LxSjCKc1I7)hL|L>f0R>aCKxCDX| zUmdTyh$@|j4cigxCvs5#ZcJIVJ`Fi+iBy%tWL+8GGMowTvmY}a2_yEl(qx&N@lB5u z!paix4lqe`$vYXZq!!w8TY644T^i->x?F^Pqx>>Q$kSb%NWXKmQK<;XFReplIOji1 zs0&0p*U7W#pKdbB(*W5H+nt{O5CP!5u4*dt8-5YIO;hn@Jv5yjTP^d4esy{w0^8zd z=8M@j%EFwTUE_|J6zBf^b3i?j0=@0+YXk*EKy1|KHp=pxFgL)#dOIG=23vNyV7`-s zy6c_PEIJcUNUw0JICG?$6E|CCEcvzweTL$>v3SFmKvYa8Urctqqglhvz__i2=U-EDFR$~l^(SD&g|%H$sD0uC^32KWVX@fSxjz+_sIZTT*i~lwH1q# zO^-G@(V~*#iU?%YM&&gN0**z2pqbM_I~%$8(0}8hfA&3D!Gu6O%ddr}Mu>VLU@}g* z%t5^WpNTN#vbi7>)3+~I!VhinL`3j*nv|bHo8%bG29@Mk2A2H7-*0^3$@w7KYRx{R zxG1-?pYDbCd)TPWz`eI{e7uXHJmshj5yRfovW)2z&gMkC+{pN$R=f$1yFC}bK3+KY zCu&0^yY;P~@L(jvraZx8(Kxl1?2Zaa_dl9)%2pB>kiu~fL{dM|l({5`7>D1hdB|T( z>5W1IhU!MWftG*l;}Ert1x~2y2H&`^!Zc_-?;H5I)fyEYI&yU14CH@V?Gt7Pzon7$;QJ_xbmW(qm?_ZRUvQ$~Ck1`R7TCCs-5L{Q^ zCZ5AR=;U)pq;D)1)S#c`+=u?KS!QuUnaHCjeCL0Z$e1|k)lEgAZL5*79<`bKj%zNw z=&xmFvO88XnOVomgx4`@(p~ibBpbMJYM_=a_%z<4U$+dI5R5WD?vCx5I`_5g$)J`Q zd>n%p?^$n2-j!8PKX0DL!{1iP1uTrYTDI2jIZ@W{?MP>J$ZoV(f?Di)(CGJGKf~q% z(uU>((ro;XZlVAKWs%NG0TxLDpjuLRm;ww2Je+j>*NUHY*7K*V>IkcbHPSxERx1L* zCbH^KEBY&O+R99&^lU&0aGet1I`vL5cIJe-CYyo8=c2lnS`Yl@4^Yci>e;*;gY^-- zgZ0m~+79YgDO=(0$F$!wYrZYlR!P3zLZ@Oo+;@@}4OQPWPMAA-CSX}If27mR8^*uG zJZh_AH!fOI+k;!GDl+%Hcq4;M1LZr%^h|G~NQP~O?%uW~3x4lqW`;)SjP}{sug{|u zWKHvwFU4f~&%RMP$(ud;Jl@+#y&^QYw#g>aH>1IatLP6p{)lBhn?e!H-r+WNOUa;R zNOK@Zt`*8iHudBfg?4f-=-U$tJ0hL$Rw-(Of^r_q}s zd(@1Yv{m?4)O2~{=Es@yWdQ(TJHc)YcMptz&vSkKMt!%PZs}2&2I(aI=Xt7kH1Rxq zA(DB%t~D57{-(XDqkkCGcG;Kw&9f^_#V=c7o+Pll$^E)ZdFEhs9vQI~wydyoS0Va& z+iQoUqTrcl8vI`5iF7ENMag7YcpRaot+q>e?^Y_vQOQoOT zglhk<3nFyuhoyG+2y5&*xF#DBzTfO8C>7zGd#U@_;lb%g7Y3|YXF?xtji=kK^ai0~ z33S_MrPg&>NxWn(cGkLtBwlZ@#Q%>cXUwv-)pCSSdZ#M=u`3l^WT{G(U^}=2EFJD< z8O1oO^jtU>pc%oIN-~CYQGcL50KOsR2FhPXU$%i%r3eK(boNgR@R&C!-2~xv03U@( zt((B0maNll{6qAeC`ZXQ{$STxD>)M|KJTJ=gWe4gz8CN*fTseU1o;2;djhcE1ndX# znK$f7gYb@k9~=NJ9b7W+qy7Lb9{ght+{FKfw?sJ_VAQi+f|~`}N;SKvb>)ebtW<=! z)Z&39sA0I6ps^;i1b)V`&A)MnyxqAZ|E%wi9{Has`Yofc&i|p>$usTEN1=gH6I(`3 zA49^@C?FI3^N#-xe6k`k3q9;bpq}iZ+{3dDivgAaE~fzm*}4DlJO^otgZafHaWnAq zUvz-^@Sb;9j8q+9yT#k?yWai; zP!#PT_^Yt?;{(Jd9Ou2zqhE~DJ?@V>O6NvKV`B=@g4>_*JBoxPNGJJRB*AK7_|Q+Z z>0#Vj*wFlMS>yWc;Ptnkf-}=TI(g0D9;z~bD@>)9PU9}MH>EK6D^XD7LJIK=0}%z@ zV38o;A2~x)58RvZT{B#)$4jMlK+#mOWX`C9FV%{`V&ThWN7`I6{B;gHT+fxa z$Jty~jFeYz4p!!H1?Qih(u0)eqtVFfKe(2EItLTfEfv86jM2`d6KqKfM8M3+WkpOs`nj^5qa>nkE#dfWCD4Hj0(EfTC)CD-vCd3^=NVtMfnI=09qLI5ua)0nfdh|miBskz9n*PNOimaDPWxOPn9hE!Ds`rZ9J_(LI zETOCkAd*k79ery6r^0OtJyjedJ(tW|A0HWpOtz$;!D;wwEy0qTnJRAd3XyXNt#M44 zcOT+FwddEswS>S-)FLBsu?ZoNrN32F^=Cxl+;C@a{xI;bFu$GKJ(?=54gZF z@GOaU;F*4bQY}UDb#G+CdoyG&q3*}F$37^%qiG%XhWA+4+c734q>bc?CA`}#_MX~m z>A2;V-Q@#$G!5lR>|iQD%%bncri=iARlD=@1*r4#)#dOM4%kpn@)N%BYP#=yAEdyI zQg)D9&5YZ$TYMyTNrZ#8-#XBEEw;{LH&fX^woYOS5d{4qk3M>g)EZxq6^-g!fT{~t4Eu7~BEg;IBfaXFcUM_h1V~YxH zV2p12llyl_j6XS{9+-ugu~7tr$Z17(+4%g|A(qVk?qZL(Rf7}Hsxiup2#z)JjwqG& z2C3vZVazM`?1^0I_y)2f{UC$gzDr6}UBT@_A1ZC?q-NGH=-zKg@I+0sA6quj=tIt3 zveBTNhh&Q&$ASrv$Wn2>w7MBx>^U(07O`}sy1pe$ZkFWFWqRDJKSjLL8SWoZ4bu%8 zp$OY?{$qW0{0`)u!V`1AIP5q-^V)G%H|#6jpU6l97ceskj2u)Rpr=u}NAM&bBh8pbRlFDZnCw_;NZLV{B^qaPbr^cbVHgyGuVhELEJcfz6Hv z2w+@6BU{=F?@;*&K9``Z=#^W5BIT%;$CrA5T9esE+n=nScUjre9rB$wgc3A=?C#n} z|3K{y^Ou$+46p^!H zz4&9OLkAXM`!f#$_WS%q8XFza5~zKvmRZgc1GP(V;;ezR6q|>)vx>j`DYXW=_9ZZc~(^idK%89--NLs*%^SVNVfK z=1bew;2r1#K`TgADDRK&;G0JgZP=HXYm3zf z0=%-3W<4#;698R4mHp+AnyL^yG}Sw#?E}qYmonAx7tB_lS#DBCu=$WaX;UhQzThk? zW-_4J{CVvqDb+hHjhxlMzFF_1=zu?GZ%%#Tv_UGqNce{DewS-!x!GIEsR9OGMUS(* z+rJ4mmf6B>qTsB~a2vR$b0SMR)i7NU`w1!xw*gpA&C)wBvg){>-uCkeNMQ&>qC$#{ zwprRV1b{p9AH>)^lg@zqT1cbT@W#rdc`?|)4^LW(vxjSwci3Ic-l3juNaCzC;;W_3 zl*Ves+r8?x0Am~2>2hR^hwXW`-$rJ^t%0}rUX=G+W_QFxZ_jC*T)HdAv?)&YOJ^I_ zmj32R(`Nj*{WU-1;%0prjX9k_u#1#Aw2FDk;K;56%g-<~Df9Z6X;^eiWAR4x6CewD z`cBNA6(p$$@$w9u<*d{a>qQPY%jq5^J8zbVz)etk#!c-Q6@yc4f@0$Jlw`-gx@)LZ zIB@}ZXq1HBx!i?FVA4;N^^0w3aJ}Q&0Q}4Kx&8aJ;6zYgulzK1LWTN4qK{aaka;Q3 z+l#-b-tsNuQ?$K5!#5c=(Q$Zyo>wPh^UwGiTmH%vHoaMV(ifwYEQ9g1Os`82HCNjnI0%b14#_P|azto$RzNExW5BOg_P90=jpuDL^ z`$}rCdhAPQ{&N{l>`57fRS~DFuCI3(OV_MN#SBLOwedCRg9DkI& zd12aW4@5a_ud^Sutu&zWzD?UXxQ~sfE)UZbAC8yN>j|#^EpZdUA3nG0o+n@4g+%&<5D_j zxYY`OG^yOx>UzP&-_&~;ez+kQ!m`eiyuPV)O$xKX+e~=bIRe`^3@iczee+5=#&iE* zO3W|T%=m4!HF?+~vvJ8|S2gI=7t%psLKegXDlR*?@ZR_;kp1kaZr6a%bL<=AJJ*H0 z*~t5ZkOJ$BJWFof^Yvc7SU}xa|GRa6n@Of*Mz5qM7Vn-5bXxqLy2_I421Oq~@VmuN z-L|ytR|8P_f1sJKZ+?~`949kMu`UA->V!7|THye)8!Y>okw#J=+{#YQ^hjK?sN3L- z`PgW?bajfO1^YghU*N5CTuCdT+y(!bTM|l-X4vjr-kVsKm}6fp;yVuRWu%nmAun}Y zTQyJCe7qa8oa5E){_|^gf_pR^6Gq&|xKCXhn5s5StrF>p>!5PFSiIG7S%0U=9qC(P z=d^a#!BykuATDsn%4N;X!rm4$K1KI{;m6@1YV%}Zlt~R5x^!igQM=pNL7#+6>Ax@BIY)lWj$us!<6J{^aC7P|aB(MURRxqawPnHOWW->YNRaC+PXAS@og zmPyo(krM;;_=B(4-&(jtaNh+MTSowk&$+NxCC?~GgA%W+#V)lwG;)JHOF7pFU)jU^c*vLS!qmqTY$u}Knk-F4IDAGY%SvCR6UsJ!oFOO&hq~qV3jkrR zPkUfjo_+>5ZzMv6u@W(}*6CjiUZ@BL)a@bb^oqfFDF=)}g%?gv4Nwv9Vztd4P}$}S zYQ(710+B5CCE4{a4acvnD15fcxj%WiuP=f}&xNEdgL2O?yksue8%(QmIireOhDa13 zGy`Eff4P_mJ%w!OiPl|_Wz#c=Hk(0LN0b-rXkIeb+!Lv{e-o!^NYHK35bgQ4O7rbr z;ZZwk2baJ7ow<09n1%>@k<~5gWS{bS-G7-v8CqD#>Fm@=NQe>!Gq=gsrZoB;dMIEq z^g9P(ZUGc>N<+x%Cqt?fx9J`UPlC`^jK45g+;&tiSJJ-<2rx68CVybcM9>JiGBt9*MexXX-CtzsH%c#^va`$gOy`N7ipq&qd!JLbwM$99PK6ZY^H-HQCCB+5Qn3OOE30K~h9LqOyN>{p2-WTU zi(IltczxIi!C~q4E}$2LbS~;&<~zSWoUnC;$`*-){WpVG2FT!*>2(jUKNqdB6cE%$ zrKOTKAcIq|teQ@BkAwg`nA)JV6cEx!JxV1pA%hH9)?TMNnH#;s2Bn9~Fk4cNX7y_j zp}Qu%nUsx%m_0Ks?H7;7e@Ua3S(Ml8vzH`4xL$eZHRDUG5ILDqxRaAfh*}xu!1a(rCR?8~%zc)3;tum%8;?PZv`Rk1OzC>Ve zt=I(Mb(S$AgE$5CJHDe;{pB^El*y5F zUdF5!#VsorFkqaq{!7Y!|C4j+m7}wf2wo2RcWd%;?F0q6dmEK<_n75?Rmt5$c*%WU zJC@Wr=7hs#$6Wd*la*kGsYz9qq#G^=`=TZ8cIJ8Mp6Vk|+@WwyTao6}Zk%QrQ_rIk zmL6qSYMIHyJZV+oqP{fdVC-%tjm{_rn;HV3Xrg0hmB-t8M!jp&Iz!D+5Kq@Vv*)K% zi?(PcDH>UVVZYsl1iC+uYH%gPB-yskzQBR)chaAm=RG?Sa_S)V41<1mE%?n*wA6X& z^qi;@L8b+qw)=D($8wY%A1BnRJR9@nKUWi zt!jH!96bFP=`#JR%&13Ux{|7N1$O}@sz?kJo#O4K;6|?iMS!o2;m+JDOfl%9E)f1r z+xIC6cd^I3_8bD`_ZB$kSt%L_P=7h&9;XK%9m#hYgDeqSHKS5OnW)HMei7^yNkMK!ktP8i#VLZmM8?{_{iGw+b$Z|cL z)JTNl_dC^mA4A+tiXzP1wHw@Q*;NEIId)S3#v4PO(NKjpE4O@vQsG*h1E}}_dXu|vS+CUOtl{_k55DlyR$G*o)Ek8_3pL6WE(54)5cuw3a(wH)oiKOt~?x z(yr9(@ChH9sJyAO2V@3{tKJ3hpPR^P?_*kbImi-68gH^Ypwo>klbG)Dep(}L@_+)- zW5%UklDZahc2yq!p+c}zVNaf(#IJvL;(PKX#v=K1jF|Oq$E7m5c32f@OZQp)JmB8YDEVBSKB;EVtBG+j+itZ*v+0Ds#F( zt-5>{gtLa+_BGPGTQcE;o3V$Gl8;)LCs}MApFjZx40d-Q&YuR3okJv6-p}v|1M+@Q z4o7m4^gB*Z!OI6XmQ&2)ksdoS8Twzm5qPIwqJG&~sa1uRCr0Ns5Lu@kpxMLqVL8Hl z=6@E#=6+vA)k>dn=y9cFg?~@*mK{(ldBKJ0P9%>j72L0T6+W+it-XKe9KG-09@kUGX|Oq*=kW@-kk;6bb1qRFF&7v!ruhHdMQA zogTb6KLD;Tt5_^*01pJW6~-XeP_OkiZo>8Vo3M zk!|!dTJXw#GqhdZ=K10JAGt{I`*AzR5cdinT*Io)I@a^YytPPXCH_w=Cu07?o<%x7 z>-L^_P=TUfCEt~|X&OAXEPL$J|IKIXJBq{EEpgNYd|_VQ<%DfVu<`7rv=<4Ebc_l< ziF~)GGK)^8Q(Ci_$T;$GdlAVmfx}D^6}-F9aKoK3Wys~#n^I-wkp-00`&o&wPA{A7 zgt^UzgOxhIg2Qq+Hu{fS&Ls={!?nZ#t7~qsG^GZ9&lH@0!Cf^uk{_kLoFaU#>S!=< zSA$7@&BpI-B__34KBD091xtk~U7)S_ zjtdM==%p5wrDOLOltk7o5(ibW=)=KBQ?r{@HkV<0-7o&`TXU8CH`s<202AU8g0Ip> z_6P_@h?Rt7_Coj|1>*khNATa8FqPrKg6Z1MnoK3#b-$@Py;ldhbo>@^U+&oo^9muX z`UI?QA#IxC@ohQ|dVo-h^BhaD(U@mGe#A0}KPvzdHK2H|cz z_=8nFD$L#gYY^6#LVQ2Wj8Jmeq~`6C0wY=b^dU;X}*FAJHHE*96o0$Ai+~h;`)4CJCru>^C z>IBdBa(c^`G1nfo;;0elHYgNs|<{^p0=xrxx z0IEzAX9C_RN}!GDF#yDWcNqO@%5MkWVVN0rqstgAnF8063F9c4e9Y|XhwvT9w+M;BV6(cpgTdU&VSEAn1Sa$x+#|5*{H@k zfA7B`CFB#1*mj@j*%0DLkQq9KuRVB3bX*A-`Ygzaj++4q1>^xBm$MuNP#j&ebB%?* zMvNL6vgtX73DoN5yxc{G2|-%syrg^!pfdM_9kIH76-LvNku{kTs6oNW7lRwR=@d)RJ`t!1~!x(?P@_J&mOAH5>JwO;hxd%PS0>? zZEj`@xIH0G6l-3WcuLt-*%DMu8AT0L3FXPpHr+ZrcRJ#Ye&^8`ypK&Ti%+W8$MZFW zy9Zqpr@Z2MCrESov4(>O0T#ptG<;sB+8t*7J_wc+6y4xYC4Rm210tC+-Hy*M;PyW` zP4w6AuN5&fL|^y|eMyUFSp4+fI#%hLpyD_S<2ZC20ekLS<+w%M{z-pWmuC;mU^Lq^ z{gxJ96C>l*dacsT`?3?|s6$Y($A{)ERfhV?26I!*62PAN;`V|;mA8in?sC?oJsq6X zV7ApX=j!~0sJ6yDi7i&gH*Uj!YnRNvHA2DCr5(-mvHOCylgTBWG{JQfDc^V z99;J)LBKeTq;2J&zqwUnk!MB*K6##n$`;GTFT0lZ_<#dKb7>lLax2{sYGndfSBASW z@z}tnVH2N8cu+diMsW?uXQ2t5i}+fz8cVepL2i9X2)zV&ra-HwNlbs~q*Fw>XA7qD z)G%(@L_3zkD0?oVy%n%dBW$*5VXaKvVA{f;*QPCdgJ`{+_FE(vS(t0ED`K@nT{H4k3;Mu~|47XHfjqCmQ0%n^ z=2y+oCO4A-GBtU0^(GzPYWLAmdzAXxi1E|BX)5m)(M0ET6MFDgf8YCL^5*sOGMTxt z?k~GFHgf0Wv($l@(QFVd{EIC_z$5q~@TJAZc3$bDzR9X)vW*j|t=eWZX~Ts>vE4mX z48hds$m1)kKzw<9kA^A1c3mjW710%*W4l)Y2S$^G7o?HLEni&&Vw>)SeiF7bd-x1J z$zT@^U)jSjh0Rx z8AkZ9`&f~D;r1y=hXEZeto}#fR;i|G$tt>iSTJ%Tv%!5N>-4b!PTFCX%kM>UxnIao zZ1Y1LE@SLz(fERUaX&FeZ6^{o^s}? zhBnQCS?h%Y3=u?c{I6wDo3=RD0FNM{W1lDq-eEzx&rF^M$LTehArWc?Pc*H z8{^;w+xMvpHe9}Ip#HB_yGMOEDmNu52hYHODF94cI5x)$z@-&WT<(EOBu)VSql-{r zTcBZFn{|(-gDN*is0ROKHn_)k?E+-Gw1wTISqw>}@rsc?&;~w(Dcn58!Ul#!Bb@$J zBb;~nkW9)}!;<6B2$o8>2$lrl9wTi?Ljikl4qKre;C?>kim(Ip#sR@Itd_};QA?)Uq^M;c$k&812SBt z7Ji+=H!)K!EJ&#>Cit`3P#BmdtR(>`x5gV`z#HP=3LwPN{YvkLH{pEqf(`8dm$^m7 zGjg*z`BZ=WNY*@>8$d4gB2{!m8PV@acz<)V{!o|~4Ai0sr5cDTeKnj8yPGiDTt*-f zf-Qex^viXN_>6jr2cSwM-qkA^F+Oa>PV?A#W!ALNE$S&+%;6K_Ec7*MYaVG1m*wuR zP5HPqDmIm+JZ@1GtMjA=ZBE!b-gPS?!}B)GkqvA4wv%IsJ=6=seE&?K^lDh4G{$MwJYVZk%B(3%uHY_``q5A6tDPOP%WJ%EIFb_ zd}E#2>R*eAShts0ccWxC{V{ET$09)uO%q1{AXPms{3z=GT#QXv>=r(4falYu!CXwo zHDVif?t_SngcdZf&kp!{s^_Zs-azWS7YPevf@^1j#s-LI!vX+*{*Q$ptWa(Wi(z^? zc^?+9q^efeL+=H~XioJs7Dc*iF&&pnY?wd?2QCug(Y)M+sqxVH=`j^iuH#3DpzA_X zES&M8RQyZU|FLu!ceYSPaSu)ag^4`Z0ZJ*cVdpuBFtrJluq}G2R*I?)DysTt;kVMs zUWUEqtrc%Q|7FPgcq#%*FEXXk5zxiZQO?s_L8F#-HxgYD*?#zd2vHvfVxVJycKC{S z=S%)w%%3I@8b?MtfV&yZh%g!BRP#YEtgjp{N8R={rlICym{|Z*dz@Ms=r)=`e^~k? zo%V8X@zy0-&q589Y{k%CwI=2vJ(2Num1O9pp(F_W{Ssijyy2|u3giCS0gXK+K7DVB zSl#Y`MjG-yk@F&1-PdUqzkB>RJ6U6soFWbHAoK;7IM1xS3Vq~TnxofcpKQ5w5qdhD zS8@{dZmlz_+2?a2DYv_5-=?>FbEeIYxfoC(w@MdU0+by#Oi`Fw((6XME7pzE3}gcy zxo~i<9p+ktcOHe`dga>YV+h#Q&R8BCL;buUc%Fx?@t%Ec-0mXVwSXT2XAp*%$P}Gk zXZP4Da*V8;Q3@)0JE)X9%}sf(nI-~iIZJJtpXTE*`Y7^hj(Y6Mt<&W)=uOMgSwY0t z!_Rtmj-FJqb3f6@hrcO#2Ry<~*6t4O?2g;symK$oS(2QrBD>0~C&`pNU3=zyJ#Fvg ze~9Y$_!|%68x?GE`XOWJ?05S}Ss*0P zLsi|MO+DqOczF`Q3J~7{<}X5G<9lg&S*Fcfm3};yN4DY?XY+^hxZ0fbodK4oxRhSU zNjfEZwrHt?knMDQF;aU%kTVx6bU8cAOkz2yL2+p-a(;>CChgp8lAeRt3g#)P=628gr%9?KxK=Bs#Rq!8uhsZ-vNTO@ZFU(KL+v;EP_ zoF7YjC9fNwD6gMv9#*l^>Z{%hB_WKTC#M2Y-RXxWgecT8_61SD+mF|!+!rg-qnTE?pdrk`*#T6ql!kJ!V?QwcCD}BFX`> z^`*^c?Ycn8RddF5CDrQ~M9t5R&cPl0k?%;Trs`vGK=_VT&7P;y>Lr$^$L8U7hsWkS z%ttqE;^R5+=7tGU74M*NF&nh5=~5*Pi`@K;bQ)k&0be$XG+@YA!m zLw%v+nT-U29_Eq)tLP{%9CXxZCgTS#U6+V48Nl-RQ2URJBV&LE`*^+O$vgVP3E^sq ztf0Fx;@M`3rfT>iJ(EG#09iCCV71H;8m8sjX3oJCuVi9NP$k{_#M-fyfx04IG58<` ziQ=geRgmm)1LBM5LT|4atc1z(>b%JD7|J?3IDA7c6QwFi6^JY|<4UKwh+4g(<&$VU z#`{ATy1A;QzSkCVn7r=CoIY1aSGV_iy5VVinA*YSL=)qa((!PHo3`rn#&l+}E2`z? z8Upf_FVlk5yEA<=BmO<^{TJ|c49O;3XD-&s2z_>qvw?3UY43KH-O<6uz$meGaG($r zq$VQfHNNb?NXdwN|Bq2`ZJ480N?lE)=Vyr#2lSASg5sO2rNqklK{AI)=Cy zKNjY{wl3g)bOY&on)leM>V%NR)20vFz%yu7&%KxG{#_&t7Gx(R;ni`tOsBd@r_Qyk z?P*L+09iMdOJDc?7{WVA*8`vgU5cyx&rePMq`t!NQU`DI2h)CJe2favpoNZ`5%bq6 zzOi$fpR4fR+M1G~Ne5lrhtvk^Tb)liw@jwyyUGS>5zSr!^c)Vtx}O3^F|9Nk{?VsK zsx;3vMg;)|dISMjGrfpXGu<#3O3pLlH(vt4o%)hKj87uMJW_!0J92N5N6nn}hxUbo zn_u;-kpp2K1Exq1K7Y5pkLx@Q11Uo@A`6>yAh~u1La^a#sFHyR!eDVC@w()~JoS04 zAcG7{E&VjhwJoSeB$@|nYmyr7d0BzaqU?MbJ#ov^Q%};+u2eIiMy36GiLhz;|%|A!!A5nGvWXBh_l7r}t6R#p#tFX_D`WKSI2Be`GJQ7Aiy zeNd{akWftn%|Zr%dW^KlBp)AZyz=6IOESa0PuO=bE6!_BC1j_bOQ`0 zqe69G*%n78P>ayy8s%>Hfwdpm@(5c`IQTsC^X`}+crMM^UWZ0dU`&JmZM?rd2E!Y7 z%s3!>nc#=fv=w)n!$i^~+efaaIcrAjy7-|7PldKmovbbSHmoHjt(OdKmNw8&0mdg; zWanIrcQN7bBs5qATLgK8SfV0oDHJP?=kD;*Fh6YY?Q%JPNdN?fcwr#d+QhVzBD`GU z{>$rz9O3*?xQmY}PO>rRw9lf$aRzxX7Y{dYc1PfVOQ3aZaD(poM&*Ue4IuPR*FKaq z%)M!&5tth3v{biL5-dpw_Mf-gT$GmDsE^(CZEq-oaJA+e^!-2XdT<#4qdA8 zxR+Orm36%SR1h#hV4VOUZFYlpZffTlq(fcDaXWM$Q{a4oeCrj=6<(clxGzxiwjbH> zOyk}}k}j*S(SD56(X+XEHql2nkpns9C-2Tz9e-y#A*Eje9S31k0NH00LHif02kti1 zeUV;~&_%Cl<~V)L40vXVEW*IE5w5#5bY&zP?7?p3yKIb zJP*aF&t9d{a;Ucg9Ot-R(Y})_@OMBkCt_%?^4w_9V8Y=f6M`6QS&`PrWb%tN(E|T0 z3OCuUR4m1d*53lk#`KBUO+c#B|F`Nqielr@;o_z6jiE9YpDphrXzP(+JC}iFpy&DF z?ka7}MgOAwUKl1`7l<^`ak@thm?75-TNDYglMXW1pxNbf>VZBRztxON9>$Qw!(!o! zL(1z(r%CyQ9qu(FEthGnERHpe<%DWo&-%-`iAjXW!+yT82w*7=)E~KRP@7l*A)lat|lFMe5&Y=wECITbN-vCOIhZN z=ktnl>@|BH2D}SL}OBU=}TGxewvS(yQ>1bU>K3%4=)u(yBcH!=;^BmGI z2dHO9V^@KJwy%+QwjyM9O}-!&{%1{ob~r-vh2)1lw(6d>1}*fEAxx$kZo-$64O zCdGFd_~Fe-o9?ZU=2JL-az$v<<2T*(CI3@N(sbiJ&T4+M zqOsNL4@s|U9o;iyL&0T|Fik=oSCMNx9&4@ae;*-UFCx2RhFj zHV|QD@n0lHZXIe^i4pig2)fDuMPGZ;*HGJBL^gW()aaKBL^AdDX=l{kZ$^6Xk)5OokZ&OdvHRmx#&Xaeq%ZXSyqU<9L{VNbp!unG?k9>BUzE|0&Ow%?B z!g%_Tw=vIRsrFR}0x{40sZc8Hc>h}eE2r)xTw!Ce?Cq|31C#Lm>y@VOji7qT(?x${ zdpl{1<;6}8*A>U1f1GKLoDJA(zy^sz*nqL7yTKD9#qU(P01>`&aFAM?DlLeGp*q*o zwm;h@=B;wbyR!498JGhf-dd(8&*H<#CZ;mw5HKp~Z|j%gSyLLRa%*-HIc~pvph$>e zu539NUQ``|Ur)Q9I;JCaU!v_K^D7_dG*G%7p@+Qoa}zI2pTk`N`xhh%r`PA$VMaBH}s?ZV_b=VOaiAQ_w z%dU!X=jdOw0uCpe)PJYFO1Vr2GOjBUVt3f8=VA*F8;{NVLF3djVU!^1g#3P2BD3?-Y)j5!80q!lHMA)_=xk(Z|R6+>lw(y2;w{ zYjce)45>d5^=Pb&yXiN>cGsM00%S5`uXiUSeU5*1r$7;0a?nD1Zn=x7XpmXhGr}Gg9Le{>ETqo;0yziqFhOVz%=JKyS#4L_5@C9U${otjH8V= z>?zgpx-UEin0#CvNC!AU7y%EDz2YC-YzgQ4?n*;Y%phdW0GM!~90W}2QdVa*uln2( zb#N4;#S1e;ho;jsb;pkZVHQImG7uD_`;%&ahJ8xXCv*ICBt3unmgfg^{OK6qp^@g1 zfW`IwCAz*7ygx6u+V;O_1Ca}@6!4mz02k(m)2q_St&G%Mkr8O(u1cu9zT7vg?g#84)_W|j{t;=*yEe$c(4>jLRdt}Si^ZM3$MTl7`U07L&)b5f*YuXE!cf7%}x|I}{gs|WSXj|8H$*B$9aOd@g z&92^hySwLN>_E&SP7f+BOKr~;_n$}f-$wfVw?}jAbm`#(?KM8IsaN7uSg9d9w{+;y zlYjgC1s-u#vXA&KUp>%HVe(z}BG>+(_z?or6T*o{*mjz2P5?~Ql`!e^#tO{@&Q}Yd zLjN|DljJKN8wty32EZd2-$XRvI(WfMQzU;r@8G!ee%iZa8gOPK!_?gdYezIE;{bC% zkXy~MdlRnc!&yJ{dQ4CER6I^`pQeFCwb$A~WIKyuP-I)pq%%cV)0_mH9U`d>646;S#I{ z-zG;6J1?}b^dk!rg{W0`RNwaH348o7Z4ze?BFfR?%gsV83f*DYtlKouc8)TDX=X?y z#h*5y^=m%Vou{k}At_J}O6!a@pKOKS9>(EVR4nrW_h|_dFUHY1x3C$0mUc|5W1#8^ z_04F4nM*3SD3#xKwF91Si|lx=cGcH(0FD?HMmOK|Ui%>YZ`K=whpp8BGD zkbyUs-?fuUeRENdutWlaROYSis751#>KyIaY!6TBL-T0nVIQ??!GQevUb~hvi)NmG z7Jp?gvdOBl2afouu3bA2v!$n`lU|9tqZ8Wo*?@%a;)4BpW}d&_6NUw&99eP~z=Y5G|qejKLV}0{LeV+`evpaUr z_Tl7LXCWmW=W*<$>4|n^7O4z@Xqb)Fn%1sJEHc5*fO?#0sFW~d`HE6Ip~Zr#9zz1e zJnx|HdaXJ!*wZX8tim@mBEP(ibNQOLOmI95BIF4+YKsI$nr9q%j=;!oPoe8|Ni5Zx zB2VQG5Jys^tF`2#cG(VvAJ%ug-CK%x+6SO%m!!b)@gD~m4S7fD6bU_KcoTr$+p)%f zto=K48u=WwdpzZ|Dms9G#xu~2QN}p_woj|J^Gc+GpxE({c#4EbJVH@3^8`ABvYF-3 zmR~^X<>iKL)9A{AM;lL2TT-n)QxQ`afUBTFnU6fSTBY_e;dvqWtau^8(|5b#?{H(D zTq!MNB2SwHl@zHUAi2oT#7Al7$^lxOq$WbOkH`;ayYEX(r>H7hIf}rVBjdQgDqL>b zV(I+cmZa*4RThh->WozwOQYF+7&d%p6OXiw^vihj={Ioc5<->w-&+Ul%?Y=>5_$gx z$2rsZ7kT^vJ*|9dEw7!@bI|6SuGefOydm)_EG|#>_3k%WS)9J`U0#$m9|EF^k2)(7 z)~oXTah49PSN-?eUy;m1wQ_dgBCX9}Ai?wnpy}{&$KLPy^fDK1lV+Y{7gT-LmT*)rC=Mb7=3C&FYF#27B;(+(IDsg_Shq3^RhV5cA;ObTMZJ2Bp zPei`VaL$! z=H8v`Jh~VlVlVf@xEFbyD|T*1mlHid-smZcATb37-skXAgwNGs3wO&blce`$+;vQM zdJ7hftcm3EF{8b?K0HQ7wsaf#TzfIKv_NkT5vF4oa&~*58B(YU2y$~K*tCA-EOvgh zhvl&BH|r!UfWOV2@jBUwc}?OAC;30pHKY zw2g{`ZZp+RETQ`QV*?ET$JT4aa-HK$u(W%?S%G8d-v$yckZ^#6uOGRXBtwcP=HYSb z@`&{fgcK%wku(=;F=*4N7@u4`9b=;N3|yKEzJdJ&k#@iF*i$$UHnDu7HdTb^=2F1l zQMqIFGEJj@sJ>iG^FR_h5tw8z+_`g-r|hLQIxD2O%4U5%`4~B?)K2CUuV6 zTCj7w!3aV89a+Y~YuXWVx=XNa7&3LR+rF~yFxqo3%TBN&Yf|4Vr6jD%v81UlpTW~A z#!By%1-7q%p&)`bW!z1MVbM5ep0PrCst(^Yd3Z>3gE9UhCVH*Xlf}xq@?cU;sqeif zC}M`$p|mx6eIj=_TP?1*z>4avsF}h0o?ZVs zv)u<0$H8!wp;fLf7dgHhF3%F{QqE=$W7EHjp2`L;nUMwYd~OByAP26G#*G$8P99I! z`8JFNaTxzg!Mi-4hm9HAatZ#^ywcLG{&m6zc)RE%)K~#dtTOIEUVZ#cEb(O7LLy=N zK-H8w$7^AfYss*9z^tf-hA?3+L%j$HHEV7lIeam{K@6|R&02Js&!pogwqE!!GUq~9 zBigej@=BMDN?41@`EhPfxKmGB*m14RvGZJuR+4L+3qos_3r6djN?5S5IuYIX2#w5R zkE)ygaM@MKSkq9DUh&Czx6d*W=^!A!rSVHMpYErnuKAf|Q8x}gZ2FK1w>r>lcjJNcFuG6@ueJ#s zjTIV+m8hlpnQ@~xCm~|nRp~|>#?%mJ<&C-W1gm4?61$jldaeye{=|_j;}@9FI$rI; z@bxd=gVYcR_@!hJ6$E0#E69fLIk?a@Pj4_-9ME@_q@~>9CN{P7#k=^$Gb1rZE1#Dw z@?590N{h!=`!N za=49gvoY-$#i@X67;1y9LA=%R4+dP63ByKE-Bc5zNNyKz&U!8Q1J0++>Je(A2Fd|< z3g_>L%9-%7lEC_fI}0{wbRfOyF89wlPgP06p0Aafhrsw3U~xGow4z`^(VgjC>j7YR zmYfQm+Z}8(H7gMih14euU`>%UHZBqCrpN?4m*H^W!e)0 z)Kh-j-x5+N<%xt3yxYED#Q#?RRP0ynuFm!viK9qK@uZ%Gl@|Zci?DKWI;+fYv8fNf zqp+sLW7+X7btxbTJn|HI>cb+Y&Yy4afxrx3XWC2-MhLHvlu;+-|5?%;pv!Uh=v2vp z=+>=0(EnD_FOFYqw1s~>6(;#JSCj_Zesp{Bs6Xpx8TKZU>$cF7&AR77(DE$caqU1{Wtm|N}&QXlT zS9`O=NLqH3s~!q7b>!Mrb9(BfA?yQxY5Xe;$HTo%_~ed_o*_8gW)u?c2UVdHG8k4R z&7YK0cb8(KHgCY?5w;5F-y8I4Wq-y$eDBu14dG4HIrrCM;qDL%WLV3z`)0Ih;GH=x zNQ%+xfmb}xxFp`2?O?J*7w_F1OK$}n5i zTAic*6#pR))llvCc}?5_ebir$7V(B-&a|z=iS8N31#p?s;dI~%)zAN8viNkTR#2c> zLn+#dFFmN2pMoUXs^Y+}w`zu&|H>e_E_3;;Sp{2uYdDGdR`qd$Q0_VJ^lR%`l6T27 zMeDt=?vVUqZP2Jv*xN%Qf|)<jas>gF~VfhPx;_fJT-ut6Zn+7vo5zikNpbKFS9;?8Jr}AH{xE);cb)i zHNAFDkr0=jy`>%T%9L@d_}WnI@u!&epDGUR`;+hg{Av>4&LpT>$z$10avh$Sxuft# z>g`m2$Z^^5x;4y2`DdJuTfv;1II>;q~%a97qy2h65{^_Rsi-IQ4}Zb4kX&Jb2@5n)X+{B#lh==pMyp5*418OSE*ZZ{$k8RC)wa zCBbQ29D^IifZyxsTNR}w z>F_jZ2K6C}I;fhpivK2q>~o%l=<%HStS_hd40Vx2jqA(o3f!AOd@=C*BW)TbFp4UG z=$YLx|2x5vPBagE!*=I=a?-5#qn>K*REi!veLc?cF=3l7+hL2g#-w1fI}6cO!v#`M zv5Yplh-`F@#M}aol1G4#sg|fbE&*X_;nH0_K@sn_${bB+qM?a9+&Chlp;Hg5Nt7%a zKsk>Q#b<+gy0di!EQIP1iv79C`)$i`_Q(29$5lEo{#iA+$eFu2-Q*%;We;lVF9IVX z@_wHUM#LW7c^O6Yo(gZOufT=(^%(_U)MVW2INPc>Qg}ZC|2&X?OLsd5FSK$+3pZ|b znlG`a?}JI!AI-jeEh>Ak)M1h3`_Wfw_Wpm~F@3}h!W@VAI)LPVkq&@b1lWB8`p$KR zUoB|#x)b;XJ$}WZf8^S*>$rdaF?X}As_v`CD9Oenp{+0}s+Lq5R_8xpz1#S41K>P$ z|DM;(;f9iYg-Uq(K2dw)4ma%@hS%pBuKz`4x6plJ@&io?x6Ip2ir-BJ=ntm{A|Bkb z8nE{ZSefwuQ@gMQbr5}UkIyig&$kif7A)C4KP>wA7NBlT;QI#fOy#rb`iBNwEOXX6`?+WqQr>3rT=1ReAB zo#pmu^F_XzMLsE~fVak(^Am;fqX`m+$XB0c!@HZzVmwXhFoQ2JgQ}h+vyip4_X;~r zwqx}wJEx$5-y7?4HC%Zy3w-N~728c_lR9xp^%{Aizl$$4wSO!7M9HXdbTv@vFYjJk zK%*bHIGk+W@?Wde$=LcD-?q>7x>Q5HOH@tFh%q@Jg|)z=!HjC~&xb|MPfvzwb)9JkhWP+NTu*9hN-0{I)PYr>bV z!>}e}{nZ66)@PQ!tRdsJ&BG?+g1|(q>DFXuh%9@XimZA^U&@ss9qryW6S^aYHU7{N zcnu+_`4iQ3ryXW+ne;^68|CRXs|@CcRhZwocE9qAf91m_@e|K$LF>GI(p8JLx=`=2 z*~fh0L$`NyX)l^+((LgDDtq&J%=WxJ@NrUeZHAO0vF9m4K}1<)`0L<7``;Q8f2Ie& zv8C#rifvXtsYxuQvrzNVQ(jXq*qjp)m&Z%X$=#8lhzwz7)9g4%#JW>Wx+cpi0=ojbt~R+YL1NJZf7B0`F*!j-)d^=KPvX( zIyt7&kH+F@MGqHX!3DA*c&;KwgpCO2!L zYCX)ODO_J~wqW{{X|*TyPqor)Hk7xwUD{My)A*W9moY_D4tT#ARGidWXyIvsPe+XB zbykNDGOP6Q>}?m;<)+@K4sG>vwA{{o7@k9YG-tO+=`f;=DSq?u%1u*{Xqoy0rOnVCP? zR@#->^4Rg%j@pgdzLqW{x^;Q;b@A8YuZ3R-!+FC+!v(|R41dkX52fGUXXf<>TvXn? zeaQU&OU1DNG~?6IA6$y%?0uR4`mt#mL;gg|vVSFVhcYtYbz;L2?)so~1BFP&=vKf} z&Zo}I;rA_cdLIT9ed_fMDAMUY3TXV$3l3=1>YWJ4{PoU1R@6iF^P!nT87XtNKSzdK zKKUd6XBo2Qi2OM2e6nqSybJ|%vRT1?SM|rh25*N+vuorOXF0T_`xF(au3mf0UEoA( zNJKq+C>`MP9HTjlYfhHrk0;w!n{)jdJ9R4MH~O@aV2?Y0Y*4P@l}N_eR`^q^Y@96B z*_Zu^N4Ur?;!@U)5N8nH)jpZCNbsXZ55&Ki^}e>2IQ zPj2bYvDf~$V9)m2{}#-{^0tX;PEkRu!{>kYyx&)MuXxTkGV;#*^~=|>42te2-`F)I z9;|QRXNq0C9??S+W)@w%j{VFOT)vI-{txtV$h{oRi`Nv~uUpPkW=g~OyjhD`{5ZNvNfmSHtaFx4Lou_wk8Eaf}pX zmghkLYVd&Rbo?W}PC1OQxz1lY)X_5@=9h+HM$PxM;#8r+PPE;yNfCwU`gaeuBx z-=T{b(in)n7q`Ccaxc^oM<?>V#qHQ$U_B}w5V;XBhp`F`pHSf#6wET`_5TzksMKPXurAIjrM)@p4?{=#AOdRWC?3~-h$`a zk|GqscKtA=R`x@+stn7#l_UJs^buyc)4za`d$%W>&+h$nbuCSn*Qm}+CO<#a6ZhQzykhK4)>A%MBrkD4brvXi4|5r_$+5gq_$GQKn zX(gSxkb8Jue9ZTh6=Il2Gn$^C&Q2LBF)F+uZfPzQVs`kZ<6M4KxtM2{p2z+k5=vV% z#iN>A1Eyi+(=`8?$*U-{CNCi>AtIq2+h36TVJb6_E|D`K_&%7XtIbc!#+SB+o91a1 zyPN%x^XVXeoEY?_l+&b>oqbRw(u#kzfq z?}46R?sQGR*vR(|up|XTVe#p)c(~C1%atE<%=CM0Y9a?P8H5I7c3C%c zE7wZ;_ZrVfTET;ipWqTj)*_|5GvDU#LM^v%iL(>@FQyY~_m|mCLnXF_5vFUG_gux{)=R?eQAw5agJl!jo<=CqDO%Z&q6ZRV}WN zHQiykM`cSAATnIoFwWDMZ%h{Wk#^`$gULcH+f8BTk=j9WU2r4XVe6# zU6heYd#~SU823DZ-XWJ}5BDs$;Bgd2`?1$x8@gBm^-Pf>;Sb?1doC zLJ$ujh>wtfu~79FAptX?Y6~F&YoTgeApr-?IfaZoR=+WBDuyt6E@4fVvK7P0wj@7i zd^##6RY`$3h9V(N=Q5yI-xk=#E~M$ix~^u4wQGUH!Yk_W|CWm#n^fnqrif_Fz&T!X2)GhVV7|FOZkY@ zd5;|HOqR>F!Nj#NcgJoqVJk()skF6CIY%cJVUMU3_cVIXDEfwI`s5h;xmbF-IC`CU zdZn@1ORv+{^t>?Ut

zjZOSh%dbQ{9;KdB0gY51Z)^;>{FA>q4C2HQX?XH#epz{KV-ri8Nuk0Q)bv=wh-=(` zo$s%X0)fnj4A6TK&3EMue6zUQ#;BtvC090dGe7wK68t#NG0m-1!+WPp=A1k`6vmZiCBN1A$X-1(rOUqV6^19#{K&25Z=Z_Yh(2LHJw4! zi4_agSxJ$1=cn5-%@(s=O0Tts7`bK%poDsv9tWN#Z`aCLsxNd{jOQcom#6bN8-d6S zqb-cMkRRr>Wd67oDJ&nQs#s+wK%#Oo!`O4~^qf2w|Q;L5Nrw(IK9 z_sV;JnolnJ-3yDM$%IG7P27?9_r46%pMR*?IeSfbS$n`O7B5v?sjV6Ah^i7QuO zw#g*%NTWt%-IFO=mQDG{$x&OPxy>h>m6)uj-S$oNju(Mei$|o!{%97pJ*`SI_;IUE zK7S>l&zWZtKJDxfWEop#aYwn~gyA+Q-2FWQlw1rOEN8km`_|9(qfoQ8nwd`qadqDN z%eT*85cQNl%?+R4UpjmoHpRNZjl~HY31@Da(zIKf&3wR z`;d@Yw<%2i#_v+pC@Nc5_{T$gENeveR|(W+$wi6Wu<7RJ z#0jjKWzBu74at$AOT|5F_d~#NUoBlJQ<9yNF-zh=GMfCfM>m^&FL_ID1IHsaD!-t)m3;8?y|hhmT-cSioWh5fQ?tWl%INdIx;a+nWB3uh6% zJ;CisIn^be7R+V9`SMOH=w&}Qx+Xk4Cjx=nZD`vyERtwQBB!sBj?zp=yE;A^dyv&G zMs8flgxd`kQ5WMTG%m`k)gN}qfyWIVqDn#EjXOr;-kc`Kf)XWOL-)F0c@~CK!HB0? z)T626C`>LfMWkRzTRRm})U|Kkuc%@Mj=G#1vtwgCj^M3% zVnuq<#oy<}=iN}gcUeTaw-0wuo3P{_KD~trA4l9-jUzY9cG=WXZEPlvQZhAg-=^#o zAdEEebN;*n>yJR{&ZLoCmDtO1Y}%SiCi9q9TJY{L%OCdiRB4>+EFz$!J&t)=x6X+d zSM#ByrG67n{jTILcGu*#9&}p@fK9t-8B+y59z@3*Y;j*Va zyxy%aj&^4e2d^J5rx)t>w6MLOyP#99vU`zJ9txJF$&b>#GISjWbBQCUKYnm{ppS3y znEMa$RHAyH;%V^bJ?FZGq(9dmPAS>_EKeV#evm$}IB8moJpeQ=ig9j$gQ^Bjiw zem!~8L)$S;aOm1!!@Ag#!RVC^DtfK^>HjhI9#BnnUAw4?f=aW}LQ#1Y73mU6C@KOf z#e($SL`pzG2p9q?(g_GkZz2LBy_b-L8hYq8B%uds0Rn^&0ylo&_y7MH=iGD09b@e^ z*WOtqBzvzipZUx=4>(ocrmDA;KQPN+9~zz|Yc>rZ!YgVGLpWD-TD?=|@;;L;4`I3j z1Yk6b*SR(4B9)ka<3FI?4<<88;{&|$wQbLQ66dZgUG#}wF}y4nBlz_>{aeq(+!Fn6 zG`oXE%>LHV;?hSnuonHe?W1vzar;RnF2U^CI_c4o!=embj>gmv4Zi?e=Ia_o|Zs&P$Z_+t{1D) zrz&UFes3F>EM_>g9hz$+M)w{n{~)LD9h{y$@QPoo2zT-K@a_@;)R^CUYCq={cD7ow zJX6s;lvrSit?8E%R=2-W0OxeGw_k$F@v!W@D2q^QnIf7*E!B8Mou6BxfU^6_L&JXh zPIy_{x_L1Jp(geTTwD*HM@*H9*oE5k*e?QauZzEktRE?nWsY(UhsUmfALyUg#zq3(fruF2$$Yu|lsn zJ>?6!02}am^m-)C-QOybZdNw&9OtuX_%bS#)>4tq5GqzBh5T5T%GAz3+_Ji9Qnyr* zR4PY%1O5hxS<3bjG)U)nS4TLjr`C!riENmbD7Q?jj&Eo7nnvxm`-z;}OjGr=NRC@( z{{0O9m)7rU#%(s&QU&{-yPgdUl?m>9%;n)PyD<@7-uAX*B09(x5anFw#=!`CsVP~DDigjd zyTV~BY&!2nS914JDUVmZ4$}ITR`$~KJpP{byFlKQ9L`;kcQs5}w$kf~iJ6KM(WGJx zqcuu=Rta!5%DvzDa(A_~IN-4ykSdR0N26Ca* ze&YBXaPkAO+m^5J4M4SteA(UpWaI52uAh!>p9?fnjbaAwK37RdL|d?~93P3)!=YaP z8C?9sCMyN;r>MbCkJt?3ba0qQ9suzBS>CS(ktrX2zHQnCKY8!0wmp zYe_DAGGrzP_|q{%9s?^Vs$yfmo_l=U$@+%TCUvVhSBh;dpxW7vlV%Pyx8I&1g#vfo zC&P3BW&vd?DOtV9RG?=}Na9q=jH&&Uf?l_5Ke)7T>locxd81}CHV03Gb` zDyVLU*ICw7R8^)Tdh+!94V8+&z9>P18!DH3vYGjW-`{;fYqj zP&I%C=I|p_j@RH>yROu@%u^Y0ZM7o&i|tMOBb$wsErZp_=fbQy$?Yr-8~9{X730>V z>T5;Jpc3=BYZKKnKNcK6zz8bhcfK9==gPbfoJ<QJ# zcbJTx9T%n~aI)HO4}>_~$t!q4pvjb3`QDKNM|<0GZD!r`q z{x!4$9OdT6FEn{tqG9}!OQ3Te?+6iyV)V?O^3{i`T;jPM!P0aRxI1df-;#uDkFG*FdeaRYu>6nXgN@a1iRA82C zj`m)&*!<}0AePxq*qAbek-HIHuS?Vd6~1CLpwh4B`cFt*WOu`{59V%&?*5T;<_PrI z&tW8s7_|6F1o=IT_h8KU(+9Z;N{R~fZERCG9K!WNg4qaa5>%;_R@Vne$8bqW6S?}% zens6fi~Z=rvH+2`g1)blm7w8D&Q`bo`V1msA#3T0*5|IO)q^Z48_TyYs~HZMM3oQ% z^UjeEz8E~0kKqD78%yFLEx5Cg$cv{)w8j5^hQbOjN!>(K5f6+rNiia;OIjU$5Nph& zFG}bBDrQTJ3b9kbz>oXSwAxBnhc89umV%ug>aPAXcvhJ}}X>|ni13%oX@@{qgu=_5^t(sy(IV^*r^CcZn{I?L~OzLj^}vu)1& zfoC)Vf17~^?SYrMYA9?feBW~O!|)l zY<68>!7E`fhzq!hTS5cNbmId?i=2P!Fl+9Ds1dql0&!)-l4s&;7URWhNz5iZNwV+l z!wdM@N|+mf)ud!IXRRo=22Qvmg*43wPN3)Fk``-_4R0`+|GEX51@n;7=b17Q*+U3n zJ>6aQ{3&wCs`z?9BIAPE z-dl^)%Y^7IEnQ2@|qEor^-G`8b@VD0oIa=p~Z( z4lQf!q+a18R?;5Y4_PI7N7~(8;c0UlErQROl{vrFn*dKwR`@l^yHECg0KJmr;yQa7|$xc z?k5bZzTQfl(krX}MGh#Z>^k5b$n1B&pq&X#CpK;dSY|6 zNv9NL>V+q^;qdonhg-{VEtrE|CNq4MrkdmGhbwrsXHXyMwb5VBZ9&;_7HIP+wYR>l zN?bcQeXwpL5lY9O{$oQ2ZJtT&^G4YNLQtmXL=0?aBY&WITAeflCBi%+QQ0=1)pGkU z?Ee^K&FZ_|aBi=fd7s}Bzxe2PS83S-F3L5y{cF-ykU&#}oN{;X_VDdMQSVD*@9pZX z-ggN>e<2+3Hf@s!l&K&zFQo}fF5>HZ#~nvgZDwA75kW;{{IThSC<$3cdi`h%YJyVd}bU=4z6u#4hb8c*8nFIM4ZPJsS!*}=0$HkSBGc^uHJ zvZ2z>Ps@$U>0HB63YQR{*X$%SqU-s)J-r@s8RciK&NXobs-WQOd~Z*kZOTv@cfT{& zWB3;}-@iz`EeG{)#JCISE@V9^1^z_gT4-d7*2=4()e4DMcPd^&_PZxr>yHK z`+e$Q<%QP@lDl2k1rV5V3iQ%_G2Gx=Omv|U#{y#ib%2zn{TM0^pgs1&Y*QceFxL|m zZ*=+OAfNnRw0((n{DnqV`}5M#EO{R)1*Jy$+T-OV+B3ZYf_bA2rxVuem?>LEs*kI+ z%$)L%Y^iAe=@DV%@O|uK8osYW5QciI&ind+10hkl_oJQ!MZSv_tn;O~20ck@o=Z;wIN$<|)>No;RL^RobL$*hLm zoT!H-u>9DuQwPPkDyQ~hKfF58ROBblJ8&rOBK3yYx}N@2YFe#=(p!%a%$tMUnLWLh z&D4-N1&P_>~G-7dD*(8|@Br|Wc~>lz0or*= zbRm*s51t=;YE$&woJ!1RB|fV zXB0WrFkN5oXOz^#{}ZqL8QkG|IwFxdBAy&sne}hhvCbQ}=cV_&!dANbH;;BBxb%f) zWtx=~!9IbbP1~ySTZKWCnqFn!(n8PSUS&m@3a;F=9_79GO#iW_ThK(&+BN~fG1=JS41lAZ?U1JO3^Rvk)k ziD>0vnqVx0&amucf)&E^cDt;qmn#&OhIs3vzRe7*9|gT$gDE?waHxfXkaOG=j2KU__hTeTTIyR!vf~lC9R? zn)z0QORA^-Q@I@Qtukx`h1IX;a&R`tuvTW_*4}0^;y%`hQyzomDE&T3tnK~ zSq+*H|2zbFfZ59UnkGYrfPZS|E>oYpAMJLIpjc|mVSJCwJ#=pvTta?Q((s4K&A`-W zK}AdE4qX?59u$TVL?wthBjA_0ZHP~R7R0Ai9`f0B;70NE;wkbecc!9rD7P2Q8wBe1 z^hs+H>tWVcMdZ3C-m;=^bx)Kv&##&cbWN1GXkb5ImI4GZ7IM?+Izw760~=eG*8-Ud zTnFG8Fqo3;7rwrcPUkU2t`o|%3H0W&;@FLTWt7Z;>IFn3TH7x3c{_URRY^3NSa3Ck z>Gc?V%xy>O#utmFST+BfXRGx5yKE-QJw<02W90DCK2s6}fFliu)XN z_|L+^&{5*wh59b|n_^4p+{cFbiMuO?wf2>y+f&&`lF>y(b`}Ssl+UDPUF(n+Sb9-5 zP=m$N95v^VPaxV`+A}S0n+**#j!e$%pme2*)%<ewnGW zLI)l-7{)OWR*6r59SN9h1YWy|!%FeZGP2>Z^_1R96YG1E9d9xnC~-4{&VTRo#buv? z!wQ$gXvyStmCPqr+|}MHrO|T`#H*lv{nC?^gMw1e(jkR}rb{6-q@XTmSc&AZsiGhL zrM{)tgFL;1Zj*`SC`2pe1^(@ zt?O%Kf-h@vV6K|5n!!WQjCQ6USKQ{vrU&;fHaNTuf)(Vj zcSz;&vdG~~D@f%{8!{Mb22s)FyCv`>6Dar${2W2aOS-M1|2OI_z>Kwr9qY{8`&jyu z+P6tjt6!(2G$#5aLSh-zhHi1FpS;e_oXzVopv0uQGs{Aa-+d*qy7nJsuN>56MCt!P z@OP!~9f!=fk{6}-vUizwll`3>GSRvVV?da*NK6quXd{Xqj5PWszhEh)KFORX zCLfXa>2<2i%CTQo&fks()(_B5<}zwGa6coCcEvImlpF`tQ!#fa~->7tN}WEH5%ICqBc zj|j~a-_@T&H-HM%Di62yNKgvjJ?xuYzwIl8ioR^)wG1Vuy^ox%5r=T*L#rnhk6j?h zh2mK=0P~Ginj8LCyYYA7Z;LMIb)!V9V_C-3u3Bd1qMW$?wUc<%MYXls@P9>#N=hKc zH^s@#5BACktl2oZ!@Ij_(NA=(B&tRVo~~o6$Dq z{bsWC)o9bx@C@&x#oULA-Nenu+g?8UZ2L+ti@80qn68yj7(IEcg#JVh{q~EL_CKlt zL#<~12f2pLv_IMhPh8X)igjVWnGU2o%6_q(osqiwRt`Q}*DAj9CZ{)atj=q`5|fez z`NdA;=Y2_U7@VJvzads~SIIA@vs2t~e2Rord&LpG8YD`e?od-K=l)-sM!WPwU7z(W z2a@E|{|L|Zt$&zj{}F=_zo^xx?!q01HqtS#5Sw

7*A=3|=C2I3a5e<3q>PG!pl1Pbj)DcCr(oE!T zZb$jJpCJuM{2}HO<~|PB!5cSOKNgzA-A;q~Z7w_;sb6oB_MPE;h1@qvx|c{o%5SkH z`?ikS!dUTt?8;fzHEBQn{*r#jPo%UFu|x(!@O?asj#!BKTg4>P;}vPNOLH;CngZuQ zBEsijh5Y8h(XM6avdO&=5;N}SqG)MKS{CR6PQ$7%@PPLYexr|VuetV@ zrSW}u;^<_axvepPQ)#&K;al#uZs1|bS>&#(SrX2>fp$|j&9>mkpCVW`vZq&d$D`p< z&gemg??b?H?=Dns`=M(2y3L1|AHIk^5D1b ziLoz4DA-e=m`77{mlA*#VOF2rJHg)d^43~8x?T7p85%qN|>=Iq{ zU3g=NNIRux$~V4Mm*6Yp2W>7#zp$H_BK@L2q*mK1wUfK~(NQb^{zqK1=y8)j6bBov zkHJ0wUj9d2`F>oT6;q0P2~IajiXNpi#%X?>gb7{liv9cWf$pn0=+r2!2jK1JYCCqk z*5}*ykeJpALT}h7IUjUIVlMhEz~ppIntFY8tgsrX$L36Yo^Dalj zZvbWypZ6$1V8LhjM6U~oD$sYUEI&-l;Oiw>S{VymVNe%b07^_#9Q0>rWrfKM(m5k0 z!#UGj6?emObVu1(a;hp$Yn>mZKMuevkeXghHS-|{VWI>vZBamP#S~!T>2sns#jn7DP4QHQ$o?`RxO`5y3lNnEmro+Ad@^>k6pxI&CI7l%_-W+* z_YK35kvDl~V{naYA$!?%1k<5(_=yGzdjHAk*k)K+{g*B~F9-4R?DyWk;-7X$z$?x( zbnlIQaFsBKSjjzN0~`T@o|KWH)W)_&&hO(!5K(~Y{gwWOsIcnq(OV;KmgA*7yyk~U zR%uY7>pzB_uRq0FxaF$o|5eX~k>&TeH+>T#rh7+cK0Pv)kEFNHT_rOH-bJV-1c z!T3B^i&RssYoA^IKx2*d|K7Qw*xwy93Z$@jyt1nMi>trBP_Qh#Sg|Y|&b$GKmXh4e zN3$tV!#aZnnr<5)cEqo3ScO(iN~z6tQ@vUspSWGQFKAgDr=C+~?7WHRzS5i~O;95< z{cLdzFAka}L0r<)Go`)i#R~k{D>eZThDgkt~R{+VUhg}rDh}p4yN3l+-`z^{whB}gtS4oArAKr3xlT{s6qaE z8QZ$1c_OKJLd(nHU zcIHhpPT)ghthud@x_kTAD|@dW2k&_z|Clp_8)FB@P*ofEmv(>On3A4t=;`oJj;6@) z6U<~>@fka4l?{Z;ETgxBo)Sfo<0V)~qRX!b+ehyJRzZZGGMC+Sr>Zj7dA16F8D)NQ zT4|hvdy}%H;kOr99x14gYp@SeLDp5LX!88k#=aX!WiyT#DP?)W z_l(1F%WTSzQV2kKoh}?`7i}0*X%*+ zSJ-X0EV?fM&QNDX{@I||VZ?C~&HJ&{Xi)Q#slL`N0hd--OUP z_(z~to0zfHXA-afA7SqS)zsFl4eLSSD9uKbrXnCxLO_Ug6$O=MIZ7uK0g)0Rw2%NI zA|g#dDFQ)6;3&N%gh1$_gd(7{0FmAkLVy4v@NLig-uJ)ve&ZYe7|&jNt+iM7$jI24 zd#yR=dLBcIQnn5Pq7qQep$Jnujv>fu4A3*1?xojeana7armeFN^0ZD#TyM>+iIx;3&$`s|uS1Bs%#L=- z-++MJm^@d)m~+g1A9k9*lVHdTv70_AU;{)X$D$ZKo#pn0@hPj;+->2)a!GD<=S7Sb zVTkI#Y4fynCq}<)&dhjF&q+?#GgZu*6JO7zf#(63t!xAZ0giK=EYFtVS>uD(_5~Rk zZ9~)(>GNAvl9}S0sCs|Y!RC)=M z!%F!yGogl;wc&?oW}(H&Y5XD+R&SijGW}HJ^w;lhp?Z3q-l1?hYK8KM_x(|6SBL3g z|1dMM>x3u#^^4378nA@6!-P#8yQ{1*U;435IX0?`KU2hoNRLmQz5fQ%%VrU8^PFPD z(U>jovH~QyIAI5cJ`xilV-)0s(A&clv31etA>=K|Rnn$iU&9o;$BAcKrXS6{HaB{C z{+Fk^;`|+4+0cR+PJ`+BuRlR;3YODbthfVdW??#UzJ_${^=fg=Fct8=6ez_t&-$l` zI_}0W@%+emNDBhnS*fKAr3K_oX-&+AtI!NvFEBVL@ecsT73o(R>QbP$BmT`s^#JK; z6HuPF1y&jpiWLtO&#*SMdvSGEHI({2l=gnm&^m)&xom4RF2&cH`Mmx^GqEeM zK99;yc66!Vbxvqt3)-`gP(t_O?zJq#@!`u5&uSX~3J8!^&7DE}oCaKj8{_BvKcq7? z{{Woz0>O|so;5#q-;*8=df@g}&lmeIqbNTxS_}qs`chJgzu3bR8{fq~itn*klIMfz zpkzrWySeoGurd}cEVF(?&O`xj=kqJ?Oh3fIdfcC zhgSI-dO1b1*p`NiD{eX^fA}y-t?e6l7=lBtoN*&GegYPg8THCy9N`UaWmoz zSB}gM;urDS0VVY_wu{vh2iI7+OV;5}>;D>Orv4V*`R=6xcu`lC!^dZvSaoNAArrZp z9SbuYpUMK85nZ>8-xT>Is`k8JRsx8tp|rpzyPT3>k>OUIc65h5c-uC>X*Wc1MXzQo zXGviBGN*=Nz_`SOdQd$}W#;G>Xa79+K$*ihm@+zUFrZxw$YZU!fAbL7ytWR@=% zONJFnPTIy_$--I2_m|gs2Xj9O=3cZ6t;hbcUR9h&TOJBRU+hh_>=nwa>$sz|xAt1H z2?E=eabhIbzqHhNS7TsT$qVpT2}y-E!Nb35r`KF&=J94qPV~g@ZvZ-n3=^{QmG1x>dh+RhA1IyWe3{@3A3m{xsSv0`J144xu=n4V*{2KoeaiLlGk<19h7IS z&+T3TG)v#;^4`qi{A|Y2mmjt;aBaiwe|9&kg%-TmuT$U5vNz;!9Wl6uHX}bSEda@B z2bq-S$l_z9##Q8o`|u(C=RU=R&MUq36#2-)g2u($zcVLN9Sg=P6^ZS83H06pT$yux zl8>oxz8r){9#ngT{24N-F)GNgf&3cB4Fmb-C({|>jz?DKPc{3qR$1|7;3Lk@uP`&n}UdB6%P=#3$!0{Eu1XRpm$tR$;ZvV2Mng3TU%$sa?7E?>rOM+2*A zpHkA|*=Hz;Rz1Kf1K!*Iz8XEghRQ1Vyf=PWmPU?Jf54_j3-nt{oq z*Qar>m+;}AdQzd9d{X(Ec2d1}g`}8w^|V}vwRaH&wxAPZsQs)XlX=hoq|@re?4PTl zWLH%zpqwER96#JAx-Vz`4A~hGSfc7AUf8So5LrzMZaYlBJRhAA4jA(J$2CN{!-ddP ziuzO0wd4wJzs^T5RWCz=UuNxx``l-}^#0a?69OhRj(3Ij?D#g_Ao8}Qp|@7Wx;m_1 z%yP z&CrGfYjcFFx1eKWbnmb9{Hf{a^ff=<>vh1;crAQO@%|eVN_WH3fZlI~;Sb0YP_8f6$!|cjEp1>ynql#tkNv+*qRnV6FXR9gB{0{h@Q%>SeOkU?0=ysyFX=n0*@~(GNT~_hBQq!zM4H5PpO%#3kVoF zIl{D-sXxMtHI^VxMU8+}2(0<6RB?cBV{T+Xh{2_u1vo`l_XWzX$A#`i8+M9nVOkZ0 z=+xVO&Q1k3S#(gI&AHh>)}MZm(mwt_=I?J}xGqd5vh{IBXiyIru6uga^#;rMKj8|=Wr{wsDuKW{_G#Hya+c1w zq-_`@Laq9cW_S}|FTt6%l?6o7x^)VH8N{8f`++4z+tp?6u@{y>IIMVk-Rd=}CzlUQ z>m8CDHb&-~nZS&PBg#V=PY&if_PdkV>9Q<{*%l1FLeU>X73J?E#MJq_VgFM*#49i0_bPh@fA+jInmTH9!+WTuHX5ohjt(EV}>Z$ z3^e?s&tdXa@JF^6V~IEBE>$XV|c>&$h(JDTG%?JvJl<|>KL1YwK2i< z!c(;0o&0)Zw6n1ueV6sRBA&W^e~ z>QiP44Fi_Xo&*^MNUw$VOgs1eo>A?YW>(Mqn3?d*C6>9uHHqe*#jP6(Cmf3guPUSG z9@;$|Jcpf}zn$TC9y{64k~O`GC!7u+dmS`%=}5b0wX#-R#3cJt9qbT}*Bme5BU-$V zxaw{_-B7JT!lp~M!(~Ko4gx;LKc7HOji}Y~gnlCFbsp|f1cU>h7aORUOQo?m$*kk_ zFh_+~q#Y$8+r;5Z9#}v6jw8P4gBIts7TL&5BdWRLx8C4+TOJqEPKZyYmB$C}%~lIs zM3|T`5QO$|E-eu2{Mz^!x77U5l$xLFGaecEfwi4n;u8)Vr?8h9)SA_-T~F`Y9O{g8 zT!6!C$sEwmq~ZJOD>E>kQ|=LaY>A_&ZBeTr0(P5o?|Y5E-JqMH1#W0tMvA#azQXwX z&4e1`5);Lw;m_=K88sG8ysN>4I-_w`IybjZ&J>?4ruWrh8fxmFk$@AiOFPsvEcURi zzwIXyQCa49UsIt?-L9|GwG>++Ai-ovaM=b6Cj=c9P?i5 z8w;-NK-@&6}nv=W( zZwQ$!OdZSA$*zz^vFxC=JLGxA@ z15O)XzR$$5G7%x|8-OM7Z0&xO_Mn8tBhrqq7MxSS*nJ15u_fyj1 z^99x*xribCGUt@re73-9^}*W!U34#0jOrs@<)0#d=PAt${rO(`-0iTd@ri1N$1`Sy zx(`pDXIjYlfWG^+T%14Dd|_=J3J&CdiggEfdvdV8tHn*7fHT=7lN26|=bc0+8Nan6 z*>2CI(&D*7jh#a}w3vVxy^t@v=EyuW{wqxIbu zkY$mEh#I~;BqrQB$Zvewb)wjBa2Y{AQn8a!*{M2=2Tlc z=gC^?9-5zLA5AamorgfP=4e-TcAxNX&GzG&u(ycl>!zK+qaUZh1D6I=Cgl4%kkuHQ zUFu1j**S@>xoQuG{*jq#kHqGNEi)fZ@_u*i4VPNzct~tOC78mivU6;_OT>|JBm|VU z*E^@h<4JsyhKkJIN>d$pAH6>KQcftrkZhWP;CKh4;GNC*2F6_RGLef7ri2GT=i1-vNP0SD&-D#bx_nG;Uo zwFBJE+Jgm3b7gUSaQiHJ&A~|Ruw=Zcsi#)FF?#hf;uW18PrK|x9=79>hN#ZjD18Pb z%Vr}SdS)L9!IeNfaHW!(RJbKL32wRkF@wb2oIwKaW@9G|9Dd;W^(N(c9|UDtSlwhX z02j0KaR}8sMlKNRsLQ-VT{ZTBxh5jDlE%nsGZQ@*nf@|3tZGM{?QQD%4WAUDM11YL zvDt_jCD6qHgba?PI@e&wI)s3?1Fv;EnI_WBCsHRzZr>a{l~8r_3FPF6iMx`$UBNHD zIS`MJzjN?Bm(xVW%!}?d^xV8@hDB@5z=29<y0WX`Y_TNreLXlENQN(Lyms1K!F! zZ3*pTW>2WHpN&rSNk=W@-Si!3x;M0{8(wUr5^93GKr6Az6uwbIR-}DYd9r7jV_=Jr z>Rz~+7)fYn4Lp|3TW^0v?>(zo3gHjFQ>3j4&R_d|Q8x*-dD$ETB(FJ;yDuIDo5m}y zMZh+YViXQvoAJeRCG0NT^f-hGZ)0Vs5oS;DWa8 z=^6>OX{S5>AE&6=v?O2%aH?3?Bg&A=q}N?cFT(hwQ4gJe%fwsGzROEb0hyf6cDr!J zFTfIpr}GrlQvnt-gBKUo{kSksmX~uKLGH{tBjiio@j#pa|-w7v1g>JC!K7}4z zmCp{At}J=A_2J*0H=aWOT;OU-m-`%(_y_~+7YPg{ckj3Z4HTnuraxqq8XMOUEJm+-tn7{yiRgIdO8AD2zcgtdEnQzoZTF6DjUcG&(eDVxltgpl(@jf$H z=$yUH*JSRCCBf&)@?_BNADXL69#Lb}Y*XuCFX%2Tw#+Ttx=43j~tei#&dLPaVxqC67lm8}pTy|nE^#lTjaefx_{E-9Rz za0k0_T(5edik8=yS$vzyZ}6Wx^UT=&Ge|B)a5dZJ@}K63-<29u=di_qyzU3Rq6Re&?+QfTz!OQE80 z=19~BSN)VV^L-+7?1iKG_FH0~gj zC-1kwg=U>w7$UQXEAv+`i1uYL-|*Z*DjjjsnnfeOq>V{+&q#b7p70;Hnr`)puE%6( z`5p^>7k(3&5H~wV&=Qv4j`4}ZkY%ntT2D%f!R{-P8YVKGu&l?O_D0wO~*a2IaX)3 z%q3Z2;$%?`pHCt2^6C^`#hXy)pz*b*77gUn@BS;jk?YD{ru~{WN_j3PqQwT zR8RIby-NXJU{~xszie+v%YM0jT0_|)b4Sb5_I-hr{$k>|FmxpLW7hd*+@l|RJR)1% z_Zg}d#w)`-$TxrQh^VZb9~}P#)FY&a^$Tl`ZJj8HJ%W7mGv%*RPz~+6$1J*`M&9r! zrfiFQ_}^b8J)0sIu$-cr@4Zje;NAW8(>y=a@SwHIZ1HN`6`FdEZY=$0KJ>tgjhfr( z>*bJV_cNiU-PRPtq+TftiIa#sH|A21$lDZB-|;>+AbZ*Y)P?(Z#DGy<$_b6%3yF6zFxjXECL!#5a=ARk$6xs5uL zu&u3&W*%5-dBi7_1;rh0=2=3q*ZDl-r zlmJ;-17uHqX_2%(A%q@iN_^y0dHcng5Rk*1<8~Lg;jh=f2#rnJW4HRe_r!ni(+CJQ zhu*`wXFYtOy`zaav!owRQ_M+!EcbFX=ZZ;LOZt}F;5Lxc^Q1PW{vh`87uyfn+^4Pi z+p<;Mhy~^D3yJB&ez)rt5RN>VZ~<%norHoy7@%d_2r#CqR1zY~^H$HM0eZ6|YVhYn zMf-zX;pb)txvUSuLNtQ?QDT#nZKB(~rJ{qxv0Li9u!Zc9lKY4Wc$NE)XF?>A6{=*V zd#S5fT+EQp?7JRL{M;W)55qHYqa{Ae;&*?uxfItLIgoilq3Q5V3By$ty}c1y=>DOE z^QEWLlXm9p&H8KOhU`B>6l8W=QJ^n1MI`py0qUsn#*+r7{v+af zr9FFDy>5v%DEM)JLz^LVT3TR3os>(_ z>M9cHg^@O|Fpj4A=zO)ABsZ>m{d~$?D-tT}qbt(wT9Y9b@cpmkCnh~}b=SUH1Db;Z zTNirGWU#xF9@0R%O3AFKjZw5MFPmu9AGtal z<+n3|Kg~KcQU7C4_ZX#qBgo|qEFuU|F<|ddMBnz$1F|1Szhjk>5YZ38443>tH5l@l z=r-rV5;sAh21vXVPydQXU7F1m*lPU_b1Ku>y|&}9as9p8(G4R&ThO5X3r)Q}r{sqA z@L*Cor?8gs#E~+8ixbvIS?2TXU~+v#7*DWk7(Fo?v?4R6l6C-f9ZL2vCq2Vo0Tdq( zg3i9%516@hj_>=*Md+h%50DBOmoHqnAoFg(GfQR*_GGQ(g8~q@E)^?r1c$W6kuDFG zY}Q^;vMwvM=k=Xeie~+7+qO-`@Qh90PUn>gR&{m;0lA$Q@`nW*jni`r7e&_r!%=+5 zuWZKbO3hW?G}T|He*`tkT3jj#V}QL5basWgSnc0kHQM$vxaG{8n7$mn@qY~^(0=}~ z9u3%0_d{h%e$&d9bS-KJs8iEy;C?plmaZZY_Yu2?rgiScg66Pf)LfoqIK>pg7G_V8 zDzgpzP#qfHdb?4U85U1ghV>Dwq0zEP8RERob84cwLsOj2l`8F4kqmD z?1bwdxzw94W?Eark}7U_Kntdq44sf;8`z4F!}UK}W^68Ph-xuRSaidcNB&N2m~l@z zXzi#C!AYJ*_;5l=;{74o5$=+;E(b>C&Eb;cH13x6)sWg!*HGv*D=Tob(7eatq?2U@ z+di$5?L1P2auC7p8Tn8nQF9tjZQ;Qs{$uK|*~1pw-D0Q@u?Ou10d-%bx-9!XWqhA2 zT*z>HX=~2Vh<}hiCt5#dnT!q|W!%$bykro+4y`v9W;*qBs?LKeU1w+e^Or*!8h^O7 z8wPl3#yq^I`9|-a=qt93aFVhXC4&Hs*UMBp=fUI1zG84Si0rC!ZISudNO;+qwE{oC zZHH(%ootA5JT?Z2`FUxN@F9wQDL$}m_l@+|Y@Sy2ajBu;*1!)Y=EE=-0`rZ@R}cAV zYe{RnwW4@M(AMg^Cf5sdtM58#DvmKh&Pd3ur2N=vFXIqkGx)2WCRd7ZGt<;!{$iJq zooc<_o1Lbk(Wx{maJ!HaC3+ga6q^dN8I6Q7s3AAIgp}C7o7<qD|5|fE^ zHQ{<8Pi4ED6{aRoS#qv_>nTYN#YiSTByXhj&hS9b)^j**=L@e}?$Tvf9z9mpO7_`u zBW932oWofz&TkO*&ant*=S0NEHKm9(T?bRtVjDMdi>XF9h%l!GX$bb&U*&panieXY z1eE~q%$}Uqo4@g3r7Nf1=~X}?Rf}WRn=6|N(E?}j^!(h8M!TyU?cEHu; zqMy6@Bjgkes1cTm~h_N@DCzqt6DPtAzyV@6wyl?BG~h z=+w`O3G0%m!jX^`GUmiT4Gbks#o+HJ@nLHZ*hnA zj%wJH^ojQC=0Lwl8t~r~-S5I#$Xd*U}9(x%)3Fj1}2#!DU z#caS!58Ld(OGd@0nBC4;`Tdp^aLj#*GuR+_C=9%WR}}88Cwr7>5%n-yMCf|>dzv@EO17$2&a;5hr3{H7uKj%A?d1YB2?R6fHV)9yxE<=SIPSd`APO_8-0e z)f3TqVoYAs$+vG)NIWjGIF=c>(e~dEsm+Ykj{m;^bp9J{7Fz%!JvM%$aPv1-wg9x* zEX3o!OYVNt+j!K*ny(==26K2)fN5$i{Dbq^5 z%zroeacBR7c!Y)o!$*5=Hn59CPfeLVFZvJM;~9(r!FS_y0IA&5U?HNDS8UtZS$;Oe zi;X3=4-~P7O#+rXKIF{Tq;Kg^0cmNx8)e#Slv(|+CO?Ajf8k#PD9mayQwPvHWLgv> zX4-s4yzJBm@iBJld|8u)>v(6+VA@;uwnUjEMMvl{YtJTC#don_gkl6O3Q$$5S^JFN zv^vhO@h88=oBsD={2S**|AG7Dc>ws|01GuaDZPp$ z9On-fko2YBV*U-$U5bqlX))BB3J1{}Q?`G>QEM8yM8)5jdyMKTYSTa-#}-|H@r|Um zzHyx$r7Rb1Zv@Kg>P)=VV?LPVYn%R0+bkYCHSn)y$j;?D{%3W_h2Eco`@>lUMUW$P zX70WGW6`voFeE*8a>9;sD58!X#Qe@$8^lLWn3qoIY|Ps)>*&)?+t8wX&6wk`&Jw0( zZM2`Ti3nU)n+?yN#MQa?7H@wMw{3WNmJMME?#QN2R%}f74i~Ht?GB}6^@^7A`~7VA`~6G_-29f}-0mv5;b?`ts4+W z;L7_17!CKaVkl`bTXsO7)^k)DS%+`qSOhEqV2SF83y}ml&RP|~)J%wWkq$3B46mE9 zTX;qoT8wq5lWzO9tca2XAB~xh*Y@J%Rsof*n3vF;Lk!99yX$Nzq$1$ho2zTS2|Jf1 z-Y3omRW{qs*oKcEqj|;Eg>Qp&s;$Oc2{_Cnl)t9NZoWZHyx2AQ`SVlk+p~8x2z_SPlo&afVh7iHp)%ZEI@lt+;odCG2aq?JACii3&1 z8zR67Cd4h~b`L5);9G#+w%v_3Y=P*!_VVHNQRc3=M`+1Awj*Ikt{2a?>;0mYAH_GX zQ_Jt{G4SYZRTfzh)f+Y_LiA@<+cnpJB(~~>6d)b%!DiKR8-w%Yo-E>(2SL0mfG^im z?HE|e+KNy*MlJtJ@%!=|EA43MR?+wcmZwnSjN!9GdRQM(^-M0$gSFS|Lo#AYD($(* zPCqU|zow~L!HB7-w>b?O)i#g%x*NZqlLNg<8&FH3&inF0*L=ffC%#AA*6bQ2?TC2P zA%Q7&7}GgV@-ztzf_LflrgZA6Na4>vs7*^4kDn$dD8<}nLB4Q@(>~_JSC@<%u5r{s(H0=wpQ)x=FC0gdPDEzI(_P1*Rr6~jTDVMPydsY z;M~Bo#8+NC{rOUv*gY9&dyj+hcE8q7t=$ojanC@F=DB^)nwB!7;yO!Iv#mxM1Ki|M z#hu9?){7H(Akw`-Y`=1>o{utJ{%Vmq7@}Mxbov+4T@p0x2DPxzgavjHiZ)GvEYeOG z23@MVt|GK*2KJQ1=4LQco$h{>6I2)Ea5}m$m|i7wdvb;nYh&1CgHJ$YU5lS@sl^I2CLG6f8FgK?kj**4 z;w^!>xm{LS9=2%CpV2tbht419AAqsfJy&lV# z>z#$pT@UedlUB>b{=$Jba<;KTnO#Tqu|q~EO782z;WWcoz=uzMfUDwRm1XG8Ldr8^2qzT8}N2;<}qsD|Tsct?ORrOR+B?X%LtD;SHZs&Ms2p?z@!m zs4~+lepi&-M=zwhRlIM_P{Z?e6)AZ(YE+Otz>Dc}(R+;Aa+)A2q)T-t_pvJ1IzcXv za$4d=VJt`%q8obOVs0=S7>5-atsQtFB#)(eHIKHiCf&=uYKl{4b2>CcKM`+EGfN0B) z=wLEKrEP&#w)r(%zpL*&jdyPK4l4dA*eqZptW_+t5A;Ty>}})w%xp?arf6qhW*s)X zUwknmPKjrvVj3NIq_6k3kTd`N=VQlXLA9}GuMYkEk*|YPc$FGFGP|T9JOs|SUh_OQ zOi)r!Y`m1$oV*&lQSntD#h<50mJIvH?mUQ`46BSlY))ludHU)lKTDrv!91_X>XRZL zWb%B49(DGy{j{Zm6Z_s1X8~8%(3*-7ok@z45^DW1Xf!flV#~Jmbxar0Y!MS5)#qej zv_~Cw(5j-%8c&tYBDbJ~`786>D(rJ@Vash+mvo@XzjpSE^F;%Duf$1u^~Tdy7<0mX zX9b!xlDNZ};W3^yJ#d-7wk3Mm0_xw`+q#KD(Gg;mD@4b0JVQSP%J0CrNyn2NB-e7c z8y?sfULZ1rw&X;O@)Sl~4$~|{-{XD6;eR}S1+u{SSn~`9nz?pjP8Mrwrl@%?;$b_N zqgn554c!8)zY|71F~Y0y$&}MzIcudt2Wu56pkPWQ{H#fDWrb*?5Nv51eRE55&2^YSZ$ z+rPpc{a4daVQRM!j}k(!BZ7MV{5B6~4kpOV}%LJfoH4)rbnyCJb<1Ppu41rISqtIpTDE{*4GHGG4fA z>wQSBUrPw!Ytaj2ISyV|kj^yp|xBEXN5uytaYZkQYGDb+!a|^f6x1|{Gj;!JC^;nbUZy>%a*h>1MT^HuibwL_`hb`aII5GZY z=G#NQhw|n~iR_HWL8OUJx7^y;$5fU+)o>++FMW5T-{B!mP>(`%BE%vIMPDki3Id$^ zYMb$k4KD4O^+R-?zaf25FX$p}*FwE_ma5B4%z-E_#w4_?1$pw*ANw#Ce8&~6`7rfE3krw*TxY~O3<8KaY24sjH^{A$)9$}E#g=VT zx>0p$vzg*s za?(~zVmf64U1|2E@lfoLFh@=8;vxCJXjkrK^KI?Ow0CQRl|%s-V8_hQ*>W7k?-$~S zml2pft1cSD*1#xa!A3Oy03QDlVRY3|H&sW9iBMpjaW#ZDd^rNkJv9HfLaq1T!f^@j z)tuz~hQad~`@QN9Lb*;NhL%Zn6$w>Q!8Wvns)1y@B!vz$#^q}o6Ds3-TZcFqsQC3! z?!4d}c*<;f6OFfZ0~xV{a*T5rS zX7LnxHE-gp*yj@S`9C(K=;(nBsWMRWnzOXVIx1=<1%fgS_syJyPw5njKz?#<<{G_) zWhI2WnF^LHtIWn!)OhLqTAT&tqdK5ol_l4-6hh9VyRMXO3&aT>!h6|vi}w_3Vfbex z9#VK`&ZLtNJI>4=lEJgLUxVNE60B#R`L_0GJ3QZ zE59-;f|Jiq7L%#zjoTSL$+N09)`q8{XOjgAQ*BP#2s(~d#%WS9mA=>!`+ms7$AR`s zC+yNN=MJ<7`+9I~Pe)VxViCKJQC?j`*{%$gFa92e=^xm-=aS?tWVO<4Qd2tAn4eh_ zntwkvXBlj&;LzVTRS?AfnajtrQaUcNZ>8Bpua>OxKh#tboeb$D{<1MAan^E!2%tC9 zcTV=IsmpkKaZbZstudJAKd-|)ahN|{MirbJhw}Y?r91QsZpc#At&MkGIxif&oTo%O zQG;I^4Zh4tubEjFFZR2)%Z-pZ)mrmQqvhkqeui5&<#e;-yasx@P#<47yl+R^AG<~M zOZ6rTqw{C3q%xnQ6B!VcUZui@KKPeWPj(=|*dtJ6sQldY+s2H(a%EQ;;=X2TxRv1C zCr9Oc*OBLYg`?19weKgb1btsQmhu%tEaT%ZcqnZ9DZ_P-vUEZUj8V(!O3{4yiOcE1 zzl%N9fQ;%D_8?i4e7G=5%m!9x8AEZXaNem?w>BJ`M%Hb*kZVa3u(~wHQBM+kFunO* zXeWm*|23VS0PaEw{(%z=l`|@=zWcA$v+l=(B3}(nFH8HG3AMy~ZLq67zdm@Gl5OFm zv0q?(iW=q=5*7Na{|QBf(Q^mXC+`xgaIPH8`rk(8Qnv!L-@ z1g00+TK<8Cj+EI(tyA2~)SigsDwx;z%&xwMNC^3q0Ga&>TpnO-kj=`Qi|hELPS%pC zOP-;n@@&zj#$)^}f7w5S(>2tItQgI`@fd-pgX4jPYM>hW?Q*j+Z@9LQ@z_|#Un3yVKgIWz#HkWGnnYwV@MR@jUbW$Rut64Q9L6+C{x167}XGR6jv#Qtjsw^&yR5_>R zWB3MFF^VtK)Qv0$AjQq=FUU=`L3A^gfhIn9+u$mV<7`V>{#}|xv3$>SLwr)n3-GMm zh@aw==-hiPtI|)xOy0RqaVNVPRod(OP7%r^?hFbKY$ZUQtvm%r4Qo=ttFU=`gw|q` z;v-;Qj_^S4B?BG3OhDXE4a_7JGW=j5lp)*sWGt=wXUf&$v<@YN!2^s+whp($K z53#Uvpj&|Nx)i!Z6&(hh&LK#*KZ49^$mgv}iCBH51Jon>F<*K5Y!={gVZh1Wcqd?B zmdiHehqc6JvZ3C3j^s{b%K9%O#F~cQc828iV+jCodA+&8m4|EaD($&vh%R;)!CaN; z8Va&~AW`#0+jqd`ENJ{9c;_~js`SVZ0-g%{3K`Jy$4rRHJwC-M>)Z_~)Kn5D?i?sU z^G-5tecx!*9N&s=6th*u@g9czilYv3!hJ7saX!?_hqBwFdIU}MwgQDUMIidJsR=@I z?lZTPRlObz#*mYFEf{~P+jo-_XB_?j;?o9*k_)?=r^ z{OpLN47+6wEo+35mIWaW^SU?V#H1iY?<)*#dQAGwIl$$zSr&TkKk6MhdS?9VIFq(w zU$ES$ZHJ(vRND4gM_&nL!V&grVHVf6+l977-@s{2BW*w0+C-V-cmCD~^#raRr>cqM zk1%K?!mZ5&JeuCKdT9pY?kH&=(lj`NdHT-1$XlEjj-~HAJqv8u)^%;uHv4>_IYYf2 z)%zYTJbKP7rdJbfp^gyjXdABRsJOk~f>!SRya91Q-&zD^Og;;hn$a3#N5D;2L1_II zz++UuYF&nt84*<0ki)?Q;O0{n=5HNcCvV$gj*g06FC$@6tyGcZ z8;A(sH+6w$5AMGXX(%*K_H|ML-6yJMN)O{2=nwpRz6ci6Z)@00W7;^{QrMY~`G82! ziLS1rJLoj-2PJ9T{kp0`UnE_WZijZ;oFJs)&h4?txECrY=YV2TlARG4zl)dM$rpqt zAPcBCHgPSsq|s@j1dCU2=?vnbbi@?Wv;n{-r;2rSz)$K=Ms3%R*74RN;&^ zMsNX+aNXuGh4gVt&K_V*i!}G?B{`zZj*tv+W-tA2;sTmHy@e-iN1f>*%wnlXyyCl( zTVxOAMQb8*rzt$9jJv7erE@~4ka(eh+=P3pT|Rw0dE2i(**i`Vt1g3?>>5q&Fn{4c zplL(jdbG02*!s{aCcYi0Ft^aq<^(oNp#|x6eQozv5k&TZUlaa_*3ewju`piFg`4W9 zXb84_ch)7RJqX-ZN$(6K5m;%{>4mXzL~vjUz``~ zV3*yXxfTE0rK!ASKKhb*G9X=ws4P2T7!l1SK7A_!@CuweZf1V=ZbRT|qedO@`%17q zt4&EvF;1sN(r2-ATi>MirD&lI9+cq_j4*lRwYemD`gOkK@~N4+mh4pU-SADxIOi!< zQPnxp!zpKd@Is{HxqKG#QZL@_J<=^JQ*w-7E55qkp8$rAS)4jpNv(ep&UiAJYWD5p zSgKh}aJSCmPfir&nZk+TJrJv0+(-KLh@3=D(vZfLo~ZBi;`;@w_|gji1!X$CX6bgo zzuZ=15NkvCvK>t2ThB>#>ll_x=h=NZ;=cdd`AAd5l~{faUlF6VJH0`2rrg2(6~Qa2 zhBarGZ(+e}yuF%9VC~>g2UxH?$u}CBGg*yd;+@rv>f-ZR zSA1jF)vPr?WLNCJwqZP9rZxUDH7UM6x3p*|XxTiLRW6}cE0j6w(PwWR?=lx(s?W8Bf zc9mHhsQXOOuhqO^sCX3GZJOHImS>|lN8U)b8z~Eq#ua!xGDh^eiwu80-}#XX^VA|` zDAbbdUmn2IiiyFJ+Ma?9xiDDZNg7@k#4nTvPuhcO>Kp7!9KeR=bT2u_bgv&v3v&-1 z?1?nCv~V4z-EF(X!os0@_VXxcnF^IAux8kF0$I^IDdYC`q&HyyQwpl2_yIC)d`*rVCE+|8B|9d>Mw#zPM4Zrp{rINqrg)bFO zxi-|=j*E_=dO$ZqqI2O&wzYpu)+%{rOb-VpH&_r%?zEX3Ue@VOPe-|8NWyu ztez7f)W6lG1`nMI9;>LYZ3|=DUy_n(-C`PShBRqZ4F`m?(1SBExC`PX0t?Y&sr0X2 zJg9aSazP(G7uGINtJwEZ4{9+fxFY&mXP~l9gYOXKjBqXFmgM@_lQqk>Q0942y;4-K zgJjl8d);8KEIO}|UJT4)*B#Z|Bs49mK24uun-LDOh=1;J-PyZb4KX?9JC$dIH67C> z3cY6RMSVc>4ht8n%3Ji87=9gFetem^o4j7fmxn4z!Pi$8Q};hhP}qSEp=5{+#h-F7 zi%Q6z7!THG*Roy*p_sgzbs|Q3UYEGu)DZ&)T9K=F=yu2l)kA1Mr>SRf;QZk*bE+|* zL}z)fsda#62T=UYEa6w{ZA%ggo|8lIk_N?1o(G-;Vcc6Rn>pmO8J{Yi<6dMz+EHWv zoVZrwLn0Ep&PJqS-M$kHSDaaUPYlmo9eTqL#8T4_gJC7&z)rbmT1`8VJrT6e17$aB zd_!SQ!@5A!b%i$V(bn0RhwP3B{U8rSRW&r(m*OqSz#+l!JP$3{q2tNIJSY;%-$&#XHRq1kD3E!%~>3`coRL=faPqKwH@ z25l7!F&t@I4*NZw2sO>Q*5VD9mG#K5Jv#o3IKvUr(>(;{^5^zZa#LPEuN5;C$f&!- zI$j7_7j|G-of>%&QhCwU={qI)E)(UJQP8mlb84R-kJoc7DHja~zGNeq;%P849Nav% zl+KmP@5?w2uY#c+O_|-uE_niAckTWiYcH69wLx=@21_NaWy?BoCg$#dB zh11|n-xJ9Q_U+k3`JWmMDd51^w(1146`9k`Df-@iRL|NWTHy?H{@^T!lI93s8+v8 z;rJ#HZ}uVZv)fNC$FQ$bqR)Y9)z#ZYJQkb6srluitSJ*_YjjVg2;c%G_B+P)tepWH znNONrjF#iSWaj*NFJDt=!RyJ(jK3dB-Xo;{#l0q-)Z^eW;0$cs7*{9ti^$D+r3=p| zgpYYvcw9{liJy^xW4p_J_oH!S83XX?RJ>=hqHX|r1vDZJ)VtY9y(aTZR}rJ?;%#dV zRE)H~ETuFAgwA+Bs%zyA&YJa*9C?-6t0EhBt7R{>LSdf#YA-cCG!+JC@H0Fwb0SVv zDzt1F$G}4ke)z4JwbXLU*T(sfuGvRPo0^xWjye=&HXnJVu$xV(4H7h5} zGXu0uhD>4zD1-UDs@@mpvU@Mx>A_5!b4mu$ri&6gzEiok0YyaH`ld6!*Lt~%JW zU3rVrVKId^y~Yh>hCJ7V!vCS{y`!4w{(eyr1r;O@B2Ai#fJzAgA#_w!REnJHvgQ2z%({Ol`~#F{#G53w zi1OL!$w|k@ZxCN5qHN)@b*S-5KI5JIH9mU$x zVXbE?WgjqT^bBV&49S)&TgC2ns&_ZoNSw=dFqc>j_J5NpDDna57J_?q`F9cb#G9xE zd!JV8|4I2NouWF@*UQ1CRb0CMLg?3bp$8=$s5v)h0tZ*;a@*H^vd!0GIQinNMOgK1 z47eeBs<}>^5x@22T(;b!EmO>#s;NCH81{A~U%jp74(nki%D6%5NonjOlD}dd86t;@ zw83qDf%MpRCL01v0>ceLtMXzMemAw2mbC!ef3jJL(x~=l}*dc^lK?WkVAs@;Tg;A zZ2{XwEa)Yqo!b^Do4icC;hcEAJPuB zvnex}Fb_UBMw<9bg1=O*y5i7WoL^P$QQc#v-D^vZxbCB1yy*M%&PgI)r^+a*=dzYa z3~QaH(n6a1>@7?K==mcrxe9zLUe0qAe2wIGs{}X48I|`gFe_G}Au{igv8coIFylCY zwXkMOmp8IiRQ4tnzpKy(6@nJ8<}Ezdy-Nx;R0QtJDZ>>oeu0)csBgJw;h~SYWIVv5?Xd$81pC z=Ddgi(vyyZ5i;mS;a%~H1wHg;T!$Y=2|L{O z&EsAw&i;uXj}vxy>6>SB)}uIDdC^hGt#?g@RK!wMF})w_qPMw1ht}zS+r2*XI-3}* z@WkfKFt8l4krq^F9E?l@47x}7i^AN~m}=X$ZfRP}{f~-C@~M71i%+H zyB1%RQ>!-d>m`dZQ+)eg^80>M-kDhMr2B!JxZdN`J_)C_cXK@io4yP*M9r<$o8#T; z=KNBB#QHPDU1Ci+UQe?>OJu1bNm`&aNfcb=Jmse!^G;{c1V|B4UB3vse%TPzcDkWN z>7zDOf2ja<$CUZIbi3~(yR#evyNnGQx1|q-Q-hai({-zz`M|2s#Nch{8aQ>pK5$0u z37wT3(5|T@qPFGQ%^6ddx{VVBlTEi;JCw0yTd-~ouJkbBqcpbxpw({|Xbn>bPIM^8 zx)kIdhHP6bh@^5!9#5;$R~0^S^!(sTf0D5&rlK~X?@e%8Xh}_wP}8hDkhi1MN~NPE z)G9TRQEr$(>Lm$|=~V^&y7vY0G-IFcvSWpVj)Y+goiJ2ZFw`EH%CoG#V<#=?J7114 zuGtJat_LEog?h`Bf`J2B_aCL_r*OLH_@uU>4hD1pbi-l47}A8j9VmekN^rvy!0eFz&NE5G z&Z|~x{D*+ngeT=nZ^aP$0d`doE{R}wq8upIcEps{roK2@aHP{4QaB*mVGOxo;~KTg zEM1n-1+;*^T>@BT5_+k#Z$@L#QYG-w2!GApcm9b5y6_-bCCZIhf6=Of#8$?3IA)|7 zX;!7JS$r_Xx1=A@m!?EhuV`{ai=A@HfF=9$TfX2W%vraJ$rj(?n-^^L!#m$c?Ft0* zHT_p4{NYaeDJQl`BGF04r6-V| zH|N@+uW9l8-{j}BH%t$*CjFv&>eeSVGocYvRcCF19*n<2Pmfh77-_#&+0!o5-LQ=g zSYmEZp5M76Q9H1hG(b992bR{0Og|Kw>Gw$MX3i_fs#7=cN_1K2mSzp*fJkT=6*kBi zuf$+>D|L^WnH#>)05&MIhZIaD5MI0J?O*EtA=#I0n=qKGLRRT0Ippr#C@eCKS~>p; zDl8W1p!Tsl?|Z`PmDn}F$Wv`B^cw4(i|y+*>$7WRsQ78CcXYOCQEy3L)IXwN&ee62!%aH|wwOEmB&Fn}|YLcwy zzRp?}gFJ3ga+Z1W5i#IPA@|0O4b}Wedxn8p;K83w{$D>vH<|K$j=0?{J`GFb@<5h1 zL@3OA(`l47R^ynFE5{|Uef6(okLC9o`9Dz9Bx@(JYxhNrU+U5;hjFs6@B2Jr9iZl` z3R=CKYclatKczaS%44u0{B&C7@$S}z2hQf^r`ULOyg?7!#p_t_1$>dcN_ciH@U!JO zQLM-6l$(TGTd8F`Heo_#XZV@9fwMqEnSa{i&Gej)UoH+%rK`UMPd+nGG(Bs}m~f+Q zT}3TeJegudo&tn!J{l5^+CIkHrm}04%Tny|N#L6mON;((3DNv8PHm^~vqJd7{M@H5 z(Ry~LJ~*kU=$z?l3E}d@%l2^Az)(rAw;`P?Lrx-1g5yF>YNxlutt$BNq_GmgCcBj{ zn{T|>OP#i5ka$^D;mgO0ikAk?qjD8ET3+IkqBK_O-N=Zwp;M}Ep+z6O z=m*A`mIYXTO623QNUsM=1rzh!gw3C|&OlstGU{2gYI-%ar3@R4;gzlUKv3lA+$z(s z-g;+vWv}+!M|Ge!BC59T`w?#zvr)CeDeR@*I9H(UJ-J)t(dzyGJ|I|#+tSgKdY_)R zBAfxxp<3;Rz|f3=;GU%h^3JrI?}oDaUaGL4K1hSinz0?+LvJ7-OuGgA2SoVWtgHtj z*tOq>`(Q8bG_s6VNII3ltl*tkri#V(*&n0XSqHaDIo@p7q(0>9?4Zn*c$11CJJ{6{ zF@nc!a}_5YTuHxeaBSLQd*a0cmGD*on(QnyZvTdP1Oz3mnoe$qf)w&o63IK`5fdsq{3n3@wKg)g^(DzJoQ?y1 z0@b0;o0%##Vu5V~r;`UB^17r;PO0}a!PCR=YM>Y&VUcY$4U&&v=k^|oyb0-<``-tI zedW}4tN|kOMsM5|HwGzvE>dh^;i6-V&6r;(lCS!Hi$3FFLF4Bvvuf@d*iC`5^%07S zA(xbq6l!mE5nD;^?y5v2wNRbd_iL%MO}mC3itY0<5pvbVACQ~UteHA;lt-O{lQ!=- zob$dHW+twZ%2GcosWdB^k#Qa~>y7y$+gqgW! z2m@tXZfe`q)yb&(2?!`=d7eg9)a(cA16u1gVCVUO^_JWuAgUesM4cbjdc*iPI;3O* zgI5_84y$lfaRkT%-egvvX~!eK1^uFfh*spGaAa%%K-tBz!UKlm*B8Wou>Y3E`gOg~ znNw%4uzwsusJxh6^@CzdPdqiSDVCvqqixUmE6l+Bv3?RI6mn>uMFBn|T$1=`G3B>^ zU$bZ|=-0hS?Qh3CJiV;1AHULFKrD=;NM72%np2!JIwq3;E~Pw6EiS-nbth@@-2T-i zC#i;2Ka*m`01U(v1JE+pe9|bdWDkYc#zqd!cNRQb^aDT3WP*0!HSaZgV}{oUdwGpp z33^?7SKA77hUR6i9{&Tk^Bbw^dV=!){R5SdL?6>J=TqI%UeiIh}tu zo!C*hB)!dXbu~Q%JE4&=MsqPx%r2C$c@nXTV0hx6>8=7i7`S`OvsM5oO6b@(l5Oxa z8Mk4`+Ah3Bcb(WOnO!*T=FSZ-IXCjG5S90jj+RNX4~T+sX84$qs>hRnwj00BJNd}4 zRli@D1UGxPSf3?fcvaRF9%5xH$UB+kuw=dw8YW=P?5-B}Ad?EoUNb>>c6WJUaZwN& z`ecBQMi_VJ7I=Oo)kv0xK1Hwg9J|$w*UPg-%YbY>KNmi#>Ga$Bw=-q_*4%}wn|FU&4@Z9%I}PF z5;oNPwSaEtXZ!n$Q==(esh$5B7}2sGVKkmN(~kqzrT;ZJ&hmANi|GXktE8 zQ+`Em)w!ox?xXLGmgN^xID!9eI#p?)_QZ#@qwdYUQ41K>&hNT_BsZgW_SLD0t;yff z7p`!GjQBTvXgQgV^{C%LCKrKr8e|wj8V~))9$E-{+aciIc4E>#SDKdgW^P7t!Y916 zke_~8TTM2OBLLeI-aRDKx<=>c6z&Nko5OjdI2QP=5#?x0GIB7nr&)S8I7CENDt9#8 z;RwS-rUp@iKiCJ3jE!C}k5tc5ZbGfE*{ewj!J-Qq=okP&J)JUcSu0{uwJg0^I}U}) zjg8cvjP*l@;F|^|4@!5Pr7Y$)XN2*+_9?7GCg<9pc81%J=^KUm-~P_f{Scy!)+`6| z1JGu{v>EQdIV)ixwkxrf1=lL^0wgJ=N+1*0X?h=s>n5S7@mdGX#YLlIW0eM7bO>2v zu(pwZ*oZ{gtDg0p)PZD21iP9RRR8Oze_;N{a$kMefs@djY7+*#vtqObrM+XqR64RW z%p*k>JQQmNV2KGPB&})wFWQ+)<0I89g?^qD~vt zy3LI~)p3q2T7{W0_1Ay#oH+mcQ3#lle+;Cd1kxV}TQngXI{CiW3D&GrzdLXQIE$#* z$kF}tfi7Q-12UtQL?@to8Qy;ZLN+7Ef&2WG9B!H{6g#6i(jj}C(7b#lG1tF}ng$UO ziT0`9H(BZ=QY*Jm%*Vr3VtA}PMoBniMRu;CnES=-v^oao+PmrWX4o(kyi#o4lXTtp z%swZaXH2Ll`={s5P`1ubcoYZQYF1HAbWeU>fkPhjw!WdtxM=MiNKaB$A5dVN4I~{9fcSF`DsHoLQxxM~nPLT4vQCtx?%V%>k`6Dco+O^5+VWqrsZ?xrf^1 z8(a>bb{(Wba`uiUNa`4_N_?y3b#Stc zv}V&)AV}jrB~?yqL{Qd%SIpv`v1wXv@$noI+eC^ zZxAdWkF4Cs+o2PqT_IJFS?_BmhRvFD}m$Kr= z6&~F1AK?>=b}DoF-}l6Sg-2ERGmu{bG`>FJiT(x3QF=rCx=O@n$;{m!I_~6?J)S%i zP&WJ?jmkQhX8eNVYPfOI8ENwz1SPq*n(G18xLlya51;ig#OZ7!p- z^+ZLb=6Gc}3QhNY#Q^{gWJ}FiuT8PyG&ue1Jx$RJtvb43lQOF+ku6-gS`OfSs3>Wb zqJFV46LRDMxk^eeFtc^~CwNKiNmBmTW@kC~DC?2o32O_M-F8!1cK}iywFs`JhaLbY zH*Ly}W=B9w-QVq%_Uy7ZPGRug^Z!?Q$o})!%0jk-d%EL_696rW^L6O)W^yd(V6ePa zol{lG6n{|l+qraYX>&jQ5(|Yb-q~`mSdXEmzNgmg`G`g>*;tU~f2Tc{k_yv+j*cu2i9!7a0iQKB2sfL2=`^CkM)EeW} zqFTbO@gdC1^?+$iV`Pd5h;MtNNEI6DkPe{91>aeaQ8owa7DvX4mQm2Z9oJxKUQo{h zL9KUSR+on1HR&=X8s)oNQ-&r88-Y`d@5rc7WYkx%2E|`(t6E%yQcAtn7GnYntQhhr zo;vzI?Cqj=?DlzT*dtW^s+}7~k8PfJe684vK#MM1F zkA#WAWh!}Qil%(AKIiDW z$6n9;%EKay(^7m=fv1OYCjcM>{`m@vmzd6Rz!=|TLh1+EPfKQJ=kQ>G0Rb^{VK_>Z zoDGF^P7u1(wa`I+{*hxx1!Zm+EU-@mdk`&ffW43=NAYN`G(9P*CEZB#-Q+mYa~4fI z$V~lLJW*-q76;Eow#bHL!*D4rGV=Sj#?6M>-GQCU{x*=$pK&ElU$7rno;CqYQCFuc;({1=AT3|(nqyc$C%5cv8dos( zHi6sb9cksQMfKwAdA=2{3H22r)`?vnXOU*lum{EJ;uT1kU>pdsr!VDVy0;0+*Li(G zCz6j*jcbdjl7T`zyMJh{Ic9l%`95BmAvrl}EWqthB)mo`_Z~6n@%_1$yR@t==CKk241gs`(u7z_^BH5DddB7RtY(Curw9p0u@b_-3}S=|~^4mJXKQ zu4dZ$|3D|T_%8_a8FQKQCtpmTH5o{ut*C@j{#)w&*|5j=QK(d?TW?YeJp$Dq3oO8# z-R0J&*NNYIqA{Q@7P)Bw=TDVZ=;)_|$Da=f+nNYFl^Rnm?K)%3DzPK>YY$8i!;k}l zO*FX2txU)x^2^^`)Gm;BN)EV8y+qtY`tSB^o%B;gWy#NlqL$0OqYyV}dx^dPUtgQH zJG{nw0@GPCvX|%@Lm6yo+pgvqW>s<)BhJ-Q>iKHiV+siwLB8jK@4sfhI>whqs>O!Q z88i;X*auxCYP4AP+*&x=MrMoB$Vcvc@eX=L8_3T1A)huosj3{4+AA%MIPbzl{qElz zZE2TU??5XVe$jC;8CF(AitMKxjtdUEIQ=|pqsn7mo_fsw*S$&o$jN3S^1V+Ubfo|% zv2G--tGs7pL5JX#WyGR6BVni5OGL11P?*fS%tSNhZlk#(#>y!IdVWut+ZCzLZU;)> z0=TC;1fyo?Ub6Gsv}tu}m({f7Q}dw0+mM}7AmM7Ku!|G1hQl|n2!N&B!C<$ATyyi` z)Qv5RC3g&FnW*G zPIaZx=#{RGnoHgF=G_pM;(&&Y6LZyyPax?!kjRx3?sODjM7l}$F6BldWt~JaOcqMT zd#W#cUDQO0q*3IuVb;NWtcWrx{vRbwyGn3kJsoGGxiPb*qOozjR*?zz0!ZfP< zjxP=I{SFvufhGX^8Lc#9-KyVuGQqwX=PVUO3%|2E?Knb)-;^kntE4nveQW&b{!4b4 zfQOpKpaW7(U!%b+v3R-&Dsf`&FT8u6p?2@2F^HI(jpj+^_WtqH3sFHTT=~w3iw;<0KW3gaetfMVS^p zG8$Dr%+gZk?_P;07VwzL8SV2hoIIv|Vpxo2Ozwqx1T{oa4upv_r+t*S-$XhH2Oa!2 zXQrE=V)D%ncem>HQ>G4#oR*vebnk;Ui;)&V@5+Fe&Ej`SAxf_gg`4rqwEkbEY&iTn zC1ic>#Bh-JmP7mGRda{OR)FQfTdLEZ!sBtr;ivWy##(k61q$w`A2SqgxtjBqhVl$s z*`AkXqNaB9yg$r@6^WSc4^td+WSBC-7{aS@+`;~|ek(h$^X{d6dr#w?f$JhGf_^ijIVwUw@AM&qPesJ4REv}U)-CF|CGT(zcvJ0ZY zDI7iX!&SQ$R9)vbCMy^592+EN{$kI(K?(zm6t7$Ws-DJbaWB}r=MBc(^u0*2nsEaq zz<~WAx#g(m{q|b+ z5fLq^ATKSm;^mS9b~>GK+w(_8Iodx1GKIrM&>`@h-sZ+%BM+`>e(iG*eWCdj)beCj zjs-`8g!&lL((ZQFszAEmou!|e8{ar6p`Vh#DSx`6IpZj@%e>81Fe;isaUlja`GpNs z)NOSXs{VOZ+-29c6zy)a(=#x%@y>YE@D@fi!e>q5fp7j0Xd#}22u8xUW14qo`4i?P z{jG$^(^xAZn$PpXmMZ@^cpEJ%kW`nr9_IN;{q=TKdjJ#pa+J0JX)=Zg;^XXbP_D!( z6UX_eaQJj3U@N~{P#Hp+7?E9nu-~UUc|ID5wglY(8CYGECD2_6X`@wz#7$PrL9Sz@ z-_QhJ4_Xhhla(;sFb`{q&uPJ~6kmYZJ%Rf07Xp1a?Sx*gqr)u#JMg6I zTiIWtDITNpdi7=gJI+d&oU)>I!i(1qi@p;}D-xAm%i1p-X>)V5_y;(nGrln~faDl^ zW7npLE|2BjZAgATLu+X=>`Ycb%b)fElS4lcl2UJ0FyV-7i&`^KsS&1`C?<=?KWXg8 zk?3}3c5+IY*g|dBS^uZ~m8s6c*1b6)-6{s7!j`{#Y12+0Kj$mBo0aMrYMPH`0bYF_ zfjw5H6xQuGm6Ql9zs>>^`fMa6KzeL(eX3A_Hx#M8x-qulzRgb-!-}#{zUEi&S9^8y zP)d*>ALQoCrQw5Jzicn)8sFwbrKi-A^m!<0XFWJB3LK^rszLf4TOLDBiEWFT zK>aCv=QNtqfU32vP@miTb-m`a2U(4rqjuB=_$_^7 zv};axJgy_rFWfu2x=K`vnGuA3!A31`(F$!Kit%pjxD)iCkp|X;e9M?^4BqNTlkV8J z+QPZqt%|E<|Dj?4CJ@oG>lGheEBTA3pi&NdUfu}>)tURJJ-W9-Ow@n-v8eN3*RJ#l zdk*`zQ#GEo7FKeK5u^|4^+0zReW>eHcwZc}aRd6-Pu*l5i$^icBb9{9hUILR9*3$w z`n_W-1=l8Wnb{{z%9AjL0(siy!hmGG&!oKc`rd-*5-*Ng^{lSt9KD$@WdZSe>4TrH zwv?BycAl3m{;>cBu9E$r4yHnCcY>)rBoC^JBYA~A^Mqq;pas@>1q77V zMu}?iC83NFW@6W-kNUf9WsRPa_e-=lX7@D;ONKUmDq;voZH+?Yx4uoEU8ssi&k;)x zncJ?zHAY$QlmlL5v(P9QDIrO@TLT#nECa1q<*5AI#q7pcH1(2|F!j?fl1ueyK!Nnp zqjTlC_mOAo6O>WdP^i~yC}7#dw}+?E-lA9XzrYQ^yJ>ZtVVN-Th`gZp=Jehr&utVIESTrErhe4#e= zxpLGfqUh*IG8B_(|KcZGR;8|l0jFq6(Vg^S57gLMwokFrH3i{JR7fa9$X&z{K==Pu zDjaH_UjGgo1vQ*(Mp7st-Xn|#p|mLs*zEA%MYgX;!%TKB8deT{X7}=9ttS?JiDshuNrhE;hFxo=!v4p8Z?O-LV*v zr+yu^OzSVczfJ(h>6!irqEm?!jCeJh#K!{qGFuVp#JoKjzJtOUt)Q8in3> z5q5=DP0KjFj%>-{!S+`NnAwG!?8T~gI1Eat$7(T0=iPiiEi0hPdKSwQT5&5_`)eMB z63mQ^NR9KWEAqZx_n&$ncD{4-T$c=m1bz5^6i4Adl-Rv=D6uBL|7724Cu3)1QB&SI zAhHw145U?@_nm9q;Qy|$|7UJyepp&J{W<~_cSVg$5tURP*MW!CP>TdFo52F(zRN3i zVaGiX$WP0k$cM@Qoa~U<&m7LzYTQWIvSeKTu^O;j!f#+H-*dWmEo}lO8*b%kBak+g ztb)0DSYPr%>=Wyljg`nBk9gP0Uy-$4Hk1C6B*8GB_a2VsRwnGnYEx|;WwQyTu(!vt z`IU{`?`iY7cB^GE6RB2cYd|fA^q<@Awe9{)pZsOhYv_s@cdhRBFu}ROGz1(LGhVXO zEI+ioOIxWxQGA=Kx;?r~uZuA3pL)K?@fdG){=s;b*pt&mtnH%a^;3g;4v2hPmPyhh z)#!ZQ6&LsGfv!Ajvcm$WDT5nh)H2xu`3>7{l;+q#kg1pkRKfKZQu8OEq38E`(77Tm z_%|2d_Zi5P4Ysfhpf9Br8>I!i0$REbjnqyr&(TI4)xqOWoM6 z49mc(9~`XBkP#rwK;#~MqN&G1B;aU&V|xTRq;YVtJ3}s{O&Puj8()lZ`)b?$=u}hj zyy}p%RLUOQO8rSF%$9YQBd}YxM)2{%yv<9Z1R;i0B>dyZINW9C!9$Ew=OB1%> z=Xew={4$qT{t2F#*iX02#(swXI|!V2?Lhs**A&X`@0$lB3nDzioiu<;y=A<-8)Vr4((rP^ZZyN)>738Ga0Xzi3;K1gsdf$vh02PDW(dBFbIF5(;_mXB6Fp%$ zSjVJy{|1qDvxKD_9n(g-SsMJ!Zgc=wJ(l)6jKi*KhwvA4dZ}3NBb;%cjr!w7r2C^7 zm!#sT@?-AR#jh>FoRF~B78?Ey?(1;{E6lSO0We5~BnRB83XytuboYxn_;@k~sME>wc)8f#=EJ-~mHDS8h}L^89}->w zwi{W@%H=>hSQ#!05WSU4i+k$q`wmT~P=A-BaJOFo7rPHA{z-R+(f>fn-a{!E65Vhy zI%mP+ks2+k?&6p4>dvRFwXoWrA7higR&$7gPg_4+%x*9~^mg}EZHv|hXS#hX*i2QN zo6r_qN7~D>LTFLB)4o zfET_@y-rj@{A=8i?V1@d?+eqD&UWt@NgeJLQQ0y+hjWiRJ(#%LJeu9{u0TKBsYZ9j zAWu7n%x#=Enk}kn`Yl5V;h{J|s%IW&)4u zJ>PG*qCXisQ13O#&nA#XmDl%%Mi`#H@SL)I}>Q>1GvYq?B{drsx1@}WiE({7g5IennrDxD0$BflB1Q)sTkA;yUm@5E9W-AM1= zZDZc8_}cHlmk@hJeFVn>IQlH*_Rl~VK5^^w$URK1ji1~=igpQExu3|<%hP$U(Gu2lq9}>D>BdCSMo*v9t6nv$xme{ zRyStaKXpki`zF+hWXs(6>xggnGv`d7bFL5AbSWIw>uMgI*O?9`?!Jzk zNV=KB^9~n`v44th3A6Dr{uSw`QN`5QWAh|=t7zr8)@$Yve{nv zWlM8d$=8Q{{4De3a;O|hP>t(=f_KVa)@9R#BQW0Wgla!#CfLfOewk3CbKsqQA#UCF z5N+O`!`BhYHK#CI!A>geEr@POnBa)deO-%gj7TyJ>8N>bp$f21AMg|QD`28z^hkGC z72USG>P;v;X}rYF+>I3P2S$$_bu~(|zraG0I>q=-)JvXjr0tl^Nb+|2Xa5~EyU+OB zU!{t;kLw+)*pn7RHM}oU3*Rm*Zej{sl}(~3k^wlE2HFq7b7SzdG0jrc|x6vxKCG4v5>T~lQb)}KCx~mz# zlt&h7p>c+MS|O;MrcxmwS+g+)h!XMkR-FJ9f@4k?cr+dH1&gEF?6;VwBsnOR?t#z1 zI1|8})5GRO$^|g37V`d=__Fc-N_#yzq0sRU(PrU#!#Xl6$^j* zrv$dq4Ycu2+FsQ20Zc3M-2f(mH+Ed@GV5q2wD1&Q?uLrK(eQ;gmNFujO*BD{E+o9K z`}AD#c0i*s>%jS5R>6o?fU@X^QNG(<8rv$;F*+ks?lV5Ip2G z;z>^h;zbGbS*Q?=3bu}LHZeZip*f#F=C*v z=B?|=0i8$)O_84VyVDkrwAV-A9vJ}rF(Pms84qglf3hF6 z7I87xVFJHNiw>NrrE8Zs;NkiJ69WDiG_-kV()Mbte$fDC7j17dW42Uo$OTMYia6f= z`b-GqS{)QP6I`W?8Bp-@^zMo9D|D!2_3HjuFe~I*V~A0VQ*wT(I3py4$7stNsh0{+){(zrFD6)RPL`LNYy92!5{eZ2Yn>yPUJHo0zgMpL zIo#;5fD*<4JB^ZLkt=gm=8@2HrFFFaTo(WGsO2`UT&i`?*JQI3L{mq}hX*;ort~Z3 zqzq@hzc+$?=U*5&w@*+CKo2GUi&{e*VU~fM+#zAmdW@D-Y`NUJS-ayOs=5>|<`?#L zo&8Mqp&7E<{y56PkKc{RT*IK8 z!aaC6{+lc`B3=)ba=(b3%ofz`c#18Y(=15vYtXE}MqHq1@5GC2!tUiab;}F8B^ADH zBJcu#A-AJ4-y(Toov@*2U^=`rpwNHet0sW(TeFotl>r)nYdWlapeP9^h@ZliGzg{@ zkNkriOVb>45MZ9@1jdw6TVQ5gc8A^5kv_ZRN-xRja1Y$jI__<5F9&z*)>3VfT{&OZ z`nRvzbRgL2TZMe%YqjPP{z=kUMo`7UI(U3bxza&1?MA`ida`TuNPtSj`ADQ}OOeQj znE;nS5G|_Ke9~f_3dkTLQ~HCPYHflEBOY>Pw5ZE*Gr67D*5u5$6=zJs<4RHQKDsKS! zy!JMK=b>|E3h4VK-Cz9$wE%DK?p3U=npP%X8!Z2YM!&P-qMiJ{$R#P{2 z?6~6AB}tC6f#0{lseKFwm*-!u-q$~av(QU$HUZn38{Jp&c~$xW?=yuFl}dl1{)+*? ziSCaf%G@Xjq27Nb<w*qe*5}GU7Ucw^OAklr zLj>;_yqsl^x67F6oX8?yN=6g4IQ8W5RpNUE)WTt+UAyDm-`qW)#kMmWb*fkXEQcr@ z5f-Q5SC}$hfI4|oa|MFmrPRUrDXq+niNQ?c&ov0@cLR0mihG+?f{t*P2~4P@2hhWG z=MIZ!bcW{s!ZFiR9p+OPPn04|L@_@#O>aw41zAa_b*hJCi(fu*+^C5vR?E`4@AP1Y(&dc{Va(xHOI(dR8*OGrH`;YtigD&%VkHM57 zqVOH_b>kvIjl6rCS-eHRZWUKUzZhn{U|)R8&G2RQX$lg^g(7GR{e2OdPHkC)G)23l z@g)<_{4@xk)o;7J67XiEJr$i^+;gR@G}5(oL8?P={1r)AC2%-O&|h=qX*49&!>KID zWwL6`@8;ZdHJWCqO4 z#D{lfzP-oD>qboB*4kH!e{1crtW@=d9*xTtoEcdlKBFgL(xO7wyhhcE3^<4|$vzRotJrHIe6(;XfeQ0O>VtEbdQj zf(%VI7moy)Wc^1@;vlRu=cy84gYRdAmpTvt7AspFG|m;U;BfC0*kIZBPgD#oz>xtbruL zQr9q`VYE=~qfOZscj7|3gAqyc*lNniN3Pe~bo<6|d4gB5{`x_rzp>Kt9%{c8+>`uK zM_sTqsP9#LM0d=)(bfA0&>8`w4goe0;Xc_7?XB(Qv-zVgzlnkUDOyEMa#!=|P)?Bx z47)=RIl9CXFvA@PGA~}3zV9WbaYw>WG?O26p;Rmqcdha<7Q-qgyO1z(;&WO z1<>yZH%6zgcyeKAics|iORq751mD&}=?7WLA;-q`QF&hpt! zJgM9=j?tH!GPV^3^`!Eu5%VEi95u_c76UWwg}}+o9nVP(%u~fB8)20erWNA}nBren zEx*7|y6z{66isS60wiHAf>QXRM5MRQ0jDToua{G#qB*QmKLT3$qXTKRu zY_xP#W@*%fTNAT{zYsQb_^pyzaR(Xk&jOmqiVP4Y=6vk}ZaY%RjX7yi;s)1{gX+Tk z+l)a8gSUr8H^-8S_ zH=)wsy`YvW7kz)BiYmRU6+rx+Pch8P5_#m) z6!Pn9;BNkKzo%&98>-==+!UAgFfaCIkKeClDoATrUoKwlJf8&*;?PiWoOLeC>^V?`*~^g zDwjBB!NqE+UL5fuz;@|jZ+4P&7L`0eg5*2pAnZGD_wfDv1Q{~=#kaygaPg3vacU(g zHxjoql4hfvgSAV}>8oPW3H?>dA!LO1PU(L8P&?v#Mn&W!4`nB3(aSjq_z$ygzOrj8 zG8c0pbQwEcldroM!~JzGy^zXEe67~uYPlx0ow#0OWdzq9*()kY=J*q5%Qj?In!H>^ zf8f*ryX}O7-FNDMJ$CAaJ#iXp|1@5fAXe@#>DJD<7OV3h{X%C5m>g-m6~=ECzWXDh zwRSPwvgV1EdqXwI#G|s~+em$;QxxY^v!#%uWl06!>tN48G>m(k!dHLBAXBJ38P1w` z8-HD>;Uui&CS>1gK4CYj4`I;U91~s*sF=X>2vCD8xyW3M)@&VegBCh!n*VNLrGrHr zd2cT1j1jNT?gaA=z+`nVzbwwMD7dp4mxTUjTXmt*z&A-ZTGQi#%Ugol zFtIDAS0Z?Y&`f5jb5qqrF-9-gS9&dZ*gX~rgOO`tHe+4_HwOc_R@0sx3K*%b06q}pzB0f;&cANF6YK+zgw7?4l3oubi{e@f)0APIC&q!FuTwfX z;X9-rK}b6kXk>=~C$S873qnFY45ObqvLA}>iPtd)Yuxtu*dCy3!ouPoKCUL4S35gV z-^d>vbO-yZ_!8g#6^PLPD($`Fnp(Q`ag`&eG%EyYDo0T%2_P*r6$KTXU)(+6RqVYM27qaQSbzywaQY4je_Fn<9T^2}T`!t*lK&F3Z9v$VK15I@8d=(M_>X)UYM~OC|tV>)n0QdlP z)|LuVdQn@Z(X2c8b)!HtJE&E*U#l3FyTu`H5z`e5hS(n zP%4$1HDa)jWX}n=wQTn~Y$o3FvfisNODw%`xAg;|uiJ`sqWCG@yoaD*731B~ywuM! zEpNyk`OlB{xT-BEUt98Sqx*xPnZ)xYo^44sg)^Pj7KlQwq*ZNBP(eS@)@sGg0#OSo{$5O;%R`pzdEr*Ie1y)CNo!v_Q7hio~HR1 z39UVe)1DlDc*mD+K9FHfsbg2NPLwcXNO?PtDDT-0oZunSl-#rGSkk9|9cW$~D6v{H zSF)1GPCdU;Gp?z3GG1%OkYIefozq#<419z^QII^(wg_I4HsHwizfL%&#g(Gf@ked9 z#82DzrE(G+JGWcZ90+#IOL}esfMf$=tg7d>2#DBILP>!S$LQBt+IfWOnaqincAhMI z0=u58q9-h$!ogYZw6s(Hah{&>n*xqxCvgVjX4|*5^F06iNHTEF5`bC&P-(Oz4$j7& zpga4go;2&tU{~9=&wwn4vnr#vt&l-Y;c#B2OxlMRPTMOAx3*h2y-g|i0m`BCQm(p3 zMbE9OYrAFh&bmr}w>eP?hq5_+R>CbtczDTT{?XrVvpmEFUmog?%pm)V|n;{!V$zJ|JCA2G2WO{IT&cP4hTmh~SrA}6N(2PB`|}5TU*e;` zspYxStgSVr{$*7_n_(=+n_;OEk1r`LMhpc6h-NHQ@||P8h!o1HM2GZQmONZg#67`Z*xO*< zMG_KdFt3olyRUb2@Q$#+@Vz*U)2$kpn{iQ9GO}HW7vH`v2tTIuFFeyiNpBJx-)c`+ zzjp^V>n>vZp~gf4gea=S@&`&q*Io0)WiGW$d`|nbdF#IVSZM2_=m$yDpdG{4UUywW z5w@f>v-z|Nmf4pAo1(s%54);8um3V!AF$%h7w)&U>CsR}W72pivo970^T_W?A{l_- zDI0X*AFKVDLct+)z`yM-32+f|wR=IAnPnV{8E#D2lxKG6>nvP>IYv&medbx{9jVb= zVAj+e0zjFa`UKifY z-5x<{IldZg=4tq-^9do*peT8X5#uxF;-h+pc)-A0>&@`Tq`x!6jVD~fu4K4W`iL*6 zgs)^x`YWAk*p|oFB*ONbg)s%U1oZe2%6z$wkOd_aWn@Z(!Eu2i+{O@uC8S@W? z>zctDDa$}xn$GswJy}kyi&0-@i(idYTCmt2vOndYs3-YjXQ-3dmbaZ0vwfR!1H&Bb zDA#hgNweCS4fTj#xos|u6~@h-2J1|w2az`-e5Ge{cNVS(_r1n`XKVRNKs?NXX&JHj|;Mj#_Mx_kH7UjLC#&7QH0XB zwA+?TwHNe+Dt=v$~+lE|9>r1zM zi@bkee+f9gUP;2|e3JPbe$r3e&tX170!EG6^ftvl;p*L>J_FTy+t2Q># zEgSd?rZJ2ufg!o7XsqxUk<~Tya_;3~(15a?;8c<32Ev3%vseqhGJ7^T|IlO*4ZBfn z9YP~)h)v0-?V0g2XXrq5r2WXT9yf!gMr$-Xi@WXUm6OCN%V0l1Vx~qL%Pm=ofDz1% z?fgoNi1a94<}LGZ?X|Bn%LaAFfA{R28Kat}7}6@~N84hSl|6Pox7YS&>GC}@eAG`9 z`1-khFGa_~y?=}CUu~r)X#$s*{sWyAtG;h!Zz(IJLAg|W()+S8>qHyV3_)bxOW_E& z(@ENzQKJcW3|~-Kxum^rC6o467wnCsww(2-&0Cb?W4(l0(Vo>et!}d^bs(akeR&S(8DV)sv*n?&G2h?H34r|KoujxTr3Uxyu@n)o0a?^@r9Ub*+mycfVT`5?FWZDpXkvO3reP_J~RZyA(@M1m#ndK%h{COJ;8M zJ(5b2uo}wMcIrK+elCIU`Sj?qs2zjxUNRkeX{A8nt;e8UYvm$w+A`b^kQhKR0jZj{ zl#{8S4sMoTSM=!ogEkhP5EigKx=#aRJsjVuX*sd%T-qAnYlNSByu4SEyeTdtrgkSb z&R@MHWErli za5N(p0*X-6+ql17mlk?%R9d$gOu+iE&KkFH`_7W8ijm1m<@*=j`4i*S%qU5(b9n6J z)(6}ZV2+nXXEG!G+a`OTqjZYsvEf)(o@QZCV$YvAW6`SW?Jy}PWf<&l;%yPkKgW)o zZHxNAm!V{hpxy{t3swMgMa&$SKqRp1^hcS&*w?v=xL)S2qQH~_g0+;Ic4<=q?*Vt> zu0}U?t<^<(AorX63G5d3Ow`gN4%1X?`H7|lzRE$ziYu5HH~V`EhJ5Qi(YZf(FTES4 zl;MJu6p`CN)tA@4io2gkd*>@#Cc>MQmIf=FcQ>!}K^Cf0=4}I%AGyDQI7ojXnlEA` zUH$J_3oQ6e9mwGe68dbucYX-7L>)KW+?^?b2%kyXyx2qfXf-81X0Vm+uT&i1bovo& zNqxo0(8XL!_@L8uT$ejNfB9MWm&&|vqs?VX!sc=kxunZeGj4X z*0J-xoGbBzL6zYY1MW!)3QbkO!(&F-U6Wh-D777qeK=u=rG@NF)gAS5d00q0t8Y~~ zyQ)SCFlB-nk0u_|`RPxLI+f2YOmQEf;%S=Ux4ha?VqBFBmb%N z@kVA(JT|Io;0t`sn68O+ws!Wa;=oA^ADUNK+?;mw)RiD5OHk}&%B4cwgNk`+lv%^8en=ORe0tZK z>34$9eZ-TW!FU2~E`=8;ZJ&9p%b%Yw!+WC?@+PQ60!G@6joMo}zXkj8kUBQ$V` zBAd>PUJo<%m#I;2G3M#Q_-Zr_#o;sl>kF{kc6-ZlOQ&3uN4v_ya0EGVw= znQH&&gSv!uD4 z!*Kz%ZB({QkAuZWP{hH6HcwRL5a!m}+pP~Hx#cl7+8#I4nQrVu?ygNTEq!8;A3%m6 z)?^)oG&pigDLKw%cRjMf%4<-#d61t6p$|KY!GBd+) z7Arl_CbH@Xc@XWl85W>9YmW|-^{`0m5GNYMgQ2v$4MvDlxNQCY$Uzb64F+ArGV9`z ze!Kv^*ot+L)(m;1u9E%rQ4EI-n>kr8YJv;S$M??oG-n;5IhU|EqYbfv#RnF`X~W~i z8CKpE*s+6e&qn0C(`BXw)A*+@risu^4HN>hD4(=TBBsO)SfO!~Rai2bFxSiOJWn!R zm-(l#>PS+t>HA^Ov|hE3zjh{vg7e+vFQ(?m#4a2k#y$#)Y+KBV@L@W)V90{c8wX;k z!sa7$d~>I`@uhv(&8!ocXe+|uB%~$+pJNlGaKj$2-K~&qiQ0HHUTkKXA7O=kQW$n6 zIlhtKH`jkLOIS}p-2a0S;-6vBSh8ot!3O8;lT;lgt6W@yO^^_I?@A^WGL!29tHr+w z_$n2+7JF#nh?>ab>|FA&Vkq`Jre2)dNTG_11i?VdXXUx~%cc`U6BNEUfGB-=-#xn) zq{+*DNXM92kw9o)*<|{})6=uu*GWhR~c+5)PY~As{`)dkZ+7ckIb7j>rgt-bC1q4-MM-;M?QNmG6kr_ z?3P&BKr&ItsWX4g=+4^7nGGzddgF~#cI|F#n8IRk)`X_MqvEdT!mz{-H}bnL}^)E$_`CuhkV)_or*C$5=G;{-PgTK`%R73p>-0Mk?y=?AJUTftvjgXyud zX228}Vj2a2~F2=SnKN7>(vlZ*9 zSNN_8#l69(yUQ5Ajsr`AiB?{gTkq2h&qthDiM%*{P+a!~<}suEnEwyuJI?M59an2t zLv}5&6bFW7HV+p7wnKz6SVO!2Qq)plbK`ct zQ8!*FtpM`Jgo?wlH@$xJP?A>13Mmt}$gZ->weacEi+o8osA(}U&iTyqxz=SZ!Qw>} zVsoO#wkYZ=JU1X;8sr~P%rPnNOkj*nR_VU62hkT=M_C(|1JdpgnwlJ#n*lxGJ)qt= zT@}v~W41L`-B`}Pn=)gXGxc6YzV-lWZTyyN`+E=UQRb{0@*52kx0T7qTbU$teUd+_ zR8>%G@^vfCNKM>8jfkl0n3jA1_VWJQhgtZIALAFQK_`}mhW%556IDBK2XF-$qLztU zOd2od4g{1pqs^S>Sr$mYPmMnrq{I@JJ2?Xjxb$G4jJa^0{ zWXZ`)+>my+ezPLCDB?SyUNKD0Q&tHyXW2ne^)n&;kZ*QQ>u(ec%qcMeS7h-hVEK!+ zG#hVPkRR<-^+M9+G?ePf2cOLGE}VL~7x^T_rn9NkJuQ?XaU`iN^aLEMd(+Z^`Pn9s zKS7i6ZnsD;TQA)gK9p^S3AO2%QJ+574k5{D@b#@XRpuRH#)BDg4AEHl_BI6W zY8;2pAN4}{msq=8sR($j9by{DMK;FjW4==!k9xg!V%!BXL$CDI(7H;GX`WM94|AiI zXg7hc&3HYPP3rcDPcT`2rZFqv-@S(@YIZoS)!yK_KlHDw6i@f(ui~&mO9|s*(907mxO$hLU~$8ke8?G zn5La_f=}wk`L{v3?md=BRf0jEmCrr8DSB>&>%1)z=rIv?O{|VeLDP{cBXOmu z)frZgaB#>^cRKN_Zk)Yj0q5e7d16e1$59k&N}S$4(|=8B6nqZTAOX9p_p(24J1oYK zFHH$Qcedi}ig+4^5vL%yB6}bG(lM^OsyxaB=bNTdwVFKTGk$ya;^e@zf?0?8?9RFM z=ELNudYjdnE{_7A)kjs|`yQ$BS|vLQnA}9;zG|(NI-Y}4$Fho-_{f>ZfPoyXBUT>~ zSUGy$EX0JdAWptZ$$8f1=dDh2{$jMfk0H}-w0m%!`Rse&*RQ!B0s@YMp?%yma!+-6 z$9r!Z!3BeEmxGLyqI?Fp;)OeP@cMN2lB(K(YVfs**B7HWOlA55L=5a+@I*4cH^+??w8MB z`A0P;?5uCE{{aU#IO3DJjy05Ot>DZG?eA1-IB5V4E$xvrgs{6(U4V6OfWvH4Ilq@8T0UoOj_Iy~d{f5Pi&bAlz?|1U z^HDalq&&;c+78xX?NUO_bq=gfZHJ#gS@UFh!)3A{7dkcZF#pih-&$4PrY=& z(AijrAk#YURH529gZ)!Uu2d1r1h-U9adkChWC2Fb(<^j8e9l28aDObHx6=B8n~tS0 z-Zic?Ss40IPXkg;?DG^3-G(4o{a8pw$>Ehc>)aC03yK+WkP!YwLl@k6%adnipR^-Nn#T_o#PQPskwF{jukhf*$OMr+Gj{ zMz^llvs$TfqIBVDQ(yd!NwK2d@nK3+*_R2g?mFd-IC`wW4yPbs78pA}p=WM!ha46z zSDeB0m{i=sIO#gJ%oZd@Y0e5bSbb%M{sG$;~myzHaC7->im1K0OJ3I;ch2C7M8DGZiR)do~U zt1w@vylL{n^VtC6UiIk-;Sz~_kGzuTkQV&}6QzxbM5NRmmWXAH z2alKk=9|APD`ta7=}C*d~H0@x-GMGOF&={j6o8~K$iJ8GAL3$|p*W+xH$0e#%KY#{hy*GlSm5TU}N%E~kcnNbi6r>TQ3a2fw z${xB(IMErHo~i&UecdVCEpr#R$={J>%mQCm(~Mk>=m{BbKW3OqK6-4j>xDBfW5eHg&CMJiTKHz(~?z;jA6G#AG*|+y z50#vcwW#t$If+^}ZoZjmR%oYc1~4WCA@ydK3oNJO0Qrkk|G6r?)U%Qd4_sLg_P9S7pjKus)hXu+ieoa|t?R8xj_b5oMfpoly61yz z3}#dnrJNE+K#Rp^NsluJkkVZW0#mOQf`opwPLv7(4mn{)K1llhv~Isv#!Cf6=!GV& z*;|fr;btouG9{k*Qjz5PtQEEJdjhkOyHBj+Qv~Vp{h{in&08*X?>W!TrI8D6_I(bZ zIaNd#x1b&!u8N>=cmXoV05(X7)+6GX`UG`)gaUMG76D#wr#0&G97D*GvtxJ-s)5{7 z&T1*$MeKIgt(S03coy2(~r39LLQ0w%}kFsaLW)}wd_8KTh2 zX&51Tr9S7jAzRFVU@ZWQ8nQSg`<>4Dc0Uz>j(jND#@n1HH4}4?Ckv#8=JcR(saIkH003{AG$hIL! zp=OV@H`T!|7LbhU`Wi?94#~t7N*co4(v-_*w+R~ch!c;HuoI+%&OJ?syhdLSdsE@jRF+X$lhNvC%Wq&W0lj`m9 zh3Iaz^eVNL-@iCiq1|`lOHLeO>oPo+tXrL;3-}B5&EpbsU$8MpXnW|64c8Zq_Bxf8 z!p=sh51pJ|Wjjr{JHrXDy@yPU*{2eI1+Vv79l6X!kdgJbZ0=wmE^BK+%A>+I6$O^y zd2p1 zJ6dvTwC=9dpzHkYso=d`f`cXfYjd|BvQAX73n4z&F>62X>EMFrs6k6IzyGkND46o3 zc;hI$V9>L$dh?C6>q_WH(V;itnF;30VNi%Y_v-m}2&>ie0&fN|OR*or0kZ5S$KI&pt&ip^PW3~Ne;tc#3_>%*_cs%W(kZ&d<0 z6K*CWLH_k2`H!FnRDcxRXj(t^yrN0UG30iM$#^4VbGOX3P440~}LHlXF8eq!sUJD{ue@|6=AkZ=mI2Ja^ z+%HbXdrw=%l$$#Zyq7C5@$5Kg_NZ#|0*w`)d$I3pZ~J*>m?Rco5^#+Ebp3vHjh8A@ z1;f$=!Wplt&yk>I2ZuMzgu&kv@Dg&H{`t?80^)w0=j{n{wJ5q{hoHurf1jgT&3(Kh zfQ8VY(Qy;+p&;)8QOhU|QO~c6MSbeiViUUQHxp3HiE%@t@$+MpdrHgVF>$PKpln3^ zU|o4t@$FJ>GJ&oFZQcsJ$9ym$>Hq%m&G@-7LRLeV0{ninC@H%;G2Sgso7!kKah7S! zhkC}p_WUWAF#&42DQS+53tD!7Bw6Ryf&hPy#(JsfMLo0`xAQ)#&`>tEd)gBArlj4= zsA6hLLJ?X&U==eX8CrFFWp?g#+^3%r8c4?O#T7YTVt)u`Kf*17wG`)e5F!1lAj8+D zSzKrJJ((10hj;NrdCwM@H(^;z{eE+VXu4Q~mnwoaNhtF-r=&q49L9X4J?x)21radi zZuzef1ZgnTWl+g^NivQ{26*PV`BhwI{pEb5l{604bH$nr@1z|r_P zG_7pgt`KRP!Wp(GpM7WPB+!-vW=ua(aBZ6tYH|2sMCPYzjlT|`XklGaIunw38;&(G}RWWRPDICB>I(`)l$uy4S0(jGe&&0OOA=ULjpFb ztZ$6{j8m_*>;Y6@jNK2D2H!|zTM}Epgt&0{)%>ebE$K{R-KYl&Eiz0KNy@eq7U-K6 ziKXDHTlu#(9VJ7HJ=cIAr(Kh#(EY8uAN<5|4$8S&)B@qcj`n5sR#PqD3Wylkqju9#miB z*`)rHufhtp3N#NeU+fgQ7!mfWy4ORZzll<27`$sQQ_>(5OZ$A_gUtAn$=mR2z!=3pB8aOFBbpBfv^qo zzb(7seyvR0$J#Z*p@p)0OO!b3A&65bdH5sV19^fSA%gLb`yTt#!F&3yB*)ZLekK4RFj;=%s+G6U2YwQePi8?=d1eB zMzRiEd_c(?Yp$1L{y3R5*I3RVU*LwcDUTiII zNCYE8O!|zbn=zG;U_Zd8P%Q=48GH#T0RmYigBvd}Pk}8YboCzYP;vmbFC(7J@W2C& z<||!o2_nBIdjS|J`l)^?8o8J)ZHn`LZnKKdAopu4fr#bV zB{h{_dR2S*XS6UoB^2$+^+*^Oa%V1ECMO#5D2&i?DMBI3Ovw3hZkayFPi?S5^N zhch3!DXL8tD*!V1p%t?kSfw$1V)5`+0<*M4T+TV@RxkI})xh$nZb!R$=)04S-yM^> z62i}Iy^|m#md77Msc${v$iW`cZxKKOzaTQeg*?S;goxHU2t%OP3a+o%Y3E6Sas2wk zu+j=*X*4m;<{7|=ER0av^v6wUN%V>n@}`8XHsg-MJFM7mE#$8}Y68XJRWmixsr@&M zqFX$z4fxavV0ju*y+%PxW`Pm!y{e0D`ko%zl@n7CtBAvWC>4(iy$TgEJFwv1&|D}~ z*CH~0`)rC!TjxxO`g4!&3kGW9n7_sE#R{Y8mB;QkG>L?F!1N5Z`GfHiu1N=_&$NCRXGVz!*qWM2Z}U zw1@?Cse8rr0nEl?*bc~^T0wdD`D4g!M1TK34qt{rg4CF&RcBSrzI}ED9-_rsZV19- z!SUM6UN|;8`MJ;R&rOl)wz(A3i2>Z5(5VQ+atA;;+)@ip8J6|*Bo!t#xC_6OVhj!cHc z_jCiTj7AvYt?`Chlw;P`XQY{mltV4X&Gw&XqI zoT__^IhOau9&*zQupS8!Pg&a6UsJbSzty7$~8a+_=!0;*5}JUtxSk*gu=S?;h7o!k^| z8Nd3IxAP`6(Vurlv?dSb`}*OK(h4z8x{dy!_6VJ5Q>nf4fi+EY9l4;SJ;La!J; zkQ8*d@8FvI=}LyP>wVP52J>xeO+ljSJj|beiQ{}azm_e2yDyJ2y+Ot=dY%AzN5f$b>WeN4vD6?)c1XoL1YHUl6jtRZ;Q=JOf3GHG$2 z=5go|!WW{A_Ku+I(B@cJmq9`sFdyKl)Mmujr8(Fh z{NPlJ$nlVO<|~tz&=DQ!U|iRU^TJ*Evt%ECKbA$ml0x$^h&4Yq%h}&(Pp`8MaM{4J za*P6ZYB+l=t099_ZBIded^u-{!o3MzW-2hgjW(3vTrjT4DeppSRMjX}aDKUK_?^k~ zawc^$zq-C*MXMm-dKr<1R{W;W<`Xzp2e{ayAO^U~Qzz84NklR2=-9Bqdf3J}aMnek zW&EKFv+9x^;k;+u#Q7X)d61ro(Rvo4?|>T=D-rLYPO=UXDq49=*M;|Dpty#W8e8?L zj?)9k5Q<8pT1faY?=LlZtg3^>IJe5FT2K7&(XWWFC*lfF?O+r5s$U(|srRa~UZKEMEu9U_T%1B5$OI&V80z z3+G%Lg;|GsT4Aq0*Xz;swH|92Kih)7!i;T|@Mn8l94AV*zGMhsu7u;BGve*#?cS*{ z4y+i%CO>%I)LNi@W+>%3C z8383*KZLzdw=&N@N*=BNEUk#1XW`>@FHil>yq>R;auc_|Ic0Hx5oiN22Aqc}4Pa`v zgJ2s!vrg>YcYM#k^G-DV!Icoh?cL+W<^7d+0!TfvXYZawnZ;5aVg-4YY9{AU`vH{Cxda%bO1UC;a~uJ{>6hA1t - + @@ -6357,11 +6357,11 @@ minimale Strichstärke: <b>0.2 mm</b><br><br> - - - - - + + + + + @@ -6614,13 +6614,13 @@ minimale Strichstärke: <b>0.2 mm</b><br><br> - + - + @@ -6704,11 +6704,11 @@ minimale Strichstärke: <b>0.2 mm</b><br><br> - - - - - + + + + + diff --git a/Logic/68030-68000-bus.vhd b/Logic/68030-68000-bus.vhd index 7cbd345..9d5d2ee 100644 --- a/Logic/68030-68000-bus.vhd +++ b/Logic/68030-68000-bus.vhd @@ -105,6 +105,7 @@ signal RW_000_INT:STD_LOGIC := '1'; signal AMIGA_BUS_ENABLE_DMA_HIGH:STD_LOGIC := '1'; signal AMIGA_BUS_ENABLE_DMA_LOW:STD_LOGIC := '1'; signal AS_030_D0:STD_LOGIC := '1'; +signal AS_030_D1:STD_LOGIC := '1'; signal nEXP_SPACE_D0:STD_LOGIC := '0'; signal DS_030_D0:STD_LOGIC := '1'; signal AS_030_000_SYNC:STD_LOGIC := '1'; @@ -140,6 +141,7 @@ signal CLK_030_D0: STD_LOGIC := '0'; signal RST_DLY: STD_LOGIC_VECTOR ( 2 downto 0 ) := "000"; signal CLK_030_PE: STD_LOGIC_VECTOR ( 1 downto 0 ) := "00"; signal AMIGA_DS: STD_LOGIC := '1'; +signal DTACK_DMA: STD_LOGIC := '1'; begin CLK_000_PE <= CLK_000_D(0) AND NOT CLK_000_D(1); @@ -239,6 +241,7 @@ begin --buffering signals AS_030_D0 <= AS_030; + AS_030_D1 <= AS_030_D0; nEXP_SPACE_D0 <= nEXP_SPACE; DS_030_D0 <= DS_030; DTACK_D0 <= DTACK; @@ -285,7 +288,7 @@ begin DS_000_ENABLE <= '0'; --RW_000_INT <= '1'; elsif( --CLK_030 = '1' AND --68030 has a valid AS on high clocks - AS_030_D0 = '0' AND --as set + AS_030_D1 = '0' AND --as set BGACK_030_INT='1' AND BGACK_030_INT_D='1' AND --no dma -cycle NOT (FC(1)='1' and FC(0)='1' and A_DECODE(19)='0' and A_DECODE(18)='0' and A_DECODE(17)='1' and A_DECODE(16)='0') AND --FPU-Select @@ -409,7 +412,7 @@ begin AMIGA_BUS_ENABLE_DMA_HIGH <= A(1); AMIGA_BUS_ENABLE_DMA_LOW <= not A(1); - elsif(BGACK_030_INT_D='0' and BGACK_030_INT='1')then + else RW_000_DMA <= '1'; SIZE_DMA <= "00"; A0_DMA <= '0'; @@ -422,7 +425,11 @@ begin if(CLK_000_NE='1' and CYCLE_DMA<"11")then CYCLE_DMA <= CYCLE_DMA+1; end if; + if(nEXP_SPACE ='0') then --presume that all expansion devices can provide a buscycle in 320ns! + DTACK_DMA <= '0'; + end if; else + DTACK_DMA <= '1'; CYCLE_DMA <= "00"; end if; @@ -437,21 +444,21 @@ begin --set AS_000 if( not(CLK_OUT_INT='0' and CLK_OUT_PRE_D ='1')) then --sampled on rising edges, so we can set AS only if the next clock is not rising!! AS_000_DMA <= '0'; - if(RW_000='1') then + --if(RW_000='1') then DS_000_DMA <='0'; - end if; + --end if; end if; - if( CLK_OUT_INT='0' and CLK_OUT_PRE_D ='1' and CLK_030_PE <"11" and AS_000_DMA = '0') then --sample rising edges - CLK_030_PE <= CLK_030_PE+1; - end if; + --if( CLK_OUT_INT='0' and CLK_OUT_PRE_D ='1' and CLK_030_PE <"11" and AS_000_DMA = '0') then --sample rising edges + -- CLK_030_PE <= CLK_030_PE+1; + --end if; - if(RW_000='0' and CLK_030_PE="01" and CLK_030='1')then - DS_000_DMA <= '0'; -- write: one clock delayed! - end if; + --if(RW_000='0' and CLK_030_PE="01" and CLK_030='1')then + -- DS_000_DMA <= '0'; -- write: one clock delayed! + --end if; else - CLK_030_PE <= "00"; + --CLK_030_PE <= "00"; AS_000_DMA <= '1'; DS_000_DMA <= '1'; end if; @@ -489,22 +496,23 @@ begin --dma stuff - DTACK <= 'Z' when AS_000_DMA='1' else '0'; --DTACK will be generated by GARY! + DTACK <= 'Z';--DTACK will be generated by GARY! + --DTACK <= 'Z' when DTACK_DMA='1' else '0'; - AS_030 <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' or RESET_OUT ='0' else + AS_030 <= 'Z' when BGACK_030_INT ='1' else '0' when AS_000_DMA ='0' and AS_000 ='0' else '1'; - DS_030 <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' or RESET_OUT ='0' else + DS_030 <= 'Z' when BGACK_030_INT ='1' else '0' when DS_000_DMA ='0' and AS_000 ='0' else '1'; - A(0) <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' or RESET_OUT ='0' --tristate on CPU-Cycle + A(0) <= 'Z' when BGACK_030_INT ='1' --tristate on CPU-Cycle else A0_DMA; --drive on DMA-Cycle A(1) <= 'Z'; - AHIGH <= "ZZZZZZZZ" when BGACK_030_INT ='1' OR nEXP_SPACE = '1' OR RESET = '0' else x"00"; - SIZE <= "ZZ" when BGACK_030_INT ='1' OR nEXP_SPACE = '1' else + AHIGH <= "ZZZZZZZZ" when BGACK_030_INT ='1' else x"00"; + SIZE <= "ZZ" when BGACK_030_INT ='1' else SIZE_DMA; --rw - RW <= 'Z' when BGACK_030_INT ='1' or RESET_OUT ='0' --tristate on CPU cycle + RW <= 'Z' when BGACK_030_INT ='1' --tristate on CPU cycle else RW_000_DMA; --drive on DMA-Cycle BGACK_030 <= BGACK_030_INT; @@ -530,31 +538,32 @@ begin cpu_est = E9 or cpu_est = E10 else '0'; - VMA <= VMA_INT; + VMA <= 'Z' when BGACK_030_INT ='0' else VMA_INT; --AVEC AVEC <= '1'; --as and uds/lds - AS_000 <= 'Z' when BGACK_030_INT ='0' or RESET_OUT ='0' else + AS_000 <= 'Z' when BGACK_030_INT ='0' or RST ='0' else '0' when AS_000_INT ='0' and AS_030 ='0' else '1'; - RW_000 <= 'Z' when BGACK_030_INT ='0' or RESET_OUT ='0' --tristate on DMA-cycle + RW_000 <= 'Z' when BGACK_030_INT ='0' or RST ='0' --tristate on DMA-cycle else RW_000_INT; -- drive on CPU cycle - UDS_000 <= 'Z' when BGACK_030_INT ='0' or RESET_OUT ='0' else --tristate on DMA cycle + UDS_000 <= 'Z' when BGACK_030_INT ='0' or RST ='0' else --tristate on DMA cycle --'1' when DS_000_ENABLE ='0' else UDS_000_INT when DS_000_ENABLE ='1' -- output on cpu cycle else '1'; -- datastrobe not ready jet - LDS_000 <= 'Z' when BGACK_030_INT ='0' or RESET_OUT ='0' else --tristate on DMA cycle + LDS_000 <= 'Z' when BGACK_030_INT ='0' or RST ='0' else --tristate on DMA cycle --'1' when DS_000_ENABLE ='0' else LDS_000_INT when DS_000_ENABLE ='1' -- output on cpu cycle else '1'; -- datastrobe not ready jet --dsack - DSACK1 <= 'Z' when nEXP_SPACE = '0' else --tristate on expansionboard cycle + DSACK1 <= 'Z' when nEXP_SPACE = '0' or BGACK_030_INT ='0' else --tristate on expansionboard cycle DSACK1_INT when AS_030 = '0' else -- output on amiga cycle + --'1' when AS_030 = '1' and AS_030_D0 = '0' else --pull high '1'; diff --git a/Logic/68030_TK.STY b/Logic/68030_TK.STY index a807e4b..b15bf23 100644 --- a/Logic/68030_TK.STY +++ b/Logic/68030_TK.STY @@ -1,6 +1,4 @@ [STRATEGY-LIST] Normal=True, 1412327082 -[TOUCHED-REPORT] -Design.tt4File=1475958360 [synthesis-type] tool=Synplify diff --git a/Logic/68030_TK.cmi b/Logic/68030_TK.cmi index d4146cd..1d4d30c 100644 --- a/Logic/68030_TK.cmi +++ b/Logic/68030_TK.cmi @@ -1,8 +1,8 @@ [WINDOWS] -MAIN_WINDOW_POSITION=-8,-8,1928,1168 +MAIN_WINDOW_POSITION=0,0,1928,1168 LEFT_PANE_WIDTH=245 CHILD_FRAME_STATE=Maximal -CHILD_WINDOW_SIZE=1936,919 +CHILD_WINDOW_SIZE=1928,942 CHILD_WINDOW_POS=-8,-31 PV_FRAME_STATE=Normal PV_WINDOW_SIZE=473,867 @@ -10,9 +10,9 @@ PV_WINDOW_POS=0,0 [GUI SETTING] Remember_Setting=1 Open_PV_Opt=2 -Open_PV=1 +Open_PV=0 PV_IS_ACTIVE=0 -ACTIVE_SHEET=Global Constraints +ACTIVE_SHEET=Pin Attributes Show_Def_Opt=2 Show_Def_Val=1 Expand_All_Column=0 diff --git a/Logic/68030_TK.lci b/Logic/68030_TK.lci index b80db18..1912a34 100644 --- a/Logic/68030_TK.lci +++ b/Logic/68030_TK.lci @@ -12,8 +12,8 @@ EN_PinMacrocell = Yes; [Revision] Parent = m4a5.lci; -DATE = 10/08/2016; -TIME = 22:26:00; +DATE = 02/16/2017; +TIME = 19:15:23; Source_Format = Pure_VHDL; Synthesis = Synplify; @@ -133,6 +133,7 @@ layer = OFF; [Power] Default = High; Low = H, G, F, E, D, C, B, A; +High = B; [Source Constraint Option] diff --git a/Logic/68030_TK.lct b/Logic/68030_TK.lct index b80db18..1912a34 100644 --- a/Logic/68030_TK.lct +++ b/Logic/68030_TK.lct @@ -12,8 +12,8 @@ EN_PinMacrocell = Yes; [Revision] Parent = m4a5.lci; -DATE = 10/08/2016; -TIME = 22:26:00; +DATE = 02/16/2017; +TIME = 19:15:23; Source_Format = Pure_VHDL; Synthesis = Synplify; @@ -133,6 +133,7 @@ layer = OFF; [Power] Default = High; Low = H, G, F, E, D, C, B, A; +High = B; [Source Constraint Option] diff --git a/Logic/68030_TK.tcl b/Logic/68030_TK.tcl index 0359930..eda62da 100644 --- a/Logic/68030_TK.tcl +++ b/Logic/68030_TK.tcl @@ -426941,3 +426941,6716 @@ if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 6 ########## Tcl recorder end at 12/29/16 16:01:42 ########### + +########## Tcl recorder starts at 01/29/17 21:01:08 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/29/17 21:01:08 ########### + + +########## Tcl recorder starts at 01/29/17 21:01:09 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/29/17 21:01:09 ########### + + +########## Tcl recorder starts at 01/29/17 21:03:34 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/29/17 21:03:34 ########### + + +########## Tcl recorder starts at 01/29/17 21:03:34 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/29/17 21:03:34 ########### + + +########## Tcl recorder starts at 01/29/17 21:04:04 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/29/17 21:04:04 ########### + + +########## Tcl recorder starts at 01/29/17 21:04:04 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/29/17 21:04:04 ########### + + +########## Tcl recorder starts at 01/30/17 20:23:32 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:23:32 ########### + + +########## Tcl recorder starts at 01/30/17 20:23:33 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:23:33 ########### + + +########## Tcl recorder starts at 01/30/17 20:25:34 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:25:34 ########### + + +########## Tcl recorder starts at 01/30/17 20:25:34 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:25:34 ########### + + +########## Tcl recorder starts at 01/30/17 20:27:05 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:27:05 ########### + + +########## Tcl recorder starts at 01/30/17 20:27:05 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:27:05 ########### + + +########## Tcl recorder starts at 01/30/17 20:33:05 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:33:05 ########### + + +########## Tcl recorder starts at 01/30/17 20:33:05 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:33:05 ########### + + +########## Tcl recorder starts at 01/30/17 20:38:04 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:38:04 ########### + + +########## Tcl recorder starts at 01/30/17 20:38:04 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:38:04 ########### + + +########## Tcl recorder starts at 01/30/17 20:42:38 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:42:38 ########### + + +########## Tcl recorder starts at 01/30/17 20:42:38 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:42:38 ########### + + +########## Tcl recorder starts at 01/30/17 20:44:19 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:44:19 ########### + + +########## Tcl recorder starts at 01/30/17 20:44:19 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:44:19 ########### + + +########## Tcl recorder starts at 01/30/17 20:44:51 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:44:51 ########### + + +########## Tcl recorder starts at 01/30/17 20:44:51 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:44:51 ########### + + +########## Tcl recorder starts at 01/30/17 20:46:27 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:46:27 ########### + + +########## Tcl recorder starts at 01/30/17 20:46:28 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:46:28 ########### + + +########## Tcl recorder starts at 01/30/17 20:47:09 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:47:09 ########### + + +########## Tcl recorder starts at 01/30/17 20:47:09 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:47:09 ########### + + +########## Tcl recorder starts at 01/30/17 20:50:39 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:50:39 ########### + + +########## Tcl recorder starts at 01/30/17 20:50:40 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/30/17 20:50:40 ########### + + +########## Tcl recorder starts at 02/15/17 23:13:59 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/15/17 23:13:59 ########### + + +########## Tcl recorder starts at 02/15/17 23:14:00 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/15/17 23:14:00 ########### + + +########## Tcl recorder starts at 02/16/17 19:11:39 ########## + +# Commands to make the Process: +# Constraint Editor +# - none - +# Application to view the Process: +# Constraint Editor +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -lci \"68030_tk.lct\" -touch \"68030_tk.tt4\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/16/17 19:11:39 ########### + + +########## Tcl recorder starts at 02/16/17 19:12:43 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/16/17 19:12:43 ########### + + +########## Tcl recorder starts at 02/16/17 19:12:53 ########## + +# Commands to make the Process: +# Constraint Editor +# - none - +# Application to view the Process: +# Constraint Editor +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -lci \"68030_tk.lct\" -touch \"68030_tk.tt4\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/16/17 19:12:53 ########### + + +########## Tcl recorder starts at 02/16/17 19:13:23 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/16/17 19:13:23 ########### + + +########## Tcl recorder starts at 02/16/17 19:13:27 ########## + +# Commands to make the Process: +# Constraint Editor +# - none - +# Application to view the Process: +# Constraint Editor +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -lci \"68030_tk.lct\" -touch \"68030_tk.tt4\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/16/17 19:13:27 ########### + + +########## Tcl recorder starts at 02/16/17 19:14:30 ########## + +# Commands to make the Process: +# Optimization Constraint +# - none - +# Application to view the Process: +# Optimization Constraint +if [catch {open opt_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file opt_cmd.rs2: $rspFile" +} else { + puts $rspFile "-global -lci 68030_tk.lct -touch 68030_tk.imp +" + close $rspFile +} +if [runCmd "\"$cpld_bin/optedit\" @opt_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/16/17 19:14:30 ########### + + +########## Tcl recorder starts at 02/16/17 19:14:40 ########## + +# Commands to make the Process: +# Constraint Editor +# - none - +# Application to view the Process: +# Constraint Editor +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -lci \"68030_tk.lct\" -touch \"68030_tk.tt4\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/16/17 19:14:40 ########### + + +########## Tcl recorder starts at 02/16/17 19:15:27 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/16/17 19:15:27 ########### + + +########## Tcl recorder starts at 02/16/17 19:15:34 ########## + +# Commands to make the Process: +# Constraint Editor +# - none - +# Application to view the Process: +# Constraint Editor +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -lci \"68030_tk.lct\" -touch \"68030_tk.tt4\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/16/17 19:15:34 ########### + + +########## Tcl recorder starts at 02/16/17 20:07:33 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/16/17 20:07:33 ########### + + +########## Tcl recorder starts at 02/16/17 20:07:33 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/16/17 20:07:33 ########### + + +########## Tcl recorder starts at 02/24/17 20:04:00 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:04:00 ########### + + +########## Tcl recorder starts at 02/24/17 20:04:01 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:04:01 ########### + + +########## Tcl recorder starts at 02/24/17 20:05:52 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:05:52 ########### + + +########## Tcl recorder starts at 02/24/17 20:05:53 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:05:53 ########### + + +########## Tcl recorder starts at 02/24/17 20:15:44 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:15:44 ########### + + +########## Tcl recorder starts at 02/24/17 20:15:45 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:15:45 ########### + + +########## Tcl recorder starts at 02/24/17 20:26:26 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:26:26 ########### + + +########## Tcl recorder starts at 02/24/17 20:26:27 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:26:27 ########### + + +########## Tcl recorder starts at 02/24/17 20:27:04 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:27:04 ########### + + +########## Tcl recorder starts at 02/24/17 20:27:04 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:27:04 ########### + + +########## Tcl recorder starts at 02/24/17 20:36:36 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:36:36 ########### + + +########## Tcl recorder starts at 02/24/17 20:44:47 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:44:47 ########### + + +########## Tcl recorder starts at 02/24/17 20:44:48 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:44:48 ########### + + +########## Tcl recorder starts at 02/24/17 20:48:27 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:48:27 ########### + + +########## Tcl recorder starts at 02/24/17 20:48:27 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:48:27 ########### + + +########## Tcl recorder starts at 02/24/17 20:57:39 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:57:39 ########### + + +########## Tcl recorder starts at 02/24/17 20:57:39 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:57:39 ########### + + +########## Tcl recorder starts at 02/24/17 20:59:40 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:59:40 ########### + + +########## Tcl recorder starts at 02/24/17 20:59:41 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 20:59:41 ########### + + +########## Tcl recorder starts at 02/24/17 21:00:11 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 21:00:11 ########### + + +########## Tcl recorder starts at 02/24/17 21:00:11 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/24/17 21:00:11 ########### + + +########## Tcl recorder starts at 12/29/17 22:04:15 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 12/29/17 22:04:15 ########### + + +########## Tcl recorder starts at 12/29/17 22:04:16 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 12/29/17 22:04:16 ########### + + +########## Tcl recorder starts at 12/29/17 22:14:09 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 12/29/17 22:14:09 ########### + + +########## Tcl recorder starts at 12/29/17 22:14:10 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 12/29/17 22:14:10 ########### + + +########## Tcl recorder starts at 12/29/17 22:34:16 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 12/29/17 22:34:16 ########### + + +########## Tcl recorder starts at 12/29/17 22:34:17 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 12/29/17 22:34:17 ########### + + +########## Tcl recorder starts at 12/29/17 22:35:31 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 12/29/17 22:35:31 ########### + + +########## Tcl recorder starts at 12/29/17 22:35:32 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 12/29/17 22:35:32 ########### + + +########## Tcl recorder starts at 12/29/17 22:37:17 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 12/29/17 22:37:17 ########### + + +########## Tcl recorder starts at 12/29/17 22:37:17 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 12/29/17 22:37:17 ########### + + +########## Tcl recorder starts at 12/29/17 22:43:44 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 12/29/17 22:43:44 ########### + + +########## Tcl recorder starts at 12/29/17 22:43:45 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 12/29/17 22:43:45 ########### + + +########## Tcl recorder starts at 12/29/17 22:48:08 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 12/29/17 22:48:08 ########### + + +########## Tcl recorder starts at 12/29/17 22:48:08 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 12/29/17 22:48:08 ########### + + +########## Tcl recorder starts at 12/30/17 00:43:19 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 12/30/17 00:43:19 ########### + + +########## Tcl recorder starts at 12/30/17 00:43:20 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 12/30/17 00:43:20 ########### + diff --git a/Logic/68030_tk.bl2 b/Logic/68030_tk.bl2 index af11c22..0e86964 100644 --- a/Logic/68030_tk.bl2 +++ b/Logic/68030_tk.bl2 @@ -1,1618 +1,1262 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Thu Dec 29 16:01:56 2016 +#$ DATE Sat Dec 30 00:43:37 2017 #$ MODULE 68030_tk -#$ PINS 75 A_DECODE_2_ A_0_ SIZE_1_ IPL_030_1_ IPL_030_0_ AHIGH_31_ IPL_1_ IPL_0_ \ -# A_DECODE_23_ FC_0_ A_1_ IPL_030_2_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 DS_030 UDS_000 \ -# LDS_000 nEXP_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI \ -# CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 DTACK AVEC SIZE_0_ E AHIGH_30_ VPA AHIGH_29_ \ -# VMA AHIGH_28_ RST AHIGH_27_ RESET AHIGH_26_ RW AHIGH_25_ AMIGA_ADDR_ENABLE AHIGH_24_ \ -# AMIGA_BUS_DATA_DIR A_DECODE_22_ AMIGA_BUS_ENABLE_LOW A_DECODE_21_ \ -# AMIGA_BUS_ENABLE_HIGH A_DECODE_20_ CIIN A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ \ -# A_DECODE_16_ A_DECODE_15_ A_DECODE_14_ A_DECODE_13_ A_DECODE_12_ A_DECODE_11_ \ -# A_DECODE_10_ A_DECODE_9_ A_DECODE_8_ A_DECODE_7_ A_DECODE_6_ A_DECODE_5_ A_DECODE_4_ \ -# A_DECODE_3_ -#$ NODES 609 clk_000_d_i_1__n VPA_D_i N_125_i a_decode_2__n VMA_INT_i N_124_i \ -# sm_amiga_i_0__n N_53_0 rst_dly_i_2__n N_134_i rst_dly_i_1__n N_270_0 rst_dly_i_0__n \ -# N_77_i DSACK1_INT_i N_87_i inst_BGACK_030_INTreg N_137_i_0 N_112_i vcc_n_n DTACK_D0_i \ -# N_113_i inst_VMA_INTreg BGACK_030_INT_i N_114_i gnd_n_n nEXP_SPACE_i \ -# un1_amiga_bus_enable_low AS_000_DMA_i N_109_i un7_as_030 RW_000_i N_108_i \ -# un1_LDS_000_INT clk_030_pe_i_1__n N_111_i un1_UDS_000_INT DS_000_DMA_0_sqmuxa_i \ -# N_265_2_0 un1_SM_AMIGA_0_sqmuxa_1 pos_clk_un4_rw_000_i_n un10_ciin AS_000_i \ -# un1_as_000_i un21_fpu_cs AMIGA_DS_i VPA_c_i un21_berr pos_clk_un3_clk_out_int_i_n \ -# N_52_0 un6_ds_030 cycle_dma_i_0__n DTACK_c_i un13_ciin cycle_dma_i_1__n N_48_0 \ -# cpu_est_1_ pos_clk_as_000_dma6_i_n un3_ahigh_i cpu_est_2_ DS_000_DMA_i \ -# pos_clk_un4_bgack_000_i_n cpu_est_3_ CLK_EXP_i pos_clk_un6_bgack_000_0_n \ -# cpu_est_0_ AMIGA_BUS_ENABLE_DMA_LOW_i N_7_i inst_AMIGA_BUS_ENABLE_DMA_HIGH \ -# ahigh_i_25__n N_41_0 inst_AMIGA_BUS_ENABLE_DMA_LOW ahigh_i_24__n \ -# pos_clk_un1_bgack_030_int_0_n inst_AS_030_D0 ahigh_i_27__n \ -# pos_clk_un12_clk_out_int_0_n inst_AS_030_000_SYNC ahigh_i_26__n pos_clk_un3_0_n \ -# inst_BGACK_030_INT_D ahigh_i_29__n pos_clk_un15_bgack_030_int_i_n inst_AS_000_DMA \ -# ahigh_i_28__n N_3_i inst_DS_000_DMA ahigh_i_31__n N_43_0 inst_VPA_D ahigh_i_30__n \ -# N_4_i CLK_000_D_3_ a_i_1__n N_42_0 inst_DTACK_D0 AMIGA_BUS_ENABLE_DMA_HIGH_i \ -# un6_amiga_bus_data_dir_i inst_RESET_OUT AS_030_D0_i un12_amiga_bus_data_dir_m_i \ -# CLK_030_PE_1_ un10_ciin_i AMIGA_BUS_DATA_DIR_c_0 inst_AMIGA_DS FPU_SENSE_i N_22_i \ -# CLK_000_D_1_ AS_030_000_SYNC_i N_31_0 CLK_000_D_0_ a_decode_i_16__n N_21_i \ -# inst_CLK_OUT_PRE_50 a_decode_i_18__n N_32_0 inst_CLK_OUT_PRE_D a_decode_i_19__n \ -# N_19_i IPL_D0_0_ N_224_i N_34_0 IPL_D0_1_ N_225_i N_18_i IPL_D0_2_ N_226_i N_35_0 \ -# CLK_000_D_2_ pos_clk_un5_bgack_030_int_d_i_n CLK_000_D_4_ \ -# pos_clk_amiga_bus_enable_dma_high_3_0_n pos_clk_un6_bg_030_n \ -# pos_clk_amiga_bus_enable_dma_low_3_0_n pos_clk_ipl_n pos_clk_rw_000_dma_3_0_n \ -# inst_LDS_000_INT un13_ciin_i UDS_000_c_i inst_DS_000_ENABLE un6_ds_030_i \ -# LDS_000_c_i inst_UDS_000_INT N_123_i N_86_i SM_AMIGA_6_ N_122_i N_129_i SM_AMIGA_4_ \ -# un7_as_030_i N_130_i SM_AMIGA_1_ AS_030_c un11_amiga_bus_enable_high_i SM_AMIGA_0_ \ -# N_117_i SIZE_DMA_0_ AS_000_c N_46_0 SIZE_DMA_1_ N_107_i CYCLE_DMA_0_ RW_000_c \ -# pos_clk_size_dma_6_0_0__n CYCLE_DMA_1_ N_106_i CLK_030_PE_0_ \ -# pos_clk_size_dma_6_0_1__n inst_RW_000_INT UDS_000_c N_16_i inst_RW_000_DMA N_254_i \ -# RST_DLY_0_ LDS_000_c N_263_i RST_DLY_1_ N_250_i RST_DLY_2_ size_c_0__n N_256_i \ -# inst_A0_DMA N_189_i pos_clk_rw_000_int_5_n size_c_1__n N_101_i inst_DSACK1_INT \ -# inst_AS_000_INT ahigh_c_24__n N_103_i SM_AMIGA_5_ N_104_i SM_AMIGA_3_ ahigh_c_25__n \ -# SM_AMIGA_2_ N_105_i ahigh_c_26__n N_115_i ahigh_c_27__n N_116_i ahigh_c_28__n N_131_i \ -# N_277_i ahigh_c_29__n N_64_0 N_91_0 ahigh_c_30__n N_159_0 N_14 N_85_i N_15 \ -# ahigh_c_31__n un1_SM_AMIGA_0_sqmuxa_1_0 N_24 RW_c_i N_25 pos_clk_rw_000_int_5_0_n \ -# clk_000_d_i_3__n N_25_i N_28_0 N_24_i N_27_0 ipl_c_i_1__n N_50_0 ipl_c_i_0__n N_49_0 \ -# N_14_i N_39_0 N_15_i N_38_0 N_91_0_1 N_91_0_2 N_91_0_3 N_265_i_1 N_266_i_1 N_266_i_2 \ -# N_138_i_1 N_148_i_1 N_144_i_1 N_142_i_1 N_140_i_1 SM_AMIGA_i_7_ \ -# pos_clk_un10_sm_amiga_i_1_n N_76 N_85_i_1 G_122 N_85_i_2 G_123 a_decode_c_16__n \ -# N_277_1 G_124 N_277_2 un1_rst_2_1 a_decode_c_17__n N_277_3 cpu_est_0_0_ N_277_4 N_64 \ -# a_decode_c_18__n N_277_5 N_122 un10_ciin_1 N_123 a_decode_c_19__n un10_ciin_2 N_132 \ -# un10_ciin_3 N_133 a_decode_c_20__n un10_ciin_4 N_274 un10_ciin_5 N_276 \ -# a_decode_c_21__n un10_ciin_6 N_77 un10_ciin_7 N_79 a_decode_c_22__n un10_ciin_8 N_78 \ -# un10_ciin_9 N_263 a_decode_c_23__n un10_ciin_10 N_108 un10_ciin_11 N_114 a_c_0__n \ -# un6_amiga_bus_data_dir_1 N_85 un6_amiga_bus_data_dir_2 N_104 a_c_1__n \ -# pos_clk_as_000_dma6_1_n N_91 pos_clk_as_000_dma6_2_n N_131 nEXP_SPACE_c \ -# DS_000_DMA_1_sqmuxa_1 N_277 pos_clk_un4_rw_000_1_n N_130 BERR_c \ -# pos_clk_un4_rw_000_2_n N_115 pos_clk_un13_clk_out_int_1_n N_116 BG_030_c N_125_1 \ -# N_105 N_116_1 N_103 BG_000DFFreg pos_clk_un29_clk_000_ne_1_1_n N_101 \ -# pos_clk_un29_clk_000_ne_1_2_n N_259 pos_clk_un29_clk_000_ne_1_3_n N_255 \ -# BGACK_000_c N_261_1 N_256 N_261_2 N_254 CLK_030_c N_262_1 N_16 N_262_2 N_106 \ -# DS_000_ENABLE_0_sqmuxa_1_1 N_86 N_259_1 N_107 CLK_OSZI_c N_250_i_1 N_117 N_189_i_1 \ -# pos_clk_a0_dma_3_n pos_clk_un6_bg_030_1_n N_129 CLK_OUT_INTreg N_108_1 \ -# pos_clk_size_dma_6_1__n N_114_1 pos_clk_size_dma_6_0__n un21_berr_1 \ -# pos_clk_rw_000_dma_3_n FPU_SENSE_c un21_fpu_cs_1 \ -# pos_clk_amiga_bus_enable_dma_low_3_n N_130_1 \ -# pos_clk_amiga_bus_enable_dma_high_3_n IPL_030DFF_0_reg N_136_i_1 \ -# SIZE_DMA_3_sqmuxa N_152_i_1 pos_clk_un5_bgack_030_int_d_n IPL_030DFF_1_reg \ -# N_146_i_1 N_18 N_267_i_1 N_19 IPL_030DFF_2_reg pos_clk_ipl_1_n N_21 bg_000_0_un3_n \ -# N_22 ipl_c_0__n bg_000_0_un1_n un6_amiga_bus_data_dir bg_000_0_un0_n \ -# un12_amiga_bus_data_dir_m ipl_c_1__n uds_000_int_0_un3_n \ -# pos_clk_un3_clk_out_int_n uds_000_int_0_un1_n N_3 ipl_c_2__n uds_000_int_0_un0_n \ -# pos_clk_as_000_dma6_n lds_000_int_0_un3_n DS_000_DMA_1_sqmuxa lds_000_int_0_un1_n \ -# N_4 DTACK_c lds_000_int_0_un0_n AS_000_DMA_1_sqmuxa ds_000_enable_0_un3_n un1_rst_2 \ -# ds_000_enable_0_un1_n G_97 ds_000_enable_0_un0_n N_199 VPA_c ipl_030_0_2__un3_n \ -# pos_clk_un13_bgack_030_int_n ipl_030_0_2__un1_n N_205 ipl_030_0_2__un0_n \ -# pos_clk_un13_clk_out_int_n RST_c vma_int_0_un3_n pos_clk_un15_bgack_030_int_n \ -# vma_int_0_un1_n pos_clk_un3_n RESET_c vma_int_0_un0_n pos_clk_un12_clk_out_int_n \ -# cpu_est_0_1__un3_n pos_clk_un1_bgack_030_int_n RW_c cpu_est_0_1__un1_n \ -# DS_000_DMA_0_sqmuxa cpu_est_0_1__un0_n un1_rst_3 fc_c_0__n cpu_est_0_2__un3_n G_95 \ -# cpu_est_0_2__un1_n G_101 fc_c_1__n cpu_est_0_2__un0_n G_103 cpu_est_0_3__un3_n \ -# pos_clk_un4_rw_000_n cpu_est_0_3__un1_n N_7 AMIGA_BUS_DATA_DIR_c \ -# cpu_est_0_3__un0_n pos_clk_un6_bgack_000_n pos_clk_un31_clk_000_ne_1_i_m2_un3_n \ -# pos_clk_un4_bgack_000_n pos_clk_un31_clk_000_ne_1_i_m2_un1_n N_265_2 \ -# pos_clk_un31_clk_000_ne_1_i_m2_un0_n N_111 bgack_030_int_0_un3_n N_109 BG_030_c_i \ -# bgack_030_int_0_un1_n N_113 pos_clk_un6_bg_030_i_n bgack_030_int_0_un0_n N_112 \ -# pos_clk_un9_bg_030_0_n ds_000_dma_0_un3_n N_98 UDS_000_INT_i ds_000_dma_0_un1_n \ -# pos_clk_un29_clk_000_ne_1_n un1_UDS_000_INT_0 ds_000_dma_0_un0_n N_87 \ -# LDS_000_INT_i as_000_dma_0_un3_n N_270 un1_LDS_000_INT_0 as_000_dma_0_un1_n N_134 \ -# N_23_i as_000_dma_0_un0_n N_125 N_30_0 size_dma_0_1__un3_n N_124 N_20_i \ -# size_dma_0_1__un1_n N_121 N_33_0 size_dma_0_1__un0_n N_120 N_13_i \ -# size_dma_0_0__un3_n N_137 N_40_0 size_dma_0_0__un1_n pos_clk_un31_clk_000_ne_n \ -# ipl_c_i_2__n size_dma_0_0__un0_n N_17 N_51_0 amiga_bus_enable_dma_high_0_un3_n \ -# pos_clk_un9_clk_000_pe_n N_26_i amiga_bus_enable_dma_high_0_un1_n cpu_est_2_1__n \ -# N_29_0 amiga_bus_enable_dma_high_0_un0_n cpu_est_2_2__n a_c_i_0__n \ -# amiga_bus_enable_dma_low_0_un3_n N_261 size_c_i_1__n \ -# amiga_bus_enable_dma_low_0_un1_n N_262 pos_clk_un10_sm_amiga_i_n \ -# amiga_bus_enable_dma_low_0_un0_n N_251 DS_000_ENABLE_0_sqmuxa_1_i a0_dma_0_un3_n \ -# N_252 un1_DS_000_ENABLE_0_sqmuxa_i a0_dma_0_un1_n N_258 N_157_i a0_dma_0_un0_n N_257 \ -# N_160_0 rw_000_dma_0_un3_n DS_000_ENABLE_1_sqmuxa N_161_0 rw_000_dma_0_un1_n \ -# un1_DS_000_ENABLE_0_sqmuxa N_162_0 rw_000_dma_0_un0_n N_102 N_165_i \ -# ipl_030_0_0__un3_n N_118 ipl_030_0_0__un1_n N_119 N_167_i ipl_030_0_0__un0_n N_264 \ -# N_166_i ipl_030_0_1__un3_n DS_000_ENABLE_0_sqmuxa_1 ipl_030_0_1__un1_n N_164 \ -# N_168_i ipl_030_0_1__un0_n N_170 as_030_000_sync_0_un3_n N_168 N_170_i \ -# as_030_000_sync_0_un1_n N_166 as_030_000_sync_0_un0_n N_167 N_164_i \ -# rw_000_int_0_un3_n N_165 rw_000_int_0_un1_n N_162 N_102_i rw_000_int_0_un0_n N_161 \ -# N_264_i a_decode_15__n N_160 N_79_i N_157 N_78_i a_decode_14__n N_26 N_119_i N_13 \ -# N_118_i a_decode_13__n N_20 N_23 N_255_i a_decode_12__n N_8 N_257_i \ -# pos_clk_un9_bg_030_n cpu_est_2_0_2__n a_decode_11__n un1_amiga_bus_enable_low_i \ -# N_258_i un21_fpu_cs_i N_259_i a_decode_10__n sm_amiga_i_2__n cpu_est_2_0_1__n \ -# sm_amiga_i_1__n N_262_i a_decode_9__n sm_amiga_i_3__n N_261_i sm_amiga_i_4__n \ -# pos_clk_un9_clk_000_pe_0_n a_decode_8__n sm_amiga_i_6__n N_251_i sm_amiga_i_5__n \ -# N_252_0 a_decode_7__n clk_000_d_i_0__n N_76_i AS_000_INT_i N_17_i a_decode_6__n \ -# sm_amiga_i_i_7__n N_36_0 AS_030_i N_98_i a_decode_5__n cpu_est_i_2__n \ -# pos_clk_un31_clk_000_ne_i_n cpu_est_i_0__n N_228_i a_decode_4__n cpu_est_i_3__n \ -# N_121_i cpu_est_i_1__n N_120_i a_decode_3__n +#$ PINS 75 AHIGH_27_ AHIGH_26_ SIZE_1_ AHIGH_25_ AHIGH_24_ AHIGH_31_ A_DECODE_22_ \ +# A_DECODE_21_ A_DECODE_23_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ \ +# IPL_030_2_ A_DECODE_16_ A_DECODE_15_ IPL_2_ A_DECODE_14_ A_DECODE_13_ FC_1_ \ +# A_DECODE_12_ AS_030 A_DECODE_11_ AS_000 A_DECODE_10_ RW_000 A_DECODE_9_ DS_030 \ +# A_DECODE_8_ UDS_000 A_DECODE_7_ LDS_000 A_DECODE_6_ nEXP_SPACE A_DECODE_5_ BERR \ +# A_DECODE_4_ BG_030 A_DECODE_3_ BG_000 A_DECODE_2_ BGACK_030 A_0_ BGACK_000 IPL_030_1_ \ +# CLK_030 IPL_030_0_ CLK_000 IPL_1_ CLK_OSZI IPL_0_ CLK_DIV_OUT FC_0_ CLK_EXP A_1_ FPU_CS \ +# FPU_SENSE DSACK1 DTACK AVEC E VPA VMA RST RESET RW AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR \ +# AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SIZE_0_ AHIGH_30_ AHIGH_29_ \ +# AHIGH_28_ +#$ NODES 508 N_23_0 UDS_000_c N_19_i N_22_0 LDS_000_c N_18_i N_21_0 size_c_0__n \ +# ipl_c_i_2__n N_43_0 size_c_1__n ipl_c_i_1__n inst_BGACK_030_INTreg N_42_0 vcc_n_n \ +# ahigh_c_24__n ipl_c_i_0__n un5_e N_41_0 gnd_n_n ahigh_c_25__n DTACK_c_i \ +# un1_amiga_bus_enable_low N_45_0 un3_as_030 ahigh_c_26__n VPA_c_i un1_UDS_000_INT \ +# N_44_0 un1_LDS_000_INT ahigh_c_27__n N_13_i un1_DS_000_ENABLE_0_sqmuxa N_27_0 \ +# un10_ciin ahigh_c_28__n LDS_000_INT_i un21_fpu_cs un1_LDS_000_INT_0 un21_berr \ +# ahigh_c_29__n UDS_000_INT_i un2_ds_030 un1_UDS_000_INT_0 cpu_est_0_ ahigh_c_30__n \ +# N_96_0_1 cpu_est_1_ N_96_0_2 cpu_est_2_ ahigh_c_31__n N_282_0_1 cpu_est_3_ N_282_0_2 \ +# inst_AMIGA_BUS_ENABLE_DMA_HIGH N_282_0_3 inst_AMIGA_BUS_ENABLE_DMA_LOW N_282_0_4 \ +# inst_AS_030_D0 pos_clk_un10_sm_amiga_i_1_n inst_AS_030_D1 un10_ciin_1 \ +# inst_AS_030_000_SYNC un10_ciin_2 inst_AS_000_DMA un10_ciin_3 inst_DS_000_DMA \ +# un10_ciin_4 inst_VMA_INTreg un10_ciin_5 inst_VPA_D un10_ciin_6 CLK_000_D_3_ \ +# un10_ciin_7 inst_DTACK_D0 un10_ciin_8 inst_AMIGA_DS un10_ciin_9 CLK_000_D_1_ \ +# un10_ciin_10 CLK_000_D_0_ un10_ciin_11 inst_CLK_OUT_PRE_50 N_201_1 \ +# inst_CLK_OUT_PRE_D N_201_2 IPL_D0_0_ N_131_i_1 IPL_D0_1_ N_134_0_1 IPL_D0_2_ \ +# N_113_i_1 CLK_000_D_2_ N_113_i_2 CLK_000_D_4_ N_144_1 pos_clk_ipl_n N_144_2 \ +# SIZE_DMA_0_ N_143_1 SIZE_DMA_1_ N_143_2 inst_A0_DMA N_163_1 inst_RW_000_DMA N_163_2 \ +# inst_UDS_000_INT N_163_3 inst_DS_000_ENABLE un21_fpu_cs_1 inst_LDS_000_INT \ +# a_decode_c_16__n un21_berr_1_0 inst_BGACK_030_INT_D pos_clk_cycle_dma_5_1_1__n \ +# SM_AMIGA_6_ a_decode_c_17__n N_199_1 inst_RW_000_INT AS_000_DMA_1_sqmuxa_1 \ +# SM_AMIGA_4_ a_decode_c_18__n N_140_1 SM_AMIGA_1_ N_66_i_1 SM_AMIGA_0_ \ +# a_decode_c_19__n N_66_i_2 CYCLE_DMA_0_ N_205_i_1 CYCLE_DMA_1_ a_decode_c_20__n \ +# N_205_i_2 inst_DSACK1_INT N_180_1 inst_AS_000_INT a_decode_c_21__n N_180_2 \ +# pos_clk_un9_clk_000_pe_n N_59_i_1 SM_AMIGA_5_ a_decode_c_22__n N_127_i_1 \ +# SM_AMIGA_3_ N_123_i_1 SM_AMIGA_2_ a_decode_c_23__n N_121_i_1 N_119_i_1 N_6 a_c_0__n \ +# N_117_i_1 N_115_i_1 a_c_1__n N_111_i_1 N_165_1 N_13 nEXP_SPACE_c N_162_1 N_148_1 N_18 \ +# BERR_c pos_clk_ipl_1_n N_19 ds_000_dma_0_un3_n N_20 BG_030_c ds_000_dma_0_un1_n \ +# ds_000_dma_0_un0_n BG_000DFFreg as_000_dma_0_un3_n as_000_dma_0_un1_n \ +# as_000_dma_0_un0_n BGACK_000_c uds_000_int_0_un3_n uds_000_int_0_un1_n \ +# uds_000_int_0_un0_n bg_000_0_un3_n bg_000_0_un1_n bg_000_0_un0_n CLK_OSZI_c \ +# lds_000_int_0_un3_n lds_000_int_0_un1_n lds_000_int_0_un0_n CLK_OUT_INTreg \ +# as_030_d1_0_un3_n as_030_d1_0_un1_n as_030_d1_0_un0_n FPU_SENSE_c \ +# rw_000_int_0_un3_n rw_000_int_0_un1_n IPL_030DFF_0_reg rw_000_int_0_un0_n \ +# as_030_000_sync_0_un3_n IPL_030DFF_1_reg as_030_000_sync_0_un1_n SM_AMIGA_i_7_ \ +# as_030_000_sync_0_un0_n IPL_030DFF_2_reg bgack_030_int_0_un3_n \ +# bgack_030_int_0_un1_n cpu_est_2_1__n ipl_c_0__n bgack_030_int_0_un0_n \ +# cpu_est_2_2__n cpu_est_0_1__un3_n cpu_est_2_3__n ipl_c_1__n cpu_est_0_1__un1_n \ +# G_105 cpu_est_0_1__un0_n G_106 ipl_c_2__n cpu_est_0_2__un3_n G_107 \ +# cpu_est_0_2__un1_n N_60 cpu_est_0_2__un0_n N_63 DTACK_c cpu_est_0_3__un3_n N_126 \ +# cpu_est_0_3__un1_n N_150 cpu_est_0_3__un0_n N_151 ipl_030_0_0__un3_n N_219 VPA_c \ +# ipl_030_0_0__un1_n N_175 ipl_030_0_0__un0_n ipl_030_0_1__un3_n N_59 RST_c \ +# ipl_030_0_1__un1_n N_68 ipl_030_0_1__un0_n N_72 ipl_030_0_2__un3_n N_80 \ +# ipl_030_0_2__un1_n N_93 RW_c ipl_030_0_2__un0_n N_98 ds_000_enable_0_un3_n N_107 \ +# fc_c_0__n ds_000_enable_0_un1_n N_128 ds_000_enable_0_un0_n N_131 fc_c_1__n \ +# vma_int_0_un3_n N_134 vma_int_0_un1_n N_135 vma_int_0_un0_n N_141 \ +# AMIGA_BUS_DATA_DIR_c a_decode_15__n N_142 N_143 a_decode_14__n N_144 N_145 \ +# a_decode_13__n N_146 N_205_i N_147 N_140_i a_decode_12__n N_148 AMIGA_DS_i N_149 \ +# a_decode_11__n N_154 N_199_i N_155 N_198_i a_decode_10__n N_162 N_180_i N_165 N_262_i \ +# a_decode_9__n N_259 AMIGA_BUS_DATA_DIR_c_0 N_260 pos_clk_un2_i_n a_decode_8__n N_181 \ +# N_3_i N_182 N_32_0 a_decode_7__n N_183 N_4_i N_184 N_31_0 a_decode_6__n N_185 N_220_i \ +# N_186 BG_030_c_i a_decode_5__n N_266 pos_clk_un9_bg_030_0_n N_267 N_17_i \ +# a_decode_4__n N_268 N_24_0 N_190 N_16_i a_decode_3__n N_191 N_25_0 N_201 N_15_i \ +# a_decode_2__n N_202 N_26_0 N_203 N_12_i N_208 N_28_0 N_163 N_11_i N_282 N_29_0 \ +# un21_berr_1 N_5_i N_132 N_30_0 N_96 a_c_i_0__n N_129 size_c_i_1__n \ +# un1_SM_AMIGA_0_sqmuxa_1 pos_clk_un10_sm_amiga_i_n N_169 un1_dsack1_i N_170 N_69_i \ +# N_167 N_163_i N_168 N_244_0 pos_clk_rw_000_int_5_n N_164_i pos_clk_un6_bgack_000_n \ +# N_165_i N_274 un11_amiga_bus_enable_high_i N_164 un10_ciin_i N_244 N_60_0 N_5 N_274_i \ +# N_11 pos_clk_un6_bgack_000_0_n N_12 RW_c_i N_15 pos_clk_rw_000_int_5_0_n N_16 N_168_i \ +# N_17 N_167_i pos_clk_un9_bg_030_n G_91 N_170_i N_3 N_169_i N_205 AS_000_DMA_1_sqmuxa \ +# N_38_0 N_4 un1_SM_AMIGA_0_sqmuxa_1_0 N_199 N_282_0 pos_clk_un2_n clk_000_d_i_3__n \ +# N_140 N_96_0 N_262 N_129_i N_198 N_268_i N_180 N_246_i un1_amiga_bus_enable_low_i \ +# N_132_0 un21_fpu_cs_i AS_000_i N_142_i BGACK_030_INT_i N_141_i nEXP_SPACE_i N_135_0 \ +# cycle_dma_i_0__n N_134_0 RW_000_i N_131_i CLK_EXP_i LDS_000_c_i cycle_dma_i_1__n \ +# UDS_000_c_i DS_000_DMA_i N_128_i AS_000_DMA_i N_107_i a_i_1__n N_203_i \ +# AMIGA_BUS_ENABLE_DMA_LOW_i un1_DS_000_ENABLE_0_sqmuxa_0 a_decode_i_19__n N_201_i \ +# a_decode_i_18__n N_202_i a_decode_i_16__n VMA_INT_i AMIGA_BUS_ENABLE_DMA_HIGH_i \ +# N_98_i sm_amiga_i_0__n N_93_i sm_amiga_i_5__n N_82_i sm_amiga_i_6__n N_80_i \ +# sm_amiga_i_i_7__n N_72_i AS_030_i N_68_i AS_000_INT_i N_59_i DSACK1_INT_i N_190_i \ +# sm_amiga_i_1__n N_191_i FPU_SENSE_i AS_030_D1_i N_267_i cpu_est_i_0__n \ +# cpu_est_i_3__n N_266_i VPA_D_i sm_amiga_i_3__n N_186_i sm_amiga_i_4__n \ +# cpu_est_i_1__n N_185_i clk_000_d_i_0__n clk_000_d_i_1__n N_183_i AS_030_D0_i N_184_i \ +# cpu_est_i_2__n DTACK_D0_i N_182_i sm_amiga_i_2__n AS_030_000_SYNC_i N_181_i \ +# ahigh_i_30__n ahigh_i_31__n N_260_i ahigh_i_28__n pos_clk_size_dma_6_0_1__n \ +# ahigh_i_29__n N_259_i ahigh_i_26__n pos_clk_size_dma_6_0_0__n ahigh_i_27__n N_63_0 \ +# ahigh_i_24__n N_155_i ahigh_i_25__n N_162_i N_187_i un5_e_0 N_188_i N_154_i N_189_i \ +# cpu_est_2_0_3__n N_149_i N_208_i cpu_est_2_0_2__n N_147_i un2_ds_030_i N_148_i \ +# N_219_i cpu_est_2_0_1__n N_175_i N_146_i un3_as_030_i N_36_0 AS_030_c N_145_i N_35_0 \ +# AS_000_c N_143_i N_144_i RW_000_c pos_clk_un9_clk_000_pe_0_n N_20_i .model bus68030 .inputs A_DECODE_23_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF \ -BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF VPA.BLIF \ -RST.BLIF RESET.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF A_DECODE_20_.BLIF \ +BGACK_000.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF DTACK.BLIF VPA.BLIF \ +RST.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF A_DECODE_20_.BLIF \ A_DECODE_19_.BLIF A_DECODE_18_.BLIF A_DECODE_17_.BLIF A_DECODE_16_.BLIF \ A_DECODE_15_.BLIF A_DECODE_14_.BLIF A_DECODE_13_.BLIF A_DECODE_12_.BLIF \ A_DECODE_11_.BLIF A_DECODE_10_.BLIF A_DECODE_9_.BLIF A_DECODE_8_.BLIF \ A_DECODE_7_.BLIF A_DECODE_6_.BLIF A_DECODE_5_.BLIF A_DECODE_4_.BLIF \ A_DECODE_3_.BLIF A_DECODE_2_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF A_1_.BLIF \ SIZE_1_.BLIF AHIGH_31_.BLIF AS_030.BLIF AS_000.BLIF RW_000.BLIF UDS_000.BLIF \ -LDS_000.BLIF BERR.BLIF DTACK.BLIF RW.BLIF SIZE_0_.BLIF AHIGH_30_.BLIF \ -AHIGH_29_.BLIF AHIGH_28_.BLIF AHIGH_27_.BLIF AHIGH_26_.BLIF AHIGH_25_.BLIF \ -AHIGH_24_.BLIF A_0_.BLIF clk_000_d_i_1__n.BLIF VPA_D_i.BLIF N_125_i.BLIF \ -a_decode_2__n.BLIF VMA_INT_i.BLIF N_124_i.BLIF sm_amiga_i_0__n.BLIF \ -N_53_0.BLIF rst_dly_i_2__n.BLIF N_134_i.BLIF rst_dly_i_1__n.BLIF N_270_0.BLIF \ -rst_dly_i_0__n.BLIF N_77_i.BLIF DSACK1_INT_i.BLIF N_87_i.BLIF \ -inst_BGACK_030_INTreg.BLIF N_137_i_0.BLIF N_112_i.BLIF vcc_n_n.BLIF \ -DTACK_D0_i.BLIF N_113_i.BLIF inst_VMA_INTreg.BLIF BGACK_030_INT_i.BLIF \ -N_114_i.BLIF gnd_n_n.BLIF nEXP_SPACE_i.BLIF un1_amiga_bus_enable_low.BLIF \ -AS_000_DMA_i.BLIF N_109_i.BLIF un7_as_030.BLIF RW_000_i.BLIF N_108_i.BLIF \ -un1_LDS_000_INT.BLIF clk_030_pe_i_1__n.BLIF N_111_i.BLIF un1_UDS_000_INT.BLIF \ -DS_000_DMA_0_sqmuxa_i.BLIF N_265_2_0.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF \ -pos_clk_un4_rw_000_i_n.BLIF un10_ciin.BLIF AS_000_i.BLIF un1_as_000_i.BLIF \ -un21_fpu_cs.BLIF AMIGA_DS_i.BLIF VPA_c_i.BLIF un21_berr.BLIF \ -pos_clk_un3_clk_out_int_i_n.BLIF N_52_0.BLIF un6_ds_030.BLIF \ -cycle_dma_i_0__n.BLIF DTACK_c_i.BLIF un13_ciin.BLIF cycle_dma_i_1__n.BLIF \ -N_48_0.BLIF cpu_est_1_.BLIF pos_clk_as_000_dma6_i_n.BLIF un3_ahigh_i.BLIF \ -cpu_est_2_.BLIF DS_000_DMA_i.BLIF pos_clk_un4_bgack_000_i_n.BLIF \ -cpu_est_3_.BLIF CLK_EXP_i.BLIF pos_clk_un6_bgack_000_0_n.BLIF cpu_est_0_.BLIF \ -AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF N_7_i.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF \ -ahigh_i_25__n.BLIF N_41_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF \ -ahigh_i_24__n.BLIF pos_clk_un1_bgack_030_int_0_n.BLIF inst_AS_030_D0.BLIF \ -ahigh_i_27__n.BLIF pos_clk_un12_clk_out_int_0_n.BLIF inst_AS_030_000_SYNC.BLIF \ -ahigh_i_26__n.BLIF pos_clk_un3_0_n.BLIF inst_BGACK_030_INT_D.BLIF \ -ahigh_i_29__n.BLIF pos_clk_un15_bgack_030_int_i_n.BLIF inst_AS_000_DMA.BLIF \ -ahigh_i_28__n.BLIF N_3_i.BLIF inst_DS_000_DMA.BLIF ahigh_i_31__n.BLIF \ -N_43_0.BLIF inst_VPA_D.BLIF ahigh_i_30__n.BLIF N_4_i.BLIF CLK_000_D_3_.BLIF \ -a_i_1__n.BLIF N_42_0.BLIF inst_DTACK_D0.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF \ -un6_amiga_bus_data_dir_i.BLIF inst_RESET_OUT.BLIF AS_030_D0_i.BLIF \ -un12_amiga_bus_data_dir_m_i.BLIF CLK_030_PE_1_.BLIF un10_ciin_i.BLIF \ -AMIGA_BUS_DATA_DIR_c_0.BLIF inst_AMIGA_DS.BLIF FPU_SENSE_i.BLIF N_22_i.BLIF \ -CLK_000_D_1_.BLIF AS_030_000_SYNC_i.BLIF N_31_0.BLIF CLK_000_D_0_.BLIF \ -a_decode_i_16__n.BLIF N_21_i.BLIF inst_CLK_OUT_PRE_50.BLIF \ -a_decode_i_18__n.BLIF N_32_0.BLIF inst_CLK_OUT_PRE_D.BLIF \ -a_decode_i_19__n.BLIF N_19_i.BLIF IPL_D0_0_.BLIF N_224_i.BLIF N_34_0.BLIF \ -IPL_D0_1_.BLIF N_225_i.BLIF N_18_i.BLIF IPL_D0_2_.BLIF N_226_i.BLIF \ -N_35_0.BLIF CLK_000_D_2_.BLIF pos_clk_un5_bgack_030_int_d_i_n.BLIF \ -CLK_000_D_4_.BLIF pos_clk_amiga_bus_enable_dma_high_3_0_n.BLIF \ -pos_clk_un6_bg_030_n.BLIF pos_clk_amiga_bus_enable_dma_low_3_0_n.BLIF \ -pos_clk_ipl_n.BLIF pos_clk_rw_000_dma_3_0_n.BLIF inst_LDS_000_INT.BLIF \ -un13_ciin_i.BLIF UDS_000_c_i.BLIF inst_DS_000_ENABLE.BLIF un6_ds_030_i.BLIF \ -LDS_000_c_i.BLIF inst_UDS_000_INT.BLIF N_123_i.BLIF N_86_i.BLIF \ -SM_AMIGA_6_.BLIF N_122_i.BLIF N_129_i.BLIF SM_AMIGA_4_.BLIF un7_as_030_i.BLIF \ -N_130_i.BLIF SM_AMIGA_1_.BLIF AS_030_c.BLIF un11_amiga_bus_enable_high_i.BLIF \ -SM_AMIGA_0_.BLIF N_117_i.BLIF SIZE_DMA_0_.BLIF AS_000_c.BLIF N_46_0.BLIF \ -SIZE_DMA_1_.BLIF N_107_i.BLIF CYCLE_DMA_0_.BLIF RW_000_c.BLIF \ -pos_clk_size_dma_6_0_0__n.BLIF CYCLE_DMA_1_.BLIF N_106_i.BLIF \ -CLK_030_PE_0_.BLIF pos_clk_size_dma_6_0_1__n.BLIF inst_RW_000_INT.BLIF \ -UDS_000_c.BLIF N_16_i.BLIF inst_RW_000_DMA.BLIF N_254_i.BLIF RST_DLY_0_.BLIF \ -LDS_000_c.BLIF N_263_i.BLIF RST_DLY_1_.BLIF N_250_i.BLIF RST_DLY_2_.BLIF \ -size_c_0__n.BLIF N_256_i.BLIF inst_A0_DMA.BLIF N_189_i.BLIF \ -pos_clk_rw_000_int_5_n.BLIF size_c_1__n.BLIF N_101_i.BLIF inst_DSACK1_INT.BLIF \ -inst_AS_000_INT.BLIF ahigh_c_24__n.BLIF N_103_i.BLIF SM_AMIGA_5_.BLIF \ -N_104_i.BLIF SM_AMIGA_3_.BLIF ahigh_c_25__n.BLIF SM_AMIGA_2_.BLIF N_105_i.BLIF \ -ahigh_c_26__n.BLIF N_115_i.BLIF ahigh_c_27__n.BLIF N_116_i.BLIF \ -ahigh_c_28__n.BLIF N_131_i.BLIF N_277_i.BLIF ahigh_c_29__n.BLIF N_64_0.BLIF \ -N_91_0.BLIF ahigh_c_30__n.BLIF N_159_0.BLIF N_14.BLIF N_85_i.BLIF N_15.BLIF \ -ahigh_c_31__n.BLIF un1_SM_AMIGA_0_sqmuxa_1_0.BLIF N_24.BLIF RW_c_i.BLIF \ -N_25.BLIF pos_clk_rw_000_int_5_0_n.BLIF clk_000_d_i_3__n.BLIF N_25_i.BLIF \ -N_28_0.BLIF N_24_i.BLIF N_27_0.BLIF ipl_c_i_1__n.BLIF N_50_0.BLIF \ -ipl_c_i_0__n.BLIF N_49_0.BLIF N_14_i.BLIF N_39_0.BLIF N_15_i.BLIF N_38_0.BLIF \ -N_91_0_1.BLIF N_91_0_2.BLIF N_91_0_3.BLIF N_265_i_1.BLIF N_266_i_1.BLIF \ -N_266_i_2.BLIF N_138_i_1.BLIF N_148_i_1.BLIF N_144_i_1.BLIF N_142_i_1.BLIF \ -N_140_i_1.BLIF SM_AMIGA_i_7_.BLIF pos_clk_un10_sm_amiga_i_1_n.BLIF N_76.BLIF \ -N_85_i_1.BLIF G_122.BLIF N_85_i_2.BLIF G_123.BLIF a_decode_c_16__n.BLIF \ -N_277_1.BLIF G_124.BLIF N_277_2.BLIF un1_rst_2_1.BLIF a_decode_c_17__n.BLIF \ -N_277_3.BLIF cpu_est_0_0_.BLIF N_277_4.BLIF N_64.BLIF a_decode_c_18__n.BLIF \ -N_277_5.BLIF N_122.BLIF un10_ciin_1.BLIF N_123.BLIF a_decode_c_19__n.BLIF \ -un10_ciin_2.BLIF N_132.BLIF un10_ciin_3.BLIF N_133.BLIF a_decode_c_20__n.BLIF \ -un10_ciin_4.BLIF N_274.BLIF un10_ciin_5.BLIF N_276.BLIF a_decode_c_21__n.BLIF \ -un10_ciin_6.BLIF N_77.BLIF un10_ciin_7.BLIF N_79.BLIF a_decode_c_22__n.BLIF \ -un10_ciin_8.BLIF N_78.BLIF un10_ciin_9.BLIF N_263.BLIF a_decode_c_23__n.BLIF \ -un10_ciin_10.BLIF N_108.BLIF un10_ciin_11.BLIF N_114.BLIF a_c_0__n.BLIF \ -un6_amiga_bus_data_dir_1.BLIF N_85.BLIF un6_amiga_bus_data_dir_2.BLIF \ -N_104.BLIF a_c_1__n.BLIF pos_clk_as_000_dma6_1_n.BLIF N_91.BLIF \ -pos_clk_as_000_dma6_2_n.BLIF N_131.BLIF nEXP_SPACE_c.BLIF \ -DS_000_DMA_1_sqmuxa_1.BLIF N_277.BLIF pos_clk_un4_rw_000_1_n.BLIF N_130.BLIF \ -BERR_c.BLIF pos_clk_un4_rw_000_2_n.BLIF N_115.BLIF \ -pos_clk_un13_clk_out_int_1_n.BLIF N_116.BLIF BG_030_c.BLIF N_125_1.BLIF \ -N_105.BLIF N_116_1.BLIF N_103.BLIF BG_000DFFreg.BLIF \ -pos_clk_un29_clk_000_ne_1_1_n.BLIF N_101.BLIF \ -pos_clk_un29_clk_000_ne_1_2_n.BLIF N_259.BLIF \ -pos_clk_un29_clk_000_ne_1_3_n.BLIF N_255.BLIF BGACK_000_c.BLIF N_261_1.BLIF \ -N_256.BLIF N_261_2.BLIF N_254.BLIF CLK_030_c.BLIF N_262_1.BLIF N_16.BLIF \ -N_262_2.BLIF N_106.BLIF DS_000_ENABLE_0_sqmuxa_1_1.BLIF N_86.BLIF N_259_1.BLIF \ -N_107.BLIF CLK_OSZI_c.BLIF N_250_i_1.BLIF N_117.BLIF N_189_i_1.BLIF \ -pos_clk_a0_dma_3_n.BLIF pos_clk_un6_bg_030_1_n.BLIF N_129.BLIF \ -CLK_OUT_INTreg.BLIF N_108_1.BLIF pos_clk_size_dma_6_1__n.BLIF N_114_1.BLIF \ -pos_clk_size_dma_6_0__n.BLIF un21_berr_1.BLIF pos_clk_rw_000_dma_3_n.BLIF \ -FPU_SENSE_c.BLIF un21_fpu_cs_1.BLIF pos_clk_amiga_bus_enable_dma_low_3_n.BLIF \ -N_130_1.BLIF pos_clk_amiga_bus_enable_dma_high_3_n.BLIF IPL_030DFF_0_reg.BLIF \ -N_136_i_1.BLIF SIZE_DMA_3_sqmuxa.BLIF N_152_i_1.BLIF \ -pos_clk_un5_bgack_030_int_d_n.BLIF IPL_030DFF_1_reg.BLIF N_146_i_1.BLIF \ -N_18.BLIF N_267_i_1.BLIF N_19.BLIF IPL_030DFF_2_reg.BLIF pos_clk_ipl_1_n.BLIF \ -N_21.BLIF bg_000_0_un3_n.BLIF N_22.BLIF ipl_c_0__n.BLIF bg_000_0_un1_n.BLIF \ -un6_amiga_bus_data_dir.BLIF bg_000_0_un0_n.BLIF un12_amiga_bus_data_dir_m.BLIF \ -ipl_c_1__n.BLIF uds_000_int_0_un3_n.BLIF pos_clk_un3_clk_out_int_n.BLIF \ -uds_000_int_0_un1_n.BLIF N_3.BLIF ipl_c_2__n.BLIF uds_000_int_0_un0_n.BLIF \ -pos_clk_as_000_dma6_n.BLIF lds_000_int_0_un3_n.BLIF DS_000_DMA_1_sqmuxa.BLIF \ -lds_000_int_0_un1_n.BLIF N_4.BLIF DTACK_c.BLIF lds_000_int_0_un0_n.BLIF \ -AS_000_DMA_1_sqmuxa.BLIF ds_000_enable_0_un3_n.BLIF un1_rst_2.BLIF \ -ds_000_enable_0_un1_n.BLIF G_97.BLIF ds_000_enable_0_un0_n.BLIF N_199.BLIF \ -VPA_c.BLIF ipl_030_0_2__un3_n.BLIF pos_clk_un13_bgack_030_int_n.BLIF \ -ipl_030_0_2__un1_n.BLIF N_205.BLIF ipl_030_0_2__un0_n.BLIF \ -pos_clk_un13_clk_out_int_n.BLIF RST_c.BLIF vma_int_0_un3_n.BLIF \ -pos_clk_un15_bgack_030_int_n.BLIF vma_int_0_un1_n.BLIF pos_clk_un3_n.BLIF \ -RESET_c.BLIF vma_int_0_un0_n.BLIF pos_clk_un12_clk_out_int_n.BLIF \ -cpu_est_0_1__un3_n.BLIF pos_clk_un1_bgack_030_int_n.BLIF RW_c.BLIF \ -cpu_est_0_1__un1_n.BLIF DS_000_DMA_0_sqmuxa.BLIF cpu_est_0_1__un0_n.BLIF \ -un1_rst_3.BLIF fc_c_0__n.BLIF cpu_est_0_2__un3_n.BLIF G_95.BLIF \ -cpu_est_0_2__un1_n.BLIF G_101.BLIF fc_c_1__n.BLIF cpu_est_0_2__un0_n.BLIF \ -G_103.BLIF cpu_est_0_3__un3_n.BLIF pos_clk_un4_rw_000_n.BLIF \ -cpu_est_0_3__un1_n.BLIF N_7.BLIF AMIGA_BUS_DATA_DIR_c.BLIF \ -cpu_est_0_3__un0_n.BLIF pos_clk_un6_bgack_000_n.BLIF \ -pos_clk_un31_clk_000_ne_1_i_m2_un3_n.BLIF pos_clk_un4_bgack_000_n.BLIF \ -pos_clk_un31_clk_000_ne_1_i_m2_un1_n.BLIF N_265_2.BLIF \ -pos_clk_un31_clk_000_ne_1_i_m2_un0_n.BLIF N_111.BLIF \ -bgack_030_int_0_un3_n.BLIF N_109.BLIF BG_030_c_i.BLIF \ -bgack_030_int_0_un1_n.BLIF N_113.BLIF pos_clk_un6_bg_030_i_n.BLIF \ -bgack_030_int_0_un0_n.BLIF N_112.BLIF pos_clk_un9_bg_030_0_n.BLIF \ -ds_000_dma_0_un3_n.BLIF N_98.BLIF UDS_000_INT_i.BLIF ds_000_dma_0_un1_n.BLIF \ -pos_clk_un29_clk_000_ne_1_n.BLIF un1_UDS_000_INT_0.BLIF \ -ds_000_dma_0_un0_n.BLIF N_87.BLIF LDS_000_INT_i.BLIF as_000_dma_0_un3_n.BLIF \ -N_270.BLIF un1_LDS_000_INT_0.BLIF as_000_dma_0_un1_n.BLIF N_134.BLIF \ -N_23_i.BLIF as_000_dma_0_un0_n.BLIF N_125.BLIF N_30_0.BLIF \ -size_dma_0_1__un3_n.BLIF N_124.BLIF N_20_i.BLIF size_dma_0_1__un1_n.BLIF \ -N_121.BLIF N_33_0.BLIF size_dma_0_1__un0_n.BLIF N_120.BLIF N_13_i.BLIF \ -size_dma_0_0__un3_n.BLIF N_137.BLIF N_40_0.BLIF size_dma_0_0__un1_n.BLIF \ -pos_clk_un31_clk_000_ne_n.BLIF ipl_c_i_2__n.BLIF size_dma_0_0__un0_n.BLIF \ -N_17.BLIF N_51_0.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF \ -pos_clk_un9_clk_000_pe_n.BLIF N_26_i.BLIF \ -amiga_bus_enable_dma_high_0_un1_n.BLIF cpu_est_2_1__n.BLIF N_29_0.BLIF \ -amiga_bus_enable_dma_high_0_un0_n.BLIF cpu_est_2_2__n.BLIF a_c_i_0__n.BLIF \ -amiga_bus_enable_dma_low_0_un3_n.BLIF N_261.BLIF size_c_i_1__n.BLIF \ -amiga_bus_enable_dma_low_0_un1_n.BLIF N_262.BLIF \ -pos_clk_un10_sm_amiga_i_n.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF \ -N_251.BLIF DS_000_ENABLE_0_sqmuxa_1_i.BLIF a0_dma_0_un3_n.BLIF N_252.BLIF \ -un1_DS_000_ENABLE_0_sqmuxa_i.BLIF a0_dma_0_un1_n.BLIF N_258.BLIF N_157_i.BLIF \ -a0_dma_0_un0_n.BLIF N_257.BLIF N_160_0.BLIF rw_000_dma_0_un3_n.BLIF \ -DS_000_ENABLE_1_sqmuxa.BLIF N_161_0.BLIF rw_000_dma_0_un1_n.BLIF \ -un1_DS_000_ENABLE_0_sqmuxa.BLIF N_162_0.BLIF rw_000_dma_0_un0_n.BLIF \ -N_102.BLIF N_165_i.BLIF ipl_030_0_0__un3_n.BLIF N_118.BLIF \ -ipl_030_0_0__un1_n.BLIF N_119.BLIF N_167_i.BLIF ipl_030_0_0__un0_n.BLIF \ -N_264.BLIF N_166_i.BLIF ipl_030_0_1__un3_n.BLIF DS_000_ENABLE_0_sqmuxa_1.BLIF \ -ipl_030_0_1__un1_n.BLIF N_164.BLIF N_168_i.BLIF ipl_030_0_1__un0_n.BLIF \ -N_170.BLIF as_030_000_sync_0_un3_n.BLIF N_168.BLIF N_170_i.BLIF \ -as_030_000_sync_0_un1_n.BLIF N_166.BLIF as_030_000_sync_0_un0_n.BLIF \ -N_167.BLIF N_164_i.BLIF rw_000_int_0_un3_n.BLIF N_165.BLIF \ -rw_000_int_0_un1_n.BLIF N_162.BLIF N_102_i.BLIF rw_000_int_0_un0_n.BLIF \ -N_161.BLIF N_264_i.BLIF a_decode_15__n.BLIF N_160.BLIF N_79_i.BLIF N_157.BLIF \ -N_78_i.BLIF a_decode_14__n.BLIF N_26.BLIF N_119_i.BLIF N_13.BLIF N_118_i.BLIF \ -a_decode_13__n.BLIF N_20.BLIF N_23.BLIF N_255_i.BLIF a_decode_12__n.BLIF \ -N_8.BLIF N_257_i.BLIF pos_clk_un9_bg_030_n.BLIF cpu_est_2_0_2__n.BLIF \ -a_decode_11__n.BLIF un1_amiga_bus_enable_low_i.BLIF N_258_i.BLIF \ -un21_fpu_cs_i.BLIF N_259_i.BLIF a_decode_10__n.BLIF sm_amiga_i_2__n.BLIF \ -cpu_est_2_0_1__n.BLIF sm_amiga_i_1__n.BLIF N_262_i.BLIF a_decode_9__n.BLIF \ -sm_amiga_i_3__n.BLIF N_261_i.BLIF sm_amiga_i_4__n.BLIF \ -pos_clk_un9_clk_000_pe_0_n.BLIF a_decode_8__n.BLIF sm_amiga_i_6__n.BLIF \ -N_251_i.BLIF sm_amiga_i_5__n.BLIF N_252_0.BLIF a_decode_7__n.BLIF \ -clk_000_d_i_0__n.BLIF N_76_i.BLIF AS_000_INT_i.BLIF N_17_i.BLIF \ -a_decode_6__n.BLIF sm_amiga_i_i_7__n.BLIF N_36_0.BLIF AS_030_i.BLIF \ -N_98_i.BLIF a_decode_5__n.BLIF cpu_est_i_2__n.BLIF \ -pos_clk_un31_clk_000_ne_i_n.BLIF cpu_est_i_0__n.BLIF N_228_i.BLIF \ -a_decode_4__n.BLIF cpu_est_i_3__n.BLIF N_121_i.BLIF cpu_est_i_1__n.BLIF \ -N_120_i.BLIF a_decode_3__n.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF \ +LDS_000.BLIF BERR.BLIF RW.BLIF SIZE_0_.BLIF AHIGH_30_.BLIF AHIGH_29_.BLIF \ +AHIGH_28_.BLIF AHIGH_27_.BLIF AHIGH_26_.BLIF AHIGH_25_.BLIF AHIGH_24_.BLIF \ +A_0_.BLIF N_23_0.BLIF UDS_000_c.BLIF N_19_i.BLIF N_22_0.BLIF LDS_000_c.BLIF \ +N_18_i.BLIF N_21_0.BLIF size_c_0__n.BLIF ipl_c_i_2__n.BLIF N_43_0.BLIF \ +size_c_1__n.BLIF ipl_c_i_1__n.BLIF inst_BGACK_030_INTreg.BLIF N_42_0.BLIF \ +vcc_n_n.BLIF ahigh_c_24__n.BLIF ipl_c_i_0__n.BLIF un5_e.BLIF N_41_0.BLIF \ +gnd_n_n.BLIF ahigh_c_25__n.BLIF DTACK_c_i.BLIF un1_amiga_bus_enable_low.BLIF \ +N_45_0.BLIF un3_as_030.BLIF ahigh_c_26__n.BLIF VPA_c_i.BLIF \ +un1_UDS_000_INT.BLIF N_44_0.BLIF un1_LDS_000_INT.BLIF ahigh_c_27__n.BLIF \ +N_13_i.BLIF un1_DS_000_ENABLE_0_sqmuxa.BLIF N_27_0.BLIF un10_ciin.BLIF \ +ahigh_c_28__n.BLIF LDS_000_INT_i.BLIF un21_fpu_cs.BLIF un1_LDS_000_INT_0.BLIF \ +un21_berr.BLIF ahigh_c_29__n.BLIF UDS_000_INT_i.BLIF un2_ds_030.BLIF \ +un1_UDS_000_INT_0.BLIF cpu_est_0_.BLIF ahigh_c_30__n.BLIF N_96_0_1.BLIF \ +cpu_est_1_.BLIF N_96_0_2.BLIF cpu_est_2_.BLIF ahigh_c_31__n.BLIF \ +N_282_0_1.BLIF cpu_est_3_.BLIF N_282_0_2.BLIF \ +inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF N_282_0_3.BLIF \ +inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF N_282_0_4.BLIF inst_AS_030_D0.BLIF \ +pos_clk_un10_sm_amiga_i_1_n.BLIF inst_AS_030_D1.BLIF un10_ciin_1.BLIF \ +inst_AS_030_000_SYNC.BLIF un10_ciin_2.BLIF inst_AS_000_DMA.BLIF \ +un10_ciin_3.BLIF inst_DS_000_DMA.BLIF un10_ciin_4.BLIF inst_VMA_INTreg.BLIF \ +un10_ciin_5.BLIF inst_VPA_D.BLIF un10_ciin_6.BLIF CLK_000_D_3_.BLIF \ +un10_ciin_7.BLIF inst_DTACK_D0.BLIF un10_ciin_8.BLIF inst_AMIGA_DS.BLIF \ +un10_ciin_9.BLIF CLK_000_D_1_.BLIF un10_ciin_10.BLIF CLK_000_D_0_.BLIF \ +un10_ciin_11.BLIF inst_CLK_OUT_PRE_50.BLIF N_201_1.BLIF \ +inst_CLK_OUT_PRE_D.BLIF N_201_2.BLIF IPL_D0_0_.BLIF N_131_i_1.BLIF \ +IPL_D0_1_.BLIF N_134_0_1.BLIF IPL_D0_2_.BLIF N_113_i_1.BLIF CLK_000_D_2_.BLIF \ +N_113_i_2.BLIF CLK_000_D_4_.BLIF N_144_1.BLIF pos_clk_ipl_n.BLIF N_144_2.BLIF \ +SIZE_DMA_0_.BLIF N_143_1.BLIF SIZE_DMA_1_.BLIF N_143_2.BLIF inst_A0_DMA.BLIF \ +N_163_1.BLIF inst_RW_000_DMA.BLIF N_163_2.BLIF inst_UDS_000_INT.BLIF \ +N_163_3.BLIF inst_DS_000_ENABLE.BLIF un21_fpu_cs_1.BLIF inst_LDS_000_INT.BLIF \ +a_decode_c_16__n.BLIF un21_berr_1_0.BLIF inst_BGACK_030_INT_D.BLIF \ +pos_clk_cycle_dma_5_1_1__n.BLIF SM_AMIGA_6_.BLIF a_decode_c_17__n.BLIF \ +N_199_1.BLIF inst_RW_000_INT.BLIF AS_000_DMA_1_sqmuxa_1.BLIF SM_AMIGA_4_.BLIF \ +a_decode_c_18__n.BLIF N_140_1.BLIF SM_AMIGA_1_.BLIF N_66_i_1.BLIF \ +SM_AMIGA_0_.BLIF a_decode_c_19__n.BLIF N_66_i_2.BLIF CYCLE_DMA_0_.BLIF \ +N_205_i_1.BLIF CYCLE_DMA_1_.BLIF a_decode_c_20__n.BLIF N_205_i_2.BLIF \ +inst_DSACK1_INT.BLIF N_180_1.BLIF inst_AS_000_INT.BLIF a_decode_c_21__n.BLIF \ +N_180_2.BLIF pos_clk_un9_clk_000_pe_n.BLIF N_59_i_1.BLIF SM_AMIGA_5_.BLIF \ +a_decode_c_22__n.BLIF N_127_i_1.BLIF SM_AMIGA_3_.BLIF N_123_i_1.BLIF \ +SM_AMIGA_2_.BLIF a_decode_c_23__n.BLIF N_121_i_1.BLIF N_119_i_1.BLIF N_6.BLIF \ +a_c_0__n.BLIF N_117_i_1.BLIF N_115_i_1.BLIF a_c_1__n.BLIF N_111_i_1.BLIF \ +N_165_1.BLIF N_13.BLIF nEXP_SPACE_c.BLIF N_162_1.BLIF N_148_1.BLIF N_18.BLIF \ +BERR_c.BLIF pos_clk_ipl_1_n.BLIF N_19.BLIF ds_000_dma_0_un3_n.BLIF N_20.BLIF \ +BG_030_c.BLIF ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF \ +BG_000DFFreg.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un1_n.BLIF \ +as_000_dma_0_un0_n.BLIF BGACK_000_c.BLIF uds_000_int_0_un3_n.BLIF \ +uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF bg_000_0_un3_n.BLIF \ +bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF CLK_OSZI_c.BLIF \ +lds_000_int_0_un3_n.BLIF lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF \ +CLK_OUT_INTreg.BLIF as_030_d1_0_un3_n.BLIF as_030_d1_0_un1_n.BLIF \ +as_030_d1_0_un0_n.BLIF FPU_SENSE_c.BLIF rw_000_int_0_un3_n.BLIF \ +rw_000_int_0_un1_n.BLIF IPL_030DFF_0_reg.BLIF rw_000_int_0_un0_n.BLIF \ +as_030_000_sync_0_un3_n.BLIF IPL_030DFF_1_reg.BLIF \ +as_030_000_sync_0_un1_n.BLIF SM_AMIGA_i_7_.BLIF as_030_000_sync_0_un0_n.BLIF \ +IPL_030DFF_2_reg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un1_n.BLIF \ +cpu_est_2_1__n.BLIF ipl_c_0__n.BLIF bgack_030_int_0_un0_n.BLIF \ +cpu_est_2_2__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_2_3__n.BLIF \ +ipl_c_1__n.BLIF cpu_est_0_1__un1_n.BLIF G_105.BLIF cpu_est_0_1__un0_n.BLIF \ +G_106.BLIF ipl_c_2__n.BLIF cpu_est_0_2__un3_n.BLIF G_107.BLIF \ +cpu_est_0_2__un1_n.BLIF N_60.BLIF cpu_est_0_2__un0_n.BLIF N_63.BLIF \ +DTACK_c.BLIF cpu_est_0_3__un3_n.BLIF N_126.BLIF cpu_est_0_3__un1_n.BLIF \ +N_150.BLIF cpu_est_0_3__un0_n.BLIF N_151.BLIF ipl_030_0_0__un3_n.BLIF \ +N_219.BLIF VPA_c.BLIF ipl_030_0_0__un1_n.BLIF N_175.BLIF \ +ipl_030_0_0__un0_n.BLIF ipl_030_0_1__un3_n.BLIF N_59.BLIF RST_c.BLIF \ +ipl_030_0_1__un1_n.BLIF N_68.BLIF ipl_030_0_1__un0_n.BLIF N_72.BLIF \ +ipl_030_0_2__un3_n.BLIF N_80.BLIF ipl_030_0_2__un1_n.BLIF N_93.BLIF RW_c.BLIF \ +ipl_030_0_2__un0_n.BLIF N_98.BLIF ds_000_enable_0_un3_n.BLIF N_107.BLIF \ +fc_c_0__n.BLIF ds_000_enable_0_un1_n.BLIF N_128.BLIF \ +ds_000_enable_0_un0_n.BLIF N_131.BLIF fc_c_1__n.BLIF vma_int_0_un3_n.BLIF \ +N_134.BLIF vma_int_0_un1_n.BLIF N_135.BLIF vma_int_0_un0_n.BLIF N_141.BLIF \ +AMIGA_BUS_DATA_DIR_c.BLIF a_decode_15__n.BLIF N_142.BLIF N_143.BLIF \ +a_decode_14__n.BLIF N_144.BLIF N_145.BLIF a_decode_13__n.BLIF N_146.BLIF \ +N_205_i.BLIF N_147.BLIF N_140_i.BLIF a_decode_12__n.BLIF N_148.BLIF \ +AMIGA_DS_i.BLIF N_149.BLIF a_decode_11__n.BLIF N_154.BLIF N_199_i.BLIF \ +N_155.BLIF N_198_i.BLIF a_decode_10__n.BLIF N_162.BLIF N_180_i.BLIF N_165.BLIF \ +N_262_i.BLIF a_decode_9__n.BLIF N_259.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF \ +N_260.BLIF pos_clk_un2_i_n.BLIF a_decode_8__n.BLIF N_181.BLIF N_3_i.BLIF \ +N_182.BLIF N_32_0.BLIF a_decode_7__n.BLIF N_183.BLIF N_4_i.BLIF N_184.BLIF \ +N_31_0.BLIF a_decode_6__n.BLIF N_185.BLIF N_220_i.BLIF N_186.BLIF \ +BG_030_c_i.BLIF a_decode_5__n.BLIF N_266.BLIF pos_clk_un9_bg_030_0_n.BLIF \ +N_267.BLIF N_17_i.BLIF a_decode_4__n.BLIF N_268.BLIF N_24_0.BLIF N_190.BLIF \ +N_16_i.BLIF a_decode_3__n.BLIF N_191.BLIF N_25_0.BLIF N_201.BLIF N_15_i.BLIF \ +a_decode_2__n.BLIF N_202.BLIF N_26_0.BLIF N_203.BLIF N_12_i.BLIF N_208.BLIF \ +N_28_0.BLIF N_163.BLIF N_11_i.BLIF N_282.BLIF N_29_0.BLIF un21_berr_1.BLIF \ +N_5_i.BLIF N_132.BLIF N_30_0.BLIF N_96.BLIF a_c_i_0__n.BLIF N_129.BLIF \ +size_c_i_1__n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF pos_clk_un10_sm_amiga_i_n.BLIF \ +N_169.BLIF un1_dsack1_i.BLIF N_170.BLIF N_69_i.BLIF N_167.BLIF N_163_i.BLIF \ +N_168.BLIF N_244_0.BLIF pos_clk_rw_000_int_5_n.BLIF N_164_i.BLIF \ +pos_clk_un6_bgack_000_n.BLIF N_165_i.BLIF N_274.BLIF \ +un11_amiga_bus_enable_high_i.BLIF N_164.BLIF un10_ciin_i.BLIF N_244.BLIF \ +N_60_0.BLIF N_5.BLIF N_274_i.BLIF N_11.BLIF pos_clk_un6_bgack_000_0_n.BLIF \ +N_12.BLIF RW_c_i.BLIF N_15.BLIF pos_clk_rw_000_int_5_0_n.BLIF N_16.BLIF \ +N_168_i.BLIF N_17.BLIF N_167_i.BLIF pos_clk_un9_bg_030_n.BLIF G_91.BLIF \ +N_170_i.BLIF N_3.BLIF N_169_i.BLIF N_205.BLIF AS_000_DMA_1_sqmuxa.BLIF \ +N_38_0.BLIF N_4.BLIF un1_SM_AMIGA_0_sqmuxa_1_0.BLIF N_199.BLIF N_282_0.BLIF \ +pos_clk_un2_n.BLIF clk_000_d_i_3__n.BLIF N_140.BLIF N_96_0.BLIF N_262.BLIF \ +N_129_i.BLIF N_198.BLIF N_268_i.BLIF N_180.BLIF N_246_i.BLIF \ +un1_amiga_bus_enable_low_i.BLIF N_132_0.BLIF un21_fpu_cs_i.BLIF AS_000_i.BLIF \ +N_142_i.BLIF BGACK_030_INT_i.BLIF N_141_i.BLIF nEXP_SPACE_i.BLIF N_135_0.BLIF \ +cycle_dma_i_0__n.BLIF N_134_0.BLIF RW_000_i.BLIF N_131_i.BLIF CLK_EXP_i.BLIF \ +LDS_000_c_i.BLIF cycle_dma_i_1__n.BLIF UDS_000_c_i.BLIF DS_000_DMA_i.BLIF \ +N_128_i.BLIF AS_000_DMA_i.BLIF N_107_i.BLIF a_i_1__n.BLIF N_203_i.BLIF \ +AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_0.BLIF \ +a_decode_i_19__n.BLIF N_201_i.BLIF a_decode_i_18__n.BLIF N_202_i.BLIF \ +a_decode_i_16__n.BLIF VMA_INT_i.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF \ +N_98_i.BLIF sm_amiga_i_0__n.BLIF N_93_i.BLIF sm_amiga_i_5__n.BLIF N_82_i.BLIF \ +sm_amiga_i_6__n.BLIF N_80_i.BLIF sm_amiga_i_i_7__n.BLIF N_72_i.BLIF \ +AS_030_i.BLIF N_68_i.BLIF AS_000_INT_i.BLIF N_59_i.BLIF DSACK1_INT_i.BLIF \ +N_190_i.BLIF sm_amiga_i_1__n.BLIF N_191_i.BLIF FPU_SENSE_i.BLIF \ +AS_030_D1_i.BLIF N_267_i.BLIF cpu_est_i_0__n.BLIF cpu_est_i_3__n.BLIF \ +N_266_i.BLIF VPA_D_i.BLIF sm_amiga_i_3__n.BLIF N_186_i.BLIF \ +sm_amiga_i_4__n.BLIF cpu_est_i_1__n.BLIF N_185_i.BLIF clk_000_d_i_0__n.BLIF \ +clk_000_d_i_1__n.BLIF N_183_i.BLIF AS_030_D0_i.BLIF N_184_i.BLIF \ +cpu_est_i_2__n.BLIF DTACK_D0_i.BLIF N_182_i.BLIF sm_amiga_i_2__n.BLIF \ +AS_030_000_SYNC_i.BLIF N_181_i.BLIF ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF \ +N_260_i.BLIF ahigh_i_28__n.BLIF pos_clk_size_dma_6_0_1__n.BLIF \ +ahigh_i_29__n.BLIF N_259_i.BLIF ahigh_i_26__n.BLIF \ +pos_clk_size_dma_6_0_0__n.BLIF ahigh_i_27__n.BLIF N_63_0.BLIF \ +ahigh_i_24__n.BLIF N_155_i.BLIF ahigh_i_25__n.BLIF N_162_i.BLIF N_187_i.BLIF \ +un5_e_0.BLIF N_188_i.BLIF N_154_i.BLIF N_189_i.BLIF cpu_est_2_0_3__n.BLIF \ +N_149_i.BLIF N_208_i.BLIF cpu_est_2_0_2__n.BLIF N_147_i.BLIF un2_ds_030_i.BLIF \ +N_148_i.BLIF N_219_i.BLIF cpu_est_2_0_1__n.BLIF N_175_i.BLIF N_146_i.BLIF \ +un3_as_030_i.BLIF N_36_0.BLIF AS_030_c.BLIF N_145_i.BLIF N_35_0.BLIF \ +AS_000_c.BLIF N_143_i.BLIF N_144_i.BLIF RW_000_c.BLIF \ +pos_clk_un9_clk_000_pe_0_n.BLIF N_20_i.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF \ RW_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF \ SIZE_1_.PIN.BLIF AHIGH_24_.PIN.BLIF AHIGH_25_.PIN.BLIF AHIGH_26_.PIN.BLIF \ AHIGH_27_.PIN.BLIF AHIGH_28_.PIN.BLIF AHIGH_29_.PIN.BLIF AHIGH_30_.PIN.BLIF \ -AHIGH_31_.PIN.BLIF A_0_.PIN.BLIF BERR.PIN.BLIF DTACK.PIN.BLIF RW.PIN.BLIF +AHIGH_31_.PIN.BLIF A_0_.PIN.BLIF BERR.PIN.BLIF RW.PIN.BLIF .outputs IPL_030_2_ DS_030 BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 \ AVEC E VMA AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ -AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_i_7_.D \ -SM_AMIGA_i_7_.C SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_5_.D SM_AMIGA_5_.C \ -SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_2_.D \ -SM_AMIGA_2_.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C \ -cpu_est_2_.D cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C IPL_030DFF_0_reg.D \ +AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_4_.D SM_AMIGA_4_.C \ +SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_1_.D \ +SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C IPL_030DFF_0_reg.D \ IPL_030DFF_0_reg.C IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D \ IPL_030DFF_2_reg.C IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D IPL_D0_1_.C IPL_D0_2_.D \ -IPL_D0_2_.C CLK_000_D_0_.D CLK_000_D_0_.C CLK_000_D_1_.D CLK_000_D_1_.C \ -CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C CLK_000_D_4_.D \ -CLK_000_D_4_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C \ -CLK_030_PE_0_.D CLK_030_PE_0_.C CLK_030_PE_1_.D CLK_030_PE_1_.C SIZE_DMA_0_.D \ -SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C cpu_est_0_.D cpu_est_0_.C \ -cpu_est_1_.D cpu_est_1_.C RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.D RST_DLY_1_.C \ -RST_DLY_2_.D RST_DLY_2_.C inst_DS_000_DMA.D inst_DS_000_DMA.C \ +IPL_D0_2_.C SM_AMIGA_i_7_.D SM_AMIGA_i_7_.C SM_AMIGA_6_.D SM_AMIGA_6_.C \ +SM_AMIGA_5_.D SM_AMIGA_5_.C CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_2_.D \ +CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C CLK_000_D_4_.D CLK_000_D_4_.C \ +SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C CYCLE_DMA_0_.D \ +CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C cpu_est_0_.D cpu_est_0_.C \ +cpu_est_1_.D cpu_est_1_.C cpu_est_2_.D cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C \ +CLK_000_D_0_.D CLK_000_D_0_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D \ +inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_VPA_D.D inst_VPA_D.C inst_DTACK_D0.D \ +inst_DTACK_D0.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C BG_000DFFreg.D \ +BG_000DFFreg.C inst_LDS_000_INT.D inst_LDS_000_INT.C inst_VMA_INTreg.D \ +inst_VMA_INTreg.C inst_RW_000_INT.D inst_RW_000_INT.C inst_AS_030_000_SYNC.D \ +inst_AS_030_000_SYNC.C inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C \ +inst_AS_000_DMA.D inst_AS_000_DMA.C inst_DS_000_DMA.D inst_DS_000_DMA.C \ inst_DSACK1_INT.D inst_DSACK1_INT.C inst_AS_000_INT.D inst_AS_000_INT.C \ -inst_AMIGA_DS.D inst_AMIGA_DS.C inst_AS_030_D0.D inst_AS_030_D0.C \ -inst_DTACK_D0.D inst_DTACK_D0.C inst_VPA_D.D inst_VPA_D.C inst_RESET_OUT.D \ -inst_RESET_OUT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C BG_000DFFreg.D \ -BG_000DFFreg.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D \ -inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D \ -inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.D inst_UDS_000_INT.C \ -inst_A0_DMA.D inst_A0_DMA.C inst_RW_000_DMA.D inst_RW_000_DMA.C \ -inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_INT.D inst_RW_000_INT.C \ -inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_LDS_000_INT.D \ -inst_LDS_000_INT.C inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C \ -inst_AS_000_DMA.D inst_AS_000_DMA.C inst_BGACK_030_INT_D.D \ -inst_BGACK_030_INT_D.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.D \ -inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C SIZE_1_ \ -AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR DTACK RW SIZE_0_ AHIGH_30_ \ -AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ \ -clk_000_d_i_1__n VPA_D_i N_125_i a_decode_2__n VMA_INT_i N_124_i \ -sm_amiga_i_0__n N_53_0 rst_dly_i_2__n N_134_i rst_dly_i_1__n N_270_0 \ -rst_dly_i_0__n N_77_i DSACK1_INT_i N_87_i N_137_i_0 N_112_i vcc_n_n DTACK_D0_i \ -N_113_i BGACK_030_INT_i N_114_i gnd_n_n nEXP_SPACE_i un1_amiga_bus_enable_low \ -AS_000_DMA_i N_109_i un7_as_030 RW_000_i N_108_i un1_LDS_000_INT \ -clk_030_pe_i_1__n N_111_i un1_UDS_000_INT DS_000_DMA_0_sqmuxa_i N_265_2_0 \ -un1_SM_AMIGA_0_sqmuxa_1 pos_clk_un4_rw_000_i_n un10_ciin AS_000_i un1_as_000_i \ -un21_fpu_cs AMIGA_DS_i VPA_c_i un21_berr pos_clk_un3_clk_out_int_i_n N_52_0 \ -un6_ds_030 cycle_dma_i_0__n DTACK_c_i un13_ciin cycle_dma_i_1__n N_48_0 \ -pos_clk_as_000_dma6_i_n un3_ahigh_i DS_000_DMA_i pos_clk_un4_bgack_000_i_n \ -CLK_EXP_i pos_clk_un6_bgack_000_0_n AMIGA_BUS_ENABLE_DMA_LOW_i N_7_i \ -ahigh_i_25__n N_41_0 ahigh_i_24__n pos_clk_un1_bgack_030_int_0_n ahigh_i_27__n \ -pos_clk_un12_clk_out_int_0_n ahigh_i_26__n pos_clk_un3_0_n ahigh_i_29__n \ -pos_clk_un15_bgack_030_int_i_n ahigh_i_28__n N_3_i ahigh_i_31__n N_43_0 \ -ahigh_i_30__n N_4_i a_i_1__n N_42_0 AMIGA_BUS_ENABLE_DMA_HIGH_i \ -un6_amiga_bus_data_dir_i AS_030_D0_i un12_amiga_bus_data_dir_m_i un10_ciin_i \ -AMIGA_BUS_DATA_DIR_c_0 FPU_SENSE_i N_22_i AS_030_000_SYNC_i N_31_0 \ -a_decode_i_16__n N_21_i a_decode_i_18__n N_32_0 a_decode_i_19__n N_19_i \ -N_224_i N_34_0 N_225_i N_18_i N_226_i N_35_0 pos_clk_un5_bgack_030_int_d_i_n \ -pos_clk_amiga_bus_enable_dma_high_3_0_n pos_clk_un6_bg_030_n \ -pos_clk_amiga_bus_enable_dma_low_3_0_n pos_clk_ipl_n pos_clk_rw_000_dma_3_0_n \ -un13_ciin_i UDS_000_c_i un6_ds_030_i LDS_000_c_i N_123_i N_86_i N_122_i \ -N_129_i un7_as_030_i N_130_i AS_030_c un11_amiga_bus_enable_high_i N_117_i \ -AS_000_c N_46_0 N_107_i RW_000_c pos_clk_size_dma_6_0_0__n N_106_i \ -pos_clk_size_dma_6_0_1__n UDS_000_c N_16_i N_254_i LDS_000_c N_263_i N_250_i \ -size_c_0__n N_256_i N_189_i pos_clk_rw_000_int_5_n size_c_1__n N_101_i \ -ahigh_c_24__n N_103_i N_104_i ahigh_c_25__n N_105_i ahigh_c_26__n N_115_i \ -ahigh_c_27__n N_116_i ahigh_c_28__n N_131_i N_277_i ahigh_c_29__n N_64_0 \ -N_91_0 ahigh_c_30__n N_159_0 N_14 N_85_i N_15 ahigh_c_31__n \ -un1_SM_AMIGA_0_sqmuxa_1_0 N_24 RW_c_i N_25 pos_clk_rw_000_int_5_0_n \ -clk_000_d_i_3__n N_25_i N_28_0 N_24_i N_27_0 ipl_c_i_1__n N_50_0 ipl_c_i_0__n \ -N_49_0 N_14_i N_39_0 N_15_i N_38_0 N_91_0_1 N_91_0_2 N_91_0_3 N_265_i_1 \ -N_266_i_1 N_266_i_2 N_138_i_1 N_148_i_1 N_144_i_1 N_142_i_1 N_140_i_1 \ -pos_clk_un10_sm_amiga_i_1_n N_76 N_85_i_1 N_85_i_2 a_decode_c_16__n N_277_1 \ -N_277_2 un1_rst_2_1 a_decode_c_17__n N_277_3 N_277_4 N_64 a_decode_c_18__n \ -N_277_5 N_122 un10_ciin_1 N_123 a_decode_c_19__n un10_ciin_2 N_132 un10_ciin_3 \ -N_133 a_decode_c_20__n un10_ciin_4 N_274 un10_ciin_5 N_276 a_decode_c_21__n \ -un10_ciin_6 N_77 un10_ciin_7 N_79 a_decode_c_22__n un10_ciin_8 N_78 \ -un10_ciin_9 N_263 a_decode_c_23__n un10_ciin_10 N_108 un10_ciin_11 N_114 \ -a_c_0__n un6_amiga_bus_data_dir_1 N_85 un6_amiga_bus_data_dir_2 N_104 a_c_1__n \ -pos_clk_as_000_dma6_1_n N_91 pos_clk_as_000_dma6_2_n N_131 nEXP_SPACE_c \ -DS_000_DMA_1_sqmuxa_1 N_277 pos_clk_un4_rw_000_1_n N_130 BERR_c \ -pos_clk_un4_rw_000_2_n N_115 pos_clk_un13_clk_out_int_1_n N_116 BG_030_c \ -N_125_1 N_105 N_116_1 N_103 pos_clk_un29_clk_000_ne_1_1_n N_101 \ -pos_clk_un29_clk_000_ne_1_2_n N_259 pos_clk_un29_clk_000_ne_1_3_n N_255 \ -BGACK_000_c N_261_1 N_256 N_261_2 N_254 CLK_030_c N_262_1 N_16 N_262_2 N_106 \ -DS_000_ENABLE_0_sqmuxa_1_1 N_86 N_259_1 N_107 CLK_OSZI_c N_250_i_1 N_117 \ -N_189_i_1 pos_clk_a0_dma_3_n pos_clk_un6_bg_030_1_n N_129 N_108_1 \ -pos_clk_size_dma_6_1__n N_114_1 pos_clk_size_dma_6_0__n un21_berr_1 \ -pos_clk_rw_000_dma_3_n FPU_SENSE_c un21_fpu_cs_1 \ -pos_clk_amiga_bus_enable_dma_low_3_n N_130_1 \ -pos_clk_amiga_bus_enable_dma_high_3_n N_136_i_1 SIZE_DMA_3_sqmuxa N_152_i_1 \ -pos_clk_un5_bgack_030_int_d_n N_146_i_1 N_18 N_267_i_1 N_19 pos_clk_ipl_1_n \ -N_21 bg_000_0_un3_n N_22 ipl_c_0__n bg_000_0_un1_n un6_amiga_bus_data_dir \ -bg_000_0_un0_n un12_amiga_bus_data_dir_m ipl_c_1__n uds_000_int_0_un3_n \ -pos_clk_un3_clk_out_int_n uds_000_int_0_un1_n N_3 ipl_c_2__n \ -uds_000_int_0_un0_n pos_clk_as_000_dma6_n lds_000_int_0_un3_n \ -DS_000_DMA_1_sqmuxa lds_000_int_0_un1_n N_4 DTACK_c lds_000_int_0_un0_n \ -AS_000_DMA_1_sqmuxa ds_000_enable_0_un3_n un1_rst_2 ds_000_enable_0_un1_n \ -ds_000_enable_0_un0_n N_199 VPA_c ipl_030_0_2__un3_n \ -pos_clk_un13_bgack_030_int_n ipl_030_0_2__un1_n N_205 ipl_030_0_2__un0_n \ -pos_clk_un13_clk_out_int_n RST_c vma_int_0_un3_n pos_clk_un15_bgack_030_int_n \ -vma_int_0_un1_n pos_clk_un3_n RESET_c vma_int_0_un0_n \ -pos_clk_un12_clk_out_int_n cpu_est_0_1__un3_n pos_clk_un1_bgack_030_int_n RW_c \ -cpu_est_0_1__un1_n DS_000_DMA_0_sqmuxa cpu_est_0_1__un0_n un1_rst_3 fc_c_0__n \ -cpu_est_0_2__un3_n cpu_est_0_2__un1_n fc_c_1__n cpu_est_0_2__un0_n \ -cpu_est_0_3__un3_n pos_clk_un4_rw_000_n cpu_est_0_3__un1_n N_7 \ -AMIGA_BUS_DATA_DIR_c cpu_est_0_3__un0_n pos_clk_un6_bgack_000_n \ -pos_clk_un31_clk_000_ne_1_i_m2_un3_n pos_clk_un4_bgack_000_n \ -pos_clk_un31_clk_000_ne_1_i_m2_un1_n N_265_2 \ -pos_clk_un31_clk_000_ne_1_i_m2_un0_n N_111 bgack_030_int_0_un3_n N_109 \ -BG_030_c_i bgack_030_int_0_un1_n N_113 pos_clk_un6_bg_030_i_n \ -bgack_030_int_0_un0_n N_112 pos_clk_un9_bg_030_0_n ds_000_dma_0_un3_n N_98 \ -UDS_000_INT_i ds_000_dma_0_un1_n pos_clk_un29_clk_000_ne_1_n un1_UDS_000_INT_0 \ -ds_000_dma_0_un0_n N_87 LDS_000_INT_i as_000_dma_0_un3_n N_270 \ -un1_LDS_000_INT_0 as_000_dma_0_un1_n N_134 N_23_i as_000_dma_0_un0_n N_125 \ -N_30_0 size_dma_0_1__un3_n N_124 N_20_i size_dma_0_1__un1_n N_121 N_33_0 \ -size_dma_0_1__un0_n N_120 N_13_i size_dma_0_0__un3_n N_137 N_40_0 \ -size_dma_0_0__un1_n pos_clk_un31_clk_000_ne_n ipl_c_i_2__n size_dma_0_0__un0_n \ -N_17 N_51_0 amiga_bus_enable_dma_high_0_un3_n pos_clk_un9_clk_000_pe_n N_26_i \ -amiga_bus_enable_dma_high_0_un1_n cpu_est_2_1__n N_29_0 \ -amiga_bus_enable_dma_high_0_un0_n cpu_est_2_2__n a_c_i_0__n \ -amiga_bus_enable_dma_low_0_un3_n N_261 size_c_i_1__n \ -amiga_bus_enable_dma_low_0_un1_n N_262 pos_clk_un10_sm_amiga_i_n \ -amiga_bus_enable_dma_low_0_un0_n N_251 DS_000_ENABLE_0_sqmuxa_1_i \ -a0_dma_0_un3_n N_252 un1_DS_000_ENABLE_0_sqmuxa_i a0_dma_0_un1_n N_258 N_157_i \ -a0_dma_0_un0_n N_257 N_160_0 rw_000_dma_0_un3_n DS_000_ENABLE_1_sqmuxa N_161_0 \ -rw_000_dma_0_un1_n un1_DS_000_ENABLE_0_sqmuxa N_162_0 rw_000_dma_0_un0_n N_102 \ -N_165_i ipl_030_0_0__un3_n N_118 ipl_030_0_0__un1_n N_119 N_167_i \ -ipl_030_0_0__un0_n N_264 N_166_i ipl_030_0_1__un3_n DS_000_ENABLE_0_sqmuxa_1 \ -ipl_030_0_1__un1_n N_164 N_168_i ipl_030_0_1__un0_n N_170 \ -as_030_000_sync_0_un3_n N_168 N_170_i as_030_000_sync_0_un1_n N_166 \ -as_030_000_sync_0_un0_n N_167 N_164_i rw_000_int_0_un3_n N_165 \ -rw_000_int_0_un1_n N_162 N_102_i rw_000_int_0_un0_n N_161 N_264_i \ -a_decode_15__n N_160 N_79_i N_157 N_78_i a_decode_14__n N_26 N_119_i N_13 \ -N_118_i a_decode_13__n N_20 N_23 N_255_i a_decode_12__n N_8 N_257_i \ -pos_clk_un9_bg_030_n cpu_est_2_0_2__n a_decode_11__n \ -un1_amiga_bus_enable_low_i N_258_i un21_fpu_cs_i N_259_i a_decode_10__n \ -sm_amiga_i_2__n cpu_est_2_0_1__n sm_amiga_i_1__n N_262_i a_decode_9__n \ -sm_amiga_i_3__n N_261_i sm_amiga_i_4__n pos_clk_un9_clk_000_pe_0_n \ -a_decode_8__n sm_amiga_i_6__n N_251_i sm_amiga_i_5__n N_252_0 a_decode_7__n \ -clk_000_d_i_0__n N_76_i AS_000_INT_i N_17_i a_decode_6__n sm_amiga_i_i_7__n \ -N_36_0 AS_030_i N_98_i a_decode_5__n cpu_est_i_2__n \ -pos_clk_un31_clk_000_ne_i_n cpu_est_i_0__n N_228_i a_decode_4__n \ -cpu_est_i_3__n N_121_i cpu_est_i_1__n N_120_i a_decode_3__n AS_030.OE \ -AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE \ -AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE \ -AHIGH_31_.OE A_0_.OE BERR.OE DTACK.OE RW.OE DS_030.OE DSACK1.OE CIIN.OE G_122 \ -G_123 G_124 cpu_est_0_0_ G_97 G_95 G_101 G_103 -.names N_152_i_1.BLIF RST_c.BLIF SM_AMIGA_i_7_.D +inst_AMIGA_DS.D inst_AMIGA_DS.C inst_A0_DMA.D inst_A0_DMA.C inst_RW_000_DMA.D \ +inst_RW_000_DMA.C inst_AS_030_D0.D inst_AS_030_D0.C \ +inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AMIGA_BUS_ENABLE_DMA_LOW.C \ +inst_AS_030_D1.D inst_AS_030_D1.C inst_UDS_000_INT.D inst_UDS_000_INT.C \ +inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C CLK_OUT_INTreg.D \ +CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C \ +inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C SIZE_1_ AHIGH_31_ AS_030 AS_000 \ +RW_000 UDS_000 LDS_000 BERR RW SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ \ +AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ N_23_0 UDS_000_c N_19_i N_22_0 LDS_000_c \ +N_18_i N_21_0 size_c_0__n ipl_c_i_2__n N_43_0 size_c_1__n ipl_c_i_1__n N_42_0 \ +vcc_n_n ahigh_c_24__n ipl_c_i_0__n un5_e N_41_0 gnd_n_n ahigh_c_25__n \ +DTACK_c_i un1_amiga_bus_enable_low N_45_0 un3_as_030 ahigh_c_26__n VPA_c_i \ +un1_UDS_000_INT N_44_0 un1_LDS_000_INT ahigh_c_27__n N_13_i \ +un1_DS_000_ENABLE_0_sqmuxa N_27_0 un10_ciin ahigh_c_28__n LDS_000_INT_i \ +un21_fpu_cs un1_LDS_000_INT_0 un21_berr ahigh_c_29__n UDS_000_INT_i un2_ds_030 \ +un1_UDS_000_INT_0 ahigh_c_30__n N_96_0_1 N_96_0_2 ahigh_c_31__n N_282_0_1 \ +N_282_0_2 N_282_0_3 N_282_0_4 pos_clk_un10_sm_amiga_i_1_n un10_ciin_1 \ +un10_ciin_2 un10_ciin_3 un10_ciin_4 un10_ciin_5 un10_ciin_6 un10_ciin_7 \ +un10_ciin_8 un10_ciin_9 un10_ciin_10 un10_ciin_11 N_201_1 N_201_2 N_131_i_1 \ +N_134_0_1 N_113_i_1 N_113_i_2 N_144_1 pos_clk_ipl_n N_144_2 N_143_1 N_143_2 \ +N_163_1 N_163_2 N_163_3 un21_fpu_cs_1 a_decode_c_16__n un21_berr_1_0 \ +pos_clk_cycle_dma_5_1_1__n a_decode_c_17__n N_199_1 AS_000_DMA_1_sqmuxa_1 \ +a_decode_c_18__n N_140_1 N_66_i_1 a_decode_c_19__n N_66_i_2 N_205_i_1 \ +a_decode_c_20__n N_205_i_2 N_180_1 a_decode_c_21__n N_180_2 \ +pos_clk_un9_clk_000_pe_n N_59_i_1 a_decode_c_22__n N_127_i_1 N_123_i_1 \ +a_decode_c_23__n N_121_i_1 N_119_i_1 N_6 a_c_0__n N_117_i_1 N_115_i_1 a_c_1__n \ +N_111_i_1 N_165_1 N_13 nEXP_SPACE_c N_162_1 N_148_1 N_18 BERR_c \ +pos_clk_ipl_1_n N_19 ds_000_dma_0_un3_n N_20 BG_030_c ds_000_dma_0_un1_n \ +ds_000_dma_0_un0_n as_000_dma_0_un3_n as_000_dma_0_un1_n as_000_dma_0_un0_n \ +BGACK_000_c uds_000_int_0_un3_n uds_000_int_0_un1_n uds_000_int_0_un0_n \ +bg_000_0_un3_n bg_000_0_un1_n bg_000_0_un0_n CLK_OSZI_c lds_000_int_0_un3_n \ +lds_000_int_0_un1_n lds_000_int_0_un0_n as_030_d1_0_un3_n as_030_d1_0_un1_n \ +as_030_d1_0_un0_n FPU_SENSE_c rw_000_int_0_un3_n rw_000_int_0_un1_n \ +rw_000_int_0_un0_n as_030_000_sync_0_un3_n as_030_000_sync_0_un1_n \ +as_030_000_sync_0_un0_n bgack_030_int_0_un3_n bgack_030_int_0_un1_n \ +cpu_est_2_1__n ipl_c_0__n bgack_030_int_0_un0_n cpu_est_2_2__n \ +cpu_est_0_1__un3_n cpu_est_2_3__n ipl_c_1__n cpu_est_0_1__un1_n \ +cpu_est_0_1__un0_n ipl_c_2__n cpu_est_0_2__un3_n cpu_est_0_2__un1_n N_60 \ +cpu_est_0_2__un0_n N_63 DTACK_c cpu_est_0_3__un3_n N_126 cpu_est_0_3__un1_n \ +N_150 cpu_est_0_3__un0_n N_151 ipl_030_0_0__un3_n N_219 VPA_c \ +ipl_030_0_0__un1_n N_175 ipl_030_0_0__un0_n ipl_030_0_1__un3_n N_59 RST_c \ +ipl_030_0_1__un1_n N_68 ipl_030_0_1__un0_n N_72 ipl_030_0_2__un3_n N_80 \ +ipl_030_0_2__un1_n N_93 RW_c ipl_030_0_2__un0_n N_98 ds_000_enable_0_un3_n \ +N_107 fc_c_0__n ds_000_enable_0_un1_n N_128 ds_000_enable_0_un0_n N_131 \ +fc_c_1__n vma_int_0_un3_n N_134 vma_int_0_un1_n N_135 vma_int_0_un0_n N_141 \ +AMIGA_BUS_DATA_DIR_c a_decode_15__n N_142 N_143 a_decode_14__n N_144 N_145 \ +a_decode_13__n N_146 N_205_i N_147 N_140_i a_decode_12__n N_148 AMIGA_DS_i \ +N_149 a_decode_11__n N_154 N_199_i N_155 N_198_i a_decode_10__n N_162 N_180_i \ +N_165 N_262_i a_decode_9__n N_259 AMIGA_BUS_DATA_DIR_c_0 N_260 pos_clk_un2_i_n \ +a_decode_8__n N_181 N_3_i N_182 N_32_0 a_decode_7__n N_183 N_4_i N_184 N_31_0 \ +a_decode_6__n N_185 N_220_i N_186 BG_030_c_i a_decode_5__n N_266 \ +pos_clk_un9_bg_030_0_n N_267 N_17_i a_decode_4__n N_268 N_24_0 N_190 N_16_i \ +a_decode_3__n N_191 N_25_0 N_201 N_15_i a_decode_2__n N_202 N_26_0 N_203 \ +N_12_i N_208 N_28_0 N_163 N_11_i N_282 N_29_0 un21_berr_1 N_5_i N_132 N_30_0 \ +N_96 a_c_i_0__n N_129 size_c_i_1__n un1_SM_AMIGA_0_sqmuxa_1 \ +pos_clk_un10_sm_amiga_i_n N_169 un1_dsack1_i N_170 N_69_i N_167 N_163_i N_168 \ +N_244_0 pos_clk_rw_000_int_5_n N_164_i pos_clk_un6_bgack_000_n N_165_i N_274 \ +un11_amiga_bus_enable_high_i N_164 un10_ciin_i N_244 N_60_0 N_5 N_274_i N_11 \ +pos_clk_un6_bgack_000_0_n N_12 RW_c_i N_15 pos_clk_rw_000_int_5_0_n N_16 \ +N_168_i N_17 N_167_i pos_clk_un9_bg_030_n N_170_i N_3 N_169_i N_205 \ +AS_000_DMA_1_sqmuxa N_38_0 N_4 un1_SM_AMIGA_0_sqmuxa_1_0 N_199 N_282_0 \ +pos_clk_un2_n clk_000_d_i_3__n N_140 N_96_0 N_262 N_129_i N_198 N_268_i N_180 \ +N_246_i un1_amiga_bus_enable_low_i N_132_0 un21_fpu_cs_i AS_000_i N_142_i \ +BGACK_030_INT_i N_141_i nEXP_SPACE_i N_135_0 cycle_dma_i_0__n N_134_0 RW_000_i \ +N_131_i CLK_EXP_i LDS_000_c_i cycle_dma_i_1__n UDS_000_c_i DS_000_DMA_i \ +N_128_i AS_000_DMA_i N_107_i a_i_1__n N_203_i AMIGA_BUS_ENABLE_DMA_LOW_i \ +un1_DS_000_ENABLE_0_sqmuxa_0 a_decode_i_19__n N_201_i a_decode_i_18__n N_202_i \ +a_decode_i_16__n VMA_INT_i AMIGA_BUS_ENABLE_DMA_HIGH_i N_98_i sm_amiga_i_0__n \ +N_93_i sm_amiga_i_5__n N_82_i sm_amiga_i_6__n N_80_i sm_amiga_i_i_7__n N_72_i \ +AS_030_i N_68_i AS_000_INT_i N_59_i DSACK1_INT_i N_190_i sm_amiga_i_1__n \ +N_191_i FPU_SENSE_i AS_030_D1_i N_267_i cpu_est_i_0__n cpu_est_i_3__n N_266_i \ +VPA_D_i sm_amiga_i_3__n N_186_i sm_amiga_i_4__n cpu_est_i_1__n N_185_i \ +clk_000_d_i_0__n clk_000_d_i_1__n N_183_i AS_030_D0_i N_184_i cpu_est_i_2__n \ +DTACK_D0_i N_182_i sm_amiga_i_2__n AS_030_000_SYNC_i N_181_i ahigh_i_30__n \ +ahigh_i_31__n N_260_i ahigh_i_28__n pos_clk_size_dma_6_0_1__n ahigh_i_29__n \ +N_259_i ahigh_i_26__n pos_clk_size_dma_6_0_0__n ahigh_i_27__n N_63_0 \ +ahigh_i_24__n N_155_i ahigh_i_25__n N_162_i N_187_i un5_e_0 N_188_i N_154_i \ +N_189_i cpu_est_2_0_3__n N_149_i N_208_i cpu_est_2_0_2__n N_147_i un2_ds_030_i \ +N_148_i N_219_i cpu_est_2_0_1__n N_175_i N_146_i un3_as_030_i N_36_0 AS_030_c \ +N_145_i N_35_0 AS_000_c N_143_i N_144_i RW_000_c pos_clk_un9_clk_000_pe_0_n \ +N_20_i AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE \ +SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE \ +AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE \ +DSACK1.OE VMA.OE CIIN.OE G_105 G_106 G_107 G_91 +.names N_119_i_1.BLIF RST_c.BLIF SM_AMIGA_4_.D 11 1 -.names N_148_i_1.BLIF RST_c.BLIF SM_AMIGA_6_.D +.names N_117_i_1.BLIF RST_c.BLIF SM_AMIGA_3_.D 11 1 -.names N_146_i_1.BLIF RST_c.BLIF SM_AMIGA_5_.D +.names N_115_i_1.BLIF RST_c.BLIF SM_AMIGA_2_.D 11 1 -.names N_144_i_1.BLIF RST_c.BLIF SM_AMIGA_4_.D +.names N_113_i_1.BLIF N_113_i_2.BLIF SM_AMIGA_1_.D 11 1 -.names N_142_i_1.BLIF RST_c.BLIF SM_AMIGA_3_.D +.names N_111_i_1.BLIF RST_c.BLIF SM_AMIGA_0_.D 11 1 -.names N_140_i_1.BLIF RST_c.BLIF SM_AMIGA_2_.D +.names N_21_0.BLIF IPL_030DFF_0_reg.D +0 1 +.names N_22_0.BLIF IPL_030DFF_1_reg.D +0 1 +.names N_23_0.BLIF IPL_030DFF_2_reg.D +0 1 +.names N_41_0.BLIF IPL_D0_0_.D +0 1 +.names N_42_0.BLIF IPL_D0_1_.D +0 1 +.names N_43_0.BLIF IPL_D0_2_.D +0 1 +.names N_127_i_1.BLIF RST_c.BLIF SM_AMIGA_i_7_.D 11 1 -.names N_138_i_1.BLIF RST_c.BLIF SM_AMIGA_1_.D +.names N_123_i_1.BLIF RST_c.BLIF SM_AMIGA_6_.D 11 1 -.names N_136_i_1.BLIF RST_c.BLIF SM_AMIGA_0_.D +.names N_121_i_1.BLIF RST_c.BLIF SM_AMIGA_5_.D 11 1 +.names pos_clk_size_dma_6_0_0__n.BLIF SIZE_DMA_0_.D +0 1 +.names pos_clk_size_dma_6_0_1__n.BLIF SIZE_DMA_1_.D +0 1 +.names N_66_i_1.BLIF N_66_i_2.BLIF CYCLE_DMA_0_.D +11 1 +.names pos_clk_cycle_dma_5_1_1__n.BLIF G_91.BLIF CYCLE_DMA_1_.D +11 1 +.names N_190_i.BLIF N_191_i.BLIF cpu_est_0_.D +11 1 +.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D +1- 1 +-1 1 .names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D 1- 1 -1 1 .names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_.D 1- 1 -1 1 -.names N_27_0.BLIF IPL_030DFF_0_reg.D +.names N_151.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D 0 1 -.names N_28_0.BLIF IPL_030DFF_1_reg.D +.names N_44_0.BLIF inst_VPA_D.D 0 1 -.names N_29_0.BLIF IPL_030DFF_2_reg.D +.names N_45_0.BLIF inst_DTACK_D0.D 0 1 -.names N_49_0.BLIF IPL_D0_0_.D -0 1 -.names N_50_0.BLIF IPL_D0_1_.D -0 1 -.names N_51_0.BLIF IPL_D0_2_.D -0 1 -.names G_95.BLIF un1_rst_2.BLIF CYCLE_DMA_0_.D +.names N_6.BLIF RST_c.BLIF inst_DS_000_ENABLE.D 11 1 -.names G_97.BLIF un1_rst_2.BLIF CYCLE_DMA_1_.D +.names N_25_0.BLIF BG_000DFFreg.D +0 1 +.names N_26_0.BLIF inst_LDS_000_INT.D +0 1 +.names N_27_0.BLIF inst_VMA_INTreg.D +0 1 +.names N_28_0.BLIF inst_RW_000_INT.D +0 1 +.names N_29_0.BLIF inst_AS_030_000_SYNC.D +0 1 +.names N_30_0.BLIF inst_BGACK_030_INTreg.D +0 1 +.names N_31_0.BLIF inst_AS_000_DMA.D +0 1 +.names N_32_0.BLIF inst_DS_000_DMA.D +0 1 +.names N_167_i.BLIF N_168_i.BLIF inst_DSACK1_INT.D 11 1 -.names G_101.BLIF un1_rst_3.BLIF CLK_030_PE_0_.D +.names N_169_i.BLIF N_170_i.BLIF inst_AS_000_INT.D 11 1 -.names G_103.BLIF un1_rst_3.BLIF CLK_030_PE_1_.D -11 1 -.names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D +.names N_35_0.BLIF inst_AMIGA_DS.D +0 1 +.names N_36_0.BLIF inst_A0_DMA.D +0 1 +.names N_126.BLIF inst_RW_000_DMA.D +0 1 +.names N_38_0.BLIF inst_AS_030_D0.D +0 1 +.names N_150.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D +0 1 +.names as_030_d1_0_un1_n.BLIF as_030_d1_0_un0_n.BLIF inst_AS_030_D1.D 1- 1 -1 1 -.names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D -1- 1 --1 1 -.names cpu_est_0_0_.BLIF cpu_est_0_.D +.names N_24_0.BLIF inst_UDS_000_INT.D 0 1 -.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D -1- 1 --1 1 -.names N_267_i_1.BLIF RST_c.BLIF RST_DLY_0_.D -11 1 -.names N_266_i_1.BLIF N_266_i_2.BLIF RST_DLY_1_.D -11 1 -.names N_265_i_1.BLIF N_265_2_0.BLIF RST_DLY_2_.D -11 1 -.names N_43_0.BLIF inst_DS_000_DMA.D -0 1 -.names N_120_i.BLIF N_121_i.BLIF inst_DSACK1_INT.D -11 1 -.names N_118_i.BLIF N_119_i.BLIF inst_AS_000_INT.D -11 1 -.names N_46_0.BLIF inst_AMIGA_DS.D -0 1 -.names N_274.BLIF inst_AS_030_D0.D -0 1 -.names N_48_0.BLIF inst_DTACK_D0.D -0 1 -.names N_52_0.BLIF inst_VPA_D.D -0 1 -.names N_53_0.BLIF inst_RESET_OUT.D -0 1 -.names N_8.BLIF RST_c.BLIF inst_DS_000_ENABLE.D -11 1 -.names N_30_0.BLIF BG_000DFFreg.D -0 1 -.names N_31_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D -0 1 -.names N_32_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D -0 1 -.names N_33_0.BLIF inst_UDS_000_INT.D -0 1 -.names N_34_0.BLIF inst_A0_DMA.D -0 1 -.names N_35_0.BLIF inst_RW_000_DMA.D -0 1 -.names N_36_0.BLIF inst_VMA_INTreg.D -0 1 -.names N_38_0.BLIF inst_RW_000_INT.D -0 1 -.names N_39_0.BLIF inst_AS_030_000_SYNC.D -0 1 -.names N_40_0.BLIF inst_LDS_000_INT.D -0 1 -.names N_41_0.BLIF inst_BGACK_030_INTreg.D -0 1 -.names N_42_0.BLIF inst_AS_000_DMA.D -0 1 -.names un1_rst_2_1.BLIF inst_BGACK_030_INT_D.D +.names N_220_i.BLIF inst_BGACK_030_INT_D.D 0 1 .names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D 0 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_1__n -0 1 -.names inst_VPA_D.BLIF VPA_D_i -0 1 -.names N_125.BLIF N_125_i -0 1 -.names inst_VMA_INTreg.BLIF VMA_INT_i -0 1 -.names N_124.BLIF N_124_i -0 1 -.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n -0 1 -.names N_124_i.BLIF N_125_i.BLIF N_53_0 +.names N_20_i.BLIF RST_c.BLIF N_23_0 11 1 -.names RST_DLY_2_.BLIF rst_dly_i_2__n +.names N_19.BLIF N_19_i 0 1 -.names N_134.BLIF N_134_i -0 1 -.names RST_DLY_1_.BLIF rst_dly_i_1__n -0 1 -.names N_134_i.BLIF RST_c.BLIF N_270_0 +.names N_19_i.BLIF RST_c.BLIF N_22_0 11 1 -.names RST_DLY_0_.BLIF rst_dly_i_0__n +.names N_18.BLIF N_18_i 0 1 -.names RST_DLY_0_.BLIF RST_DLY_1_.BLIF N_77_i +.names N_18_i.BLIF RST_c.BLIF N_21_0 11 1 -.names inst_DSACK1_INT.BLIF DSACK1_INT_i +.names ipl_c_2__n.BLIF ipl_c_i_2__n 0 1 -.names N_76_i.BLIF SM_AMIGA_1_.BLIF N_87_i +.names ipl_c_i_2__n.BLIF RST_c.BLIF N_43_0 11 1 -.names N_137.BLIF N_137_i_0 -0 1 -.names N_112.BLIF N_112_i +.names ipl_c_1__n.BLIF ipl_c_i_1__n 0 1 +.names ipl_c_i_1__n.BLIF RST_c.BLIF N_42_0 +11 1 .names vcc_n_n 1 -.names inst_DTACK_D0.BLIF DTACK_D0_i +.names ipl_c_0__n.BLIF ipl_c_i_0__n 0 1 -.names N_113.BLIF N_113_i -0 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i -0 1 -.names N_114.BLIF N_114_i +.names un5_e_0.BLIF un5_e 0 1 +.names ipl_c_i_0__n.BLIF RST_c.BLIF N_41_0 +11 1 .names gnd_n_n -.names nEXP_SPACE_c.BLIF nEXP_SPACE_i +.names DTACK_c.BLIF DTACK_c_i 0 1 .names AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF BGACK_030_INT_i.BLIF \ un1_amiga_bus_enable_low 11 1 -.names inst_AS_000_DMA.BLIF AS_000_DMA_i -0 1 -.names N_109.BLIF N_109_i -0 1 -.names AS_000_DMA_i.BLIF AS_000_i.BLIF un7_as_030 +.names DTACK_c_i.BLIF RST_c.BLIF N_45_0 11 1 -.names RW_000_c.BLIF RW_000_i -0 1 -.names N_108.BLIF N_108_i -0 1 -.names un1_LDS_000_INT_0.BLIF un1_LDS_000_INT -0 1 -.names CLK_030_PE_1_.BLIF clk_030_pe_i_1__n -0 1 -.names N_111.BLIF N_111_i +.names AS_000_DMA_i.BLIF AS_000_i.BLIF un3_as_030 +11 1 +.names VPA_c.BLIF VPA_c_i 0 1 .names un1_UDS_000_INT_0.BLIF un1_UDS_000_INT 0 1 -.names DS_000_DMA_0_sqmuxa.BLIF DS_000_DMA_0_sqmuxa_i -0 1 -.names N_111_i.BLIF RST_c.BLIF N_265_2_0 +.names RST_c.BLIF VPA_c_i.BLIF N_44_0 11 1 -.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 +.names un1_LDS_000_INT_0.BLIF un1_LDS_000_INT 0 1 -.names pos_clk_un4_rw_000_n.BLIF pos_clk_un4_rw_000_i_n +.names N_13.BLIF N_13_i 0 1 +.names un1_DS_000_ENABLE_0_sqmuxa_0.BLIF un1_DS_000_ENABLE_0_sqmuxa +0 1 +.names N_13_i.BLIF RST_c.BLIF N_27_0 +11 1 .names un10_ciin_10.BLIF un10_ciin_11.BLIF un10_ciin 11 1 -.names AS_000_c.BLIF AS_000_i +.names inst_LDS_000_INT.BLIF LDS_000_INT_i 0 1 -.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF un1_as_000_i +.names un21_fpu_cs_1.BLIF N_282_0.BLIF un21_fpu_cs 11 1 -.names un21_fpu_cs_1.BLIF FPU_SENSE_i.BLIF un21_fpu_cs +.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un1_LDS_000_INT_0 11 1 -.names inst_AMIGA_DS.BLIF AMIGA_DS_i -0 1 -.names VPA_c.BLIF VPA_c_i -0 1 -.names un21_berr_1.BLIF FPU_SENSE_c.BLIF un21_berr +.names un21_berr_1_0.BLIF N_282_0.BLIF un21_berr 11 1 -.names pos_clk_un3_clk_out_int_n.BLIF pos_clk_un3_clk_out_int_i_n +.names inst_UDS_000_INT.BLIF UDS_000_INT_i 0 1 -.names RST_c.BLIF VPA_c_i.BLIF N_52_0 +.names AS_000_i.BLIF DS_000_DMA_i.BLIF un2_ds_030 11 1 -.names AS_000_i.BLIF DS_000_DMA_i.BLIF un6_ds_030 +.names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un1_UDS_000_INT_0 11 1 -.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n -0 1 -.names DTACK_c.BLIF DTACK_c_i -0 1 -.names nEXP_SPACE_i.BLIF un10_ciin_i.BLIF un13_ciin +.names AS_030_000_SYNC_i.BLIF CLK_000_D_4_.BLIF N_96_0_1 11 1 -.names CYCLE_DMA_1_.BLIF cycle_dma_i_1__n -0 1 -.names DTACK_c_i.BLIF RST_c.BLIF N_48_0 +.names clk_000_d_i_3__n.BLIF nEXP_SPACE_c.BLIF N_96_0_2 11 1 -.names pos_clk_as_000_dma6_n.BLIF pos_clk_as_000_dma6_i_n -0 1 -.names N_276.BLIF RESET_c.BLIF un3_ahigh_i +.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_282_0_1 11 1 -.names inst_DS_000_DMA.BLIF DS_000_DMA_i -0 1 -.names pos_clk_un4_bgack_000_n.BLIF pos_clk_un4_bgack_000_i_n -0 1 -.names CLK_OUT_INTreg.BLIF CLK_EXP_i -0 1 -.names BGACK_000_c.BLIF pos_clk_un4_bgack_000_i_n.BLIF \ -pos_clk_un6_bgack_000_0_n +.names a_decode_c_17__n.BLIF a_decode_i_16__n.BLIF N_282_0_2 11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i -0 1 -.names N_7.BLIF N_7_i -0 1 -.names ahigh_c_25__n.BLIF ahigh_i_25__n -0 1 -.names N_7_i.BLIF RST_c.BLIF N_41_0 +.names a_decode_i_18__n.BLIF a_decode_i_19__n.BLIF N_282_0_3 11 1 -.names ahigh_c_24__n.BLIF ahigh_i_24__n -0 1 -.names RW_000_i.BLIF pos_clk_un15_bgack_030_int_i_n.BLIF \ -pos_clk_un1_bgack_030_int_0_n -11 1 -.names ahigh_c_27__n.BLIF ahigh_i_27__n -0 1 -.names CLK_030_PE_0_.BLIF CLK_030_PE_1_.BLIF pos_clk_un12_clk_out_int_0_n -11 1 -.names ahigh_c_26__n.BLIF ahigh_i_26__n -0 1 -.names cycle_dma_i_0__n.BLIF cycle_dma_i_1__n.BLIF pos_clk_un3_0_n -11 1 -.names ahigh_c_29__n.BLIF ahigh_i_29__n -0 1 -.names CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF pos_clk_un15_bgack_030_int_i_n -11 1 -.names ahigh_c_28__n.BLIF ahigh_i_28__n -0 1 -.names N_3.BLIF N_3_i -0 1 -.names ahigh_c_31__n.BLIF ahigh_i_31__n -0 1 -.names N_3_i.BLIF RST_c.BLIF N_43_0 -11 1 -.names ahigh_c_30__n.BLIF ahigh_i_30__n -0 1 -.names N_4.BLIF N_4_i -0 1 -.names a_c_1__n.BLIF a_i_1__n -0 1 -.names N_4_i.BLIF RST_c.BLIF N_42_0 -11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i -0 1 -.names un6_amiga_bus_data_dir.BLIF un6_amiga_bus_data_dir_i -0 1 -.names inst_AS_030_D0.BLIF AS_030_D0_i -0 1 -.names un12_amiga_bus_data_dir_m.BLIF un12_amiga_bus_data_dir_m_i -0 1 -.names un10_ciin.BLIF un10_ciin_i -0 1 -.names un6_amiga_bus_data_dir_i.BLIF un12_amiga_bus_data_dir_m_i.BLIF \ -AMIGA_BUS_DATA_DIR_c_0 -11 1 -.names FPU_SENSE_c.BLIF FPU_SENSE_i -0 1 -.names N_22.BLIF N_22_i -0 1 -.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i -0 1 -.names N_22_i.BLIF RST_c.BLIF N_31_0 -11 1 -.names a_decode_c_16__n.BLIF a_decode_i_16__n -0 1 -.names N_21.BLIF N_21_i -0 1 -.names a_decode_c_18__n.BLIF a_decode_i_18__n -0 1 -.names N_21_i.BLIF RST_c.BLIF N_32_0 -11 1 -.names a_decode_c_19__n.BLIF a_decode_i_19__n -0 1 -.names N_19.BLIF N_19_i -0 1 -.names G_122.BLIF N_224_i -0 1 -.names N_19_i.BLIF RST_c.BLIF N_34_0 -11 1 -.names G_123.BLIF N_225_i -0 1 -.names N_18.BLIF N_18_i -0 1 -.names G_124.BLIF N_226_i -0 1 -.names N_18_i.BLIF RST_c.BLIF N_35_0 -11 1 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -pos_clk_un5_bgack_030_int_d_i_n -11 1 -.names a_i_1__n.BLIF BGACK_030_INT_i.BLIF \ -pos_clk_amiga_bus_enable_dma_high_3_0_n -11 1 -.names pos_clk_un6_bg_030_1_n.BLIF CLK_000_D_0_.BLIF pos_clk_un6_bg_030_n -11 1 -.names a_c_1__n.BLIF BGACK_030_INT_i.BLIF \ -pos_clk_amiga_bus_enable_dma_low_3_0_n -11 1 -.names pos_clk_ipl_1_n.BLIF N_225_i.BLIF pos_clk_ipl_n -11 1 -.names BGACK_030_INT_i.BLIF RW_000_i.BLIF pos_clk_rw_000_dma_3_0_n -11 1 -.names un13_ciin.BLIF un13_ciin_i -0 1 -.names UDS_000_c.BLIF UDS_000_c_i -0 1 -.names un6_ds_030.BLIF un6_ds_030_i -0 1 -.names LDS_000_c.BLIF LDS_000_c_i -0 1 -.names N_123.BLIF N_123_i -0 1 -.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_86_i -11 1 -.names N_122.BLIF N_122_i -0 1 -.names N_129.BLIF N_129_i -0 1 -.names un7_as_030.BLIF un7_as_030_i -0 1 -.names N_130.BLIF N_130_i -0 1 -.names N_129_i.BLIF N_130_i.BLIF un11_amiga_bus_enable_high_i -11 1 -.names N_117.BLIF N_117_i -0 1 -.names N_117_i.BLIF RST_c.BLIF N_46_0 -11 1 -.names N_107.BLIF N_107_i -0 1 -.names N_107_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n -11 1 -.names N_106.BLIF N_106_i -0 1 -.names N_106_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n -11 1 -.names N_16.BLIF N_16_i -0 1 -.names N_254.BLIF N_254_i -0 1 -.names N_263.BLIF N_263_i -0 1 -.names N_250_i_1.BLIF N_263_i.BLIF N_250_i -11 1 -.names N_256.BLIF N_256_i -0 1 -.names N_189_i_1.BLIF N_263_i.BLIF N_189_i -11 1 -.names pos_clk_rw_000_int_5_0_n.BLIF pos_clk_rw_000_int_5_n -0 1 -.names N_101.BLIF N_101_i -0 1 -.names N_103.BLIF N_103_i -0 1 -.names N_104.BLIF N_104_i -0 1 -.names N_105.BLIF N_105_i -0 1 -.names N_115.BLIF N_115_i -0 1 -.names N_116.BLIF N_116_i -0 1 -.names N_131.BLIF N_131_i -0 1 -.names N_277.BLIF N_277_i -0 1 -.names N_131_i.BLIF N_277_i.BLIF N_64_0 -11 1 -.names N_91_0_3.BLIF nEXP_SPACE_c.BLIF N_91_0 -11 1 -.names N_104_i.BLIF SM_AMIGA_i_7_.BLIF N_159_0 -11 1 -.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_14 -1- 1 --1 1 -.names N_85_i_1.BLIF N_85_i_2.BLIF N_85_i -11 1 -.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_15 -1- 1 --1 1 -.names N_79.BLIF N_159_0.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 -11 1 -.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_24 -1- 1 --1 1 -.names RW_c.BLIF RW_c_i -0 1 -.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF N_25 -1- 1 --1 1 -.names N_159_0.BLIF RW_c_i.BLIF pos_clk_rw_000_int_5_0_n -11 1 -.names CLK_000_D_3_.BLIF clk_000_d_i_3__n -0 1 -.names N_25.BLIF N_25_i -0 1 -.names N_25_i.BLIF RST_c.BLIF N_28_0 -11 1 -.names N_24.BLIF N_24_i -0 1 -.names N_24_i.BLIF RST_c.BLIF N_27_0 -11 1 -.names ipl_c_1__n.BLIF ipl_c_i_1__n -0 1 -.names ipl_c_i_1__n.BLIF RST_c.BLIF N_50_0 -11 1 -.names ipl_c_0__n.BLIF ipl_c_i_0__n -0 1 -.names ipl_c_i_0__n.BLIF RST_c.BLIF N_49_0 -11 1 -.names N_14.BLIF N_14_i -0 1 -.names N_14_i.BLIF RST_c.BLIF N_39_0 -11 1 -.names N_15.BLIF N_15_i -0 1 -.names N_15_i.BLIF RST_c.BLIF N_38_0 -11 1 -.names inst_BGACK_030_INT_D.BLIF inst_BGACK_030_INTreg.BLIF N_91_0_1 -11 1 -.names AS_030_D0_i.BLIF sm_amiga_i_i_7__n.BLIF N_91_0_2 -11 1 -.names N_91_0_1.BLIF N_91_0_2.BLIF N_91_0_3 -11 1 -.names N_108_i.BLIF N_109_i.BLIF N_265_i_1 -11 1 -.names N_112_i.BLIF RST_c.BLIF N_266_i_1 -11 1 -.names N_113_i.BLIF N_114_i.BLIF N_266_i_2 -11 1 -.names N_164_i.BLIF N_264.BLIF N_138_i_1 -11 1 -.names N_79.BLIF N_170_i.BLIF N_148_i_1 -11 1 -.names N_78.BLIF N_168_i.BLIF N_144_i_1 -11 1 -.names N_166_i.BLIF N_167_i.BLIF N_142_i_1 -11 1 -.names N_165_i.BLIF N_264_i.BLIF N_140_i_1 +.names N_282_0_1.BLIF N_282_0_2.BLIF N_282_0_4 11 1 .names size_c_0__n.BLIF a_c_i_0__n.BLIF pos_clk_un10_sm_amiga_i_1_n 11 1 -.names N_76_i.BLIF N_76 -0 1 -.names AS_030_000_SYNC_i.BLIF nEXP_SPACE_c.BLIF N_85_i_1 -11 1 -.names CLK_000_D_4_.BLIF clk_000_d_i_3__n.BLIF N_85_i_2 -11 1 -.names AS_030_i.BLIF a_decode_c_17__n.BLIF N_277_1 -11 1 -.names a_decode_i_16__n.BLIF a_decode_i_18__n.BLIF N_277_2 -11 1 -.names BGACK_030_INT_i.BLIF RST_c.BLIF un1_rst_2_1 -11 1 -.names fc_c_1__n.BLIF a_decode_i_19__n.BLIF N_277_3 -11 1 -.names N_277_1.BLIF N_277_2.BLIF N_277_4 -11 1 -.names N_64_0.BLIF N_64 -0 1 -.names N_277_3.BLIF fc_c_0__n.BLIF N_277_5 -11 1 -.names AS_000_INT_i.BLIF AS_030_i.BLIF N_122 -11 1 .names ahigh_i_24__n.BLIF ahigh_i_25__n.BLIF un10_ciin_1 11 1 -.names AS_030_i.BLIF DSACK1_INT_i.BLIF N_123 -11 1 .names ahigh_i_26__n.BLIF ahigh_i_27__n.BLIF un10_ciin_2 11 1 -.names N_276.BLIF inst_RESET_OUT.BLIF N_132 -11 1 .names ahigh_i_28__n.BLIF ahigh_i_29__n.BLIF un10_ciin_3 11 1 -.names BGACK_030_INT_i.BLIF inst_RESET_OUT.BLIF N_133 -11 1 .names ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF un10_ciin_4 11 1 -.names AS_030_i.BLIF RST_c.BLIF N_274 -11 1 .names a_decode_c_23__n.BLIF AS_030_D0_i.BLIF un10_ciin_5 11 1 -.names BGACK_030_INT_i.BLIF nEXP_SPACE_i.BLIF N_276 -11 1 .names a_decode_c_20__n.BLIF a_decode_c_21__n.BLIF un10_ciin_6 11 1 -.names N_77_i.BLIF N_77 -0 1 .names un10_ciin_1.BLIF un10_ciin_2.BLIF un10_ciin_7 11 1 -.names N_79_i.BLIF N_79 -0 1 .names un10_ciin_3.BLIF un10_ciin_4.BLIF un10_ciin_8 11 1 -.names N_78_i.BLIF N_78 -0 1 .names un10_ciin_5.BLIF un10_ciin_6.BLIF un10_ciin_9 11 1 -.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_263 -11 1 .names un10_ciin_7.BLIF un10_ciin_8.BLIF un10_ciin_10 11 1 -.names N_108_1.BLIF rst_dly_i_2__n.BLIF N_108 -11 1 .names un10_ciin_9.BLIF a_decode_c_22__n.BLIF un10_ciin_11 11 1 -.names N_114_1.BLIF rst_dly_i_1__n.BLIF N_114 +.names N_80_i.BLIF N_82_i.BLIF N_201_1 11 1 -.names AS_000_i.BLIF BGACK_030_INT_i.BLIF un6_amiga_bus_data_dir_1 +.names VMA_INT_i.BLIF VPA_D_i.BLIF N_201_2 11 1 -.names N_85_i.BLIF N_85 +.names BERR_c.BLIF N_201_i.BLIF N_131_i_1 +11 1 +.names N_68_i.BLIF N_131.BLIF N_134_0_1 +11 1 +.names N_68.BLIF N_141_i.BLIF N_113_i_1 +11 1 +.names N_142_i.BLIF RST_c.BLIF N_113_i_2 +11 1 +.names N_68_i.BLIF N_208.BLIF N_144_1 +11 1 +.names pos_clk_ipl_1_n.BLIF N_188_i.BLIF pos_clk_ipl_n +11 1 +.names VPA_D_i.BLIF cpu_est_i_3__n.BLIF N_144_2 +11 1 +.names N_72_i.BLIF N_82_i.BLIF N_143_1 +11 1 +.names cpu_est_i_0__n.BLIF cpu_est_i_3__n.BLIF N_143_2 +11 1 +.names AS_030_D1_i.BLIF inst_BGACK_030_INT_D.BLIF N_163_1 +11 1 +.names N_282.BLIF sm_amiga_i_i_7__n.BLIF N_163_2 +11 1 +.names N_163_1.BLIF N_163_2.BLIF N_163_3 +11 1 +.names un21_berr_1.BLIF FPU_SENSE_i.BLIF un21_fpu_cs_1 +11 1 +.names un21_berr_1.BLIF FPU_SENSE_c.BLIF un21_berr_1_0 +11 1 +.names AS_000_i.BLIF N_220_i.BLIF pos_clk_cycle_dma_5_1_1__n +11 1 +.names N_68_i.BLIF CYCLE_DMA_0_.BLIF N_199_1 +11 1 +.names CLK_EXP_i.BLIF inst_CLK_OUT_PRE_D.BLIF AS_000_DMA_1_sqmuxa_1 +11 1 +.names CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF N_140_1 +11 1 +.names AS_000_i.BLIF N_198_i.BLIF N_66_i_1 +11 1 +.names N_199_i.BLIF N_220_i.BLIF N_66_i_2 +11 1 +.names AMIGA_DS_i.BLIF AS_000_i.BLIF N_205_i_1 +11 1 +.names N_140_i.BLIF pos_clk_un2_n.BLIF N_205_i_2 +11 1 +.names AS_000_i.BLIF BGACK_030_INT_i.BLIF N_180_1 +11 1 +.names RW_000_c.BLIF nEXP_SPACE_i.BLIF N_180_2 +11 1 +.names pos_clk_un9_clk_000_pe_0_n.BLIF pos_clk_un9_clk_000_pe_n 0 1 -.names RW_000_c.BLIF nEXP_SPACE_i.BLIF un6_amiga_bus_data_dir_2 +.names inst_AS_030_D0.BLIF CLK_000_D_0_.BLIF N_59_i_1 11 1 -.names N_78_i.BLIF SM_AMIGA_0_.BLIF N_104 +.names N_267_i.BLIF N_268_i.BLIF N_127_i_1 11 1 -.names AMIGA_DS_i.BLIF AS_000_i.BLIF pos_clk_as_000_dma6_1_n +.names N_93.BLIF N_266_i.BLIF N_123_i_1 11 1 -.names N_91_0.BLIF N_91 -0 1 -.names pos_clk_un1_bgack_030_int_n.BLIF pos_clk_un3_n.BLIF \ -pos_clk_as_000_dma6_2_n +.names N_68.BLIF N_186_i.BLIF N_121_i_1 11 1 -.names AS_030_i.BLIF N_91.BLIF N_131 +.names N_72.BLIF N_185_i.BLIF N_119_i_1 11 1 -.names DS_000_DMA_0_sqmuxa_i.BLIF pos_clk_as_000_dma6_n.BLIF \ -DS_000_DMA_1_sqmuxa_1 -11 1 -.names N_277_4.BLIF N_277_5.BLIF N_277 -11 1 -.names CLK_030_PE_0_.BLIF clk_030_pe_i_1__n.BLIF pos_clk_un4_rw_000_1_n -11 1 -.names N_130_1.BLIF AS_030_i.BLIF N_130 -11 1 -.names CLK_030_c.BLIF RW_000_i.BLIF pos_clk_un4_rw_000_2_n -11 1 -.names N_270.BLIF RST_DLY_0_.BLIF N_115 -11 1 -.names pos_clk_un12_clk_out_int_n.BLIF AS_000_DMA_i.BLIF \ -pos_clk_un13_clk_out_int_1_n -11 1 -.names N_116_1.BLIF RST_c.BLIF N_116 -11 1 -.names N_76_i.BLIF N_137.BLIF N_125_1 -11 1 -.names N_79.BLIF sm_amiga_i_5__n.BLIF N_105 -11 1 -.names N_76.BLIF rst_dly_i_0__n.BLIF N_116_1 -11 1 -.names N_85.BLIF sm_amiga_i_i_7__n.BLIF N_103 -11 1 -.names cpu_est_i_2__n.BLIF VMA_INT_i.BLIF pos_clk_un29_clk_000_ne_1_1_n -11 1 -.names N_87.BLIF sm_amiga_i_0__n.BLIF N_101 -11 1 -.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF pos_clk_un29_clk_000_ne_1_2_n -11 1 -.names N_259_1.BLIF cpu_est_i_3__n.BLIF N_259 -11 1 -.names pos_clk_un29_clk_000_ne_1_1_n.BLIF pos_clk_un29_clk_000_ne_1_2_n.BLIF \ -pos_clk_un29_clk_000_ne_1_3_n -11 1 -.names N_251.BLIF cpu_est_2_.BLIF N_255 -11 1 -.names N_78_i.BLIF N_263.BLIF N_261_1 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_2__n.BLIF N_256 -11 1 -.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_261_2 -11 1 -.names N_252.BLIF cpu_est_2_.BLIF N_254 -11 1 -.names N_76_i.BLIF N_251_i.BLIF N_262_1 -11 1 -.names cpu_est_1_.BLIF cpu_est_i_2__n.BLIF N_16 -11 1 -.names N_263.BLIF VPA_D_i.BLIF N_262_2 -11 1 -.names BGACK_030_INT_i.BLIF N_86_i.BLIF N_106 -11 1 -.names N_78_i.BLIF RW_c.BLIF DS_000_ENABLE_0_sqmuxa_1_1 -11 1 -.names N_86_i.BLIF N_86 -0 1 -.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_259_1 -11 1 -.names BGACK_030_INT_i.BLIF N_86.BLIF N_107 -11 1 -.names N_16_i.BLIF N_254_i.BLIF N_250_i_1 -11 1 -.names LDS_000_c.BLIF UDS_000_c.BLIF N_117 -11 1 -.names N_255_i.BLIF N_256_i.BLIF N_189_i_1 -11 1 -.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF pos_clk_a0_dma_3_n -11 1 -.names nEXP_SPACE_c.BLIF inst_AS_030_D0.BLIF pos_clk_un6_bg_030_1_n -11 1 -.names AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF BGACK_030_INT_i.BLIF N_129 -11 1 -.names N_77.BLIF N_228_i.BLIF N_108_1 -11 1 -.names pos_clk_size_dma_6_0_1__n.BLIF pos_clk_size_dma_6_1__n -0 1 -.names N_228_i.BLIF rst_dly_i_0__n.BLIF N_114_1 -11 1 -.names pos_clk_size_dma_6_0_0__n.BLIF pos_clk_size_dma_6_0__n -0 1 -.names N_277.BLIF BGACK_000_c.BLIF un21_berr_1 -11 1 -.names pos_clk_rw_000_dma_3_0_n.BLIF pos_clk_rw_000_dma_3_n -0 1 -.names N_277.BLIF BGACK_000_c.BLIF un21_fpu_cs_1 -11 1 -.names pos_clk_amiga_bus_enable_dma_low_3_0_n.BLIF \ -pos_clk_amiga_bus_enable_dma_low_3_n -0 1 -.names inst_BGACK_030_INTreg.BLIF AS_030_000_SYNC_i.BLIF N_130_1 -11 1 -.names pos_clk_amiga_bus_enable_dma_high_3_0_n.BLIF \ -pos_clk_amiga_bus_enable_dma_high_3_n -0 1 -.names N_78.BLIF N_101_i.BLIF N_136_i_1 -11 1 -.names RST_c.BLIF pos_clk_un5_bgack_030_int_d_i_n.BLIF SIZE_DMA_3_sqmuxa -11 1 -.names N_103_i.BLIF N_104_i.BLIF N_152_i_1 -11 1 -.names pos_clk_un5_bgack_030_int_d_i_n.BLIF pos_clk_un5_bgack_030_int_d_n -0 1 -.names N_76.BLIF N_105_i.BLIF N_146_i_1 -11 1 -.names rw_000_dma_0_un1_n.BLIF rw_000_dma_0_un0_n.BLIF N_18 +.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_6 1- 1 -1 1 -.names N_115_i.BLIF N_116_i.BLIF N_267_i_1 +.names N_183_i.BLIF N_184_i.BLIF N_117_i_1 11 1 -.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF N_19 +.names N_72.BLIF N_182_i.BLIF N_115_i_1 +11 1 +.names N_72.BLIF N_181_i.BLIF N_111_i_1 +11 1 +.names inst_BGACK_030_INTreg.BLIF AS_030_000_SYNC_i.BLIF N_165_1 +11 1 +.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_13 1- 1 -1 1 -.names N_226_i.BLIF N_224_i.BLIF pos_clk_ipl_1_n +.names cpu_est_1_.BLIF cpu_est_2_.BLIF N_162_1 11 1 -.names amiga_bus_enable_dma_low_0_un1_n.BLIF \ -amiga_bus_enable_dma_low_0_un0_n.BLIF N_21 +.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_148_1 +11 1 +.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_18 1- 1 -1 1 -.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n +.names N_189_i.BLIF N_187_i.BLIF pos_clk_ipl_1_n +11 1 +.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF N_19 +1- 1 +-1 1 +.names AS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un3_n 0 1 -.names amiga_bus_enable_dma_high_0_un1_n.BLIF \ -amiga_bus_enable_dma_high_0_un0_n.BLIF N_22 +.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_20 1- 1 -1 1 -.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n +.names inst_DS_000_DMA.BLIF AS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un1_n 11 1 -.names un6_amiga_bus_data_dir_1.BLIF un6_amiga_bus_data_dir_2.BLIF \ -un6_amiga_bus_data_dir +.names N_205.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n 11 1 -.names BG_000DFFreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +.names AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un3_n +0 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un1_n 11 1 -.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF un12_amiga_bus_data_dir_m +.names N_205.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n 11 1 .names SM_AMIGA_6_.BLIF uds_000_int_0_un3_n 0 1 -.names CLK_EXP_i.BLIF inst_CLK_OUT_PRE_D.BLIF pos_clk_un3_clk_out_int_n -11 1 .names a_c_0__n.BLIF SM_AMIGA_6_.BLIF uds_000_int_0_un1_n 11 1 -.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF N_3 -1- 1 --1 1 .names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n 11 1 -.names pos_clk_as_000_dma6_1_n.BLIF pos_clk_as_000_dma6_2_n.BLIF \ -pos_clk_as_000_dma6_n +.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n +0 1 +.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n +11 1 +.names BG_000DFFreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n 11 1 .names SM_AMIGA_6_.BLIF lds_000_int_0_un3_n 0 1 -.names DS_000_DMA_1_sqmuxa_1.BLIF pos_clk_un4_rw_000_i_n.BLIF \ -DS_000_DMA_1_sqmuxa -11 1 .names pos_clk_un10_sm_amiga_i_n.BLIF SM_AMIGA_6_.BLIF lds_000_int_0_un1_n 11 1 -.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF N_4 -1- 1 --1 1 .names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n 11 1 -.names pos_clk_as_000_dma6_n.BLIF pos_clk_un3_clk_out_int_n.BLIF \ -AS_000_DMA_1_sqmuxa -11 1 -.names DS_000_ENABLE_1_sqmuxa.BLIF ds_000_enable_0_un3_n +.names RST_c.BLIF as_030_d1_0_un3_n 0 1 -.names AS_000_i.BLIF un1_rst_2_1.BLIF un1_rst_2 +.names inst_AS_030_D0.BLIF RST_c.BLIF as_030_d1_0_un1_n 11 1 -.names inst_DS_000_ENABLE.BLIF DS_000_ENABLE_1_sqmuxa.BLIF \ -ds_000_enable_0_un1_n +.names inst_AS_030_D1.BLIF as_030_d1_0_un3_n.BLIF as_030_d1_0_un0_n 11 1 -.names un1_DS_000_ENABLE_0_sqmuxa.BLIF ds_000_enable_0_un3_n.BLIF \ -ds_000_enable_0_un0_n -11 1 -.names CYCLE_DMA_0_.BLIF pos_clk_un13_bgack_030_int_n.BLIF N_199 -11 1 -.names pos_clk_ipl_n.BLIF ipl_030_0_2__un3_n +.names un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un3_n 0 1 -.names N_76_i.BLIF pos_clk_un15_bgack_030_int_n.BLIF \ -pos_clk_un13_bgack_030_int_n +.names pos_clk_rw_000_int_5_n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF \ +rw_000_int_0_un1_n 11 1 -.names ipl_c_2__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_2__un1_n +.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n 11 1 -.names CLK_030_PE_0_.BLIF pos_clk_un13_clk_out_int_n.BLIF N_205 -11 1 -.names IPL_030DFF_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n -11 1 -.names pos_clk_un13_clk_out_int_1_n.BLIF pos_clk_un3_clk_out_int_n.BLIF \ -pos_clk_un13_clk_out_int_n -11 1 -.names pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un3_n +.names N_244.BLIF as_030_000_sync_0_un3_n 0 1 -.names pos_clk_un15_bgack_030_int_i_n.BLIF pos_clk_un15_bgack_030_int_n -0 1 -.names cpu_est_i_1__n.BLIF pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un1_n +.names AS_030_c.BLIF N_244.BLIF as_030_000_sync_0_un1_n 11 1 -.names pos_clk_un3_0_n.BLIF pos_clk_un3_n -0 1 -.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n -11 1 -.names pos_clk_un12_clk_out_int_0_n.BLIF pos_clk_un12_clk_out_int_n -0 1 -.names N_76.BLIF cpu_est_0_1__un3_n -0 1 -.names pos_clk_un1_bgack_030_int_0_n.BLIF pos_clk_un1_bgack_030_int_n -0 1 -.names cpu_est_1_.BLIF N_76.BLIF cpu_est_0_1__un1_n -11 1 -.names RW_000_c.BLIF pos_clk_un3_clk_out_int_i_n.BLIF DS_000_DMA_0_sqmuxa -11 1 -.names cpu_est_2_1__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n -11 1 -.names RST_c.BLIF pos_clk_as_000_dma6_n.BLIF un1_rst_3 -11 1 -.names N_76.BLIF cpu_est_0_2__un3_n -0 1 -.names cpu_est_2_.BLIF N_76.BLIF cpu_est_0_2__un1_n -11 1 -.names cpu_est_2_2__n.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n -11 1 -.names N_76.BLIF cpu_est_0_3__un3_n -0 1 -.names pos_clk_un4_rw_000_1_n.BLIF pos_clk_un4_rw_000_2_n.BLIF \ -pos_clk_un4_rw_000_n -11 1 -.names cpu_est_3_.BLIF N_76.BLIF cpu_est_0_3__un1_n -11 1 -.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_7 -1- 1 --1 1 -.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c -0 1 -.names N_189_i.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n -11 1 -.names pos_clk_un6_bgack_000_0_n.BLIF pos_clk_un6_bgack_000_n -0 1 -.names inst_VPA_D.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un3_n -0 1 -.names AS_000_c.BLIF N_76_i.BLIF pos_clk_un4_bgack_000_n -11 1 -.names DTACK_D0_i.BLIF inst_VPA_D.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un1_n -11 1 -.names N_265_2_0.BLIF N_265_2 -0 1 -.names pos_clk_un29_clk_000_ne_1_n.BLIF \ -pos_clk_un31_clk_000_ne_1_i_m2_un3_n.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un0_n -11 1 -.names N_76.BLIF rst_dly_i_2__n.BLIF N_111 +.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ +as_030_000_sync_0_un0_n 11 1 .names pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n 0 1 -.names N_137.BLIF N_265_2.BLIF N_109 -11 1 -.names BG_030_c.BLIF BG_030_c_i -0 1 .names BGACK_000_c.BLIF pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n 11 1 -.names N_76.BLIF rst_dly_i_1__n.BLIF N_113 -11 1 -.names pos_clk_un6_bg_030_n.BLIF pos_clk_un6_bg_030_i_n +.names cpu_est_2_0_1__n.BLIF cpu_est_2_1__n 0 1 .names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \ bgack_030_int_0_un0_n 11 1 -.names N_77_i.BLIF N_134.BLIF N_112 -11 1 -.names BG_030_c_i.BLIF pos_clk_un6_bg_030_i_n.BLIF pos_clk_un9_bg_030_0_n -11 1 -.names DS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un3_n -0 1 -.names pos_clk_un31_clk_000_ne_1_i_m2_un1_n.BLIF \ -pos_clk_un31_clk_000_ne_1_i_m2_un0_n.BLIF N_98 -1- 1 --1 1 -.names inst_UDS_000_INT.BLIF UDS_000_INT_i -0 1 -.names inst_DS_000_DMA.BLIF DS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un1_n -11 1 -.names pos_clk_un29_clk_000_ne_1_3_n.BLIF cpu_est_i_1__n.BLIF \ -pos_clk_un29_clk_000_ne_1_n -11 1 -.names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un1_UDS_000_INT_0 -11 1 -.names pos_clk_as_000_dma6_i_n.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n -11 1 -.names N_87_i.BLIF N_87 -0 1 -.names inst_LDS_000_INT.BLIF LDS_000_INT_i -0 1 -.names AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un3_n -0 1 -.names N_270_0.BLIF N_270 -0 1 -.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un1_LDS_000_INT_0 -11 1 -.names inst_AS_000_DMA.BLIF AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un1_n -11 1 -.names N_76_i.BLIF N_137_i_0.BLIF N_134 -11 1 -.names N_23.BLIF N_23_i -0 1 -.names pos_clk_as_000_dma6_i_n.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n -11 1 -.names N_125_1.BLIF RST_c.BLIF N_125 -11 1 -.names N_23_i.BLIF RST_c.BLIF N_30_0 -11 1 -.names SIZE_DMA_3_sqmuxa.BLIF size_dma_0_1__un3_n -0 1 -.names inst_RESET_OUT.BLIF RST_c.BLIF N_124 -11 1 -.names N_20.BLIF N_20_i -0 1 -.names SIZE_DMA_1_.BLIF SIZE_DMA_3_sqmuxa.BLIF size_dma_0_1__un1_n -11 1 -.names N_87_i.BLIF RST_c.BLIF N_121 -11 1 -.names N_20_i.BLIF RST_c.BLIF N_33_0 -11 1 -.names pos_clk_size_dma_6_1__n.BLIF size_dma_0_1__un3_n.BLIF \ -size_dma_0_1__un0_n -11 1 -.names DSACK1_INT_i.BLIF N_274.BLIF N_120 -11 1 -.names N_13.BLIF N_13_i -0 1 -.names SIZE_DMA_3_sqmuxa.BLIF size_dma_0_0__un3_n -0 1 -.names N_77_i.BLIF RST_DLY_2_.BLIF N_137 -11 1 -.names N_13_i.BLIF RST_c.BLIF N_40_0 -11 1 -.names SIZE_DMA_0_.BLIF SIZE_DMA_3_sqmuxa.BLIF size_dma_0_0__un1_n -11 1 -.names pos_clk_un31_clk_000_ne_i_n.BLIF pos_clk_un31_clk_000_ne_n -0 1 -.names ipl_c_2__n.BLIF ipl_c_i_2__n -0 1 -.names pos_clk_size_dma_6_0__n.BLIF size_dma_0_0__un3_n.BLIF \ -size_dma_0_0__un0_n -11 1 -.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_17 -1- 1 --1 1 -.names ipl_c_i_2__n.BLIF RST_c.BLIF N_51_0 -11 1 -.names pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_high_0_un3_n -0 1 -.names pos_clk_un9_clk_000_pe_0_n.BLIF pos_clk_un9_clk_000_pe_n -0 1 -.names N_26.BLIF N_26_i -0 1 -.names pos_clk_amiga_bus_enable_dma_high_3_n.BLIF \ -pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_high_0_un1_n -11 1 -.names cpu_est_2_0_1__n.BLIF cpu_est_2_1__n -0 1 -.names N_26_i.BLIF RST_c.BLIF N_29_0 -11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF \ -amiga_bus_enable_dma_high_0_un3_n.BLIF amiga_bus_enable_dma_high_0_un0_n -11 1 .names cpu_est_2_0_2__n.BLIF cpu_est_2_2__n 0 1 -.names a_c_0__n.BLIF a_c_i_0__n +.names N_68.BLIF cpu_est_0_1__un3_n 0 1 -.names pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_low_0_un3_n +.names cpu_est_2_0_3__n.BLIF cpu_est_2_3__n 0 1 -.names N_261_1.BLIF N_261_2.BLIF N_261 +.names cpu_est_1_.BLIF N_68.BLIF cpu_est_0_1__un1_n 11 1 -.names size_c_1__n.BLIF size_c_i_1__n +.names cpu_est_2_1__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n +11 1 +.names N_68.BLIF cpu_est_0_2__un3_n 0 1 -.names pos_clk_amiga_bus_enable_dma_low_3_n.BLIF \ -pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_low_0_un1_n +.names cpu_est_2_.BLIF N_68.BLIF cpu_est_0_2__un1_n 11 1 -.names N_262_1.BLIF N_262_2.BLIF N_262 -11 1 -.names pos_clk_un10_sm_amiga_i_1_n.BLIF size_c_i_1__n.BLIF \ -pos_clk_un10_sm_amiga_i_n -11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF \ -amiga_bus_enable_dma_low_0_un3_n.BLIF amiga_bus_enable_dma_low_0_un0_n -11 1 -.names N_251_i.BLIF N_251 +.names N_60_0.BLIF N_60 0 1 -.names DS_000_ENABLE_0_sqmuxa_1.BLIF DS_000_ENABLE_0_sqmuxa_1_i +.names cpu_est_2_2__n.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n +11 1 +.names N_63_0.BLIF N_63 0 1 -.names pos_clk_un5_bgack_030_int_d_n.BLIF a0_dma_0_un3_n +.names N_68.BLIF cpu_est_0_3__un3_n 0 1 -.names N_252_0.BLIF N_252 -0 1 -.names DS_000_ENABLE_0_sqmuxa_1_i.BLIF N_157.BLIF un1_DS_000_ENABLE_0_sqmuxa_i +.names N_220_i.BLIF RW_000_i.BLIF N_126 11 1 -.names pos_clk_a0_dma_3_n.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF \ -a0_dma_0_un1_n +.names cpu_est_3_.BLIF N_68.BLIF cpu_est_0_3__un1_n 11 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_258 +.names a_c_1__n.BLIF N_220_i.BLIF N_150 11 1 -.names N_78_i.BLIF SM_AMIGA_4_.BLIF N_157_i +.names cpu_est_2_3__n.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n 11 1 -.names inst_A0_DMA.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n +.names a_i_1__n.BLIF N_220_i.BLIF N_151 11 1 -.names N_251_i.BLIF cpu_est_i_2__n.BLIF N_257 -11 1 -.names N_76_i.BLIF SM_AMIGA_5_.BLIF N_160_0 -11 1 -.names pos_clk_un5_bgack_030_int_d_n.BLIF rw_000_dma_0_un3_n -0 1 -.names AS_030_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_i.BLIF DS_000_ENABLE_1_sqmuxa -11 1 -.names SM_AMIGA_3_.BLIF pos_clk_un31_clk_000_ne_n.BLIF N_161_0 -11 1 -.names pos_clk_rw_000_dma_3_n.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF \ -rw_000_dma_0_un1_n -11 1 -.names un1_DS_000_ENABLE_0_sqmuxa_i.BLIF un1_DS_000_ENABLE_0_sqmuxa -0 1 -.names N_85_i.BLIF sm_amiga_i_i_7__n.BLIF N_162_0 -11 1 -.names inst_RW_000_DMA.BLIF rw_000_dma_0_un3_n.BLIF rw_000_dma_0_un0_n -11 1 -.names N_76.BLIF sm_amiga_i_2__n.BLIF N_102 -11 1 -.names N_165.BLIF N_165_i -0 1 .names pos_clk_ipl_n.BLIF ipl_030_0_0__un3_n 0 1 -.names AS_000_INT_i.BLIF N_274.BLIF N_118 +.names AS_030_i.BLIF DSACK1_INT_i.BLIF N_219 11 1 .names ipl_c_0__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_0__un1_n 11 1 -.names N_79_i.BLIF RST_c.BLIF N_119 +.names AS_000_INT_i.BLIF AS_030_i.BLIF N_175 11 1 -.names N_167.BLIF N_167_i -0 1 .names IPL_030DFF_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n 11 1 -.names N_264_i.BLIF N_264 -0 1 -.names N_166.BLIF N_166_i -0 1 .names pos_clk_ipl_n.BLIF ipl_030_0_1__un3_n 0 1 -.names DS_000_ENABLE_0_sqmuxa_1_1.BLIF SM_AMIGA_6_.BLIF \ -DS_000_ENABLE_0_sqmuxa_1 -11 1 +.names N_59_i.BLIF N_59 +0 1 .names ipl_c_1__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_1__un1_n 11 1 -.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_164 -11 1 -.names N_168.BLIF N_168_i +.names N_68_i.BLIF N_68 0 1 .names IPL_030DFF_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n 11 1 -.names N_162.BLIF sm_amiga_i_6__n.BLIF N_170 -11 1 -.names N_64.BLIF as_030_000_sync_0_un3_n +.names N_72_i.BLIF N_72 0 1 -.names N_160.BLIF sm_amiga_i_4__n.BLIF N_168 -11 1 -.names N_170.BLIF N_170_i +.names pos_clk_ipl_n.BLIF ipl_030_0_2__un3_n 0 1 -.names inst_AS_030_000_SYNC.BLIF N_64.BLIF as_030_000_sync_0_un1_n +.names N_80_i.BLIF N_80 +0 1 +.names ipl_c_2__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_2__un1_n 11 1 -.names N_157.BLIF sm_amiga_i_3__n.BLIF N_166 +.names N_93_i.BLIF N_93 +0 1 +.names IPL_030DFF_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n 11 1 -.names AS_030_c.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n +.names N_98_i.BLIF N_98 +0 1 +.names N_63.BLIF ds_000_enable_0_un3_n +0 1 +.names N_107_i.BLIF N_107 +0 1 +.names un1_DS_000_ENABLE_0_sqmuxa.BLIF N_63.BLIF ds_000_enable_0_un1_n 11 1 -.names N_76_i.BLIF pos_clk_un31_clk_000_ne_n.BLIF N_167 +.names N_128_i.BLIF N_128 +0 1 +.names inst_DS_000_ENABLE.BLIF ds_000_enable_0_un3_n.BLIF \ +ds_000_enable_0_un0_n 11 1 +.names N_131_i.BLIF N_131 +0 1 +.names pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un3_n +0 1 +.names N_134_0.BLIF N_134 +0 1 +.names cpu_est_i_1__n.BLIF pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un1_n +11 1 +.names N_135_0.BLIF N_135 +0 1 +.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n +11 1 +.names N_72.BLIF SM_AMIGA_2_.BLIF N_141 +11 1 +.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c +0 1 +.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_142 +11 1 +.names N_143_1.BLIF N_143_2.BLIF N_143 +11 1 +.names N_144_1.BLIF N_144_2.BLIF N_144 +11 1 +.names LDS_000_c.BLIF UDS_000_c.BLIF N_145 +11 1 +.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF N_146 +11 1 +.names N_205_i_1.BLIF N_205_i_2.BLIF N_205_i +11 1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_147 +11 1 +.names N_140.BLIF N_140_i +0 1 +.names N_148_1.BLIF cpu_est_i_3__n.BLIF N_148 +11 1 +.names inst_AMIGA_DS.BLIF AMIGA_DS_i +0 1 +.names N_98.BLIF cpu_est_2_.BLIF N_149 +11 1 +.names N_98_i.BLIF cpu_est_2_.BLIF N_154 +11 1 +.names N_199.BLIF N_199_i +0 1 +.names N_82_i.BLIF cpu_est_3_.BLIF N_155 +11 1 +.names N_198.BLIF N_198_i +0 1 +.names N_162_1.BLIF cpu_est_i_3__n.BLIF N_162 +11 1 +.names N_180.BLIF N_180_i +0 1 +.names N_165_1.BLIF AS_030_i.BLIF N_165 +11 1 +.names N_262.BLIF N_262_i +0 1 +.names BGACK_030_INT_i.BLIF N_128.BLIF N_259 +11 1 +.names N_180_i.BLIF N_262_i.BLIF AMIGA_BUS_DATA_DIR_c_0 +11 1 +.names BGACK_030_INT_i.BLIF N_128_i.BLIF N_260 +11 1 +.names cycle_dma_i_0__n.BLIF cycle_dma_i_1__n.BLIF pos_clk_un2_i_n +11 1 +.names N_129.BLIF sm_amiga_i_0__n.BLIF N_181 +11 1 +.names N_3.BLIF N_3_i +0 1 +.names N_134.BLIF sm_amiga_i_2__n.BLIF N_182 +11 1 +.names N_3_i.BLIF RST_c.BLIF N_32_0 +11 1 +.names N_68_i.BLIF N_131.BLIF N_183 +11 1 +.names N_4.BLIF N_4_i +0 1 +.names N_107.BLIF sm_amiga_i_3__n.BLIF N_184 +11 1 +.names N_4_i.BLIF RST_c.BLIF N_31_0 +11 1 +.names N_135.BLIF sm_amiga_i_4__n.BLIF N_185 +11 1 +.names BGACK_030_INT_i.BLIF RST_c.BLIF N_220_i +11 1 +.names N_93.BLIF sm_amiga_i_5__n.BLIF N_186 +11 1 +.names BG_030_c.BLIF BG_030_c_i +0 1 +.names N_132.BLIF sm_amiga_i_6__n.BLIF N_266 +11 1 +.names BG_030_c_i.BLIF N_59.BLIF pos_clk_un9_bg_030_0_n +11 1 +.names N_96.BLIF sm_amiga_i_i_7__n.BLIF N_267 +11 1 +.names N_17.BLIF N_17_i +0 1 +.names N_72_i.BLIF SM_AMIGA_0_.BLIF N_268 +11 1 +.names N_17_i.BLIF RST_c.BLIF N_24_0 +11 1 +.names N_68.BLIF cpu_est_i_0__n.BLIF N_190 +11 1 +.names N_16.BLIF N_16_i +0 1 +.names N_68_i.BLIF cpu_est_0_.BLIF N_191 +11 1 +.names N_16_i.BLIF RST_c.BLIF N_25_0 +11 1 +.names N_201_1.BLIF N_201_2.BLIF N_201 +11 1 +.names N_15.BLIF N_15_i +0 1 +.names DTACK_D0_i.BLIF inst_VPA_D.BLIF N_202 +11 1 +.names N_15_i.BLIF RST_c.BLIF N_26_0 +11 1 +.names N_93_i.BLIF RW_c.BLIF N_203 +11 1 +.names N_12.BLIF N_12_i +0 1 +.names N_98_i.BLIF cpu_est_i_2__n.BLIF N_208 +11 1 +.names N_12_i.BLIF RST_c.BLIF N_28_0 +11 1 +.names N_163_3.BLIF un1_dsack1_i.BLIF N_163 +11 1 +.names N_11.BLIF N_11_i +0 1 +.names N_282_0.BLIF N_282 +0 1 +.names N_11_i.BLIF RST_c.BLIF N_29_0 +11 1 +.names AS_030_i.BLIF BGACK_000_c.BLIF un21_berr_1 +11 1 +.names N_5.BLIF N_5_i +0 1 +.names N_132_0.BLIF N_132 +0 1 +.names N_5_i.BLIF RST_c.BLIF N_30_0 +11 1 +.names N_96_0.BLIF N_96 +0 1 +.names a_c_0__n.BLIF a_c_i_0__n +0 1 +.names N_129_i.BLIF N_129 +0 1 +.names size_c_1__n.BLIF size_c_i_1__n +0 1 +.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 +0 1 +.names pos_clk_un10_sm_amiga_i_1_n.BLIF size_c_i_1__n.BLIF \ +pos_clk_un10_sm_amiga_i_n +11 1 +.names N_175.BLIF RST_c.BLIF N_169 +11 1 +.names inst_BGACK_030_INTreg.BLIF nEXP_SPACE_c.BLIF un1_dsack1_i +11 1 +.names N_93_i.BLIF RST_c.BLIF N_170 +11 1 +.names inst_BGACK_030_INTreg.BLIF RST_c.BLIF N_69_i +11 1 +.names N_219.BLIF RST_c.BLIF N_167 +11 1 +.names N_163.BLIF N_163_i +0 1 +.names N_129_i.BLIF RST_c.BLIF N_168 +11 1 +.names AS_030_i.BLIF N_163_i.BLIF N_244_0 +11 1 +.names pos_clk_rw_000_int_5_0_n.BLIF pos_clk_rw_000_int_5_n +0 1 .names N_164.BLIF N_164_i 0 1 -.names un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un3_n +.names pos_clk_un6_bgack_000_0_n.BLIF pos_clk_un6_bgack_000_n 0 1 -.names N_161.BLIF sm_amiga_i_2__n.BLIF N_165 -11 1 -.names pos_clk_rw_000_int_5_n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF \ -rw_000_int_0_un1_n -11 1 -.names N_162_0.BLIF N_162 +.names N_165.BLIF N_165_i 0 1 -.names N_102.BLIF N_102_i -0 1 -.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n +.names AS_000_c.BLIF N_68_i.BLIF N_274 11 1 -.names N_161_0.BLIF N_161 -0 1 -.names N_78.BLIF N_102_i.BLIF N_264_i +.names N_164_i.BLIF N_165_i.BLIF un11_amiga_bus_enable_high_i 11 1 -.names N_160_0.BLIF N_160 -0 1 -.names N_78_i.BLIF SM_AMIGA_6_.BLIF N_79_i +.names AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF BGACK_030_INT_i.BLIF N_164 11 1 -.names N_157_i.BLIF N_157 +.names un10_ciin.BLIF un10_ciin_i 0 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_78_i +.names N_244_0.BLIF N_244 +0 1 +.names nEXP_SPACE_i.BLIF un10_ciin_i.BLIF N_60_0 11 1 -.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_26 +.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_5 1- 1 -1 1 -.names N_119.BLIF N_119_i +.names N_274.BLIF N_274_i 0 1 -.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF N_13 +.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_11 1- 1 -1 1 -.names N_118.BLIF N_118_i +.names BGACK_000_c.BLIF N_274_i.BLIF pos_clk_un6_bgack_000_0_n +11 1 +.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_12 +1- 1 +-1 1 +.names RW_c.BLIF RW_c_i 0 1 -.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_20 +.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF N_15 1- 1 -1 1 -.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF N_23 +.names N_246_i.BLIF RW_c_i.BLIF pos_clk_rw_000_int_5_0_n +11 1 +.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF N_16 1- 1 -1 1 -.names N_255.BLIF N_255_i +.names N_168.BLIF N_168_i 0 1 -.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_8 +.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_17 1- 1 -1 1 -.names N_257.BLIF N_257_i +.names N_167.BLIF N_167_i 0 1 .names pos_clk_un9_bg_030_0_n.BLIF pos_clk_un9_bg_030_n 0 1 -.names N_255_i.BLIF N_257_i.BLIF cpu_est_2_0_2__n +.names N_170.BLIF N_170_i +0 1 +.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF N_3 +1- 1 +-1 1 +.names N_169.BLIF N_169_i +0 1 +.names N_205_i.BLIF N_205 +0 1 +.names AS_000_DMA_1_sqmuxa_1.BLIF N_205_i.BLIF AS_000_DMA_1_sqmuxa +11 1 +.names AS_030_i.BLIF RST_c.BLIF N_38_0 +11 1 +.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF N_4 +1- 1 +-1 1 +.names N_93.BLIF N_246_i.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 +11 1 +.names N_199_1.BLIF cycle_dma_i_1__n.BLIF N_199 +11 1 +.names N_282_0_4.BLIF N_282_0_3.BLIF N_282_0 +11 1 +.names pos_clk_un2_i_n.BLIF pos_clk_un2_n +0 1 +.names CLK_000_D_3_.BLIF clk_000_d_i_3__n +0 1 +.names N_140_1.BLIF RW_000_i.BLIF N_140 +11 1 +.names N_96_0_1.BLIF N_96_0_2.BLIF N_96_0 +11 1 +.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF N_262 +11 1 +.names N_68_i.BLIF SM_AMIGA_1_.BLIF N_129_i +11 1 +.names cycle_dma_i_0__n.BLIF N_68.BLIF N_198 +11 1 +.names N_268.BLIF N_268_i +0 1 +.names N_180_1.BLIF N_180_2.BLIF N_180 +11 1 +.names N_268_i.BLIF SM_AMIGA_i_7_.BLIF N_246_i 11 1 .names un1_amiga_bus_enable_low.BLIF un1_amiga_bus_enable_low_i 0 1 -.names N_258.BLIF N_258_i -0 1 +.names N_96_0.BLIF sm_amiga_i_i_7__n.BLIF N_132_0 +11 1 .names un21_fpu_cs.BLIF un21_fpu_cs_i 0 1 -.names N_259.BLIF N_259_i +.names AS_000_c.BLIF AS_000_i 0 1 -.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n +.names N_142.BLIF N_142_i 0 1 -.names N_258_i.BLIF N_259_i.BLIF cpu_est_2_0_1__n +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +0 1 +.names N_141.BLIF N_141_i +0 1 +.names nEXP_SPACE_c.BLIF nEXP_SPACE_i +0 1 +.names N_68_i.BLIF SM_AMIGA_5_.BLIF N_135_0 11 1 -.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n 0 1 -.names N_262.BLIF N_262_i -0 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n -0 1 -.names N_261.BLIF N_261_i -0 1 -.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n -0 1 -.names N_261_i.BLIF N_262_i.BLIF pos_clk_un9_clk_000_pe_0_n +.names N_134_0_1.BLIF SM_AMIGA_3_.BLIF N_134_0 11 1 -.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n +.names RW_000_c.BLIF RW_000_i 0 1 -.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_251_i +.names N_131_i_1.BLIF N_202_i.BLIF N_131_i +11 1 +.names CLK_OUT_INTreg.BLIF CLK_EXP_i +0 1 +.names LDS_000_c.BLIF LDS_000_c_i +0 1 +.names CYCLE_DMA_1_.BLIF cycle_dma_i_1__n +0 1 +.names UDS_000_c.BLIF UDS_000_c_i +0 1 +.names inst_DS_000_DMA.BLIF DS_000_DMA_i +0 1 +.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_128_i +11 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_i +0 1 +.names N_72_i.BLIF SM_AMIGA_4_.BLIF N_107_i +11 1 +.names a_c_1__n.BLIF a_i_1__n +0 1 +.names N_203.BLIF N_203_i +0 1 +.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i +0 1 +.names N_107.BLIF N_203_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_0 +11 1 +.names a_decode_c_19__n.BLIF a_decode_i_19__n +0 1 +.names N_201.BLIF N_201_i +0 1 +.names a_decode_c_18__n.BLIF a_decode_i_18__n +0 1 +.names N_202.BLIF N_202_i +0 1 +.names a_decode_c_16__n.BLIF a_decode_i_16__n +0 1 +.names inst_VMA_INTreg.BLIF VMA_INT_i +0 1 +.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i +0 1 +.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_98_i +11 1 +.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n +0 1 +.names N_72_i.BLIF SM_AMIGA_6_.BLIF N_93_i 11 1 .names SM_AMIGA_5_.BLIF sm_amiga_i_5__n 0 1 -.names cpu_est_1_.BLIF cpu_est_i_3__n.BLIF N_252_0 +.names cpu_est_i_1__n.BLIF cpu_est_i_2__n.BLIF N_82_i 11 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_0__n +.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n 0 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_76_i +.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF N_80_i 11 1 -.names inst_AS_000_INT.BLIF AS_000_INT_i -0 1 -.names N_17.BLIF N_17_i -0 1 .names SM_AMIGA_i_7_.BLIF sm_amiga_i_i_7__n 0 1 -.names N_17_i.BLIF RST_c.BLIF N_36_0 +.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_72_i 11 1 .names AS_030_c.BLIF AS_030_i 0 1 -.names N_98.BLIF N_98_i -0 1 -.names cpu_est_2_.BLIF cpu_est_i_2__n -0 1 -.names BERR_c.BLIF N_98_i.BLIF pos_clk_un31_clk_000_ne_i_n +.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_68_i 11 1 +.names inst_AS_000_INT.BLIF AS_000_INT_i +0 1 +.names N_59_i_1.BLIF nEXP_SPACE_c.BLIF N_59_i +11 1 +.names inst_DSACK1_INT.BLIF DSACK1_INT_i +0 1 +.names N_190.BLIF N_190_i +0 1 +.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +0 1 +.names N_191.BLIF N_191_i +0 1 +.names FPU_SENSE_c.BLIF FPU_SENSE_i +0 1 +.names inst_AS_030_D1.BLIF AS_030_D1_i +0 1 +.names N_267.BLIF N_267_i +0 1 .names cpu_est_0_.BLIF cpu_est_i_0__n 0 1 -.names N_137_i_0.BLIF RST_c.BLIF N_228_i -11 1 .names cpu_est_3_.BLIF cpu_est_i_3__n 0 1 -.names N_121.BLIF N_121_i +.names N_266.BLIF N_266_i +0 1 +.names inst_VPA_D.BLIF VPA_D_i +0 1 +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names N_186.BLIF N_186_i +0 1 +.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n 0 1 .names cpu_est_1_.BLIF cpu_est_i_1__n 0 1 -.names N_120.BLIF N_120_i +.names N_185.BLIF N_185_i 0 1 -.names IPL_D0_0_.BLIF ipl_c_0__n.BLIF G_122 +.names CLK_000_D_0_.BLIF clk_000_d_i_0__n +0 1 +.names CLK_000_D_1_.BLIF clk_000_d_i_1__n +0 1 +.names N_183.BLIF N_183_i +0 1 +.names inst_AS_030_D0.BLIF AS_030_D0_i +0 1 +.names N_184.BLIF N_184_i +0 1 +.names cpu_est_2_.BLIF cpu_est_i_2__n +0 1 +.names inst_DTACK_D0.BLIF DTACK_D0_i +0 1 +.names N_182.BLIF N_182_i +0 1 +.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n +0 1 +.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i +0 1 +.names N_181.BLIF N_181_i +0 1 +.names ahigh_c_30__n.BLIF ahigh_i_30__n +0 1 +.names ahigh_c_31__n.BLIF ahigh_i_31__n +0 1 +.names N_260.BLIF N_260_i +0 1 +.names ahigh_c_28__n.BLIF ahigh_i_28__n +0 1 +.names N_260_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n +11 1 +.names ahigh_c_29__n.BLIF ahigh_i_29__n +0 1 +.names N_259.BLIF N_259_i +0 1 +.names ahigh_c_26__n.BLIF ahigh_i_26__n +0 1 +.names N_259_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n +11 1 +.names ahigh_c_27__n.BLIF ahigh_i_27__n +0 1 +.names AS_030_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_0.BLIF N_63_0 +11 1 +.names ahigh_c_24__n.BLIF ahigh_i_24__n +0 1 +.names N_155.BLIF N_155_i +0 1 +.names ahigh_c_25__n.BLIF ahigh_i_25__n +0 1 +.names N_162.BLIF N_162_i +0 1 +.names G_105.BLIF N_187_i +0 1 +.names N_155_i.BLIF N_162_i.BLIF un5_e_0 +11 1 +.names G_106.BLIF N_188_i +0 1 +.names N_154.BLIF N_154_i +0 1 +.names G_107.BLIF N_189_i +0 1 +.names N_80.BLIF N_154_i.BLIF cpu_est_2_0_3__n +11 1 +.names N_149.BLIF N_149_i +0 1 +.names N_208.BLIF N_208_i +0 1 +.names N_149_i.BLIF N_208_i.BLIF cpu_est_2_0_2__n +11 1 +.names N_147.BLIF N_147_i +0 1 +.names un2_ds_030.BLIF un2_ds_030_i +0 1 +.names N_148.BLIF N_148_i +0 1 +.names N_219.BLIF N_219_i +0 1 +.names N_147_i.BLIF N_148_i.BLIF cpu_est_2_0_1__n +11 1 +.names N_175.BLIF N_175_i +0 1 +.names N_146.BLIF N_146_i +0 1 +.names un3_as_030.BLIF un3_as_030_i +0 1 +.names N_146_i.BLIF RST_c.BLIF N_36_0 +11 1 +.names N_145.BLIF N_145_i +0 1 +.names N_145_i.BLIF RST_c.BLIF N_35_0 +11 1 +.names N_143.BLIF N_143_i +0 1 +.names N_144.BLIF N_144_i +0 1 +.names N_143_i.BLIF N_144_i.BLIF pos_clk_un9_clk_000_pe_0_n +11 1 +.names N_20.BLIF N_20_i +0 1 +.names IPL_D0_0_.BLIF ipl_c_0__n.BLIF G_105 01 1 10 1 11 0 00 0 -.names IPL_D0_1_.BLIF ipl_c_1__n.BLIF G_123 +.names IPL_D0_1_.BLIF ipl_c_1__n.BLIF G_106 01 1 10 1 11 0 00 0 -.names IPL_D0_2_.BLIF ipl_c_2__n.BLIF G_124 +.names IPL_D0_2_.BLIF ipl_c_2__n.BLIF G_107 01 1 10 1 11 0 00 0 -.names cpu_est_0_.BLIF N_76.BLIF cpu_est_0_0_ -01 1 -10 1 -11 0 -00 0 -.names CYCLE_DMA_1_.BLIF N_199.BLIF G_97 -01 1 -10 1 -11 0 -00 0 -.names CYCLE_DMA_0_.BLIF pos_clk_un13_bgack_030_int_n.BLIF G_95 -01 1 -10 1 -11 0 -00 0 -.names CLK_030_PE_0_.BLIF pos_clk_un13_clk_out_int_n.BLIF G_101 -01 1 -10 1 -11 0 -00 0 -.names CLK_030_PE_1_.BLIF N_205.BLIF G_103 +.names CYCLE_DMA_1_.BLIF N_199.BLIF G_91 01 1 10 1 11 0 @@ -1620,7 +1264,7 @@ rw_000_int_0_un1_n .names IPL_030DFF_2_reg.BLIF IPL_030_2_ 1 1 0 0 -.names un6_ds_030_i.BLIF DS_030 +.names un2_ds_030_i.BLIF DS_030 1 1 0 0 .names BG_000DFFreg.BLIF BG_000 @@ -1638,13 +1282,13 @@ rw_000_int_0_un1_n .names un21_fpu_cs_i.BLIF FPU_CS 1 1 0 0 -.names N_123_i.BLIF DSACK1 +.names N_219_i.BLIF DSACK1 1 1 0 0 .names vcc_n_n.BLIF AVEC 1 1 0 0 -.names N_250_i.BLIF E +.names un5_e.BLIF E 1 1 0 0 .names inst_VMA_INTreg.BLIF VMA @@ -1671,15 +1315,6 @@ rw_000_int_0_un1_n .names IPL_030DFF_0_reg.BLIF IPL_030_0_ 1 1 0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_i_7_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C -1 1 -0 0 .names CLK_OSZI_c.BLIF SM_AMIGA_4_.C 1 1 0 0 @@ -1695,12 +1330,6 @@ rw_000_int_0_un1_n .names CLK_OSZI_c.BLIF SM_AMIGA_0_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF cpu_est_2_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF cpu_est_3_.C -1 1 -0 0 .names CLK_OSZI_c.BLIF IPL_030DFF_0_reg.C 1 1 0 0 @@ -1719,10 +1348,13 @@ rw_000_int_0_un1_n .names CLK_OSZI_c.BLIF IPL_D0_2_.C 1 1 0 0 -.names CLK_000.BLIF CLK_000_D_0_.D +.names CLK_OSZI_c.BLIF SM_AMIGA_i_7_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF CLK_000_D_0_.C +.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C 1 1 0 0 .names CLK_000_D_0_.BLIF CLK_000_D_1_.D @@ -1749,37 +1381,67 @@ rw_000_int_0_un1_n .names CLK_OSZI_c.BLIF CLK_000_D_4_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF CYCLE_DMA_0_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF CYCLE_DMA_1_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_030_PE_0_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_030_PE_1_.C -1 1 -0 0 .names CLK_OSZI_c.BLIF SIZE_DMA_0_.C 1 1 0 0 .names CLK_OSZI_c.BLIF SIZE_DMA_1_.C 1 1 0 0 +.names CLK_OSZI_c.BLIF CYCLE_DMA_0_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF CYCLE_DMA_1_.C +1 1 +0 0 .names CLK_OSZI_c.BLIF cpu_est_0_.C 1 1 0 0 .names CLK_OSZI_c.BLIF cpu_est_1_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF RST_DLY_0_.C +.names CLK_OSZI_c.BLIF cpu_est_2_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF RST_DLY_1_.C +.names CLK_OSZI_c.BLIF cpu_est_3_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF RST_DLY_2_.C +.names CLK_000.BLIF CLK_000_D_0_.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF CLK_000_D_0_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_VPA_D.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_DTACK_D0.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_DS_000_ENABLE.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF BG_000DFFreg.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_RW_000_INT.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C 1 1 0 0 .names CLK_OSZI_c.BLIF inst_DS_000_DMA.C @@ -1794,55 +1456,22 @@ rw_000_int_0_un1_n .names CLK_OSZI_c.BLIF inst_AMIGA_DS.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_AS_030_D0.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_DTACK_D0.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_VPA_D.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_RESET_OUT.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_DS_000_ENABLE.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF BG_000DFFreg.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C -1 1 -0 0 .names CLK_OSZI_c.BLIF inst_A0_DMA.C 1 1 0 0 .names CLK_OSZI_c.BLIF inst_RW_000_DMA.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C +.names CLK_OSZI_c.BLIF inst_AS_030_D0.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_RW_000_INT.C +.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C +.names CLK_OSZI_c.BLIF inst_AS_030_D1.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C +.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C 1 1 0 0 .names CLK_OSZI_c.BLIF inst_BGACK_030_INT_D.C @@ -1869,10 +1498,10 @@ rw_000_int_0_un1_n .names gnd_n_n.BLIF AHIGH_31_ 1 1 0 0 -.names un7_as_030_i.BLIF AS_030 +.names un3_as_030_i.BLIF AS_030 1 1 0 0 -.names N_122_i.BLIF AS_000 +.names N_175_i.BLIF AS_000 1 1 0 0 .names inst_RW_000_INT.BLIF RW_000 @@ -1887,9 +1516,6 @@ rw_000_int_0_un1_n .names gnd_n_n.BLIF BERR 1 1 0 0 -.names gnd_n_n.BLIF DTACK -1 1 -0 0 .names inst_RW_000_DMA.BLIF RW 1 1 0 0 @@ -1920,18 +1546,6 @@ rw_000_int_0_un1_n .names inst_A0_DMA.BLIF A_0_ 1 1 0 0 -.names A_DECODE_2_.BLIF a_decode_2__n -1 1 -0 0 -.names AS_030.PIN.BLIF AS_030_c -1 1 -0 0 -.names AS_000.PIN.BLIF AS_000_c -1 1 -0 0 -.names RW_000.PIN.BLIF RW_000_c -1 1 -0 0 .names UDS_000.PIN.BLIF UDS_000_c 1 1 0 0 @@ -2010,9 +1624,6 @@ rw_000_int_0_un1_n .names BGACK_000.BLIF BGACK_000_c 1 1 0 0 -.names CLK_030.BLIF CLK_030_c -1 1 -0 0 .names CLK_OSZI.BLIF CLK_OSZI_c 1 1 0 0 @@ -2028,7 +1639,7 @@ rw_000_int_0_un1_n .names IPL_2_.BLIF ipl_c_2__n 1 1 0 0 -.names DTACK.PIN.BLIF DTACK_c +.names DTACK.BLIF DTACK_c 1 1 0 0 .names VPA.BLIF VPA_c @@ -2037,9 +1648,6 @@ rw_000_int_0_un1_n .names RST.BLIF RST_c 1 1 0 0 -.names RESET.BLIF RESET_c -1 1 -0 0 .names RW.PIN.BLIF RW_c 1 1 0 0 @@ -2088,70 +1696,82 @@ rw_000_int_0_un1_n .names A_DECODE_3_.BLIF a_decode_3__n 1 1 0 0 -.names N_132.BLIF AS_030.OE +.names A_DECODE_2_.BLIF a_decode_2__n 1 1 0 0 -.names un1_as_000_i.BLIF AS_000.OE +.names AS_030.PIN.BLIF AS_030_c 1 1 0 0 -.names un1_as_000_i.BLIF RW_000.OE +.names AS_000.PIN.BLIF AS_000_c 1 1 0 0 -.names un1_as_000_i.BLIF UDS_000.OE +.names RW_000.PIN.BLIF RW_000_c 1 1 0 0 -.names un1_as_000_i.BLIF LDS_000.OE +.names BGACK_030_INT_i.BLIF AS_030.OE 1 1 0 0 -.names N_276.BLIF SIZE_0_.OE +.names N_69_i.BLIF AS_000.OE 1 1 0 0 -.names N_276.BLIF SIZE_1_.OE +.names N_69_i.BLIF RW_000.OE 1 1 0 0 -.names un3_ahigh_i.BLIF AHIGH_24_.OE +.names N_69_i.BLIF UDS_000.OE 1 1 0 0 -.names un3_ahigh_i.BLIF AHIGH_25_.OE +.names N_69_i.BLIF LDS_000.OE 1 1 0 0 -.names un3_ahigh_i.BLIF AHIGH_26_.OE +.names BGACK_030_INT_i.BLIF SIZE_0_.OE 1 1 0 0 -.names un3_ahigh_i.BLIF AHIGH_27_.OE +.names BGACK_030_INT_i.BLIF SIZE_1_.OE 1 1 0 0 -.names un3_ahigh_i.BLIF AHIGH_28_.OE +.names BGACK_030_INT_i.BLIF AHIGH_24_.OE 1 1 0 0 -.names un3_ahigh_i.BLIF AHIGH_29_.OE +.names BGACK_030_INT_i.BLIF AHIGH_25_.OE 1 1 0 0 -.names un3_ahigh_i.BLIF AHIGH_30_.OE +.names BGACK_030_INT_i.BLIF AHIGH_26_.OE 1 1 0 0 -.names un3_ahigh_i.BLIF AHIGH_31_.OE +.names BGACK_030_INT_i.BLIF AHIGH_27_.OE 1 1 0 0 -.names N_132.BLIF A_0_.OE +.names BGACK_030_INT_i.BLIF AHIGH_28_.OE +1 1 +0 0 +.names BGACK_030_INT_i.BLIF AHIGH_29_.OE +1 1 +0 0 +.names BGACK_030_INT_i.BLIF AHIGH_30_.OE +1 1 +0 0 +.names BGACK_030_INT_i.BLIF AHIGH_31_.OE +1 1 +0 0 +.names BGACK_030_INT_i.BLIF A_0_.OE 1 1 0 0 .names un21_berr.BLIF BERR.OE 1 1 0 0 -.names AS_000_DMA_i.BLIF DTACK.OE +.names BGACK_030_INT_i.BLIF RW.OE 1 1 0 0 -.names N_133.BLIF RW.OE +.names BGACK_030_INT_i.BLIF DS_030.OE 1 1 0 0 -.names N_132.BLIF DS_030.OE +.names un1_dsack1_i.BLIF DSACK1.OE 1 1 0 0 -.names nEXP_SPACE_c.BLIF DSACK1.OE +.names inst_BGACK_030_INTreg.BLIF VMA.OE 1 1 0 0 -.names un13_ciin_i.BLIF CIIN.OE +.names N_60.BLIF CIIN.OE 1 1 0 0 .end diff --git a/Logic/68030_tk.bl3 b/Logic/68030_tk.bl3 index 2f15fc4..4899251 100644 --- a/Logic/68030_tk.bl3 +++ b/Logic/68030_tk.bl3 @@ -1,111 +1,84 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Thu Dec 29 16:01:56 2016 +#$ DATE Sat Dec 30 00:43:37 2017 #$ MODULE 68030_tk -#$ PINS 61 A_0_ SIZE_1_ IPL_030_1_ IPL_030_0_ AHIGH_31_ IPL_1_ IPL_0_ A_DECODE_23_ \ -# FC_0_ A_1_ IPL_030_2_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 DS_030 UDS_000 LDS_000 nEXP_SPACE \ -# BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP \ -# FPU_CS FPU_SENSE DSACK1 DTACK AVEC SIZE_0_ E AHIGH_30_ VPA AHIGH_29_ VMA AHIGH_28_ RST \ -# AHIGH_27_ RESET AHIGH_26_ RW AHIGH_25_ AMIGA_ADDR_ENABLE AHIGH_24_ AMIGA_BUS_DATA_DIR \ -# A_DECODE_22_ AMIGA_BUS_ENABLE_LOW A_DECODE_21_ AMIGA_BUS_ENABLE_HIGH A_DECODE_20_ \ -# CIIN A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ -#$ NODES 57 inst_BGACK_030_INTreg inst_VMA_INTreg cpu_est_1_ cpu_est_2_ cpu_est_3_ \ -# cpu_est_0_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW \ -# inst_AS_030_D0 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA \ -# inst_DS_000_DMA inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_RESET_OUT CLK_030_PE_1_ \ -# inst_AMIGA_DS CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D \ -# IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_LDS_000_INT \ -# inst_DS_000_ENABLE inst_UDS_000_INT SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ \ -# SIZE_DMA_0_ SIZE_DMA_1_ CYCLE_DMA_0_ CYCLE_DMA_1_ CLK_030_PE_0_ inst_RW_000_INT \ -# inst_RW_000_DMA RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_A0_DMA inst_DSACK1_INT \ -# inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ BG_000DFFreg \ -# CLK_OUT_INTreg IPL_030DFF_0_reg IPL_030DFF_1_reg IPL_030DFF_2_reg +#$ PINS 59 AHIGH_27_ AHIGH_26_ SIZE_1_ AHIGH_25_ AHIGH_24_ AHIGH_31_ A_DECODE_22_ \ +# A_DECODE_21_ A_DECODE_23_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ \ +# IPL_030_2_ A_DECODE_16_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 DS_030 UDS_000 LDS_000 \ +# nEXP_SPACE BERR BG_030 BG_000 BGACK_030 A_0_ BGACK_000 IPL_030_1_ IPL_030_0_ CLK_000 \ +# IPL_1_ CLK_OSZI IPL_0_ CLK_DIV_OUT FC_0_ CLK_EXP A_1_ FPU_CS FPU_SENSE DSACK1 DTACK AVEC E \ +# VPA VMA RST RW AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ +# AMIGA_BUS_ENABLE_HIGH CIIN SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ +#$ NODES 53 inst_BGACK_030_INTreg cpu_est_0_ cpu_est_1_ cpu_est_2_ cpu_est_3_ \ +# inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 \ +# inst_AS_030_D1 inst_AS_030_000_SYNC inst_AS_000_DMA inst_DS_000_DMA \ +# inst_VMA_INTreg inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_AMIGA_DS CLK_000_D_1_ \ +# CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ \ +# CLK_000_D_2_ CLK_000_D_4_ SIZE_DMA_0_ SIZE_DMA_1_ inst_A0_DMA inst_RW_000_DMA \ +# inst_UDS_000_INT inst_DS_000_ENABLE inst_LDS_000_INT inst_BGACK_030_INT_D \ +# SM_AMIGA_6_ inst_RW_000_INT SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ CYCLE_DMA_0_ \ +# CYCLE_DMA_1_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ \ +# BG_000DFFreg CLK_OUT_INTreg IPL_030DFF_0_reg IPL_030DFF_1_reg SM_AMIGA_i_7_ \ +# IPL_030DFF_2_reg N_60 .model bus68030 .inputs A_DECODE_23_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF \ -BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF VPA.BLIF \ -RST.BLIF RESET.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF A_DECODE_20_.BLIF \ +BGACK_000.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF DTACK.BLIF VPA.BLIF \ +RST.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF A_DECODE_20_.BLIF \ A_DECODE_19_.BLIF A_DECODE_18_.BLIF A_DECODE_17_.BLIF A_DECODE_16_.BLIF \ IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF A_1_.BLIF inst_BGACK_030_INTreg.BLIF \ -inst_VMA_INTreg.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF cpu_est_3_.BLIF \ -cpu_est_0_.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF \ -inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF inst_AS_030_D0.BLIF \ -inst_AS_030_000_SYNC.BLIF inst_BGACK_030_INT_D.BLIF inst_AS_000_DMA.BLIF \ -inst_DS_000_DMA.BLIF inst_VPA_D.BLIF CLK_000_D_3_.BLIF inst_DTACK_D0.BLIF \ -inst_RESET_OUT.BLIF CLK_030_PE_1_.BLIF inst_AMIGA_DS.BLIF CLK_000_D_1_.BLIF \ +cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF cpu_est_3_.BLIF \ +inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF \ +inst_AS_030_D0.BLIF inst_AS_030_D1.BLIF inst_AS_030_000_SYNC.BLIF \ +inst_AS_000_DMA.BLIF inst_DS_000_DMA.BLIF inst_VMA_INTreg.BLIF inst_VPA_D.BLIF \ +CLK_000_D_3_.BLIF inst_DTACK_D0.BLIF inst_AMIGA_DS.BLIF CLK_000_D_1_.BLIF \ CLK_000_D_0_.BLIF inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_D.BLIF \ IPL_D0_0_.BLIF IPL_D0_1_.BLIF IPL_D0_2_.BLIF CLK_000_D_2_.BLIF \ -CLK_000_D_4_.BLIF inst_LDS_000_INT.BLIF inst_DS_000_ENABLE.BLIF \ -inst_UDS_000_INT.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_1_.BLIF \ -SM_AMIGA_0_.BLIF SIZE_DMA_0_.BLIF SIZE_DMA_1_.BLIF CYCLE_DMA_0_.BLIF \ -CYCLE_DMA_1_.BLIF CLK_030_PE_0_.BLIF inst_RW_000_INT.BLIF inst_RW_000_DMA.BLIF \ -RST_DLY_0_.BLIF RST_DLY_1_.BLIF RST_DLY_2_.BLIF inst_A0_DMA.BLIF \ -inst_DSACK1_INT.BLIF inst_AS_000_INT.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_3_.BLIF \ -SM_AMIGA_2_.BLIF SM_AMIGA_i_7_.BLIF BG_000DFFreg.BLIF CLK_OUT_INTreg.BLIF \ -IPL_030DFF_0_reg.BLIF IPL_030DFF_1_reg.BLIF IPL_030DFF_2_reg.BLIF \ -AS_030.PIN.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF UDS_000.PIN.BLIF \ -LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF AHIGH_24_.PIN.BLIF \ -AHIGH_25_.PIN.BLIF AHIGH_26_.PIN.BLIF AHIGH_27_.PIN.BLIF AHIGH_28_.PIN.BLIF \ -AHIGH_29_.PIN.BLIF AHIGH_30_.PIN.BLIF AHIGH_31_.PIN.BLIF A_0_.PIN.BLIF \ -BERR.PIN.BLIF DTACK.PIN.BLIF RW.PIN.BLIF +CLK_000_D_4_.BLIF SIZE_DMA_0_.BLIF SIZE_DMA_1_.BLIF inst_A0_DMA.BLIF \ +inst_RW_000_DMA.BLIF inst_UDS_000_INT.BLIF inst_DS_000_ENABLE.BLIF \ +inst_LDS_000_INT.BLIF inst_BGACK_030_INT_D.BLIF SM_AMIGA_6_.BLIF \ +inst_RW_000_INT.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF \ +CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF inst_DSACK1_INT.BLIF inst_AS_000_INT.BLIF \ +SM_AMIGA_5_.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF BG_000DFFreg.BLIF \ +CLK_OUT_INTreg.BLIF IPL_030DFF_0_reg.BLIF IPL_030DFF_1_reg.BLIF \ +SM_AMIGA_i_7_.BLIF IPL_030DFF_2_reg.BLIF N_60.BLIF AS_030.PIN.BLIF \ +AS_000.PIN.BLIF RW_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ +SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF AHIGH_24_.PIN.BLIF AHIGH_25_.PIN.BLIF \ +AHIGH_26_.PIN.BLIF AHIGH_27_.PIN.BLIF AHIGH_28_.PIN.BLIF AHIGH_29_.PIN.BLIF \ +AHIGH_30_.PIN.BLIF AHIGH_31_.PIN.BLIF A_0_.PIN.BLIF BERR.PIN.BLIF RW.PIN.BLIF .outputs IPL_030_2_ DS_030 BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 \ AVEC E VMA AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ -AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_i_7_.C SM_AMIGA_6_.D \ -SM_AMIGA_6_.C SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_4_.D SM_AMIGA_4_.C \ +AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_4_.D SM_AMIGA_4_.C \ SM_AMIGA_3_.C SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_1_.D SM_AMIGA_1_.C \ -SM_AMIGA_0_.D SM_AMIGA_0_.C cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C \ -IPL_030DFF_0_reg.D IPL_030DFF_0_reg.C IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C \ -IPL_030DFF_2_reg.D IPL_030DFF_2_reg.C IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D \ -IPL_D0_1_.C IPL_D0_2_.D IPL_D0_2_.C CLK_000_D_0_.D CLK_000_D_0_.C \ +SM_AMIGA_0_.D SM_AMIGA_0_.C IPL_030DFF_0_reg.D IPL_030DFF_0_reg.C \ +IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D IPL_030DFF_2_reg.C \ +IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D IPL_D0_1_.C IPL_D0_2_.D IPL_D0_2_.C \ +SM_AMIGA_i_7_.C SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_5_.D SM_AMIGA_5_.C \ CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D \ -CLK_000_D_3_.C CLK_000_D_4_.D CLK_000_D_4_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C \ -CYCLE_DMA_1_.D CYCLE_DMA_1_.C CLK_030_PE_0_.C CLK_030_PE_1_.D CLK_030_PE_1_.C \ -SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C cpu_est_0_.D \ -cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.C \ -RST_DLY_2_.D RST_DLY_2_.C inst_DS_000_DMA.D inst_DS_000_DMA.C \ -inst_DSACK1_INT.D inst_DSACK1_INT.C inst_AS_000_INT.D inst_AS_000_INT.C \ -inst_AMIGA_DS.D inst_AMIGA_DS.C inst_AS_030_D0.D inst_AS_030_D0.C \ -inst_DTACK_D0.D inst_DTACK_D0.C inst_VPA_D.D inst_VPA_D.C inst_RESET_OUT.D \ -inst_RESET_OUT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C BG_000DFFreg.D \ -BG_000DFFreg.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D \ -inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D \ -inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.D inst_UDS_000_INT.C \ -inst_A0_DMA.D inst_A0_DMA.C inst_RW_000_DMA.D inst_RW_000_DMA.C \ -inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_INT.D inst_RW_000_INT.C \ -inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_LDS_000_INT.D \ -inst_LDS_000_INT.C inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C \ -inst_AS_000_DMA.D inst_AS_000_DMA.C inst_BGACK_030_INT_D.D \ -inst_BGACK_030_INT_D.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.D \ -inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C SIZE_1_ \ -AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR DTACK RW SIZE_0_ AHIGH_30_ \ -AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ AS_030.OE \ -AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE \ -AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE \ -AHIGH_31_.OE A_0_.OE BERR.OE DTACK.OE RW.OE DS_030.OE DSACK1.OE CIIN.OE \ -cpu_est_2_.D.X1 cpu_est_2_.D.X2 CLK_030_PE_0_.D.X1 CLK_030_PE_0_.D.X2 \ -RST_DLY_1_.D.X1 RST_DLY_1_.D.X2 SM_AMIGA_3_.D.X1 SM_AMIGA_3_.D.X2 \ -SM_AMIGA_i_7_.D.X1 SM_AMIGA_i_7_.D.X2 -.names nEXP_SPACE.BLIF RST.BLIF inst_AS_030_000_SYNC.BLIF CLK_000_D_3_.BLIF \ -CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF CLK_000_D_4_.BLIF SM_AMIGA_6_.BLIF \ -SM_AMIGA_i_7_.BLIF SM_AMIGA_6_.D -1100--100 1 --1---0-1- 1 --1--1--1- 1 -----01-1- 0 -------00- 0 ----1---0- 0 ---1----0- 0 -0------0- 0 --0------- 0 --------01 0 -.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_6_.BLIF \ -SM_AMIGA_5_.BLIF SM_AMIGA_5_.D -1011- 1 -1-1-1 1 -10--1 1 --10-- 0 -0---- 0 ----00 0 ---0-0 0 --1--0 0 +CLK_000_D_3_.C CLK_000_D_4_.D CLK_000_D_4_.C SIZE_DMA_0_.D SIZE_DMA_0_.C \ +SIZE_DMA_1_.D SIZE_DMA_1_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D \ +CYCLE_DMA_1_.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C \ +cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C CLK_000_D_0_.D CLK_000_D_0_.C \ +inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_VPA_D.D \ +inst_VPA_D.C inst_DTACK_D0.D inst_DTACK_D0.C inst_DS_000_ENABLE.D \ +inst_DS_000_ENABLE.C BG_000DFFreg.D BG_000DFFreg.C inst_LDS_000_INT.D \ +inst_LDS_000_INT.C inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_INT.D \ +inst_RW_000_INT.C inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C \ +inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_AS_000_DMA.D \ +inst_AS_000_DMA.C inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DSACK1_INT.D \ +inst_DSACK1_INT.C inst_AS_000_INT.D inst_AS_000_INT.C inst_AMIGA_DS.D \ +inst_AMIGA_DS.C inst_A0_DMA.D inst_A0_DMA.C inst_RW_000_DMA.D \ +inst_RW_000_DMA.C inst_AS_030_D0.D inst_AS_030_D0.C \ +inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AMIGA_BUS_ENABLE_DMA_LOW.C \ +inst_AS_030_D1.D inst_AS_030_D1.C inst_UDS_000_INT.D inst_UDS_000_INT.C \ +inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C CLK_OUT_INTreg.D \ +CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C \ +inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C SIZE_1_ AHIGH_31_ AS_030 AS_000 \ +RW_000 UDS_000 LDS_000 BERR RW SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ \ +AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ N_60 AS_030.OE AS_000.OE RW_000.OE \ +UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE \ +AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE \ +A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE VMA.OE CIIN.OE cpu_est_2_.D.X1 \ +cpu_est_2_.D.X2 SM_AMIGA_3_.D.X1 SM_AMIGA_3_.D.X2 SM_AMIGA_i_7_.D.X1 \ +SM_AMIGA_i_7_.D.X2 .names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_4_.BLIF \ SM_AMIGA_5_.BLIF SM_AMIGA_4_.D 1-01- 1 @@ -116,8 +89,8 @@ SM_AMIGA_5_.BLIF SM_AMIGA_4_.D -0-0- 0 0---- 0 ---00 0 -.names RST.BLIF inst_VMA_INTreg.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF \ -cpu_est_3_.BLIF cpu_est_0_.BLIF inst_VPA_D.BLIF inst_DTACK_D0.BLIF \ +.names RST.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF \ +cpu_est_3_.BLIF inst_VMA_INTreg.BLIF inst_VPA_D.BLIF inst_DTACK_D0.BLIF \ CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF \ BERR.PIN.BLIF SM_AMIGA_2_.D 1000100-101-- 1 @@ -156,18 +129,6 @@ SM_AMIGA_0_.BLIF SM_AMIGA_0_.D ---00 0 --1-0 0 -0--0 0 -.names cpu_est_1_.BLIF cpu_est_2_.BLIF cpu_est_3_.BLIF cpu_est_0_.BLIF \ -CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF cpu_est_3_.D -11-110 1 --010-- 1 ---1-0- 1 ---1--1 1 ---00-- 0 -01--10 0 --1-010 0 --0-110 0 ---0-0- 0 ---0--1 0 .names IPL_2_.BLIF RST.BLIF IPL_1_.BLIF IPL_0_.BLIF IPL_D0_0_.BLIF \ IPL_D0_1_.BLIF IPL_D0_2_.BLIF IPL_030DFF_0_reg.BLIF IPL_030DFF_0_reg.D 0-01100- 1 @@ -249,6 +210,43 @@ IPL_D0_1_.BLIF IPL_D0_2_.BLIF IPL_030DFF_2_reg.BLIF IPL_030DFF_2_reg.D 1- 1 -0 1 01 0 +.names nEXP_SPACE.BLIF RST.BLIF inst_AS_030_000_SYNC.BLIF CLK_000_D_3_.BLIF \ +CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF CLK_000_D_4_.BLIF SM_AMIGA_6_.BLIF \ +SM_AMIGA_i_7_.BLIF SM_AMIGA_6_.D +1100--100 1 +-1---0-1- 1 +-1--1--1- 1 +----01-1- 0 +------00- 0 +---1---0- 0 +--1----0- 0 +0------0- 0 +-0------- 0 +-------01 0 +.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_6_.BLIF \ +SM_AMIGA_5_.BLIF SM_AMIGA_5_.D +1011- 1 +1-1-1 1 +10--1 1 +-10-- 0 +0---- 0 +---00 0 +--0-0 0 +-1--0 0 +.names RST.BLIF inst_BGACK_030_INTreg.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ +SIZE_DMA_0_.D +-01- 1 +0--- 1 +-0-1 1 +1-00 0 +11-- 0 +.names RST.BLIF inst_BGACK_030_INTreg.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ +SIZE_DMA_1_.D +-000 1 +0--- 1 +1-1- 0 +11-- 0 +1--1 0 .names RST.BLIF inst_BGACK_030_INTreg.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF \ CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF AS_000.PIN.BLIF CYCLE_DMA_0_.D 10--110 1 @@ -271,42 +269,6 @@ CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF AS_000.PIN.BLIF CYCLE_DMA_1_.D -1----- 0 0------ 0 ------1 0 -.names RST.BLIF inst_AS_000_DMA.BLIF CLK_030_PE_1_.BLIF inst_AMIGA_DS.BLIF \ -inst_CLK_OUT_PRE_D.BLIF CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF CLK_030_PE_0_.BLIF \ -CLK_OUT_INTreg.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF CLK_030_PE_1_.D -10-01-11001 1 -1-10--1--01 1 -10-0101100- 1 -10-0110100- 1 -1-10-01--0- 1 -1-10-10--0- 1 ------11---0 0 ------00---- 0 ---0-----1-- 0 ---0----0--- 0 ---0-0------ 0 --10-------- 0 ----------1- 0 ----1------- 0 -0---------- 0 -.names RST.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -SIZE_DMA_0_.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_DMA_0_.D --111-- 1 --0--1- 1 -0----- 1 --0---1 1 -10--00 0 -11-0-- 0 -110--- 0 -.names RST.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -SIZE_DMA_1_.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_DMA_1_.D --111-- 1 --0--00 1 -0----- 1 -10--1- 0 -11-0-- 0 -110--- 0 -10---1 0 .names cpu_est_0_.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF cpu_est_0_.D 010 1 10- 1 @@ -314,59 +276,172 @@ SIZE_DMA_1_.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_DMA_1_.D 110 0 00- 0 0-1 0 -.names cpu_est_1_.BLIF cpu_est_3_.BLIF cpu_est_0_.BLIF CLK_000_D_1_.BLIF \ +.names cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_3_.BLIF CLK_000_D_1_.BLIF \ CLK_000_D_0_.BLIF cpu_est_1_.D -00110 1 -1-0-- 1 -1--0- 1 -1---1 1 -01--- 0 -1-110 0 -0--0- 0 -0-0-- 0 -0---1 0 -.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF RST_DLY_0_.BLIF \ -RST_DLY_1_.BLIF RST_DLY_2_.BLIF RST_DLY_0_.D -1--111 1 -1100-- 1 -1-11-- 1 -10-1-- 1 --1010- 0 --101-0 0 ---10-- 0 --0-0-- 0 -0----- 0 -.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF RST_DLY_0_.BLIF \ -RST_DLY_1_.BLIF RST_DLY_2_.BLIF RST_DLY_2_.D -11011- 1 -1----1 1 -0----- 0 -----00 0 ----0-0 0 ---1--0 0 --0---0 0 -.names CLK_030.BLIF RST.BLIF inst_DS_000_DMA.BLIF CLK_030_PE_1_.BLIF \ -inst_AMIGA_DS.BLIF inst_CLK_OUT_PRE_D.BLIF CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF \ -CLK_030_PE_0_.BLIF CLK_OUT_INTreg.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF \ -inst_DS_000_DMA.D ---1--1---0-1 1 ---1-----0--0 1 ---11-------0 1 -0-1--------0 1 -------00---- 1 -------11---0 1 -----------1- 1 -----1------- 1 --0---------- 1 --10-0--1--01 0 -11-00-011-00 0 -11-00-101-00 0 --10-0-01--0- 0 --10-0-10--0- 0 --1--0--1-101 0 --1--0-1--101 0 --1--00-1--01 0 --1--001---01 0 +10010 1 +01--- 1 +-1-0- 1 +-1--1 1 +-01-- 0 +11-10 0 +-0-0- 0 +00--- 0 +-0--1 0 +.names cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF cpu_est_3_.BLIF \ +CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF cpu_est_3_.D +111-10 1 +0--1-- 1 +---10- 1 +---1-1 1 +1-0-10 0 +10--10 0 +---00- 0 +0--0-- 0 +---0-1 0 +.names RST.BLIF A_1_.BLIF inst_BGACK_030_INTreg.BLIF \ +inst_AMIGA_BUS_ENABLE_DMA_HIGH.D +-1- 1 +0-- 1 +--1 1 +100 0 +.names VPA.BLIF RST.BLIF inst_VPA_D.D +1- 1 +-0 1 +01 0 +.names DTACK.BLIF RST.BLIF inst_DTACK_D0.D +1- 1 +-0 1 +01 0 +.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF inst_DS_000_ENABLE.BLIF \ +SM_AMIGA_6_.BLIF SM_AMIGA_4_.BLIF AS_030.PIN.BLIF RW.PIN.BLIF \ +inst_DS_000_ENABLE.D +101--1-- 1 +101-1--1 1 +1--1--0- 1 +----001- 0 +---000-- 0 +-----010 0 +--0---1- 0 +-1----1- 0 +---0-0-0 0 +--00---- 0 +-1-0---- 0 +0------- 0 +.names nEXP_SPACE.BLIF BG_030.BLIF RST.BLIF inst_AS_030_D0.BLIF \ +CLK_000_D_0_.BLIF BG_000DFFreg.BLIF BG_000DFFreg.D +----01 1 +---0-1 1 +0----1 1 +--0--- 1 +-1---- 1 +10111- 0 +-01--0 0 +.names RST.BLIF inst_LDS_000_INT.BLIF SM_AMIGA_6_.BLIF SIZE_0_.PIN.BLIF \ +SIZE_1_.PIN.BLIF A_0_.PIN.BLIF inst_LDS_000_INT.D +--1100 1 +-10--- 1 +0----- 1 +100--- 0 +1-1-1- 0 +1-10-- 0 +1-1--1 0 +.names RST.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF \ +cpu_est_3_.BLIF inst_VMA_INTreg.BLIF inst_VPA_D.BLIF CLK_000_D_1_.BLIF \ +CLK_000_D_0_.BLIF inst_VMA_INTreg.D +-0000--01 1 +-----11-- 1 +-----1--1 1 +-----1-0- 1 +--0--1--- 1 +----11--- 1 +---1-1--- 1 +-0---1--- 1 +0-------- 1 +11100-010 0 +1---10--- 0 +1--1-0--- 0 +1----0-1- 0 +1-1--0--- 0 +11---0--- 0 +1----0--0 0 +.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_6_.BLIF \ +inst_RW_000_INT.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_i_7_.BLIF RW.PIN.BLIF \ +inst_RW_000_INT.D +---01--- 1 +-01--1-- 1 +-011---1 1 +--0-1--- 1 +-1--1--- 1 +------0- 1 +0------- 1 +1011-010 0 +1--0001- 0 +1-0-0-1- 0 +11--0-1- 0 +.names FC_1_.BLIF nEXP_SPACE.BLIF RST.BLIF A_DECODE_19_.BLIF A_DECODE_18_.BLIF \ +A_DECODE_17_.BLIF A_DECODE_16_.BLIF FC_0_.BLIF inst_BGACK_030_INTreg.BLIF \ +inst_AS_030_D1.BLIF inst_AS_030_000_SYNC.BLIF inst_BGACK_030_INT_D.BLIF \ +SM_AMIGA_i_7_.BLIF AS_030.PIN.BLIF inst_AS_030_000_SYNC.D +1--00101--1--- 1 +----------1-1- 1 +----------10-- 1 +---------11--- 1 +--------0-1--- 1 +-0--------1--- 1 +--0----------- 1 +-------------1 1 +-11----010-100 0 +-11---1-10-100 0 +-11--0--10-100 0 +-11-1---10-100 0 +-111----10-100 0 +011-----10-100 0 +--1-------0--0 0 +.names BGACK_000.BLIF RST.BLIF inst_BGACK_030_INTreg.BLIF CLK_000_D_1_.BLIF \ +CLK_000_D_0_.BLIF AS_000.PIN.BLIF inst_BGACK_030_INTreg.D +1--101 1 +1-1--- 1 +-0---- 1 +-10-1- 0 +-100-- 0 +01---- 0 +-10--0 0 +.names RST.BLIF inst_AS_000_DMA.BLIF inst_AMIGA_DS.BLIF \ +inst_CLK_OUT_PRE_D.BLIF CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF \ +CLK_OUT_INTreg.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF inst_AS_000_DMA.D +-1-1--0-- 1 +----11--0 1 +----00--- 1 +-------1- 1 +--1------ 1 +0-------- 1 +100--1-01 0 +1-00-1-01 0 +1-0--1101 0 +1-0-0110- 0 +1-0001-0- 0 +100-01-0- 0 +1-0-1010- 0 +1-0010-0- 0 +100-10-0- 0 +.names RST.BLIF inst_DS_000_DMA.BLIF inst_AMIGA_DS.BLIF \ +inst_CLK_OUT_PRE_D.BLIF CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF \ +CLK_OUT_INTreg.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF inst_DS_000_DMA.D +-1-1--0-- 1 +----11--0 1 +----00--- 1 +-------1- 1 +--1------ 1 +0-------- 1 +100--1-01 0 +1-00-1-01 0 +1-0--1101 0 +1-0-0110- 0 +1-0001-0- 0 +100-01-0- 0 +1-0-1010- 0 +1-0010-0- 0 +100-10-0- 0 .names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_1_.BLIF \ inst_DSACK1_INT.BLIF AS_030.PIN.BLIF inst_DSACK1_INT.D ---01- 1 @@ -394,70 +469,31 @@ inst_AS_000_INT.BLIF AS_030.PIN.BLIF inst_AS_000_INT.D -11 1 10- 0 1-0 0 +.names RST.BLIF inst_BGACK_030_INTreg.BLIF UDS_000.PIN.BLIF inst_A0_DMA.D +0-- 1 +-01 1 +11- 0 +1-0 0 +.names RST.BLIF inst_BGACK_030_INTreg.BLIF RW_000.PIN.BLIF inst_RW_000_DMA.D +-1- 1 +0-- 1 +--1 1 +100 0 .names RST.BLIF AS_030.PIN.BLIF inst_AS_030_D0.D 0- 1 -1 1 10 0 -.names RST.BLIF DTACK.PIN.BLIF inst_DTACK_D0.D -0- 1 --1 1 -10 0 -.names VPA.BLIF RST.BLIF inst_VPA_D.D -1- 1 --0 1 -01 0 -.names RST.BLIF inst_RESET_OUT.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF \ -RST_DLY_0_.BLIF RST_DLY_1_.BLIF RST_DLY_2_.BLIF inst_RESET_OUT.D -1-10111 1 -11----- 1 -0------ 0 --0---0- 0 --0--0-- 0 --0-1--- 0 --00---- 0 --0----0 0 -.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF inst_DS_000_ENABLE.BLIF \ -SM_AMIGA_6_.BLIF SM_AMIGA_4_.BLIF AS_030.PIN.BLIF RW.PIN.BLIF \ -inst_DS_000_ENABLE.D -101--1-- 1 -101-1--1 1 -1--1--0- 1 -----001- 0 ----000-- 0 ------010 0 ---0---1- 0 --1----1- 0 ----0-0-0 0 ---00---- 0 --1-0---- 0 -0------- 0 -.names nEXP_SPACE.BLIF BG_030.BLIF RST.BLIF inst_AS_030_D0.BLIF \ -CLK_000_D_0_.BLIF BG_000DFFreg.BLIF BG_000DFFreg.D ---0--- 1 --1---- 1 -----01 1 ----0-1 1 -0----1 1 -10111- 0 --01--0 0 .names RST.BLIF A_1_.BLIF inst_BGACK_030_INTreg.BLIF \ -inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF inst_BGACK_030_INT_D.BLIF \ -inst_AMIGA_BUS_ENABLE_DMA_HIGH.D ---11- 1 --10-- 1 ---1-0 1 -0---- 1 -1-101 0 -100-- 0 -.names RST.BLIF A_1_.BLIF inst_BGACK_030_INTreg.BLIF \ -inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF inst_BGACK_030_INT_D.BLIF \ inst_AMIGA_BUS_ENABLE_DMA_LOW.D ---11- 1 --00-- 1 ---1-0 1 -0---- 1 -1-101 0 -110-- 0 +-0- 1 +0-- 1 +--1 1 +110 0 +.names RST.BLIF inst_AS_030_D0.BLIF inst_AS_030_D1.BLIF inst_AS_030_D1.D +11- 1 +0-1 1 +10- 0 +0-0 0 .names RST.BLIF inst_UDS_000_INT.BLIF SM_AMIGA_6_.BLIF A_0_.PIN.BLIF \ inst_UDS_000_INT.D -10- 1 @@ -465,110 +501,6 @@ inst_UDS_000_INT.D --11 1 100- 0 1-10 0 -.names RST.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -inst_A0_DMA.BLIF UDS_000.PIN.BLIF inst_A0_DMA.D --111- 1 -0---- 1 --0--1 1 -11-0- 0 -110-- 0 -10--0 0 -.names RST.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -inst_RW_000_DMA.BLIF RW_000.PIN.BLIF inst_RW_000_DMA.D --1-1- 1 --10-- 1 -0---- 1 --0--1 1 -1110- 0 -10--0 0 -.names RST.BLIF inst_VMA_INTreg.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF \ -cpu_est_3_.BLIF cpu_est_0_.BLIF inst_VPA_D.BLIF CLK_000_D_1_.BLIF \ -CLK_000_D_0_.BLIF inst_VMA_INTreg.D ---0000-01 1 --1----1-- 1 --1------1 1 --1-----0- 1 --1---0--- 1 --1--1---- 1 --1-1----- 1 --10------ 1 -0-------- 1 -1-1001010 0 -10--1---- 0 -10-1----- 0 -10-----1- 0 -10---1--- 0 -101------ 0 -10------0 0 -.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_6_.BLIF \ -SM_AMIGA_0_.BLIF inst_RW_000_INT.BLIF SM_AMIGA_i_7_.BLIF RW.PIN.BLIF \ -inst_RW_000_INT.D --01-1--- 1 --011---1 1 ----0-1-- 1 ---0--1-- 1 --1---1-- 1 -------0- 1 -0------- 1 -10110-10 0 -1--0001- 0 -1-0--01- 0 -11---01- 0 -.names FC_1_.BLIF nEXP_SPACE.BLIF RST.BLIF A_DECODE_19_.BLIF A_DECODE_18_.BLIF \ -A_DECODE_17_.BLIF A_DECODE_16_.BLIF FC_0_.BLIF inst_BGACK_030_INTreg.BLIF \ -inst_AS_030_D0.BLIF inst_AS_030_000_SYNC.BLIF inst_BGACK_030_INT_D.BLIF \ -SM_AMIGA_i_7_.BLIF AS_030.PIN.BLIF inst_AS_030_000_SYNC.D -1--00101--1--- 1 -----------1-1- 1 -----------10-- 1 ----------11--- 1 ---------0-1--- 1 --0--------1--- 1 ---0----------- 1 --------------1 1 --11----010-100 0 --11---1-10-100 0 --11--0--10-100 0 --11-1---10-100 0 --111----10-100 0 -011-----10-100 0 ---1-------0--0 0 -.names RST.BLIF inst_LDS_000_INT.BLIF SM_AMIGA_6_.BLIF SIZE_0_.PIN.BLIF \ -SIZE_1_.PIN.BLIF A_0_.PIN.BLIF inst_LDS_000_INT.D ---1100 1 --10--- 1 -0----- 1 -100--- 0 -1-1-1- 0 -1-10-- 0 -1-1--1 0 -.names BGACK_000.BLIF RST.BLIF inst_BGACK_030_INTreg.BLIF CLK_000_D_1_.BLIF \ -CLK_000_D_0_.BLIF AS_000.PIN.BLIF inst_BGACK_030_INTreg.D -1--101 1 -1-1--- 1 --0---- 1 --10-1- 0 --100-- 0 -01---- 0 --10--0 0 -.names RST.BLIF inst_AS_000_DMA.BLIF inst_AMIGA_DS.BLIF \ -inst_CLK_OUT_PRE_D.BLIF CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF \ -CLK_OUT_INTreg.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF inst_AS_000_DMA.D --1-1--0-- 1 -----11--0 1 -----00--- 1 --------1- 1 ---1------ 1 -0-------- 1 -100--1-01 0 -1-00-1-01 0 -1-0--1101 0 -1-0-1010- 0 -1-0010-0- 0 -100-10-0- 0 -1-0-0110- 0 -1-0001-0- 0 -100-01-0- 0 .names RST.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.D 0- 1 -1 1 @@ -576,6 +508,25 @@ CLK_OUT_INTreg.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF inst_AS_000_DMA.D .names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D 0 1 1 0 +.names A_DECODE_23_.BLIF nEXP_SPACE.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF \ +A_DECODE_20_.BLIF inst_AS_030_D0.BLIF AHIGH_24_.PIN.BLIF AHIGH_25_.PIN.BLIF \ +AHIGH_26_.PIN.BLIF AHIGH_27_.PIN.BLIF AHIGH_28_.PIN.BLIF AHIGH_29_.PIN.BLIF \ +AHIGH_30_.PIN.BLIF AHIGH_31_.PIN.BLIF N_60 +1-111000000000 1 +-1------------ 1 +-0----------1- 0 +-0---------1-- 0 +-0--------1--- 0 +-0-------1---- 0 +-0------1----- 0 +-0-----1------ 0 +-0----1------- 0 +-0---1-------- 0 +-0--0--------- 0 +-0-0---------- 0 +-00----------- 0 +00------------ 0 +-0-----------1 0 .names IPL_030DFF_2_reg.BLIF IPL_030_2_ 1 1 0 0 @@ -669,15 +620,6 @@ AHIGH_31_.PIN.BLIF CIIN .names IPL_030DFF_0_reg.BLIF IPL_030_0_ 1 1 0 0 -.names CLK_OSZI.BLIF SM_AMIGA_i_7_.C -1 1 -0 0 -.names CLK_OSZI.BLIF SM_AMIGA_6_.C -1 1 -0 0 -.names CLK_OSZI.BLIF SM_AMIGA_5_.C -1 1 -0 0 .names CLK_OSZI.BLIF SM_AMIGA_4_.C 1 1 0 0 @@ -693,12 +635,6 @@ AHIGH_31_.PIN.BLIF CIIN .names CLK_OSZI.BLIF SM_AMIGA_0_.C 1 1 0 0 -.names CLK_OSZI.BLIF cpu_est_2_.C -1 1 -0 0 -.names CLK_OSZI.BLIF cpu_est_3_.C -1 1 -0 0 .names CLK_OSZI.BLIF IPL_030DFF_0_reg.C 1 1 0 0 @@ -717,10 +653,13 @@ AHIGH_31_.PIN.BLIF CIIN .names CLK_OSZI.BLIF IPL_D0_2_.C 1 1 0 0 -.names CLK_000.BLIF CLK_000_D_0_.D +.names CLK_OSZI.BLIF SM_AMIGA_i_7_.C 1 1 0 0 -.names CLK_OSZI.BLIF CLK_000_D_0_.C +.names CLK_OSZI.BLIF SM_AMIGA_6_.C +1 1 +0 0 +.names CLK_OSZI.BLIF SM_AMIGA_5_.C 1 1 0 0 .names CLK_000_D_0_.BLIF CLK_000_D_1_.D @@ -747,37 +686,67 @@ AHIGH_31_.PIN.BLIF CIIN .names CLK_OSZI.BLIF CLK_000_D_4_.C 1 1 0 0 -.names CLK_OSZI.BLIF CYCLE_DMA_0_.C -1 1 -0 0 -.names CLK_OSZI.BLIF CYCLE_DMA_1_.C -1 1 -0 0 -.names CLK_OSZI.BLIF CLK_030_PE_0_.C -1 1 -0 0 -.names CLK_OSZI.BLIF CLK_030_PE_1_.C -1 1 -0 0 .names CLK_OSZI.BLIF SIZE_DMA_0_.C 1 1 0 0 .names CLK_OSZI.BLIF SIZE_DMA_1_.C 1 1 0 0 +.names CLK_OSZI.BLIF CYCLE_DMA_0_.C +1 1 +0 0 +.names CLK_OSZI.BLIF CYCLE_DMA_1_.C +1 1 +0 0 .names CLK_OSZI.BLIF cpu_est_0_.C 1 1 0 0 .names CLK_OSZI.BLIF cpu_est_1_.C 1 1 0 0 -.names CLK_OSZI.BLIF RST_DLY_0_.C +.names CLK_OSZI.BLIF cpu_est_2_.C 1 1 0 0 -.names CLK_OSZI.BLIF RST_DLY_1_.C +.names CLK_OSZI.BLIF cpu_est_3_.C 1 1 0 0 -.names CLK_OSZI.BLIF RST_DLY_2_.C +.names CLK_000.BLIF CLK_000_D_0_.D +1 1 +0 0 +.names CLK_OSZI.BLIF CLK_000_D_0_.C +1 1 +0 0 +.names CLK_OSZI.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.C +1 1 +0 0 +.names CLK_OSZI.BLIF inst_VPA_D.C +1 1 +0 0 +.names CLK_OSZI.BLIF inst_DTACK_D0.C +1 1 +0 0 +.names CLK_OSZI.BLIF inst_DS_000_ENABLE.C +1 1 +0 0 +.names CLK_OSZI.BLIF BG_000DFFreg.C +1 1 +0 0 +.names CLK_OSZI.BLIF inst_LDS_000_INT.C +1 1 +0 0 +.names CLK_OSZI.BLIF inst_VMA_INTreg.C +1 1 +0 0 +.names CLK_OSZI.BLIF inst_RW_000_INT.C +1 1 +0 0 +.names CLK_OSZI.BLIF inst_AS_030_000_SYNC.C +1 1 +0 0 +.names CLK_OSZI.BLIF inst_BGACK_030_INTreg.C +1 1 +0 0 +.names CLK_OSZI.BLIF inst_AS_000_DMA.C 1 1 0 0 .names CLK_OSZI.BLIF inst_DS_000_DMA.C @@ -792,55 +761,22 @@ AHIGH_31_.PIN.BLIF CIIN .names CLK_OSZI.BLIF inst_AMIGA_DS.C 1 1 0 0 -.names CLK_OSZI.BLIF inst_AS_030_D0.C -1 1 -0 0 -.names CLK_OSZI.BLIF inst_DTACK_D0.C -1 1 -0 0 -.names CLK_OSZI.BLIF inst_VPA_D.C -1 1 -0 0 -.names CLK_OSZI.BLIF inst_RESET_OUT.C -1 1 -0 0 -.names CLK_OSZI.BLIF inst_DS_000_ENABLE.C -1 1 -0 0 -.names CLK_OSZI.BLIF BG_000DFFreg.C -1 1 -0 0 -.names CLK_OSZI.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.C -1 1 -0 0 -.names CLK_OSZI.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.C -1 1 -0 0 -.names CLK_OSZI.BLIF inst_UDS_000_INT.C -1 1 -0 0 .names CLK_OSZI.BLIF inst_A0_DMA.C 1 1 0 0 .names CLK_OSZI.BLIF inst_RW_000_DMA.C 1 1 0 0 -.names CLK_OSZI.BLIF inst_VMA_INTreg.C +.names CLK_OSZI.BLIF inst_AS_030_D0.C 1 1 0 0 -.names CLK_OSZI.BLIF inst_RW_000_INT.C +.names CLK_OSZI.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.C 1 1 0 0 -.names CLK_OSZI.BLIF inst_AS_030_000_SYNC.C +.names CLK_OSZI.BLIF inst_AS_030_D1.C 1 1 0 0 -.names CLK_OSZI.BLIF inst_LDS_000_INT.C -1 1 -0 0 -.names CLK_OSZI.BLIF inst_BGACK_030_INTreg.C -1 1 -0 0 -.names CLK_OSZI.BLIF inst_AS_000_DMA.C +.names CLK_OSZI.BLIF inst_UDS_000_INT.C 1 1 0 0 .names CLK_OSZI.BLIF inst_BGACK_030_INT_D.C @@ -877,18 +813,16 @@ AHIGH_31_.PIN.BLIF CIIN .names inst_RW_000_INT.BLIF RW_000 1 1 0 0 -.names inst_DS_000_ENABLE.BLIF inst_UDS_000_INT.BLIF UDS_000 -0- 1 --1 1 -10 0 -.names inst_LDS_000_INT.BLIF inst_DS_000_ENABLE.BLIF LDS_000 +.names inst_UDS_000_INT.BLIF inst_DS_000_ENABLE.BLIF UDS_000 1- 1 -0 1 01 0 +.names inst_DS_000_ENABLE.BLIF inst_LDS_000_INT.BLIF LDS_000 +0- 1 +-1 1 +10 0 .names BERR 0 -.names DTACK - 0 .names inst_RW_000_DMA.BLIF RW 1 1 0 0 @@ -912,81 +846,58 @@ AHIGH_31_.PIN.BLIF CIIN .names inst_A0_DMA.BLIF A_0_ 1 1 0 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF \ -AS_030.OE -001 1 --1- 0 -1-- 0 ---0 0 -.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF AS_000.OE +.names inst_BGACK_030_INTreg.BLIF AS_030.OE +0 1 +1 0 +.names RST.BLIF inst_BGACK_030_INTreg.BLIF AS_000.OE 11 1 0- 0 -0 0 -.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF RW_000.OE +.names RST.BLIF inst_BGACK_030_INTreg.BLIF RW_000.OE 11 1 0- 0 -0 0 -.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF UDS_000.OE +.names RST.BLIF inst_BGACK_030_INTreg.BLIF UDS_000.OE 11 1 0- 0 -0 0 -.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF LDS_000.OE +.names RST.BLIF inst_BGACK_030_INTreg.BLIF LDS_000.OE 11 1 0- 0 -0 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF SIZE_0_.OE -00 1 -1- 0 --1 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF SIZE_1_.OE -00 1 -1- 0 --1 0 -.names nEXP_SPACE.BLIF RESET.BLIF inst_BGACK_030_INTreg.BLIF AHIGH_24_.OE -010 1 --0- 0 -1-- 0 ---1 0 -.names nEXP_SPACE.BLIF RESET.BLIF inst_BGACK_030_INTreg.BLIF AHIGH_25_.OE -010 1 --0- 0 -1-- 0 ---1 0 -.names nEXP_SPACE.BLIF RESET.BLIF inst_BGACK_030_INTreg.BLIF AHIGH_26_.OE -010 1 --0- 0 -1-- 0 ---1 0 -.names nEXP_SPACE.BLIF RESET.BLIF inst_BGACK_030_INTreg.BLIF AHIGH_27_.OE -010 1 --0- 0 -1-- 0 ---1 0 -.names nEXP_SPACE.BLIF RESET.BLIF inst_BGACK_030_INTreg.BLIF AHIGH_28_.OE -010 1 --0- 0 -1-- 0 ---1 0 -.names nEXP_SPACE.BLIF RESET.BLIF inst_BGACK_030_INTreg.BLIF AHIGH_29_.OE -010 1 --0- 0 -1-- 0 ---1 0 -.names nEXP_SPACE.BLIF RESET.BLIF inst_BGACK_030_INTreg.BLIF AHIGH_30_.OE -010 1 --0- 0 -1-- 0 ---1 0 -.names nEXP_SPACE.BLIF RESET.BLIF inst_BGACK_030_INTreg.BLIF AHIGH_31_.OE -010 1 --0- 0 -1-- 0 ---1 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF A_0_.OE -001 1 --1- 0 -1-- 0 ---0 0 +.names inst_BGACK_030_INTreg.BLIF SIZE_0_.OE +0 1 +1 0 +.names inst_BGACK_030_INTreg.BLIF SIZE_1_.OE +0 1 +1 0 +.names inst_BGACK_030_INTreg.BLIF AHIGH_24_.OE +0 1 +1 0 +.names inst_BGACK_030_INTreg.BLIF AHIGH_25_.OE +0 1 +1 0 +.names inst_BGACK_030_INTreg.BLIF AHIGH_26_.OE +0 1 +1 0 +.names inst_BGACK_030_INTreg.BLIF AHIGH_27_.OE +0 1 +1 0 +.names inst_BGACK_030_INTreg.BLIF AHIGH_28_.OE +0 1 +1 0 +.names inst_BGACK_030_INTreg.BLIF AHIGH_29_.OE +0 1 +1 0 +.names inst_BGACK_030_INTreg.BLIF AHIGH_30_.OE +0 1 +1 0 +.names inst_BGACK_030_INTreg.BLIF AHIGH_31_.OE +0 1 +1 0 +.names inst_BGACK_030_INTreg.BLIF A_0_.OE +0 1 +1 0 .names FC_1_.BLIF BGACK_000.BLIF FPU_SENSE.BLIF A_DECODE_19_.BLIF \ A_DECODE_18_.BLIF A_DECODE_17_.BLIF A_DECODE_16_.BLIF FC_0_.BLIF \ AS_030.PIN.BLIF BERR.OE @@ -1000,105 +911,38 @@ AS_030.PIN.BLIF BERR.OE -0------- 0 0-------- 0 --------1 0 -.names inst_AS_000_DMA.BLIF DTACK.OE +.names inst_BGACK_030_INTreg.BLIF RW.OE 0 1 1 0 -.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF RW.OE -01 1 -1- 0 +.names inst_BGACK_030_INTreg.BLIF DS_030.OE +0 1 +1 0 +.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF DSACK1.OE +11 1 +0- 0 -0 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF \ -DS_030.OE -001 1 --1- 0 -1-- 0 ---0 0 -.names nEXP_SPACE.BLIF DSACK1.OE +.names inst_BGACK_030_INTreg.BLIF VMA.OE +1 1 +0 0 +.names N_60.BLIF CIIN.OE 1 1 0 0 -.names A_DECODE_23_.BLIF nEXP_SPACE.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF \ -A_DECODE_20_.BLIF inst_AS_030_D0.BLIF AHIGH_24_.PIN.BLIF AHIGH_25_.PIN.BLIF \ -AHIGH_26_.PIN.BLIF AHIGH_27_.PIN.BLIF AHIGH_28_.PIN.BLIF AHIGH_29_.PIN.BLIF \ -AHIGH_30_.PIN.BLIF AHIGH_31_.PIN.BLIF CIIN.OE -1-111000000000 1 --1------------ 1 --0----------1- 0 --0---------1-- 0 --0--------1--- 0 --0-------1---- 0 --0------1----- 0 --0-----1------ 0 --0----1------- 0 --0---1-------- 0 --0--0--------- 0 --0-0---------- 0 --00----------- 0 -00------------ 0 --0-----------1 0 .names cpu_est_2_.BLIF cpu_est_2_.D.X1 1 1 0 0 -.names cpu_est_1_.BLIF cpu_est_2_.BLIF cpu_est_0_.BLIF CLK_000_D_1_.BLIF \ +.names cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF CLK_000_D_1_.BLIF \ CLK_000_D_0_.BLIF cpu_est_2_.D.X2 -1-110 1 +11-10 1 0---- 0 ---0-- 0 +-0--- 0 ---0- 0 ----1 0 -.names RST.BLIF inst_AMIGA_DS.BLIF AS_000.PIN.BLIF CLK_030_PE_0_.D.X1 -100 1 -0-- 0 --1- 0 ---1 0 -.names RST.BLIF inst_AS_000_DMA.BLIF CLK_030_PE_1_.BLIF inst_AMIGA_DS.BLIF \ -inst_CLK_OUT_PRE_D.BLIF CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF CLK_030_PE_0_.BLIF \ -CLK_OUT_INTreg.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF CLK_030_PE_0_.D.X2 -11-0---0-0- 1 -1--00--0-0- 1 -1--0-00--0- 1 -1--0---010- 1 -1--0-11--00 1 -10001--100- 1 -0---------- 0 ----1------- 0 ----------1- 0 --1---011--- 0 ---1--011--- 0 -----0011--- 0 --1---101--- 0 ---1--101--- 0 -----0101--- 0 ------0111-- 0 ------1011-- 0 --1---1-1--1 0 ---1--1-1--1 0 -----01-1--1 0 ------1-11-1 0 --0--10100-- 0 --0--11000-- 0 --0--11-00-1 0 -.names RST_DLY_1_.BLIF RST_DLY_1_.D.X1 -1 1 -0 0 -.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF RST_DLY_0_.BLIF \ -RST_DLY_1_.BLIF RST_DLY_2_.BLIF RST_DLY_1_.D.X2 -11010- 1 -0---1- 1 --10110 1 -10---- 0 -1-1--- 0 -1--0-- 0 -0---0- 0 --0--0- 0 ---1-0- 0 ----00- 0 -1---11 0 .names RST.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_3_.D.X1 11 1 0- 0 -0 0 -.names RST.BLIF inst_VMA_INTreg.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF \ -cpu_est_3_.BLIF cpu_est_0_.BLIF inst_VPA_D.BLIF inst_DTACK_D0.BLIF \ +.names RST.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF \ +cpu_est_3_.BLIF inst_VMA_INTreg.BLIF inst_VPA_D.BLIF inst_DTACK_D0.BLIF \ CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_3_.BLIF \ BERR.PIN.BLIF SM_AMIGA_3_.D.X2 1-------0110- 1 diff --git a/Logic/68030_tk.crf b/Logic/68030_tk.crf index 491c0f9..65c3b42 100644 --- a/Logic/68030_tk.crf +++ b/Logic/68030_tk.crf @@ -1,7 +1,7 @@ // Signal Name Cross Reference File // ispLEVER Classic 2.0.00.17.20.15 -// Design '68030_tk' created Thu Dec 29 16:01:56 2016 +// Design '68030_tk' created Sat Dec 30 00:43:37 2017 // LEGEND: '>' Functional Block Port Separator diff --git a/Logic/68030_tk.eq3 b/Logic/68030_tk.eq3 index fc3aa63..ad2f4c6 100644 --- a/Logic/68030_tk.eq3 +++ b/Logic/68030_tk.eq3 @@ -2,19 +2,27 @@ Copyright(C), 1992-2015, Lattice Semiconductor Corp. All Rights Reserved. -Design bus68030 created Thu Dec 29 16:01:56 2016 +Design bus68030 created Sat Dec 30 00:43:37 2017 P-Terms Fan-in Fan-out Type Name (attributes) --------- ------ ------- ---- ----------------- + 0 0 1 Pin AHIGH_27_ + 1 1 1 Pin AHIGH_27_.OE + 0 0 1 Pin AHIGH_26_ + 1 1 1 Pin AHIGH_26_.OE + 0 0 1 Pin AHIGH_25_ + 1 1 1 Pin AHIGH_25_.OE + 0 0 1 Pin AHIGH_24_ + 1 1 1 Pin AHIGH_24_.OE 0 0 1 Pin AHIGH_31_ - 1 3 1 Pin AHIGH_31_.OE + 1 1 1 Pin AHIGH_31_.OE 1 2 1 Pin AS_030- - 1 3 1 Pin AS_030.OE + 1 1 1 Pin AS_030.OE 1 2 1 Pin AS_000- 1 2 1 Pin AS_000.OE 1 2 1 Pin DS_030- - 1 3 1 Pin DS_030.OE + 1 1 1 Pin DS_030.OE 1 2 1 Pin UDS_000- 1 2 1 Pin UDS_000.OE 1 2 1 Pin LDS_000- @@ -25,41 +33,24 @@ Design bus68030 created Thu Dec 29 16:01:56 2016 1 1 1 Pin CLK_EXP 1 9 1 Pin FPU_CS- 1 2 1 Pin DSACK1- - 1 1 1 Pin DSACK1.OE - 0 0 1 Pin DTACK - 1 1 1 Pin DTACK.OE + 1 2 1 Pin DSACK1.OE 1 0 1 Pin AVEC 2 3 1 Pin E - 0 0 1 Pin AHIGH_30_ - 1 3 1 Pin AHIGH_30_.OE - 0 0 1 Pin AHIGH_29_ - 1 3 1 Pin AHIGH_29_.OE - 0 0 1 Pin AHIGH_28_ - 1 3 1 Pin AHIGH_28_.OE - 0 0 1 Pin AHIGH_27_ - 1 3 1 Pin AHIGH_27_.OE - 0 0 1 Pin AHIGH_26_ - 1 3 1 Pin AHIGH_26_.OE - 0 0 1 Pin AHIGH_25_ - 1 3 1 Pin AHIGH_25_.OE 0 0 1 Pin AMIGA_ADDR_ENABLE - 0 0 1 Pin AHIGH_24_ - 1 3 1 Pin AHIGH_24_.OE 2 4 1 Pin AMIGA_BUS_DATA_DIR 1 2 1 Pin AMIGA_BUS_ENABLE_LOW- 2 4 1 Pin AMIGA_BUS_ENABLE_HIGH- 1 13 1 Pin CIIN 1 1 1 Pin CIIN.OE - 1 3 1 Pin A_0_.OE - 3 5 1 Pin A_0_.D - 1 1 1 Pin A_0_.C - 1 2 1 Pin SIZE_1_.OE - 3 6 1 Pin SIZE_1_.D + 0 0 1 Pin AHIGH_30_ + 1 1 1 Pin AHIGH_30_.OE + 0 0 1 Pin AHIGH_29_ + 1 1 1 Pin AHIGH_29_.OE + 0 0 1 Pin AHIGH_28_ + 1 1 1 Pin AHIGH_28_.OE + 1 1 1 Pin SIZE_1_.OE + 2 4 1 Pin SIZE_1_.D 1 1 1 Pin SIZE_1_.C - 10 8 1 Pin IPL_030_1_.D- - 1 1 1 Pin IPL_030_1_.C - 10 8 1 Pin IPL_030_0_.D- - 1 1 1 Pin IPL_030_0_.C 10 8 1 Pin IPL_030_2_.D- 1 1 1 Pin IPL_030_2_.C 1 2 1 Pin RW_000.OE @@ -69,36 +60,44 @@ Design bus68030 created Thu Dec 29 16:01:56 2016 1 1 1 Pin BG_000.C 3 6 1 Pin BGACK_030.D 1 1 1 Pin BGACK_030.C - 1 2 1 Pin SIZE_0_.OE - 3 6 1 Pin SIZE_0_.D- - 1 1 1 Pin SIZE_0_.C + 1 1 1 Pin A_0_.OE + 2 3 1 Pin A_0_.D + 1 1 1 Pin A_0_.C + 10 8 1 Pin IPL_030_1_.D- + 1 1 1 Pin IPL_030_1_.C + 10 8 1 Pin IPL_030_0_.D- + 1 1 1 Pin IPL_030_0_.C + 1 1 1 Pin VMA.OE 3 9 1 Pin VMA.T 1 1 1 Pin VMA.C - 1 2 1 Pin RW.OE - 2 5 1 Pin RW.D- + 1 1 1 Pin RW.OE + 1 3 1 Pin RW.D- 1 1 1 Pin RW.C + 1 1 1 Pin SIZE_0_.OE + 2 4 1 Pin SIZE_0_.D- + 1 1 1 Pin SIZE_0_.C + 3 3 1 Node cpu_est_0_.D + 1 1 1 Node cpu_est_0_.C 4 5 1 Node cpu_est_1_.D 1 1 1 Node cpu_est_1_.C - 1 1 1 NodeX1 cpu_est_2_.D.X1 - 1 4 1 NodeX2 cpu_est_2_.D.X2 + 1 4 1 NodeX1 cpu_est_2_.D.X1 + 1 1 1 NodeX2 cpu_est_2_.D.X2 1 1 1 Node cpu_est_2_.C 4 6 1 Node cpu_est_3_.D 1 1 1 Node cpu_est_3_.C - 3 3 1 Node cpu_est_0_.D - 1 1 1 Node cpu_est_0_.C - 2 5 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- + 1 3 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- 1 1 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.C - 2 5 1 Node inst_AMIGA_BUS_ENABLE_DMA_LOW.D- + 1 3 1 Node inst_AMIGA_BUS_ENABLE_DMA_LOW.D- 1 1 1 Node inst_AMIGA_BUS_ENABLE_DMA_LOW.C 1 2 1 Node inst_AS_030_D0.D- 1 1 1 Node inst_AS_030_D0.C + 2 3 1 Node inst_AS_030_D1.D + 1 1 1 Node inst_AS_030_D1.C 7 14 1 Node inst_AS_030_000_SYNC.D- 1 1 1 Node inst_AS_030_000_SYNC.C - 1 2 1 Node inst_BGACK_030_INT_D.D- - 1 1 1 Node inst_BGACK_030_INT_D.C 6 9 1 Node inst_AS_000_DMA.D 1 1 1 Node inst_AS_000_DMA.C - 9 12 1 Node inst_DS_000_DMA.D + 6 9 1 Node inst_DS_000_DMA.D 1 1 1 Node inst_DS_000_DMA.C 1 2 1 Node inst_VPA_D.D- 1 1 1 Node inst_VPA_D.C @@ -106,10 +105,6 @@ Design bus68030 created Thu Dec 29 16:01:56 2016 1 1 1 Node CLK_000_D_3_.C 1 2 1 Node inst_DTACK_D0.D- 1 1 1 Node inst_DTACK_D0.C - 2 7 1 Node inst_RESET_OUT.D - 1 1 1 Node inst_RESET_OUT.C - 6 11 1 Node CLK_030_PE_1_.D - 1 1 1 Node CLK_030_PE_1_.C 2 3 1 Node inst_AMIGA_DS.D 1 1 1 Node inst_AMIGA_DS.C 1 1 1 Node CLK_000_D_1_.D @@ -130,12 +125,14 @@ Design bus68030 created Thu Dec 29 16:01:56 2016 1 1 1 Node CLK_000_D_2_.C 1 1 1 Node CLK_000_D_4_.D 1 1 1 Node CLK_000_D_4_.C - 3 6 1 Node inst_LDS_000_INT.D - 1 1 1 Node inst_LDS_000_INT.C - 3 8 1 Node inst_DS_000_ENABLE.D - 1 1 1 Node inst_DS_000_ENABLE.C 2 4 1 Node inst_UDS_000_INT.D- 1 1 1 Node inst_UDS_000_INT.C + 3 8 1 Node inst_DS_000_ENABLE.D + 1 1 1 Node inst_DS_000_ENABLE.C + 3 6 1 Node inst_LDS_000_INT.D + 1 1 1 Node inst_LDS_000_INT.C + 1 2 1 Node inst_BGACK_030_INT_D.D- + 1 1 1 Node inst_BGACK_030_INT_D.C 3 9 1 Node SM_AMIGA_6_.D 1 1 1 Node SM_AMIGA_6_.C 3 5 1 Node SM_AMIGA_4_.D @@ -148,15 +145,6 @@ Design bus68030 created Thu Dec 29 16:01:56 2016 1 1 1 Node CYCLE_DMA_0_.C 2 7 1 Node CYCLE_DMA_1_.D 1 1 1 Node CYCLE_DMA_1_.C - 9 11 1 Node CLK_030_PE_0_.D- - 1 1 1 Node CLK_030_PE_0_.C - 4 6 1 Node RST_DLY_0_.D - 1 1 1 Node RST_DLY_0_.C - 2 6 1 NodeX1 RST_DLY_1_.D.X1 - 1 2 1 NodeX2 RST_DLY_1_.D.X2 - 1 1 1 Node RST_DLY_1_.C - 2 6 1 Node RST_DLY_2_.D - 1 1 1 Node RST_DLY_2_.C 2 6 1 Node inst_DSACK1_INT.D- 1 1 1 Node inst_DSACK1_INT.C 2 6 1 Node inst_AS_000_INT.D- @@ -167,44 +155,60 @@ Design bus68030 created Thu Dec 29 16:01:56 2016 1 1 1 Node SM_AMIGA_3_.C 5 13 1 Node SM_AMIGA_2_.D 1 1 1 Node SM_AMIGA_2_.C + 1 1 1 Node CLK_OUT_INTreg.D + 1 1 1 Node CLK_OUT_INTreg.C 3 9 1 NodeX1 SM_AMIGA_i_7_.T.X1 1 9 1 NodeX2 SM_AMIGA_i_7_.T.X2 1 1 1 Node SM_AMIGA_i_7_.C - 1 1 1 Node CLK_OUT_INTreg.D - 1 1 1 Node CLK_OUT_INTreg.C - 2 14 1 Node CIIN_0 + 2 14 1 Node N_60 ========= - 281 P-Term Total: 281 - Total Pins: 61 - Total Nodes: 47 + 243 P-Term Total: 243 + Total Pins: 59 + Total Nodes: 42 Average P-Term/Output: 2 Equations: +AHIGH_27_ = (0); + +AHIGH_27_.OE = (!BGACK_030.Q); + +AHIGH_26_ = (0); + +AHIGH_26_.OE = (!BGACK_030.Q); + +AHIGH_25_ = (0); + +AHIGH_25_.OE = (!BGACK_030.Q); + +AHIGH_24_ = (0); + +AHIGH_24_.OE = (!BGACK_030.Q); + AHIGH_31_ = (0); -AHIGH_31_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); +AHIGH_31_.OE = (!BGACK_030.Q); !AS_030 = (!inst_AS_000_DMA.Q & !AS_000.PIN); -AS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +AS_030.OE = (!BGACK_030.Q); !AS_000 = (!inst_AS_000_INT.Q & !AS_030.PIN); -AS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); +AS_000.OE = (RST & BGACK_030.Q); !DS_030 = (!inst_DS_000_DMA.Q & !AS_000.PIN); -DS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +DS_030.OE = (!BGACK_030.Q); -!UDS_000 = (inst_DS_000_ENABLE.Q & !inst_UDS_000_INT.Q); +!UDS_000 = (!inst_UDS_000_INT.Q & inst_DS_000_ENABLE.Q); -UDS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); +UDS_000.OE = (RST & BGACK_030.Q); -!LDS_000 = (!inst_LDS_000_INT.Q & inst_DS_000_ENABLE.Q); +!LDS_000 = (inst_DS_000_ENABLE.Q & !inst_LDS_000_INT.Q); -LDS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); +LDS_000.OE = (RST & BGACK_030.Q); BERR = (0); @@ -218,47 +222,15 @@ CLK_EXP = (CLK_OUT_INTreg.Q); !DSACK1 = (!inst_DSACK1_INT.Q & !AS_030.PIN); -DSACK1.OE = (nEXP_SPACE); - -DTACK = (0); - -DTACK.OE = (!inst_AS_000_DMA.Q); +DSACK1.OE = (nEXP_SPACE & BGACK_030.Q); AVEC = (1); E = (!cpu_est_1_.Q & !cpu_est_2_.Q & cpu_est_3_.Q # cpu_est_1_.Q & cpu_est_2_.Q & !cpu_est_3_.Q); -AHIGH_30_ = (0); - -AHIGH_30_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); - -AHIGH_29_ = (0); - -AHIGH_29_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); - -AHIGH_28_ = (0); - -AHIGH_28_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); - -AHIGH_27_ = (0); - -AHIGH_27_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); - -AHIGH_26_ = (0); - -AHIGH_26_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); - -AHIGH_25_ = (0); - -AHIGH_25_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); - AMIGA_ADDR_ENABLE = (0); -AHIGH_24_ = (0); - -AHIGH_24_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); - AMIGA_BUS_DATA_DIR = (BGACK_030.Q & !RW_000.PIN # !nEXP_SPACE & !BGACK_030.Q & !AS_000.PIN & RW_000.PIN); @@ -269,24 +241,67 @@ AMIGA_BUS_DATA_DIR = (BGACK_030.Q & !RW_000.PIN CIIN = (A_DECODE_23_ & A_DECODE_22_ & A_DECODE_21_ & A_DECODE_20_ & !inst_AS_030_D0.Q & !AHIGH_24_.PIN & !AHIGH_25_.PIN & !AHIGH_26_.PIN & !AHIGH_27_.PIN & !AHIGH_28_.PIN & !AHIGH_29_.PIN & !AHIGH_30_.PIN & !AHIGH_31_.PIN); -CIIN.OE = (CIIN_0); +CIIN.OE = (N_60); -A_0_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +AHIGH_30_ = (0); -A_0_.D = (!RST - # !BGACK_030.Q & UDS_000.PIN - # BGACK_030.Q & inst_BGACK_030_INT_D.Q & A_0_.Q); +AHIGH_30_.OE = (!BGACK_030.Q); -A_0_.C = (CLK_OSZI); +AHIGH_29_ = (0); -SIZE_1_.OE = (!nEXP_SPACE & !BGACK_030.Q); +AHIGH_29_.OE = (!BGACK_030.Q); + +AHIGH_28_ = (0); + +AHIGH_28_.OE = (!BGACK_030.Q); + +SIZE_1_.OE = (!BGACK_030.Q); SIZE_1_.D = (!RST - # BGACK_030.Q & inst_BGACK_030_INT_D.Q & SIZE_1_.Q # !BGACK_030.Q & !UDS_000.PIN & !LDS_000.PIN); SIZE_1_.C = (CLK_OSZI); +!IPL_030_2_.D = (!IPL_2_ & RST & !IPL_030_2_.Q + # RST & !IPL_D0_2_.Q & !IPL_030_2_.Q + # RST & !IPL_0_ & IPL_D0_0_.Q & !IPL_030_2_.Q + # RST & IPL_0_ & !IPL_D0_0_.Q & !IPL_030_2_.Q + # RST & !IPL_1_ & IPL_D0_1_.Q & !IPL_030_2_.Q + # RST & IPL_1_ & !IPL_D0_1_.Q & !IPL_030_2_.Q + # !IPL_2_ & RST & IPL_1_ & IPL_0_ & IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q + # !IPL_2_ & RST & IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q + # !IPL_2_ & RST & !IPL_1_ & IPL_0_ & IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q + # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q); + +IPL_030_2_.C = (CLK_OSZI); + +RW_000.OE = (RST & BGACK_030.Q); + +!RW_000.D = (RST & CLK_000_D_1_.Q & !RW_000.Q & SM_AMIGA_i_7_.Q + # RST & !CLK_000_D_0_.Q & !RW_000.Q & SM_AMIGA_i_7_.Q + # RST & !SM_AMIGA_6_.Q & !RW_000.Q & !SM_AMIGA_0_.Q & SM_AMIGA_i_7_.Q + # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & SM_AMIGA_i_7_.Q & !RW.PIN); + +RW_000.C = (CLK_OSZI); + +!BG_000.D = (!BG_030 & RST & !BG_000.Q + # nEXP_SPACE & !BG_030 & RST & inst_AS_030_D0.Q & CLK_000_D_0_.Q); + +BG_000.C = (CLK_OSZI); + +BGACK_030.D = (!RST + # BGACK_000 & BGACK_030.Q + # BGACK_000 & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & AS_000.PIN); + +BGACK_030.C = (CLK_OSZI); + +A_0_.OE = (!BGACK_030.Q); + +A_0_.D = (!RST + # !BGACK_030.Q & UDS_000.PIN); + +A_0_.C = (CLK_OSZI); + !IPL_030_1_.D = (RST & !IPL_1_ & !IPL_030_1_.Q # RST & !IPL_D0_1_.Q & !IPL_030_1_.Q # RST & !IPL_0_ & IPL_D0_0_.Q & !IPL_030_1_.Q @@ -313,79 +328,26 @@ IPL_030_1_.C = (CLK_OSZI); IPL_030_0_.C = (CLK_OSZI); -!IPL_030_2_.D = (!IPL_2_ & RST & !IPL_030_2_.Q - # RST & !IPL_D0_2_.Q & !IPL_030_2_.Q - # RST & !IPL_0_ & IPL_D0_0_.Q & !IPL_030_2_.Q - # RST & IPL_0_ & !IPL_D0_0_.Q & !IPL_030_2_.Q - # RST & !IPL_1_ & IPL_D0_1_.Q & !IPL_030_2_.Q - # RST & IPL_1_ & !IPL_D0_1_.Q & !IPL_030_2_.Q - # !IPL_2_ & RST & IPL_1_ & IPL_0_ & IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q - # !IPL_2_ & RST & IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q - # !IPL_2_ & RST & !IPL_1_ & IPL_0_ & IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q - # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q); - -IPL_030_2_.C = (CLK_OSZI); - -RW_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); - -!RW_000.D = (RST & CLK_000_D_1_.Q & !RW_000.Q & SM_AMIGA_i_7_.Q - # RST & !CLK_000_D_0_.Q & !RW_000.Q & SM_AMIGA_i_7_.Q - # RST & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !RW_000.Q & SM_AMIGA_i_7_.Q - # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & SM_AMIGA_i_7_.Q & !RW.PIN); - -RW_000.C = (CLK_OSZI); - -!BG_000.D = (!BG_030 & RST & !BG_000.Q - # nEXP_SPACE & !BG_030 & RST & inst_AS_030_D0.Q & CLK_000_D_0_.Q); - -BG_000.C = (CLK_OSZI); - -BGACK_030.D = (!RST - # BGACK_000 & BGACK_030.Q - # BGACK_000 & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & AS_000.PIN); - -BGACK_030.C = (CLK_OSZI); - -SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q); - -!SIZE_0_.D = (RST & BGACK_030.Q & !inst_BGACK_030_INT_D.Q - # RST & BGACK_030.Q & !SIZE_0_.Q - # RST & !BGACK_030.Q & !UDS_000.PIN & !LDS_000.PIN); - -SIZE_0_.C = (CLK_OSZI); +VMA.OE = (BGACK_030.Q); VMA.T = (!RST & !VMA.Q - # !VMA.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !cpu_est_3_.Q & !cpu_est_0_.Q & !CLK_000_D_1_.Q & CLK_000_D_0_.Q - # RST & VMA.Q & cpu_est_1_.Q & !cpu_est_2_.Q & !cpu_est_3_.Q & cpu_est_0_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); + # !cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !cpu_est_3_.Q & !VMA.Q & !CLK_000_D_1_.Q & CLK_000_D_0_.Q + # RST & cpu_est_0_.Q & cpu_est_1_.Q & !cpu_est_2_.Q & !cpu_est_3_.Q & VMA.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); VMA.C = (CLK_OSZI); -RW.OE = (!BGACK_030.Q & inst_RESET_OUT.Q); +RW.OE = (!BGACK_030.Q); -!RW.D = (RST & !BGACK_030.Q & !RW_000.PIN - # RST & BGACK_030.Q & inst_BGACK_030_INT_D.Q & !RW.Q); +!RW.D = (RST & !BGACK_030.Q & !RW_000.PIN); RW.C = (CLK_OSZI); -cpu_est_1_.D = (cpu_est_1_.Q & !cpu_est_0_.Q - # cpu_est_1_.Q & !CLK_000_D_1_.Q - # cpu_est_1_.Q & CLK_000_D_0_.Q - # !cpu_est_1_.Q & !cpu_est_3_.Q & cpu_est_0_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); +SIZE_0_.OE = (!BGACK_030.Q); -cpu_est_1_.C = (CLK_OSZI); +!SIZE_0_.D = (RST & BGACK_030.Q + # RST & !UDS_000.PIN & !LDS_000.PIN); -cpu_est_2_.D.X1 = (cpu_est_2_.Q); - -cpu_est_2_.D.X2 = (cpu_est_1_.Q & cpu_est_0_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); - -cpu_est_2_.C = (CLK_OSZI); - -cpu_est_3_.D = (cpu_est_3_.Q & !CLK_000_D_1_.Q - # cpu_est_3_.Q & CLK_000_D_0_.Q - # !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_0_.Q - # cpu_est_1_.Q & cpu_est_2_.Q & cpu_est_0_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); - -cpu_est_3_.C = (CLK_OSZI); +SIZE_0_.C = (CLK_OSZI); cpu_est_0_.D = (cpu_est_0_.Q & !CLK_000_D_1_.Q # cpu_est_0_.Q & CLK_000_D_0_.Q @@ -393,13 +355,31 @@ cpu_est_0_.D = (cpu_est_0_.Q & !CLK_000_D_1_.Q cpu_est_0_.C = (CLK_OSZI); -!inst_AMIGA_BUS_ENABLE_DMA_HIGH.D = (RST & !A_1_ & !BGACK_030.Q - # RST & BGACK_030.Q & !inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q & inst_BGACK_030_INT_D.Q); +cpu_est_1_.D = (!cpu_est_0_.Q & cpu_est_1_.Q + # cpu_est_1_.Q & !CLK_000_D_1_.Q + # cpu_est_1_.Q & CLK_000_D_0_.Q + # cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_3_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); + +cpu_est_1_.C = (CLK_OSZI); + +cpu_est_2_.D.X1 = (cpu_est_0_.Q & cpu_est_1_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); + +cpu_est_2_.D.X2 = (cpu_est_2_.Q); + +cpu_est_2_.C = (CLK_OSZI); + +cpu_est_3_.D = (!cpu_est_0_.Q & cpu_est_3_.Q + # cpu_est_3_.Q & !CLK_000_D_1_.Q + # cpu_est_3_.Q & CLK_000_D_0_.Q + # cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); + +cpu_est_3_.C = (CLK_OSZI); + +!inst_AMIGA_BUS_ENABLE_DMA_HIGH.D = (RST & !A_1_ & !BGACK_030.Q); inst_AMIGA_BUS_ENABLE_DMA_HIGH.C = (CLK_OSZI); -!inst_AMIGA_BUS_ENABLE_DMA_LOW.D = (RST & A_1_ & !BGACK_030.Q - # RST & BGACK_030.Q & !inst_AMIGA_BUS_ENABLE_DMA_LOW.Q & inst_BGACK_030_INT_D.Q); +!inst_AMIGA_BUS_ENABLE_DMA_LOW.D = (RST & A_1_ & !BGACK_030.Q); inst_AMIGA_BUS_ENABLE_DMA_LOW.C = (CLK_OSZI); @@ -407,20 +387,21 @@ inst_AMIGA_BUS_ENABLE_DMA_LOW.C = (CLK_OSZI); inst_AS_030_D0.C = (CLK_OSZI); +inst_AS_030_D1.D = (RST & inst_AS_030_D0.Q + # !RST & inst_AS_030_D1.Q); + +inst_AS_030_D1.C = (CLK_OSZI); + !inst_AS_030_000_SYNC.D = (RST & !inst_AS_030_000_SYNC.Q & !AS_030.PIN - # !FC_1_ & nEXP_SPACE & RST & BGACK_030.Q & !inst_AS_030_D0.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN - # nEXP_SPACE & RST & A_DECODE_19_ & BGACK_030.Q & !inst_AS_030_D0.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN - # nEXP_SPACE & RST & A_DECODE_18_ & BGACK_030.Q & !inst_AS_030_D0.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN - # nEXP_SPACE & RST & !A_DECODE_17_ & BGACK_030.Q & !inst_AS_030_D0.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN - # nEXP_SPACE & RST & A_DECODE_16_ & BGACK_030.Q & !inst_AS_030_D0.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN - # nEXP_SPACE & RST & !FC_0_ & BGACK_030.Q & !inst_AS_030_D0.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN); + # !FC_1_ & nEXP_SPACE & RST & BGACK_030.Q & !inst_AS_030_D1.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN + # nEXP_SPACE & RST & A_DECODE_19_ & BGACK_030.Q & !inst_AS_030_D1.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN + # nEXP_SPACE & RST & A_DECODE_18_ & BGACK_030.Q & !inst_AS_030_D1.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN + # nEXP_SPACE & RST & !A_DECODE_17_ & BGACK_030.Q & !inst_AS_030_D1.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN + # nEXP_SPACE & RST & A_DECODE_16_ & BGACK_030.Q & !inst_AS_030_D1.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN + # nEXP_SPACE & RST & !FC_0_ & BGACK_030.Q & !inst_AS_030_D1.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN); inst_AS_030_000_SYNC.C = (CLK_OSZI); -!inst_BGACK_030_INT_D.D = (RST & !BGACK_030.Q); - -inst_BGACK_030_INT_D.C = (CLK_OSZI); - inst_AS_000_DMA.D = (!RST # inst_AMIGA_DS.Q # AS_000.PIN @@ -434,11 +415,8 @@ inst_DS_000_DMA.D = (!RST # inst_AMIGA_DS.Q # AS_000.PIN # !CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q - # !CLK_030 & inst_DS_000_DMA.Q & !RW_000.PIN - # inst_DS_000_DMA.Q & CLK_030_PE_1_.Q & !RW_000.PIN - # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !RW_000.PIN - # inst_DS_000_DMA.Q & !CLK_030_PE_0_.Q & !RW_000.PIN - # inst_DS_000_DMA.Q & inst_CLK_OUT_PRE_D.Q & !CLK_OUT_INTreg.Q & RW_000.PIN); + # inst_DS_000_DMA.Q & inst_CLK_OUT_PRE_D.Q & !CLK_OUT_INTreg.Q + # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !RW_000.PIN); inst_DS_000_DMA.C = (CLK_OSZI); @@ -450,24 +428,10 @@ CLK_000_D_3_.D = (CLK_000_D_2_.Q); CLK_000_D_3_.C = (CLK_OSZI); -!inst_DTACK_D0.D = (RST & !DTACK.PIN); +!inst_DTACK_D0.D = (!DTACK & RST); inst_DTACK_D0.C = (CLK_OSZI); -inst_RESET_OUT.D = (RST & inst_RESET_OUT.Q - # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & RST_DLY_0_.Q & RST_DLY_1_.Q & RST_DLY_2_.Q); - -inst_RESET_OUT.C = (CLK_OSZI); - -CLK_030_PE_1_.D = (RST & CLK_030_PE_1_.Q & !inst_AMIGA_DS.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !AS_000.PIN - # RST & CLK_030_PE_1_.Q & !inst_AMIGA_DS.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & !AS_000.PIN - # RST & CLK_030_PE_1_.Q & !inst_AMIGA_DS.Q & CYCLE_DMA_1_.Q & !AS_000.PIN & RW_000.PIN - # RST & !inst_AS_000_DMA.Q & !inst_AMIGA_DS.Q & inst_CLK_OUT_PRE_D.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & CLK_030_PE_0_.Q & !CLK_OUT_INTreg.Q & !AS_000.PIN - # RST & !inst_AS_000_DMA.Q & !inst_AMIGA_DS.Q & inst_CLK_OUT_PRE_D.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & CLK_030_PE_0_.Q & !CLK_OUT_INTreg.Q & !AS_000.PIN - # RST & !inst_AS_000_DMA.Q & !inst_AMIGA_DS.Q & inst_CLK_OUT_PRE_D.Q & CYCLE_DMA_1_.Q & CLK_030_PE_0_.Q & !CLK_OUT_INTreg.Q & !AS_000.PIN & RW_000.PIN); - -CLK_030_PE_1_.C = (CLK_OSZI); - inst_AMIGA_DS.D = (!RST # UDS_000.PIN & LDS_000.PIN); @@ -509,11 +473,10 @@ CLK_000_D_4_.D = (CLK_000_D_3_.Q); CLK_000_D_4_.C = (CLK_OSZI); -inst_LDS_000_INT.D = (!RST - # inst_LDS_000_INT.Q & !SM_AMIGA_6_.Q - # SM_AMIGA_6_.Q & SIZE_0_.PIN & !SIZE_1_.PIN & !A_0_.PIN); +!inst_UDS_000_INT.D = (RST & !inst_UDS_000_INT.Q & !SM_AMIGA_6_.Q + # RST & SM_AMIGA_6_.Q & !A_0_.PIN); -inst_LDS_000_INT.C = (CLK_OSZI); +inst_UDS_000_INT.C = (CLK_OSZI); inst_DS_000_ENABLE.D = (RST & inst_DS_000_ENABLE.Q & !AS_030.PIN # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_4_.Q @@ -521,10 +484,15 @@ inst_DS_000_ENABLE.D = (RST & inst_DS_000_ENABLE.Q & !AS_030.PIN inst_DS_000_ENABLE.C = (CLK_OSZI); -!inst_UDS_000_INT.D = (RST & !inst_UDS_000_INT.Q & !SM_AMIGA_6_.Q - # RST & SM_AMIGA_6_.Q & !A_0_.PIN); +inst_LDS_000_INT.D = (!RST + # inst_LDS_000_INT.Q & !SM_AMIGA_6_.Q + # SM_AMIGA_6_.Q & SIZE_0_.PIN & !SIZE_1_.PIN & !A_0_.PIN); -inst_UDS_000_INT.C = (CLK_OSZI); +inst_LDS_000_INT.C = (CLK_OSZI); + +!inst_BGACK_030_INT_D.D = (RST & !BGACK_030.Q); + +inst_BGACK_030_INT_D.C = (CLK_OSZI); SM_AMIGA_6_.D = (RST & CLK_000_D_1_.Q & SM_AMIGA_6_.Q # RST & !CLK_000_D_0_.Q & SM_AMIGA_6_.Q @@ -562,37 +530,6 @@ CYCLE_DMA_1_.D = (RST & !BGACK_030.Q & CYCLE_DMA_1_.Q & !AS_000.PIN CYCLE_DMA_1_.C = (CLK_OSZI); -!CLK_030_PE_0_.D = (!RST - # inst_AMIGA_DS.Q - # AS_000.PIN - # !CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q - # inst_AS_000_DMA.Q & !CLK_030_PE_0_.Q - # !inst_CLK_OUT_PRE_D.Q & !CLK_030_PE_0_.Q - # !CLK_030_PE_0_.Q & CLK_OUT_INTreg.Q - # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !RW_000.PIN - # !inst_AS_000_DMA.Q & !CLK_030_PE_1_.Q & inst_CLK_OUT_PRE_D.Q & CLK_030_PE_0_.Q & !CLK_OUT_INTreg.Q); - -CLK_030_PE_0_.C = (CLK_OSZI); - -RST_DLY_0_.D = (RST & !CLK_000_D_1_.Q & RST_DLY_0_.Q - # RST & CLK_000_D_0_.Q & RST_DLY_0_.Q - # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & !RST_DLY_0_.Q - # RST & RST_DLY_0_.Q & RST_DLY_1_.Q & RST_DLY_2_.Q); - -RST_DLY_0_.C = (CLK_OSZI); - -RST_DLY_1_.D.X1 = (RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & RST_DLY_0_.Q & !RST_DLY_1_.Q - # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & RST_DLY_0_.Q & !RST_DLY_2_.Q); - -RST_DLY_1_.D.X2 = (RST & RST_DLY_1_.Q); - -RST_DLY_1_.C = (CLK_OSZI); - -RST_DLY_2_.D = (RST & RST_DLY_2_.Q - # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & RST_DLY_0_.Q & RST_DLY_1_.Q); - -RST_DLY_2_.C = (CLK_OSZI); - !inst_DSACK1_INT.D = (RST & !inst_DSACK1_INT.Q & !AS_030.PIN # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_1_.Q); @@ -613,7 +550,7 @@ SM_AMIGA_3_.T = (!RST & SM_AMIGA_3_.Q # CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & !BERR.PIN # inst_VPA_D.Q & !inst_DTACK_D0.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_4_.Q & !SM_AMIGA_3_.Q - # !VMA.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); + # !cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & cpu_est_3_.Q & !VMA.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); SM_AMIGA_3_.C = (CLK_OSZI); @@ -621,10 +558,14 @@ SM_AMIGA_2_.D = (RST & CLK_000_D_1_.Q & SM_AMIGA_2_.Q # RST & !CLK_000_D_0_.Q & SM_AMIGA_2_.Q # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & !BERR.PIN # RST & inst_VPA_D.Q & !inst_DTACK_D0.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q - # RST & !VMA.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); + # RST & !cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & cpu_est_3_.Q & !VMA.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); SM_AMIGA_2_.C = (CLK_OSZI); +CLK_OUT_INTreg.D = (inst_CLK_OUT_PRE_D.Q); + +CLK_OUT_INTreg.C = (CLK_OSZI); + SM_AMIGA_i_7_.T.X1 = (!RST & SM_AMIGA_i_7_.Q # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_0_.Q & SM_AMIGA_i_7_.Q # nEXP_SPACE & RST & !inst_AS_030_000_SYNC.Q & !CLK_000_D_3_.Q & CLK_000_D_4_.Q & !SM_AMIGA_i_7_.Q); @@ -633,11 +574,7 @@ SM_AMIGA_i_7_.T.X2 = (nEXP_SPACE & RST & !inst_AS_030_000_SYNC.Q & !CLK_000_D_3_ SM_AMIGA_i_7_.C = (CLK_OSZI); -CLK_OUT_INTreg.D = (inst_CLK_OUT_PRE_D.Q); - -CLK_OUT_INTreg.C = (CLK_OSZI); - -CIIN_0 = (nEXP_SPACE +N_60 = (nEXP_SPACE # A_DECODE_23_ & A_DECODE_22_ & A_DECODE_21_ & A_DECODE_20_ & !inst_AS_030_D0.Q & !AHIGH_24_.PIN & !AHIGH_25_.PIN & !AHIGH_26_.PIN & !AHIGH_27_.PIN & !AHIGH_28_.PIN & !AHIGH_29_.PIN & !AHIGH_30_.PIN & !AHIGH_31_.PIN); diff --git a/Logic/68030_tk.fti b/Logic/68030_tk.fti index ef0a635..7d82ad3 100644 --- a/Logic/68030_tk.fti +++ b/Logic/68030_tk.fti @@ -1,5 +1,5 @@ #PLAFILE 68030_tk.tt4 -#DATE 10/08/2016 +#DATE 02/16/2017 #DESIGN #DEVICE mach447a @@ -11,14 +11,14 @@ DATA LOCATION AHIGH_28_:C_0_15 // IO DATA LOCATION AHIGH_29_:B_8_6 // IO DATA LOCATION AHIGH_30_:B_0_5 // IO DATA LOCATION AHIGH_31_:B_12_4 // IO -DATA LOCATION AMIGA_ADDR_ENABLE:D_9_33 // OUT +DATA LOCATION AMIGA_ADDR_ENABLE:D_5_33 // OUT DATA LOCATION AMIGA_BUS_DATA_DIR:E_1_48 // OUT -DATA LOCATION AMIGA_BUS_ENABLE_HIGH:D_5_34 // OUT +DATA LOCATION AMIGA_BUS_ENABLE_HIGH:D_4_34 // OUT DATA LOCATION AMIGA_BUS_ENABLE_LOW:C_1_20 // OUT DATA LOCATION AS_000:E_4_42 // IO DATA LOCATION AS_030:H_8_82 // IO DATA LOCATION AVEC:A_4_92 // OUT -DATA LOCATION A_0_:G_8_69 // IO {RN_A_0_} +DATA LOCATION A_0_:G_8_69 // IO DATA LOCATION A_1_:F_*_60 // INP DATA LOCATION A_DECODE_16_:A_*_96 // INP DATA LOCATION A_DECODE_17_:F_*_59 // INP @@ -34,25 +34,21 @@ DATA LOCATION BGACK_030:H_4_83 // IO {RN_BGACK_030} DATA LOCATION BG_000:D_1_29 // IO {RN_BG_000} DATA LOCATION BG_030:C_*_21 // INP DATA LOCATION CIIN:E_12_47 // OUT -DATA LOCATION CIIN_0:E_5 // NOD DATA LOCATION CLK_000:*_*_11 // INP -DATA LOCATION CLK_000_D_0_:D_13 // NOD +DATA LOCATION CLK_000_D_0_:D_9 // NOD DATA LOCATION CLK_000_D_1_:H_5 // NOD DATA LOCATION CLK_000_D_2_:H_6 // NOD DATA LOCATION CLK_000_D_3_:F_13 // NOD -DATA LOCATION CLK_000_D_4_:C_14 // NOD -DATA LOCATION CLK_030:*_*_64 // INP -DATA LOCATION CLK_030_PE_0_:A_9 // NOD -DATA LOCATION CLK_030_PE_1_:A_2 // NOD +DATA LOCATION CLK_000_D_4_:F_5 // NOD DATA LOCATION CLK_DIV_OUT:G_1_65 // OUT DATA LOCATION CLK_EXP:B_1_10 // OUT DATA LOCATION CLK_OSZI:*_*_61 // Cin -DATA LOCATION CLK_OUT_INTreg:D_10 // NOD -DATA LOCATION CYCLE_DMA_0_:A_6 // NOD -DATA LOCATION CYCLE_DMA_1_:A_10 // NOD +DATA LOCATION CLK_OUT_INTreg:A_1 // NOD +DATA LOCATION CYCLE_DMA_0_:B_13 // NOD +DATA LOCATION CYCLE_DMA_1_:B_2 // NOD DATA LOCATION DSACK1:H_9_81 // OUT DATA LOCATION DS_030:A_0_98 // OUT -DATA LOCATION DTACK:D_0_30 // IO +DATA LOCATION DTACK:D_*_30 // INP DATA LOCATION E:G_4_66 // OUT DATA LOCATION FC_0_:F_*_57 // INP DATA LOCATION FC_1_:F_*_58 // INP @@ -64,63 +60,56 @@ DATA LOCATION IPL_030_2_:B_4_9 // IO {RN_IPL_030_2_} DATA LOCATION IPL_0_:G_*_67 // INP DATA LOCATION IPL_1_:F_*_56 // INP DATA LOCATION IPL_2_:G_*_68 // INP -DATA LOCATION IPL_D0_0_:B_10 // NOD -DATA LOCATION IPL_D0_1_:B_6 // NOD -DATA LOCATION IPL_D0_2_:B_2 // NOD +DATA LOCATION IPL_D0_0_:A_6 // NOD +DATA LOCATION IPL_D0_1_:D_6 // NOD +DATA LOCATION IPL_D0_2_:A_2 // NOD DATA LOCATION LDS_000:D_12_31 // IO -DATA LOCATION RESET:B_*_3 // INP -DATA LOCATION RN_A_0_:G_8 // NOD {A_0_} +DATA LOCATION N_60:E_9 // NOD DATA LOCATION RN_BGACK_030:H_4 // NOD {BGACK_030} DATA LOCATION RN_BG_000:D_1 // NOD {BG_000} DATA LOCATION RN_IPL_030_0_:B_5 // NOD {IPL_030_0_} DATA LOCATION RN_IPL_030_1_:B_9 // NOD {IPL_030_1_} DATA LOCATION RN_IPL_030_2_:B_4 // NOD {IPL_030_2_} -DATA LOCATION RN_RW:G_0 // NOD {RW} DATA LOCATION RN_RW_000:H_0 // NOD {RW_000} -DATA LOCATION RN_SIZE_0_:G_12 // NOD {SIZE_0_} -DATA LOCATION RN_SIZE_1_:H_12 // NOD {SIZE_1_} -DATA LOCATION RN_VMA:D_4 // NOD {VMA} +DATA LOCATION RN_VMA:D_0 // NOD {VMA} DATA LOCATION RST:*_*_86 // INP -DATA LOCATION RST_DLY_0_:G_6 // NOD -DATA LOCATION RST_DLY_1_:G_14 // NOD -DATA LOCATION RST_DLY_2_:G_10 // NOD -DATA LOCATION RW:G_0_71 // IO {RN_RW} +DATA LOCATION RW:G_0_71 // IO DATA LOCATION RW_000:H_0_80 // IO {RN_RW_000} -DATA LOCATION SIZE_0_:G_12_70 // IO {RN_SIZE_0_} -DATA LOCATION SIZE_1_:H_12_79 // IO {RN_SIZE_1_} +DATA LOCATION SIZE_0_:G_12_70 // IO +DATA LOCATION SIZE_1_:H_12_79 // IO DATA LOCATION SM_AMIGA_0_:A_12 // NOD -DATA LOCATION SM_AMIGA_1_:F_8 // NOD -DATA LOCATION SM_AMIGA_2_:C_9 // NOD -DATA LOCATION SM_AMIGA_3_:C_6 // NOD -DATA LOCATION SM_AMIGA_4_:A_1 // NOD -DATA LOCATION SM_AMIGA_5_:G_13 // NOD +DATA LOCATION SM_AMIGA_1_:A_5 // NOD +DATA LOCATION SM_AMIGA_2_:A_9 // NOD +DATA LOCATION SM_AMIGA_3_:A_13 // NOD +DATA LOCATION SM_AMIGA_4_:G_5 // NOD +DATA LOCATION SM_AMIGA_5_:F_12 // NOD DATA LOCATION SM_AMIGA_6_:F_0 // NOD -DATA LOCATION SM_AMIGA_i_7_:F_4 // NOD +DATA LOCATION SM_AMIGA_i_7_:F_8 // NOD DATA LOCATION UDS_000:D_8_32 // IO -DATA LOCATION VMA:D_4_35 // IO {RN_VMA} +DATA LOCATION VMA:D_0_35 // IO {RN_VMA} DATA LOCATION VPA:*_*_36 // INP DATA LOCATION cpu_est_0_:G_9 // NOD -DATA LOCATION cpu_est_1_:D_6 // NOD -DATA LOCATION cpu_est_2_:D_14 // NOD -DATA LOCATION cpu_est_3_:D_2 // NOD -DATA LOCATION inst_AMIGA_BUS_ENABLE_DMA_HIGH:F_9 // NOD -DATA LOCATION inst_AMIGA_BUS_ENABLE_DMA_LOW:F_5 // NOD -DATA LOCATION inst_AMIGA_DS:C_10 // NOD -DATA LOCATION inst_AS_000_DMA:A_8 // NOD -DATA LOCATION inst_AS_000_INT:C_2 // NOD -DATA LOCATION inst_AS_030_000_SYNC:B_13 // NOD -DATA LOCATION inst_AS_030_D0:H_2 // NOD -DATA LOCATION inst_BGACK_030_INT_D:H_13 // NOD -DATA LOCATION inst_CLK_OUT_PRE_50:G_2 // NOD -DATA LOCATION inst_CLK_OUT_PRE_D:E_8 // NOD -DATA LOCATION inst_DSACK1_INT:A_5 // NOD -DATA LOCATION inst_DS_000_DMA:A_13 // NOD -DATA LOCATION inst_DS_000_ENABLE:C_13 // NOD -DATA LOCATION inst_DTACK_D0:B_14 // NOD -DATA LOCATION inst_LDS_000_INT:F_12 // NOD -DATA LOCATION inst_RESET_OUT:G_5 // NOD -DATA LOCATION inst_UDS_000_INT:F_1 // NOD -DATA LOCATION inst_VPA_D:F_2 // NOD +DATA LOCATION cpu_est_1_:D_13 // NOD +DATA LOCATION cpu_est_2_:D_2 // NOD +DATA LOCATION cpu_est_3_:A_8 // NOD +DATA LOCATION inst_AMIGA_BUS_ENABLE_DMA_HIGH:A_10 // NOD +DATA LOCATION inst_AMIGA_BUS_ENABLE_DMA_LOW:C_10 // NOD +DATA LOCATION inst_AMIGA_DS:H_2 // NOD +DATA LOCATION inst_AS_000_DMA:C_13 // NOD +DATA LOCATION inst_AS_000_INT:C_6 // NOD +DATA LOCATION inst_AS_030_000_SYNC:F_4 // NOD +DATA LOCATION inst_AS_030_D0:E_8 // NOD +DATA LOCATION inst_AS_030_D1:F_1 // NOD +DATA LOCATION inst_BGACK_030_INT_D:E_13 // NOD +DATA LOCATION inst_CLK_OUT_PRE_50:H_13 // NOD +DATA LOCATION inst_CLK_OUT_PRE_D:E_5 // NOD +DATA LOCATION inst_DSACK1_INT:G_2 // NOD +DATA LOCATION inst_DS_000_DMA:C_9 // NOD +DATA LOCATION inst_DS_000_ENABLE:C_2 // NOD +DATA LOCATION inst_DTACK_D0:F_9 // NOD +DATA LOCATION inst_LDS_000_INT:G_13 // NOD +DATA LOCATION inst_UDS_000_INT:B_6 // NOD +DATA LOCATION inst_VPA_D:G_6 // NOD DATA LOCATION nEXP_SPACE:*_*_14 // INP DATA IO_DIR AHIGH_24_:BI DATA IO_DIR AHIGH_25_:BI @@ -154,13 +143,12 @@ DATA IO_DIR BG_000:OUT DATA IO_DIR BG_030:IN DATA IO_DIR CIIN:OUT DATA IO_DIR CLK_000:IN -DATA IO_DIR CLK_030:IN DATA IO_DIR CLK_DIV_OUT:OUT DATA IO_DIR CLK_EXP:OUT DATA IO_DIR CLK_OSZI:IN DATA IO_DIR DSACK1:OUT DATA IO_DIR DS_030:OUT -DATA IO_DIR DTACK:BI +DATA IO_DIR DTACK:IN DATA IO_DIR E:OUT DATA IO_DIR FC_0_:IN DATA IO_DIR FC_1_:IN @@ -173,7 +161,6 @@ DATA IO_DIR IPL_0_:IN DATA IO_DIR IPL_1_:IN DATA IO_DIR IPL_2_:IN DATA IO_DIR LDS_000:BI -DATA IO_DIR RESET:IN DATA IO_DIR RST:IN DATA IO_DIR RW:BI DATA IO_DIR RW_000:BI @@ -184,18 +171,32 @@ DATA IO_DIR VMA:OUT DATA IO_DIR VPA:IN DATA IO_DIR nEXP_SPACE:IN DATA GLB_CLOCK CLK_OSZI +DATA PW_LEVEL AHIGH_27_:1 +DATA SLEW AHIGH_27_:0 +DATA PW_LEVEL AHIGH_26_:1 +DATA SLEW AHIGH_26_:0 +DATA PW_LEVEL AHIGH_25_:1 +DATA SLEW AHIGH_25_:0 +DATA PW_LEVEL AHIGH_24_:1 +DATA SLEW AHIGH_24_:0 DATA PW_LEVEL AHIGH_31_:1 DATA SLEW AHIGH_31_:0 -DATA PW_LEVEL IPL_1_:1 -DATA SLEW IPL_1_:1 -DATA PW_LEVEL IPL_0_:1 -DATA SLEW IPL_0_:1 +DATA PW_LEVEL A_DECODE_22_:1 +DATA SLEW A_DECODE_22_:1 +DATA PW_LEVEL A_DECODE_21_:1 +DATA SLEW A_DECODE_21_:1 DATA PW_LEVEL A_DECODE_23_:1 DATA SLEW A_DECODE_23_:1 -DATA PW_LEVEL FC_0_:1 -DATA SLEW FC_0_:1 -DATA PW_LEVEL A_1_:1 -DATA SLEW A_1_:1 +DATA PW_LEVEL A_DECODE_20_:1 +DATA SLEW A_DECODE_20_:1 +DATA PW_LEVEL A_DECODE_19_:1 +DATA SLEW A_DECODE_19_:1 +DATA PW_LEVEL A_DECODE_18_:1 +DATA SLEW A_DECODE_18_:1 +DATA PW_LEVEL A_DECODE_17_:1 +DATA SLEW A_DECODE_17_:1 +DATA PW_LEVEL A_DECODE_16_:1 +DATA SLEW A_DECODE_16_:1 DATA PW_LEVEL IPL_2_:1 DATA SLEW IPL_2_:1 DATA PW_LEVEL FC_1_:1 @@ -217,13 +218,20 @@ DATA PW_LEVEL BG_030:1 DATA SLEW BG_030:1 DATA PW_LEVEL BGACK_000:1 DATA SLEW BGACK_000:1 -DATA SLEW CLK_030:1 DATA SLEW CLK_000:1 +DATA PW_LEVEL IPL_1_:1 +DATA SLEW IPL_1_:1 DATA SLEW CLK_OSZI:1 +DATA PW_LEVEL IPL_0_:1 +DATA SLEW IPL_0_:1 DATA PW_LEVEL CLK_DIV_OUT:1 DATA SLEW CLK_DIV_OUT:0 +DATA PW_LEVEL FC_0_:1 +DATA SLEW FC_0_:1 DATA PW_LEVEL CLK_EXP:1 DATA SLEW CLK_EXP:0 +DATA PW_LEVEL A_1_:1 +DATA SLEW A_1_:1 DATA PW_LEVEL FPU_CS:1 DATA SLEW FPU_CS:0 DATA PW_LEVEL FPU_SENSE:1 @@ -236,56 +244,26 @@ DATA PW_LEVEL AVEC:1 DATA SLEW AVEC:0 DATA PW_LEVEL E:1 DATA SLEW E:0 +DATA SLEW VPA:1 +DATA SLEW RST:1 +DATA PW_LEVEL AMIGA_ADDR_ENABLE:1 +DATA SLEW AMIGA_ADDR_ENABLE:0 +DATA PW_LEVEL AMIGA_BUS_DATA_DIR:1 +DATA SLEW AMIGA_BUS_DATA_DIR:0 +DATA PW_LEVEL AMIGA_BUS_ENABLE_LOW:1 +DATA SLEW AMIGA_BUS_ENABLE_LOW:0 +DATA PW_LEVEL AMIGA_BUS_ENABLE_HIGH:1 +DATA SLEW AMIGA_BUS_ENABLE_HIGH:0 +DATA PW_LEVEL CIIN:1 +DATA SLEW CIIN:0 DATA PW_LEVEL AHIGH_30_:1 DATA SLEW AHIGH_30_:0 -DATA SLEW VPA:1 DATA PW_LEVEL AHIGH_29_:1 DATA SLEW AHIGH_29_:0 DATA PW_LEVEL AHIGH_28_:1 DATA SLEW AHIGH_28_:0 -DATA SLEW RST:1 -DATA PW_LEVEL AHIGH_27_:1 -DATA SLEW AHIGH_27_:0 -DATA PW_LEVEL RESET:1 -DATA SLEW RESET:0 -DATA PW_LEVEL AHIGH_26_:1 -DATA SLEW AHIGH_26_:0 -DATA PW_LEVEL AHIGH_25_:1 -DATA SLEW AHIGH_25_:0 -DATA PW_LEVEL AMIGA_ADDR_ENABLE:1 -DATA SLEW AMIGA_ADDR_ENABLE:0 -DATA PW_LEVEL AHIGH_24_:1 -DATA SLEW AHIGH_24_:0 -DATA PW_LEVEL AMIGA_BUS_DATA_DIR:1 -DATA SLEW AMIGA_BUS_DATA_DIR:0 -DATA PW_LEVEL A_DECODE_22_:1 -DATA SLEW A_DECODE_22_:1 -DATA PW_LEVEL AMIGA_BUS_ENABLE_LOW:1 -DATA SLEW AMIGA_BUS_ENABLE_LOW:0 -DATA PW_LEVEL A_DECODE_21_:1 -DATA SLEW A_DECODE_21_:1 -DATA PW_LEVEL AMIGA_BUS_ENABLE_HIGH:1 -DATA SLEW AMIGA_BUS_ENABLE_HIGH:0 -DATA PW_LEVEL A_DECODE_20_:1 -DATA SLEW A_DECODE_20_:1 -DATA PW_LEVEL CIIN:1 -DATA SLEW CIIN:0 -DATA PW_LEVEL A_DECODE_19_:1 -DATA SLEW A_DECODE_19_:1 -DATA PW_LEVEL A_DECODE_18_:1 -DATA SLEW A_DECODE_18_:1 -DATA PW_LEVEL A_DECODE_17_:1 -DATA SLEW A_DECODE_17_:1 -DATA PW_LEVEL A_DECODE_16_:1 -DATA SLEW A_DECODE_16_:1 -DATA PW_LEVEL A_0_:1 -DATA SLEW A_0_:0 DATA PW_LEVEL SIZE_1_:1 DATA SLEW SIZE_1_:0 -DATA PW_LEVEL IPL_030_1_:1 -DATA SLEW IPL_030_1_:0 -DATA PW_LEVEL IPL_030_0_:1 -DATA SLEW IPL_030_0_:0 DATA PW_LEVEL IPL_030_2_:1 DATA SLEW IPL_030_2_:0 DATA PW_LEVEL RW_000:1 @@ -294,30 +272,36 @@ DATA PW_LEVEL BG_000:1 DATA SLEW BG_000:0 DATA PW_LEVEL BGACK_030:1 DATA SLEW BGACK_030:0 -DATA PW_LEVEL SIZE_0_:1 -DATA SLEW SIZE_0_:0 +DATA PW_LEVEL A_0_:1 +DATA SLEW A_0_:0 +DATA PW_LEVEL IPL_030_1_:1 +DATA SLEW IPL_030_1_:0 +DATA PW_LEVEL IPL_030_0_:1 +DATA SLEW IPL_030_0_:0 DATA PW_LEVEL VMA:1 DATA SLEW VMA:0 DATA PW_LEVEL RW:1 DATA SLEW RW:0 +DATA PW_LEVEL SIZE_0_:1 +DATA SLEW SIZE_0_:0 +DATA PW_LEVEL cpu_est_0_:1 +DATA SLEW cpu_est_0_:1 DATA PW_LEVEL cpu_est_1_:1 DATA SLEW cpu_est_1_:1 DATA PW_LEVEL cpu_est_2_:1 DATA SLEW cpu_est_2_:1 DATA PW_LEVEL cpu_est_3_:1 DATA SLEW cpu_est_3_:1 -DATA PW_LEVEL cpu_est_0_:1 -DATA SLEW cpu_est_0_:1 DATA PW_LEVEL inst_AMIGA_BUS_ENABLE_DMA_HIGH:1 DATA SLEW inst_AMIGA_BUS_ENABLE_DMA_HIGH:1 DATA PW_LEVEL inst_AMIGA_BUS_ENABLE_DMA_LOW:1 DATA SLEW inst_AMIGA_BUS_ENABLE_DMA_LOW:1 DATA PW_LEVEL inst_AS_030_D0:1 DATA SLEW inst_AS_030_D0:1 +DATA PW_LEVEL inst_AS_030_D1:1 +DATA SLEW inst_AS_030_D1:1 DATA PW_LEVEL inst_AS_030_000_SYNC:1 DATA SLEW inst_AS_030_000_SYNC:1 -DATA PW_LEVEL inst_BGACK_030_INT_D:1 -DATA SLEW inst_BGACK_030_INT_D:1 DATA PW_LEVEL inst_AS_000_DMA:1 DATA SLEW inst_AS_000_DMA:1 DATA PW_LEVEL inst_DS_000_DMA:1 @@ -328,10 +312,6 @@ DATA PW_LEVEL CLK_000_D_3_:1 DATA SLEW CLK_000_D_3_:1 DATA PW_LEVEL inst_DTACK_D0:1 DATA SLEW inst_DTACK_D0:1 -DATA PW_LEVEL inst_RESET_OUT:1 -DATA SLEW inst_RESET_OUT:1 -DATA PW_LEVEL CLK_030_PE_1_:1 -DATA SLEW CLK_030_PE_1_:1 DATA PW_LEVEL inst_AMIGA_DS:1 DATA SLEW inst_AMIGA_DS:1 DATA PW_LEVEL CLK_000_D_1_:1 @@ -352,12 +332,14 @@ DATA PW_LEVEL CLK_000_D_2_:1 DATA SLEW CLK_000_D_2_:1 DATA PW_LEVEL CLK_000_D_4_:1 DATA SLEW CLK_000_D_4_:1 -DATA PW_LEVEL inst_LDS_000_INT:1 -DATA SLEW inst_LDS_000_INT:1 -DATA PW_LEVEL inst_DS_000_ENABLE:1 -DATA SLEW inst_DS_000_ENABLE:1 DATA PW_LEVEL inst_UDS_000_INT:1 DATA SLEW inst_UDS_000_INT:1 +DATA PW_LEVEL inst_DS_000_ENABLE:1 +DATA SLEW inst_DS_000_ENABLE:1 +DATA PW_LEVEL inst_LDS_000_INT:1 +DATA SLEW inst_LDS_000_INT:1 +DATA PW_LEVEL inst_BGACK_030_INT_D:1 +DATA SLEW inst_BGACK_030_INT_D:1 DATA PW_LEVEL SM_AMIGA_6_:1 DATA SLEW SM_AMIGA_6_:1 DATA PW_LEVEL SM_AMIGA_4_:1 @@ -370,14 +352,6 @@ DATA PW_LEVEL CYCLE_DMA_0_:1 DATA SLEW CYCLE_DMA_0_:1 DATA PW_LEVEL CYCLE_DMA_1_:1 DATA SLEW CYCLE_DMA_1_:1 -DATA PW_LEVEL CLK_030_PE_0_:1 -DATA SLEW CLK_030_PE_0_:1 -DATA PW_LEVEL RST_DLY_0_:1 -DATA SLEW RST_DLY_0_:1 -DATA PW_LEVEL RST_DLY_1_:1 -DATA SLEW RST_DLY_1_:1 -DATA PW_LEVEL RST_DLY_2_:1 -DATA SLEW RST_DLY_2_:1 DATA PW_LEVEL inst_DSACK1_INT:1 DATA SLEW inst_DSACK1_INT:1 DATA PW_LEVEL inst_AS_000_INT:1 @@ -388,21 +362,17 @@ DATA PW_LEVEL SM_AMIGA_3_:1 DATA SLEW SM_AMIGA_3_:1 DATA PW_LEVEL SM_AMIGA_2_:1 DATA SLEW SM_AMIGA_2_:1 -DATA PW_LEVEL SM_AMIGA_i_7_:1 -DATA SLEW SM_AMIGA_i_7_:1 DATA PW_LEVEL CLK_OUT_INTreg:1 DATA SLEW CLK_OUT_INTreg:1 -DATA PW_LEVEL CIIN_0:1 -DATA SLEW CIIN_0:1 -DATA PW_LEVEL RN_A_0_:1 -DATA PW_LEVEL RN_SIZE_1_:1 -DATA PW_LEVEL RN_IPL_030_1_:1 -DATA PW_LEVEL RN_IPL_030_0_:1 +DATA PW_LEVEL SM_AMIGA_i_7_:1 +DATA SLEW SM_AMIGA_i_7_:1 +DATA PW_LEVEL N_60:1 +DATA SLEW N_60:1 DATA PW_LEVEL RN_IPL_030_2_:1 DATA PW_LEVEL RN_RW_000:1 DATA PW_LEVEL RN_BG_000:1 DATA PW_LEVEL RN_BGACK_030:1 -DATA PW_LEVEL RN_SIZE_0_:1 +DATA PW_LEVEL RN_IPL_030_1_:1 +DATA PW_LEVEL RN_IPL_030_0_:1 DATA PW_LEVEL RN_VMA:1 -DATA PW_LEVEL RN_RW:1 END diff --git a/Logic/68030_tk.grp b/Logic/68030_tk.grp index 6fb8d15..f3a8101 100644 --- a/Logic/68030_tk.grp +++ b/Logic/68030_tk.grp @@ -1,24 +1,22 @@ -GROUP MACH_SEG_A DS_030 AVEC inst_DS_000_DMA CLK_030_PE_1_ CLK_030_PE_0_ - inst_AS_000_DMA CYCLE_DMA_0_ CYCLE_DMA_1_ inst_DSACK1_INT SM_AMIGA_4_ - SM_AMIGA_0_ -GROUP MACH_SEG_B IPL_030_1_ RN_IPL_030_1_ IPL_030_0_ RN_IPL_030_0_ IPL_030_2_ - RN_IPL_030_2_ AHIGH_31_ AHIGH_30_ AHIGH_29_ CLK_EXP inst_AS_030_000_SYNC - inst_DTACK_D0 IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ -GROUP MACH_SEG_C AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AMIGA_BUS_ENABLE_LOW - SM_AMIGA_2_ SM_AMIGA_3_ inst_DS_000_ENABLE inst_AS_000_INT inst_AMIGA_DS - CLK_000_D_4_ -GROUP MACH_SEG_D VMA RN_VMA BG_000 RN_BG_000 AMIGA_BUS_ENABLE_HIGH LDS_000 - UDS_000 DTACK AMIGA_ADDR_ENABLE cpu_est_3_ cpu_est_1_ cpu_est_2_ - CLK_000_D_0_ CLK_OUT_INTreg -GROUP MACH_SEG_E CIIN BERR AMIGA_BUS_DATA_DIR AS_000 CIIN_0 inst_CLK_OUT_PRE_D +GROUP MACH_SEG_A DS_030 AVEC SM_AMIGA_2_ SM_AMIGA_3_ cpu_est_3_ SM_AMIGA_1_ + SM_AMIGA_0_ inst_AMIGA_BUS_ENABLE_DMA_HIGH IPL_D0_0_ IPL_D0_2_ CLK_OUT_INTreg -GROUP MACH_SEG_F SM_AMIGA_i_7_ SM_AMIGA_6_ inst_LDS_000_INT inst_AMIGA_BUS_ENABLE_DMA_HIGH - inst_AMIGA_BUS_ENABLE_DMA_LOW SM_AMIGA_1_ inst_UDS_000_INT inst_VPA_D - CLK_000_D_3_ -GROUP MACH_SEG_G SIZE_0_ RN_SIZE_0_ A_0_ RN_A_0_ RW RN_RW E CLK_DIV_OUT - inst_RESET_OUT RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ SM_AMIGA_5_ cpu_est_0_ - inst_CLK_OUT_PRE_50 -GROUP MACH_SEG_H RW_000 RN_RW_000 FPU_CS SIZE_1_ RN_SIZE_1_ BGACK_030 RN_BGACK_030 - AS_030 DSACK1 inst_AS_030_D0 inst_BGACK_030_INT_D CLK_000_D_2_ CLK_000_D_1_ +GROUP MACH_SEG_B IPL_030_1_ RN_IPL_030_1_ IPL_030_0_ RN_IPL_030_0_ IPL_030_2_ + RN_IPL_030_2_ CLK_EXP AHIGH_31_ AHIGH_30_ AHIGH_29_ CYCLE_DMA_0_ + CYCLE_DMA_1_ inst_UDS_000_INT +GROUP MACH_SEG_C AMIGA_BUS_ENABLE_LOW AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ + AHIGH_24_ inst_AS_000_DMA inst_DS_000_DMA inst_DS_000_ENABLE inst_AS_000_INT + inst_AMIGA_BUS_ENABLE_DMA_LOW +GROUP MACH_SEG_D VMA RN_VMA BG_000 RN_BG_000 AMIGA_BUS_ENABLE_HIGH LDS_000 + UDS_000 AMIGA_ADDR_ENABLE cpu_est_1_ cpu_est_2_ IPL_D0_1_ CLK_000_D_0_ + +GROUP MACH_SEG_E CIIN BERR AMIGA_BUS_DATA_DIR AS_000 N_60 inst_AS_030_D0 + inst_BGACK_030_INT_D inst_CLK_OUT_PRE_D +GROUP MACH_SEG_F inst_AS_030_000_SYNC SM_AMIGA_i_7_ SM_AMIGA_6_ SM_AMIGA_5_ + inst_AS_030_D1 inst_DTACK_D0 CLK_000_D_3_ CLK_000_D_4_ +GROUP MACH_SEG_G SIZE_0_ E A_0_ RW CLK_DIV_OUT inst_LDS_000_INT inst_DSACK1_INT + SM_AMIGA_4_ cpu_est_0_ inst_VPA_D +GROUP MACH_SEG_H RW_000 RN_RW_000 FPU_CS BGACK_030 RN_BGACK_030 SIZE_1_ + DSACK1 AS_030 inst_AMIGA_DS inst_CLK_OUT_PRE_50 CLK_000_D_2_ CLK_000_D_1_ \ No newline at end of file diff --git a/Logic/68030_tk.ipr b/Logic/68030_tk.ipr index 091112f..c99e83f 100644 --- a/Logic/68030_tk.ipr +++ b/Logic/68030_tk.ipr @@ -1 +1 @@ -6050655){ N +7022=02GQV \ No newline at end of file diff --git a/Logic/68030_tk.jed b/Logic/68030_tk.jed index a7544f4..72d0cd8 100644 --- a/Logic/68030_tk.jed +++ b/Logic/68030_tk.jed @@ -10,7 +10,7 @@ AUTHOR: PATTERN: COMPANY: REVISION: -DATE: Thu Dec 29 16:02:00 2016 +DATE: Sat Dec 30 00:43:46 2017 ABEL mach447a * @@ -31,75 +31,72 @@ NOTE Spread Placement? Y * NOTE Run Time Upper Bound in 15 minutes 0 * NOTE Zero Hold Time For Input Registers? Y * NOTE Table of pin names and numbers* -NOTE PINS AHIGH_31_:4 IPL_1_:56 IPL_0_:67 A_DECODE_23_:85* -NOTE PINS FC_0_:57 A_1_:60 IPL_2_:68 FC_1_:58 AS_030:82 AS_000:42* -NOTE PINS DS_030:98 UDS_000:32 LDS_000:31 nEXP_SPACE:14 BERR:41* -NOTE PINS BG_030:21 BGACK_000:28 CLK_030:64 CLK_000:11 CLK_OSZI:61* -NOTE PINS CLK_DIV_OUT:65 CLK_EXP:10 FPU_CS:78 FPU_SENSE:91* -NOTE PINS DSACK1:81 DTACK:30 AVEC:92 E:66 AHIGH_30_:5 VPA:36* -NOTE PINS AHIGH_29_:6 AHIGH_28_:15 RST:86 AHIGH_27_:16 RESET:3* -NOTE PINS AHIGH_26_:17 AHIGH_25_:18 AMIGA_ADDR_ENABLE:33* -NOTE PINS AHIGH_24_:19 AMIGA_BUS_DATA_DIR:48 A_DECODE_22_:84* -NOTE PINS AMIGA_BUS_ENABLE_LOW:20 A_DECODE_21_:94 AMIGA_BUS_ENABLE_HIGH:34* -NOTE PINS A_DECODE_20_:93 CIIN:47 A_DECODE_19_:97 A_DECODE_18_:95* -NOTE PINS A_DECODE_17_:59 A_DECODE_16_:96 A_0_:69 SIZE_1_:79* -NOTE PINS IPL_030_1_:7 IPL_030_0_:8 IPL_030_2_:9 RW_000:80* -NOTE PINS BG_000:29 BGACK_030:83 SIZE_0_:70 VMA:35 RW:71* +NOTE PINS AHIGH_27_:16 AHIGH_26_:17 AHIGH_25_:18 AHIGH_24_:19* +NOTE PINS AHIGH_31_:4 A_DECODE_22_:84 A_DECODE_21_:94 A_DECODE_23_:85* +NOTE PINS A_DECODE_20_:93 A_DECODE_19_:97 A_DECODE_18_:95* +NOTE PINS A_DECODE_17_:59 A_DECODE_16_:96 IPL_2_:68 FC_1_:58* +NOTE PINS AS_030:82 AS_000:42 DS_030:98 UDS_000:32 LDS_000:31* +NOTE PINS nEXP_SPACE:14 BERR:41 BG_030:21 BGACK_000:28 CLK_000:11* +NOTE PINS IPL_1_:56 CLK_OSZI:61 IPL_0_:67 CLK_DIV_OUT:65* +NOTE PINS FC_0_:57 CLK_EXP:10 A_1_:60 FPU_CS:78 FPU_SENSE:91* +NOTE PINS DSACK1:81 DTACK:30 AVEC:92 E:66 VPA:36 RST:86 AMIGA_ADDR_ENABLE:33* +NOTE PINS AMIGA_BUS_DATA_DIR:48 AMIGA_BUS_ENABLE_LOW:20 AMIGA_BUS_ENABLE_HIGH:34* +NOTE PINS CIIN:47 AHIGH_30_:5 AHIGH_29_:6 AHIGH_28_:15 SIZE_1_:79* +NOTE PINS IPL_030_2_:9 RW_000:80 BG_000:29 BGACK_030:83 A_0_:69* +NOTE PINS IPL_030_1_:7 IPL_030_0_:8 VMA:35 RW:71 SIZE_0_:70* NOTE Table of node names and numbers* -NOTE NODES RN_AHIGH_31_:143 RN_AS_030:281 RN_AS_000:203 * -NOTE NODES RN_UDS_000:185 RN_LDS_000:191 RN_BERR:197 RN_DTACK:173 * -NOTE NODES RN_AHIGH_30_:125 RN_AHIGH_29_:137 RN_AHIGH_28_:149 * NOTE NODES RN_AHIGH_27_:157 RN_AHIGH_26_:155 RN_AHIGH_25_:167 * -NOTE NODES RN_AHIGH_24_:161 RN_A_0_:257 RN_SIZE_1_:287 RN_IPL_030_1_:139 * -NOTE NODES RN_IPL_030_0_:133 RN_IPL_030_2_:131 RN_RW_000:269 * -NOTE NODES RN_BG_000:175 RN_BGACK_030:275 RN_SIZE_0_:263 * -NOTE NODES RN_VMA:179 RN_RW:245 cpu_est_1_:182 cpu_est_2_:194 * -NOTE NODES cpu_est_3_:176 cpu_est_0_:259 inst_AMIGA_BUS_ENABLE_DMA_HIGH:235 * -NOTE NODES inst_AMIGA_BUS_ENABLE_DMA_LOW:229 inst_AS_030_D0:272 * -NOTE NODES inst_AS_030_000_SYNC:145 inst_BGACK_030_INT_D:289 * -NOTE NODES inst_AS_000_DMA:113 inst_DS_000_DMA:121 inst_VPA_D:224 * -NOTE NODES CLK_000_D_3_:241 inst_DTACK_D0:146 inst_RESET_OUT:253 * -NOTE NODES CLK_030_PE_1_:104 inst_AMIGA_DS:164 CLK_000_D_1_:277 * -NOTE NODES CLK_000_D_0_:193 inst_CLK_OUT_PRE_50:248 inst_CLK_OUT_PRE_D:209 * -NOTE NODES IPL_D0_0_:140 IPL_D0_1_:134 IPL_D0_2_:128 CLK_000_D_2_:278 * -NOTE NODES CLK_000_D_4_:170 inst_LDS_000_INT:239 inst_DS_000_ENABLE:169 * -NOTE NODES inst_UDS_000_INT:223 SM_AMIGA_6_:221 SM_AMIGA_4_:103 * -NOTE NODES SM_AMIGA_1_:233 SM_AMIGA_0_:119 CYCLE_DMA_0_:110 * -NOTE NODES CYCLE_DMA_1_:116 CLK_030_PE_0_:115 RST_DLY_0_:254 * -NOTE NODES RST_DLY_1_:266 RST_DLY_2_:260 inst_DSACK1_INT:109 * -NOTE NODES inst_AS_000_INT:152 SM_AMIGA_5_:265 SM_AMIGA_3_:158 * -NOTE NODES SM_AMIGA_2_:163 SM_AMIGA_i_7_:227 CLK_OUT_INTreg:188 * -NOTE NODES CIIN_0:205 * +NOTE NODES RN_AHIGH_24_:161 RN_AHIGH_31_:143 RN_AS_030:281 * +NOTE NODES RN_AS_000:203 RN_UDS_000:185 RN_LDS_000:191 RN_BERR:197 * +NOTE NODES RN_AHIGH_30_:125 RN_AHIGH_29_:137 RN_AHIGH_28_:149 * +NOTE NODES RN_SIZE_1_:287 RN_IPL_030_2_:131 RN_RW_000:269 * +NOTE NODES RN_BG_000:175 RN_BGACK_030:275 RN_A_0_:257 RN_IPL_030_1_:139 * +NOTE NODES RN_IPL_030_0_:133 RN_VMA:173 RN_RW:245 RN_SIZE_0_:263 * +NOTE NODES cpu_est_0_:259 cpu_est_1_:193 cpu_est_2_:176 * +NOTE NODES cpu_est_3_:113 inst_AMIGA_BUS_ENABLE_DMA_HIGH:116 * +NOTE NODES inst_AMIGA_BUS_ENABLE_DMA_LOW:164 inst_AS_030_D0:209 * +NOTE NODES inst_AS_030_D1:223 inst_AS_030_000_SYNC:227 inst_AS_000_DMA:169 * +NOTE NODES inst_DS_000_DMA:163 inst_VPA_D:254 CLK_000_D_3_:241 * +NOTE NODES inst_DTACK_D0:235 inst_AMIGA_DS:272 CLK_000_D_1_:277 * +NOTE NODES CLK_000_D_0_:187 inst_CLK_OUT_PRE_50:289 inst_CLK_OUT_PRE_D:205 * +NOTE NODES IPL_D0_0_:110 IPL_D0_1_:182 IPL_D0_2_:104 CLK_000_D_2_:278 * +NOTE NODES CLK_000_D_4_:229 inst_UDS_000_INT:134 inst_DS_000_ENABLE:152 * +NOTE NODES inst_LDS_000_INT:265 inst_BGACK_030_INT_D:217 * +NOTE NODES SM_AMIGA_6_:221 SM_AMIGA_4_:253 SM_AMIGA_1_:109 * +NOTE NODES SM_AMIGA_0_:119 CYCLE_DMA_0_:145 CYCLE_DMA_1_:128 * +NOTE NODES inst_DSACK1_INT:248 inst_AS_000_INT:158 SM_AMIGA_5_:239 * +NOTE NODES SM_AMIGA_3_:121 SM_AMIGA_2_:115 CLK_OUT_INTreg:103 * +NOTE NODES SM_AMIGA_i_7_:233 N_60:211 * NOTE BLOCK 0 * L000000 - 111111111011111111111111101111111111111111111111111111111111111111 - 111111111101111101111111111111111111111111111111111111111111111111 - 111111111111111111111111111111111111111110111111111111111111111111 - 111111111111111111111111111111111111111111111111111111111111111110 111111111111111111111111111111111111111111111111111111111111111111 - 110111111111111111111111111101011111111111111111110111111111011111 - 111101011111101111110111111111111011111111111111111111111111111111 - 111111111111111111111111111011111111011011111110111111111111111111 - 101111111111111111011111111111111111111111110111111110111111111111* + 111011111111111111111011110111111111111111111111111111111111111111 + 111111111010111111111111111111111111111111111111111111111111111111 + 101111111111111111111111111111111111111111111011111111111111111111 + 111111101111111111111111111111111111111111111111111111111111111111 + 111111111111111111011111111111111111111111111111110111111101111111 + 111111111111110111111111111111111111110111111111111111111111011111 + 111111111111111111111111111110111111011110111111111111101111111111 + 111110111111111111111111111111110110111111101111111101111111111111* L000594 000000000000000000000000000000000000000000000000000000000000000000* -L000660 111111111111111111111111111111111111111111111111111010111111111111* +L000660 111110111111111111111111111011111111111111111111111111111111111111* L000726 000000000000000000000000000000000000000000000000000000000000000000* L000792 000000000000000000000000000000000000000000000000000000000000000000* L000858 000000000000000000000000000000000000000000000000000000000000000000* L000924 000000000000000000000000000000000000000000000000000000000000000000* -L000990 011111111111111111011111110111111111111111111111111111111111111111* -L001056 011011111111111111011111111111111111111111111111111111111111111111* -L001122 011011111111111111111111010111111111111111111111111111111111111111* +L000990 111111111111111111111111111101111111111111111111111111111111111111* +L001056 000000000000000000000000000000000000000000000000000000000000000000* +L001122 000000000000000000000000000000000000000000000000000000000000000000* L001188 000000000000000000000000000000000000000000000000000000000000000000* L001254 000000000000000000000000000000000000000000000000000000000000000000* L001320 111111111111111111111111111111111111111111111111111111111111111111* -L001386 011111111111111110111011111101111111111111110111111110111111111111* -L001452 011111111111111110110111111110111111111111110111111110111111111111* -L001518 011101101111111110111011111101110111111111111111111110111111101111* -L001584 011101101111111110110111111110110111111111111111111110111111101111* -L001650 011111111111011110111111111101111111111111110111111110111111111111* +L001386 111111111011111111111111111111111111111111011111111111111111111111* +L001452 111111111111111111111111111111111111111111111111111111111111111111* +L001518 111111111111111111111111111111111111111111111111111111111111111111* +L001584 111111111111111111111111111111111111111111111111111111111111111111* +L001650 111111111111111111111111111111111111111111111111111111111111111111* L001716 111111111111111111111111111111111111111111111111111111111111111111* L001782 111111111111111111111111111111111111111111111111111111111111111111* L001848 111111111111111111111111111111111111111111111111111111111111111111* @@ -108,70 +105,70 @@ L001980 111111111111111111111111111111111111111111111111111111111111111111* L002046 000000000000000000000000000000000000000000000000000000000000000000* L002112 111111111111111111111111111111111111111111111111111111111111111111* -L002178 011101101111011110111111111101110111111111111111111110111111101111* -L002244 000000000000000000000000000000000000000000000000000000000000000000* -L002310 000000000000000000000000000000000000000000000000000000000000000000* -L002376 000000000000000000000000000000000000000000000000000000000000000000* -L002442 011011111111111111111111110111111111111101111111111111111111111111* -L002508 011111111111111111111111111111111111101011111111111111111111111111* -L002574 000000000000000000000000000000000000000000000000000000000000000000* +L002178 111111111111111111111111111111111111111111111111111111111111111111* +L002244 111111111111111111111111111111111111111111111111111111111111111111* +L002310 111111111111111111111111111111111111111111111111111111111111111111* +L002376 111111111111111111111111111111111111111111111111111111111111111111* +L002442 111111111111110111111111111111111111110111011111111111101111111111* +L002508 111111111111111111111111111111111111011011011111111111101111111111* +L002574 111111111111110111111111111111111111011011011111111111111111111111* L002640 000000000000000000000000000000000000000000000000000000000000000000* L002706 000000000000000000000000000000000000000000000000000000000000000000* L002772 000000000000000000000000000000000000000000000000000000000000000000* -L002838 011111111111111111110111111011111111111111111110111110111111111111* -L002904 010111111111111111110111111111111111111111111110111110111111111111* -L002970 011011111111111111111011110111111111111111111110111110111111111111* -L003036 011111111111111111110111111101111111111111111110111110111111111111* -L003102 000000000000000000000000000000000000000000000000000000000000000000* -L003168 101111111111111111111111111111111111111111111111111111111111111111* -L003234 111111111111111101111111111111111111111111111111111111111111111111* -L003300 111111111111111111111011111110111111111111111111111111111111111111* -L003366 111111011111111111111111111111110111111111111111111111111111101111* -L003432 111111111111111111111111111111111111111111111111111101111111111111* +L002838 101111111111111111111111111111111111111111011111111111111111111111* +L002904 111111111111111111111111111111111111111111111111111111111111111111* +L002970 111111111111111111111111111111111111111111111111111111111111111111* +L003036 111111111111111111111111111111111111111111111111111111111111111111* +L003102 111111111111111111111111111111111111111111111111111111111111111111* +L003168 111111111111111111111111111111111111111111111111111111111111111111* +L003234 111111111111111111111111111111111111111111111111111111111111111111* +L003300 111111111111111111111111111111111111111111111111111111111111111111* +L003366 111111111111111111111111111111111111111111111111111111111111111111* +L003432 111111111111111111111111111111111111111111111111111111111111111111* L003498 000000000000000000000000000000000000000000000000000000000000000000* -L003564 111111111111101111110111111101111111111111111111111111111111111111* -L003630 000000000000000000000000000000000000000000000000000000000000000000* -L003696 000000000000000000000000000000000000000000000000000000000000000000* -L003762 000000000000000000000000000000000000000000000000000000000000000000* +L003564 111111111111111111111011111111111111111111111111111111111111011111* +L003630 111111111111111111111111111111111111111111111111111111101111011111* +L003696 111111111111110111111111111111111111111111111111111111111111011111* +L003762 111111111111111011110111111111110111111111111111111111011101111111* L003828 000000000000000000000000000000000000000000000000000000000000000000* -L003894 101111111111111111111111111111111111111111111111111111111111111111* -L003960 111111111111111101111111111111111111111111111111111111111111111111* -L004026 111111111111111111111011111110111111111111111111111111111111111111* -L004092 111111111111111111111111111111111111111111111111111101111111111111* -L004158 111111111111101111110111111101111111111111111111111111111111111111* +L003894 111111111110111011111011111111111011111111011111110110011110011111* +L003960 111011111101111011111111111111111111111111011111110111011111111111* +L004026 111111111111111111111111111111111111110111011111111111011111111111* +L004092 111111111111111011111111111111111111110111011111111111111111111111* +L004158 111111111111111011111111111111111110111111011111110111011111111111* L004224 000000000000000000000000000000000000000000000000000000000000000000* -L004290 011011111111111111110111110111111111111111111110111110111111111111* -L004356 011111111111111111111111111101111111111111111110111110111111111111* -L004422 000000000000000000000000000000000000000000000000000000000000000000* -L004488 000000000000000000000000000000000000000000000000000000000000000000* -L004554 000000000000000000000000000000000000000000000000000000000000000000* -L004620 111110011111111111111111111111111111111111111111111111111111111111* -L004686 111110111111111111111111111111111011111111111111111111111111111111* -L004752 111110111111111111111111111111111111111111111111111111111111011111* -L004818 111101101111111111111111111111110111111111111011111111111111101111* -L004884 000000000000000000000000000000000000000000000000000000000000000000* +L004290 111111101111111111111111111111111111111110011111111111111111111111* +L004356 111111111111111111111111111111111111111111111111111111111111111111* +L004422 111111111111111111111111111111111111111111111111111111111111111111* +L004488 111111111111111111111111111111111111111111111111111111111111111111* +L004554 111111111111111111111111111111111111111111111111111111111111111111* +L004620 111111111111111111111111111111111111111111111111111111111111111111* +L004686 111111111111111111111111111111111111111111111111111111111111111111* +L004752 111111111111111111111111111111111111111111111111111111111111111111* +L004818 111111111111111111111111111111111111111111111111111111111111111111* +L004884 111111111111111111111111111111111111111111111111111111111111111111* L004950 000000000000000000000000000000000000000000000000000000000000000000* -L005016 011011111111111111111111110111111111111101111111111111111111111111* -L005082 011111111111111111111111110111011111111111111111111111111111111111* -L005148 011011111111111111111111111111011111111111111111111111111111111111* +L005016 111111111111111011111111111111111111011111011111111111011111111111* +L005082 111111111111111111011111111111111111111111011111111111011111111111* +L005148 111111111111111011011111111111111111111111011111111111111111111111* L005214 000000000000000000000000000000000000000000000000000000000000000000* L005280 000000000000000000000000000000000000000000000000000000000000000000* -L005346 101111111111111111111111111111111111111111111111111111111111111111* -L005412 111111111111111101111111111111111111111111111111111111111111111111* -L005478 111111111111111111111011111110111111111111111111111111111111111111* -L005544 111111111111111111111111111111111111111111111111111101111111111111* -L005610 111111111111101111110111111101111111111111111111111111111111111111* +L005346 111111111111111111111111111111111111111111101111110111111111111111* +L005412 111111111110111011111011111111111011111111111111110110011110011111* +L005478 111011111101111011111111111111111111111111111111110111011111111111* +L005544 111111111111110111111111111111111111111111010111111011101111111111* +L005610 111111111111111011111111111111111110111111111111110111011111111111* L005676 - 111111111110111111111111111111111111111111111110111111111111111101* -L005742 111111111111011111111111111111110111111111111111110111111111101111* -L005808 111111111011101111111111111111111111111111111111110111111111111111* -L005874 111111111111101111111111111111111111111111110111110111111111111111* -L005940 111110111111101111111111111111111111111111111111110111111111111111* -L006006 000000000000000000000000000000000000000000000000000000000000000000* + 111111111111111111111111111111111111111110111111111111111111111111* +L005742 111111111111111111111111111111111111111111111111111111111111111111* +L005808 111111111111111111111111111111111111111111111111111111111111111111* +L005874 111111111111111111111111111111111111111111111111111111111111111111* +L005940 111111111111111111111111111111111111111111111111111111111111111111* +L006006 111111111111111111111111111111111111111111111111111111111111111111* L006072 111111111111111111111111111111111111111111111111111111111111111111* L006138 111111111111111111111111111111111111111111111111111111111111111111* L006204 111111111111111111111111111111111111111111111111111111111111111111* @@ -182,32 +179,32 @@ L006402 000000000000000000000000000000000000000000000000000000000000000000* L006534 0010* L006538 01100011111000* -L006552 10100110010011* -L006566 10100110010101* +L006552 00100110010011* +L006566 01010110010101* L006580 11101011111111* -L006594 00000011111000* -L006608 11100110010010* -L006622 10100110010001* -L006636 11011011110011* +L006594 00110011111000* +L006608 10100110010010* +L006622 01010110010001* +L006636 11101011110011* L006650 10100110010000* -L006664 11100110010011* -L006678 10100110010001* -L006692 11000011110011* +L006664 10100110010011* +L006678 01010110010001* +L006692 11100011110011* L006706 10100110010000* -L006720 10100110010010* -L006734 11111011110101* +L006720 10100111010010* +L006734 11011011110101* L006748 11111111111111* NOTE BLOCK 1 * L006762 - 111101111111111111110111111111111111111111111111111111111111111111 - 111111111101011111111111111111111111111111111111011111111111111111 - 111111101111111111111111111111111110111111111001111111110111111111 - 111011111111111110111111111111111011011111111111111111011110111111 + 111111111111111111110111111111111111111111111111111111111111111111 + 111111111111011111111111111111111111111111111111111111111111111111 + 101101101111111111111111111111111111111111111011111111110111111111 + 111111111111111111111111111111111011011111111111111111011111111111 + 111111111110111111111111111111111111111111111111111111111111111111 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111011111111011111111111111101111111111111111111111111 - 111111110111111111011101111111111111111111111111111111111111111111 - 101111111111111111111111111111111111111011111111111111111111111111 - 111111111111111111111111111110111111111111101111111111111111111111* + 111111111111110111111111111111011111111111111111111111111111111111 + 111111110111111111111111111011111111111110111111111111111111111111 + 111111111111111111011111111111111111111111101111110110111111111111* L007356 111111111111111111111111111111111111111111111111111111111111111111* L007422 000000000000000000000000000000000000000000000000000000000000000000* @@ -215,90 +212,90 @@ L007488 000000000000000000000000000000000000000000000000000000000000000000* L007554 000000000000000000000000000000000000000000000000000000000000000000* L007620 000000000000000000000000000000000000000000000000000000000000000000* L007686 000000000000000000000000000000000000000000000000000000000000000000* -L007752 111111111111111111111111111111111111111101111111111111111111111111* +L007752 111111111111111111011111111111111111111111111111111111111111111111* L007818 000000000000000000000000000000000000000000000000000000000000000000* L007884 000000000000000000000000000000000000000000000000000000000000000000* L007950 000000000000000000000000000000000000000000000000000000000000000000* L008016 000000000000000000000000000000000000000000000000000000000000000000* L008082 111111111111111111111111111111111111111111111111111111111111111111* -L008148 111111111111111111111111111111111111111111011011111111111111111111* -L008214 111111111111111111111111111111111111111111111111111111111111111111* -L008280 111111111111111111111111111111111111111111111111111111111111111111* -L008346 111111111111111111111111111111111111111111111111111111111111111111* -L008412 111111111111111111111111111111111111111111111111111111111111111111* -L008478 111111101111111111111111111111110111101111011010011111111111111111* -L008544 111111101111111111111111111111111011101111011010101111111111111111* -L008610 111111011111111111111111111111111011101111011001101111111111111111* -L008676 111111011111111111111111111111110111101111011001011111111111111111* +L008148 111111111111111011110111110111111111111110011111111110111111111111* +L008214 111111111111111111111111111111111111011110011111111110111111111111* +L008280 000000000000000000000000000000000000000000000000000000000000000000* +L008346 000000000000000000000000000000000000000000000000000000000000000000* +L008412 000000000000000000000000000000000000000000000000000000000000000000* +L008478 111111010111111111111111111111010111111111011011111011111111111111* +L008544 111111010111111111111111111111101011111111011011111011111111111111* +L008610 111111101011111111111111111111010111111111011011111011111111111111* +L008676 111111101011111111111111111111101011111111011011111011111111111111* L008742 111111111111111111111111111111111111111111011011111111101111111111* L008808 111111111111111111111111111111111111111111111111111111111111111111* -L008874 111111111111111111111111111111111011111111011111011111101111111111* -L008940 111111111111111111111111111111110111111111011111101111101111111111* -L009006 111111101111111111111111111111111111111111011101111111101111111111* -L009072 111111011111111111111111111111111111111111011110111111101111111111* -L009138 111111111111111111111111111111111111101111011111111111101111111111* -L009204 111111101111111111111111111111111011011111010110101111111111111111* -L009270 111111101111111111111111111111111011101111011010101111111111111111* -L009336 111111011111111111111111111111111011011111010101101111111111111111* -L009402 111111011111111111111111111111111011101111011001101111111111111111* +L008874 111111111111111111111111111111011011111111011111111111101111111111* +L008940 111111111111111111111111111111100111111111011111111111101111111111* +L009006 111111100111111111111111111111111111111111011111111111101111111111* +L009072 111111011011111111111111111111111111111111011111111111101111111111* +L009138 111111111111111111111111111111111111111111011111111011101111111111* +L009204 111111010111111111111111111111101011111111011011111011111111111111* +L009270 111111101011111111111111111111101011111111011011111011111111111111* +L009336 111111101011111111111111111111101011111111010111110111111111111111* +L009402 111111010111111111111111111111101011111111010111110111111111111111* L009468 111111111111111111111111111111111011111111011111111111111011111111* L009534 111111111111111111111111111111111111111111111111111111111111111111* -L009600 111111101111111111111111111111111111111111011111111111111111111111* -L009666 111111111111111111111111111111111111111111011111101111111011111111* -L009732 111111101111111111111111111111111111111111011101111111111011111111* -L009798 111111011111111111111111111111111111111111011110111111111011111111* -L009864 111111111111111111111111111111111111011111011011111111111011111111* -L009930 111111111111111111111111111111111111101111010111111111111011111111* -L009996 000000000000000000000000000000000000000000000000000000000000000000* -L010062 000000000000000000000000000000000000000000000000000000000000000000* -L010128 000000000000000000000000000000000000000000000000000000000000000000* -L010194 000000000000000000000000000000000000000000000000000000000000000000* +L009600 111110111110111111111111111111111111111111011111111111111111111111* +L009666 101111111101111111111111111111111111111111011111111111111111111111* +L009732 000000000000000000000000000000000000000000000000000000000000000000* +L009798 000000000000000000000000000000000000000000000000000000000000000000* +L009864 000000000000000000000000000000000000000000000000000000000000000000* +L009930 111111111111111111111111111111101111111111011111111111111011111111* +L009996 111111100111111111111111111111111111111111011111111111111011111111* +L010062 111111011011111111111111111111111111111111011111111111111011111111* +L010128 111111111111111111111111111111111111111111011011110111111011111111* +L010194 111111111111111111111111111111111111111111010111111011111011111111* L010260 - 101101111110111111111111111111111111111111111111111111111111111111* + 111111111111111111111111111111111111111110111111111111111111111111* L010326 000000000000000000000000000000000000000000000000000000000000000000* L010392 111111111111111111111111111111111111111111111111111111111111111111* L010458 111111111111111111111111111111111111111111111111111111111111111111* L010524 111111111111111111111111111111111111111111111111111111111111111111* L010590 111111111111111111111111111111111111111111111111111111111111111111* -L010656 111111101111111111111111111111110111011111010110011111111111111111* -L010722 111111101111111111111111111111111011011111010110101111111111111111* -L010788 111111101111111111111111111111110111101111011010011111111111111111* -L010854 111111101111111111111111111111111011101111011010101111111111111111* +L010656 111111101011111111111111111111010111111111011011111011111111111111* +L010722 111111101011111111111111111111101011111111011011111011111111111111* +L010788 111111101011111111111111111111010111111111010111110111111111111111* +L010854 111111101011111111111111111111101011111111010111110111111111111111* L010920 111111101111101111111111111111111111111111011111111111111111111111* L010986 - 101101111110111111111111111111111111111111111111111111111111111111* -L011052 111111111111111111111111111111111011111111011111111111111111111111* -L011118 111111111111101111111111111111111011111111011111011111111111111111* -L011184 111111111111101111111111111111110111111111011111101111111111111111* -L011250 111111111111101111111111111111111111111111011110111111111111111111* -L011316 111111111111101111111111111111111111011111011011111111111111111111* -L011382 111111111111101111111111111111111111101111010111111111111111111111* -L011448 000000000000000000000000000000000000000000000000000000000000000000* -L011514 000000000000000000000000000000000000000000000000000000000000000000* -L011580 000000000000000000000000000000000000000000000000000000000000000000* -L011646 000000000000000000000000000000000000000000000000000000000000000000* + 111111111111111111111111111111111111111110111111111111111111111111* +L011052 111111111111101111111111111111011011111111011111111111111111111111* +L011118 111111111111101111111111111111100111111111011111111111111111111111* +L011184 111111111011101111111111111111111111111111011111111111111111111111* +L011250 111111111111101111111111111111111111111111011011110111111111111111* +L011316 111111111111101111111111111111111111111111010111111011111111111111* +L011382 111111111111111111111111111111111111111111111111111111111111111111* +L011448 111111111111111111111111111111111111111111111111111111111111111111* +L011514 111111111111111111111111111111111111111111111111111111111111111111* +L011580 111111111111111111111111111111111111111111111111111111111111111111* +L011646 111111111111111111111111111111111111111111111111111111111111111111* L011712 - 101101111110111111111111111111111111111111111111111111111111111111* + 111111111111111111111111111111111111111110111111111111111111111111* L011778 000000000000000000000000000000000000000000000000000000000000000000* L011844 111111111111111111111111111111111111111111111111111111111111111111* L011910 111111111111111111111111111111111111111111111111111111111111111111* L011976 111111111111111111111111111111111111111111111111111111111111111111* L012042 111111111111111111111111111111111111111111111111111111111111111111* -L012108 111111111111111111111011111111111111111011011111111111111111111111* -L012174 011011111101110111111111111110111111111011011111111111111110111111* -L012240 011111111101110111111111011110111111111011011111111111111110111111* -L012306 011111110101110111111111111110111111111011011111111111111110111111* -L012372 011111111101110110111111111110111111111011011111111111111110111111* +L012108 111111111111111111110111111011111111111110011111111110111111111111* +L012174 111111111111110111110111111111111111111110011111111110111111111111* +L012240 111111111111111011111011110111111111111110011111111110111111111111* +L012306 111111111111111111110111111111111111011110011111111110111111111111* +L012372 000000000000000000000000000000000000000000000000000000000000000000* L012438 000000000000000000000000000000000000000000000000000000000000000000* -L012504 111111111111111111101111111111111111111111011111111111111111111111* -L012570 011111111101110111111101111110111111111011011111111111111110111111* -L012636 011111111101110111111111111110111110111011011111111111111110111111* -L012702 000000000000000000000000000000000000000000000000000000000000000000* -L012768 000000000000000000000000000000000000000000000000000000000000000000* +L012504 111111111111111111111111111111111111111111111111111111111111111111* +L012570 111111111111111111111111111111111111111111111111111111111111111111* +L012636 111111111111111111111111111111111111111111111111111111111111111111* +L012702 111111111111111111111111111111111111111111111111111111111111111111* +L012768 111111111111111111111111111111111111111111111111111111111111111111* L012834 111111111111111111111111111111111111111111111111111111111111111111* L012900 111111111111111111111111111111111111111111111111111111111111111111* L012966 111111111111111111111111111111111111111111111111111111111111111111* @@ -310,48 +307,48 @@ L013164 L013296 0010* L013300 00100011111000* L013314 00101111111111* -L013328 01010110010100* +L013328 10100110010100* L013342 11011111111110* L013356 11100110011000* L013370 11100110011111* -L013384 01110110011100* +L013384 11100110011100* L013398 11001011111110* L013412 00110011110000* L013426 11100110010011* -L013440 01110110010111* -L013454 11001011110011* -L013468 00111111110000* -L013482 11100110010010* -L013496 01110110010001* -L013510 11100011110011* +L013440 11111011110111* +L013454 11111111110011* +L013468 00110011110000* +L013482 10100110010010* +L013496 11011011110001* +L013510 11111111111111* NOTE BLOCK 2 * L013524 - 011101111111101111111111111111111111111101111111111111111111111111 - 111111011101111111111110111111111111111111111111111111101111111111 - 111111111111111111101111111111111111011111111111111111111111111111 - 111111111111111111111111111111101111111111110111111111111111111111 - 111111111111111111110111111111111111111111111111111011111111111111 - 110111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111111111111111111111111111111111011111111111111111 - 111111110111111101111111111001111111111011111110111111111111111111 - 111111111111111111111111011111110110111111101111111111111111111111* + 111111111111111111111101111111111111111111011111111111111111111111 + 111111111111111101111111110111111111111111111111111011111111111111 + 111111111111111111011111111111111111111111111111111111111111111111 + 111101111111111111110111111111111111111111111011111111111111111111 + 111111101110111111111111111111111111111111111111111111111111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111100111111111111111111111111111111111111111111111111111 + 111111111111111111111111111110111111111010111111111111101111111111 + 101111111011111111111111011111111011111111111111111111111111111111* L014118 - 111101111110111111111111111111111111111111111110111111111111111111* + 111111111111111111111111111111111111111110111111111111111111111111* L014184 000000000000000000000000000000000000000000000000000000000000000000* L014250 000000000000000000000000000000000000000000000000000000000000000000* L014316 000000000000000000000000000000000000000000000000000000000000000000* L014382 000000000000000000000000000000000000000000000000000000000000000000* L014448 000000000000000000000000000000000000000000000000000000000000000000* -L014514 111111111111111111101111111111111111111111111110111111111111111111* +L014514 111111111111111110111111111111111111111110111111111111111111111111* L014580 000000000000000000000000000000000000000000000000000000000000000000* L014646 000000000000000000000000000000000000000000000000000000000000000000* L014712 000000000000000000000000000000000000000000000000000000000000000000* L014778 000000000000000000000000000000000000000000000000000000000000000000* L014844 - 111101111110111111111111111111111111111111111110111111111111111111* -L014910 110111111111111111111111111011111111111111011111110111111111111111* -L014976 111111111111111111111111111111111111111011011011111111111111111111* -L015042 000000000000000000000000000000000000000000000000000000000000000000* + 111111111111111111111111111111111111111110111111111111111111111111* +L014910 011111111111110111111111111111111111111111110111111111101111111111* +L014976 011101111111111111111111111111111111111011111111111111111111111111* +L015042 011111111101110111111111111111111111111111111111110111101111111111* L015108 000000000000000000000000000000000000000000000000000000000000000000* L015174 000000000000000000000000000000000000000000000000000000000000000000* L015240 111111111111111111111111111111111111111111111111111111111111111111* @@ -360,7 +357,7 @@ L015372 111111111111111111111111111111111111111111111111111111111111111111* L015438 111111111111111111111111111111111111111111111111111111111111111111* L015504 111111111111111111111111111111111111111111111111111111111111111111* L015570 - 111101111110111111111111111111111111111111111110111111111111111111* + 111111111111111111111111111111111111111110111111111111111111111111* L015636 000000000000000000000000000000000000000000000000000000000000000000* L015702 111111111111111111111111111111111111111111111111111111111111111111* L015768 111111111111111111111111111111111111111111111111111111111111111111* @@ -372,33 +369,33 @@ L016098 111111111111111111111111111111111111111111111111111111111111111111* L016164 111111111111111111111111111111111111111111111111111111111111111111* L016230 111111111111111111111111111111111111111111111111111111111111111111* L016296 - 111101111110111111111111111111111111111111111110111111111111111111* -L016362 111111111111111111111111111111111111011111101111111111111111111111* -L016428 111011111011111111111011110110100111011111111111111111101111111111* -L016494 111011111111111111111111110111011111011110111111111111111111111111* -L016560 110111111111111111111111011011111111101111011111111111111111111111* -L016626 111011111111111111111111110111111110011111111111111111111111111111* + 111111111111111111111111111111111111111110111111111111111111111111* +L016362 011111111101110111111111111111111111111111111111111111101111111111* +L016428 011111111111111111101111111111111111111011111111111111111111111111* +L016494 000000000000000000000000000000000000000000000000000000000000000000* +L016560 000000000000000000000000000000000000000000000000000000000000000000* +L016626 000000000000000000000000000000000000000000000000000000000000000000* L016692 111111111111111111111111111111111111111111111111111111111111111111* L016758 111111111111111111111111111111111111111111111111111111111111111111* L016824 111111111111111111111111111111111111111111111111111111111111111111* L016890 111111111111111111111111111111111111111111111111111111111111111111* L016956 111111111111111111111111111111111111111111111111111111111111111111* L017022 - 111101111110111111111111111111111111111111111110111111111111111111* + 111111111111111111111111111111111111111110111111111111111111111111* L017088 000000000000000000000000000000000000000000000000000000000000000000* L017154 111111111111111111111111111111111111111111111111111111111111111111* L017220 111111111111111111111111111111111111111111111111111111111111111111* L017286 111111111111111111111111111111111111111111111111111111111111111111* L017352 111111111111111111111111111111111111111111111111111111111111111111* -L017418 111011111011111111111011110110100111011111011111111111101111111111* -L017484 111011111111111111111111110111011111011110011111111111111111111111* -L017550 111111011111111111111111110111111111111111011111111111111111111111* -L017616 111011011111111111111111111111111111111111011111111111111111111111* -L017682 111011111111111111111111110111111110011111011111111111111111111111* +L017418 101111111111111111111111111111111111111111111111111111111111111111* +L017484 111111110111111111111111111111111111111111111111111111111111111111* +L017550 111111111111111111111011111111111111111111101111111111111111111111* +L017616 111111111111111111111111111111110111111111111111111111111111111111* +L017682 111111111111101111110111111111111111111111011111111111111111111111* L017748 111111111111111111111111111111111111111111111111111111111111111111* -L017814 111111111111111111111111111111111111111111101111111111111111111111* -L017880 111111111111111101111111111111111111111111111111011111111111111111* +L017814 011111011111111111111111111111111111111110111111111111111111111111* +L017880 111111111111111111111111100101111111111111111111111111111111111111* L017946 000000000000000000000000000000000000000000000000000000000000000000* L018012 000000000000000000000000000000000000000000000000000000000000000000* L018078 000000000000000000000000000000000000000000000000000000000000000000* @@ -414,18 +411,18 @@ L018606 111111111111111111111111111111111111111111111111111111111111111111* L018672 111111111111111111111111111111111111111111111111111111111111111111* L018738 111111111111111111111111111111111111111111111111111111111111111111* L018804 111111111111111111111111111111111111111111111111111111111111111111* -L018870 110111111111111111111111011011111111111111011111111111111111111111* -L018936 011111111111111111111111111111111111111011011111111111111111111111* -L019002 110111111111111111111101111011111111111111011111110111111111111111* -L019068 000000000000000000000000000000000000000000000000000000000000000000* -L019134 000000000000000000000000000000000000000000000000000000000000000000* +L018870 101111111111111111111111111111111111111111111111111111111111111111* +L018936 111111110111111111111111111111111111111111111111111111111111111111* +L019002 111111111111111111111011111111111111111111101111111111111111111111* +L019068 111111111111111111111101101101111111111111111111111111111111111111* +L019134 111111111111111111111111111111110111111111111111111111111111111111* L019200 000000000000000000000000000000000000000000000000000000000000000000* -L019266 111111111111011111111111111111111111111111111111111111111111111111* -L019332 111111111111111111111111111111111111111111111111111111111111111111* -L019398 111111111111111111111111111111111111111111111111111111111111111111* -L019464 111111111111111111111111111111111111111111111111111111111111111111* -L019530 111111111111111111111111111111111111111111111111111111111111111111* +L019266 111111111111101111110111111111111111111111011111111111111111111111* +L019332 000000000000000000000000000000000000000000000000000000000000000000* +L019398 000000000000000000000000000000000000000000000000000000000000000000* +L019464 000000000000000000000000000000000000000000000000000000000000000000* +L019530 000000000000000000000000000000000000000000000000000000000000000000* L019596 111111111111111111111111111111111111111111111111111111111111111111* L019662 111111111111111111111111111111111111111111111111111111111111111111* L019728 111111111111111111111111111111111111111111111111111111111111111111* @@ -437,49 +434,49 @@ L019926 L020058 0010* L020062 00100011110000* L020076 01101111110011* -L020090 11100110011100* +L020090 10100110011100* L020104 11101111110010* L020118 00111011110000* L020132 00000011110011* -L020146 10100111010110* +L020146 11100110010110* L020160 11100011110010* L020174 00111111110001* L020188 10100110010011* -L020202 10100110011110* +L020202 01110110011110* L020216 11100011111111* L020230 00111011111001* L020244 10100110010011* -L020258 00010110010000* -L020272 11101111111111* +L020258 11110111110000* +L020272 11111111111111* NOTE BLOCK 3 * L020286 - 111111111111111111111101111101111110111111011111111111111111111111 - 111011110101111111111111101111111111111111111111111111111111111111 + 111111011111111111101111111111111111111111111111111111111111111111 + 111111110101111111111111101111111111111111111111111111111111111111 + 111111111111111111111101111111111111111111101110111111111111111111 + 111111111111111111111011111111111111111111110111111111111111111111 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111101111111111111111111111111011111111111111111111 - 111111111111111111111111111111101111111111111111011111111111111111 - 111111111111111111111111111111111111111111111111111111111101111111 - 111111111111111110111111111111111111011111111111111111111111111111 - 111111111111111111110111111011110111111010111111111111111111111111 - 101101011111111111111111111111111111111111111111111111111011111111* + 111111111111111101111111111111111111111111111111111111111101111111 + 111111111111110111111111111111111111011111111111111111111111101111 + 111111111111111111111111111011111111111010111111111111111111111111 + 100101111111111111111111111111110111111111111111111111111111111111* L020880 - 111111111111111111111111111111111111111111111111111111111111111111* -L020946 000000000000000000000000000000000000000000000000000000000000000000* -L021012 000000000000000000000000000000000000000000000000000000000000000000* -L021078 000000000000000000000000000000000000000000000000000000000000000000* + 111111111111111111111111111111111111111101111111111111111111111111* +L020946 101011111111111111111111111111111111111111111111111111111111111111* +L021012 111011111111110111111111101011111011101111111111111111111110111111* +L021078 010111111111111011111111010111111011101111111110111111111101111111* L021144 000000000000000000000000000000000000000000000000000000000000000000* L021210 000000000000000000000000000000000000000000000000000000000000000000* -L021276 011111111001111111111111111111111111111111111111111111110101111111* +L021276 011111111001110111111111111111111111111111111111111111111111011111* L021342 011110111011111111111111111111111111111111111111111111111111111111* L021408 000000000000000000000000000000000000000000000000000000000000000000* L021474 000000000000000000000000000000000000000000000000000000000000000000* L021540 000000000000000000000000000000000000000000000000000000000000000000* L021606 111111111111111111111111111111111111111111111111111111111111111111* -L021672 111111011111111111111111101111111111111111111111101111111111111111* -L021738 111111011111111111111111111011111111111111111111111111111111111111* -L021804 111111011111111111111111111111111111111111111111111111111101111111* -L021870 111111111111111111111111010111110111111111111111011111111110111111* +L021672 111111111111111111111111111111110111111111111111111111111111111111* +L021738 111111111111111011111111010111111111111111111111111111111101111111* +L021804 000000000000000000000000000000000000000000000000000000000000000000* +L021870 000000000000000000000000000000000000000000000000000000000000000000* L021936 000000000000000000000000000000000000000000000000000000000000000000* L022002 111111111111111111111111111111111111111111111111111111111111111111* L022068 111111111111111111111111111111111111111111111111111111111111111111* @@ -488,43 +485,43 @@ L022200 111111111111111111111111111111111111111111111111111111111111111111* L022266 111111111111111111111111111111111111111111111111111111111111111111* L022332 111111111111111111111111111111111111111111111111111111111111111111* -L022398 101111111111111111111011111111111111111111111111111111111111111111* -L022464 111111101111111111111011101011111011111111111111101111111101111111* -L022530 011111101111111111100111010111110111111111111111101111111110111111* +L022398 111111111111111110111111111111111111111110111111111111111111111111* +L022464 111111111111111111111011111111111111111001111111111111111111111111* +L022530 000000000000000000000000000000000000000000000000000000000000000000* L022596 000000000000000000000000000000000000000000000000000000000000000000* L022662 000000000000000000000000000000000000000000000000000000000000000000* -L022728 111011111111111111111111111111111111111110111111111111111111111111* -L022794 111111111111111111111111111111111111111001101111111111111111111111* -L022860 000000000000000000000000000000000000000000000000000000000000000000* -L022926 000000000000000000000000000000000000000000000000000000000000000000* -L022992 000000000000000000000000000000000000000000000000000000000000000000* +L022728 000000000000000000000000000000000000000000000000000000000000000000* +L022794 111111111111111111111111111111111111111111111111111111111111111111* +L022860 111111111111111111111111111111111111111111111111111111111111111111* +L022926 111111111111111111111111111111111111111111111111111111111111111111* +L022992 111111111111111111111111111111111111111111111111111111111111111111* L023058 - 111111111111111111111111111111111111111101110111111111111111111111* -L023124 111111111111111111111111101111110111111111111111111111111111111111* -L023190 111111111111111111111111111011110111111111111111111111111111111111* -L023256 111111111111111111111111111111110111111111111111111111111101111111* -L023322 111111101111111111111111010111111011111111111111111111111110111111* -L023388 000000000000000000000000000000000000000000000000000000000000000000* + 011111111111111111111111111111111111111101111111111111111111111111* +L023124 011111111111111111111111111111111111111111101111111111111111111111* +L023190 111111111111111111111111111111111111111111111111111111111111111111* +L023256 111111111111111111111111111111111111111111111111111111111111111111* +L023322 111111111111111111111111111111111111111111111111111111111111111111* +L023388 111111111111111111111111111111111111111111111111111111111111111111* L023454 111111111111111111111111111111111111111111111111111111111111111111* L023520 111111111111111111111111111111111111111111111111111111111111111111* L023586 111111111111111111111111111111111111111111111111111111111111111111* L023652 111111111111111111111111111111111111111111111111111111111111111111* L023718 111111111111111111111111111111111111111111111111111111111111111111* L023784 - 111111111111111111111111111111111111111101110111111111111111111111* -L023850 111111111111111111111101111111101111111111111111111111111111111111* + 011111111111111111111111111111111111111101111111111111111111111111* +L023850 111111111111111111111110111111111111111111110111111111111111111111* L023916 111111111111111111111111111111111111111111111111111111111111111111* L023982 111111111111111111111111111111111111111111111111111111111111111111* L024048 111111111111111111111111111111111111111111111111111111111111111111* L024114 111111111111111111111111111111111111111111111111111111111111111111* -L024180 000000000000000000000000000000000000000000000000000000000000000000* +L024180 111111011111111111111111111111111111111111111111111111111111111111* L024246 111111111111111111111111111111111111111111111111111111111111111111* L024312 111111111111111111111111111111111111111111111111111111111111111111* L024378 111111111111111111111111111111111111111111111111111111111111111111* L024444 111111111111111111111111111111111111111111111111111111111111111111* L024510 - 111111111111111111111111111111111111101111111111111111111111111111* -L024576 111111111111111101111111111111111111111111111111111111111111111111* + 000000000000000000000000000000000000000000000000000000000000000000* +L024576 111111111111111111111111111111111111111111111111111111111111111111* L024642 111111111111111111111111111111111111111111111111111111111111111111* L024708 111111111111111111111111111111111111111111111111111111111111111111* L024774 111111111111111111111111111111111111111111111111111111111111111111* @@ -536,23 +533,23 @@ L025104 111111111111111111111111111111111111111111111111111111111111111111* L025170 111111111111111111111111111111111111111111111111111111111111111111* L025236 111111111111111111111111111111111111111111111111111111111111111111* -L025302 111111111111111111111101111111111110111111111111111111111111111111* +L025302 111111111111111111101111111111111111111111110111111111111111111111* L025368 111111111111111111111111111111111111111111111111111111111111111111* L025434 111111111111111111111111111111111111111111111111111111111111111111* L025500 111111111111111111111111111111111111111111111111111111111111111111* L025566 111111111111111111111111111111111111111111111111111111111111111111* -L025632 111111111111111111111111111101111111111111111111111111111111111111* -L025698 111111111111111111111111111111111111111111111111111111111111111111* -L025764 111111111111111111111111111111111111111111111111111111111111111111* -L025830 111111111111111111111111111111111111111111111111111111111111111111* -L025896 111111111111111111111111111111111111111111111111111111111111111111* +L025632 111111111111111111111111101111111111111111111111111111111101111111* +L025698 111111111111111111111111111011111111111111111111111111111101111111* +L025764 111111111111110111111111111111111111111111111111111111111101111111* +L025830 111111111111111011111111010111111111101111111111111111111110111111* +L025896 000000000000000000000000000000000000000000000000000000000000000000* L025962 000000000000000000000000000000000000000000000000000000000000000000* -L026028 111111111111111111111111010111110111111111111111111111111110111111* -L026094 111111111111111111111111111111111111111111111111011111111111111111* -L026160 000000000000000000000000000000000000000000000000000000000000000000* -L026226 000000000000000000000000000000000000000000000000000000000000000000* -L026292 000000000000000000000000000000000000000000000000000000000000000000* +L026028 111111111111111111111111111111111111111111111111111111111111111111* +L026094 111111111111111111111111111111111111111111111111111111111111111111* +L026160 111111111111111111111111111111111111111111111111111111111111111111* +L026226 111111111111111111111111111111111111111111111111111111111111111111* +L026292 111111111111111111111111111111111111111111111111111111111111111111* L026358 111111111111111111111111111111111111111111111111111111111111111111* L026424 111111111111111111111111111111111111111111111111111111111111111111* L026490 111111111111111111111111111111111111111111111111111111111111111111* @@ -562,47 +559,47 @@ L026688 000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000* L026820 0010* -L026824 00100011110010* -L026838 11100110011111* -L026852 10100110011101* -L026866 11101011111111* -L026880 10100111011010* -L026894 11101011111110* -L026908 10100110010101* +L026824 10100111010000* +L026838 11100110011110* +L026852 00100110010100* +L026866 11100011111111* +L026880 11101111111001* +L026894 00001011111111* +L026908 01010110010100* L026922 11101011110011* L026936 01110011110010* -L026950 00001011110010* -L026964 00010110010111* -L026978 11101111110011* +L026950 00000110010010* +L026964 11011011110001* +L026978 11111111110011* L026992 01110011111010* -L027006 00000110011110* -L027020 00100110010001* -L027034 11101011110011* +L027006 10100110011110* +L027020 11011011110001* +L027034 11111111110011* NOTE BLOCK 4 * L027048 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111111111111111011111110111111111110111111111111111 - 111111111101111111111111110111111111111111110111101111111111111111 - 111001111111111111111111111111111111111111011110111101101111111110 + 111111111101111111111111111111111111111111111111110111110111111111 + 111111110111111111111111111111111111111101110111101111011111111111 + 111011011111111111111111111011111111111111111111111101111111111111 111111111111110111111111111111111111111111111111111111111111111111 - 111111110111111111111111011111111111111111111111111111111111111111 - 111111111111101111111101111111111101111111111111111111111111111111 - 101111011111111111101111111110111111111111111111111111111111110111 - 111111111111111101111111111111111011101110111111111111111011111111* + 111111111111111111111111011111111111011011111111111111111111111111 + 111111111111011111111111111110111001111111101111111111111111111111 + 111111111111111111101111111111011111111111111110111111111101111111 + 101110111111111101111110111111111111111111111111111111111111111110* L027642 - 110111110111111101101110101111111110111111111111011111011111111111* + 110111111111101101101111100111111110011111111111011111111111111111* L027708 000000000000000000000000000000000000000000000000000000000000000000* L027774 000000000000000000000000000000000000000000000000000000000000000000* L027840 000000000000000000000000000000000000000000000000000000000000000000* L027906 000000000000000000000000000000000000000000000000000000000000000000* L027972 000000000000000000000000000000000000000000000000000000000000000000* -L028038 101111111111011111111111111111101011111111111111111111111111111111* -L028104 011111111111101111111111111111111111111111111111111111111111111111* +L028038 111110111110111111111111111111111111111111011110111111111111111111* +L028104 111111111111111111111111111111111111111111101101111111111111111111* L028170 000000000000000000000000000000000000000000000000000000000000000000* L028236 000000000000000000000000000000000000000000000000000000000000000000* L028302 000000000000000000000000000000000000000000000000000000000000000000* L028368 - 011111111111111111111111111111111111111111111111111111111111111101* + 011111111111111111111111111111111111111111111101111111111111111111* L028434 111111111111111111111111111111111111111111111111111111111111111111* L028500 111111111111111111111111111111111111111111111111111111111111111111* L028566 111111111111111111111111111111111111111111111111111111111111111111* @@ -615,16 +612,16 @@ L028962 111111111111111111111111111111111111111111111111111111111111111111* L029028 111111111111111111111111111111111111111111111111111111111111111111* L029094 000000000000000000000000000000000000000000000000000000000000000000* -L029160 111110111111111111101111111111111111111111111111111111111111111111* +L029160 111111111111111111101111111111111111111111111111111111101111111111* L029226 111111111111111111111111111111111111111111111111111111111111111111* L029292 111111111111111111111111111111111111111111111111111111111111111111* L029358 111111111111111111111111111111111111111111111111111111111111111111* L029424 111111111111111111111111111111111111111111111111111111111111111111* -L029490 111111111111111111111111111111011111111111111111111111111111111111* -L029556 111111011110111011111111111011111111011001101011111010111011110111* -L029622 000000000000000000000000000000000000000000000000000000000000000000* -L029688 000000000000000000000000000000000000000000000000000000000000000000* -L029754 000000000000000000000000000000000000000000000000000000000000000000* +L029490 111111111111111111111111111111111111110111111111111111111111111111* +L029556 111111111111111111111111111111111111111111111111111111111111111111* +L029622 111111111111111111111111111111111111111111111111111111111111111111* +L029688 111111111111111111111111111111111111111111111111111111111111111111* +L029754 111111111111111111111111111111111111111111111111111111111111111111* L029820 000000000000000000000000000000000000000000000000000000000000000000* L029886 111111111111111111111111111111111111111111111111111111111111111111* @@ -639,16 +636,16 @@ L030414 111111111111111111111111111111111111111111111111111111111111111111* L030480 111111111111111111111111111111111111111111111111111111111111111111* L030546 000000000000000000000000000000000000000000000000000000000000000000* -L030612 111111111111111111111111111111111111111111111101111111111111111111* +L030612 011111111111111111101111111111111111111111111111111111111111111111* L030678 111111111111111111111111111111111111111111111111111111111111111111* L030744 111111111111111111111111111111111111111111111111111111111111111111* L030810 111111111111111111111111111111111111111111111111111111111111111111* L030876 111111111111111111111111111111111111111111111111111111111111111111* -L030942 111111111111111111111111111111111111111111111111111111111111111111* -L031008 111111111111111111111111111111111111111111111111111111111111111111* -L031074 111111111111111111111111111111111111111111111111111111111111111111* -L031140 111111111111111111111111111111111111111111111111111111111111111111* -L031206 111111111111111111111111111111111111111111111111111111111111111111* +L030942 111111101011111011111101111111011011111110111011111010111001111101* +L031008 111111111101111111111111111111111111111111111111111111111111111111* +L031074 000000000000000000000000000000000000000000000000000000000000000000* +L031140 000000000000000000000000000000000000000000000000000000000000000000* +L031206 000000000000000000000000000000000000000000000000000000000000000000* L031272 000000000000000000000000000000000000000000000000000000000000000000* L031338 111111111111111111111111111111111111111111111111111111111111111111* @@ -663,12 +660,12 @@ L031866 111111111111111111111111111111111111111111111111111111111111111111* L031932 111111111111111111111111111111111111111111111111111111111111111111* L031998 111111111111111111111111111101111111111111111111111111111111111111* -L032064 111111011110111011111111111011111111011001101011111010111011110111* +L032064 111111101011111011111101111111011011111110111011111010111001111101* L032130 111111111111111111111111111111111111111111111111111111111111111111* L032196 111111111111111111111111111111111111111111111111111111111111111111* L032262 111111111111111111111111111111111111111111111111111111111111111111* L032328 111111111111111111111111111111111111111111111111111111111111111111* -L032394 111111111111111111111111111111111111111111111111111111111111111111* +L032394 011111111111111111111111111111111111111111111110111111111111111111* L032460 111111111111111111111111111111111111111111111111111111111111111111* L032526 111111111111111111111111111111111111111111111111111111111111111111* L032592 111111111111111111111111111111111111111111111111111111111111111111* @@ -692,45 +689,45 @@ L033582 0010* L033586 00100011110000* L033600 10101111110011* L033614 11011011110100* -L033628 11111111110010* -L033642 01111011111001* -L033656 10101111111110* -L033670 11011011110000* -L033684 11111111111110* -L033698 00110110010001* -L033712 11001011111110* -L033726 11110111110000* -L033740 11111111111110* -L033754 00110011110001* -L033768 11001011111110* -L033782 11110111111100* -L033796 11111111111110* +L033628 11110011110010* +L033642 01111111111001* +L033656 00000110011111* +L033670 11010111110000* +L033684 11110011111111* +L033698 01110110010000* +L033712 10100111111110* +L033726 11011111110000* +L033740 11110011111111* +L033754 00111011110001* +L033768 01000110011111* +L033782 11010111111100* +L033796 11111111111111* NOTE BLOCK 5 * L033810 - 111111111111100111111111111111111110111111011111111111111111111111 - 101111011101111111111111111111111111101111111111111111111111111111 - 111110111111111111111111111110101111111111111111111111111111111111 - 111111111111111111111111111111111111111111111111111111111110111111 - 111111111111111111111010111111111111111111111111111011111111111111 - 110111111111111111011111111111111111111011111111111111101111111111 - 111111111111111111111111111111111111111111111111111111111111111111 - 111111111011111111111111111111111111111110111111111111111111101111 - 111111111111111111111111110111111111111111111111101111111111111111* + 111111111111111111111111111111101110111111111111111111111111111111 + 111111111101111111111111111111111111111111111111111111111111111111 + 111111111111101111111111111110111111111110111111111111111111111111 + 111011111111111110111111111111111111111111111111111111111110111111 + 111111111111111111111011111111111111111111111111111011111111111111 + 111110111111111111111111011111111111111111111111011111111111111111 + 111111110111110111011101111111111011111111111111111111111111111111 + 111111111111111111111111111011111111111011101110111111111111111111 + 101111111111111111111111111111111111111111111111111111111111111111* L034404 000000000000000000000000000000000000000000000000000000000000000000* -L034470 111111110111111111111111111111111111111111111111010111111111111111* -L034536 111011111111111111111111111111111111111111111111010111111111111111* -L034602 111111111101100111111111111111111111111111101111011011111110111111* +L034470 011111111111111111111111110111111111111111111111110111111111111111* +L034536 011111111111111011111111111111111111111111111111110111111111111111* +L034602 011111111101111111111111111101101111111110111111111011111110111111* L034668 000000000000000000000000000000000000000000000000000000000000000000* L034734 000000000000000000000000000000000000000000000000000000000000000000* -L034800 111111111111111111111011111111111111111111111111011011111111111111* -L034866 111111111111111111111111111111101111111111111111010111111111111111* +L034800 011111111111111111111111111111110111111111111111111111111111111111* +L034866 101111111111111111110111111111111111111111111111111111111111111111* L034932 000000000000000000000000000000000000000000000000000000000000000000* L034998 000000000000000000000000000000000000000000000000000000000000000000* L035064 000000000000000000000000000000000000000000000000000000000000000000* L035130 000000000000000000000000000000000000000000000000000000000000000000* -L035196 111111111111111111111111111011111111111111111111011111111111111111* +L035196 111111111111111111111111111111111111111111111111111111111111111111* L035262 111111111111111111111111111111111111111111111111111111111111111111* L035328 111111111111111111111111111111111111111111111111111111111111111111* L035394 111111111111111111111111111111111111111111111111111111111111111111* @@ -742,14 +739,14 @@ L035724 111111111111111111111111111111111111111111111111111111111111111111* L035790 111111111111111111111111111111111111111111111111111111111111111111* L035856 000000000000000000000000000000000000000000000000000000000000000000* -L035922 110111111001100111011111111111111111111111101111011111111110111111* -L035988 111111111111111111111111111111111111111111111111101111111101111111* -L036054 110111111011111111011111111111111111111111111111011111111101111111* -L036120 111111111101100111111111111111111111111111101111011111111110111111* -L036186 000000000000000000000000000000000000000000000000000000000000000000* -L036252 111111111111111111111101111111111111111110111111011111111111111111* -L036318 111111111111111111111111111110111111110101111111011111111111111111* -L036384 000000000000000000000000000000000000000000000000000000000000000000* +L035922 011111111111111111111111111111111111111011111111111111111110111111* +L035988 011001111101111111111011111111111111111010111101111111111111111111* +L036054 011101111101111111111011011111111111111010111101111111111111111111* +L036120 011101110101111111111011111111111111111010111101111111111111111111* +L036186 011101111101111110111011111111111111111010111101111111111111111111* +L036252 111111111111111111111111111111011111111111111111111111111111111111* +L036318 011101111101111111111001111111111111111010111101111111111111111111* +L036384 011101111101101111111011111111111111111010111101111111111111111111* L036450 000000000000000000000000000000000000000000000000000000000000000000* L036516 000000000000000000000000000000000000000000000000000000000000000000* L036582 @@ -766,16 +763,16 @@ L037176 111111111111111111111111111111111111111111111111111111111111111111* L037242 111111111111111111111111111111111111111111111111111111111111111111* L037308 000000000000000000000000000000000000000000000000000000000000000000* -L037374 110111011011111111111111111111111111111111111111011111111111111111* -L037440 111101101011111111111111111111111111111111111111011111111111111111* -L037506 110101101111111111111111111111111111111111111111011111111111111111* -L037572 000000000000000000000000000000000000000000000000000000000000000000* +L037374 011111111101110111111111111001101111111110111111011111111110111111* +L037440 101111111111111111111111111111111111111101111111111111111111111111* +L037506 011111111111110111111111111011111111111101111111011111111111111111* +L037572 011111111101111111111111111101101111111110111111111111111110111111* L037638 000000000000000000000000000000000000000000000000000000000000000000* -L037704 111111111111111111111110111111111111111110111111011111111111111111* -L037770 111111111111111111111111111111111111100101111111011111111111111111* -L037836 000000000000000000000000000000000000000000000000000000000000000000* -L037902 000000000000000000000000000000000000000000000000000000000000000000* -L037968 000000000000000000000000000000000000000000000000000000000000000000* +L037704 011111111111111111101111111111111111111111111111111111111111111111* +L037770 111111111111111111111111111111111111111111111111111111111111111111* +L037836 111111111111111111111111111111111111111111111111111111111111111111* +L037902 111111111111111111111111111111111111111111111111111111111111111111* +L037968 111111111111111111111111111111111111111111111111111111111111111111* L038034 000000000000000000000000000000000000000000000000000000000000000000* L038100 111111111111111111111111111111111111111111111111111111111111111111* @@ -790,12 +787,12 @@ L038628 111111111111111111111111111111111111111111111111111111111111111111* L038694 111111111111111111111111111111111111111111111111111111111111111111* L038760 000000000000000000000000000000000000000000000000000000000000000000* -L038826 111111111111111111111111111111111111111111111111101111111111111111* -L038892 111111111111111111111111111111111101111111111111111011111111111111* -L038958 011111111111111111111111111111101111111111111111110111101111111111* +L038826 011111111111110111111111111011111111111111111111110111111111111111* +L038892 011111111111111111111111111011111101111111111111111111111111111111* +L038958 011111111111110111111111111111111101111111111111111111111111111111* L039024 000000000000000000000000000000000000000000000000000000000000000000* L039090 000000000000000000000000000000000000000000000000000000000000000000* -L039156 111111111111111111111111111111111111111111111111111111111111011111* +L039156 111111111111111111111111111111111111111111011111111111111111111111* L039222 111111111111111111111111111111111111111111111111111111111111111111* L039288 111111111111111111111111111111111111111111111111111111111111111111* L039354 111111111111111111111111111111111111111111111111111111111111111111* @@ -817,51 +814,51 @@ L040212 000000000000000000000000000000000000000000000000000000000000000000* L040344 0010* L040348 10100110011110* -L040362 11100110010010* -L040376 01010110011110* -L040390 11100011110011* -L040404 00100111011111* -L040418 11100110010011* -L040432 11011011111110* -L040446 11110011110011* -L040460 10100110011111* -L040474 11100110010011* -L040488 11011111111110* -L040502 11110011111110* -L040516 10100110011111* -L040530 00000110011111* -L040544 11011011111110* -L040558 11111111111111* +L040362 10100110010010* +L040376 11011111111110* +L040390 11111011110011* +L040404 11100110011110* +L040418 00110110010010* +L040432 11011111111111* +L040446 11111011110011* +L040460 00100111011110* +L040474 01000110010010* +L040488 11010011111110* +L040502 11111011111111* +L040516 10100110011110* +L040530 00000110011110* +L040544 11011111111111* +L040558 11110011111111* NOTE BLOCK 6 * L040572 - 111111111111111011101011111111111111111111111111111111111111111111 - 111111111101111111111111101111111111111111111011111111111111111111 - 111111111111111111111111111011111111111111111110111111111111111111 - 111111111011111111111111111111111111111111111111111111111111111110 - 111111111111111111111111111111111110111111111111011011111111111111 - 110101111111111111111111111111111111111011111111111111111111111111 - 011111111111101111111111111111111111111111111111111111111111111111 - 111111111111111101111111111111110111111110111111111111101111111111 - 111111011111111111111111111111111111111111101111111111111111111111* + 111011111111111111101111111111111111111111111111111111111111111111 + 111111111111111111111111111110111111111111111111111111101111111111 + 111111111111111111111111111111101111111111111111111111111111111111 + 111111111011111111111111111111111111111111111011111111111111111111 + 111111111110111111111111111111111111111111111111111111111111111111 + 111111111111101111111111111111111111111111011111111111111111111111 + 111111111111110111111111111111111111011111111111011111111011111111 + 111101111111111101111111111011111111111010111111111111111111111111 + 101111011111111111110111011111111111111111111111111111111111111111* L041166 111111111111111111111111111111111111111111111111111111111111111111* -L041232 111111111111111111111111111111111110110101011111111111111111111111* -L041298 111111111111101111111111111111111111111110011111111111111111111111* +L041232 011111111111111111111111111111111111111110111111111111111011111111* +L041298 000000000000000000000000000000000000000000000000000000000000000000* L041364 000000000000000000000000000000000000000000000000000000000000000000* L041430 000000000000000000000000000000000000000000000000000000000000000000* L041496 000000000000000000000000000000000000000000000000000000000000000000* -L041562 111101111111111111111111111111111111111111111111111111111111111111* +L041562 111111111111111111111111011111111111111111111111111111111111111111* L041628 000000000000000000000000000000000000000000000000000000000000000000* L041694 000000000000000000000000000000000000000000000000000000000000000000* L041760 000000000000000000000000000000000000000000000000000000000000000000* L041826 000000000000000000000000000000000000000000000000000000000000000000* L041892 111111111111111111111111111111111111111111111111111111111111111111* -L041958 111111111011111111111111111111111111111111111111111111111111111111* -L042024 111111111111111111111111111111111111111111111111111111111111111111* -L042090 111111111111111111111111111111111111111111111111111111111111111111* -L042156 111111111111111111111111111111111111111111111111111111111111111111* -L042222 111111111111111111111111111111111111111111111111111111111111111111* +L041958 011101111111111011111111110111111111111111111111111111111111111111* +L042024 011111111011111111111111111111111111111011111111111111111111111111* +L042090 000000000000000000000000000000000000000000000000000000000000000000* +L042156 000000000000000000000000000000000000000000000000000000000000000000* +L042222 000000000000000000000000000000000000000000000000000000000000000000* L042288 111111111111111111111111111111111111111111111111111111111111111111* L042354 111111111111111111111111111111111111111111111111111111111111111111* L042420 111111111111111111111111111111111111111111111111111111111111111111* @@ -869,71 +866,71 @@ L042486 111111111111111111111111111111111111111111111111111111111111111111* L042552 111111111111111111111111111111111111111111111111111111111111111111* L042618 000000000000000000000000000000000000000000000000000000000000000000* -L042684 111111011111111111111111111111111011111111111111101111111111111111* -L042750 111111101111111111111111111111110111111111111111011111111111111111* +L042684 111111101111111111111111111111111111011111101111111111111111111111* +L042750 111111011111111111111111111111111111101111011111111111111111111111* L042816 000000000000000000000000000000000000000000000000000000000000000000* L042882 000000000000000000000000000000000000000000000000000000000000000000* L042948 000000000000000000000000000000000000000000000000000000000000000000* -L043014 111111111111111111111111111111111111111111011111111111111111111101* -L043080 111011111111111111110111111111111111111111010101111111011111111111* -L043146 000000000000000000000000000000000000000000000000000000000000000000* +L043014 011111111111111111111111110111111111111111110111111111111111111111* +L043080 011111111111111011111111111111111111111111110111111111111111111111* +L043146 010111111111111011111111110111111111111111111111111111111111111111* L043212 000000000000000000000000000000000000000000000000000000000000000000* L043278 000000000000000000000000000000000000000000000000000000000000000000* L043344 000000000000000000000000000000000000000000000000000000000000000000* -L043410 111111111111111111111111111111111111111111011101111111101111111111* -L043476 110111111111111111111111111111111111111111011101111111111111111111* -L043542 111011111111111111111111111111111111111111011110111111011111111111* -L043608 111111111111111111110111111111111111111111010101111111111111111111* -L043674 000000000000000000000000000000000000000000000000000000000000000000* +L043410 011111111111111111111011111111111111111111111111111111111111111111* +L043476 111111111111111111111111111111111111111111111111111111111111111111* +L043542 111111111111111111111111111111111111111111111111111111111111111111* +L043608 111111111111111111111111111111111111111111111111111111111111111111* +L043674 111111111111111111111111111111111111111111111111111111111111111111* L043740 111111111111111111111111111111111111111111111111111111111111111111* L043806 111111111111111111111111111111111111111111111111111111111111111111* L043872 111111111111111111111111111111111111111111111111111111111111111111* L043938 111111111111111111111111111111111111111111111111111111111111111111* L044004 111111111111111111111111111111111111111111111111111111111111111111* L044070 - 111111111110111111111111111111111111111110111111111111111111111101* -L044136 111111111111111111111111111111111111111111101111111111111111111111* -L044202 111111111111111111111111110111111111110101111111111111111111111111* -L044268 111111111111111101111111111111111111111110111111111111111111111111* + 111111111111111111111111111111111111111110111111111111111111111111* +L044136 101111111111111111111111111111111111111111111111111111111111111111* +L044202 111111111111111101111111111111111111111110111111111111111111111111* +L044268 000000000000000000000000000000000000000000000000000000000000000000* L044334 000000000000000000000000000000000000000000000000000000000000000000* L044400 000000000000000000000000000000000000000000000000000000000000000000* -L044466 111111111111111111111111011111111111111111111111111111101111111111* -L044532 110111111111111111111111011111111111111111111111111111111111111111* -L044598 111011111111111111111111101111111111111111111111111111011111111111* +L044466 111111111111111111111111111011111111111111111111111111011111111111* +L044532 111111111111110111111111111111111111111111111111111111011111111111* +L044598 111111111111111011111111110111111111111111111111111111101111111111* L044664 000000000000000000000000000000000000000000000000000000000000000000* L044730 000000000000000000000000000000000000000000000000000000000000000000* L044796 - 111111111110111111111111111111111111111110111111111111111111111111* -L044862 111011111111111111110111111111111111111111011101111111011111111111* -L044928 111111111111111111111111111111111111111111010111111111111111111111* -L044994 000000000000000000000000000000000000000000000000000000000000000000* -L045060 000000000000000000000000000000000000000000000000000000000000000000* -L045126 000000000000000000000000000000000000000000000000000000000000000000* + 111111111111111111111111111111111111111110111111111111111111111111* +L044862 111111111111111111111111111111111111111111111111111111111111111111* +L044928 111111111111111111111111111111111111111111111111111111111111111111* +L044994 111111111111111111111111111111111111111111111111111111111111111111* +L045060 111111111111111111111111111111111111111111111111111111111111111111* +L045126 111111111111111111111111111111111111111111111111111111111111111111* L045192 111111111111111111111111111111111111111111111111111111111111111111* L045258 111111111111111111111111111111111111111111111111111111111111111111* L045324 111111111111111111111111111111111111111111111111111111111111111111* L045390 111111111111111111111111111111111111111111111111111111111111111111* L045456 111111111111111111111111111111111111111111111111111111111111111111* L045522 - 111111111111111111111111111111111111111110111111111111111111111101* -L045588 111111111111111111111111111111111111111001011111111111111111111111* -L045654 111111111111111011111111111111111111111101011111111111111111111111* -L045720 101111111111111110111111111111111111111110011111111111111111111111* + 111111111111111111111111111111111111111110111111111111111111111111* +L045588 011111111111111111111111111111111111111101111111111111111111111111* +L045654 011111111111111110111111111111111111111111111111101111111111111111* +L045720 000000000000000000000000000000000000000000000000000000000000000000* L045786 000000000000000000000000000000000000000000000000000000000000000000* L045852 000000000000000000000000000000000000000000000000000000000000000000* -L045918 110111111111111111111111111111111111111111011111110111101111111111* -L045984 111111111111111111011111111111111111111111011111111111101111111111* -L046050 110111111111111111011111111111111111111111011111111111111111111111* +L045918 101111111111111111111111111111111111111111111111111111111111111111* +L045984 111111111110111111011111111111111111111111111111111111111111111111* +L046050 111111111101101111111111111101101111111111111111111111111111111111* L046116 000000000000000000000000000000000000000000000000000000000000000000* L046182 000000000000000000000000000000000000000000000000000000000000000000* L046248 000000000000000000000000000000000000000000000000000000000000000000* -L046314 111111111111111111110111111111111111111111011111111111111111111111* -L046380 111011111111111111111111111111111111111111011001111111011111111111* -L046446 111011111111111111111011111111111111111111011101111111011111111111* -L046512 000000000000000000000000000000000000000000000000000000000000000000* -L046578 000000000000000000000000000000000000000000000000000000000000000000* +L046314 111111111111111111111111111111111111111111111111111111111111111111* +L046380 111111111111111111111111111111111111111111111111111111111111111111* +L046446 111111111111111111111111111111111111111111111111111111111111111111* +L046512 111111111111111111111111111111111111111111111111111111111111111111* +L046578 111111111111111111111111111111111111111111111111111111111111111111* L046644 111111111111111111111111111111111111111111111111111111111111111111* L046710 111111111111111111111111111111111111111111111111111111111111111111* L046776 111111111111111111111111111111111111111111111111111111111111111111* @@ -943,52 +940,52 @@ L046974 000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000* L047106 0010* -L047110 11100110011000* +L047110 01100110011000* L047124 00101011111110* -L047138 00010110010101* +L047138 11100110010101* L047152 11101011111111* L047166 10100011111000* L047180 10100110010010* -L047194 10100110010001* +L047194 01010110010001* L047208 11101011110011* L047222 10100110010000* L047236 10100110010011* -L047250 10100110010101* -L047264 11100011110011* +L047250 11010011110101* +L047264 11111011110011* L047278 11100110010010* L047292 10100110010010* -L047306 00100110010001* -L047320 11101011111111* +L047306 11011111110001* +L047320 11110011111111* NOTE BLOCK 7 * L047334 - 111111111111111111111111111111111111111111111111111111111111111111 - 111111111101111111111110111111111111111111111111111111111111111111 - 111111111111111111111111111111111110111111111111111111111111111111 - 111011111111111111111011111011111111111111111011111111111111111111 - 111111111111111111111111111111111111111111111111111011111111111111 - 111111111111111011111111011111011111011111011111111111111110111111 - 111111010111011111111111111111111111111111111111011111111111111111 - 111101111111111101101111111111111111111110111111111111101111111111 + 111111111111111111111111111111111111111111111111111111111111011111 + 111111111111111110111111111111011111111111111111111111111111111111 + 111110111111111111111111111111111110111111111111111111111111111111 + 111011111111111111111111111011111111111111111111111111111111111011 + 111111111110111111111111111111111111111111111111111111111111111111 + 111111111111011011011111111111111111011111111111111111111111111111 + 111111110111111111111101111111111111111111111111010111111111111111 + 111111111111111111111111011111111111111110111111111111101111111110 101111111111111111111111111111111011110111111110111111111111111111* L047928 000000000000000000000000000000000000000000000000000000000000000000* -L047994 011111111111111111110111111111111111111111111110111111011111111111* -L048060 011111111111111111110111111111111111111111101110111111111111111111* -L048126 011111111111111111110111111111101111111111111110111011111111111111* -L048192 011111111111111111110110111111101111111111011111110111101111111111* +L047994 011101111111111111111111111111111111111111111110111111011111111111* +L048060 011101111111111111111111111111111111111111111110111011111111111111* +L048126 011101111110111111101111111111111111111111111110111111111111111111* +L048192 011101111101111110101111111111111111111111111111110111101111111111* L048258 000000000000000000000000000000000000000000000000000000000000000000* -L048324 110111111011101111101111100111111101011011111111111111111111111111* +L048324 110111111011101111111110110111111101011011111111111111111111111110* L048390 000000000000000000000000000000000000000000000000000000000000000000* L048456 000000000000000000000000000000000000000000000000000000000000000000* L048522 000000000000000000000000000000000000000000000000000000000000000000* L048588 000000000000000000000000000000000000000000000000000000000000000000* L048654 000000000000000000000000000000000000000000000000000000000000000000* -L048720 011111111111111111101111111111111111111111111111111111111111111111* -L048786 111111111111111111111111111111111111111111111111111111111111111111* -L048852 111111111111111111111111111111111111111111111111111111111111111111* -L048918 111111111111111111111111111111111111111111111111111111111111111111* -L048984 111111111111111111111111111111111111111111111111111111111111111111* +L048720 101111111111111111111111111111111111111111111111111111111111111111* +L048786 111111111111111111111111011111111111111111111111011111111111111111* +L048852 000000000000000000000000000000000000000000000000000000000000000000* +L048918 000000000000000000000000000000000000000000000000000000000000000000* +L048984 000000000000000000000000000000000000000000000000000000000000000000* L049050 111111111111111111111111111111111111111111111111111111111111111111* L049116 111111111111111111111111111111111111111111111111111111111111111111* L049182 111111111111111111111111111111111111111111111111111111111111111111* @@ -998,16 +995,16 @@ L049380 111111111111111111111111111111111111111111111111111111111111111111* L049446 101111111111111111111111111111111111111111111111111111111111111111* L049512 111111111111111111111111111111111111011101111111111111111111111111* -L049578 111111111111111111111111111111110111011111101111111111011111111111* +L049578 111111111111111111111111111111110111011111111111111011011111111111* L049644 000000000000000000000000000000000000000000000000000000000000000000* L049710 000000000000000000000000000000000000000000000000000000000000000000* -L049776 111111111111111111111111111111111111111111011111111111111111111111* +L049776 111111111111111111111111111111111111111111111111110111111111111111* L049842 111111111111111111111111111111111111111111111111111111111111111111* L049908 111111111111111111111111111111111111111111111111111111111111111111* L049974 111111111111111111111111111111111111111111111111111111111111111111* L050040 111111111111111111111111111111111111111111111111111111111111111111* L050106 - 111111111110111111111111111111111111111110110111111111111111111111* + 111111111111111111111111111111111111111110111111111111111111111111* L050172 111111111111111111111111111111111111111111111111111111011111111111* L050238 111111111111111111111111111111111111111111111111111111111111111111* L050304 111111111111111111111111111111111111111111111111111111111111111111* @@ -1019,19 +1016,19 @@ L050634 111111111111111111111111111111111111111111111111111111111111111111* L050700 111111111111111111111111111111111111111111111111111111111111111111* L050766 111111111111111111111111111111111111111111111111111111111111111111* L050832 - 111111111101111111111111111111111111111111111111111111111111111111* -L050898 111111101111111111111111111111111011111111111111111111111111111111* + 111111111111111111111111111111011111111101111111111111111111111111* +L050898 111111111111111111111111111111111011111111111111111111111111101111* L050964 111111111111111111111111111111111111111111111111111111111111111111* L051030 111111111111111111111111111111111111111111111111111111111111111111* L051096 111111111111111111111111111111111111111111111111111111111111111111* L051162 111111111111111111111111111111111111111111111111111111111111111111* -L051228 111110111111111111101111111111111111111111111111111111111111111111* +L051228 111111111111111111111111111111111111111111111111111111111111111010* L051294 111111111111111111111111111111111111111111111111111111111111111111* L051360 111111111111111111111111111111111111111111111111111111111111111111* L051426 111111111111111111111111111111111111111111111111111111111111111111* L051492 111111111111111111111111111111111111111111111111111111111111111111* L051558 - 111111111111111111111111111111111111111101110111111111111111111111* + 011111111111111111111111111111111111111101111111111111111111111111* L051624 111111111111111111111111111111111111111111111111111111111111111111* L051690 111111111111111111111111111111111111111111111111111111111111111111* L051756 111111111111111111111111111111111111111111111111111111111111111111* @@ -1043,13 +1040,13 @@ L052086 111111111111111111111111111111111111111111111111111111111111111111* L052152 111111111111111111111111111111111111111111111111111111111111111111* L052218 111111111111111111111111111111111111111111111111111111111111111111* L052284 - 111111111110111111111111111111111111111110111111111111111111111111* + 111111111111111111111111111111111111111110111111111111111111111111* L052350 101111111111111111111111111111111111111111111111111111111111111111* -L052416 111111111111110111111111111111111111111101111111111111111101111111* -L052482 111111111111111110111111111111111111111110111111101111111111111111* +L052416 111111111111111111111111101111111111111110111111101111111111111111* +L052482 000000000000000000000000000000000000000000000000000000000000000000* L052548 000000000000000000000000000000000000000000000000000000000000000000* L052614 000000000000000000000000000000000000000000000000000000000000000000* -L052680 011111111111111111111111111111111111111110111111111111111111111111* +L052680 111111111111111011111111111111111111111111111111111111111111111111* L052746 111111111111111111111111111111111111111111111111111111111111111111* L052812 111111111111111111111111111111111111111111111111111111111111111111* L052878 111111111111111111111111111111111111111111111111111111111111111111* @@ -1072,7 +1069,7 @@ L053736 L053868 0010* L053872 11100110011100* L053886 01101011110010* -L053900 01010110010001* +L053900 10100110010001* L053914 11101011110011* L053928 10100110010000* L053942 00000110011110* @@ -1083,7 +1080,7 @@ L053998 01000011111110* L054012 11011011110110* L054026 11111111110011* L054040 10100110010001* -L054054 01000110010011* +L054054 00000110010011* L054068 11010011111100* L054082 11111011111111* E1 @@ -1096,7 +1093,7 @@ E1 1 00000000 1 -00100000 +00000000 1 00000000 1 @@ -1105,6 +1102,6 @@ E1 00000000 0 * -C55C9* +CFCEC* U00000000000000000000000000000000* -A829 +85B5 diff --git a/Logic/68030_tk.lco b/Logic/68030_tk.lco index 3e3384c..921e29e 100644 --- a/Logic/68030_tk.lco +++ b/Logic/68030_tk.lco @@ -16,8 +16,8 @@ RCS = "$Revision: 1.2 $"; Parent = m4a5.lci; SDS_File = m4a5.sds; Design = 68030_tk.tt4; -DATE = 12/29/16; -TIME = 16:02:00; +DATE = 12/30/17; +TIME = 00:43:46; Source_Format = Pure_VHDL; Type = TT2; Pre_Fit_Time = 1; @@ -76,12 +76,19 @@ Usercode_Format = Hex; [LOCATION ASSIGNMENTS] Layer = OFF; +AHIGH_27_ = pin,16,-,C,-; +AHIGH_26_ = pin,17,-,C,-; +AHIGH_25_ = pin,18,-,C,-; +AHIGH_24_ = pin,19,-,C,-; AHIGH_31_ = pin,4,-,B,-; -IPL_1_ = pin,56,-,F,-; -IPL_0_ = pin,67,-,G,-; +A_DECODE_22_ = pin,84,-,H,-; +A_DECODE_21_ = pin,94,-,A,-; A_DECODE_23_ = pin,85,-,H,-; -FC_0_ = pin,57,-,F,-; -A_1_ = pin,60,-,F,-; +A_DECODE_20_ = pin,93,-,A,-; +A_DECODE_19_ = pin,97,-,A,-; +A_DECODE_18_ = pin,95,-,A,-; +A_DECODE_17_ = pin,59,-,F,-; +A_DECODE_16_ = pin,96,-,A,-; IPL_2_ = pin,68,-,G,-; FC_1_ = pin,58,-,F,-; AS_030 = pin,82,-,H,-; @@ -93,97 +100,83 @@ nEXP_SPACE = pin,14,-,-,-; BERR = pin,41,-,E,-; BG_030 = pin,21,-,C,-; BGACK_000 = pin,28,-,D,-; -CLK_030 = pin,64,-,-,-; CLK_000 = pin,11,-,-,-; +IPL_1_ = pin,56,-,F,-; CLK_OSZI = pin,61,-,-,-; +IPL_0_ = pin,67,-,G,-; CLK_DIV_OUT = pin,65,-,G,-; +FC_0_ = pin,57,-,F,-; CLK_EXP = pin,10,-,B,-; +A_1_ = pin,60,-,F,-; FPU_CS = pin,78,-,H,-; FPU_SENSE = pin,91,-,A,-; DSACK1 = pin,81,-,H,-; DTACK = pin,30,-,D,-; AVEC = pin,92,-,A,-; E = pin,66,-,G,-; -AHIGH_30_ = pin,5,-,B,-; VPA = pin,36,-,-,-; +RST = pin,86,-,-,-; +AMIGA_ADDR_ENABLE = pin,33,-,D,-; +AMIGA_BUS_DATA_DIR = pin,48,-,E,-; +AMIGA_BUS_ENABLE_LOW = pin,20,-,C,-; +AMIGA_BUS_ENABLE_HIGH = pin,34,-,D,-; +CIIN = pin,47,-,E,-; +AHIGH_30_ = pin,5,-,B,-; AHIGH_29_ = pin,6,-,B,-; AHIGH_28_ = pin,15,-,C,-; -RST = pin,86,-,-,-; -AHIGH_27_ = pin,16,-,C,-; -RESET = pin,3,-,B,-; -AHIGH_26_ = pin,17,-,C,-; -AHIGH_25_ = pin,18,-,C,-; -AMIGA_ADDR_ENABLE = pin,33,-,D,-; -AHIGH_24_ = pin,19,-,C,-; -AMIGA_BUS_DATA_DIR = pin,48,-,E,-; -A_DECODE_22_ = pin,84,-,H,-; -AMIGA_BUS_ENABLE_LOW = pin,20,-,C,-; -A_DECODE_21_ = pin,94,-,A,-; -AMIGA_BUS_ENABLE_HIGH = pin,34,-,D,-; -A_DECODE_20_ = pin,93,-,A,-; -CIIN = pin,47,-,E,-; -A_DECODE_19_ = pin,97,-,A,-; -A_DECODE_18_ = pin,95,-,A,-; -A_DECODE_17_ = pin,59,-,F,-; -A_DECODE_16_ = pin,96,-,A,-; -A_0_ = pin,69,-,G,-; SIZE_1_ = pin,79,-,H,-; -IPL_030_1_ = pin,7,-,B,-; -IPL_030_0_ = pin,8,-,B,-; IPL_030_2_ = pin,9,-,B,-; RW_000 = pin,80,-,H,-; BG_000 = pin,29,-,D,-; BGACK_030 = pin,83,-,H,-; -SIZE_0_ = pin,70,-,G,-; +A_0_ = pin,69,-,G,-; +IPL_030_1_ = pin,7,-,B,-; +IPL_030_0_ = pin,8,-,B,-; VMA = pin,35,-,D,-; RW = pin,71,-,G,-; -cpu_est_1_ = node,-,-,D,6; -cpu_est_2_ = node,-,-,D,14; -cpu_est_3_ = node,-,-,D,2; +SIZE_0_ = pin,70,-,G,-; cpu_est_0_ = node,-,-,G,9; -inst_AMIGA_BUS_ENABLE_DMA_HIGH = node,-,-,F,9; -inst_AMIGA_BUS_ENABLE_DMA_LOW = node,-,-,F,5; -inst_AS_030_D0 = node,-,-,H,2; -inst_AS_030_000_SYNC = node,-,-,B,13; -inst_BGACK_030_INT_D = node,-,-,H,13; -inst_AS_000_DMA = node,-,-,A,8; -inst_DS_000_DMA = node,-,-,A,13; -inst_VPA_D = node,-,-,F,2; +cpu_est_1_ = node,-,-,D,13; +cpu_est_2_ = node,-,-,D,2; +cpu_est_3_ = node,-,-,A,8; +inst_AMIGA_BUS_ENABLE_DMA_HIGH = node,-,-,A,10; +inst_AMIGA_BUS_ENABLE_DMA_LOW = node,-,-,C,10; +inst_AS_030_D0 = node,-,-,E,8; +inst_AS_030_D1 = node,-,-,F,1; +inst_AS_030_000_SYNC = node,-,-,F,4; +inst_AS_000_DMA = node,-,-,C,13; +inst_DS_000_DMA = node,-,-,C,9; +inst_VPA_D = node,-,-,G,6; CLK_000_D_3_ = node,-,-,F,13; -inst_DTACK_D0 = node,-,-,B,14; -inst_RESET_OUT = node,-,-,G,5; -CLK_030_PE_1_ = node,-,-,A,2; -inst_AMIGA_DS = node,-,-,C,10; +inst_DTACK_D0 = node,-,-,F,9; +inst_AMIGA_DS = node,-,-,H,2; CLK_000_D_1_ = node,-,-,H,5; -CLK_000_D_0_ = node,-,-,D,13; -inst_CLK_OUT_PRE_50 = node,-,-,G,2; -inst_CLK_OUT_PRE_D = node,-,-,E,8; -IPL_D0_0_ = node,-,-,B,10; -IPL_D0_1_ = node,-,-,B,6; -IPL_D0_2_ = node,-,-,B,2; +CLK_000_D_0_ = node,-,-,D,9; +inst_CLK_OUT_PRE_50 = node,-,-,H,13; +inst_CLK_OUT_PRE_D = node,-,-,E,5; +IPL_D0_0_ = node,-,-,A,6; +IPL_D0_1_ = node,-,-,D,6; +IPL_D0_2_ = node,-,-,A,2; CLK_000_D_2_ = node,-,-,H,6; -CLK_000_D_4_ = node,-,-,C,14; -inst_LDS_000_INT = node,-,-,F,12; -inst_DS_000_ENABLE = node,-,-,C,13; -inst_UDS_000_INT = node,-,-,F,1; +CLK_000_D_4_ = node,-,-,F,5; +inst_UDS_000_INT = node,-,-,B,6; +inst_DS_000_ENABLE = node,-,-,C,2; +inst_LDS_000_INT = node,-,-,G,13; +inst_BGACK_030_INT_D = node,-,-,E,13; SM_AMIGA_6_ = node,-,-,F,0; -SM_AMIGA_4_ = node,-,-,A,1; -SM_AMIGA_1_ = node,-,-,F,8; +SM_AMIGA_4_ = node,-,-,G,5; +SM_AMIGA_1_ = node,-,-,A,5; SM_AMIGA_0_ = node,-,-,A,12; -CYCLE_DMA_0_ = node,-,-,A,6; -CYCLE_DMA_1_ = node,-,-,A,10; -CLK_030_PE_0_ = node,-,-,A,9; -RST_DLY_0_ = node,-,-,G,6; -RST_DLY_1_ = node,-,-,G,14; -RST_DLY_2_ = node,-,-,G,10; -inst_DSACK1_INT = node,-,-,A,5; -inst_AS_000_INT = node,-,-,C,2; -SM_AMIGA_5_ = node,-,-,G,13; -SM_AMIGA_3_ = node,-,-,C,6; -SM_AMIGA_2_ = node,-,-,C,9; -SM_AMIGA_i_7_ = node,-,-,F,4; -CLK_OUT_INTreg = node,-,-,D,10; -CIIN_0 = node,-,-,E,5; +CYCLE_DMA_0_ = node,-,-,B,13; +CYCLE_DMA_1_ = node,-,-,B,2; +inst_DSACK1_INT = node,-,-,G,2; +inst_AS_000_INT = node,-,-,C,6; +SM_AMIGA_5_ = node,-,-,F,12; +SM_AMIGA_3_ = node,-,-,A,13; +SM_AMIGA_2_ = node,-,-,A,9; +CLK_OUT_INTreg = node,-,-,A,1; +SM_AMIGA_i_7_ = node,-,-,F,8; +N_60 = node,-,-,E,9; [GROUP ASSIGNMENTS] Layer = OFF; @@ -222,6 +215,7 @@ Page_Break = Yes; [POWER] Powerlevel = Low,High; Default = High; +High = B; Low = H,G,F,E,D,C,B,A; Type = GLB; diff --git a/Logic/68030_tk.out b/Logic/68030_tk.out index ab5d2b0..5c8093c 100644 --- a/Logic/68030_tk.out +++ b/Logic/68030_tk.out @@ -1,20 +1,21 @@ -116 "number of signals after reading design file" +122 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 81 AS_030 5 -1 7 4 0 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21 - 79 RW_000 5 339 7 2 4 6 79 -1 4 0 21 - 70 RW 5 344 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 + 79 RW_000 5 345 7 3 0 4 6 79 -1 4 0 21 + 70 RW 5 352 6 2 5 7 70 -1 2 0 21 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 - 78 SIZE_1_ 5 337 7 1 1 78 -1 3 0 21 - 69 SIZE_0_ 5 342 6 1 1 69 -1 3 0 21 - 68 A_0_ 5 345 6 1 1 68 -1 3 0 21 - 40 BERR 5 -1 4 1 2 40 -1 1 0 21 + 78 SIZE_1_ 5 343 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 353 6 1 5 69 -1 3 0 21 + 68 A_0_ 5 347 6 1 5 68 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 29 DTACK 5 -1 3 1 5 29 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 @@ -23,15 +24,15 @@ 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 - 82 BGACK_030 5 341 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 + 8 IPL_030_2_ 5 344 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 350 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 349 1 0 6 -1 10 0 21 + 82 BGACK_030 5 348 7 0 82 -1 3 0 21 + 34 VMA 5 351 3 0 34 -1 3 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 + 28 BG_000 5 346 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 80 DSACK1 0 7 0 80 -1 1 0 21 @@ -41,187 +42,70 @@ 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 311 CLK_000_D_0_ 3 -1 1 6 0 2 3 5 6 7 -1 -1 1 0 21 - 310 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 - 323 SM_AMIGA_6_ 3 -1 5 4 1 3 5 7 -1 -1 3 0 21 - 307 CLK_000_D_3_ 3 -1 3 4 0 2 3 5 -1 -1 1 0 21 - 300 inst_BGACK_030_INT_D 3 -1 7 4 0 5 6 7 -1 -1 1 0 21 - 325 SM_AMIGA_0_ 3 -1 0 3 0 5 7 -1 -1 4 0 21 - 295 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 294 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 3 0 21 - 306 CLK_000_D_2_ 3 -1 7 3 0 2 3 -1 -1 1 0 21 - 298 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 1 1 21 - 302 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 9 0 21 - 301 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 7 0 21 - 299 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 - 326 RST_DLY_0_ 3 -1 2 2 0 2 -1 -1 4 0 21 - 319 SM_AMIGA_1_ 3 -1 2 2 0 2 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 335 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 332 SM_AMIGA_5_ 3 -1 3 2 2 3 -1 -1 3 0 21 - 324 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21 - 322 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 321 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 303 CYCLE_DMA_0_ 3 -1 0 2 0 6 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 0 2 0 2 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 0 2 0 2 -1 -1 2 1 21 - 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 318 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 329 inst_CLK_030_H 3 -1 6 1 6 -1 -1 8 0 21 - 334 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 304 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 317 CLK_000_D_4_ 3 -1 3 1 5 -1 -1 1 0 21 - 316 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 315 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 314 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 2 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 6 63 -1 - 59 A_1_ 1 -1 -1 1 0 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 -116 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 4 2 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 3 4 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 0 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 - 68 A_0_ 5 345 6 2 3 5 68 -1 3 0 21 - 70 RW 5 344 6 2 5 7 70 -1 2 0 21 - 40 BERR 5 -1 4 2 0 5 40 -1 1 0 21 - 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 340 6 1 5 69 -1 3 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 308 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 309 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 2 5 2 3 5 6 7 -1 -1 3 0 21 - 295 cpu_est_1_ 3 -1 0 4 0 3 5 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 0 4 0 3 5 6 -1 -1 4 0 21 - 300 inst_BGACK_030_INT_D 3 -1 6 4 1 2 6 7 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 4 0 3 5 6 -1 -1 1 1 21 - 343 RN_VMA 3 34 3 3 0 3 5 34 -1 3 0 21 - 325 SM_AMIGA_0_ 3 -1 6 3 2 6 7 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 0 3 0 3 5 -1 -1 3 0 21 - 305 inst_VPA_D 3 -1 2 3 0 3 5 -1 -1 1 0 21 - 298 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21 - 301 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 299 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 5 0 21 - 326 RST_DLY_0_ 3 -1 6 2 1 6 -1 -1 4 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 332 SM_AMIGA_5_ 3 -1 6 2 5 6 -1 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 6 2 5 6 -1 -1 3 0 21 - 321 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 303 CYCLE_DMA_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 6 2 1 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 1 2 1 6 -1 -1 2 1 21 - 318 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 1 2 1 6 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 3 2 1 3 -1 -1 1 0 21 - 307 inst_DTACK_D0 3 -1 2 2 0 5 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 4 2 2 7 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 302 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 329 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 304 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 340 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 317 CLK_000_D_4_ 3 -1 7 1 2 -1 -1 1 0 21 - 316 CLK_000_D_2_ 3 -1 7 1 4 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 7 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 + 348 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 313 CLK_000_D_0_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 312 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 309 inst_RESET_OUT 3 -1 6 5 0 3 4 6 7 -1 -1 2 0 21 + 302 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 7 0 21 + 297 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 340 SM_AMIGA_i_7_ 3 -1 5 3 2 5 7 -1 -1 3 1 21 + 327 SM_AMIGA_1_ 3 -1 1 3 1 3 5 -1 -1 3 0 21 + 326 SM_AMIGA_4_ 3 -1 3 3 0 3 5 -1 -1 3 0 21 + 325 SM_AMIGA_6_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 + 341 CLK_OUT_INTreg 3 -1 2 3 0 1 6 -1 -1 1 0 21 + 303 inst_BGACK_030_INT_D 3 -1 4 3 2 6 7 -1 -1 1 0 21 + 300 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 + 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 6 0 21 + 339 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 5 0 21 + 332 RST_DLY_0_ 3 -1 2 2 2 6 -1 -1 4 0 21 + 329 CYCLE_DMA_0_ 3 -1 1 2 0 1 -1 -1 4 0 21 + 351 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 337 SM_AMIGA_5_ 3 -1 5 2 3 5 -1 -1 3 0 21 + 328 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 323 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 322 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 336 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 335 inst_DSACK1_INT 3 -1 3 2 3 7 -1 -1 2 0 21 + 334 RST_DLY_2_ 3 -1 6 2 2 6 -1 -1 2 0 21 + 333 RST_DLY_1_ 3 -1 6 2 2 6 -1 -1 2 1 21 + 330 CYCLE_DMA_1_ 3 -1 1 2 0 1 -1 -1 2 0 21 + 324 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 315 inst_DTACK_DMA 3 -1 7 2 3 7 -1 -1 2 0 21 + 301 inst_AS_030_D1 3 -1 5 2 2 5 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 316 inst_CLK_OUT_PRE_D 3 -1 4 2 0 2 -1 -1 1 0 21 + 307 CLK_000_D_3_ 3 -1 6 2 1 5 -1 -1 1 0 21 + 306 inst_VPA_D 3 -1 3 2 0 3 -1 -1 1 0 21 + 350 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 349 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 331 CLK_030_PE_0_ 3 -1 0 1 0 -1 -1 9 0 21 + 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 + 310 CLK_030_PE_1_ 3 -1 0 1 0 -1 -1 6 0 21 + 338 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 345 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 353 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 347 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 343 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 352 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 311 inst_AMIGA_DS 3 -1 7 1 0 -1 -1 2 0 21 + 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 342 CIIN_0 3 -1 2 1 4 -1 -1 1 0 21 + 321 CLK_000_D_4_ 3 -1 1 1 5 -1 -1 1 0 21 + 320 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 319 IPL_D0_2_ 3 -1 7 1 1 -1 -1 1 0 21 + 318 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 + 317 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 + 314 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 308 inst_DTACK_D0 3 -1 5 1 0 -1 -1 1 0 21 + 293 un10_ciin_i 3 -1 4 1 2 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 @@ -230,5989 +114,17 @@ 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 67 IPL_2_ 1 -1 -1 2 1 7 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 59 A_1_ 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 -115 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 4 2 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 - 79 RW_000 5 338 7 3 0 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 - 68 A_0_ 5 344 6 2 2 6 68 -1 3 0 21 - 70 RW 5 343 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 336 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 339 6 1 2 69 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 337 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 346 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 345 1 0 6 -1 10 0 21 - 82 BGACK_030 5 341 7 0 82 -1 3 0 21 - 34 VMA 5 342 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 308 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 - 309 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 - 321 SM_AMIGA_6_ 3 -1 5 5 1 2 5 6 7 -1 -1 3 0 21 - 300 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 - 295 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 298 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 - 301 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 299 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 - 333 SM_AMIGA_2_ 3 -1 0 2 0 2 -1 -1 5 0 21 - 325 RST_DLY_0_ 3 -1 3 2 1 3 -1 -1 4 0 21 - 342 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 334 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 331 SM_AMIGA_5_ 3 -1 1 2 1 2 -1 -1 3 0 21 - 324 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 323 SM_AMIGA_1_ 3 -1 2 2 2 5 -1 -1 3 0 21 - 322 SM_AMIGA_4_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 320 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 319 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 303 CYCLE_DMA_0_ 3 -1 1 2 0 1 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 330 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 329 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 327 RST_DLY_2_ 3 -1 1 2 1 3 -1 -1 2 0 21 - 326 RST_DLY_1_ 3 -1 3 2 1 3 -1 -1 2 1 21 - 318 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 317 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 7 2 1 6 -1 -1 1 0 21 - 306 CLK_000_D_2_ 3 -1 7 2 1 5 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 346 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 345 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 337 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 302 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 328 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 332 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 338 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 304 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 344 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 339 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 336 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 343 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 335 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 316 CLK_000_D_3_ 3 -1 1 1 5 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 7 1 7 -1 -1 1 0 21 - 307 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 59 A_1_ 1 -1 -1 2 2 6 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -116 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 4 5 6 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 1 4 6 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 - 68 A_0_ 5 345 6 2 2 3 68 -1 3 0 21 - 70 RW 5 344 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 340 6 1 2 69 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 1 6 0 2 3 5 6 7 -1 -1 1 0 21 - 306 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 - 323 SM_AMIGA_6_ 3 -1 2 4 2 3 6 7 -1 -1 3 0 21 - 300 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_000_SYNC 3 -1 5 3 2 3 5 -1 -1 7 0 21 - 296 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 3 2 5 7 -1 -1 3 1 21 - 325 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 324 SM_AMIGA_4_ 3 -1 3 3 0 2 3 -1 -1 3 0 21 - 295 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 - 298 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 302 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21 - 301 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 304 CYCLE_DMA_1_ 3 -1 6 2 1 6 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 322 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 321 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 303 CYCLE_DMA_0_ 3 -1 6 2 1 6 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 318 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 316 CLK_000_D_2_ 3 -1 7 2 0 5 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 6 2 3 6 -1 -1 1 0 21 - 307 CLK_000_D_3_ 3 -1 0 2 2 5 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 340 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21 - 319 SM_AMIGA_1_ 3 -1 5 1 5 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 N_262 3 -1 4 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 320 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 317 CLK_000_D_4_ 3 -1 5 1 2 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 7 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 59 A_1_ 1 -1 -1 2 2 6 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 7 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 1 63 -1 - 35 VPA 1 -1 -1 1 7 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 -116 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 4 5 6 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 1 4 6 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 - 68 A_0_ 5 345 6 2 2 3 68 -1 3 0 21 - 70 RW 5 344 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 340 6 1 2 69 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 1 6 0 2 3 5 6 7 -1 -1 1 0 21 - 306 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 - 323 SM_AMIGA_6_ 3 -1 2 4 2 3 6 7 -1 -1 3 0 21 - 300 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_000_SYNC 3 -1 5 3 2 3 5 -1 -1 7 0 21 - 296 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 3 2 5 7 -1 -1 3 1 21 - 325 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 324 SM_AMIGA_4_ 3 -1 3 3 0 2 3 -1 -1 3 0 21 - 295 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 - 298 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 302 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21 - 301 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 304 CYCLE_DMA_1_ 3 -1 6 2 1 6 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 322 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 321 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 303 CYCLE_DMA_0_ 3 -1 6 2 1 6 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 318 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 316 CLK_000_D_2_ 3 -1 7 2 0 5 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 6 2 3 6 -1 -1 1 0 21 - 307 CLK_000_D_3_ 3 -1 0 2 2 5 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 340 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21 - 319 SM_AMIGA_1_ 3 -1 5 1 5 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 N_262 3 -1 4 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 320 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 317 CLK_000_D_4_ 3 -1 5 1 2 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 7 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 59 A_1_ 1 -1 -1 2 2 6 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 7 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 1 63 -1 - 35 VPA 1 -1 -1 1 7 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 -116 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 0 2 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 1 4 5 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 - 70 RW 5 344 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 342 6 1 2 69 -1 3 0 21 - 68 A_0_ 5 345 6 1 2 68 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 - 82 BGACK_030 5 341 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 - 306 CLK_000_D_1_ 3 -1 7 5 0 2 3 5 7 -1 -1 1 0 21 - 299 inst_AS_030_000_SYNC 3 -1 5 3 2 3 5 -1 -1 7 0 21 - 295 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 293 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 3 2 5 7 -1 -1 3 1 21 - 325 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 323 SM_AMIGA_6_ 3 -1 2 3 0 2 7 -1 -1 3 0 21 - 296 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 - 316 CLK_000_D_2_ 3 -1 7 3 1 2 5 -1 -1 1 0 21 - 300 inst_BGACK_030_INT_D 3 -1 4 3 5 6 7 -1 -1 1 0 21 - 298 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 - 302 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21 - 301 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 304 CYCLE_DMA_1_ 3 -1 5 2 1 5 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 324 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 3 0 21 - 322 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 321 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 319 SM_AMIGA_1_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 303 CYCLE_DMA_0_ 3 -1 5 2 1 5 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 - 320 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 318 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 7 2 3 7 -1 -1 1 0 21 - 307 CLK_000_D_3_ 3 -1 1 2 0 2 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 3 1 3 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 3 1 3 -1 -1 2 1 21 - 317 CLK_000_D_4_ 3 -1 0 1 2 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 10 CLK_000 1 -1 -1 3 0 6 7 10 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 1 63 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 -116 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 4 1 2 4 7 81 -1 1 0 21 - 79 RW_000 5 339 7 3 0 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 - 70 RW 5 344 6 2 1 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 0 78 -1 3 0 21 - 69 SIZE_0_ 5 340 6 1 0 69 -1 3 0 21 - 68 A_0_ 5 345 6 1 0 68 -1 3 0 21 - 40 BERR 5 -1 4 1 5 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 306 CLK_000_D_1_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 2 5 0 1 2 5 7 -1 -1 3 0 21 - 316 CLK_000_D_2_ 3 -1 7 4 1 3 5 7 -1 -1 1 0 21 - 296 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 294 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 323 SM_AMIGA_4_ 3 -1 3 3 1 3 5 -1 -1 3 0 21 - 295 cpu_est_0_ 3 -1 1 3 1 3 5 -1 -1 3 0 21 - 300 inst_BGACK_030_INT_D 3 -1 2 3 2 6 7 -1 -1 1 0 21 - 298 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21 - 301 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 299 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 - 343 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 332 SM_AMIGA_5_ 3 -1 5 2 3 5 -1 -1 3 0 21 - 325 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 321 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 318 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 302 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 329 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 334 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 304 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 340 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 303 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 317 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 5 1 5 -1 -1 1 0 21 - 307 CLK_000_D_3_ 3 -1 7 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 5 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 -117 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 0 2 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 - 79 RW_000 5 340 7 3 0 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 - 68 A_0_ 5 346 6 2 1 5 68 -1 3 0 21 - 70 RW 5 345 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 338 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 341 6 1 5 69 -1 3 0 21 - 40 BERR 5 -1 4 1 2 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 339 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 348 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 347 1 0 6 -1 10 0 21 - 82 BGACK_030 5 343 7 0 82 -1 3 0 21 - 34 VMA 5 344 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 342 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 343 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21 - 306 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 6 7 -1 -1 1 0 21 - 324 SM_AMIGA_6_ 3 -1 1 5 0 1 2 5 7 -1 -1 3 0 21 - 299 inst_AS_030_000_SYNC 3 -1 5 3 1 3 5 -1 -1 7 0 21 - 296 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 294 cpu_est_3_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 - 336 SM_AMIGA_i_7_ 3 -1 1 3 1 5 7 -1 -1 3 1 21 - 326 SM_AMIGA_0_ 3 -1 0 3 0 1 7 -1 -1 3 0 21 - 295 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 3 0 21 - 300 inst_BGACK_030_INT_D 3 -1 4 3 5 6 7 -1 -1 1 0 21 - 298 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 6 3 2 3 6 -1 -1 1 1 21 - 301 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 344 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 333 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 3 0 21 - 325 SM_AMIGA_4_ 3 -1 6 2 2 6 -1 -1 3 0 21 - 323 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 322 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 320 SM_AMIGA_1_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 303 CYCLE_DMA_0_ 3 -1 1 2 0 1 -1 -1 3 0 21 - 332 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 331 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 - 321 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 319 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 316 CLK_000_D_2_ 3 -1 7 2 0 2 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 7 2 0 7 -1 -1 1 0 21 - 307 CLK_000_D_4_ 3 -1 0 2 1 7 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 6 2 2 3 -1 -1 1 0 21 - 348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 302 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 330 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 335 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 5 0 21 - 334 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 327 RST_DLY_0_ 3 -1 3 1 3 -1 -1 4 0 21 - 304 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 346 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 341 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 338 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 342 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 337 N_262 3 -1 4 1 4 -1 -1 2 0 21 - 329 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 328 RST_DLY_1_ 3 -1 3 1 3 -1 -1 2 1 21 - 318 CLK_000_D_5_ 3 -1 7 1 1 -1 -1 1 0 21 - 317 CLK_000_D_3_ 3 -1 2 1 0 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 59 A_1_ 1 -1 -1 1 5 59 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 -116 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 4 5 6 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 1 4 6 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 - 68 A_0_ 5 345 6 2 2 3 68 -1 3 0 21 - 70 RW 5 344 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 340 6 1 2 69 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 1 6 0 2 3 5 6 7 -1 -1 1 0 21 - 306 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 - 323 SM_AMIGA_6_ 3 -1 2 4 2 3 6 7 -1 -1 3 0 21 - 300 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_000_SYNC 3 -1 5 3 2 3 5 -1 -1 7 0 21 - 296 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 3 2 5 7 -1 -1 3 1 21 - 325 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 324 SM_AMIGA_4_ 3 -1 3 3 0 2 3 -1 -1 3 0 21 - 295 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 - 298 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 302 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21 - 301 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 304 CYCLE_DMA_1_ 3 -1 6 2 1 6 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 322 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 321 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 303 CYCLE_DMA_0_ 3 -1 6 2 1 6 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 318 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 316 CLK_000_D_2_ 3 -1 7 2 0 5 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 6 2 3 6 -1 -1 1 0 21 - 307 CLK_000_D_3_ 3 -1 0 2 2 5 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 340 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21 - 319 SM_AMIGA_1_ 3 -1 5 1 5 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 N_262 3 -1 4 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 320 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 317 CLK_000_D_4_ 3 -1 5 1 2 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 7 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 59 A_1_ 1 -1 -1 2 2 6 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 7 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 1 63 -1 - 35 VPA 1 -1 -1 1 7 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 -116 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 4 5 6 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 1 4 6 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 - 68 A_0_ 5 345 6 2 2 3 68 -1 3 0 21 - 70 RW 5 344 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 341 6 1 2 69 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 308 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 0 6 0 2 3 5 6 7 -1 -1 1 0 21 - 309 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 - 323 SM_AMIGA_6_ 3 -1 2 4 2 3 6 7 -1 -1 3 0 21 - 300 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_000_SYNC 3 -1 5 3 2 3 5 -1 -1 7 0 21 - 296 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 3 2 5 7 -1 -1 3 1 21 - 325 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 324 SM_AMIGA_4_ 3 -1 3 3 0 2 3 -1 -1 3 0 21 - 295 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 - 298 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 302 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21 - 301 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 304 CYCLE_DMA_1_ 3 -1 6 2 1 6 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 322 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 321 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 303 CYCLE_DMA_0_ 3 -1 6 2 1 6 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 318 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 6 2 3 6 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 1 2 2 5 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 341 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21 - 319 SM_AMIGA_1_ 3 -1 5 1 5 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 320 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 317 CLK_000_D_4_ 3 -1 5 1 2 -1 -1 1 0 21 - 316 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 7 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 307 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 59 A_1_ 1 -1 -1 2 2 6 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 7 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 10 CLK_000 1 -1 -1 2 0 5 10 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 1 63 -1 - 35 VPA 1 -1 -1 1 7 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 -116 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 0 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 - 68 A_0_ 5 345 6 2 1 5 68 -1 3 0 21 - 70 RW 5 344 6 2 3 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 342 6 1 5 69 -1 3 0 21 - 40 BERR 5 -1 4 1 5 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 - 82 BGACK_030 5 341 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 341 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 311 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 310 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 323 SM_AMIGA_6_ 3 -1 1 5 0 1 3 5 7 -1 -1 3 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 3 1 2 3 -1 -1 7 0 21 - 295 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 293 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 335 SM_AMIGA_i_7_ 3 -1 1 3 1 2 7 -1 -1 3 1 21 - 325 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 3 0 21 - 324 SM_AMIGA_4_ 3 -1 2 3 2 3 5 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 334 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 5 0 21 - 326 RST_DLY_0_ 3 -1 6 2 5 6 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 0 2 0 2 -1 -1 3 0 21 - 322 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 319 SM_AMIGA_1_ 3 -1 0 2 0 6 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 5 2 5 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 6 2 5 6 -1 -1 2 1 21 - 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 7 2 1 6 -1 -1 1 0 21 - 307 CLK_000_D_3_ 3 -1 0 2 1 6 -1 -1 1 0 21 - 306 inst_VPA_D 3 -1 2 2 3 5 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 329 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 333 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 321 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 318 CLK_000_D_4_ 3 -1 6 1 1 -1 -1 1 0 21 - 317 CLK_000_D_2_ 3 -1 7 1 0 -1 -1 1 0 21 - 316 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 315 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 314 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_50 3 -1 7 1 7 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 10 CLK_000 1 -1 -1 3 0 3 6 10 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 59 A_1_ 1 -1 -1 1 2 59 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 -116 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 4 5 6 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 1 4 6 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 - 68 A_0_ 5 345 6 2 2 3 68 -1 3 0 21 - 70 RW 5 344 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 341 6 1 2 69 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 308 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 0 6 0 2 3 5 6 7 -1 -1 1 0 21 - 309 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 - 323 SM_AMIGA_6_ 3 -1 2 4 2 3 6 7 -1 -1 3 0 21 - 300 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_000_SYNC 3 -1 5 3 2 3 5 -1 -1 7 0 21 - 296 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 3 2 5 7 -1 -1 3 1 21 - 325 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 324 SM_AMIGA_4_ 3 -1 3 3 0 2 3 -1 -1 3 0 21 - 295 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 - 298 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 302 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21 - 301 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 304 CYCLE_DMA_1_ 3 -1 6 2 1 6 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 322 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 321 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 303 CYCLE_DMA_0_ 3 -1 6 2 1 6 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 318 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 6 2 3 6 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 1 2 2 5 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 341 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21 - 319 SM_AMIGA_1_ 3 -1 5 1 5 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 320 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 317 CLK_000_D_4_ 3 -1 5 1 2 -1 -1 1 0 21 - 316 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 7 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 307 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 59 A_1_ 1 -1 -1 2 2 6 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 7 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 10 CLK_000 1 -1 -1 2 0 5 10 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 1 63 -1 - 35 VPA 1 -1 -1 1 7 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 -116 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 4 5 6 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 4 5 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 5 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 5 6 7 30 -1 1 0 21 - 68 A_0_ 5 345 6 2 1 5 68 -1 3 0 21 - 70 RW 5 344 6 2 5 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 340 6 1 5 69 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 311 CLK_000_D_0_ 3 -1 0 6 0 2 3 5 6 7 -1 -1 1 0 21 - 310 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 2 5 0 1 2 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 4 1 2 6 7 -1 -1 1 0 21 - 296 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 299 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 9 0 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 - 305 CYCLE_DMA_1_ 3 -1 6 2 5 6 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 325 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 6 2 5 6 -1 -1 3 0 21 - 295 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 321 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 1 2 1 6 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_50 3 -1 2 2 1 2 -1 -1 1 0 21 - 306 inst_VPA_D 3 -1 3 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 329 inst_CLK_030_H 3 -1 5 1 5 -1 -1 8 0 21 - 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 340 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 318 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 - 317 CLK_000_D_2_ 3 -1 7 1 0 -1 -1 1 0 21 - 316 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 - 315 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 314 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 - 307 CLK_000_D_3_ 3 -1 0 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 59 A_1_ 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 -116 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 1 2 3 4 5 7 81 -1 1 0 21 - 79 RW_000 5 339 7 3 0 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 - 70 RW 5 344 6 2 1 7 70 -1 2 0 21 - 40 BERR 5 -1 4 2 0 3 40 -1 1 0 21 - 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 341 6 1 5 69 -1 3 0 21 - 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 311 CLK_000_D_0_ 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 310 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 3 2 3 5 -1 -1 7 0 21 - 296 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 3 2 5 7 -1 -1 3 1 21 - 295 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 3 2 0 3 -1 -1 5 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 2 2 2 3 -1 -1 3 0 21 - 325 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_50 3 -1 6 2 3 6 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 1 2 0 3 -1 -1 1 0 21 - 307 CLK_000_D_3_ 3 -1 3 2 1 2 -1 -1 1 0 21 - 306 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 329 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 341 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 318 CLK_000_D_4_ 3 -1 1 1 2 -1 -1 1 0 21 - 317 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21 - 316 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 315 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 314 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 59 A_1_ 1 -1 -1 2 2 5 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 -116 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 4 5 6 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 4 5 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 5 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 5 6 7 30 -1 1 0 21 - 68 A_0_ 5 345 6 2 1 5 68 -1 3 0 21 - 70 RW 5 344 6 2 5 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 340 6 1 5 69 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 311 CLK_000_D_0_ 3 -1 0 6 0 2 3 5 6 7 -1 -1 1 0 21 - 310 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 2 5 0 1 2 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 4 1 2 6 7 -1 -1 1 0 21 - 296 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 299 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 9 0 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 - 305 CYCLE_DMA_1_ 3 -1 6 2 5 6 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 325 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 6 2 5 6 -1 -1 3 0 21 - 295 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 321 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 1 2 1 6 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_50 3 -1 2 2 1 2 -1 -1 1 0 21 - 306 inst_VPA_D 3 -1 3 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 329 inst_CLK_030_H 3 -1 5 1 5 -1 -1 8 0 21 - 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 340 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 318 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 - 317 CLK_000_D_2_ 3 -1 7 1 0 -1 -1 1 0 21 - 316 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 - 315 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 314 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 - 307 CLK_000_D_3_ 3 -1 0 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 59 A_1_ 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 -116 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 1 2 3 4 5 7 81 -1 1 0 21 - 79 RW_000 5 339 7 3 0 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 - 70 RW 5 344 6 2 1 7 70 -1 2 0 21 - 40 BERR 5 -1 4 2 0 3 40 -1 1 0 21 - 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 341 6 1 5 69 -1 3 0 21 - 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 311 CLK_000_D_0_ 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 310 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 3 2 3 5 -1 -1 7 0 21 - 296 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 3 2 5 7 -1 -1 3 1 21 - 295 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 3 2 0 3 -1 -1 5 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 2 2 2 3 -1 -1 3 0 21 - 325 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_50 3 -1 6 2 3 6 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 1 2 0 3 -1 -1 1 0 21 - 307 CLK_000_D_3_ 3 -1 3 2 1 2 -1 -1 1 0 21 - 306 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 329 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 341 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 318 CLK_000_D_4_ 3 -1 1 1 2 -1 -1 1 0 21 - 317 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21 - 316 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 315 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 314 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 59 A_1_ 1 -1 -1 2 2 5 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 -117 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 - 79 RW_000 5 340 7 3 0 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 - 70 RW 5 345 6 2 5 7 70 -1 2 0 21 - 78 SIZE_1_ 5 338 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 343 6 1 2 69 -1 3 0 21 - 68 A_0_ 5 346 6 1 2 68 -1 3 0 21 - 40 BERR 5 -1 4 1 5 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 339 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 348 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 347 1 0 6 -1 9 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 344 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 311 CLK_000_D_0_ 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21 - 310 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 - 323 SM_AMIGA_6_ 3 -1 1 5 1 2 3 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 5 1 2 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 3 1 2 3 -1 -1 7 0 21 - 295 cpu_est_3_ 3 -1 6 3 3 5 6 -1 -1 4 0 21 - 293 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 336 SM_AMIGA_i_7_ 3 -1 1 3 1 2 7 -1 -1 3 1 21 - 296 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 1 1 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 335 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 5 0 21 - 344 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 326 SM_AMIGA_0_ 3 -1 7 2 1 7 -1 -1 3 0 21 - 325 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21 - 324 SM_AMIGA_4_ 3 -1 3 2 3 5 -1 -1 3 0 21 - 321 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 320 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 332 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21 - 322 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_25 3 -1 0 2 0 2 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 2 2 1 6 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_50 3 -1 2 2 0 2 -1 -1 1 0 21 - 307 CLK_000_D_3_ 3 -1 2 2 1 7 -1 -1 1 0 21 - 306 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21 - 348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 330 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 334 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 327 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 346 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 343 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 338 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 333 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 337 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 331 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 329 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 328 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 319 CLK_000_D_4_ 3 -1 7 1 1 -1 -1 1 0 21 - 318 CLK_000_D_2_ 3 -1 0 1 2 -1 -1 1 0 21 - 317 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 - 316 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 315 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 - 59 A_1_ 1 -1 -1 2 1 5 59 -1 - 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -116 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 1 2 3 4 5 7 81 -1 1 0 21 - 79 RW_000 5 339 7 3 0 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 - 70 RW 5 344 6 2 1 7 70 -1 2 0 21 - 40 BERR 5 -1 4 2 0 3 40 -1 1 0 21 - 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 341 6 1 5 69 -1 3 0 21 - 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 311 CLK_000_D_0_ 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 310 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 3 2 3 5 -1 -1 7 0 21 - 296 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 3 2 5 7 -1 -1 3 1 21 - 295 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 3 2 0 3 -1 -1 5 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 2 2 2 3 -1 -1 3 0 21 - 325 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_50 3 -1 6 2 3 6 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 1 2 0 3 -1 -1 1 0 21 - 307 CLK_000_D_3_ 3 -1 3 2 1 2 -1 -1 1 0 21 - 306 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 329 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 341 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 318 CLK_000_D_4_ 3 -1 1 1 2 -1 -1 1 0 21 - 317 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21 - 316 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 315 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 314 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 59 A_1_ 1 -1 -1 2 2 5 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 -115 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 3 4 6 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 4 5 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 4 5 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 5 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 5 6 7 30 -1 1 0 21 - 68 A_0_ 5 345 6 2 0 2 68 -1 3 0 21 - 70 RW 5 344 6 2 3 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 340 6 1 2 69 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 322 SM_AMIGA_6_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 311 CLK_000_D_0_ 3 -1 3 6 0 1 3 5 6 7 -1 -1 1 0 21 - 310 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 3 1 2 3 -1 -1 7 0 21 - 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 335 SM_AMIGA_i_7_ 3 -1 1 3 1 2 7 -1 -1 3 1 21 - 324 SM_AMIGA_1_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 9 0 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 325 SM_AMIGA_0_ 3 -1 7 2 1 7 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 6 2 6 7 -1 -1 2 0 21 - 321 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 307 CLK_000_D_3_ 3 -1 2 2 1 7 -1 -1 1 0 21 - 306 inst_VPA_D 3 -1 3 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 329 inst_CLK_030_H 3 -1 5 1 5 -1 -1 8 0 21 - 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 305 CYCLE_DMA_1_ 3 -1 5 1 5 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 340 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 318 CLK_000_D_4_ 3 -1 7 1 1 -1 -1 1 0 21 - 317 CLK_000_D_2_ 3 -1 7 1 2 -1 -1 1 0 21 - 316 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 315 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 314 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 - 59 A_1_ 1 -1 -1 2 2 6 59 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 -112 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 81 AS_030 5 -1 7 4 3 4 5 7 81 -1 1 0 21 - 79 RW_000 5 338 7 3 2 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 2 6 7 30 -1 1 0 21 - 68 A_0_ 5 -1 6 2 1 2 68 -1 2 0 21 - 70 RW 5 -1 6 2 5 7 70 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21 - 69 SIZE_0_ 5 -1 6 1 2 69 -1 2 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 337 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 340 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 339 1 0 6 -1 9 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 308 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 2 6 0 1 3 5 6 7 -1 -1 1 0 21 - 309 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 5 5 1 2 5 6 7 -1 -1 3 0 21 - 295 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 - 323 SM_AMIGA_4_ 3 -1 6 3 0 5 6 -1 -1 3 0 21 - 303 CYCLE_DMA_0_ 3 -1 0 3 0 1 2 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 - 302 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 301 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 5 0 21 - 326 RST_DLY_0_ 3 -1 0 2 0 6 -1 -1 4 0 21 - 304 CYCLE_DMA_1_ 3 -1 1 2 1 2 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 335 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 325 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 319 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 318 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 0 2 0 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 0 2 0 6 -1 -1 2 1 21 - 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 6 2 3 5 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 - 340 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 339 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 337 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 329 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 338 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 332 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 3 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 N_147 3 -1 4 1 4 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 321 inst_BGACK_030_INT_D 3 -1 3 1 5 -1 -1 1 0 21 - 317 CLK_000_D_4_ 3 -1 3 1 5 -1 -1 1 0 21 - 316 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 307 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 3 1 2 -1 -1 1 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 63 CLK_030 1 -1 -1 1 2 63 -1 - 59 A_1_ 1 -1 -1 1 3 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 -112 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 81 AS_030 5 -1 7 4 3 4 5 7 81 -1 1 0 21 - 79 RW_000 5 338 7 3 2 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 2 6 7 30 -1 1 0 21 - 68 A_0_ 5 -1 6 2 1 2 68 -1 2 0 21 - 70 RW 5 -1 6 2 5 7 70 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21 - 69 SIZE_0_ 5 -1 6 1 2 69 -1 2 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 337 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 340 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 339 1 0 6 -1 9 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 306 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 308 CLK_000_D_0_ 3 -1 2 6 0 1 3 5 6 7 -1 -1 1 0 21 - 307 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 5 5 1 2 5 6 7 -1 -1 3 0 21 - 296 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 323 SM_AMIGA_4_ 3 -1 6 3 0 5 6 -1 -1 3 0 21 - 316 CYCLE_DMA_0_ 3 -1 0 3 0 1 2 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 - 302 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 8 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 - 301 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 6 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 5 0 21 - 326 RST_DLY_0_ 3 -1 0 2 0 6 -1 -1 4 0 21 - 317 CYCLE_DMA_1_ 3 -1 1 2 1 2 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 335 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 325 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 319 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 318 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 0 2 0 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 0 2 0 6 -1 -1 2 1 21 - 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 310 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 304 CLK_000_D_3_ 3 -1 6 2 3 5 -1 -1 1 0 21 - 303 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 - 340 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 339 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 337 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 338 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 329 inst_CLK_030_H 3 -1 2 1 2 -1 -1 4 1 21 - 332 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 3 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 N_235 3 -1 4 1 4 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 321 inst_BGACK_030_INT_D 3 -1 3 1 5 -1 -1 1 0 21 - 315 CLK_000_D_4_ 3 -1 3 1 5 -1 -1 1 0 21 - 314 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 - 313 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 312 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 311 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 - 309 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 305 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 3 1 2 -1 -1 1 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 63 CLK_030 1 -1 -1 1 2 63 -1 - 59 A_1_ 1 -1 -1 1 3 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 -112 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 0 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 2 4 6 7 41 -1 1 0 21 - 79 RW_000 5 338 7 3 2 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 2 6 7 30 -1 1 0 21 - 68 A_0_ 5 -1 6 2 2 6 68 -1 2 0 21 - 70 RW 5 -1 6 2 5 7 70 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 6 78 -1 2 0 21 - 69 SIZE_0_ 5 -1 6 1 6 69 -1 2 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 337 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 340 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 339 1 0 6 -1 9 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 306 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 308 CLK_000_D_0_ 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 307 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 320 SM_AMIGA_6_ 3 -1 1 6 0 1 2 5 6 7 -1 -1 3 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 3 1 3 5 -1 -1 7 0 21 - 296 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 335 SM_AMIGA_i_7_ 3 -1 1 3 1 5 7 -1 -1 3 1 21 - 321 SM_AMIGA_4_ 3 -1 1 3 0 1 5 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 5 3 0 3 5 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 302 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 8 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 2 -1 -1 5 0 21 - 328 CYCLE_DMA_1_ 3 -1 6 2 2 6 -1 -1 4 0 21 - 301 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 7 2 1 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 2 2 2 7 -1 -1 3 0 21 - 317 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 316 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 318 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 310 inst_CLK_OUT_PRE_D 3 -1 6 2 1 6 -1 -1 1 0 21 - 309 inst_CLK_OUT_PRE_50 3 -1 7 2 6 7 -1 -1 1 0 21 - 304 CLK_000_D_3_ 3 -1 3 2 1 6 -1 -1 1 0 21 - 303 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 340 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 339 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 337 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 338 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 329 inst_CLK_030_H 3 -1 2 1 2 -1 -1 4 0 21 - 324 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 332 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 3 0 21 - 327 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 3 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 N_235 3 -1 4 1 4 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 326 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 325 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 319 inst_BGACK_030_INT_D 3 -1 4 1 5 -1 -1 1 0 21 - 315 CLK_000_D_4_ 3 -1 6 1 1 -1 -1 1 0 21 - 314 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21 - 313 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 312 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 311 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 305 inst_DTACK_D0 3 -1 3 1 0 -1 -1 1 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 1 2 -1 -1 1 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 59 A_1_ 1 -1 -1 2 3 6 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 2 63 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 5 10 -1 -110 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 1 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 2 4 5 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 4 2 5 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 4 2 5 6 7 30 -1 1 0 21 - 79 RW_000 5 338 7 3 2 4 6 79 -1 4 0 21 - 68 A_0_ 5 -1 6 2 5 6 68 -1 2 0 21 - 70 RW 5 -1 6 2 5 7 70 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 5 78 -1 2 0 21 - 69 SIZE_0_ 5 -1 6 1 5 69 -1 2 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 337 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 336 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 335 1 0 6 -1 9 0 21 - 82 BGACK_030 5 340 7 0 82 -1 3 0 21 - 34 VMA 5 341 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 339 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 340 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 306 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 308 CLK_000_D_0_ 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 307 CLK_000_D_1_ 3 -1 0 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 320 SM_AMIGA_6_ 3 -1 2 4 2 5 6 7 -1 -1 3 0 21 - 300 inst_AS_030_000_SYNC 3 -1 1 3 1 2 3 -1 -1 7 0 21 - 301 inst_AS_000_DMA 3 -1 5 3 2 5 7 -1 -1 4 0 21 - 296 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 333 SM_AMIGA_i_7_ 3 -1 2 3 1 2 7 -1 -1 3 1 21 - 299 inst_AS_030_D0 3 -1 7 3 1 3 4 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 302 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 7 0 21 - 332 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 5 0 21 - 341 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 317 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 316 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 0 2 0 3 -1 -1 3 0 21 - 329 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 318 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 310 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 - 309 inst_CLK_OUT_PRE_50 3 -1 6 2 3 6 -1 -1 1 0 21 - 304 CLK_000_D_3_ 3 -1 6 2 2 6 -1 -1 1 0 21 - 303 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 337 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 336 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 335 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 331 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 338 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 327 inst_CLK_030_H 3 -1 2 1 2 -1 -1 4 0 21 - 324 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 330 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21 - 339 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 334 N_72 3 -1 4 1 4 -1 -1 2 0 21 - 328 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 326 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 325 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 319 inst_BGACK_030_INT_D 3 -1 1 1 1 -1 -1 1 0 21 - 315 CLK_000_D_4_ 3 -1 6 1 2 -1 -1 1 0 21 - 314 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 - 313 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 312 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 311 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 305 inst_DTACK_D0 3 -1 5 1 0 -1 -1 1 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 1 2 -1 -1 1 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 1 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 1 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 1 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 1 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 1 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 1 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 63 CLK_030 1 -1 -1 2 2 5 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A_1_ 1 -1 -1 1 5 59 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 5 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 4 10 -1 -116 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 1 2 3 4 5 7 81 -1 1 0 21 - 79 RW_000 5 339 7 3 0 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 - 70 RW 5 344 6 2 1 7 70 -1 2 0 21 - 40 BERR 5 -1 4 2 0 3 40 -1 1 0 21 - 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 342 6 1 5 69 -1 3 0 21 - 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 - 82 BGACK_030 5 341 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 3 2 3 5 -1 -1 7 0 21 - 295 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 3 2 5 7 -1 -1 3 1 21 - 294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 6 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 3 2 0 3 -1 -1 5 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 2 2 2 3 -1 -1 3 0 21 - 325 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 6 2 3 6 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 1 2 0 3 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 3 2 1 2 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 8 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 329 inst_CLK_030_H 3 -1 0 1 0 -1 -1 4 1 21 - 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 318 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 317 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 316 CLK_000_D_4_ 3 -1 1 1 2 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 59 A_1_ 1 -1 -1 2 2 5 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 -114 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 - 79 RW_000 5 338 7 3 0 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 - 70 RW 5 345 6 2 5 7 70 -1 2 0 21 - 78 SIZE_1_ 5 335 7 1 1 78 -1 3 0 21 - 69 SIZE_0_ 5 336 6 1 1 69 -1 3 0 21 - 68 A_0_ 5 341 6 1 1 68 -1 3 0 21 - 40 BERR 5 -1 4 1 5 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 337 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 343 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 342 1 0 6 -1 9 0 21 - 82 BGACK_030 5 340 7 0 82 -1 3 0 21 - 34 VMA 5 344 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 339 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 340 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 0 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 320 SM_AMIGA_6_ 3 -1 0 5 0 1 2 5 7 -1 -1 3 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 3 0 2 3 -1 -1 7 0 21 - 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 333 SM_AMIGA_i_7_ 3 -1 2 3 0 2 7 -1 -1 3 1 21 - 323 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 0 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 1 1 21 - 324 RST_DLY_0_ 3 -1 6 2 0 6 -1 -1 4 0 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 4 0 21 - 344 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 330 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 - 329 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 328 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 326 RST_DLY_2_ 3 -1 6 2 0 6 -1 -1 2 0 21 - 325 RST_DLY_1_ 3 -1 0 2 0 6 -1 -1 2 1 21 - 319 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 0 2 0 2 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 3 2 3 4 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 1 2 0 2 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 - 343 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 342 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 337 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 7 0 21 - 332 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 - 331 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 338 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 327 inst_CLK_030_H 3 -1 0 1 0 -1 -1 4 0 21 - 341 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 336 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 335 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 5 1 5 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 - 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 339 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 334 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 -115 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 1 4 5 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 - 70 RW 5 344 6 2 5 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 342 6 1 5 69 -1 3 0 21 - 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 - 82 BGACK_030 5 341 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 311 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 - 310 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 - 295 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 325 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 5 3 0 1 5 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 0 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21 - 302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 - 326 RST_DLY_0_ 3 -1 5 2 3 5 -1 -1 4 0 21 - 305 CYCLE_DMA_1_ 3 -1 0 2 0 1 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 324 SM_AMIGA_1_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 7 2 4 7 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 5 2 3 5 -1 -1 2 1 21 - 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 306 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 - 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 318 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 - 317 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 - 316 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 315 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 314 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 - 307 CLK_000_D_3_ 3 -1 6 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 1 63 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -115 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 1 4 5 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 - 70 RW 5 344 6 2 5 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 342 6 1 5 69 -1 3 0 21 - 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 - 82 BGACK_030 5 341 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 311 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 - 310 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 - 295 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 325 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 5 3 0 1 5 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 0 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21 - 302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 - 326 RST_DLY_0_ 3 -1 5 2 3 5 -1 -1 4 0 21 - 305 CYCLE_DMA_1_ 3 -1 0 2 0 1 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 324 SM_AMIGA_1_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 7 2 4 7 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 5 2 3 5 -1 -1 2 1 21 - 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 306 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 - 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 318 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 - 317 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 - 316 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 315 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 314 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 - 307 CLK_000_D_3_ 3 -1 6 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 1 63 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -115 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 1 4 5 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 - 70 RW 5 344 6 2 5 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 342 6 1 5 69 -1 3 0 21 - 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 - 82 BGACK_030 5 341 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 308 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 - 309 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 - 295 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 325 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 5 3 0 1 5 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 0 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 8 0 21 - 302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 - 326 RST_DLY_0_ 3 -1 5 2 3 5 -1 -1 4 0 21 - 318 CYCLE_DMA_1_ 3 -1 0 2 0 1 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 324 SM_AMIGA_1_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 7 2 4 7 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 5 2 3 5 -1 -1 2 1 21 - 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 - 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 N_270 3 -1 4 1 4 -1 -1 2 0 21 - 317 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 - 316 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 307 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 6 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 1 63 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -115 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 1 4 5 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 - 70 RW 5 344 6 2 5 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 342 6 1 5 69 -1 3 0 21 - 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 - 82 BGACK_030 5 341 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 308 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 - 309 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 - 295 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 325 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 318 CYCLE_DMA_0_ 3 -1 5 3 0 1 5 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 0 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 8 0 21 - 302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 - 326 RST_DLY_0_ 3 -1 5 2 3 5 -1 -1 4 0 21 - 304 CYCLE_DMA_1_ 3 -1 0 2 0 1 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 324 SM_AMIGA_1_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 7 2 4 7 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 5 2 3 5 -1 -1 2 1 21 - 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 - 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 N_270 3 -1 4 1 4 -1 -1 2 0 21 - 317 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 - 316 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 307 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 6 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 1 63 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 2 4 5 7 41 -1 1 0 21 - 79 RW_000 5 348 7 4 2 4 5 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 4 2 5 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 4 2 5 6 7 30 -1 1 0 21 - 70 RW 5 355 6 2 5 7 70 -1 2 0 21 - 80 DSACK1 5 -1 7 2 2 5 80 -1 1 0 21 - 78 SIZE_1_ 5 345 7 1 1 78 -1 3 0 21 - 69 SIZE_0_ 5 346 6 1 1 69 -1 3 0 21 - 68 A_0_ 5 351 6 1 1 68 -1 3 0 21 - 40 BERR 5 -1 4 1 3 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 - 82 BGACK_030 5 350 7 0 82 -1 3 0 21 - 34 VMA 5 354 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 349 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 308 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 309 CLK_000_D_1_ 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 321 SM_AMIGA_6_ 3 -1 6 5 1 2 5 6 7 -1 -1 3 0 21 - 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 7 0 21 - 343 SM_AMIGA_i_7_ 3 -1 0 3 0 6 7 -1 -1 3 1 21 - 322 SM_AMIGA_4_ 3 -1 0 3 0 3 5 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 3 0 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 0 3 4 -1 -1 1 0 21 - 328 DMA_CYCLE_FINISHED_6_ 3 -1 2 2 2 5 -1 -1 10 0 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 10 0 21 - 333 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 2 5 -1 -1 9 0 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 5 2 2 5 -1 -1 8 0 21 - 332 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 2 5 -1 -1 8 1 21 - 331 DMA_CYCLE_FINISHED_3_ 3 -1 2 2 2 5 -1 -1 8 1 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 8 0 21 - 341 SM_AMIGA_2_ 3 -1 3 2 2 3 -1 -1 5 0 21 - 335 CYCLE_DMA_1_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 - 339 SM_AMIGA_5_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 324 SM_AMIGA_0_ 3 -1 7 2 0 7 -1 -1 3 0 21 - 323 SM_AMIGA_1_ 3 -1 2 2 2 7 -1 -1 3 0 21 - 319 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 318 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 - 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 317 CLK_000_D_4_ 3 -1 0 2 0 6 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 0 2 0 6 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 1 1 21 - 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 9 0 21 - 330 DMA_CYCLE_FINISHED_4_ 3 -1 5 1 5 -1 -1 8 1 21 - 329 DMA_CYCLE_FINISHED_5_ 3 -1 2 1 2 -1 -1 8 1 21 - 334 DMA_CYCLE_FINISHED_0_ 3 -1 5 1 5 -1 -1 7 0 21 - 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 - 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 325 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 - 354 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 327 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 326 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 - 316 CLK_000_D_2_ 3 -1 7 1 0 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 307 inst_DTACK_D0 3 -1 3 1 3 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 0 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 2 4 5 7 41 -1 1 0 21 - 79 RW_000 5 348 7 4 2 4 5 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 4 2 5 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 4 2 5 6 7 30 -1 1 0 21 - 70 RW 5 355 6 2 5 7 70 -1 2 0 21 - 80 DSACK1 5 -1 7 2 2 5 80 -1 1 0 21 - 78 SIZE_1_ 5 346 7 1 1 78 -1 3 0 21 - 69 SIZE_0_ 5 345 6 1 1 69 -1 3 0 21 - 68 A_0_ 5 351 6 1 1 68 -1 3 0 21 - 40 BERR 5 -1 4 1 3 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 - 82 BGACK_030 5 350 7 0 82 -1 3 0 21 - 34 VMA 5 354 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 349 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 308 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 309 CLK_000_D_1_ 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 321 SM_AMIGA_6_ 3 -1 6 5 1 2 5 6 7 -1 -1 3 0 21 - 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 7 0 21 - 343 SM_AMIGA_i_7_ 3 -1 0 3 0 6 7 -1 -1 3 1 21 - 322 SM_AMIGA_4_ 3 -1 0 3 0 3 5 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 3 0 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 0 3 4 -1 -1 1 0 21 - 328 DMA_CYCLE_FINISHED_6_ 3 -1 2 2 2 5 -1 -1 10 0 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 10 0 21 - 333 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 2 5 -1 -1 9 0 21 - 332 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 2 5 -1 -1 8 1 21 - 331 DMA_CYCLE_FINISHED_3_ 3 -1 2 2 2 5 -1 -1 8 1 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 8 0 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 5 2 2 5 -1 -1 7 0 21 - 341 SM_AMIGA_2_ 3 -1 3 2 2 3 -1 -1 5 0 21 - 335 CYCLE_DMA_1_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 - 339 SM_AMIGA_5_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 324 SM_AMIGA_0_ 3 -1 7 2 0 7 -1 -1 3 0 21 - 323 SM_AMIGA_1_ 3 -1 2 2 2 7 -1 -1 3 0 21 - 319 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 318 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 - 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 317 CLK_000_D_4_ 3 -1 0 2 0 6 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 0 2 0 6 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 1 1 21 - 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 9 0 21 - 330 DMA_CYCLE_FINISHED_4_ 3 -1 5 1 5 -1 -1 8 1 21 - 329 DMA_CYCLE_FINISHED_5_ 3 -1 2 1 2 -1 -1 8 1 21 - 334 DMA_CYCLE_FINISHED_0_ 3 -1 5 1 5 -1 -1 7 0 21 - 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 - 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 325 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 - 354 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 346 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 345 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 327 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 326 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 - 316 CLK_000_D_2_ 3 -1 7 1 0 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 307 inst_DTACK_D0 3 -1 3 1 3 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 0 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 - 81 AS_030 5 -1 7 5 0 2 3 4 7 81 -1 1 0 21 - 79 RW_000 5 347 7 4 0 4 5 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 4 0 5 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 4 0 5 6 7 30 -1 1 0 21 - 80 DSACK1 5 -1 7 3 0 5 6 80 -1 1 0 21 - 68 A_0_ 5 348 6 2 2 5 68 -1 3 0 21 - 70 RW 5 354 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 345 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 355 6 1 5 69 -1 3 0 21 - 40 BERR 5 -1 4 1 3 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 346 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 350 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 349 1 0 6 -1 9 0 21 - 82 BGACK_030 5 352 7 0 82 -1 3 0 21 - 34 VMA 5 353 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 351 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 352 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 1 6 0 1 2 3 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21 - 335 CYCLE_DMA_1_ 3 -1 2 4 0 2 5 6 -1 -1 4 0 21 - 320 SM_AMIGA_6_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 4 0 5 6 7 -1 -1 1 0 21 - 327 DMA_CYCLE_FINISHED_6_ 3 -1 6 3 0 5 6 -1 -1 9 0 21 - 300 inst_AS_030_000_SYNC 3 -1 7 3 2 3 7 -1 -1 7 0 21 - 323 SM_AMIGA_0_ 3 -1 1 3 1 2 7 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 1 3 1 2 3 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 7 -1 -1 1 0 21 - 331 DMA_CYCLE_FINISHED_2_ 3 -1 0 2 0 5 -1 -1 10 0 21 - 330 DMA_CYCLE_FINISHED_3_ 3 -1 5 2 5 6 -1 -1 10 0 21 - 329 DMA_CYCLE_FINISHED_4_ 3 -1 0 2 0 5 -1 -1 9 0 21 - 328 DMA_CYCLE_FINISHED_5_ 3 -1 5 2 0 5 -1 -1 9 0 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 9 0 21 - 332 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 0 5 -1 -1 8 0 21 - 333 DMA_CYCLE_FINISHED_0_ 3 -1 0 2 0 5 -1 -1 7 0 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21 - 341 SM_AMIGA_2_ 3 -1 3 2 0 3 -1 -1 5 0 21 - 324 RST_DLY_0_ 3 -1 1 2 1 6 -1 -1 4 0 21 - 296 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 343 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 322 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 - 326 RST_DLY_2_ 3 -1 6 2 1 6 -1 -1 2 0 21 - 325 RST_DLY_1_ 3 -1 1 2 1 6 -1 -1 2 1 21 - 319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 1 2 1 6 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 3 2 1 3 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 2 2 2 6 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 - 350 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 349 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 8 0 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 1 6 -1 -1 7 0 21 - 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 - 347 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 355 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 353 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 348 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 339 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 3 0 21 - 334 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21 - 354 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 6 1 2 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 2 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 2 1 3 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 4 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 59 A_1_ 1 -1 -1 2 0 5 59 -1 - 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 2 4 7 56 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 35 VPA 1 -1 -1 1 4 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 79 RW_000 5 348 7 5 0 1 4 5 6 79 -1 4 0 21 - 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 1 4 5 7 41 -1 1 0 21 - 70 RW 5 354 6 2 5 7 70 -1 2 0 21 - 80 DSACK1 5 -1 7 2 1 5 80 -1 1 0 21 - 40 BERR 5 -1 4 2 0 3 40 -1 1 0 21 - 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 - 78 SIZE_1_ 5 345 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 355 6 1 2 69 -1 3 0 21 - 68 A_0_ 5 347 6 1 2 68 -1 3 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 346 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 350 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 349 1 0 6 -1 9 0 21 - 82 BGACK_030 5 352 7 0 82 -1 3 0 21 - 34 VMA 5 353 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 351 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 352 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 7 0 21 - 302 inst_AS_000_DMA 3 -1 5 3 0 5 7 -1 -1 6 0 21 - 335 CYCLE_DMA_1_ 3 -1 0 3 0 1 5 -1 -1 4 0 21 - 333 DMA_CYCLE_FINISHED_0_ 3 -1 1 3 0 1 5 -1 -1 4 0 21 - 332 DMA_CYCLE_FINISHED_1_ 3 -1 5 3 0 1 5 -1 -1 4 0 21 - 331 DMA_CYCLE_FINISHED_2_ 3 -1 1 3 0 1 5 -1 -1 4 0 21 - 330 DMA_CYCLE_FINISHED_3_ 3 -1 1 3 0 1 5 -1 -1 4 0 21 - 296 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 343 SM_AMIGA_i_7_ 3 -1 5 3 2 5 7 -1 -1 3 1 21 - 323 SM_AMIGA_0_ 3 -1 6 3 5 6 7 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 2 3 2 3 5 -1 -1 3 0 21 - 320 SM_AMIGA_6_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 2 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 2 3 2 3 4 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 - 341 SM_AMIGA_2_ 3 -1 0 2 0 7 -1 -1 5 0 21 - 340 SM_AMIGA_3_ 3 -1 3 2 0 3 -1 -1 5 0 21 - 329 DMA_CYCLE_FINISHED_4_ 3 -1 5 2 1 5 -1 -1 4 1 21 - 327 DMA_CYCLE_FINISHED_6_ 3 -1 1 2 1 5 -1 -1 4 1 21 - 353 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 0 2 0 3 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 2 2 0 3 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 3 2 0 3 -1 -1 1 0 21 - 350 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 349 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 8 0 21 - 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 1 1 1 -1 -1 4 0 21 - 336 inst_CLK_030_H 3 -1 0 1 0 -1 -1 4 1 21 - 328 DMA_CYCLE_FINISHED_5_ 3 -1 1 1 1 -1 -1 4 1 21 - 324 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 355 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 347 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 339 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 3 0 21 - 334 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 354 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 326 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 325 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 316 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 1 1 3 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 3 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 - 63 CLK_030 1 -1 -1 2 0 5 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 0 1 3 4 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 2 4 5 7 41 -1 1 0 21 - 79 RW_000 5 347 7 4 2 4 5 6 79 -1 4 0 21 - 68 A_0_ 5 348 6 2 1 5 68 -1 3 0 21 - 70 RW 5 354 6 2 1 7 70 -1 2 0 21 - 80 DSACK1 5 -1 7 2 2 5 80 -1 1 0 21 - 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 - 78 SIZE_1_ 5 345 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 355 6 1 5 69 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 346 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 351 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 349 1 0 6 -1 9 0 21 - 82 BGACK_030 5 352 7 0 82 -1 3 0 21 - 34 VMA 5 353 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 350 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 352 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 5 6 0 1 3 5 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 - 320 SM_AMIGA_6_ 3 -1 5 4 1 3 5 7 -1 -1 3 0 21 - 300 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 7 0 21 - 296 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 - 324 CYCLE_DMA_0_ 3 -1 7 3 2 5 7 -1 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 6 3 5 6 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 1 3 0 1 6 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 3 0 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 7 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 - 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 333 DMA_CYCLE_FINISHED_2_ 3 -1 5 2 2 5 -1 -1 8 0 21 - 332 DMA_CYCLE_FINISHED_3_ 3 -1 5 2 2 5 -1 -1 8 0 21 - 329 DMA_CYCLE_FINISHED_6_ 3 -1 2 2 2 5 -1 -1 8 0 21 - 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 334 DMA_CYCLE_FINISHED_1_ 3 -1 2 2 2 5 -1 -1 6 0 21 - 341 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 5 0 21 - 326 RST_DLY_0_ 3 -1 0 2 0 6 -1 -1 4 0 21 - 325 CYCLE_DMA_1_ 3 -1 5 2 2 5 -1 -1 4 0 21 - 353 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 343 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 318 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 0 2 0 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 6 2 0 6 -1 -1 2 1 21 - 319 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 6 2 4 6 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 5 2 4 5 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 3 2 0 3 -1 -1 1 0 21 - 351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 349 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 336 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 331 DMA_CYCLE_FINISHED_4_ 3 -1 2 1 2 -1 -1 6 1 21 - 330 DMA_CYCLE_FINISHED_5_ 3 -1 5 1 5 -1 -1 6 1 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 2 1 2 -1 -1 5 0 21 - 340 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 335 DMA_CYCLE_FINISHED_0_ 3 -1 2 1 2 -1 -1 5 0 21 - 347 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 355 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 348 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 339 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21 - 354 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 350 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 4 1 5 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 7 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 59 A_1_ 1 -1 -1 2 0 6 59 -1 - 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 2 4 7 56 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 2 63 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 7 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 5 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 1 2 3 4 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 2 4 5 7 41 -1 1 0 21 - 79 RW_000 5 348 7 4 2 4 5 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 4 2 5 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 4 2 5 6 7 30 -1 1 0 21 - 68 A_0_ 5 351 6 2 2 5 68 -1 3 0 21 - 70 RW 5 355 6 2 1 7 70 -1 2 0 21 - 80 DSACK1 5 -1 7 2 2 5 80 -1 1 0 21 - 78 SIZE_1_ 5 345 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 346 6 1 5 69 -1 3 0 21 - 40 BERR 5 -1 4 1 3 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 - 82 BGACK_030 5 350 7 0 82 -1 3 0 21 - 34 VMA 5 354 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 349 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 320 SM_AMIGA_6_ 3 -1 6 5 1 2 5 6 7 -1 -1 3 0 21 - 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 7 0 21 - 343 SM_AMIGA_i_7_ 3 -1 6 3 0 6 7 -1 -1 3 1 21 - 324 CYCLE_DMA_0_ 3 -1 7 3 2 5 7 -1 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 3 3 0 2 3 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 3 0 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 4 3 0 3 4 -1 -1 1 0 21 - 333 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 2 5 -1 -1 13 0 21 - 332 DMA_CYCLE_FINISHED_3_ 3 -1 2 2 2 5 -1 -1 13 0 21 - 334 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 2 5 -1 -1 11 0 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 10 0 21 - 331 DMA_CYCLE_FINISHED_4_ 3 -1 2 2 2 5 -1 -1 9 1 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 5 2 2 5 -1 -1 8 0 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 8 0 21 - 325 CYCLE_DMA_1_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 296 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 339 SM_AMIGA_5_ 3 -1 5 2 5 6 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 1 2 5 6 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 - 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 9 0 21 - 330 DMA_CYCLE_FINISHED_5_ 3 -1 2 1 2 -1 -1 9 1 21 - 329 DMA_CYCLE_FINISHED_6_ 3 -1 2 1 2 -1 -1 9 1 21 - 335 DMA_CYCLE_FINISHED_0_ 3 -1 5 1 5 -1 -1 8 0 21 - 341 SM_AMIGA_2_ 3 -1 3 1 3 -1 -1 5 0 21 - 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 - 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 - 354 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 - 316 CLK_000_D_4_ 3 -1 5 1 6 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 4 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 0 1 3 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 6 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 4 67 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 59 A_1_ 1 -1 -1 1 0 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 - 81 AS_030 5 -1 7 5 0 3 4 5 7 81 -1 1 0 21 - 79 RW_000 5 347 7 4 2 4 5 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 4 2 5 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 4 2 5 6 7 30 -1 1 0 21 - 70 RW 5 352 6 2 5 7 70 -1 2 0 21 - 80 DSACK1 5 -1 7 2 2 6 80 -1 1 0 21 - 78 SIZE_1_ 5 345 7 1 3 78 -1 3 0 21 - 69 SIZE_0_ 5 350 6 1 3 69 -1 3 0 21 - 68 A_0_ 5 353 6 1 3 68 -1 3 0 21 - 40 BERR 5 -1 4 1 1 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 346 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 355 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 354 1 0 6 -1 9 0 21 - 82 BGACK_030 5 349 7 0 82 -1 3 0 21 - 34 VMA 5 351 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 348 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 349 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 5 6 0 1 2 3 5 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 - 324 CYCLE_DMA_0_ 3 -1 0 4 0 2 5 6 -1 -1 3 0 21 - 320 SM_AMIGA_6_ 3 -1 2 4 2 3 5 7 -1 -1 3 0 21 - 334 DMA_CYCLE_FINISHED_1_ 3 -1 6 3 2 5 6 -1 -1 11 0 21 - 332 DMA_CYCLE_FINISHED_3_ 3 -1 6 3 2 5 6 -1 -1 10 0 21 - 300 inst_AS_030_000_SYNC 3 -1 0 3 0 2 3 -1 -1 7 0 21 - 325 CYCLE_DMA_1_ 3 -1 5 3 2 5 6 -1 -1 4 0 21 - 296 cpu_est_3_ 3 -1 1 3 1 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21 - 343 SM_AMIGA_i_7_ 3 -1 2 3 0 2 7 -1 -1 3 1 21 - 301 inst_BGACK_030_INT_D 3 -1 4 3 0 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 4 3 0 3 4 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 1 1 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 2 2 6 -1 -1 10 0 21 - 333 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 2 5 -1 -1 10 0 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 10 0 21 - 335 DMA_CYCLE_FINISHED_0_ 3 -1 6 2 5 6 -1 -1 9 0 21 - 331 DMA_CYCLE_FINISHED_4_ 3 -1 2 2 2 6 -1 -1 8 1 21 - 330 DMA_CYCLE_FINISHED_5_ 3 -1 2 2 2 6 -1 -1 8 1 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 8 0 21 - 341 SM_AMIGA_2_ 3 -1 1 2 1 5 -1 -1 5 0 21 - 351 RN_VMA 3 34 3 2 1 3 34 -1 3 0 21 - 339 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 1 2 1 5 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 3 2 1 3 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 1 2 2 6 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 2 2 1 3 -1 -1 1 0 21 - 329 DMA_CYCLE_FINISHED_6_ 3 -1 2 1 2 -1 -1 12 0 21 - 355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 9 0 21 - 340 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21 - 347 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 353 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 350 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 - 352 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 6 1 2 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 0 1 1 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 - 59 A_1_ 1 -1 -1 2 0 6 59 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 5 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 - 81 AS_030 5 -1 7 5 0 3 4 5 7 81 -1 1 0 21 - 79 RW_000 5 347 7 4 2 4 5 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 4 2 5 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 4 2 5 6 7 30 -1 1 0 21 - 70 RW 5 352 6 2 5 7 70 -1 2 0 21 - 80 DSACK1 5 -1 7 2 2 6 80 -1 1 0 21 - 78 SIZE_1_ 5 345 7 1 3 78 -1 3 0 21 - 69 SIZE_0_ 5 350 6 1 3 69 -1 3 0 21 - 68 A_0_ 5 353 6 1 3 68 -1 3 0 21 - 40 BERR 5 -1 4 1 1 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 346 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 355 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 354 1 0 6 -1 9 0 21 - 82 BGACK_030 5 349 7 0 82 -1 3 0 21 - 34 VMA 5 351 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 348 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 349 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 5 6 0 1 2 3 5 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 - 324 CYCLE_DMA_0_ 3 -1 0 4 0 2 5 6 -1 -1 3 0 21 - 320 SM_AMIGA_6_ 3 -1 2 4 2 3 5 7 -1 -1 3 0 21 - 334 DMA_CYCLE_FINISHED_1_ 3 -1 6 3 2 5 6 -1 -1 11 0 21 - 332 DMA_CYCLE_FINISHED_3_ 3 -1 6 3 2 5 6 -1 -1 10 0 21 - 300 inst_AS_030_000_SYNC 3 -1 0 3 0 2 3 -1 -1 7 0 21 - 325 CYCLE_DMA_1_ 3 -1 5 3 2 5 6 -1 -1 4 0 21 - 296 cpu_est_3_ 3 -1 1 3 1 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21 - 343 SM_AMIGA_i_7_ 3 -1 2 3 0 2 7 -1 -1 3 1 21 - 301 inst_BGACK_030_INT_D 3 -1 4 3 0 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 4 3 0 3 4 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 1 1 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 2 2 6 -1 -1 10 0 21 - 333 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 2 5 -1 -1 10 0 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 10 0 21 - 335 DMA_CYCLE_FINISHED_0_ 3 -1 6 2 5 6 -1 -1 9 0 21 - 331 DMA_CYCLE_FINISHED_4_ 3 -1 2 2 2 6 -1 -1 8 1 21 - 330 DMA_CYCLE_FINISHED_5_ 3 -1 2 2 2 6 -1 -1 8 1 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 8 0 21 - 341 SM_AMIGA_2_ 3 -1 1 2 1 5 -1 -1 5 0 21 - 351 RN_VMA 3 34 3 2 1 3 34 -1 3 0 21 - 339 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 1 2 1 5 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 3 2 1 3 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 1 2 2 6 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 2 2 1 3 -1 -1 1 0 21 - 329 DMA_CYCLE_FINISHED_6_ 3 -1 2 1 2 -1 -1 12 0 21 - 355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 9 0 21 - 340 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21 - 347 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 353 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 350 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 - 352 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 6 1 2 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 0 1 1 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 - 59 A_1_ 1 -1 -1 2 0 6 59 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 5 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 7 0 1 2 4 5 6 7 41 -1 1 0 21 - 81 AS_030 5 -1 7 5 0 1 3 4 7 81 -1 1 0 21 - 79 RW_000 5 348 7 4 2 4 5 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 4 2 5 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 4 2 5 6 7 30 -1 1 0 21 - 80 DSACK1 5 -1 7 3 2 5 6 80 -1 1 0 21 - 68 A_0_ 5 351 6 2 5 6 68 -1 3 0 21 - 70 RW 5 355 6 2 1 7 70 -1 2 0 21 - 78 SIZE_1_ 5 345 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 346 6 1 5 69 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 - 82 BGACK_030 5 350 7 0 82 -1 3 0 21 - 34 VMA 5 354 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 349 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 308 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 5 7 0 1 2 3 4 6 7 -1 -1 1 0 21 - 321 SM_AMIGA_6_ 3 -1 2 6 0 1 2 5 6 7 -1 -1 3 0 21 - 309 CLK_000_D_1_ 3 -1 4 6 0 1 2 3 6 7 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 3 5 0 3 5 6 7 -1 -1 1 0 21 - 304 CYCLE_DMA_0_ 3 -1 1 4 1 2 5 6 -1 -1 3 0 21 - 325 CYCLE_DMA_1_ 3 -1 6 3 2 5 6 -1 -1 4 0 21 - 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 343 SM_AMIGA_i_7_ 3 -1 2 3 2 3 7 -1 -1 3 1 21 - 294 cpu_est_0_ 3 -1 7 3 0 3 7 -1 -1 3 0 21 - 296 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 333 DMA_CYCLE_FINISHED_2_ 3 -1 5 2 2 5 -1 -1 11 0 21 - 331 DMA_CYCLE_FINISHED_4_ 3 -1 2 2 2 5 -1 -1 10 0 21 - 330 DMA_CYCLE_FINISHED_5_ 3 -1 2 2 2 5 -1 -1 10 0 21 - 329 DMA_CYCLE_FINISHED_6_ 3 -1 6 2 2 6 -1 -1 10 0 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 10 0 21 - 335 DMA_CYCLE_FINISHED_0_ 3 -1 2 2 2 5 -1 -1 9 0 21 - 332 DMA_CYCLE_FINISHED_3_ 3 -1 5 2 5 6 -1 -1 8 1 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 8 0 21 - 300 inst_AS_030_000_SYNC 3 -1 3 2 2 3 -1 -1 7 0 21 - 341 SM_AMIGA_2_ 3 -1 0 2 0 2 -1 -1 5 0 21 - 354 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 324 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 - 323 SM_AMIGA_1_ 3 -1 2 2 2 7 -1 -1 3 0 21 - 322 SM_AMIGA_4_ 3 -1 0 2 0 1 -1 -1 3 0 21 - 319 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 - 318 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 320 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 2 2 0 3 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 3 2 3 4 -1 -1 1 0 21 - 334 DMA_CYCLE_FINISHED_1_ 3 -1 5 1 5 -1 -1 11 0 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 1 6 -1 -1 10 0 21 - 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 9 0 21 - 340 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 - 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 339 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 - 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 - 317 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 - 316 CLK_000_D_2_ 3 -1 1 1 0 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 307 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 0 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 3 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 3 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 3 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 3 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 3 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 3 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 - 59 A_1_ 1 -1 -1 2 0 5 59 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 5 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 1 2 3 4 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 2 4 5 7 41 -1 1 0 21 - 79 RW_000 5 348 7 4 2 4 5 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 4 2 5 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 4 2 5 6 7 30 -1 1 0 21 - 68 A_0_ 5 353 6 2 2 5 68 -1 3 0 21 - 70 RW 5 352 6 2 1 7 70 -1 2 0 21 - 80 DSACK1 5 -1 7 2 2 5 80 -1 1 0 21 - 78 SIZE_1_ 5 345 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 347 6 1 5 69 -1 3 0 21 - 40 BERR 5 -1 4 1 3 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 346 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 355 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 354 1 0 6 -1 9 0 21 - 82 BGACK_030 5 350 7 0 82 -1 3 0 21 - 34 VMA 5 351 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 349 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 308 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 309 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 321 SM_AMIGA_6_ 3 -1 6 5 1 2 5 6 7 -1 -1 3 0 21 - 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 7 0 21 - 343 SM_AMIGA_i_7_ 3 -1 6 3 0 6 7 -1 -1 3 1 21 - 324 SM_AMIGA_0_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 - 323 SM_AMIGA_1_ 3 -1 3 3 0 2 3 -1 -1 3 0 21 - 322 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 7 3 2 5 7 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 3 0 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 4 3 0 3 4 -1 -1 1 0 21 - 333 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 2 5 -1 -1 13 0 21 - 332 DMA_CYCLE_FINISHED_3_ 3 -1 2 2 2 5 -1 -1 13 0 21 - 334 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 2 5 -1 -1 11 0 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 10 0 21 - 331 DMA_CYCLE_FINISHED_4_ 3 -1 2 2 2 5 -1 -1 9 1 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 5 2 2 5 -1 -1 8 0 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 8 0 21 - 325 CYCLE_DMA_1_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 - 339 SM_AMIGA_5_ 3 -1 5 2 5 6 -1 -1 3 0 21 - 319 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 - 318 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 - 320 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 1 2 5 6 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 - 355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 9 0 21 - 330 DMA_CYCLE_FINISHED_5_ 3 -1 2 1 2 -1 -1 9 1 21 - 329 DMA_CYCLE_FINISHED_6_ 3 -1 2 1 2 -1 -1 9 1 21 - 335 DMA_CYCLE_FINISHED_0_ 3 -1 5 1 5 -1 -1 8 0 21 - 341 SM_AMIGA_2_ 3 -1 3 1 3 -1 -1 5 0 21 - 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 - 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 - 353 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 351 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 347 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 352 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 - 317 CLK_000_D_4_ 3 -1 5 1 6 -1 -1 1 0 21 - 316 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 4 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 - 307 inst_DTACK_D0 3 -1 0 1 3 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 6 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 4 67 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 59 A_1_ 1 -1 -1 1 0 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 - 81 AS_030 5 -1 7 5 0 2 3 4 7 81 -1 1 0 21 - 79 RW_000 5 348 7 4 0 4 5 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 4 0 5 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 4 0 5 6 7 30 -1 1 0 21 - 80 DSACK1 5 -1 7 3 0 5 6 80 -1 1 0 21 - 68 A_0_ 5 351 6 2 2 5 68 -1 3 0 21 - 70 RW 5 355 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 346 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 345 6 1 5 69 -1 3 0 21 - 40 BERR 5 -1 4 1 3 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 - 82 BGACK_030 5 350 7 0 82 -1 3 0 21 - 34 VMA 5 354 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 349 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 1 6 0 1 2 3 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21 - 335 CYCLE_DMA_1_ 3 -1 2 4 0 2 5 6 -1 -1 4 0 21 - 320 SM_AMIGA_6_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 4 0 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 7 3 2 3 7 -1 -1 7 0 21 - 327 DMA_CYCLE_FINISHED_6_ 3 -1 6 3 0 5 6 -1 -1 6 1 21 - 323 SM_AMIGA_0_ 3 -1 1 3 1 2 7 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 1 3 1 2 3 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 7 -1 -1 1 0 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 9 0 21 - 329 DMA_CYCLE_FINISHED_4_ 3 -1 0 2 0 5 -1 -1 7 1 21 - 328 DMA_CYCLE_FINISHED_5_ 3 -1 5 2 0 5 -1 -1 7 1 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21 - 333 DMA_CYCLE_FINISHED_0_ 3 -1 0 2 0 5 -1 -1 6 0 21 - 332 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 0 5 -1 -1 6 0 21 - 331 DMA_CYCLE_FINISHED_2_ 3 -1 0 2 0 5 -1 -1 6 0 21 - 330 DMA_CYCLE_FINISHED_3_ 3 -1 5 2 5 6 -1 -1 6 0 21 - 341 SM_AMIGA_2_ 3 -1 3 2 0 3 -1 -1 5 0 21 - 324 RST_DLY_0_ 3 -1 1 2 1 6 -1 -1 4 0 21 - 296 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 343 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 322 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 - 326 RST_DLY_2_ 3 -1 6 2 1 6 -1 -1 2 0 21 - 325 RST_DLY_1_ 3 -1 1 2 1 6 -1 -1 2 1 21 - 319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 1 2 1 6 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 3 2 1 3 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 2 2 2 6 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 - 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 1 6 -1 -1 6 0 21 - 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 - 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 4 1 21 - 354 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 346 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 345 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 339 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 3 0 21 - 334 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21 - 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 6 1 2 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 2 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 2 1 3 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 4 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 59 A_1_ 1 -1 -1 2 0 5 59 -1 - 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 2 4 7 56 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 35 VPA 1 -1 -1 1 4 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 - 81 AS_030 5 -1 7 5 0 2 3 4 7 81 -1 1 0 21 - 79 RW_000 5 348 7 4 0 4 5 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 4 0 5 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 4 0 5 6 7 30 -1 1 0 21 - 80 DSACK1 5 -1 7 3 0 5 6 80 -1 1 0 21 - 68 A_0_ 5 351 6 2 2 5 68 -1 3 0 21 - 70 RW 5 355 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 346 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 345 6 1 5 69 -1 3 0 21 - 40 BERR 5 -1 4 1 3 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 - 82 BGACK_030 5 350 7 0 82 -1 3 0 21 - 34 VMA 5 354 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 349 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 1 6 0 1 2 3 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21 - 335 CYCLE_DMA_1_ 3 -1 2 4 0 2 5 6 -1 -1 4 0 21 - 320 SM_AMIGA_6_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 4 0 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 7 3 2 3 7 -1 -1 7 0 21 - 327 DMA_CYCLE_FINISHED_6_ 3 -1 6 3 0 5 6 -1 -1 6 1 21 - 323 SM_AMIGA_0_ 3 -1 1 3 1 2 7 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 1 3 1 2 3 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 7 -1 -1 1 0 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 9 0 21 - 329 DMA_CYCLE_FINISHED_4_ 3 -1 0 2 0 5 -1 -1 7 1 21 - 328 DMA_CYCLE_FINISHED_5_ 3 -1 5 2 0 5 -1 -1 7 1 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21 - 333 DMA_CYCLE_FINISHED_0_ 3 -1 0 2 0 5 -1 -1 6 0 21 - 332 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 0 5 -1 -1 6 0 21 - 331 DMA_CYCLE_FINISHED_2_ 3 -1 0 2 0 5 -1 -1 6 0 21 - 330 DMA_CYCLE_FINISHED_3_ 3 -1 5 2 5 6 -1 -1 6 0 21 - 341 SM_AMIGA_2_ 3 -1 3 2 0 3 -1 -1 5 0 21 - 324 RST_DLY_0_ 3 -1 1 2 1 6 -1 -1 4 0 21 - 296 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 343 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 322 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 - 326 RST_DLY_2_ 3 -1 6 2 1 6 -1 -1 2 0 21 - 325 RST_DLY_1_ 3 -1 1 2 1 6 -1 -1 2 1 21 - 319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 1 2 1 6 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 3 2 1 3 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 2 2 2 6 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 - 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 1 6 -1 -1 6 0 21 - 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 - 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 4 1 21 - 354 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 346 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 345 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 339 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 3 0 21 - 334 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21 - 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 6 1 2 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 2 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 2 1 3 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 4 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 59 A_1_ 1 -1 -1 2 0 5 59 -1 - 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 2 4 7 56 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 35 VPA 1 -1 -1 1 4 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 4 5 7 41 -1 1 0 21 - 79 RW_000 5 350 7 4 0 4 5 6 79 -1 4 0 21 - 81 AS_030 5 -1 7 4 2 3 4 7 81 -1 1 0 21 - 70 RW 5 354 6 2 2 7 70 -1 2 0 21 - 68 A_0_ 5 346 6 2 0 2 68 -1 2 0 21 - 80 DSACK1 5 -1 7 2 0 5 80 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 5 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 5 30 -1 1 0 21 - 78 SIZE_1_ 5 345 7 1 0 78 -1 2 0 21 - 69 SIZE_0_ 5 355 6 1 0 69 -1 2 0 21 - 40 BERR 5 -1 4 1 6 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 349 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 348 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 347 1 0 6 -1 9 0 21 - 82 BGACK_030 5 352 7 0 82 -1 3 0 21 - 34 VMA 5 353 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 351 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 352 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 3 6 1 2 3 5 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 1 6 1 2 3 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 7 3 2 3 7 -1 -1 7 0 21 - 335 CYCLE_DMA_1_ 3 -1 1 3 0 1 5 -1 -1 4 0 21 - 320 SM_AMIGA_6_ 3 -1 2 3 0 2 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 7 -1 -1 1 0 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 9 0 21 - 329 DMA_CYCLE_FINISHED_4_ 3 -1 0 2 0 5 -1 -1 7 1 21 - 328 DMA_CYCLE_FINISHED_5_ 3 -1 0 2 0 5 -1 -1 7 1 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21 - 332 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 0 5 -1 -1 6 0 21 - 331 DMA_CYCLE_FINISHED_2_ 3 -1 0 2 0 5 -1 -1 6 0 21 - 330 DMA_CYCLE_FINISHED_3_ 3 -1 5 2 0 5 -1 -1 6 0 21 - 341 SM_AMIGA_2_ 3 -1 6 2 5 6 -1 -1 5 0 21 - 324 RST_DLY_0_ 3 -1 1 2 1 6 -1 -1 4 0 21 - 296 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 353 RN_VMA 3 34 3 2 3 6 34 -1 3 0 21 - 343 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 323 SM_AMIGA_0_ 3 -1 2 2 2 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 2 2 2 6 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 - 326 RST_DLY_2_ 3 -1 6 2 1 6 -1 -1 2 0 21 - 325 RST_DLY_1_ 3 -1 6 2 1 6 -1 -1 2 1 21 - 319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 5 2 3 6 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 - 349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 0 1 0 -1 -1 6 0 21 - 333 DMA_CYCLE_FINISHED_0_ 3 -1 5 1 5 -1 -1 6 0 21 - 327 DMA_CYCLE_FINISHED_6_ 3 -1 0 1 0 -1 -1 6 1 21 - 340 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 5 0 21 - 350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 4 1 21 - 339 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 3 0 21 - 334 CYCLE_DMA_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 355 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 - 354 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 346 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 3 1 3 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 4 1 6 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 3 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 2 4 7 56 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 59 A_1_ 1 -1 -1 1 1 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 4 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 - 79 RW_000 5 350 7 4 0 2 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 70 RW 5 354 6 2 2 7 70 -1 2 0 21 - 68 A_0_ 5 346 6 2 0 1 68 -1 2 0 21 - 80 DSACK1 5 -1 7 2 0 2 80 -1 1 0 21 - 78 SIZE_1_ 5 345 7 1 0 78 -1 2 0 21 - 69 SIZE_0_ 5 355 6 1 0 69 -1 2 0 21 - 40 BERR 5 -1 4 1 3 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 348 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 349 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 347 1 0 6 -1 9 0 21 - 82 BGACK_030 5 352 7 0 82 -1 3 0 21 - 34 VMA 5 353 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 351 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 31 UDS_000 0 3 0 31 -1 1 0 21 - 30 LDS_000 0 3 0 30 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 352 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 320 SM_AMIGA_6_ 3 -1 5 6 0 1 2 5 6 7 -1 -1 3 0 21 - 309 CLK_000_D_0_ 3 -1 6 6 1 2 3 5 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 3 6 1 2 3 5 6 7 -1 -1 1 0 21 - 321 SM_AMIGA_4_ 3 -1 1 3 1 2 3 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 3 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 6 0 21 - 341 SM_AMIGA_2_ 3 -1 3 2 3 6 -1 -1 5 0 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 2 2 0 2 -1 -1 4 0 21 - 335 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 4 0 21 - 332 DMA_CYCLE_FINISHED_1_ 3 -1 0 2 0 2 -1 -1 4 0 21 - 331 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 0 2 -1 -1 4 0 21 - 330 DMA_CYCLE_FINISHED_3_ 3 -1 2 2 0 2 -1 -1 4 0 21 - 328 DMA_CYCLE_FINISHED_5_ 3 -1 0 2 0 2 -1 -1 4 1 21 - 296 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 343 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 339 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 3 0 21 - 334 CYCLE_DMA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 6 2 5 6 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 2 2 1 6 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 1 2 1 2 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 5 2 2 5 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 - 349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 348 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 8 0 21 - 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 - 350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 336 inst_CLK_030_H 3 -1 0 1 0 -1 -1 4 1 21 - 333 DMA_CYCLE_FINISHED_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 329 DMA_CYCLE_FINISHED_4_ 3 -1 0 1 0 -1 -1 4 1 21 - 327 DMA_CYCLE_FINISHED_6_ 3 -1 0 1 0 -1 -1 4 1 21 - 324 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 - 353 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 355 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 - 354 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 346 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 326 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 325 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 - 316 CLK_000_D_4_ 3 -1 2 1 5 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 0 1 3 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 1 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -115 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 4 5 6 7 41 -1 1 0 21 - 79 RW_000 5 340 7 3 4 5 6 79 -1 4 0 21 - 70 RW 5 347 6 2 5 7 70 -1 2 0 21 - 68 A_0_ 5 344 6 2 3 5 68 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 5 78 -1 2 0 21 - 69 SIZE_0_ 5 339 6 1 5 69 -1 2 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 346 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 345 1 0 6 -1 9 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 31 UDS_000 0 3 0 31 -1 1 0 21 - 30 LDS_000 0 3 0 30 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 308 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 0 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 309 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 2 5 0 2 3 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 4 1 2 6 7 -1 -1 1 0 21 - 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 299 inst_AS_030_D0 3 -1 3 3 2 3 4 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 3 -1 -1 5 0 21 - 318 CYCLE_DMA_1_ 3 -1 6 2 5 6 -1 -1 4 0 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 4 0 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 325 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 3 2 3 7 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 6 2 5 6 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 0 2 0 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 5 2 0 3 -1 -1 1 0 21 - 346 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 345 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 329 inst_CLK_030_H 3 -1 5 1 5 -1 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 - 347 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 344 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 339 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 321 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 317 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 - 316 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 307 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 1 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 59 A_1_ 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 4 5 6 7 41 -1 1 0 21 - 79 RW_000 5 350 7 3 4 5 6 79 -1 4 0 21 - 70 RW 5 354 6 2 0 7 70 -1 2 0 21 - 68 A_0_ 5 346 6 2 2 3 68 -1 2 0 21 - 80 DSACK1 5 -1 7 2 5 6 80 -1 1 0 21 - 78 SIZE_1_ 5 345 7 1 2 78 -1 2 0 21 - 69 SIZE_0_ 5 355 6 1 2 69 -1 2 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 349 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 348 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 347 1 0 6 -1 9 0 21 - 82 BGACK_030 5 352 7 0 82 -1 3 0 21 - 34 VMA 5 353 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 351 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 31 UDS_000 0 3 0 31 -1 1 0 21 - 30 LDS_000 0 3 0 30 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 352 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 308 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 321 SM_AMIGA_6_ 3 -1 1 6 0 1 2 3 5 7 -1 -1 3 0 21 - 310 CLK_000_D_0_ 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 21 - 309 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 - 295 cpu_est_1_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 0 4 0 3 5 6 -1 -1 4 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 3 1 2 3 -1 -1 7 0 21 - 343 SM_AMIGA_i_7_ 3 -1 1 3 1 2 7 -1 -1 3 1 21 - 294 cpu_est_0_ 3 -1 3 3 0 3 5 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 9 0 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21 - 333 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 5 6 -1 -1 5 0 21 - 332 DMA_CYCLE_FINISHED_2_ 3 -1 6 2 5 6 -1 -1 5 0 21 - 331 DMA_CYCLE_FINISHED_3_ 3 -1 6 2 5 6 -1 -1 5 0 21 - 335 CYCLE_DMA_1_ 3 -1 6 2 5 6 -1 -1 4 0 21 - 328 DMA_CYCLE_FINISHED_6_ 3 -1 6 2 5 6 -1 -1 4 1 21 - 353 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 339 SM_AMIGA_5_ 3 -1 1 2 0 1 -1 -1 3 0 21 - 324 SM_AMIGA_0_ 3 -1 7 2 1 7 -1 -1 3 0 21 - 323 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21 - 319 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 - 318 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 6 2 5 6 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 - 349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 8 0 21 - 341 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 - 340 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 1 6 -1 -1 4 0 21 - 334 DMA_CYCLE_FINISHED_0_ 3 -1 5 1 5 -1 -1 4 0 21 - 330 DMA_CYCLE_FINISHED_4_ 3 -1 5 1 5 -1 -1 4 1 21 - 329 DMA_CYCLE_FINISHED_5_ 3 -1 6 1 6 -1 -1 4 1 21 - 325 RST_DLY_0_ 3 -1 3 1 3 -1 -1 4 0 21 - 322 SM_AMIGA_4_ 3 -1 0 1 0 -1 -1 3 0 21 - 355 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 - 354 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 346 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 327 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 326 RST_DLY_1_ 3 -1 3 1 3 -1 -1 2 1 21 - 320 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 317 CLK_000_D_4_ 3 -1 1 1 1 -1 -1 1 0 21 - 316 CLK_000_D_2_ 3 -1 7 1 2 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 307 inst_DTACK_D0 3 -1 2 1 0 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 2 1 1 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 59 A_1_ 1 -1 -1 1 2 59 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 - 79 RW_000 5 350 7 4 0 2 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 70 RW 5 354 6 2 2 7 70 -1 2 0 21 - 68 A_0_ 5 346 6 2 0 1 68 -1 2 0 21 - 80 DSACK1 5 -1 7 2 0 2 80 -1 1 0 21 - 78 SIZE_1_ 5 345 7 1 0 78 -1 2 0 21 - 69 SIZE_0_ 5 355 6 1 0 69 -1 2 0 21 - 40 BERR 5 -1 4 1 3 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 348 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 349 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 347 1 0 6 -1 9 0 21 - 82 BGACK_030 5 352 7 0 82 -1 3 0 21 - 34 VMA 5 353 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 351 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 31 UDS_000 0 3 0 31 -1 1 0 21 - 30 LDS_000 0 3 0 30 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 352 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 320 SM_AMIGA_6_ 3 -1 5 6 0 1 2 5 6 7 -1 -1 3 0 21 - 309 CLK_000_D_0_ 3 -1 6 6 1 2 3 5 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 3 6 1 2 3 5 6 7 -1 -1 1 0 21 - 321 SM_AMIGA_4_ 3 -1 1 3 1 2 3 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 3 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 6 0 21 - 341 SM_AMIGA_2_ 3 -1 3 2 3 6 -1 -1 5 0 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 2 2 0 2 -1 -1 4 0 21 - 335 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 4 0 21 - 332 DMA_CYCLE_FINISHED_1_ 3 -1 0 2 0 2 -1 -1 4 0 21 - 331 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 0 2 -1 -1 4 0 21 - 330 DMA_CYCLE_FINISHED_3_ 3 -1 2 2 0 2 -1 -1 4 0 21 - 328 DMA_CYCLE_FINISHED_5_ 3 -1 0 2 0 2 -1 -1 4 1 21 - 296 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 343 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 339 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 3 0 21 - 334 CYCLE_DMA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 6 2 5 6 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 2 2 1 6 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 1 2 1 2 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 5 2 2 5 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 - 349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 348 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 8 0 21 - 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 - 350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 336 inst_CLK_030_H 3 -1 0 1 0 -1 -1 4 1 21 - 333 DMA_CYCLE_FINISHED_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 329 DMA_CYCLE_FINISHED_4_ 3 -1 0 1 0 -1 -1 4 1 21 - 327 DMA_CYCLE_FINISHED_6_ 3 -1 0 1 0 -1 -1 4 1 21 - 324 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 - 353 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 355 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 - 354 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 346 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 326 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 325 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 - 316 CLK_000_D_4_ 3 -1 2 1 5 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 0 1 3 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 1 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 2 RESET 1 -1 -1 2 1 2 2 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 63 CLK_030 1 -1 -1 1 0 63 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -124 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 - 81 AS_030 5 -1 7 5 0 2 3 4 7 81 -1 1 0 21 - 79 RW_000 5 348 7 4 2 4 5 6 79 -1 4 0 21 - 70 RW 5 353 6 2 0 7 70 -1 2 0 21 - 80 DSACK1 5 -1 7 2 2 5 80 -1 1 0 21 - 78 SIZE_1_ 5 346 7 1 5 78 -1 2 0 21 - 69 SIZE_0_ 5 349 6 1 5 69 -1 2 0 21 - 68 A_0_ 5 354 6 1 5 68 -1 2 0 21 - 40 BERR 5 -1 4 1 3 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 356 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 355 1 0 6 -1 9 0 21 - 82 BGACK_030 5 351 7 0 82 -1 3 0 21 - 34 VMA 5 352 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 350 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 31 UDS_000 0 3 0 31 -1 1 0 21 - 30 LDS_000 0 3 0 30 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 351 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 308 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 6 7 -1 -1 1 0 21 - 309 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 6 7 -1 -1 1 0 21 - 321 SM_AMIGA_6_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21 - 301 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 7 0 21 - 336 CYCLE_DMA_1_ 3 -1 6 3 2 5 6 -1 -1 4 0 21 - 324 SM_AMIGA_0_ 3 -1 6 3 0 6 7 -1 -1 3 0 21 - 302 inst_BGACK_030_INT_D 3 -1 2 3 1 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 4 3 3 4 7 -1 -1 1 0 21 - 304 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 8 0 21 - 343 DMA_CYCLE_FINISHED_i_7_ 3 -1 2 2 2 5 -1 -1 7 0 21 - 333 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 2 5 -1 -1 7 0 21 - 332 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 2 5 -1 -1 7 0 21 - 331 DMA_CYCLE_FINISHED_3_ 3 -1 2 2 2 5 -1 -1 7 0 21 - 328 DMA_CYCLE_FINISHED_6_ 3 -1 5 2 2 5 -1 -1 7 0 21 - 303 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 6 0 21 - 342 SM_AMIGA_2_ 3 -1 3 2 0 3 -1 -1 5 0 21 - 295 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 - 344 SM_AMIGA_i_7_ 3 -1 0 2 0 7 -1 -1 3 1 21 - 335 CYCLE_DMA_0_ 3 -1 2 2 2 6 -1 -1 3 0 21 - 323 SM_AMIGA_1_ 3 -1 0 2 0 6 -1 -1 3 0 21 - 322 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 3 0 21 - 319 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 - 318 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21 - 339 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 338 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 - 320 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 6 2 0 6 -1 -1 1 0 21 - 297 inst_AS_000_D0 3 -1 4 2 2 5 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 - 356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 334 DMA_CYCLE_FINISHED_0_ 3 -1 5 1 5 -1 -1 8 0 21 - 330 DMA_CYCLE_FINISHED_4_ 3 -1 5 1 5 -1 -1 8 0 21 - 329 DMA_CYCLE_FINISHED_5_ 3 -1 2 1 2 -1 -1 8 0 21 - 337 inst_CLK_030_H 3 -1 5 1 5 -1 -1 7 0 21 - 341 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 - 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 325 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 - 352 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 340 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 - 354 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 - 353 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 350 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 349 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 - 346 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 - 345 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 327 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 326 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 - 317 CLK_000_D_4_ 3 -1 6 1 0 -1 -1 1 0 21 - 316 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 307 inst_DTACK_D0 3 -1 2 1 3 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 1 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 2 4 7 56 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 59 A_1_ 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 79 RW_000 5 348 7 4 0 2 4 6 79 -1 4 0 21 - 81 AS_030 5 -1 7 4 3 4 5 7 81 -1 1 0 21 - 70 RW 5 355 6 2 5 7 70 -1 2 0 21 - 68 A_0_ 5 351 6 2 2 6 68 -1 2 0 21 - 80 DSACK1 5 -1 7 2 0 2 80 -1 1 0 21 - 78 SIZE_1_ 5 345 7 1 6 78 -1 2 0 21 - 69 SIZE_0_ 5 346 6 1 6 69 -1 2 0 21 - 40 BERR 5 -1 4 1 3 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 - 82 BGACK_030 5 350 7 0 82 -1 3 0 21 - 34 VMA 5 354 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 349 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 31 UDS_000 0 3 0 31 -1 1 0 21 - 30 LDS_000 0 3 0 30 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 6 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 0 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 320 SM_AMIGA_6_ 3 -1 5 5 0 2 5 6 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 - 325 CYCLE_DMA_1_ 3 -1 1 3 0 1 2 -1 -1 4 0 21 - 324 CYCLE_DMA_0_ 3 -1 2 3 0 1 2 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 1 3 1 3 5 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 333 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 0 2 -1 -1 10 0 21 - 331 DMA_CYCLE_FINISHED_4_ 3 -1 2 2 0 2 -1 -1 10 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 - 334 DMA_CYCLE_FINISHED_1_ 3 -1 0 2 0 2 -1 -1 6 0 21 - 332 DMA_CYCLE_FINISHED_3_ 3 -1 2 2 0 2 -1 -1 6 0 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 6 0 21 - 341 SM_AMIGA_2_ 3 -1 3 2 1 3 -1 -1 5 0 21 - 296 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 343 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 339 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 6 2 1 6 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 7 2 6 7 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 1 2 3 5 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 - 335 DMA_CYCLE_FINISHED_0_ 3 -1 0 1 0 -1 -1 10 0 21 - 330 DMA_CYCLE_FINISHED_5_ 3 -1 2 1 2 -1 -1 10 0 21 - 329 DMA_CYCLE_FINISHED_6_ 3 -1 2 1 2 -1 -1 10 0 21 - 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 8 0 21 - 336 inst_CLK_030_H 3 -1 0 1 0 -1 -1 7 0 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 2 1 2 -1 -1 6 0 21 - 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 - 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 354 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 293 cpu_est_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 351 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 - 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 3 1 5 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 1 1 3 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 1 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 59 A_1_ 1 -1 -1 1 2 59 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 1 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 4 5 6 7 41 -1 1 0 21 - 79 RW_000 5 348 7 3 0 4 6 79 -1 4 0 21 - 70 RW 5 355 6 2 3 7 70 -1 2 0 21 - 80 DSACK1 5 -1 7 2 0 6 80 -1 1 0 21 - 78 SIZE_1_ 5 345 7 1 1 78 -1 2 0 21 - 69 SIZE_0_ 5 346 6 1 1 69 -1 2 0 21 - 68 A_0_ 5 351 6 1 1 68 -1 2 0 21 - 40 BERR 5 -1 4 1 3 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 - 82 BGACK_030 5 350 7 0 82 -1 3 0 21 - 34 VMA 5 354 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 349 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 31 UDS_000 0 3 0 31 -1 1 0 21 - 30 LDS_000 0 3 0 30 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 0 5 0 1 3 5 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 5 0 1 3 5 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 3 3 5 7 -1 -1 7 0 21 - 302 inst_AS_000_DMA 3 -1 0 3 0 6 7 -1 -1 6 0 21 - 324 CYCLE_DMA_0_ 3 -1 5 3 0 5 6 -1 -1 3 0 21 - 320 SM_AMIGA_6_ 3 -1 7 3 1 3 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 3 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 3 3 3 4 5 -1 -1 1 0 21 - 335 DMA_CYCLE_FINISHED_0_ 3 -1 0 2 0 6 -1 -1 10 0 21 - 333 DMA_CYCLE_FINISHED_2_ 3 -1 6 2 0 6 -1 -1 10 0 21 - 330 DMA_CYCLE_FINISHED_5_ 3 -1 0 2 0 6 -1 -1 10 0 21 - 303 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 8 0 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 2 0 6 -1 -1 6 0 21 - 334 DMA_CYCLE_FINISHED_1_ 3 -1 0 2 0 6 -1 -1 6 0 21 - 332 DMA_CYCLE_FINISHED_3_ 3 -1 0 2 0 6 -1 -1 6 0 21 - 341 SM_AMIGA_2_ 3 -1 3 2 1 3 -1 -1 5 0 21 - 326 RST_DLY_0_ 3 -1 0 2 0 1 -1 -1 4 0 21 - 325 CYCLE_DMA_1_ 3 -1 0 2 0 6 -1 -1 4 0 21 - 296 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 343 SM_AMIGA_i_7_ 3 -1 7 2 5 7 -1 -1 3 1 21 - 322 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 1 2 0 1 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 1 2 0 1 -1 -1 2 1 21 - 319 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 7 2 1 6 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 6 2 6 7 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 - 331 DMA_CYCLE_FINISHED_4_ 3 -1 0 1 0 -1 -1 10 0 21 - 329 DMA_CYCLE_FINISHED_6_ 3 -1 0 1 0 -1 -1 10 0 21 - 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 336 inst_CLK_030_H 3 -1 6 1 6 -1 -1 7 0 21 - 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 - 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 354 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 339 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 3 1 3 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 351 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 - 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 7 1 7 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 0 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 6 1 3 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 0 1 7 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 0 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 63 CLK_030 1 -1 -1 2 0 6 63 -1 - 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A_1_ 1 -1 -1 1 5 59 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 1 2 3 4 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 2 4 6 7 41 -1 1 0 21 - 79 RW_000 5 348 7 4 0 2 4 6 79 -1 4 0 21 - 70 RW 5 355 6 2 2 7 70 -1 2 0 21 - 68 A_0_ 5 351 6 2 3 5 68 -1 2 0 21 - 80 DSACK1 5 -1 7 2 0 6 80 -1 1 0 21 - 78 SIZE_1_ 5 345 7 1 5 78 -1 2 0 21 - 69 SIZE_0_ 5 346 6 1 5 69 -1 2 0 21 - 40 BERR 5 -1 4 1 5 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 - 82 BGACK_030 5 350 7 0 82 -1 3 0 21 - 34 VMA 5 354 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 349 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 31 UDS_000 0 3 0 31 -1 1 0 21 - 30 LDS_000 0 3 0 30 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 1 6 0 1 2 3 5 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 - 320 SM_AMIGA_6_ 3 -1 7 5 1 2 3 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 4 0 5 6 7 -1 -1 1 0 21 - 333 DMA_CYCLE_FINISHED_2_ 3 -1 6 3 0 2 6 -1 -1 10 0 21 - 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 7 -1 -1 7 0 21 - 334 DMA_CYCLE_FINISHED_1_ 3 -1 0 3 0 2 6 -1 -1 6 0 21 - 332 DMA_CYCLE_FINISHED_3_ 3 -1 6 3 0 2 6 -1 -1 6 0 21 - 325 CYCLE_DMA_1_ 3 -1 2 3 0 2 6 -1 -1 4 0 21 - 296 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 324 CYCLE_DMA_0_ 3 -1 0 3 0 2 6 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 3 3 2 3 5 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 1 3 1 3 5 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 3 3 0 3 4 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21 - 335 DMA_CYCLE_FINISHED_0_ 3 -1 0 2 0 2 -1 -1 10 0 21 - 331 DMA_CYCLE_FINISHED_4_ 3 -1 6 2 0 6 -1 -1 10 0 21 - 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 8 0 21 - 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 6 0 21 - 326 RST_DLY_0_ 3 -1 1 2 1 5 -1 -1 4 0 21 - 354 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 343 SM_AMIGA_i_7_ 3 -1 7 2 0 7 -1 -1 3 1 21 - 339 SM_AMIGA_5_ 3 -1 7 2 3 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 5 2 1 5 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 1 2 1 5 -1 -1 2 1 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 - 330 DMA_CYCLE_FINISHED_5_ 3 -1 6 1 6 -1 -1 10 0 21 - 329 DMA_CYCLE_FINISHED_6_ 3 -1 6 1 6 -1 -1 10 0 21 - 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 336 inst_CLK_030_H 3 -1 2 1 2 -1 -1 7 0 21 - 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 1 6 -1 -1 6 0 21 - 341 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 - 340 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 323 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21 - 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 351 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 - 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 337 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 7 1 7 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 3 1 3 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 3 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 63 CLK_030 1 -1 -1 1 2 63 -1 - 59 A_1_ 1 -1 -1 1 5 59 -1 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 10 CLK_000 1 -1 -1 1 1 10 -1 121 "number of signals after reading design file" @@ -6221,15 +133,17 @@ "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 81 AS_030 5 -1 7 5 3 4 5 6 7 81 -1 1 0 21 - 79 RW_000 5 345 7 4 0 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 6 1 3 4 5 6 7 81 -1 1 0 21 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 70 RW 5 350 6 2 3 7 70 -1 2 0 21 - 78 SIZE_1_ 5 343 7 1 3 78 -1 2 0 21 - 69 SIZE_0_ 5 346 6 1 3 69 -1 2 0 21 - 68 A_0_ 5 351 6 1 3 68 -1 2 0 21 - 80 DSACK1 5 -1 7 1 2 80 -1 1 0 21 + 79 RW_000 5 344 7 3 2 4 6 79 -1 4 0 21 + 68 A_0_ 5 347 6 2 1 2 68 -1 3 0 21 + 70 RW 5 351 6 2 1 7 70 -1 2 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 342 7 1 2 78 -1 3 0 21 + 69 SIZE_0_ 5 352 6 1 2 69 -1 3 0 21 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 29 DTACK 5 -1 3 1 0 29 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 @@ -6238,9 +152,260 @@ 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 344 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 + 8 IPL_030_2_ 5 343 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 349 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 348 1 0 6 -1 10 0 21 + 82 BGACK_030 5 346 7 0 82 -1 3 0 21 + 34 VMA 5 350 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 345 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 346 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 312 CLK_000_D_0_ 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 21 + 311 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 + 308 inst_RESET_OUT 3 -1 6 5 0 3 4 6 7 -1 -1 2 0 21 + 324 SM_AMIGA_6_ 3 -1 5 4 1 2 5 7 -1 -1 3 0 21 + 302 inst_BGACK_030_INT_D 3 -1 7 4 2 5 6 7 -1 -1 1 0 21 + 296 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 326 SM_AMIGA_1_ 3 -1 0 3 0 5 6 -1 -1 3 0 21 + 325 SM_AMIGA_4_ 3 -1 6 3 0 1 6 -1 -1 3 0 21 + 340 CLK_OUT_INTreg 3 -1 2 3 1 2 6 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 + 304 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 301 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 303 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 6 0 21 + 328 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 4 0 21 + 350 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 339 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 336 SM_AMIGA_5_ 3 -1 5 2 5 6 -1 -1 3 0 21 + 327 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 322 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 + 321 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 335 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 334 inst_DSACK1_INT 3 -1 6 2 6 7 -1 -1 2 0 21 + 329 CYCLE_DMA_1_ 3 -1 0 2 0 2 -1 -1 2 0 21 + 323 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 314 inst_DTACK_DMA 3 -1 0 2 0 3 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 + 305 inst_VPA_D 3 -1 1 2 0 3 -1 -1 1 0 21 + 349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 348 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 330 CLK_030_PE_0_ 3 -1 2 1 2 -1 -1 9 0 21 + 309 CLK_030_PE_1_ 3 -1 2 1 2 -1 -1 6 0 21 + 338 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 + 337 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 344 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 331 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 352 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 347 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 342 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 351 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 345 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 341 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 333 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 332 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 310 inst_AMIGA_DS 3 -1 6 1 2 -1 -1 2 0 21 + 300 inst_AS_030_D1 3 -1 5 1 5 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 320 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 + 319 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21 + 318 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 317 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 316 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 + 315 inst_CLK_OUT_PRE_D 3 -1 4 1 2 -1 -1 1 0 21 + 313 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 307 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 + 306 CLK_000_D_3_ 3 -1 3 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 59 A_1_ 1 -1 -1 2 2 5 59 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 2 RESET 1 -1 -1 2 1 2 2 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 2 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +120 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 79 RW_000 5 344 7 3 2 4 6 79 -1 4 0 21 + 70 RW 5 351 6 2 2 7 70 -1 2 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 342 7 1 1 78 -1 3 0 21 + 69 SIZE_0_ 5 352 6 1 1 69 -1 3 0 21 + 68 A_0_ 5 345 6 1 1 68 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 29 DTACK 5 -1 3 1 0 29 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 343 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 + 82 BGACK_030 5 349 7 0 82 -1 3 0 21 + 34 VMA 5 350 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 348 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 349 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 313 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 312 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 325 SM_AMIGA_6_ 3 -1 5 5 0 1 2 5 7 -1 -1 3 0 21 + 309 inst_RESET_OUT 3 -1 6 4 3 4 6 7 -1 -1 2 0 21 + 297 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 327 SM_AMIGA_1_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 + 326 SM_AMIGA_4_ 3 -1 1 3 0 1 2 -1 -1 3 0 21 + 341 CLK_OUT_INTreg 3 -1 7 3 1 2 6 -1 -1 1 0 21 + 303 inst_BGACK_030_INT_D 3 -1 4 3 5 6 7 -1 -1 1 0 21 + 300 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 305 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 302 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 304 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 6 0 21 + 329 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 4 0 21 + 350 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 340 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 337 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 3 0 21 + 328 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 324 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 323 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 336 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 335 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 + 330 CYCLE_DMA_1_ 3 -1 0 2 0 2 -1 -1 2 0 21 + 322 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 315 inst_DTACK_DMA 3 -1 0 2 0 3 -1 -1 2 0 21 + 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 316 inst_CLK_OUT_PRE_D 3 -1 6 2 2 7 -1 -1 1 0 21 + 314 inst_CLK_OUT_PRE_50 3 -1 1 2 1 6 -1 -1 1 0 21 + 306 inst_VPA_D 3 -1 5 2 0 3 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 331 CLK_030_PE_0_ 3 -1 2 1 2 -1 -1 9 0 21 + 310 CLK_030_PE_1_ 3 -1 2 1 2 -1 -1 6 0 21 + 339 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 + 338 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 344 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 332 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 352 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 342 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 351 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 334 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 333 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 311 inst_AMIGA_DS 3 -1 7 1 2 -1 -1 2 0 21 + 301 inst_AS_030_D1 3 -1 5 1 5 -1 -1 2 0 21 + 293 N_266_0 3 -1 4 1 4 -1 -1 2 0 21 + 321 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 + 320 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21 + 319 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 318 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 + 317 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 + 308 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 + 307 CLK_000_D_3_ 3 -1 3 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 5 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 + 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 63 CLK_030 1 -1 -1 1 2 63 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 +119 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 79 RW_000 5 346 7 3 0 4 6 79 -1 4 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 70 RW 5 350 6 2 5 7 70 -1 2 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 341 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 351 6 1 5 69 -1 3 0 21 + 68 A_0_ 5 342 6 1 5 68 -1 3 0 21 + 40 BERR 5 -1 4 1 1 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 343 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 345 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 344 1 0 6 -1 10 0 21 82 BGACK_030 5 348 7 0 82 -1 3 0 21 34 VMA 5 349 3 0 34 -1 3 0 21 65 E 0 6 0 65 -1 2 0 21 @@ -6249,260 +414,6 @@ 28 BG_000 5 347 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 31 UDS_000 0 3 0 31 -1 1 0 21 - 30 LDS_000 0 3 0 30 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 348 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 6 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 5 4 3 5 6 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 - 296 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 325 SM_AMIGA_0_ 3 -1 2 3 2 5 7 -1 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 1 3 1 2 6 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 6 0 21 - 340 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 5 0 21 - 318 DMA_CYCLE_FINISHED_5_ 3 -1 2 2 0 2 -1 -1 5 0 21 - 317 CYCLE_DMA_1_ 3 -1 0 2 0 2 -1 -1 4 0 21 - 349 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 341 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 338 SM_AMIGA_5_ 3 -1 7 2 1 7 -1 -1 3 0 21 - 326 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21 - 332 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 331 inst_DSACK1_INT 3 -1 6 2 6 7 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 6 2 1 6 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 0 2 0 6 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 1 2 5 6 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 337 DMA_CYCLE_FINISHED_4_ 3 -1 2 1 2 -1 -1 6 0 21 - 336 DMA_CYCLE_FINISHED_3_ 3 -1 2 1 2 -1 -1 6 0 21 - 335 DMA_CYCLE_FINISHED_2_ 3 -1 2 1 2 -1 -1 6 0 21 - 334 DMA_CYCLE_FINISHED_1_ 3 -1 2 1 2 -1 -1 6 0 21 - 333 DMA_CYCLE_FINISHED_0_ 3 -1 2 1 2 -1 -1 6 0 21 - 330 inst_CLK_030_H 3 -1 0 1 0 -1 -1 6 0 21 - 339 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 5 0 21 - 345 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 327 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 - 320 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 - 351 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 - 350 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 347 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 - 343 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 - 342 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 329 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 328 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 - 321 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 6 1 5 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 7 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 5 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 7 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 59 A_1_ 1 -1 -1 2 2 5 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 5 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -121 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 79 RW_000 5 348 7 4 0 2 4 6 79 -1 4 0 21 - 81 AS_030 5 -1 7 4 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 4 0 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 4 0 2 6 7 30 -1 1 0 21 - 68 A_0_ 5 343 6 2 0 6 68 -1 3 0 21 - 70 RW 5 353 6 2 5 7 70 -1 2 0 21 - 78 SIZE_1_ 5 345 7 1 0 78 -1 3 0 21 - 69 SIZE_0_ 5 351 6 1 0 69 -1 3 0 21 - 80 DSACK1 5 -1 7 1 2 80 -1 1 0 21 - 40 BERR 5 -1 4 1 3 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 346 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 344 1 0 6 -1 9 0 21 - 82 BGACK_030 5 350 7 0 82 -1 3 0 21 - 34 VMA 5 352 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 349 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 322 SM_AMIGA_6_ 3 -1 1 6 0 1 2 5 6 7 -1 -1 3 0 21 - 309 CLK_000_D_0_ 3 -1 6 6 1 2 3 5 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 3 1 3 5 -1 -1 7 0 21 - 341 SM_AMIGA_i_7_ 3 -1 1 3 1 5 7 -1 -1 3 1 21 - 323 SM_AMIGA_4_ 3 -1 6 3 3 5 6 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 334 DMA_CYCLE_FINISHED_1_ 3 -1 2 2 0 2 -1 -1 10 0 21 - 318 DMA_CYCLE_FINISHED_5_ 3 -1 0 2 0 2 -1 -1 9 0 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 6 0 21 - 340 SM_AMIGA_2_ 3 -1 3 2 1 3 -1 -1 5 0 21 - 317 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 4 0 21 - 296 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 338 SM_AMIGA_5_ 3 -1 2 2 2 6 -1 -1 3 0 21 - 326 CYCLE_DMA_0_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 325 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 1 2 1 5 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21 - 332 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 331 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 321 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 3 2 3 5 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 - 337 DMA_CYCLE_FINISHED_4_ 3 -1 0 1 0 -1 -1 10 0 21 - 336 DMA_CYCLE_FINISHED_3_ 3 -1 0 1 0 -1 -1 10 0 21 - 335 DMA_CYCLE_FINISHED_2_ 3 -1 0 1 0 -1 -1 10 0 21 - 333 DMA_CYCLE_FINISHED_0_ 3 -1 2 1 2 -1 -1 10 0 21 - 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 346 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 344 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 8 0 21 - 330 inst_CLK_030_H 3 -1 0 1 0 -1 -1 7 0 21 - 339 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 - 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 327 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 - 352 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 351 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 343 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 353 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 342 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 329 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 328 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 1 1 1 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 0 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 2 1 3 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 0 1 1 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 5 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 59 A_1_ 1 -1 -1 1 2 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -114 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 3 4 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 0 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 - 70 RW 5 344 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 1 78 -1 3 0 21 - 69 SIZE_0_ 5 342 6 1 1 69 -1 3 0 21 - 68 A_0_ 5 345 6 1 1 68 -1 3 0 21 - 40 BERR 5 -1 4 1 2 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 - 82 BGACK_030 5 341 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 80 DSACK1 0 7 0 80 -1 1 0 21 77 FPU_CS 0 7 0 77 -1 1 0 21 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 @@ -6510,428 +421,321 @@ 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 308 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 309 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 5 5 0 1 2 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 4 0 5 6 7 -1 -1 1 0 21 - 324 SM_AMIGA_1_ 3 -1 2 3 0 2 5 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 - 295 cpu_est_1_ 3 -1 3 2 2 3 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 3 2 2 3 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 335 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 332 SM_AMIGA_5_ 3 -1 2 2 2 6 -1 -1 3 0 21 - 325 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 6 2 2 6 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 - 321 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 6 2 2 3 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 2 2 3 -1 -1 1 1 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 329 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 8 0 21 - 334 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 318 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 317 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 - 316 CLK_000_D_2_ 3 -1 5 1 0 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 307 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 59 A_1_ 1 -1 -1 2 0 6 59 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 -115 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 1 4 5 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 - 70 RW 5 344 6 2 5 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 342 6 1 5 69 -1 3 0 21 - 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 - 82 BGACK_030 5 341 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 - 320 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 - 296 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 324 CYCLE_DMA_0_ 3 -1 5 3 0 1 5 -1 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 0 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 8 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 - 302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 6 0 21 - 326 RST_DLY_0_ 3 -1 5 2 3 5 -1 -1 4 0 21 - 325 CYCLE_DMA_1_ 3 -1 0 2 0 1 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 322 SM_AMIGA_1_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 7 2 4 7 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 5 2 3 5 -1 -1 2 1 21 - 319 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 4 1 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 N_67 3 -1 4 1 4 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 6 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 1 63 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -115 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 - 70 RW 5 344 6 2 5 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 342 6 1 5 69 -1 3 0 21 - 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 - 82 BGACK_030 5 341 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 307 inst_RESET_OUT 3 -1 5 8 0 1 2 3 4 5 6 7 -1 -1 2 0 21 - 341 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 308 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 4 5 7 -1 -1 1 0 21 - 309 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 - 320 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 - 296 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 7 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 5 0 21 - 326 RST_DLY_0_ 3 -1 5 2 3 5 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 324 CYCLE_DMA_0_ 3 -1 0 2 0 1 -1 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 2 2 2 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 0 2 0 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 7 2 4 7 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 3 2 3 5 -1 -1 2 1 21 - 319 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 6 2 5 6 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 6 2 2 7 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 6 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 325 CYCLE_DMA_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 7 1 2 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 4 1 6 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 59 A_1_ 1 -1 -1 2 2 6 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 1 63 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -116 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 1 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21 - 79 RW_000 5 343 7 3 0 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 - 70 RW 5 348 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 338 7 1 3 78 -1 3 0 21 - 69 SIZE_0_ 5 346 6 1 3 69 -1 3 0 21 - 68 A_0_ 5 339 6 1 3 68 -1 3 0 21 - 40 BERR 5 -1 4 1 2 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 342 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 341 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 340 1 0 6 -1 9 0 21 - 82 BGACK_030 5 345 7 0 82 -1 3 0 21 - 34 VMA 5 347 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 344 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 345 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 320 SM_AMIGA_6_ 3 -1 5 5 1 2 3 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 4 0 5 6 7 -1 -1 1 0 21 - 328 RST_DLY_0_ 3 -1 2 3 0 1 2 -1 -1 4 0 21 - 295 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 293 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 - 323 SM_AMIGA_0_ 3 -1 1 3 1 5 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 5 3 1 3 5 -1 -1 3 0 21 - 296 cpu_est_0_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 330 RST_DLY_2_ 3 -1 2 3 0 1 2 -1 -1 2 0 21 - 329 RST_DLY_1_ 3 -1 1 3 0 1 2 -1 -1 2 1 21 - 311 inst_CLK_OUT_PRE_D 3 -1 5 3 0 1 6 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 1 1 21 - 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 - 335 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 5 0 21 - 347 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 336 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 333 SM_AMIGA_5_ 3 -1 1 2 1 6 -1 -1 3 0 21 - 324 CYCLE_DMA_0_ 3 -1 6 2 0 6 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 6 2 2 6 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 332 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 331 inst_DSACK1_INT 3 -1 3 2 3 7 -1 -1 2 0 21 + 348 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 312 CLK_000_D_0_ 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21 + 311 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 + 302 inst_BGACK_030_INT_D 3 -1 4 4 0 2 6 7 -1 -1 1 0 21 + 301 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 7 0 21 + 295 cpu_est_3_ 3 -1 3 3 1 3 6 -1 -1 4 0 21 + 293 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21 + 338 SM_AMIGA_i_7_ 3 -1 5 3 2 5 7 -1 -1 3 1 21 + 324 SM_AMIGA_4_ 3 -1 6 3 1 5 6 -1 -1 3 0 21 + 323 SM_AMIGA_6_ 3 -1 5 3 5 6 7 -1 -1 3 0 21 + 296 cpu_est_0_ 3 -1 5 3 1 3 5 -1 -1 3 0 21 + 308 inst_RESET_OUT 3 -1 3 3 3 4 7 -1 -1 2 0 21 + 339 CLK_OUT_INTreg 3 -1 7 3 0 1 6 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21 + 294 cpu_est_2_ 3 -1 3 3 1 3 6 -1 -1 1 1 21 + 337 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 5 0 21 + 349 RN_VMA 3 34 3 2 1 3 34 -1 3 0 21 + 326 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 325 SM_AMIGA_1_ 3 -1 6 2 5 6 -1 -1 3 0 21 + 321 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 320 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 334 inst_AS_000_INT 3 -1 7 2 4 7 -1 -1 2 0 21 + 333 inst_DSACK1_INT 3 -1 6 2 6 7 -1 -1 2 0 21 + 322 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 305 CLK_000_D_3_ 3 -1 5 2 5 6 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 5 2 2 3 -1 -1 1 0 21 - 342 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 341 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 340 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 327 CLK_030_PE_1_ 3 -1 0 1 0 -1 -1 7 0 21 - 326 CLK_030_PE_0_ 3 -1 0 1 0 -1 -1 7 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 6 0 21 - 334 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 343 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 325 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 339 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 338 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 - 348 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 344 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 337 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 6 1 5 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 5 1 5 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 2 1 2 -1 -1 1 0 21 + 314 inst_CLK_OUT_PRE_D 3 -1 2 2 0 7 -1 -1 1 0 21 + 313 inst_CLK_OUT_PRE_50 3 -1 0 2 0 2 -1 -1 1 0 21 + 305 inst_VPA_D 3 -1 0 2 1 3 -1 -1 1 0 21 + 345 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 344 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 329 CLK_030_PE_0_ 3 -1 0 1 0 -1 -1 9 0 21 + 304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 + 309 CLK_030_PE_1_ 3 -1 0 1 0 -1 -1 6 0 21 + 303 inst_AS_000_DMA 3 -1 0 1 0 -1 -1 6 0 21 + 336 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21 + 346 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 330 RST_DLY_0_ 3 -1 3 1 3 -1 -1 4 0 21 + 327 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 4 0 21 + 351 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 342 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 341 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 335 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 3 0 21 + 350 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 347 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 340 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 332 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 + 331 RST_DLY_1_ 3 -1 3 1 3 -1 -1 2 1 21 + 328 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 2 0 21 + 310 inst_AMIGA_DS 3 -1 7 1 0 -1 -1 2 0 21 + 300 inst_AS_030_D1 3 -1 2 1 2 -1 -1 2 0 21 + 319 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 + 318 CLK_000_D_2_ 3 -1 1 1 2 -1 -1 1 0 21 + 317 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 316 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 315 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 + 307 inst_DTACK_D0 3 -1 6 1 1 -1 -1 1 0 21 + 306 CLK_000_D_3_ 3 -1 2 1 5 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 81 AS_030 1 -1 -1 6 2 3 4 5 6 7 81 -1 + 13 nEXP_SPACE 1 -1 -1 5 2 3 4 5 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 59 A_1_ 1 -1 -1 1 0 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +119 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 79 RW_000 5 346 7 3 0 4 6 79 -1 4 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 70 RW 5 350 6 2 5 7 70 -1 2 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 341 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 351 6 1 5 69 -1 3 0 21 + 68 A_0_ 5 342 6 1 5 68 -1 3 0 21 + 40 BERR 5 -1 4 1 1 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 343 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 345 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 344 1 0 6 -1 10 0 21 + 82 BGACK_030 5 348 7 0 82 -1 3 0 21 + 34 VMA 5 349 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 347 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 348 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 312 CLK_000_D_0_ 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21 + 311 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 + 302 inst_BGACK_030_INT_D 3 -1 4 4 0 2 6 7 -1 -1 1 0 21 + 301 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 7 0 21 + 295 cpu_est_3_ 3 -1 3 3 1 3 6 -1 -1 4 0 21 + 293 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21 + 338 SM_AMIGA_i_7_ 3 -1 5 3 2 5 7 -1 -1 3 1 21 + 324 SM_AMIGA_4_ 3 -1 6 3 1 5 6 -1 -1 3 0 21 + 323 SM_AMIGA_6_ 3 -1 5 3 5 6 7 -1 -1 3 0 21 + 296 cpu_est_0_ 3 -1 5 3 1 3 5 -1 -1 3 0 21 + 308 inst_RESET_OUT 3 -1 3 3 3 4 7 -1 -1 2 0 21 + 339 CLK_OUT_INTreg 3 -1 7 3 0 1 6 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21 + 294 cpu_est_2_ 3 -1 3 3 1 3 6 -1 -1 1 1 21 + 337 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 5 0 21 + 349 RN_VMA 3 34 3 2 1 3 34 -1 3 0 21 + 326 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 325 SM_AMIGA_1_ 3 -1 6 2 5 6 -1 -1 3 0 21 + 321 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 320 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 334 inst_AS_000_INT 3 -1 7 2 4 7 -1 -1 2 0 21 + 333 inst_DSACK1_INT 3 -1 6 2 6 7 -1 -1 2 0 21 + 322 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 + 314 inst_CLK_OUT_PRE_D 3 -1 2 2 0 7 -1 -1 1 0 21 + 313 inst_CLK_OUT_PRE_50 3 -1 0 2 0 2 -1 -1 1 0 21 + 305 inst_VPA_D 3 -1 0 2 1 3 -1 -1 1 0 21 + 345 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 344 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 329 CLK_030_PE_0_ 3 -1 0 1 0 -1 -1 9 0 21 + 304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 + 309 CLK_030_PE_1_ 3 -1 0 1 0 -1 -1 6 0 21 + 303 inst_AS_000_DMA 3 -1 0 1 0 -1 -1 6 0 21 + 336 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21 + 346 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 330 RST_DLY_0_ 3 -1 3 1 3 -1 -1 4 0 21 + 327 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 4 0 21 + 351 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 342 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 341 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 335 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 3 0 21 + 350 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 347 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 340 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 332 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 + 331 RST_DLY_1_ 3 -1 3 1 3 -1 -1 2 1 21 + 328 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 2 0 21 + 310 inst_AMIGA_DS 3 -1 7 1 0 -1 -1 2 0 21 + 300 inst_AS_030_D1 3 -1 2 1 2 -1 -1 2 0 21 + 319 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 + 318 CLK_000_D_2_ 3 -1 1 1 2 -1 -1 1 0 21 + 317 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 316 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 315 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 + 307 inst_DTACK_D0 3 -1 6 1 1 -1 -1 1 0 21 + 306 CLK_000_D_3_ 3 -1 2 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 81 AS_030 1 -1 -1 6 2 3 4 5 6 7 81 -1 + 13 nEXP_SPACE 1 -1 -1 5 2 3 4 5 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 59 A_1_ 1 -1 -1 1 0 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +120 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 79 RW_000 5 346 7 3 2 4 6 79 -1 4 0 21 + 70 RW 5 351 6 2 2 7 70 -1 2 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 342 7 1 1 78 -1 3 0 21 + 69 SIZE_0_ 5 352 6 1 1 69 -1 3 0 21 + 68 A_0_ 5 344 6 1 1 68 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 29 DTACK 5 -1 3 1 0 29 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 343 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 345 1 0 6 -1 10 0 21 + 82 BGACK_030 5 349 7 0 82 -1 3 0 21 + 34 VMA 5 350 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 348 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 349 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 312 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 311 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 324 SM_AMIGA_6_ 3 -1 5 5 0 1 2 5 7 -1 -1 3 0 21 + 308 inst_RESET_OUT 3 -1 6 4 3 4 6 7 -1 -1 2 0 21 + 296 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 326 SM_AMIGA_1_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 + 325 SM_AMIGA_4_ 3 -1 1 3 0 1 2 -1 -1 3 0 21 + 340 CLK_OUT_INTreg 3 -1 7 3 1 2 6 -1 -1 1 0 21 + 302 inst_BGACK_030_INT_D 3 -1 4 3 5 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 304 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 301 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 303 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 6 0 21 + 328 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 4 0 21 + 350 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 339 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 336 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 3 0 21 + 327 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 323 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 322 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 314 inst_DTACK_DMA 3 -1 0 2 0 3 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 335 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 334 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 + 329 CYCLE_DMA_1_ 3 -1 0 2 0 2 -1 -1 2 0 21 + 321 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 315 inst_CLK_OUT_PRE_D 3 -1 6 2 2 7 -1 -1 1 0 21 + 313 inst_CLK_OUT_PRE_50 3 -1 1 2 1 6 -1 -1 1 0 21 + 305 inst_VPA_D 3 -1 5 2 0 3 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 345 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 330 CLK_030_PE_0_ 3 -1 2 1 2 -1 -1 9 0 21 + 309 CLK_030_PE_1_ 3 -1 2 1 2 -1 -1 6 0 21 + 338 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 + 337 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 346 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 331 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 352 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 344 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 342 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 351 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 341 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 333 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 332 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 310 inst_AMIGA_DS 3 -1 7 1 2 -1 -1 2 0 21 + 300 inst_AS_030_D1 3 -1 5 1 5 -1 -1 2 0 21 + 320 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 + 319 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21 + 318 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 317 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 + 316 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 + 307 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 + 306 CLK_000_D_3_ 3 -1 3 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 5 7 13 -1 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 @@ -6940,35 +744,35 @@ 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 59 A_1_ 1 -1 -1 1 0 59 -1 + 63 CLK_030 1 -1 -1 1 2 63 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 7 10 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 116 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 81 AS_030 5 -1 7 5 1 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 2 4 6 7 41 -1 1 0 21 - 79 RW_000 5 343 7 3 0 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 - 68 A_0_ 5 339 6 2 0 3 68 -1 3 0 21 - 70 RW 5 348 6 2 1 7 70 -1 2 0 21 - 78 SIZE_1_ 5 338 7 1 0 78 -1 3 0 21 - 69 SIZE_0_ 5 346 6 1 0 69 -1 3 0 21 - 40 BERR 5 -1 4 1 2 40 -1 1 0 21 + 81 AS_030 5 -1 7 6 2 3 4 5 6 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 1 4 5 7 41 -1 1 0 21 + 79 RW_000 5 343 7 3 1 4 6 79 -1 4 0 21 + 70 RW 5 -1 6 2 6 7 70 -1 1 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 5 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 5 69 -1 2 0 21 + 68 A_0_ 5 -1 6 1 5 68 -1 2 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 29 DTACK 5 -1 3 1 3 29 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 @@ -6977,11 +781,11 @@ 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 342 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 341 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 340 1 0 6 -1 9 0 21 + 8 IPL_030_2_ 5 342 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 348 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 347 1 0 6 -1 10 0 21 82 BGACK_030 5 345 7 0 82 -1 3 0 21 - 34 VMA 5 347 3 0 34 -1 3 0 21 + 34 VMA 5 346 3 0 34 -1 3 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 @@ -6996,70 +800,70 @@ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 345 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 0 6 1 2 3 5 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21 - 320 SM_AMIGA_6_ 3 -1 5 5 0 1 3 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 - 295 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 293 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 324 CYCLE_DMA_0_ 3 -1 6 3 0 2 6 -1 -1 3 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 0 3 0 1 6 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 1 1 21 - 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 - 335 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 5 0 21 - 325 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 4 0 21 - 347 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 336 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 323 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 1 2 1 2 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 296 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 3 0 21 - 332 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 3 2 0 3 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 3 2 2 3 -1 -1 1 0 21 - 342 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 341 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 340 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 327 CLK_030_PE_1_ 3 -1 0 1 0 -1 -1 7 0 21 - 326 CLK_030_PE_0_ 3 -1 0 1 0 -1 -1 7 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 6 0 21 - 334 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 + 311 CLK_000_D_0_ 3 -1 2 6 0 2 3 5 6 7 -1 -1 1 0 21 + 310 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 + 324 SM_AMIGA_6_ 3 -1 2 4 2 5 6 7 -1 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 6 4 3 4 6 7 -1 -1 2 0 21 + 295 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 293 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 327 SM_AMIGA_0_ 3 -1 0 3 0 2 7 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 6 -1 -1 1 0 21 + 294 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21 + 301 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 + 302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 6 0 21 + 331 RST_DLY_0_ 3 -1 0 2 0 6 -1 -1 4 0 21 + 328 CYCLE_DMA_0_ 3 -1 5 2 1 5 -1 -1 4 0 21 + 346 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 339 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 + 326 SM_AMIGA_1_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 325 SM_AMIGA_4_ 3 -1 6 2 0 6 -1 -1 3 0 21 + 322 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 321 inst_DS_000_ENABLE 3 -1 6 2 3 6 -1 -1 3 0 21 + 313 inst_DTACK_DMA 3 -1 5 2 3 5 -1 -1 3 0 21 + 296 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 335 inst_AS_000_INT 3 -1 7 2 4 7 -1 -1 2 0 21 + 334 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 + 333 RST_DLY_2_ 3 -1 0 2 0 6 -1 -1 2 0 21 + 332 RST_DLY_1_ 3 -1 6 2 0 6 -1 -1 2 1 21 + 329 CYCLE_DMA_1_ 3 -1 5 2 1 5 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 300 inst_AS_030_D1 3 -1 6 2 2 6 -1 -1 2 0 21 + 340 CLK_OUT_INTreg 3 -1 0 2 1 6 -1 -1 1 0 21 + 314 inst_CLK_OUT_PRE_D 3 -1 3 2 0 1 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 5 2 2 4 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 + 348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 342 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 330 CLK_030_PE_0_ 3 -1 1 1 1 -1 -1 9 0 21 + 308 CLK_030_PE_1_ 3 -1 1 1 1 -1 -1 6 0 21 + 338 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 + 337 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 343 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 328 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 339 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 338 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 333 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 3 0 21 - 348 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 336 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 3 0 21 344 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 337 N_81 3 -1 4 1 4 -1 -1 2 0 21 - 331 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 330 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 329 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 5 1 0 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 5 1 2 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21 + 341 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 309 inst_AMIGA_DS 3 -1 7 1 1 -1 -1 2 0 21 + 323 inst_BGACK_030_INT_D 3 -1 7 1 2 -1 -1 1 0 21 + 319 CLK_000_D_4_ 3 -1 4 1 2 -1 -1 1 0 21 + 318 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 317 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 + 316 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 315 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 + 312 inst_CLK_OUT_PRE_50 3 -1 3 1 3 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 3 1 0 -1 -1 1 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 1 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 1 3 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 13 nEXP_SPACE 1 -1 -1 5 2 3 4 5 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 @@ -7068,150 +872,27 @@ 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 + 63 CLK_030 1 -1 -1 1 1 63 -1 59 A_1_ 1 -1 -1 1 2 59 -1 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 5 29 -1 + 35 VPA 1 -1 -1 1 0 35 -1 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 -116 "number of signals after reading design file" + 10 CLK_000 1 -1 -1 1 2 10 -1 +115 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 81 AS_030 5 -1 7 5 1 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 2 4 6 7 41 -1 1 0 21 - 79 RW_000 5 343 7 3 0 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 - 68 A_0_ 5 339 6 2 0 3 68 -1 3 0 21 - 70 RW 5 348 6 2 1 7 70 -1 2 0 21 - 78 SIZE_1_ 5 338 7 1 0 78 -1 3 0 21 - 69 SIZE_0_ 5 346 6 1 0 69 -1 3 0 21 - 40 BERR 5 -1 4 1 2 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 342 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 341 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 340 1 0 6 -1 9 0 21 - 82 BGACK_030 5 345 7 0 82 -1 3 0 21 - 34 VMA 5 347 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 344 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 345 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 0 6 1 2 3 5 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21 - 320 SM_AMIGA_6_ 3 -1 5 5 0 1 3 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 - 295 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 293 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 324 CYCLE_DMA_0_ 3 -1 6 3 0 2 6 -1 -1 3 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 0 3 0 1 6 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 1 1 21 - 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 - 335 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 5 0 21 - 325 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 4 0 21 - 347 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 336 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 323 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 1 2 1 2 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 296 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 3 0 21 - 332 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 3 2 0 3 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 3 2 2 3 -1 -1 1 0 21 - 342 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 341 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 340 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 327 CLK_030_PE_1_ 3 -1 0 1 0 -1 -1 7 0 21 - 326 CLK_030_PE_0_ 3 -1 0 1 0 -1 -1 7 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 6 0 21 - 334 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 343 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 328 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 339 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 338 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 333 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 3 0 21 - 348 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 344 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 337 N_81 3 -1 4 1 4 -1 -1 2 0 21 - 331 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 330 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 329 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 5 1 0 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 5 1 2 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 59 A_1_ 1 -1 -1 1 2 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 5 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 -117 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 4 2 3 4 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 4 5 7 41 -1 1 0 21 - 79 RW_000 5 343 7 3 4 5 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 5 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 5 6 7 30 -1 1 0 21 - 70 RW 5 348 6 2 3 7 70 -1 2 0 21 - 78 SIZE_1_ 5 341 7 1 1 78 -1 3 0 21 - 69 SIZE_0_ 5 346 6 1 1 69 -1 3 0 21 - 68 A_0_ 5 349 6 1 1 68 -1 3 0 21 + 81 AS_030 5 -1 7 5 3 4 5 6 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 + 79 RW_000 5 342 7 3 2 4 6 79 -1 4 0 21 + 70 RW 5 -1 6 2 6 7 70 -1 1 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 2 0 21 + 68 A_0_ 5 -1 6 1 2 68 -1 2 0 21 40 BERR 5 -1 4 1 0 40 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 @@ -7221,134 +902,11 @@ 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 342 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 340 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 339 1 0 6 -1 9 0 21 - 82 BGACK_030 5 345 7 0 82 -1 3 0 21 - 34 VMA 5 347 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 344 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 345 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 320 SM_AMIGA_6_ 3 -1 5 4 1 3 5 7 -1 -1 3 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 7 0 21 - 328 RST_DLY_0_ 3 -1 0 3 0 2 6 -1 -1 4 0 21 - 295 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 - 293 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 336 SM_AMIGA_i_7_ 3 -1 5 3 2 5 7 -1 -1 3 1 21 - 324 CYCLE_DMA_0_ 3 -1 0 3 0 5 6 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 5 3 0 3 5 -1 -1 3 0 21 - 296 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 - 330 RST_DLY_2_ 3 -1 6 3 0 2 6 -1 -1 2 0 21 - 329 RST_DLY_1_ 3 -1 2 3 0 2 6 -1 -1 2 1 21 - 337 CLK_OUT_INTreg 3 -1 3 3 1 5 6 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 1 1 21 - 327 CLK_030_PE_1_ 3 -1 6 2 5 6 -1 -1 7 0 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 6 0 21 - 302 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 5 0 21 - 325 CYCLE_DMA_1_ 3 -1 5 2 5 6 -1 -1 4 0 21 - 347 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 332 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21 - 331 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 0 2 0 1 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 5 2 1 5 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21 - 342 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 340 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 339 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 326 CLK_030_PE_0_ 3 -1 6 1 6 -1 -1 7 0 21 - 335 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 - 334 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 343 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 349 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 341 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 333 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 3 0 21 - 348 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 344 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 338 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 1 1 5 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 1 1 3 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 2 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 63 CLK_030 1 -1 -1 2 5 6 63 -1 - 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A_1_ 1 -1 -1 1 2 59 -1 - 35 VPA 1 -1 -1 1 7 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 -117 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 - 79 RW_000 5 342 7 4 0 2 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 4 0 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 4 0 2 6 7 30 -1 1 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 347 6 2 5 7 70 -1 2 0 21 - 40 BERR 5 -1 4 2 0 3 40 -1 1 0 21 - 78 SIZE_1_ 5 340 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 345 6 1 2 69 -1 3 0 21 - 68 A_0_ 5 348 6 1 2 68 -1 3 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 341 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 339 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 349 1 0 6 -1 9 0 21 + 8 IPL_030_2_ 5 341 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 82 BGACK_030 5 344 7 0 82 -1 3 0 21 - 34 VMA 5 346 3 0 34 -1 3 0 21 + 34 VMA 5 345 3 0 34 -1 3 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 @@ -7363,65 +921,63 @@ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 344 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 CLK_000_D_1_ 3 -1 7 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 307 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 6 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 337 CLK_OUT_INTreg 3 -1 1 4 0 1 2 6 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 6 4 1 5 6 7 -1 -1 1 0 21 - 296 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 321 SM_AMIGA_6_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 0 3 0 1 2 -1 -1 1 0 21 + 311 CLK_000_D_0_ 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21 + 310 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 + 323 SM_AMIGA_6_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 0 4 0 3 4 7 -1 -1 2 0 21 + 296 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 294 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 326 SM_AMIGA_0_ 3 -1 1 3 1 5 7 -1 -1 3 0 21 + 340 CLK_OUT_INTreg 3 -1 6 3 1 2 6 -1 -1 1 0 21 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 - 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 8 0 21 - 327 CLK_030_PE_0_ 3 -1 0 2 0 2 -1 -1 7 0 21 - 308 CLK_030_PE_1_ 3 -1 0 2 0 2 -1 -1 7 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 - 335 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 5 0 21 - 334 SM_AMIGA_3_ 3 -1 3 2 0 3 -1 -1 5 0 21 - 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 5 0 21 - 325 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 4 0 21 - 346 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 336 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 324 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 - 323 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21 - 322 SM_AMIGA_4_ 3 -1 5 2 3 5 -1 -1 3 0 21 - 319 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 318 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 332 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 326 CYCLE_DMA_1_ 3 -1 0 2 0 2 -1 -1 2 0 21 - 320 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 306 inst_DTACK_D0 3 -1 5 2 0 3 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 349 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 339 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 293 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 301 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 6 0 21 + 337 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 5 0 21 + 330 RST_DLY_0_ 3 -1 3 2 0 3 -1 -1 4 0 21 + 327 CYCLE_DMA_0_ 3 -1 1 2 1 2 -1 -1 4 0 21 + 345 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 338 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 335 SM_AMIGA_5_ 3 -1 5 2 5 6 -1 -1 3 0 21 + 325 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 3 0 21 + 324 SM_AMIGA_4_ 3 -1 6 2 0 6 -1 -1 3 0 21 + 320 inst_DS_000_ENABLE 3 -1 6 2 3 6 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 295 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 334 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 + 333 inst_DSACK1_INT 3 -1 6 2 6 7 -1 -1 2 0 21 + 332 RST_DLY_2_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 331 RST_DLY_1_ 3 -1 3 2 0 3 -1 -1 2 1 21 + 328 CYCLE_DMA_1_ 3 -1 1 2 1 2 -1 -1 2 0 21 + 321 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 313 inst_CLK_OUT_PRE_D 3 -1 4 2 2 6 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 329 CLK_030_PE_0_ 3 -1 2 1 2 -1 -1 9 0 21 + 308 CLK_030_PE_1_ 3 -1 2 1 2 -1 -1 6 0 21 + 336 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 342 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 328 RST_DLY_0_ 3 -1 3 1 3 -1 -1 4 0 21 - 348 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 345 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 340 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 333 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21 - 347 RN_RW 3 70 6 1 6 70 -1 2 0 21 343 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 338 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 331 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 - 330 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 329 RST_DLY_1_ 3 -1 3 1 3 -1 -1 2 1 21 - 317 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 - 316 CLK_000_D_2_ 3 -1 4 1 1 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 1 1 5 -1 -1 1 0 21 + 339 N_280 3 -1 4 1 4 -1 -1 2 0 21 + 309 inst_AMIGA_DS 3 -1 7 1 2 -1 -1 2 0 21 + 300 inst_AS_030_D1 3 -1 5 1 5 -1 -1 2 0 21 + 322 inst_BGACK_030_INT_D 3 -1 7 1 5 -1 -1 1 0 21 + 318 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 + 317 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 316 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 315 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 314 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 + 312 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 6 1 5 -1 -1 1 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 1 2 -1 -1 1 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 1 3 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 4 3 4 5 7 13 -1 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 @@ -7429,639 +985,36 @@ 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 59 A_1_ 1 -1 -1 2 1 5 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 63 CLK_030 1 -1 -1 1 2 63 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 5 29 -1 + 59 A_1_ 1 -1 -1 1 5 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 10 CLK_000 1 -1 -1 1 6 10 -1 -116 "number of signals after reading design file" +115 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 81 AS_030 5 -1 7 6 1 2 3 4 5 7 81 -1 1 0 21 - 79 RW_000 5 344 7 3 0 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 - 68 A_0_ 5 340 6 2 1 5 68 -1 3 0 21 - 70 RW 5 349 6 2 5 7 70 -1 2 0 21 - 78 SIZE_1_ 5 339 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 347 6 1 5 69 -1 3 0 21 - 40 BERR 5 -1 4 1 3 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 343 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 342 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 341 1 0 6 -1 9 0 21 - 82 BGACK_030 5 346 7 0 82 -1 3 0 21 - 34 VMA 5 348 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 345 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 346 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 310 CLK_000_D_0_ 3 -1 2 6 0 1 3 5 6 7 -1 -1 1 0 21 - 309 CLK_000_D_1_ 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 7 0 21 - 336 SM_AMIGA_i_7_ 3 -1 5 3 2 5 7 -1 -1 3 1 21 - 322 SM_AMIGA_4_ 3 -1 0 3 0 3 5 -1 -1 3 0 21 - 321 SM_AMIGA_6_ 3 -1 5 3 1 5 7 -1 -1 3 0 21 - 337 CLK_OUT_INTreg 3 -1 2 3 0 1 6 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 - 335 SM_AMIGA_2_ 3 -1 3 2 3 5 -1 -1 5 0 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 5 0 21 - 296 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 333 SM_AMIGA_5_ 3 -1 1 2 0 1 -1 -1 3 0 21 - 324 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 323 SM_AMIGA_1_ 3 -1 5 2 1 5 -1 -1 3 0 21 - 319 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 318 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 332 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 331 inst_DSACK1_INT 3 -1 1 2 1 7 -1 -1 2 0 21 - 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 0 2 0 2 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 5 2 0 5 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 - 343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 342 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 341 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 327 CLK_030_PE_0_ 3 -1 0 1 0 -1 -1 8 0 21 - 308 CLK_030_PE_1_ 3 -1 0 1 0 -1 -1 8 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 8 0 21 - 334 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 - 344 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 328 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 325 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 348 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 347 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 340 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 339 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 293 cpu_est_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 349 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 345 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 338 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 330 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 329 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 326 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 317 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 - 316 CLK_000_D_2_ 3 -1 7 1 4 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 2 1 3 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 4 1 5 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 6 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 59 A_1_ 1 -1 -1 1 2 59 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 -114 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 79 RW_000 5 340 7 2 4 6 79 -1 4 0 21 - 68 A_0_ 5 344 6 2 1 5 68 -1 3 0 21 - 70 RW 5 347 6 2 0 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 - 78 SIZE_1_ 5 337 7 1 1 78 -1 3 0 21 - 69 SIZE_0_ 5 339 6 1 1 69 -1 3 0 21 - 40 BERR 5 -1 4 1 5 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 346 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 345 1 0 6 -1 9 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 0 6 0 1 2 3 5 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 - 320 SM_AMIGA_6_ 3 -1 2 5 0 1 2 5 7 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 293 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 323 SM_AMIGA_0_ 3 -1 0 3 0 2 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 1 1 21 - 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 - 303 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 5 0 21 - 302 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 5 0 21 - 324 CYCLE_DMA_0_ 3 -1 0 2 0 6 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 334 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 331 SM_AMIGA_5_ 3 -1 1 2 1 5 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 - 330 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 329 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 325 CYCLE_DMA_1_ 3 -1 0 2 0 6 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 336 CLK_OUT_INTreg 3 -1 3 2 1 6 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 7 2 3 6 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 6 2 6 7 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 1 2 2 6 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 346 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 345 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 333 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 - 332 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 344 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 339 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 347 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 335 N_60 3 -1 4 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 316 CLK_000_D_4_ 3 -1 6 1 2 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 -114 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 79 RW_000 5 340 7 2 4 6 79 -1 4 0 21 - 68 A_0_ 5 344 6 2 1 5 68 -1 3 0 21 - 70 RW 5 347 6 2 0 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 - 78 SIZE_1_ 5 337 7 1 1 78 -1 3 0 21 - 69 SIZE_0_ 5 339 6 1 1 69 -1 3 0 21 - 40 BERR 5 -1 4 1 5 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 346 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 345 1 0 6 -1 9 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 0 6 0 1 2 3 5 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 - 320 SM_AMIGA_6_ 3 -1 2 5 0 1 2 5 7 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 293 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 323 SM_AMIGA_0_ 3 -1 0 3 0 2 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 1 1 21 - 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 - 303 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 5 0 21 - 302 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 5 0 21 - 324 CYCLE_DMA_0_ 3 -1 0 2 0 6 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 334 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 331 SM_AMIGA_5_ 3 -1 1 2 1 5 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 - 330 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 329 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 325 CYCLE_DMA_1_ 3 -1 0 2 0 6 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 336 CLK_OUT_INTreg 3 -1 3 2 1 6 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 7 2 3 6 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 6 2 6 7 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 1 2 2 6 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 346 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 345 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 333 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 - 332 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 344 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 339 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 347 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 335 N_60 3 -1 4 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 316 CLK_000_D_4_ 3 -1 6 1 2 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 -114 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 0 2 3 4 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21 - 79 RW_000 5 340 7 2 4 6 79 -1 4 0 21 - 70 RW 5 344 6 2 0 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 - 78 SIZE_1_ 5 337 7 1 1 78 -1 3 0 21 - 69 SIZE_0_ 5 339 6 1 1 69 -1 3 0 21 - 68 A_0_ 5 345 6 1 1 68 -1 3 0 21 - 40 BERR 5 -1 4 1 5 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 7 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 309 CLK_000_D_0_ 3 -1 0 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 295 cpu_est_3_ 3 -1 0 4 0 3 5 6 -1 -1 4 0 21 - 293 cpu_est_1_ 3 -1 3 4 0 3 5 6 -1 -1 4 0 21 - 320 SM_AMIGA_6_ 3 -1 2 4 0 1 2 7 -1 -1 3 0 21 - 296 cpu_est_0_ 3 -1 6 4 0 3 5 6 -1 -1 3 0 21 - 294 cpu_est_2_ 3 -1 3 4 0 3 5 6 -1 -1 1 1 21 - 323 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 3 3 0 3 5 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 - 303 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 6 0 21 - 302 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 6 0 21 - 326 RST_DLY_0_ 3 -1 5 2 1 5 -1 -1 4 0 21 - 324 CYCLE_DMA_0_ 3 -1 0 2 0 6 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 334 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 331 SM_AMIGA_5_ 3 -1 2 2 2 3 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 330 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 329 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 1 2 1 5 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 5 2 1 5 -1 -1 2 1 21 - 325 CYCLE_DMA_1_ 3 -1 0 2 0 6 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 336 CLK_OUT_INTreg 3 -1 7 2 1 6 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 5 2 6 7 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 3 2 3 5 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 6 2 0 2 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 333 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 - 332 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 339 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 335 N_243 3 -1 4 1 4 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 0 1 2 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 4 1 6 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 5 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 5 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 -114 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 1 3 4 5 7 81 -1 1 0 21 - 79 RW_000 5 339 7 4 0 3 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 4 0 3 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 4 0 3 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 4 0 3 6 7 30 -1 1 0 21 - 68 A_0_ 5 344 6 2 0 2 68 -1 3 0 21 - 70 RW 5 345 6 2 0 7 70 -1 2 0 21 - 29 DTACK 5 342 3 1 6 29 -1 6 0 21 - 78 SIZE_1_ 5 336 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 338 6 1 2 69 -1 3 0 21 - 40 BERR 5 -1 4 1 2 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 337 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 - 82 BGACK_030 5 341 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 340 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 308 CLK_000_D_0_ 3 -1 1 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 306 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 307 CLK_000_D_1_ 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 296 cpu_est_3_ 3 -1 5 4 2 3 5 6 -1 -1 4 0 21 - 294 cpu_est_1_ 3 -1 5 4 2 3 5 6 -1 -1 4 0 21 - 319 SM_AMIGA_6_ 3 -1 1 4 0 1 2 7 -1 -1 3 0 21 - 334 CLK_OUT_INTreg 3 -1 3 4 0 1 3 6 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 2 4 2 3 5 6 -1 -1 1 1 21 - 300 inst_AS_030_000_SYNC 3 -1 5 3 1 3 5 -1 -1 7 0 21 - 333 SM_AMIGA_i_7_ 3 -1 1 3 1 5 7 -1 -1 3 1 21 - 322 SM_AMIGA_0_ 3 -1 5 3 1 5 7 -1 -1 3 0 21 - 320 SM_AMIGA_4_ 3 -1 6 3 0 2 6 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 5 3 2 3 5 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 0 3 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 - 342 RN_DTACK 3 29 3 2 3 7 29 -1 6 0 21 - 332 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 325 RST_DLY_0_ 3 -1 6 2 2 6 -1 -1 4 0 21 - 323 CYCLE_DMA_0_ 3 -1 0 2 0 3 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 330 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 3 0 21 - 317 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 - 316 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 329 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 328 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 327 RST_DLY_2_ 3 -1 2 2 2 6 -1 -1 2 0 21 - 326 RST_DLY_1_ 3 -1 6 2 2 6 -1 -1 2 1 21 - 324 CYCLE_DMA_1_ 3 -1 3 2 0 3 -1 -1 2 0 21 - 318 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 310 inst_CLK_OUT_PRE_D 3 -1 7 2 0 3 -1 -1 1 0 21 - 304 CLK_000_D_3_ 3 -1 0 2 1 5 -1 -1 1 0 21 - 303 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 337 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 302 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 6 0 21 - 331 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 344 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 338 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 336 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 321 SM_AMIGA_1_ 3 -1 5 1 5 -1 -1 3 0 21 - 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 335 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 315 CLK_000_D_4_ 3 -1 5 1 1 -1 -1 1 0 21 - 314 CLK_000_D_2_ 3 -1 3 1 0 -1 -1 1 0 21 - 313 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 312 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 311 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 309 inst_CLK_OUT_PRE_50 3 -1 7 1 7 -1 -1 1 0 21 - 305 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 -114 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 + 81 AS_030 5 -1 7 5 3 4 5 6 7 81 -1 1 0 21 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 - 79 RW_000 5 340 7 2 4 6 79 -1 4 0 21 - 68 A_0_ 5 343 6 2 2 3 68 -1 3 0 21 - 70 RW 5 347 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 338 6 1 2 69 -1 3 0 21 + 79 RW_000 5 342 7 3 2 4 6 79 -1 4 0 21 + 70 RW 5 -1 6 2 6 7 70 -1 1 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 2 0 21 + 68 A_0_ 5 -1 6 1 2 68 -1 2 0 21 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 29 DTACK 5 -1 3 1 6 29 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 @@ -8070,15 +1023,15 @@ 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 339 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 346 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 344 1 0 6 -1 9 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 8 IPL_030_2_ 5 341 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 + 82 BGACK_030 5 344 7 0 82 -1 3 0 21 34 VMA 5 345 3 0 34 -1 3 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 + 28 BG_000 5 343 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 80 DSACK1 0 7 0 80 -1 1 0 21 @@ -8088,304 +1041,64 @@ 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 CLK_000_D_0_ 3 -1 6 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 307 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 308 CLK_000_D_1_ 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 293 cpu_est_0_ 3 -1 7 5 0 1 3 6 7 -1 -1 3 0 21 - 294 cpu_est_1_ 3 -1 6 4 0 1 3 6 -1 -1 4 0 21 - 320 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21 - 295 cpu_est_2_ 3 -1 1 4 0 1 3 6 -1 -1 1 1 21 - 302 inst_AS_000_DMA 3 -1 1 3 1 3 7 -1 -1 5 0 21 - 296 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 3 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 - 333 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 5 0 21 - 326 RST_DLY_0_ 3 -1 2 2 0 2 -1 -1 4 0 21 - 324 CYCLE_DMA_0_ 3 -1 2 2 1 2 -1 -1 4 0 21 - 345 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 334 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 331 SM_AMIGA_5_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 330 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21 - 329 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 0 2 0 2 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 0 2 0 2 -1 -1 2 1 21 - 325 CYCLE_DMA_1_ 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 335 CLK_OUT_INTreg 3 -1 3 2 1 6 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 6 2 1 3 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 5 2 0 5 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 5 2 0 3 -1 -1 1 0 21 - 346 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 344 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 332 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 343 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 338 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 347 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 0 1 5 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 7 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 7 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -114 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 - 79 RW_000 5 340 7 2 4 6 79 -1 4 0 21 - 68 A_0_ 5 343 6 2 2 3 68 -1 3 0 21 - 70 RW 5 347 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 338 6 1 2 69 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 29 DTACK 5 -1 3 1 6 29 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 339 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 346 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 345 1 0 6 -1 9 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 344 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 CLK_000_D_0_ 3 -1 6 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 307 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 308 CLK_000_D_1_ 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 293 cpu_est_0_ 3 -1 7 5 0 1 3 6 7 -1 -1 3 0 21 - 294 cpu_est_1_ 3 -1 6 4 0 1 3 6 -1 -1 4 0 21 - 320 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21 - 295 cpu_est_2_ 3 -1 1 4 0 1 3 6 -1 -1 1 1 21 - 302 inst_AS_000_DMA 3 -1 1 3 1 3 7 -1 -1 5 0 21 - 296 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 3 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 - 333 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 5 0 21 - 326 RST_DLY_0_ 3 -1 2 2 0 2 -1 -1 4 0 21 - 324 CYCLE_DMA_0_ 3 -1 2 2 1 2 -1 -1 4 0 21 - 344 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 334 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 331 SM_AMIGA_5_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 330 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21 - 329 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 0 2 0 2 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 0 2 0 2 -1 -1 2 1 21 - 325 CYCLE_DMA_1_ 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 335 CLK_OUT_INTreg 3 -1 3 2 1 6 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 6 2 1 3 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 5 2 0 5 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 5 2 0 3 -1 -1 1 0 21 - 346 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 345 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 332 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 343 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 338 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 347 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 0 1 5 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 7 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 7 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -115 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 - 79 RW_000 5 340 7 2 4 6 79 -1 4 0 21 - 68 A_0_ 5 344 6 2 2 3 68 -1 3 0 21 - 70 RW 5 345 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 339 6 1 2 69 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 29 DTACK 5 -1 3 1 6 29 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 309 CLK_000_D_0_ 3 -1 6 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 308 CLK_000_D_1_ 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 294 cpu_est_0_ 3 -1 7 5 0 1 3 6 7 -1 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 0 5 0 3 4 6 7 -1 -1 2 0 21 - 295 cpu_est_1_ 3 -1 6 4 0 1 3 6 -1 -1 4 0 21 - 320 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21 - 296 cpu_est_2_ 3 -1 1 4 0 1 3 6 -1 -1 1 1 21 - 302 inst_AS_000_DMA 3 -1 1 3 1 3 7 -1 -1 5 0 21 + 344 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 311 CLK_000_D_0_ 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21 + 310 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 + 323 SM_AMIGA_6_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 0 4 0 3 4 7 -1 -1 2 0 21 + 295 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 293 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 3 5 6 7 -1 -1 1 0 21 + 326 SM_AMIGA_0_ 3 -1 1 3 1 5 7 -1 -1 3 0 21 + 339 CLK_OUT_INTreg 3 -1 6 3 1 2 6 -1 -1 1 0 21 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 - 333 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 5 0 21 - 326 RST_DLY_0_ 3 -1 2 2 0 2 -1 -1 4 0 21 - 324 CYCLE_DMA_0_ 3 -1 2 2 1 2 -1 -1 4 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 334 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 331 SM_AMIGA_5_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 321 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 330 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21 - 329 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 0 2 0 2 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 0 2 0 2 -1 -1 2 1 21 - 325 CYCLE_DMA_1_ 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 335 CLK_OUT_INTreg 3 -1 3 2 1 6 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 6 2 1 3 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 5 2 0 5 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 5 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 332 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 344 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 339 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 0 1 5 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 7 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 301 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 6 0 21 + 337 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 5 0 21 + 330 RST_DLY_0_ 3 -1 3 2 0 3 -1 -1 4 0 21 + 327 CYCLE_DMA_0_ 3 -1 1 2 1 2 -1 -1 4 0 21 + 345 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 338 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 335 SM_AMIGA_5_ 3 -1 5 2 5 6 -1 -1 3 0 21 + 325 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 3 0 21 + 324 SM_AMIGA_4_ 3 -1 6 2 0 6 -1 -1 3 0 21 + 320 inst_DS_000_ENABLE 3 -1 6 2 3 6 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 334 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 + 333 inst_DSACK1_INT 3 -1 6 2 6 7 -1 -1 2 0 21 + 332 RST_DLY_2_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 331 RST_DLY_1_ 3 -1 3 2 0 3 -1 -1 2 1 21 + 328 CYCLE_DMA_1_ 3 -1 1 2 1 2 -1 -1 2 0 21 + 321 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 313 inst_CLK_OUT_PRE_D 3 -1 4 2 2 6 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 329 CLK_030_PE_0_ 3 -1 2 1 2 -1 -1 9 0 21 + 308 CLK_030_PE_1_ 3 -1 2 1 2 -1 -1 6 0 21 + 336 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 342 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 343 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 340 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 309 inst_AMIGA_DS 3 -1 7 1 2 -1 -1 2 0 21 + 300 inst_AS_030_D1 3 -1 5 1 5 -1 -1 2 0 21 + 322 inst_BGACK_030_INT_D 3 -1 7 1 5 -1 -1 1 0 21 + 318 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 + 317 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 316 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 315 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 314 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 + 312 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 6 1 5 -1 -1 1 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 1 2 -1 -1 1 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 1 3 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 4 3 4 5 7 13 -1 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 @@ -8393,36 +1106,278 @@ 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 7 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 2 RESET 1 -1 -1 2 1 2 2 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 + 63 CLK_030 1 -1 -1 1 2 63 -1 + 59 A_1_ 1 -1 -1 1 5 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 10 CLK_000 1 -1 -1 1 6 10 -1 115 "number of signals after reading design file" +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 3 4 5 6 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 + 79 RW_000 5 342 7 3 2 4 6 79 -1 4 0 21 + 70 RW 5 -1 6 2 6 7 70 -1 1 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 2 0 21 + 68 A_0_ 5 -1 6 1 2 68 -1 2 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 341 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 346 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 345 1 0 6 -1 10 0 21 + 82 BGACK_030 5 344 7 0 82 -1 3 0 21 + 34 VMA 5 347 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 343 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 344 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 311 CLK_000_D_0_ 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21 + 310 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 + 323 SM_AMIGA_6_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 0 4 0 3 4 7 -1 -1 2 0 21 + 295 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 326 SM_AMIGA_0_ 3 -1 1 3 1 5 7 -1 -1 3 0 21 + 339 CLK_OUT_INTreg 3 -1 6 3 1 2 6 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 301 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 6 0 21 + 337 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 5 0 21 + 330 RST_DLY_0_ 3 -1 3 2 0 3 -1 -1 4 0 21 + 327 CYCLE_DMA_0_ 3 -1 1 2 1 2 -1 -1 4 0 21 + 347 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 338 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 335 SM_AMIGA_5_ 3 -1 5 2 5 6 -1 -1 3 0 21 + 325 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 3 0 21 + 324 SM_AMIGA_4_ 3 -1 6 2 0 6 -1 -1 3 0 21 + 320 inst_DS_000_ENABLE 3 -1 6 2 3 6 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 334 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 + 333 inst_DSACK1_INT 3 -1 6 2 6 7 -1 -1 2 0 21 + 332 RST_DLY_2_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 331 RST_DLY_1_ 3 -1 3 2 0 3 -1 -1 2 1 21 + 328 CYCLE_DMA_1_ 3 -1 1 2 1 2 -1 -1 2 0 21 + 321 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 313 inst_CLK_OUT_PRE_D 3 -1 4 2 2 6 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 + 346 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 345 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 329 CLK_030_PE_0_ 3 -1 2 1 2 -1 -1 9 0 21 + 308 CLK_030_PE_1_ 3 -1 2 1 2 -1 -1 6 0 21 + 336 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 342 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 343 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 340 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 309 inst_AMIGA_DS 3 -1 7 1 2 -1 -1 2 0 21 + 300 inst_AS_030_D1 3 -1 5 1 5 -1 -1 2 0 21 + 322 inst_BGACK_030_INT_D 3 -1 7 1 5 -1 -1 1 0 21 + 318 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 + 317 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 316 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 315 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 314 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 + 312 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 6 1 5 -1 -1 1 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 1 2 -1 -1 1 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 4 3 4 5 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 2 63 -1 + 59 A_1_ 1 -1 -1 1 5 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +115 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 3 4 5 6 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 + 79 RW_000 5 342 7 3 2 4 6 79 -1 4 0 21 + 70 RW 5 -1 6 2 6 7 70 -1 1 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 2 0 21 + 68 A_0_ 5 -1 6 1 2 68 -1 2 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 341 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 + 82 BGACK_030 5 344 7 0 82 -1 3 0 21 + 34 VMA 5 345 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 343 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 344 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 311 CLK_000_D_0_ 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21 + 310 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 + 323 SM_AMIGA_6_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 0 4 0 3 4 7 -1 -1 2 0 21 + 296 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 294 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 326 SM_AMIGA_0_ 3 -1 1 3 1 5 7 -1 -1 3 0 21 + 340 CLK_OUT_INTreg 3 -1 6 3 1 2 6 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 + 293 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 301 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 6 0 21 + 337 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 5 0 21 + 330 RST_DLY_0_ 3 -1 3 2 0 3 -1 -1 4 0 21 + 327 CYCLE_DMA_0_ 3 -1 1 2 1 2 -1 -1 4 0 21 + 345 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 338 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 335 SM_AMIGA_5_ 3 -1 5 2 5 6 -1 -1 3 0 21 + 325 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 3 0 21 + 324 SM_AMIGA_4_ 3 -1 6 2 0 6 -1 -1 3 0 21 + 320 inst_DS_000_ENABLE 3 -1 6 2 3 6 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 295 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 334 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 + 333 inst_DSACK1_INT 3 -1 6 2 6 7 -1 -1 2 0 21 + 332 RST_DLY_2_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 331 RST_DLY_1_ 3 -1 3 2 0 3 -1 -1 2 1 21 + 328 CYCLE_DMA_1_ 3 -1 1 2 1 2 -1 -1 2 0 21 + 321 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 313 inst_CLK_OUT_PRE_D 3 -1 4 2 2 6 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 329 CLK_030_PE_0_ 3 -1 2 1 2 -1 -1 9 0 21 + 308 CLK_030_PE_1_ 3 -1 2 1 2 -1 -1 6 0 21 + 336 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 342 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 343 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 339 N_154 3 -1 4 1 4 -1 -1 2 0 21 + 309 inst_AMIGA_DS 3 -1 7 1 2 -1 -1 2 0 21 + 300 inst_AS_030_D1 3 -1 5 1 5 -1 -1 2 0 21 + 322 inst_BGACK_030_INT_D 3 -1 7 1 5 -1 -1 1 0 21 + 318 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 + 317 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 316 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 315 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 314 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 + 312 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 6 1 5 -1 -1 1 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 1 2 -1 -1 1 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 4 3 4 5 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 2 63 -1 + 59 A_1_ 1 -1 -1 1 5 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +112 "number of signals after reading design file" + "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 - 79 RW_000 5 340 7 2 4 6 79 -1 4 0 21 - 70 RW 5 347 6 2 5 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 338 6 1 5 69 -1 3 0 21 - 68 A_0_ 5 343 6 1 5 68 -1 3 0 21 - 40 BERR 5 -1 4 1 6 40 -1 1 0 21 - 29 DTACK 5 -1 3 1 3 29 -1 1 0 21 + 79 RW_000 5 341 7 3 1 4 6 79 -1 4 0 21 + 68 A_0_ 5 -1 6 2 0 5 68 -1 2 0 21 + 70 RW 5 -1 6 2 5 7 70 -1 1 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 5 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 5 69 -1 2 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 @@ -8432,14 +1387,14 @@ 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 8 IPL_030_2_ 5 339 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 345 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 344 1 0 6 -1 10 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 346 3 0 34 -1 3 0 21 + 7 IPL_030_0_ 5 342 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 340 1 0 6 -1 10 0 21 + 82 BGACK_030 5 344 7 0 82 -1 3 0 21 + 34 VMA 5 345 3 0 34 -1 3 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 + 28 BG_000 5 343 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 80 DSACK1 0 7 0 80 -1 1 0 21 @@ -8449,64 +1404,62 @@ 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 307 inst_RESET_OUT 3 -1 5 6 0 3 4 5 6 7 -1 -1 2 0 21 - 308 CLK_000_D_1_ 3 -1 7 6 0 3 4 5 6 7 -1 -1 1 0 21 - 309 CLK_000_D_0_ 3 -1 6 5 0 3 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 3 0 2 3 -1 -1 7 0 21 - 302 inst_AS_000_DMA 3 -1 1 3 1 3 7 -1 -1 5 0 21 - 334 SM_AMIGA_i_7_ 3 -1 0 3 0 2 7 -1 -1 3 1 21 - 321 SM_AMIGA_4_ 3 -1 0 3 0 5 6 -1 -1 3 0 21 - 320 SM_AMIGA_6_ 3 -1 0 3 0 5 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 - 333 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 5 0 21 - 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 5 0 21 - 324 CYCLE_DMA_0_ 3 -1 0 2 0 1 -1 -1 4 0 21 - 295 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 346 RN_VMA 3 34 3 2 3 6 34 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 0 2 0 7 -1 -1 3 0 21 - 322 SM_AMIGA_1_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 318 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 - 330 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 329 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 325 CYCLE_DMA_1_ 3 -1 0 2 0 1 -1 -1 2 0 21 - 319 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 335 CLK_OUT_INTreg 3 -1 0 2 1 6 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 2 2 0 1 -1 -1 1 0 21 - 310 inst_CLK_OUT_PRE_50 3 -1 0 2 0 2 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 3 2 0 2 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 3 2 3 6 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 1 1 21 - 345 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 344 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 344 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 310 CLK_000_D_0_ 3 -1 3 6 0 2 3 5 6 7 -1 -1 1 0 21 + 309 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 + 322 SM_AMIGA_6_ 3 -1 6 5 0 2 5 6 7 -1 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 5 4 3 4 5 7 -1 -1 2 0 21 + 301 inst_AS_030_000_SYNC 3 -1 2 3 2 3 6 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 336 SM_AMIGA_i_7_ 3 -1 6 3 2 6 7 -1 -1 3 1 21 + 325 SM_AMIGA_0_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 7 3 0 3 7 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 6 0 21 + 302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 6 0 21 + 335 SM_AMIGA_2_ 3 -1 0 2 0 2 -1 -1 5 0 21 + 328 RST_DLY_0_ 3 -1 6 2 5 6 -1 -1 4 0 21 + 326 CYCLE_DMA_0_ 3 -1 0 2 0 1 -1 -1 4 0 21 + 345 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 333 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 323 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 319 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 318 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 332 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 331 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 + 330 RST_DLY_2_ 3 -1 6 2 5 6 -1 -1 2 0 21 + 329 RST_DLY_1_ 3 -1 5 2 5 6 -1 -1 2 1 21 + 327 CYCLE_DMA_1_ 3 -1 0 2 0 1 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 + 300 inst_AS_030_D1 3 -1 5 2 2 5 -1 -1 2 0 21 + 337 CLK_OUT_INTreg 3 -1 5 2 1 6 -1 -1 1 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 5 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 3 2 3 6 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 + 342 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 340 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 332 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 5 0 21 - 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 5 1 5 -1 -1 4 0 21 - 343 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 338 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 331 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 - 347 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 5 1 5 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 5 1 5 -1 -1 2 1 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 316 CLK_000_D_4_ 3 -1 2 1 0 -1 -1 1 0 21 - 315 CLK_000_D_2_ 3 -1 4 1 3 -1 -1 1 0 21 - 314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 313 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 3 1 6 -1 -1 1 0 21 + 334 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 341 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 324 SM_AMIGA_1_ 3 -1 2 1 2 -1 -1 3 0 21 + 343 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 338 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 308 inst_AMIGA_DS 3 -1 7 1 1 -1 -1 2 0 21 + 321 inst_BGACK_030_INT_D 3 -1 7 1 2 -1 -1 1 0 21 + 317 CLK_000_D_4_ 3 -1 3 1 6 -1 -1 1 0 21 + 316 CLK_000_D_2_ 3 -1 6 1 3 -1 -1 1 0 21 + 315 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 314 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 + 313 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 1 1 0 -1 -1 1 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 1 2 -1 -1 1 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 13 nEXP_SPACE 1 -1 -1 5 2 3 4 6 7 13 -1 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 @@ -8514,36 +1467,153 @@ 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 59 A_1_ 1 -1 -1 2 0 3 59 -1 + 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 2 RESET 1 -1 -1 2 1 2 2 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A_1_ 1 -1 -1 1 2 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 3 35 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -116 "number of signals after reading design file" + 10 CLK_000 1 -1 -1 1 3 10 -1 +112 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 + 79 RW_000 5 342 7 3 1 4 6 79 -1 4 0 21 + 68 A_0_ 5 -1 6 2 0 5 68 -1 2 0 21 + 70 RW 5 -1 6 2 5 7 70 -1 1 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 5 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 5 69 -1 2 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 339 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 341 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 340 1 0 6 -1 10 0 21 + 82 BGACK_030 5 344 7 0 82 -1 3 0 21 + 34 VMA 5 345 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 343 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 344 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 310 CLK_000_D_0_ 3 -1 3 6 0 2 3 5 6 7 -1 -1 1 0 21 + 309 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 + 322 SM_AMIGA_6_ 3 -1 6 5 0 2 5 6 7 -1 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 5 4 3 4 5 7 -1 -1 2 0 21 + 301 inst_AS_030_000_SYNC 3 -1 2 3 2 3 6 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 336 SM_AMIGA_i_7_ 3 -1 6 3 2 6 7 -1 -1 3 1 21 + 325 SM_AMIGA_0_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 7 3 0 3 7 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 6 0 21 + 302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 6 0 21 + 335 SM_AMIGA_2_ 3 -1 0 2 0 2 -1 -1 5 0 21 + 328 RST_DLY_0_ 3 -1 6 2 5 6 -1 -1 4 0 21 + 326 CYCLE_DMA_0_ 3 -1 0 2 0 1 -1 -1 4 0 21 + 345 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 333 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 323 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 320 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 319 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 332 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 331 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 + 330 RST_DLY_2_ 3 -1 6 2 5 6 -1 -1 2 0 21 + 329 RST_DLY_1_ 3 -1 5 2 5 6 -1 -1 2 1 21 + 327 CYCLE_DMA_1_ 3 -1 0 2 0 1 -1 -1 2 0 21 + 318 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 + 300 inst_AS_030_D1 3 -1 5 2 2 5 -1 -1 2 0 21 + 338 CLK_OUT_INTreg 3 -1 5 2 1 6 -1 -1 1 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 5 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 3 2 3 6 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 + 341 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 340 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 334 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 342 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 324 SM_AMIGA_1_ 3 -1 2 1 2 -1 -1 3 0 21 + 343 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 337 N_242 3 -1 4 1 4 -1 -1 2 0 21 + 308 inst_AMIGA_DS 3 -1 7 1 1 -1 -1 2 0 21 + 321 inst_BGACK_030_INT_D 3 -1 7 1 2 -1 -1 1 0 21 + 317 CLK_000_D_4_ 3 -1 3 1 6 -1 -1 1 0 21 + 316 CLK_000_D_2_ 3 -1 6 1 3 -1 -1 1 0 21 + 315 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 314 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 + 313 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 1 1 0 -1 -1 1 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 1 2 -1 -1 1 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 59 A_1_ 1 -1 -1 2 0 3 59 -1 + 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 +108 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" 81 AS_030 5 -1 7 6 2 3 4 5 6 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 - 79 RW_000 5 341 7 2 4 6 79 -1 4 0 21 - 68 A_0_ 5 346 6 2 5 6 68 -1 3 0 21 - 70 RW 5 345 6 2 5 7 70 -1 2 0 21 + 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 + 79 RW_000 5 336 7 3 2 4 6 79 -1 4 0 21 + 68 A_0_ 5 -1 6 2 1 6 68 -1 2 0 21 + 70 RW 5 -1 6 2 2 7 70 -1 1 0 21 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 - 78 SIZE_1_ 5 338 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 340 6 1 5 69 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 6 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 6 69 -1 2 0 21 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 29 DTACK 5 -1 3 1 6 29 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 @@ -8552,15 +1622,15 @@ 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 339 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 348 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 347 1 0 6 -1 10 0 21 - 82 BGACK_030 5 343 7 0 82 -1 3 0 21 - 34 VMA 5 344 3 0 34 -1 3 0 21 + 8 IPL_030_2_ 5 335 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 340 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 339 1 0 6 -1 10 0 21 + 82 BGACK_030 5 338 7 0 82 -1 3 0 21 + 34 VMA 5 341 3 0 34 -1 3 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 342 3 0 28 -1 2 0 21 + 28 BG_000 5 337 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 80 DSACK1 0 7 0 80 -1 1 0 21 @@ -8570,1085 +1640,58 @@ 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 343 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 310 CLK_000_D_0_ 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 309 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 307 inst_RESET_OUT 3 -1 5 6 0 3 4 5 6 7 -1 -1 2 0 21 - 321 SM_AMIGA_6_ 3 -1 2 4 2 5 6 7 -1 -1 3 0 21 - 302 inst_AS_000_DMA 3 -1 1 3 1 3 7 -1 -1 5 0 21 - 296 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 294 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 323 SM_AMIGA_1_ 3 -1 0 3 0 2 6 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 0 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 - 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 5 0 21 - 344 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 - 332 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 324 SM_AMIGA_0_ 3 -1 2 2 2 7 -1 -1 3 0 21 - 322 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 319 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 318 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 295 cpu_est_0_ 3 -1 0 2 0 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 6 2 6 7 -1 -1 2 0 21 - 320 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 336 CLK_OUT_INTreg 3 -1 0 2 1 6 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 3 2 0 1 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 0 2 2 5 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 341 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 327 RST_DLY_0_ 3 -1 5 1 5 -1 -1 4 0 21 - 325 CYCLE_DMA_0_ 3 -1 1 1 1 -1 -1 4 0 21 - 346 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 340 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 338 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 342 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 337 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 329 RST_DLY_2_ 3 -1 5 1 5 -1 -1 2 0 21 - 328 RST_DLY_1_ 3 -1 5 1 5 -1 -1 2 1 21 - 326 CYCLE_DMA_1_ 3 -1 1 1 1 -1 -1 2 0 21 - 308 inst_AMIGA_DS 3 -1 7 1 1 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 317 CLK_000_D_4_ 3 -1 5 1 2 -1 -1 1 0 21 - 316 CLK_000_D_2_ 3 -1 6 1 0 -1 -1 1 0 21 - 315 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 314 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 313 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_50 3 -1 3 1 3 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 2 RESET 1 -1 -1 2 1 2 2 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 59 A_1_ 1 -1 -1 1 2 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 4 10 -1 -115 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 3 4 5 6 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 79 RW_000 5 341 7 3 2 4 6 79 -1 4 0 21 - 70 RW 5 345 6 2 0 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 - 78 SIZE_1_ 5 338 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 340 6 1 2 69 -1 3 0 21 - 68 A_0_ 5 346 6 1 2 68 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 29 DTACK 5 -1 3 1 3 29 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 339 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 348 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 347 1 0 6 -1 10 0 21 - 82 BGACK_030 5 343 7 0 82 -1 3 0 21 - 34 VMA 5 344 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 342 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 343 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 311 CLK_000_D_0_ 3 -1 6 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 310 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 322 SM_AMIGA_6_ 3 -1 5 5 0 2 3 5 7 -1 -1 3 0 21 - 308 inst_RESET_OUT 3 -1 6 5 0 3 4 6 7 -1 -1 2 0 21 - 302 inst_AS_000_DMA 3 -1 2 3 2 3 7 -1 -1 6 0 21 - 295 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 - 293 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 296 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 - 336 CLK_OUT_INTreg 3 -1 5 3 1 2 6 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 3 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 6 3 3 4 5 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 - 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 338 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 309 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 321 SM_AMIGA_6_ 3 -1 5 5 1 2 5 6 7 -1 -1 3 0 21 + 296 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 324 SM_AMIGA_0_ 3 -1 0 3 0 5 7 -1 -1 3 0 21 + 322 SM_AMIGA_4_ 3 -1 6 3 0 2 6 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 + 332 CLK_OUT_INTreg 3 -1 0 3 1 2 6 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 301 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 6 0 21 - 334 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 327 RST_DLY_0_ 3 -1 1 2 1 6 -1 -1 4 0 21 - 304 CYCLE_DMA_0_ 3 -1 1 2 1 2 -1 -1 4 0 21 - 344 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 335 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 - 332 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 3 0 21 - 325 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 1 2 0 1 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 - 329 RST_DLY_2_ 3 -1 1 2 1 6 -1 -1 2 0 21 - 328 RST_DLY_1_ 3 -1 6 2 1 6 -1 -1 2 1 21 - 326 CYCLE_DMA_1_ 3 -1 2 2 1 2 -1 -1 2 0 21 - 321 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 5 2 2 5 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_50 3 -1 0 2 0 5 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 4 2 0 5 -1 -1 1 0 21 - 305 inst_VPA_D 3 -1 3 2 0 3 -1 -1 1 0 21 - 348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 341 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 346 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 340 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 338 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 5 1 5 -1 -1 3 0 21 - 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 342 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 337 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 309 inst_AMIGA_DS 3 -1 7 1 2 -1 -1 2 0 21 - 318 CLK_000_D_4_ 3 -1 0 1 5 -1 -1 1 0 21 - 317 CLK_000_D_2_ 3 -1 5 1 4 -1 -1 1 0 21 - 316 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 315 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 314 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 307 inst_DTACK_D0 3 -1 3 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 2 RESET 1 -1 -1 2 1 2 2 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -119 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 1 2 3 4 7 81 -1 1 0 21 - 79 RW_000 5 345 7 3 0 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 2 6 7 30 -1 1 0 21 - 70 RW 5 350 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 341 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 348 6 1 5 69 -1 3 0 21 - 68 A_0_ 5 340 6 1 5 68 -1 3 0 21 - 40 BERR 5 -1 4 1 2 40 -1 1 0 21 - 29 DTACK 5 -1 3 1 1 29 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 344 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 343 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 342 1 0 6 -1 10 0 21 - 82 BGACK_030 5 347 7 0 82 -1 3 0 21 - 34 VMA 5 349 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 346 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 347 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 311 CLK_000_D_0_ 3 -1 3 6 0 2 3 5 6 7 -1 -1 1 0 21 - 310 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 - 307 inst_RESET_OUT 3 -1 6 5 0 3 4 6 7 -1 -1 2 0 21 - 322 SM_AMIGA_6_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 4 1 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 1 3 1 3 5 -1 -1 7 0 21 - 302 inst_AS_000_DMA 3 -1 0 3 0 3 7 -1 -1 6 0 21 - 295 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 293 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 337 SM_AMIGA_i_7_ 3 -1 5 3 1 5 7 -1 -1 3 1 21 - 325 SM_AMIGA_0_ 3 -1 0 3 0 5 7 -1 -1 3 0 21 - 296 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 3 0 21 - 338 CLK_OUT_INTreg 3 -1 3 3 0 1 6 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 1 3 4 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 1 1 21 - 336 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 349 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 334 SM_AMIGA_5_ 3 -1 6 2 0 6 -1 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 333 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 332 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 - 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 2 0 3 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_50 3 -1 6 2 4 6 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 5 2 2 5 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 5 2 2 3 -1 -1 1 0 21 - 344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 343 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 342 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 328 CLK_030_PE_0_ 3 -1 0 1 0 -1 -1 9 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 308 CLK_030_PE_1_ 3 -1 0 1 0 -1 -1 6 0 21 - 335 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 345 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 329 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 326 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 348 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 341 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 340 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 350 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 339 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 331 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 330 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 327 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 2 0 21 - 309 inst_AMIGA_DS 3 -1 2 1 0 -1 -1 2 0 21 - 318 CLK_000_D_4_ 3 -1 2 1 5 -1 -1 1 0 21 - 317 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 - 316 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 315 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 314 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 1 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 1 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 1 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 1 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 1 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 1 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 1 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 2 RESET 1 -1 -1 2 1 2 2 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 59 A_1_ 1 -1 -1 1 5 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 -115 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 5 2 3 4 6 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 4 5 7 41 -1 1 0 21 - 79 RW_000 5 339 7 3 4 5 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 5 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 5 6 7 30 -1 1 0 21 - 68 A_0_ 5 345 6 2 0 2 68 -1 3 0 21 - 70 RW 5 344 6 2 3 7 70 -1 2 0 21 - 78 SIZE_1_ 5 337 7 1 2 78 -1 3 0 21 - 69 SIZE_0_ 5 340 6 1 2 69 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 - 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 - 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 - 82 BGACK_030 5 342 7 0 82 -1 3 0 21 - 34 VMA 5 343 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 341 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 322 SM_AMIGA_6_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 3 0 21 - 309 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 311 CLK_000_D_0_ 3 -1 3 6 0 1 3 5 6 7 -1 -1 1 0 21 - 310 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 2 3 1 2 3 -1 -1 7 0 21 - 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 335 SM_AMIGA_i_7_ 3 -1 1 3 1 2 7 -1 -1 3 1 21 - 324 SM_AMIGA_1_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 3 2 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 - 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 9 0 21 - 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21 - 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 332 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 325 SM_AMIGA_0_ 3 -1 7 2 1 7 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 0 2 0 5 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 331 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 330 inst_DSACK1_INT 3 -1 6 2 6 7 -1 -1 2 0 21 - 321 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 307 CLK_000_D_3_ 3 -1 2 2 1 7 -1 -1 1 0 21 - 306 inst_VPA_D 3 -1 3 2 0 3 -1 -1 1 0 21 - 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 - 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 - 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 - 329 inst_CLK_030_H 3 -1 5 1 5 -1 -1 8 0 21 - 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 - 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 305 CYCLE_DMA_1_ 3 -1 5 1 5 -1 -1 4 0 21 - 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 340 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 3 0 21 - 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 318 CLK_000_D_4_ 3 -1 7 1 1 -1 -1 1 0 21 - 317 CLK_000_D_2_ 3 -1 7 1 2 -1 -1 1 0 21 - 316 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 315 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 314 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 308 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 - 59 A_1_ 1 -1 -1 2 2 6 59 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 63 CLK_030 1 -1 -1 1 5 63 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 -119 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 1 2 3 4 7 81 -1 1 0 21 - 79 RW_000 5 345 7 3 0 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 2 6 7 30 -1 1 0 21 - 70 RW 5 350 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 341 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 348 6 1 5 69 -1 3 0 21 - 68 A_0_ 5 340 6 1 5 68 -1 3 0 21 - 40 BERR 5 -1 4 1 2 40 -1 1 0 21 - 29 DTACK 5 -1 3 1 1 29 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 344 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 343 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 342 1 0 6 -1 10 0 21 - 82 BGACK_030 5 347 7 0 82 -1 3 0 21 - 34 VMA 5 349 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 346 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 347 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 311 CLK_000_D_0_ 3 -1 3 6 0 2 3 5 6 7 -1 -1 1 0 21 - 310 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 - 307 inst_RESET_OUT 3 -1 6 5 0 3 4 6 7 -1 -1 2 0 21 - 322 SM_AMIGA_6_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 4 1 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 1 3 1 3 5 -1 -1 7 0 21 - 302 inst_AS_000_DMA 3 -1 0 3 0 3 7 -1 -1 6 0 21 - 295 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 293 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 337 SM_AMIGA_i_7_ 3 -1 5 3 1 5 7 -1 -1 3 1 21 - 325 SM_AMIGA_0_ 3 -1 0 3 0 5 7 -1 -1 3 0 21 - 296 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 3 0 21 - 338 CLK_OUT_INTreg 3 -1 3 3 0 1 6 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 1 3 4 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 1 1 21 - 336 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 349 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 334 SM_AMIGA_5_ 3 -1 6 2 0 6 -1 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 333 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 332 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 - 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 2 0 3 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_50 3 -1 6 2 4 6 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 5 2 2 5 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 5 2 2 3 -1 -1 1 0 21 - 344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 343 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 342 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 328 CLK_030_PE_0_ 3 -1 0 1 0 -1 -1 9 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 308 CLK_030_PE_1_ 3 -1 0 1 0 -1 -1 6 0 21 - 335 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 345 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 329 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 326 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 348 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 341 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 340 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 350 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 339 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 331 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 330 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 327 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 2 0 21 - 309 inst_AMIGA_DS 3 -1 2 1 0 -1 -1 2 0 21 - 318 CLK_000_D_4_ 3 -1 2 1 5 -1 -1 1 0 21 - 317 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 - 316 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 315 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 314 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 1 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 1 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 1 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 1 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 1 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 1 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 1 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 2 RESET 1 -1 -1 2 1 2 2 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 59 A_1_ 1 -1 -1 1 5 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 -125 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 1 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 4 5 7 41 -1 1 0 21 - 79 RW_000 5 348 7 3 0 4 6 79 -1 4 0 21 - 70 RW 5 355 6 2 5 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 - 78 SIZE_1_ 5 346 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 356 6 1 5 69 -1 3 0 21 - 68 A_0_ 5 349 6 1 5 68 -1 3 0 21 - 40 BERR 5 -1 4 1 2 40 -1 1 0 21 - 29 DTACK 5 -1 3 1 6 29 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 347 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 351 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 350 1 0 6 -1 10 0 21 - 82 BGACK_030 5 353 7 0 82 -1 3 0 21 - 34 VMA 5 354 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 352 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 353 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 314 CLK_000_D_0_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21 - 313 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 - 310 inst_RESET_OUT 3 -1 0 5 0 3 4 6 7 -1 -1 2 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 4 0 1 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 1 3 1 3 5 -1 -1 7 0 21 - 302 inst_AS_000_DMA 3 -1 0 3 0 3 7 -1 -1 6 0 21 - 295 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 - 343 SM_AMIGA_i_7_ 3 -1 5 3 1 5 7 -1 -1 3 1 21 - 330 SM_AMIGA_0_ 3 -1 6 3 5 6 7 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 344 CLK_OUT_INTreg 3 -1 2 3 0 1 6 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 1 3 4 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 1 1 21 - 342 SM_AMIGA_2_ 3 -1 2 2 2 6 -1 -1 5 0 21 - 337 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 5 0 21 - 331 CYCLE_DMA_0_ 3 -1 5 2 0 5 -1 -1 4 0 21 - 354 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 339 SM_AMIGA_1_ 3 -1 6 2 2 6 -1 -1 3 0 21 - 329 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 328 SM_AMIGA_6_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 326 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 - 325 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 338 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 332 CYCLE_DMA_1_ 3 -1 5 2 0 5 -1 -1 2 0 21 - 327 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 320 CLK_000_D_4_ 3 -1 1 2 1 5 -1 -1 1 0 21 - 315 inst_CLK_OUT_PRE_50 3 -1 3 2 2 3 -1 -1 1 0 21 - 307 CLK_000_D_8_ 3 -1 3 2 2 3 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 1 2 1 5 -1 -1 1 0 21 - 305 inst_CLK_OUT_PRE_D 3 -1 2 2 0 2 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 3 2 2 3 -1 -1 1 0 21 - 351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 333 CLK_030_PE_0_ 3 -1 0 1 0 -1 -1 9 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 311 CLK_030_PE_1_ 3 -1 0 1 0 -1 -1 6 0 21 - 341 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 334 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 356 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 349 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 346 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 340 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21 - 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 352 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 345 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 336 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 335 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 312 inst_AMIGA_DS 3 -1 7 1 0 -1 -1 2 0 21 - 324 CLK_000_D_10_ 3 -1 2 1 2 -1 -1 1 0 21 - 323 CLK_000_D_7_ 3 -1 6 1 3 -1 -1 1 0 21 - 322 CLK_000_D_6_ 3 -1 3 1 6 -1 -1 1 0 21 - 321 CLK_000_D_5_ 3 -1 1 1 3 -1 -1 1 0 21 - 319 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 - 318 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 317 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 316 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 309 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21 - 308 CLK_000_D_9_ 3 -1 3 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 1 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 1 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 1 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 1 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 1 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 1 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 2 63 -1 - 59 A_1_ 1 -1 -1 2 0 6 59 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 2 RESET 1 -1 -1 2 1 2 2 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 4 10 -1 -127 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 7 0 1 3 4 5 6 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 79 RW_000 5 350 7 3 2 4 6 79 -1 4 0 21 - 70 RW 5 357 6 2 0 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 - 78 SIZE_1_ 5 348 7 1 0 78 -1 3 0 21 - 69 SIZE_0_ 5 358 6 1 0 69 -1 3 0 21 - 68 A_0_ 5 351 6 1 0 68 -1 3 0 21 - 40 BERR 5 -1 4 1 3 40 -1 1 0 21 - 29 DTACK 5 -1 3 1 2 29 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 349 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 355 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 353 1 0 6 -1 10 0 21 - 82 BGACK_030 5 354 7 0 82 -1 3 0 21 - 34 VMA 5 356 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 352 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 354 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 314 CLK_000_D_0_ 3 -1 2 6 0 1 3 5 6 7 -1 -1 1 0 21 - 313 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 - 310 inst_RESET_OUT 3 -1 6 5 0 3 4 6 7 -1 -1 2 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 3 0 3 5 -1 -1 7 0 21 - 302 inst_AS_000_DMA 3 -1 2 3 2 3 7 -1 -1 6 0 21 - 345 SM_AMIGA_i_7_ 3 -1 0 3 0 5 7 -1 -1 3 1 21 - 332 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 3 0 21 - 330 SM_AMIGA_6_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 - 346 CLK_OUT_INTreg 3 -1 6 3 1 2 6 -1 -1 1 0 21 - 305 inst_CLK_OUT_PRE_D 3 -1 6 3 1 2 6 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 3 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 - 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 344 SM_AMIGA_2_ 3 -1 3 2 1 3 -1 -1 5 0 21 - 339 inst_DSACK1_INT 3 -1 1 2 1 7 -1 -1 5 0 21 - 333 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 4 0 21 - 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 342 SM_AMIGA_5_ 3 -1 7 2 0 7 -1 -1 3 0 21 - 341 SM_AMIGA_1_ 3 -1 1 2 1 5 -1 -1 3 0 21 - 331 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 3 0 21 - 328 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 - 327 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21 - 340 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 334 CYCLE_DMA_1_ 3 -1 0 2 0 2 -1 -1 2 0 21 - 329 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 315 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 1 2 0 5 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 - 355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 353 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 335 CLK_030_PE_0_ 3 -1 2 1 2 -1 -1 9 0 21 - 311 CLK_030_PE_1_ 3 -1 2 1 2 -1 -1 6 0 21 - 343 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 - 350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 336 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 358 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 356 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 348 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 357 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 352 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 347 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 338 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 337 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 312 inst_AMIGA_DS 3 -1 7 1 2 -1 -1 2 0 21 - 326 CLK_000_D_12_ 3 -1 1 1 1 -1 -1 1 0 21 - 325 CLK_000_D_9_ 3 -1 5 1 2 -1 -1 1 0 21 - 324 CLK_000_D_8_ 3 -1 2 1 5 -1 -1 1 0 21 - 323 CLK_000_D_7_ 3 -1 1 1 2 -1 -1 1 0 21 - 322 CLK_000_D_6_ 3 -1 6 1 1 -1 -1 1 0 21 - 321 CLK_000_D_5_ 3 -1 0 1 6 -1 -1 1 0 21 - 320 CLK_000_D_4_ 3 -1 5 1 0 -1 -1 1 0 21 - 319 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 - 318 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 317 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 316 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 309 inst_DTACK_D0 3 -1 2 1 3 -1 -1 1 0 21 - 308 CLK_000_D_11_ 3 -1 1 1 1 -1 -1 1 0 21 - 307 CLK_000_D_10_ 3 -1 2 1 1 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 63 CLK_030 1 -1 -1 2 1 2 63 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 2 RESET 1 -1 -1 2 1 2 2 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 59 A_1_ 1 -1 -1 1 5 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 -126 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 79 RW_000 5 349 7 3 2 4 6 79 -1 4 0 21 - 70 RW 5 356 6 2 0 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 - 78 SIZE_1_ 5 347 7 1 3 78 -1 3 0 21 - 69 SIZE_0_ 5 357 6 1 3 69 -1 3 0 21 - 68 A_0_ 5 350 6 1 3 68 -1 3 0 21 - 40 BERR 5 -1 4 1 0 40 -1 1 0 21 - 29 DTACK 5 -1 3 1 2 29 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 348 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 353 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 351 1 0 6 -1 10 0 21 - 82 BGACK_030 5 354 7 0 82 -1 3 0 21 - 34 VMA 5 355 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 352 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 354 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 314 CLK_000_D_0_ 3 -1 6 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 313 CLK_000_D_1_ 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 310 inst_RESET_OUT 3 -1 5 6 0 3 4 5 6 7 -1 -1 2 0 21 - 329 SM_AMIGA_6_ 3 -1 1 4 0 1 3 7 -1 -1 3 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 3 1 3 5 -1 -1 7 0 21 - 302 inst_AS_000_DMA 3 -1 2 3 2 3 7 -1 -1 6 0 21 - 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 344 SM_AMIGA_i_7_ 3 -1 1 3 1 5 7 -1 -1 3 1 21 - 340 SM_AMIGA_1_ 3 -1 6 3 2 6 7 -1 -1 3 0 21 - 345 CLK_OUT_INTreg 3 -1 6 3 1 2 6 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 3 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 - 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 343 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 5 0 21 - 338 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 5 0 21 - 332 CYCLE_DMA_0_ 3 -1 1 2 1 2 -1 -1 4 0 21 - 355 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 331 SM_AMIGA_0_ 3 -1 7 2 1 7 -1 -1 3 0 21 - 327 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 339 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 333 CYCLE_DMA_1_ 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 320 CLK_000_D_4_ 3 -1 5 2 0 1 -1 -1 1 0 21 - 315 inst_CLK_OUT_PRE_50 3 -1 0 2 0 1 -1 -1 1 0 21 - 308 CLK_000_D_10_ 3 -1 5 2 2 5 -1 -1 1 0 21 - 307 CLK_000_D_9_ 3 -1 2 2 2 5 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 3 2 1 5 -1 -1 1 0 21 - 305 inst_CLK_OUT_PRE_D 3 -1 1 2 2 6 -1 -1 1 0 21 + 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 6 0 21 + 325 CYCLE_DMA_0_ 3 -1 1 2 1 2 -1 -1 4 0 21 + 341 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 333 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 329 SM_AMIGA_5_ 3 -1 5 2 5 6 -1 -1 3 0 21 + 323 SM_AMIGA_1_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 328 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 327 inst_DSACK1_INT 3 -1 6 2 6 7 -1 -1 2 0 21 + 326 CYCLE_DMA_1_ 3 -1 1 2 1 2 -1 -1 2 0 21 + 317 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 4 2 0 2 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 7 2 4 7 -1 -1 1 0 21 304 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 351 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 348 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 334 CLK_030_PE_0_ 3 -1 2 1 2 -1 -1 9 0 21 - 311 CLK_030_PE_1_ 3 -1 2 1 2 -1 -1 6 0 21 - 342 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 - 349 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 335 RST_DLY_0_ 3 -1 5 1 5 -1 -1 4 0 21 - 357 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 350 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 347 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 341 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 - 330 SM_AMIGA_4_ 3 -1 0 1 0 -1 -1 3 0 21 - 326 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 - 356 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 352 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 346 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 337 RST_DLY_2_ 3 -1 5 1 5 -1 -1 2 0 21 - 336 RST_DLY_1_ 3 -1 5 1 5 -1 -1 2 1 21 - 328 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 312 inst_AMIGA_DS 3 -1 7 1 2 -1 -1 2 0 21 - 325 CLK_000_D_11_ 3 -1 5 1 2 -1 -1 1 0 21 - 324 CLK_000_D_8_ 3 -1 6 1 2 -1 -1 1 0 21 - 323 CLK_000_D_7_ 3 -1 5 1 6 -1 -1 1 0 21 - 322 CLK_000_D_6_ 3 -1 6 1 5 -1 -1 1 0 21 - 321 CLK_000_D_5_ 3 -1 0 1 6 -1 -1 1 0 21 - 319 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21 - 318 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 317 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 316 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 309 inst_DTACK_D0 3 -1 2 1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 2 RESET 1 -1 -1 2 1 2 2 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 63 CLK_030 1 -1 -1 1 2 63 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -127 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 7 0 1 3 4 5 6 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 79 RW_000 5 350 7 3 2 4 6 79 -1 4 0 21 - 70 RW 5 357 6 2 0 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 - 78 SIZE_1_ 5 348 7 1 0 78 -1 3 0 21 - 69 SIZE_0_ 5 358 6 1 0 69 -1 3 0 21 - 68 A_0_ 5 351 6 1 0 68 -1 3 0 21 - 40 BERR 5 -1 4 1 3 40 -1 1 0 21 - 29 DTACK 5 -1 3 1 2 29 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 349 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 355 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 353 1 0 6 -1 10 0 21 - 82 BGACK_030 5 354 7 0 82 -1 3 0 21 - 34 VMA 5 356 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 352 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 354 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 314 CLK_000_D_0_ 3 -1 2 6 0 1 3 5 6 7 -1 -1 1 0 21 - 313 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 - 310 inst_RESET_OUT 3 -1 6 5 0 3 4 6 7 -1 -1 2 0 21 - 300 inst_AS_030_000_SYNC 3 -1 5 3 0 3 5 -1 -1 7 0 21 - 302 inst_AS_000_DMA 3 -1 2 3 2 3 7 -1 -1 6 0 21 - 345 SM_AMIGA_i_7_ 3 -1 0 3 0 5 7 -1 -1 3 1 21 - 332 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 3 0 21 - 330 SM_AMIGA_6_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 - 346 CLK_OUT_INTreg 3 -1 6 3 1 2 6 -1 -1 1 0 21 - 305 inst_CLK_OUT_PRE_D 3 -1 6 3 1 2 6 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 4 3 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 - 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 344 SM_AMIGA_2_ 3 -1 3 2 1 3 -1 -1 5 0 21 - 339 inst_DSACK1_INT 3 -1 1 2 1 7 -1 -1 5 0 21 - 333 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 4 0 21 - 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 4 0 21 - 342 SM_AMIGA_5_ 3 -1 7 2 0 7 -1 -1 3 0 21 - 341 SM_AMIGA_1_ 3 -1 1 2 1 5 -1 -1 3 0 21 - 331 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 3 0 21 - 328 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 - 327 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21 - 340 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 334 CYCLE_DMA_1_ 3 -1 0 2 0 2 -1 -1 2 0 21 - 329 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 315 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21 - 306 CLK_000_D_3_ 3 -1 1 2 0 5 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 - 355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 353 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 335 CLK_030_PE_0_ 3 -1 2 1 2 -1 -1 9 0 21 - 311 CLK_030_PE_1_ 3 -1 2 1 2 -1 -1 6 0 21 - 343 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 - 350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 336 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 358 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 356 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 348 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 357 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 352 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 347 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 338 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 337 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 312 inst_AMIGA_DS 3 -1 7 1 2 -1 -1 2 0 21 - 326 CLK_000_D_12_ 3 -1 1 1 1 -1 -1 1 0 21 - 325 CLK_000_D_9_ 3 -1 5 1 2 -1 -1 1 0 21 - 324 CLK_000_D_8_ 3 -1 2 1 5 -1 -1 1 0 21 - 323 CLK_000_D_7_ 3 -1 1 1 2 -1 -1 1 0 21 - 322 CLK_000_D_6_ 3 -1 6 1 1 -1 -1 1 0 21 - 321 CLK_000_D_5_ 3 -1 0 1 6 -1 -1 1 0 21 - 320 CLK_000_D_4_ 3 -1 5 1 0 -1 -1 1 0 21 - 319 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 - 318 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 317 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 316 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 309 inst_DTACK_D0 3 -1 2 1 3 -1 -1 1 0 21 - 308 CLK_000_D_11_ 3 -1 1 1 1 -1 -1 1 0 21 - 307 CLK_000_D_10_ 3 -1 2 1 1 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21 + 340 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 339 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 335 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 331 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 + 330 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 336 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 337 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 334 N_60 3 -1 4 1 4 -1 -1 2 0 21 + 307 inst_AMIGA_DS 3 -1 7 1 2 -1 -1 2 0 21 + 300 inst_AS_030_D1 3 -1 5 1 5 -1 -1 2 0 21 + 320 inst_BGACK_030_INT_D 3 -1 4 1 5 -1 -1 1 0 21 + 316 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 5 1 0 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 5 1 5 -1 -1 1 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 1 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 1 3 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 13 nEXP_SPACE 1 -1 -1 4 3 4 5 7 13 -1 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 @@ -9656,142 +1699,16 @@ 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 63 CLK_030 1 -1 -1 2 1 2 63 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 + 59 A_1_ 1 -1 -1 2 0 2 59 -1 + 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 2 RESET 1 -1 -1 2 1 2 2 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 59 A_1_ 1 -1 -1 1 5 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 -119 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 81 AS_030 5 -1 7 6 0 1 2 3 4 7 81 -1 1 0 21 - 79 RW_000 5 345 7 3 0 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 2 6 7 31 -1 1 0 21 - 30 LDS_000 5 -1 3 3 2 6 7 30 -1 1 0 21 - 70 RW 5 350 6 2 2 7 70 -1 2 0 21 - 78 SIZE_1_ 5 341 7 1 5 78 -1 3 0 21 - 69 SIZE_0_ 5 348 6 1 5 69 -1 3 0 21 - 68 A_0_ 5 340 6 1 5 68 -1 3 0 21 - 40 BERR 5 -1 4 1 2 40 -1 1 0 21 - 29 DTACK 5 -1 3 1 1 29 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 344 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 343 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 342 1 0 6 -1 10 0 21 - 82 BGACK_030 5 347 7 0 82 -1 3 0 21 - 34 VMA 5 349 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 346 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 80 DSACK1 0 7 0 80 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 347 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 311 CLK_000_D_0_ 3 -1 3 6 0 2 3 5 6 7 -1 -1 1 0 21 - 310 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 - 307 inst_RESET_OUT 3 -1 6 5 0 3 4 6 7 -1 -1 2 0 21 - 322 SM_AMIGA_6_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 4 1 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 1 3 1 3 5 -1 -1 7 0 21 - 302 inst_AS_000_DMA 3 -1 0 3 0 3 7 -1 -1 6 0 21 - 295 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 293 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 337 SM_AMIGA_i_7_ 3 -1 5 3 1 5 7 -1 -1 3 1 21 - 325 SM_AMIGA_0_ 3 -1 0 3 0 5 7 -1 -1 3 0 21 - 296 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 3 0 21 - 338 CLK_OUT_INTreg 3 -1 3 3 0 1 6 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 3 1 3 4 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 1 1 21 - 336 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 349 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 334 SM_AMIGA_5_ 3 -1 6 2 0 6 -1 -1 3 0 21 - 324 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 323 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 3 0 21 - 320 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 333 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 332 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 - 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 2 0 3 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_50 3 -1 6 2 4 6 -1 -1 1 0 21 - 305 CLK_000_D_3_ 3 -1 5 2 2 5 -1 -1 1 0 21 - 304 inst_VPA_D 3 -1 5 2 2 3 -1 -1 1 0 21 - 344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 343 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 342 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 328 CLK_030_PE_0_ 3 -1 0 1 0 -1 -1 9 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 308 CLK_030_PE_1_ 3 -1 0 1 0 -1 -1 6 0 21 - 335 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 345 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 329 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 - 326 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 348 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 - 341 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 - 340 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 350 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 339 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 331 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 330 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 - 327 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 2 0 21 - 309 inst_AMIGA_DS 3 -1 2 1 0 -1 -1 2 0 21 - 318 CLK_000_D_4_ 3 -1 2 1 5 -1 -1 1 0 21 - 317 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 - 316 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 315 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 314 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 306 inst_DTACK_D0 3 -1 1 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 1 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 1 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 1 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 1 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 1 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 1 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 2 RESET 1 -1 -1 2 1 2 2 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 59 A_1_ 1 -1 -1 1 5 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 5 35 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 5 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 10 CLK_000 1 -1 -1 1 3 10 -1 \ No newline at end of file diff --git a/Logic/68030_tk.plc b/Logic/68030_tk.plc index 1d59f16..0ace62c 100644 --- a/Logic/68030_tk.plc +++ b/Logic/68030_tk.plc @@ -8,15 +8,22 @@ ; Source file 68030_tk.tt4 ; FITTER-generated Placements. ; DEVICE mach447a -; DATE Thu Dec 29 16:02:00 2016 +; DATE Sat Dec 30 00:43:46 2017 +Pin 16 AHIGH_27_ Comb ; S6=1 S9=1 Pair 157 +Pin 17 AHIGH_26_ Comb ; S6=1 S9=1 Pair 155 +Pin 18 AHIGH_25_ Comb ; S6=1 S9=1 Pair 167 +Pin 19 AHIGH_24_ Comb ; S6=1 S9=1 Pair 161 Pin 4 AHIGH_31_ Comb ; S6=1 S9=1 Pair 143 -Pin 56 IPL_1_ -Pin 67 IPL_0_ +Pin 84 A_DECODE_22_ +Pin 94 A_DECODE_21_ Pin 85 A_DECODE_23_ -Pin 57 FC_0_ -Pin 60 A_1_ +Pin 93 A_DECODE_20_ +Pin 97 A_DECODE_19_ +Pin 95 A_DECODE_18_ +Pin 59 A_DECODE_17_ +Pin 96 A_DECODE_16_ Pin 68 IPL_2_ Pin 58 FC_1_ Pin 82 AS_030 Comb ; S6=1 S9=1 Pair 281 @@ -28,121 +35,106 @@ Pin 14 nEXP_SPACE Pin 41 BERR Comb ; S6=1 S9=1 Pair 197 Pin 21 BG_030 Pin 28 BGACK_000 -Pin 64 CLK_030 Pin 11 CLK_000 +Pin 56 IPL_1_ Pin 61 CLK_OSZI +Pin 67 IPL_0_ Pin 65 CLK_DIV_OUT Comb ; S6=1 S9=1 Pair 247 +Pin 57 FC_0_ Pin 10 CLK_EXP Comb ; S6=1 S9=1 Pair 127 +Pin 60 A_1_ Pin 78 FPU_CS Comb ; S6=1 S9=1 Pair 271 Pin 91 FPU_SENSE Pin 81 DSACK1 Comb ; S6=1 S9=1 Pair 283 -Pin 30 DTACK Comb ; S6=1 S9=1 Pair 173 +Pin 30 DTACK Pin 92 AVEC Comb ; S6=1 S9=1 Pair 107 Pin 66 E Comb ; S6=1 S9=1 Pair 251 -Pin 5 AHIGH_30_ Comb ; S6=1 S9=1 Pair 125 Pin 36 VPA +Pin 86 RST +Pin 33 AMIGA_ADDR_ENABLE Comb ; S6=1 S9=1 Pair 181 +Pin 48 AMIGA_BUS_DATA_DIR Comb ; S6=1 S9=1 Pair 199 +Pin 20 AMIGA_BUS_ENABLE_LOW Comb ; S6=1 S9=1 Pair 151 +Pin 34 AMIGA_BUS_ENABLE_HIGH Comb ; S6=1 S9=1 Pair 179 +Pin 47 CIIN Comb ; S6=1 S9=1 Pair 215 +Pin 5 AHIGH_30_ Comb ; S6=1 S9=1 Pair 125 Pin 6 AHIGH_29_ Comb ; S6=1 S9=1 Pair 137 Pin 15 AHIGH_28_ Comb ; S6=1 S9=1 Pair 149 -Pin 86 RST -Pin 16 AHIGH_27_ Comb ; S6=1 S9=1 Pair 157 -Pin 3 RESET -Pin 17 AHIGH_26_ Comb ; S6=1 S9=1 Pair 155 -Pin 18 AHIGH_25_ Comb ; S6=1 S9=1 Pair 167 -Pin 33 AMIGA_ADDR_ENABLE Comb ; S6=1 S9=1 Pair 187 -Pin 19 AHIGH_24_ Comb ; S6=1 S9=1 Pair 161 -Pin 48 AMIGA_BUS_DATA_DIR Comb ; S6=1 S9=1 Pair 199 -Pin 84 A_DECODE_22_ -Pin 20 AMIGA_BUS_ENABLE_LOW Comb ; S6=1 S9=1 Pair 151 -Pin 94 A_DECODE_21_ -Pin 34 AMIGA_BUS_ENABLE_HIGH Comb ; S6=1 S9=1 Pair 181 -Pin 93 A_DECODE_20_ -Pin 47 CIIN Comb ; S6=1 S9=1 Pair 215 -Pin 97 A_DECODE_19_ -Pin 95 A_DECODE_18_ -Pin 59 A_DECODE_17_ -Pin 96 A_DECODE_16_ -Pin 69 A_0_ Reg ; S6=1 S9=1 Pair 257 Pin 79 SIZE_1_ Reg ; S6=1 S9=1 Pair 287 -Pin 7 IPL_030_1_ Reg ; S6=1 S9=1 Pair 139 -Pin 8 IPL_030_0_ Reg ; S6=1 S9=1 Pair 133 Pin 9 IPL_030_2_ Reg ; S6=1 S9=1 Pair 131 Pin 80 RW_000 Reg ; S6=1 S9=1 Pair 269 Pin 29 BG_000 Reg ; S6=1 S9=1 Pair 175 Pin 83 BGACK_030 Reg ; S6=1 S9=1 Pair 275 -Pin 70 SIZE_0_ Reg ; S6=1 S9=1 Pair 263 -Pin 35 VMA Reg ; S6=1 S9=1 Pair 179 +Pin 69 A_0_ Reg ; S6=1 S9=1 Pair 257 +Pin 7 IPL_030_1_ Reg ; S6=1 S9=1 Pair 139 +Pin 8 IPL_030_0_ Reg ; S6=1 S9=1 Pair 133 +Pin 35 VMA Reg ; S6=1 S9=1 Pair 173 Pin 71 RW Reg ; S6=1 S9=1 Pair 245 +Pin 70 SIZE_0_ Reg ; S6=1 S9=1 Pair 263 +Node 157 RN_AHIGH_27_ Comb ; S6=1 S9=1 +Node 155 RN_AHIGH_26_ Comb ; S6=1 S9=1 +Node 167 RN_AHIGH_25_ Comb ; S6=1 S9=1 +Node 161 RN_AHIGH_24_ Comb ; S6=1 S9=1 Node 143 RN_AHIGH_31_ Comb ; S6=1 S9=1 Node 281 RN_AS_030 Comb ; S6=1 S9=1 Node 203 RN_AS_000 Comb ; S6=1 S9=1 Node 185 RN_UDS_000 Comb ; S6=1 S9=1 Node 191 RN_LDS_000 Comb ; S6=1 S9=1 Node 197 RN_BERR Comb ; S6=1 S9=1 -Node 173 RN_DTACK Comb ; S6=1 S9=1 Node 125 RN_AHIGH_30_ Comb ; S6=1 S9=1 Node 137 RN_AHIGH_29_ Comb ; S6=1 S9=1 Node 149 RN_AHIGH_28_ Comb ; S6=1 S9=1 -Node 157 RN_AHIGH_27_ Comb ; S6=1 S9=1 -Node 155 RN_AHIGH_26_ Comb ; S6=1 S9=1 -Node 167 RN_AHIGH_25_ Comb ; S6=1 S9=1 -Node 161 RN_AHIGH_24_ Comb ; S6=1 S9=1 -Node 257 RN_A_0_ Reg ; S6=1 S9=1 Node 287 RN_SIZE_1_ Reg ; S6=1 S9=1 -Node 139 RN_IPL_030_1_ Reg ; S6=1 S9=1 -Node 133 RN_IPL_030_0_ Reg ; S6=1 S9=1 Node 131 RN_IPL_030_2_ Reg ; S6=1 S9=1 Node 269 RN_RW_000 Reg ; S6=1 S9=1 Node 175 RN_BG_000 Reg ; S6=1 S9=1 Node 275 RN_BGACK_030 Reg ; S6=1 S9=1 -Node 263 RN_SIZE_0_ Reg ; S6=1 S9=1 -Node 179 RN_VMA Reg ; S6=1 S9=1 +Node 257 RN_A_0_ Reg ; S6=1 S9=1 +Node 139 RN_IPL_030_1_ Reg ; S6=1 S9=1 +Node 133 RN_IPL_030_0_ Reg ; S6=1 S9=1 +Node 173 RN_VMA Reg ; S6=1 S9=1 Node 245 RN_RW Reg ; S6=1 S9=1 -Node 182 cpu_est_1_ Reg ; S6=1 S9=1 -Node 194 cpu_est_2_ Reg ; S6=1 S9=1 -Node 176 cpu_est_3_ Reg ; S6=1 S9=1 +Node 263 RN_SIZE_0_ Reg ; S6=1 S9=1 Node 259 cpu_est_0_ Reg ; S6=1 S9=1 -Node 235 inst_AMIGA_BUS_ENABLE_DMA_HIGH Reg ; S6=1 S9=1 -Node 229 inst_AMIGA_BUS_ENABLE_DMA_LOW Reg ; S6=1 S9=1 -Node 272 inst_AS_030_D0 Reg ; S6=1 S9=1 -Node 145 inst_AS_030_000_SYNC Reg ; S6=1 S9=1 -Node 289 inst_BGACK_030_INT_D Reg ; S6=1 S9=1 -Node 113 inst_AS_000_DMA Reg ; S6=1 S9=1 -Node 121 inst_DS_000_DMA Reg ; S6=1 S9=1 -Node 224 inst_VPA_D Reg ; S6=1 S9=1 +Node 193 cpu_est_1_ Reg ; S6=1 S9=1 +Node 176 cpu_est_2_ Reg ; S6=1 S9=1 +Node 113 cpu_est_3_ Reg ; S6=1 S9=1 +Node 116 inst_AMIGA_BUS_ENABLE_DMA_HIGH Reg ; S6=1 S9=1 +Node 164 inst_AMIGA_BUS_ENABLE_DMA_LOW Reg ; S6=1 S9=1 +Node 209 inst_AS_030_D0 Reg ; S6=1 S9=1 +Node 223 inst_AS_030_D1 Reg ; S6=1 S9=1 +Node 227 inst_AS_030_000_SYNC Reg ; S6=1 S9=1 +Node 169 inst_AS_000_DMA Reg ; S6=1 S9=1 +Node 163 inst_DS_000_DMA Reg ; S6=1 S9=1 +Node 254 inst_VPA_D Reg ; S6=1 S9=1 Node 241 CLK_000_D_3_ Reg ; S6=1 S9=1 -Node 146 inst_DTACK_D0 Reg ; S6=1 S9=1 -Node 253 inst_RESET_OUT Reg ; S6=1 S9=1 -Node 104 CLK_030_PE_1_ Reg ; S6=1 S9=1 -Node 164 inst_AMIGA_DS Reg ; S6=1 S9=1 +Node 235 inst_DTACK_D0 Reg ; S6=1 S9=1 +Node 272 inst_AMIGA_DS Reg ; S6=1 S9=1 Node 277 CLK_000_D_1_ Reg ; S6=1 S9=1 -Node 193 CLK_000_D_0_ Reg ; S6=1 S9=1 -Node 248 inst_CLK_OUT_PRE_50 Reg ; S6=1 S9=1 -Node 209 inst_CLK_OUT_PRE_D Reg ; S6=1 S9=1 -Node 140 IPL_D0_0_ Reg ; S6=1 S9=1 -Node 134 IPL_D0_1_ Reg ; S6=1 S9=1 -Node 128 IPL_D0_2_ Reg ; S6=1 S9=1 +Node 187 CLK_000_D_0_ Reg ; S6=1 S9=1 +Node 289 inst_CLK_OUT_PRE_50 Reg ; S6=1 S9=1 +Node 205 inst_CLK_OUT_PRE_D Reg ; S6=1 S9=1 +Node 110 IPL_D0_0_ Reg ; S6=1 S9=1 +Node 182 IPL_D0_1_ Reg ; S6=1 S9=1 +Node 104 IPL_D0_2_ Reg ; S6=1 S9=1 Node 278 CLK_000_D_2_ Reg ; S6=1 S9=1 -Node 170 CLK_000_D_4_ Reg ; S6=1 S9=1 -Node 239 inst_LDS_000_INT Reg ; S6=1 S9=1 -Node 169 inst_DS_000_ENABLE Reg ; S6=1 S9=1 -Node 223 inst_UDS_000_INT Reg ; S6=1 S9=1 +Node 229 CLK_000_D_4_ Reg ; S6=1 S9=1 +Node 134 inst_UDS_000_INT Reg ; S6=1 S9=1 +Node 152 inst_DS_000_ENABLE Reg ; S6=1 S9=1 +Node 265 inst_LDS_000_INT Reg ; S6=1 S9=1 +Node 217 inst_BGACK_030_INT_D Reg ; S6=1 S9=1 Node 221 SM_AMIGA_6_ Reg ; S6=1 S9=1 -Node 103 SM_AMIGA_4_ Reg ; S6=1 S9=1 -Node 233 SM_AMIGA_1_ Reg ; S6=1 S9=1 +Node 253 SM_AMIGA_4_ Reg ; S6=1 S9=1 +Node 109 SM_AMIGA_1_ Reg ; S6=1 S9=1 Node 119 SM_AMIGA_0_ Reg ; S6=1 S9=1 -Node 110 CYCLE_DMA_0_ Reg ; S6=1 S9=1 -Node 116 CYCLE_DMA_1_ Reg ; S6=1 S9=1 -Node 115 CLK_030_PE_0_ Reg ; S6=1 S9=1 -Node 254 RST_DLY_0_ Reg ; S6=1 S9=1 -Node 266 RST_DLY_1_ Reg ; S6=1 S9=1 -Node 260 RST_DLY_2_ Reg ; S6=1 S9=1 -Node 109 inst_DSACK1_INT Reg ; S6=1 S9=1 -Node 152 inst_AS_000_INT Reg ; S6=1 S9=1 -Node 265 SM_AMIGA_5_ Reg ; S6=1 S9=1 -Node 158 SM_AMIGA_3_ Reg ; S6=1 S9=1 -Node 163 SM_AMIGA_2_ Reg ; S6=1 S9=1 -Node 227 SM_AMIGA_i_7_ Reg ; S6=1 S9=1 -Node 188 CLK_OUT_INTreg Reg ; S6=1 S9=1 -Node 205 CIIN_0 Comb ; S6=1 S9=1 +Node 145 CYCLE_DMA_0_ Reg ; S6=1 S9=1 +Node 128 CYCLE_DMA_1_ Reg ; S6=1 S9=1 +Node 248 inst_DSACK1_INT Reg ; S6=1 S9=1 +Node 158 inst_AS_000_INT Reg ; S6=1 S9=1 +Node 239 SM_AMIGA_5_ Reg ; S6=1 S9=1 +Node 121 SM_AMIGA_3_ Reg ; S6=1 S9=1 +Node 115 SM_AMIGA_2_ Reg ; S6=1 S9=1 +Node 103 CLK_OUT_INTreg Reg ; S6=1 S9=1 +Node 233 SM_AMIGA_i_7_ Reg ; S6=1 S9=1 +Node 211 N_60 Comb ; S6=1 S9=1 ; Unused Pins & Nodes ; -> None Found. diff --git a/Logic/68030_tk.prd b/Logic/68030_tk.prd index 1bcad98..6fc95fa 100644 --- a/Logic/68030_tk.prd +++ b/Logic/68030_tk.prd @@ -5,8 +5,8 @@ |--------------------------------------------| -Start: Thu Dec 29 16:02:00 2016 -End : Thu Dec 29 16:02:00 2016 $$$ Elapsed time: 00:00:00 +Start: Sat Dec 30 00:43:46 2017 +End : Sat Dec 30 00:43:46 2017 $$$ Elapsed time: 00:00:00 =========================================================================== Part [E:/ispLEVER_Classic2_0/ispcpld/dat/mach4a/mach447a] Design [68030_tk.tt4] @@ -21,33 +21,33 @@ Part [E:/ispLEVER_Classic2_0/ispcpld/dat/mach4a/mach447a] Design [68030_tk.tt4] | | +- Signals to Place | | +----- Logic Array Inputs | | | +- Placed | | | +- Array Inputs Used _|____|____|____|_______________|____|_____________|___|________________ - 0 | 16 | 11 | 11 => 100% | 8 | 8 => 100% | 33 | 24 => 72% - 1 | 16 | 12 | 12 => 100% | 8 | 8 => 100% | 33 | 26 => 78% - 2 | 16 | 12 | 12 => 100% | 8 | 7 => 87% | 33 | 26 => 78% - 3 | 16 | 12 | 12 => 100% | 8 | 8 => 100% | 33 | 24 => 72% - 4 | 16 | 6 | 6 => 100% | 8 | 4 => 50% | 33 | 30 => 90% - 5 | 16 | 9 | 9 => 100% | 8 | 5 => 62% | 33 | 24 => 72% - 6 | 16 | 12 | 12 => 100% | 8 | 7 => 87% | 33 | 24 => 72% - 7 | 16 | 10 | 10 => 100% | 8 | 8 => 100% | 33 | 27 => 81% + 0 | 16 | 11 | 11 => 100% | 8 | 8 => 100% | 33 | 23 => 69% + 1 | 16 | 10 | 10 => 100% | 8 | 7 => 87% | 33 | 20 => 60% + 2 | 16 | 11 | 11 => 100% | 8 | 7 => 87% | 33 | 21 => 63% + 3 | 16 | 10 | 10 => 100% | 8 | 8 => 100% | 33 | 22 => 66% + 4 | 16 | 8 | 8 => 100% | 8 | 4 => 50% | 33 | 30 => 90% + 5 | 16 | 8 | 8 => 100% | 8 | 5 => 62% | 33 | 24 => 72% + 6 | 16 | 10 | 10 => 100% | 8 | 7 => 87% | 33 | 23 => 69% + 7 | 16 | 10 | 10 => 100% | 8 | 8 => 100% | 33 | 25 => 75% ---|----|----|------------|-------|------------|-----|------------------ - | Avg number of array inputs in used blocks : 25.63 => 77% + | Avg number of array inputs in used blocks : 23.50 => 71% -* Input/Clock Signal count: 24 -> placed: 24 = 100% +* Input/Clock Signal count: 23 -> placed: 23 = 100% Resources Available Used ----------------------------------------------------------------- Input Pins : 2 2 => 100% - I/O Pins : 64 55 => 85% + I/O Pins : 64 54 => 84% Clock Only Pins : 0 0 => 0% - Clock/Input Pins : 4 4 => 100% + Clock/Input Pins : 4 3 => 75% Logic Blocks : 8 8 => 100% - Macrocells : 128 84 => 65% - PT Clusters : 128 56 => 43% - - Single PT Clusters : 128 38 => 29% + Macrocells : 128 78 => 60% + PT Clusters : 128 44 => 34% + - Single PT Clusters : 128 40 => 31% Input Registers : 0 * Routing Completion: 100% -* Attempts: Place [ 119] Route [ 0] +* Attempts: Place [ 108] Route [ 0] =========================================================================== Signal Fanout Table =========================================================================== @@ -69,21 +69,20 @@ ___|__|__|____|____________________________________________________________ 10| 4|OUT| 48|=> ....|....| AMIGA_BUS_DATA_DIR 11| 3|OUT| 34|=> ....|....| AMIGA_BUS_ENABLE_HIGH 12| 2|OUT| 20|=> ....|....| AMIGA_BUS_ENABLE_LOW - 13| 4| IO| 42|=> 0...|4..7| AS_000 - 14| 7| IO| 82|=> 0123|4..7| AS_030 + 13| 4| IO| 42|=> 012.|4..7| AS_000 + 14| 7| IO| 82|=> ..23|4567| AS_030 15| 0|OUT| 92|=> ....|....| AVEC - 16| 6| IO| 69|=> ....|.5..| A_0_ - |=> Paired w/: RN_A_0_ - 17| 5|INP| 60|=> ....|.5..| A_1_ - 18| 0|INP| 96|=> .1..|4..7| A_DECODE_16_ - 19| 5|INP| 59|=> .1..|4..7| A_DECODE_17_ - 20| 0|INP| 95|=> .1..|4..7| A_DECODE_18_ - 21| 0|INP| 97|=> .1..|4..7| A_DECODE_19_ + 16| 6| IO| 69|=> .1..|..6.| A_0_ + 17| 5|INP| 60|=> 0.2.|....| A_1_ + 18| 0|INP| 96|=> ....|45.7| A_DECODE_16_ + 19| 5|INP| 59|=> ....|45.7| A_DECODE_17_ + 20| 0|INP| 95|=> ....|45.7| A_DECODE_18_ + 21| 0|INP| 97|=> ....|45.7| A_DECODE_19_ 22| 0|INP| 93|=> ....|4...| A_DECODE_20_ 23| 0|INP| 94|=> ....|4...| A_DECODE_21_ 24| 7|INP| 84|=> ....|4...| A_DECODE_22_ 25| 7|INP| 85|=> ....|4...| A_DECODE_23_ - 26| 4| IO| 41|=> ..2.|....| BERR + 26| 4| IO| 41|=> 0...|....| BERR 27| 3|INP| 28|=> ....|4..7| BGACK_000 28| 7| IO| 83|=> ....|....| BGACK_030 |=> Paired w/: RN_BGACK_030 @@ -91,113 +90,95 @@ ___|__|__|____|____________________________________________________________ |=> Paired w/: RN_BG_000 30| 2|INP| 21|=> ...3|....| BG_030 31| 4|OUT| 47|=> ....|....| CIIN - 32| 4|NOD| . |=> ....|4...| CIIN_0 - 33| +|INP| 11|=> ...3|....| CLK_000 - 34| 3|NOD| . |=> 0.23|.567| CLK_000_D_0_ - 35| 7|NOD| . |=> 0.23|.567| CLK_000_D_1_ - 36| 7|NOD| . |=> ....|.5..| CLK_000_D_2_ - 37| 5|NOD| . |=> ..2.|.5..| CLK_000_D_3_ - 38| 2|NOD| . |=> ....|.5..| CLK_000_D_4_ - 39| +|INP| 64|=> 0...|....| CLK_030 - 40| 0|NOD| . |=> 0...|....| CLK_030_PE_0_ - 41| 0|NOD| . |=> 0...|....| CLK_030_PE_1_ - 42| 6|OUT| 65|=> ....|....| CLK_DIV_OUT - 43| 1|OUT| 10|=> ....|....| CLK_EXP - 44| +|Cin| 61|=> ....|....| CLK_OSZI - 45| 3|NOD| . |=> 01..|..6.| CLK_OUT_INTreg - 46| 0|NOD| . |=> 0...|....| CYCLE_DMA_0_ - 47| 0|NOD| . |=> 0...|....| CYCLE_DMA_1_ - 48| 7|OUT| 81|=> ....|....| DSACK1 - 49| 0|OUT| 98|=> ....|....| DS_030 - 50| 3| IO| 30|=> .1..|....| DTACK - 51| 6|OUT| 66|=> ....|....| E - 52| 5|INP| 57|=> .1..|4..7| FC_0_ - 53| 5|INP| 58|=> .1..|4..7| FC_1_ - 54| 7|OUT| 78|=> ....|....| FPU_CS - 55| 0|INP| 91|=> ....|4..7| FPU_SENSE - 56| 1| IO| 8|=> ....|....| IPL_030_0_ + 32| +|INP| 11|=> ...3|....| CLK_000 + 33| 3|NOD| . |=> 0123|.567| CLK_000_D_0_ + 34| 7|NOD| . |=> 0123|.567| CLK_000_D_1_ + 35| 7|NOD| . |=> ....|.5..| CLK_000_D_2_ + 36| 5|NOD| . |=> ....|.5..| CLK_000_D_3_ + 37| 5|NOD| . |=> ....|.5..| CLK_000_D_4_ + 38| 6|OUT| 65|=> ....|....| CLK_DIV_OUT + 39| 1|OUT| 10|=> ....|....| CLK_EXP + 40| +|Cin| 61|=> ....|....| CLK_OSZI + 41| 0|NOD| . |=> .12.|..6.| CLK_OUT_INTreg + 42| 1|NOD| . |=> .12.|....| CYCLE_DMA_0_ + 43| 1|NOD| . |=> .12.|....| CYCLE_DMA_1_ + 44| 7|OUT| 81|=> ....|....| DSACK1 + 45| 0|OUT| 98|=> ....|....| DS_030 + 46| 3|INP| 30|=> ....|.5..| DTACK + 47| 6|OUT| 66|=> ....|....| E + 48| 5|INP| 57|=> ....|45.7| FC_0_ + 49| 5|INP| 58|=> ....|45.7| FC_1_ + 50| 7|OUT| 78|=> ....|....| FPU_CS + 51| 0|INP| 91|=> ....|4..7| FPU_SENSE + 52| 1| IO| 8|=> ....|....| IPL_030_0_ |=> Paired w/: RN_IPL_030_0_ - 57| 1| IO| 7|=> ....|....| IPL_030_1_ + 53| 1| IO| 7|=> ....|....| IPL_030_1_ |=> Paired w/: RN_IPL_030_1_ - 58| 1| IO| 9|=> ....|....| IPL_030_2_ + 54| 1| IO| 9|=> ....|....| IPL_030_2_ |=> Paired w/: RN_IPL_030_2_ - 59| 6|INP| 67|=> .1..|....| IPL_0_ - 60| 5|INP| 56|=> .1..|....| IPL_1_ - 61| 6|INP| 68|=> .1..|....| IPL_2_ - 62| 1|NOD| . |=> .1..|....| IPL_D0_0_ - 63| 1|NOD| . |=> .1..|....| IPL_D0_1_ - 64| 1|NOD| . |=> .1..|....| IPL_D0_2_ - 65| 3| IO| 31|=> ..2.|..67| LDS_000 - 66| 1|INP| 3|=> .12.|....| RESET - 67| 6|NOD| . |=> ....|..6.| RN_A_0_ - |=> Paired w/: A_0_ - 68| 7|NOD| . |=> 0123|4567| RN_BGACK_030 + 55| 6|INP| 67|=> 01..|....| IPL_0_ + 56| 5|INP| 56|=> .1.3|....| IPL_1_ + 57| 6|INP| 68|=> 01..|....| IPL_2_ + 58| 0|NOD| . |=> .1..|....| IPL_D0_0_ + 59| 3|NOD| . |=> .1..|....| IPL_D0_1_ + 60| 0|NOD| . |=> .1..|....| IPL_D0_2_ + 61| 3| IO| 31|=> ....|..67| LDS_000 + 62| 4|NOD| . |=> ....|4...| N_60 + 63| 7|NOD| . |=> 0123|4567| RN_BGACK_030 |=> Paired w/: BGACK_030 - 69| 3|NOD| . |=> ...3|....| RN_BG_000 + 64| 3|NOD| . |=> ...3|....| RN_BG_000 |=> Paired w/: BG_000 - 70| 1|NOD| . |=> .1..|....| RN_IPL_030_0_ + 65| 1|NOD| . |=> .1..|....| RN_IPL_030_0_ |=> Paired w/: IPL_030_0_ - 71| 1|NOD| . |=> .1..|....| RN_IPL_030_1_ + 66| 1|NOD| . |=> .1..|....| RN_IPL_030_1_ |=> Paired w/: IPL_030_1_ - 72| 1|NOD| . |=> .1..|....| RN_IPL_030_2_ + 67| 1|NOD| . |=> .1..|....| RN_IPL_030_2_ |=> Paired w/: IPL_030_2_ - 73| 6|NOD| . |=> ....|..6.| RN_RW - |=> Paired w/: RW - 74| 7|NOD| . |=> ....|...7| RN_RW_000 + 68| 7|NOD| . |=> ....|...7| RN_RW_000 |=> Paired w/: RW_000 - 75| 6|NOD| . |=> ....|..6.| RN_SIZE_0_ - |=> Paired w/: SIZE_0_ - 76| 7|NOD| . |=> ....|...7| RN_SIZE_1_ - |=> Paired w/: SIZE_1_ - 77| 3|NOD| . |=> ..23|....| RN_VMA + 69| 3|NOD| . |=> 0..3|....| RN_VMA |=> Paired w/: VMA - 78| +|INP| 86|=> 0123|.567| RST - 79| 6|NOD| . |=> ....|..6.| RST_DLY_0_ - 80| 6|NOD| . |=> ....|..6.| RST_DLY_1_ - 81| 6|NOD| . |=> ....|..6.| RST_DLY_2_ - 82| 6| IO| 71|=> ..2.|...7| RW - |=> Paired w/: RN_RW - 83| 7| IO| 80|=> 0...|4.6.| RW_000 + 70| +|INP| 86|=> 0123|4567| RST + 71| 6| IO| 71|=> ..2.|...7| RW + 72| 7| IO| 80|=> ..2.|4.6.| RW_000 |=> Paired w/: RN_RW_000 - 84| 6| IO| 70|=> ....|.5..| SIZE_0_ - |=> Paired w/: RN_SIZE_0_ - 85| 7| IO| 79|=> ....|.5..| SIZE_1_ - |=> Paired w/: RN_SIZE_1_ - 86| 0|NOD| . |=> 0...|.5.7| SM_AMIGA_0_ - 87| 5|NOD| . |=> 0...|.5..| SM_AMIGA_1_ - 88| 2|NOD| . |=> ..2.|.5..| SM_AMIGA_2_ - 89| 2|NOD| . |=> ..2.|....| SM_AMIGA_3_ - 90| 0|NOD| . |=> 0.2.|....| SM_AMIGA_4_ - 91| 6|NOD| . |=> 0...|..6.| SM_AMIGA_5_ - 92| 5|NOD| . |=> ..2.|.567| SM_AMIGA_6_ - 93| 5|NOD| . |=> .1..|.5.7| SM_AMIGA_i_7_ - 94| 3| IO| 32|=> ..2.|..67| UDS_000 - 95| 3| IO| 35|=> ....|....| VMA + 73| 6| IO| 70|=> ....|..6.| SIZE_0_ + 74| 7| IO| 79|=> ....|..6.| SIZE_1_ + 75| 0|NOD| . |=> 0...|.5.7| SM_AMIGA_0_ + 76| 0|NOD| . |=> 0...|..6.| SM_AMIGA_1_ + 77| 0|NOD| . |=> 0...|....| SM_AMIGA_2_ + 78| 0|NOD| . |=> 0...|....| SM_AMIGA_3_ + 79| 6|NOD| . |=> 0.2.|..6.| SM_AMIGA_4_ + 80| 5|NOD| . |=> ....|.56.| SM_AMIGA_5_ + 81| 5|NOD| . |=> .12.|.567| SM_AMIGA_6_ + 82| 5|NOD| . |=> ....|.5.7| SM_AMIGA_i_7_ + 83| 3| IO| 32|=> ....|..67| UDS_000 + 84| 3| IO| 35|=> ....|....| VMA |=> Paired w/: RN_VMA - 96| +|INP| 36|=> ....|.5..| VPA - 97| 6|NOD| . |=> ..23|..6.| cpu_est_0_ - 98| 3|NOD| . |=> ..23|..6.| cpu_est_1_ - 99| 3|NOD| . |=> ..23|..6.| cpu_est_2_ - 100| 3|NOD| . |=> ..23|..6.| cpu_est_3_ - 101| 5|NOD| . |=> ...3|.5..| inst_AMIGA_BUS_ENABLE_DMA_HIGH - 102| 5|NOD| . |=> ..2.|.5..| inst_AMIGA_BUS_ENABLE_DMA_LOW - 103| 2|NOD| . |=> 0...|....| inst_AMIGA_DS - 104| 0|NOD| . |=> 0..3|...7| inst_AS_000_DMA - 105| 2|NOD| . |=> ..2.|4...| inst_AS_000_INT - 106| 1|NOD| . |=> .1.3|.5..| inst_AS_030_000_SYNC - 107| 7|NOD| . |=> .1.3|4...| inst_AS_030_D0 - 108| 7|NOD| . |=> .1..|.567| inst_BGACK_030_INT_D - 109| 6|NOD| . |=> ....|4.6.| inst_CLK_OUT_PRE_50 - 110| 4|NOD| . |=> 0..3|....| inst_CLK_OUT_PRE_D - 111| 0|NOD| . |=> 0...|...7| inst_DSACK1_INT - 112| 0|NOD| . |=> 0...|....| inst_DS_000_DMA - 113| 2|NOD| . |=> ..23|....| inst_DS_000_ENABLE - 114| 1|NOD| . |=> ..2.|....| inst_DTACK_D0 - 115| 5|NOD| . |=> ...3|.5..| inst_LDS_000_INT - 116| 6|NOD| . |=> 0..3|4.67| inst_RESET_OUT - 117| 5|NOD| . |=> ...3|.5..| inst_UDS_000_INT - 118| 5|NOD| . |=> ..23|....| inst_VPA_D - 119| +|INP| 14|=> 0123|4567| nEXP_SPACE + 85| +|INP| 36|=> ....|..6.| VPA + 86| 6|NOD| . |=> 0..3|..6.| cpu_est_0_ + 87| 3|NOD| . |=> 0..3|..6.| cpu_est_1_ + 88| 3|NOD| . |=> 0..3|..6.| cpu_est_2_ + 89| 0|NOD| . |=> 0..3|..6.| cpu_est_3_ + 90| 0|NOD| . |=> ...3|....| inst_AMIGA_BUS_ENABLE_DMA_HIGH + 91| 2|NOD| . |=> ..2.|....| inst_AMIGA_BUS_ENABLE_DMA_LOW + 92| 7|NOD| . |=> ..2.|....| inst_AMIGA_DS + 93| 2|NOD| . |=> ..2.|...7| inst_AS_000_DMA + 94| 2|NOD| . |=> ..2.|4...| inst_AS_000_INT + 95| 5|NOD| . |=> ...3|.5..| inst_AS_030_000_SYNC + 96| 4|NOD| . |=> ...3|45..| inst_AS_030_D0 + 97| 5|NOD| . |=> ....|.5..| inst_AS_030_D1 + 98| 4|NOD| . |=> ....|.5..| inst_BGACK_030_INT_D + 99| 7|NOD| . |=> ....|4..7| inst_CLK_OUT_PRE_50 + 100| 4|NOD| . |=> 0.2.|....| inst_CLK_OUT_PRE_D + 101| 6|NOD| . |=> ....|..67| inst_DSACK1_INT + 102| 2|NOD| . |=> 0.2.|....| inst_DS_000_DMA + 103| 2|NOD| . |=> ..23|....| inst_DS_000_ENABLE + 104| 5|NOD| . |=> 0...|....| inst_DTACK_D0 + 105| 6|NOD| . |=> ...3|..6.| inst_LDS_000_INT + 106| 1|NOD| . |=> .1.3|....| inst_UDS_000_INT + 107| 6|NOD| . |=> 0..3|....| inst_VPA_D + 108| +|INP| 14|=> ...3|45.7| nEXP_SPACE --------------------------------------------------------------------------- =========================================================================== < E:/ispLEVER_Classic2_0/ispcpld/dat/mach4a/mach447a Device Pin Assignments > @@ -208,7 +189,7 @@ ___|__|__|____|____________________________________________________________ ____|_____|_________|______________________________________________________ 1 | GND | | | (pwr/test) 2 | JTAG | | | (pwr/test) - 3 | I_O | 1_07|*| RESET + 3 | I_O | 1_07| | - 4 | I_O | 1_06|*| AHIGH_31_ 5 | I_O | 1_05|*| AHIGH_30_ 6 | I_O | 1_04|*| AHIGH_29_ @@ -269,7 +250,7 @@ ____|_____|_________|______________________________________________________ 61 | CkIn | |*| CLK_OSZI 62 | Vcc | | | (pwr/test) 63 | GND | | | (pwr/test) - 64 | CkIn | |*| CLK_030 + 64 | CkIn | | | - 65 | I_O | 6_00|*| CLK_DIV_OUT 66 | I_O | 6_01|*| E 67 | I_O | 6_02|*| IPL_0_ @@ -318,20 +299,20 @@ ____|_____|_________|______________________________________________________ | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| DS_030|OUT| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig - 1| SM_AMIGA_4_|NOD| | S | 3 | 4 to [ 1]| 1 XOR free - 2| CLK_030_PE_1_|NOD| | S | 6 | 4 to [ 2]| 1 XOR to [ 2] as logic PT + 1|CLK_OUT_INTreg|NOD| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig + 2| IPL_D0_2_|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig 3| | ? | | S | | 4 free | 1 XOR free - 4| AVEC|OUT| | S | 1 | 4 to [ 2]| 1 XOR to [ 4] for 1 PT sig - 5|inst_DSACK1_INT|NOD| | S | 2 | 4 to [ 5]| 1 XOR free - 6| CYCLE_DMA_0_|NOD| | S | 4 | 4 to [ 6]| 1 XOR free - 7| | ? | | S | | 4 to [ 8]| 1 XOR free - 8|inst_AS_000_DMA|NOD| | S | 6 | 4 to [ 8]| 1 XOR to [ 8] as logic PT - 9| CLK_030_PE_0_|NOD| | S | 9 | 4 to [ 9]| 1 XOR to [ 9] as logic PT -10| CYCLE_DMA_1_|NOD| | S | 2 | 4 to [10]| 1 XOR free -11| | ? | | S | | 4 to [ 9]| 1 XOR free + 4| AVEC|OUT| | S | 1 | 4 free | 1 XOR to [ 4] for 1 PT sig + 5| SM_AMIGA_1_|NOD| | S | 3 | 4 to [ 5]| 1 XOR free + 6| IPL_D0_0_|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig + 7| | ? | | S | | 4 free | 1 XOR free + 8| cpu_est_3_|NOD| | S | 4 | 4 to [ 8]| 1 XOR free + 9| SM_AMIGA_2_|NOD| | S | 5 | 4 to [ 9]| 1 XOR to [ 9] as logic PT +10|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | S | 1 | 4 free | 1 XOR to [10] for 1 PT sig +11| | ? | | S | | 4 free | 1 XOR free 12| SM_AMIGA_0_|NOD| | S | 3 | 4 to [12]| 1 XOR free -13|inst_DS_000_DMA|NOD| | S | 9 | 4 to [13]| 1 XOR to [13] as logic PT -14| | ? | | S | | 4 to [13]| 1 XOR free +13| SM_AMIGA_3_|NOD| | S | 5 | 4 to [13]| 1 XOR to [13] as logic PT +14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== @@ -344,22 +325,22 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| DS_030|OUT| | S | 1 |=> can support up to [ 5] logic PT(s) - 1| SM_AMIGA_4_|NOD| | S | 3 |=> can support up to [ 14] logic PT(s) - 2| CLK_030_PE_1_|NOD| | S | 6 |=> can support up to [ 14] logic PT(s) - 3| | ? | | S | |=> can support up to [ 5] logic PT(s) - 4| AVEC|OUT| | S | 1 |=> can support up to [ 6] logic PT(s) - 5|inst_DSACK1_INT|NOD| | S | 2 |=> can support up to [ 5] logic PT(s) - 6| CYCLE_DMA_0_|NOD| | S | 4 |=> can support up to [ 5] logic PT(s) - 7| | ? | | S | |=> can support up to [ 1] logic PT(s) - 8|inst_AS_000_DMA|NOD| | S | 6 |=> can support up to [ 10] logic PT(s) - 9| CLK_030_PE_0_|NOD| | S | 9 |=> can support up to [ 10] logic PT(s) -10| CYCLE_DMA_1_|NOD| | S | 2 |=> can support up to [ 5] logic PT(s) -11| | ? | | S | |=> can support up to [ 1] logic PT(s) -12| SM_AMIGA_0_|NOD| | S | 3 |=> can support up to [ 5] logic PT(s) -13|inst_DS_000_DMA|NOD| | S | 9 |=> can support up to [ 15] logic PT(s) -14| | ? | | S | |=> can support up to [ 6] logic PT(s) -15| | ? | | S | |=> can support up to [ 5] logic PT(s) + 0| DS_030|OUT| | S | 1 |=> can support up to [ 13] logic PT(s) + 1|CLK_OUT_INTreg|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) + 2| IPL_D0_2_|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) + 3| | ? | | S | |=> can support up to [ 13] logic PT(s) + 4| AVEC|OUT| | S | 1 |=> can support up to [ 14] logic PT(s) + 5| SM_AMIGA_1_|NOD| | S | 3 |=> can support up to [ 18] logic PT(s) + 6| IPL_D0_0_|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) + 7| | ? | | S | |=> can support up to [ 9] logic PT(s) + 8| cpu_est_3_|NOD| | S | 4 |=> can support up to [ 14] logic PT(s) + 9| SM_AMIGA_2_|NOD| | S | 5 |=> can support up to [ 14] logic PT(s) +10|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) +11| | ? | | S | |=> can support up to [ 9] logic PT(s) +12| SM_AMIGA_0_|NOD| | S | 3 |=> can support up to [ 15] logic PT(s) +13| SM_AMIGA_3_|NOD| | S | 5 |=> can support up to [ 15] logic PT(s) +14| | ? | | S | |=> can support up to [ 10] logic PT(s) +15| | ? | | S | |=> can support up to [ 10] logic PT(s) --------------------------------------------------------------------------- =========================================================================== < Block [ 0] > Node-Pin Assignments @@ -370,19 +351,19 @@ _|_________________|__|__|___|_____|_______________________________________ | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ 0| DS_030|OUT| | => | 5 6 ( 7) 0 | 96 97 ( 98) 91 - 1| SM_AMIGA_4_|NOD| | => | 5 6 7 0 | 96 97 98 91 - 2| CLK_030_PE_1_|NOD| | => | 6 7 0 1 | 97 98 91 92 + 1|CLK_OUT_INTreg|NOD| | => | 5 6 7 0 | 96 97 98 91 + 2| IPL_D0_2_|NOD| | => | 6 7 0 1 | 97 98 91 92 3| | | | => | 6 7 0 1 | 97 98 91 92 4| AVEC|OUT| | => | 7 0 ( 1) 2 | 98 91 ( 92) 93 - 5|inst_DSACK1_INT|NOD| | => | 7 0 1 2 | 98 91 92 93 - 6| CYCLE_DMA_0_|NOD| | => | 0 1 2 3 | 91 92 93 94 + 5| SM_AMIGA_1_|NOD| | => | 7 0 1 2 | 98 91 92 93 + 6| IPL_D0_0_|NOD| | => | 0 1 2 3 | 91 92 93 94 7| | | | => | 0 1 2 3 | 91 92 93 94 - 8|inst_AS_000_DMA|NOD| | => | 1 2 3 4 | 92 93 94 95 - 9| CLK_030_PE_0_|NOD| | => | 1 2 3 4 | 92 93 94 95 -10| CYCLE_DMA_1_|NOD| | => | 2 3 4 5 | 93 94 95 96 + 8| cpu_est_3_|NOD| | => | 1 2 3 4 | 92 93 94 95 + 9| SM_AMIGA_2_|NOD| | => | 1 2 3 4 | 92 93 94 95 +10|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | => | 2 3 4 5 | 93 94 95 96 11| | | | => | 2 3 4 5 | 93 94 95 96 12| SM_AMIGA_0_|NOD| | => | 3 4 5 6 | 94 95 96 97 -13|inst_DS_000_DMA|NOD| | => | 3 4 5 6 | 94 95 96 97 +13| SM_AMIGA_3_|NOD| | => | 3 4 5 6 | 94 95 96 97 14| | | | => | 4 5 6 7 | 95 96 97 98 15| | | | => | 4 5 6 7 | 95 96 97 98 --------------------------------------------------------------------------- @@ -434,37 +415,37 @@ IMX No. | +---- Block IO Pin or Macrocell Number 0 [IOpin 0 | 91|INP FPU_SENSE|*|*] [RegIn 0 |102| -| | ] [MCell 0 |101|OUT DS_030| | ] - [MCell 1 |103|NOD SM_AMIGA_4_| |*] + [MCell 1 |103|NOD CLK_OUT_INTreg| |*] 1 [IOpin 1 | 92|OUT AVEC|*| ] [RegIn 1 |105| -| | ] - [MCell 2 |104|NOD CLK_030_PE_1_| |*] + [MCell 2 |104|NOD IPL_D0_2_| |*] [MCell 3 |106| -| | ] 2 [IOpin 2 | 93|INP A_DECODE_20_|*|*] [RegIn 2 |108| -| | ] [MCell 4 |107|OUT AVEC| | ] - [MCell 5 |109|NOD inst_DSACK1_INT| |*] + [MCell 5 |109|NOD SM_AMIGA_1_| |*] 3 [IOpin 3 | 94|INP A_DECODE_21_|*|*] [RegIn 3 |111| -| | ] - [MCell 6 |110|NOD CYCLE_DMA_0_| |*] + [MCell 6 |110|NOD IPL_D0_0_| |*] [MCell 7 |112| -| | ] 4 [IOpin 4 | 95|INP A_DECODE_18_|*|*] [RegIn 4 |114| -| | ] - [MCell 8 |113|NOD inst_AS_000_DMA| |*] - [MCell 9 |115|NOD CLK_030_PE_0_| |*] + [MCell 8 |113|NOD cpu_est_3_| |*] + [MCell 9 |115|NOD SM_AMIGA_2_| |*] 5 [IOpin 5 | 96|INP A_DECODE_16_|*|*] [RegIn 5 |117| -| | ] - [MCell 10 |116|NOD CYCLE_DMA_1_| |*] + [MCell 10 |116|NOD inst_AMIGA_BUS_ENABLE_DMA_HIGH| |*] [MCell 11 |118| -| | ] 6 [IOpin 6 | 97|INP A_DECODE_19_|*|*] [RegIn 6 |120| -| | ] [MCell 12 |119|NOD SM_AMIGA_0_| |*] - [MCell 13 |121|NOD inst_DS_000_DMA| |*] + [MCell 13 |121|NOD SM_AMIGA_3_| |*] 7 [IOpin 7 | 98|OUT DS_030|*| ] [RegIn 7 |123| -| | ] @@ -477,39 +458,39 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| Input Pin ( 86)| RST -Mux01| Mcel 3 13 ( 193)| CLK_000_D_0_ -Mux02| Mcel 0 9 ( 115)| CLK_030_PE_0_ -Mux03| Mcel 0 8 ( 113)| inst_AS_000_DMA -Mux04| Input Pin ( 64)| CLK_030 -Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| IOPin 7 5 ( 80)| RW_000 -Mux07| ... | ... -Mux08| Mcel 2 10 ( 164)| inst_AMIGA_DS -Mux09| Mcel 0 1 ( 103)| SM_AMIGA_4_ -Mux10| Mcel 0 6 ( 110)| CYCLE_DMA_0_ +Mux00| IOPin 6 2 ( 67)| IPL_0_ +Mux01| Mcel 5 9 ( 235)| inst_DTACK_D0 +Mux02| IOPin 4 1 ( 42)| AS_000 +Mux03| IOPin 5 0 ( 60)| A_1_ +Mux04| IOPin 6 3 ( 68)| IPL_2_ +Mux05| Mcel 6 6 ( 254)| inst_VPA_D +Mux06| ... | ... +Mux07| Mcel 3 9 ( 187)| CLK_000_D_0_ +Mux08| ... | ... +Mux09| Mcel 0 12 ( 119)| SM_AMIGA_0_ +Mux10| Mcel 6 9 ( 259)| cpu_est_0_ Mux11| ... | ... -Mux12| Mcel 6 13 ( 265)| SM_AMIGA_5_ -Mux13| Mcel 7 5 ( 277)| CLK_000_D_1_ -Mux14| Mcel 0 10 ( 116)| CYCLE_DMA_1_ -Mux15| Mcel 0 12 ( 119)| SM_AMIGA_0_ -Mux16| Mcel 4 8 ( 209)| inst_CLK_OUT_PRE_D -Mux17| ... | ... -Mux18| Mcel 0 5 ( 109)| inst_DSACK1_INT -Mux19| IOPin 7 3 ( 82)| AS_030 -Mux20| Mcel 5 8 ( 233)| SM_AMIGA_1_ -Mux21| ... | ... -Mux22| Mcel 0 2 ( 104)| CLK_030_PE_1_ -Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux12| ... | ... +Mux13| Mcel 2 9 ( 163)| inst_DS_000_DMA +Mux14| Mcel 4 5 ( 205)| inst_CLK_OUT_PRE_D +Mux15| ... | ... +Mux16| Mcel 3 2 ( 176)| cpu_est_2_ +Mux17| IOPin 4 0 ( 41)| BERR +Mux18| Mcel 0 5 ( 109)| SM_AMIGA_1_ +Mux19| Mcel 0 9 ( 115)| SM_AMIGA_2_ +Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux21| Input Pin ( 86)| RST +Mux22| Mcel 6 5 ( 253)| SM_AMIGA_4_ +Mux23| ... | ... Mux24| ... | ... -Mux25| Mcel 0 13 ( 121)| inst_DS_000_DMA -Mux26| IOPin 4 1 ( 42)| AS_000 -Mux27| ... | ... +Mux25| Mcel 0 13 ( 121)| SM_AMIGA_3_ +Mux26| Mcel 3 0 ( 173)| RN_VMA +Mux27| Mcel 7 5 ( 277)| CLK_000_D_1_ Mux28| ... | ... -Mux29| ... | ... -Mux30| Mcel 3 10 ( 188)| CLK_OUT_INTreg +Mux29| Mcel 3 13 ( 193)| cpu_est_1_ +Mux30| Mcel 0 8 ( 113)| cpu_est_3_ Mux31| ... | ... -Mux32| Mcel 6 5 ( 253)| inst_RESET_OUT +Mux32| ... | ... --------------------------------------------------------------------------- =========================================================================== < Block [ 1] > Macrocell (MCell) Cluster Assignments @@ -523,19 +504,19 @@ Mux32| Mcel 6 5 ( 253)| inst_RESET_OUT _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| AHIGH_30_| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig 1| CLK_EXP|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig - 2| IPL_D0_2_|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig + 2| CYCLE_DMA_1_|NOD| | S | 2 | 4 to [ 2]| 1 XOR free 3| | ? | | S | | 4 to [ 4]| 1 XOR to [ 4] as logic PT 4| IPL_030_2_| IO| | S |10 | 4 to [ 4]| 1 XOR to [ 4] as logic PT 5| IPL_030_0_| IO| | S |10 | 4 to [ 5]| 1 XOR to [ 5] as logic PT - 6| IPL_D0_1_|NOD| | S | 1 | 4 to [ 5]| 1 XOR to [ 6] for 1 PT sig - 7| | ? | | S | | 4 to [ 5]| 1 XOR free + 6|inst_UDS_000_INT|NOD| | S | 2 | 4 to [ 6]| 1 XOR free + 7| | ? | | S | | 4 to [ 5]| 1 XOR to [ 5] as logic PT 8| AHIGH_29_| IO| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig 9| IPL_030_1_| IO| | S |10 | 4 to [ 9]| 1 XOR to [ 9] as logic PT -10| IPL_D0_0_|NOD| | S | 1 | 4 to [ 9]| 1 XOR to [10] for 1 PT sig -11| | ? | | S | | 4 to [ 9]| 1 XOR free +10| | ? | | S | | 4 to [ 9]| 1 XOR to [ 9] as logic PT +11| | ? | | S | | 4 free | 1 XOR free 12| AHIGH_31_| IO| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig -13|inst_AS_030_000_SYNC|NOD| | S | 7 | 4 to [13]| 1 XOR to [13] as logic PT -14| inst_DTACK_D0|NOD| | S | 1 | 4 to [13]| 1 XOR to [14] for 1 PT sig +13| CYCLE_DMA_0_|NOD| | S | 4 | 4 to [13]| 1 XOR free +14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== @@ -548,22 +529,22 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| AHIGH_30_| IO| | S | 1 |=> can support up to [ 13] logic PT(s) - 1| CLK_EXP|OUT| | S | 1 |=> can support up to [ 13] logic PT(s) - 2| IPL_D0_2_|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) - 3| | ? | | S | |=> can support up to [ 4] logic PT(s) + 0| AHIGH_30_| IO| | S | 1 |=> can support up to [ 9] logic PT(s) + 1| CLK_EXP|OUT| | S | 1 |=> can support up to [ 9] logic PT(s) + 2| CYCLE_DMA_1_|NOD| | S | 2 |=> can support up to [ 9] logic PT(s) + 3| | ? | | S | |=> [ 0] PT capacity 4| IPL_030_2_| IO| | S |10 |=> can support up to [ 10] logic PT(s) - 5| IPL_030_0_| IO| | S |10 |=> can support up to [ 14] logic PT(s) - 6| IPL_D0_1_|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) - 7| | ? | | S | |=> can support up to [ 5] logic PT(s) + 5| IPL_030_0_| IO| | S |10 |=> can support up to [ 10] logic PT(s) + 6|inst_UDS_000_INT|NOD| | S | 2 |=> can support up to [ 9] logic PT(s) + 7| | ? | | S | |=> can support up to [ 4] logic PT(s) 8| AHIGH_29_| IO| | S | 1 |=> can support up to [ 5] logic PT(s) - 9| IPL_030_1_| IO| | S |10 |=> can support up to [ 18] logic PT(s) -10| IPL_D0_0_|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) -11| | ? | | S | |=> can support up to [ 5] logic PT(s) -12| AHIGH_31_| IO| | S | 1 |=> can support up to [ 5] logic PT(s) -13|inst_AS_030_000_SYNC|NOD| | S | 7 |=> can support up to [ 18] logic PT(s) -14| inst_DTACK_D0|NOD| | S | 1 |=> can support up to [ 6] logic PT(s) -15| | ? | | S | |=> can support up to [ 5] logic PT(s) + 9| IPL_030_1_| IO| | S |10 |=> can support up to [ 19] logic PT(s) +10| | ? | | S | |=> can support up to [ 9] logic PT(s) +11| | ? | | S | |=> can support up to [ 9] logic PT(s) +12| AHIGH_31_| IO| | S | 1 |=> can support up to [ 15] logic PT(s) +13| CYCLE_DMA_0_|NOD| | S | 4 |=> can support up to [ 19] logic PT(s) +14| | ? | | S | |=> can support up to [ 10] logic PT(s) +15| | ? | | S | |=> can support up to [ 10] logic PT(s) --------------------------------------------------------------------------- =========================================================================== < Block [ 1] > Node-Pin Assignments @@ -575,19 +556,19 @@ _|_________________|__|__|___|_____|_______________________________________ _|_________________|__|_____|____________________|________________________ 0| AHIGH_30_| IO| | => |( 5) 6 7 0 |( 5) 4 3 10 1| CLK_EXP|OUT| | => | 5 6 7 ( 0)| 5 4 3 ( 10) - 2| IPL_D0_2_|NOD| | => | 6 7 0 1 | 4 3 10 9 + 2| CYCLE_DMA_1_|NOD| | => | 6 7 0 1 | 4 3 10 9 3| | | | => | 6 7 0 1 | 4 3 10 9 4| IPL_030_2_| IO| | => | 7 0 ( 1) 2 | 3 10 ( 9) 8 5| IPL_030_0_| IO| | => | 7 0 1 ( 2)| 3 10 9 ( 8) - 6| IPL_D0_1_|NOD| | => | 0 1 2 3 | 10 9 8 7 + 6|inst_UDS_000_INT|NOD| | => | 0 1 2 3 | 10 9 8 7 7| | | | => | 0 1 2 3 | 10 9 8 7 8| AHIGH_29_| IO| | => | 1 2 3 ( 4)| 9 8 7 ( 6) 9| IPL_030_1_| IO| | => | 1 2 ( 3) 4 | 9 8 ( 7) 6 -10| IPL_D0_0_|NOD| | => | 2 3 4 5 | 8 7 6 5 +10| | | | => | 2 3 4 5 | 8 7 6 5 11| | | | => | 2 3 4 5 | 8 7 6 5 12| AHIGH_31_| IO| | => | 3 4 5 ( 6)| 7 6 5 ( 4) -13|inst_AS_030_000_SYNC|NOD| | => | 3 4 5 6 | 7 6 5 4 -14| inst_DTACK_D0|NOD| | => | 4 5 6 7 | 6 5 4 3 +13| CYCLE_DMA_0_|NOD| | => | 3 4 5 6 | 7 6 5 4 +14| | | | => | 4 5 6 7 | 6 5 4 3 15| | | | => | 4 5 6 7 | 6 5 4 3 --------------------------------------------------------------------------- =========================================================================== @@ -606,7 +587,7 @@ _|_________________|__|___|_____|___________________________________________ 4| AHIGH_29_| IO|*| 6| => | ( 8) 9 10 11 12 13 14 15 5| AHIGH_30_| IO|*| 5| => | 10 11 12 13 14 15 ( 0) 1 6| AHIGH_31_| IO|*| 4| => | (12) 13 14 15 0 1 2 3 - 7| RESET|INP|*| 3| => | 14 15 0 1 2 3 4 5 + 7| | | | 3| => | 14 15 0 1 2 3 4 5 --------------------------------------------------------------------------- =========================================================================== < Block [ 1] > IO/Node and IO/Input Macrocell Pairing Table @@ -627,7 +608,7 @@ _|_________________|__|___|_____|__________________________________________ 4| AHIGH_29_| IO|*| 6| => | Input macrocell [ -] 5| AHIGH_30_| IO|*| 5| => | Input macrocell [ -] 6| AHIGH_31_| IO|*| 4| => | Input macrocell [ -] - 7| RESET|INP|*| 3| => | Input macrocell [ -] + 7| | | | 3| => | Input macrocell [ -] --------------------------------------------------------------------------- =========================================================================== < Block [ 1] > Input Multiplexer (IMX) Assignments @@ -645,7 +626,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 1 [IOpin 1 | 9| IO IPL_030_2_|*| ] paired w/[ RN_IPL_030_2_] [RegIn 1 |129| -| | ] - [MCell 2 |128|NOD IPL_D0_2_| |*] + [MCell 2 |128|NOD CYCLE_DMA_1_| |*] [MCell 3 |130| -| | ] 2 [IOpin 2 | 8| IO IPL_030_0_|*| ] paired w/[ RN_IPL_030_0_] @@ -655,7 +636,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 3 [IOpin 3 | 7| IO IPL_030_1_|*| ] paired w/[ RN_IPL_030_1_] [RegIn 3 |135| -| | ] - [MCell 6 |134|NOD IPL_D0_1_| |*] + [MCell 6 |134|NOD inst_UDS_000_INT| |*] [MCell 7 |136| -| | ] 4 [IOpin 4 | 6| IO AHIGH_29_|*|*] @@ -665,17 +646,17 @@ IMX No. | +---- Block IO Pin or Macrocell Number 5 [IOpin 5 | 5| IO AHIGH_30_|*|*] [RegIn 5 |141| -| | ] - [MCell 10 |140|NOD IPL_D0_0_| |*] + [MCell 10 |140| -| | ] [MCell 11 |142| -| | ] 6 [IOpin 6 | 4| IO AHIGH_31_|*|*] [RegIn 6 |144| -| | ] [MCell 12 |143| IO AHIGH_31_| | ] - [MCell 13 |145|NOD inst_AS_030_000_SYNC| |*] + [MCell 13 |145|NOD CYCLE_DMA_0_| |*] - 7 [IOpin 7 | 3|INP RESET|*|*] + 7 [IOpin 7 | 3| -| | ] [RegIn 7 |147| -| | ] - [MCell 14 |146|NOD inst_DTACK_D0| |*] + [MCell 14 |146| -| | ] [MCell 15 |148| -| | ] --------------------------------------------------------------------------- =========================================================================== @@ -684,36 +665,36 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux01| IOPin 5 2 ( 58)| FC_1_ -Mux02| IOPin 1 7 ( 3)| RESET +Mux00| IOPin 6 4 ( 69)| A_0_ +Mux01| ... | ... +Mux02| Mcel 1 6 ( 134)| inst_UDS_000_INT Mux03| IOPin 5 4 ( 56)| IPL_1_ -Mux04| IOPin 0 4 ( 95)| A_DECODE_18_ -Mux05| Input Pin ( 14)| nEXP_SPACE +Mux04| Mcel 3 6 ( 182)| IPL_D0_1_ +Mux05| Mcel 5 0 ( 221)| SM_AMIGA_6_ Mux06| Mcel 1 9 ( 139)| RN_IPL_030_1_ -Mux07| Mcel 7 13 ( 289)| inst_BGACK_030_INT_D -Mux08| IOPin 5 1 ( 59)| A_DECODE_17_ -Mux09| IOPin 3 5 ( 30)| DTACK -Mux10| Mcel 1 13 ( 145)| inst_AS_030_000_SYNC -Mux11| IOPin 0 5 ( 96)| A_DECODE_16_ -Mux12| IOPin 0 6 ( 97)| A_DECODE_19_ -Mux13| ... | ... -Mux14| Mcel 7 2 ( 272)| inst_AS_030_D0 -Mux15| ... | ... +Mux07| Mcel 3 9 ( 187)| CLK_000_D_0_ +Mux08| ... | ... +Mux09| Mcel 0 1 ( 103)| CLK_OUT_INTreg +Mux10| Mcel 1 13 ( 145)| CYCLE_DMA_0_ +Mux11| ... | ... +Mux12| ... | ... +Mux13| Mcel 7 5 ( 277)| CLK_000_D_1_ +Mux14| ... | ... +Mux15| Mcel 0 6 ( 110)| IPL_D0_0_ Mux16| IOPin 6 2 ( 67)| IPL_0_ -Mux17| IOPin 5 3 ( 57)| FC_0_ -Mux18| Mcel 1 2 ( 128)| IPL_D0_2_ -Mux19| IOPin 7 3 ( 82)| AS_030 -Mux20| Mcel 3 10 ( 188)| CLK_OUT_INTreg +Mux17| ... | ... +Mux18| Mcel 1 2 ( 128)| CYCLE_DMA_1_ +Mux19| ... | ... +Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 Mux21| Input Pin ( 86)| RST Mux22| IOPin 6 3 ( 68)| IPL_2_ -Mux23| Mcel 1 6 ( 134)| IPL_D0_1_ -Mux24| Mcel 1 10 ( 140)| IPL_D0_0_ -Mux25| ... | ... -Mux26| ... | ... +Mux23| ... | ... +Mux24| ... | ... +Mux25| Mcel 0 2 ( 104)| IPL_D0_2_ +Mux26| IOPin 4 1 ( 42)| AS_000 Mux27| Mcel 1 4 ( 131)| RN_IPL_030_2_ Mux28| Mcel 1 5 ( 133)| RN_IPL_030_0_ -Mux29| Mcel 5 4 ( 227)| SM_AMIGA_i_7_ +Mux29| ... | ... Mux30| ... | ... Mux31| ... | ... Mux32| ... | ... @@ -730,19 +711,19 @@ Mux32| ... | ... _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| AHIGH_28_| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig 1|AMIGA_BUS_ENABLE_LOW|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig - 2|inst_AS_000_INT|NOD| | S | 2 | 4 to [ 2]| 1 XOR free + 2|inst_DS_000_ENABLE|NOD| | S | 3 | 4 to [ 2]| 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free 4| AHIGH_26_| IO| | S | 1 | 4 free | 1 XOR to [ 4] for 1 PT sig 5| AHIGH_27_| IO| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig - 6| SM_AMIGA_3_|NOD| | S | 5 | 4 to [ 6]| 1 XOR to [ 6] as logic PT + 6|inst_AS_000_INT|NOD| | S | 2 | 4 to [ 6]| 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free 8| AHIGH_24_| IO| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig - 9| SM_AMIGA_2_|NOD| | S | 5 | 4 to [ 9]| 1 XOR to [ 9] as logic PT -10| inst_AMIGA_DS|NOD| | S | 2 | 4 to [10]| 1 XOR free + 9|inst_DS_000_DMA|NOD| | S | 6 | 4 to [ 9]| 1 XOR to [ 9] as logic PT +10|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | S | 1 | 4 to [ 9]| 1 XOR to [10] for 1 PT sig 11| | ? | | S | | 4 free | 1 XOR free 12| AHIGH_25_| IO| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig -13|inst_DS_000_ENABLE|NOD| | S | 3 | 4 to [13]| 1 XOR free -14| CLK_000_D_4_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig +13|inst_AS_000_DMA|NOD| | S | 6 | 4 to [13]| 1 XOR to [13] as logic PT +14| | ? | | S | | 4 to [13]| 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== @@ -757,20 +738,20 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ _|_________________|__|__|___|_____|_______________________________________ 0| AHIGH_28_| IO| | S | 1 |=> can support up to [ 9] logic PT(s) 1|AMIGA_BUS_ENABLE_LOW|OUT| | S | 1 |=> can support up to [ 14] logic PT(s) - 2|inst_AS_000_INT|NOD| | S | 2 |=> can support up to [ 18] logic PT(s) + 2|inst_DS_000_ENABLE|NOD| | S | 3 |=> can support up to [ 18] logic PT(s) 3| | ? | | S | |=> can support up to [ 13] logic PT(s) 4| AHIGH_26_| IO| | S | 1 |=> can support up to [ 14] logic PT(s) 5| AHIGH_27_| IO| | S | 1 |=> can support up to [ 14] logic PT(s) - 6| SM_AMIGA_3_|NOD| | S | 5 |=> can support up to [ 18] logic PT(s) + 6|inst_AS_000_INT|NOD| | S | 2 |=> can support up to [ 18] logic PT(s) 7| | ? | | S | |=> can support up to [ 9] logic PT(s) 8| AHIGH_24_| IO| | S | 1 |=> can support up to [ 10] logic PT(s) - 9| SM_AMIGA_2_|NOD| | S | 5 |=> can support up to [ 14] logic PT(s) -10| inst_AMIGA_DS|NOD| | S | 2 |=> can support up to [ 14] logic PT(s) + 9|inst_DS_000_DMA|NOD| | S | 6 |=> can support up to [ 18] logic PT(s) +10|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) 11| | ? | | S | |=> can support up to [ 9] logic PT(s) -12| AHIGH_25_| IO| | S | 1 |=> can support up to [ 14] logic PT(s) -13|inst_DS_000_ENABLE|NOD| | S | 3 |=> can support up to [ 18] logic PT(s) -14| CLK_000_D_4_|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) -15| | ? | | S | |=> can support up to [ 9] logic PT(s) +12| AHIGH_25_| IO| | S | 1 |=> can support up to [ 10] logic PT(s) +13|inst_AS_000_DMA|NOD| | S | 6 |=> can support up to [ 19] logic PT(s) +14| | ? | | S | |=> can support up to [ 6] logic PT(s) +15| | ? | | S | |=> can support up to [ 5] logic PT(s) --------------------------------------------------------------------------- =========================================================================== < Block [ 2] > Node-Pin Assignments @@ -782,19 +763,19 @@ _|_________________|__|__|___|_____|_______________________________________ _|_________________|__|_____|____________________|________________________ 0| AHIGH_28_| IO| | => | 5 6 7 ( 0)| 20 21 22 ( 15) 1|AMIGA_BUS_ENABLE_LOW|OUT| | => |( 5) 6 7 0 |( 20) 21 22 15 - 2|inst_AS_000_INT|NOD| | => | 6 7 0 1 | 21 22 15 16 + 2|inst_DS_000_ENABLE|NOD| | => | 6 7 0 1 | 21 22 15 16 3| | | | => | 6 7 0 1 | 21 22 15 16 4| AHIGH_26_| IO| | => | 7 0 1 ( 2)| 22 15 16 ( 17) 5| AHIGH_27_| IO| | => | 7 0 ( 1) 2 | 22 15 ( 16) 17 - 6| SM_AMIGA_3_|NOD| | => | 0 1 2 3 | 15 16 17 18 + 6|inst_AS_000_INT|NOD| | => | 0 1 2 3 | 15 16 17 18 7| | | | => | 0 1 2 3 | 15 16 17 18 8| AHIGH_24_| IO| | => | 1 2 3 ( 4)| 16 17 18 ( 19) - 9| SM_AMIGA_2_|NOD| | => | 1 2 3 4 | 16 17 18 19 -10| inst_AMIGA_DS|NOD| | => | 2 3 4 5 | 17 18 19 20 + 9|inst_DS_000_DMA|NOD| | => | 1 2 3 4 | 16 17 18 19 +10|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | => | 2 3 4 5 | 17 18 19 20 11| | | | => | 2 3 4 5 | 17 18 19 20 12| AHIGH_25_| IO| | => |( 3) 4 5 6 |( 18) 19 20 21 -13|inst_DS_000_ENABLE|NOD| | => | 3 4 5 6 | 18 19 20 21 -14| CLK_000_D_4_|NOD| | => | 4 5 6 7 | 19 20 21 22 +13|inst_AS_000_DMA|NOD| | => | 3 4 5 6 | 18 19 20 21 +14| | | | => | 4 5 6 7 | 19 20 21 22 15| | | | => | 4 5 6 7 | 19 20 21 22 --------------------------------------------------------------------------- =========================================================================== @@ -849,7 +830,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 1 [IOpin 1 | 16| IO AHIGH_27_|*|*] [RegIn 1 |153| -| | ] - [MCell 2 |152|NOD inst_AS_000_INT| |*] + [MCell 2 |152|NOD inst_DS_000_ENABLE| |*] [MCell 3 |154| -| | ] 2 [IOpin 2 | 17| IO AHIGH_26_|*|*] @@ -859,27 +840,27 @@ IMX No. | +---- Block IO Pin or Macrocell Number 3 [IOpin 3 | 18| IO AHIGH_25_|*|*] [RegIn 3 |159| -| | ] - [MCell 6 |158|NOD SM_AMIGA_3_| |*] + [MCell 6 |158|NOD inst_AS_000_INT| |*] [MCell 7 |160| -| | ] 4 [IOpin 4 | 19| IO AHIGH_24_|*|*] [RegIn 4 |162| -| | ] [MCell 8 |161| IO AHIGH_24_| | ] - [MCell 9 |163|NOD SM_AMIGA_2_| |*] + [MCell 9 |163|NOD inst_DS_000_DMA| |*] 5 [IOpin 5 | 20|OUT AMIGA_BUS_ENABLE_LOW|*| ] [RegIn 5 |165| -| | ] - [MCell 10 |164|NOD inst_AMIGA_DS| |*] + [MCell 10 |164|NOD inst_AMIGA_BUS_ENABLE_DMA_LOW| |*] [MCell 11 |166| -| | ] 6 [IOpin 6 | 21|INP BG_030|*|*] [RegIn 6 |168| -| | ] [MCell 12 |167| IO AHIGH_25_| | ] - [MCell 13 |169|NOD inst_DS_000_ENABLE| |*] + [MCell 13 |169|NOD inst_AS_000_DMA| |*] 7 [IOpin 7 | 22| -| | ] [RegIn 7 |171| -| | ] - [MCell 14 |170|NOD CLK_000_D_4_| |*] + [MCell 14 |170| -| | ] [MCell 15 |172| -| | ] --------------------------------------------------------------------------- =========================================================================== @@ -888,34 +869,34 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| Mcel 2 13 ( 169)| inst_DS_000_ENABLE -Mux01| Mcel 3 13 ( 193)| CLK_000_D_0_ -Mux02| IOPin 1 7 ( 3)| RESET -Mux03| Mcel 2 9 ( 163)| SM_AMIGA_2_ -Mux04| Mcel 3 6 ( 182)| cpu_est_1_ -Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| Mcel 5 13 ( 241)| CLK_000_D_3_ -Mux07| ... | ... -Mux08| IOPin 3 3 ( 32)| UDS_000 -Mux09| Mcel 5 5 ( 229)| inst_AMIGA_BUS_ENABLE_DMA_LOW -Mux10| Mcel 3 14 ( 194)| cpu_est_2_ -Mux11| IOPin 6 6 ( 71)| RW -Mux12| Mcel 0 1 ( 103)| SM_AMIGA_4_ -Mux13| Mcel 7 5 ( 277)| CLK_000_D_1_ -Mux14| Mcel 3 4 ( 179)| RN_VMA -Mux15| Mcel 5 2 ( 224)| inst_VPA_D -Mux16| Mcel 3 2 ( 176)| cpu_est_3_ -Mux17| IOPin 4 0 ( 41)| BERR -Mux18| Mcel 2 6 ( 158)| SM_AMIGA_3_ +Mux00| Input Pin ( 86)| RST +Mux01| ... | ... +Mux02| Mcel 2 2 ( 152)| inst_DS_000_ENABLE +Mux03| IOPin 5 0 ( 60)| A_1_ +Mux04| Mcel 7 2 ( 272)| inst_AMIGA_DS +Mux05| Mcel 5 0 ( 221)| SM_AMIGA_6_ +Mux06| IOPin 7 5 ( 80)| RW_000 +Mux07| Mcel 3 9 ( 187)| CLK_000_D_0_ +Mux08| Mcel 2 10 ( 164)| inst_AMIGA_BUS_ENABLE_DMA_LOW +Mux09| Mcel 2 6 ( 158)| inst_AS_000_INT +Mux10| Mcel 1 2 ( 128)| CYCLE_DMA_1_ +Mux11| Mcel 2 13 ( 169)| inst_AS_000_DMA +Mux12| Mcel 0 1 ( 103)| CLK_OUT_INTreg +Mux13| Mcel 2 9 ( 163)| inst_DS_000_DMA +Mux14| Mcel 4 5 ( 205)| inst_CLK_OUT_PRE_D +Mux15| ... | ... +Mux16| IOPin 4 1 ( 42)| AS_000 +Mux17| ... | ... +Mux18| ... | ... Mux19| IOPin 7 3 ( 82)| AS_030 -Mux20| Mcel 1 14 ( 146)| inst_DTACK_D0 -Mux21| Input Pin ( 86)| RST -Mux22| Mcel 2 2 ( 152)| inst_AS_000_INT -Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux24| IOPin 3 4 ( 31)| LDS_000 -Mux25| Mcel 5 0 ( 221)| SM_AMIGA_6_ +Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux21| Mcel 1 13 ( 145)| CYCLE_DMA_0_ +Mux22| Mcel 6 5 ( 253)| SM_AMIGA_4_ +Mux23| ... | ... +Mux24| ... | ... +Mux25| IOPin 6 6 ( 71)| RW Mux26| ... | ... -Mux27| Mcel 6 9 ( 259)| cpu_est_0_ +Mux27| Mcel 7 5 ( 277)| CLK_000_D_1_ Mux28| ... | ... Mux29| ... | ... Mux30| ... | ... @@ -932,21 +913,21 @@ Mux32| ... | ... | Sig Type-+ | | | | | | | XOR to Mcell Assignment | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| DTACK| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig + 0| VMA| IO| | S | 3 | 4 to [ 0]| 1 XOR free 1| BG_000| IO| | S | 2 | 4 to [ 1]| 1 XOR free - 2| cpu_est_3_|NOD| | S | 4 | 4 to [ 2]| 1 XOR free + 2| cpu_est_2_|NOD| | S | 1 :+: 1| 4 to [ 2]| 1 XOR to [ 2] 3| | ? | | S | | 4 free | 1 XOR free - 4| VMA| IO| | S | 3 | 4 to [ 4]| 1 XOR free - 5|AMIGA_BUS_ENABLE_HIGH|OUT| | S | 2 | 4 to [ 5]| 1 XOR free - 6| cpu_est_1_|NOD| | S | 4 | 4 to [ 6]| 1 XOR free + 4|AMIGA_BUS_ENABLE_HIGH|OUT| | S | 2 | 4 to [ 4]| 1 XOR free + 5|AMIGA_ADDR_ENABLE|OUT| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig + 6| IPL_D0_1_|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig 7| | ? | | S | | 4 free | 1 XOR free 8| UDS_000| IO| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig - 9|AMIGA_ADDR_ENABLE|OUT| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig -10|CLK_OUT_INTreg|NOD| | S | 1 | 4 free | 1 XOR to [10] for 1 PT sig + 9| CLK_000_D_0_|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig +10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free 12| LDS_000| IO| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig -13| CLK_000_D_0_|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig -14| cpu_est_2_|NOD| | S | 1 :+: 1| 4 to [14]| 1 XOR to [14] +13| cpu_est_1_|NOD| | S | 4 | 4 to [13]| 1 XOR free +14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== @@ -959,22 +940,22 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| DTACK| IO| | S | 1 |=> can support up to [ 5] logic PT(s) - 1| BG_000| IO| | S | 2 |=> can support up to [ 14] logic PT(s) - 2| cpu_est_3_|NOD| | S | 4 |=> can support up to [ 10] logic PT(s) - 3| | ? | | S | |=> can support up to [ 5] logic PT(s) - 4| VMA| IO| | S | 3 |=> can support up to [ 10] logic PT(s) - 5|AMIGA_BUS_ENABLE_HIGH|OUT| | S | 2 |=> can support up to [ 10] logic PT(s) - 6| cpu_est_1_|NOD| | S | 4 |=> can support up to [ 14] logic PT(s) - 7| | ? | | S | |=> can support up to [ 13] logic PT(s) - 8| UDS_000| IO| | S | 1 |=> can support up to [ 18] logic PT(s) - 9|AMIGA_ADDR_ENABLE|OUT| | S | 1 |=> can support up to [ 18] logic PT(s) -10|CLK_OUT_INTreg|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) -11| | ? | | S | |=> can support up to [ 17] logic PT(s) -12| LDS_000| IO| | S | 1 |=> can support up to [ 14] logic PT(s) -13| CLK_000_D_0_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) -14| cpu_est_2_|NOD| | S | 1 :+: 1|=> can support up to [ 13] logic PT(s) -15| | ? | | S | |=> can support up to [ 5] logic PT(s) + 0| VMA| IO| | S | 3 |=> can support up to [ 5] logic PT(s) + 1| BG_000| IO| | S | 2 |=> can support up to [ 10] logic PT(s) + 2| cpu_est_2_|NOD| | S | 1 :+: 1|=> can support up to [ 9] logic PT(s) + 3| | ? | | S | |=> can support up to [ 9] logic PT(s) + 4|AMIGA_BUS_ENABLE_HIGH|OUT| | S | 2 |=> can support up to [ 18] logic PT(s) + 5|AMIGA_ADDR_ENABLE|OUT| | S | 1 |=> can support up to [ 14] logic PT(s) + 6| IPL_D0_1_|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) + 7| | ? | | S | |=> can support up to [ 17] logic PT(s) + 8| UDS_000| IO| | S | 1 |=> can support up to [ 19] logic PT(s) + 9| CLK_000_D_0_|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) +10| | ? | | S | |=> can support up to [ 18] logic PT(s) +11| | ? | | S | |=> can support up to [ 14] logic PT(s) +12| LDS_000| IO| | S | 1 |=> can support up to [ 15] logic PT(s) +13| cpu_est_1_|NOD| | S | 4 |=> can support up to [ 19] logic PT(s) +14| | ? | | S | |=> can support up to [ 10] logic PT(s) +15| | ? | | S | |=> can support up to [ 10] logic PT(s) --------------------------------------------------------------------------- =========================================================================== < Block [ 3] > Node-Pin Assignments @@ -984,21 +965,21 @@ _|_________________|__|__|___|_____|_______________________________________ | Sig Type---+ | to | Block [ 3] IO Pin | Device Pin | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ - 0| DTACK| IO| | => |( 5) 6 7 0 |( 30) 29 28 35 + 0| VMA| IO| | => | 5 6 7 ( 0)| 30 29 28 ( 35) 1| BG_000| IO| | => | 5 ( 6) 7 0 | 30 ( 29) 28 35 - 2| cpu_est_3_|NOD| | => | 6 7 0 1 | 29 28 35 34 + 2| cpu_est_2_|NOD| | => | 6 7 0 1 | 29 28 35 34 3| | | | => | 6 7 0 1 | 29 28 35 34 - 4| VMA| IO| | => | 7 ( 0) 1 2 | 28 ( 35) 34 33 - 5|AMIGA_BUS_ENABLE_HIGH|OUT| | => | 7 0 ( 1) 2 | 28 35 ( 34) 33 - 6| cpu_est_1_|NOD| | => | 0 1 2 3 | 35 34 33 32 + 4|AMIGA_BUS_ENABLE_HIGH|OUT| | => | 7 0 ( 1) 2 | 28 35 ( 34) 33 + 5|AMIGA_ADDR_ENABLE|OUT| | => | 7 0 1 ( 2)| 28 35 34 ( 33) + 6| IPL_D0_1_|NOD| | => | 0 1 2 3 | 35 34 33 32 7| | | | => | 0 1 2 3 | 35 34 33 32 8| UDS_000| IO| | => | 1 2 ( 3) 4 | 34 33 ( 32) 31 - 9|AMIGA_ADDR_ENABLE|OUT| | => | 1 ( 2) 3 4 | 34 ( 33) 32 31 -10|CLK_OUT_INTreg|NOD| | => | 2 3 4 5 | 33 32 31 30 + 9| CLK_000_D_0_|NOD| | => | 1 2 3 4 | 34 33 32 31 +10| | | | => | 2 3 4 5 | 33 32 31 30 11| | | | => | 2 3 4 5 | 33 32 31 30 12| LDS_000| IO| | => | 3 ( 4) 5 6 | 32 ( 31) 30 29 -13| CLK_000_D_0_|NOD| | => | 3 4 5 6 | 32 31 30 29 -14| cpu_est_2_|NOD| | => | 4 5 6 7 | 31 30 29 28 +13| cpu_est_1_|NOD| | => | 3 4 5 6 | 32 31 30 29 +14| | | | => | 4 5 6 7 | 31 30 29 28 15| | | | => | 4 5 6 7 | 31 30 29 28 --------------------------------------------------------------------------- =========================================================================== @@ -1010,12 +991,12 @@ _|_________________|__|_____|____________________|________________________ | Sig Type--+ | | | | Signal Name | | | | Node Destinations Via Output Matrix _|_________________|__|___|_____|___________________________________________ - 0| VMA| IO|*| 35| => | 0 1 2 3 ( 4) 5 6 7 - 1|AMIGA_BUS_ENABLE_HIGH|OUT|*| 34| => | 2 3 4 ( 5) 6 7 8 9 - 2|AMIGA_ADDR_ENABLE|OUT|*| 33| => | 4 5 6 7 8 ( 9) 10 11 + 0| VMA| IO|*| 35| => | ( 0) 1 2 3 4 5 6 7 + 1|AMIGA_BUS_ENABLE_HIGH|OUT|*| 34| => | 2 3 ( 4) 5 6 7 8 9 + 2|AMIGA_ADDR_ENABLE|OUT|*| 33| => | 4 ( 5) 6 7 8 9 10 11 3| UDS_000| IO|*| 32| => | 6 7 ( 8) 9 10 11 12 13 4| LDS_000| IO|*| 31| => | 8 9 10 11 (12) 13 14 15 - 5| DTACK| IO|*| 30| => | 10 11 12 13 14 15 ( 0) 1 + 5| DTACK|INP|*| 30| => | 10 11 12 13 14 15 0 1 6| BG_000| IO|*| 29| => | 12 13 14 15 0 ( 1) 2 3 7| BGACK_000|INP|*| 28| => | 14 15 0 1 2 3 4 5 --------------------------------------------------------------------------- @@ -1034,7 +1015,7 @@ _|_________________|__|___|_____|__________________________________________ 2|AMIGA_ADDR_ENABLE|OUT|*| 33| => | Input macrocell [ -] 3| UDS_000| IO|*| 32| => | Input macrocell [ -] 4| LDS_000| IO|*| 31| => | Input macrocell [ -] - 5| DTACK| IO|*| 30| => | Input macrocell [ -] + 5| DTACK|INP|*| 30| => | Input macrocell [ -] 6| BG_000| IO|*| 29| => | Input macrocell [ -] | | | | | | IO paired w/ node [ RN_BG_000] 7| BGACK_000|INP|*| 28| => | Input macrocell [ -] @@ -1050,42 +1031,42 @@ IMX No. | +---- Block IO Pin or Macrocell Number ---|-------|----|---|---|----------|------|-|------------------------------ 0 [IOpin 0 | 35| IO VMA|*| ] paired w/[ RN_VMA] [RegIn 0 |174| -| | ] - [MCell 0 |173| IO DTACK| | ] + [MCell 0 |173|NOD RN_VMA| |*] paired w/[ VMA] [MCell 1 |175|NOD RN_BG_000| |*] paired w/[ BG_000] 1 [IOpin 1 | 34|OUT AMIGA_BUS_ENABLE_HIGH|*| ] [RegIn 1 |177| -| | ] - [MCell 2 |176|NOD cpu_est_3_| |*] + [MCell 2 |176|NOD cpu_est_2_| |*] [MCell 3 |178| -| | ] 2 [IOpin 2 | 33|OUT AMIGA_ADDR_ENABLE|*| ] [RegIn 2 |180| -| | ] - [MCell 4 |179|NOD RN_VMA| |*] paired w/[ VMA] - [MCell 5 |181|OUT AMIGA_BUS_ENABLE_HIGH| | ] + [MCell 4 |179|OUT AMIGA_BUS_ENABLE_HIGH| | ] + [MCell 5 |181|OUT AMIGA_ADDR_ENABLE| | ] 3 [IOpin 3 | 32| IO UDS_000|*|*] [RegIn 3 |183| -| | ] - [MCell 6 |182|NOD cpu_est_1_| |*] + [MCell 6 |182|NOD IPL_D0_1_| |*] [MCell 7 |184| -| | ] 4 [IOpin 4 | 31| IO LDS_000|*|*] [RegIn 4 |186| -| | ] [MCell 8 |185| IO UDS_000| | ] - [MCell 9 |187|OUT AMIGA_ADDR_ENABLE| | ] + [MCell 9 |187|NOD CLK_000_D_0_| |*] - 5 [IOpin 5 | 30| IO DTACK|*|*] + 5 [IOpin 5 | 30|INP DTACK|*|*] [RegIn 5 |189| -| | ] - [MCell 10 |188|NOD CLK_OUT_INTreg| |*] + [MCell 10 |188| -| | ] [MCell 11 |190| -| | ] 6 [IOpin 6 | 29| IO BG_000|*| ] paired w/[ RN_BG_000] [RegIn 6 |192| -| | ] [MCell 12 |191| IO LDS_000| | ] - [MCell 13 |193|NOD CLK_000_D_0_| |*] + [MCell 13 |193|NOD cpu_est_1_| |*] 7 [IOpin 7 | 28|INP BGACK_000|*|*] [RegIn 7 |195| -| | ] - [MCell 14 |194|NOD cpu_est_2_| |*] + [MCell 14 |194| -| | ] [MCell 15 |196| -| | ] --------------------------------------------------------------------------- =========================================================================== @@ -1095,36 +1076,36 @@ IMX No. | +---- Block IO Pin or Macrocell Number | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- Mux00| Input Pin ( 86)| RST -Mux01| Mcel 5 9 ( 235)| inst_AMIGA_BUS_ENABLE_DMA_HIGH +Mux01| Mcel 3 0 ( 173)| RN_VMA Mux02| Mcel 3 1 ( 175)| RN_BG_000 -Mux03| Mcel 3 2 ( 176)| cpu_est_3_ +Mux03| Input Pin ( 11)| CLK_000 Mux04| IOPin 2 6 ( 21)| BG_030 Mux05| Input Pin ( 14)| nEXP_SPACE Mux06| ... | ... -Mux07| ... | ... -Mux08| Mcel 4 8 ( 209)| inst_CLK_OUT_PRE_D -Mux09| Mcel 5 2 ( 224)| inst_VPA_D -Mux10| Mcel 3 4 ( 179)| RN_VMA -Mux11| Mcel 2 13 ( 169)| inst_DS_000_ENABLE +Mux07| Mcel 3 9 ( 187)| CLK_000_D_0_ +Mux08| Mcel 0 10 ( 116)| inst_AMIGA_BUS_ENABLE_DMA_HIGH +Mux09| Mcel 6 13 ( 265)| inst_LDS_000_INT +Mux10| Mcel 5 4 ( 227)| inst_AS_030_000_SYNC +Mux11| Mcel 1 6 ( 134)| inst_UDS_000_INT Mux12| Mcel 6 9 ( 259)| cpu_est_0_ Mux13| Mcel 7 5 ( 277)| CLK_000_D_1_ -Mux14| Input Pin ( 11)| CLK_000 -Mux15| Mcel 5 1 ( 223)| inst_UDS_000_INT -Mux16| Mcel 3 6 ( 182)| cpu_est_1_ -Mux17| Mcel 5 12 ( 239)| inst_LDS_000_INT -Mux18| Mcel 0 8 ( 113)| inst_AS_000_DMA +Mux14| ... | ... +Mux15| ... | ... +Mux16| Mcel 3 2 ( 176)| cpu_est_2_ +Mux17| ... | ... +Mux18| Mcel 0 8 ( 113)| cpu_est_3_ Mux19| IOPin 7 3 ( 82)| AS_030 Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux21| Mcel 1 13 ( 145)| inst_AS_030_000_SYNC -Mux22| Mcel 6 5 ( 253)| inst_RESET_OUT -Mux23| ... | ... -Mux24| Mcel 3 14 ( 194)| cpu_est_2_ +Mux21| IOPin 5 4 ( 56)| IPL_1_ +Mux22| Mcel 2 2 ( 152)| inst_DS_000_ENABLE +Mux23| Mcel 6 6 ( 254)| inst_VPA_D +Mux24| ... | ... Mux25| ... | ... Mux26| ... | ... Mux27| ... | ... -Mux28| Mcel 7 2 ( 272)| inst_AS_030_D0 -Mux29| Mcel 3 13 ( 193)| CLK_000_D_0_ -Mux30| ... | ... +Mux28| ... | ... +Mux29| Mcel 3 13 ( 193)| cpu_est_1_ +Mux30| Mcel 4 8 ( 209)| inst_AS_030_D0 Mux31| ... | ... Mux32| ... | ... --------------------------------------------------------------------------- @@ -1143,15 +1124,15 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ 2| | ? | | S | | 4 free | 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free 4| AS_000| IO| | S | 1 | 4 free | 1 XOR to [ 4] for 1 PT sig - 5| CIIN_0|NOD| | S | 2 | 4 to [ 5]| 1 XOR free + 5|inst_CLK_OUT_PRE_D|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig 6| | ? | | S | | 4 free | 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free - 8|inst_CLK_OUT_PRE_D|NOD| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig - 9| | ? | | S | | 4 free | 1 XOR free + 8|inst_AS_030_D0|NOD| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig + 9| N_60|NOD| | S | 2 | 4 to [ 9]| 1 XOR free 10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free 12| CIIN|OUT| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig -13| | ? | | S | | 4 free | 1 XOR free +13|inst_BGACK_030_INT_D|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig 14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- @@ -1168,18 +1149,18 @@ _|_________________|__|__|___|_____|_______________________________________ 0| BERR| IO| | S | 1 |=> can support up to [ 10] logic PT(s) 1|AMIGA_BUS_DATA_DIR|OUT| | S | 2 |=> can support up to [ 19] logic PT(s) 2| | ? | | S | |=> can support up to [ 14] logic PT(s) - 3| | ? | | S | |=> can support up to [ 14] logic PT(s) - 4| AS_000| IO| | S | 1 |=> can support up to [ 15] logic PT(s) - 5| CIIN_0|NOD| | S | 2 |=> can support up to [ 19] logic PT(s) - 6| | ? | | S | |=> can support up to [ 14] logic PT(s) - 7| | ? | | S | |=> can support up to [ 19] logic PT(s) - 8|inst_CLK_OUT_PRE_D|NOD| | S | 1 |=> can support up to [ 20] logic PT(s) - 9| | ? | | S | |=> can support up to [ 19] logic PT(s) -10| | ? | | S | |=> can support up to [ 19] logic PT(s) -11| | ? | | S | |=> can support up to [ 19] logic PT(s) -12| CIIN|OUT| | S | 1 |=> can support up to [ 20] logic PT(s) -13| | ? | | S | |=> can support up to [ 19] logic PT(s) -14| | ? | | S | |=> can support up to [ 15] logic PT(s) + 3| | ? | | S | |=> can support up to [ 18] logic PT(s) + 4| AS_000| IO| | S | 1 |=> can support up to [ 19] logic PT(s) + 5|inst_CLK_OUT_PRE_D|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) + 6| | ? | | S | |=> can support up to [ 18] logic PT(s) + 7| | ? | | S | |=> can support up to [ 14] logic PT(s) + 8|inst_AS_030_D0|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) + 9| N_60|NOD| | S | 2 |=> can support up to [ 19] logic PT(s) +10| | ? | | S | |=> can support up to [ 14] logic PT(s) +11| | ? | | S | |=> can support up to [ 18] logic PT(s) +12| CIIN|OUT| | S | 1 |=> can support up to [ 19] logic PT(s) +13|inst_BGACK_030_INT_D|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) +14| | ? | | S | |=> can support up to [ 14] logic PT(s) 15| | ? | | S | |=> can support up to [ 10] logic PT(s) --------------------------------------------------------------------------- =========================================================================== @@ -1195,15 +1176,15 @@ _|_________________|__|_____|____________________|________________________ 2| | | | => | 6 7 0 1 | 47 48 41 42 3| | | | => | 6 7 0 1 | 47 48 41 42 4| AS_000| IO| | => | 7 0 ( 1) 2 | 48 41 ( 42) 43 - 5| CIIN_0|NOD| | => | 7 0 1 2 | 48 41 42 43 + 5|inst_CLK_OUT_PRE_D|NOD| | => | 7 0 1 2 | 48 41 42 43 6| | | | => | 0 1 2 3 | 41 42 43 44 7| | | | => | 0 1 2 3 | 41 42 43 44 - 8|inst_CLK_OUT_PRE_D|NOD| | => | 1 2 3 4 | 42 43 44 45 - 9| | | | => | 1 2 3 4 | 42 43 44 45 + 8|inst_AS_030_D0|NOD| | => | 1 2 3 4 | 42 43 44 45 + 9| N_60|NOD| | => | 1 2 3 4 | 42 43 44 45 10| | | | => | 2 3 4 5 | 43 44 45 46 11| | | | => | 2 3 4 5 | 43 44 45 46 12| CIIN|OUT| | => | 3 4 5 ( 6)| 44 45 46 ( 47) -13| | | | => | 3 4 5 6 | 44 45 46 47 +13|inst_BGACK_030_INT_D|NOD| | => | 3 4 5 6 | 44 45 46 47 14| | | | => | 4 5 6 7 | 45 46 47 48 15| | | | => | 4 5 6 7 | 45 46 47 48 --------------------------------------------------------------------------- @@ -1265,7 +1246,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 2 [IOpin 2 | 43| -| | ] [RegIn 2 |204| -| | ] [MCell 4 |203| IO AS_000| | ] - [MCell 5 |205|NOD CIIN_0| |*] + [MCell 5 |205|NOD inst_CLK_OUT_PRE_D| |*] 3 [IOpin 3 | 44| -| | ] [RegIn 3 |207| -| | ] @@ -1274,8 +1255,8 @@ IMX No. | +---- Block IO Pin or Macrocell Number 4 [IOpin 4 | 45| -| | ] [RegIn 4 |210| -| | ] - [MCell 8 |209|NOD inst_CLK_OUT_PRE_D| |*] - [MCell 9 |211| -| | ] + [MCell 8 |209|NOD inst_AS_030_D0| |*] + [MCell 9 |211|NOD N_60| |*] 5 [IOpin 5 | 46| -| | ] [RegIn 5 |213| -| | ] @@ -1285,7 +1266,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 6 [IOpin 6 | 47|OUT CIIN|*| ] [RegIn 6 |216| -| | ] [MCell 12 |215|OUT CIIN| | ] - [MCell 13 |217| -| | ] + [MCell 13 |217|NOD inst_BGACK_030_INT_D| |*] 7 [IOpin 7 | 48|OUT AMIGA_BUS_DATA_DIR|*| ] [RegIn 7 |219| -| | ] @@ -1298,39 +1279,39 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux00| Input Pin ( 86)| RST Mux01| IOPin 5 2 ( 58)| FC_1_ -Mux02| Mcel 2 2 ( 152)| inst_AS_000_INT -Mux03| IOPin 0 2 ( 93)| A_DECODE_20_ -Mux04| IOPin 3 7 ( 28)| BGACK_000 -Mux05| IOPin 2 4 ( 19)| AHIGH_24_ -Mux06| IOPin 7 5 ( 80)| RW_000 +Mux02| IOPin 4 1 ( 42)| AS_000 +Mux03| IOPin 2 1 ( 16)| AHIGH_27_ +Mux04| IOPin 1 4 ( 6)| AHIGH_29_ +Mux05| Input Pin ( 14)| nEXP_SPACE +Mux06| IOPin 0 5 ( 96)| A_DECODE_16_ Mux07| IOPin 2 0 ( 15)| AHIGH_28_ Mux08| IOPin 0 0 ( 91)| FPU_SENSE Mux09| IOPin 7 3 ( 82)| AS_030 Mux10| ... | ... -Mux11| IOPin 0 5 ( 96)| A_DECODE_16_ +Mux11| IOPin 7 1 ( 84)| A_DECODE_22_ Mux12| IOPin 0 6 ( 97)| A_DECODE_19_ -Mux13| IOPin 1 4 ( 6)| AHIGH_29_ -Mux14| Mcel 4 5 ( 205)| CIIN_0 -Mux15| Input Pin ( 14)| nEXP_SPACE -Mux16| IOPin 4 1 ( 42)| AS_000 +Mux13| IOPin 5 1 ( 59)| A_DECODE_17_ +Mux14| Mcel 4 9 ( 211)| N_60 +Mux15| IOPin 0 3 ( 94)| A_DECODE_21_ +Mux16| Mcel 4 8 ( 209)| inst_AS_030_D0 Mux17| IOPin 0 4 ( 95)| A_DECODE_18_ -Mux18| IOPin 7 0 ( 85)| A_DECODE_23_ -Mux19| IOPin 1 5 ( 5)| AHIGH_30_ -Mux20| IOPin 7 1 ( 84)| A_DECODE_22_ -Mux21| IOPin 2 1 ( 16)| AHIGH_27_ +Mux18| IOPin 3 7 ( 28)| BGACK_000 +Mux19| Mcel 7 13 ( 289)| inst_CLK_OUT_PRE_50 +Mux20| IOPin 2 4 ( 19)| AHIGH_24_ +Mux21| IOPin 7 5 ( 80)| RW_000 Mux22| IOPin 2 3 ( 18)| AHIGH_25_ -Mux23| Mcel 6 2 ( 248)| inst_CLK_OUT_PRE_50 +Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 Mux24| IOPin 5 3 ( 57)| FC_0_ Mux25| IOPin 1 6 ( 4)| AHIGH_31_ Mux26| IOPin 2 2 ( 17)| AHIGH_26_ -Mux27| IOPin 5 1 ( 59)| A_DECODE_17_ -Mux28| Mcel 7 2 ( 272)| inst_AS_030_D0 -Mux29| ... | ... +Mux27| Mcel 2 6 ( 158)| inst_AS_000_INT +Mux28| IOPin 1 5 ( 5)| AHIGH_30_ +Mux29| IOPin 0 2 ( 93)| A_DECODE_20_ Mux30| ... | ... -Mux31| IOPin 0 3 ( 94)| A_DECODE_21_ -Mux32| Mcel 6 5 ( 253)| inst_RESET_OUT +Mux31| ... | ... +Mux32| IOPin 7 0 ( 85)| A_DECODE_23_ --------------------------------------------------------------------------- =========================================================================== < Block [ 5] > Macrocell (MCell) Cluster Assignments @@ -1343,18 +1324,18 @@ Mux32| Mcel 6 5 ( 253)| inst_RESET_OUT | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| SM_AMIGA_6_|NOD| | S | 3 | 4 to [ 0]| 1 XOR free - 1|inst_UDS_000_INT|NOD| | S | 2 | 4 to [ 1]| 1 XOR free - 2| inst_VPA_D|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig + 1|inst_AS_030_D1|NOD| | S | 2 | 4 to [ 1]| 1 XOR free + 2| | ? | | S | | 4 free | 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free - 4| SM_AMIGA_i_7_|NOD| | S | 3 :+: 1| 4 to [ 4]| 1 XOR to [ 4] - 5|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | S | 2 | 4 to [ 5]| 1 XOR free + 4|inst_AS_030_000_SYNC|NOD| | S | 7 | 4 to [ 4]| 1 XOR to [ 4] as logic PT + 5| CLK_000_D_4_|NOD| | S | 1 | 4 to [ 4]| 1 XOR to [ 5] for 1 PT sig 6| | ? | | S | | 4 free | 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free - 8| SM_AMIGA_1_|NOD| | S | 3 | 4 to [ 8]| 1 XOR free - 9|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | S | 2 | 4 to [ 9]| 1 XOR free + 8| SM_AMIGA_i_7_|NOD| | S | 3 :+: 1| 4 to [ 8]| 1 XOR to [ 8] + 9| inst_DTACK_D0|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig 10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free -12|inst_LDS_000_INT|NOD| | S | 3 | 4 to [12]| 1 XOR free +12| SM_AMIGA_5_|NOD| | S | 3 | 4 to [12]| 1 XOR free 13| CLK_000_D_3_|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig 14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free @@ -1369,19 +1350,19 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| SM_AMIGA_6_|NOD| | S | 3 |=> can support up to [ 9] logic PT(s) - 1|inst_UDS_000_INT|NOD| | S | 2 |=> can support up to [ 14] logic PT(s) - 2| inst_VPA_D|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) - 3| | ? | | S | |=> can support up to [ 9] logic PT(s) - 4| SM_AMIGA_i_7_|NOD| | S | 3 :+: 1|=> can support up to [ 14] logic PT(s) - 5|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) + 0| SM_AMIGA_6_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s) + 1|inst_AS_030_D1|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) + 2| | ? | | S | |=> can support up to [ 10] logic PT(s) + 3| | ? | | S | |=> can support up to [ 10] logic PT(s) + 4|inst_AS_030_000_SYNC|NOD| | S | 7 |=> can support up to [ 19] logic PT(s) + 5| CLK_000_D_4_|NOD| | S | 1 |=> can support up to [ 11] logic PT(s) 6| | ? | | S | |=> can support up to [ 10] logic PT(s) - 7| | ? | | S | |=> can support up to [ 10] logic PT(s) - 8| SM_AMIGA_1_|NOD| | S | 3 |=> can support up to [ 15] logic PT(s) - 9|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) -10| | ? | | S | |=> can support up to [ 10] logic PT(s) + 7| | ? | | S | |=> can support up to [ 14] logic PT(s) + 8| SM_AMIGA_i_7_|NOD| | S | 3 :+: 1|=> can support up to [ 18] logic PT(s) + 9| inst_DTACK_D0|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) +10| | ? | | S | |=> can support up to [ 14] logic PT(s) 11| | ? | | S | |=> can support up to [ 14] logic PT(s) -12|inst_LDS_000_INT|NOD| | S | 3 |=> can support up to [ 19] logic PT(s) +12| SM_AMIGA_5_|NOD| | S | 3 |=> can support up to [ 19] logic PT(s) 13| CLK_000_D_3_|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) 14| | ? | | S | |=> can support up to [ 14] logic PT(s) 15| | ? | | S | |=> can support up to [ 10] logic PT(s) @@ -1395,18 +1376,18 @@ _|_________________|__|__|___|_____|_______________________________________ | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ 0| SM_AMIGA_6_|NOD| | => | 5 6 7 0 | 55 54 53 60 - 1|inst_UDS_000_INT|NOD| | => | 5 6 7 0 | 55 54 53 60 - 2| inst_VPA_D|NOD| | => | 6 7 0 1 | 54 53 60 59 + 1|inst_AS_030_D1|NOD| | => | 5 6 7 0 | 55 54 53 60 + 2| | | | => | 6 7 0 1 | 54 53 60 59 3| | | | => | 6 7 0 1 | 54 53 60 59 - 4| SM_AMIGA_i_7_|NOD| | => | 7 0 1 2 | 53 60 59 58 - 5|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | => | 7 0 1 2 | 53 60 59 58 + 4|inst_AS_030_000_SYNC|NOD| | => | 7 0 1 2 | 53 60 59 58 + 5| CLK_000_D_4_|NOD| | => | 7 0 1 2 | 53 60 59 58 6| | | | => | 0 1 2 3 | 60 59 58 57 7| | | | => | 0 1 2 3 | 60 59 58 57 - 8| SM_AMIGA_1_|NOD| | => | 1 2 3 4 | 59 58 57 56 - 9|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | => | 1 2 3 4 | 59 58 57 56 + 8| SM_AMIGA_i_7_|NOD| | => | 1 2 3 4 | 59 58 57 56 + 9| inst_DTACK_D0|NOD| | => | 1 2 3 4 | 59 58 57 56 10| | | | => | 2 3 4 5 | 58 57 56 55 11| | | | => | 2 3 4 5 | 58 57 56 55 -12|inst_LDS_000_INT|NOD| | => | 3 4 5 6 | 57 56 55 54 +12| SM_AMIGA_5_|NOD| | => | 3 4 5 6 | 57 56 55 54 13| CLK_000_D_3_|NOD| | => | 3 4 5 6 | 57 56 55 54 14| | | | => | 4 5 6 7 | 56 55 54 53 15| | | | => | 4 5 6 7 | 56 55 54 53 @@ -1459,17 +1440,17 @@ IMX No. | +---- Block IO Pin or Macrocell Number 0 [IOpin 0 | 60|INP A_1_|*|*] [RegIn 0 |222| -| | ] [MCell 0 |221|NOD SM_AMIGA_6_| |*] - [MCell 1 |223|NOD inst_UDS_000_INT| |*] + [MCell 1 |223|NOD inst_AS_030_D1| |*] 1 [IOpin 1 | 59|INP A_DECODE_17_|*|*] [RegIn 1 |225| -| | ] - [MCell 2 |224|NOD inst_VPA_D| |*] + [MCell 2 |224| -| | ] [MCell 3 |226| -| | ] 2 [IOpin 2 | 58|INP FC_1_|*|*] [RegIn 2 |228| -| | ] - [MCell 4 |227|NOD SM_AMIGA_i_7_| |*] - [MCell 5 |229|NOD inst_AMIGA_BUS_ENABLE_DMA_LOW| |*] + [MCell 4 |227|NOD inst_AS_030_000_SYNC| |*] + [MCell 5 |229|NOD CLK_000_D_4_| |*] 3 [IOpin 3 | 57|INP FC_0_|*|*] [RegIn 3 |231| -| | ] @@ -1478,8 +1459,8 @@ IMX No. | +---- Block IO Pin or Macrocell Number 4 [IOpin 4 | 56|INP IPL_1_|*|*] [RegIn 4 |234| -| | ] - [MCell 8 |233|NOD SM_AMIGA_1_| |*] - [MCell 9 |235|NOD inst_AMIGA_BUS_ENABLE_DMA_HIGH| |*] + [MCell 8 |233|NOD SM_AMIGA_i_7_| |*] + [MCell 9 |235|NOD inst_DTACK_D0| |*] 5 [IOpin 5 | 55| -| | ] [RegIn 5 |237| -| | ] @@ -1488,7 +1469,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 6 [IOpin 6 | 54| -| | ] [RegIn 6 |240| -| | ] - [MCell 12 |239|NOD inst_LDS_000_INT| |*] + [MCell 12 |239|NOD SM_AMIGA_5_| |*] [MCell 13 |241|NOD CLK_000_D_3_| |*] 7 [IOpin 7 | 53| -| | ] @@ -1502,37 +1483,37 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| IOPin 6 5 ( 70)| SIZE_0_ -Mux01| Mcel 3 13 ( 193)| CLK_000_D_0_ -Mux02| Mcel 5 8 ( 233)| SM_AMIGA_1_ -Mux03| Mcel 2 9 ( 163)| SM_AMIGA_2_ -Mux04| Mcel 7 5 ( 277)| CLK_000_D_1_ +Mux00| Input Pin ( 86)| RST +Mux01| IOPin 5 2 ( 58)| FC_1_ +Mux02| Mcel 4 13 ( 217)| inst_BGACK_030_INT_D +Mux03| ... | ... +Mux04| IOPin 0 4 ( 95)| A_DECODE_18_ Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| Mcel 5 13 ( 241)| CLK_000_D_3_ -Mux07| Mcel 2 14 ( 170)| CLK_000_D_4_ -Mux08| ... | ... -Mux09| Mcel 0 12 ( 119)| SM_AMIGA_0_ -Mux10| Mcel 5 1 ( 223)| inst_UDS_000_INT -Mux11| IOPin 5 0 ( 60)| A_1_ -Mux12| ... | ... -Mux13| Input Pin ( 36)| VPA -Mux14| Mcel 5 5 ( 229)| inst_AMIGA_BUS_ENABLE_DMA_LOW -Mux15| IOPin 6 4 ( 69)| A_0_ -Mux16| ... | ... -Mux17| Mcel 5 12 ( 239)| inst_LDS_000_INT -Mux18| Mcel 5 9 ( 235)| inst_AMIGA_BUS_ENABLE_DMA_HIGH -Mux19| Mcel 7 13 ( 289)| inst_BGACK_030_INT_D -Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux21| Mcel 1 13 ( 145)| inst_AS_030_000_SYNC +Mux06| IOPin 5 3 ( 57)| FC_0_ +Mux07| Mcel 3 9 ( 187)| CLK_000_D_0_ +Mux08| IOPin 5 1 ( 59)| A_DECODE_17_ +Mux09| IOPin 3 5 ( 30)| DTACK +Mux10| Mcel 5 1 ( 223)| inst_AS_030_D1 +Mux11| IOPin 0 5 ( 96)| A_DECODE_16_ +Mux12| IOPin 0 6 ( 97)| A_DECODE_19_ +Mux13| Mcel 7 5 ( 277)| CLK_000_D_1_ +Mux14| Mcel 5 5 ( 229)| CLK_000_D_4_ +Mux15| Mcel 5 13 ( 241)| CLK_000_D_3_ +Mux16| Mcel 4 8 ( 209)| inst_AS_030_D0 +Mux17| Mcel 5 12 ( 239)| SM_AMIGA_5_ +Mux18| ... | ... +Mux19| IOPin 7 3 ( 82)| AS_030 +Mux20| Mcel 5 8 ( 233)| SM_AMIGA_i_7_ +Mux21| Mcel 7 6 ( 278)| CLK_000_D_2_ Mux22| ... | ... -Mux23| ... | ... -Mux24| Input Pin ( 86)| RST +Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux24| Mcel 0 12 ( 119)| SM_AMIGA_0_ Mux25| Mcel 5 0 ( 221)| SM_AMIGA_6_ Mux26| ... | ... -Mux27| IOPin 7 6 ( 79)| SIZE_1_ +Mux27| ... | ... Mux28| ... | ... -Mux29| Mcel 5 4 ( 227)| SM_AMIGA_i_7_ -Mux30| Mcel 7 6 ( 278)| CLK_000_D_2_ +Mux29| Mcel 5 4 ( 227)| inst_AS_030_000_SYNC +Mux30| ... | ... Mux31| ... | ... Mux32| ... | ... --------------------------------------------------------------------------- @@ -1546,21 +1527,21 @@ Mux32| ... | ... | Sig Type-+ | | | | | | | XOR to Mcell Assignment | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| RW| IO| | S | 2 | 4 to [ 0]| 1 XOR free + 0| RW| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig 1| CLK_DIV_OUT|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig - 2|inst_CLK_OUT_PRE_50|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig + 2|inst_DSACK1_INT|NOD| | S | 2 | 4 to [ 2]| 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free 4| E|OUT| | S | 2 | 4 to [ 4]| 1 XOR free - 5|inst_RESET_OUT|NOD| | S | 2 | 4 to [ 5]| 1 XOR free - 6| RST_DLY_0_|NOD| | S | 4 | 4 to [ 6]| 1 XOR free + 5| SM_AMIGA_4_|NOD| | S | 3 | 4 to [ 5]| 1 XOR free + 6| inst_VPA_D|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig 7| | ? | | S | | 4 free | 1 XOR free - 8| A_0_| IO| | S | 3 | 4 to [ 8]| 1 XOR free + 8| A_0_| IO| | S | 2 | 4 to [ 8]| 1 XOR free 9| cpu_est_0_|NOD| | S | 3 | 4 to [ 9]| 1 XOR free -10| RST_DLY_2_|NOD| | S | 2 | 4 to [10]| 1 XOR free +10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free -12| SIZE_0_| IO| | S | 3 | 4 to [12]| 1 XOR free -13| SM_AMIGA_5_|NOD| | S | 3 | 4 to [13]| 1 XOR free -14| RST_DLY_1_|NOD| | S | 2 :+: 1| 4 to [14]| 1 XOR to [14] +12| SIZE_0_| IO| | S | 2 | 4 to [12]| 1 XOR free +13|inst_LDS_000_INT|NOD| | S | 3 | 4 to [13]| 1 XOR free +14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== @@ -1573,22 +1554,22 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| RW| IO| | S | 2 |=> can support up to [ 13] logic PT(s) + 0| RW| IO| | S | 1 |=> can support up to [ 9] logic PT(s) 1| CLK_DIV_OUT|OUT| | S | 1 |=> can support up to [ 14] logic PT(s) - 2|inst_CLK_OUT_PRE_50|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) - 3| | ? | | S | |=> can support up to [ 9] logic PT(s) - 4| E|OUT| | S | 2 |=> can support up to [ 10] logic PT(s) - 5|inst_RESET_OUT|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) - 6| RST_DLY_0_|NOD| | S | 4 |=> can support up to [ 10] logic PT(s) - 7| | ? | | S | |=> can support up to [ 5] logic PT(s) - 8| A_0_| IO| | S | 3 |=> can support up to [ 10] logic PT(s) - 9| cpu_est_0_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s) -10| RST_DLY_2_|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) -11| | ? | | S | |=> can support up to [ 5] logic PT(s) -12| SIZE_0_| IO| | S | 3 |=> can support up to [ 10] logic PT(s) -13| SM_AMIGA_5_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s) -14| RST_DLY_1_|NOD| | S | 2 :+: 1|=> can support up to [ 9] logic PT(s) -15| | ? | | S | |=> can support up to [ 5] logic PT(s) + 2|inst_DSACK1_INT|NOD| | S | 2 |=> can support up to [ 14] logic PT(s) + 3| | ? | | S | |=> can support up to [ 5] logic PT(s) + 4| E|OUT| | S | 2 |=> can support up to [ 14] logic PT(s) + 5| SM_AMIGA_4_|NOD| | S | 3 |=> can support up to [ 14] logic PT(s) + 6| inst_VPA_D|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) + 7| | ? | | S | |=> can support up to [ 9] logic PT(s) + 8| A_0_| IO| | S | 2 |=> can support up to [ 15] logic PT(s) + 9| cpu_est_0_|NOD| | S | 3 |=> can support up to [ 15] logic PT(s) +10| | ? | | S | |=> can support up to [ 10] logic PT(s) +11| | ? | | S | |=> can support up to [ 10] logic PT(s) +12| SIZE_0_| IO| | S | 2 |=> can support up to [ 15] logic PT(s) +13|inst_LDS_000_INT|NOD| | S | 3 |=> can support up to [ 15] logic PT(s) +14| | ? | | S | |=> can support up to [ 10] logic PT(s) +15| | ? | | S | |=> can support up to [ 10] logic PT(s) --------------------------------------------------------------------------- =========================================================================== < Block [ 6] > Node-Pin Assignments @@ -1600,19 +1581,19 @@ _|_________________|__|__|___|_____|_______________________________________ _|_________________|__|_____|____________________|________________________ 0| RW| IO| | => | 5 ( 6) 7 0 | 70 ( 71) 72 65 1| CLK_DIV_OUT|OUT| | => | 5 6 7 ( 0)| 70 71 72 ( 65) - 2|inst_CLK_OUT_PRE_50|NOD| | => | 6 7 0 1 | 71 72 65 66 + 2|inst_DSACK1_INT|NOD| | => | 6 7 0 1 | 71 72 65 66 3| | | | => | 6 7 0 1 | 71 72 65 66 4| E|OUT| | => | 7 0 ( 1) 2 | 72 65 ( 66) 67 - 5|inst_RESET_OUT|NOD| | => | 7 0 1 2 | 72 65 66 67 - 6| RST_DLY_0_|NOD| | => | 0 1 2 3 | 65 66 67 68 + 5| SM_AMIGA_4_|NOD| | => | 7 0 1 2 | 72 65 66 67 + 6| inst_VPA_D|NOD| | => | 0 1 2 3 | 65 66 67 68 7| | | | => | 0 1 2 3 | 65 66 67 68 8| A_0_| IO| | => | 1 2 3 ( 4)| 66 67 68 ( 69) 9| cpu_est_0_|NOD| | => | 1 2 3 4 | 66 67 68 69 -10| RST_DLY_2_|NOD| | => | 2 3 4 5 | 67 68 69 70 +10| | | | => | 2 3 4 5 | 67 68 69 70 11| | | | => | 2 3 4 5 | 67 68 69 70 12| SIZE_0_| IO| | => | 3 4 ( 5) 6 | 68 69 ( 70) 71 -13| SM_AMIGA_5_|NOD| | => | 3 4 5 6 | 68 69 70 71 -14| RST_DLY_1_|NOD| | => | 4 5 6 7 | 69 70 71 72 +13|inst_LDS_000_INT|NOD| | => | 3 4 5 6 | 68 69 70 71 +14| | | | => | 4 5 6 7 | 69 70 71 72 15| | | | => | 4 5 6 7 | 69 70 71 72 --------------------------------------------------------------------------- =========================================================================== @@ -1647,11 +1628,8 @@ _|_________________|__|___|_____|__________________________________________ 2| IPL_0_|INP|*| 67| => | Input macrocell [ -] 3| IPL_2_|INP|*| 68| => | Input macrocell [ -] 4| A_0_| IO|*| 69| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_A_0_] 5| SIZE_0_| IO|*| 70| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_SIZE_0_] 6| RW| IO|*| 71| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_RW] 7| | | | 72| => | Input macrocell [ -] --------------------------------------------------------------------------- =========================================================================== @@ -1665,42 +1643,42 @@ IMX No. | +---- Block IO Pin or Macrocell Number ---|-------|----|---|---|----------|------|-|------------------------------ 0 [IOpin 0 | 65|OUT CLK_DIV_OUT|*| ] [RegIn 0 |246| -| | ] - [MCell 0 |245|NOD RN_RW| |*] paired w/[ RW] + [MCell 0 |245| IO RW| | ] [MCell 1 |247|OUT CLK_DIV_OUT| | ] 1 [IOpin 1 | 66|OUT E|*| ] [RegIn 1 |249| -| | ] - [MCell 2 |248|NOD inst_CLK_OUT_PRE_50| |*] + [MCell 2 |248|NOD inst_DSACK1_INT| |*] [MCell 3 |250| -| | ] 2 [IOpin 2 | 67|INP IPL_0_|*|*] [RegIn 2 |252| -| | ] [MCell 4 |251|OUT E| | ] - [MCell 5 |253|NOD inst_RESET_OUT| |*] + [MCell 5 |253|NOD SM_AMIGA_4_| |*] 3 [IOpin 3 | 68|INP IPL_2_|*|*] [RegIn 3 |255| -| | ] - [MCell 6 |254|NOD RST_DLY_0_| |*] + [MCell 6 |254|NOD inst_VPA_D| |*] [MCell 7 |256| -| | ] - 4 [IOpin 4 | 69| IO A_0_|*|*] paired w/[ RN_A_0_] + 4 [IOpin 4 | 69| IO A_0_|*|*] [RegIn 4 |258| -| | ] - [MCell 8 |257|NOD RN_A_0_| |*] paired w/[ A_0_] + [MCell 8 |257| IO A_0_| | ] [MCell 9 |259|NOD cpu_est_0_| |*] - 5 [IOpin 5 | 70| IO SIZE_0_|*|*] paired w/[ RN_SIZE_0_] + 5 [IOpin 5 | 70| IO SIZE_0_|*|*] [RegIn 5 |261| -| | ] - [MCell 10 |260|NOD RST_DLY_2_| |*] + [MCell 10 |260| -| | ] [MCell 11 |262| -| | ] - 6 [IOpin 6 | 71| IO RW|*|*] paired w/[ RN_RW] + 6 [IOpin 6 | 71| IO RW|*|*] [RegIn 6 |264| -| | ] - [MCell 12 |263|NOD RN_SIZE_0_| |*] paired w/[ SIZE_0_] - [MCell 13 |265|NOD SM_AMIGA_5_| |*] + [MCell 12 |263| IO SIZE_0_| | ] + [MCell 13 |265|NOD inst_LDS_000_INT| |*] 7 [IOpin 7 | 72| -| | ] [RegIn 7 |267| -| | ] - [MCell 14 |266|NOD RST_DLY_1_| |*] + [MCell 14 |266| -| | ] [MCell 15 |268| -| | ] --------------------------------------------------------------------------- =========================================================================== @@ -1709,39 +1687,39 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| IOPin 3 4 ( 31)| LDS_000 -Mux01| Mcel 3 13 ( 193)| CLK_000_D_0_ -Mux02| Mcel 3 10 ( 188)| CLK_OUT_INTreg -Mux03| Mcel 3 2 ( 176)| cpu_est_3_ -Mux04| Mcel 6 2 ( 248)| inst_CLK_OUT_PRE_50 -Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| IOPin 7 5 ( 80)| RW_000 -Mux07| Mcel 6 12 ( 263)| RN_SIZE_0_ +Mux00| Input Pin ( 86)| RST +Mux01| Mcel 5 12 ( 239)| SM_AMIGA_5_ +Mux02| Mcel 0 5 ( 109)| SM_AMIGA_1_ +Mux03| Mcel 3 2 ( 176)| cpu_est_2_ +Mux04| Mcel 6 2 ( 248)| inst_DSACK1_INT +Mux05| Mcel 5 0 ( 221)| SM_AMIGA_6_ +Mux06| IOPin 7 6 ( 79)| SIZE_1_ +Mux07| Mcel 3 9 ( 187)| CLK_000_D_0_ Mux08| IOPin 3 3 ( 32)| UDS_000 -Mux09| Mcel 6 13 ( 265)| SM_AMIGA_5_ -Mux10| Mcel 6 14 ( 266)| RST_DLY_1_ +Mux09| Mcel 6 13 ( 265)| inst_LDS_000_INT +Mux10| Input Pin ( 36)| VPA Mux11| ... | ... -Mux12| Mcel 6 9 ( 259)| cpu_est_0_ -Mux13| Mcel 6 8 ( 257)| RN_A_0_ -Mux14| ... | ... -Mux15| ... | ... -Mux16| Mcel 3 6 ( 182)| cpu_est_1_ -Mux17| Mcel 6 0 ( 245)| RN_RW -Mux18| ... | ... -Mux19| Mcel 7 13 ( 289)| inst_BGACK_030_INT_D +Mux12| Mcel 0 1 ( 103)| CLK_OUT_INTreg +Mux13| Mcel 7 5 ( 277)| CLK_000_D_1_ +Mux14| IOPin 6 5 ( 70)| SIZE_0_ +Mux15| IOPin 6 4 ( 69)| A_0_ +Mux16| ... | ... +Mux17| ... | ... +Mux18| Mcel 0 8 ( 113)| cpu_est_3_ +Mux19| IOPin 7 3 ( 82)| AS_030 Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux21| Input Pin ( 86)| RST -Mux22| Mcel 6 10 ( 260)| RST_DLY_2_ -Mux23| Mcel 6 6 ( 254)| RST_DLY_0_ -Mux24| Mcel 3 14 ( 194)| cpu_est_2_ -Mux25| Mcel 5 0 ( 221)| SM_AMIGA_6_ +Mux21| Mcel 3 13 ( 193)| cpu_est_1_ +Mux22| Mcel 6 5 ( 253)| SM_AMIGA_4_ +Mux23| ... | ... +Mux24| IOPin 3 4 ( 31)| LDS_000 +Mux25| ... | ... Mux26| ... | ... -Mux27| Mcel 7 5 ( 277)| CLK_000_D_1_ -Mux28| ... | ... +Mux27| Mcel 6 9 ( 259)| cpu_est_0_ +Mux28| IOPin 7 5 ( 80)| RW_000 Mux29| ... | ... Mux30| ... | ... Mux31| ... | ... -Mux32| Mcel 6 5 ( 253)| inst_RESET_OUT +Mux32| ... | ... --------------------------------------------------------------------------- =========================================================================== < Block [ 7] > Macrocell (MCell) Cluster Assignments @@ -1755,7 +1733,7 @@ Mux32| Mcel 6 5 ( 253)| inst_RESET_OUT _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| RW_000| IO| | S | 4 | 4 to [ 0]| 1 XOR free 1| FPU_CS|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig - 2|inst_AS_030_D0|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig + 2| inst_AMIGA_DS|NOD| | S | 2 | 4 to [ 2]| 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free 4| BGACK_030| IO| | S | 3 | 4 to [ 4]| 1 XOR free 5| CLK_000_D_1_|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig @@ -1765,8 +1743,8 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ 9| DSACK1|OUT| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig 10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free -12| SIZE_1_| IO| | S | 3 | 4 to [12]| 1 XOR free -13|inst_BGACK_030_INT_D|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig +12| SIZE_1_| IO| | S | 2 | 4 to [12]| 1 XOR free +13|inst_CLK_OUT_PRE_50|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig 14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- @@ -1780,10 +1758,10 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| RW_000| IO| | S | 4 |=> can support up to [ 13] logic PT(s) - 1| FPU_CS|OUT| | S | 1 |=> can support up to [ 14] logic PT(s) - 2|inst_AS_030_D0|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) - 3| | ? | | S | |=> can support up to [ 13] logic PT(s) + 0| RW_000| IO| | S | 4 |=> can support up to [ 9] logic PT(s) + 1| FPU_CS|OUT| | S | 1 |=> can support up to [ 10] logic PT(s) + 2| inst_AMIGA_DS|NOD| | S | 2 |=> can support up to [ 14] logic PT(s) + 3| | ? | | S | |=> can support up to [ 9] logic PT(s) 4| BGACK_030| IO| | S | 3 |=> can support up to [ 18] logic PT(s) 5| CLK_000_D_1_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) 6| CLK_000_D_2_|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) @@ -1792,8 +1770,8 @@ _|_________________|__|__|___|_____|_______________________________________ 9| DSACK1|OUT| | S | 1 |=> can support up to [ 19] logic PT(s) 10| | ? | | S | |=> can support up to [ 14] logic PT(s) 11| | ? | | S | |=> can support up to [ 14] logic PT(s) -12| SIZE_1_| IO| | S | 3 |=> can support up to [ 19] logic PT(s) -13|inst_BGACK_030_INT_D|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) +12| SIZE_1_| IO| | S | 2 |=> can support up to [ 19] logic PT(s) +13|inst_CLK_OUT_PRE_50|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) 14| | ? | | S | |=> can support up to [ 14] logic PT(s) 15| | ? | | S | |=> can support up to [ 10] logic PT(s) --------------------------------------------------------------------------- @@ -1807,7 +1785,7 @@ _|_________________|__|__|___|_____|_______________________________________ _|_________________|__|_____|____________________|________________________ 0| RW_000| IO| | => |( 5) 6 7 0 |( 80) 79 78 85 1| FPU_CS|OUT| | => | 5 6 ( 7) 0 | 80 79 ( 78) 85 - 2|inst_AS_030_D0|NOD| | => | 6 7 0 1 | 79 78 85 84 + 2| inst_AMIGA_DS|NOD| | => | 6 7 0 1 | 79 78 85 84 3| | | | => | 6 7 0 1 | 79 78 85 84 4| BGACK_030| IO| | => | 7 0 1 ( 2)| 78 85 84 ( 83) 5| CLK_000_D_1_|NOD| | => | 7 0 1 2 | 78 85 84 83 @@ -1818,7 +1796,7 @@ _|_________________|__|_____|____________________|________________________ 10| | | | => | 2 3 4 5 | 83 82 81 80 11| | | | => | 2 3 4 5 | 83 82 81 80 12| SIZE_1_| IO| | => | 3 4 5 ( 6)| 82 81 80 ( 79) -13|inst_BGACK_030_INT_D|NOD| | => | 3 4 5 6 | 82 81 80 79 +13|inst_CLK_OUT_PRE_50|NOD| | => | 3 4 5 6 | 82 81 80 79 14| | | | => | 4 5 6 7 | 81 80 79 78 15| | | | => | 4 5 6 7 | 81 80 79 78 --------------------------------------------------------------------------- @@ -1858,7 +1836,6 @@ _|_________________|__|___|_____|__________________________________________ 5| RW_000| IO|*| 80| => | Input macrocell [ -] | | | | | | IO paired w/ node [ RN_RW_000] 6| SIZE_1_| IO|*| 79| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_SIZE_1_] 7| FPU_CS|OUT|*| 78| => | Input macrocell [ -] --------------------------------------------------------------------------- =========================================================================== @@ -1877,7 +1854,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 1 [IOpin 1 | 84|INP A_DECODE_22_|*|*] [RegIn 1 |273| -| | ] - [MCell 2 |272|NOD inst_AS_030_D0| |*] + [MCell 2 |272|NOD inst_AMIGA_DS| |*] [MCell 3 |274| -| | ] 2 [IOpin 2 | 83| IO BGACK_030|*| ] paired w/[ RN_BGACK_030] @@ -1900,10 +1877,10 @@ IMX No. | +---- Block IO Pin or Macrocell Number [MCell 10 |284| -| | ] [MCell 11 |286| -| | ] - 6 [IOpin 6 | 79| IO SIZE_1_|*|*] paired w/[ RN_SIZE_1_] + 6 [IOpin 6 | 79| IO SIZE_1_|*|*] [RegIn 6 |288| -| | ] - [MCell 12 |287|NOD RN_SIZE_1_| |*] paired w/[ SIZE_1_] - [MCell 13 |289|NOD inst_BGACK_030_INT_D| |*] + [MCell 12 |287| IO SIZE_1_| | ] + [MCell 13 |289|NOD inst_CLK_OUT_PRE_50| |*] 7 [IOpin 7 | 78|OUT FPU_CS|*| ] [RegIn 7 |291| -| | ] @@ -1918,35 +1895,35 @@ IMX No. | +---- Block IO Pin or Macrocell Number --|--|--------------------|--------------------------------------------------- Mux00| Input Pin ( 86)| RST Mux01| IOPin 5 2 ( 58)| FC_1_ -Mux02| Mcel 0 5 ( 109)| inst_DSACK1_INT -Mux03| Mcel 0 8 ( 113)| inst_AS_000_DMA +Mux02| Mcel 5 8 ( 233)| SM_AMIGA_i_7_ +Mux03| ... | ... Mux04| IOPin 0 4 ( 95)| A_DECODE_18_ -Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| IOPin 0 5 ( 96)| A_DECODE_16_ -Mux07| Mcel 7 13 ( 289)| inst_BGACK_030_INT_D -Mux08| IOPin 3 3 ( 32)| UDS_000 -Mux09| IOPin 7 3 ( 82)| AS_030 -Mux10| Mcel 5 4 ( 227)| SM_AMIGA_i_7_ -Mux11| IOPin 6 6 ( 71)| RW -Mux12| IOPin 0 6 ( 97)| A_DECODE_19_ +Mux05| Mcel 5 0 ( 221)| SM_AMIGA_6_ +Mux06| IOPin 0 6 ( 97)| A_DECODE_19_ +Mux07| Mcel 7 13 ( 289)| inst_CLK_OUT_PRE_50 +Mux08| IOPin 6 6 ( 71)| RW +Mux09| Mcel 0 12 ( 119)| SM_AMIGA_0_ +Mux10| ... | ... +Mux11| IOPin 0 5 ( 96)| A_DECODE_16_ +Mux12| IOPin 3 3 ( 32)| UDS_000 Mux13| IOPin 5 1 ( 59)| A_DECODE_17_ Mux14| ... | ... -Mux15| Mcel 0 12 ( 119)| SM_AMIGA_0_ +Mux15| Input Pin ( 14)| nEXP_SPACE Mux16| IOPin 4 1 ( 42)| AS_000 Mux17| IOPin 5 3 ( 57)| FC_0_ Mux18| IOPin 3 7 ( 28)| BGACK_000 Mux19| IOPin 0 0 ( 91)| FPU_SENSE Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux21| Mcel 3 13 ( 193)| CLK_000_D_0_ -Mux22| Mcel 6 5 ( 253)| inst_RESET_OUT +Mux21| ... | ... +Mux22| ... | ... Mux23| Mcel 7 0 ( 269)| RN_RW_000 Mux24| IOPin 3 4 ( 31)| LDS_000 -Mux25| Mcel 5 0 ( 221)| SM_AMIGA_6_ +Mux25| Mcel 3 9 ( 187)| CLK_000_D_0_ Mux26| ... | ... Mux27| Mcel 7 5 ( 277)| CLK_000_D_1_ Mux28| ... | ... -Mux29| Mcel 7 12 ( 287)| RN_SIZE_1_ -Mux30| ... | ... -Mux31| ... | ... -Mux32| ... | ... +Mux29| ... | ... +Mux30| Mcel 2 13 ( 169)| inst_AS_000_DMA +Mux31| Mcel 6 2 ( 248)| inst_DSACK1_INT +Mux32| IOPin 7 3 ( 82)| AS_030 --------------------------------------------------------------------------- \ No newline at end of file diff --git a/Logic/68030_tk.rpt b/Logic/68030_tk.rpt index bd4efef..d64aec7 100644 --- a/Logic/68030_tk.rpt +++ b/Logic/68030_tk.rpt @@ -12,7 +12,7 @@ Project_Summary Project Name : 68030_tk Project Path : C:\Users\Matze\Amiga\Hardwarehacks\68030-TK\GitHub\Logic -Project Fitted on : Thu Dec 29 16:02:00 2016 +Project Fitted on : Sat Dec 30 00:43:46 2017 Device : M4A5-128/64 Package : 100TQFP @@ -37,11 +37,11 @@ Fitter 00:00:00 Design_Summary ~~~~~~~~~~~~~~ - Total Input Pins : 24 + Total Input Pins : 23 Total Output Pins : 18 - Total Bidir I/O Pins : 19 - Total Flip-Flops : 57 - Total Product Terms : 210 + Total Bidir I/O Pins : 18 + Total Flip-Flops : 52 + Total Product Terms : 177 Total Reserved Pins : 0 Total Reserved Blocks : 0 @@ -52,15 +52,15 @@ Device_Resource_Summary Available Used Available Utilization Dedicated Pins Input-Only Pins 2 2 0 --> 100% - Clock/Input Pins 4 4 0 --> 100% -I/O Pins 64 55 9 --> 85% -Logic Macrocells 128 84 44 --> 65% + Clock/Input Pins 4 3 1 --> 75% +I/O Pins 64 54 10 --> 84% +Logic Macrocells 128 79 49 --> 61% Input Registers 64 0 64 --> 0% - Unusable Macrocells .. 0 .. + Unusable Macrocells .. 1 .. -CSM Outputs/Total Block Inputs 264 205 59 --> 77% -Logical Product Terms 640 213 427 --> 33% -Product Term Clusters 128 54 74 --> 42% +CSM Outputs/Total Block Inputs 264 188 76 --> 71% +Logical Product Terms 640 179 461 --> 27% +Product Term Clusters 128 44 84 --> 34%  Blocks_Resource_Summary @@ -71,14 +71,14 @@ Blocks_Resource_Summary --------------------------------------------------------------------------------- Maximum 33 8 8 -- -- 16 80 16 - --------------------------------------------------------------------------------- -Block A 24 8 0 11 0 5 46 3 Lo -Block B 26 8 0 12 0 4 45 6 Lo -Block C 26 7 0 12 0 4 24 11 Lo -Block D 24 8 0 12 0 4 23 10 Lo -Block E 30 4 0 6 0 10 8 14 Lo -Block F 24 5 0 9 0 7 21 9 Lo -Block G 24 7 0 12 0 4 29 6 Lo -Block H 27 8 0 10 0 6 17 13 Lo +Block A 23 8 0 11 0 5 26 11 Lo +Block B 20 7 0 10 1 5 42 7 Lo +Block C 21 7 0 11 0 5 24 10 Lo +Block D 22 8 0 10 0 6 18 11 Lo +Block E 30 4 0 8 0 8 10 14 Lo +Block F 24 5 0 8 0 8 22 10 Lo +Block G 23 7 0 10 0 6 20 9 Lo +Block H 25 8 0 10 0 6 17 12 Lo --------------------------------------------------------------------------------- Four rightmost columns above reflect last status of the placement process. @@ -169,7 +169,7 @@ Pin No| Type |Pad |Pin | Signal name --------------------------------------------------------------- 1 | GND | | | 2 | JTAG | | | - 3 | I_O | B7 | * |RESET + 3 | I_O | B7 | | 4 | I_O | B6 | * |AHIGH_31_ 5 | I_O | B5 | * |AHIGH_30_ 6 | I_O | B4 | * |AHIGH_29_ @@ -230,7 +230,7 @@ Pin No| Type |Pad |Pin | Signal name 61 | CkIn | | * |CLK_OSZI 62 | Vcc | | | 63 | GND | | | -64 | CkIn | | * |CLK_030 +64 | CkIn | | | 65 | I_O | G0 | * |CLK_DIV_OUT 66 | I_O | G1 | * |E 67 | I_O | G2 | * |IPL_0_ @@ -287,30 +287,29 @@ Input_Signal_List Pin r e O Input Pin Blk PTs Type e s E Fanout Pwr Slew Signal ---------------------------------------------------------------------- - 60 F . I/O -----F-- Low Slow A_1_ - 96 A . I/O -B--E--H Low Slow A_DECODE_16_ - 59 F . I/O -B--E--H Low Slow A_DECODE_17_ - 95 A . I/O -B--E--H Low Slow A_DECODE_18_ - 97 A . I/O -B--E--H Low Slow A_DECODE_19_ + 60 F . I/O A-C----- Low Slow A_1_ + 96 A . I/O ----EF-H Low Slow A_DECODE_16_ + 59 F . I/O ----EF-H Low Slow A_DECODE_17_ + 95 A . I/O ----EF-H Low Slow A_DECODE_18_ + 97 A . I/O ----EF-H Low Slow A_DECODE_19_ 93 A . I/O ----E--- Low Slow A_DECODE_20_ 94 A . I/O ----E--- Low Slow A_DECODE_21_ 84 H . I/O ----E--- Low Slow A_DECODE_22_ 85 H . I/O ----E--- Low Slow A_DECODE_23_ 28 D . I/O ----E--H Low Slow BGACK_000 21 C . I/O ---D---- Low Slow BG_030 - 57 F . I/O -B--E--H Low Slow FC_0_ - 58 F . I/O -B--E--H Low Slow FC_1_ + 30 D . I/O -----F-- Low Slow DTACK + 57 F . I/O ----EF-H Low Slow FC_0_ + 58 F . I/O ----EF-H Low Slow FC_1_ 91 A . I/O ----E--H Low Slow FPU_SENSE - 67 G . I/O -B------ Low Slow IPL_0_ - 56 F . I/O -B------ Low Slow IPL_1_ - 68 G . I/O -B------ Low Slow IPL_2_ - 3 B . I/O -BC----- Low Fast RESET + 67 G . I/O AB------ Low Slow IPL_0_ + 56 F . I/O -B-D---- Low Slow IPL_1_ + 68 G . I/O AB------ Low Slow IPL_2_ 11 . . Ck/I ---D---- - Slow CLK_000 - 14 . . Ck/I ABCDEFGH - Slow nEXP_SPACE - 36 . . Ded -----F-- - Slow VPA + 14 . . Ck/I ---DEF-H - Slow nEXP_SPACE + 36 . . Ded ------G- - Slow VPA 61 . . Ck/I ABCDEFGH - Slow CLK_OSZI - 64 . . Ck/I A------- - Slow CLK_030 - 86 . . Ded ABCD-FGH - Slow RST + 86 . . Ded ABCDEFGH - Slow RST ---------------------------------------------------------------------- Power : Hi = High @@ -367,17 +366,16 @@ Pin Blk PTs Type e s E Fanout Pwr Slew Signal 6 B 1 COM ----E--- Low Fast AHIGH_29_ 5 B 1 COM ----E--- Low Fast AHIGH_30_ 4 B 1 COM ----E--- Low Fast AHIGH_31_ - 42 E 1 COM A---E--H Low Fast AS_000 - 82 H 1 COM ABCDE--H Low Fast AS_030 - 69 G 3 DFF -----F-- Low Fast A_0_ - 41 E 1 COM --C----- Low Fast BERR - 30 D 1 COM -B------ Low Slow DTACK - 31 D 1 COM --C---GH Low Fast LDS_000 - 71 G 2 DFF --C----H Low Fast RW - 80 H 4 DFF A---E-G- Low Fast RW_000 - 70 G 3 DFF -----F-- Low Fast SIZE_0_ - 79 H 3 DFF -----F-- Low Fast SIZE_1_ - 32 D 1 COM --C---GH Low Fast UDS_000 + 42 E 1 COM ABC-E--H Low Fast AS_000 + 82 H 1 COM --CDEFGH Low Fast AS_030 + 69 G 2 DFF -B----G- Low Fast A_0_ + 41 E 1 COM A------- Low Fast BERR + 31 D 1 COM ------GH Low Fast LDS_000 + 71 G 1 DFF --C----H Low Fast RW + 80 H 4 DFF --C-E-G- Low Fast RW_000 + 70 G 2 DFF ------G- Low Fast SIZE_0_ + 79 H 2 DFF ------G- Low Fast SIZE_1_ + 32 D 1 COM ------GH Low Fast UDS_000 ---------------------------------------------------------------------- Power : Hi = High @@ -393,64 +391,55 @@ Buried_Signal_List Pin r e O Node #Mc Blk PTs Type e s E Fanout Pwr Slew Signal ---------------------------------------------------------------------- - E5 E 2 COM ----E--- Low Slow CIIN_0 - D13 D 1 DFF A-CD-FGH Low Slow CLK_000_D_0_ - H5 H 1 DFF A-CD-FGH Low Slow CLK_000_D_1_ + D9 D 1 DFF ABCD-FGH Low Slow CLK_000_D_0_ + H5 H 1 DFF ABCD-FGH Low Slow CLK_000_D_1_ H6 H 1 DFF -----F-- Low Slow CLK_000_D_2_ - F13 F 1 DFF --C--F-- Low Slow CLK_000_D_3_ - C14 C 1 DFF -----F-- Low Slow CLK_000_D_4_ - A9 A 9 DFF A------- Low Slow CLK_030_PE_0_ - A2 A 6 DFF A------- Low Slow CLK_030_PE_1_ - D10 D 1 DFF AB----G- Low Slow CLK_OUT_INTreg - A6 A 4 DFF A------- Low Slow CYCLE_DMA_0_ - A10 A 2 DFF A------- Low Slow CYCLE_DMA_1_ - B10 B 1 DFF -B------ Low Slow IPL_D0_0_ - B6 B 1 DFF -B------ Low Slow IPL_D0_1_ - B2 B 1 DFF -B------ Low Slow IPL_D0_2_ - G8 G 3 DFF ------G- Low - RN_A_0_ --> A_0_ + F13 F 1 DFF -----F-- Low Slow CLK_000_D_3_ + F5 F 1 DFF -----F-- Low Slow CLK_000_D_4_ + A1 A 1 DFF -BC---G- Low Slow CLK_OUT_INTreg + B13 B 4 DFF -BC----- Low Slow CYCLE_DMA_0_ + B2 B 2 DFF -BC----- Low Slow CYCLE_DMA_1_ + A6 A 1 DFF -B------ Low Slow IPL_D0_0_ + D6 D 1 DFF -B------ Low Slow IPL_D0_1_ + A2 A 1 DFF -B------ Low Slow IPL_D0_2_ + E9 E 2 COM ----E--- Low Slow N_60 H4 H 3 DFF ABCDEFGH Low - RN_BGACK_030 --> BGACK_030 D1 D 2 DFF ---D---- Low - RN_BG_000 --> BG_000 B5 B 10 DFF -B------ Low - RN_IPL_030_0_ --> IPL_030_0_ B9 B 10 DFF -B------ Low - RN_IPL_030_1_ --> IPL_030_1_ B4 B 10 DFF -B------ Low - RN_IPL_030_2_ --> IPL_030_2_ - G0 G 2 DFF ------G- Low - RN_RW --> RW H0 H 4 DFF -------H Low - RN_RW_000 --> RW_000 - G12 G 3 DFF ------G- Low - RN_SIZE_0_ --> SIZE_0_ - H12 H 3 DFF -------H Low - RN_SIZE_1_ --> SIZE_1_ - D4 D 3 TFF --CD---- Low - RN_VMA --> VMA - G6 G 4 DFF ------G- Low Slow RST_DLY_0_ - G14 G 2 DFF ------G- Low Slow RST_DLY_1_ - G10 G 2 DFF ------G- Low Slow RST_DLY_2_ + D0 D 3 TFF A--D---- Low - RN_VMA --> VMA A12 A 3 DFF A----F-H Low Slow SM_AMIGA_0_ - F8 F 3 DFF A----F-- Low Slow SM_AMIGA_1_ - C9 C 5 DFF --C--F-- Low Slow SM_AMIGA_2_ - C6 C 5 TFF --C----- Low Slow SM_AMIGA_3_ - A1 A 3 DFF A-C----- Low Slow SM_AMIGA_4_ - G13 G 3 DFF A-----G- Low Slow SM_AMIGA_5_ - F0 F 3 DFF --C--FGH Low Slow SM_AMIGA_6_ - F4 F 3 TFF -B---F-H Low Slow SM_AMIGA_i_7_ - G9 G 3 DFF --CD--G- Low Slow cpu_est_0_ - D6 D 4 DFF --CD--G- Low Slow cpu_est_1_ - D14 D 1 DFF --CD--G- Low Slow cpu_est_2_ - D2 D 4 DFF --CD--G- Low Slow cpu_est_3_ - F9 F 2 DFF ---D-F-- Low Slow inst_AMIGA_BUS_ENABLE_DMA_HIGH - F5 F 2 DFF --C--F-- Low Slow inst_AMIGA_BUS_ENABLE_DMA_LOW - C10 C 2 DFF A------- Low Slow inst_AMIGA_DS - A8 A 6 DFF A--D---H Low Slow inst_AS_000_DMA - C2 C 2 DFF --C-E--- Low Slow inst_AS_000_INT - B13 B 7 DFF -B-D-F-- Low Slow inst_AS_030_000_SYNC - H2 H 1 DFF -B-DE--- Low Slow inst_AS_030_D0 - H13 H 1 DFF -B---FGH Low Slow inst_BGACK_030_INT_D - G2 G 1 DFF ----E-G- Low Slow inst_CLK_OUT_PRE_50 - E8 E 1 DFF A--D---- Low Slow inst_CLK_OUT_PRE_D - A5 A 2 DFF A------H Low Slow inst_DSACK1_INT - A13 A 9 DFF A------- Low Slow inst_DS_000_DMA - C13 C 3 DFF --CD---- Low Slow inst_DS_000_ENABLE - B14 B 1 DFF --C----- Low Slow inst_DTACK_D0 - F12 F 3 DFF ---D-F-- Low Slow inst_LDS_000_INT - G5 G 2 DFF A--DE-GH Low Slow inst_RESET_OUT - F1 F 2 DFF ---D-F-- Low Slow inst_UDS_000_INT - F2 F 1 DFF --CD---- Low Slow inst_VPA_D + A5 A 3 DFF A-----G- Low Slow SM_AMIGA_1_ + A9 A 5 DFF A------- Low Slow SM_AMIGA_2_ + A13 A 5 TFF A------- Low Slow SM_AMIGA_3_ + G5 G 3 DFF A-C---G- Low Slow SM_AMIGA_4_ + F12 F 3 DFF -----FG- Low Slow SM_AMIGA_5_ + F0 F 3 DFF -BC--FGH Low Slow SM_AMIGA_6_ + F8 F 3 TFF -----F-H Low Slow SM_AMIGA_i_7_ + G9 G 3 DFF A--D--G- Low Slow cpu_est_0_ + D13 D 4 DFF A--D--G- Low Slow cpu_est_1_ + D2 D 1 DFF A--D--G- Low Slow cpu_est_2_ + A8 A 4 DFF A--D--G- Low Slow cpu_est_3_ + A10 A 1 DFF ---D---- Low Slow inst_AMIGA_BUS_ENABLE_DMA_HIGH + C10 C 1 DFF --C----- Low Slow inst_AMIGA_BUS_ENABLE_DMA_LOW + H2 H 2 DFF --C----- Low Slow inst_AMIGA_DS + C13 C 6 DFF --C----H Low Slow inst_AS_000_DMA + C6 C 2 DFF --C-E--- Low Slow inst_AS_000_INT + F4 F 7 DFF ---D-F-- Low Slow inst_AS_030_000_SYNC + E8 E 1 DFF ---DEF-- Low Slow inst_AS_030_D0 + F1 F 2 DFF -----F-- Low Slow inst_AS_030_D1 + E13 E 1 DFF -----F-- Low Slow inst_BGACK_030_INT_D + H13 H 1 DFF ----E--H Low Slow inst_CLK_OUT_PRE_50 + E5 E 1 DFF A-C----- Low Slow inst_CLK_OUT_PRE_D + G2 G 2 DFF ------GH Low Slow inst_DSACK1_INT + C9 C 6 DFF A-C----- Low Slow inst_DS_000_DMA + C2 C 3 DFF --CD---- Low Slow inst_DS_000_ENABLE + F9 F 1 DFF A------- Low Slow inst_DTACK_D0 + G13 G 3 DFF ---D--G- Low Slow inst_LDS_000_INT + B6 B 2 DFF -B-D---- Low Slow inst_UDS_000_INT + G6 G 1 DFF A--D---- Low Slow inst_VPA_D ---------------------------------------------------------------------- Power : Hi = High @@ -465,188 +454,157 @@ Signals_Fanout_List ~~~~~~~~~~~~~~~~~~~ Signal Source : Fanout List ----------------------------------------------------------------------------- - AHIGH_31_{ C}: CIIN{ E} CIIN_0{ E} - IPL_1_{ G}: IPL_030_1_{ B} IPL_030_0_{ B} IPL_030_2_{ B} - : IPL_D0_1_{ B} - IPL_0_{ H}: IPL_030_1_{ B} IPL_030_0_{ B} IPL_030_2_{ B} - : IPL_D0_0_{ B} -A_DECODE_23_{ I}: CIIN{ E} CIIN_0{ E} - FC_0_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ B} - A_1_{ G}:inst_AMIGA_BUS_ENABLE_DMA_HIGH{ F}inst_AMIGA_BUS_ENABLE_DMA_LOW{ F} - IPL_2_{ H}: IPL_030_1_{ B} IPL_030_0_{ B} IPL_030_2_{ B} - : IPL_D0_2_{ B} - FC_1_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ B} + AHIGH_27_{ D}: CIIN{ E} N_60{ E} + AHIGH_26_{ D}: CIIN{ E} N_60{ E} + AHIGH_25_{ D}: CIIN{ E} N_60{ E} + AHIGH_24_{ D}: CIIN{ E} N_60{ E} + AHIGH_31_{ C}: CIIN{ E} N_60{ E} +A_DECODE_22_{ I}: CIIN{ E} N_60{ E} +A_DECODE_21_{ B}: CIIN{ E} N_60{ E} +A_DECODE_23_{ I}: CIIN{ E} N_60{ E} +A_DECODE_20_{ B}: CIIN{ E} N_60{ E} +A_DECODE_19_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} +A_DECODE_18_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} +A_DECODE_17_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} +A_DECODE_16_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} + IPL_2_{ H}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} + : IPL_D0_2_{ A} + FC_1_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} AS_030{ I}: AS_000{ E} BERR{ E} FPU_CS{ H} - : DSACK1{ H}AMIGA_BUS_ENABLE_HIGH{ D} inst_AS_030_D0{ H} - :inst_AS_030_000_SYNC{ B}inst_DS_000_ENABLE{ C}inst_DSACK1_INT{ A} + : DSACK1{ H}AMIGA_BUS_ENABLE_HIGH{ D} inst_AS_030_D0{ E} + :inst_AS_030_000_SYNC{ F}inst_DS_000_ENABLE{ C}inst_DSACK1_INT{ G} :inst_AS_000_INT{ C} AS_000{ F}: AS_030{ H} DS_030{ A}AMIGA_BUS_DATA_DIR{ E} - : BGACK_030{ H}inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} - : CLK_030_PE_1_{ A} CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} - : CLK_030_PE_0_{ A} - UDS_000{ E}: A_0_{ G} SIZE_1_{ H} SIZE_0_{ G} - : inst_AMIGA_DS{ C} - LDS_000{ E}: SIZE_1_{ H} SIZE_0_{ G} inst_AMIGA_DS{ C} - nEXP_SPACE{. }: AHIGH_31_{ B} AS_030{ H} DS_030{ A} - : DSACK1{ H} AHIGH_30_{ B} AHIGH_29_{ B} - : AHIGH_28_{ C} AHIGH_27_{ C} AHIGH_26_{ C} - : AHIGH_25_{ C} AHIGH_24_{ C}AMIGA_BUS_DATA_DIR{ E} - : A_0_{ G} SIZE_1_{ H} BG_000{ D} - : SIZE_0_{ G}inst_AS_030_000_SYNC{ B} SM_AMIGA_6_{ F} - : SM_AMIGA_i_7_{ F} CIIN_0{ E} - BERR{ F}: SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} + : BGACK_030{ H}inst_AS_000_DMA{ C}inst_DS_000_DMA{ C} + : CYCLE_DMA_0_{ B} CYCLE_DMA_1_{ B} + UDS_000{ E}: SIZE_1_{ H} A_0_{ G} SIZE_0_{ G} + : inst_AMIGA_DS{ H} + LDS_000{ E}: SIZE_1_{ H} SIZE_0_{ G} inst_AMIGA_DS{ H} + nEXP_SPACE{. }: DSACK1{ H}AMIGA_BUS_DATA_DIR{ E} BG_000{ D} + :inst_AS_030_000_SYNC{ F} SM_AMIGA_6_{ F} SM_AMIGA_i_7_{ F} + : N_60{ E} + BERR{ F}: SM_AMIGA_3_{ A} SM_AMIGA_2_{ A} BG_030{ D}: BG_000{ D} BGACK_000{ E}: BERR{ E} FPU_CS{ H} BGACK_030{ H} - CLK_030{. }:inst_DS_000_DMA{ A} CLK_000{. }: CLK_000_D_0_{ D} + IPL_1_{ G}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} + : IPL_D0_1_{ D} + IPL_0_{ H}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} + : IPL_D0_0_{ A} + FC_0_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} + A_1_{ G}:inst_AMIGA_BUS_ENABLE_DMA_HIGH{ A}inst_AMIGA_BUS_ENABLE_DMA_LOW{ C} FPU_SENSE{ B}: BERR{ E} FPU_CS{ H} - DTACK{ E}: inst_DTACK_D0{ B} - AHIGH_30_{ C}: CIIN{ E} CIIN_0{ E} - VPA{. }: inst_VPA_D{ F} - AHIGH_29_{ C}: CIIN{ E} CIIN_0{ E} - AHIGH_28_{ D}: CIIN{ E} CIIN_0{ E} - RST{. }: A_0_{ G} SIZE_1_{ H} IPL_030_1_{ B} - : IPL_030_0_{ B} IPL_030_2_{ B} RW_000{ H} - : BG_000{ D} BGACK_030{ H} SIZE_0_{ G} - : VMA{ D} RW{ G}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ F} - :inst_AMIGA_BUS_ENABLE_DMA_LOW{ F} inst_AS_030_D0{ H}inst_AS_030_000_SYNC{ B} - :inst_BGACK_030_INT_D{ H}inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} - : inst_VPA_D{ F} inst_DTACK_D0{ B} inst_RESET_OUT{ G} - : CLK_030_PE_1_{ A} inst_AMIGA_DS{ C} IPL_D0_0_{ B} - : IPL_D0_1_{ B} IPL_D0_2_{ B}inst_LDS_000_INT{ F} - :inst_DS_000_ENABLE{ C}inst_UDS_000_INT{ F} SM_AMIGA_6_{ F} - : SM_AMIGA_4_{ A} SM_AMIGA_1_{ F} SM_AMIGA_0_{ A} - : CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} CLK_030_PE_0_{ A} - : RST_DLY_0_{ G} RST_DLY_1_{ G} RST_DLY_2_{ G} - :inst_DSACK1_INT{ A}inst_AS_000_INT{ C} SM_AMIGA_5_{ G} - : SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} SM_AMIGA_i_7_{ F} - AHIGH_27_{ D}: CIIN{ E} CIIN_0{ E} - RESET{ C}: AHIGH_31_{ B} AHIGH_30_{ B} AHIGH_29_{ B} - : AHIGH_28_{ C} AHIGH_27_{ C} AHIGH_26_{ C} - : AHIGH_25_{ C} AHIGH_24_{ C} - AHIGH_26_{ D}: CIIN{ E} CIIN_0{ E} - AHIGH_25_{ D}: CIIN{ E} CIIN_0{ E} - AHIGH_24_{ D}: CIIN{ E} CIIN_0{ E} -A_DECODE_22_{ I}: CIIN{ E} CIIN_0{ E} -A_DECODE_21_{ B}: CIIN{ E} CIIN_0{ E} -A_DECODE_20_{ B}: CIIN{ E} CIIN_0{ E} -A_DECODE_19_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ B} -A_DECODE_18_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ B} -A_DECODE_17_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ B} -A_DECODE_16_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ B} - A_0_{ H}:inst_LDS_000_INT{ F}inst_UDS_000_INT{ F} - RN_A_0_{ H}: A_0_{ G} - SIZE_1_{ I}:inst_LDS_000_INT{ F} - RN_SIZE_1_{ I}: SIZE_1_{ H} -RN_IPL_030_1_{ C}: IPL_030_1_{ B} -RN_IPL_030_0_{ C}: IPL_030_0_{ B} + DTACK{ E}: inst_DTACK_D0{ F} + VPA{. }: inst_VPA_D{ G} + RST{. }: AS_000{ E} UDS_000{ D} LDS_000{ D} + : SIZE_1_{ H} IPL_030_2_{ B} RW_000{ H} + : BG_000{ D} BGACK_030{ H} A_0_{ G} + : IPL_030_1_{ B} IPL_030_0_{ B} VMA{ D} + : RW{ G} SIZE_0_{ G}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ A} + :inst_AMIGA_BUS_ENABLE_DMA_LOW{ C} inst_AS_030_D0{ E} inst_AS_030_D1{ F} + :inst_AS_030_000_SYNC{ F}inst_AS_000_DMA{ C}inst_DS_000_DMA{ C} + : inst_VPA_D{ G} inst_DTACK_D0{ F} inst_AMIGA_DS{ H} + : IPL_D0_0_{ A} IPL_D0_1_{ D} IPL_D0_2_{ A} + :inst_UDS_000_INT{ B}inst_DS_000_ENABLE{ C}inst_LDS_000_INT{ G} + :inst_BGACK_030_INT_D{ E} SM_AMIGA_6_{ F} SM_AMIGA_4_{ G} + : SM_AMIGA_1_{ A} SM_AMIGA_0_{ A} CYCLE_DMA_0_{ B} + : CYCLE_DMA_1_{ B}inst_DSACK1_INT{ G}inst_AS_000_INT{ C} + : SM_AMIGA_5_{ F} SM_AMIGA_3_{ A} SM_AMIGA_2_{ A} + : SM_AMIGA_i_7_{ F} + AHIGH_30_{ C}: CIIN{ E} N_60{ E} + AHIGH_29_{ C}: CIIN{ E} N_60{ E} + AHIGH_28_{ D}: CIIN{ E} N_60{ E} + SIZE_1_{ I}:inst_LDS_000_INT{ G} RN_IPL_030_2_{ C}: IPL_030_2_{ B} - RW_000{ I}:AMIGA_BUS_DATA_DIR{ E} RW{ G}inst_AS_000_DMA{ A} - :inst_DS_000_DMA{ A} CLK_030_PE_1_{ A} CLK_030_PE_0_{ A} + RW_000{ I}:AMIGA_BUS_DATA_DIR{ E} RW{ G}inst_AS_000_DMA{ C} + :inst_DS_000_DMA{ C} RN_RW_000{ I}: RW_000{ H} RN_BG_000{ E}: BG_000{ D} -RN_BGACK_030{ I}: AHIGH_31_{ B} AS_030{ H} AS_000{ E} - : DS_030{ A} UDS_000{ D} LDS_000{ D} - : AHIGH_30_{ B} AHIGH_29_{ B} AHIGH_28_{ C} - : AHIGH_27_{ C} AHIGH_26_{ C} AHIGH_25_{ C} - : AHIGH_24_{ C}AMIGA_BUS_DATA_DIR{ E}AMIGA_BUS_ENABLE_LOW{ C} - :AMIGA_BUS_ENABLE_HIGH{ D} A_0_{ G} SIZE_1_{ H} - : RW_000{ H} BGACK_030{ H} SIZE_0_{ G} - : RW{ G}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ F}inst_AMIGA_BUS_ENABLE_DMA_LOW{ F} - :inst_AS_030_000_SYNC{ B}inst_BGACK_030_INT_D{ H} CYCLE_DMA_0_{ A} - : CYCLE_DMA_1_{ A} - SIZE_0_{ H}:inst_LDS_000_INT{ F} - RN_SIZE_0_{ H}: SIZE_0_{ G} - RN_VMA{ E}: VMA{ D} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} +RN_BGACK_030{ I}: AHIGH_27_{ C} AHIGH_26_{ C} AHIGH_25_{ C} + : AHIGH_24_{ C} AHIGH_31_{ B} AS_030{ H} + : AS_000{ E} DS_030{ A} UDS_000{ D} + : LDS_000{ D} DSACK1{ H}AMIGA_BUS_DATA_DIR{ E} + :AMIGA_BUS_ENABLE_LOW{ C}AMIGA_BUS_ENABLE_HIGH{ D} AHIGH_30_{ B} + : AHIGH_29_{ B} AHIGH_28_{ C} SIZE_1_{ H} + : RW_000{ H} BGACK_030{ H} A_0_{ G} + : VMA{ D} RW{ G} SIZE_0_{ G} + :inst_AMIGA_BUS_ENABLE_DMA_HIGH{ A}inst_AMIGA_BUS_ENABLE_DMA_LOW{ C}inst_AS_030_000_SYNC{ F} + :inst_BGACK_030_INT_D{ E} CYCLE_DMA_0_{ B} CYCLE_DMA_1_{ B} + A_0_{ H}:inst_UDS_000_INT{ B}inst_LDS_000_INT{ G} +RN_IPL_030_1_{ C}: IPL_030_1_{ B} +RN_IPL_030_0_{ C}: IPL_030_0_{ B} + RN_VMA{ E}: VMA{ D} SM_AMIGA_3_{ A} SM_AMIGA_2_{ A} RW{ H}: RW_000{ H}inst_DS_000_ENABLE{ C} - RN_RW{ H}: RW{ G} + SIZE_0_{ H}:inst_LDS_000_INT{ G} + cpu_est_0_{ H}: VMA{ D} cpu_est_0_{ G} cpu_est_1_{ D} + : cpu_est_2_{ D} cpu_est_3_{ A} SM_AMIGA_3_{ A} + : SM_AMIGA_2_{ A} cpu_est_1_{ E}: E{ G} VMA{ D} cpu_est_1_{ D} - : cpu_est_2_{ D} cpu_est_3_{ D} SM_AMIGA_3_{ C} - : SM_AMIGA_2_{ C} + : cpu_est_2_{ D} cpu_est_3_{ A} SM_AMIGA_3_{ A} + : SM_AMIGA_2_{ A} cpu_est_2_{ E}: E{ G} VMA{ D} cpu_est_2_{ D} - : cpu_est_3_{ D} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} - cpu_est_3_{ E}: E{ G} VMA{ D} cpu_est_1_{ D} - : cpu_est_3_{ D} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} - cpu_est_0_{ H}: VMA{ D} cpu_est_1_{ D} cpu_est_2_{ D} - : cpu_est_3_{ D} cpu_est_0_{ G} SM_AMIGA_3_{ C} - : SM_AMIGA_2_{ C} -inst_AMIGA_BUS_ENABLE_DMA_HIGH{ G}:AMIGA_BUS_ENABLE_HIGH{ D}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ F} -inst_AMIGA_BUS_ENABLE_DMA_LOW{ G}:AMIGA_BUS_ENABLE_LOW{ C}inst_AMIGA_BUS_ENABLE_DMA_LOW{ F} -inst_AS_030_D0{ I}: CIIN{ E} BG_000{ D}inst_AS_030_000_SYNC{ B} - : CIIN_0{ E} -inst_AS_030_000_SYNC{ C}:AMIGA_BUS_ENABLE_HIGH{ D}inst_AS_030_000_SYNC{ B} SM_AMIGA_6_{ F} + : cpu_est_3_{ A} SM_AMIGA_3_{ A} SM_AMIGA_2_{ A} + cpu_est_3_{ B}: E{ G} VMA{ D} cpu_est_1_{ D} + : cpu_est_3_{ A} SM_AMIGA_3_{ A} SM_AMIGA_2_{ A} +inst_AMIGA_BUS_ENABLE_DMA_HIGH{ B}:AMIGA_BUS_ENABLE_HIGH{ D} +inst_AMIGA_BUS_ENABLE_DMA_LOW{ D}:AMIGA_BUS_ENABLE_LOW{ C} +inst_AS_030_D0{ F}: CIIN{ E} BG_000{ D} inst_AS_030_D1{ F} + : N_60{ E} +inst_AS_030_D1{ G}: inst_AS_030_D1{ F}inst_AS_030_000_SYNC{ F} +inst_AS_030_000_SYNC{ G}:AMIGA_BUS_ENABLE_HIGH{ D}inst_AS_030_000_SYNC{ F} SM_AMIGA_6_{ F} : SM_AMIGA_i_7_{ F} -inst_BGACK_030_INT_D{ I}: A_0_{ G} SIZE_1_{ H} SIZE_0_{ G} - : RW{ G}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ F}inst_AMIGA_BUS_ENABLE_DMA_LOW{ F} - :inst_AS_030_000_SYNC{ B} -inst_AS_000_DMA{ B}: AS_030{ H} DTACK{ D}inst_AS_000_DMA{ A} - : CLK_030_PE_1_{ A} CLK_030_PE_0_{ A} -inst_DS_000_DMA{ B}: DS_030{ A}inst_DS_000_DMA{ A} - inst_VPA_D{ G}: VMA{ D} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} -CLK_000_D_3_{ G}: CLK_000_D_4_{ C} SM_AMIGA_6_{ F} SM_AMIGA_i_7_{ F} -inst_DTACK_D0{ C}: SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} -inst_RESET_OUT{ H}: AS_030{ H} AS_000{ E} DS_030{ A} - : UDS_000{ D} LDS_000{ D} A_0_{ G} - : RW_000{ H} RW{ G} inst_RESET_OUT{ G} -CLK_030_PE_1_{ B}:inst_DS_000_DMA{ A} CLK_030_PE_1_{ A} CLK_030_PE_0_{ A} -inst_AMIGA_DS{ D}:inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} CLK_030_PE_1_{ A} - : CLK_030_PE_0_{ A} +inst_AS_000_DMA{ D}: AS_030{ H}inst_AS_000_DMA{ C} +inst_DS_000_DMA{ D}: DS_030{ A}inst_DS_000_DMA{ C} + inst_VPA_D{ H}: VMA{ D} SM_AMIGA_3_{ A} SM_AMIGA_2_{ A} +CLK_000_D_3_{ G}: CLK_000_D_4_{ F} SM_AMIGA_6_{ F} SM_AMIGA_i_7_{ F} +inst_DTACK_D0{ G}: SM_AMIGA_3_{ A} SM_AMIGA_2_{ A} +inst_AMIGA_DS{ I}:inst_AS_000_DMA{ C}inst_DS_000_DMA{ C} CLK_000_D_1_{ I}: RW_000{ H} BGACK_030{ H} VMA{ D} - : cpu_est_1_{ D} cpu_est_2_{ D} cpu_est_3_{ D} - : cpu_est_0_{ G} inst_RESET_OUT{ G} CLK_000_D_2_{ H} - :inst_DS_000_ENABLE{ C} SM_AMIGA_6_{ F} SM_AMIGA_4_{ A} - : SM_AMIGA_1_{ F} SM_AMIGA_0_{ A} CYCLE_DMA_0_{ A} - : CYCLE_DMA_1_{ A} RST_DLY_0_{ G} RST_DLY_1_{ G} - : RST_DLY_2_{ G}inst_DSACK1_INT{ A}inst_AS_000_INT{ C} - : SM_AMIGA_5_{ G} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} - : SM_AMIGA_i_7_{ F} + : cpu_est_0_{ G} cpu_est_1_{ D} cpu_est_2_{ D} + : cpu_est_3_{ A} CLK_000_D_2_{ H}inst_DS_000_ENABLE{ C} + : SM_AMIGA_6_{ F} SM_AMIGA_4_{ G} SM_AMIGA_1_{ A} + : SM_AMIGA_0_{ A} CYCLE_DMA_0_{ B} CYCLE_DMA_1_{ B} + :inst_DSACK1_INT{ G}inst_AS_000_INT{ C} SM_AMIGA_5_{ F} + : SM_AMIGA_3_{ A} SM_AMIGA_2_{ A} SM_AMIGA_i_7_{ F} CLK_000_D_0_{ E}: RW_000{ H} BG_000{ D} BGACK_030{ H} - : VMA{ D} cpu_est_1_{ D} cpu_est_2_{ D} - : cpu_est_3_{ D} cpu_est_0_{ G} inst_RESET_OUT{ G} - : CLK_000_D_1_{ H}inst_DS_000_ENABLE{ C} SM_AMIGA_6_{ F} - : SM_AMIGA_4_{ A} SM_AMIGA_1_{ F} SM_AMIGA_0_{ A} - : CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} RST_DLY_0_{ G} - : RST_DLY_1_{ G} RST_DLY_2_{ G}inst_DSACK1_INT{ A} - :inst_AS_000_INT{ C} SM_AMIGA_5_{ G} SM_AMIGA_3_{ C} - : SM_AMIGA_2_{ C} SM_AMIGA_i_7_{ F} -inst_CLK_OUT_PRE_50{ H}:inst_CLK_OUT_PRE_50{ G}inst_CLK_OUT_PRE_D{ E} -inst_CLK_OUT_PRE_D{ F}:inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} CLK_030_PE_1_{ A} - : CLK_030_PE_0_{ A} CLK_OUT_INTreg{ D} - IPL_D0_0_{ C}: IPL_030_1_{ B} IPL_030_0_{ B} IPL_030_2_{ B} - IPL_D0_1_{ C}: IPL_030_1_{ B} IPL_030_0_{ B} IPL_030_2_{ B} - IPL_D0_2_{ C}: IPL_030_1_{ B} IPL_030_0_{ B} IPL_030_2_{ B} -CLK_000_D_2_{ I}: CLK_000_D_3_{ F} -CLK_000_D_4_{ D}: SM_AMIGA_6_{ F} SM_AMIGA_i_7_{ F} -inst_LDS_000_INT{ G}: LDS_000{ D}inst_LDS_000_INT{ F} -inst_DS_000_ENABLE{ D}: UDS_000{ D} LDS_000{ D}inst_DS_000_ENABLE{ C} -inst_UDS_000_INT{ G}: UDS_000{ D}inst_UDS_000_INT{ F} -SM_AMIGA_6_{ G}: RW_000{ H}inst_LDS_000_INT{ F}inst_DS_000_ENABLE{ C} - :inst_UDS_000_INT{ F} SM_AMIGA_6_{ F}inst_AS_000_INT{ C} - : SM_AMIGA_5_{ G} -SM_AMIGA_4_{ B}:inst_DS_000_ENABLE{ C} SM_AMIGA_4_{ A} SM_AMIGA_3_{ C} -SM_AMIGA_1_{ G}: SM_AMIGA_1_{ F} SM_AMIGA_0_{ A}inst_DSACK1_INT{ A} -SM_AMIGA_0_{ B}: RW_000{ H} SM_AMIGA_0_{ A} SM_AMIGA_i_7_{ F} -CYCLE_DMA_0_{ B}:inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} CLK_030_PE_1_{ A} - : CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} CLK_030_PE_0_{ A} -CYCLE_DMA_1_{ B}:inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} CLK_030_PE_1_{ A} - : CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} CLK_030_PE_0_{ A} -CLK_030_PE_0_{ B}:inst_DS_000_DMA{ A} CLK_030_PE_1_{ A} CLK_030_PE_0_{ A} - RST_DLY_0_{ H}: inst_RESET_OUT{ G} RST_DLY_0_{ G} RST_DLY_1_{ G} - : RST_DLY_2_{ G} - RST_DLY_1_{ H}: inst_RESET_OUT{ G} RST_DLY_0_{ G} RST_DLY_1_{ G} - : RST_DLY_2_{ G} - RST_DLY_2_{ H}: inst_RESET_OUT{ G} RST_DLY_0_{ G} RST_DLY_1_{ G} - : RST_DLY_2_{ G} -inst_DSACK1_INT{ B}: DSACK1{ H}inst_DSACK1_INT{ A} -inst_AS_000_INT{ D}: AS_000{ E}inst_AS_000_INT{ C} -SM_AMIGA_5_{ H}: SM_AMIGA_4_{ A} SM_AMIGA_5_{ G} -SM_AMIGA_3_{ D}: SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} -SM_AMIGA_2_{ D}: SM_AMIGA_1_{ F} SM_AMIGA_2_{ C} -SM_AMIGA_i_7_{ G}: RW_000{ H}inst_AS_030_000_SYNC{ B} SM_AMIGA_6_{ F} + : VMA{ D} cpu_est_0_{ G} cpu_est_1_{ D} + : cpu_est_2_{ D} cpu_est_3_{ A} CLK_000_D_1_{ H} + :inst_DS_000_ENABLE{ C} SM_AMIGA_6_{ F} SM_AMIGA_4_{ G} + : SM_AMIGA_1_{ A} SM_AMIGA_0_{ A} CYCLE_DMA_0_{ B} + : CYCLE_DMA_1_{ B}inst_DSACK1_INT{ G}inst_AS_000_INT{ C} + : SM_AMIGA_5_{ F} SM_AMIGA_3_{ A} SM_AMIGA_2_{ A} : SM_AMIGA_i_7_{ F} -CLK_OUT_INTreg{ E}: CLK_DIV_OUT{ G} CLK_EXP{ B}inst_AS_000_DMA{ A} - :inst_DS_000_DMA{ A} CLK_030_PE_1_{ A} CLK_030_PE_0_{ A} - CIIN_0{ F}: CIIN{ E} +inst_CLK_OUT_PRE_50{ I}:inst_CLK_OUT_PRE_50{ H}inst_CLK_OUT_PRE_D{ E} +inst_CLK_OUT_PRE_D{ F}:inst_AS_000_DMA{ C}inst_DS_000_DMA{ C} CLK_OUT_INTreg{ A} + IPL_D0_0_{ B}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} + IPL_D0_1_{ E}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} + IPL_D0_2_{ B}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} +CLK_000_D_2_{ I}: CLK_000_D_3_{ F} +CLK_000_D_4_{ G}: SM_AMIGA_6_{ F} SM_AMIGA_i_7_{ F} +inst_UDS_000_INT{ C}: UDS_000{ D}inst_UDS_000_INT{ B} +inst_DS_000_ENABLE{ D}: UDS_000{ D} LDS_000{ D}inst_DS_000_ENABLE{ C} +inst_LDS_000_INT{ H}: LDS_000{ D}inst_LDS_000_INT{ G} +inst_BGACK_030_INT_D{ F}:inst_AS_030_000_SYNC{ F} +SM_AMIGA_6_{ G}: RW_000{ H}inst_UDS_000_INT{ B}inst_DS_000_ENABLE{ C} + :inst_LDS_000_INT{ G} SM_AMIGA_6_{ F}inst_AS_000_INT{ C} + : SM_AMIGA_5_{ F} +SM_AMIGA_4_{ H}:inst_DS_000_ENABLE{ C} SM_AMIGA_4_{ G} SM_AMIGA_3_{ A} +SM_AMIGA_1_{ B}: SM_AMIGA_1_{ A} SM_AMIGA_0_{ A}inst_DSACK1_INT{ G} +SM_AMIGA_0_{ B}: RW_000{ H} SM_AMIGA_0_{ A} SM_AMIGA_i_7_{ F} +CYCLE_DMA_0_{ C}:inst_AS_000_DMA{ C}inst_DS_000_DMA{ C} CYCLE_DMA_0_{ B} + : CYCLE_DMA_1_{ B} +CYCLE_DMA_1_{ C}:inst_AS_000_DMA{ C}inst_DS_000_DMA{ C} CYCLE_DMA_0_{ B} + : CYCLE_DMA_1_{ B} +inst_DSACK1_INT{ H}: DSACK1{ H}inst_DSACK1_INT{ G} +inst_AS_000_INT{ D}: AS_000{ E}inst_AS_000_INT{ C} +SM_AMIGA_5_{ G}: SM_AMIGA_4_{ G} SM_AMIGA_5_{ F} +SM_AMIGA_3_{ B}: SM_AMIGA_3_{ A} SM_AMIGA_2_{ A} +SM_AMIGA_2_{ B}: SM_AMIGA_1_{ A} SM_AMIGA_2_{ A} +CLK_OUT_INTreg{ B}: CLK_DIV_OUT{ G} CLK_EXP{ B}inst_AS_000_DMA{ C} + :inst_DS_000_DMA{ C} +SM_AMIGA_i_7_{ G}: RW_000{ H}inst_AS_030_000_SYNC{ F} SM_AMIGA_6_{ F} + : SM_AMIGA_i_7_{ F} + N_60{ F}: CIIN{ E} ----------------------------------------------------------------------------- {.} : Indicates block location of signal @@ -664,15 +622,15 @@ Equations : +-----+-----+-----+-----+------------------------ | | | | | DS_030 | | | | | AVEC -| * | S | BS | BR | inst_AS_000_DMA +| * | S | BS | BR | cpu_est_3_ | * | S | BS | BR | SM_AMIGA_0_ -| * | S | BS | BR | SM_AMIGA_4_ -| * | S | BS | BR | inst_DSACK1_INT -| * | S | BS | BR | CLK_030_PE_0_ -| * | S | BS | BR | inst_DS_000_DMA -| * | S | BS | BR | CLK_030_PE_1_ -| * | S | BS | BR | CYCLE_DMA_0_ -| * | S | BS | BR | CYCLE_DMA_1_ +| * | S | BS | BR | CLK_OUT_INTreg +| * | S | BS | BR | SM_AMIGA_1_ +| * | S | BS | BR | SM_AMIGA_2_ +| * | S | BS | BR | SM_AMIGA_3_ +| * | S | BS | BR | IPL_D0_2_ +| * | S | BS | BR | IPL_D0_0_ +| * | S | BS | BR | inst_AMIGA_BUS_ENABLE_DMA_HIGH | | | | | A_DECODE_19_ | | | | | A_DECODE_16_ | | | | | A_DECODE_18_ @@ -695,15 +653,12 @@ Equations : | * | S | BS | BR | IPL_030_0_ | * | S | BS | BR | IPL_030_1_ | | | | | CLK_EXP -| * | S | BS | BR | inst_AS_030_000_SYNC -| * | S | BS | BR | RN_IPL_030_2_ +| * | S | BS | BR | CYCLE_DMA_0_ +| * | S | BS | BR | CYCLE_DMA_1_ +| * | S | BS | BR | inst_UDS_000_INT | * | S | BS | BR | RN_IPL_030_0_ | * | S | BS | BR | RN_IPL_030_1_ -| * | S | BS | BR | IPL_D0_2_ -| * | S | BS | BR | IPL_D0_1_ -| * | S | BS | BR | IPL_D0_0_ -| * | S | BS | BR | inst_DTACK_D0 -| | | | | RESET +| * | S | BS | BR | RN_IPL_030_2_ Block C @@ -719,12 +674,11 @@ Equations : | | | | | AHIGH_27_ | | | | | AHIGH_28_ | | | | | AMIGA_BUS_ENABLE_LOW -| * | S | BS | BR | SM_AMIGA_2_ +| * | S | BS | BR | inst_DS_000_DMA +| * | S | BS | BR | inst_AS_000_DMA | * | S | BS | BR | inst_DS_000_ENABLE | * | S | BS | BR | inst_AS_000_INT -| * | S | BS | BR | SM_AMIGA_3_ -| * | S | BS | BR | inst_AMIGA_DS -| * | S | BS | BR | CLK_000_D_4_ +| * | S | BS | BR | inst_AMIGA_BUS_ENABLE_DMA_LOW | | | | | BG_030 @@ -737,19 +691,18 @@ Equations : +-----+-----+-----+-----+------------------------ | | | | | UDS_000 | | | | | LDS_000 -| | | | | DTACK | * | S | BS | BR | VMA | | | | | AMIGA_BUS_ENABLE_HIGH | * | S | BS | BR | BG_000 | | | | | AMIGA_ADDR_ENABLE | * | S | BS | BR | CLK_000_D_0_ -| * | S | BS | BR | cpu_est_3_ | * | S | BS | BR | cpu_est_1_ -| * | S | BS | BR | CLK_OUT_INTreg | * | S | BS | BR | cpu_est_2_ | * | S | BS | BR | RN_VMA | * | S | BS | BR | RN_BG_000 +| * | S | BS | BR | IPL_D0_1_ | | | | | BGACK_000 +| | | | | DTACK Block E @@ -763,8 +716,10 @@ Equations : | | | | | BERR | | | | | AMIGA_BUS_DATA_DIR | | | | | CIIN +| * | S | BS | BR | inst_AS_030_D0 | * | S | BS | BR | inst_CLK_OUT_PRE_D -| | | | | CIIN_0 +| | | | | N_60 +| * | S | BS | BR | inst_BGACK_030_INT_D Block F @@ -775,14 +730,13 @@ Equations : | Reg |Mode |Set |Reset| Name +-----+-----+-----+-----+------------------------ | * | S | BS | BR | SM_AMIGA_6_ +| * | S | BS | BR | inst_AS_030_000_SYNC | * | S | BS | BR | SM_AMIGA_i_7_ -| * | S | BS | BR | SM_AMIGA_1_ -| * | S | BS | BR | inst_LDS_000_INT -| * | S | BS | BR | inst_UDS_000_INT -| * | S | BS | BR | inst_AMIGA_BUS_ENABLE_DMA_LOW -| * | S | BS | BR | inst_AMIGA_BUS_ENABLE_DMA_HIGH +| * | S | BS | BR | SM_AMIGA_5_ +| * | S | BS | BR | inst_AS_030_D1 +| * | S | BS | BR | CLK_000_D_4_ +| * | S | BS | BR | inst_DTACK_D0 | * | S | BS | BR | CLK_000_D_3_ -| * | S | BS | BR | inst_VPA_D | | | | | A_DECODE_17_ | | | | | FC_1_ | | | | | FC_0_ @@ -797,21 +751,16 @@ Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name +-----+-----+-----+-----+------------------------ +| * | S | BS | BR | A_0_ | * | S | BS | BR | RW | * | S | BS | BR | SIZE_0_ -| * | S | BS | BR | A_0_ | | | | | E | | | | | CLK_DIV_OUT -| * | S | BS | BR | inst_RESET_OUT +| * | S | BS | BR | SM_AMIGA_4_ | * | S | BS | BR | cpu_est_0_ -| * | S | BS | BR | SM_AMIGA_5_ -| * | S | BS | BR | inst_CLK_OUT_PRE_50 -| * | S | BS | BR | RST_DLY_0_ -| * | S | BS | BR | RN_SIZE_0_ -| * | S | BS | BR | RN_A_0_ -| * | S | BS | BR | RN_RW -| * | S | BS | BR | RST_DLY_2_ -| * | S | BS | BR | RST_DLY_1_ +| * | S | BS | BR | inst_LDS_000_INT +| * | S | BS | BR | inst_DSACK1_INT +| * | S | BS | BR | inst_VPA_D | | | | | IPL_2_ | | | | | IPL_0_ @@ -831,10 +780,9 @@ Equations : | | | | | FPU_CS | * | S | BS | BR | RN_BGACK_030 | * | S | BS | BR | CLK_000_D_1_ -| * | S | BS | BR | inst_BGACK_030_INT_D -| * | S | BS | BR | inst_AS_030_D0 +| * | S | BS | BR | inst_CLK_OUT_PRE_50 | * | S | BS | BR | RN_RW_000 -| * | S | BS | BR | RN_SIZE_1_ +| * | S | BS | BR | inst_AMIGA_DS | * | S | BS | BR | CLK_000_D_2_ | | | | | A_DECODE_23_ | | | | | A_DECODE_22_ @@ -854,23 +802,23 @@ BLOCK_A_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx A0 RST pin 86 mx A17 ... ... -mx A1 CLK_000_D_0_ mcell D13 mx A18 inst_DSACK1_INT mcell A5 -mx A2 CLK_030_PE_0_ mcell A9 mx A19 AS_030 pin 82 -mx A3 inst_AS_000_DMA mcell A8 mx A20 SM_AMIGA_1_ mcell F8 -mx A4 CLK_030 pin 64 mx A21 ... ... -mx A5 nEXP_SPACE pin 14 mx A22 CLK_030_PE_1_ mcell A2 -mx A6 RW_000 pin 80 mx A23 RN_BGACK_030 mcell H4 -mx A7 ... ... mx A24 ... ... -mx A8 inst_AMIGA_DS mcell C10 mx A25 inst_DS_000_DMA mcell A13 -mx A9 SM_AMIGA_4_ mcell A1 mx A26 AS_000 pin 42 -mx A10 CYCLE_DMA_0_ mcell A6 mx A27 ... ... +mx A0 IPL_0_ pin 67 mx A17 BERR pin 41 +mx A1 inst_DTACK_D0 mcell F9 mx A18 SM_AMIGA_1_ mcell A5 +mx A2 AS_000 pin 42 mx A19 SM_AMIGA_2_ mcell A9 +mx A3 A_1_ pin 60 mx A20 RN_BGACK_030 mcell H4 +mx A4 IPL_2_ pin 68 mx A21 RST pin 86 +mx A5 inst_VPA_D mcell G6 mx A22 SM_AMIGA_4_ mcell G5 +mx A6 ... ... mx A23 ... ... +mx A7 CLK_000_D_0_ mcell D9 mx A24 ... ... +mx A8 ... ... mx A25 SM_AMIGA_3_ mcell A13 +mx A9 SM_AMIGA_0_ mcell A12 mx A26 RN_VMA mcell D0 +mx A10 cpu_est_0_ mcell G9 mx A27 CLK_000_D_1_ mcell H5 mx A11 ... ... mx A28 ... ... -mx A12 SM_AMIGA_5_ mcell G13 mx A29 ... ... -mx A13 CLK_000_D_1_ mcell H5 mx A30 CLK_OUT_INTreg mcell D10 -mx A14 CYCLE_DMA_1_ mcell A10 mx A31 ... ... -mx A15 SM_AMIGA_0_ mcell A12 mx A32 inst_RESET_OUT mcell G5 -mx A16inst_CLK_OUT_PRE_D mcell E8 +mx A12 ... ... mx A29 cpu_est_1_ mcell D13 +mx A13 inst_DS_000_DMA mcell C9 mx A30 cpu_est_3_ mcell A8 +mx A14inst_CLK_OUT_PRE_D mcell E5 mx A31 ... ... +mx A15 ... ... mx A32 ... ... +mx A16 cpu_est_2_ mcell D2 ---------------------------------------------------------------------------- @@ -878,22 +826,22 @@ BLOCK_B_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx B0 RN_BGACK_030 mcell H4 mx B17 FC_0_ pin 57 -mx B1 FC_1_ pin 58 mx B18 IPL_D0_2_ mcell B2 -mx B2 RESET pin 3 mx B19 AS_030 pin 82 -mx B3 IPL_1_ pin 56 mx B20 CLK_OUT_INTreg mcell D10 -mx B4 A_DECODE_18_ pin 95 mx B21 RST pin 86 -mx B5 nEXP_SPACE pin 14 mx B22 IPL_2_ pin 68 -mx B6 RN_IPL_030_1_ mcell B9 mx B23 IPL_D0_1_ mcell B6 -mx B7inst_BGACK_030_INT_D mcell H13 mx B24 IPL_D0_0_ mcell B10 -mx B8 A_DECODE_17_ pin 59 mx B25 ... ... -mx B9 DTACK pin 30 mx B26 ... ... -mx B10inst_AS_030_000_SYNC mcell B13 mx B27 RN_IPL_030_2_ mcell B4 -mx B11 A_DECODE_16_ pin 96 mx B28 RN_IPL_030_0_ mcell B5 -mx B12 A_DECODE_19_ pin 97 mx B29 SM_AMIGA_i_7_ mcell F4 -mx B13 ... ... mx B30 ... ... -mx B14 inst_AS_030_D0 mcell H2 mx B31 ... ... -mx B15 ... ... mx B32 ... ... +mx B0 A_0_ pin 69 mx B17 ... ... +mx B1 ... ... mx B18 CYCLE_DMA_1_ mcell B2 +mx B2inst_UDS_000_INT mcell B6 mx B19 ... ... +mx B3 IPL_1_ pin 56 mx B20 RN_BGACK_030 mcell H4 +mx B4 IPL_D0_1_ mcell D6 mx B21 RST pin 86 +mx B5 SM_AMIGA_6_ mcell F0 mx B22 IPL_2_ pin 68 +mx B6 RN_IPL_030_1_ mcell B9 mx B23 ... ... +mx B7 CLK_000_D_0_ mcell D9 mx B24 ... ... +mx B8 ... ... mx B25 IPL_D0_2_ mcell A2 +mx B9 CLK_OUT_INTreg mcell A1 mx B26 AS_000 pin 42 +mx B10 CYCLE_DMA_0_ mcell B13 mx B27 RN_IPL_030_2_ mcell B4 +mx B11 ... ... mx B28 RN_IPL_030_0_ mcell B5 +mx B12 ... ... mx B29 ... ... +mx B13 CLK_000_D_1_ mcell H5 mx B30 ... ... +mx B14 ... ... mx B31 ... ... +mx B15 IPL_D0_0_ mcell A6 mx B32 ... ... mx B16 IPL_0_ pin 67 ---------------------------------------------------------------------------- @@ -902,23 +850,23 @@ BLOCK_C_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx C0inst_DS_000_ENABLE mcell C13 mx C17 BERR pin 41 -mx C1 CLK_000_D_0_ mcell D13 mx C18 SM_AMIGA_3_ mcell C6 -mx C2 RESET pin 3 mx C19 AS_030 pin 82 -mx C3 SM_AMIGA_2_ mcell C9 mx C20 inst_DTACK_D0 mcell B14 -mx C4 cpu_est_1_ mcell D6 mx C21 RST pin 86 -mx C5 nEXP_SPACE pin 14 mx C22 inst_AS_000_INT mcell C2 -mx C6 CLK_000_D_3_ mcell F13 mx C23 RN_BGACK_030 mcell H4 -mx C7 ... ... mx C24 LDS_000 pin 31 -mx C8 UDS_000 pin 32 mx C25 SM_AMIGA_6_ mcell F0 -mx C9inst_AMIGA_BUS_ENABLE_DMA_LOW mcell F5 mx C26 ... ... -mx C10 cpu_est_2_ mcell D14 mx C27 cpu_est_0_ mcell G9 -mx C11 RW pin 71 mx C28 ... ... -mx C12 SM_AMIGA_4_ mcell A1 mx C29 ... ... -mx C13 CLK_000_D_1_ mcell H5 mx C30 ... ... -mx C14 RN_VMA mcell D4 mx C31 ... ... -mx C15 inst_VPA_D mcell F2 mx C32 ... ... -mx C16 cpu_est_3_ mcell D2 +mx C0 RST pin 86 mx C17 ... ... +mx C1 ... ... mx C18 ... ... +mx C2inst_DS_000_ENABLE mcell C2 mx C19 AS_030 pin 82 +mx C3 A_1_ pin 60 mx C20 RN_BGACK_030 mcell H4 +mx C4 inst_AMIGA_DS mcell H2 mx C21 CYCLE_DMA_0_ mcell B13 +mx C5 SM_AMIGA_6_ mcell F0 mx C22 SM_AMIGA_4_ mcell G5 +mx C6 RW_000 pin 80 mx C23 ... ... +mx C7 CLK_000_D_0_ mcell D9 mx C24 ... ... +mx C8inst_AMIGA_BUS_ENABLE_DMA_LOW mcell C10 mx C25 RW pin 71 +mx C9 inst_AS_000_INT mcell C6 mx C26 ... ... +mx C10 CYCLE_DMA_1_ mcell B2 mx C27 CLK_000_D_1_ mcell H5 +mx C11 inst_AS_000_DMA mcell C13 mx C28 ... ... +mx C12 CLK_OUT_INTreg mcell A1 mx C29 ... ... +mx C13 inst_DS_000_DMA mcell C9 mx C30 ... ... +mx C14inst_CLK_OUT_PRE_D mcell E5 mx C31 ... ... +mx C15 ... ... mx C32 ... ... +mx C16 AS_000 pin 42 ---------------------------------------------------------------------------- @@ -926,23 +874,23 @@ BLOCK_D_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx D0 RST pin 86 mx D17inst_LDS_000_INT mcell F12 -mx D1inst_AMIGA_BUS_ENABLE_DMA_HIGH mcell F9 mx D18 inst_AS_000_DMA mcell A8 +mx D0 RST pin 86 mx D17 ... ... +mx D1 RN_VMA mcell D0 mx D18 cpu_est_3_ mcell A8 mx D2 RN_BG_000 mcell D1 mx D19 AS_030 pin 82 -mx D3 cpu_est_3_ mcell D2 mx D20 RN_BGACK_030 mcell H4 -mx D4 BG_030 pin 21 mx D21inst_AS_030_000_SYNC mcell B13 -mx D5 nEXP_SPACE pin 14 mx D22 inst_RESET_OUT mcell G5 -mx D6 ... ... mx D23 ... ... -mx D7 ... ... mx D24 cpu_est_2_ mcell D14 -mx D8inst_CLK_OUT_PRE_D mcell E8 mx D25 ... ... -mx D9 inst_VPA_D mcell F2 mx D26 ... ... -mx D10 RN_VMA mcell D4 mx D27 ... ... -mx D11inst_DS_000_ENABLE mcell C13 mx D28 inst_AS_030_D0 mcell H2 -mx D12 cpu_est_0_ mcell G9 mx D29 CLK_000_D_0_ mcell D13 -mx D13 CLK_000_D_1_ mcell H5 mx D30 ... ... -mx D14 CLK_000 pin 11 mx D31 ... ... -mx D15inst_UDS_000_INT mcell F1 mx D32 ... ... -mx D16 cpu_est_1_ mcell D6 +mx D3 CLK_000 pin 11 mx D20 RN_BGACK_030 mcell H4 +mx D4 BG_030 pin 21 mx D21 IPL_1_ pin 56 +mx D5 nEXP_SPACE pin 14 mx D22inst_DS_000_ENABLE mcell C2 +mx D6 ... ... mx D23 inst_VPA_D mcell G6 +mx D7 CLK_000_D_0_ mcell D9 mx D24 ... ... +mx D8inst_AMIGA_BUS_ENABLE_DMA_HIGH mcell A10 mx D25 ... ... +mx D9inst_LDS_000_INT mcell G13 mx D26 ... ... +mx D10inst_AS_030_000_SYNC mcell F4 mx D27 ... ... +mx D11inst_UDS_000_INT mcell B6 mx D28 ... ... +mx D12 cpu_est_0_ mcell G9 mx D29 cpu_est_1_ mcell D13 +mx D13 CLK_000_D_1_ mcell H5 mx D30 inst_AS_030_D0 mcell E8 +mx D14 ... ... mx D31 ... ... +mx D15 ... ... mx D32 ... ... +mx D16 cpu_est_2_ mcell D2 ---------------------------------------------------------------------------- @@ -950,23 +898,23 @@ BLOCK_E_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx E0 RN_BGACK_030 mcell H4 mx E17 A_DECODE_18_ pin 95 -mx E1 FC_1_ pin 58 mx E18 A_DECODE_23_ pin 85 -mx E2 inst_AS_000_INT mcell C2 mx E19 AHIGH_30_ pin 5 -mx E3 A_DECODE_20_ pin 93 mx E20 A_DECODE_22_ pin 84 -mx E4 BGACK_000 pin 28 mx E21 AHIGH_27_ pin 16 -mx E5 AHIGH_24_ pin 19 mx E22 AHIGH_25_ pin 18 -mx E6 RW_000 pin 80 mx E23inst_CLK_OUT_PRE_50 mcell G2 +mx E0 RST pin 86 mx E17 A_DECODE_18_ pin 95 +mx E1 FC_1_ pin 58 mx E18 BGACK_000 pin 28 +mx E2 AS_000 pin 42 mx E19inst_CLK_OUT_PRE_50 mcell H13 +mx E3 AHIGH_27_ pin 16 mx E20 AHIGH_24_ pin 19 +mx E4 AHIGH_29_ pin 6 mx E21 RW_000 pin 80 +mx E5 nEXP_SPACE pin 14 mx E22 AHIGH_25_ pin 18 +mx E6 A_DECODE_16_ pin 96 mx E23 RN_BGACK_030 mcell H4 mx E7 AHIGH_28_ pin 15 mx E24 FC_0_ pin 57 mx E8 FPU_SENSE pin 91 mx E25 AHIGH_31_ pin 4 mx E9 AS_030 pin 82 mx E26 AHIGH_26_ pin 17 -mx E10 ... ... mx E27 A_DECODE_17_ pin 59 -mx E11 A_DECODE_16_ pin 96 mx E28 inst_AS_030_D0 mcell H2 -mx E12 A_DECODE_19_ pin 97 mx E29 ... ... -mx E13 AHIGH_29_ pin 6 mx E30 ... ... -mx E14 CIIN_0 mcell E5 mx E31 A_DECODE_21_ pin 94 -mx E15 nEXP_SPACE pin 14 mx E32 inst_RESET_OUT mcell G5 -mx E16 AS_000 pin 42 +mx E10 ... ... mx E27 inst_AS_000_INT mcell C6 +mx E11 A_DECODE_22_ pin 84 mx E28 AHIGH_30_ pin 5 +mx E12 A_DECODE_19_ pin 97 mx E29 A_DECODE_20_ pin 93 +mx E13 A_DECODE_17_ pin 59 mx E30 ... ... +mx E14 N_60 mcell E9 mx E31 ... ... +mx E15 A_DECODE_21_ pin 94 mx E32 A_DECODE_23_ pin 85 +mx E16 inst_AS_030_D0 mcell E8 ---------------------------------------------------------------------------- @@ -974,23 +922,23 @@ BLOCK_F_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx F0 SIZE_0_ pin 70 mx F17inst_LDS_000_INT mcell F12 -mx F1 CLK_000_D_0_ mcell D13 mx F18inst_AMIGA_BUS_ENABLE_DMA_HIGH mcell F9 -mx F2 SM_AMIGA_1_ mcell F8 mx F19inst_BGACK_030_INT_D mcell H13 -mx F3 SM_AMIGA_2_ mcell C9 mx F20 RN_BGACK_030 mcell H4 -mx F4 CLK_000_D_1_ mcell H5 mx F21inst_AS_030_000_SYNC mcell B13 +mx F0 RST pin 86 mx F17 SM_AMIGA_5_ mcell F12 +mx F1 FC_1_ pin 58 mx F18 ... ... +mx F2inst_BGACK_030_INT_D mcell E13 mx F19 AS_030 pin 82 +mx F3 ... ... mx F20 SM_AMIGA_i_7_ mcell F8 +mx F4 A_DECODE_18_ pin 95 mx F21 CLK_000_D_2_ mcell H6 mx F5 nEXP_SPACE pin 14 mx F22 ... ... -mx F6 CLK_000_D_3_ mcell F13 mx F23 ... ... -mx F7 CLK_000_D_4_ mcell C14 mx F24 RST pin 86 -mx F8 ... ... mx F25 SM_AMIGA_6_ mcell F0 -mx F9 SM_AMIGA_0_ mcell A12 mx F26 ... ... -mx F10inst_UDS_000_INT mcell F1 mx F27 SIZE_1_ pin 79 -mx F11 A_1_ pin 60 mx F28 ... ... -mx F12 ... ... mx F29 SM_AMIGA_i_7_ mcell F4 -mx F13 VPA pin 36 mx F30 CLK_000_D_2_ mcell H6 -mx F14inst_AMIGA_BUS_ENABLE_DMA_LOW mcell F5 mx F31 ... ... -mx F15 A_0_ pin 69 mx F32 ... ... -mx F16 ... ... +mx F6 FC_0_ pin 57 mx F23 RN_BGACK_030 mcell H4 +mx F7 CLK_000_D_0_ mcell D9 mx F24 SM_AMIGA_0_ mcell A12 +mx F8 A_DECODE_17_ pin 59 mx F25 SM_AMIGA_6_ mcell F0 +mx F9 DTACK pin 30 mx F26 ... ... +mx F10 inst_AS_030_D1 mcell F1 mx F27 ... ... +mx F11 A_DECODE_16_ pin 96 mx F28 ... ... +mx F12 A_DECODE_19_ pin 97 mx F29inst_AS_030_000_SYNC mcell F4 +mx F13 CLK_000_D_1_ mcell H5 mx F30 ... ... +mx F14 CLK_000_D_4_ mcell F5 mx F31 ... ... +mx F15 CLK_000_D_3_ mcell F13 mx F32 ... ... +mx F16 inst_AS_030_D0 mcell E8 ---------------------------------------------------------------------------- @@ -998,23 +946,23 @@ BLOCK_G_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx G0 LDS_000 pin 31 mx G17 RN_RW mcell G0 -mx G1 CLK_000_D_0_ mcell D13 mx G18 ... ... -mx G2 CLK_OUT_INTreg mcell D10 mx G19inst_BGACK_030_INT_D mcell H13 -mx G3 cpu_est_3_ mcell D2 mx G20 RN_BGACK_030 mcell H4 -mx G4inst_CLK_OUT_PRE_50 mcell G2 mx G21 RST pin 86 -mx G5 nEXP_SPACE pin 14 mx G22 RST_DLY_2_ mcell G10 -mx G6 RW_000 pin 80 mx G23 RST_DLY_0_ mcell G6 -mx G7 RN_SIZE_0_ mcell G12 mx G24 cpu_est_2_ mcell D14 -mx G8 UDS_000 pin 32 mx G25 SM_AMIGA_6_ mcell F0 -mx G9 SM_AMIGA_5_ mcell G13 mx G26 ... ... -mx G10 RST_DLY_1_ mcell G14 mx G27 CLK_000_D_1_ mcell H5 -mx G11 ... ... mx G28 ... ... -mx G12 cpu_est_0_ mcell G9 mx G29 ... ... -mx G13 RN_A_0_ mcell G8 mx G30 ... ... -mx G14 ... ... mx G31 ... ... -mx G15 ... ... mx G32 inst_RESET_OUT mcell G5 -mx G16 cpu_est_1_ mcell D6 +mx G0 RST pin 86 mx G17 ... ... +mx G1 SM_AMIGA_5_ mcell F12 mx G18 cpu_est_3_ mcell A8 +mx G2 SM_AMIGA_1_ mcell A5 mx G19 AS_030 pin 82 +mx G3 cpu_est_2_ mcell D2 mx G20 RN_BGACK_030 mcell H4 +mx G4 inst_DSACK1_INT mcell G2 mx G21 cpu_est_1_ mcell D13 +mx G5 SM_AMIGA_6_ mcell F0 mx G22 SM_AMIGA_4_ mcell G5 +mx G6 SIZE_1_ pin 79 mx G23 ... ... +mx G7 CLK_000_D_0_ mcell D9 mx G24 LDS_000 pin 31 +mx G8 UDS_000 pin 32 mx G25 ... ... +mx G9inst_LDS_000_INT mcell G13 mx G26 ... ... +mx G10 VPA pin 36 mx G27 cpu_est_0_ mcell G9 +mx G11 ... ... mx G28 RW_000 pin 80 +mx G12 CLK_OUT_INTreg mcell A1 mx G29 ... ... +mx G13 CLK_000_D_1_ mcell H5 mx G30 ... ... +mx G14 SIZE_0_ pin 70 mx G31 ... ... +mx G15 A_0_ pin 69 mx G32 ... ... +mx G16 ... ... ---------------------------------------------------------------------------- @@ -1024,20 +972,20 @@ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ mx H0 RST pin 86 mx H17 FC_0_ pin 57 mx H1 FC_1_ pin 58 mx H18 BGACK_000 pin 28 -mx H2 inst_DSACK1_INT mcell A5 mx H19 FPU_SENSE pin 91 -mx H3 inst_AS_000_DMA mcell A8 mx H20 RN_BGACK_030 mcell H4 -mx H4 A_DECODE_18_ pin 95 mx H21 CLK_000_D_0_ mcell D13 -mx H5 nEXP_SPACE pin 14 mx H22 inst_RESET_OUT mcell G5 -mx H6 A_DECODE_16_ pin 96 mx H23 RN_RW_000 mcell H0 -mx H7inst_BGACK_030_INT_D mcell H13 mx H24 LDS_000 pin 31 -mx H8 UDS_000 pin 32 mx H25 SM_AMIGA_6_ mcell F0 -mx H9 AS_030 pin 82 mx H26 ... ... -mx H10 SM_AMIGA_i_7_ mcell F4 mx H27 CLK_000_D_1_ mcell H5 -mx H11 RW pin 71 mx H28 ... ... -mx H12 A_DECODE_19_ pin 97 mx H29 RN_SIZE_1_ mcell H12 -mx H13 A_DECODE_17_ pin 59 mx H30 ... ... -mx H14 ... ... mx H31 ... ... -mx H15 SM_AMIGA_0_ mcell A12 mx H32 ... ... +mx H2 SM_AMIGA_i_7_ mcell F8 mx H19 FPU_SENSE pin 91 +mx H3 ... ... mx H20 RN_BGACK_030 mcell H4 +mx H4 A_DECODE_18_ pin 95 mx H21 ... ... +mx H5 SM_AMIGA_6_ mcell F0 mx H22 ... ... +mx H6 A_DECODE_19_ pin 97 mx H23 RN_RW_000 mcell H0 +mx H7inst_CLK_OUT_PRE_50 mcell H13 mx H24 LDS_000 pin 31 +mx H8 RW pin 71 mx H25 CLK_000_D_0_ mcell D9 +mx H9 SM_AMIGA_0_ mcell A12 mx H26 ... ... +mx H10 ... ... mx H27 CLK_000_D_1_ mcell H5 +mx H11 A_DECODE_16_ pin 96 mx H28 ... ... +mx H12 UDS_000 pin 32 mx H29 ... ... +mx H13 A_DECODE_17_ pin 59 mx H30 inst_AS_000_DMA mcell C13 +mx H14 ... ... mx H31 inst_DSACK1_INT mcell G2 +mx H15 nEXP_SPACE pin 14 mx H32 AS_030 pin 82 mx H16 AS_000 pin 42 ---------------------------------------------------------------------------- @@ -1053,14 +1001,22 @@ PostFit_Equations P-Terms Fan-in Fan-out Type Name (attributes) --------- ------ ------- ---- ----------------- + 0 0 1 Pin AHIGH_27_ + 1 1 1 Pin AHIGH_27_.OE + 0 0 1 Pin AHIGH_26_ + 1 1 1 Pin AHIGH_26_.OE + 0 0 1 Pin AHIGH_25_ + 1 1 1 Pin AHIGH_25_.OE + 0 0 1 Pin AHIGH_24_ + 1 1 1 Pin AHIGH_24_.OE 0 0 1 Pin AHIGH_31_ - 1 3 1 Pin AHIGH_31_.OE + 1 1 1 Pin AHIGH_31_.OE 1 2 1 Pin AS_030- - 1 3 1 Pin AS_030.OE + 1 1 1 Pin AS_030.OE 1 2 1 Pin AS_000- 1 2 1 Pin AS_000.OE 1 2 1 Pin DS_030- - 1 3 1 Pin DS_030.OE + 1 1 1 Pin DS_030.OE 1 2 1 Pin UDS_000- 1 2 1 Pin UDS_000.OE 1 2 1 Pin LDS_000- @@ -1071,41 +1027,24 @@ PostFit_Equations 1 1 1 Pin CLK_EXP 1 9 1 Pin FPU_CS- 1 2 1 Pin DSACK1- - 1 1 1 Pin DSACK1.OE - 0 0 1 Pin DTACK - 1 1 1 Pin DTACK.OE + 1 2 1 Pin DSACK1.OE 1 0 1 Pin AVEC 2 3 1 Pin E - 0 0 1 Pin AHIGH_30_ - 1 3 1 Pin AHIGH_30_.OE - 0 0 1 Pin AHIGH_29_ - 1 3 1 Pin AHIGH_29_.OE - 0 0 1 Pin AHIGH_28_ - 1 3 1 Pin AHIGH_28_.OE - 0 0 1 Pin AHIGH_27_ - 1 3 1 Pin AHIGH_27_.OE - 0 0 1 Pin AHIGH_26_ - 1 3 1 Pin AHIGH_26_.OE - 0 0 1 Pin AHIGH_25_ - 1 3 1 Pin AHIGH_25_.OE 0 0 1 Pin AMIGA_ADDR_ENABLE - 0 0 1 Pin AHIGH_24_ - 1 3 1 Pin AHIGH_24_.OE 2 4 1 Pin AMIGA_BUS_DATA_DIR 1 2 1 Pin AMIGA_BUS_ENABLE_LOW- 2 4 1 Pin AMIGA_BUS_ENABLE_HIGH- 1 13 1 Pin CIIN 1 1 1 Pin CIIN.OE - 1 3 1 Pin A_0_.OE - 3 5 1 Pin A_0_.D - 1 1 1 Pin A_0_.C - 1 2 1 Pin SIZE_1_.OE - 3 6 1 Pin SIZE_1_.D + 0 0 1 Pin AHIGH_30_ + 1 1 1 Pin AHIGH_30_.OE + 0 0 1 Pin AHIGH_29_ + 1 1 1 Pin AHIGH_29_.OE + 0 0 1 Pin AHIGH_28_ + 1 1 1 Pin AHIGH_28_.OE + 1 1 1 Pin SIZE_1_.OE + 2 4 1 Pin SIZE_1_.D 1 1 1 Pin SIZE_1_.C - 10 8 1 Pin IPL_030_1_.D- - 1 1 1 Pin IPL_030_1_.C - 10 8 1 Pin IPL_030_0_.D- - 1 1 1 Pin IPL_030_0_.C 10 8 1 Pin IPL_030_2_.D- 1 1 1 Pin IPL_030_2_.C 1 2 1 Pin RW_000.OE @@ -1115,36 +1054,44 @@ PostFit_Equations 1 1 1 Pin BG_000.C 3 6 1 Pin BGACK_030.D 1 1 1 Pin BGACK_030.C - 1 2 1 Pin SIZE_0_.OE - 3 6 1 Pin SIZE_0_.D- - 1 1 1 Pin SIZE_0_.C + 1 1 1 Pin A_0_.OE + 2 3 1 Pin A_0_.D + 1 1 1 Pin A_0_.C + 10 8 1 Pin IPL_030_1_.D- + 1 1 1 Pin IPL_030_1_.C + 10 8 1 Pin IPL_030_0_.D- + 1 1 1 Pin IPL_030_0_.C + 1 1 1 Pin VMA.OE 3 9 1 Pin VMA.T 1 1 1 Pin VMA.C - 1 2 1 Pin RW.OE - 2 5 1 Pin RW.D- + 1 1 1 Pin RW.OE + 1 3 1 Pin RW.D- 1 1 1 Pin RW.C + 1 1 1 Pin SIZE_0_.OE + 2 4 1 Pin SIZE_0_.D- + 1 1 1 Pin SIZE_0_.C + 3 3 1 Node cpu_est_0_.D + 1 1 1 Node cpu_est_0_.C 4 5 1 Node cpu_est_1_.D 1 1 1 Node cpu_est_1_.C - 1 1 1 NodeX1 cpu_est_2_.D.X1 - 1 4 1 NodeX2 cpu_est_2_.D.X2 + 1 4 1 NodeX1 cpu_est_2_.D.X1 + 1 1 1 NodeX2 cpu_est_2_.D.X2 1 1 1 Node cpu_est_2_.C 4 6 1 Node cpu_est_3_.D 1 1 1 Node cpu_est_3_.C - 3 3 1 Node cpu_est_0_.D - 1 1 1 Node cpu_est_0_.C - 2 5 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- + 1 3 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- 1 1 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.C - 2 5 1 Node inst_AMIGA_BUS_ENABLE_DMA_LOW.D- + 1 3 1 Node inst_AMIGA_BUS_ENABLE_DMA_LOW.D- 1 1 1 Node inst_AMIGA_BUS_ENABLE_DMA_LOW.C 1 2 1 Node inst_AS_030_D0.D- 1 1 1 Node inst_AS_030_D0.C + 2 3 1 Node inst_AS_030_D1.D + 1 1 1 Node inst_AS_030_D1.C 7 14 1 Node inst_AS_030_000_SYNC.D- 1 1 1 Node inst_AS_030_000_SYNC.C - 1 2 1 Node inst_BGACK_030_INT_D.D- - 1 1 1 Node inst_BGACK_030_INT_D.C 6 9 1 Node inst_AS_000_DMA.D 1 1 1 Node inst_AS_000_DMA.C - 9 12 1 Node inst_DS_000_DMA.D + 6 9 1 Node inst_DS_000_DMA.D 1 1 1 Node inst_DS_000_DMA.C 1 2 1 Node inst_VPA_D.D- 1 1 1 Node inst_VPA_D.C @@ -1152,10 +1099,6 @@ PostFit_Equations 1 1 1 Node CLK_000_D_3_.C 1 2 1 Node inst_DTACK_D0.D- 1 1 1 Node inst_DTACK_D0.C - 2 7 1 Node inst_RESET_OUT.D - 1 1 1 Node inst_RESET_OUT.C - 6 11 1 Node CLK_030_PE_1_.D - 1 1 1 Node CLK_030_PE_1_.C 2 3 1 Node inst_AMIGA_DS.D 1 1 1 Node inst_AMIGA_DS.C 1 1 1 Node CLK_000_D_1_.D @@ -1176,12 +1119,14 @@ PostFit_Equations 1 1 1 Node CLK_000_D_2_.C 1 1 1 Node CLK_000_D_4_.D 1 1 1 Node CLK_000_D_4_.C - 3 6 1 Node inst_LDS_000_INT.D - 1 1 1 Node inst_LDS_000_INT.C - 3 8 1 Node inst_DS_000_ENABLE.D - 1 1 1 Node inst_DS_000_ENABLE.C 2 4 1 Node inst_UDS_000_INT.D- 1 1 1 Node inst_UDS_000_INT.C + 3 8 1 Node inst_DS_000_ENABLE.D + 1 1 1 Node inst_DS_000_ENABLE.C + 3 6 1 Node inst_LDS_000_INT.D + 1 1 1 Node inst_LDS_000_INT.C + 1 2 1 Node inst_BGACK_030_INT_D.D- + 1 1 1 Node inst_BGACK_030_INT_D.C 3 9 1 Node SM_AMIGA_6_.D 1 1 1 Node SM_AMIGA_6_.C 3 5 1 Node SM_AMIGA_4_.D @@ -1194,15 +1139,6 @@ PostFit_Equations 1 1 1 Node CYCLE_DMA_0_.C 2 7 1 Node CYCLE_DMA_1_.D 1 1 1 Node CYCLE_DMA_1_.C - 9 11 1 Node CLK_030_PE_0_.D- - 1 1 1 Node CLK_030_PE_0_.C - 4 6 1 Node RST_DLY_0_.D - 1 1 1 Node RST_DLY_0_.C - 2 6 1 NodeX1 RST_DLY_1_.D.X1 - 1 2 1 NodeX2 RST_DLY_1_.D.X2 - 1 1 1 Node RST_DLY_1_.C - 2 6 1 Node RST_DLY_2_.D - 1 1 1 Node RST_DLY_2_.C 2 6 1 Node inst_DSACK1_INT.D- 1 1 1 Node inst_DSACK1_INT.C 2 6 1 Node inst_AS_000_INT.D- @@ -1213,44 +1149,60 @@ PostFit_Equations 1 1 1 Node SM_AMIGA_3_.C 5 13 1 Node SM_AMIGA_2_.D 1 1 1 Node SM_AMIGA_2_.C + 1 1 1 Node CLK_OUT_INTreg.D + 1 1 1 Node CLK_OUT_INTreg.C 3 9 1 NodeX1 SM_AMIGA_i_7_.T.X1 1 9 1 NodeX2 SM_AMIGA_i_7_.T.X2 1 1 1 Node SM_AMIGA_i_7_.C - 1 1 1 Node CLK_OUT_INTreg.D - 1 1 1 Node CLK_OUT_INTreg.C - 2 14 1 Node CIIN_0 + 2 14 1 Node N_60 ========= - 281 P-Term Total: 281 - Total Pins: 61 - Total Nodes: 47 + 243 P-Term Total: 243 + Total Pins: 59 + Total Nodes: 42 Average P-Term/Output: 2 Equations: +AHIGH_27_ = (0); + +AHIGH_27_.OE = (!BGACK_030.Q); + +AHIGH_26_ = (0); + +AHIGH_26_.OE = (!BGACK_030.Q); + +AHIGH_25_ = (0); + +AHIGH_25_.OE = (!BGACK_030.Q); + +AHIGH_24_ = (0); + +AHIGH_24_.OE = (!BGACK_030.Q); + AHIGH_31_ = (0); -AHIGH_31_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); +AHIGH_31_.OE = (!BGACK_030.Q); !AS_030 = (!inst_AS_000_DMA.Q & !AS_000.PIN); -AS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +AS_030.OE = (!BGACK_030.Q); !AS_000 = (!inst_AS_000_INT.Q & !AS_030.PIN); -AS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); +AS_000.OE = (RST & BGACK_030.Q); !DS_030 = (!inst_DS_000_DMA.Q & !AS_000.PIN); -DS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +DS_030.OE = (!BGACK_030.Q); -!UDS_000 = (inst_DS_000_ENABLE.Q & !inst_UDS_000_INT.Q); +!UDS_000 = (!inst_UDS_000_INT.Q & inst_DS_000_ENABLE.Q); -UDS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); +UDS_000.OE = (RST & BGACK_030.Q); -!LDS_000 = (!inst_LDS_000_INT.Q & inst_DS_000_ENABLE.Q); +!LDS_000 = (inst_DS_000_ENABLE.Q & !inst_LDS_000_INT.Q); -LDS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); +LDS_000.OE = (RST & BGACK_030.Q); BERR = (0); @@ -1264,47 +1216,15 @@ CLK_EXP = (CLK_OUT_INTreg.Q); !DSACK1 = (!inst_DSACK1_INT.Q & !AS_030.PIN); -DSACK1.OE = (nEXP_SPACE); - -DTACK = (0); - -DTACK.OE = (!inst_AS_000_DMA.Q); +DSACK1.OE = (nEXP_SPACE & BGACK_030.Q); AVEC = (1); E = (!cpu_est_1_.Q & !cpu_est_2_.Q & cpu_est_3_.Q # cpu_est_1_.Q & cpu_est_2_.Q & !cpu_est_3_.Q); -AHIGH_30_ = (0); - -AHIGH_30_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); - -AHIGH_29_ = (0); - -AHIGH_29_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); - -AHIGH_28_ = (0); - -AHIGH_28_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); - -AHIGH_27_ = (0); - -AHIGH_27_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); - -AHIGH_26_ = (0); - -AHIGH_26_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); - -AHIGH_25_ = (0); - -AHIGH_25_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); - AMIGA_ADDR_ENABLE = (0); -AHIGH_24_ = (0); - -AHIGH_24_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); - AMIGA_BUS_DATA_DIR = (BGACK_030.Q & !RW_000.PIN # !nEXP_SPACE & !BGACK_030.Q & !AS_000.PIN & RW_000.PIN); @@ -1315,24 +1235,67 @@ AMIGA_BUS_DATA_DIR = (BGACK_030.Q & !RW_000.PIN CIIN = (A_DECODE_23_ & A_DECODE_22_ & A_DECODE_21_ & A_DECODE_20_ & !inst_AS_030_D0.Q & !AHIGH_24_.PIN & !AHIGH_25_.PIN & !AHIGH_26_.PIN & !AHIGH_27_.PIN & !AHIGH_28_.PIN & !AHIGH_29_.PIN & !AHIGH_30_.PIN & !AHIGH_31_.PIN); -CIIN.OE = (CIIN_0); +CIIN.OE = (N_60); -A_0_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +AHIGH_30_ = (0); -A_0_.D = (!RST - # !BGACK_030.Q & UDS_000.PIN - # BGACK_030.Q & inst_BGACK_030_INT_D.Q & A_0_.Q); +AHIGH_30_.OE = (!BGACK_030.Q); -A_0_.C = (CLK_OSZI); +AHIGH_29_ = (0); -SIZE_1_.OE = (!nEXP_SPACE & !BGACK_030.Q); +AHIGH_29_.OE = (!BGACK_030.Q); + +AHIGH_28_ = (0); + +AHIGH_28_.OE = (!BGACK_030.Q); + +SIZE_1_.OE = (!BGACK_030.Q); SIZE_1_.D = (!RST - # BGACK_030.Q & inst_BGACK_030_INT_D.Q & SIZE_1_.Q # !BGACK_030.Q & !UDS_000.PIN & !LDS_000.PIN); SIZE_1_.C = (CLK_OSZI); +!IPL_030_2_.D = (!IPL_2_ & RST & !IPL_030_2_.Q + # RST & !IPL_D0_2_.Q & !IPL_030_2_.Q + # RST & !IPL_0_ & IPL_D0_0_.Q & !IPL_030_2_.Q + # RST & IPL_0_ & !IPL_D0_0_.Q & !IPL_030_2_.Q + # RST & !IPL_1_ & IPL_D0_1_.Q & !IPL_030_2_.Q + # RST & IPL_1_ & !IPL_D0_1_.Q & !IPL_030_2_.Q + # !IPL_2_ & RST & IPL_1_ & IPL_0_ & IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q + # !IPL_2_ & RST & IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q + # !IPL_2_ & RST & !IPL_1_ & IPL_0_ & IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q + # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q); + +IPL_030_2_.C = (CLK_OSZI); + +RW_000.OE = (RST & BGACK_030.Q); + +!RW_000.D = (RST & CLK_000_D_1_.Q & !RW_000.Q & SM_AMIGA_i_7_.Q + # RST & !CLK_000_D_0_.Q & !RW_000.Q & SM_AMIGA_i_7_.Q + # RST & !SM_AMIGA_6_.Q & !RW_000.Q & !SM_AMIGA_0_.Q & SM_AMIGA_i_7_.Q + # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & SM_AMIGA_i_7_.Q & !RW.PIN); + +RW_000.C = (CLK_OSZI); + +!BG_000.D = (!BG_030 & RST & !BG_000.Q + # nEXP_SPACE & !BG_030 & RST & inst_AS_030_D0.Q & CLK_000_D_0_.Q); + +BG_000.C = (CLK_OSZI); + +BGACK_030.D = (!RST + # BGACK_000 & BGACK_030.Q + # BGACK_000 & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & AS_000.PIN); + +BGACK_030.C = (CLK_OSZI); + +A_0_.OE = (!BGACK_030.Q); + +A_0_.D = (!RST + # !BGACK_030.Q & UDS_000.PIN); + +A_0_.C = (CLK_OSZI); + !IPL_030_1_.D = (RST & !IPL_1_ & !IPL_030_1_.Q # RST & !IPL_D0_1_.Q & !IPL_030_1_.Q # RST & !IPL_0_ & IPL_D0_0_.Q & !IPL_030_1_.Q @@ -1359,79 +1322,26 @@ IPL_030_1_.C = (CLK_OSZI); IPL_030_0_.C = (CLK_OSZI); -!IPL_030_2_.D = (!IPL_2_ & RST & !IPL_030_2_.Q - # RST & !IPL_D0_2_.Q & !IPL_030_2_.Q - # RST & !IPL_0_ & IPL_D0_0_.Q & !IPL_030_2_.Q - # RST & IPL_0_ & !IPL_D0_0_.Q & !IPL_030_2_.Q - # RST & !IPL_1_ & IPL_D0_1_.Q & !IPL_030_2_.Q - # RST & IPL_1_ & !IPL_D0_1_.Q & !IPL_030_2_.Q - # !IPL_2_ & RST & IPL_1_ & IPL_0_ & IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q - # !IPL_2_ & RST & IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q - # !IPL_2_ & RST & !IPL_1_ & IPL_0_ & IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q - # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q); - -IPL_030_2_.C = (CLK_OSZI); - -RW_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); - -!RW_000.D = (RST & CLK_000_D_1_.Q & !RW_000.Q & SM_AMIGA_i_7_.Q - # RST & !CLK_000_D_0_.Q & !RW_000.Q & SM_AMIGA_i_7_.Q - # RST & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !RW_000.Q & SM_AMIGA_i_7_.Q - # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & SM_AMIGA_i_7_.Q & !RW.PIN); - -RW_000.C = (CLK_OSZI); - -!BG_000.D = (!BG_030 & RST & !BG_000.Q - # nEXP_SPACE & !BG_030 & RST & inst_AS_030_D0.Q & CLK_000_D_0_.Q); - -BG_000.C = (CLK_OSZI); - -BGACK_030.D = (!RST - # BGACK_000 & BGACK_030.Q - # BGACK_000 & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & AS_000.PIN); - -BGACK_030.C = (CLK_OSZI); - -SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q); - -!SIZE_0_.D = (RST & BGACK_030.Q & !inst_BGACK_030_INT_D.Q - # RST & BGACK_030.Q & !SIZE_0_.Q - # RST & !BGACK_030.Q & !UDS_000.PIN & !LDS_000.PIN); - -SIZE_0_.C = (CLK_OSZI); +VMA.OE = (BGACK_030.Q); VMA.T = (!RST & !VMA.Q - # !VMA.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !cpu_est_3_.Q & !cpu_est_0_.Q & !CLK_000_D_1_.Q & CLK_000_D_0_.Q - # RST & VMA.Q & cpu_est_1_.Q & !cpu_est_2_.Q & !cpu_est_3_.Q & cpu_est_0_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); + # !cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !cpu_est_3_.Q & !VMA.Q & !CLK_000_D_1_.Q & CLK_000_D_0_.Q + # RST & cpu_est_0_.Q & cpu_est_1_.Q & !cpu_est_2_.Q & !cpu_est_3_.Q & VMA.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); VMA.C = (CLK_OSZI); -RW.OE = (!BGACK_030.Q & inst_RESET_OUT.Q); +RW.OE = (!BGACK_030.Q); -!RW.D = (RST & !BGACK_030.Q & !RW_000.PIN - # RST & BGACK_030.Q & inst_BGACK_030_INT_D.Q & !RW.Q); +!RW.D = (RST & !BGACK_030.Q & !RW_000.PIN); RW.C = (CLK_OSZI); -cpu_est_1_.D = (cpu_est_1_.Q & !cpu_est_0_.Q - # cpu_est_1_.Q & !CLK_000_D_1_.Q - # cpu_est_1_.Q & CLK_000_D_0_.Q - # !cpu_est_1_.Q & !cpu_est_3_.Q & cpu_est_0_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); +SIZE_0_.OE = (!BGACK_030.Q); -cpu_est_1_.C = (CLK_OSZI); +!SIZE_0_.D = (RST & BGACK_030.Q + # RST & !UDS_000.PIN & !LDS_000.PIN); -cpu_est_2_.D.X1 = (cpu_est_2_.Q); - -cpu_est_2_.D.X2 = (cpu_est_1_.Q & cpu_est_0_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); - -cpu_est_2_.C = (CLK_OSZI); - -cpu_est_3_.D = (cpu_est_3_.Q & !CLK_000_D_1_.Q - # cpu_est_3_.Q & CLK_000_D_0_.Q - # !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_0_.Q - # cpu_est_1_.Q & cpu_est_2_.Q & cpu_est_0_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); - -cpu_est_3_.C = (CLK_OSZI); +SIZE_0_.C = (CLK_OSZI); cpu_est_0_.D = (cpu_est_0_.Q & !CLK_000_D_1_.Q # cpu_est_0_.Q & CLK_000_D_0_.Q @@ -1439,13 +1349,31 @@ cpu_est_0_.D = (cpu_est_0_.Q & !CLK_000_D_1_.Q cpu_est_0_.C = (CLK_OSZI); -!inst_AMIGA_BUS_ENABLE_DMA_HIGH.D = (RST & !A_1_ & !BGACK_030.Q - # RST & BGACK_030.Q & !inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q & inst_BGACK_030_INT_D.Q); +cpu_est_1_.D = (!cpu_est_0_.Q & cpu_est_1_.Q + # cpu_est_1_.Q & !CLK_000_D_1_.Q + # cpu_est_1_.Q & CLK_000_D_0_.Q + # cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_3_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); + +cpu_est_1_.C = (CLK_OSZI); + +cpu_est_2_.D.X1 = (cpu_est_0_.Q & cpu_est_1_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); + +cpu_est_2_.D.X2 = (cpu_est_2_.Q); + +cpu_est_2_.C = (CLK_OSZI); + +cpu_est_3_.D = (!cpu_est_0_.Q & cpu_est_3_.Q + # cpu_est_3_.Q & !CLK_000_D_1_.Q + # cpu_est_3_.Q & CLK_000_D_0_.Q + # cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); + +cpu_est_3_.C = (CLK_OSZI); + +!inst_AMIGA_BUS_ENABLE_DMA_HIGH.D = (RST & !A_1_ & !BGACK_030.Q); inst_AMIGA_BUS_ENABLE_DMA_HIGH.C = (CLK_OSZI); -!inst_AMIGA_BUS_ENABLE_DMA_LOW.D = (RST & A_1_ & !BGACK_030.Q - # RST & BGACK_030.Q & !inst_AMIGA_BUS_ENABLE_DMA_LOW.Q & inst_BGACK_030_INT_D.Q); +!inst_AMIGA_BUS_ENABLE_DMA_LOW.D = (RST & A_1_ & !BGACK_030.Q); inst_AMIGA_BUS_ENABLE_DMA_LOW.C = (CLK_OSZI); @@ -1453,20 +1381,21 @@ inst_AMIGA_BUS_ENABLE_DMA_LOW.C = (CLK_OSZI); inst_AS_030_D0.C = (CLK_OSZI); +inst_AS_030_D1.D = (RST & inst_AS_030_D0.Q + # !RST & inst_AS_030_D1.Q); + +inst_AS_030_D1.C = (CLK_OSZI); + !inst_AS_030_000_SYNC.D = (RST & !inst_AS_030_000_SYNC.Q & !AS_030.PIN - # !FC_1_ & nEXP_SPACE & RST & BGACK_030.Q & !inst_AS_030_D0.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN - # nEXP_SPACE & RST & A_DECODE_19_ & BGACK_030.Q & !inst_AS_030_D0.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN - # nEXP_SPACE & RST & A_DECODE_18_ & BGACK_030.Q & !inst_AS_030_D0.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN - # nEXP_SPACE & RST & !A_DECODE_17_ & BGACK_030.Q & !inst_AS_030_D0.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN - # nEXP_SPACE & RST & A_DECODE_16_ & BGACK_030.Q & !inst_AS_030_D0.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN - # nEXP_SPACE & RST & !FC_0_ & BGACK_030.Q & !inst_AS_030_D0.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN); + # !FC_1_ & nEXP_SPACE & RST & BGACK_030.Q & !inst_AS_030_D1.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN + # nEXP_SPACE & RST & A_DECODE_19_ & BGACK_030.Q & !inst_AS_030_D1.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN + # nEXP_SPACE & RST & A_DECODE_18_ & BGACK_030.Q & !inst_AS_030_D1.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN + # nEXP_SPACE & RST & !A_DECODE_17_ & BGACK_030.Q & !inst_AS_030_D1.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN + # nEXP_SPACE & RST & A_DECODE_16_ & BGACK_030.Q & !inst_AS_030_D1.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN + # nEXP_SPACE & RST & !FC_0_ & BGACK_030.Q & !inst_AS_030_D1.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & !AS_030.PIN); inst_AS_030_000_SYNC.C = (CLK_OSZI); -!inst_BGACK_030_INT_D.D = (RST & !BGACK_030.Q); - -inst_BGACK_030_INT_D.C = (CLK_OSZI); - inst_AS_000_DMA.D = (!RST # inst_AMIGA_DS.Q # AS_000.PIN @@ -1480,11 +1409,8 @@ inst_DS_000_DMA.D = (!RST # inst_AMIGA_DS.Q # AS_000.PIN # !CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q - # !CLK_030 & inst_DS_000_DMA.Q & !RW_000.PIN - # inst_DS_000_DMA.Q & CLK_030_PE_1_.Q & !RW_000.PIN - # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !RW_000.PIN - # inst_DS_000_DMA.Q & !CLK_030_PE_0_.Q & !RW_000.PIN - # inst_DS_000_DMA.Q & inst_CLK_OUT_PRE_D.Q & !CLK_OUT_INTreg.Q & RW_000.PIN); + # inst_DS_000_DMA.Q & inst_CLK_OUT_PRE_D.Q & !CLK_OUT_INTreg.Q + # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !RW_000.PIN); inst_DS_000_DMA.C = (CLK_OSZI); @@ -1496,24 +1422,10 @@ CLK_000_D_3_.D = (CLK_000_D_2_.Q); CLK_000_D_3_.C = (CLK_OSZI); -!inst_DTACK_D0.D = (RST & !DTACK.PIN); +!inst_DTACK_D0.D = (!DTACK & RST); inst_DTACK_D0.C = (CLK_OSZI); -inst_RESET_OUT.D = (RST & inst_RESET_OUT.Q - # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & RST_DLY_0_.Q & RST_DLY_1_.Q & RST_DLY_2_.Q); - -inst_RESET_OUT.C = (CLK_OSZI); - -CLK_030_PE_1_.D = (RST & CLK_030_PE_1_.Q & !inst_AMIGA_DS.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !AS_000.PIN - # RST & CLK_030_PE_1_.Q & !inst_AMIGA_DS.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & !AS_000.PIN - # RST & CLK_030_PE_1_.Q & !inst_AMIGA_DS.Q & CYCLE_DMA_1_.Q & !AS_000.PIN & RW_000.PIN - # RST & !inst_AS_000_DMA.Q & !inst_AMIGA_DS.Q & inst_CLK_OUT_PRE_D.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & CLK_030_PE_0_.Q & !CLK_OUT_INTreg.Q & !AS_000.PIN - # RST & !inst_AS_000_DMA.Q & !inst_AMIGA_DS.Q & inst_CLK_OUT_PRE_D.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & CLK_030_PE_0_.Q & !CLK_OUT_INTreg.Q & !AS_000.PIN - # RST & !inst_AS_000_DMA.Q & !inst_AMIGA_DS.Q & inst_CLK_OUT_PRE_D.Q & CYCLE_DMA_1_.Q & CLK_030_PE_0_.Q & !CLK_OUT_INTreg.Q & !AS_000.PIN & RW_000.PIN); - -CLK_030_PE_1_.C = (CLK_OSZI); - inst_AMIGA_DS.D = (!RST # UDS_000.PIN & LDS_000.PIN); @@ -1555,11 +1467,10 @@ CLK_000_D_4_.D = (CLK_000_D_3_.Q); CLK_000_D_4_.C = (CLK_OSZI); -inst_LDS_000_INT.D = (!RST - # inst_LDS_000_INT.Q & !SM_AMIGA_6_.Q - # SM_AMIGA_6_.Q & SIZE_0_.PIN & !SIZE_1_.PIN & !A_0_.PIN); +!inst_UDS_000_INT.D = (RST & !inst_UDS_000_INT.Q & !SM_AMIGA_6_.Q + # RST & SM_AMIGA_6_.Q & !A_0_.PIN); -inst_LDS_000_INT.C = (CLK_OSZI); +inst_UDS_000_INT.C = (CLK_OSZI); inst_DS_000_ENABLE.D = (RST & inst_DS_000_ENABLE.Q & !AS_030.PIN # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_4_.Q @@ -1567,10 +1478,15 @@ inst_DS_000_ENABLE.D = (RST & inst_DS_000_ENABLE.Q & !AS_030.PIN inst_DS_000_ENABLE.C = (CLK_OSZI); -!inst_UDS_000_INT.D = (RST & !inst_UDS_000_INT.Q & !SM_AMIGA_6_.Q - # RST & SM_AMIGA_6_.Q & !A_0_.PIN); +inst_LDS_000_INT.D = (!RST + # inst_LDS_000_INT.Q & !SM_AMIGA_6_.Q + # SM_AMIGA_6_.Q & SIZE_0_.PIN & !SIZE_1_.PIN & !A_0_.PIN); -inst_UDS_000_INT.C = (CLK_OSZI); +inst_LDS_000_INT.C = (CLK_OSZI); + +!inst_BGACK_030_INT_D.D = (RST & !BGACK_030.Q); + +inst_BGACK_030_INT_D.C = (CLK_OSZI); SM_AMIGA_6_.D = (RST & CLK_000_D_1_.Q & SM_AMIGA_6_.Q # RST & !CLK_000_D_0_.Q & SM_AMIGA_6_.Q @@ -1608,37 +1524,6 @@ CYCLE_DMA_1_.D = (RST & !BGACK_030.Q & CYCLE_DMA_1_.Q & !AS_000.PIN CYCLE_DMA_1_.C = (CLK_OSZI); -!CLK_030_PE_0_.D = (!RST - # inst_AMIGA_DS.Q - # AS_000.PIN - # !CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q - # inst_AS_000_DMA.Q & !CLK_030_PE_0_.Q - # !inst_CLK_OUT_PRE_D.Q & !CLK_030_PE_0_.Q - # !CLK_030_PE_0_.Q & CLK_OUT_INTreg.Q - # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !RW_000.PIN - # !inst_AS_000_DMA.Q & !CLK_030_PE_1_.Q & inst_CLK_OUT_PRE_D.Q & CLK_030_PE_0_.Q & !CLK_OUT_INTreg.Q); - -CLK_030_PE_0_.C = (CLK_OSZI); - -RST_DLY_0_.D = (RST & !CLK_000_D_1_.Q & RST_DLY_0_.Q - # RST & CLK_000_D_0_.Q & RST_DLY_0_.Q - # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & !RST_DLY_0_.Q - # RST & RST_DLY_0_.Q & RST_DLY_1_.Q & RST_DLY_2_.Q); - -RST_DLY_0_.C = (CLK_OSZI); - -RST_DLY_1_.D.X1 = (RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & RST_DLY_0_.Q & !RST_DLY_1_.Q - # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & RST_DLY_0_.Q & !RST_DLY_2_.Q); - -RST_DLY_1_.D.X2 = (RST & RST_DLY_1_.Q); - -RST_DLY_1_.C = (CLK_OSZI); - -RST_DLY_2_.D = (RST & RST_DLY_2_.Q - # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & RST_DLY_0_.Q & RST_DLY_1_.Q); - -RST_DLY_2_.C = (CLK_OSZI); - !inst_DSACK1_INT.D = (RST & !inst_DSACK1_INT.Q & !AS_030.PIN # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_1_.Q); @@ -1659,7 +1544,7 @@ SM_AMIGA_3_.T = (!RST & SM_AMIGA_3_.Q # CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & !BERR.PIN # inst_VPA_D.Q & !inst_DTACK_D0.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_4_.Q & !SM_AMIGA_3_.Q - # !VMA.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); + # !cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & cpu_est_3_.Q & !VMA.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); SM_AMIGA_3_.C = (CLK_OSZI); @@ -1667,10 +1552,14 @@ SM_AMIGA_2_.D = (RST & CLK_000_D_1_.Q & SM_AMIGA_2_.Q # RST & !CLK_000_D_0_.Q & SM_AMIGA_2_.Q # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & !BERR.PIN # RST & inst_VPA_D.Q & !inst_DTACK_D0.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q - # RST & !VMA.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); + # RST & !cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & cpu_est_3_.Q & !VMA.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); SM_AMIGA_2_.C = (CLK_OSZI); +CLK_OUT_INTreg.D = (inst_CLK_OUT_PRE_D.Q); + +CLK_OUT_INTreg.C = (CLK_OSZI); + SM_AMIGA_i_7_.T.X1 = (!RST & SM_AMIGA_i_7_.Q # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_0_.Q & SM_AMIGA_i_7_.Q # nEXP_SPACE & RST & !inst_AS_030_000_SYNC.Q & !CLK_000_D_3_.Q & CLK_000_D_4_.Q & !SM_AMIGA_i_7_.Q); @@ -1679,11 +1568,7 @@ SM_AMIGA_i_7_.T.X2 = (nEXP_SPACE & RST & !inst_AS_030_000_SYNC.Q & !CLK_000_D_3_ SM_AMIGA_i_7_.C = (CLK_OSZI); -CLK_OUT_INTreg.D = (inst_CLK_OUT_PRE_D.Q); - -CLK_OUT_INTreg.C = (CLK_OSZI); - -CIIN_0 = (nEXP_SPACE +N_60 = (nEXP_SPACE # A_DECODE_23_ & A_DECODE_22_ & A_DECODE_21_ & A_DECODE_20_ & !inst_AS_030_D0.Q & !AHIGH_24_.PIN & !AHIGH_25_.PIN & !AHIGH_26_.PIN & !AHIGH_27_.PIN & !AHIGH_28_.PIN & !AHIGH_29_.PIN & !AHIGH_30_.PIN & !AHIGH_31_.PIN); diff --git a/Logic/68030_tk.tal b/Logic/68030_tk.tal index 36687be..37bb500 100644 --- a/Logic/68030_tk.tal +++ b/Logic/68030_tk.tal @@ -32,7 +32,7 @@ TCR, Clocked Output-to-Register Time, TSU TCO TPD TCR #passes #passes #passes #passes SIGNAL NAME min max min max min max min max - inst_AS_000_DMA 1 2 1 3 .. .. 1 3 + inst_AS_000_DMA 1 2 1 3 .. .. 2 3 inst_AS_000_INT 1 2 1 3 .. .. 2 3 DS_030 .. .. .. .. 1 2 .. .. FPU_CS .. .. .. .. 1 2 .. .. @@ -44,48 +44,41 @@ AMIGA_BUS_ENABLE_HIGH .. .. .. .. 1 2 .. .. inst_AS_030_D0 1 2 1 1 .. .. 1 1 inst_AS_030_000_SYNC 1 2 1 1 .. .. 1 1 inst_DS_000_DMA 1 2 1 1 .. .. .. .. - CLK_030_PE_1_ 1 2 .. .. .. .. 1 1 -inst_LDS_000_INT 1 1 1 1 .. .. 2 2 -inst_DS_000_ENABLE 1 2 1 1 .. .. 2 2 inst_UDS_000_INT 1 1 1 1 .. .. 2 2 +inst_DS_000_ENABLE 1 2 1 1 .. .. 2 2 +inst_LDS_000_INT 1 1 1 1 .. .. 2 2 CYCLE_DMA_0_ 1 2 .. .. .. .. 1 1 CYCLE_DMA_1_ 1 2 .. .. .. .. 1 1 - CLK_030_PE_0_ 1 2 .. .. .. .. 1 1 inst_DSACK1_INT 1 2 1 1 .. .. .. .. AS_030 .. .. .. .. 1 1 .. .. AS_000 .. .. .. .. 1 1 .. .. CIIN .. .. .. .. 1 1 .. .. - A_0_ 1 1 0 0 .. .. 1 1 - RN_A_0_ 1 1 0 0 .. .. 1 1 - SIZE_1_ 1 1 0 0 .. .. 1 1 - RN_SIZE_1_ 1 1 0 0 .. .. 1 1 - IPL_030_1_ 1 1 0 0 .. .. 1 1 - RN_IPL_030_1_ 1 1 0 0 .. .. 1 1 - IPL_030_0_ 1 1 0 0 .. .. 1 1 - RN_IPL_030_0_ 1 1 0 0 .. .. 1 1 + SIZE_1_ 1 1 0 0 .. .. .. .. IPL_030_2_ 1 1 0 0 .. .. 1 1 RN_IPL_030_2_ 1 1 0 0 .. .. 1 1 RW_000 1 1 0 0 .. .. 1 1 RN_RW_000 1 1 0 0 .. .. 1 1 BG_000 1 1 0 0 .. .. 1 1 RN_BG_000 1 1 0 0 .. .. 1 1 - SIZE_0_ 1 1 0 0 .. .. 1 1 - RN_SIZE_0_ 1 1 0 0 .. .. 1 1 + A_0_ 1 1 0 0 .. .. .. .. + IPL_030_1_ 1 1 0 0 .. .. 1 1 + RN_IPL_030_1_ 1 1 0 0 .. .. 1 1 + IPL_030_0_ 1 1 0 0 .. .. 1 1 + RN_IPL_030_0_ 1 1 0 0 .. .. 1 1 VMA 1 1 0 0 .. .. 1 1 RN_VMA 1 1 0 0 .. .. 1 1 - RW 1 1 0 0 .. .. 1 1 - RN_RW 1 1 0 0 .. .. 1 1 + RW 1 1 0 0 .. .. .. .. + SIZE_0_ 1 1 0 0 .. .. .. .. + cpu_est_0_ .. .. .. .. .. .. 1 1 cpu_est_1_ .. .. 1 1 .. .. 1 1 cpu_est_2_ .. .. 1 1 .. .. 1 1 cpu_est_3_ .. .. 1 1 .. .. 1 1 - cpu_est_0_ .. .. .. .. .. .. 1 1 inst_AMIGA_BUS_ENABLE_DMA_HIGH 1 1 1 1 .. .. .. .. inst_AMIGA_BUS_ENABLE_DMA_LOW 1 1 1 1 .. .. .. .. -inst_BGACK_030_INT_D 1 1 .. .. .. .. 1 1 + inst_AS_030_D1 1 1 .. .. .. .. 1 1 inst_VPA_D 1 1 .. .. .. .. 1 1 CLK_000_D_3_ .. .. .. .. .. .. 1 1 inst_DTACK_D0 1 1 .. .. .. .. 1 1 - inst_RESET_OUT 1 1 .. .. .. .. .. .. inst_AMIGA_DS 1 1 .. .. .. .. 1 1 CLK_000_D_1_ .. .. .. .. .. .. 1 1 CLK_000_D_0_ 1 1 .. .. .. .. 1 1 @@ -96,16 +89,14 @@ inst_CLK_OUT_PRE_D .. .. .. .. .. .. 1 1 IPL_D0_2_ 1 1 .. .. .. .. 1 1 CLK_000_D_2_ .. .. .. .. .. .. 1 1 CLK_000_D_4_ .. .. .. .. .. .. 1 1 +inst_BGACK_030_INT_D 1 1 .. .. .. .. 1 1 SM_AMIGA_6_ 1 1 .. .. .. .. 1 1 SM_AMIGA_4_ 1 1 .. .. .. .. 1 1 SM_AMIGA_1_ 1 1 .. .. .. .. 1 1 SM_AMIGA_0_ 1 1 .. .. .. .. 1 1 - RST_DLY_0_ 1 1 .. .. .. .. 1 1 - RST_DLY_1_ 1 1 .. .. .. .. 1 1 - RST_DLY_2_ 1 1 .. .. .. .. 1 1 SM_AMIGA_5_ 1 1 .. .. .. .. 1 1 SM_AMIGA_3_ 1 1 .. .. .. .. 1 1 SM_AMIGA_2_ 1 1 .. .. .. .. 1 1 - SM_AMIGA_i_7_ 1 1 .. .. .. .. 1 1 CLK_OUT_INTreg .. .. 1 1 .. .. 1 1 - CIIN_0 .. .. .. .. 1 1 .. .. \ No newline at end of file + SM_AMIGA_i_7_ 1 1 .. .. .. .. 1 1 + N_60 .. .. .. .. 1 1 .. .. \ No newline at end of file diff --git a/Logic/68030_tk.tt2 b/Logic/68030_tk.tt2 index d37f5d5..60c0ec6 100644 --- a/Logic/68030_tk.tt2 +++ b/Logic/68030_tk.tt2 @@ -1,518 +1,433 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Thu Dec 29 16:01:56 2016 +#$ DATE Sat Dec 30 00:43:37 2017 #$ MODULE 68030_tk -#$ PINS 61 AHIGH_31_ IPL_1_ IPL_0_ A_DECODE_23_ FC_0_ A_1_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 DTACK AVEC E AHIGH_30_ VPA AHIGH_29_ AHIGH_28_ RST AHIGH_27_ RESET AHIGH_26_ AHIGH_25_ AMIGA_ADDR_ENABLE AHIGH_24_ AMIGA_BUS_DATA_DIR A_DECODE_22_ AMIGA_BUS_ENABLE_LOW A_DECODE_21_ AMIGA_BUS_ENABLE_HIGH A_DECODE_20_ CIIN A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ A_0_ SIZE_1_ IPL_030_1_ IPL_030_0_ IPL_030_2_ RW_000 BG_000 BGACK_030 SIZE_0_ VMA RW -#$ NODES 46 cpu_est_1_ cpu_est_2_ cpu_est_3_ cpu_est_0_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_RESET_OUT CLK_030_PE_1_ inst_AMIGA_DS CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_LDS_000_INT inst_DS_000_ENABLE inst_UDS_000_INT SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ CYCLE_DMA_0_ CYCLE_DMA_1_ CLK_030_PE_0_ RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ CLK_OUT_INTreg +#$ PINS 59 AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AHIGH_31_ A_DECODE_22_ A_DECODE_21_ A_DECODE_23_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BGACK_000 CLK_000 IPL_1_ CLK_OSZI IPL_0_ CLK_DIV_OUT FC_0_ CLK_EXP A_1_ FPU_CS FPU_SENSE DSACK1 DTACK AVEC E VPA RST AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN AHIGH_30_ AHIGH_29_ AHIGH_28_ SIZE_1_ IPL_030_2_ RW_000 BG_000 BGACK_030 A_0_ IPL_030_1_ IPL_030_0_ VMA RW SIZE_0_ +#$ NODES 42 cpu_est_0_ cpu_est_1_ cpu_est_2_ cpu_est_3_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_D1 inst_AS_030_000_SYNC inst_AS_000_DMA inst_DS_000_DMA inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_AMIGA_DS CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_UDS_000_INT inst_DS_000_ENABLE inst_LDS_000_INT inst_BGACK_030_INT_D SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ CYCLE_DMA_0_ CYCLE_DMA_1_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ CLK_OUT_INTreg SM_AMIGA_i_7_ N_60 .type fr -.i 100 -.o 162 -.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI FPU_SENSE VPA RST RESET A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q VMA.Q cpu_est_1_.Q cpu_est_2_.Q cpu_est_3_.Q cpu_est_0_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q CLK_030_PE_1_.Q inst_AMIGA_DS.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_4_.Q inst_LDS_000_INT.Q inst_DS_000_ENABLE.Q inst_UDS_000_INT.Q SM_AMIGA_6_.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q SIZE_0_.Q SIZE_1_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q CLK_030_PE_0_.Q RW_000.Q RW.Q RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN DTACK.PIN RW.PIN -.ob DS_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 AVEC E AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SM_AMIGA_i_7_.C SM_AMIGA_6_.C SM_AMIGA_5_.C SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.C SM_AMIGA_1_.C SM_AMIGA_0_.C cpu_est_2_.C cpu_est_3_.C IPL_030_0_.C IPL_030_1_.C IPL_030_2_.C IPL_D0_0_.C IPL_D0_1_.C IPL_D0_2_.C CLK_000_D_0_.C CLK_000_D_1_.C CLK_000_D_2_.C CLK_000_D_3_.C CLK_000_D_4_.C CYCLE_DMA_0_.C CYCLE_DMA_1_.C CLK_030_PE_0_.C CLK_030_PE_1_.C SIZE_0_.C SIZE_1_.C cpu_est_0_.C cpu_est_1_.C RST_DLY_0_.C RST_DLY_1_.C RST_DLY_2_.C inst_DS_000_DMA.C inst_DSACK1_INT.C inst_AS_000_INT.C inst_AMIGA_DS.C inst_AS_030_D0.C inst_DTACK_D0.C inst_VPA_D.C inst_RESET_OUT.C inst_DS_000_ENABLE.C BG_000.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.C A_0_.C RW.C VMA.C RW_000.C inst_AS_030_000_SYNC.C inst_LDS_000_INT.C BGACK_030.C inst_AS_000_DMA.C inst_BGACK_030_INT_D.C CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.C AHIGH_31_ AS_030 AS_000 UDS_000 LDS_000 BERR DTACK AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE DTACK.OE RW.OE DS_030.OE DSACK1.OE CIIN.OE BGACK_030.D VMA.T cpu_est_1_.D cpu_est_2_.D cpu_est_3_.D cpu_est_0_.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AS_030_D0.D inst_AS_030_000_SYNC.D inst_BGACK_030_INT_D.D inst_AS_000_DMA.D inst_DS_000_DMA.D inst_VPA_D.D CLK_000_D_3_.D inst_DTACK_D0.D inst_RESET_OUT.D CLK_030_PE_1_.D inst_AMIGA_DS.D CLK_000_D_1_.D CLK_000_D_0_.D inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_D.D IPL_D0_0_.D IPL_D0_1_.D IPL_D0_2_.D CLK_000_D_2_.D CLK_000_D_4_.D inst_LDS_000_INT.D inst_DS_000_ENABLE.D inst_UDS_000_INT.D SM_AMIGA_6_.D SM_AMIGA_4_.D SM_AMIGA_1_.D SM_AMIGA_0_.D SIZE_0_.D SIZE_1_.D CYCLE_DMA_0_.D CYCLE_DMA_1_.D CLK_030_PE_0_.D RW_000.D RW.D RST_DLY_0_.D RST_DLY_1_.D RST_DLY_2_.D A_0_.D inst_DSACK1_INT.D inst_AS_000_INT.D SM_AMIGA_5_.D SM_AMIGA_3_.T SM_AMIGA_2_.D SM_AMIGA_i_7_.T BG_000.D CLK_OUT_INTreg.D IPL_030_0_.D IPL_030_1_.D IPL_030_2_.D -.p 506 ----------------------------------------------------------------------------------------------------- ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --1-------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---0------------------------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----1----------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ ------0---------------------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------1-------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------1------------------------------------------------------------------------------------------- ~~~~~~~~~~~~111111111111111111111111111111111111111111111111111111111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------1------------------------------------------------------------------------------------------ ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------1----------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~11111111~1~~1~~~~111~~1~1~~~~11~~~11~~~111~~~~1~111 -----------------1----------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------1---------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------0--------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------1-------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------1------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------0----------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1--------------------------------------------------------------------------- ~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------1------------------1--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0--------------------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0--------1-----------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11111111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------10--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------00--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0-------------0-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------01------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------001----------------------------------------------------------------------- ~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------110----------------------------------------------------------------------- ~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------1--0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------1-0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------010---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1-----1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------0-----1--------------------------------------------------------------------- ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------1-------------------------------------------------------------------- ~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1------1-------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0-----------------------------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---1-------------0010--1----------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1--------1------------------------------------------------------------------ ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------0--------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------11------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1---------0----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ ----------------------------------10----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------1---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------0---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------1--------------------------------------------------------------- 1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------1------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1----------------------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1---------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------0---------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0--------------------0---------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~1~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------1-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------1----------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------1---------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------1--------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------1-------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------1-----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------1----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------1---------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------1--------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------00000-------------01------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------11-1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------10-1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------0-01-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------0-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------11001-------0-----10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------0------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ --1------------------11-------------------------111-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~111 --1------------------10-------------------------011-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11 --1------------------01-------------------------101-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1 --1------------------00-------------------------001-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 --0------------------11-------------------------110-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~ --0------------------10-------------------------010-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ --0------------------01-------------------------100-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ ---------------------------------------------------1------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------0---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------------------1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------1-----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------01----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ ------------1--------------------------------0----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------1--0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------------------10-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------1------------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------01-----------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1--------------------------------0-----------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------10------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------1--------------1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------01-------------1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ ------------1--------------------------------0-------------1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ -------------------------1---------1------------------------1---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ -------------------------1---------1-------------------------1--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------------00------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------1--------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ ---------------------------------------------0-------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ --------------------------------------------------------0--------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ -------------------------1----------------------------------------1---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ ------------1-------------------------------0----------------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ ------------1--------------------------------1---------------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ ------------1-------------------------------10---------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ ------------1-------------------------------0-----------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ ------------1--------------------------------1----------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ ------------1-------------------------------10---------------------11-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ ------------1------------------------------------------------------01-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ ------------1-------------------------------10---------------------10-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ ------------1--------------------------------------------------------1------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ ------------1-------------------------------------------------------11------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ ------------1------------------------------------------------------111------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ ------------1-------------------------------10---------------------111------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1---------1----------------------------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ -----------------------------------------------------------------------1----------------------------- ~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------0--------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ ---------------------------------------------1-------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ ----------------------------------------------------------0------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ ------------------------------------------------------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------1---------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ ---------------------------------------------0--------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ --------------------------------------------------------0---------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ ------------1-------------------------------0----------------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ ------------1--------------------------------1---------------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ ------------1-------------------------------10---------------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ ------------0-------------------------------------------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ --------------------------00010-------0-----10----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ ------------1-------------00010-------0-----10----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ --------------------------------------1-0---10----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ ------------1-------------------------1-0---10----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ ------------1-------------------------------01-----------1----------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ ------------1-------------------------------1------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ ------------1-------------------------------01-----------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ ------------1--------------------------------0-----------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ ------------1-------------------------------0-------------1----------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ ------------1--------------------------------1------------1----------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ ------------0---------------------------------------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ ----------------------------------1-----------------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------01-------------1----------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ ----------------------------------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ ----1-------1---------------------0----0----1-------1-----------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ ----1-------1---------------------0----0-----0------1-----------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ ----1-------1---------------------0----0------------1---0-------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-------1---------------------0----0------------1------0----------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ ----0------------------------------------------------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ ---------------------------------0-------------------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ ---------------------------------------------0-------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ ------------------------------------------------------------------------------1---------------------- ~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------1----------1------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------1--------------------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ ------------------------------------------------1------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ ---------------------0---------------------------1-----------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ ---------------------1---------------------------0-----------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ --0-----------------------------------------------1----------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ --1-----------------------------------------------0----------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ ---------------------1----------------------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ ----------------------0-------------------------1-------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ ----------------------1-------------------------0-------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ -------------------------------------------------1------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ --0-----------------------------------------------1-----------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ --1-----------------------------------------------0-----------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ --1------------------------------------------------------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 ----------------------0-------------------------1--------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 ----------------------1-------------------------0--------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 ---------------------0---------------------------1-------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 ---------------------1---------------------------0-------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 --------------------------------------------------1------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 ----------------------------------------------------------------------------------1------------------ ~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1--------------------------------------------------------1------------------ ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------1-------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ --------------------------------------------0-------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ ---------------------------------------------1------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ ---------------------------------------------0------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ --------------------------------------------------------0-------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ ----------------------------------------------------------0-----------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ ---1--1---1------0010--1----------------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------------------------1---------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------------------------1----------------- 1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------1-------------------------------------10-------------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------0------------------0-----------------1--------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ ------------1------------0-------------------1----------------1--------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ ------------1------------0------------------10----------------1--------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ ------------1------------0------------------10----------------0--------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ ------------1------------0-------------------------------------1-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ ------------1------------0------------------------------------11-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ ------------1-----------------------------10------------------01-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------------10------------------10-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------1------0------------------011------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1-----------------------------10------------------011------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1------------------------------0---0--------------011------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1-----------------------1------0------------------101------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1-----------------------------10------------------101------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1------------------------------0---0--------------101------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1------------------------------0------------------011-------------1----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1------------------------------0------------------101-------------1----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0---1--------------011-------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0---1--------------101-------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0---1--------------010-------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0---1--------------100-------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ -------------------------0----------------------------------------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ -------------------------------------1---------1------------------------------0-----1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0--------------------0---------------------------------------------------------01---------------- ~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------------10-------------------1-------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------------10------------------1-1------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1-----------------------1------0-------------------11------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1------------------------------0---0---------------11------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1------------------------------0-------------------11-------------1----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0---1---------------11-------------0----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0---1---------------10-------------0----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ -------------------------1----------------------------------------------------------0---------------- ~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------0-----------------------------1----------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------1----1-----------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------------11--------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------1--------------------------0-------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------0-----------------------------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~1~~~~~~~~~~~ -------------------------0------------------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------------------------------------------------11-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------0-----------------------------------------------------------00-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ -1------------111----------------0-------------------------------------------------------00000000---- ~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------1----------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------1------------------------------10--------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------10----------------------------1-----------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ ------------1-------------------------------10----------------------------1-----------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ ---------------------------------------------------------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------01----------1-------------------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ ------------1-------------------------------01----------1-------------------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------------------------------------------------------------- ~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~000000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -0--------------------------------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---0------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~00000000000~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -0--0------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------0---------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------0-------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------0------------------------------------------------------------------------------------------- ~~~~~~~~~~~~000000000000000000000000000000000000000000000000000000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------0------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --0---------1---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------0-----1---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------01---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~0~0000~~000~~000~~~0~0~~~~~~ -------------0--------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------0-------------------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0---------0-------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------0------------------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0----------0------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------0------------------------------------------------------------------------------------ ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0-----------0------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------1----------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------1---------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------0--------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------1-------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1--------0------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1---------0------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------0----------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~00000000000~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~ -------------------------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------10--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------00--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0-------------1-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1---------------1------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------01------------------------------------------------------------------------ ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------00------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1----------------1----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------1-1----------------------------------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------0-1----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------00----------------------------------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1--------------0--1---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------1---0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------0--0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------0-0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------00---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------0-----0--------------------------------------------------------------------- ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------0------0-------------------------------------------------------------------- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------1------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0----------------------------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------1-----0---1----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------1------0--1----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------1---------0----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~0~~~~~~~~~~~ ------------------------------------1---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------1-----------1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------0------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------0----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00000~~~~~~~~~~0~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------1-----0---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ ------------1-------------0-----------------1-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------0------------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------0----------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------0---------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------0--------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------0-------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------0--0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------0-------------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1--------------1-----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------0-----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------0----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------0---------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------0--------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----10------1--------------------1-----------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ -----------------------------------------0---1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------11------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ --------------------------------------------01------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~0~~~~~~ ---------------------------------------------0------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~0~~~~~~~~ ---------------------------01---------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------1--1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------11-1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------0-1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------1-0-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------00------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------0------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ ------------------------------------------0----0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --1---------1--------10-------------------------011-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ --1---------1--------01-------------------------101-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ --1---------1--------00-------------------------001-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~ --0---------1--------11-------------------------110-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 --0---------1--------10-------------------------010-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0 --0---------1--------01-------------------------100-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00 --0---------1--------00-------------------------000-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~000 ---------------------------------------------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------01---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------1---------0---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------0--------0---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------10--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------01----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------01----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ ----0---------------------------------------------------0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------1---------------------0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------1----------------0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------------0---0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1----------------------------------------0--0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------------------00-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------0------------0------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------1-----------0------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------0-00------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------10------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ --------------------------------------------0--------------0----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------1-------------0----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------------------00----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ ------------1------------1----------------------------------0---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ ------------1------------1-----------------------------------0--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ --------------------------------------------0-----------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ ---------------------------------------------1----------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ --------------------------------------------0------------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ ---------------------------------------------1-----------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ --------------------------------------------10----------------10------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------------00------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~ ------------------------------------1---------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ ------------------------------------------0---------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------0----------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ ------------1------------1---------1------------------------------0---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ -----------------------------------------0-------------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------0----------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ ---------------------------------------------1---------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ -----------------------------------------0--------------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------0-----------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ ---------------------------------------------1----------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ --------------------------------------------10---------------------10-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ -------------------------------------------------------------------00-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ -----------------------------------------0---------------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------0------------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ ---------------------------------------------1-----------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ --------------------------------------------10---------------------1-0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ -------------------------------------------------------------------0-0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ --------------------------------------------10---------------------110------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ --------------------------------------------------------------------00------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ ------------1------------1--------------------------------------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ --------------------------------------------1----------------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ ---------------------------------------------0---------------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ --------------------------------------------------------0----------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ ---------------------------------------------------------0---------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------0-----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ------------0-------------------------------------------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ---------------------------------------------0----------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ---------------------------------------------------------0----------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ --------------------------------------------1------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------0-----------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------0------------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ---------------------------------------------1-----------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ----------------------------------------------------------0----------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------------------------00------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ------------1-------------------------------1-------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ ------------1--------------------------------0------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ --------------------------------------------------------0-------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1----------------------------------------------0----------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ ------------1-------------------------------1--------------------0----------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ ------------1--------------------------------0-------------------0----------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ ------------1-------------------------------------------0--0-----0----------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ ----0-----------------------------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ ------------0---------------------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ ----------------------------------1-----------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ ---------------------------------------1------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ ----------------------------------------------------0-----------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ --------------------------------------------01-------------1----------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ -----0------1----------------------------------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ ------------------------------------------0-----------------------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------------------------0-------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ ------------------------------------------------------------------------------0---------------------- ~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------0-----0----1----------------1-------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ ------------1---------0--------------------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ ------------1-----------------------------------0------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ ------------1--------0---------------------------1-----------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ ------------1--------1---------------------------0-----------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ --0---------1-------------------------------------1----------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ --1---------1-------------------------------------0----------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ ------------1--------0----------------------------------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ ------------1---------0-------------------------1-------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ ------------1---------1-------------------------0-------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ ------------1------------------------------------0------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ --0---------1-------------------------------------1-----------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ --1---------1-------------------------------------0-----------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ --0---------1--------------------------------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ------------1---------0-------------------------1--------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ------------1---------1-------------------------0--------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ------------1--------0---------------------------1-------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ------------1--------1---------------------------0-------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ------------1-------------------------------------0------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ----------------------------------------------------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------1-------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------0------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------00------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1---------------------------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---1--1---0------0010--1----------------------------------------------------------0------------------ ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1---------------------0-----------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1--------0-----------------------------------------------0------------------ ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------------0----------0------------------ ~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1----------------------------------------------------------0----------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ ------------------------------------------------------------------------0---------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------------------------------------------0---------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ ---01-------1------------1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-------1----1-------1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-------1-----1------1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-------1------0-----1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-------1-------1----1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-------1----------0-1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~000~~~~~~~~~~~~~~~~~ ------------1------------0---------------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------0----------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------0---------------------------------------------0----------------- 0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0------------------01-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------0-----0------------------01-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0---0--------------01-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0------------------10-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------0-----0------------------10-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0---0--------------10-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0------------------01--------------1----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0------------------10--------------1----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-------------------------------------------------------------------------------1---------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1----------------------------------------------------------1---------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------------------------11---------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0---0--------------1--------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0-------------------1-------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------0-----0-------------------1-------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0---0---------------1-------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0------------------1---------------1----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0-------------------1--------------1----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------0----------------------------------------------------------0---------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------0----------------------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ --------------------------------------------------------------11--------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ -------1----1-----------------------------00------------------011------------------00---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------1----1-----------------------------00------------------101------------------00---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------0-----------------------------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------------------------------------------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------0-----------------------------------------------------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ ------------1------------0------------------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------------------------------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------0-----------------------------------------------------------00-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------------------1------------------------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------------------1-------------------------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------------------------------1----------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0------------------------------------------------------------------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------------------------------------1---------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0-------------------------------------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------------------------------------------------------1--------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0--------------------------------------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------------------------------------------1-------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0---------------------------------------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------------------------------------------------------1------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0----------------------------------------------------------------------------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------------------------------------------------------1------ ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0-----------------------------------------------------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------------------------------------1----- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0------------------------------------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------------------------------------------1---- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0-------------------------------------------------------------------------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------------------1----------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------------------1----------------------------------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------1-----------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ------------1--------------1----------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ------------1---------------1---------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ------------1----------------0--------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ------------1-----------------1-------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ------------1-------------------------1-1----0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ --------------------------1-----------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ---------------------------1----------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ----------------------------1---------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ -----------------------------0--------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ------------------------------1-------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ --------------------------------------1-1----------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ------------1--------------------------------------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------0--0------------------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------01----------1--0----------------1-----------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ ---------------------------------------------------------0------------------------1-----------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +.i 90 +.o 152 +.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_000 CLK_OSZI FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q cpu_est_3_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_D1.Q inst_AS_030_000_SYNC.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q VMA.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q inst_AMIGA_DS.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_4_.Q inst_UDS_000_INT.Q inst_DS_000_ENABLE.Q inst_LDS_000_INT.Q inst_BGACK_030_INT_D.Q SM_AMIGA_6_.Q RW_000.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q IPL_030_1_.Q SM_AMIGA_i_7_.Q IPL_030_2_.Q N_60 AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN +.ob DS_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 AVEC E AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.C SM_AMIGA_1_.C SM_AMIGA_0_.C IPL_030_0_.C IPL_030_1_.C IPL_030_2_.C IPL_D0_0_.C IPL_D0_1_.C IPL_D0_2_.C SM_AMIGA_i_7_.C SM_AMIGA_6_.C SM_AMIGA_5_.C CLK_000_D_1_.C CLK_000_D_2_.C CLK_000_D_3_.C CLK_000_D_4_.C SIZE_0_.C SIZE_1_.C CYCLE_DMA_0_.C CYCLE_DMA_1_.C cpu_est_0_.C cpu_est_1_.C cpu_est_2_.C cpu_est_3_.C CLK_000_D_0_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_VPA_D.C inst_DTACK_D0.C inst_DS_000_ENABLE.C BG_000.C inst_LDS_000_INT.C VMA.C RW_000.C inst_AS_030_000_SYNC.C BGACK_030.C inst_AS_000_DMA.C inst_DS_000_DMA.C inst_DSACK1_INT.C inst_AS_000_INT.C inst_AMIGA_DS.C A_0_.C RW.C inst_AS_030_D0.C inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_AS_030_D1.C inst_UDS_000_INT.C inst_BGACK_030_INT_D.C CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.C AHIGH_31_ AS_030 AS_000 UDS_000 LDS_000 BERR AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ N_60 AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE VMA.OE CIIN.OE BGACK_030.D cpu_est_0_.D cpu_est_1_.D cpu_est_2_.D cpu_est_3_.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AS_030_D0.D inst_AS_030_D1.D inst_AS_030_000_SYNC.D inst_AS_000_DMA.D inst_DS_000_DMA.D VMA.T inst_VPA_D.D CLK_000_D_3_.D inst_DTACK_D0.D inst_AMIGA_DS.D CLK_000_D_1_.D CLK_000_D_0_.D inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_D.D IPL_D0_0_.D IPL_D0_1_.D IPL_D0_2_.D CLK_000_D_2_.D CLK_000_D_4_.D SIZE_0_.D SIZE_1_.D A_0_.D RW.D inst_UDS_000_INT.D inst_DS_000_ENABLE.D inst_LDS_000_INT.D inst_BGACK_030_INT_D.D SM_AMIGA_6_.D RW_000.D SM_AMIGA_4_.D SM_AMIGA_1_.D SM_AMIGA_0_.D CYCLE_DMA_0_.D CYCLE_DMA_1_.D inst_DSACK1_INT.D inst_AS_000_INT.D SM_AMIGA_5_.D SM_AMIGA_3_.T SM_AMIGA_2_.D BG_000.D CLK_OUT_INTreg.D IPL_030_0_.D IPL_030_1_.D SM_AMIGA_i_7_.T IPL_030_2_.D +.p 421 +------------------------------------------------------------------------------------------ ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-1---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--0--------------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +-----0------------------------------------------------------------------------------------ ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1----------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------1---------------------------------------------------------------------------------- ~~~~~~~~~~~~1111111111111111111111111111111111111111111111111111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------1--------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1-------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------1------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~111~111~1~11~~~~111~~11111~11~1~~~~~11~~~1~11~1 +---------------1-------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------1------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------0------------------------------------------------------------------------ ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------1----------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------1---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------0-------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------0------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1------------------------------------------------------------------ ~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~11~~~~~~~~~~~~~~~~~~~~~~1~~~1~~~~~~~~~~~~~~~~~~ +---1-------------------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----1-----------------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~11111111111~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------01---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0-1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------01--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0--1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------001-------------------------------------------------------------- ~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------110-------------------------------------------------------------- ~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0----1------------------------------------------------------------- ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------1------------------------------------------------------------ ~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-------------------1---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------------------------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--1------------0010--1----------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1--------1--------------------------------------------------------- ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0--------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------11--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------1-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------1------------------------------------------------------- 1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-----------------------0------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------1------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1--------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1-------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1----------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1---------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1--------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1-------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0000-------0----01------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0---------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------111-------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------110-------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------10-0------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------1100-------10---10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------0----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +-1-----------------11-----------------------111------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~1 +-1-----------------10-----------------------011------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1 +-1-----------------01-----------------------101------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~1 +-1-----------------00-----------------------001------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-0-----------------11-----------------------110------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~ +-0-----------------10-----------------------010------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-0-----------------01-----------------------100------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-----------------------------------------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------0--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1-------------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------1------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1----------------------------01-----------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +-----------1-----------------------------0-----------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-------------------------------------------------1---0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1-0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +----------------------------------------1-------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-----------------------------------------0------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-----------------------------------------------------01----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-----------1----------------------------1--------------1---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +-----------1----------------------------01-------------1---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------0-------------1---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +-----------1----------------------------10--------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +-----------1----------------------------1----------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +----------------------------------------01---------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-----------1-----------------------------0---------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +----------------------------------------------------------00------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------1----------------------------- ~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------0-------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +-----------------------------------------1------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--------------------------------------------------------0---1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +-------------------------------------------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------1--------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-----------------------------------------0-------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-----------------------------------------------------0-------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-----------1----------------------------0---------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +-----------1-----------------------------1--------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +-----------1----------------------------10--------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +-----------0---------------------------------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +------------------------0001-------00---10---------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------1------------0001-------00---10---------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +------------------------------------1-0-10---------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------1------------------------1-0-10---------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------1----------------------------01-------------1-------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------1----------------------------1-----------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------1----------------------------01----------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +-----------1-----------------------------0----------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------1----------------------------0---------------1-------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +-----------1-----------------------------1--------------1-------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +---0-------------------------------------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +------------------------------0----------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +-----------------------------------------0-----------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +------------------------------------------------------------------1----------------------- ~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------1---------1----------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------1--------1----------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------1----------------------------------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +--------------------------------------------1----------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-------------------0-------------------------1---------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-------------------1-------------------------0---------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-0--------------------------------------------1--------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-1--------------------------------------------0--------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-------------------1------------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------0-----------------------1-----------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------1-----------------------0-----------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +---------------------------------------------1----------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-0--------------------------------------------1---------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-1--------------------------------------------0---------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-----------0---------------------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +--------------------------------1------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------01---------------1-----------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +---------------------------------------------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +---1-------1--------------------0----0--1-------1--------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +---1-------1--------------------0----0---0------1--------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +---1-------1--------------------0----0----------1----0---------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +---1-------1--------------------0----0----------1--------0-----------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-1--------------------------------------------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +--------------------0-----------------------1-------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +--------------------1-----------------------0-------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-------------------0-------------------------1------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-------------------1-------------------------0------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +----------------------------------------------1-----------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-----------------------------------------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------1----------------- ~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1------------------------------------------------1----------------- ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------1-------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +----------------------------------------0-------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +-----------------------------------------1------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +-----------------------------------------0------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-----------------------------------------------------0------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +--------------------------------------------------------0---------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--1--1--1------0010--1--------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------------1---------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------1---------------- 1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----1----------------------------------10-------------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------0----------------0-----------------1--------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +-----------1-----------0-----------------1----------------1--------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +-----------1-----------0----------------10----------------1--------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +-----------1-----------0----------------10----------------0--------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +-----------1-----------0-----------------------------------1-------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +-----------1-----------0----------------------------------11-------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +--------------------------------------------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +---0-------------------0-------------------------------------------------01--------------- ~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1--------------------------------------------------0--------------- ~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------11--------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0---------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0----------------------------------------------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------------------11------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0---------------------------------------------------00------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +1-----------111---------------0------------------------------------------------00000000--- ~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------1---------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------1-----------------------10--------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +----------------------------------------10---------------------1------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------1----------------------------10---------------------1------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +----------------------------------------01-----------1-----------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-----------1----------------------------01-----------1-----------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------------------ ~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~00000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +0----------------------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--0--------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +0--0-------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----0------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0----------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------0---------------------------------------------------------------------------------- ~~~~~~~~~~~~0000000000000000000000000000000000000000000000000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------0--------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-0---------1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----0-----1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------0-1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------01------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~0~00000~~0~0~~~~~~ +------------0----------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------0----------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------0---------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0---------0---------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------0--------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------1-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------1------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------0------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------1----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------0--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------0-------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~00000000000~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~ +-----------1-----------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~000~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0000~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------0------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------1----------10------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------00------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------00---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------01--------------------------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0-0--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------00--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1-1-------------------------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------0-1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0--0-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------00-------------------------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0----0------------------------------------------------------------- ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0-----0------------------------------------------------------------ ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1----------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------0----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-------------------0---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-----------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------0---------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------1----------0------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------11----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------0---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------0----------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0---------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------1--------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------0--------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0-------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------0-----------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0----------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------0---------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0--------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0-------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---10------1------------------1----------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-----------1----------------------------11------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +----------------------------------------01------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~0~~~~~~ +-----------------------------------------0------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0----------------0------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~0~~~~~~~~ +------------------------1---------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------11--------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------10--------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------111-------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1-0-------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------0----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +-1---------1-------10-----------------------011------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-1---------1-------01-----------------------101------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-1---------1-------00-----------------------001------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~ +-0---------1-------11-----------------------110------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-0---------1-------10-----------------------010------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~0 +-0---------1-------01-----------------------100------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0 +-0---------1-------00-----------------------000------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~0 +-----------------------------------------------0------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------01--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------1---------0--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------0--------0--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------10-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------01-----------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1----------------------------01-----------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +---0-------------------------------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +--------------------------------1--------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-------------------------------------1---------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +------------------------------------------------0----0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1-------------------------------------0---0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------------------0-0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +----------------------------------------0--------------0---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +-----------------------------------------1-------------0---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +--------------------------------------------------0--0-0---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------10--------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +----------------------------------------0----------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +-----------------------------------------1---------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +--------------------------------------------------------00-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +----------------------------------------0-----------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +-----------------------------------------1----------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----------------------------------------0------------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +-----------------------------------------1-----------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +----------------------------------------10----------------10------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----------------------------------------------------------00------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +----------------------------------------1---------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +-----------------------------------------0--------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +-----------------------------------------------------0--------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +-------------------------------------------------------0------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +-----------1----------------------------0----------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------0---------------------------------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------------------------------------0---------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-------------------------------------------------------0-------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +----------------------------------------1-----------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +-----------------------------------------0----------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +----------------------------------------0-----------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-----------------------------------------1----------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +--------------------------------------------------------0-------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +---------------------------------------------------------------00------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +----0------1-----------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +------------------------------------------------------------------0----------------------- ~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------0----------------------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-----------1--------------------------------0----------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-----------1-------0-------------------------1---------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-----------1-------1-------------------------0---------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-0---------1----------------------------------1--------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-1---------1----------------------------------0--------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-----------1-------0------------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------1--------0-----------------------1-----------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------1--------1-----------------------0-----------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------1---------------------------------0----------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-0---------1----------------------------------1---------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-1---------1----------------------------------0---------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------1----------------------------1----------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------1-----------------------------0---------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------------------------------------------------0---------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1----------------------------1-------------0--------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +-----------1-----------------------------0------------0--------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +-----------1---------------------------------------------0-----------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------1-----------------------------------------00--0-----------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +---0-----------------------------------------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------0---------------------------------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +--------------------------------1------------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-------------------------------------1-------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +------------------------------------------------0--------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +----------------------------------------01---------------1-----------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-0---------1----------------------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1--------0-----------------------1-------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1--------1-----------------------0-------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1-------0-------------------------1------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1-------1-------------------------0------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1----------------------------------0-----------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------------------------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------1-------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------0------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------0-0----------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--1--1--0------0010--1--------------------------------------------------0----------------- ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------------0---------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1--------0---------------------------------------0----------------- ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------0-----------0----------------- ~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------------------------0-----------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-------------------------------------------------------------0----------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------------------------0----------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +--01-------1-----------1-------0--------------------1----------------0--0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1---1-------1-------0--------------------1----------------0--0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1----1------1-------0--------------------1----------------0--0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1-----0-----1-------0--------------------1----------------0--0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1------1----1-------0--------------------1----------------0--0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1---------0-1-------0--------------------1----------------0--0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~ +-----------1-----------0-------------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------0---------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------0--------------------------------------0---------------- 0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------0-----0------------------01-------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------0----0------------------01-------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------0---0--------------01-------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------0-----0------------------10-------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------0----0------------------10-------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------0---0--------------10-------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------0------------------01------1------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------0------------------10------1------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1----------------------------------------------------------------------1--------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1--------------------------------------------------1--------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------11--------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------0-----0-------------------1-------------01--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------0----0-------------------1-------------01--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------0---0---------------1-------------01--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------0-------------------1------1------01--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0--------------------------------------------------0--------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------0--------------------------------------------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------------------------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------------------------------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------------------------------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------------------------------------------00------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------------------1-----------------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------------------1------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------------1---------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0---------------------------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------------------1--------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------------------------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------------------------1-------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------------------------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------------1------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0------------------------------------------------------------------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------------1------ ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-------------------------------------------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------------1----- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------------------1---- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0---------------------------------------------------------------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------------------------1--- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------------------------------------------------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------------------1---------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------------------1---------------------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +-----------1------------1-----------0----0----------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1-------------1----------0----0----------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1--------------1---------0----0----------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1---------------0--------0----0----------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1-----------------------10----0----------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1------------------------1-1--0----------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +------------------------1-----------0---------------------------0-----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-------------------------1----------0---------------------------0-----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +--------------------------1---------0---------------------------0-----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +---------------------------0--------0---------------------------0-----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-----------------------------------10---------------------------0-----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +------------------------------------1-1-------------------------0-----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +--------------------------------------------------0----0---------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------01-----------1---0-----------1-------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +-------------------------------------------------------0----------------1----------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ .end diff --git a/Logic/68030_tk.tt3 b/Logic/68030_tk.tt3 index 9cfabe9..3ea4ce5 100644 --- a/Logic/68030_tk.tt3 +++ b/Logic/68030_tk.tt3 @@ -1,518 +1,433 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Thu Dec 29 16:01:56 2016 +#$ DATE Sat Dec 30 00:43:37 2017 #$ MODULE 68030_tk -#$ PINS 61 AHIGH_31_ IPL_1_ IPL_0_ A_DECODE_23_ FC_0_ A_1_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 DTACK AVEC E AHIGH_30_ VPA AHIGH_29_ AHIGH_28_ RST AHIGH_27_ RESET AHIGH_26_ AHIGH_25_ AMIGA_ADDR_ENABLE AHIGH_24_ AMIGA_BUS_DATA_DIR A_DECODE_22_ AMIGA_BUS_ENABLE_LOW A_DECODE_21_ AMIGA_BUS_ENABLE_HIGH A_DECODE_20_ CIIN A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ A_0_ SIZE_1_ IPL_030_1_ IPL_030_0_ IPL_030_2_ RW_000 BG_000 BGACK_030 SIZE_0_ VMA RW -#$ NODES 46 cpu_est_1_ cpu_est_2_ cpu_est_3_ cpu_est_0_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_RESET_OUT CLK_030_PE_1_ inst_AMIGA_DS CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_LDS_000_INT inst_DS_000_ENABLE inst_UDS_000_INT SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ CYCLE_DMA_0_ CYCLE_DMA_1_ CLK_030_PE_0_ RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ CLK_OUT_INTreg +#$ PINS 59 AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AHIGH_31_ A_DECODE_22_ A_DECODE_21_ A_DECODE_23_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BGACK_000 CLK_000 IPL_1_ CLK_OSZI IPL_0_ CLK_DIV_OUT FC_0_ CLK_EXP A_1_ FPU_CS FPU_SENSE DSACK1 DTACK AVEC E VPA RST AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN AHIGH_30_ AHIGH_29_ AHIGH_28_ SIZE_1_ IPL_030_2_ RW_000 BG_000 BGACK_030 A_0_ IPL_030_1_ IPL_030_0_ VMA RW SIZE_0_ +#$ NODES 42 cpu_est_0_ cpu_est_1_ cpu_est_2_ cpu_est_3_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_D1 inst_AS_030_000_SYNC inst_AS_000_DMA inst_DS_000_DMA inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_AMIGA_DS CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_UDS_000_INT inst_DS_000_ENABLE inst_LDS_000_INT inst_BGACK_030_INT_D SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ CYCLE_DMA_0_ CYCLE_DMA_1_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ CLK_OUT_INTreg SM_AMIGA_i_7_ N_60 .type fr -.i 100 -.o 162 -.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI FPU_SENSE VPA RST RESET A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q VMA.Q cpu_est_1_.Q cpu_est_2_.Q cpu_est_3_.Q cpu_est_0_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q CLK_030_PE_1_.Q inst_AMIGA_DS.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_4_.Q inst_LDS_000_INT.Q inst_DS_000_ENABLE.Q inst_UDS_000_INT.Q SM_AMIGA_6_.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q SIZE_0_.Q SIZE_1_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q CLK_030_PE_0_.Q RW_000.Q RW.Q RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN DTACK.PIN RW.PIN -.ob DS_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 AVEC E AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SM_AMIGA_i_7_.C SM_AMIGA_6_.C SM_AMIGA_5_.C SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.C SM_AMIGA_1_.C SM_AMIGA_0_.C cpu_est_2_.C cpu_est_3_.C IPL_030_0_.C IPL_030_1_.C IPL_030_2_.C IPL_D0_0_.C IPL_D0_1_.C IPL_D0_2_.C CLK_000_D_0_.C CLK_000_D_1_.C CLK_000_D_2_.C CLK_000_D_3_.C CLK_000_D_4_.C CYCLE_DMA_0_.C CYCLE_DMA_1_.C CLK_030_PE_0_.C CLK_030_PE_1_.C SIZE_0_.C SIZE_1_.C cpu_est_0_.C cpu_est_1_.C RST_DLY_0_.C RST_DLY_1_.C RST_DLY_2_.C inst_DS_000_DMA.C inst_DSACK1_INT.C inst_AS_000_INT.C inst_AMIGA_DS.C inst_AS_030_D0.C inst_DTACK_D0.C inst_VPA_D.C inst_RESET_OUT.C inst_DS_000_ENABLE.C BG_000.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.C A_0_.C RW.C VMA.C RW_000.C inst_AS_030_000_SYNC.C inst_LDS_000_INT.C BGACK_030.C inst_AS_000_DMA.C inst_BGACK_030_INT_D.C CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.C AHIGH_31_ AS_030 AS_000 UDS_000 LDS_000 BERR DTACK AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE DTACK.OE RW.OE DS_030.OE DSACK1.OE CIIN.OE BGACK_030.D VMA.T cpu_est_1_.D cpu_est_2_.D cpu_est_3_.D cpu_est_0_.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AS_030_D0.D inst_AS_030_000_SYNC.D inst_BGACK_030_INT_D.D inst_AS_000_DMA.D inst_DS_000_DMA.D inst_VPA_D.D CLK_000_D_3_.D inst_DTACK_D0.D inst_RESET_OUT.D CLK_030_PE_1_.D inst_AMIGA_DS.D CLK_000_D_1_.D CLK_000_D_0_.D inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_D.D IPL_D0_0_.D IPL_D0_1_.D IPL_D0_2_.D CLK_000_D_2_.D CLK_000_D_4_.D inst_LDS_000_INT.D inst_DS_000_ENABLE.D inst_UDS_000_INT.D SM_AMIGA_6_.D SM_AMIGA_4_.D SM_AMIGA_1_.D SM_AMIGA_0_.D SIZE_0_.D SIZE_1_.D CYCLE_DMA_0_.D CYCLE_DMA_1_.D CLK_030_PE_0_.D RW_000.D RW.D RST_DLY_0_.D RST_DLY_1_.D RST_DLY_2_.D A_0_.D inst_DSACK1_INT.D inst_AS_000_INT.D SM_AMIGA_5_.D SM_AMIGA_3_.T SM_AMIGA_2_.D SM_AMIGA_i_7_.T BG_000.D CLK_OUT_INTreg.D IPL_030_0_.D IPL_030_1_.D IPL_030_2_.D -.p 506 ----------------------------------------------------------------------------------------------------- ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --1-------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---0------------------------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----1----------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ ------0---------------------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------1-------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------1------------------------------------------------------------------------------------------- ~~~~~~~~~~~~111111111111111111111111111111111111111111111111111111111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------1------------------------------------------------------------------------------------------ ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------1----------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~11111111~1~~1~~~~111~~1~1~~~~11~~~11~~~111~~~~1~111 -----------------1----------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------1---------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------0--------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------1-------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------1------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------0----------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1--------------------------------------------------------------------------- ~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------1------------------1--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0--------------------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0--------1-----------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11111111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------10--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------00--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0-------------0-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------01------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------001----------------------------------------------------------------------- ~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------110----------------------------------------------------------------------- ~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------1--0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------1-0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------010---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1-----1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------0-----1--------------------------------------------------------------------- ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------1-------------------------------------------------------------------- ~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1------1-------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0-----------------------------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---1-------------0010--1----------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1--------1------------------------------------------------------------------ ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------0--------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------11------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1---------0----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ ----------------------------------10----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------1---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------0---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------1--------------------------------------------------------------- 1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------1------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1----------------------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1---------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------0---------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0--------------------0---------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~1~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------1-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------1----------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------1---------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------1--------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------1-------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------1-----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------1----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------1---------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------1--------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------00000-------------01------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------11-1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------10-1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------0-01-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------0-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------11001-------0-----10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------0------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ --1------------------11-------------------------111-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~111 --1------------------10-------------------------011-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11 --1------------------01-------------------------101-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1 --1------------------00-------------------------001-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 --0------------------11-------------------------110-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~ --0------------------10-------------------------010-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ --0------------------01-------------------------100-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ ---------------------------------------------------1------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------0---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------------------1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------1-----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------01----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ ------------1--------------------------------0----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------1--0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------------------10-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------1------------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------01-----------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1--------------------------------0-----------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------10------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------1--------------1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------01-------------1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ ------------1--------------------------------0-------------1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ -------------------------1---------1------------------------1---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ -------------------------1---------1-------------------------1--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------------00------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------1--------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ ---------------------------------------------0-------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ --------------------------------------------------------0--------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ -------------------------1----------------------------------------1---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ ------------1-------------------------------0----------------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ ------------1--------------------------------1---------------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ ------------1-------------------------------10---------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ ------------1-------------------------------0-----------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ ------------1--------------------------------1----------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ ------------1-------------------------------10---------------------11-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ ------------1------------------------------------------------------01-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ ------------1-------------------------------10---------------------10-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ ------------1--------------------------------------------------------1------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ ------------1-------------------------------------------------------11------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ ------------1------------------------------------------------------111------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ ------------1-------------------------------10---------------------111------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1---------1----------------------------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ -----------------------------------------------------------------------1----------------------------- ~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------0--------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ ---------------------------------------------1-------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ ----------------------------------------------------------0------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ ------------------------------------------------------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------1---------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ ---------------------------------------------0--------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ --------------------------------------------------------0---------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ ------------1-------------------------------0----------------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ ------------1--------------------------------1---------------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ ------------1-------------------------------10---------------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ ------------0-------------------------------------------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ --------------------------00010-------0-----10----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ ------------1-------------00010-------0-----10----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ --------------------------------------1-0---10----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ ------------1-------------------------1-0---10----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ ------------1-------------------------------01-----------1----------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ ------------1-------------------------------1------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ ------------1-------------------------------01-----------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ ------------1--------------------------------0-----------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ ------------1-------------------------------0-------------1----------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ ------------1--------------------------------1------------1----------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ ------------0---------------------------------------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ ----------------------------------1-----------------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------01-------------1----------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ ----------------------------------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ ----1-------1---------------------0----0----1-------1-----------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ ----1-------1---------------------0----0-----0------1-----------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ ----1-------1---------------------0----0------------1---0-------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-------1---------------------0----0------------1------0----------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ ----0------------------------------------------------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ ---------------------------------0-------------------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ ---------------------------------------------0-------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ ------------------------------------------------------------------------------1---------------------- ~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------1----------1------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------1--------------------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ ------------------------------------------------1------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ ---------------------0---------------------------1-----------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ ---------------------1---------------------------0-----------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ --0-----------------------------------------------1----------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ --1-----------------------------------------------0----------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ ---------------------1----------------------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ ----------------------0-------------------------1-------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ ----------------------1-------------------------0-------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ -------------------------------------------------1------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ --0-----------------------------------------------1-----------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ --1-----------------------------------------------0-----------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ --1------------------------------------------------------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 ----------------------0-------------------------1--------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 ----------------------1-------------------------0--------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 ---------------------0---------------------------1-------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 ---------------------1---------------------------0-------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 --------------------------------------------------1------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 ----------------------------------------------------------------------------------1------------------ ~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1--------------------------------------------------------1------------------ ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------1-------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ --------------------------------------------0-------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ ---------------------------------------------1------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ ---------------------------------------------0------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ --------------------------------------------------------0-------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ ----------------------------------------------------------0-----------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ ---1--1---1------0010--1----------------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------------------------1---------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------------------------1----------------- 1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------1-------------------------------------10-------------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------0------------------0-----------------1--------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ ------------1------------0-------------------1----------------1--------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ ------------1------------0------------------10----------------1--------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ ------------1------------0------------------10----------------0--------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ ------------1------------0-------------------------------------1-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ ------------1------------0------------------------------------11-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ ------------1-----------------------------10------------------01-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------------10------------------10-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------1------0------------------011------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1-----------------------------10------------------011------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1------------------------------0---0--------------011------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1-----------------------1------0------------------101------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1-----------------------------10------------------101------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1------------------------------0---0--------------101------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1------------------------------0------------------011-------------1----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1------------------------------0------------------101-------------1----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0---1--------------011-------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0---1--------------101-------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0---1--------------010-------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0---1--------------100-------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ -------------------------0----------------------------------------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ -------------------------------------1---------1------------------------------0-----1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0--------------------0---------------------------------------------------------01---------------- ~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------------10-------------------1-------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------------10------------------1-1------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1-----------------------1------0-------------------11------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1------------------------------0---0---------------11------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1------------------------------0-------------------11-------------1----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0---1---------------11-------------0----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0---1---------------10-------------0----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ -------------------------1----------------------------------------------------------0---------------- ~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------0-----------------------------1----------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------1----1-----------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------------11--------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------1--------------------------0-------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------0-----------------------------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~1~~~~~~~~~~~ -------------------------0------------------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------------------------------------------------11-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------0-----------------------------------------------------------00-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ -1------------111----------------0-------------------------------------------------------00000000---- ~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------1----------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------1------------------------------10--------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------10----------------------------1-----------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ ------------1-------------------------------10----------------------------1-----------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ ---------------------------------------------------------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------01----------1-------------------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ ------------1-------------------------------01----------1-------------------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------------------------------------------------------------- ~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~000000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -0--------------------------------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---0------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~00000000000~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -0--0------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------0---------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------0-------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------0------------------------------------------------------------------------------------------- ~~~~~~~~~~~~000000000000000000000000000000000000000000000000000000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------0------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --0---------1---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------0-----1---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------01---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~0~0000~~000~~000~~~0~0~~~~~~ -------------0--------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------0-------------------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0---------0-------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------0------------------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0----------0------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------0------------------------------------------------------------------------------------ ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0-----------0------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------1----------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------1---------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------0--------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------1-------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1--------0------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1---------0------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------0----------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~00000000000~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~ -------------------------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------10--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------00--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0-------------1-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1---------------1------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------01------------------------------------------------------------------------ ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------00------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1----------------1----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------1-1----------------------------------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------0-1----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------00----------------------------------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1--------------0--1---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------1---0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------0--0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------0-0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------00---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------0-----0--------------------------------------------------------------------- ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------0------0-------------------------------------------------------------------- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------1------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0----------------------------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------1-----0---1----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------1------0--1----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------1---------0----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~0~~~~~~~~~~~ ------------------------------------1---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------1-----------1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------0------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------0----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00000~~~~~~~~~~0~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------1-----0---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ ------------1-------------0-----------------1-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------0------------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------0----------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------0---------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------0--------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------0-------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------0--0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------0-------------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1--------------1-----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------0-----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------0----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------0---------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------0--------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----10------1--------------------1-----------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ -----------------------------------------0---1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------11------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ --------------------------------------------01------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~0~~~~~~ ---------------------------------------------0------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~0~~~~~~~~ ---------------------------01---------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------1--1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------11-1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------0-1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------1-0-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------00------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------0------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ ------------------------------------------0----0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --1---------1--------10-------------------------011-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ --1---------1--------01-------------------------101-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ --1---------1--------00-------------------------001-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~ --0---------1--------11-------------------------110-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 --0---------1--------10-------------------------010-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0 --0---------1--------01-------------------------100-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00 --0---------1--------00-------------------------000-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~000 ---------------------------------------------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------01---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------1---------0---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------0--------0---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------10--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------01----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------01----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ ----0---------------------------------------------------0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------1---------------------0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------1----------------0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------------0---0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1----------------------------------------0--0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------------------00-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------0------------0------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------1-----------0------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------0-00------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------10------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ --------------------------------------------0--------------0----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------1-------------0----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------------------00----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ ------------1------------1----------------------------------0---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ ------------1------------1-----------------------------------0--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ --------------------------------------------0-----------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ ---------------------------------------------1----------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ --------------------------------------------0------------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ ---------------------------------------------1-----------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ --------------------------------------------10----------------10------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------------00------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~ ------------------------------------1---------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ ------------------------------------------0---------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------0----------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ ------------1------------1---------1------------------------------0---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ -----------------------------------------0-------------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------0----------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ ---------------------------------------------1---------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ -----------------------------------------0--------------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------0-----------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ ---------------------------------------------1----------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ --------------------------------------------10---------------------10-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ -------------------------------------------------------------------00-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ -----------------------------------------0---------------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------0------------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ ---------------------------------------------1-----------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ --------------------------------------------10---------------------1-0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ -------------------------------------------------------------------0-0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ --------------------------------------------10---------------------110------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ --------------------------------------------------------------------00------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ ------------1------------1--------------------------------------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ --------------------------------------------1----------------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ ---------------------------------------------0---------------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ --------------------------------------------------------0----------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ ---------------------------------------------------------0---------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------0-----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ------------0-------------------------------------------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ---------------------------------------------0----------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ---------------------------------------------------------0----------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ --------------------------------------------1------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------0-----------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------0------------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ---------------------------------------------1-----------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ----------------------------------------------------------0----------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------------------------00------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ------------1-------------------------------1-------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ ------------1--------------------------------0------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ --------------------------------------------------------0-------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1----------------------------------------------0----------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ ------------1-------------------------------1--------------------0----------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ ------------1--------------------------------0-------------------0----------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ ------------1-------------------------------------------0--0-----0----------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ ----0-----------------------------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ ------------0---------------------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ ----------------------------------1-----------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ ---------------------------------------1------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ ----------------------------------------------------0-----------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ --------------------------------------------01-------------1----------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ -----0------1----------------------------------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ ------------------------------------------0-----------------------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------------------------0-------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ ------------------------------------------------------------------------------0---------------------- ~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------0-----0----1----------------1-------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ ------------1---------0--------------------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ ------------1-----------------------------------0------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ ------------1--------0---------------------------1-----------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ ------------1--------1---------------------------0-----------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ --0---------1-------------------------------------1----------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ --1---------1-------------------------------------0----------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ ------------1--------0----------------------------------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ ------------1---------0-------------------------1-------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ ------------1---------1-------------------------0-------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ ------------1------------------------------------0------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ --0---------1-------------------------------------1-----------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ --1---------1-------------------------------------0-----------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ --0---------1--------------------------------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ------------1---------0-------------------------1--------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ------------1---------1-------------------------0--------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ------------1--------0---------------------------1-------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ------------1--------1---------------------------0-------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ------------1-------------------------------------0------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ----------------------------------------------------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------1-------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------0------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------00------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1---------------------------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---1--1---0------0010--1----------------------------------------------------------0------------------ ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1---------------------0-----------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1--------0-----------------------------------------------0------------------ ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------------0----------0------------------ ~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1----------------------------------------------------------0----------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ ------------------------------------------------------------------------0---------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------------------------------------------0---------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ ---01-------1------------1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-------1----1-------1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-------1-----1------1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-------1------0-----1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-------1-------1----1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-------1----------0-1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~000~~~~~~~~~~~~~~~~~ ------------1------------0---------------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------0----------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------0---------------------------------------------0----------------- 0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0------------------01-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------0-----0------------------01-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0---0--------------01-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0------------------10-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------0-----0------------------10-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0---0--------------10-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0------------------01--------------1----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0------------------10--------------1----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-------------------------------------------------------------------------------1---------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1----------------------------------------------------------1---------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------------------------11---------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0---0--------------1--------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-----------------------0------0-------------------1-------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------0-----0-------------------1-------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0---0---------------1-------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0------------------1---------------1----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0-------------------1--------------1----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------0----------------------------------------------------------0---------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------0----------------------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ --------------------------------------------------------------11--------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ -------1----1-----------------------------00------------------011------------------00---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------1----1-----------------------------00------------------101------------------00---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------0-----------------------------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------------------------------------------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------0-----------------------------------------------------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ ------------1------------0------------------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------------------------------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------0-----------------------------------------------------------00-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------------------1------------------------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------------------1-------------------------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------------------------------1----------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0------------------------------------------------------------------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------------------------------------1---------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0-------------------------------------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------------------------------------------------------1--------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0--------------------------------------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------------------------------------------1-------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0---------------------------------------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------------------------------------------------------1------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0----------------------------------------------------------------------------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------------------------------------------------------1------ ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0-----------------------------------------------------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------------------------------------1----- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0------------------------------------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------------------------------------------1---- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0-------------------------------------------------------------------------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------------------1----------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------------------1----------------------------------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------1-----------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ------------1--------------1----------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ------------1---------------1---------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ------------1----------------0--------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ------------1-----------------1-------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ------------1-------------------------1-1----0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ --------------------------1-----------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ---------------------------1----------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ----------------------------1---------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ -----------------------------0--------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ------------------------------1-------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ --------------------------------------1-1----------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ------------1--------------------------------------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------0--0------------------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1-------------------------------01----------1--0----------------1-----------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ ---------------------------------------------------------0------------------------1-----------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +.i 90 +.o 152 +.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_000 CLK_OSZI FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q cpu_est_3_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_D1.Q inst_AS_030_000_SYNC.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q VMA.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q inst_AMIGA_DS.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_4_.Q inst_UDS_000_INT.Q inst_DS_000_ENABLE.Q inst_LDS_000_INT.Q inst_BGACK_030_INT_D.Q SM_AMIGA_6_.Q RW_000.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q IPL_030_1_.Q SM_AMIGA_i_7_.Q IPL_030_2_.Q N_60 AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN +.ob DS_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 AVEC E AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.C SM_AMIGA_1_.C SM_AMIGA_0_.C IPL_030_0_.C IPL_030_1_.C IPL_030_2_.C IPL_D0_0_.C IPL_D0_1_.C IPL_D0_2_.C SM_AMIGA_i_7_.C SM_AMIGA_6_.C SM_AMIGA_5_.C CLK_000_D_1_.C CLK_000_D_2_.C CLK_000_D_3_.C CLK_000_D_4_.C SIZE_0_.C SIZE_1_.C CYCLE_DMA_0_.C CYCLE_DMA_1_.C cpu_est_0_.C cpu_est_1_.C cpu_est_2_.C cpu_est_3_.C CLK_000_D_0_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_VPA_D.C inst_DTACK_D0.C inst_DS_000_ENABLE.C BG_000.C inst_LDS_000_INT.C VMA.C RW_000.C inst_AS_030_000_SYNC.C BGACK_030.C inst_AS_000_DMA.C inst_DS_000_DMA.C inst_DSACK1_INT.C inst_AS_000_INT.C inst_AMIGA_DS.C A_0_.C RW.C inst_AS_030_D0.C inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_AS_030_D1.C inst_UDS_000_INT.C inst_BGACK_030_INT_D.C CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.C AHIGH_31_ AS_030 AS_000 UDS_000 LDS_000 BERR AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ N_60 AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE VMA.OE CIIN.OE BGACK_030.D cpu_est_0_.D cpu_est_1_.D cpu_est_2_.D cpu_est_3_.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AS_030_D0.D inst_AS_030_D1.D inst_AS_030_000_SYNC.D inst_AS_000_DMA.D inst_DS_000_DMA.D VMA.T inst_VPA_D.D CLK_000_D_3_.D inst_DTACK_D0.D inst_AMIGA_DS.D CLK_000_D_1_.D CLK_000_D_0_.D inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_D.D IPL_D0_0_.D IPL_D0_1_.D IPL_D0_2_.D CLK_000_D_2_.D CLK_000_D_4_.D SIZE_0_.D SIZE_1_.D A_0_.D RW.D inst_UDS_000_INT.D inst_DS_000_ENABLE.D inst_LDS_000_INT.D inst_BGACK_030_INT_D.D SM_AMIGA_6_.D RW_000.D SM_AMIGA_4_.D SM_AMIGA_1_.D SM_AMIGA_0_.D CYCLE_DMA_0_.D CYCLE_DMA_1_.D inst_DSACK1_INT.D inst_AS_000_INT.D SM_AMIGA_5_.D SM_AMIGA_3_.T SM_AMIGA_2_.D BG_000.D CLK_OUT_INTreg.D IPL_030_0_.D IPL_030_1_.D SM_AMIGA_i_7_.T IPL_030_2_.D +.p 421 +------------------------------------------------------------------------------------------ ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-1---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--0--------------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +-----0------------------------------------------------------------------------------------ ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1----------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------1---------------------------------------------------------------------------------- ~~~~~~~~~~~~1111111111111111111111111111111111111111111111111111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------1--------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1-------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------1------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~111~111~1~11~~~~111~~11111~11~1~~~~~11~~~1~11~1 +---------------1-------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------1------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------0------------------------------------------------------------------------ ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------1----------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------1---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------0-------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------0------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1------------------------------------------------------------------ ~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~11~~~~~~~~~~~~~~~~~~~~~~1~~~1~~~~~~~~~~~~~~~~~~ +---1-------------------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----1-----------------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~11111111111~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------01---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0-1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------01--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0--1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------001-------------------------------------------------------------- ~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------110-------------------------------------------------------------- ~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0----1------------------------------------------------------------- ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------1------------------------------------------------------------ ~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-------------------1---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------------------------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--1------------0010--1----------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1--------1--------------------------------------------------------- ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0--------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------11--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------1-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------1------------------------------------------------------- 1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-----------------------0------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------1------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1--------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1-------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1----------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1---------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1--------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1-------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0000-------0----01------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0---------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------111-------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------110-------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------10-0------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------1100-------10---10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------0----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +-1-----------------11-----------------------111------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~1 +-1-----------------10-----------------------011------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1 +-1-----------------01-----------------------101------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~1 +-1-----------------00-----------------------001------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-0-----------------11-----------------------110------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~ +-0-----------------10-----------------------010------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-0-----------------01-----------------------100------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-----------------------------------------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------0--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1-------------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------1------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1----------------------------01-----------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +-----------1-----------------------------0-----------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-------------------------------------------------1---0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1-0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +----------------------------------------1-------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-----------------------------------------0------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-----------------------------------------------------01----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-----------1----------------------------1--------------1---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +-----------1----------------------------01-------------1---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------0-------------1---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +-----------1----------------------------10--------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +-----------1----------------------------1----------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +----------------------------------------01---------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-----------1-----------------------------0---------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +----------------------------------------------------------00------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------1----------------------------- ~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------0-------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +-----------------------------------------1------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--------------------------------------------------------0---1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +-------------------------------------------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------1--------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-----------------------------------------0-------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-----------------------------------------------------0-------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-----------1----------------------------0---------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +-----------1-----------------------------1--------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +-----------1----------------------------10--------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +-----------0---------------------------------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +------------------------0001-------00---10---------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------1------------0001-------00---10---------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +------------------------------------1-0-10---------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------1------------------------1-0-10---------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------1----------------------------01-------------1-------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------1----------------------------1-----------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------1----------------------------01----------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +-----------1-----------------------------0----------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------1----------------------------0---------------1-------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +-----------1-----------------------------1--------------1-------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +---0-------------------------------------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +------------------------------0----------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +-----------------------------------------0-----------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +------------------------------------------------------------------1----------------------- ~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------1---------1----------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------1--------1----------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------1----------------------------------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +--------------------------------------------1----------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-------------------0-------------------------1---------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-------------------1-------------------------0---------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-0--------------------------------------------1--------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-1--------------------------------------------0--------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-------------------1------------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------0-----------------------1-----------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------1-----------------------0-----------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +---------------------------------------------1----------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-0--------------------------------------------1---------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-1--------------------------------------------0---------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-----------0---------------------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +--------------------------------1------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------01---------------1-----------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +---------------------------------------------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +---1-------1--------------------0----0--1-------1--------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +---1-------1--------------------0----0---0------1--------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +---1-------1--------------------0----0----------1----0---------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +---1-------1--------------------0----0----------1--------0-----------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-1--------------------------------------------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +--------------------0-----------------------1-------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +--------------------1-----------------------0-------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-------------------0-------------------------1------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-------------------1-------------------------0------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +----------------------------------------------1-----------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-----------------------------------------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------1----------------- ~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1------------------------------------------------1----------------- ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------1-------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +----------------------------------------0-------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +-----------------------------------------1------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +-----------------------------------------0------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-----------------------------------------------------0------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +--------------------------------------------------------0---------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--1--1--1------0010--1--------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------------1---------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------1---------------- 1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----1----------------------------------10-------------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------0----------------0-----------------1--------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +-----------1-----------0-----------------1----------------1--------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +-----------1-----------0----------------10----------------1--------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +-----------1-----------0----------------10----------------0--------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +-----------1-----------0-----------------------------------1-------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +-----------1-----------0----------------------------------11-------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +--------------------------------------------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +---0-------------------0-------------------------------------------------01--------------- ~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1--------------------------------------------------0--------------- ~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------11--------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0---------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0----------------------------------------------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------------------11------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0---------------------------------------------------00------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +1-----------111---------------0------------------------------------------------00000000--- ~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------1---------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------1-----------------------10--------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +----------------------------------------10---------------------1------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------1----------------------------10---------------------1------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +----------------------------------------01-----------1-----------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-----------1----------------------------01-----------1-----------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------------------ ~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~00000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +0----------------------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--0--------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +0--0-------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----0------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0----------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------0---------------------------------------------------------------------------------- ~~~~~~~~~~~~0000000000000000000000000000000000000000000000000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------0--------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-0---------1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----0-----1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------0-1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------01------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~0~00000~~0~0~~~~~~ +------------0----------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------0----------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------0---------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0---------0---------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------0--------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------1-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------1------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------0------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------1----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------0--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------0-------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~00000000000~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~ +-----------1-----------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~000~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0000~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------0------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------1----------10------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------00------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------00---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------01--------------------------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0-0--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------00--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1-1-------------------------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------0-1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0--0-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------00-------------------------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0----0------------------------------------------------------------- ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0-----0------------------------------------------------------------ ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1----------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------0----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-------------------0---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-----------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------0---------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------1----------0------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------11----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------0---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------0----------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0---------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------1--------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------0--------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0-------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------0-----------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0----------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------0---------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0--------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0-------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---10------1------------------1----------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-----------1----------------------------11------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +----------------------------------------01------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~0~~~~~~ +-----------------------------------------0------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0----------------0------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~0~~~~~~~~ +------------------------1---------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------11--------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------10--------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------111-------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1-0-------------10------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------0----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +-1---------1-------10-----------------------011------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-1---------1-------01-----------------------101------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-1---------1-------00-----------------------001------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~ +-0---------1-------11-----------------------110------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-0---------1-------10-----------------------010------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~0 +-0---------1-------01-----------------------100------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0 +-0---------1-------00-----------------------000------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~0 +-----------------------------------------------0------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------01--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------1---------0--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------0--------0--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------10-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------01-----------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1----------------------------01-----------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +---0-------------------------------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +--------------------------------1--------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-------------------------------------1---------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +------------------------------------------------0----0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1-------------------------------------0---0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------------------0-0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +----------------------------------------0--------------0---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +-----------------------------------------1-------------0---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +--------------------------------------------------0--0-0---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------10--------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +----------------------------------------0----------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +-----------------------------------------1---------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +--------------------------------------------------------00-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +----------------------------------------0-----------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +-----------------------------------------1----------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----------------------------------------0------------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +-----------------------------------------1-----------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +----------------------------------------10----------------10------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----------------------------------------------------------00------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +----------------------------------------1---------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +-----------------------------------------0--------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +-----------------------------------------------------0--------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +-------------------------------------------------------0------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +-----------1----------------------------0----------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------0---------------------------------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------------------------------------0---------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-------------------------------------------------------0-------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +----------------------------------------1-----------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +-----------------------------------------0----------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +----------------------------------------0-----------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-----------------------------------------1----------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +--------------------------------------------------------0-------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +---------------------------------------------------------------00------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +----0------1-----------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +------------------------------------------------------------------0----------------------- ~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------0----------------------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-----------1--------------------------------0----------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-----------1-------0-------------------------1---------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-----------1-------1-------------------------0---------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-0---------1----------------------------------1--------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-1---------1----------------------------------0--------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-----------1-------0------------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------1--------0-----------------------1-----------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------1--------1-----------------------0-----------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------1---------------------------------0----------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-0---------1----------------------------------1---------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-1---------1----------------------------------0---------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------1----------------------------1----------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------1-----------------------------0---------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------------------------------------------------0---------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1----------------------------1-------------0--------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +-----------1-----------------------------0------------0--------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +-----------1---------------------------------------------0-----------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------1-----------------------------------------00--0-----------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +---0-----------------------------------------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------0---------------------------------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +--------------------------------1------------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-------------------------------------1-------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +------------------------------------------------0--------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +----------------------------------------01---------------1-----------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-0---------1----------------------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1--------0-----------------------1-------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1--------1-----------------------0-------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1-------0-------------------------1------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1-------1-------------------------0------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1----------------------------------0-----------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------------------------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------1-------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------0------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------0-0----------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--1--1--0------0010--1--------------------------------------------------0----------------- ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------------0---------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1--------0---------------------------------------0----------------- ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------0-----------0----------------- ~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------------------------0-----------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-------------------------------------------------------------0----------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------------------------0----------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +--01-------1-----------1-------0--------------------1----------------0--0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1---1-------1-------0--------------------1----------------0--0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1----1------1-------0--------------------1----------------0--0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1-----0-----1-------0--------------------1----------------0--0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1------1----1-------0--------------------1----------------0--0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1---------0-1-------0--------------------1----------------0--0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~ +-----------1-----------0-------------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------0---------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------0--------------------------------------0---------------- 0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------0-----0------------------01-------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------0----0------------------01-------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------0---0--------------01-------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------0-----0------------------10-------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------0----0------------------10-------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------0---0--------------10-------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------0------------------01------1------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------0------------------10------1------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1----------------------------------------------------------------------1--------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1--------------------------------------------------1--------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------11--------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------0-----0-------------------1-------------01--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------0----0-------------------1-------------01--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------0---0---------------1-------------01--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------0-------------------1------1------01--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0--------------------------------------------------0--------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------0--------------------------------------------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------------------------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------------------------------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------------------------------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------------------------------------------00------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------------------1-----------------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------------------1------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------------1---------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0---------------------------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------------------1--------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------------------------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------------------------1-------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------------------------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------------1------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0------------------------------------------------------------------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------------1------ ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-------------------------------------------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------------1----- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------------------1---- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0---------------------------------------------------------------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------------------------1--- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------------------------------------------------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------------------1---------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------------------1---------------------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +-----------1------------1-----------0----0----------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1-------------1----------0----0----------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1--------------1---------0----0----------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1---------------0--------0----0----------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1-----------------------10----0----------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1------------------------1-1--0----------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +------------------------1-----------0---------------------------0-----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-------------------------1----------0---------------------------0-----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +--------------------------1---------0---------------------------0-----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +---------------------------0--------0---------------------------0-----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-----------------------------------10---------------------------0-----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +------------------------------------1-1-------------------------0-----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +--------------------------------------------------0----0---------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------01-----------1---0-----------1-------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +-------------------------------------------------------0----------------1----------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ .end diff --git a/Logic/68030_tk.tt4 b/Logic/68030_tk.tt4 index 33a84d8..def45c3 100644 --- a/Logic/68030_tk.tt4 +++ b/Logic/68030_tk.tt4 @@ -1,265 +1,229 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Thu Dec 29 16:01:56 2016 +#$ DATE Sat Dec 30 00:43:37 2017 #$ MODULE BUS68030 -#$ PINS 61 AHIGH_31_ IPL_1_ IPL_0_ A_DECODE_23_ FC_0_ A_1_ IPL_2_ FC_1_ AS_030 - AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 - CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 DTACK AVEC E AHIGH_30_ VPA - AHIGH_29_ AHIGH_28_ RST AHIGH_27_ RESET AHIGH_26_ AHIGH_25_ AMIGA_ADDR_ENABLE - AHIGH_24_ AMIGA_BUS_DATA_DIR A_DECODE_22_ AMIGA_BUS_ENABLE_LOW A_DECODE_21_ - AMIGA_BUS_ENABLE_HIGH A_DECODE_20_ CIIN A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ - A_DECODE_16_ A_0_ SIZE_1_ IPL_030_1_ IPL_030_0_ IPL_030_2_ RW_000 BG_000 - BGACK_030 SIZE_0_ VMA RW -#$ NODES 47 cpu_est_1_ cpu_est_2_ cpu_est_3_ cpu_est_0_ +#$ PINS 59 AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AHIGH_31_ A_DECODE_22_ + A_DECODE_21_ A_DECODE_23_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ + A_DECODE_16_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR + BG_030 BGACK_000 CLK_000 IPL_1_ CLK_OSZI IPL_0_ CLK_DIV_OUT FC_0_ CLK_EXP A_1_ + FPU_CS FPU_SENSE DSACK1 DTACK AVEC E VPA RST AMIGA_ADDR_ENABLE + AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN AHIGH_30_ + AHIGH_29_ AHIGH_28_ SIZE_1_ IPL_030_2_ RW_000 BG_000 BGACK_030 A_0_ IPL_030_1_ + IPL_030_0_ VMA RW SIZE_0_ +#$ NODES 42 cpu_est_0_ cpu_est_1_ cpu_est_2_ cpu_est_3_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 - inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA - inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_RESET_OUT CLK_030_PE_1_ inst_AMIGA_DS - CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ - IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_LDS_000_INT - inst_DS_000_ENABLE inst_UDS_000_INT SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ - SM_AMIGA_0_ CYCLE_DMA_0_ CYCLE_DMA_1_ CLK_030_PE_0_ RST_DLY_0_ RST_DLY_1_ - RST_DLY_2_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ - SM_AMIGA_i_7_ CLK_OUT_INTreg CIIN_0 + inst_AS_030_D1 inst_AS_030_000_SYNC inst_AS_000_DMA inst_DS_000_DMA inst_VPA_D + CLK_000_D_3_ inst_DTACK_D0 inst_AMIGA_DS CLK_000_D_1_ CLK_000_D_0_ + inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ + CLK_000_D_2_ CLK_000_D_4_ inst_UDS_000_INT inst_DS_000_ENABLE inst_LDS_000_INT + inst_BGACK_030_INT_D SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ + CYCLE_DMA_0_ CYCLE_DMA_1_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ + SM_AMIGA_3_ SM_AMIGA_2_ CLK_OUT_INTreg SM_AMIGA_i_7_ N_60 .type f -.i 101 -.o 166 -.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 - CLK_OSZI FPU_SENSE VPA RST RESET A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ - A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ - BGACK_030.Q VMA.Q cpu_est_1_.Q cpu_est_2_.Q cpu_est_3_.Q cpu_est_0_.Q +.i 90 +.o 154 +.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_000 CLK_OSZI + FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ + A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q + cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q cpu_est_3_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q - inst_AS_030_D0.Q inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_AS_000_DMA.Q - inst_DS_000_DMA.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q - CLK_030_PE_1_.Q inst_AMIGA_DS.Q CLK_000_D_1_.Q CLK_000_D_0_.Q - inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q - CLK_000_D_2_.Q CLK_000_D_4_.Q inst_LDS_000_INT.Q inst_DS_000_ENABLE.Q - inst_UDS_000_INT.Q SM_AMIGA_6_.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q - SIZE_0_.Q SIZE_1_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q CLK_030_PE_0_.Q RW_000.Q RW.Q - RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q inst_DSACK1_INT.Q - inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q - BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q AS_030.PIN - AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN - AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN - AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN DTACK.PIN RW.PIN - CIIN_0 -.ob AHIGH_31_ AHIGH_31_.OE AS_030% AS_030.OE AS_000% AS_000.OE DS_030% DS_030.OE - UDS_000% UDS_000.OE LDS_000% LDS_000.OE BERR BERR.OE CLK_DIV_OUT CLK_EXP FPU_CS% - DSACK1% DSACK1.OE DTACK DTACK.OE AVEC E AHIGH_30_ AHIGH_30_.OE AHIGH_29_ - AHIGH_29_.OE AHIGH_28_ AHIGH_28_.OE AHIGH_27_ AHIGH_27_.OE AHIGH_26_ - AHIGH_26_.OE AHIGH_25_ AHIGH_25_.OE AMIGA_ADDR_ENABLE AHIGH_24_ AHIGH_24_.OE + inst_AS_030_D0.Q inst_AS_030_D1.Q inst_AS_030_000_SYNC.Q inst_AS_000_DMA.Q + inst_DS_000_DMA.Q VMA.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q + inst_AMIGA_DS.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q + inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q + CLK_000_D_4_.Q inst_UDS_000_INT.Q inst_DS_000_ENABLE.Q inst_LDS_000_INT.Q + inst_BGACK_030_INT_D.Q SM_AMIGA_6_.Q RW_000.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q + SM_AMIGA_0_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q + SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q + IPL_030_1_.Q SM_AMIGA_i_7_.Q IPL_030_2_.Q N_60 AS_030.PIN AS_000.PIN RW_000.PIN + UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN + AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN + AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN +.ob AHIGH_27_ AHIGH_27_.OE AHIGH_26_ AHIGH_26_.OE AHIGH_25_ AHIGH_25_.OE + AHIGH_24_ AHIGH_24_.OE AHIGH_31_ AHIGH_31_.OE AS_030% AS_030.OE AS_000% + AS_000.OE DS_030% DS_030.OE UDS_000% UDS_000.OE LDS_000% LDS_000.OE BERR BERR.OE + CLK_DIV_OUT CLK_EXP FPU_CS% DSACK1% DSACK1.OE AVEC E AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW% AMIGA_BUS_ENABLE_HIGH% CIIN CIIN.OE - A_0_.D A_0_.C A_0_.OE SIZE_1_.D SIZE_1_.C SIZE_1_.OE IPL_030_1_.D% IPL_030_1_.C - IPL_030_0_.D% IPL_030_0_.C IPL_030_2_.D% IPL_030_2_.C RW_000.D% RW_000.C - RW_000.OE BG_000.D% BG_000.C BGACK_030.D BGACK_030.C SIZE_0_.D% SIZE_0_.C - SIZE_0_.OE VMA.T VMA.C RW.D% RW.C RW.OE cpu_est_1_.D cpu_est_1_.C - cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C - cpu_est_0_.D cpu_est_0_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D% - inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D% - inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_AS_030_D0.D% inst_AS_030_D0.C - inst_AS_030_000_SYNC.D% inst_AS_030_000_SYNC.C inst_BGACK_030_INT_D.D% - inst_BGACK_030_INT_D.C inst_AS_000_DMA.D inst_AS_000_DMA.C inst_DS_000_DMA.D - inst_DS_000_DMA.C inst_VPA_D.D% inst_VPA_D.C CLK_000_D_3_.D CLK_000_D_3_.C - inst_DTACK_D0.D% inst_DTACK_D0.C inst_RESET_OUT.D inst_RESET_OUT.C - CLK_030_PE_1_.D CLK_030_PE_1_.C inst_AMIGA_DS.D inst_AMIGA_DS.C CLK_000_D_1_.D - CLK_000_D_1_.C CLK_000_D_0_.D CLK_000_D_0_.C inst_CLK_OUT_PRE_50.D - inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C IPL_D0_0_.D% - IPL_D0_0_.C IPL_D0_1_.D% IPL_D0_1_.C IPL_D0_2_.D% IPL_D0_2_.C CLK_000_D_2_.D - CLK_000_D_2_.C CLK_000_D_4_.D CLK_000_D_4_.C inst_LDS_000_INT.D - inst_LDS_000_INT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C inst_UDS_000_INT.D% - inst_UDS_000_INT.C SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_4_.D SM_AMIGA_4_.C - SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C CYCLE_DMA_0_.D - CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C CLK_030_PE_0_.D% CLK_030_PE_0_.C - RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.D.X1 RST_DLY_1_.D.X2 RST_DLY_1_.C - RST_DLY_2_.D RST_DLY_2_.C inst_DSACK1_INT.D% inst_DSACK1_INT.C inst_AS_000_INT.D% - inst_AS_000_INT.C SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_3_.T SM_AMIGA_3_.C - SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_i_7_.T.X1 SM_AMIGA_i_7_.T.X2 - SM_AMIGA_i_7_.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C CIIN_0 -.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 -.p 187 ------------------------------------------------------------------------------------------------------ 0000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------1-----------0---------------------------------------------------------------------------- 0100000000000000000000001010101010100100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------0----------------------------------------------0------------------ 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0---------------1------------------------------------------------------------ 0001000100000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------------------------------------------0---------0------------------- 0000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1---------------1------------------------------------------------------------ 0000010001010000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------0---------------------------------------------0------------------ 0000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------------------------10---------------------------------------------- 0000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------01----------------------------------------------- 0000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---1--1---1------0010--1----------------------------------------------------------0------------------- 0000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------------------------------------------------1----------------------- 0000000000000011000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---1--1---0------0010--1----------------------------------------------------------0------------------- 0000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------------------------0----------0------------------- 0000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1------------------------------------------------------------------------------------------------- 0000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 ------------------------------------0----------------------------------------------------------------- 0000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------001------------------------------------------------------------------------ 0000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------110------------------------------------------------------------------------ 0000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0---------------------------------------------------------01----------------- 0000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1----------------------------------------------------------0----------------- 0000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0------0--------------------------------------------------------------------- 0000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0-----0---------------------------------------------------------------------- 0000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1--------0-----------------------------------------------0------------------- 0000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -1------------111----------------0-------------------------------------------------------00000000----- 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 -----------------------------------------------------------------------------------------------------1 0000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------0----------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000100100000000000001000000000000000000000000000010100000000000100000000000000000001000000000000000001000000000000000000000000 -------------------------1---------1----------------------------------1------------------------------- 0000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0-----------------------------------------------------------1---------------- 0000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------1-------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000010010010101010010101001010010010101010101010101010101010101010101010101010101010101010101010101010101001010101010101001010 -------------------------1---------1-------------------------1---------------------------------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0-----------------------------------------------------------00--------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000001000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1---------1--------01-------------------------101--------------------------------------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1---------1--------00-------------------------001--------------------------------------------------- 0000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0---------1--------01-------------------------100--------------------------------------------------- 0000000000000000000000000000000000000000000000000100010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0---------1--------00-------------------------000--------------------------------------------------- 0000000000000000000000000000000000000000000000000101010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1--------0----------------------------------------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1---------0-------------------------1-------------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1---------1-------------------------0-------------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------------------------------0------------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0---------1-------------------------------------1-----------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1---------1-------------------------------------0-----------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1---------1--------10-------------------------011--------------------------------------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0---------1--------10-------------------------010--------------------------------------------------- 0000000000000000000000000000000000000000000000000001010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1---------0--------------------------------------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1-----------------------------------0------------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1--------0---------------------------1-----------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1--------1---------------------------0-----------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0---------1-------------------------------------1----------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1---------1-------------------------------------0----------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0---------1--------11-------------------------110--------------------------------------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0---------1--------------------------------------------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1---------0-------------------------1--------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1---------1-------------------------0--------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1--------0---------------------------1-------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1--------1---------------------------0-------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1-------------------------------------0------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1-------------------------------1--------------------0----------1------------------------- 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1--------------------------------0-------------------0----------1------------------------- 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1-------------------------------------------0--0-----0----------1------------------------- 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1-------------------------------01----------1--0----------------1-----------------------0- 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----10------1--------------------1-----------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0------1----------------------------------------------------------------0------------------------ 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------1------------------1---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------1-------------------------------------10-------------------------------------1------------------ 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------1---------0------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------1----------------------------------0----------------------------------------- 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------0-----------------------------------------------------------00--------------- 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------0-------------0--------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------00000-------------01-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1-------------11001-------0-----10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------1---------1------------------------------0----------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------0----------------------------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0---------------1------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1--0----------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1----------------0--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1-----------------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------0-01-------------10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------1------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1--1-------------10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------010----------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------1--------------0--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------1---------------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------11-1-------------10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------1-------------0--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------1--------------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------0-------------10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1-----------00---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------1-----0---1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1-----------10---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------1------0--1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1---------------------------------------------------------------------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1---------------------0-----------------------------------------------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 ---01-------1------------1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1-------1----1-------1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1-------1-----1------1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1-------1------0-----1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1-------1-------1----1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1-------1----------0-1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------0---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------------1---------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000001000000000000000000000000 --------------------------------------------------------------00-------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000001000000000000000000000000 ------------------------------------1----------1------------------------------0----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------------------------------------1------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000001000000000000000000000000 --------------------------------------------------------------11--------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000001000000000000000000000000 -------------------------------------1---------1------------------------------0-----1----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 -------0-----------------------------1----------------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------1----1-----------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------1--------------------------0-------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 -----------01----------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------------1-------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000 ------------1--------------------------------------------------------------------------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000 ------------1----------------------------1------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 ------------1-------------------------------10---------------------111-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 ------------1-----------------------------10------------------01-------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 ------------1-----------------------------10------------------10-------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 ------------1-----------------------0------0---1--------------011-------------0----0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 ------------1-----------------------0------0---1--------------101-------------0----0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 ------------1-----------------------------10-------------------1-------------------01----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 ------------1-----------------------0------0---1---------------11-------------0----01----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 -------------------------------------------------------------------------------------11--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000 --------1--------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000 ----------------------------------------------0------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000 ----------------------------------------------1------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000 ------------1---------0------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000 ------------1--------0-------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000 --0---------1----------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000 --------------------------------------------1--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000 ---------------------------------------1-------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000 -----------------------------------------------------1--0--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000 --------------------------------------------------------1------------------------------10--------0---- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000 ------------1-------------------------------01-----------1-------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 ------------1-----------------------------------------1---------------------------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 ------------1-------------------------------01----------1-------------------------------------------1- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 ------------1------------------------------------------00--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000 ------------1-------------------------------------------1----------------------------------------0---- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000 ------------1-------------------------------1-----------1--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 ------------1--------------------------------0----------1--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 ----1-------1---------------------0----0------------1---0-------------------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 ------------1-------------------------------1------------1-------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 ------------1--------------------------------0-----------1-------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 ------------1-------------------------------10---------------------------1---------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 ------------1-------------------------------01-----------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000 ------------1-------------------------------0-------------1----------------0-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000 ------------1--------------------------------1------------1----------------0-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000 ------------1-------------------------------10------------1------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000001000000000000000 ------------1-------------------------------1--------------1------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 ------------1--------------------------------0-------------1------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 ------------1------------0------------------0-----------------1--------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 ------------1------------0-------------------1----------------1--------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 ------------1------------0------------------10----------------0--------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 ------------1------------0------------------------------------11-------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 ------------1------------0------------------10----------------1--------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000 ------------1------------0-------------------------------------1-------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000 ------------------------------------1---------------------------0------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 -----------------------------------------------0----------------0------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 ----------------------------------------------------------------0-------------1----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 ------------------------------------0-----0----1----------------1-------------0----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 ------------1-------------------------------0----------------------1---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 ------------1--------------------------------1---------------------1---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 ------------1-------------------------------10---------------------0---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 ------------1------------------------------------------------------111-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 ------------1-------------------------------10---------------------1-0-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 ------------1-------------------------------10---------------------10--------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 ------------1-------------------------------------------------------1--------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 ------------1-------------------------------10---------------------11--------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 ------------1--------------------------------------------------------1-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 ------------1----------------------------------------------------------0----------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 ------------1-------------------------------01----------1--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000 ------------1-----------------------------------------------------------0---------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000 ------------1-------------------------------0----------------------------1---------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 ------------1--------------------------------1---------------------------1---------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 ------------0-------------------------------------------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 --------------------------00010-------0-----10----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 --------------------------------------1-0---10----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 ------------1-------------------------------01-----------1----------------0--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 --------------------------------------------10----------------------------1-----------------------0--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 ------------1-------------00010-------0-----10----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 ------------1-------------------------1-0---10----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 ------------1-------------------------------1------------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 ------------1--------------------------------0-----------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 ------------1-------------------------------10----------------------------1-----------------------0--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 ------------0---------------------------------------------------------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 ------------1-------------------------------01-------------1----------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 ----1-------1---------------------0----0------------1-----------------------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 ----1-------1---------------------0----0----01------1------1----------------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000 -----------------------------------------------1------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 + AHIGH_30_ AHIGH_30_.OE AHIGH_29_ AHIGH_29_.OE AHIGH_28_ AHIGH_28_.OE SIZE_1_.D + SIZE_1_.C SIZE_1_.OE IPL_030_2_.D% IPL_030_2_.C RW_000.D% RW_000.C RW_000.OE + BG_000.D% BG_000.C BGACK_030.D BGACK_030.C A_0_.D A_0_.C A_0_.OE IPL_030_1_.D% + IPL_030_1_.C IPL_030_0_.D% IPL_030_0_.C VMA.T VMA.C VMA.OE RW.D% RW.C RW.OE + SIZE_0_.D% SIZE_0_.C SIZE_0_.OE cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D + cpu_est_1_.C cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C cpu_est_3_.D + cpu_est_3_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D% inst_AMIGA_BUS_ENABLE_DMA_HIGH.C + inst_AMIGA_BUS_ENABLE_DMA_LOW.D% inst_AMIGA_BUS_ENABLE_DMA_LOW.C + inst_AS_030_D0.D% inst_AS_030_D0.C inst_AS_030_D1.D inst_AS_030_D1.C + inst_AS_030_000_SYNC.D% inst_AS_030_000_SYNC.C inst_AS_000_DMA.D + inst_AS_000_DMA.C inst_DS_000_DMA.D inst_DS_000_DMA.C inst_VPA_D.D% inst_VPA_D.C + CLK_000_D_3_.D CLK_000_D_3_.C inst_DTACK_D0.D% inst_DTACK_D0.C inst_AMIGA_DS.D + inst_AMIGA_DS.C CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_0_.D CLK_000_D_0_.C + inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D + inst_CLK_OUT_PRE_D.C IPL_D0_0_.D% IPL_D0_0_.C IPL_D0_1_.D% IPL_D0_1_.C + IPL_D0_2_.D% IPL_D0_2_.C CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_4_.D + CLK_000_D_4_.C inst_UDS_000_INT.D% inst_UDS_000_INT.C inst_DS_000_ENABLE.D + inst_DS_000_ENABLE.C inst_LDS_000_INT.D inst_LDS_000_INT.C + inst_BGACK_030_INT_D.D% inst_BGACK_030_INT_D.C SM_AMIGA_6_.D SM_AMIGA_6_.C + SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D + SM_AMIGA_0_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C + inst_DSACK1_INT.D% inst_DSACK1_INT.C inst_AS_000_INT.D% inst_AS_000_INT.C + SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_3_.T SM_AMIGA_3_.C SM_AMIGA_2_.D + SM_AMIGA_2_.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C SM_AMIGA_i_7_.T.X1 + SM_AMIGA_i_7_.T.X2 SM_AMIGA_i_7_.C N_60 +.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 +.p 156 +------------------------------------------------------------------------------------------ 0000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------0------------------------------------------------------------------ 0101010101010001000000000000000000001010100100000000000100000000010010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------------0---------------------------------------0---------------- 0000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------------------------------0----------0----------------- 0000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------1------------------------------------------------------------------ 0000000000000100010100000000000000000000000000001000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------------0--------------------------------------0---------------- 0000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------------------01--------------------------------------- 0000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------------------------------10-------------------------------------- 0000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--1--1--1------0010--1--------------------------------------------------0----------------- 0000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------------------------------------1----------------------- 0000000000000000000000110000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--1--1--0------0010--1--------------------------------------------------0----------------- 0000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------------------------------0-----------0----------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1-------------------1------------------------------------------------------------------ 0000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------001-------------------------------------------------------------- 0000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------110-------------------------------------------------------------- 0000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---0-------------------0-------------------------------------------------01--------------- 0000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------1--------------------------------------------------0--------------- 0000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------0-----0------------------------------------------------------------ 0000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------0----0------------------------------------------------------------- 0000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------1--------0---------------------------------------0----------------- 0000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +1-----------111---------------0------------------------------------------------00000000--- 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 +-----------------------------------------------------------------------1------------------ 0000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------0------------------------------------------------------------------------------ 0000000000000000000000000000000000000000010000000001010000000000000000000000000000000000101000000010000000000000000000000010000000000000000000000000000000 +-----------------------0---------------------------------------------------00------------- 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------1---------------------------------------------------------------------------------- 0000000000000000000000000000000000000000001001010010101001010100100100101001010101010101010101010101010101010101010101010101010101010101010101010101010010 +-0---------1-------11-----------------------110------------------------------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1-------10-----------------------010------------------------------------------- 0000000000000000000000000000000000000000000010000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1-------01-----------------------100------------------------------------------- 0000000000000000000000000000000000000000000010000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1-------00-----------------------000------------------------------------------- 0000000000000000000000000000000000000000000010000000000010100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1----------------------------------------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------0-----------------------1-------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------1-----------------------0-------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------0-------------------------1------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------1-------------------------0------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1----------------------------------0-----------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1----------------------------1-------------0--------------1-------------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------------0------------0--------------1-------------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------------------------00--0-----------1-------------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1----------------------------01-----------1---0-----------1-------------------0 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---10------1------------------1----------1------------------------------------------------ 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0------1-----------------------------------------------------0------------------------ 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----1-----------------1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----1----------------------------------10-------------------------------1---------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------0---------------------------------------------------1-------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1-------01-----------------------101------------------------------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1-------00-----------------------001------------------------------------------- 0000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------0------------------------------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------0-----------------------1-----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------1-----------------------0-----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------------------------------0----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1----------------------------------1---------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1----------------------------------0---------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1-------10-----------------------011------------------------------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------0----------------------------------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------------------------------0----------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------0-------------------------1---------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------1-------------------------0---------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1----------------------------------1--------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1----------------------------------0--------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------0-----------------------0------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0000-------0----01------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------1100-------10---10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------0--------------------------------------------------0--------------- 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------------------------------------------------------------00------------- 0000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1---------------0------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1----------------1------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0---------------10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------01---------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------1--------------0------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------1---------------1------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------10-0------------10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------11--------------10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------1--------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0--1-------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------1------------0------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------1-------------1------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------111-------------10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1----------00------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1----------10------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------------------------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------------1----------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000 +-----------0-------------------1---------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------------------0---------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 +--01-------1-----------1-------0--------------------1----------------0--0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 +---1-------1---1-------1-------0--------------------1----------------0--0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 +---1-------1----1------1-------0--------------------1----------------0--0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 +---1-------1-----0-----1-------0--------------------1----------------0--0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 +---1-------1------1----1-------0--------------------1----------------0--0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 +---1-------1---------0-1-------0--------------------1----------------0--0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 +---------------------------------------1-------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------------------------00------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000 +---------------------------------1---------1----------------------0----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------------------------------------------1---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------------------------11--------------0--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000 +----------------------------------1--------1----------------------0----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000 +----------01------------------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000 +-----------------------------------------------1------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000 +---------0-1------------------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 +---------------------------------------------------------------------------11------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000 +-----------------------------------------1------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000 +------1----------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000 +------------------------------------------0----------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000 +------------------------------------------1----------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000 +-----------1--------0--------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000 +-----------1-------0---------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000 +-0---------1------------------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000 +----------------------------------------1------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000 +-------------------------------------1---------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000 +-----------1-------------------------------------0---0------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000 +-----------1-----------------------------------------1---------------------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000 +-----------1----------------------------01-------------1---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000 +-----------1--------------------------------------1---------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000 +-----------1----------------------------01-----------1-----------------------------------1 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000 +---------------------------------------------------1-0------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 +-----------------------------------------------------1-----------------------10--------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 +-----------1-----------0------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000 +-----------1----------------------------1------------1------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 +-----------1-----------------------------0-----------1------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 +---1-------1--------------------0----0----------1----0---------------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 +-----------1----------------------------1--------------1---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +-----------1-----------------------------0-------------1---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +-----------1----------------------------10--------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +-----------1----------------------------01----------------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 +-----------1----------------------------0---------------1-------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 +-----------1-----------------------------1--------------1-------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 +-----------1----------------------------10--------------1--------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000001000000000000000 +-----------1----------------------------1----------------1-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 +-----------1-----------------------------0---------------1-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 +-----------1-----------0----------------0-----------------1--------------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 +-----------1-----------0-----------------1----------------1--------------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 +-----------1-----------0----------------10----------------0--------------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 +-----------1-----------0----------------------------------11-------------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 +-----------1-----------0----------------10----------------1--------------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 +-----------1-----------0-----------------------------------1-------------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 +-----------1------------------------------------------------0-----------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 +-----------1----------------------------01-----------1------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000 +-----------1-------------------------------------------------0----------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000 +-----------1----------------------------0---------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 +-----------1-----------------------------1--------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 +-----------0---------------------------------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +------------------------0001-------00---10---------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +------------------------------------1-0-10---------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +-----------1----------------------------01-------------1-------0-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +----------------------------------------10---------------------1------------------------0- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +-----------1------------0001-------00---10---------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------1------------------------1-0-10---------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------1----------------------------1-----------------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------1-----------------------------0----------------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------1----------------------------10---------------------1------------------------0- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-------------------------------------------1---------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +-----------0---------------------------------------------------------1-------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +-----------1----------------------------01---------------1-----------1-------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +---1-------1--------------------0----0----------1--------------------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +---1-------1--------------------0----0--01------1--------1-----------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 +---1-------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 .end diff --git a/Logic/68030_tk.tte b/Logic/68030_tk.tte index 0cfc5a1..5e7852b 100644 --- a/Logic/68030_tk.tte +++ b/Logic/68030_tk.tte @@ -1,265 +1,229 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Thu Dec 29 16:01:56 2016 +#$ DATE Sat Dec 30 00:43:37 2017 #$ MODULE BUS68030 -#$ PINS 61 AHIGH_31_ IPL_1_ IPL_0_ A_DECODE_23_ FC_0_ A_1_ IPL_2_ FC_1_ AS_030 - AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 - CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 DTACK AVEC E AHIGH_30_ VPA - AHIGH_29_ AHIGH_28_ RST AHIGH_27_ RESET AHIGH_26_ AHIGH_25_ AMIGA_ADDR_ENABLE - AHIGH_24_ AMIGA_BUS_DATA_DIR A_DECODE_22_ AMIGA_BUS_ENABLE_LOW A_DECODE_21_ - AMIGA_BUS_ENABLE_HIGH A_DECODE_20_ CIIN A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ - A_DECODE_16_ A_0_ SIZE_1_ IPL_030_1_ IPL_030_0_ IPL_030_2_ RW_000 BG_000 - BGACK_030 SIZE_0_ VMA RW -#$ NODES 47 cpu_est_1_ cpu_est_2_ cpu_est_3_ cpu_est_0_ +#$ PINS 59 AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AHIGH_31_ A_DECODE_22_ + A_DECODE_21_ A_DECODE_23_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ + A_DECODE_16_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR + BG_030 BGACK_000 CLK_000 IPL_1_ CLK_OSZI IPL_0_ CLK_DIV_OUT FC_0_ CLK_EXP A_1_ + FPU_CS FPU_SENSE DSACK1 DTACK AVEC E VPA RST AMIGA_ADDR_ENABLE + AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN AHIGH_30_ + AHIGH_29_ AHIGH_28_ SIZE_1_ IPL_030_2_ RW_000 BG_000 BGACK_030 A_0_ IPL_030_1_ + IPL_030_0_ VMA RW SIZE_0_ +#$ NODES 42 cpu_est_0_ cpu_est_1_ cpu_est_2_ cpu_est_3_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 - inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA - inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_RESET_OUT CLK_030_PE_1_ inst_AMIGA_DS - CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ - IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_LDS_000_INT - inst_DS_000_ENABLE inst_UDS_000_INT SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ - SM_AMIGA_0_ CYCLE_DMA_0_ CYCLE_DMA_1_ CLK_030_PE_0_ RST_DLY_0_ RST_DLY_1_ - RST_DLY_2_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ - SM_AMIGA_i_7_ CLK_OUT_INTreg CIIN_0 + inst_AS_030_D1 inst_AS_030_000_SYNC inst_AS_000_DMA inst_DS_000_DMA inst_VPA_D + CLK_000_D_3_ inst_DTACK_D0 inst_AMIGA_DS CLK_000_D_1_ CLK_000_D_0_ + inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ + CLK_000_D_2_ CLK_000_D_4_ inst_UDS_000_INT inst_DS_000_ENABLE inst_LDS_000_INT + inst_BGACK_030_INT_D SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ + CYCLE_DMA_0_ CYCLE_DMA_1_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ + SM_AMIGA_3_ SM_AMIGA_2_ CLK_OUT_INTreg SM_AMIGA_i_7_ N_60 .type f -.i 101 -.o 166 -.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 - CLK_OSZI FPU_SENSE VPA RST RESET A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ - A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ - BGACK_030.Q VMA.Q cpu_est_1_.Q cpu_est_2_.Q cpu_est_3_.Q cpu_est_0_.Q +.i 90 +.o 154 +.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_000 CLK_OSZI + FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ + A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q + cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q cpu_est_3_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q - inst_AS_030_D0.Q inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_AS_000_DMA.Q - inst_DS_000_DMA.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q - CLK_030_PE_1_.Q inst_AMIGA_DS.Q CLK_000_D_1_.Q CLK_000_D_0_.Q - inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q - CLK_000_D_2_.Q CLK_000_D_4_.Q inst_LDS_000_INT.Q inst_DS_000_ENABLE.Q - inst_UDS_000_INT.Q SM_AMIGA_6_.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q - SIZE_0_.Q SIZE_1_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q CLK_030_PE_0_.Q RW_000.Q RW.Q - RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q inst_DSACK1_INT.Q - inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q - BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q AS_030.PIN - AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN - AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN - AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN DTACK.PIN RW.PIN - CIIN_0 -.ob AHIGH_31_ AHIGH_31_.OE AS_030- AS_030.OE AS_000- AS_000.OE DS_030- DS_030.OE - UDS_000- UDS_000.OE LDS_000- LDS_000.OE BERR BERR.OE CLK_DIV_OUT CLK_EXP FPU_CS- - DSACK1- DSACK1.OE DTACK DTACK.OE AVEC E AHIGH_30_ AHIGH_30_.OE AHIGH_29_ - AHIGH_29_.OE AHIGH_28_ AHIGH_28_.OE AHIGH_27_ AHIGH_27_.OE AHIGH_26_ - AHIGH_26_.OE AHIGH_25_ AHIGH_25_.OE AMIGA_ADDR_ENABLE AHIGH_24_ AHIGH_24_.OE + inst_AS_030_D0.Q inst_AS_030_D1.Q inst_AS_030_000_SYNC.Q inst_AS_000_DMA.Q + inst_DS_000_DMA.Q VMA.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q + inst_AMIGA_DS.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q + inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q + CLK_000_D_4_.Q inst_UDS_000_INT.Q inst_DS_000_ENABLE.Q inst_LDS_000_INT.Q + inst_BGACK_030_INT_D.Q SM_AMIGA_6_.Q RW_000.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q + SM_AMIGA_0_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q + SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q + IPL_030_1_.Q SM_AMIGA_i_7_.Q IPL_030_2_.Q N_60 AS_030.PIN AS_000.PIN RW_000.PIN + UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN + AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN + AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN +.ob AHIGH_27_ AHIGH_27_.OE AHIGH_26_ AHIGH_26_.OE AHIGH_25_ AHIGH_25_.OE + AHIGH_24_ AHIGH_24_.OE AHIGH_31_ AHIGH_31_.OE AS_030- AS_030.OE AS_000- + AS_000.OE DS_030- DS_030.OE UDS_000- UDS_000.OE LDS_000- LDS_000.OE BERR BERR.OE + CLK_DIV_OUT CLK_EXP FPU_CS- DSACK1- DSACK1.OE AVEC E AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW- AMIGA_BUS_ENABLE_HIGH- CIIN CIIN.OE - A_0_.D A_0_.C A_0_.OE SIZE_1_.D SIZE_1_.C SIZE_1_.OE IPL_030_1_.D- IPL_030_1_.C - IPL_030_0_.D- IPL_030_0_.C IPL_030_2_.D- IPL_030_2_.C RW_000.D- RW_000.C - RW_000.OE BG_000.D- BG_000.C BGACK_030.D BGACK_030.C SIZE_0_.D- SIZE_0_.C - SIZE_0_.OE VMA.T VMA.C RW.D- RW.C RW.OE cpu_est_1_.D cpu_est_1_.C - cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C - cpu_est_0_.D cpu_est_0_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- - inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D- - inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_AS_030_D0.D- inst_AS_030_D0.C - inst_AS_030_000_SYNC.D- inst_AS_030_000_SYNC.C inst_BGACK_030_INT_D.D- - inst_BGACK_030_INT_D.C inst_AS_000_DMA.D inst_AS_000_DMA.C inst_DS_000_DMA.D - inst_DS_000_DMA.C inst_VPA_D.D- inst_VPA_D.C CLK_000_D_3_.D CLK_000_D_3_.C - inst_DTACK_D0.D- inst_DTACK_D0.C inst_RESET_OUT.D inst_RESET_OUT.C - CLK_030_PE_1_.D CLK_030_PE_1_.C inst_AMIGA_DS.D inst_AMIGA_DS.C CLK_000_D_1_.D - CLK_000_D_1_.C CLK_000_D_0_.D CLK_000_D_0_.C inst_CLK_OUT_PRE_50.D - inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C IPL_D0_0_.D- - IPL_D0_0_.C IPL_D0_1_.D- IPL_D0_1_.C IPL_D0_2_.D- IPL_D0_2_.C CLK_000_D_2_.D - CLK_000_D_2_.C CLK_000_D_4_.D CLK_000_D_4_.C inst_LDS_000_INT.D - inst_LDS_000_INT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C inst_UDS_000_INT.D- - inst_UDS_000_INT.C SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_4_.D SM_AMIGA_4_.C - SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C CYCLE_DMA_0_.D - CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C CLK_030_PE_0_.D- CLK_030_PE_0_.C - RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.D.X1 RST_DLY_1_.D.X2 RST_DLY_1_.C - RST_DLY_2_.D RST_DLY_2_.C inst_DSACK1_INT.D- inst_DSACK1_INT.C inst_AS_000_INT.D- - inst_AS_000_INT.C SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_3_.T SM_AMIGA_3_.C - SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_i_7_.T.X1 SM_AMIGA_i_7_.T.X2 - SM_AMIGA_i_7_.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C CIIN_0 -.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 -.p 187 ------------------------------------------------------------------------------------------------------ 0000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------1-----------0---------------------------------------------------------------------------- 0100000000000000000000001010101010100100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------0----------------------------------------------0------------------ 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0---------------1------------------------------------------------------------ 0001000100000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------------------------------------------0---------0------------------- 0000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1---------------1------------------------------------------------------------ 0000010001010000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------0---------------------------------------------0------------------ 0000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------------------------10---------------------------------------------- 0000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------01----------------------------------------------- 0000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---1--1---1------0010--1----------------------------------------------------------0------------------- 0000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------------------------------------------------1----------------------- 0000000000000011000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---1--1---0------0010--1----------------------------------------------------------0------------------- 0000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------------------------0----------0------------------- 0000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1------------------------------------------------------------------------------------------------- 0000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 ------------------------------------0----------------------------------------------------------------- 0000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------001------------------------------------------------------------------------ 0000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------110------------------------------------------------------------------------ 0000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0---------------------------------------------------------01----------------- 0000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1----------------------------------------------------------0----------------- 0000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0------0--------------------------------------------------------------------- 0000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0-----0---------------------------------------------------------------------- 0000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1--------0-----------------------------------------------0------------------- 0000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -1------------111----------------0-------------------------------------------------------00000000----- 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 -----------------------------------------------------------------------------------------------------1 0000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------0----------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000100100000000000001000000000000000000000000000010100000000000100000000000000000001000000000000000001000000000000000000000000 -------------------------1---------1----------------------------------1------------------------------- 0000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0-----------------------------------------------------------1---------------- 0000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------1-------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000010010010101010010101001010010010101010101010101010101010101010101010101010101010101010101010101010101001010101010101001010 -------------------------1---------1-------------------------1---------------------------------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0-----------------------------------------------------------00--------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000001000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1---------1--------01-------------------------101--------------------------------------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1---------1--------00-------------------------001--------------------------------------------------- 0000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0---------1--------01-------------------------100--------------------------------------------------- 0000000000000000000000000000000000000000000000000100010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0---------1--------00-------------------------000--------------------------------------------------- 0000000000000000000000000000000000000000000000000101010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1--------0----------------------------------------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1---------0-------------------------1-------------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1---------1-------------------------0-------------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------------------------------0------------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0---------1-------------------------------------1-----------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1---------1-------------------------------------0-----------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1---------1--------10-------------------------011--------------------------------------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0---------1--------10-------------------------010--------------------------------------------------- 0000000000000000000000000000000000000000000000000001010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1---------0--------------------------------------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1-----------------------------------0------------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1--------0---------------------------1-----------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1--------1---------------------------0-----------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0---------1-------------------------------------1----------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1---------1-------------------------------------0----------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0---------1--------11-------------------------110--------------------------------------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0---------1--------------------------------------------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1---------0-------------------------1--------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1---------1-------------------------0--------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1--------0---------------------------1-------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1--------1---------------------------0-------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1-------------------------------------0------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1-------------------------------1--------------------0----------1------------------------- 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1--------------------------------0-------------------0----------1------------------------- 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1-------------------------------------------0--0-----0----------1------------------------- 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1-------------------------------01----------1--0----------------1-----------------------0- 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----10------1--------------------1-----------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0------1----------------------------------------------------------------0------------------------ 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------1------------------1---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------1-------------------------------------10-------------------------------------1------------------ 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------1---------0------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------1----------------------------------0----------------------------------------- 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------0-----------------------------------------------------------00--------------- 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------0-------------0--------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------00000-------------01-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1-------------11001-------0-----10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------1---------1------------------------------0----------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------0----------------------------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0---------------1------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1--0----------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1----------------0--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1-----------------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------0-01-------------10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------1------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1--1-------------10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------010----------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------1--------------0--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------1---------------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------11-1-------------10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------1-------------0--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------1--------------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------0-------------10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1-----------00---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------1-----0---1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1-----------10---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------1------0--1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1---------------------------------------------------------------------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1---------------------0-----------------------------------------------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 ---01-------1------------1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1-------1----1-------1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1-------1-----1------1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1-------1------0-----1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1-------1-------1----1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1-------1----------0-1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1------------0---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------------1---------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000001000000000000000000000000 --------------------------------------------------------------00-------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000001000000000000000000000000 ------------------------------------1----------1------------------------------0----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------------------------------------1------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000001000000000000000000000000 --------------------------------------------------------------11--------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000001000000000000000000000000 -------------------------------------1---------1------------------------------0-----1----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 -------0-----------------------------1----------------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------1----1-----------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------1--------------------------0-------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 -----------01----------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------------1-------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000 ------------1--------------------------------------------------------------------------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000 ------------1----------------------------1------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 ------------1-------------------------------10---------------------111-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 ------------1-----------------------------10------------------01-------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 ------------1-----------------------------10------------------10-------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 ------------1-----------------------0------0---1--------------011-------------0----0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 ------------1-----------------------0------0---1--------------101-------------0----0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 ------------1-----------------------------10-------------------1-------------------01----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 ------------1-----------------------0------0---1---------------11-------------0----01----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 -------------------------------------------------------------------------------------11--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000 --------1--------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000 ----------------------------------------------0------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000 ----------------------------------------------1------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000 ------------1---------0------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000 ------------1--------0-------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000 --0---------1----------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000 --------------------------------------------1--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000 ---------------------------------------1-------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000 -----------------------------------------------------1--0--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000 --------------------------------------------------------1------------------------------10--------0---- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000 ------------1-------------------------------01-----------1-------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 ------------1-----------------------------------------1---------------------------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 ------------1-------------------------------01----------1-------------------------------------------1- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 ------------1------------------------------------------00--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000 ------------1-------------------------------------------1----------------------------------------0---- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000 ------------1-------------------------------1-----------1--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 ------------1--------------------------------0----------1--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 ----1-------1---------------------0----0------------1---0-------------------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 ------------1-------------------------------1------------1-------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 ------------1--------------------------------0-----------1-------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 ------------1-------------------------------10---------------------------1---------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 ------------1-------------------------------01-----------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000 ------------1-------------------------------0-------------1----------------0-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000 ------------1--------------------------------1------------1----------------0-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000 ------------1-------------------------------10------------1------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000001000000000000000 ------------1-------------------------------1--------------1------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 ------------1--------------------------------0-------------1------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 ------------1------------0------------------0-----------------1--------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 ------------1------------0-------------------1----------------1--------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 ------------1------------0------------------10----------------0--------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 ------------1------------0------------------------------------11-------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 ------------1------------0------------------10----------------1--------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000 ------------1------------0-------------------------------------1-------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000 ------------------------------------1---------------------------0------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 -----------------------------------------------0----------------0------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 ----------------------------------------------------------------0-------------1----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 ------------------------------------0-----0----1----------------1-------------0----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 ------------1-------------------------------0----------------------1---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 ------------1--------------------------------1---------------------1---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 ------------1-------------------------------10---------------------0---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 ------------1------------------------------------------------------111-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 ------------1-------------------------------10---------------------1-0-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 ------------1-------------------------------10---------------------10--------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 ------------1-------------------------------------------------------1--------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 ------------1-------------------------------10---------------------11--------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 ------------1--------------------------------------------------------1-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 ------------1----------------------------------------------------------0----------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 ------------1-------------------------------01----------1--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000 ------------1-----------------------------------------------------------0---------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000 ------------1-------------------------------0----------------------------1---------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 ------------1--------------------------------1---------------------------1---------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 ------------0-------------------------------------------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 --------------------------00010-------0-----10----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 --------------------------------------1-0---10----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 ------------1-------------------------------01-----------1----------------0--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 --------------------------------------------10----------------------------1-----------------------0--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 ------------1-------------00010-------0-----10----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 ------------1-------------------------1-0---10----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 ------------1-------------------------------1------------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 ------------1--------------------------------0-----------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 ------------1-------------------------------10----------------------------1-----------------------0--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 ------------0---------------------------------------------------------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 ------------1-------------------------------01-------------1----------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 ----1-------1---------------------0----0------------1-----------------------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 ----1-------1---------------------0----0----01------1------1----------------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000 -----------------------------------------------1------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 + AHIGH_30_ AHIGH_30_.OE AHIGH_29_ AHIGH_29_.OE AHIGH_28_ AHIGH_28_.OE SIZE_1_.D + SIZE_1_.C SIZE_1_.OE IPL_030_2_.D- IPL_030_2_.C RW_000.D- RW_000.C RW_000.OE + BG_000.D- BG_000.C BGACK_030.D BGACK_030.C A_0_.D A_0_.C A_0_.OE IPL_030_1_.D- + IPL_030_1_.C IPL_030_0_.D- IPL_030_0_.C VMA.T VMA.C VMA.OE RW.D- RW.C RW.OE + SIZE_0_.D- SIZE_0_.C SIZE_0_.OE cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D + cpu_est_1_.C cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C cpu_est_3_.D + cpu_est_3_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- inst_AMIGA_BUS_ENABLE_DMA_HIGH.C + inst_AMIGA_BUS_ENABLE_DMA_LOW.D- inst_AMIGA_BUS_ENABLE_DMA_LOW.C + inst_AS_030_D0.D- inst_AS_030_D0.C inst_AS_030_D1.D inst_AS_030_D1.C + inst_AS_030_000_SYNC.D- inst_AS_030_000_SYNC.C inst_AS_000_DMA.D + inst_AS_000_DMA.C inst_DS_000_DMA.D inst_DS_000_DMA.C inst_VPA_D.D- inst_VPA_D.C + CLK_000_D_3_.D CLK_000_D_3_.C inst_DTACK_D0.D- inst_DTACK_D0.C inst_AMIGA_DS.D + inst_AMIGA_DS.C CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_0_.D CLK_000_D_0_.C + inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D + inst_CLK_OUT_PRE_D.C IPL_D0_0_.D- IPL_D0_0_.C IPL_D0_1_.D- IPL_D0_1_.C + IPL_D0_2_.D- IPL_D0_2_.C CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_4_.D + CLK_000_D_4_.C inst_UDS_000_INT.D- inst_UDS_000_INT.C inst_DS_000_ENABLE.D + inst_DS_000_ENABLE.C inst_LDS_000_INT.D inst_LDS_000_INT.C + inst_BGACK_030_INT_D.D- inst_BGACK_030_INT_D.C SM_AMIGA_6_.D SM_AMIGA_6_.C + SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D + SM_AMIGA_0_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C + inst_DSACK1_INT.D- inst_DSACK1_INT.C inst_AS_000_INT.D- inst_AS_000_INT.C + SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_3_.T SM_AMIGA_3_.C SM_AMIGA_2_.D + SM_AMIGA_2_.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C SM_AMIGA_i_7_.T.X1 + SM_AMIGA_i_7_.T.X2 SM_AMIGA_i_7_.C N_60 +.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 +.p 156 +------------------------------------------------------------------------------------------ 0000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------0------------------------------------------------------------------ 0101010101010001000000000000000000001010100100000000000100000000010010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------------0---------------------------------------0---------------- 0000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------------------------------0----------0----------------- 0000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------1------------------------------------------------------------------ 0000000000000100010100000000000000000000000000001000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------------0--------------------------------------0---------------- 0000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------------------01--------------------------------------- 0000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------------------------------10-------------------------------------- 0000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--1--1--1------0010--1--------------------------------------------------0----------------- 0000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------------------------------------1----------------------- 0000000000000000000000110000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--1--1--0------0010--1--------------------------------------------------0----------------- 0000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------------------------------0-----------0----------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1-------------------1------------------------------------------------------------------ 0000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------001-------------------------------------------------------------- 0000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------110-------------------------------------------------------------- 0000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---0-------------------0-------------------------------------------------01--------------- 0000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------1--------------------------------------------------0--------------- 0000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------0-----0------------------------------------------------------------ 0000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------0----0------------------------------------------------------------- 0000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------1--------0---------------------------------------0----------------- 0000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +1-----------111---------------0------------------------------------------------00000000--- 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 +-----------------------------------------------------------------------1------------------ 0000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------0------------------------------------------------------------------------------ 0000000000000000000000000000000000000000010000000001010000000000000000000000000000000000101000000010000000000000000000000010000000000000000000000000000000 +-----------------------0---------------------------------------------------00------------- 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------1---------------------------------------------------------------------------------- 0000000000000000000000000000000000000000001001010010101001010100100100101001010101010101010101010101010101010101010101010101010101010101010101010101010010 +-0---------1-------11-----------------------110------------------------------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1-------10-----------------------010------------------------------------------- 0000000000000000000000000000000000000000000010000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1-------01-----------------------100------------------------------------------- 0000000000000000000000000000000000000000000010000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1-------00-----------------------000------------------------------------------- 0000000000000000000000000000000000000000000010000000000010100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1----------------------------------------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------0-----------------------1-------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------1-----------------------0-------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------0-------------------------1------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------1-------------------------0------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1----------------------------------0-----------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1----------------------------1-------------0--------------1-------------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------------0------------0--------------1-------------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------------------------00--0-----------1-------------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1----------------------------01-----------1---0-----------1-------------------0 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---10------1------------------1----------1------------------------------------------------ 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0------1-----------------------------------------------------0------------------------ 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----1-----------------1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----1----------------------------------10-------------------------------1---------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------0---------------------------------------------------1-------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1-------01-----------------------101------------------------------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1-------00-----------------------001------------------------------------------- 0000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------0------------------------------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------0-----------------------1-----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------1-----------------------0-----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------------------------------0----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1----------------------------------1---------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1----------------------------------0---------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1-------10-----------------------011------------------------------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------0----------------------------------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------------------------------0----------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------0-------------------------1---------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------1-------------------------0---------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1----------------------------------1--------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1----------------------------------0--------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------0-----------------------0------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0000-------0----01------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------1100-------10---10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------0--------------------------------------------------0--------------- 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------------------------------------------------------------00------------- 0000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1---------------0------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1----------------1------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0---------------10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------01---------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------1--------------0------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------1---------------1------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------10-0------------10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------11--------------10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------1--------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0--1-------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------1------------0------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------1-------------1------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------111-------------10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1----------00------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1----------10------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------------------------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------------1----------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000 +-----------0-------------------1---------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------------------0---------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 +--01-------1-----------1-------0--------------------1----------------0--0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 +---1-------1---1-------1-------0--------------------1----------------0--0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 +---1-------1----1------1-------0--------------------1----------------0--0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 +---1-------1-----0-----1-------0--------------------1----------------0--0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 +---1-------1------1----1-------0--------------------1----------------0--0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 +---1-------1---------0-1-------0--------------------1----------------0--0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 +---------------------------------------1-------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------------------------00------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000 +---------------------------------1---------1----------------------0----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------------------------------------------1---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------------------------11--------------0--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000 +----------------------------------1--------1----------------------0----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000 +----------01------------------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000 +-----------------------------------------------1------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000 +---------0-1------------------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 +---------------------------------------------------------------------------11------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000 +-----------------------------------------1------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000 +------1----------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000 +------------------------------------------0----------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000 +------------------------------------------1----------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000 +-----------1--------0--------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000 +-----------1-------0---------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000 +-0---------1------------------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000 +----------------------------------------1------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000 +-------------------------------------1---------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000 +-----------1-------------------------------------0---0------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000 +-----------1-----------------------------------------1---------------------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000 +-----------1----------------------------01-------------1---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000 +-----------1--------------------------------------1---------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000 +-----------1----------------------------01-----------1-----------------------------------1 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000 +---------------------------------------------------1-0------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 +-----------------------------------------------------1-----------------------10--------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 +-----------1-----------0------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000 +-----------1----------------------------1------------1------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 +-----------1-----------------------------0-----------1------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 +---1-------1--------------------0----0----------1----0---------------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 +-----------1----------------------------1--------------1---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +-----------1-----------------------------0-------------1---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +-----------1----------------------------10--------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +-----------1----------------------------01----------------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 +-----------1----------------------------0---------------1-------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 +-----------1-----------------------------1--------------1-------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 +-----------1----------------------------10--------------1--------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000001000000000000000 +-----------1----------------------------1----------------1-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 +-----------1-----------------------------0---------------1-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 +-----------1-----------0----------------0-----------------1--------------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 +-----------1-----------0-----------------1----------------1--------------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 +-----------1-----------0----------------10----------------0--------------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 +-----------1-----------0----------------------------------11-------------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 +-----------1-----------0----------------10----------------1--------------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 +-----------1-----------0-----------------------------------1-------------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 +-----------1------------------------------------------------0-----------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 +-----------1----------------------------01-----------1------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000 +-----------1-------------------------------------------------0----------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000 +-----------1----------------------------0---------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 +-----------1-----------------------------1--------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 +-----------0---------------------------------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +------------------------0001-------00---10---------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +------------------------------------1-0-10---------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +-----------1----------------------------01-------------1-------0-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +----------------------------------------10---------------------1------------------------0- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +-----------1------------0001-------00---10---------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------1------------------------1-0-10---------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------1----------------------------1-----------------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------1-----------------------------0----------------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------1----------------------------10---------------------1------------------------0- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-------------------------------------------1---------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +-----------0---------------------------------------------------------1-------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +-----------1----------------------------01---------------1-----------1-------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +---1-------1--------------------0----0----------1--------------------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +---1-------1--------------------0----0--01------1--------1-----------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 +---1-------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 .end diff --git a/Logic/68030_tk.vcl b/Logic/68030_tk.vcl index b72a354..c80ce69 100644 --- a/Logic/68030_tk.vcl +++ b/Logic/68030_tk.vcl @@ -17,8 +17,8 @@ Parent = m4a5.lci; SDS_file = m4a5.sds; Design = 68030_tk.tt4; Rev = 0.01; -DATE = 12/29/16; -TIME = 16:02:00; +DATE = 12/30/17; +TIME = 00:43:46; Type = TT2; Pre_Fit_Time = 1; Source_Format = Pure_VHDL; @@ -117,6 +117,7 @@ Conf_Unused_IOs = OUT_LOW; [POWER] Powerlevel = Low, High; Default = High; +High = 1, B; Low = 8, H, G, F, E, D, C, B, A; Type = GLB; @@ -142,16 +143,15 @@ layer = OFF; Layer = OFF AS_030 = OUTPUT,82,7,-; -RW_000 = BIDIR,80,7,-; AS_000 = OUTPUT,42,4,-; +RW_000 = BIDIR,80,7,-; +A_0_ = OUTPUT,69,6,-; +RW = OUTPUT,71,6,-; UDS_000 = OUTPUT,32,3,-; LDS_000 = OUTPUT,31,3,-; -RW = BIDIR,71,6,-; -SIZE_1_ = BIDIR,79,7,-; -SIZE_0_ = BIDIR,70,6,-; -A_0_ = BIDIR,69,6,-; +SIZE_1_ = OUTPUT,79,7,-; +SIZE_0_ = OUTPUT,70,6,-; BERR = OUTPUT,41,4,-; -DTACK = OUTPUT,30,3,-; AHIGH_24_ = OUTPUT,19,2,-; AHIGH_25_ = OUTPUT,18,2,-; AHIGH_26_ = OUTPUT,17,2,-; @@ -181,59 +181,50 @@ CLK_EXP = OUTPUT,10,1,-; RN_BGACK_030 = NODE,-1,7,-; CLK_000_D_0_ = NODE,*,3,-; CLK_000_D_1_ = NODE,*,7,-; -inst_RESET_OUT = NODE,*,6,-; SM_AMIGA_6_ = NODE,*,5,-; -inst_BGACK_030_INT_D = NODE,*,7,-; -inst_AS_030_000_SYNC = NODE,*,1,-; -inst_AS_000_DMA = NODE,*,0,-; -cpu_est_3_ = NODE,*,3,-; +cpu_est_3_ = NODE,*,0,-; cpu_est_1_ = NODE,*,3,-; -SM_AMIGA_i_7_ = NODE,*,5,-; SM_AMIGA_0_ = NODE,*,0,-; +SM_AMIGA_4_ = NODE,*,6,-; cpu_est_0_ = NODE,*,6,-; -CLK_OUT_INTreg = NODE,*,3,-; -inst_AS_030_D0 = NODE,*,7,-; +CLK_OUT_INTreg = NODE,*,0,-; +inst_AS_030_D0 = NODE,*,4,-; cpu_est_2_ = NODE,*,3,-; -SM_AMIGA_2_ = NODE,*,2,-; +inst_AS_030_000_SYNC = NODE,*,5,-; +inst_DS_000_DMA = NODE,*,2,-; +inst_AS_000_DMA = NODE,*,2,-; +CYCLE_DMA_0_ = NODE,*,1,-; RN_VMA = NODE,-1,3,-; -SM_AMIGA_5_ = NODE,*,6,-; -SM_AMIGA_1_ = NODE,*,5,-; -SM_AMIGA_4_ = NODE,*,0,-; +SM_AMIGA_i_7_ = NODE,*,5,-; +SM_AMIGA_5_ = NODE,*,5,-; +SM_AMIGA_1_ = NODE,*,0,-; +inst_LDS_000_INT = NODE,*,6,-; inst_DS_000_ENABLE = NODE,*,2,-; -inst_LDS_000_INT = NODE,*,5,-; inst_AS_000_INT = NODE,*,2,-; -inst_DSACK1_INT = NODE,*,0,-; -inst_UDS_000_INT = NODE,*,5,-; -inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,*,5,-; -inst_AMIGA_BUS_ENABLE_DMA_HIGH = NODE,*,5,-; +inst_DSACK1_INT = NODE,*,6,-; +CYCLE_DMA_1_ = NODE,*,1,-; +inst_UDS_000_INT = NODE,*,1,-; inst_CLK_OUT_PRE_D = NODE,*,4,-; -inst_CLK_OUT_PRE_50 = NODE,*,6,-; -CLK_000_D_3_ = NODE,*,5,-; -inst_VPA_D = NODE,*,5,-; -RN_IPL_030_2_ = NODE,-1,1,-; +inst_CLK_OUT_PRE_50 = NODE,*,7,-; +inst_VPA_D = NODE,*,6,-; RN_IPL_030_0_ = NODE,-1,1,-; RN_IPL_030_1_ = NODE,-1,1,-; -CLK_030_PE_0_ = NODE,*,0,-; -inst_DS_000_DMA = NODE,*,0,-; -CLK_030_PE_1_ = NODE,*,0,-; -SM_AMIGA_3_ = NODE,*,2,-; +RN_IPL_030_2_ = NODE,-1,1,-; +SM_AMIGA_2_ = NODE,*,0,-; +SM_AMIGA_3_ = NODE,*,0,-; RN_RW_000 = NODE,-1,7,-; -RST_DLY_0_ = NODE,*,6,-; -CYCLE_DMA_0_ = NODE,*,0,-; -RN_SIZE_0_ = NODE,-1,6,-; -RN_SIZE_1_ = NODE,-1,7,-; -RN_A_0_ = NODE,-1,6,-; -RN_RW = NODE,-1,6,-; RN_BG_000 = NODE,-1,3,-; -CIIN_0 = NODE,*,4,-; -RST_DLY_2_ = NODE,*,6,-; -RST_DLY_1_ = NODE,*,6,-; -CYCLE_DMA_1_ = NODE,*,0,-; -inst_AMIGA_DS = NODE,*,2,-; -CLK_000_D_4_ = NODE,*,2,-; +N_60 = NODE,*,4,-; +inst_AMIGA_DS = NODE,*,7,-; +inst_AS_030_D1 = NODE,*,5,-; +inst_BGACK_030_INT_D = NODE,*,4,-; +CLK_000_D_4_ = NODE,*,5,-; CLK_000_D_2_ = NODE,*,7,-; -IPL_D0_2_ = NODE,*,1,-; -IPL_D0_1_ = NODE,*,1,-; -IPL_D0_0_ = NODE,*,1,-; -inst_DTACK_D0 = NODE,*,1,-; +IPL_D0_2_ = NODE,*,0,-; +IPL_D0_1_ = NODE,*,3,-; +IPL_D0_0_ = NODE,*,0,-; +inst_DTACK_D0 = NODE,*,5,-; +CLK_000_D_3_ = NODE,*,5,-; +inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,*,2,-; +inst_AMIGA_BUS_ENABLE_DMA_HIGH = NODE,*,0,-; CLK_OSZI = INPUT,61,-,-; diff --git a/Logic/68030_tk.vco b/Logic/68030_tk.vco index 05984ef..d5cbe9e 100644 --- a/Logic/68030_tk.vco +++ b/Logic/68030_tk.vco @@ -17,8 +17,8 @@ Parent = m4a5.lci; SDS_file = m4a5.sds; Design = 68030_tk.tt4; Rev = 0.01; -DATE = 12/29/16; -TIME = 16:02:00; +DATE = 12/30/17; +TIME = 00:43:46; Type = TT2; Pre_Fit_Time = 1; Source_Format = Pure_VHDL; @@ -117,6 +117,7 @@ Conf_Unused_IOs = OUT_LOW; [POWER] Powerlevel = Low, High; Default = High; +High = 1, B; Low = 8, H, G, F, E, D, C, B, A; Type = GLB; @@ -141,12 +142,19 @@ layer = OFF; [LOCATION ASSIGNMENT] Layer = OFF; +AHIGH_27_ = BIDIR,16, C,-; +AHIGH_26_ = BIDIR,17, C,-; +AHIGH_25_ = BIDIR,18, C,-; +AHIGH_24_ = BIDIR,19, C,-; AHIGH_31_ = BIDIR,4, B,-; -IPL_1_ = INPUT,56, F,-; -IPL_0_ = INPUT,67, G,-; +A_DECODE_22_ = INPUT,84, H,-; +A_DECODE_21_ = INPUT,94, A,-; A_DECODE_23_ = INPUT,85, H,-; -FC_0_ = INPUT,57, F,-; -A_1_ = INPUT,60, F,-; +A_DECODE_20_ = INPUT,93, A,-; +A_DECODE_19_ = INPUT,97, A,-; +A_DECODE_18_ = INPUT,95, A,-; +A_DECODE_17_ = INPUT,59, F,-; +A_DECODE_16_ = INPUT,96, A,-; IPL_2_ = INPUT,68, G,-; FC_1_ = INPUT,58, F,-; AS_030 = BIDIR,82, H,-; @@ -158,94 +166,80 @@ nEXP_SPACE = INPUT,14,-,-; BERR = BIDIR,41, E,-; BG_030 = INPUT,21, C,-; BGACK_000 = INPUT,28, D,-; -CLK_030 = INPUT,64,-,-; CLK_000 = INPUT,11,-,-; +IPL_1_ = INPUT,56, F,-; CLK_OSZI = INPUT,61,-,-; +IPL_0_ = INPUT,67, G,-; CLK_DIV_OUT = OUTPUT,65, G,-; +FC_0_ = INPUT,57, F,-; CLK_EXP = OUTPUT,10, B,-; +A_1_ = INPUT,60, F,-; FPU_CS = OUTPUT,78, H,-; FPU_SENSE = INPUT,91, A,-; DSACK1 = OUTPUT,81, H,-; -DTACK = BIDIR,30, D,-; +DTACK = INPUT,30, D,-; AVEC = OUTPUT,92, A,-; E = OUTPUT,66, G,-; -AHIGH_30_ = BIDIR,5, B,-; VPA = INPUT,36,-,-; +RST = INPUT,86,-,-; +AMIGA_ADDR_ENABLE = OUTPUT,33, D,-; +AMIGA_BUS_DATA_DIR = OUTPUT,48, E,-; +AMIGA_BUS_ENABLE_LOW = OUTPUT,20, C,-; +AMIGA_BUS_ENABLE_HIGH = OUTPUT,34, D,-; +CIIN = OUTPUT,47, E,-; +AHIGH_30_ = BIDIR,5, B,-; AHIGH_29_ = BIDIR,6, B,-; AHIGH_28_ = BIDIR,15, C,-; -RST = INPUT,86,-,-; -AHIGH_27_ = BIDIR,16, C,-; -RESET = INPUT,3, B,-; -AHIGH_26_ = BIDIR,17, C,-; -AHIGH_25_ = BIDIR,18, C,-; -AMIGA_ADDR_ENABLE = OUTPUT,33, D,-; -AHIGH_24_ = BIDIR,19, C,-; -AMIGA_BUS_DATA_DIR = OUTPUT,48, E,-; -A_DECODE_22_ = INPUT,84, H,-; -AMIGA_BUS_ENABLE_LOW = OUTPUT,20, C,-; -A_DECODE_21_ = INPUT,94, A,-; -AMIGA_BUS_ENABLE_HIGH = OUTPUT,34, D,-; -A_DECODE_20_ = INPUT,93, A,-; -CIIN = OUTPUT,47, E,-; -A_DECODE_19_ = INPUT,97, A,-; -A_DECODE_18_ = INPUT,95, A,-; -A_DECODE_17_ = INPUT,59, F,-; -A_DECODE_16_ = INPUT,96, A,-; -A_0_ = BIDIR,69, G,-; SIZE_1_ = BIDIR,79, H,-; -IPL_030_1_ = OUTPUT,7, B,-; -IPL_030_0_ = OUTPUT,8, B,-; IPL_030_2_ = OUTPUT,9, B,-; RW_000 = BIDIR,80, H,-; BG_000 = OUTPUT,29, D,-; BGACK_030 = OUTPUT,83, H,-; -SIZE_0_ = BIDIR,70, G,-; +A_0_ = BIDIR,69, G,-; +IPL_030_1_ = OUTPUT,7, B,-; +IPL_030_0_ = OUTPUT,8, B,-; VMA = OUTPUT,35, D,-; RW = BIDIR,71, G,-; -cpu_est_1_ = NODE,6, D,-; -cpu_est_2_ = NODE,14, D,-; -cpu_est_3_ = NODE,2, D,-; +SIZE_0_ = BIDIR,70, G,-; cpu_est_0_ = NODE,9, G,-; -inst_AMIGA_BUS_ENABLE_DMA_HIGH = NODE,9, F,-; -inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,5, F,-; -inst_AS_030_D0 = NODE,2, H,-; -inst_AS_030_000_SYNC = NODE,13, B,-; -inst_BGACK_030_INT_D = NODE,13, H,-; -inst_AS_000_DMA = NODE,8, A,-; -inst_DS_000_DMA = NODE,13, A,-; -inst_VPA_D = NODE,2, F,-; +cpu_est_1_ = NODE,13, D,-; +cpu_est_2_ = NODE,2, D,-; +cpu_est_3_ = NODE,8, A,-; +inst_AMIGA_BUS_ENABLE_DMA_HIGH = NODE,10, A,-; +inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,10, C,-; +inst_AS_030_D0 = NODE,8, E,-; +inst_AS_030_D1 = NODE,1, F,-; +inst_AS_030_000_SYNC = NODE,4, F,-; +inst_AS_000_DMA = NODE,13, C,-; +inst_DS_000_DMA = NODE,9, C,-; +inst_VPA_D = NODE,6, G,-; CLK_000_D_3_ = NODE,13, F,-; -inst_DTACK_D0 = NODE,14, B,-; -inst_RESET_OUT = NODE,5, G,-; -CLK_030_PE_1_ = NODE,2, A,-; -inst_AMIGA_DS = NODE,10, C,-; +inst_DTACK_D0 = NODE,9, F,-; +inst_AMIGA_DS = NODE,2, H,-; CLK_000_D_1_ = NODE,5, H,-; -CLK_000_D_0_ = NODE,13, D,-; -inst_CLK_OUT_PRE_50 = NODE,2, G,-; -inst_CLK_OUT_PRE_D = NODE,8, E,-; -IPL_D0_0_ = NODE,10, B,-; -IPL_D0_1_ = NODE,6, B,-; -IPL_D0_2_ = NODE,2, B,-; +CLK_000_D_0_ = NODE,9, D,-; +inst_CLK_OUT_PRE_50 = NODE,13, H,-; +inst_CLK_OUT_PRE_D = NODE,5, E,-; +IPL_D0_0_ = NODE,6, A,-; +IPL_D0_1_ = NODE,6, D,-; +IPL_D0_2_ = NODE,2, A,-; CLK_000_D_2_ = NODE,6, H,-; -CLK_000_D_4_ = NODE,14, C,-; -inst_LDS_000_INT = NODE,12, F,-; -inst_DS_000_ENABLE = NODE,13, C,-; -inst_UDS_000_INT = NODE,1, F,-; +CLK_000_D_4_ = NODE,5, F,-; +inst_UDS_000_INT = NODE,6, B,-; +inst_DS_000_ENABLE = NODE,2, C,-; +inst_LDS_000_INT = NODE,13, G,-; +inst_BGACK_030_INT_D = NODE,13, E,-; SM_AMIGA_6_ = NODE,0, F,-; -SM_AMIGA_4_ = NODE,1, A,-; -SM_AMIGA_1_ = NODE,8, F,-; +SM_AMIGA_4_ = NODE,5, G,-; +SM_AMIGA_1_ = NODE,5, A,-; SM_AMIGA_0_ = NODE,12, A,-; -CYCLE_DMA_0_ = NODE,6, A,-; -CYCLE_DMA_1_ = NODE,10, A,-; -CLK_030_PE_0_ = NODE,9, A,-; -RST_DLY_0_ = NODE,6, G,-; -RST_DLY_1_ = NODE,14, G,-; -RST_DLY_2_ = NODE,10, G,-; -inst_DSACK1_INT = NODE,5, A,-; -inst_AS_000_INT = NODE,2, C,-; -SM_AMIGA_5_ = NODE,13, G,-; -SM_AMIGA_3_ = NODE,6, C,-; -SM_AMIGA_2_ = NODE,9, C,-; -SM_AMIGA_i_7_ = NODE,4, F,-; -CLK_OUT_INTreg = NODE,10, D,-; -CIIN_0 = NODE,5, E,-; +CYCLE_DMA_0_ = NODE,13, B,-; +CYCLE_DMA_1_ = NODE,2, B,-; +inst_DSACK1_INT = NODE,2, G,-; +inst_AS_000_INT = NODE,6, C,-; +SM_AMIGA_5_ = NODE,12, F,-; +SM_AMIGA_3_ = NODE,13, A,-; +SM_AMIGA_2_ = NODE,9, A,-; +CLK_OUT_INTreg = NODE,1, A,-; +SM_AMIGA_i_7_ = NODE,8, F,-; +N_60 = NODE,9, E,-; diff --git a/Logic/68030_tk.vct b/Logic/68030_tk.vct index 6b2c2e2..5c0b697 100644 --- a/Logic/68030_tk.vct +++ b/Logic/68030_tk.vct @@ -15,8 +15,8 @@ Voltage = 5.0; RCS = "$Revision: 1.2 $"; Parent = m4a5.lci; SDS_File = m4a5.sds; -DATE = 10/08/2016; -TIME = 22:26:00; +DATE = 02/16/2017; +TIME = 19:15:23; Source_Format = Pure_VHDL; Type = TT2; Pre_Fit_Time = 1; @@ -224,6 +224,7 @@ Page_Break = Yes; [POWER] Powerlevel = Low,High; Default = High; +High = 1,B; Low = 8,H,G,F,E,D,C,B,A; Type = GLB; diff --git a/Logic/68030_tk.xrf b/Logic/68030_tk.xrf index 548fe7d..65e32ff 100644 --- a/Logic/68030_tk.xrf +++ b/Logic/68030_tk.xrf @@ -2,7 +2,7 @@ Signal Name Cross Reference File ispLEVER Classic 2.0.00.17.20.15 -Design '68030_tk' created Thu Dec 29 16:01:56 2016 +Design '68030_tk' created Sat Dec 30 00:43:37 2017 LEGEND: '>' Functional Block Port Separator diff --git a/Logic/BUS68030.bl0 b/Logic/BUS68030.bl0 index df6413b..cb9b713 100644 --- a/Logic/BUS68030.bl0 +++ b/Logic/BUS68030.bl0 @@ -1,304 +1,273 @@ -#$ DATE Thu Dec 29 16:01:56 2016 +#$ DATE Sat Dec 30 00:43:37 2017 #$ TOOL EDIF2BLIF version IspLever 1.0 #$ MODULE bus68030 -#$ PINS 75 A_DECODE_2_ A_0_ SIZE_1_ IPL_030_1_ IPL_030_0_ AHIGH_31_ IPL_1_ IPL_0_ A_DECODE_23_ FC_0_ A_1_ IPL_030_2_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 DTACK AVEC SIZE_0_ E AHIGH_30_ VPA AHIGH_29_ VMA AHIGH_28_ RST AHIGH_27_ RESET AHIGH_26_ RW AHIGH_25_ AMIGA_ADDR_ENABLE AHIGH_24_ AMIGA_BUS_DATA_DIR A_DECODE_22_ AMIGA_BUS_ENABLE_LOW A_DECODE_21_ AMIGA_BUS_ENABLE_HIGH A_DECODE_20_ CIIN A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ A_DECODE_15_ A_DECODE_14_ A_DECODE_13_ A_DECODE_12_ A_DECODE_11_ A_DECODE_10_ A_DECODE_9_ A_DECODE_8_ A_DECODE_7_ A_DECODE_6_ A_DECODE_5_ A_DECODE_4_ A_DECODE_3_ -#$ NODES 609 clk_000_d_i_1__n VPA_D_i N_125_i a_decode_2__n VMA_INT_i N_124_i sm_amiga_i_0__n N_53_0 rst_dly_i_2__n N_134_i \ -# rst_dly_i_1__n N_270_0 rst_dly_i_0__n N_77_i DSACK1_INT_i N_87_i inst_BGACK_030_INTreg N_137_i_0 N_112_i vcc_n_n \ -# DTACK_D0_i N_113_i inst_VMA_INTreg BGACK_030_INT_i N_114_i gnd_n_n nEXP_SPACE_i un1_amiga_bus_enable_low AS_000_DMA_i N_109_i \ -# un7_as_030 RW_000_i N_108_i un1_LDS_000_INT clk_030_pe_i_1__n N_111_i un1_UDS_000_INT DS_000_DMA_0_sqmuxa_i N_265_2_0 un1_SM_AMIGA_0_sqmuxa_1 \ -# pos_clk_un4_rw_000_i_n un10_ciin AS_000_i un1_as_000_i un21_fpu_cs AMIGA_DS_i VPA_c_i un21_berr pos_clk_un3_clk_out_int_i_n N_52_0 \ -# un6_ds_030 cycle_dma_i_0__n DTACK_c_i un13_ciin cycle_dma_i_1__n N_48_0 cpu_est_1_ pos_clk_as_000_dma6_i_n un3_ahigh_i cpu_est_2_ \ -# DS_000_DMA_i pos_clk_un4_bgack_000_i_n cpu_est_3_ CLK_EXP_i pos_clk_un6_bgack_000_0_n cpu_est_0_ AMIGA_BUS_ENABLE_DMA_LOW_i N_7_i inst_AMIGA_BUS_ENABLE_DMA_HIGH ahigh_i_25__n \ -# N_41_0 inst_AMIGA_BUS_ENABLE_DMA_LOW ahigh_i_24__n pos_clk_un1_bgack_030_int_0_n inst_AS_030_D0 ahigh_i_27__n pos_clk_un12_clk_out_int_0_n inst_AS_030_000_SYNC ahigh_i_26__n pos_clk_un3_0_n \ -# inst_BGACK_030_INT_D ahigh_i_29__n pos_clk_un15_bgack_030_int_i_n inst_AS_000_DMA ahigh_i_28__n N_3_i inst_DS_000_DMA ahigh_i_31__n N_43_0 inst_VPA_D \ -# ahigh_i_30__n N_4_i CLK_000_D_3_ a_i_1__n N_42_0 inst_DTACK_D0 AMIGA_BUS_ENABLE_DMA_HIGH_i un6_amiga_bus_data_dir_i inst_RESET_OUT AS_030_D0_i \ -# un12_amiga_bus_data_dir_m_i CLK_030_PE_1_ un10_ciin_i AMIGA_BUS_DATA_DIR_c_0 inst_AMIGA_DS FPU_SENSE_i N_22_i CLK_000_D_1_ AS_030_000_SYNC_i N_31_0 \ -# CLK_000_D_0_ a_decode_i_16__n N_21_i inst_CLK_OUT_PRE_50 a_decode_i_18__n N_32_0 inst_CLK_OUT_PRE_D a_decode_i_19__n N_19_i IPL_D0_0_ \ -# N_224_i N_34_0 IPL_D0_1_ N_225_i N_18_i IPL_D0_2_ N_226_i N_35_0 CLK_000_D_2_ pos_clk_un5_bgack_030_int_d_i_n \ -# CLK_000_D_4_ pos_clk_amiga_bus_enable_dma_high_3_0_n pos_clk_un6_bg_030_n pos_clk_amiga_bus_enable_dma_low_3_0_n pos_clk_ipl_n pos_clk_rw_000_dma_3_0_n inst_LDS_000_INT un13_ciin_i UDS_000_c_i inst_DS_000_ENABLE \ -# un6_ds_030_i LDS_000_c_i inst_UDS_000_INT N_123_i N_86_i SM_AMIGA_6_ N_122_i N_129_i SM_AMIGA_4_ un7_as_030_i \ -# N_130_i SM_AMIGA_1_ AS_030_c un11_amiga_bus_enable_high_i SM_AMIGA_0_ N_117_i SIZE_DMA_0_ AS_000_c N_46_0 SIZE_DMA_1_ \ -# N_107_i CYCLE_DMA_0_ RW_000_c pos_clk_size_dma_6_0_0__n CYCLE_DMA_1_ N_106_i CLK_030_PE_0_ pos_clk_size_dma_6_0_1__n inst_RW_000_INT UDS_000_c \ -# N_16_i inst_RW_000_DMA N_254_i RST_DLY_0_ LDS_000_c N_263_i RST_DLY_1_ N_250_i RST_DLY_2_ size_c_0__n \ -# N_256_i inst_A0_DMA N_189_i pos_clk_rw_000_int_5_n size_c_1__n N_101_i inst_DSACK1_INT inst_AS_000_INT ahigh_c_24__n N_103_i \ -# SM_AMIGA_5_ N_104_i SM_AMIGA_3_ ahigh_c_25__n SM_AMIGA_2_ N_105_i ahigh_c_26__n N_115_i ahigh_c_27__n N_116_i \ -# ahigh_c_28__n N_131_i N_277_i ahigh_c_29__n N_64_0 N_91_0 ahigh_c_30__n N_159_0 N_14 N_85_i \ -# N_15 ahigh_c_31__n un1_SM_AMIGA_0_sqmuxa_1_0 N_24 RW_c_i N_25 pos_clk_rw_000_int_5_0_n clk_000_d_i_3__n N_25_i N_28_0 \ -# N_24_i N_27_0 ipl_c_i_1__n N_50_0 ipl_c_i_0__n N_49_0 N_14_i N_39_0 N_15_i N_38_0 \ -# N_91_0_1 N_91_0_2 N_91_0_3 N_265_i_1 N_266_i_1 N_266_i_2 N_138_i_1 N_148_i_1 N_144_i_1 N_142_i_1 \ -# N_140_i_1 SM_AMIGA_i_7_ pos_clk_un10_sm_amiga_i_1_n N_76 N_85_i_1 G_122 N_85_i_2 G_123 a_decode_c_16__n N_277_1 \ -# G_124 N_277_2 un1_rst_2_1 a_decode_c_17__n N_277_3 cpu_est_0_0_ N_277_4 N_64 a_decode_c_18__n N_277_5 \ -# N_122 un10_ciin_1 N_123 a_decode_c_19__n un10_ciin_2 N_132 un10_ciin_3 N_133 a_decode_c_20__n un10_ciin_4 \ -# N_274 un10_ciin_5 N_276 a_decode_c_21__n un10_ciin_6 N_77 un10_ciin_7 N_79 a_decode_c_22__n un10_ciin_8 \ -# N_78 un10_ciin_9 N_263 a_decode_c_23__n un10_ciin_10 N_108 un10_ciin_11 N_114 a_c_0__n un6_amiga_bus_data_dir_1 \ -# N_85 un6_amiga_bus_data_dir_2 N_104 a_c_1__n pos_clk_as_000_dma6_1_n N_91 pos_clk_as_000_dma6_2_n N_131 nEXP_SPACE_c DS_000_DMA_1_sqmuxa_1 \ -# N_277 pos_clk_un4_rw_000_1_n N_130 BERR_c pos_clk_un4_rw_000_2_n N_115 pos_clk_un13_clk_out_int_1_n N_116 BG_030_c N_125_1 \ -# N_105 N_116_1 N_103 BG_000DFFreg pos_clk_un29_clk_000_ne_1_1_n N_101 pos_clk_un29_clk_000_ne_1_2_n N_259 pos_clk_un29_clk_000_ne_1_3_n N_255 \ -# BGACK_000_c N_261_1 N_256 N_261_2 N_254 CLK_030_c N_262_1 N_16 N_262_2 N_106 \ -# DS_000_ENABLE_0_sqmuxa_1_1 N_86 N_259_1 N_107 CLK_OSZI_c N_250_i_1 N_117 N_189_i_1 pos_clk_a0_dma_3_n pos_clk_un6_bg_030_1_n \ -# N_129 CLK_OUT_INTreg N_108_1 pos_clk_size_dma_6_1__n N_114_1 pos_clk_size_dma_6_0__n un21_berr_1 pos_clk_rw_000_dma_3_n FPU_SENSE_c un21_fpu_cs_1 \ -# pos_clk_amiga_bus_enable_dma_low_3_n N_130_1 pos_clk_amiga_bus_enable_dma_high_3_n IPL_030DFF_0_reg N_136_i_1 SIZE_DMA_3_sqmuxa N_152_i_1 pos_clk_un5_bgack_030_int_d_n IPL_030DFF_1_reg N_146_i_1 \ -# N_18 N_267_i_1 N_19 IPL_030DFF_2_reg pos_clk_ipl_1_n N_21 bg_000_0_un3_n N_22 ipl_c_0__n bg_000_0_un1_n \ -# un6_amiga_bus_data_dir bg_000_0_un0_n un12_amiga_bus_data_dir_m ipl_c_1__n uds_000_int_0_un3_n pos_clk_un3_clk_out_int_n uds_000_int_0_un1_n N_3 ipl_c_2__n uds_000_int_0_un0_n \ -# pos_clk_as_000_dma6_n lds_000_int_0_un3_n DS_000_DMA_1_sqmuxa lds_000_int_0_un1_n N_4 DTACK_c lds_000_int_0_un0_n AS_000_DMA_1_sqmuxa ds_000_enable_0_un3_n un1_rst_2 \ -# ds_000_enable_0_un1_n G_97 ds_000_enable_0_un0_n N_199 VPA_c ipl_030_0_2__un3_n pos_clk_un13_bgack_030_int_n ipl_030_0_2__un1_n N_205 ipl_030_0_2__un0_n \ -# pos_clk_un13_clk_out_int_n RST_c vma_int_0_un3_n pos_clk_un15_bgack_030_int_n vma_int_0_un1_n pos_clk_un3_n RESET_c vma_int_0_un0_n pos_clk_un12_clk_out_int_n cpu_est_0_1__un3_n \ -# pos_clk_un1_bgack_030_int_n RW_c cpu_est_0_1__un1_n DS_000_DMA_0_sqmuxa cpu_est_0_1__un0_n un1_rst_3 fc_c_0__n cpu_est_0_2__un3_n G_95 cpu_est_0_2__un1_n \ -# G_101 fc_c_1__n cpu_est_0_2__un0_n G_103 cpu_est_0_3__un3_n pos_clk_un4_rw_000_n cpu_est_0_3__un1_n N_7 AMIGA_BUS_DATA_DIR_c cpu_est_0_3__un0_n \ -# pos_clk_un6_bgack_000_n pos_clk_un31_clk_000_ne_1_i_m2_un3_n pos_clk_un4_bgack_000_n pos_clk_un31_clk_000_ne_1_i_m2_un1_n N_265_2 pos_clk_un31_clk_000_ne_1_i_m2_un0_n N_111 bgack_030_int_0_un3_n N_109 BG_030_c_i \ -# bgack_030_int_0_un1_n N_113 pos_clk_un6_bg_030_i_n bgack_030_int_0_un0_n N_112 pos_clk_un9_bg_030_0_n ds_000_dma_0_un3_n N_98 UDS_000_INT_i ds_000_dma_0_un1_n \ -# pos_clk_un29_clk_000_ne_1_n un1_UDS_000_INT_0 ds_000_dma_0_un0_n N_87 LDS_000_INT_i as_000_dma_0_un3_n N_270 un1_LDS_000_INT_0 as_000_dma_0_un1_n N_134 \ -# N_23_i as_000_dma_0_un0_n N_125 N_30_0 size_dma_0_1__un3_n N_124 N_20_i size_dma_0_1__un1_n N_121 N_33_0 \ -# size_dma_0_1__un0_n N_120 N_13_i size_dma_0_0__un3_n N_137 N_40_0 size_dma_0_0__un1_n pos_clk_un31_clk_000_ne_n ipl_c_i_2__n size_dma_0_0__un0_n \ -# N_17 N_51_0 amiga_bus_enable_dma_high_0_un3_n pos_clk_un9_clk_000_pe_n N_26_i amiga_bus_enable_dma_high_0_un1_n cpu_est_2_1__n N_29_0 amiga_bus_enable_dma_high_0_un0_n cpu_est_2_2__n \ -# a_c_i_0__n amiga_bus_enable_dma_low_0_un3_n N_261 size_c_i_1__n amiga_bus_enable_dma_low_0_un1_n N_262 pos_clk_un10_sm_amiga_i_n amiga_bus_enable_dma_low_0_un0_n N_251 DS_000_ENABLE_0_sqmuxa_1_i \ -# a0_dma_0_un3_n N_252 un1_DS_000_ENABLE_0_sqmuxa_i a0_dma_0_un1_n N_258 N_157_i a0_dma_0_un0_n N_257 N_160_0 rw_000_dma_0_un3_n \ -# DS_000_ENABLE_1_sqmuxa N_161_0 rw_000_dma_0_un1_n un1_DS_000_ENABLE_0_sqmuxa N_162_0 rw_000_dma_0_un0_n N_102 N_165_i ipl_030_0_0__un3_n N_118 \ -# ipl_030_0_0__un1_n N_119 N_167_i ipl_030_0_0__un0_n N_264 N_166_i ipl_030_0_1__un3_n DS_000_ENABLE_0_sqmuxa_1 ipl_030_0_1__un1_n N_164 \ -# N_168_i ipl_030_0_1__un0_n N_170 as_030_000_sync_0_un3_n N_168 N_170_i as_030_000_sync_0_un1_n N_166 as_030_000_sync_0_un0_n N_167 \ -# N_164_i rw_000_int_0_un3_n N_165 rw_000_int_0_un1_n N_162 N_102_i rw_000_int_0_un0_n N_161 N_264_i a_decode_15__n \ -# N_160 N_79_i N_157 N_78_i a_decode_14__n N_26 N_119_i N_13 N_118_i a_decode_13__n \ -# N_20 N_23 N_255_i a_decode_12__n N_8 N_257_i pos_clk_un9_bg_030_n cpu_est_2_0_2__n a_decode_11__n un1_amiga_bus_enable_low_i \ -# N_258_i un21_fpu_cs_i N_259_i a_decode_10__n sm_amiga_i_2__n cpu_est_2_0_1__n sm_amiga_i_1__n N_262_i a_decode_9__n sm_amiga_i_3__n \ -# N_261_i sm_amiga_i_4__n pos_clk_un9_clk_000_pe_0_n a_decode_8__n sm_amiga_i_6__n N_251_i sm_amiga_i_5__n N_252_0 a_decode_7__n clk_000_d_i_0__n \ -# N_76_i AS_000_INT_i N_17_i a_decode_6__n sm_amiga_i_i_7__n N_36_0 AS_030_i N_98_i a_decode_5__n cpu_est_i_2__n \ -# pos_clk_un31_clk_000_ne_i_n cpu_est_i_0__n N_228_i a_decode_4__n cpu_est_i_3__n N_121_i cpu_est_i_1__n N_120_i a_decode_3__n +#$ PINS 75 AHIGH_27_ AHIGH_26_ SIZE_1_ AHIGH_25_ AHIGH_24_ AHIGH_31_ A_DECODE_22_ A_DECODE_21_ A_DECODE_23_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ IPL_030_2_ A_DECODE_16_ A_DECODE_15_ IPL_2_ A_DECODE_14_ A_DECODE_13_ FC_1_ A_DECODE_12_ AS_030 A_DECODE_11_ AS_000 A_DECODE_10_ RW_000 A_DECODE_9_ DS_030 A_DECODE_8_ UDS_000 A_DECODE_7_ LDS_000 A_DECODE_6_ nEXP_SPACE A_DECODE_5_ BERR A_DECODE_4_ BG_030 A_DECODE_3_ BG_000 A_DECODE_2_ BGACK_030 A_0_ BGACK_000 IPL_030_1_ CLK_030 IPL_030_0_ CLK_000 IPL_1_ CLK_OSZI IPL_0_ CLK_DIV_OUT FC_0_ CLK_EXP A_1_ FPU_CS FPU_SENSE DSACK1 DTACK AVEC E VPA VMA RST RESET RW AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ +#$ NODES 508 N_23_0 UDS_000_c N_19_i N_22_0 LDS_000_c N_18_i N_21_0 size_c_0__n ipl_c_i_2__n N_43_0 \ +# size_c_1__n ipl_c_i_1__n inst_BGACK_030_INTreg N_42_0 vcc_n_n ahigh_c_24__n ipl_c_i_0__n un5_e N_41_0 gnd_n_n \ +# ahigh_c_25__n DTACK_c_i un1_amiga_bus_enable_low N_45_0 un3_as_030 ahigh_c_26__n VPA_c_i un1_UDS_000_INT N_44_0 un1_LDS_000_INT \ +# ahigh_c_27__n N_13_i un1_DS_000_ENABLE_0_sqmuxa N_27_0 un10_ciin ahigh_c_28__n LDS_000_INT_i un21_fpu_cs un1_LDS_000_INT_0 un21_berr \ +# ahigh_c_29__n UDS_000_INT_i un2_ds_030 un1_UDS_000_INT_0 cpu_est_0_ ahigh_c_30__n N_96_0_1 cpu_est_1_ N_96_0_2 cpu_est_2_ \ +# ahigh_c_31__n N_282_0_1 cpu_est_3_ N_282_0_2 inst_AMIGA_BUS_ENABLE_DMA_HIGH N_282_0_3 inst_AMIGA_BUS_ENABLE_DMA_LOW N_282_0_4 inst_AS_030_D0 pos_clk_un10_sm_amiga_i_1_n \ +# inst_AS_030_D1 un10_ciin_1 inst_AS_030_000_SYNC un10_ciin_2 inst_AS_000_DMA un10_ciin_3 inst_DS_000_DMA un10_ciin_4 inst_VMA_INTreg un10_ciin_5 \ +# inst_VPA_D un10_ciin_6 CLK_000_D_3_ un10_ciin_7 inst_DTACK_D0 un10_ciin_8 inst_AMIGA_DS un10_ciin_9 CLK_000_D_1_ un10_ciin_10 \ +# CLK_000_D_0_ un10_ciin_11 inst_CLK_OUT_PRE_50 N_201_1 inst_CLK_OUT_PRE_D N_201_2 IPL_D0_0_ N_131_i_1 IPL_D0_1_ N_134_0_1 \ +# IPL_D0_2_ N_113_i_1 CLK_000_D_2_ N_113_i_2 CLK_000_D_4_ N_144_1 pos_clk_ipl_n N_144_2 SIZE_DMA_0_ N_143_1 \ +# SIZE_DMA_1_ N_143_2 inst_A0_DMA N_163_1 inst_RW_000_DMA N_163_2 inst_UDS_000_INT N_163_3 inst_DS_000_ENABLE un21_fpu_cs_1 \ +# inst_LDS_000_INT a_decode_c_16__n un21_berr_1_0 inst_BGACK_030_INT_D pos_clk_cycle_dma_5_1_1__n SM_AMIGA_6_ a_decode_c_17__n N_199_1 inst_RW_000_INT AS_000_DMA_1_sqmuxa_1 \ +# SM_AMIGA_4_ a_decode_c_18__n N_140_1 SM_AMIGA_1_ N_66_i_1 SM_AMIGA_0_ a_decode_c_19__n N_66_i_2 CYCLE_DMA_0_ N_205_i_1 \ +# CYCLE_DMA_1_ a_decode_c_20__n N_205_i_2 inst_DSACK1_INT N_180_1 inst_AS_000_INT a_decode_c_21__n N_180_2 pos_clk_un9_clk_000_pe_n N_59_i_1 \ +# SM_AMIGA_5_ a_decode_c_22__n N_127_i_1 SM_AMIGA_3_ N_123_i_1 SM_AMIGA_2_ a_decode_c_23__n N_121_i_1 N_119_i_1 N_6 \ +# a_c_0__n N_117_i_1 N_115_i_1 a_c_1__n N_111_i_1 N_165_1 N_13 nEXP_SPACE_c N_162_1 N_148_1 \ +# N_18 BERR_c pos_clk_ipl_1_n N_19 ds_000_dma_0_un3_n N_20 BG_030_c ds_000_dma_0_un1_n ds_000_dma_0_un0_n BG_000DFFreg \ +# as_000_dma_0_un3_n as_000_dma_0_un1_n as_000_dma_0_un0_n BGACK_000_c uds_000_int_0_un3_n uds_000_int_0_un1_n uds_000_int_0_un0_n bg_000_0_un3_n bg_000_0_un1_n bg_000_0_un0_n \ +# CLK_OSZI_c lds_000_int_0_un3_n lds_000_int_0_un1_n lds_000_int_0_un0_n CLK_OUT_INTreg as_030_d1_0_un3_n as_030_d1_0_un1_n as_030_d1_0_un0_n FPU_SENSE_c rw_000_int_0_un3_n \ +# rw_000_int_0_un1_n IPL_030DFF_0_reg rw_000_int_0_un0_n as_030_000_sync_0_un3_n IPL_030DFF_1_reg as_030_000_sync_0_un1_n SM_AMIGA_i_7_ as_030_000_sync_0_un0_n IPL_030DFF_2_reg bgack_030_int_0_un3_n \ +# bgack_030_int_0_un1_n cpu_est_2_1__n ipl_c_0__n bgack_030_int_0_un0_n cpu_est_2_2__n cpu_est_0_1__un3_n cpu_est_2_3__n ipl_c_1__n cpu_est_0_1__un1_n G_105 \ +# cpu_est_0_1__un0_n G_106 ipl_c_2__n cpu_est_0_2__un3_n G_107 cpu_est_0_2__un1_n N_60 cpu_est_0_2__un0_n N_63 DTACK_c \ +# cpu_est_0_3__un3_n N_126 cpu_est_0_3__un1_n N_150 cpu_est_0_3__un0_n N_151 ipl_030_0_0__un3_n N_219 VPA_c ipl_030_0_0__un1_n \ +# N_175 ipl_030_0_0__un0_n ipl_030_0_1__un3_n N_59 RST_c ipl_030_0_1__un1_n N_68 ipl_030_0_1__un0_n N_72 ipl_030_0_2__un3_n \ +# N_80 ipl_030_0_2__un1_n N_93 RW_c ipl_030_0_2__un0_n N_98 ds_000_enable_0_un3_n N_107 fc_c_0__n ds_000_enable_0_un1_n \ +# N_128 ds_000_enable_0_un0_n N_131 fc_c_1__n vma_int_0_un3_n N_134 vma_int_0_un1_n N_135 vma_int_0_un0_n N_141 \ +# AMIGA_BUS_DATA_DIR_c a_decode_15__n N_142 N_143 a_decode_14__n N_144 N_145 a_decode_13__n N_146 N_205_i \ +# N_147 N_140_i a_decode_12__n N_148 AMIGA_DS_i N_149 a_decode_11__n N_154 N_199_i N_155 \ +# N_198_i a_decode_10__n N_162 N_180_i N_165 N_262_i a_decode_9__n N_259 AMIGA_BUS_DATA_DIR_c_0 N_260 \ +# pos_clk_un2_i_n a_decode_8__n N_181 N_3_i N_182 N_32_0 a_decode_7__n N_183 N_4_i N_184 \ +# N_31_0 a_decode_6__n N_185 N_220_i N_186 BG_030_c_i a_decode_5__n N_266 pos_clk_un9_bg_030_0_n N_267 \ +# N_17_i a_decode_4__n N_268 N_24_0 N_190 N_16_i a_decode_3__n N_191 N_25_0 N_201 \ +# N_15_i a_decode_2__n N_202 N_26_0 N_203 N_12_i N_208 N_28_0 N_163 N_11_i \ +# N_282 N_29_0 un21_berr_1 N_5_i N_132 N_30_0 N_96 a_c_i_0__n N_129 size_c_i_1__n \ +# un1_SM_AMIGA_0_sqmuxa_1 pos_clk_un10_sm_amiga_i_n N_169 un1_dsack1_i N_170 N_69_i N_167 N_163_i N_168 N_244_0 \ +# pos_clk_rw_000_int_5_n N_164_i pos_clk_un6_bgack_000_n N_165_i N_274 un11_amiga_bus_enable_high_i N_164 un10_ciin_i N_244 N_60_0 \ +# N_5 N_274_i N_11 pos_clk_un6_bgack_000_0_n N_12 RW_c_i N_15 pos_clk_rw_000_int_5_0_n N_16 N_168_i \ +# N_17 N_167_i pos_clk_un9_bg_030_n G_91 N_170_i N_3 N_169_i N_205 AS_000_DMA_1_sqmuxa N_38_0 \ +# N_4 un1_SM_AMIGA_0_sqmuxa_1_0 N_199 N_282_0 pos_clk_un2_n clk_000_d_i_3__n N_140 N_96_0 N_262 N_129_i \ +# N_198 N_268_i N_180 N_246_i un1_amiga_bus_enable_low_i N_132_0 un21_fpu_cs_i AS_000_i N_142_i BGACK_030_INT_i \ +# N_141_i nEXP_SPACE_i N_135_0 cycle_dma_i_0__n N_134_0 RW_000_i N_131_i CLK_EXP_i LDS_000_c_i cycle_dma_i_1__n \ +# UDS_000_c_i DS_000_DMA_i N_128_i AS_000_DMA_i N_107_i a_i_1__n N_203_i AMIGA_BUS_ENABLE_DMA_LOW_i un1_DS_000_ENABLE_0_sqmuxa_0 a_decode_i_19__n \ +# N_201_i a_decode_i_18__n N_202_i a_decode_i_16__n VMA_INT_i AMIGA_BUS_ENABLE_DMA_HIGH_i N_98_i sm_amiga_i_0__n N_93_i sm_amiga_i_5__n \ +# N_82_i sm_amiga_i_6__n N_80_i sm_amiga_i_i_7__n N_72_i AS_030_i N_68_i AS_000_INT_i N_59_i DSACK1_INT_i \ +# N_190_i sm_amiga_i_1__n N_191_i FPU_SENSE_i AS_030_D1_i N_267_i cpu_est_i_0__n cpu_est_i_3__n N_266_i VPA_D_i \ +# sm_amiga_i_3__n N_186_i sm_amiga_i_4__n cpu_est_i_1__n N_185_i clk_000_d_i_0__n clk_000_d_i_1__n N_183_i AS_030_D0_i N_184_i \ +# cpu_est_i_2__n DTACK_D0_i N_182_i sm_amiga_i_2__n AS_030_000_SYNC_i N_181_i ahigh_i_30__n ahigh_i_31__n N_260_i ahigh_i_28__n \ +# pos_clk_size_dma_6_0_1__n ahigh_i_29__n N_259_i ahigh_i_26__n pos_clk_size_dma_6_0_0__n ahigh_i_27__n N_63_0 ahigh_i_24__n N_155_i ahigh_i_25__n \ +# N_162_i N_187_i un5_e_0 N_188_i N_154_i N_189_i cpu_est_2_0_3__n N_149_i N_208_i cpu_est_2_0_2__n \ +# N_147_i un2_ds_030_i N_148_i N_219_i cpu_est_2_0_1__n N_175_i N_146_i un3_as_030_i N_36_0 AS_030_c \ +# N_145_i N_35_0 AS_000_c N_143_i N_144_i RW_000_c pos_clk_un9_clk_000_pe_0_n N_20_i .model bus68030 -.inputs A_DECODE_23_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF \ - FPU_SENSE.BLIF VPA.BLIF RST.BLIF RESET.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF A_DECODE_20_.BLIF A_DECODE_19_.BLIF A_DECODE_18_.BLIF \ - A_DECODE_17_.BLIF A_DECODE_16_.BLIF A_DECODE_15_.BLIF A_DECODE_14_.BLIF A_DECODE_13_.BLIF A_DECODE_12_.BLIF A_DECODE_11_.BLIF A_DECODE_10_.BLIF A_DECODE_9_.BLIF \ - A_DECODE_8_.BLIF A_DECODE_7_.BLIF A_DECODE_6_.BLIF A_DECODE_5_.BLIF A_DECODE_4_.BLIF A_DECODE_3_.BLIF A_DECODE_2_.BLIF IPL_1_.BLIF IPL_0_.BLIF \ - FC_0_.BLIF A_1_.BLIF SIZE_1_.BLIF AHIGH_31_.BLIF AS_030.BLIF AS_000.BLIF RW_000.BLIF UDS_000.BLIF LDS_000.BLIF BERR.BLIF DTACK.BLIF RW.BLIF SIZE_0_.BLIF AHIGH_30_.BLIF AHIGH_29_.BLIF AHIGH_28_.BLIF AHIGH_27_.BLIF AHIGH_26_.BLIF AHIGH_25_.BLIF AHIGH_24_.BLIF A_0_.BLIF clk_000_d_i_1__n.BLIF VPA_D_i.BLIF N_125_i.BLIF a_decode_2__n.BLIF VMA_INT_i.BLIF N_124_i.BLIF sm_amiga_i_0__n.BLIF \ - N_53_0.BLIF rst_dly_i_2__n.BLIF N_134_i.BLIF rst_dly_i_1__n.BLIF N_270_0.BLIF rst_dly_i_0__n.BLIF N_77_i.BLIF DSACK1_INT_i.BLIF N_87_i.BLIF \ - inst_BGACK_030_INTreg.BLIF N_137_i_0.BLIF N_112_i.BLIF vcc_n_n.BLIF DTACK_D0_i.BLIF N_113_i.BLIF inst_VMA_INTreg.BLIF BGACK_030_INT_i.BLIF N_114_i.BLIF \ - gnd_n_n.BLIF nEXP_SPACE_i.BLIF un1_amiga_bus_enable_low.BLIF AS_000_DMA_i.BLIF N_109_i.BLIF un7_as_030.BLIF RW_000_i.BLIF N_108_i.BLIF un1_LDS_000_INT.BLIF \ - clk_030_pe_i_1__n.BLIF N_111_i.BLIF un1_UDS_000_INT.BLIF DS_000_DMA_0_sqmuxa_i.BLIF N_265_2_0.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF pos_clk_un4_rw_000_i_n.BLIF un10_ciin.BLIF AS_000_i.BLIF \ - un1_as_000_i.BLIF un21_fpu_cs.BLIF AMIGA_DS_i.BLIF VPA_c_i.BLIF un21_berr.BLIF pos_clk_un3_clk_out_int_i_n.BLIF N_52_0.BLIF un6_ds_030.BLIF cycle_dma_i_0__n.BLIF \ - DTACK_c_i.BLIF un13_ciin.BLIF cycle_dma_i_1__n.BLIF N_48_0.BLIF cpu_est_1_.BLIF pos_clk_as_000_dma6_i_n.BLIF un3_ahigh_i.BLIF cpu_est_2_.BLIF DS_000_DMA_i.BLIF \ - pos_clk_un4_bgack_000_i_n.BLIF cpu_est_3_.BLIF CLK_EXP_i.BLIF pos_clk_un6_bgack_000_0_n.BLIF cpu_est_0_.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF N_7_i.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF ahigh_i_25__n.BLIF \ - N_41_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF ahigh_i_24__n.BLIF pos_clk_un1_bgack_030_int_0_n.BLIF inst_AS_030_D0.BLIF ahigh_i_27__n.BLIF pos_clk_un12_clk_out_int_0_n.BLIF inst_AS_030_000_SYNC.BLIF ahigh_i_26__n.BLIF \ - pos_clk_un3_0_n.BLIF inst_BGACK_030_INT_D.BLIF ahigh_i_29__n.BLIF pos_clk_un15_bgack_030_int_i_n.BLIF inst_AS_000_DMA.BLIF ahigh_i_28__n.BLIF N_3_i.BLIF inst_DS_000_DMA.BLIF ahigh_i_31__n.BLIF \ - N_43_0.BLIF inst_VPA_D.BLIF ahigh_i_30__n.BLIF N_4_i.BLIF CLK_000_D_3_.BLIF a_i_1__n.BLIF N_42_0.BLIF inst_DTACK_D0.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF \ - un6_amiga_bus_data_dir_i.BLIF inst_RESET_OUT.BLIF AS_030_D0_i.BLIF un12_amiga_bus_data_dir_m_i.BLIF CLK_030_PE_1_.BLIF un10_ciin_i.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF inst_AMIGA_DS.BLIF FPU_SENSE_i.BLIF \ - N_22_i.BLIF CLK_000_D_1_.BLIF AS_030_000_SYNC_i.BLIF N_31_0.BLIF CLK_000_D_0_.BLIF a_decode_i_16__n.BLIF N_21_i.BLIF inst_CLK_OUT_PRE_50.BLIF a_decode_i_18__n.BLIF \ - N_32_0.BLIF inst_CLK_OUT_PRE_D.BLIF a_decode_i_19__n.BLIF N_19_i.BLIF IPL_D0_0_.BLIF N_224_i.BLIF N_34_0.BLIF IPL_D0_1_.BLIF N_225_i.BLIF \ - N_18_i.BLIF IPL_D0_2_.BLIF N_226_i.BLIF N_35_0.BLIF CLK_000_D_2_.BLIF pos_clk_un5_bgack_030_int_d_i_n.BLIF CLK_000_D_4_.BLIF pos_clk_amiga_bus_enable_dma_high_3_0_n.BLIF pos_clk_un6_bg_030_n.BLIF \ - pos_clk_amiga_bus_enable_dma_low_3_0_n.BLIF pos_clk_ipl_n.BLIF pos_clk_rw_000_dma_3_0_n.BLIF inst_LDS_000_INT.BLIF un13_ciin_i.BLIF UDS_000_c_i.BLIF inst_DS_000_ENABLE.BLIF un6_ds_030_i.BLIF LDS_000_c_i.BLIF \ - inst_UDS_000_INT.BLIF N_123_i.BLIF N_86_i.BLIF SM_AMIGA_6_.BLIF N_122_i.BLIF N_129_i.BLIF SM_AMIGA_4_.BLIF un7_as_030_i.BLIF N_130_i.BLIF \ - SM_AMIGA_1_.BLIF AS_030_c.BLIF un11_amiga_bus_enable_high_i.BLIF SM_AMIGA_0_.BLIF N_117_i.BLIF SIZE_DMA_0_.BLIF AS_000_c.BLIF N_46_0.BLIF SIZE_DMA_1_.BLIF \ - N_107_i.BLIF CYCLE_DMA_0_.BLIF RW_000_c.BLIF pos_clk_size_dma_6_0_0__n.BLIF CYCLE_DMA_1_.BLIF N_106_i.BLIF CLK_030_PE_0_.BLIF pos_clk_size_dma_6_0_1__n.BLIF inst_RW_000_INT.BLIF \ - UDS_000_c.BLIF N_16_i.BLIF inst_RW_000_DMA.BLIF N_254_i.BLIF RST_DLY_0_.BLIF LDS_000_c.BLIF N_263_i.BLIF RST_DLY_1_.BLIF N_250_i.BLIF \ - RST_DLY_2_.BLIF size_c_0__n.BLIF N_256_i.BLIF inst_A0_DMA.BLIF N_189_i.BLIF pos_clk_rw_000_int_5_n.BLIF size_c_1__n.BLIF N_101_i.BLIF inst_DSACK1_INT.BLIF \ - inst_AS_000_INT.BLIF ahigh_c_24__n.BLIF N_103_i.BLIF SM_AMIGA_5_.BLIF N_104_i.BLIF SM_AMIGA_3_.BLIF ahigh_c_25__n.BLIF SM_AMIGA_2_.BLIF N_105_i.BLIF \ - ahigh_c_26__n.BLIF N_115_i.BLIF ahigh_c_27__n.BLIF N_116_i.BLIF ahigh_c_28__n.BLIF N_131_i.BLIF N_277_i.BLIF ahigh_c_29__n.BLIF N_64_0.BLIF \ - N_91_0.BLIF ahigh_c_30__n.BLIF N_159_0.BLIF N_14.BLIF N_85_i.BLIF N_15.BLIF ahigh_c_31__n.BLIF un1_SM_AMIGA_0_sqmuxa_1_0.BLIF N_24.BLIF \ - RW_c_i.BLIF N_25.BLIF pos_clk_rw_000_int_5_0_n.BLIF clk_000_d_i_3__n.BLIF N_25_i.BLIF N_28_0.BLIF N_24_i.BLIF N_27_0.BLIF ipl_c_i_1__n.BLIF \ - N_50_0.BLIF ipl_c_i_0__n.BLIF N_49_0.BLIF N_14_i.BLIF N_39_0.BLIF N_15_i.BLIF N_38_0.BLIF N_91_0_1.BLIF N_91_0_2.BLIF \ - N_91_0_3.BLIF N_265_i_1.BLIF N_266_i_1.BLIF N_266_i_2.BLIF N_138_i_1.BLIF N_148_i_1.BLIF N_144_i_1.BLIF N_142_i_1.BLIF N_140_i_1.BLIF \ - SM_AMIGA_i_7_.BLIF pos_clk_un10_sm_amiga_i_1_n.BLIF N_76.BLIF N_85_i_1.BLIF G_122.BLIF N_85_i_2.BLIF G_123.BLIF a_decode_c_16__n.BLIF N_277_1.BLIF \ - G_124.BLIF N_277_2.BLIF un1_rst_2_1.BLIF a_decode_c_17__n.BLIF N_277_3.BLIF cpu_est_0_0_.BLIF N_277_4.BLIF N_64.BLIF a_decode_c_18__n.BLIF \ - N_277_5.BLIF N_122.BLIF un10_ciin_1.BLIF N_123.BLIF a_decode_c_19__n.BLIF un10_ciin_2.BLIF N_132.BLIF un10_ciin_3.BLIF N_133.BLIF \ - a_decode_c_20__n.BLIF un10_ciin_4.BLIF N_274.BLIF un10_ciin_5.BLIF N_276.BLIF a_decode_c_21__n.BLIF un10_ciin_6.BLIF N_77.BLIF un10_ciin_7.BLIF \ - N_79.BLIF a_decode_c_22__n.BLIF un10_ciin_8.BLIF N_78.BLIF un10_ciin_9.BLIF N_263.BLIF a_decode_c_23__n.BLIF un10_ciin_10.BLIF N_108.BLIF \ - un10_ciin_11.BLIF N_114.BLIF a_c_0__n.BLIF un6_amiga_bus_data_dir_1.BLIF N_85.BLIF un6_amiga_bus_data_dir_2.BLIF N_104.BLIF a_c_1__n.BLIF pos_clk_as_000_dma6_1_n.BLIF \ - N_91.BLIF pos_clk_as_000_dma6_2_n.BLIF N_131.BLIF nEXP_SPACE_c.BLIF DS_000_DMA_1_sqmuxa_1.BLIF N_277.BLIF pos_clk_un4_rw_000_1_n.BLIF N_130.BLIF BERR_c.BLIF \ - pos_clk_un4_rw_000_2_n.BLIF N_115.BLIF pos_clk_un13_clk_out_int_1_n.BLIF N_116.BLIF BG_030_c.BLIF N_125_1.BLIF N_105.BLIF N_116_1.BLIF N_103.BLIF \ - BG_000DFFreg.BLIF pos_clk_un29_clk_000_ne_1_1_n.BLIF N_101.BLIF pos_clk_un29_clk_000_ne_1_2_n.BLIF N_259.BLIF pos_clk_un29_clk_000_ne_1_3_n.BLIF N_255.BLIF BGACK_000_c.BLIF N_261_1.BLIF \ - N_256.BLIF N_261_2.BLIF N_254.BLIF CLK_030_c.BLIF N_262_1.BLIF N_16.BLIF N_262_2.BLIF N_106.BLIF DS_000_ENABLE_0_sqmuxa_1_1.BLIF \ - N_86.BLIF N_259_1.BLIF N_107.BLIF CLK_OSZI_c.BLIF N_250_i_1.BLIF N_117.BLIF N_189_i_1.BLIF pos_clk_a0_dma_3_n.BLIF pos_clk_un6_bg_030_1_n.BLIF \ - N_129.BLIF CLK_OUT_INTreg.BLIF N_108_1.BLIF pos_clk_size_dma_6_1__n.BLIF N_114_1.BLIF pos_clk_size_dma_6_0__n.BLIF un21_berr_1.BLIF pos_clk_rw_000_dma_3_n.BLIF FPU_SENSE_c.BLIF \ - un21_fpu_cs_1.BLIF pos_clk_amiga_bus_enable_dma_low_3_n.BLIF N_130_1.BLIF pos_clk_amiga_bus_enable_dma_high_3_n.BLIF IPL_030DFF_0_reg.BLIF N_136_i_1.BLIF SIZE_DMA_3_sqmuxa.BLIF N_152_i_1.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF \ - IPL_030DFF_1_reg.BLIF N_146_i_1.BLIF N_18.BLIF N_267_i_1.BLIF N_19.BLIF IPL_030DFF_2_reg.BLIF pos_clk_ipl_1_n.BLIF N_21.BLIF bg_000_0_un3_n.BLIF \ - N_22.BLIF ipl_c_0__n.BLIF bg_000_0_un1_n.BLIF un6_amiga_bus_data_dir.BLIF bg_000_0_un0_n.BLIF un12_amiga_bus_data_dir_m.BLIF ipl_c_1__n.BLIF uds_000_int_0_un3_n.BLIF pos_clk_un3_clk_out_int_n.BLIF \ - uds_000_int_0_un1_n.BLIF N_3.BLIF ipl_c_2__n.BLIF uds_000_int_0_un0_n.BLIF pos_clk_as_000_dma6_n.BLIF lds_000_int_0_un3_n.BLIF DS_000_DMA_1_sqmuxa.BLIF lds_000_int_0_un1_n.BLIF N_4.BLIF \ - DTACK_c.BLIF lds_000_int_0_un0_n.BLIF AS_000_DMA_1_sqmuxa.BLIF ds_000_enable_0_un3_n.BLIF un1_rst_2.BLIF ds_000_enable_0_un1_n.BLIF G_97.BLIF ds_000_enable_0_un0_n.BLIF N_199.BLIF \ - VPA_c.BLIF ipl_030_0_2__un3_n.BLIF pos_clk_un13_bgack_030_int_n.BLIF ipl_030_0_2__un1_n.BLIF N_205.BLIF ipl_030_0_2__un0_n.BLIF pos_clk_un13_clk_out_int_n.BLIF RST_c.BLIF vma_int_0_un3_n.BLIF \ - pos_clk_un15_bgack_030_int_n.BLIF vma_int_0_un1_n.BLIF pos_clk_un3_n.BLIF RESET_c.BLIF vma_int_0_un0_n.BLIF pos_clk_un12_clk_out_int_n.BLIF cpu_est_0_1__un3_n.BLIF pos_clk_un1_bgack_030_int_n.BLIF RW_c.BLIF \ - cpu_est_0_1__un1_n.BLIF DS_000_DMA_0_sqmuxa.BLIF cpu_est_0_1__un0_n.BLIF un1_rst_3.BLIF fc_c_0__n.BLIF cpu_est_0_2__un3_n.BLIF G_95.BLIF cpu_est_0_2__un1_n.BLIF G_101.BLIF \ - fc_c_1__n.BLIF cpu_est_0_2__un0_n.BLIF G_103.BLIF cpu_est_0_3__un3_n.BLIF pos_clk_un4_rw_000_n.BLIF cpu_est_0_3__un1_n.BLIF N_7.BLIF AMIGA_BUS_DATA_DIR_c.BLIF cpu_est_0_3__un0_n.BLIF \ - pos_clk_un6_bgack_000_n.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un3_n.BLIF pos_clk_un4_bgack_000_n.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un1_n.BLIF N_265_2.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un0_n.BLIF N_111.BLIF bgack_030_int_0_un3_n.BLIF N_109.BLIF \ - BG_030_c_i.BLIF bgack_030_int_0_un1_n.BLIF N_113.BLIF pos_clk_un6_bg_030_i_n.BLIF bgack_030_int_0_un0_n.BLIF N_112.BLIF pos_clk_un9_bg_030_0_n.BLIF ds_000_dma_0_un3_n.BLIF N_98.BLIF \ - UDS_000_INT_i.BLIF ds_000_dma_0_un1_n.BLIF pos_clk_un29_clk_000_ne_1_n.BLIF un1_UDS_000_INT_0.BLIF ds_000_dma_0_un0_n.BLIF N_87.BLIF LDS_000_INT_i.BLIF as_000_dma_0_un3_n.BLIF N_270.BLIF \ - un1_LDS_000_INT_0.BLIF as_000_dma_0_un1_n.BLIF N_134.BLIF N_23_i.BLIF as_000_dma_0_un0_n.BLIF N_125.BLIF N_30_0.BLIF size_dma_0_1__un3_n.BLIF N_124.BLIF \ - N_20_i.BLIF size_dma_0_1__un1_n.BLIF N_121.BLIF N_33_0.BLIF size_dma_0_1__un0_n.BLIF N_120.BLIF N_13_i.BLIF size_dma_0_0__un3_n.BLIF N_137.BLIF \ - N_40_0.BLIF size_dma_0_0__un1_n.BLIF pos_clk_un31_clk_000_ne_n.BLIF ipl_c_i_2__n.BLIF size_dma_0_0__un0_n.BLIF N_17.BLIF N_51_0.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF pos_clk_un9_clk_000_pe_n.BLIF \ - N_26_i.BLIF amiga_bus_enable_dma_high_0_un1_n.BLIF cpu_est_2_1__n.BLIF N_29_0.BLIF amiga_bus_enable_dma_high_0_un0_n.BLIF cpu_est_2_2__n.BLIF a_c_i_0__n.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF N_261.BLIF \ - size_c_i_1__n.BLIF amiga_bus_enable_dma_low_0_un1_n.BLIF N_262.BLIF pos_clk_un10_sm_amiga_i_n.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF N_251.BLIF DS_000_ENABLE_0_sqmuxa_1_i.BLIF a0_dma_0_un3_n.BLIF N_252.BLIF \ - un1_DS_000_ENABLE_0_sqmuxa_i.BLIF a0_dma_0_un1_n.BLIF N_258.BLIF N_157_i.BLIF a0_dma_0_un0_n.BLIF N_257.BLIF N_160_0.BLIF rw_000_dma_0_un3_n.BLIF DS_000_ENABLE_1_sqmuxa.BLIF \ - N_161_0.BLIF rw_000_dma_0_un1_n.BLIF un1_DS_000_ENABLE_0_sqmuxa.BLIF N_162_0.BLIF rw_000_dma_0_un0_n.BLIF N_102.BLIF N_165_i.BLIF ipl_030_0_0__un3_n.BLIF N_118.BLIF \ - ipl_030_0_0__un1_n.BLIF N_119.BLIF N_167_i.BLIF ipl_030_0_0__un0_n.BLIF N_264.BLIF N_166_i.BLIF ipl_030_0_1__un3_n.BLIF DS_000_ENABLE_0_sqmuxa_1.BLIF ipl_030_0_1__un1_n.BLIF \ - N_164.BLIF N_168_i.BLIF ipl_030_0_1__un0_n.BLIF N_170.BLIF as_030_000_sync_0_un3_n.BLIF N_168.BLIF N_170_i.BLIF as_030_000_sync_0_un1_n.BLIF N_166.BLIF \ - as_030_000_sync_0_un0_n.BLIF N_167.BLIF N_164_i.BLIF rw_000_int_0_un3_n.BLIF N_165.BLIF rw_000_int_0_un1_n.BLIF N_162.BLIF N_102_i.BLIF rw_000_int_0_un0_n.BLIF \ - N_161.BLIF N_264_i.BLIF a_decode_15__n.BLIF N_160.BLIF N_79_i.BLIF N_157.BLIF N_78_i.BLIF a_decode_14__n.BLIF N_26.BLIF \ - N_119_i.BLIF N_13.BLIF N_118_i.BLIF a_decode_13__n.BLIF N_20.BLIF N_23.BLIF N_255_i.BLIF a_decode_12__n.BLIF N_8.BLIF \ - N_257_i.BLIF pos_clk_un9_bg_030_n.BLIF cpu_est_2_0_2__n.BLIF a_decode_11__n.BLIF un1_amiga_bus_enable_low_i.BLIF N_258_i.BLIF un21_fpu_cs_i.BLIF N_259_i.BLIF a_decode_10__n.BLIF \ - sm_amiga_i_2__n.BLIF cpu_est_2_0_1__n.BLIF sm_amiga_i_1__n.BLIF N_262_i.BLIF a_decode_9__n.BLIF sm_amiga_i_3__n.BLIF N_261_i.BLIF sm_amiga_i_4__n.BLIF pos_clk_un9_clk_000_pe_0_n.BLIF \ - a_decode_8__n.BLIF sm_amiga_i_6__n.BLIF N_251_i.BLIF sm_amiga_i_5__n.BLIF N_252_0.BLIF a_decode_7__n.BLIF clk_000_d_i_0__n.BLIF N_76_i.BLIF AS_000_INT_i.BLIF \ - N_17_i.BLIF a_decode_6__n.BLIF sm_amiga_i_i_7__n.BLIF N_36_0.BLIF AS_030_i.BLIF N_98_i.BLIF a_decode_5__n.BLIF cpu_est_i_2__n.BLIF pos_clk_un31_clk_000_ne_i_n.BLIF \ - cpu_est_i_0__n.BLIF N_228_i.BLIF a_decode_4__n.BLIF cpu_est_i_3__n.BLIF N_121_i.BLIF cpu_est_i_1__n.BLIF N_120_i.BLIF a_decode_3__n.BLIF AS_030.PIN \ - AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN \ - AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN DTACK.PIN RW.PIN +.inputs A_DECODE_23_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF BGACK_000.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF \ + DTACK.BLIF VPA.BLIF RST.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF A_DECODE_20_.BLIF A_DECODE_19_.BLIF A_DECODE_18_.BLIF A_DECODE_17_.BLIF \ + A_DECODE_16_.BLIF A_DECODE_15_.BLIF A_DECODE_14_.BLIF A_DECODE_13_.BLIF A_DECODE_12_.BLIF A_DECODE_11_.BLIF A_DECODE_10_.BLIF A_DECODE_9_.BLIF A_DECODE_8_.BLIF \ + A_DECODE_7_.BLIF A_DECODE_6_.BLIF A_DECODE_5_.BLIF A_DECODE_4_.BLIF A_DECODE_3_.BLIF A_DECODE_2_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF \ + A_1_.BLIF SIZE_1_.BLIF AHIGH_31_.BLIF AS_030.BLIF AS_000.BLIF RW_000.BLIF UDS_000.BLIF LDS_000.BLIF BERR.BLIF RW.BLIF SIZE_0_.BLIF AHIGH_30_.BLIF AHIGH_29_.BLIF AHIGH_28_.BLIF AHIGH_27_.BLIF AHIGH_26_.BLIF AHIGH_25_.BLIF AHIGH_24_.BLIF A_0_.BLIF N_23_0.BLIF UDS_000_c.BLIF N_19_i.BLIF N_22_0.BLIF LDS_000_c.BLIF N_18_i.BLIF N_21_0.BLIF size_c_0__n.BLIF \ + ipl_c_i_2__n.BLIF N_43_0.BLIF size_c_1__n.BLIF ipl_c_i_1__n.BLIF inst_BGACK_030_INTreg.BLIF N_42_0.BLIF vcc_n_n.BLIF ahigh_c_24__n.BLIF ipl_c_i_0__n.BLIF \ + un5_e.BLIF N_41_0.BLIF gnd_n_n.BLIF ahigh_c_25__n.BLIF DTACK_c_i.BLIF un1_amiga_bus_enable_low.BLIF N_45_0.BLIF un3_as_030.BLIF ahigh_c_26__n.BLIF \ + VPA_c_i.BLIF un1_UDS_000_INT.BLIF N_44_0.BLIF un1_LDS_000_INT.BLIF ahigh_c_27__n.BLIF N_13_i.BLIF un1_DS_000_ENABLE_0_sqmuxa.BLIF N_27_0.BLIF un10_ciin.BLIF \ + ahigh_c_28__n.BLIF LDS_000_INT_i.BLIF un21_fpu_cs.BLIF un1_LDS_000_INT_0.BLIF un21_berr.BLIF ahigh_c_29__n.BLIF UDS_000_INT_i.BLIF un2_ds_030.BLIF un1_UDS_000_INT_0.BLIF \ + cpu_est_0_.BLIF ahigh_c_30__n.BLIF N_96_0_1.BLIF cpu_est_1_.BLIF N_96_0_2.BLIF cpu_est_2_.BLIF ahigh_c_31__n.BLIF N_282_0_1.BLIF cpu_est_3_.BLIF \ + N_282_0_2.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF N_282_0_3.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF N_282_0_4.BLIF inst_AS_030_D0.BLIF pos_clk_un10_sm_amiga_i_1_n.BLIF inst_AS_030_D1.BLIF un10_ciin_1.BLIF \ + inst_AS_030_000_SYNC.BLIF un10_ciin_2.BLIF inst_AS_000_DMA.BLIF un10_ciin_3.BLIF inst_DS_000_DMA.BLIF un10_ciin_4.BLIF inst_VMA_INTreg.BLIF un10_ciin_5.BLIF inst_VPA_D.BLIF \ + un10_ciin_6.BLIF CLK_000_D_3_.BLIF un10_ciin_7.BLIF inst_DTACK_D0.BLIF un10_ciin_8.BLIF inst_AMIGA_DS.BLIF un10_ciin_9.BLIF CLK_000_D_1_.BLIF un10_ciin_10.BLIF \ + CLK_000_D_0_.BLIF un10_ciin_11.BLIF inst_CLK_OUT_PRE_50.BLIF N_201_1.BLIF inst_CLK_OUT_PRE_D.BLIF N_201_2.BLIF IPL_D0_0_.BLIF N_131_i_1.BLIF IPL_D0_1_.BLIF \ + N_134_0_1.BLIF IPL_D0_2_.BLIF N_113_i_1.BLIF CLK_000_D_2_.BLIF N_113_i_2.BLIF CLK_000_D_4_.BLIF N_144_1.BLIF pos_clk_ipl_n.BLIF N_144_2.BLIF \ + SIZE_DMA_0_.BLIF N_143_1.BLIF SIZE_DMA_1_.BLIF N_143_2.BLIF inst_A0_DMA.BLIF N_163_1.BLIF inst_RW_000_DMA.BLIF N_163_2.BLIF inst_UDS_000_INT.BLIF \ + N_163_3.BLIF inst_DS_000_ENABLE.BLIF un21_fpu_cs_1.BLIF inst_LDS_000_INT.BLIF a_decode_c_16__n.BLIF un21_berr_1_0.BLIF inst_BGACK_030_INT_D.BLIF pos_clk_cycle_dma_5_1_1__n.BLIF SM_AMIGA_6_.BLIF \ + a_decode_c_17__n.BLIF N_199_1.BLIF inst_RW_000_INT.BLIF AS_000_DMA_1_sqmuxa_1.BLIF SM_AMIGA_4_.BLIF a_decode_c_18__n.BLIF N_140_1.BLIF SM_AMIGA_1_.BLIF N_66_i_1.BLIF \ + SM_AMIGA_0_.BLIF a_decode_c_19__n.BLIF N_66_i_2.BLIF CYCLE_DMA_0_.BLIF N_205_i_1.BLIF CYCLE_DMA_1_.BLIF a_decode_c_20__n.BLIF N_205_i_2.BLIF inst_DSACK1_INT.BLIF \ + N_180_1.BLIF inst_AS_000_INT.BLIF a_decode_c_21__n.BLIF N_180_2.BLIF pos_clk_un9_clk_000_pe_n.BLIF N_59_i_1.BLIF SM_AMIGA_5_.BLIF a_decode_c_22__n.BLIF N_127_i_1.BLIF \ + SM_AMIGA_3_.BLIF N_123_i_1.BLIF SM_AMIGA_2_.BLIF a_decode_c_23__n.BLIF N_121_i_1.BLIF N_119_i_1.BLIF N_6.BLIF a_c_0__n.BLIF N_117_i_1.BLIF \ + N_115_i_1.BLIF a_c_1__n.BLIF N_111_i_1.BLIF N_165_1.BLIF N_13.BLIF nEXP_SPACE_c.BLIF N_162_1.BLIF N_148_1.BLIF N_18.BLIF \ + BERR_c.BLIF pos_clk_ipl_1_n.BLIF N_19.BLIF ds_000_dma_0_un3_n.BLIF N_20.BLIF BG_030_c.BLIF ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF BG_000DFFreg.BLIF \ + as_000_dma_0_un3_n.BLIF as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF BGACK_000_c.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF bg_000_0_un3_n.BLIF bg_000_0_un1_n.BLIF \ + bg_000_0_un0_n.BLIF CLK_OSZI_c.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF CLK_OUT_INTreg.BLIF as_030_d1_0_un3_n.BLIF as_030_d1_0_un1_n.BLIF as_030_d1_0_un0_n.BLIF \ + FPU_SENSE_c.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un1_n.BLIF IPL_030DFF_0_reg.BLIF rw_000_int_0_un0_n.BLIF as_030_000_sync_0_un3_n.BLIF IPL_030DFF_1_reg.BLIF as_030_000_sync_0_un1_n.BLIF SM_AMIGA_i_7_.BLIF \ + as_030_000_sync_0_un0_n.BLIF IPL_030DFF_2_reg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un1_n.BLIF cpu_est_2_1__n.BLIF ipl_c_0__n.BLIF bgack_030_int_0_un0_n.BLIF cpu_est_2_2__n.BLIF cpu_est_0_1__un3_n.BLIF \ + cpu_est_2_3__n.BLIF ipl_c_1__n.BLIF cpu_est_0_1__un1_n.BLIF G_105.BLIF cpu_est_0_1__un0_n.BLIF G_106.BLIF ipl_c_2__n.BLIF cpu_est_0_2__un3_n.BLIF G_107.BLIF \ + cpu_est_0_2__un1_n.BLIF N_60.BLIF cpu_est_0_2__un0_n.BLIF N_63.BLIF DTACK_c.BLIF cpu_est_0_3__un3_n.BLIF N_126.BLIF cpu_est_0_3__un1_n.BLIF N_150.BLIF \ + cpu_est_0_3__un0_n.BLIF N_151.BLIF ipl_030_0_0__un3_n.BLIF N_219.BLIF VPA_c.BLIF ipl_030_0_0__un1_n.BLIF N_175.BLIF ipl_030_0_0__un0_n.BLIF ipl_030_0_1__un3_n.BLIF \ + N_59.BLIF RST_c.BLIF ipl_030_0_1__un1_n.BLIF N_68.BLIF ipl_030_0_1__un0_n.BLIF N_72.BLIF ipl_030_0_2__un3_n.BLIF N_80.BLIF ipl_030_0_2__un1_n.BLIF \ + N_93.BLIF RW_c.BLIF ipl_030_0_2__un0_n.BLIF N_98.BLIF ds_000_enable_0_un3_n.BLIF N_107.BLIF fc_c_0__n.BLIF ds_000_enable_0_un1_n.BLIF N_128.BLIF \ + ds_000_enable_0_un0_n.BLIF N_131.BLIF fc_c_1__n.BLIF vma_int_0_un3_n.BLIF N_134.BLIF vma_int_0_un1_n.BLIF N_135.BLIF vma_int_0_un0_n.BLIF N_141.BLIF \ + AMIGA_BUS_DATA_DIR_c.BLIF a_decode_15__n.BLIF N_142.BLIF N_143.BLIF a_decode_14__n.BLIF N_144.BLIF N_145.BLIF a_decode_13__n.BLIF N_146.BLIF \ + N_205_i.BLIF N_147.BLIF N_140_i.BLIF a_decode_12__n.BLIF N_148.BLIF AMIGA_DS_i.BLIF N_149.BLIF a_decode_11__n.BLIF N_154.BLIF \ + N_199_i.BLIF N_155.BLIF N_198_i.BLIF a_decode_10__n.BLIF N_162.BLIF N_180_i.BLIF N_165.BLIF N_262_i.BLIF a_decode_9__n.BLIF \ + N_259.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF N_260.BLIF pos_clk_un2_i_n.BLIF a_decode_8__n.BLIF N_181.BLIF N_3_i.BLIF N_182.BLIF N_32_0.BLIF \ + a_decode_7__n.BLIF N_183.BLIF N_4_i.BLIF N_184.BLIF N_31_0.BLIF a_decode_6__n.BLIF N_185.BLIF N_220_i.BLIF N_186.BLIF \ + BG_030_c_i.BLIF a_decode_5__n.BLIF N_266.BLIF pos_clk_un9_bg_030_0_n.BLIF N_267.BLIF N_17_i.BLIF a_decode_4__n.BLIF N_268.BLIF N_24_0.BLIF \ + N_190.BLIF N_16_i.BLIF a_decode_3__n.BLIF N_191.BLIF N_25_0.BLIF N_201.BLIF N_15_i.BLIF a_decode_2__n.BLIF N_202.BLIF \ + N_26_0.BLIF N_203.BLIF N_12_i.BLIF N_208.BLIF N_28_0.BLIF N_163.BLIF N_11_i.BLIF N_282.BLIF N_29_0.BLIF \ + un21_berr_1.BLIF N_5_i.BLIF N_132.BLIF N_30_0.BLIF N_96.BLIF a_c_i_0__n.BLIF N_129.BLIF size_c_i_1__n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF \ + pos_clk_un10_sm_amiga_i_n.BLIF N_169.BLIF un1_dsack1_i.BLIF N_170.BLIF N_69_i.BLIF N_167.BLIF N_163_i.BLIF N_168.BLIF N_244_0.BLIF \ + pos_clk_rw_000_int_5_n.BLIF N_164_i.BLIF pos_clk_un6_bgack_000_n.BLIF N_165_i.BLIF N_274.BLIF un11_amiga_bus_enable_high_i.BLIF N_164.BLIF un10_ciin_i.BLIF N_244.BLIF \ + N_60_0.BLIF N_5.BLIF N_274_i.BLIF N_11.BLIF pos_clk_un6_bgack_000_0_n.BLIF N_12.BLIF RW_c_i.BLIF N_15.BLIF pos_clk_rw_000_int_5_0_n.BLIF \ + N_16.BLIF N_168_i.BLIF N_17.BLIF N_167_i.BLIF pos_clk_un9_bg_030_n.BLIF G_91.BLIF N_170_i.BLIF N_3.BLIF N_169_i.BLIF \ + N_205.BLIF AS_000_DMA_1_sqmuxa.BLIF N_38_0.BLIF N_4.BLIF un1_SM_AMIGA_0_sqmuxa_1_0.BLIF N_199.BLIF N_282_0.BLIF pos_clk_un2_n.BLIF clk_000_d_i_3__n.BLIF \ + N_140.BLIF N_96_0.BLIF N_262.BLIF N_129_i.BLIF N_198.BLIF N_268_i.BLIF N_180.BLIF N_246_i.BLIF un1_amiga_bus_enable_low_i.BLIF \ + N_132_0.BLIF un21_fpu_cs_i.BLIF AS_000_i.BLIF N_142_i.BLIF BGACK_030_INT_i.BLIF N_141_i.BLIF nEXP_SPACE_i.BLIF N_135_0.BLIF cycle_dma_i_0__n.BLIF \ + N_134_0.BLIF RW_000_i.BLIF N_131_i.BLIF CLK_EXP_i.BLIF LDS_000_c_i.BLIF cycle_dma_i_1__n.BLIF UDS_000_c_i.BLIF DS_000_DMA_i.BLIF N_128_i.BLIF \ + AS_000_DMA_i.BLIF N_107_i.BLIF a_i_1__n.BLIF N_203_i.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_0.BLIF a_decode_i_19__n.BLIF N_201_i.BLIF a_decode_i_18__n.BLIF \ + N_202_i.BLIF a_decode_i_16__n.BLIF VMA_INT_i.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF N_98_i.BLIF sm_amiga_i_0__n.BLIF N_93_i.BLIF sm_amiga_i_5__n.BLIF N_82_i.BLIF \ + sm_amiga_i_6__n.BLIF N_80_i.BLIF sm_amiga_i_i_7__n.BLIF N_72_i.BLIF AS_030_i.BLIF N_68_i.BLIF AS_000_INT_i.BLIF N_59_i.BLIF DSACK1_INT_i.BLIF \ + N_190_i.BLIF sm_amiga_i_1__n.BLIF N_191_i.BLIF FPU_SENSE_i.BLIF AS_030_D1_i.BLIF N_267_i.BLIF cpu_est_i_0__n.BLIF cpu_est_i_3__n.BLIF N_266_i.BLIF \ + VPA_D_i.BLIF sm_amiga_i_3__n.BLIF N_186_i.BLIF sm_amiga_i_4__n.BLIF cpu_est_i_1__n.BLIF N_185_i.BLIF clk_000_d_i_0__n.BLIF clk_000_d_i_1__n.BLIF N_183_i.BLIF \ + AS_030_D0_i.BLIF N_184_i.BLIF cpu_est_i_2__n.BLIF DTACK_D0_i.BLIF N_182_i.BLIF sm_amiga_i_2__n.BLIF AS_030_000_SYNC_i.BLIF N_181_i.BLIF ahigh_i_30__n.BLIF \ + ahigh_i_31__n.BLIF N_260_i.BLIF ahigh_i_28__n.BLIF pos_clk_size_dma_6_0_1__n.BLIF ahigh_i_29__n.BLIF N_259_i.BLIF ahigh_i_26__n.BLIF pos_clk_size_dma_6_0_0__n.BLIF ahigh_i_27__n.BLIF \ + N_63_0.BLIF ahigh_i_24__n.BLIF N_155_i.BLIF ahigh_i_25__n.BLIF N_162_i.BLIF N_187_i.BLIF un5_e_0.BLIF N_188_i.BLIF N_154_i.BLIF \ + N_189_i.BLIF cpu_est_2_0_3__n.BLIF N_149_i.BLIF N_208_i.BLIF cpu_est_2_0_2__n.BLIF N_147_i.BLIF un2_ds_030_i.BLIF N_148_i.BLIF N_219_i.BLIF \ + cpu_est_2_0_1__n.BLIF N_175_i.BLIF N_146_i.BLIF un3_as_030_i.BLIF N_36_0.BLIF AS_030_c.BLIF N_145_i.BLIF N_35_0.BLIF AS_000_c.BLIF \ + N_143_i.BLIF N_144_i.BLIF RW_000_c.BLIF pos_clk_un9_clk_000_pe_0_n.BLIF N_20_i.BLIF AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN \ + LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN \ + AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN .outputs IPL_030_2_ DS_030 BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 AVEC E VMA \ - AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_i_7_.D SM_AMIGA_i_7_.C SM_AMIGA_6_.D SM_AMIGA_6_.C \ - SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D \ - SM_AMIGA_0_.C cpu_est_2_.D cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C IPL_030DFF_0_reg.D IPL_030DFF_0_reg.C IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D IPL_030DFF_2_reg.C \ - IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D IPL_D0_1_.C IPL_D0_2_.D IPL_D0_2_.C CLK_000_D_0_.D CLK_000_D_0_.C CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_2_.D \ - CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C CLK_000_D_4_.D CLK_000_D_4_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C CLK_030_PE_0_.D CLK_030_PE_0_.C \ - CLK_030_PE_1_.D CLK_030_PE_1_.C SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C RST_DLY_0_.D \ - RST_DLY_0_.C RST_DLY_1_.D RST_DLY_1_.C RST_DLY_2_.D RST_DLY_2_.C inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DSACK1_INT.D inst_DSACK1_INT.C inst_AS_000_INT.D inst_AS_000_INT.C \ - inst_AMIGA_DS.D inst_AMIGA_DS.C inst_AS_030_D0.D inst_AS_030_D0.C inst_DTACK_D0.D inst_DTACK_D0.C inst_VPA_D.D inst_VPA_D.C inst_RESET_OUT.D inst_RESET_OUT.C inst_DS_000_ENABLE.D \ - inst_DS_000_ENABLE.C BG_000DFFreg.D BG_000DFFreg.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.D inst_UDS_000_INT.C inst_A0_DMA.D inst_A0_DMA.C \ - inst_RW_000_DMA.D inst_RW_000_DMA.C inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_INT.D inst_RW_000_INT.C inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_LDS_000_INT.D inst_LDS_000_INT.C inst_BGACK_030_INTreg.D \ - inst_BGACK_030_INTreg.C inst_AS_000_DMA.D inst_AS_000_DMA.C inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C \ - G_95.X1 G_95.X2 G_101.X1 G_101.X2 G_103.X1 G_103.X2 G_97.X1 G_97.X2 G_122.X1 G_122.X2 G_123.X1 \ - G_123.X2 G_124.X1 G_124.X2 cpu_est_0_0_.X1 cpu_est_0_0_.X2 SIZE_1_ AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR DTACK RW SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ clk_000_d_i_1__n VPA_D_i N_125_i a_decode_2__n VMA_INT_i N_124_i \ - sm_amiga_i_0__n N_53_0 rst_dly_i_2__n N_134_i rst_dly_i_1__n N_270_0 rst_dly_i_0__n N_77_i DSACK1_INT_i N_87_i N_137_i_0 \ - N_112_i vcc_n_n DTACK_D0_i N_113_i BGACK_030_INT_i N_114_i gnd_n_n nEXP_SPACE_i un1_amiga_bus_enable_low AS_000_DMA_i N_109_i \ - un7_as_030 RW_000_i N_108_i un1_LDS_000_INT clk_030_pe_i_1__n N_111_i un1_UDS_000_INT DS_000_DMA_0_sqmuxa_i N_265_2_0 un1_SM_AMIGA_0_sqmuxa_1 pos_clk_un4_rw_000_i_n \ - un10_ciin AS_000_i un1_as_000_i un21_fpu_cs AMIGA_DS_i VPA_c_i un21_berr pos_clk_un3_clk_out_int_i_n N_52_0 un6_ds_030 cycle_dma_i_0__n \ - DTACK_c_i un13_ciin cycle_dma_i_1__n N_48_0 pos_clk_as_000_dma6_i_n un3_ahigh_i DS_000_DMA_i pos_clk_un4_bgack_000_i_n CLK_EXP_i pos_clk_un6_bgack_000_0_n AMIGA_BUS_ENABLE_DMA_LOW_i \ - N_7_i ahigh_i_25__n N_41_0 ahigh_i_24__n pos_clk_un1_bgack_030_int_0_n ahigh_i_27__n pos_clk_un12_clk_out_int_0_n ahigh_i_26__n pos_clk_un3_0_n ahigh_i_29__n pos_clk_un15_bgack_030_int_i_n \ - ahigh_i_28__n N_3_i ahigh_i_31__n N_43_0 ahigh_i_30__n N_4_i a_i_1__n N_42_0 AMIGA_BUS_ENABLE_DMA_HIGH_i un6_amiga_bus_data_dir_i AS_030_D0_i \ - un12_amiga_bus_data_dir_m_i un10_ciin_i AMIGA_BUS_DATA_DIR_c_0 FPU_SENSE_i N_22_i AS_030_000_SYNC_i N_31_0 a_decode_i_16__n N_21_i a_decode_i_18__n N_32_0 \ - a_decode_i_19__n N_19_i N_224_i N_34_0 N_225_i N_18_i N_226_i N_35_0 pos_clk_un5_bgack_030_int_d_i_n pos_clk_amiga_bus_enable_dma_high_3_0_n pos_clk_un6_bg_030_n \ - pos_clk_amiga_bus_enable_dma_low_3_0_n pos_clk_ipl_n pos_clk_rw_000_dma_3_0_n un13_ciin_i UDS_000_c_i un6_ds_030_i LDS_000_c_i N_123_i N_86_i N_122_i N_129_i \ - un7_as_030_i N_130_i AS_030_c un11_amiga_bus_enable_high_i N_117_i AS_000_c N_46_0 N_107_i RW_000_c pos_clk_size_dma_6_0_0__n N_106_i \ - pos_clk_size_dma_6_0_1__n UDS_000_c N_16_i N_254_i LDS_000_c N_263_i N_250_i size_c_0__n N_256_i N_189_i pos_clk_rw_000_int_5_n \ - size_c_1__n N_101_i ahigh_c_24__n N_103_i N_104_i ahigh_c_25__n N_105_i ahigh_c_26__n N_115_i ahigh_c_27__n N_116_i \ - ahigh_c_28__n N_131_i N_277_i ahigh_c_29__n N_64_0 N_91_0 ahigh_c_30__n N_159_0 N_14 N_85_i N_15 \ - ahigh_c_31__n un1_SM_AMIGA_0_sqmuxa_1_0 N_24 RW_c_i N_25 pos_clk_rw_000_int_5_0_n clk_000_d_i_3__n N_25_i N_28_0 N_24_i N_27_0 \ - ipl_c_i_1__n N_50_0 ipl_c_i_0__n N_49_0 N_14_i N_39_0 N_15_i N_38_0 N_91_0_1 N_91_0_2 N_91_0_3 \ - N_265_i_1 N_266_i_1 N_266_i_2 N_138_i_1 N_148_i_1 N_144_i_1 N_142_i_1 N_140_i_1 pos_clk_un10_sm_amiga_i_1_n N_76 N_85_i_1 \ - N_85_i_2 a_decode_c_16__n N_277_1 N_277_2 un1_rst_2_1 a_decode_c_17__n N_277_3 N_277_4 N_64 a_decode_c_18__n N_277_5 \ - N_122 un10_ciin_1 N_123 a_decode_c_19__n un10_ciin_2 N_132 un10_ciin_3 N_133 a_decode_c_20__n un10_ciin_4 N_274 \ - un10_ciin_5 N_276 a_decode_c_21__n un10_ciin_6 N_77 un10_ciin_7 N_79 a_decode_c_22__n un10_ciin_8 N_78 un10_ciin_9 \ - N_263 a_decode_c_23__n un10_ciin_10 N_108 un10_ciin_11 N_114 a_c_0__n un6_amiga_bus_data_dir_1 N_85 un6_amiga_bus_data_dir_2 N_104 \ - a_c_1__n pos_clk_as_000_dma6_1_n N_91 pos_clk_as_000_dma6_2_n N_131 nEXP_SPACE_c DS_000_DMA_1_sqmuxa_1 N_277 pos_clk_un4_rw_000_1_n N_130 BERR_c \ - pos_clk_un4_rw_000_2_n N_115 pos_clk_un13_clk_out_int_1_n N_116 BG_030_c N_125_1 N_105 N_116_1 N_103 pos_clk_un29_clk_000_ne_1_1_n N_101 \ - pos_clk_un29_clk_000_ne_1_2_n N_259 pos_clk_un29_clk_000_ne_1_3_n N_255 BGACK_000_c N_261_1 N_256 N_261_2 N_254 CLK_030_c N_262_1 \ - N_16 N_262_2 N_106 DS_000_ENABLE_0_sqmuxa_1_1 N_86 N_259_1 N_107 CLK_OSZI_c N_250_i_1 N_117 N_189_i_1 \ - pos_clk_a0_dma_3_n pos_clk_un6_bg_030_1_n N_129 N_108_1 pos_clk_size_dma_6_1__n N_114_1 pos_clk_size_dma_6_0__n un21_berr_1 pos_clk_rw_000_dma_3_n FPU_SENSE_c un21_fpu_cs_1 \ - pos_clk_amiga_bus_enable_dma_low_3_n N_130_1 pos_clk_amiga_bus_enable_dma_high_3_n N_136_i_1 SIZE_DMA_3_sqmuxa N_152_i_1 pos_clk_un5_bgack_030_int_d_n N_146_i_1 N_18 N_267_i_1 N_19 \ - pos_clk_ipl_1_n N_21 bg_000_0_un3_n N_22 ipl_c_0__n bg_000_0_un1_n un6_amiga_bus_data_dir bg_000_0_un0_n un12_amiga_bus_data_dir_m ipl_c_1__n uds_000_int_0_un3_n \ - pos_clk_un3_clk_out_int_n uds_000_int_0_un1_n N_3 ipl_c_2__n uds_000_int_0_un0_n pos_clk_as_000_dma6_n lds_000_int_0_un3_n DS_000_DMA_1_sqmuxa lds_000_int_0_un1_n N_4 DTACK_c \ - lds_000_int_0_un0_n AS_000_DMA_1_sqmuxa ds_000_enable_0_un3_n un1_rst_2 ds_000_enable_0_un1_n ds_000_enable_0_un0_n N_199 VPA_c ipl_030_0_2__un3_n pos_clk_un13_bgack_030_int_n ipl_030_0_2__un1_n \ - N_205 ipl_030_0_2__un0_n pos_clk_un13_clk_out_int_n RST_c vma_int_0_un3_n pos_clk_un15_bgack_030_int_n vma_int_0_un1_n pos_clk_un3_n RESET_c vma_int_0_un0_n pos_clk_un12_clk_out_int_n \ - cpu_est_0_1__un3_n pos_clk_un1_bgack_030_int_n RW_c cpu_est_0_1__un1_n DS_000_DMA_0_sqmuxa cpu_est_0_1__un0_n un1_rst_3 fc_c_0__n cpu_est_0_2__un3_n cpu_est_0_2__un1_n fc_c_1__n \ - cpu_est_0_2__un0_n cpu_est_0_3__un3_n pos_clk_un4_rw_000_n cpu_est_0_3__un1_n N_7 AMIGA_BUS_DATA_DIR_c cpu_est_0_3__un0_n pos_clk_un6_bgack_000_n pos_clk_un31_clk_000_ne_1_i_m2_un3_n pos_clk_un4_bgack_000_n pos_clk_un31_clk_000_ne_1_i_m2_un1_n \ - N_265_2 pos_clk_un31_clk_000_ne_1_i_m2_un0_n N_111 bgack_030_int_0_un3_n N_109 BG_030_c_i bgack_030_int_0_un1_n N_113 pos_clk_un6_bg_030_i_n bgack_030_int_0_un0_n N_112 \ - pos_clk_un9_bg_030_0_n ds_000_dma_0_un3_n N_98 UDS_000_INT_i ds_000_dma_0_un1_n pos_clk_un29_clk_000_ne_1_n un1_UDS_000_INT_0 ds_000_dma_0_un0_n N_87 LDS_000_INT_i as_000_dma_0_un3_n \ - N_270 un1_LDS_000_INT_0 as_000_dma_0_un1_n N_134 N_23_i as_000_dma_0_un0_n N_125 N_30_0 size_dma_0_1__un3_n N_124 N_20_i \ - size_dma_0_1__un1_n N_121 N_33_0 size_dma_0_1__un0_n N_120 N_13_i size_dma_0_0__un3_n N_137 N_40_0 size_dma_0_0__un1_n pos_clk_un31_clk_000_ne_n \ - ipl_c_i_2__n size_dma_0_0__un0_n N_17 N_51_0 amiga_bus_enable_dma_high_0_un3_n pos_clk_un9_clk_000_pe_n N_26_i amiga_bus_enable_dma_high_0_un1_n cpu_est_2_1__n N_29_0 amiga_bus_enable_dma_high_0_un0_n \ - cpu_est_2_2__n a_c_i_0__n amiga_bus_enable_dma_low_0_un3_n N_261 size_c_i_1__n amiga_bus_enable_dma_low_0_un1_n N_262 pos_clk_un10_sm_amiga_i_n amiga_bus_enable_dma_low_0_un0_n N_251 DS_000_ENABLE_0_sqmuxa_1_i \ - a0_dma_0_un3_n N_252 un1_DS_000_ENABLE_0_sqmuxa_i a0_dma_0_un1_n N_258 N_157_i a0_dma_0_un0_n N_257 N_160_0 rw_000_dma_0_un3_n DS_000_ENABLE_1_sqmuxa \ - N_161_0 rw_000_dma_0_un1_n un1_DS_000_ENABLE_0_sqmuxa N_162_0 rw_000_dma_0_un0_n N_102 N_165_i ipl_030_0_0__un3_n N_118 ipl_030_0_0__un1_n N_119 \ - N_167_i ipl_030_0_0__un0_n N_264 N_166_i ipl_030_0_1__un3_n DS_000_ENABLE_0_sqmuxa_1 ipl_030_0_1__un1_n N_164 N_168_i ipl_030_0_1__un0_n N_170 \ - as_030_000_sync_0_un3_n N_168 N_170_i as_030_000_sync_0_un1_n N_166 as_030_000_sync_0_un0_n N_167 N_164_i rw_000_int_0_un3_n N_165 rw_000_int_0_un1_n \ - N_162 N_102_i rw_000_int_0_un0_n N_161 N_264_i a_decode_15__n N_160 N_79_i N_157 N_78_i a_decode_14__n \ - N_26 N_119_i N_13 N_118_i a_decode_13__n N_20 N_23 N_255_i a_decode_12__n N_8 N_257_i \ - pos_clk_un9_bg_030_n cpu_est_2_0_2__n a_decode_11__n un1_amiga_bus_enable_low_i N_258_i un21_fpu_cs_i N_259_i a_decode_10__n sm_amiga_i_2__n cpu_est_2_0_1__n sm_amiga_i_1__n \ - N_262_i a_decode_9__n sm_amiga_i_3__n N_261_i sm_amiga_i_4__n pos_clk_un9_clk_000_pe_0_n a_decode_8__n sm_amiga_i_6__n N_251_i sm_amiga_i_5__n N_252_0 \ - a_decode_7__n clk_000_d_i_0__n N_76_i AS_000_INT_i N_17_i a_decode_6__n sm_amiga_i_i_7__n N_36_0 AS_030_i N_98_i a_decode_5__n \ - cpu_est_i_2__n pos_clk_un31_clk_000_ne_i_n cpu_est_i_0__n N_228_i a_decode_4__n cpu_est_i_3__n N_121_i cpu_est_i_1__n N_120_i a_decode_3__n \ + AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_3_.D SM_AMIGA_3_.C \ + SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C IPL_030DFF_0_reg.D IPL_030DFF_0_reg.C IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D \ + IPL_030DFF_2_reg.C IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D IPL_D0_1_.C IPL_D0_2_.D IPL_D0_2_.C SM_AMIGA_i_7_.D SM_AMIGA_i_7_.C SM_AMIGA_6_.D SM_AMIGA_6_.C \ + SM_AMIGA_5_.D SM_AMIGA_5_.C CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C CLK_000_D_4_.D CLK_000_D_4_.C SIZE_DMA_0_.D \ + SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C \ + cpu_est_2_.D cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C CLK_000_D_0_.D CLK_000_D_0_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_VPA_D.D inst_VPA_D.C inst_DTACK_D0.D \ + inst_DTACK_D0.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C BG_000DFFreg.D BG_000DFFreg.C inst_LDS_000_INT.D inst_LDS_000_INT.C inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_INT.D inst_RW_000_INT.C \ + inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_AS_000_DMA.D inst_AS_000_DMA.C inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DSACK1_INT.D inst_DSACK1_INT.C inst_AS_000_INT.D \ + inst_AS_000_INT.C inst_AMIGA_DS.D inst_AMIGA_DS.C inst_A0_DMA.D inst_A0_DMA.C inst_RW_000_DMA.D inst_RW_000_DMA.C inst_AS_030_D0.D inst_AS_030_D0.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AMIGA_BUS_ENABLE_DMA_LOW.C \ + inst_AS_030_D1.D inst_AS_030_D1.C inst_UDS_000_INT.D inst_UDS_000_INT.C inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D \ + inst_CLK_OUT_PRE_D.C G_105.X1 G_105.X2 G_106.X1 G_106.X2 G_107.X1 G_107.X2 G_91.X1 G_91.X2 SIZE_1_ AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR RW SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ N_23_0 UDS_000_c \ + N_19_i N_22_0 LDS_000_c N_18_i N_21_0 size_c_0__n ipl_c_i_2__n N_43_0 size_c_1__n ipl_c_i_1__n N_42_0 \ + vcc_n_n ahigh_c_24__n ipl_c_i_0__n un5_e N_41_0 gnd_n_n ahigh_c_25__n DTACK_c_i un1_amiga_bus_enable_low N_45_0 un3_as_030 \ + ahigh_c_26__n VPA_c_i un1_UDS_000_INT N_44_0 un1_LDS_000_INT ahigh_c_27__n N_13_i un1_DS_000_ENABLE_0_sqmuxa N_27_0 un10_ciin ahigh_c_28__n \ + LDS_000_INT_i un21_fpu_cs un1_LDS_000_INT_0 un21_berr ahigh_c_29__n UDS_000_INT_i un2_ds_030 un1_UDS_000_INT_0 ahigh_c_30__n N_96_0_1 N_96_0_2 \ + ahigh_c_31__n N_282_0_1 N_282_0_2 N_282_0_3 N_282_0_4 pos_clk_un10_sm_amiga_i_1_n un10_ciin_1 un10_ciin_2 un10_ciin_3 un10_ciin_4 un10_ciin_5 \ + un10_ciin_6 un10_ciin_7 un10_ciin_8 un10_ciin_9 un10_ciin_10 un10_ciin_11 N_201_1 N_201_2 N_131_i_1 N_134_0_1 N_113_i_1 \ + N_113_i_2 N_144_1 pos_clk_ipl_n N_144_2 N_143_1 N_143_2 N_163_1 N_163_2 N_163_3 un21_fpu_cs_1 a_decode_c_16__n \ + un21_berr_1_0 pos_clk_cycle_dma_5_1_1__n a_decode_c_17__n N_199_1 AS_000_DMA_1_sqmuxa_1 a_decode_c_18__n N_140_1 N_66_i_1 a_decode_c_19__n N_66_i_2 N_205_i_1 \ + a_decode_c_20__n N_205_i_2 N_180_1 a_decode_c_21__n N_180_2 pos_clk_un9_clk_000_pe_n N_59_i_1 a_decode_c_22__n N_127_i_1 N_123_i_1 a_decode_c_23__n \ + N_121_i_1 N_119_i_1 N_6 a_c_0__n N_117_i_1 N_115_i_1 a_c_1__n N_111_i_1 N_165_1 N_13 nEXP_SPACE_c \ + N_162_1 N_148_1 N_18 BERR_c pos_clk_ipl_1_n N_19 ds_000_dma_0_un3_n N_20 BG_030_c ds_000_dma_0_un1_n ds_000_dma_0_un0_n \ + as_000_dma_0_un3_n as_000_dma_0_un1_n as_000_dma_0_un0_n BGACK_000_c uds_000_int_0_un3_n uds_000_int_0_un1_n uds_000_int_0_un0_n bg_000_0_un3_n bg_000_0_un1_n bg_000_0_un0_n CLK_OSZI_c \ + lds_000_int_0_un3_n lds_000_int_0_un1_n lds_000_int_0_un0_n as_030_d1_0_un3_n as_030_d1_0_un1_n as_030_d1_0_un0_n FPU_SENSE_c rw_000_int_0_un3_n rw_000_int_0_un1_n rw_000_int_0_un0_n as_030_000_sync_0_un3_n \ + as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n bgack_030_int_0_un3_n bgack_030_int_0_un1_n cpu_est_2_1__n ipl_c_0__n bgack_030_int_0_un0_n cpu_est_2_2__n cpu_est_0_1__un3_n cpu_est_2_3__n ipl_c_1__n \ + cpu_est_0_1__un1_n cpu_est_0_1__un0_n ipl_c_2__n cpu_est_0_2__un3_n cpu_est_0_2__un1_n N_60 cpu_est_0_2__un0_n N_63 DTACK_c cpu_est_0_3__un3_n N_126 \ + cpu_est_0_3__un1_n N_150 cpu_est_0_3__un0_n N_151 ipl_030_0_0__un3_n N_219 VPA_c ipl_030_0_0__un1_n N_175 ipl_030_0_0__un0_n ipl_030_0_1__un3_n \ + N_59 RST_c ipl_030_0_1__un1_n N_68 ipl_030_0_1__un0_n N_72 ipl_030_0_2__un3_n N_80 ipl_030_0_2__un1_n N_93 RW_c \ + ipl_030_0_2__un0_n N_98 ds_000_enable_0_un3_n N_107 fc_c_0__n ds_000_enable_0_un1_n N_128 ds_000_enable_0_un0_n N_131 fc_c_1__n vma_int_0_un3_n \ + N_134 vma_int_0_un1_n N_135 vma_int_0_un0_n N_141 AMIGA_BUS_DATA_DIR_c a_decode_15__n N_142 N_143 a_decode_14__n N_144 \ + N_145 a_decode_13__n N_146 N_205_i N_147 N_140_i a_decode_12__n N_148 AMIGA_DS_i N_149 a_decode_11__n \ + N_154 N_199_i N_155 N_198_i a_decode_10__n N_162 N_180_i N_165 N_262_i a_decode_9__n N_259 \ + AMIGA_BUS_DATA_DIR_c_0 N_260 pos_clk_un2_i_n a_decode_8__n N_181 N_3_i N_182 N_32_0 a_decode_7__n N_183 N_4_i \ + N_184 N_31_0 a_decode_6__n N_185 N_220_i N_186 BG_030_c_i a_decode_5__n N_266 pos_clk_un9_bg_030_0_n N_267 \ + N_17_i a_decode_4__n N_268 N_24_0 N_190 N_16_i a_decode_3__n N_191 N_25_0 N_201 N_15_i \ + a_decode_2__n N_202 N_26_0 N_203 N_12_i N_208 N_28_0 N_163 N_11_i N_282 N_29_0 \ + un21_berr_1 N_5_i N_132 N_30_0 N_96 a_c_i_0__n N_129 size_c_i_1__n un1_SM_AMIGA_0_sqmuxa_1 pos_clk_un10_sm_amiga_i_n N_169 \ + un1_dsack1_i N_170 N_69_i N_167 N_163_i N_168 N_244_0 pos_clk_rw_000_int_5_n N_164_i pos_clk_un6_bgack_000_n N_165_i \ + N_274 un11_amiga_bus_enable_high_i N_164 un10_ciin_i N_244 N_60_0 N_5 N_274_i N_11 pos_clk_un6_bgack_000_0_n N_12 \ + RW_c_i N_15 pos_clk_rw_000_int_5_0_n N_16 N_168_i N_17 N_167_i pos_clk_un9_bg_030_n N_170_i N_3 N_169_i \ + N_205 AS_000_DMA_1_sqmuxa N_38_0 N_4 un1_SM_AMIGA_0_sqmuxa_1_0 N_199 N_282_0 pos_clk_un2_n clk_000_d_i_3__n N_140 N_96_0 \ + N_262 N_129_i N_198 N_268_i N_180 N_246_i un1_amiga_bus_enable_low_i N_132_0 un21_fpu_cs_i AS_000_i N_142_i \ + BGACK_030_INT_i N_141_i nEXP_SPACE_i N_135_0 cycle_dma_i_0__n N_134_0 RW_000_i N_131_i CLK_EXP_i LDS_000_c_i cycle_dma_i_1__n \ + UDS_000_c_i DS_000_DMA_i N_128_i AS_000_DMA_i N_107_i a_i_1__n N_203_i AMIGA_BUS_ENABLE_DMA_LOW_i un1_DS_000_ENABLE_0_sqmuxa_0 a_decode_i_19__n N_201_i \ + a_decode_i_18__n N_202_i a_decode_i_16__n VMA_INT_i AMIGA_BUS_ENABLE_DMA_HIGH_i N_98_i sm_amiga_i_0__n N_93_i sm_amiga_i_5__n N_82_i sm_amiga_i_6__n \ + N_80_i sm_amiga_i_i_7__n N_72_i AS_030_i N_68_i AS_000_INT_i N_59_i DSACK1_INT_i N_190_i sm_amiga_i_1__n N_191_i \ + FPU_SENSE_i AS_030_D1_i N_267_i cpu_est_i_0__n cpu_est_i_3__n N_266_i VPA_D_i sm_amiga_i_3__n N_186_i sm_amiga_i_4__n cpu_est_i_1__n \ + N_185_i clk_000_d_i_0__n clk_000_d_i_1__n N_183_i AS_030_D0_i N_184_i cpu_est_i_2__n DTACK_D0_i N_182_i sm_amiga_i_2__n AS_030_000_SYNC_i \ + N_181_i ahigh_i_30__n ahigh_i_31__n N_260_i ahigh_i_28__n pos_clk_size_dma_6_0_1__n ahigh_i_29__n N_259_i ahigh_i_26__n pos_clk_size_dma_6_0_0__n ahigh_i_27__n \ + N_63_0 ahigh_i_24__n N_155_i ahigh_i_25__n N_162_i N_187_i un5_e_0 N_188_i N_154_i N_189_i cpu_est_2_0_3__n \ + N_149_i N_208_i cpu_est_2_0_2__n N_147_i un2_ds_030_i N_148_i N_219_i cpu_est_2_0_1__n N_175_i N_146_i un3_as_030_i \ + N_36_0 AS_030_c N_145_i N_35_0 AS_000_c N_143_i N_144_i RW_000_c pos_clk_un9_clk_000_pe_0_n N_20_i \ AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE \ - AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE DTACK.OE \ - RW.OE DS_030.OE DSACK1.OE CIIN.OE -.names un7_as_030_i.BLIF AS_030 + AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE \ + DS_030.OE DSACK1.OE VMA.OE CIIN.OE +.names un3_as_030_i.BLIF AS_030 1 1 .names AS_030.PIN AS_030_c 1 1 -.names N_132.BLIF AS_030.OE +.names BGACK_030_INT_i.BLIF AS_030.OE 1 1 -.names N_122_i.BLIF AS_000 +.names N_175_i.BLIF AS_000 1 1 .names AS_000.PIN AS_000_c 1 1 -.names un1_as_000_i.BLIF AS_000.OE +.names N_69_i.BLIF AS_000.OE 1 1 .names inst_RW_000_INT.BLIF RW_000 1 1 .names RW_000.PIN RW_000_c 1 1 -.names un1_as_000_i.BLIF RW_000.OE +.names N_69_i.BLIF RW_000.OE 1 1 .names un1_UDS_000_INT.BLIF UDS_000 1 1 .names UDS_000.PIN UDS_000_c 1 1 -.names un1_as_000_i.BLIF UDS_000.OE +.names N_69_i.BLIF UDS_000.OE 1 1 .names un1_LDS_000_INT.BLIF LDS_000 1 1 .names LDS_000.PIN LDS_000_c 1 1 -.names un1_as_000_i.BLIF LDS_000.OE +.names N_69_i.BLIF LDS_000.OE 1 1 .names SIZE_DMA_0_.BLIF SIZE_0_ 1 1 .names SIZE_0_.PIN size_c_0__n 1 1 -.names N_276.BLIF SIZE_0_.OE +.names BGACK_030_INT_i.BLIF SIZE_0_.OE 1 1 .names SIZE_DMA_1_.BLIF SIZE_1_ 1 1 .names SIZE_1_.PIN size_c_1__n 1 1 -.names N_276.BLIF SIZE_1_.OE +.names BGACK_030_INT_i.BLIF SIZE_1_.OE 1 1 .names gnd_n_n.BLIF AHIGH_24_ 1 1 .names AHIGH_24_.PIN ahigh_c_24__n 1 1 -.names un3_ahigh_i.BLIF AHIGH_24_.OE +.names BGACK_030_INT_i.BLIF AHIGH_24_.OE 1 1 .names gnd_n_n.BLIF AHIGH_25_ 1 1 .names AHIGH_25_.PIN ahigh_c_25__n 1 1 -.names un3_ahigh_i.BLIF AHIGH_25_.OE +.names BGACK_030_INT_i.BLIF AHIGH_25_.OE 1 1 .names gnd_n_n.BLIF AHIGH_26_ 1 1 .names AHIGH_26_.PIN ahigh_c_26__n 1 1 -.names un3_ahigh_i.BLIF AHIGH_26_.OE +.names BGACK_030_INT_i.BLIF AHIGH_26_.OE 1 1 .names gnd_n_n.BLIF AHIGH_27_ 1 1 .names AHIGH_27_.PIN ahigh_c_27__n 1 1 -.names un3_ahigh_i.BLIF AHIGH_27_.OE +.names BGACK_030_INT_i.BLIF AHIGH_27_.OE 1 1 .names gnd_n_n.BLIF AHIGH_28_ 1 1 .names AHIGH_28_.PIN ahigh_c_28__n 1 1 -.names un3_ahigh_i.BLIF AHIGH_28_.OE +.names BGACK_030_INT_i.BLIF AHIGH_28_.OE 1 1 .names gnd_n_n.BLIF AHIGH_29_ 1 1 .names AHIGH_29_.PIN ahigh_c_29__n 1 1 -.names un3_ahigh_i.BLIF AHIGH_29_.OE +.names BGACK_030_INT_i.BLIF AHIGH_29_.OE 1 1 .names gnd_n_n.BLIF AHIGH_30_ 1 1 .names AHIGH_30_.PIN ahigh_c_30__n 1 1 -.names un3_ahigh_i.BLIF AHIGH_30_.OE +.names BGACK_030_INT_i.BLIF AHIGH_30_.OE 1 1 .names gnd_n_n.BLIF AHIGH_31_ 1 1 .names AHIGH_31_.PIN ahigh_c_31__n 1 1 -.names un3_ahigh_i.BLIF AHIGH_31_.OE +.names BGACK_030_INT_i.BLIF AHIGH_31_.OE 1 1 .names inst_A0_DMA.BLIF A_0_ 1 1 .names A_0_.PIN a_c_0__n 1 1 -.names N_132.BLIF A_0_.OE +.names BGACK_030_INT_i.BLIF A_0_.OE 1 1 .names gnd_n_n.BLIF BERR 1 1 @@ -306,1390 +275,1162 @@ 1 1 .names un21_berr.BLIF BERR.OE 1 1 -.names gnd_n_n.BLIF DTACK -1 1 -.names DTACK.PIN DTACK_c -1 1 -.names AS_000_DMA_i.BLIF DTACK.OE -1 1 .names inst_RW_000_DMA.BLIF RW 1 1 .names RW.PIN RW_c 1 1 -.names N_133.BLIF RW.OE +.names BGACK_030_INT_i.BLIF RW.OE 1 1 -.names un6_ds_030_i.BLIF DS_030 +.names un2_ds_030_i.BLIF DS_030 1 1 -.names N_132.BLIF DS_030.OE +.names BGACK_030_INT_i.BLIF DS_030.OE 1 1 -.names N_123_i.BLIF DSACK1 +.names N_219_i.BLIF DSACK1 1 1 -.names nEXP_SPACE_c.BLIF DSACK1.OE +.names un1_dsack1_i.BLIF DSACK1.OE +1 1 +.names inst_VMA_INTreg.BLIF VMA +1 1 +.names inst_BGACK_030_INTreg.BLIF VMA.OE 1 1 .names un10_ciin.BLIF CIIN 1 1 -.names un13_ciin_i.BLIF CIIN.OE +.names N_60.BLIF CIIN.OE 1 1 -.names pos_clk_un10_sm_amiga_i_1_n.BLIF size_c_i_1__n.BLIF pos_clk_un10_sm_amiga_i_n -11 1 -.names N_87.BLIF sm_amiga_i_0__n.BLIF N_101 -11 1 -.names CYCLE_DMA_1_.BLIF G_97.X1 -1 1 -.names AS_030_000_SYNC_i.BLIF nEXP_SPACE_c.BLIF N_85_i_1 -11 1 -.names inst_VMA_INTreg.BLIF VMA_INT_i -0 1 -.names CLK_000_D_4_.BLIF clk_000_d_i_3__n.BLIF N_85_i_2 -11 1 -.names BERR_c.BLIF N_98_i.BLIF pos_clk_un31_clk_000_ne_i_n -11 1 -.names N_199.BLIF G_97.X2 -1 1 -.names N_85_i_1.BLIF N_85_i_2.BLIF N_85_i -11 1 -.names pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un3_n -0 1 -.names AS_030_i.BLIF a_decode_c_17__n.BLIF N_277_1 -11 1 -.names cpu_est_i_1__n.BLIF pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un1_n -11 1 -.names a_decode_i_16__n.BLIF a_decode_i_18__n.BLIF N_277_2 -11 1 -.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n -11 1 -.names IPL_D0_0_.BLIF G_122.X1 -1 1 -.names fc_c_1__n.BLIF a_decode_i_19__n.BLIF N_277_3 -11 1 -.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_17 -1- 1 --1 1 -.names N_277_1.BLIF N_277_2.BLIF N_277_4 -11 1 -.names N_17_i.BLIF RST_c.BLIF N_36_0 -11 1 -.names ipl_c_0__n.BLIF G_122.X2 -1 1 -.names N_277_3.BLIF fc_c_0__n.BLIF N_277_5 -11 1 -.names N_76.BLIF cpu_est_0_1__un3_n -0 1 -.names N_38_0.BLIF inst_RW_000_INT.D -0 1 -.names cpu_est_1_.BLIF N_76.BLIF cpu_est_0_1__un1_n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_i_7_.C -1 1 -.names inst_BGACK_030_INT_D.BLIF inst_BGACK_030_INTreg.BLIF N_91_0_1 -11 1 -.names cpu_est_2_1__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n -11 1 -.names IPL_D0_1_.BLIF G_123.X1 -1 1 -.names AS_030_D0_i.BLIF sm_amiga_i_i_7__n.BLIF N_91_0_2 -11 1 -.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D -1- 1 --1 1 -.names N_91_0_1.BLIF N_91_0_2.BLIF N_91_0_3 -11 1 -.names N_76.BLIF cpu_est_0_2__un3_n -0 1 -.names ipl_c_1__n.BLIF G_123.X2 -1 1 -.names N_91_0_3.BLIF nEXP_SPACE_c.BLIF N_91_0 -11 1 -.names cpu_est_2_.BLIF N_76.BLIF cpu_est_0_2__un1_n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C -1 1 -.names N_108_i.BLIF N_109_i.BLIF N_265_i_1 -11 1 -.names cpu_est_2_2__n.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n -11 1 -.names N_265_i_1.BLIF N_265_2_0.BLIF RST_DLY_2_.D -11 1 -.names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D -1- 1 --1 1 -.names IPL_D0_2_.BLIF G_124.X1 -1 1 -.names N_112_i.BLIF RST_c.BLIF N_266_i_1 -11 1 -.names N_76.BLIF cpu_est_0_3__un3_n -0 1 -.names N_113_i.BLIF N_114_i.BLIF N_266_i_2 -11 1 -.names cpu_est_3_.BLIF N_76.BLIF cpu_est_0_3__un1_n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C -1 1 -.names ipl_c_2__n.BLIF G_124.X2 -1 1 -.names N_266_i_1.BLIF N_266_i_2.BLIF RST_DLY_1_.D -11 1 -.names N_189_i.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n -11 1 -.names N_164_i.BLIF N_264.BLIF N_138_i_1 -11 1 -.names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_.D -1- 1 --1 1 -.names N_138_i_1.BLIF RST_c.BLIF SM_AMIGA_1_.D -11 1 -.names RST_DLY_0_.BLIF RST_DLY_1_.BLIF N_77_i -11 1 -.names N_76.BLIF cpu_est_0_0_.X1 -1 1 -.names N_79.BLIF N_170_i.BLIF N_148_i_1 -11 1 -.names N_134_i.BLIF RST_c.BLIF N_270_0 -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C -1 1 -.names N_148_i_1.BLIF RST_c.BLIF SM_AMIGA_6_.D -11 1 -.names N_124_i.BLIF N_125_i.BLIF N_53_0 -11 1 -.names cpu_est_0_.BLIF cpu_est_0_0_.X2 -1 1 -.names N_78.BLIF N_168_i.BLIF N_144_i_1 -11 1 -.names N_120_i.BLIF N_121_i.BLIF inst_DSACK1_INT.D -11 1 -.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 -0 1 -.names N_137_i_0.BLIF RST_c.BLIF N_228_i -11 1 -.names RW_c.BLIF RW_c_i -0 1 -.names AS_030_i.BLIF RST_c.BLIF N_274 -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C -1 1 -.names CLK_000_D_2_.BLIF CLK_000_D_3_.D -1 1 -.names pos_clk_rw_000_int_5_0_n.BLIF pos_clk_rw_000_int_5_n -0 1 -.names N_77_i.BLIF RST_DLY_2_.BLIF N_137 -11 1 -.names CLK_000_D_3_.BLIF clk_000_d_i_3__n -0 1 -.names N_137.BLIF N_137_i_0 -0 1 -.names N_25.BLIF N_25_i -0 1 -.names N_76_i.BLIF N_137_i_0.BLIF N_134 -11 1 -.names N_28_0.BLIF IPL_030DFF_1_reg.D -0 1 -.names inst_RESET_OUT.BLIF RST_c.BLIF N_124 -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C -1 1 -.names N_24.BLIF N_24_i -0 1 -.names N_87_i.BLIF RST_c.BLIF N_121 -11 1 -.names N_27_0.BLIF IPL_030DFF_0_reg.D -0 1 -.names inst_DSACK1_INT.BLIF DSACK1_INT_i -0 1 -.names ipl_c_1__n.BLIF ipl_c_i_1__n -0 1 -.names DSACK1_INT_i.BLIF N_274.BLIF N_120 -11 1 -.names N_50_0.BLIF IPL_D0_1_.D -0 1 -.names RST_DLY_0_.BLIF rst_dly_i_0__n -0 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C -1 1 -.names ipl_c_0__n.BLIF ipl_c_i_0__n -0 1 -.names N_270.BLIF RST_DLY_0_.BLIF N_115 -11 1 -.names N_49_0.BLIF IPL_D0_0_.D -0 1 -.names BGACK_000_c.BLIF pos_clk_un4_bgack_000_i_n.BLIF pos_clk_un6_bgack_000_0_n -11 1 -.names N_14.BLIF N_14_i -0 1 -.names AS_000_c.BLIF N_76_i.BLIF pos_clk_un4_bgack_000_n -11 1 -.names N_39_0.BLIF inst_AS_030_000_SYNC.D -0 1 -.names N_276.BLIF RESET_c.BLIF un3_ahigh_i -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C -1 1 -.names N_15.BLIF N_15_i -0 1 -.names DTACK_c_i.BLIF RST_c.BLIF N_48_0 -11 1 -.names N_16.BLIF N_16_i -0 1 -.names RST_c.BLIF VPA_c_i.BLIF N_52_0 -11 1 -.names N_254.BLIF N_254_i -0 1 -.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF un1_as_000_i -11 1 -.names N_263.BLIF N_263_i -0 1 -.names nEXP_SPACE_c.BLIF nEXP_SPACE_i -0 1 -.names CLK_OSZI_c.BLIF cpu_est_2_.C -1 1 -.names N_256.BLIF N_256_i -0 1 -.names BGACK_030_INT_i.BLIF nEXP_SPACE_i.BLIF N_276 -11 1 -.names N_101.BLIF N_101_i -0 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i -0 1 -.names N_103.BLIF N_103_i -0 1 -.names BGACK_030_INT_i.BLIF inst_RESET_OUT.BLIF N_133 -11 1 -.names N_104.BLIF N_104_i -0 1 -.names N_276.BLIF inst_RESET_OUT.BLIF N_132 -11 1 -.names CLK_OSZI_c.BLIF cpu_est_3_.C -1 1 -.names N_105.BLIF N_105_i -0 1 -.names N_111_i.BLIF RST_c.BLIF N_265_2_0 -11 1 -.names N_115.BLIF N_115_i -0 1 -.names inst_DTACK_D0.BLIF DTACK_D0_i -0 1 -.names N_116.BLIF N_116_i -0 1 -.names inst_VPA_D.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un3_n -0 1 -.names N_131.BLIF N_131_i -0 1 -.names DTACK_D0_i.BLIF inst_VPA_D.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un1_n -11 1 -.names CLK_OSZI_c.BLIF IPL_030DFF_0_reg.C -1 1 -.names N_277.BLIF N_277_i -0 1 -.names pos_clk_un29_clk_000_ne_1_n.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un3_n.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un0_n -11 1 -.names N_64_0.BLIF N_64 -0 1 -.names pos_clk_un31_clk_000_ne_1_i_m2_un1_n.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un0_n.BLIF N_98 -1- 1 --1 1 -.names N_91_0.BLIF N_91 -0 1 -.names N_76_i.BLIF SM_AMIGA_1_.BLIF N_87_i -11 1 -.names N_85_i.BLIF N_85 -0 1 -.names G_103.BLIF un1_rst_3.BLIF CLK_030_PE_1_.D -11 1 -.names CLK_OSZI_c.BLIF IPL_030DFF_1_reg.C -1 1 -.names pos_clk_un5_bgack_030_int_d_i_n.BLIF pos_clk_un5_bgack_030_int_d_n -0 1 -.names BGACK_030_INT_i.BLIF RST_c.BLIF un1_rst_2_1 -11 1 -.names pos_clk_amiga_bus_enable_dma_high_3_0_n.BLIF pos_clk_amiga_bus_enable_dma_high_3_n -0 1 -.names AS_000_i.BLIF un1_rst_2_1.BLIF un1_rst_2 -11 1 -.names pos_clk_amiga_bus_enable_dma_low_3_0_n.BLIF pos_clk_amiga_bus_enable_dma_low_3_n -0 1 -.names inst_AMIGA_DS.BLIF AMIGA_DS_i -0 1 -.names pos_clk_rw_000_dma_3_0_n.BLIF pos_clk_rw_000_dma_3_n -0 1 -.names AS_000_c.BLIF AS_000_i -0 1 -.names CLK_OSZI_c.BLIF IPL_030DFF_2_reg.C -1 1 -.names UDS_000_c.BLIF UDS_000_c_i -0 1 -.names pos_clk_un4_rw_000_n.BLIF pos_clk_un4_rw_000_i_n -0 1 -.names LDS_000_c.BLIF LDS_000_c_i -0 1 -.names DS_000_DMA_0_sqmuxa.BLIF DS_000_DMA_0_sqmuxa_i -0 1 -.names N_86_i.BLIF N_86 -0 1 -.names RW_000_c.BLIF RW_000_i -0 1 -.names N_129.BLIF N_129_i -0 1 -.names CLK_030_PE_1_.BLIF clk_030_pe_i_1__n -0 1 -.names CLK_OSZI_c.BLIF IPL_D0_0_.C -1 1 -.names N_130.BLIF N_130_i -0 1 -.names inst_AS_000_DMA.BLIF AS_000_DMA_i -0 1 -.names N_117.BLIF N_117_i -0 1 -.names N_46_0.BLIF inst_AMIGA_DS.D -0 1 -.names N_107.BLIF N_107_i -0 1 -.names CLK_OSZI_c.BLIF IPL_D0_1_.C -1 1 -.names pos_clk_size_dma_6_0_0__n.BLIF pos_clk_size_dma_6_0__n -0 1 -.names pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n -0 1 -.names N_106.BLIF N_106_i -0 1 -.names BGACK_000_c.BLIF pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n -11 1 -.names pos_clk_size_dma_6_0_1__n.BLIF pos_clk_size_dma_6_1__n -0 1 -.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un0_n -11 1 -.names N_3.BLIF N_3_i -0 1 -.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_7 -1- 1 --1 1 -.names CLK_OSZI_c.BLIF IPL_D0_2_.C -1 1 -.names N_43_0.BLIF inst_DS_000_DMA.D -0 1 -.names N_7_i.BLIF RST_c.BLIF N_41_0 -11 1 -.names N_4.BLIF N_4_i -0 1 -.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n -0 1 -.names N_42_0.BLIF inst_AS_000_DMA.D -0 1 -.names CYCLE_DMA_1_.BLIF cycle_dma_i_1__n -0 1 -.names un6_amiga_bus_data_dir.BLIF un6_amiga_bus_data_dir_i -0 1 -.names CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF pos_clk_un15_bgack_030_int_i_n -11 1 -.names CLK_OSZI_c.BLIF CLK_000_D_0_.C -1 1 -.names un12_amiga_bus_data_dir_m.BLIF un12_amiga_bus_data_dir_m_i -0 1 -.names cycle_dma_i_0__n.BLIF cycle_dma_i_1__n.BLIF pos_clk_un3_0_n -11 1 -.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c -0 1 -.names CLK_030_PE_0_.BLIF CLK_030_PE_1_.BLIF pos_clk_un12_clk_out_int_0_n -11 1 -.names N_22.BLIF N_22_i -0 1 -.names CLK_000_D_0_.BLIF CLK_000_D_1_.D -1 1 -.names N_31_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D -0 1 -.names AS_000_DMA_i.BLIF AS_000_i.BLIF un7_as_030 -11 1 -.names N_21.BLIF N_21_i -0 1 -.names N_76_i.BLIF pos_clk_un15_bgack_030_int_n.BLIF pos_clk_un13_bgack_030_int_n -11 1 -.names CLK_OSZI_c.BLIF CLK_000_D_1_.C -1 1 -.names N_32_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D -0 1 -.names RW_000_i.BLIF pos_clk_un15_bgack_030_int_i_n.BLIF pos_clk_un1_bgack_030_int_0_n -11 1 -.names N_19.BLIF N_19_i -0 1 -.names pos_clk_un3_clk_out_int_n.BLIF pos_clk_un3_clk_out_int_i_n -0 1 -.names N_34_0.BLIF inst_A0_DMA.D -0 1 -.names RW_000_c.BLIF pos_clk_un3_clk_out_int_i_n.BLIF DS_000_DMA_0_sqmuxa -11 1 -.names CLK_000_D_1_.BLIF CLK_000_D_2_.D -1 1 -.names N_18.BLIF N_18_i -0 1 -.names RST_c.BLIF pos_clk_as_000_dma6_n.BLIF un1_rst_3 -11 1 -.names N_35_0.BLIF inst_RW_000_DMA.D -0 1 -.names pos_clk_as_000_dma6_n.BLIF pos_clk_un3_clk_out_int_n.BLIF AS_000_DMA_1_sqmuxa -11 1 -.names CLK_OSZI_c.BLIF CLK_000_D_2_.C -1 1 -.names N_108.BLIF N_108_i -0 1 -.names G_95.BLIF un1_rst_2.BLIF CYCLE_DMA_0_.D -11 1 -.names N_111.BLIF N_111_i -0 1 -.names G_101.BLIF un1_rst_3.BLIF CLK_030_PE_0_.D -11 1 -.names N_265_2_0.BLIF N_265_2 -0 1 -.names AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF BGACK_030_INT_i.BLIF un1_amiga_bus_enable_low -11 1 -.names VPA_c.BLIF VPA_c_i -0 1 -.names un6_amiga_bus_data_dir_i.BLIF un12_amiga_bus_data_dir_m_i.BLIF AMIGA_BUS_DATA_DIR_c_0 -11 1 -.names CLK_OSZI_c.BLIF CLK_000_D_3_.C -1 1 -.names N_52_0.BLIF inst_VPA_D.D -0 1 -.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF un12_amiga_bus_data_dir_m -11 1 -.names DTACK_c.BLIF DTACK_c_i -0 1 -.names CLK_OUT_INTreg.BLIF CLK_EXP_i -0 1 -.names N_48_0.BLIF inst_DTACK_D0.D -0 1 -.names CLK_EXP_i.BLIF inst_CLK_OUT_PRE_D.BLIF pos_clk_un3_clk_out_int_n -11 1 -.names CLK_000_D_3_.BLIF CLK_000_D_4_.D -1 1 -.names pos_clk_un4_bgack_000_n.BLIF pos_clk_un4_bgack_000_i_n -0 1 -.names inst_DS_000_DMA.BLIF DS_000_DMA_i -0 1 -.names pos_clk_un6_bgack_000_0_n.BLIF pos_clk_un6_bgack_000_n -0 1 -.names AS_000_i.BLIF DS_000_DMA_i.BLIF un6_ds_030 -11 1 -.names CLK_OSZI_c.BLIF CLK_000_D_4_.C -1 1 -.names N_7.BLIF N_7_i -0 1 -.names DS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un3_n -0 1 -.names N_41_0.BLIF inst_BGACK_030_INTreg.D -0 1 -.names inst_DS_000_DMA.BLIF DS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un1_n -11 1 -.names pos_clk_un1_bgack_030_int_0_n.BLIF pos_clk_un1_bgack_030_int_n -0 1 -.names pos_clk_as_000_dma6_i_n.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n -11 1 -.names pos_clk_un12_clk_out_int_0_n.BLIF pos_clk_un12_clk_out_int_n -0 1 -.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF N_3 -1- 1 --1 1 -.names CLK_OSZI_c.BLIF CYCLE_DMA_0_.C -1 1 -.names pos_clk_un3_0_n.BLIF pos_clk_un3_n -0 1 -.names pos_clk_as_000_dma6_n.BLIF pos_clk_as_000_dma6_i_n -0 1 -.names pos_clk_un15_bgack_030_int_i_n.BLIF pos_clk_un15_bgack_030_int_n -0 1 -.names AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un3_n -0 1 -.names N_98.BLIF N_98_i -0 1 -.names inst_AS_000_DMA.BLIF AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un1_n -11 1 -.names pos_clk_un31_clk_000_ne_i_n.BLIF pos_clk_un31_clk_000_ne_n -0 1 -.names pos_clk_as_000_dma6_i_n.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n -11 1 -.names CLK_OSZI_c.BLIF CYCLE_DMA_1_.C -1 1 -.names N_121.BLIF N_121_i -0 1 -.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF N_4 -1- 1 --1 1 -.names N_120.BLIF N_120_i -0 1 -.names G_97.BLIF un1_rst_2.BLIF CYCLE_DMA_1_.D -11 1 -.names N_125.BLIF N_125_i -0 1 -.names N_4_i.BLIF RST_c.BLIF N_42_0 -11 1 -.names N_124.BLIF N_124_i -0 1 -.names N_3_i.BLIF RST_c.BLIF N_43_0 -11 1 -.names CLK_OSZI_c.BLIF CLK_030_PE_0_.C -1 1 -.names N_53_0.BLIF inst_RESET_OUT.D -0 1 -.names CYCLE_DMA_0_.BLIF pos_clk_un13_bgack_030_int_n.BLIF N_199 -11 1 -.names N_134.BLIF N_134_i -0 1 -.names CLK_030_PE_0_.BLIF pos_clk_un13_clk_out_int_n.BLIF N_205 -11 1 -.names N_270_0.BLIF N_270 -0 1 -.names ahigh_c_27__n.BLIF ahigh_i_27__n -0 1 -.names N_77_i.BLIF N_77 -0 1 -.names ahigh_c_26__n.BLIF ahigh_i_26__n -0 1 -.names CLK_OSZI_c.BLIF CLK_030_PE_1_.C -1 1 -.names N_87_i.BLIF N_87 -0 1 -.names ahigh_c_25__n.BLIF ahigh_i_25__n -0 1 -.names N_112.BLIF N_112_i -0 1 -.names ahigh_c_24__n.BLIF ahigh_i_24__n -0 1 -.names N_113.BLIF N_113_i -0 1 -.names SIZE_DMA_3_sqmuxa.BLIF size_dma_0_1__un3_n -0 1 -.names N_114.BLIF N_114_i -0 1 -.names SIZE_DMA_1_.BLIF SIZE_DMA_3_sqmuxa.BLIF size_dma_0_1__un1_n -11 1 -.names CLK_OSZI_c.BLIF SIZE_DMA_0_.C -1 1 -.names N_109.BLIF N_109_i -0 1 -.names pos_clk_size_dma_6_1__n.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un0_n -11 1 -.names N_118.BLIF N_118_i -0 1 -.names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D -1- 1 --1 1 -.names N_255.BLIF N_255_i -0 1 -.names SIZE_DMA_3_sqmuxa.BLIF size_dma_0_0__un3_n -0 1 -.names N_257.BLIF N_257_i -0 1 -.names SIZE_DMA_0_.BLIF SIZE_DMA_3_sqmuxa.BLIF size_dma_0_0__un1_n -11 1 -.names CLK_OSZI_c.BLIF SIZE_DMA_1_.C -1 1 -.names cpu_est_2_0_2__n.BLIF cpu_est_2_2__n -0 1 -.names pos_clk_size_dma_6_0__n.BLIF size_dma_0_0__un3_n.BLIF size_dma_0_0__un0_n -11 1 -.names N_258.BLIF N_258_i -0 1 -.names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D -1- 1 --1 1 -.names N_259.BLIF N_259_i -0 1 -.names N_18_i.BLIF RST_c.BLIF N_35_0 -11 1 -.names cpu_est_2_0_1__n.BLIF cpu_est_2_1__n -0 1 -.names N_19_i.BLIF RST_c.BLIF N_34_0 -11 1 -.names CLK_OSZI_c.BLIF cpu_est_0_.C -1 1 -.names N_262.BLIF N_262_i -0 1 -.names N_21_i.BLIF RST_c.BLIF N_32_0 -11 1 -.names N_261.BLIF N_261_i -0 1 -.names N_22_i.BLIF RST_c.BLIF N_31_0 -11 1 -.names pos_clk_un9_clk_000_pe_0_n.BLIF pos_clk_un9_clk_000_pe_n -0 1 -.names pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_high_0_un3_n -0 1 -.names N_251_i.BLIF N_251 -0 1 -.names pos_clk_amiga_bus_enable_dma_high_3_n.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_high_0_un1_n -11 1 -.names CLK_OSZI_c.BLIF cpu_est_1_.C -1 1 -.names N_252_0.BLIF N_252 -0 1 -.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF amiga_bus_enable_dma_high_0_un0_n -11 1 -.names N_76_i.BLIF N_76 -0 1 -.names amiga_bus_enable_dma_high_0_un1_n.BLIF amiga_bus_enable_dma_high_0_un0_n.BLIF N_22 -1- 1 --1 1 -.names N_17.BLIF N_17_i -0 1 -.names pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_low_0_un3_n -0 1 -.names N_36_0.BLIF inst_VMA_INTreg.D -0 1 -.names pos_clk_amiga_bus_enable_dma_low_3_n.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_low_0_un1_n -11 1 -.names CLK_OSZI_c.BLIF RST_DLY_0_.C -1 1 -.names N_157_i.BLIF N_157 -0 1 -.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF amiga_bus_enable_dma_low_0_un0_n -11 1 -.names N_160_0.BLIF N_160 -0 1 -.names amiga_bus_enable_dma_low_0_un1_n.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF N_21 -1- 1 --1 1 -.names N_161_0.BLIF N_161 -0 1 -.names pos_clk_un5_bgack_030_int_d_n.BLIF a0_dma_0_un3_n -0 1 -.names N_162_0.BLIF N_162 -0 1 -.names pos_clk_a0_dma_3_n.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF a0_dma_0_un1_n -11 1 -.names CLK_OSZI_c.BLIF RST_DLY_1_.C -1 1 -.names N_165.BLIF N_165_i -0 1 -.names inst_A0_DMA.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n -11 1 -.names N_167.BLIF N_167_i -0 1 -.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF N_19 -1- 1 --1 1 -.names A_DECODE_16_.BLIF a_decode_c_16__n -1 1 -.names N_166.BLIF N_166_i -0 1 -.names pos_clk_un5_bgack_030_int_d_n.BLIF rw_000_dma_0_un3_n -0 1 -.names A_DECODE_17_.BLIF a_decode_c_17__n -1 1 -.names N_168.BLIF N_168_i -0 1 -.names pos_clk_rw_000_dma_3_n.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF rw_000_dma_0_un1_n -11 1 -.names CLK_OSZI_c.BLIF RST_DLY_2_.C -1 1 -.names A_DECODE_18_.BLIF a_decode_c_18__n -1 1 -.names N_170.BLIF N_170_i -0 1 -.names inst_RW_000_DMA.BLIF rw_000_dma_0_un3_n.BLIF rw_000_dma_0_un0_n -11 1 -.names A_DECODE_19_.BLIF a_decode_c_19__n -1 1 -.names N_164.BLIF N_164_i -0 1 -.names rw_000_dma_0_un1_n.BLIF rw_000_dma_0_un0_n.BLIF N_18 -1- 1 --1 1 -.names A_DECODE_20_.BLIF a_decode_c_20__n -1 1 -.names N_102.BLIF N_102_i -0 1 -.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i -0 1 -.names A_DECODE_21_.BLIF a_decode_c_21__n -1 1 -.names N_264_i.BLIF N_264 -0 1 -.names N_106_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n -11 1 -.names CLK_OSZI_c.BLIF inst_DS_000_DMA.C -1 1 -.names A_DECODE_22_.BLIF a_decode_c_22__n -1 1 -.names N_79_i.BLIF N_79 -0 1 -.names N_107_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n -11 1 -.names A_DECODE_23_.BLIF a_decode_c_23__n -1 1 -.names N_78_i.BLIF N_78 -0 1 -.names N_117_i.BLIF RST_c.BLIF N_46_0 -11 1 -.names N_119.BLIF N_119_i -0 1 -.names N_129_i.BLIF N_130_i.BLIF un11_amiga_bus_enable_high_i -11 1 -.names A_1_.BLIF a_c_1__n -1 1 -.names un1_LDS_000_INT_0.BLIF un1_LDS_000_INT -0 1 -.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_86_i -11 1 -.names CLK_OSZI_c.BLIF inst_DSACK1_INT.C -1 1 -.names nEXP_SPACE.BLIF nEXP_SPACE_c -1 1 -.names N_23.BLIF N_23_i -0 1 -.names BGACK_030_INT_i.BLIF RW_000_i.BLIF pos_clk_rw_000_dma_3_0_n -11 1 -.names N_30_0.BLIF BG_000DFFreg.D -0 1 -.names a_c_1__n.BLIF a_i_1__n -0 1 -.names BG_030.BLIF BG_030_c -1 1 -.names N_20.BLIF N_20_i -0 1 -.names a_c_1__n.BLIF BGACK_030_INT_i.BLIF pos_clk_amiga_bus_enable_dma_low_3_0_n -11 1 -.names BG_000DFFreg.BLIF BG_000 -1 1 -.names N_33_0.BLIF inst_UDS_000_INT.D -0 1 -.names a_i_1__n.BLIF BGACK_030_INT_i.BLIF pos_clk_amiga_bus_enable_dma_high_3_0_n -11 1 -.names CLK_OSZI_c.BLIF inst_AS_000_INT.C -1 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030 -1 1 -.names N_13.BLIF N_13_i -0 1 -.names RST_c.BLIF pos_clk_un5_bgack_030_int_d_i_n.BLIF SIZE_DMA_3_sqmuxa -11 1 -.names BGACK_000.BLIF BGACK_000_c -1 1 -.names N_40_0.BLIF inst_LDS_000_INT.D -0 1 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF pos_clk_un5_bgack_030_int_d_i_n -11 1 -.names CLK_030.BLIF CLK_030_c -1 1 -.names ipl_c_2__n.BLIF ipl_c_i_2__n -0 1 -.names ahigh_c_31__n.BLIF ahigh_i_31__n -0 1 -.names CLK_000.BLIF CLK_000_D_0_.D -1 1 -.names N_51_0.BLIF IPL_D0_2_.D -0 1 -.names ahigh_c_30__n.BLIF ahigh_i_30__n -0 1 -.names CLK_OSZI_c.BLIF inst_AMIGA_DS.C -1 1 -.names CLK_OSZI.BLIF CLK_OSZI_c -1 1 -.names N_26.BLIF N_26_i -0 1 -.names ahigh_c_29__n.BLIF ahigh_i_29__n -0 1 -.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT -1 1 -.names N_29_0.BLIF IPL_030DFF_2_reg.D -0 1 -.names ahigh_c_28__n.BLIF ahigh_i_28__n -0 1 -.names CLK_OUT_INTreg.BLIF CLK_EXP -1 1 -.names a_c_0__n.BLIF a_c_i_0__n -0 1 -.names N_131_i.BLIF N_277_i.BLIF N_64_0 -11 1 -.names un21_fpu_cs_i.BLIF FPU_CS -1 1 -.names size_c_1__n.BLIF size_c_i_1__n -0 1 -.names AS_030_i.BLIF N_91.BLIF N_131 -11 1 -.names CLK_OSZI_c.BLIF inst_AS_030_D0.C -1 1 -.names FPU_SENSE.BLIF FPU_SENSE_c -1 1 -.names DS_000_ENABLE_0_sqmuxa_1.BLIF DS_000_ENABLE_0_sqmuxa_1_i -0 1 -.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i -0 1 -.names IPL_030DFF_0_reg.BLIF IPL_030_0_ -1 1 -.names un1_DS_000_ENABLE_0_sqmuxa_i.BLIF un1_DS_000_ENABLE_0_sqmuxa -0 1 -.names FPU_SENSE_c.BLIF FPU_SENSE_i -0 1 -.names IPL_030DFF_1_reg.BLIF IPL_030_1_ -1 1 -.names BG_030_c.BLIF BG_030_c_i -0 1 -.names un10_ciin.BLIF un10_ciin_i -0 1 -.names IPL_030DFF_2_reg.BLIF IPL_030_2_ -1 1 -.names pos_clk_un6_bg_030_n.BLIF pos_clk_un6_bg_030_i_n -0 1 -.names nEXP_SPACE_i.BLIF un10_ciin_i.BLIF un13_ciin -11 1 -.names CLK_OSZI_c.BLIF inst_DTACK_D0.C -1 1 -.names IPL_0_.BLIF ipl_c_0__n -1 1 -.names pos_clk_un9_bg_030_0_n.BLIF pos_clk_un9_bg_030_n -0 1 -.names inst_AS_030_D0.BLIF AS_030_D0_i -0 1 -.names IPL_1_.BLIF ipl_c_1__n -1 1 -.names inst_UDS_000_INT.BLIF UDS_000_INT_i -0 1 -.names BGACK_030_INT_i.BLIF N_86_i.BLIF N_106 -11 1 -.names IPL_2_.BLIF ipl_c_2__n -1 1 -.names un1_UDS_000_INT_0.BLIF un1_UDS_000_INT -0 1 -.names BGACK_030_INT_i.BLIF N_86.BLIF N_107 -11 1 -.names inst_LDS_000_INT.BLIF LDS_000_INT_i -0 1 -.names LDS_000_c.BLIF UDS_000_c.BLIF N_117 -11 1 -.names CLK_OSZI_c.BLIF inst_VPA_D.C -1 1 -.names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un1_UDS_000_INT_0 -11 1 -.names AS_000_INT_i.BLIF AS_030_i.BLIF N_122 -11 1 -.names vcc_n_n.BLIF AVEC -1 1 -.names N_8.BLIF RST_c.BLIF inst_DS_000_ENABLE.D -11 1 -.names AS_030_i.BLIF DSACK1_INT_i.BLIF N_123 -11 1 -.names N_250_i.BLIF E -1 1 -.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n -0 1 -.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF pos_clk_a0_dma_3_n -11 1 -.names VPA.BLIF VPA_c -1 1 -.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n -11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i -0 1 -.names CLK_OSZI_c.BLIF inst_RESET_OUT.C -1 1 -.names inst_VMA_INTreg.BLIF VMA -1 1 -.names BG_000DFFreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n -11 1 -.names AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF BGACK_030_INT_i.BLIF N_129 -11 1 -.names RST.BLIF RST_c -1 1 -.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF N_23 -1- 1 --1 1 -.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D -0 1 -.names RESET.BLIF RESET_c -1 1 -.names SM_AMIGA_6_.BLIF uds_000_int_0_un3_n -0 1 -.names G_122.BLIF N_224_i -0 1 -.names a_c_0__n.BLIF SM_AMIGA_6_.BLIF uds_000_int_0_un1_n -11 1 -.names G_123.BLIF N_225_i -0 1 -.names CLK_OSZI_c.BLIF inst_DS_000_ENABLE.C -1 1 -.names FC_0_.BLIF fc_c_0__n -1 1 -.names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n -11 1 -.names G_124.BLIF N_226_i -0 1 -.names FC_1_.BLIF fc_c_1__n -1 1 -.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_20 -1- 1 --1 1 -.names a_decode_c_18__n.BLIF a_decode_i_18__n -0 1 -.names gnd_n_n.BLIF AMIGA_ADDR_ENABLE -1 1 -.names SM_AMIGA_6_.BLIF lds_000_int_0_un3_n -0 1 -.names a_decode_c_19__n.BLIF a_decode_i_19__n -0 1 -.names AMIGA_BUS_DATA_DIR_c.BLIF AMIGA_BUS_DATA_DIR -1 1 -.names pos_clk_un10_sm_amiga_i_n.BLIF SM_AMIGA_6_.BLIF lds_000_int_0_un1_n -11 1 -.names CLK_OSZI_c.BLIF BG_000DFFreg.C -1 1 -.names un1_amiga_bus_enable_low_i.BLIF AMIGA_BUS_ENABLE_LOW -1 1 -.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n -11 1 -.names un11_amiga_bus_enable_high_i.BLIF AMIGA_BUS_ENABLE_HIGH -1 1 -.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF N_13 -1- 1 --1 1 -.names a_decode_c_16__n.BLIF a_decode_i_16__n -0 1 -.names DS_000_ENABLE_1_sqmuxa.BLIF ds_000_enable_0_un3_n -0 1 -.names N_159_0.BLIF RW_c_i.BLIF pos_clk_rw_000_int_5_0_n -11 1 -.names N_78.BLIF N_101_i.BLIF N_136_i_1 -11 1 -.names inst_DS_000_ENABLE.BLIF DS_000_ENABLE_1_sqmuxa.BLIF ds_000_enable_0_un1_n -11 1 -.names N_79.BLIF N_159_0.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 -11 1 -.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.C -1 1 -.names N_136_i_1.BLIF RST_c.BLIF SM_AMIGA_0_.D -11 1 -.names un1_DS_000_ENABLE_0_sqmuxa.BLIF ds_000_enable_0_un3_n.BLIF ds_000_enable_0_un0_n -11 1 -.names N_104_i.BLIF SM_AMIGA_i_7_.BLIF N_159_0 -11 1 -.names N_103_i.BLIF N_104_i.BLIF N_152_i_1 -11 1 -.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_8 -1- 1 --1 1 -.names un1_rst_2_1.BLIF inst_BGACK_030_INT_D.D -0 1 -.names N_152_i_1.BLIF RST_c.BLIF SM_AMIGA_i_7_.D -11 1 -.names BG_030_c_i.BLIF pos_clk_un6_bg_030_i_n.BLIF pos_clk_un9_bg_030_0_n -11 1 -.names cpu_est_0_0_.BLIF cpu_est_0_.D -0 1 -.names N_76.BLIF N_105_i.BLIF N_146_i_1 -11 1 -.names un1_amiga_bus_enable_low.BLIF un1_amiga_bus_enable_low_i -0 1 -.names N_274.BLIF inst_AS_030_D0.D -0 1 -.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.C -1 1 -.names N_146_i_1.BLIF RST_c.BLIF SM_AMIGA_5_.D -11 1 -.names un21_fpu_cs.BLIF un21_fpu_cs_i -0 1 -.names pos_clk_ipl_n.BLIF ipl_030_0_0__un3_n -0 1 -.names N_115_i.BLIF N_116_i.BLIF N_267_i_1 +.names a_decode_i_18__n.BLIF a_decode_i_19__n.BLIF N_282_0_3 11 1 .names SM_AMIGA_3_.BLIF sm_amiga_i_3__n 0 1 -.names ipl_c_0__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_0__un1_n -11 1 -.names N_267_i_1.BLIF RST_c.BLIF RST_DLY_0_.D -11 1 -.names N_157.BLIF sm_amiga_i_3__n.BLIF N_166 -11 1 -.names IPL_030DFF_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n -11 1 -.names N_226_i.BLIF N_224_i.BLIF pos_clk_ipl_1_n -11 1 -.names N_161.BLIF sm_amiga_i_2__n.BLIF N_165 -11 1 -.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_24 -1- 1 --1 1 -.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C +.names CLK_OSZI_c.BLIF cpu_est_1_.C 1 1 -.names pos_clk_ipl_1_n.BLIF N_225_i.BLIF pos_clk_ipl_n +.names N_282_0_1.BLIF N_282_0_2.BLIF N_282_0_4 11 1 +.names N_68_i.BLIF SM_AMIGA_5_.BLIF N_135_0 +11 1 +.names N_282_0_4.BLIF N_282_0_3.BLIF N_282_0 +11 1 +.names inst_VPA_D.BLIF VPA_D_i +0 1 +.names size_c_0__n.BLIF a_c_i_0__n.BLIF pos_clk_un10_sm_amiga_i_1_n +11 1 +.names cpu_est_0_.BLIF cpu_est_i_0__n +0 1 +.names pos_clk_un10_sm_amiga_i_1_n.BLIF size_c_i_1__n.BLIF pos_clk_un10_sm_amiga_i_n +11 1 +.names N_98_i.BLIF cpu_est_i_2__n.BLIF N_208 +11 1 +.names CLK_OSZI_c.BLIF cpu_est_2_.C +1 1 +.names ahigh_i_24__n.BLIF ahigh_i_25__n.BLIF un10_ciin_1 +11 1 +.names N_143_i.BLIF N_144_i.BLIF pos_clk_un9_clk_000_pe_0_n +11 1 +.names ahigh_i_26__n.BLIF ahigh_i_27__n.BLIF un10_ciin_2 +11 1 +.names N_145_i.BLIF RST_c.BLIF N_35_0 +11 1 +.names ahigh_i_28__n.BLIF ahigh_i_29__n.BLIF un10_ciin_3 +11 1 +.names N_146_i.BLIF RST_c.BLIF N_36_0 +11 1 +.names N_21_0.BLIF IPL_030DFF_0_reg.D +0 1 +.names N_147_i.BLIF N_148_i.BLIF cpu_est_2_0_1__n +11 1 +.names CLK_OSZI_c.BLIF cpu_est_3_.C +1 1 +.names ipl_c_2__n.BLIF ipl_c_i_2__n +0 1 +.names N_149_i.BLIF N_208_i.BLIF cpu_est_2_0_2__n +11 1 +.names N_43_0.BLIF IPL_D0_2_.D +0 1 +.names N_80.BLIF N_154_i.BLIF cpu_est_2_0_3__n +11 1 +.names ipl_c_1__n.BLIF ipl_c_i_1__n +0 1 +.names N_155_i.BLIF N_162_i.BLIF un5_e_0 +11 1 +.names N_42_0.BLIF IPL_D0_1_.D +0 1 +.names AS_030_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_0.BLIF N_63_0 +11 1 +.names CLK_OSZI_c.BLIF CLK_000_D_0_.C +1 1 +.names ipl_c_0__n.BLIF ipl_c_i_0__n +0 1 +.names N_259_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n +11 1 +.names N_41_0.BLIF IPL_D0_0_.D +0 1 +.names N_260_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n +11 1 +.names DTACK_c.BLIF DTACK_c_i +0 1 +.names N_190_i.BLIF N_191_i.BLIF cpu_est_0_.D +11 1 +.names N_45_0.BLIF inst_DTACK_D0.D +0 1 +.names inst_AS_030_D0.BLIF AS_030_D0_i +0 1 +.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.C +1 1 +.names VPA_c.BLIF VPA_c_i +0 1 +.names CLK_000_D_1_.BLIF clk_000_d_i_1__n +0 1 +.names N_44_0.BLIF inst_VPA_D.D +0 1 +.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_68_i +11 1 +.names N_13.BLIF N_13_i +0 1 +.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i +0 1 +.names N_27_0.BLIF inst_VMA_INTreg.D +0 1 +.names BGACK_030_INT_i.BLIF N_128.BLIF N_259 +11 1 +.names CLK_OSZI_c.BLIF inst_VPA_D.C +1 1 +.names inst_LDS_000_INT.BLIF LDS_000_INT_i +0 1 +.names BGACK_030_INT_i.BLIF N_128_i.BLIF N_260 +11 1 +.names un1_LDS_000_INT_0.BLIF un1_LDS_000_INT +0 1 .names SM_AMIGA_2_.BLIF sm_amiga_i_2__n 0 1 -.names pos_clk_ipl_n.BLIF ipl_030_0_1__un3_n +.names N_147.BLIF N_147_i 0 1 -.names N_250_i_1.BLIF N_263_i.BLIF N_250_i +.names N_134.BLIF sm_amiga_i_2__n.BLIF N_182 11 1 -.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +.names N_148.BLIF N_148_i 0 1 -.names ipl_c_1__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_1__un1_n +.names N_68_i.BLIF N_131.BLIF N_183 11 1 -.names N_255_i.BLIF N_256_i.BLIF N_189_i_1 +.names CLK_OSZI_c.BLIF inst_DTACK_D0.C +1 1 +.names cpu_est_2_0_1__n.BLIF cpu_est_2_1__n +0 1 +.names N_107.BLIF sm_amiga_i_3__n.BLIF N_184 11 1 -.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_164 +.names N_146.BLIF N_146_i +0 1 +.names N_135.BLIF sm_amiga_i_4__n.BLIF N_185 11 1 -.names IPL_030DFF_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n +.names N_36_0.BLIF inst_A0_DMA.D +0 1 +.names N_72_i.BLIF SM_AMIGA_0_.BLIF N_268 11 1 -.names N_189_i_1.BLIF N_263_i.BLIF N_189_i +.names N_145.BLIF N_145_i +0 1 +.names N_68.BLIF cpu_est_i_0__n.BLIF N_190 11 1 -.names DS_000_ENABLE_0_sqmuxa_1_i.BLIF N_157.BLIF un1_DS_000_ENABLE_0_sqmuxa_i +.names CLK_OSZI_c.BLIF inst_DS_000_ENABLE.C +1 1 +.names N_35_0.BLIF inst_AMIGA_DS.D +0 1 +.names N_68_i.BLIF cpu_est_0_.BLIF N_191 11 1 -.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF N_25 +.names N_143.BLIF N_143_i +0 1 +.names inst_DTACK_D0.BLIF DTACK_D0_i +0 1 +.names N_144.BLIF N_144_i +0 1 +.names DTACK_D0_i.BLIF inst_VPA_D.BLIF N_202 +11 1 +.names pos_clk_un9_clk_000_pe_0_n.BLIF pos_clk_un9_clk_000_pe_n +0 1 +.names N_93_i.BLIF RW_c.BLIF N_203 +11 1 +.names CLK_OSZI_c.BLIF BG_000DFFreg.C +1 1 +.names N_20.BLIF N_20_i +0 1 +.names cpu_est_2_.BLIF cpu_est_i_2__n +0 1 +.names N_23_0.BLIF IPL_030DFF_2_reg.D +0 1 +.names ahigh_c_28__n.BLIF ahigh_i_28__n +0 1 +.names N_19.BLIF N_19_i +0 1 +.names ahigh_c_29__n.BLIF ahigh_i_29__n +0 1 +.names N_22_0.BLIF IPL_030DFF_1_reg.D +0 1 +.names ahigh_c_30__n.BLIF ahigh_i_30__n +0 1 +.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C +1 1 +.names N_18.BLIF N_18_i +0 1 +.names ahigh_c_31__n.BLIF ahigh_i_31__n +0 1 +.names N_182.BLIF N_182_i +0 1 +.names N_181.BLIF N_181_i +0 1 +.names N_260.BLIF N_260_i +0 1 +.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C +1 1 +.names pos_clk_size_dma_6_0_1__n.BLIF SIZE_DMA_1_.D +0 1 +.names N_72.BLIF SM_AMIGA_2_.BLIF N_141 +11 1 +.names N_259.BLIF N_259_i +0 1 +.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_142 +11 1 +.names pos_clk_size_dma_6_0_0__n.BLIF SIZE_DMA_0_.D +0 1 +.names LDS_000_c.BLIF UDS_000_c.BLIF N_145 +11 1 +.names N_63_0.BLIF N_63 +0 1 +.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF N_146 +11 1 +.names CLK_OSZI_c.BLIF inst_RW_000_INT.C +1 1 +.names N_155.BLIF N_155_i +0 1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_147 +11 1 +.names N_162.BLIF N_162_i +0 1 +.names N_98.BLIF cpu_est_2_.BLIF N_149 +11 1 +.names un5_e_0.BLIF un5_e +0 1 +.names N_98_i.BLIF cpu_est_2_.BLIF N_154 +11 1 +.names N_154.BLIF N_154_i +0 1 +.names N_82_i.BLIF cpu_est_3_.BLIF N_155 +11 1 +.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C +1 1 +.names cpu_est_2_0_3__n.BLIF cpu_est_2_3__n +0 1 +.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D +0 1 +.names N_149.BLIF N_149_i +0 1 +.names G_105.BLIF N_187_i +0 1 +.names N_208.BLIF N_208_i +0 1 +.names G_106.BLIF N_188_i +0 1 +.names cpu_est_2_0_2__n.BLIF cpu_est_2_2__n +0 1 +.names G_107.BLIF N_189_i +0 1 +.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C +1 1 +.names inst_VMA_INTreg.BLIF VMA_INT_i +0 1 +.names ahigh_c_24__n.BLIF ahigh_i_24__n +0 1 +.names N_98_i.BLIF N_98 +0 1 +.names ahigh_c_25__n.BLIF ahigh_i_25__n +0 1 +.names N_93_i.BLIF N_93 +0 1 +.names ahigh_c_26__n.BLIF ahigh_i_26__n +0 1 +.names N_80_i.BLIF N_80 +0 1 +.names ahigh_c_27__n.BLIF ahigh_i_27__n +0 1 +.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C +1 1 +.names N_72_i.BLIF N_72 +0 1 +.names N_126.BLIF inst_RW_000_DMA.D +0 1 +.names N_68_i.BLIF N_68 +0 1 +.names N_150.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D +0 1 +.names N_59_i.BLIF N_59 +0 1 +.names N_151.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D +0 1 +.names N_190.BLIF N_190_i +0 1 +.names ipl_c_i_1__n.BLIF RST_c.BLIF N_42_0 +11 1 +.names CLK_OSZI_c.BLIF inst_DS_000_DMA.C +1 1 +.names N_191.BLIF N_191_i +0 1 +.names ipl_c_i_2__n.BLIF RST_c.BLIF N_43_0 +11 1 +.names N_267.BLIF N_267_i +0 1 +.names N_18_i.BLIF RST_c.BLIF N_21_0 +11 1 +.names N_266.BLIF N_266_i +0 1 +.names N_19_i.BLIF RST_c.BLIF N_22_0 +11 1 +.names N_186.BLIF N_186_i +0 1 +.names N_20_i.BLIF RST_c.BLIF N_23_0 +11 1 +.names CLK_OSZI_c.BLIF inst_DSACK1_INT.C +1 1 +.names N_185.BLIF N_185_i +0 1 +.names N_68.BLIF cpu_est_0_1__un3_n +0 1 +.names N_183.BLIF N_183_i +0 1 +.names cpu_est_1_.BLIF N_68.BLIF cpu_est_0_1__un1_n +11 1 +.names N_184.BLIF N_184_i +0 1 +.names cpu_est_2_1__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n +11 1 +.names N_268.BLIF N_268_i +0 1 +.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D +1- 1 +-1 1 +.names CLK_OSZI_c.BLIF inst_AS_000_INT.C +1 1 +.names N_132_0.BLIF N_132 +0 1 +.names N_68.BLIF cpu_est_0_2__un3_n +0 1 +.names N_142.BLIF N_142_i +0 1 +.names cpu_est_2_.BLIF N_68.BLIF cpu_est_0_2__un1_n +11 1 +.names N_141.BLIF N_141_i +0 1 +.names cpu_est_2_2__n.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n +11 1 +.names N_135_0.BLIF N_135 +0 1 +.names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D +1- 1 +-1 1 +.names CLK_OSZI_c.BLIF inst_AMIGA_DS.C +1 1 +.names N_134_0.BLIF N_134 +0 1 +.names N_68.BLIF cpu_est_0_3__un3_n +0 1 +.names N_131_i.BLIF N_131 +0 1 +.names cpu_est_3_.BLIF N_68.BLIF cpu_est_0_3__un1_n +11 1 +.names LDS_000_c.BLIF LDS_000_c_i +0 1 +.names cpu_est_2_3__n.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n +11 1 +.names UDS_000_c.BLIF UDS_000_c_i +0 1 +.names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_.D 1- 1 -1 1 .names CLK_OSZI_c.BLIF inst_A0_DMA.C 1 1 -.names nEXP_SPACE_c.BLIF inst_AS_030_D0.BLIF pos_clk_un6_bg_030_1_n -11 1 -.names un7_as_030.BLIF un7_as_030_i +.names N_128_i.BLIF N_128 0 1 -.names pos_clk_un6_bg_030_1_n.BLIF CLK_000_D_0_.BLIF pos_clk_un6_bg_030_n -11 1 -.names pos_clk_ipl_n.BLIF ipl_030_0_2__un3_n +.names pos_clk_ipl_n.BLIF ipl_030_0_0__un3_n 0 1 -.names N_122.BLIF N_122_i +.names N_107_i.BLIF N_107 0 1 -.names N_77.BLIF N_228_i.BLIF N_108_1 +.names ipl_c_0__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_0__un1_n 11 1 -.names ipl_c_2__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_2__un1_n -11 1 -.names N_123.BLIF N_123_i +.names N_203.BLIF N_203_i 0 1 -.names N_108_1.BLIF rst_dly_i_2__n.BLIF N_108 +.names IPL_030DFF_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n 11 1 -.names IPL_030DFF_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n -11 1 -.names un6_ds_030.BLIF un6_ds_030_i +.names un1_DS_000_ENABLE_0_sqmuxa_0.BLIF un1_DS_000_ENABLE_0_sqmuxa 0 1 +.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_18 +1- 1 +-1 1 .names CLK_OSZI_c.BLIF inst_RW_000_DMA.C 1 1 -.names N_228_i.BLIF rst_dly_i_0__n.BLIF N_114_1 +.names N_201.BLIF N_201_i +0 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_1__un3_n +0 1 +.names N_202.BLIF N_202_i +0 1 +.names ipl_c_1__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_1__un1_n 11 1 -.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_26 +.names N_60_0.BLIF N_60 +0 1 +.names IPL_030DFF_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n +11 1 +.names N_274.BLIF N_274_i +0 1 +.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF N_19 1- 1 -1 1 -.names un13_ciin.BLIF un13_ciin_i -0 1 -.names N_114_1.BLIF rst_dly_i_1__n.BLIF N_114 -11 1 -.names N_26_i.BLIF RST_c.BLIF N_29_0 -11 1 -.names N_64.BLIF as_030_000_sync_0_un3_n -0 1 -.names N_277.BLIF BGACK_000_c.BLIF un21_berr_1 -11 1 -.names ipl_c_i_2__n.BLIF RST_c.BLIF N_51_0 -11 1 -.names inst_AS_030_000_SYNC.BLIF N_64.BLIF as_030_000_sync_0_un1_n -11 1 -.names un21_berr_1.BLIF FPU_SENSE_c.BLIF un21_berr -11 1 -.names N_13_i.BLIF RST_c.BLIF N_40_0 -11 1 -.names AS_030_c.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n -11 1 -.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C +.names CLK_OSZI_c.BLIF inst_AS_030_D0.C 1 1 -.names N_277.BLIF BGACK_000_c.BLIF un21_fpu_cs_1 +.names pos_clk_un6_bgack_000_0_n.BLIF pos_clk_un6_bgack_000_n +0 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_2__un3_n +0 1 +.names RW_c.BLIF RW_c_i +0 1 +.names ipl_c_2__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_2__un1_n 11 1 -.names N_20_i.BLIF RST_c.BLIF N_33_0 +.names pos_clk_rw_000_int_5_0_n.BLIF pos_clk_rw_000_int_5_n +0 1 +.names IPL_030DFF_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n 11 1 -.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_14 +.names N_168.BLIF N_168_i +0 1 +.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_20 1- 1 -1 1 -.names un21_fpu_cs_1.BLIF FPU_SENSE_i.BLIF un21_fpu_cs -11 1 -.names N_23_i.BLIF RST_c.BLIF N_30_0 -11 1 -.names un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un3_n -0 1 -.names inst_BGACK_030_INTreg.BLIF AS_030_000_SYNC_i.BLIF N_130_1 -11 1 -.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un1_LDS_000_INT_0 -11 1 -.names pos_clk_rw_000_int_5_n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un1_n -11 1 -.names N_130_1.BLIF AS_030_i.BLIF N_130 -11 1 -.names N_118_i.BLIF N_119_i.BLIF inst_AS_000_INT.D -11 1 -.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n -11 1 -.names CLK_OSZI_c.BLIF inst_RW_000_INT.C +.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.C 1 1 -.names cpu_est_i_2__n.BLIF VMA_INT_i.BLIF pos_clk_un29_clk_000_ne_1_1_n -11 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_0__n +.names N_167.BLIF N_167_i 0 1 -.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_15 +.names un3_as_030.BLIF un3_as_030_i +0 1 +.names N_170.BLIF N_170_i +0 1 +.names N_175.BLIF N_175_i +0 1 +.names N_169.BLIF N_169_i +0 1 +.names N_219.BLIF N_219_i +0 1 +.names N_38_0.BLIF inst_AS_030_D0.D +0 1 +.names un2_ds_030.BLIF un2_ds_030_i +0 1 +.names CLK_OSZI_c.BLIF inst_AS_030_D1.C +1 1 +.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 +0 1 +.names N_63.BLIF ds_000_enable_0_un3_n +0 1 +.names N_282_0.BLIF N_282 +0 1 +.names un1_DS_000_ENABLE_0_sqmuxa.BLIF N_63.BLIF ds_000_enable_0_un1_n +11 1 +.names CLK_000_D_3_.BLIF clk_000_d_i_3__n +0 1 +.names inst_DS_000_ENABLE.BLIF ds_000_enable_0_un3_n.BLIF ds_000_enable_0_un0_n +11 1 +.names N_96_0.BLIF N_96 +0 1 +.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_6 1- 1 -1 1 -.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF pos_clk_un29_clk_000_ne_1_2_n -11 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_78_i -11 1 -.names N_15_i.BLIF RST_c.BLIF N_38_0 -11 1 -.names pos_clk_un29_clk_000_ne_1_1_n.BLIF pos_clk_un29_clk_000_ne_1_2_n.BLIF pos_clk_un29_clk_000_ne_1_3_n -11 1 -.names N_78_i.BLIF SM_AMIGA_6_.BLIF N_79_i -11 1 -.names N_14_i.BLIF RST_c.BLIF N_39_0 -11 1 -.names pos_clk_un29_clk_000_ne_1_3_n.BLIF cpu_est_i_1__n.BLIF pos_clk_un29_clk_000_ne_1_n -11 1 -.names N_78.BLIF N_102_i.BLIF N_264_i -11 1 -.names ipl_c_i_0__n.BLIF RST_c.BLIF N_49_0 -11 1 -.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C +.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C 1 1 -.names N_78_i.BLIF N_263.BLIF N_261_1 -11 1 -.names N_85_i.BLIF sm_amiga_i_i_7__n.BLIF N_162_0 -11 1 -.names ipl_c_i_1__n.BLIF RST_c.BLIF N_50_0 -11 1 -.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_261_2 -11 1 -.names SM_AMIGA_3_.BLIF pos_clk_un31_clk_000_ne_n.BLIF N_161_0 -11 1 -.names N_24_i.BLIF RST_c.BLIF N_27_0 -11 1 -.names N_261_1.BLIF N_261_2.BLIF N_261 -11 1 -.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n +.names N_129_i.BLIF N_129 0 1 -.names N_25_i.BLIF RST_c.BLIF N_28_0 -11 1 -.names N_76_i.BLIF N_251_i.BLIF N_262_1 -11 1 -.names N_76_i.BLIF SM_AMIGA_5_.BLIF N_160_0 -11 1 -.names vcc_n_n -1 -.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C -1 1 -.names N_263.BLIF VPA_D_i.BLIF N_262_2 -11 1 -.names N_78_i.BLIF SM_AMIGA_4_.BLIF N_157_i -11 1 -.names gnd_n_n -.names N_262_1.BLIF N_262_2.BLIF N_262 -11 1 -.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n +.names pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un3_n 0 1 -.names A_DECODE_15_.BLIF a_decode_15__n -1 1 -.names N_78_i.BLIF RW_c.BLIF DS_000_ENABLE_0_sqmuxa_1_1 -11 1 -.names N_162.BLIF sm_amiga_i_6__n.BLIF N_170 -11 1 -.names A_DECODE_14_.BLIF a_decode_14__n -1 1 -.names DS_000_ENABLE_0_sqmuxa_1_1.BLIF SM_AMIGA_6_.BLIF DS_000_ENABLE_0_sqmuxa_1 -11 1 -.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n +.names N_15.BLIF N_15_i 0 1 -.names A_DECODE_13_.BLIF a_decode_13__n -1 1 -.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C -1 1 -.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_259_1 +.names cpu_est_i_1__n.BLIF pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un1_n 11 1 -.names N_160.BLIF sm_amiga_i_4__n.BLIF N_168 -11 1 -.names A_DECODE_12_.BLIF a_decode_12__n -1 1 -.names N_259_1.BLIF cpu_est_i_3__n.BLIF N_259 -11 1 -.names N_76_i.BLIF pos_clk_un31_clk_000_ne_n.BLIF N_167 -11 1 -.names A_DECODE_11_.BLIF a_decode_11__n -1 1 -.names N_16_i.BLIF N_254_i.BLIF N_250_i_1 -11 1 -.names N_251.BLIF cpu_est_2_.BLIF N_255 -11 1 -.names A_DECODE_10_.BLIF a_decode_10__n -1 1 -.names un6_amiga_bus_data_dir_1.BLIF un6_amiga_bus_data_dir_2.BLIF un6_amiga_bus_data_dir -11 1 -.names cpu_est_2_.BLIF cpu_est_i_2__n +.names N_26_0.BLIF inst_LDS_000_INT.D 0 1 -.names A_DECODE_9_.BLIF a_decode_9__n -1 1 -.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C -1 1 -.names AMIGA_DS_i.BLIF AS_000_i.BLIF pos_clk_as_000_dma6_1_n +.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n 11 1 -.names cpu_est_1_.BLIF cpu_est_i_2__n.BLIF N_16 -11 1 -.names A_DECODE_8_.BLIF a_decode_8__n -1 1 -.names pos_clk_un1_bgack_030_int_n.BLIF pos_clk_un3_n.BLIF pos_clk_as_000_dma6_2_n -11 1 -.names N_252.BLIF cpu_est_2_.BLIF N_254 -11 1 -.names A_DECODE_7_.BLIF a_decode_7__n -1 1 -.names pos_clk_as_000_dma6_1_n.BLIF pos_clk_as_000_dma6_2_n.BLIF pos_clk_as_000_dma6_n -11 1 -.names A_DECODE_6_.BLIF a_decode_6__n -1 1 -.names DS_000_DMA_0_sqmuxa_i.BLIF pos_clk_as_000_dma6_n.BLIF DS_000_DMA_1_sqmuxa_1 -11 1 -.names AS_030_c.BLIF AS_030_i +.names N_12.BLIF N_12_i 0 1 -.names A_DECODE_5_.BLIF a_decode_5__n -1 1 +.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_13 +1- 1 +-1 1 .names CLK_OSZI_c.BLIF inst_BGACK_030_INT_D.C 1 1 -.names DS_000_DMA_1_sqmuxa_1.BLIF pos_clk_un4_rw_000_i_n.BLIF DS_000_DMA_1_sqmuxa -11 1 -.names AS_030_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_i.BLIF DS_000_ENABLE_1_sqmuxa -11 1 -.names A_DECODE_4_.BLIF a_decode_4__n -1 1 -.names CLK_030_PE_0_.BLIF clk_030_pe_i_1__n.BLIF pos_clk_un4_rw_000_1_n -11 1 -.names N_76.BLIF sm_amiga_i_2__n.BLIF N_102 -11 1 -.names A_DECODE_3_.BLIF a_decode_3__n -1 1 -.names CLK_030_c.BLIF RW_000_i.BLIF pos_clk_un4_rw_000_2_n -11 1 -.names SM_AMIGA_i_7_.BLIF sm_amiga_i_i_7__n +.names N_28_0.BLIF inst_RW_000_INT.D 0 1 -.names A_DECODE_2_.BLIF a_decode_2__n -1 1 +.names N_6.BLIF RST_c.BLIF inst_DS_000_ENABLE.D +11 1 +.names N_11.BLIF N_11_i +0 1 +.names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un1_UDS_000_INT_0 +11 1 +.names N_29_0.BLIF inst_AS_030_000_SYNC.D +0 1 +.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un1_LDS_000_INT_0 +11 1 .names inst_CLK_OUT_PRE_D.BLIF CLK_OUT_INTreg.D 1 1 -.names pos_clk_un4_rw_000_1_n.BLIF pos_clk_un4_rw_000_2_n.BLIF pos_clk_un4_rw_000_n +.names N_5.BLIF N_5_i +0 1 +.names N_13_i.BLIF RST_c.BLIF N_27_0 11 1 -.names N_85.BLIF sm_amiga_i_i_7__n.BLIF N_103 -11 1 -.names pos_clk_un12_clk_out_int_n.BLIF AS_000_DMA_i.BLIF pos_clk_un13_clk_out_int_1_n -11 1 -.names N_78_i.BLIF SM_AMIGA_0_.BLIF N_104 +.names N_30_0.BLIF inst_BGACK_030_INTreg.D +0 1 +.names RST_c.BLIF VPA_c_i.BLIF N_44_0 11 1 .names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C 1 1 -.names pos_clk_un13_clk_out_int_1_n.BLIF pos_clk_un3_clk_out_int_n.BLIF pos_clk_un13_clk_out_int_n -11 1 -.names N_79.BLIF sm_amiga_i_5__n.BLIF N_105 -11 1 -.names N_76_i.BLIF N_137.BLIF N_125_1 -11 1 -.names inst_AS_000_INT.BLIF AS_000_INT_i +.names a_c_0__n.BLIF a_c_i_0__n 0 1 -.names N_125_1.BLIF RST_c.BLIF N_125 +.names DTACK_c_i.BLIF RST_c.BLIF N_45_0 11 1 -.names AS_000_INT_i.BLIF N_274.BLIF N_118 -11 1 -.names N_76.BLIF rst_dly_i_0__n.BLIF N_116_1 -11 1 -.names N_79_i.BLIF RST_c.BLIF N_119 +.names size_c_1__n.BLIF size_c_i_1__n +0 1 +.names ipl_c_i_0__n.BLIF RST_c.BLIF N_41_0 11 1 +.names N_163.BLIF N_163_i +0 1 +.names vcc_n_n +1 +.names N_244_0.BLIF N_244 +0 1 +.names gnd_n_n .names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_50.C 1 1 -.names N_116_1.BLIF RST_c.BLIF N_116 -11 1 -.names inst_VPA_D.BLIF VPA_D_i +.names N_164.BLIF N_164_i 0 1 -.names N_277_4.BLIF N_277_5.BLIF N_277 -11 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_1__n +.names A_DECODE_15_.BLIF a_decode_15__n +1 1 +.names N_165.BLIF N_165_i 0 1 -.names ahigh_i_24__n.BLIF ahigh_i_25__n.BLIF un10_ciin_1 -11 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_76_i -11 1 +.names A_DECODE_14_.BLIF a_decode_14__n +1 1 +.names un10_ciin.BLIF un10_ciin_i +0 1 +.names A_DECODE_13_.BLIF a_decode_13__n +1 1 .names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_D.D 1 1 -.names ahigh_i_26__n.BLIF ahigh_i_27__n.BLIF un10_ciin_2 -11 1 -.names cpu_est_1_.BLIF cpu_est_i_3__n.BLIF N_252_0 -11 1 -.names ahigh_i_28__n.BLIF ahigh_i_29__n.BLIF un10_ciin_3 -11 1 -.names cpu_est_1_.BLIF cpu_est_i_1__n +.names N_180.BLIF N_180_i 0 1 +.names A_DECODE_12_.BLIF a_decode_12__n +1 1 +.names N_262.BLIF N_262_i +0 1 +.names A_DECODE_11_.BLIF a_decode_11__n +1 1 .names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_D.C 1 1 -.names ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF un10_ciin_4 -11 1 -.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_251_i -11 1 -.names a_decode_c_23__n.BLIF AS_030_D0_i.BLIF un10_ciin_5 -11 1 -.names N_261_i.BLIF N_262_i.BLIF pos_clk_un9_clk_000_pe_0_n -11 1 -.names a_decode_c_20__n.BLIF a_decode_c_21__n.BLIF un10_ciin_6 -11 1 -.names N_258_i.BLIF N_259_i.BLIF cpu_est_2_0_1__n -11 1 -.names CYCLE_DMA_0_.BLIF G_95.X1 -1 1 -.names un10_ciin_1.BLIF un10_ciin_2.BLIF un10_ciin_7 -11 1 -.names N_255_i.BLIF N_257_i.BLIF cpu_est_2_0_2__n -11 1 -.names un10_ciin_3.BLIF un10_ciin_4.BLIF un10_ciin_8 -11 1 -.names cpu_est_3_.BLIF cpu_est_i_3__n +.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c 0 1 -.names pos_clk_un13_bgack_030_int_n.BLIF G_95.X2 +.names A_DECODE_10_.BLIF a_decode_10__n 1 1 -.names un10_ciin_5.BLIF un10_ciin_6.BLIF un10_ciin_9 -11 1 -.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_263 -11 1 -.names un10_ciin_7.BLIF un10_ciin_8.BLIF un10_ciin_10 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_0__n +.names pos_clk_un2_i_n.BLIF pos_clk_un2_n 0 1 -.names un10_ciin_9.BLIF a_decode_c_22__n.BLIF un10_ciin_11 -11 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_258 -11 1 -.names CLK_030_PE_0_.BLIF G_101.X1 +.names A_DECODE_9_.BLIF a_decode_9__n 1 1 -.names un10_ciin_10.BLIF un10_ciin_11.BLIF un10_ciin -11 1 -.names N_251_i.BLIF cpu_est_i_2__n.BLIF N_257 -11 1 -.names AS_000_i.BLIF BGACK_030_INT_i.BLIF un6_amiga_bus_data_dir_1 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_2__n.BLIF N_256 -11 1 -.names pos_clk_un13_clk_out_int_n.BLIF G_101.X2 -1 1 -.names RW_000_c.BLIF nEXP_SPACE_i.BLIF un6_amiga_bus_data_dir_2 -11 1 -.names RST_DLY_1_.BLIF rst_dly_i_1__n +.names N_3.BLIF N_3_i 0 1 -.names N_144_i_1.BLIF RST_c.BLIF SM_AMIGA_4_.D -11 1 -.names N_76.BLIF rst_dly_i_1__n.BLIF N_113 -11 1 -.names N_166_i.BLIF N_167_i.BLIF N_142_i_1 -11 1 -.names N_77_i.BLIF N_134.BLIF N_112 -11 1 -.names CLK_030_PE_1_.BLIF G_103.X1 +.names A_DECODE_8_.BLIF a_decode_8__n 1 1 -.names N_142_i_1.BLIF RST_c.BLIF SM_AMIGA_3_.D -11 1 -.names RST_DLY_2_.BLIF rst_dly_i_2__n +.names IPL_D0_0_.BLIF G_105.X1 +1 1 +.names N_32_0.BLIF inst_DS_000_DMA.D 0 1 -.names N_165_i.BLIF N_264_i.BLIF N_140_i_1 -11 1 -.names N_76.BLIF rst_dly_i_2__n.BLIF N_111 -11 1 -.names N_205.BLIF G_103.X2 +.names A_DECODE_7_.BLIF a_decode_7__n 1 1 -.names N_140_i_1.BLIF RST_c.BLIF SM_AMIGA_2_.D +.names N_4.BLIF N_4_i +0 1 +.names A_DECODE_6_.BLIF a_decode_6__n +1 1 +.names ipl_c_0__n.BLIF G_105.X2 +1 1 +.names N_31_0.BLIF inst_AS_000_DMA.D +0 1 +.names A_DECODE_5_.BLIF a_decode_5__n +1 1 +.names N_220_i.BLIF inst_BGACK_030_INT_D.D +0 1 +.names A_DECODE_4_.BLIF a_decode_4__n +1 1 +.names BG_030_c.BLIF BG_030_c_i +0 1 +.names A_DECODE_3_.BLIF a_decode_3__n +1 1 +.names IPL_D0_1_.BLIF G_106.X1 +1 1 +.names pos_clk_un9_bg_030_0_n.BLIF pos_clk_un9_bg_030_n +0 1 +.names A_DECODE_2_.BLIF a_decode_2__n +1 1 +.names N_17.BLIF N_17_i +0 1 +.names ipl_c_1__n.BLIF G_106.X2 +1 1 +.names N_24_0.BLIF inst_UDS_000_INT.D +0 1 +.names N_16.BLIF N_16_i +0 1 +.names N_25_0.BLIF BG_000DFFreg.D +0 1 +.names IPL_D0_2_.BLIF G_107.X1 +1 1 +.names N_205_i.BLIF N_205 +0 1 +.names N_140.BLIF N_140_i +0 1 +.names ipl_c_2__n.BLIF G_107.X2 +1 1 +.names A_DECODE_16_.BLIF a_decode_c_16__n +1 1 +.names inst_AMIGA_DS.BLIF AMIGA_DS_i +0 1 +.names A_DECODE_17_.BLIF a_decode_c_17__n +1 1 +.names N_199.BLIF N_199_i +0 1 +.names A_DECODE_18_.BLIF a_decode_c_18__n +1 1 +.names N_198.BLIF N_198_i +0 1 +.names CYCLE_DMA_1_.BLIF G_91.X1 +1 1 +.names A_DECODE_19_.BLIF a_decode_c_19__n +1 1 +.names RW_000_c.BLIF RW_000_i +0 1 +.names A_DECODE_20_.BLIF a_decode_c_20__n +1 1 +.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF N_262 11 1 -.names N_137.BLIF N_265_2.BLIF N_109 +.names N_199.BLIF G_91.X2 +1 1 +.names A_DECODE_21_.BLIF a_decode_c_21__n +1 1 +.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n +0 1 +.names A_DECODE_22_.BLIF a_decode_c_22__n +1 1 +.names cycle_dma_i_0__n.BLIF N_68.BLIF N_198 11 1 -.names size_c_0__n.BLIF a_c_i_0__n.BLIF pos_clk_un10_sm_amiga_i_1_n +.names A_DECODE_23_.BLIF a_decode_c_23__n +1 1 +.names N_180_i.BLIF N_262_i.BLIF AMIGA_BUS_DATA_DIR_c_0 +11 1 +.names CLK_000_D_2_.BLIF CLK_000_D_3_.D +1 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +0 1 +.names A_1_.BLIF a_c_1__n +1 1 +.names nEXP_SPACE_c.BLIF nEXP_SPACE_i +0 1 +.names nEXP_SPACE.BLIF nEXP_SPACE_c +1 1 +.names AS_000_c.BLIF AS_000_i +0 1 +.names un1_amiga_bus_enable_low.BLIF un1_amiga_bus_enable_low_i +0 1 +.names BG_030.BLIF BG_030_c +1 1 +.names un21_fpu_cs.BLIF un21_fpu_cs_i +0 1 +.names BG_000DFFreg.BLIF BG_000 +1 1 +.names a_c_1__n.BLIF N_220_i.BLIF N_150 +11 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030 +1 1 +.names a_c_1__n.BLIF a_i_1__n +0 1 +.names BGACK_000.BLIF BGACK_000_c +1 1 +.names a_i_1__n.BLIF N_220_i.BLIF N_151 +11 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_i +0 1 +.names CLK_000.BLIF CLK_000_D_0_.D +1 1 +.names AS_000_DMA_i.BLIF AS_000_i.BLIF un3_as_030 +11 1 +.names CLK_OSZI.BLIF CLK_OSZI_c +1 1 +.names inst_DS_000_DMA.BLIF DS_000_DMA_i +0 1 +.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT +1 1 +.names AS_000_i.BLIF DS_000_DMA_i.BLIF un2_ds_030 +11 1 +.names CLK_OUT_INTreg.BLIF CLK_EXP +1 1 +.names AS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un3_n +0 1 +.names un21_fpu_cs_i.BLIF FPU_CS +1 1 +.names inst_DS_000_DMA.BLIF AS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un1_n +11 1 +.names FPU_SENSE.BLIF FPU_SENSE_c +1 1 +.names N_205.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n +11 1 +.names IPL_030DFF_0_reg.BLIF IPL_030_0_ +1 1 +.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF N_3 +1- 1 +-1 1 +.names IPL_030DFF_1_reg.BLIF IPL_030_1_ +1 1 +.names AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un3_n +0 1 +.names IPL_030DFF_2_reg.BLIF IPL_030_2_ +1 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un1_n +11 1 +.names IPL_0_.BLIF ipl_c_0__n +1 1 +.names N_205.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n +11 1 +.names IPL_1_.BLIF ipl_c_1__n +1 1 +.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF N_4 +1- 1 +-1 1 +.names IPL_2_.BLIF ipl_c_2__n +1 1 +.names N_4_i.BLIF RST_c.BLIF N_31_0 +11 1 +.names N_3_i.BLIF RST_c.BLIF N_32_0 +11 1 +.names DTACK.BLIF DTACK_c +1 1 +.names cycle_dma_i_0__n.BLIF cycle_dma_i_1__n.BLIF pos_clk_un2_i_n +11 1 +.names vcc_n_n.BLIF AVEC +1 1 +.names CYCLE_DMA_1_.BLIF cycle_dma_i_1__n +0 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C +1 1 +.names un5_e.BLIF E +1 1 +.names CLK_OUT_INTreg.BLIF CLK_EXP_i +0 1 +.names VPA.BLIF VPA_c +1 1 +.names N_15_i.BLIF RST_c.BLIF N_26_0 +11 1 +.names RST.BLIF RST_c +1 1 +.names N_16_i.BLIF RST_c.BLIF N_25_0 +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C +1 1 +.names N_17_i.BLIF RST_c.BLIF N_24_0 +11 1 +.names SM_AMIGA_6_.BLIF uds_000_int_0_un3_n +0 1 +.names FC_0_.BLIF fc_c_0__n +1 1 +.names a_c_0__n.BLIF SM_AMIGA_6_.BLIF uds_000_int_0_un1_n +11 1 +.names FC_1_.BLIF fc_c_1__n +1 1 +.names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C +1 1 +.names gnd_n_n.BLIF AMIGA_ADDR_ENABLE +1 1 +.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_17 +1- 1 +-1 1 +.names AMIGA_BUS_DATA_DIR_c.BLIF AMIGA_BUS_DATA_DIR +1 1 +.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n +0 1 +.names un1_amiga_bus_enable_low_i.BLIF AMIGA_BUS_ENABLE_LOW +1 1 +.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n +11 1 +.names un11_amiga_bus_enable_high_i.BLIF AMIGA_BUS_ENABLE_HIGH +1 1 +.names BG_000DFFreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C +1 1 +.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF N_16 +1- 1 +-1 1 +.names N_183_i.BLIF N_184_i.BLIF N_117_i_1 +11 1 +.names SM_AMIGA_6_.BLIF lds_000_int_0_un3_n +0 1 +.names N_117_i_1.BLIF RST_c.BLIF SM_AMIGA_3_.D +11 1 +.names pos_clk_un10_sm_amiga_i_n.BLIF SM_AMIGA_6_.BLIF lds_000_int_0_un1_n +11 1 +.names N_72.BLIF N_182_i.BLIF N_115_i_1 +11 1 +.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C +1 1 +.names N_115_i_1.BLIF RST_c.BLIF SM_AMIGA_2_.D +11 1 +.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF N_15 +1- 1 +-1 1 +.names N_72.BLIF N_181_i.BLIF N_111_i_1 +11 1 +.names RST_c.BLIF as_030_d1_0_un3_n +0 1 +.names N_111_i_1.BLIF RST_c.BLIF SM_AMIGA_0_.D +11 1 +.names inst_AS_030_D0.BLIF RST_c.BLIF as_030_d1_0_un1_n +11 1 +.names inst_BGACK_030_INTreg.BLIF AS_030_000_SYNC_i.BLIF N_165_1 +11 1 +.names inst_AS_030_D1.BLIF as_030_d1_0_un3_n.BLIF as_030_d1_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF IPL_030DFF_0_reg.C +1 1 +.names N_165_1.BLIF AS_030_i.BLIF N_165 +11 1 +.names as_030_d1_0_un1_n.BLIF as_030_d1_0_un0_n.BLIF inst_AS_030_D1.D +1- 1 +-1 1 +.names cpu_est_1_.BLIF cpu_est_2_.BLIF N_162_1 +11 1 +.names un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un3_n +0 1 +.names N_162_1.BLIF cpu_est_i_3__n.BLIF N_162 +11 1 +.names pos_clk_rw_000_int_5_n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un1_n +11 1 +.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_148_1 +11 1 +.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF IPL_030DFF_1_reg.C +1 1 +.names N_148_1.BLIF cpu_est_i_3__n.BLIF N_148 +11 1 +.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_12 +1- 1 +-1 1 +.names N_189_i.BLIF N_187_i.BLIF pos_clk_ipl_1_n +11 1 +.names N_244.BLIF as_030_000_sync_0_un3_n +0 1 +.names pos_clk_ipl_1_n.BLIF N_188_i.BLIF pos_clk_ipl_n +11 1 +.names AS_030_c.BLIF N_244.BLIF as_030_000_sync_0_un1_n +11 1 +.names N_140_i.BLIF pos_clk_un2_n.BLIF N_205_i_2 +11 1 +.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF IPL_030DFF_2_reg.C +1 1 +.names N_205_i_1.BLIF N_205_i_2.BLIF N_205_i +11 1 +.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_11 +1- 1 +-1 1 +.names AS_000_i.BLIF BGACK_030_INT_i.BLIF N_180_1 +11 1 +.names pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n +0 1 +.names RW_000_c.BLIF nEXP_SPACE_i.BLIF N_180_2 +11 1 +.names BGACK_000_c.BLIF pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n +11 1 +.names N_180_1.BLIF N_180_2.BLIF N_180 +11 1 +.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF IPL_D0_0_.C +1 1 +.names inst_AS_030_D0.BLIF CLK_000_D_0_.BLIF N_59_i_1 +11 1 +.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_5 +1- 1 +-1 1 +.names N_59_i_1.BLIF nEXP_SPACE_c.BLIF N_59_i +11 1 +.names BG_030_c_i.BLIF N_59.BLIF pos_clk_un9_bg_030_0_n +11 1 +.names N_267_i.BLIF N_268_i.BLIF N_127_i_1 +11 1 +.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i +0 1 +.names N_127_i_1.BLIF RST_c.BLIF SM_AMIGA_i_7_.D +11 1 +.names AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF BGACK_030_INT_i.BLIF un1_amiga_bus_enable_low +11 1 +.names CLK_OSZI_c.BLIF IPL_D0_1_.C +1 1 +.names N_93.BLIF N_266_i.BLIF N_123_i_1 +11 1 +.names BGACK_030_INT_i.BLIF RST_c.BLIF N_220_i +11 1 +.names N_123_i_1.BLIF RST_c.BLIF SM_AMIGA_6_.D +11 1 +.names N_220_i.BLIF RW_000_i.BLIF N_126 +11 1 +.names N_68.BLIF N_186_i.BLIF N_121_i_1 +11 1 +.names N_93.BLIF sm_amiga_i_5__n.BLIF N_186 +11 1 +.names N_121_i_1.BLIF RST_c.BLIF SM_AMIGA_5_.D 11 1 .names SM_AMIGA_0_.BLIF sm_amiga_i_0__n 0 1 +.names CLK_OSZI_c.BLIF IPL_D0_2_.C +1 1 +.names N_72.BLIF N_185_i.BLIF N_119_i_1 +11 1 +.names N_129.BLIF sm_amiga_i_0__n.BLIF N_181 +11 1 +.names N_119_i_1.BLIF RST_c.BLIF SM_AMIGA_4_.D +11 1 +.names N_93_i.BLIF RST_c.BLIF N_170 +11 1 +.names un21_fpu_cs_1.BLIF N_282_0.BLIF un21_fpu_cs +11 1 +.names N_175.BLIF RST_c.BLIF N_169 +11 1 +.names un21_berr_1.BLIF FPU_SENSE_c.BLIF un21_berr_1_0 +11 1 +.names N_129_i.BLIF RST_c.BLIF N_168 +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_i_7_.C +1 1 +.names un21_berr_1_0.BLIF N_282_0.BLIF un21_berr +11 1 +.names N_219.BLIF RST_c.BLIF N_167 +11 1 +.names AS_000_i.BLIF N_220_i.BLIF pos_clk_cycle_dma_5_1_1__n +11 1 +.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i +0 1 +.names pos_clk_cycle_dma_5_1_1__n.BLIF G_91.BLIF CYCLE_DMA_1_.D +11 1 +.names AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF BGACK_030_INT_i.BLIF N_164 +11 1 +.names N_68_i.BLIF CYCLE_DMA_0_.BLIF N_199_1 +11 1 +.names a_decode_c_16__n.BLIF a_decode_i_16__n +0 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C +1 1 +.names N_199_1.BLIF cycle_dma_i_1__n.BLIF N_199 +11 1 +.names a_decode_c_19__n.BLIF a_decode_i_19__n +0 1 +.names CLK_EXP_i.BLIF inst_CLK_OUT_PRE_D.BLIF AS_000_DMA_1_sqmuxa_1 +11 1 +.names a_decode_c_18__n.BLIF a_decode_i_18__n +0 1 +.names AS_000_DMA_1_sqmuxa_1.BLIF N_205_i.BLIF AS_000_DMA_1_sqmuxa +11 1 +.names N_5_i.BLIF RST_c.BLIF N_30_0 +11 1 +.names CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF N_140_1 +11 1 +.names N_11_i.BLIF RST_c.BLIF N_29_0 +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C +1 1 +.names N_140_1.BLIF RW_000_i.BLIF N_140 +11 1 +.names N_12_i.BLIF RST_c.BLIF N_28_0 +11 1 +.names AS_000_i.BLIF N_198_i.BLIF N_66_i_1 +11 1 +.names N_164_i.BLIF N_165_i.BLIF un11_amiga_bus_enable_high_i +11 1 +.names N_199_i.BLIF N_220_i.BLIF N_66_i_2 +11 1 +.names AS_030_i.BLIF N_163_i.BLIF N_244_0 +11 1 +.names CLK_000_D_0_.BLIF CLK_000_D_1_.D +1 1 +.names N_66_i_1.BLIF N_66_i_2.BLIF CYCLE_DMA_0_.D +11 1 +.names inst_BGACK_030_INTreg.BLIF RST_c.BLIF N_69_i +11 1 +.names AMIGA_DS_i.BLIF AS_000_i.BLIF N_205_i_1 +11 1 +.names inst_BGACK_030_INTreg.BLIF nEXP_SPACE_c.BLIF un1_dsack1_i +11 1 +.names CLK_OSZI_c.BLIF CLK_000_D_1_.C +1 1 +.names N_134_0_1.BLIF SM_AMIGA_3_.BLIF N_134_0 +11 1 +.names AS_000_c.BLIF N_68_i.BLIF N_274 +11 1 +.names N_68.BLIF N_141_i.BLIF N_113_i_1 +11 1 +.names inst_DSACK1_INT.BLIF DSACK1_INT_i +0 1 +.names N_142_i.BLIF RST_c.BLIF N_113_i_2 +11 1 +.names AS_030_i.BLIF DSACK1_INT_i.BLIF N_219 +11 1 +.names CLK_000_D_1_.BLIF CLK_000_D_2_.D +1 1 +.names N_113_i_1.BLIF N_113_i_2.BLIF SM_AMIGA_1_.D +11 1 +.names AS_030_c.BLIF AS_030_i +0 1 +.names N_68_i.BLIF N_208.BLIF N_144_1 +11 1 +.names inst_AS_000_INT.BLIF AS_000_INT_i +0 1 +.names CLK_OSZI_c.BLIF CLK_000_D_2_.C +1 1 +.names VPA_D_i.BLIF cpu_est_i_3__n.BLIF N_144_2 +11 1 +.names AS_000_INT_i.BLIF AS_030_i.BLIF N_175 +11 1 +.names N_144_1.BLIF N_144_2.BLIF N_144 +11 1 +.names SM_AMIGA_i_7_.BLIF sm_amiga_i_i_7__n +0 1 +.names N_72_i.BLIF N_82_i.BLIF N_143_1 +11 1 +.names N_96.BLIF sm_amiga_i_i_7__n.BLIF N_267 +11 1 +.names cpu_est_i_0__n.BLIF cpu_est_i_3__n.BLIF N_143_2 +11 1 +.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n +0 1 +.names CLK_OSZI_c.BLIF CLK_000_D_3_.C +1 1 +.names N_143_1.BLIF N_143_2.BLIF N_143 +11 1 +.names N_132.BLIF sm_amiga_i_6__n.BLIF N_266 +11 1 +.names AS_030_D1_i.BLIF inst_BGACK_030_INT_D.BLIF N_163_1 +11 1 +.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n +0 1 +.names N_282.BLIF sm_amiga_i_i_7__n.BLIF N_163_2 +11 1 +.names cpu_est_3_.BLIF cpu_est_i_3__n +0 1 +.names CLK_000_D_3_.BLIF CLK_000_D_4_.D +1 1 +.names N_163_1.BLIF N_163_2.BLIF N_163_3 +11 1 +.names inst_AS_030_D1.BLIF AS_030_D1_i +0 1 +.names N_163_3.BLIF un1_dsack1_i.BLIF N_163 +11 1 +.names FPU_SENSE_c.BLIF FPU_SENSE_i +0 1 +.names CLK_OSZI_c.BLIF CLK_000_D_4_.C +1 1 +.names un21_berr_1.BLIF FPU_SENSE_i.BLIF un21_fpu_cs_1 +11 1 +.names AS_030_i.BLIF BGACK_000_c.BLIF un21_berr_1 +11 1 +.names ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF un10_ciin_4 +11 1 +.names N_96_0.BLIF sm_amiga_i_i_7__n.BLIF N_132_0 +11 1 +.names a_decode_c_23__n.BLIF AS_030_D0_i.BLIF un10_ciin_5 +11 1 +.names N_268_i.BLIF SM_AMIGA_i_7_.BLIF N_246_i +11 1 +.names a_decode_c_20__n.BLIF a_decode_c_21__n.BLIF un10_ciin_6 +11 1 +.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +0 1 +.names CLK_OSZI_c.BLIF SIZE_DMA_0_.C +1 1 +.names un10_ciin_1.BLIF un10_ciin_2.BLIF un10_ciin_7 +11 1 +.names N_68_i.BLIF SM_AMIGA_1_.BLIF N_129_i +11 1 +.names un10_ciin_3.BLIF un10_ciin_4.BLIF un10_ciin_8 +11 1 +.names N_93.BLIF N_246_i.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 +11 1 +.names un10_ciin_5.BLIF un10_ciin_6.BLIF un10_ciin_9 +11 1 +.names AS_030_i.BLIF RST_c.BLIF N_38_0 +11 1 +.names un10_ciin_7.BLIF un10_ciin_8.BLIF un10_ciin_10 +11 1 +.names N_169_i.BLIF N_170_i.BLIF inst_AS_000_INT.D +11 1 +.names CLK_OSZI_c.BLIF SIZE_DMA_1_.C +1 1 +.names un10_ciin_9.BLIF a_decode_c_22__n.BLIF un10_ciin_11 +11 1 +.names N_167_i.BLIF N_168_i.BLIF inst_DSACK1_INT.D +11 1 +.names un10_ciin_10.BLIF un10_ciin_11.BLIF un10_ciin +11 1 +.names N_246_i.BLIF RW_c_i.BLIF pos_clk_rw_000_int_5_0_n +11 1 +.names N_80_i.BLIF N_82_i.BLIF N_201_1 +11 1 +.names BGACK_000_c.BLIF N_274_i.BLIF pos_clk_un6_bgack_000_0_n +11 1 +.names VMA_INT_i.BLIF VPA_D_i.BLIF N_201_2 +11 1 +.names nEXP_SPACE_i.BLIF un10_ciin_i.BLIF N_60_0 +11 1 +.names CLK_OSZI_c.BLIF CYCLE_DMA_0_.C +1 1 +.names N_201_1.BLIF N_201_2.BLIF N_201 +11 1 +.names CLK_000_D_0_.BLIF clk_000_d_i_0__n +0 1 +.names BERR_c.BLIF N_201_i.BLIF N_131_i_1 +11 1 +.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_72_i +11 1 +.names N_131_i_1.BLIF N_202_i.BLIF N_131_i +11 1 +.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF N_80_i +11 1 +.names N_68_i.BLIF N_131.BLIF N_134_0_1 +11 1 +.names cpu_est_i_1__n.BLIF cpu_est_i_2__n.BLIF N_82_i +11 1 +.names CLK_OSZI_c.BLIF CYCLE_DMA_1_.C +1 1 +.names inst_UDS_000_INT.BLIF UDS_000_INT_i +0 1 +.names N_72_i.BLIF SM_AMIGA_6_.BLIF N_93_i +11 1 +.names un1_UDS_000_INT_0.BLIF un1_UDS_000_INT +0 1 +.names cpu_est_1_.BLIF cpu_est_i_1__n +0 1 +.names AS_030_000_SYNC_i.BLIF CLK_000_D_4_.BLIF N_96_0_1 +11 1 +.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_98_i +11 1 +.names clk_000_d_i_3__n.BLIF nEXP_SPACE_c.BLIF N_96_0_2 +11 1 +.names N_107.BLIF N_203_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_0 +11 1 +.names CLK_OSZI_c.BLIF cpu_est_0_.C +1 1 +.names N_96_0_1.BLIF N_96_0_2.BLIF N_96_0 +11 1 +.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n +0 1 +.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_282_0_1 +11 1 +.names N_72_i.BLIF SM_AMIGA_4_.BLIF N_107_i +11 1 +.names a_decode_c_17__n.BLIF a_decode_i_16__n.BLIF N_282_0_2 +11 1 +.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_128_i +11 1 .end diff --git a/Logic/BUS68030.bl1 b/Logic/BUS68030.bl1 index 1860a37..4b3d549 100644 --- a/Logic/BUS68030.bl1 +++ b/Logic/BUS68030.bl1 @@ -1,1586 +1,1250 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Thu Dec 29 16:01:56 2016 +#$ DATE Sat Dec 30 00:43:37 2017 #$ MODULE bus68030 -#$ PINS 75 A_DECODE_2_ A_0_ SIZE_1_ IPL_030_1_ IPL_030_0_ AHIGH_31_ IPL_1_ IPL_0_ \ -# A_DECODE_23_ FC_0_ A_1_ IPL_030_2_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 DS_030 UDS_000 \ -# LDS_000 nEXP_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI \ -# CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 DTACK AVEC SIZE_0_ E AHIGH_30_ VPA AHIGH_29_ \ -# VMA AHIGH_28_ RST AHIGH_27_ RESET AHIGH_26_ RW AHIGH_25_ AMIGA_ADDR_ENABLE AHIGH_24_ \ -# AMIGA_BUS_DATA_DIR A_DECODE_22_ AMIGA_BUS_ENABLE_LOW A_DECODE_21_ \ -# AMIGA_BUS_ENABLE_HIGH A_DECODE_20_ CIIN A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ \ -# A_DECODE_16_ A_DECODE_15_ A_DECODE_14_ A_DECODE_13_ A_DECODE_12_ A_DECODE_11_ \ -# A_DECODE_10_ A_DECODE_9_ A_DECODE_8_ A_DECODE_7_ A_DECODE_6_ A_DECODE_5_ A_DECODE_4_ \ -# A_DECODE_3_ -#$ NODES 609 clk_000_d_i_1__n VPA_D_i N_125_i a_decode_2__n VMA_INT_i N_124_i \ -# sm_amiga_i_0__n N_53_0 rst_dly_i_2__n N_134_i rst_dly_i_1__n N_270_0 rst_dly_i_0__n \ -# N_77_i DSACK1_INT_i N_87_i inst_BGACK_030_INTreg N_137_i_0 N_112_i vcc_n_n DTACK_D0_i \ -# N_113_i inst_VMA_INTreg BGACK_030_INT_i N_114_i gnd_n_n nEXP_SPACE_i \ -# un1_amiga_bus_enable_low AS_000_DMA_i N_109_i un7_as_030 RW_000_i N_108_i \ -# un1_LDS_000_INT clk_030_pe_i_1__n N_111_i un1_UDS_000_INT DS_000_DMA_0_sqmuxa_i \ -# N_265_2_0 un1_SM_AMIGA_0_sqmuxa_1 pos_clk_un4_rw_000_i_n un10_ciin AS_000_i \ -# un1_as_000_i un21_fpu_cs AMIGA_DS_i VPA_c_i un21_berr pos_clk_un3_clk_out_int_i_n \ -# N_52_0 un6_ds_030 cycle_dma_i_0__n DTACK_c_i un13_ciin cycle_dma_i_1__n N_48_0 \ -# cpu_est_1_ pos_clk_as_000_dma6_i_n un3_ahigh_i cpu_est_2_ DS_000_DMA_i \ -# pos_clk_un4_bgack_000_i_n cpu_est_3_ CLK_EXP_i pos_clk_un6_bgack_000_0_n \ -# cpu_est_0_ AMIGA_BUS_ENABLE_DMA_LOW_i N_7_i inst_AMIGA_BUS_ENABLE_DMA_HIGH \ -# ahigh_i_25__n N_41_0 inst_AMIGA_BUS_ENABLE_DMA_LOW ahigh_i_24__n \ -# pos_clk_un1_bgack_030_int_0_n inst_AS_030_D0 ahigh_i_27__n \ -# pos_clk_un12_clk_out_int_0_n inst_AS_030_000_SYNC ahigh_i_26__n pos_clk_un3_0_n \ -# inst_BGACK_030_INT_D ahigh_i_29__n pos_clk_un15_bgack_030_int_i_n inst_AS_000_DMA \ -# ahigh_i_28__n N_3_i inst_DS_000_DMA ahigh_i_31__n N_43_0 inst_VPA_D ahigh_i_30__n \ -# N_4_i CLK_000_D_3_ a_i_1__n N_42_0 inst_DTACK_D0 AMIGA_BUS_ENABLE_DMA_HIGH_i \ -# un6_amiga_bus_data_dir_i inst_RESET_OUT AS_030_D0_i un12_amiga_bus_data_dir_m_i \ -# CLK_030_PE_1_ un10_ciin_i AMIGA_BUS_DATA_DIR_c_0 inst_AMIGA_DS FPU_SENSE_i N_22_i \ -# CLK_000_D_1_ AS_030_000_SYNC_i N_31_0 CLK_000_D_0_ a_decode_i_16__n N_21_i \ -# inst_CLK_OUT_PRE_50 a_decode_i_18__n N_32_0 inst_CLK_OUT_PRE_D a_decode_i_19__n \ -# N_19_i IPL_D0_0_ N_224_i N_34_0 IPL_D0_1_ N_225_i N_18_i IPL_D0_2_ N_226_i N_35_0 \ -# CLK_000_D_2_ pos_clk_un5_bgack_030_int_d_i_n CLK_000_D_4_ \ -# pos_clk_amiga_bus_enable_dma_high_3_0_n pos_clk_un6_bg_030_n \ -# pos_clk_amiga_bus_enable_dma_low_3_0_n pos_clk_ipl_n pos_clk_rw_000_dma_3_0_n \ -# inst_LDS_000_INT un13_ciin_i UDS_000_c_i inst_DS_000_ENABLE un6_ds_030_i \ -# LDS_000_c_i inst_UDS_000_INT N_123_i N_86_i SM_AMIGA_6_ N_122_i N_129_i SM_AMIGA_4_ \ -# un7_as_030_i N_130_i SM_AMIGA_1_ AS_030_c un11_amiga_bus_enable_high_i SM_AMIGA_0_ \ -# N_117_i SIZE_DMA_0_ AS_000_c N_46_0 SIZE_DMA_1_ N_107_i CYCLE_DMA_0_ RW_000_c \ -# pos_clk_size_dma_6_0_0__n CYCLE_DMA_1_ N_106_i CLK_030_PE_0_ \ -# pos_clk_size_dma_6_0_1__n inst_RW_000_INT UDS_000_c N_16_i inst_RW_000_DMA N_254_i \ -# RST_DLY_0_ LDS_000_c N_263_i RST_DLY_1_ N_250_i RST_DLY_2_ size_c_0__n N_256_i \ -# inst_A0_DMA N_189_i pos_clk_rw_000_int_5_n size_c_1__n N_101_i inst_DSACK1_INT \ -# inst_AS_000_INT ahigh_c_24__n N_103_i SM_AMIGA_5_ N_104_i SM_AMIGA_3_ ahigh_c_25__n \ -# SM_AMIGA_2_ N_105_i ahigh_c_26__n N_115_i ahigh_c_27__n N_116_i ahigh_c_28__n N_131_i \ -# N_277_i ahigh_c_29__n N_64_0 N_91_0 ahigh_c_30__n N_159_0 N_14 N_85_i N_15 \ -# ahigh_c_31__n un1_SM_AMIGA_0_sqmuxa_1_0 N_24 RW_c_i N_25 pos_clk_rw_000_int_5_0_n \ -# clk_000_d_i_3__n N_25_i N_28_0 N_24_i N_27_0 ipl_c_i_1__n N_50_0 ipl_c_i_0__n N_49_0 \ -# N_14_i N_39_0 N_15_i N_38_0 N_91_0_1 N_91_0_2 N_91_0_3 N_265_i_1 N_266_i_1 N_266_i_2 \ -# N_138_i_1 N_148_i_1 N_144_i_1 N_142_i_1 N_140_i_1 SM_AMIGA_i_7_ \ -# pos_clk_un10_sm_amiga_i_1_n N_76 N_85_i_1 G_122 N_85_i_2 G_123 a_decode_c_16__n \ -# N_277_1 G_124 N_277_2 un1_rst_2_1 a_decode_c_17__n N_277_3 cpu_est_0_0_ N_277_4 N_64 \ -# a_decode_c_18__n N_277_5 N_122 un10_ciin_1 N_123 a_decode_c_19__n un10_ciin_2 N_132 \ -# un10_ciin_3 N_133 a_decode_c_20__n un10_ciin_4 N_274 un10_ciin_5 N_276 \ -# a_decode_c_21__n un10_ciin_6 N_77 un10_ciin_7 N_79 a_decode_c_22__n un10_ciin_8 N_78 \ -# un10_ciin_9 N_263 a_decode_c_23__n un10_ciin_10 N_108 un10_ciin_11 N_114 a_c_0__n \ -# un6_amiga_bus_data_dir_1 N_85 un6_amiga_bus_data_dir_2 N_104 a_c_1__n \ -# pos_clk_as_000_dma6_1_n N_91 pos_clk_as_000_dma6_2_n N_131 nEXP_SPACE_c \ -# DS_000_DMA_1_sqmuxa_1 N_277 pos_clk_un4_rw_000_1_n N_130 BERR_c \ -# pos_clk_un4_rw_000_2_n N_115 pos_clk_un13_clk_out_int_1_n N_116 BG_030_c N_125_1 \ -# N_105 N_116_1 N_103 BG_000DFFreg pos_clk_un29_clk_000_ne_1_1_n N_101 \ -# pos_clk_un29_clk_000_ne_1_2_n N_259 pos_clk_un29_clk_000_ne_1_3_n N_255 \ -# BGACK_000_c N_261_1 N_256 N_261_2 N_254 CLK_030_c N_262_1 N_16 N_262_2 N_106 \ -# DS_000_ENABLE_0_sqmuxa_1_1 N_86 N_259_1 N_107 CLK_OSZI_c N_250_i_1 N_117 N_189_i_1 \ -# pos_clk_a0_dma_3_n pos_clk_un6_bg_030_1_n N_129 CLK_OUT_INTreg N_108_1 \ -# pos_clk_size_dma_6_1__n N_114_1 pos_clk_size_dma_6_0__n un21_berr_1 \ -# pos_clk_rw_000_dma_3_n FPU_SENSE_c un21_fpu_cs_1 \ -# pos_clk_amiga_bus_enable_dma_low_3_n N_130_1 \ -# pos_clk_amiga_bus_enable_dma_high_3_n IPL_030DFF_0_reg N_136_i_1 \ -# SIZE_DMA_3_sqmuxa N_152_i_1 pos_clk_un5_bgack_030_int_d_n IPL_030DFF_1_reg \ -# N_146_i_1 N_18 N_267_i_1 N_19 IPL_030DFF_2_reg pos_clk_ipl_1_n N_21 bg_000_0_un3_n \ -# N_22 ipl_c_0__n bg_000_0_un1_n un6_amiga_bus_data_dir bg_000_0_un0_n \ -# un12_amiga_bus_data_dir_m ipl_c_1__n uds_000_int_0_un3_n \ -# pos_clk_un3_clk_out_int_n uds_000_int_0_un1_n N_3 ipl_c_2__n uds_000_int_0_un0_n \ -# pos_clk_as_000_dma6_n lds_000_int_0_un3_n DS_000_DMA_1_sqmuxa lds_000_int_0_un1_n \ -# N_4 DTACK_c lds_000_int_0_un0_n AS_000_DMA_1_sqmuxa ds_000_enable_0_un3_n un1_rst_2 \ -# ds_000_enable_0_un1_n G_97 ds_000_enable_0_un0_n N_199 VPA_c ipl_030_0_2__un3_n \ -# pos_clk_un13_bgack_030_int_n ipl_030_0_2__un1_n N_205 ipl_030_0_2__un0_n \ -# pos_clk_un13_clk_out_int_n RST_c vma_int_0_un3_n pos_clk_un15_bgack_030_int_n \ -# vma_int_0_un1_n pos_clk_un3_n RESET_c vma_int_0_un0_n pos_clk_un12_clk_out_int_n \ -# cpu_est_0_1__un3_n pos_clk_un1_bgack_030_int_n RW_c cpu_est_0_1__un1_n \ -# DS_000_DMA_0_sqmuxa cpu_est_0_1__un0_n un1_rst_3 fc_c_0__n cpu_est_0_2__un3_n G_95 \ -# cpu_est_0_2__un1_n G_101 fc_c_1__n cpu_est_0_2__un0_n G_103 cpu_est_0_3__un3_n \ -# pos_clk_un4_rw_000_n cpu_est_0_3__un1_n N_7 AMIGA_BUS_DATA_DIR_c \ -# cpu_est_0_3__un0_n pos_clk_un6_bgack_000_n pos_clk_un31_clk_000_ne_1_i_m2_un3_n \ -# pos_clk_un4_bgack_000_n pos_clk_un31_clk_000_ne_1_i_m2_un1_n N_265_2 \ -# pos_clk_un31_clk_000_ne_1_i_m2_un0_n N_111 bgack_030_int_0_un3_n N_109 BG_030_c_i \ -# bgack_030_int_0_un1_n N_113 pos_clk_un6_bg_030_i_n bgack_030_int_0_un0_n N_112 \ -# pos_clk_un9_bg_030_0_n ds_000_dma_0_un3_n N_98 UDS_000_INT_i ds_000_dma_0_un1_n \ -# pos_clk_un29_clk_000_ne_1_n un1_UDS_000_INT_0 ds_000_dma_0_un0_n N_87 \ -# LDS_000_INT_i as_000_dma_0_un3_n N_270 un1_LDS_000_INT_0 as_000_dma_0_un1_n N_134 \ -# N_23_i as_000_dma_0_un0_n N_125 N_30_0 size_dma_0_1__un3_n N_124 N_20_i \ -# size_dma_0_1__un1_n N_121 N_33_0 size_dma_0_1__un0_n N_120 N_13_i \ -# size_dma_0_0__un3_n N_137 N_40_0 size_dma_0_0__un1_n pos_clk_un31_clk_000_ne_n \ -# ipl_c_i_2__n size_dma_0_0__un0_n N_17 N_51_0 amiga_bus_enable_dma_high_0_un3_n \ -# pos_clk_un9_clk_000_pe_n N_26_i amiga_bus_enable_dma_high_0_un1_n cpu_est_2_1__n \ -# N_29_0 amiga_bus_enable_dma_high_0_un0_n cpu_est_2_2__n a_c_i_0__n \ -# amiga_bus_enable_dma_low_0_un3_n N_261 size_c_i_1__n \ -# amiga_bus_enable_dma_low_0_un1_n N_262 pos_clk_un10_sm_amiga_i_n \ -# amiga_bus_enable_dma_low_0_un0_n N_251 DS_000_ENABLE_0_sqmuxa_1_i a0_dma_0_un3_n \ -# N_252 un1_DS_000_ENABLE_0_sqmuxa_i a0_dma_0_un1_n N_258 N_157_i a0_dma_0_un0_n N_257 \ -# N_160_0 rw_000_dma_0_un3_n DS_000_ENABLE_1_sqmuxa N_161_0 rw_000_dma_0_un1_n \ -# un1_DS_000_ENABLE_0_sqmuxa N_162_0 rw_000_dma_0_un0_n N_102 N_165_i \ -# ipl_030_0_0__un3_n N_118 ipl_030_0_0__un1_n N_119 N_167_i ipl_030_0_0__un0_n N_264 \ -# N_166_i ipl_030_0_1__un3_n DS_000_ENABLE_0_sqmuxa_1 ipl_030_0_1__un1_n N_164 \ -# N_168_i ipl_030_0_1__un0_n N_170 as_030_000_sync_0_un3_n N_168 N_170_i \ -# as_030_000_sync_0_un1_n N_166 as_030_000_sync_0_un0_n N_167 N_164_i \ -# rw_000_int_0_un3_n N_165 rw_000_int_0_un1_n N_162 N_102_i rw_000_int_0_un0_n N_161 \ -# N_264_i a_decode_15__n N_160 N_79_i N_157 N_78_i a_decode_14__n N_26 N_119_i N_13 \ -# N_118_i a_decode_13__n N_20 N_23 N_255_i a_decode_12__n N_8 N_257_i \ -# pos_clk_un9_bg_030_n cpu_est_2_0_2__n a_decode_11__n un1_amiga_bus_enable_low_i \ -# N_258_i un21_fpu_cs_i N_259_i a_decode_10__n sm_amiga_i_2__n cpu_est_2_0_1__n \ -# sm_amiga_i_1__n N_262_i a_decode_9__n sm_amiga_i_3__n N_261_i sm_amiga_i_4__n \ -# pos_clk_un9_clk_000_pe_0_n a_decode_8__n sm_amiga_i_6__n N_251_i sm_amiga_i_5__n \ -# N_252_0 a_decode_7__n clk_000_d_i_0__n N_76_i AS_000_INT_i N_17_i a_decode_6__n \ -# sm_amiga_i_i_7__n N_36_0 AS_030_i N_98_i a_decode_5__n cpu_est_i_2__n \ -# pos_clk_un31_clk_000_ne_i_n cpu_est_i_0__n N_228_i a_decode_4__n cpu_est_i_3__n \ -# N_121_i cpu_est_i_1__n N_120_i a_decode_3__n +#$ PINS 75 AHIGH_27_ AHIGH_26_ SIZE_1_ AHIGH_25_ AHIGH_24_ AHIGH_31_ A_DECODE_22_ \ +# A_DECODE_21_ A_DECODE_23_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ \ +# IPL_030_2_ A_DECODE_16_ A_DECODE_15_ IPL_2_ A_DECODE_14_ A_DECODE_13_ FC_1_ \ +# A_DECODE_12_ AS_030 A_DECODE_11_ AS_000 A_DECODE_10_ RW_000 A_DECODE_9_ DS_030 \ +# A_DECODE_8_ UDS_000 A_DECODE_7_ LDS_000 A_DECODE_6_ nEXP_SPACE A_DECODE_5_ BERR \ +# A_DECODE_4_ BG_030 A_DECODE_3_ BG_000 A_DECODE_2_ BGACK_030 A_0_ BGACK_000 IPL_030_1_ \ +# CLK_030 IPL_030_0_ CLK_000 IPL_1_ CLK_OSZI IPL_0_ CLK_DIV_OUT FC_0_ CLK_EXP A_1_ FPU_CS \ +# FPU_SENSE DSACK1 DTACK AVEC E VPA VMA RST RESET RW AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR \ +# AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SIZE_0_ AHIGH_30_ AHIGH_29_ \ +# AHIGH_28_ +#$ NODES 508 N_23_0 UDS_000_c N_19_i N_22_0 LDS_000_c N_18_i N_21_0 size_c_0__n \ +# ipl_c_i_2__n N_43_0 size_c_1__n ipl_c_i_1__n inst_BGACK_030_INTreg N_42_0 vcc_n_n \ +# ahigh_c_24__n ipl_c_i_0__n un5_e N_41_0 gnd_n_n ahigh_c_25__n DTACK_c_i \ +# un1_amiga_bus_enable_low N_45_0 un3_as_030 ahigh_c_26__n VPA_c_i un1_UDS_000_INT \ +# N_44_0 un1_LDS_000_INT ahigh_c_27__n N_13_i un1_DS_000_ENABLE_0_sqmuxa N_27_0 \ +# un10_ciin ahigh_c_28__n LDS_000_INT_i un21_fpu_cs un1_LDS_000_INT_0 un21_berr \ +# ahigh_c_29__n UDS_000_INT_i un2_ds_030 un1_UDS_000_INT_0 cpu_est_0_ ahigh_c_30__n \ +# N_96_0_1 cpu_est_1_ N_96_0_2 cpu_est_2_ ahigh_c_31__n N_282_0_1 cpu_est_3_ N_282_0_2 \ +# inst_AMIGA_BUS_ENABLE_DMA_HIGH N_282_0_3 inst_AMIGA_BUS_ENABLE_DMA_LOW N_282_0_4 \ +# inst_AS_030_D0 pos_clk_un10_sm_amiga_i_1_n inst_AS_030_D1 un10_ciin_1 \ +# inst_AS_030_000_SYNC un10_ciin_2 inst_AS_000_DMA un10_ciin_3 inst_DS_000_DMA \ +# un10_ciin_4 inst_VMA_INTreg un10_ciin_5 inst_VPA_D un10_ciin_6 CLK_000_D_3_ \ +# un10_ciin_7 inst_DTACK_D0 un10_ciin_8 inst_AMIGA_DS un10_ciin_9 CLK_000_D_1_ \ +# un10_ciin_10 CLK_000_D_0_ un10_ciin_11 inst_CLK_OUT_PRE_50 N_201_1 \ +# inst_CLK_OUT_PRE_D N_201_2 IPL_D0_0_ N_131_i_1 IPL_D0_1_ N_134_0_1 IPL_D0_2_ \ +# N_113_i_1 CLK_000_D_2_ N_113_i_2 CLK_000_D_4_ N_144_1 pos_clk_ipl_n N_144_2 \ +# SIZE_DMA_0_ N_143_1 SIZE_DMA_1_ N_143_2 inst_A0_DMA N_163_1 inst_RW_000_DMA N_163_2 \ +# inst_UDS_000_INT N_163_3 inst_DS_000_ENABLE un21_fpu_cs_1 inst_LDS_000_INT \ +# a_decode_c_16__n un21_berr_1_0 inst_BGACK_030_INT_D pos_clk_cycle_dma_5_1_1__n \ +# SM_AMIGA_6_ a_decode_c_17__n N_199_1 inst_RW_000_INT AS_000_DMA_1_sqmuxa_1 \ +# SM_AMIGA_4_ a_decode_c_18__n N_140_1 SM_AMIGA_1_ N_66_i_1 SM_AMIGA_0_ \ +# a_decode_c_19__n N_66_i_2 CYCLE_DMA_0_ N_205_i_1 CYCLE_DMA_1_ a_decode_c_20__n \ +# N_205_i_2 inst_DSACK1_INT N_180_1 inst_AS_000_INT a_decode_c_21__n N_180_2 \ +# pos_clk_un9_clk_000_pe_n N_59_i_1 SM_AMIGA_5_ a_decode_c_22__n N_127_i_1 \ +# SM_AMIGA_3_ N_123_i_1 SM_AMIGA_2_ a_decode_c_23__n N_121_i_1 N_119_i_1 N_6 a_c_0__n \ +# N_117_i_1 N_115_i_1 a_c_1__n N_111_i_1 N_165_1 N_13 nEXP_SPACE_c N_162_1 N_148_1 N_18 \ +# BERR_c pos_clk_ipl_1_n N_19 ds_000_dma_0_un3_n N_20 BG_030_c ds_000_dma_0_un1_n \ +# ds_000_dma_0_un0_n BG_000DFFreg as_000_dma_0_un3_n as_000_dma_0_un1_n \ +# as_000_dma_0_un0_n BGACK_000_c uds_000_int_0_un3_n uds_000_int_0_un1_n \ +# uds_000_int_0_un0_n bg_000_0_un3_n bg_000_0_un1_n bg_000_0_un0_n CLK_OSZI_c \ +# lds_000_int_0_un3_n lds_000_int_0_un1_n lds_000_int_0_un0_n CLK_OUT_INTreg \ +# as_030_d1_0_un3_n as_030_d1_0_un1_n as_030_d1_0_un0_n FPU_SENSE_c \ +# rw_000_int_0_un3_n rw_000_int_0_un1_n IPL_030DFF_0_reg rw_000_int_0_un0_n \ +# as_030_000_sync_0_un3_n IPL_030DFF_1_reg as_030_000_sync_0_un1_n SM_AMIGA_i_7_ \ +# as_030_000_sync_0_un0_n IPL_030DFF_2_reg bgack_030_int_0_un3_n \ +# bgack_030_int_0_un1_n cpu_est_2_1__n ipl_c_0__n bgack_030_int_0_un0_n \ +# cpu_est_2_2__n cpu_est_0_1__un3_n cpu_est_2_3__n ipl_c_1__n cpu_est_0_1__un1_n \ +# G_105 cpu_est_0_1__un0_n G_106 ipl_c_2__n cpu_est_0_2__un3_n G_107 \ +# cpu_est_0_2__un1_n N_60 cpu_est_0_2__un0_n N_63 DTACK_c cpu_est_0_3__un3_n N_126 \ +# cpu_est_0_3__un1_n N_150 cpu_est_0_3__un0_n N_151 ipl_030_0_0__un3_n N_219 VPA_c \ +# ipl_030_0_0__un1_n N_175 ipl_030_0_0__un0_n ipl_030_0_1__un3_n N_59 RST_c \ +# ipl_030_0_1__un1_n N_68 ipl_030_0_1__un0_n N_72 ipl_030_0_2__un3_n N_80 \ +# ipl_030_0_2__un1_n N_93 RW_c ipl_030_0_2__un0_n N_98 ds_000_enable_0_un3_n N_107 \ +# fc_c_0__n ds_000_enable_0_un1_n N_128 ds_000_enable_0_un0_n N_131 fc_c_1__n \ +# vma_int_0_un3_n N_134 vma_int_0_un1_n N_135 vma_int_0_un0_n N_141 \ +# AMIGA_BUS_DATA_DIR_c a_decode_15__n N_142 N_143 a_decode_14__n N_144 N_145 \ +# a_decode_13__n N_146 N_205_i N_147 N_140_i a_decode_12__n N_148 AMIGA_DS_i N_149 \ +# a_decode_11__n N_154 N_199_i N_155 N_198_i a_decode_10__n N_162 N_180_i N_165 N_262_i \ +# a_decode_9__n N_259 AMIGA_BUS_DATA_DIR_c_0 N_260 pos_clk_un2_i_n a_decode_8__n N_181 \ +# N_3_i N_182 N_32_0 a_decode_7__n N_183 N_4_i N_184 N_31_0 a_decode_6__n N_185 N_220_i \ +# N_186 BG_030_c_i a_decode_5__n N_266 pos_clk_un9_bg_030_0_n N_267 N_17_i \ +# a_decode_4__n N_268 N_24_0 N_190 N_16_i a_decode_3__n N_191 N_25_0 N_201 N_15_i \ +# a_decode_2__n N_202 N_26_0 N_203 N_12_i N_208 N_28_0 N_163 N_11_i N_282 N_29_0 \ +# un21_berr_1 N_5_i N_132 N_30_0 N_96 a_c_i_0__n N_129 size_c_i_1__n \ +# un1_SM_AMIGA_0_sqmuxa_1 pos_clk_un10_sm_amiga_i_n N_169 un1_dsack1_i N_170 N_69_i \ +# N_167 N_163_i N_168 N_244_0 pos_clk_rw_000_int_5_n N_164_i pos_clk_un6_bgack_000_n \ +# N_165_i N_274 un11_amiga_bus_enable_high_i N_164 un10_ciin_i N_244 N_60_0 N_5 N_274_i \ +# N_11 pos_clk_un6_bgack_000_0_n N_12 RW_c_i N_15 pos_clk_rw_000_int_5_0_n N_16 N_168_i \ +# N_17 N_167_i pos_clk_un9_bg_030_n G_91 N_170_i N_3 N_169_i N_205 AS_000_DMA_1_sqmuxa \ +# N_38_0 N_4 un1_SM_AMIGA_0_sqmuxa_1_0 N_199 N_282_0 pos_clk_un2_n clk_000_d_i_3__n \ +# N_140 N_96_0 N_262 N_129_i N_198 N_268_i N_180 N_246_i un1_amiga_bus_enable_low_i \ +# N_132_0 un21_fpu_cs_i AS_000_i N_142_i BGACK_030_INT_i N_141_i nEXP_SPACE_i N_135_0 \ +# cycle_dma_i_0__n N_134_0 RW_000_i N_131_i CLK_EXP_i LDS_000_c_i cycle_dma_i_1__n \ +# UDS_000_c_i DS_000_DMA_i N_128_i AS_000_DMA_i N_107_i a_i_1__n N_203_i \ +# AMIGA_BUS_ENABLE_DMA_LOW_i un1_DS_000_ENABLE_0_sqmuxa_0 a_decode_i_19__n N_201_i \ +# a_decode_i_18__n N_202_i a_decode_i_16__n VMA_INT_i AMIGA_BUS_ENABLE_DMA_HIGH_i \ +# N_98_i sm_amiga_i_0__n N_93_i sm_amiga_i_5__n N_82_i sm_amiga_i_6__n N_80_i \ +# sm_amiga_i_i_7__n N_72_i AS_030_i N_68_i AS_000_INT_i N_59_i DSACK1_INT_i N_190_i \ +# sm_amiga_i_1__n N_191_i FPU_SENSE_i AS_030_D1_i N_267_i cpu_est_i_0__n \ +# cpu_est_i_3__n N_266_i VPA_D_i sm_amiga_i_3__n N_186_i sm_amiga_i_4__n \ +# cpu_est_i_1__n N_185_i clk_000_d_i_0__n clk_000_d_i_1__n N_183_i AS_030_D0_i N_184_i \ +# cpu_est_i_2__n DTACK_D0_i N_182_i sm_amiga_i_2__n AS_030_000_SYNC_i N_181_i \ +# ahigh_i_30__n ahigh_i_31__n N_260_i ahigh_i_28__n pos_clk_size_dma_6_0_1__n \ +# ahigh_i_29__n N_259_i ahigh_i_26__n pos_clk_size_dma_6_0_0__n ahigh_i_27__n N_63_0 \ +# ahigh_i_24__n N_155_i ahigh_i_25__n N_162_i N_187_i un5_e_0 N_188_i N_154_i N_189_i \ +# cpu_est_2_0_3__n N_149_i N_208_i cpu_est_2_0_2__n N_147_i un2_ds_030_i N_148_i \ +# N_219_i cpu_est_2_0_1__n N_175_i N_146_i un3_as_030_i N_36_0 AS_030_c N_145_i N_35_0 \ +# AS_000_c N_143_i N_144_i RW_000_c pos_clk_un9_clk_000_pe_0_n N_20_i .model bus68030 .inputs A_DECODE_23_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF \ -BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF VPA.BLIF \ -RST.BLIF RESET.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF A_DECODE_20_.BLIF \ +BGACK_000.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF DTACK.BLIF VPA.BLIF \ +RST.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF A_DECODE_20_.BLIF \ A_DECODE_19_.BLIF A_DECODE_18_.BLIF A_DECODE_17_.BLIF A_DECODE_16_.BLIF \ A_DECODE_15_.BLIF A_DECODE_14_.BLIF A_DECODE_13_.BLIF A_DECODE_12_.BLIF \ A_DECODE_11_.BLIF A_DECODE_10_.BLIF A_DECODE_9_.BLIF A_DECODE_8_.BLIF \ A_DECODE_7_.BLIF A_DECODE_6_.BLIF A_DECODE_5_.BLIF A_DECODE_4_.BLIF \ A_DECODE_3_.BLIF A_DECODE_2_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF A_1_.BLIF \ SIZE_1_.BLIF AHIGH_31_.BLIF AS_030.BLIF AS_000.BLIF RW_000.BLIF UDS_000.BLIF \ -LDS_000.BLIF BERR.BLIF DTACK.BLIF RW.BLIF SIZE_0_.BLIF AHIGH_30_.BLIF \ -AHIGH_29_.BLIF AHIGH_28_.BLIF AHIGH_27_.BLIF AHIGH_26_.BLIF AHIGH_25_.BLIF \ -AHIGH_24_.BLIF A_0_.BLIF clk_000_d_i_1__n.BLIF VPA_D_i.BLIF N_125_i.BLIF \ -a_decode_2__n.BLIF VMA_INT_i.BLIF N_124_i.BLIF sm_amiga_i_0__n.BLIF \ -N_53_0.BLIF rst_dly_i_2__n.BLIF N_134_i.BLIF rst_dly_i_1__n.BLIF N_270_0.BLIF \ -rst_dly_i_0__n.BLIF N_77_i.BLIF DSACK1_INT_i.BLIF N_87_i.BLIF \ -inst_BGACK_030_INTreg.BLIF N_137_i_0.BLIF N_112_i.BLIF vcc_n_n.BLIF \ -DTACK_D0_i.BLIF N_113_i.BLIF inst_VMA_INTreg.BLIF BGACK_030_INT_i.BLIF \ -N_114_i.BLIF gnd_n_n.BLIF nEXP_SPACE_i.BLIF un1_amiga_bus_enable_low.BLIF \ -AS_000_DMA_i.BLIF N_109_i.BLIF un7_as_030.BLIF RW_000_i.BLIF N_108_i.BLIF \ -un1_LDS_000_INT.BLIF clk_030_pe_i_1__n.BLIF N_111_i.BLIF un1_UDS_000_INT.BLIF \ -DS_000_DMA_0_sqmuxa_i.BLIF N_265_2_0.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF \ -pos_clk_un4_rw_000_i_n.BLIF un10_ciin.BLIF AS_000_i.BLIF un1_as_000_i.BLIF \ -un21_fpu_cs.BLIF AMIGA_DS_i.BLIF VPA_c_i.BLIF un21_berr.BLIF \ -pos_clk_un3_clk_out_int_i_n.BLIF N_52_0.BLIF un6_ds_030.BLIF \ -cycle_dma_i_0__n.BLIF DTACK_c_i.BLIF un13_ciin.BLIF cycle_dma_i_1__n.BLIF \ -N_48_0.BLIF cpu_est_1_.BLIF pos_clk_as_000_dma6_i_n.BLIF un3_ahigh_i.BLIF \ -cpu_est_2_.BLIF DS_000_DMA_i.BLIF pos_clk_un4_bgack_000_i_n.BLIF \ -cpu_est_3_.BLIF CLK_EXP_i.BLIF pos_clk_un6_bgack_000_0_n.BLIF cpu_est_0_.BLIF \ -AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF N_7_i.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF \ -ahigh_i_25__n.BLIF N_41_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF \ -ahigh_i_24__n.BLIF pos_clk_un1_bgack_030_int_0_n.BLIF inst_AS_030_D0.BLIF \ -ahigh_i_27__n.BLIF pos_clk_un12_clk_out_int_0_n.BLIF inst_AS_030_000_SYNC.BLIF \ -ahigh_i_26__n.BLIF pos_clk_un3_0_n.BLIF inst_BGACK_030_INT_D.BLIF \ -ahigh_i_29__n.BLIF pos_clk_un15_bgack_030_int_i_n.BLIF inst_AS_000_DMA.BLIF \ -ahigh_i_28__n.BLIF N_3_i.BLIF inst_DS_000_DMA.BLIF ahigh_i_31__n.BLIF \ -N_43_0.BLIF inst_VPA_D.BLIF ahigh_i_30__n.BLIF N_4_i.BLIF CLK_000_D_3_.BLIF \ -a_i_1__n.BLIF N_42_0.BLIF inst_DTACK_D0.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF \ -un6_amiga_bus_data_dir_i.BLIF inst_RESET_OUT.BLIF AS_030_D0_i.BLIF \ -un12_amiga_bus_data_dir_m_i.BLIF CLK_030_PE_1_.BLIF un10_ciin_i.BLIF \ -AMIGA_BUS_DATA_DIR_c_0.BLIF inst_AMIGA_DS.BLIF FPU_SENSE_i.BLIF N_22_i.BLIF \ -CLK_000_D_1_.BLIF AS_030_000_SYNC_i.BLIF N_31_0.BLIF CLK_000_D_0_.BLIF \ -a_decode_i_16__n.BLIF N_21_i.BLIF inst_CLK_OUT_PRE_50.BLIF \ -a_decode_i_18__n.BLIF N_32_0.BLIF inst_CLK_OUT_PRE_D.BLIF \ -a_decode_i_19__n.BLIF N_19_i.BLIF IPL_D0_0_.BLIF N_224_i.BLIF N_34_0.BLIF \ -IPL_D0_1_.BLIF N_225_i.BLIF N_18_i.BLIF IPL_D0_2_.BLIF N_226_i.BLIF \ -N_35_0.BLIF CLK_000_D_2_.BLIF pos_clk_un5_bgack_030_int_d_i_n.BLIF \ -CLK_000_D_4_.BLIF pos_clk_amiga_bus_enable_dma_high_3_0_n.BLIF \ -pos_clk_un6_bg_030_n.BLIF pos_clk_amiga_bus_enable_dma_low_3_0_n.BLIF \ -pos_clk_ipl_n.BLIF pos_clk_rw_000_dma_3_0_n.BLIF inst_LDS_000_INT.BLIF \ -un13_ciin_i.BLIF UDS_000_c_i.BLIF inst_DS_000_ENABLE.BLIF un6_ds_030_i.BLIF \ -LDS_000_c_i.BLIF inst_UDS_000_INT.BLIF N_123_i.BLIF N_86_i.BLIF \ -SM_AMIGA_6_.BLIF N_122_i.BLIF N_129_i.BLIF SM_AMIGA_4_.BLIF un7_as_030_i.BLIF \ -N_130_i.BLIF SM_AMIGA_1_.BLIF AS_030_c.BLIF un11_amiga_bus_enable_high_i.BLIF \ -SM_AMIGA_0_.BLIF N_117_i.BLIF SIZE_DMA_0_.BLIF AS_000_c.BLIF N_46_0.BLIF \ -SIZE_DMA_1_.BLIF N_107_i.BLIF CYCLE_DMA_0_.BLIF RW_000_c.BLIF \ -pos_clk_size_dma_6_0_0__n.BLIF CYCLE_DMA_1_.BLIF N_106_i.BLIF \ -CLK_030_PE_0_.BLIF pos_clk_size_dma_6_0_1__n.BLIF inst_RW_000_INT.BLIF \ -UDS_000_c.BLIF N_16_i.BLIF inst_RW_000_DMA.BLIF N_254_i.BLIF RST_DLY_0_.BLIF \ -LDS_000_c.BLIF N_263_i.BLIF RST_DLY_1_.BLIF N_250_i.BLIF RST_DLY_2_.BLIF \ -size_c_0__n.BLIF N_256_i.BLIF inst_A0_DMA.BLIF N_189_i.BLIF \ -pos_clk_rw_000_int_5_n.BLIF size_c_1__n.BLIF N_101_i.BLIF inst_DSACK1_INT.BLIF \ -inst_AS_000_INT.BLIF ahigh_c_24__n.BLIF N_103_i.BLIF SM_AMIGA_5_.BLIF \ -N_104_i.BLIF SM_AMIGA_3_.BLIF ahigh_c_25__n.BLIF SM_AMIGA_2_.BLIF N_105_i.BLIF \ -ahigh_c_26__n.BLIF N_115_i.BLIF ahigh_c_27__n.BLIF N_116_i.BLIF \ -ahigh_c_28__n.BLIF N_131_i.BLIF N_277_i.BLIF ahigh_c_29__n.BLIF N_64_0.BLIF \ -N_91_0.BLIF ahigh_c_30__n.BLIF N_159_0.BLIF N_14.BLIF N_85_i.BLIF N_15.BLIF \ -ahigh_c_31__n.BLIF un1_SM_AMIGA_0_sqmuxa_1_0.BLIF N_24.BLIF RW_c_i.BLIF \ -N_25.BLIF pos_clk_rw_000_int_5_0_n.BLIF clk_000_d_i_3__n.BLIF N_25_i.BLIF \ -N_28_0.BLIF N_24_i.BLIF N_27_0.BLIF ipl_c_i_1__n.BLIF N_50_0.BLIF \ -ipl_c_i_0__n.BLIF N_49_0.BLIF N_14_i.BLIF N_39_0.BLIF N_15_i.BLIF N_38_0.BLIF \ -N_91_0_1.BLIF N_91_0_2.BLIF N_91_0_3.BLIF N_265_i_1.BLIF N_266_i_1.BLIF \ -N_266_i_2.BLIF N_138_i_1.BLIF N_148_i_1.BLIF N_144_i_1.BLIF N_142_i_1.BLIF \ -N_140_i_1.BLIF SM_AMIGA_i_7_.BLIF pos_clk_un10_sm_amiga_i_1_n.BLIF N_76.BLIF \ -N_85_i_1.BLIF G_122.BLIF N_85_i_2.BLIF G_123.BLIF a_decode_c_16__n.BLIF \ -N_277_1.BLIF G_124.BLIF N_277_2.BLIF un1_rst_2_1.BLIF a_decode_c_17__n.BLIF \ -N_277_3.BLIF cpu_est_0_0_.BLIF N_277_4.BLIF N_64.BLIF a_decode_c_18__n.BLIF \ -N_277_5.BLIF N_122.BLIF un10_ciin_1.BLIF N_123.BLIF a_decode_c_19__n.BLIF \ -un10_ciin_2.BLIF N_132.BLIF un10_ciin_3.BLIF N_133.BLIF a_decode_c_20__n.BLIF \ -un10_ciin_4.BLIF N_274.BLIF un10_ciin_5.BLIF N_276.BLIF a_decode_c_21__n.BLIF \ -un10_ciin_6.BLIF N_77.BLIF un10_ciin_7.BLIF N_79.BLIF a_decode_c_22__n.BLIF \ -un10_ciin_8.BLIF N_78.BLIF un10_ciin_9.BLIF N_263.BLIF a_decode_c_23__n.BLIF \ -un10_ciin_10.BLIF N_108.BLIF un10_ciin_11.BLIF N_114.BLIF a_c_0__n.BLIF \ -un6_amiga_bus_data_dir_1.BLIF N_85.BLIF un6_amiga_bus_data_dir_2.BLIF \ -N_104.BLIF a_c_1__n.BLIF pos_clk_as_000_dma6_1_n.BLIF N_91.BLIF \ -pos_clk_as_000_dma6_2_n.BLIF N_131.BLIF nEXP_SPACE_c.BLIF \ -DS_000_DMA_1_sqmuxa_1.BLIF N_277.BLIF pos_clk_un4_rw_000_1_n.BLIF N_130.BLIF \ -BERR_c.BLIF pos_clk_un4_rw_000_2_n.BLIF N_115.BLIF \ -pos_clk_un13_clk_out_int_1_n.BLIF N_116.BLIF BG_030_c.BLIF N_125_1.BLIF \ -N_105.BLIF N_116_1.BLIF N_103.BLIF BG_000DFFreg.BLIF \ -pos_clk_un29_clk_000_ne_1_1_n.BLIF N_101.BLIF \ -pos_clk_un29_clk_000_ne_1_2_n.BLIF N_259.BLIF \ -pos_clk_un29_clk_000_ne_1_3_n.BLIF N_255.BLIF BGACK_000_c.BLIF N_261_1.BLIF \ -N_256.BLIF N_261_2.BLIF N_254.BLIF CLK_030_c.BLIF N_262_1.BLIF N_16.BLIF \ -N_262_2.BLIF N_106.BLIF DS_000_ENABLE_0_sqmuxa_1_1.BLIF N_86.BLIF N_259_1.BLIF \ -N_107.BLIF CLK_OSZI_c.BLIF N_250_i_1.BLIF N_117.BLIF N_189_i_1.BLIF \ -pos_clk_a0_dma_3_n.BLIF pos_clk_un6_bg_030_1_n.BLIF N_129.BLIF \ -CLK_OUT_INTreg.BLIF N_108_1.BLIF pos_clk_size_dma_6_1__n.BLIF N_114_1.BLIF \ -pos_clk_size_dma_6_0__n.BLIF un21_berr_1.BLIF pos_clk_rw_000_dma_3_n.BLIF \ -FPU_SENSE_c.BLIF un21_fpu_cs_1.BLIF pos_clk_amiga_bus_enable_dma_low_3_n.BLIF \ -N_130_1.BLIF pos_clk_amiga_bus_enable_dma_high_3_n.BLIF IPL_030DFF_0_reg.BLIF \ -N_136_i_1.BLIF SIZE_DMA_3_sqmuxa.BLIF N_152_i_1.BLIF \ -pos_clk_un5_bgack_030_int_d_n.BLIF IPL_030DFF_1_reg.BLIF N_146_i_1.BLIF \ -N_18.BLIF N_267_i_1.BLIF N_19.BLIF IPL_030DFF_2_reg.BLIF pos_clk_ipl_1_n.BLIF \ -N_21.BLIF bg_000_0_un3_n.BLIF N_22.BLIF ipl_c_0__n.BLIF bg_000_0_un1_n.BLIF \ -un6_amiga_bus_data_dir.BLIF bg_000_0_un0_n.BLIF un12_amiga_bus_data_dir_m.BLIF \ -ipl_c_1__n.BLIF uds_000_int_0_un3_n.BLIF pos_clk_un3_clk_out_int_n.BLIF \ -uds_000_int_0_un1_n.BLIF N_3.BLIF ipl_c_2__n.BLIF uds_000_int_0_un0_n.BLIF \ -pos_clk_as_000_dma6_n.BLIF lds_000_int_0_un3_n.BLIF DS_000_DMA_1_sqmuxa.BLIF \ -lds_000_int_0_un1_n.BLIF N_4.BLIF DTACK_c.BLIF lds_000_int_0_un0_n.BLIF \ -AS_000_DMA_1_sqmuxa.BLIF ds_000_enable_0_un3_n.BLIF un1_rst_2.BLIF \ -ds_000_enable_0_un1_n.BLIF G_97.BLIF ds_000_enable_0_un0_n.BLIF N_199.BLIF \ -VPA_c.BLIF ipl_030_0_2__un3_n.BLIF pos_clk_un13_bgack_030_int_n.BLIF \ -ipl_030_0_2__un1_n.BLIF N_205.BLIF ipl_030_0_2__un0_n.BLIF \ -pos_clk_un13_clk_out_int_n.BLIF RST_c.BLIF vma_int_0_un3_n.BLIF \ -pos_clk_un15_bgack_030_int_n.BLIF vma_int_0_un1_n.BLIF pos_clk_un3_n.BLIF \ -RESET_c.BLIF vma_int_0_un0_n.BLIF pos_clk_un12_clk_out_int_n.BLIF \ -cpu_est_0_1__un3_n.BLIF pos_clk_un1_bgack_030_int_n.BLIF RW_c.BLIF \ -cpu_est_0_1__un1_n.BLIF DS_000_DMA_0_sqmuxa.BLIF cpu_est_0_1__un0_n.BLIF \ -un1_rst_3.BLIF fc_c_0__n.BLIF cpu_est_0_2__un3_n.BLIF G_95.BLIF \ -cpu_est_0_2__un1_n.BLIF G_101.BLIF fc_c_1__n.BLIF cpu_est_0_2__un0_n.BLIF \ -G_103.BLIF cpu_est_0_3__un3_n.BLIF pos_clk_un4_rw_000_n.BLIF \ -cpu_est_0_3__un1_n.BLIF N_7.BLIF AMIGA_BUS_DATA_DIR_c.BLIF \ -cpu_est_0_3__un0_n.BLIF pos_clk_un6_bgack_000_n.BLIF \ -pos_clk_un31_clk_000_ne_1_i_m2_un3_n.BLIF pos_clk_un4_bgack_000_n.BLIF \ -pos_clk_un31_clk_000_ne_1_i_m2_un1_n.BLIF N_265_2.BLIF \ -pos_clk_un31_clk_000_ne_1_i_m2_un0_n.BLIF N_111.BLIF \ -bgack_030_int_0_un3_n.BLIF N_109.BLIF BG_030_c_i.BLIF \ -bgack_030_int_0_un1_n.BLIF N_113.BLIF pos_clk_un6_bg_030_i_n.BLIF \ -bgack_030_int_0_un0_n.BLIF N_112.BLIF pos_clk_un9_bg_030_0_n.BLIF \ -ds_000_dma_0_un3_n.BLIF N_98.BLIF UDS_000_INT_i.BLIF ds_000_dma_0_un1_n.BLIF \ -pos_clk_un29_clk_000_ne_1_n.BLIF un1_UDS_000_INT_0.BLIF \ -ds_000_dma_0_un0_n.BLIF N_87.BLIF LDS_000_INT_i.BLIF as_000_dma_0_un3_n.BLIF \ -N_270.BLIF un1_LDS_000_INT_0.BLIF as_000_dma_0_un1_n.BLIF N_134.BLIF \ -N_23_i.BLIF as_000_dma_0_un0_n.BLIF N_125.BLIF N_30_0.BLIF \ -size_dma_0_1__un3_n.BLIF N_124.BLIF N_20_i.BLIF size_dma_0_1__un1_n.BLIF \ -N_121.BLIF N_33_0.BLIF size_dma_0_1__un0_n.BLIF N_120.BLIF N_13_i.BLIF \ -size_dma_0_0__un3_n.BLIF N_137.BLIF N_40_0.BLIF size_dma_0_0__un1_n.BLIF \ -pos_clk_un31_clk_000_ne_n.BLIF ipl_c_i_2__n.BLIF size_dma_0_0__un0_n.BLIF \ -N_17.BLIF N_51_0.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF \ -pos_clk_un9_clk_000_pe_n.BLIF N_26_i.BLIF \ -amiga_bus_enable_dma_high_0_un1_n.BLIF cpu_est_2_1__n.BLIF N_29_0.BLIF \ -amiga_bus_enable_dma_high_0_un0_n.BLIF cpu_est_2_2__n.BLIF a_c_i_0__n.BLIF \ -amiga_bus_enable_dma_low_0_un3_n.BLIF N_261.BLIF size_c_i_1__n.BLIF \ -amiga_bus_enable_dma_low_0_un1_n.BLIF N_262.BLIF \ -pos_clk_un10_sm_amiga_i_n.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF \ -N_251.BLIF DS_000_ENABLE_0_sqmuxa_1_i.BLIF a0_dma_0_un3_n.BLIF N_252.BLIF \ -un1_DS_000_ENABLE_0_sqmuxa_i.BLIF a0_dma_0_un1_n.BLIF N_258.BLIF N_157_i.BLIF \ -a0_dma_0_un0_n.BLIF N_257.BLIF N_160_0.BLIF rw_000_dma_0_un3_n.BLIF \ -DS_000_ENABLE_1_sqmuxa.BLIF N_161_0.BLIF rw_000_dma_0_un1_n.BLIF \ -un1_DS_000_ENABLE_0_sqmuxa.BLIF N_162_0.BLIF rw_000_dma_0_un0_n.BLIF \ -N_102.BLIF N_165_i.BLIF ipl_030_0_0__un3_n.BLIF N_118.BLIF \ -ipl_030_0_0__un1_n.BLIF N_119.BLIF N_167_i.BLIF ipl_030_0_0__un0_n.BLIF \ -N_264.BLIF N_166_i.BLIF ipl_030_0_1__un3_n.BLIF DS_000_ENABLE_0_sqmuxa_1.BLIF \ -ipl_030_0_1__un1_n.BLIF N_164.BLIF N_168_i.BLIF ipl_030_0_1__un0_n.BLIF \ -N_170.BLIF as_030_000_sync_0_un3_n.BLIF N_168.BLIF N_170_i.BLIF \ -as_030_000_sync_0_un1_n.BLIF N_166.BLIF as_030_000_sync_0_un0_n.BLIF \ -N_167.BLIF N_164_i.BLIF rw_000_int_0_un3_n.BLIF N_165.BLIF \ -rw_000_int_0_un1_n.BLIF N_162.BLIF N_102_i.BLIF rw_000_int_0_un0_n.BLIF \ -N_161.BLIF N_264_i.BLIF a_decode_15__n.BLIF N_160.BLIF N_79_i.BLIF N_157.BLIF \ -N_78_i.BLIF a_decode_14__n.BLIF N_26.BLIF N_119_i.BLIF N_13.BLIF N_118_i.BLIF \ -a_decode_13__n.BLIF N_20.BLIF N_23.BLIF N_255_i.BLIF a_decode_12__n.BLIF \ -N_8.BLIF N_257_i.BLIF pos_clk_un9_bg_030_n.BLIF cpu_est_2_0_2__n.BLIF \ -a_decode_11__n.BLIF un1_amiga_bus_enable_low_i.BLIF N_258_i.BLIF \ -un21_fpu_cs_i.BLIF N_259_i.BLIF a_decode_10__n.BLIF sm_amiga_i_2__n.BLIF \ -cpu_est_2_0_1__n.BLIF sm_amiga_i_1__n.BLIF N_262_i.BLIF a_decode_9__n.BLIF \ -sm_amiga_i_3__n.BLIF N_261_i.BLIF sm_amiga_i_4__n.BLIF \ -pos_clk_un9_clk_000_pe_0_n.BLIF a_decode_8__n.BLIF sm_amiga_i_6__n.BLIF \ -N_251_i.BLIF sm_amiga_i_5__n.BLIF N_252_0.BLIF a_decode_7__n.BLIF \ -clk_000_d_i_0__n.BLIF N_76_i.BLIF AS_000_INT_i.BLIF N_17_i.BLIF \ -a_decode_6__n.BLIF sm_amiga_i_i_7__n.BLIF N_36_0.BLIF AS_030_i.BLIF \ -N_98_i.BLIF a_decode_5__n.BLIF cpu_est_i_2__n.BLIF \ -pos_clk_un31_clk_000_ne_i_n.BLIF cpu_est_i_0__n.BLIF N_228_i.BLIF \ -a_decode_4__n.BLIF cpu_est_i_3__n.BLIF N_121_i.BLIF cpu_est_i_1__n.BLIF \ -N_120_i.BLIF a_decode_3__n.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF \ +LDS_000.BLIF BERR.BLIF RW.BLIF SIZE_0_.BLIF AHIGH_30_.BLIF AHIGH_29_.BLIF \ +AHIGH_28_.BLIF AHIGH_27_.BLIF AHIGH_26_.BLIF AHIGH_25_.BLIF AHIGH_24_.BLIF \ +A_0_.BLIF N_23_0.BLIF UDS_000_c.BLIF N_19_i.BLIF N_22_0.BLIF LDS_000_c.BLIF \ +N_18_i.BLIF N_21_0.BLIF size_c_0__n.BLIF ipl_c_i_2__n.BLIF N_43_0.BLIF \ +size_c_1__n.BLIF ipl_c_i_1__n.BLIF inst_BGACK_030_INTreg.BLIF N_42_0.BLIF \ +vcc_n_n.BLIF ahigh_c_24__n.BLIF ipl_c_i_0__n.BLIF un5_e.BLIF N_41_0.BLIF \ +gnd_n_n.BLIF ahigh_c_25__n.BLIF DTACK_c_i.BLIF un1_amiga_bus_enable_low.BLIF \ +N_45_0.BLIF un3_as_030.BLIF ahigh_c_26__n.BLIF VPA_c_i.BLIF \ +un1_UDS_000_INT.BLIF N_44_0.BLIF un1_LDS_000_INT.BLIF ahigh_c_27__n.BLIF \ +N_13_i.BLIF un1_DS_000_ENABLE_0_sqmuxa.BLIF N_27_0.BLIF un10_ciin.BLIF \ +ahigh_c_28__n.BLIF LDS_000_INT_i.BLIF un21_fpu_cs.BLIF un1_LDS_000_INT_0.BLIF \ +un21_berr.BLIF ahigh_c_29__n.BLIF UDS_000_INT_i.BLIF un2_ds_030.BLIF \ +un1_UDS_000_INT_0.BLIF cpu_est_0_.BLIF ahigh_c_30__n.BLIF N_96_0_1.BLIF \ +cpu_est_1_.BLIF N_96_0_2.BLIF cpu_est_2_.BLIF ahigh_c_31__n.BLIF \ +N_282_0_1.BLIF cpu_est_3_.BLIF N_282_0_2.BLIF \ +inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF N_282_0_3.BLIF \ +inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF N_282_0_4.BLIF inst_AS_030_D0.BLIF \ +pos_clk_un10_sm_amiga_i_1_n.BLIF inst_AS_030_D1.BLIF un10_ciin_1.BLIF \ +inst_AS_030_000_SYNC.BLIF un10_ciin_2.BLIF inst_AS_000_DMA.BLIF \ +un10_ciin_3.BLIF inst_DS_000_DMA.BLIF un10_ciin_4.BLIF inst_VMA_INTreg.BLIF \ +un10_ciin_5.BLIF inst_VPA_D.BLIF un10_ciin_6.BLIF CLK_000_D_3_.BLIF \ +un10_ciin_7.BLIF inst_DTACK_D0.BLIF un10_ciin_8.BLIF inst_AMIGA_DS.BLIF \ +un10_ciin_9.BLIF CLK_000_D_1_.BLIF un10_ciin_10.BLIF CLK_000_D_0_.BLIF \ +un10_ciin_11.BLIF inst_CLK_OUT_PRE_50.BLIF N_201_1.BLIF \ +inst_CLK_OUT_PRE_D.BLIF N_201_2.BLIF IPL_D0_0_.BLIF N_131_i_1.BLIF \ +IPL_D0_1_.BLIF N_134_0_1.BLIF IPL_D0_2_.BLIF N_113_i_1.BLIF CLK_000_D_2_.BLIF \ +N_113_i_2.BLIF CLK_000_D_4_.BLIF N_144_1.BLIF pos_clk_ipl_n.BLIF N_144_2.BLIF \ +SIZE_DMA_0_.BLIF N_143_1.BLIF SIZE_DMA_1_.BLIF N_143_2.BLIF inst_A0_DMA.BLIF \ +N_163_1.BLIF inst_RW_000_DMA.BLIF N_163_2.BLIF inst_UDS_000_INT.BLIF \ +N_163_3.BLIF inst_DS_000_ENABLE.BLIF un21_fpu_cs_1.BLIF inst_LDS_000_INT.BLIF \ +a_decode_c_16__n.BLIF un21_berr_1_0.BLIF inst_BGACK_030_INT_D.BLIF \ +pos_clk_cycle_dma_5_1_1__n.BLIF SM_AMIGA_6_.BLIF a_decode_c_17__n.BLIF \ +N_199_1.BLIF inst_RW_000_INT.BLIF AS_000_DMA_1_sqmuxa_1.BLIF SM_AMIGA_4_.BLIF \ +a_decode_c_18__n.BLIF N_140_1.BLIF SM_AMIGA_1_.BLIF N_66_i_1.BLIF \ +SM_AMIGA_0_.BLIF a_decode_c_19__n.BLIF N_66_i_2.BLIF CYCLE_DMA_0_.BLIF \ +N_205_i_1.BLIF CYCLE_DMA_1_.BLIF a_decode_c_20__n.BLIF N_205_i_2.BLIF \ +inst_DSACK1_INT.BLIF N_180_1.BLIF inst_AS_000_INT.BLIF a_decode_c_21__n.BLIF \ +N_180_2.BLIF pos_clk_un9_clk_000_pe_n.BLIF N_59_i_1.BLIF SM_AMIGA_5_.BLIF \ +a_decode_c_22__n.BLIF N_127_i_1.BLIF SM_AMIGA_3_.BLIF N_123_i_1.BLIF \ +SM_AMIGA_2_.BLIF a_decode_c_23__n.BLIF N_121_i_1.BLIF N_119_i_1.BLIF N_6.BLIF \ +a_c_0__n.BLIF N_117_i_1.BLIF N_115_i_1.BLIF a_c_1__n.BLIF N_111_i_1.BLIF \ +N_165_1.BLIF N_13.BLIF nEXP_SPACE_c.BLIF N_162_1.BLIF N_148_1.BLIF N_18.BLIF \ +BERR_c.BLIF pos_clk_ipl_1_n.BLIF N_19.BLIF ds_000_dma_0_un3_n.BLIF N_20.BLIF \ +BG_030_c.BLIF ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF \ +BG_000DFFreg.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un1_n.BLIF \ +as_000_dma_0_un0_n.BLIF BGACK_000_c.BLIF uds_000_int_0_un3_n.BLIF \ +uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF bg_000_0_un3_n.BLIF \ +bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF CLK_OSZI_c.BLIF \ +lds_000_int_0_un3_n.BLIF lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF \ +CLK_OUT_INTreg.BLIF as_030_d1_0_un3_n.BLIF as_030_d1_0_un1_n.BLIF \ +as_030_d1_0_un0_n.BLIF FPU_SENSE_c.BLIF rw_000_int_0_un3_n.BLIF \ +rw_000_int_0_un1_n.BLIF IPL_030DFF_0_reg.BLIF rw_000_int_0_un0_n.BLIF \ +as_030_000_sync_0_un3_n.BLIF IPL_030DFF_1_reg.BLIF \ +as_030_000_sync_0_un1_n.BLIF SM_AMIGA_i_7_.BLIF as_030_000_sync_0_un0_n.BLIF \ +IPL_030DFF_2_reg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un1_n.BLIF \ +cpu_est_2_1__n.BLIF ipl_c_0__n.BLIF bgack_030_int_0_un0_n.BLIF \ +cpu_est_2_2__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_2_3__n.BLIF \ +ipl_c_1__n.BLIF cpu_est_0_1__un1_n.BLIF G_105.BLIF cpu_est_0_1__un0_n.BLIF \ +G_106.BLIF ipl_c_2__n.BLIF cpu_est_0_2__un3_n.BLIF G_107.BLIF \ +cpu_est_0_2__un1_n.BLIF N_60.BLIF cpu_est_0_2__un0_n.BLIF N_63.BLIF \ +DTACK_c.BLIF cpu_est_0_3__un3_n.BLIF N_126.BLIF cpu_est_0_3__un1_n.BLIF \ +N_150.BLIF cpu_est_0_3__un0_n.BLIF N_151.BLIF ipl_030_0_0__un3_n.BLIF \ +N_219.BLIF VPA_c.BLIF ipl_030_0_0__un1_n.BLIF N_175.BLIF \ +ipl_030_0_0__un0_n.BLIF ipl_030_0_1__un3_n.BLIF N_59.BLIF RST_c.BLIF \ +ipl_030_0_1__un1_n.BLIF N_68.BLIF ipl_030_0_1__un0_n.BLIF N_72.BLIF \ +ipl_030_0_2__un3_n.BLIF N_80.BLIF ipl_030_0_2__un1_n.BLIF N_93.BLIF RW_c.BLIF \ +ipl_030_0_2__un0_n.BLIF N_98.BLIF ds_000_enable_0_un3_n.BLIF N_107.BLIF \ +fc_c_0__n.BLIF ds_000_enable_0_un1_n.BLIF N_128.BLIF \ +ds_000_enable_0_un0_n.BLIF N_131.BLIF fc_c_1__n.BLIF vma_int_0_un3_n.BLIF \ +N_134.BLIF vma_int_0_un1_n.BLIF N_135.BLIF vma_int_0_un0_n.BLIF N_141.BLIF \ +AMIGA_BUS_DATA_DIR_c.BLIF a_decode_15__n.BLIF N_142.BLIF N_143.BLIF \ +a_decode_14__n.BLIF N_144.BLIF N_145.BLIF a_decode_13__n.BLIF N_146.BLIF \ +N_205_i.BLIF N_147.BLIF N_140_i.BLIF a_decode_12__n.BLIF N_148.BLIF \ +AMIGA_DS_i.BLIF N_149.BLIF a_decode_11__n.BLIF N_154.BLIF N_199_i.BLIF \ +N_155.BLIF N_198_i.BLIF a_decode_10__n.BLIF N_162.BLIF N_180_i.BLIF N_165.BLIF \ +N_262_i.BLIF a_decode_9__n.BLIF N_259.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF \ +N_260.BLIF pos_clk_un2_i_n.BLIF a_decode_8__n.BLIF N_181.BLIF N_3_i.BLIF \ +N_182.BLIF N_32_0.BLIF a_decode_7__n.BLIF N_183.BLIF N_4_i.BLIF N_184.BLIF \ +N_31_0.BLIF a_decode_6__n.BLIF N_185.BLIF N_220_i.BLIF N_186.BLIF \ +BG_030_c_i.BLIF a_decode_5__n.BLIF N_266.BLIF pos_clk_un9_bg_030_0_n.BLIF \ +N_267.BLIF N_17_i.BLIF a_decode_4__n.BLIF N_268.BLIF N_24_0.BLIF N_190.BLIF \ +N_16_i.BLIF a_decode_3__n.BLIF N_191.BLIF N_25_0.BLIF N_201.BLIF N_15_i.BLIF \ +a_decode_2__n.BLIF N_202.BLIF N_26_0.BLIF N_203.BLIF N_12_i.BLIF N_208.BLIF \ +N_28_0.BLIF N_163.BLIF N_11_i.BLIF N_282.BLIF N_29_0.BLIF un21_berr_1.BLIF \ +N_5_i.BLIF N_132.BLIF N_30_0.BLIF N_96.BLIF a_c_i_0__n.BLIF N_129.BLIF \ +size_c_i_1__n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF pos_clk_un10_sm_amiga_i_n.BLIF \ +N_169.BLIF un1_dsack1_i.BLIF N_170.BLIF N_69_i.BLIF N_167.BLIF N_163_i.BLIF \ +N_168.BLIF N_244_0.BLIF pos_clk_rw_000_int_5_n.BLIF N_164_i.BLIF \ +pos_clk_un6_bgack_000_n.BLIF N_165_i.BLIF N_274.BLIF \ +un11_amiga_bus_enable_high_i.BLIF N_164.BLIF un10_ciin_i.BLIF N_244.BLIF \ +N_60_0.BLIF N_5.BLIF N_274_i.BLIF N_11.BLIF pos_clk_un6_bgack_000_0_n.BLIF \ +N_12.BLIF RW_c_i.BLIF N_15.BLIF pos_clk_rw_000_int_5_0_n.BLIF N_16.BLIF \ +N_168_i.BLIF N_17.BLIF N_167_i.BLIF pos_clk_un9_bg_030_n.BLIF G_91.BLIF \ +N_170_i.BLIF N_3.BLIF N_169_i.BLIF N_205.BLIF AS_000_DMA_1_sqmuxa.BLIF \ +N_38_0.BLIF N_4.BLIF un1_SM_AMIGA_0_sqmuxa_1_0.BLIF N_199.BLIF N_282_0.BLIF \ +pos_clk_un2_n.BLIF clk_000_d_i_3__n.BLIF N_140.BLIF N_96_0.BLIF N_262.BLIF \ +N_129_i.BLIF N_198.BLIF N_268_i.BLIF N_180.BLIF N_246_i.BLIF \ +un1_amiga_bus_enable_low_i.BLIF N_132_0.BLIF un21_fpu_cs_i.BLIF AS_000_i.BLIF \ +N_142_i.BLIF BGACK_030_INT_i.BLIF N_141_i.BLIF nEXP_SPACE_i.BLIF N_135_0.BLIF \ +cycle_dma_i_0__n.BLIF N_134_0.BLIF RW_000_i.BLIF N_131_i.BLIF CLK_EXP_i.BLIF \ +LDS_000_c_i.BLIF cycle_dma_i_1__n.BLIF UDS_000_c_i.BLIF DS_000_DMA_i.BLIF \ +N_128_i.BLIF AS_000_DMA_i.BLIF N_107_i.BLIF a_i_1__n.BLIF N_203_i.BLIF \ +AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_0.BLIF \ +a_decode_i_19__n.BLIF N_201_i.BLIF a_decode_i_18__n.BLIF N_202_i.BLIF \ +a_decode_i_16__n.BLIF VMA_INT_i.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF \ +N_98_i.BLIF sm_amiga_i_0__n.BLIF N_93_i.BLIF sm_amiga_i_5__n.BLIF N_82_i.BLIF \ +sm_amiga_i_6__n.BLIF N_80_i.BLIF sm_amiga_i_i_7__n.BLIF N_72_i.BLIF \ +AS_030_i.BLIF N_68_i.BLIF AS_000_INT_i.BLIF N_59_i.BLIF DSACK1_INT_i.BLIF \ +N_190_i.BLIF sm_amiga_i_1__n.BLIF N_191_i.BLIF FPU_SENSE_i.BLIF \ +AS_030_D1_i.BLIF N_267_i.BLIF cpu_est_i_0__n.BLIF cpu_est_i_3__n.BLIF \ +N_266_i.BLIF VPA_D_i.BLIF sm_amiga_i_3__n.BLIF N_186_i.BLIF \ +sm_amiga_i_4__n.BLIF cpu_est_i_1__n.BLIF N_185_i.BLIF clk_000_d_i_0__n.BLIF \ +clk_000_d_i_1__n.BLIF N_183_i.BLIF AS_030_D0_i.BLIF N_184_i.BLIF \ +cpu_est_i_2__n.BLIF DTACK_D0_i.BLIF N_182_i.BLIF sm_amiga_i_2__n.BLIF \ +AS_030_000_SYNC_i.BLIF N_181_i.BLIF ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF \ +N_260_i.BLIF ahigh_i_28__n.BLIF pos_clk_size_dma_6_0_1__n.BLIF \ +ahigh_i_29__n.BLIF N_259_i.BLIF ahigh_i_26__n.BLIF \ +pos_clk_size_dma_6_0_0__n.BLIF ahigh_i_27__n.BLIF N_63_0.BLIF \ +ahigh_i_24__n.BLIF N_155_i.BLIF ahigh_i_25__n.BLIF N_162_i.BLIF N_187_i.BLIF \ +un5_e_0.BLIF N_188_i.BLIF N_154_i.BLIF N_189_i.BLIF cpu_est_2_0_3__n.BLIF \ +N_149_i.BLIF N_208_i.BLIF cpu_est_2_0_2__n.BLIF N_147_i.BLIF un2_ds_030_i.BLIF \ +N_148_i.BLIF N_219_i.BLIF cpu_est_2_0_1__n.BLIF N_175_i.BLIF N_146_i.BLIF \ +un3_as_030_i.BLIF N_36_0.BLIF AS_030_c.BLIF N_145_i.BLIF N_35_0.BLIF \ +AS_000_c.BLIF N_143_i.BLIF N_144_i.BLIF RW_000_c.BLIF \ +pos_clk_un9_clk_000_pe_0_n.BLIF N_20_i.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF \ RW_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF \ SIZE_1_.PIN.BLIF AHIGH_24_.PIN.BLIF AHIGH_25_.PIN.BLIF AHIGH_26_.PIN.BLIF \ AHIGH_27_.PIN.BLIF AHIGH_28_.PIN.BLIF AHIGH_29_.PIN.BLIF AHIGH_30_.PIN.BLIF \ -AHIGH_31_.PIN.BLIF A_0_.PIN.BLIF BERR.PIN.BLIF DTACK.PIN.BLIF RW.PIN.BLIF +AHIGH_31_.PIN.BLIF A_0_.PIN.BLIF BERR.PIN.BLIF RW.PIN.BLIF .outputs IPL_030_2_ DS_030 BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 \ AVEC E VMA AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ -AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_i_7_.D \ -SM_AMIGA_i_7_.C SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_5_.D SM_AMIGA_5_.C \ -SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_2_.D \ -SM_AMIGA_2_.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C \ -cpu_est_2_.D cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C IPL_030DFF_0_reg.D \ +AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_4_.D SM_AMIGA_4_.C \ +SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_1_.D \ +SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C IPL_030DFF_0_reg.D \ IPL_030DFF_0_reg.C IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D \ IPL_030DFF_2_reg.C IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D IPL_D0_1_.C IPL_D0_2_.D \ -IPL_D0_2_.C CLK_000_D_0_.D CLK_000_D_0_.C CLK_000_D_1_.D CLK_000_D_1_.C \ -CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C CLK_000_D_4_.D \ -CLK_000_D_4_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C \ -CLK_030_PE_0_.D CLK_030_PE_0_.C CLK_030_PE_1_.D CLK_030_PE_1_.C SIZE_DMA_0_.D \ -SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C cpu_est_0_.D cpu_est_0_.C \ -cpu_est_1_.D cpu_est_1_.C RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.D RST_DLY_1_.C \ -RST_DLY_2_.D RST_DLY_2_.C inst_DS_000_DMA.D inst_DS_000_DMA.C \ +IPL_D0_2_.C SM_AMIGA_i_7_.D SM_AMIGA_i_7_.C SM_AMIGA_6_.D SM_AMIGA_6_.C \ +SM_AMIGA_5_.D SM_AMIGA_5_.C CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_2_.D \ +CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C CLK_000_D_4_.D CLK_000_D_4_.C \ +SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C CYCLE_DMA_0_.D \ +CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C cpu_est_0_.D cpu_est_0_.C \ +cpu_est_1_.D cpu_est_1_.C cpu_est_2_.D cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C \ +CLK_000_D_0_.D CLK_000_D_0_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D \ +inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_VPA_D.D inst_VPA_D.C inst_DTACK_D0.D \ +inst_DTACK_D0.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C BG_000DFFreg.D \ +BG_000DFFreg.C inst_LDS_000_INT.D inst_LDS_000_INT.C inst_VMA_INTreg.D \ +inst_VMA_INTreg.C inst_RW_000_INT.D inst_RW_000_INT.C inst_AS_030_000_SYNC.D \ +inst_AS_030_000_SYNC.C inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C \ +inst_AS_000_DMA.D inst_AS_000_DMA.C inst_DS_000_DMA.D inst_DS_000_DMA.C \ inst_DSACK1_INT.D inst_DSACK1_INT.C inst_AS_000_INT.D inst_AS_000_INT.C \ -inst_AMIGA_DS.D inst_AMIGA_DS.C inst_AS_030_D0.D inst_AS_030_D0.C \ -inst_DTACK_D0.D inst_DTACK_D0.C inst_VPA_D.D inst_VPA_D.C inst_RESET_OUT.D \ -inst_RESET_OUT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C BG_000DFFreg.D \ -BG_000DFFreg.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D \ -inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D \ -inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.D inst_UDS_000_INT.C \ -inst_A0_DMA.D inst_A0_DMA.C inst_RW_000_DMA.D inst_RW_000_DMA.C \ -inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_INT.D inst_RW_000_INT.C \ -inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_LDS_000_INT.D \ -inst_LDS_000_INT.C inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C \ -inst_AS_000_DMA.D inst_AS_000_DMA.C inst_BGACK_030_INT_D.D \ -inst_BGACK_030_INT_D.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.D \ -inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C SIZE_1_ \ -AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR DTACK RW SIZE_0_ AHIGH_30_ \ -AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ \ -clk_000_d_i_1__n VPA_D_i N_125_i a_decode_2__n VMA_INT_i N_124_i \ -sm_amiga_i_0__n N_53_0 rst_dly_i_2__n N_134_i rst_dly_i_1__n N_270_0 \ -rst_dly_i_0__n N_77_i DSACK1_INT_i N_87_i N_137_i_0 N_112_i vcc_n_n DTACK_D0_i \ -N_113_i BGACK_030_INT_i N_114_i gnd_n_n nEXP_SPACE_i un1_amiga_bus_enable_low \ -AS_000_DMA_i N_109_i un7_as_030 RW_000_i N_108_i un1_LDS_000_INT \ -clk_030_pe_i_1__n N_111_i un1_UDS_000_INT DS_000_DMA_0_sqmuxa_i N_265_2_0 \ -un1_SM_AMIGA_0_sqmuxa_1 pos_clk_un4_rw_000_i_n un10_ciin AS_000_i un1_as_000_i \ -un21_fpu_cs AMIGA_DS_i VPA_c_i un21_berr pos_clk_un3_clk_out_int_i_n N_52_0 \ -un6_ds_030 cycle_dma_i_0__n DTACK_c_i un13_ciin cycle_dma_i_1__n N_48_0 \ -pos_clk_as_000_dma6_i_n un3_ahigh_i DS_000_DMA_i pos_clk_un4_bgack_000_i_n \ -CLK_EXP_i pos_clk_un6_bgack_000_0_n AMIGA_BUS_ENABLE_DMA_LOW_i N_7_i \ -ahigh_i_25__n N_41_0 ahigh_i_24__n pos_clk_un1_bgack_030_int_0_n ahigh_i_27__n \ -pos_clk_un12_clk_out_int_0_n ahigh_i_26__n pos_clk_un3_0_n ahigh_i_29__n \ -pos_clk_un15_bgack_030_int_i_n ahigh_i_28__n N_3_i ahigh_i_31__n N_43_0 \ -ahigh_i_30__n N_4_i a_i_1__n N_42_0 AMIGA_BUS_ENABLE_DMA_HIGH_i \ -un6_amiga_bus_data_dir_i AS_030_D0_i un12_amiga_bus_data_dir_m_i un10_ciin_i \ -AMIGA_BUS_DATA_DIR_c_0 FPU_SENSE_i N_22_i AS_030_000_SYNC_i N_31_0 \ -a_decode_i_16__n N_21_i a_decode_i_18__n N_32_0 a_decode_i_19__n N_19_i \ -N_224_i N_34_0 N_225_i N_18_i N_226_i N_35_0 pos_clk_un5_bgack_030_int_d_i_n \ -pos_clk_amiga_bus_enable_dma_high_3_0_n pos_clk_un6_bg_030_n \ -pos_clk_amiga_bus_enable_dma_low_3_0_n pos_clk_ipl_n pos_clk_rw_000_dma_3_0_n \ -un13_ciin_i UDS_000_c_i un6_ds_030_i LDS_000_c_i N_123_i N_86_i N_122_i \ -N_129_i un7_as_030_i N_130_i AS_030_c un11_amiga_bus_enable_high_i N_117_i \ -AS_000_c N_46_0 N_107_i RW_000_c pos_clk_size_dma_6_0_0__n N_106_i \ -pos_clk_size_dma_6_0_1__n UDS_000_c N_16_i N_254_i LDS_000_c N_263_i N_250_i \ -size_c_0__n N_256_i N_189_i pos_clk_rw_000_int_5_n size_c_1__n N_101_i \ -ahigh_c_24__n N_103_i N_104_i ahigh_c_25__n N_105_i ahigh_c_26__n N_115_i \ -ahigh_c_27__n N_116_i ahigh_c_28__n N_131_i N_277_i ahigh_c_29__n N_64_0 \ -N_91_0 ahigh_c_30__n N_159_0 N_14 N_85_i N_15 ahigh_c_31__n \ -un1_SM_AMIGA_0_sqmuxa_1_0 N_24 RW_c_i N_25 pos_clk_rw_000_int_5_0_n \ -clk_000_d_i_3__n N_25_i N_28_0 N_24_i N_27_0 ipl_c_i_1__n N_50_0 ipl_c_i_0__n \ -N_49_0 N_14_i N_39_0 N_15_i N_38_0 N_91_0_1 N_91_0_2 N_91_0_3 N_265_i_1 \ -N_266_i_1 N_266_i_2 N_138_i_1 N_148_i_1 N_144_i_1 N_142_i_1 N_140_i_1 \ -pos_clk_un10_sm_amiga_i_1_n N_76 N_85_i_1 N_85_i_2 a_decode_c_16__n N_277_1 \ -N_277_2 un1_rst_2_1 a_decode_c_17__n N_277_3 N_277_4 N_64 a_decode_c_18__n \ -N_277_5 N_122 un10_ciin_1 N_123 a_decode_c_19__n un10_ciin_2 N_132 un10_ciin_3 \ -N_133 a_decode_c_20__n un10_ciin_4 N_274 un10_ciin_5 N_276 a_decode_c_21__n \ -un10_ciin_6 N_77 un10_ciin_7 N_79 a_decode_c_22__n un10_ciin_8 N_78 \ -un10_ciin_9 N_263 a_decode_c_23__n un10_ciin_10 N_108 un10_ciin_11 N_114 \ -a_c_0__n un6_amiga_bus_data_dir_1 N_85 un6_amiga_bus_data_dir_2 N_104 a_c_1__n \ -pos_clk_as_000_dma6_1_n N_91 pos_clk_as_000_dma6_2_n N_131 nEXP_SPACE_c \ -DS_000_DMA_1_sqmuxa_1 N_277 pos_clk_un4_rw_000_1_n N_130 BERR_c \ -pos_clk_un4_rw_000_2_n N_115 pos_clk_un13_clk_out_int_1_n N_116 BG_030_c \ -N_125_1 N_105 N_116_1 N_103 pos_clk_un29_clk_000_ne_1_1_n N_101 \ -pos_clk_un29_clk_000_ne_1_2_n N_259 pos_clk_un29_clk_000_ne_1_3_n N_255 \ -BGACK_000_c N_261_1 N_256 N_261_2 N_254 CLK_030_c N_262_1 N_16 N_262_2 N_106 \ -DS_000_ENABLE_0_sqmuxa_1_1 N_86 N_259_1 N_107 CLK_OSZI_c N_250_i_1 N_117 \ -N_189_i_1 pos_clk_a0_dma_3_n pos_clk_un6_bg_030_1_n N_129 N_108_1 \ -pos_clk_size_dma_6_1__n N_114_1 pos_clk_size_dma_6_0__n un21_berr_1 \ -pos_clk_rw_000_dma_3_n FPU_SENSE_c un21_fpu_cs_1 \ -pos_clk_amiga_bus_enable_dma_low_3_n N_130_1 \ -pos_clk_amiga_bus_enable_dma_high_3_n N_136_i_1 SIZE_DMA_3_sqmuxa N_152_i_1 \ -pos_clk_un5_bgack_030_int_d_n N_146_i_1 N_18 N_267_i_1 N_19 pos_clk_ipl_1_n \ -N_21 bg_000_0_un3_n N_22 ipl_c_0__n bg_000_0_un1_n un6_amiga_bus_data_dir \ -bg_000_0_un0_n un12_amiga_bus_data_dir_m ipl_c_1__n uds_000_int_0_un3_n \ -pos_clk_un3_clk_out_int_n uds_000_int_0_un1_n N_3 ipl_c_2__n \ -uds_000_int_0_un0_n pos_clk_as_000_dma6_n lds_000_int_0_un3_n \ -DS_000_DMA_1_sqmuxa lds_000_int_0_un1_n N_4 DTACK_c lds_000_int_0_un0_n \ -AS_000_DMA_1_sqmuxa ds_000_enable_0_un3_n un1_rst_2 ds_000_enable_0_un1_n \ -ds_000_enable_0_un0_n N_199 VPA_c ipl_030_0_2__un3_n \ -pos_clk_un13_bgack_030_int_n ipl_030_0_2__un1_n N_205 ipl_030_0_2__un0_n \ -pos_clk_un13_clk_out_int_n RST_c vma_int_0_un3_n pos_clk_un15_bgack_030_int_n \ -vma_int_0_un1_n pos_clk_un3_n RESET_c vma_int_0_un0_n \ -pos_clk_un12_clk_out_int_n cpu_est_0_1__un3_n pos_clk_un1_bgack_030_int_n RW_c \ -cpu_est_0_1__un1_n DS_000_DMA_0_sqmuxa cpu_est_0_1__un0_n un1_rst_3 fc_c_0__n \ -cpu_est_0_2__un3_n cpu_est_0_2__un1_n fc_c_1__n cpu_est_0_2__un0_n \ -cpu_est_0_3__un3_n pos_clk_un4_rw_000_n cpu_est_0_3__un1_n N_7 \ -AMIGA_BUS_DATA_DIR_c cpu_est_0_3__un0_n pos_clk_un6_bgack_000_n \ -pos_clk_un31_clk_000_ne_1_i_m2_un3_n pos_clk_un4_bgack_000_n \ -pos_clk_un31_clk_000_ne_1_i_m2_un1_n N_265_2 \ -pos_clk_un31_clk_000_ne_1_i_m2_un0_n N_111 bgack_030_int_0_un3_n N_109 \ -BG_030_c_i bgack_030_int_0_un1_n N_113 pos_clk_un6_bg_030_i_n \ -bgack_030_int_0_un0_n N_112 pos_clk_un9_bg_030_0_n ds_000_dma_0_un3_n N_98 \ -UDS_000_INT_i ds_000_dma_0_un1_n pos_clk_un29_clk_000_ne_1_n un1_UDS_000_INT_0 \ -ds_000_dma_0_un0_n N_87 LDS_000_INT_i as_000_dma_0_un3_n N_270 \ -un1_LDS_000_INT_0 as_000_dma_0_un1_n N_134 N_23_i as_000_dma_0_un0_n N_125 \ -N_30_0 size_dma_0_1__un3_n N_124 N_20_i size_dma_0_1__un1_n N_121 N_33_0 \ -size_dma_0_1__un0_n N_120 N_13_i size_dma_0_0__un3_n N_137 N_40_0 \ -size_dma_0_0__un1_n pos_clk_un31_clk_000_ne_n ipl_c_i_2__n size_dma_0_0__un0_n \ -N_17 N_51_0 amiga_bus_enable_dma_high_0_un3_n pos_clk_un9_clk_000_pe_n N_26_i \ -amiga_bus_enable_dma_high_0_un1_n cpu_est_2_1__n N_29_0 \ -amiga_bus_enable_dma_high_0_un0_n cpu_est_2_2__n a_c_i_0__n \ -amiga_bus_enable_dma_low_0_un3_n N_261 size_c_i_1__n \ -amiga_bus_enable_dma_low_0_un1_n N_262 pos_clk_un10_sm_amiga_i_n \ -amiga_bus_enable_dma_low_0_un0_n N_251 DS_000_ENABLE_0_sqmuxa_1_i \ -a0_dma_0_un3_n N_252 un1_DS_000_ENABLE_0_sqmuxa_i a0_dma_0_un1_n N_258 N_157_i \ -a0_dma_0_un0_n N_257 N_160_0 rw_000_dma_0_un3_n DS_000_ENABLE_1_sqmuxa N_161_0 \ -rw_000_dma_0_un1_n un1_DS_000_ENABLE_0_sqmuxa N_162_0 rw_000_dma_0_un0_n N_102 \ -N_165_i ipl_030_0_0__un3_n N_118 ipl_030_0_0__un1_n N_119 N_167_i \ -ipl_030_0_0__un0_n N_264 N_166_i ipl_030_0_1__un3_n DS_000_ENABLE_0_sqmuxa_1 \ -ipl_030_0_1__un1_n N_164 N_168_i ipl_030_0_1__un0_n N_170 \ -as_030_000_sync_0_un3_n N_168 N_170_i as_030_000_sync_0_un1_n N_166 \ -as_030_000_sync_0_un0_n N_167 N_164_i rw_000_int_0_un3_n N_165 \ -rw_000_int_0_un1_n N_162 N_102_i rw_000_int_0_un0_n N_161 N_264_i \ -a_decode_15__n N_160 N_79_i N_157 N_78_i a_decode_14__n N_26 N_119_i N_13 \ -N_118_i a_decode_13__n N_20 N_23 N_255_i a_decode_12__n N_8 N_257_i \ -pos_clk_un9_bg_030_n cpu_est_2_0_2__n a_decode_11__n \ -un1_amiga_bus_enable_low_i N_258_i un21_fpu_cs_i N_259_i a_decode_10__n \ -sm_amiga_i_2__n cpu_est_2_0_1__n sm_amiga_i_1__n N_262_i a_decode_9__n \ -sm_amiga_i_3__n N_261_i sm_amiga_i_4__n pos_clk_un9_clk_000_pe_0_n \ -a_decode_8__n sm_amiga_i_6__n N_251_i sm_amiga_i_5__n N_252_0 a_decode_7__n \ -clk_000_d_i_0__n N_76_i AS_000_INT_i N_17_i a_decode_6__n sm_amiga_i_i_7__n \ -N_36_0 AS_030_i N_98_i a_decode_5__n cpu_est_i_2__n \ -pos_clk_un31_clk_000_ne_i_n cpu_est_i_0__n N_228_i a_decode_4__n \ -cpu_est_i_3__n N_121_i cpu_est_i_1__n N_120_i a_decode_3__n AS_030.OE \ -AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE \ -AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE \ -AHIGH_31_.OE A_0_.OE BERR.OE DTACK.OE RW.OE DS_030.OE DSACK1.OE CIIN.OE G_122 \ -G_123 G_124 cpu_est_0_0_ G_97 G_95 G_101 G_103 -.names N_152_i_1.BLIF RST_c.BLIF SM_AMIGA_i_7_.D +inst_AMIGA_DS.D inst_AMIGA_DS.C inst_A0_DMA.D inst_A0_DMA.C inst_RW_000_DMA.D \ +inst_RW_000_DMA.C inst_AS_030_D0.D inst_AS_030_D0.C \ +inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AMIGA_BUS_ENABLE_DMA_LOW.C \ +inst_AS_030_D1.D inst_AS_030_D1.C inst_UDS_000_INT.D inst_UDS_000_INT.C \ +inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C CLK_OUT_INTreg.D \ +CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C \ +inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C SIZE_1_ AHIGH_31_ AS_030 AS_000 \ +RW_000 UDS_000 LDS_000 BERR RW SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ \ +AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ N_23_0 UDS_000_c N_19_i N_22_0 LDS_000_c \ +N_18_i N_21_0 size_c_0__n ipl_c_i_2__n N_43_0 size_c_1__n ipl_c_i_1__n N_42_0 \ +vcc_n_n ahigh_c_24__n ipl_c_i_0__n un5_e N_41_0 gnd_n_n ahigh_c_25__n \ +DTACK_c_i un1_amiga_bus_enable_low N_45_0 un3_as_030 ahigh_c_26__n VPA_c_i \ +un1_UDS_000_INT N_44_0 un1_LDS_000_INT ahigh_c_27__n N_13_i \ +un1_DS_000_ENABLE_0_sqmuxa N_27_0 un10_ciin ahigh_c_28__n LDS_000_INT_i \ +un21_fpu_cs un1_LDS_000_INT_0 un21_berr ahigh_c_29__n UDS_000_INT_i un2_ds_030 \ +un1_UDS_000_INT_0 ahigh_c_30__n N_96_0_1 N_96_0_2 ahigh_c_31__n N_282_0_1 \ +N_282_0_2 N_282_0_3 N_282_0_4 pos_clk_un10_sm_amiga_i_1_n un10_ciin_1 \ +un10_ciin_2 un10_ciin_3 un10_ciin_4 un10_ciin_5 un10_ciin_6 un10_ciin_7 \ +un10_ciin_8 un10_ciin_9 un10_ciin_10 un10_ciin_11 N_201_1 N_201_2 N_131_i_1 \ +N_134_0_1 N_113_i_1 N_113_i_2 N_144_1 pos_clk_ipl_n N_144_2 N_143_1 N_143_2 \ +N_163_1 N_163_2 N_163_3 un21_fpu_cs_1 a_decode_c_16__n un21_berr_1_0 \ +pos_clk_cycle_dma_5_1_1__n a_decode_c_17__n N_199_1 AS_000_DMA_1_sqmuxa_1 \ +a_decode_c_18__n N_140_1 N_66_i_1 a_decode_c_19__n N_66_i_2 N_205_i_1 \ +a_decode_c_20__n N_205_i_2 N_180_1 a_decode_c_21__n N_180_2 \ +pos_clk_un9_clk_000_pe_n N_59_i_1 a_decode_c_22__n N_127_i_1 N_123_i_1 \ +a_decode_c_23__n N_121_i_1 N_119_i_1 N_6 a_c_0__n N_117_i_1 N_115_i_1 a_c_1__n \ +N_111_i_1 N_165_1 N_13 nEXP_SPACE_c N_162_1 N_148_1 N_18 BERR_c \ +pos_clk_ipl_1_n N_19 ds_000_dma_0_un3_n N_20 BG_030_c ds_000_dma_0_un1_n \ +ds_000_dma_0_un0_n as_000_dma_0_un3_n as_000_dma_0_un1_n as_000_dma_0_un0_n \ +BGACK_000_c uds_000_int_0_un3_n uds_000_int_0_un1_n uds_000_int_0_un0_n \ +bg_000_0_un3_n bg_000_0_un1_n bg_000_0_un0_n CLK_OSZI_c lds_000_int_0_un3_n \ +lds_000_int_0_un1_n lds_000_int_0_un0_n as_030_d1_0_un3_n as_030_d1_0_un1_n \ +as_030_d1_0_un0_n FPU_SENSE_c rw_000_int_0_un3_n rw_000_int_0_un1_n \ +rw_000_int_0_un0_n as_030_000_sync_0_un3_n as_030_000_sync_0_un1_n \ +as_030_000_sync_0_un0_n bgack_030_int_0_un3_n bgack_030_int_0_un1_n \ +cpu_est_2_1__n ipl_c_0__n bgack_030_int_0_un0_n cpu_est_2_2__n \ +cpu_est_0_1__un3_n cpu_est_2_3__n ipl_c_1__n cpu_est_0_1__un1_n \ +cpu_est_0_1__un0_n ipl_c_2__n cpu_est_0_2__un3_n cpu_est_0_2__un1_n N_60 \ +cpu_est_0_2__un0_n N_63 DTACK_c cpu_est_0_3__un3_n N_126 cpu_est_0_3__un1_n \ +N_150 cpu_est_0_3__un0_n N_151 ipl_030_0_0__un3_n N_219 VPA_c \ +ipl_030_0_0__un1_n N_175 ipl_030_0_0__un0_n ipl_030_0_1__un3_n N_59 RST_c \ +ipl_030_0_1__un1_n N_68 ipl_030_0_1__un0_n N_72 ipl_030_0_2__un3_n N_80 \ +ipl_030_0_2__un1_n N_93 RW_c ipl_030_0_2__un0_n N_98 ds_000_enable_0_un3_n \ +N_107 fc_c_0__n ds_000_enable_0_un1_n N_128 ds_000_enable_0_un0_n N_131 \ +fc_c_1__n vma_int_0_un3_n N_134 vma_int_0_un1_n N_135 vma_int_0_un0_n N_141 \ +AMIGA_BUS_DATA_DIR_c a_decode_15__n N_142 N_143 a_decode_14__n N_144 N_145 \ +a_decode_13__n N_146 N_205_i N_147 N_140_i a_decode_12__n N_148 AMIGA_DS_i \ +N_149 a_decode_11__n N_154 N_199_i N_155 N_198_i a_decode_10__n N_162 N_180_i \ +N_165 N_262_i a_decode_9__n N_259 AMIGA_BUS_DATA_DIR_c_0 N_260 pos_clk_un2_i_n \ +a_decode_8__n N_181 N_3_i N_182 N_32_0 a_decode_7__n N_183 N_4_i N_184 N_31_0 \ +a_decode_6__n N_185 N_220_i N_186 BG_030_c_i a_decode_5__n N_266 \ +pos_clk_un9_bg_030_0_n N_267 N_17_i a_decode_4__n N_268 N_24_0 N_190 N_16_i \ +a_decode_3__n N_191 N_25_0 N_201 N_15_i a_decode_2__n N_202 N_26_0 N_203 \ +N_12_i N_208 N_28_0 N_163 N_11_i N_282 N_29_0 un21_berr_1 N_5_i N_132 N_30_0 \ +N_96 a_c_i_0__n N_129 size_c_i_1__n un1_SM_AMIGA_0_sqmuxa_1 \ +pos_clk_un10_sm_amiga_i_n N_169 un1_dsack1_i N_170 N_69_i N_167 N_163_i N_168 \ +N_244_0 pos_clk_rw_000_int_5_n N_164_i pos_clk_un6_bgack_000_n N_165_i N_274 \ +un11_amiga_bus_enable_high_i N_164 un10_ciin_i N_244 N_60_0 N_5 N_274_i N_11 \ +pos_clk_un6_bgack_000_0_n N_12 RW_c_i N_15 pos_clk_rw_000_int_5_0_n N_16 \ +N_168_i N_17 N_167_i pos_clk_un9_bg_030_n N_170_i N_3 N_169_i N_205 \ +AS_000_DMA_1_sqmuxa N_38_0 N_4 un1_SM_AMIGA_0_sqmuxa_1_0 N_199 N_282_0 \ +pos_clk_un2_n clk_000_d_i_3__n N_140 N_96_0 N_262 N_129_i N_198 N_268_i N_180 \ +N_246_i un1_amiga_bus_enable_low_i N_132_0 un21_fpu_cs_i AS_000_i N_142_i \ +BGACK_030_INT_i N_141_i nEXP_SPACE_i N_135_0 cycle_dma_i_0__n N_134_0 RW_000_i \ +N_131_i CLK_EXP_i LDS_000_c_i cycle_dma_i_1__n UDS_000_c_i DS_000_DMA_i \ +N_128_i AS_000_DMA_i N_107_i a_i_1__n N_203_i AMIGA_BUS_ENABLE_DMA_LOW_i \ +un1_DS_000_ENABLE_0_sqmuxa_0 a_decode_i_19__n N_201_i a_decode_i_18__n N_202_i \ +a_decode_i_16__n VMA_INT_i AMIGA_BUS_ENABLE_DMA_HIGH_i N_98_i sm_amiga_i_0__n \ +N_93_i sm_amiga_i_5__n N_82_i sm_amiga_i_6__n N_80_i sm_amiga_i_i_7__n N_72_i \ +AS_030_i N_68_i AS_000_INT_i N_59_i DSACK1_INT_i N_190_i sm_amiga_i_1__n \ +N_191_i FPU_SENSE_i AS_030_D1_i N_267_i cpu_est_i_0__n cpu_est_i_3__n N_266_i \ +VPA_D_i sm_amiga_i_3__n N_186_i sm_amiga_i_4__n cpu_est_i_1__n N_185_i \ +clk_000_d_i_0__n clk_000_d_i_1__n N_183_i AS_030_D0_i N_184_i cpu_est_i_2__n \ +DTACK_D0_i N_182_i sm_amiga_i_2__n AS_030_000_SYNC_i N_181_i ahigh_i_30__n \ +ahigh_i_31__n N_260_i ahigh_i_28__n pos_clk_size_dma_6_0_1__n ahigh_i_29__n \ +N_259_i ahigh_i_26__n pos_clk_size_dma_6_0_0__n ahigh_i_27__n N_63_0 \ +ahigh_i_24__n N_155_i ahigh_i_25__n N_162_i N_187_i un5_e_0 N_188_i N_154_i \ +N_189_i cpu_est_2_0_3__n N_149_i N_208_i cpu_est_2_0_2__n N_147_i un2_ds_030_i \ +N_148_i N_219_i cpu_est_2_0_1__n N_175_i N_146_i un3_as_030_i N_36_0 AS_030_c \ +N_145_i N_35_0 AS_000_c N_143_i N_144_i RW_000_c pos_clk_un9_clk_000_pe_0_n \ +N_20_i AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE \ +SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE \ +AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE \ +DSACK1.OE VMA.OE CIIN.OE G_105 G_106 G_107 G_91 +.names N_119_i_1.BLIF RST_c.BLIF SM_AMIGA_4_.D 11 1 -.names N_148_i_1.BLIF RST_c.BLIF SM_AMIGA_6_.D +.names N_117_i_1.BLIF RST_c.BLIF SM_AMIGA_3_.D 11 1 -.names N_146_i_1.BLIF RST_c.BLIF SM_AMIGA_5_.D +.names N_115_i_1.BLIF RST_c.BLIF SM_AMIGA_2_.D 11 1 -.names N_144_i_1.BLIF RST_c.BLIF SM_AMIGA_4_.D +.names N_113_i_1.BLIF N_113_i_2.BLIF SM_AMIGA_1_.D 11 1 -.names N_142_i_1.BLIF RST_c.BLIF SM_AMIGA_3_.D +.names N_111_i_1.BLIF RST_c.BLIF SM_AMIGA_0_.D 11 1 -.names N_140_i_1.BLIF RST_c.BLIF SM_AMIGA_2_.D +.names N_21_0.BLIF IPL_030DFF_0_reg.D +0 1 +.names N_22_0.BLIF IPL_030DFF_1_reg.D +0 1 +.names N_23_0.BLIF IPL_030DFF_2_reg.D +0 1 +.names N_41_0.BLIF IPL_D0_0_.D +0 1 +.names N_42_0.BLIF IPL_D0_1_.D +0 1 +.names N_43_0.BLIF IPL_D0_2_.D +0 1 +.names N_127_i_1.BLIF RST_c.BLIF SM_AMIGA_i_7_.D 11 1 -.names N_138_i_1.BLIF RST_c.BLIF SM_AMIGA_1_.D +.names N_123_i_1.BLIF RST_c.BLIF SM_AMIGA_6_.D 11 1 -.names N_136_i_1.BLIF RST_c.BLIF SM_AMIGA_0_.D +.names N_121_i_1.BLIF RST_c.BLIF SM_AMIGA_5_.D 11 1 +.names pos_clk_size_dma_6_0_0__n.BLIF SIZE_DMA_0_.D +0 1 +.names pos_clk_size_dma_6_0_1__n.BLIF SIZE_DMA_1_.D +0 1 +.names N_66_i_1.BLIF N_66_i_2.BLIF CYCLE_DMA_0_.D +11 1 +.names pos_clk_cycle_dma_5_1_1__n.BLIF G_91.BLIF CYCLE_DMA_1_.D +11 1 +.names N_190_i.BLIF N_191_i.BLIF cpu_est_0_.D +11 1 +.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D +1- 1 +-1 1 .names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D 1- 1 -1 1 .names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_.D 1- 1 -1 1 -.names N_27_0.BLIF IPL_030DFF_0_reg.D +.names N_151.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D 0 1 -.names N_28_0.BLIF IPL_030DFF_1_reg.D +.names N_44_0.BLIF inst_VPA_D.D 0 1 -.names N_29_0.BLIF IPL_030DFF_2_reg.D +.names N_45_0.BLIF inst_DTACK_D0.D 0 1 -.names N_49_0.BLIF IPL_D0_0_.D -0 1 -.names N_50_0.BLIF IPL_D0_1_.D -0 1 -.names N_51_0.BLIF IPL_D0_2_.D -0 1 -.names G_95.BLIF un1_rst_2.BLIF CYCLE_DMA_0_.D +.names N_6.BLIF RST_c.BLIF inst_DS_000_ENABLE.D 11 1 -.names G_97.BLIF un1_rst_2.BLIF CYCLE_DMA_1_.D +.names N_25_0.BLIF BG_000DFFreg.D +0 1 +.names N_26_0.BLIF inst_LDS_000_INT.D +0 1 +.names N_27_0.BLIF inst_VMA_INTreg.D +0 1 +.names N_28_0.BLIF inst_RW_000_INT.D +0 1 +.names N_29_0.BLIF inst_AS_030_000_SYNC.D +0 1 +.names N_30_0.BLIF inst_BGACK_030_INTreg.D +0 1 +.names N_31_0.BLIF inst_AS_000_DMA.D +0 1 +.names N_32_0.BLIF inst_DS_000_DMA.D +0 1 +.names N_167_i.BLIF N_168_i.BLIF inst_DSACK1_INT.D 11 1 -.names G_101.BLIF un1_rst_3.BLIF CLK_030_PE_0_.D +.names N_169_i.BLIF N_170_i.BLIF inst_AS_000_INT.D 11 1 -.names G_103.BLIF un1_rst_3.BLIF CLK_030_PE_1_.D -11 1 -.names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D +.names N_35_0.BLIF inst_AMIGA_DS.D +0 1 +.names N_36_0.BLIF inst_A0_DMA.D +0 1 +.names N_126.BLIF inst_RW_000_DMA.D +0 1 +.names N_38_0.BLIF inst_AS_030_D0.D +0 1 +.names N_150.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D +0 1 +.names as_030_d1_0_un1_n.BLIF as_030_d1_0_un0_n.BLIF inst_AS_030_D1.D 1- 1 -1 1 -.names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D -1- 1 --1 1 -.names cpu_est_0_0_.BLIF cpu_est_0_.D +.names N_24_0.BLIF inst_UDS_000_INT.D 0 1 -.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D -1- 1 --1 1 -.names N_267_i_1.BLIF RST_c.BLIF RST_DLY_0_.D -11 1 -.names N_266_i_1.BLIF N_266_i_2.BLIF RST_DLY_1_.D -11 1 -.names N_265_i_1.BLIF N_265_2_0.BLIF RST_DLY_2_.D -11 1 -.names N_43_0.BLIF inst_DS_000_DMA.D -0 1 -.names N_120_i.BLIF N_121_i.BLIF inst_DSACK1_INT.D -11 1 -.names N_118_i.BLIF N_119_i.BLIF inst_AS_000_INT.D -11 1 -.names N_46_0.BLIF inst_AMIGA_DS.D -0 1 -.names N_274.BLIF inst_AS_030_D0.D -0 1 -.names N_48_0.BLIF inst_DTACK_D0.D -0 1 -.names N_52_0.BLIF inst_VPA_D.D -0 1 -.names N_53_0.BLIF inst_RESET_OUT.D -0 1 -.names N_8.BLIF RST_c.BLIF inst_DS_000_ENABLE.D -11 1 -.names N_30_0.BLIF BG_000DFFreg.D -0 1 -.names N_31_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D -0 1 -.names N_32_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D -0 1 -.names N_33_0.BLIF inst_UDS_000_INT.D -0 1 -.names N_34_0.BLIF inst_A0_DMA.D -0 1 -.names N_35_0.BLIF inst_RW_000_DMA.D -0 1 -.names N_36_0.BLIF inst_VMA_INTreg.D -0 1 -.names N_38_0.BLIF inst_RW_000_INT.D -0 1 -.names N_39_0.BLIF inst_AS_030_000_SYNC.D -0 1 -.names N_40_0.BLIF inst_LDS_000_INT.D -0 1 -.names N_41_0.BLIF inst_BGACK_030_INTreg.D -0 1 -.names N_42_0.BLIF inst_AS_000_DMA.D -0 1 -.names un1_rst_2_1.BLIF inst_BGACK_030_INT_D.D +.names N_220_i.BLIF inst_BGACK_030_INT_D.D 0 1 .names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D 0 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_1__n -0 1 -.names inst_VPA_D.BLIF VPA_D_i -0 1 -.names N_125.BLIF N_125_i -0 1 -.names inst_VMA_INTreg.BLIF VMA_INT_i -0 1 -.names N_124.BLIF N_124_i -0 1 -.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n -0 1 -.names N_124_i.BLIF N_125_i.BLIF N_53_0 +.names N_20_i.BLIF RST_c.BLIF N_23_0 11 1 -.names RST_DLY_2_.BLIF rst_dly_i_2__n +.names N_19.BLIF N_19_i 0 1 -.names N_134.BLIF N_134_i -0 1 -.names RST_DLY_1_.BLIF rst_dly_i_1__n -0 1 -.names N_134_i.BLIF RST_c.BLIF N_270_0 +.names N_19_i.BLIF RST_c.BLIF N_22_0 11 1 -.names RST_DLY_0_.BLIF rst_dly_i_0__n +.names N_18.BLIF N_18_i 0 1 -.names RST_DLY_0_.BLIF RST_DLY_1_.BLIF N_77_i +.names N_18_i.BLIF RST_c.BLIF N_21_0 11 1 -.names inst_DSACK1_INT.BLIF DSACK1_INT_i +.names ipl_c_2__n.BLIF ipl_c_i_2__n 0 1 -.names N_76_i.BLIF SM_AMIGA_1_.BLIF N_87_i +.names ipl_c_i_2__n.BLIF RST_c.BLIF N_43_0 11 1 -.names N_137.BLIF N_137_i_0 -0 1 -.names N_112.BLIF N_112_i +.names ipl_c_1__n.BLIF ipl_c_i_1__n 0 1 +.names ipl_c_i_1__n.BLIF RST_c.BLIF N_42_0 +11 1 .names vcc_n_n 1 -.names inst_DTACK_D0.BLIF DTACK_D0_i +.names ipl_c_0__n.BLIF ipl_c_i_0__n 0 1 -.names N_113.BLIF N_113_i -0 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i -0 1 -.names N_114.BLIF N_114_i +.names un5_e_0.BLIF un5_e 0 1 +.names ipl_c_i_0__n.BLIF RST_c.BLIF N_41_0 +11 1 .names gnd_n_n -.names nEXP_SPACE_c.BLIF nEXP_SPACE_i +.names DTACK_c.BLIF DTACK_c_i 0 1 .names AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF BGACK_030_INT_i.BLIF \ un1_amiga_bus_enable_low 11 1 -.names inst_AS_000_DMA.BLIF AS_000_DMA_i -0 1 -.names N_109.BLIF N_109_i -0 1 -.names AS_000_DMA_i.BLIF AS_000_i.BLIF un7_as_030 +.names DTACK_c_i.BLIF RST_c.BLIF N_45_0 11 1 -.names RW_000_c.BLIF RW_000_i -0 1 -.names N_108.BLIF N_108_i -0 1 -.names un1_LDS_000_INT_0.BLIF un1_LDS_000_INT -0 1 -.names CLK_030_PE_1_.BLIF clk_030_pe_i_1__n -0 1 -.names N_111.BLIF N_111_i +.names AS_000_DMA_i.BLIF AS_000_i.BLIF un3_as_030 +11 1 +.names VPA_c.BLIF VPA_c_i 0 1 .names un1_UDS_000_INT_0.BLIF un1_UDS_000_INT 0 1 -.names DS_000_DMA_0_sqmuxa.BLIF DS_000_DMA_0_sqmuxa_i -0 1 -.names N_111_i.BLIF RST_c.BLIF N_265_2_0 +.names RST_c.BLIF VPA_c_i.BLIF N_44_0 11 1 -.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 +.names un1_LDS_000_INT_0.BLIF un1_LDS_000_INT 0 1 -.names pos_clk_un4_rw_000_n.BLIF pos_clk_un4_rw_000_i_n +.names N_13.BLIF N_13_i 0 1 +.names un1_DS_000_ENABLE_0_sqmuxa_0.BLIF un1_DS_000_ENABLE_0_sqmuxa +0 1 +.names N_13_i.BLIF RST_c.BLIF N_27_0 +11 1 .names un10_ciin_10.BLIF un10_ciin_11.BLIF un10_ciin 11 1 -.names AS_000_c.BLIF AS_000_i +.names inst_LDS_000_INT.BLIF LDS_000_INT_i 0 1 -.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF un1_as_000_i +.names un21_fpu_cs_1.BLIF N_282_0.BLIF un21_fpu_cs 11 1 -.names un21_fpu_cs_1.BLIF FPU_SENSE_i.BLIF un21_fpu_cs +.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un1_LDS_000_INT_0 11 1 -.names inst_AMIGA_DS.BLIF AMIGA_DS_i -0 1 -.names VPA_c.BLIF VPA_c_i -0 1 -.names un21_berr_1.BLIF FPU_SENSE_c.BLIF un21_berr +.names un21_berr_1_0.BLIF N_282_0.BLIF un21_berr 11 1 -.names pos_clk_un3_clk_out_int_n.BLIF pos_clk_un3_clk_out_int_i_n +.names inst_UDS_000_INT.BLIF UDS_000_INT_i 0 1 -.names RST_c.BLIF VPA_c_i.BLIF N_52_0 +.names AS_000_i.BLIF DS_000_DMA_i.BLIF un2_ds_030 11 1 -.names AS_000_i.BLIF DS_000_DMA_i.BLIF un6_ds_030 +.names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un1_UDS_000_INT_0 11 1 -.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n -0 1 -.names DTACK_c.BLIF DTACK_c_i -0 1 -.names nEXP_SPACE_i.BLIF un10_ciin_i.BLIF un13_ciin +.names AS_030_000_SYNC_i.BLIF CLK_000_D_4_.BLIF N_96_0_1 11 1 -.names CYCLE_DMA_1_.BLIF cycle_dma_i_1__n -0 1 -.names DTACK_c_i.BLIF RST_c.BLIF N_48_0 +.names clk_000_d_i_3__n.BLIF nEXP_SPACE_c.BLIF N_96_0_2 11 1 -.names pos_clk_as_000_dma6_n.BLIF pos_clk_as_000_dma6_i_n -0 1 -.names N_276.BLIF RESET_c.BLIF un3_ahigh_i +.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_282_0_1 11 1 -.names inst_DS_000_DMA.BLIF DS_000_DMA_i -0 1 -.names pos_clk_un4_bgack_000_n.BLIF pos_clk_un4_bgack_000_i_n -0 1 -.names CLK_OUT_INTreg.BLIF CLK_EXP_i -0 1 -.names BGACK_000_c.BLIF pos_clk_un4_bgack_000_i_n.BLIF \ -pos_clk_un6_bgack_000_0_n +.names a_decode_c_17__n.BLIF a_decode_i_16__n.BLIF N_282_0_2 11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i -0 1 -.names N_7.BLIF N_7_i -0 1 -.names ahigh_c_25__n.BLIF ahigh_i_25__n -0 1 -.names N_7_i.BLIF RST_c.BLIF N_41_0 +.names a_decode_i_18__n.BLIF a_decode_i_19__n.BLIF N_282_0_3 11 1 -.names ahigh_c_24__n.BLIF ahigh_i_24__n -0 1 -.names RW_000_i.BLIF pos_clk_un15_bgack_030_int_i_n.BLIF \ -pos_clk_un1_bgack_030_int_0_n -11 1 -.names ahigh_c_27__n.BLIF ahigh_i_27__n -0 1 -.names CLK_030_PE_0_.BLIF CLK_030_PE_1_.BLIF pos_clk_un12_clk_out_int_0_n -11 1 -.names ahigh_c_26__n.BLIF ahigh_i_26__n -0 1 -.names cycle_dma_i_0__n.BLIF cycle_dma_i_1__n.BLIF pos_clk_un3_0_n -11 1 -.names ahigh_c_29__n.BLIF ahigh_i_29__n -0 1 -.names CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF pos_clk_un15_bgack_030_int_i_n -11 1 -.names ahigh_c_28__n.BLIF ahigh_i_28__n -0 1 -.names N_3.BLIF N_3_i -0 1 -.names ahigh_c_31__n.BLIF ahigh_i_31__n -0 1 -.names N_3_i.BLIF RST_c.BLIF N_43_0 -11 1 -.names ahigh_c_30__n.BLIF ahigh_i_30__n -0 1 -.names N_4.BLIF N_4_i -0 1 -.names a_c_1__n.BLIF a_i_1__n -0 1 -.names N_4_i.BLIF RST_c.BLIF N_42_0 -11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i -0 1 -.names un6_amiga_bus_data_dir.BLIF un6_amiga_bus_data_dir_i -0 1 -.names inst_AS_030_D0.BLIF AS_030_D0_i -0 1 -.names un12_amiga_bus_data_dir_m.BLIF un12_amiga_bus_data_dir_m_i -0 1 -.names un10_ciin.BLIF un10_ciin_i -0 1 -.names un6_amiga_bus_data_dir_i.BLIF un12_amiga_bus_data_dir_m_i.BLIF \ -AMIGA_BUS_DATA_DIR_c_0 -11 1 -.names FPU_SENSE_c.BLIF FPU_SENSE_i -0 1 -.names N_22.BLIF N_22_i -0 1 -.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i -0 1 -.names N_22_i.BLIF RST_c.BLIF N_31_0 -11 1 -.names a_decode_c_16__n.BLIF a_decode_i_16__n -0 1 -.names N_21.BLIF N_21_i -0 1 -.names a_decode_c_18__n.BLIF a_decode_i_18__n -0 1 -.names N_21_i.BLIF RST_c.BLIF N_32_0 -11 1 -.names a_decode_c_19__n.BLIF a_decode_i_19__n -0 1 -.names N_19.BLIF N_19_i -0 1 -.names G_122.BLIF N_224_i -0 1 -.names N_19_i.BLIF RST_c.BLIF N_34_0 -11 1 -.names G_123.BLIF N_225_i -0 1 -.names N_18.BLIF N_18_i -0 1 -.names G_124.BLIF N_226_i -0 1 -.names N_18_i.BLIF RST_c.BLIF N_35_0 -11 1 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -pos_clk_un5_bgack_030_int_d_i_n -11 1 -.names a_i_1__n.BLIF BGACK_030_INT_i.BLIF \ -pos_clk_amiga_bus_enable_dma_high_3_0_n -11 1 -.names pos_clk_un6_bg_030_1_n.BLIF CLK_000_D_0_.BLIF pos_clk_un6_bg_030_n -11 1 -.names a_c_1__n.BLIF BGACK_030_INT_i.BLIF \ -pos_clk_amiga_bus_enable_dma_low_3_0_n -11 1 -.names pos_clk_ipl_1_n.BLIF N_225_i.BLIF pos_clk_ipl_n -11 1 -.names BGACK_030_INT_i.BLIF RW_000_i.BLIF pos_clk_rw_000_dma_3_0_n -11 1 -.names un13_ciin.BLIF un13_ciin_i -0 1 -.names UDS_000_c.BLIF UDS_000_c_i -0 1 -.names un6_ds_030.BLIF un6_ds_030_i -0 1 -.names LDS_000_c.BLIF LDS_000_c_i -0 1 -.names N_123.BLIF N_123_i -0 1 -.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_86_i -11 1 -.names N_122.BLIF N_122_i -0 1 -.names N_129.BLIF N_129_i -0 1 -.names un7_as_030.BLIF un7_as_030_i -0 1 -.names N_130.BLIF N_130_i -0 1 -.names N_129_i.BLIF N_130_i.BLIF un11_amiga_bus_enable_high_i -11 1 -.names N_117.BLIF N_117_i -0 1 -.names N_117_i.BLIF RST_c.BLIF N_46_0 -11 1 -.names N_107.BLIF N_107_i -0 1 -.names N_107_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n -11 1 -.names N_106.BLIF N_106_i -0 1 -.names N_106_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n -11 1 -.names N_16.BLIF N_16_i -0 1 -.names N_254.BLIF N_254_i -0 1 -.names N_263.BLIF N_263_i -0 1 -.names N_250_i_1.BLIF N_263_i.BLIF N_250_i -11 1 -.names N_256.BLIF N_256_i -0 1 -.names N_189_i_1.BLIF N_263_i.BLIF N_189_i -11 1 -.names pos_clk_rw_000_int_5_0_n.BLIF pos_clk_rw_000_int_5_n -0 1 -.names N_101.BLIF N_101_i -0 1 -.names N_103.BLIF N_103_i -0 1 -.names N_104.BLIF N_104_i -0 1 -.names N_105.BLIF N_105_i -0 1 -.names N_115.BLIF N_115_i -0 1 -.names N_116.BLIF N_116_i -0 1 -.names N_131.BLIF N_131_i -0 1 -.names N_277.BLIF N_277_i -0 1 -.names N_131_i.BLIF N_277_i.BLIF N_64_0 -11 1 -.names N_91_0_3.BLIF nEXP_SPACE_c.BLIF N_91_0 -11 1 -.names N_104_i.BLIF SM_AMIGA_i_7_.BLIF N_159_0 -11 1 -.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_14 -1- 1 --1 1 -.names N_85_i_1.BLIF N_85_i_2.BLIF N_85_i -11 1 -.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_15 -1- 1 --1 1 -.names N_79.BLIF N_159_0.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 -11 1 -.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_24 -1- 1 --1 1 -.names RW_c.BLIF RW_c_i -0 1 -.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF N_25 -1- 1 --1 1 -.names N_159_0.BLIF RW_c_i.BLIF pos_clk_rw_000_int_5_0_n -11 1 -.names CLK_000_D_3_.BLIF clk_000_d_i_3__n -0 1 -.names N_25.BLIF N_25_i -0 1 -.names N_25_i.BLIF RST_c.BLIF N_28_0 -11 1 -.names N_24.BLIF N_24_i -0 1 -.names N_24_i.BLIF RST_c.BLIF N_27_0 -11 1 -.names ipl_c_1__n.BLIF ipl_c_i_1__n -0 1 -.names ipl_c_i_1__n.BLIF RST_c.BLIF N_50_0 -11 1 -.names ipl_c_0__n.BLIF ipl_c_i_0__n -0 1 -.names ipl_c_i_0__n.BLIF RST_c.BLIF N_49_0 -11 1 -.names N_14.BLIF N_14_i -0 1 -.names N_14_i.BLIF RST_c.BLIF N_39_0 -11 1 -.names N_15.BLIF N_15_i -0 1 -.names N_15_i.BLIF RST_c.BLIF N_38_0 -11 1 -.names inst_BGACK_030_INT_D.BLIF inst_BGACK_030_INTreg.BLIF N_91_0_1 -11 1 -.names AS_030_D0_i.BLIF sm_amiga_i_i_7__n.BLIF N_91_0_2 -11 1 -.names N_91_0_1.BLIF N_91_0_2.BLIF N_91_0_3 -11 1 -.names N_108_i.BLIF N_109_i.BLIF N_265_i_1 -11 1 -.names N_112_i.BLIF RST_c.BLIF N_266_i_1 -11 1 -.names N_113_i.BLIF N_114_i.BLIF N_266_i_2 -11 1 -.names N_164_i.BLIF N_264.BLIF N_138_i_1 -11 1 -.names N_79.BLIF N_170_i.BLIF N_148_i_1 -11 1 -.names N_78.BLIF N_168_i.BLIF N_144_i_1 -11 1 -.names N_166_i.BLIF N_167_i.BLIF N_142_i_1 -11 1 -.names N_165_i.BLIF N_264_i.BLIF N_140_i_1 +.names N_282_0_1.BLIF N_282_0_2.BLIF N_282_0_4 11 1 .names size_c_0__n.BLIF a_c_i_0__n.BLIF pos_clk_un10_sm_amiga_i_1_n 11 1 -.names N_76_i.BLIF N_76 -0 1 -.names AS_030_000_SYNC_i.BLIF nEXP_SPACE_c.BLIF N_85_i_1 -11 1 -.names CLK_000_D_4_.BLIF clk_000_d_i_3__n.BLIF N_85_i_2 -11 1 -.names AS_030_i.BLIF a_decode_c_17__n.BLIF N_277_1 -11 1 -.names a_decode_i_16__n.BLIF a_decode_i_18__n.BLIF N_277_2 -11 1 -.names BGACK_030_INT_i.BLIF RST_c.BLIF un1_rst_2_1 -11 1 -.names fc_c_1__n.BLIF a_decode_i_19__n.BLIF N_277_3 -11 1 -.names N_277_1.BLIF N_277_2.BLIF N_277_4 -11 1 -.names N_64_0.BLIF N_64 -0 1 -.names N_277_3.BLIF fc_c_0__n.BLIF N_277_5 -11 1 -.names AS_000_INT_i.BLIF AS_030_i.BLIF N_122 -11 1 .names ahigh_i_24__n.BLIF ahigh_i_25__n.BLIF un10_ciin_1 11 1 -.names AS_030_i.BLIF DSACK1_INT_i.BLIF N_123 -11 1 .names ahigh_i_26__n.BLIF ahigh_i_27__n.BLIF un10_ciin_2 11 1 -.names N_276.BLIF inst_RESET_OUT.BLIF N_132 -11 1 .names ahigh_i_28__n.BLIF ahigh_i_29__n.BLIF un10_ciin_3 11 1 -.names BGACK_030_INT_i.BLIF inst_RESET_OUT.BLIF N_133 -11 1 .names ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF un10_ciin_4 11 1 -.names AS_030_i.BLIF RST_c.BLIF N_274 -11 1 .names a_decode_c_23__n.BLIF AS_030_D0_i.BLIF un10_ciin_5 11 1 -.names BGACK_030_INT_i.BLIF nEXP_SPACE_i.BLIF N_276 -11 1 .names a_decode_c_20__n.BLIF a_decode_c_21__n.BLIF un10_ciin_6 11 1 -.names N_77_i.BLIF N_77 -0 1 .names un10_ciin_1.BLIF un10_ciin_2.BLIF un10_ciin_7 11 1 -.names N_79_i.BLIF N_79 -0 1 .names un10_ciin_3.BLIF un10_ciin_4.BLIF un10_ciin_8 11 1 -.names N_78_i.BLIF N_78 -0 1 .names un10_ciin_5.BLIF un10_ciin_6.BLIF un10_ciin_9 11 1 -.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_263 -11 1 .names un10_ciin_7.BLIF un10_ciin_8.BLIF un10_ciin_10 11 1 -.names N_108_1.BLIF rst_dly_i_2__n.BLIF N_108 -11 1 .names un10_ciin_9.BLIF a_decode_c_22__n.BLIF un10_ciin_11 11 1 -.names N_114_1.BLIF rst_dly_i_1__n.BLIF N_114 +.names N_80_i.BLIF N_82_i.BLIF N_201_1 11 1 -.names AS_000_i.BLIF BGACK_030_INT_i.BLIF un6_amiga_bus_data_dir_1 +.names VMA_INT_i.BLIF VPA_D_i.BLIF N_201_2 11 1 -.names N_85_i.BLIF N_85 +.names BERR_c.BLIF N_201_i.BLIF N_131_i_1 +11 1 +.names N_68_i.BLIF N_131.BLIF N_134_0_1 +11 1 +.names N_68.BLIF N_141_i.BLIF N_113_i_1 +11 1 +.names N_142_i.BLIF RST_c.BLIF N_113_i_2 +11 1 +.names N_68_i.BLIF N_208.BLIF N_144_1 +11 1 +.names pos_clk_ipl_1_n.BLIF N_188_i.BLIF pos_clk_ipl_n +11 1 +.names VPA_D_i.BLIF cpu_est_i_3__n.BLIF N_144_2 +11 1 +.names N_72_i.BLIF N_82_i.BLIF N_143_1 +11 1 +.names cpu_est_i_0__n.BLIF cpu_est_i_3__n.BLIF N_143_2 +11 1 +.names AS_030_D1_i.BLIF inst_BGACK_030_INT_D.BLIF N_163_1 +11 1 +.names N_282.BLIF sm_amiga_i_i_7__n.BLIF N_163_2 +11 1 +.names N_163_1.BLIF N_163_2.BLIF N_163_3 +11 1 +.names un21_berr_1.BLIF FPU_SENSE_i.BLIF un21_fpu_cs_1 +11 1 +.names un21_berr_1.BLIF FPU_SENSE_c.BLIF un21_berr_1_0 +11 1 +.names AS_000_i.BLIF N_220_i.BLIF pos_clk_cycle_dma_5_1_1__n +11 1 +.names N_68_i.BLIF CYCLE_DMA_0_.BLIF N_199_1 +11 1 +.names CLK_EXP_i.BLIF inst_CLK_OUT_PRE_D.BLIF AS_000_DMA_1_sqmuxa_1 +11 1 +.names CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF N_140_1 +11 1 +.names AS_000_i.BLIF N_198_i.BLIF N_66_i_1 +11 1 +.names N_199_i.BLIF N_220_i.BLIF N_66_i_2 +11 1 +.names AMIGA_DS_i.BLIF AS_000_i.BLIF N_205_i_1 +11 1 +.names N_140_i.BLIF pos_clk_un2_n.BLIF N_205_i_2 +11 1 +.names AS_000_i.BLIF BGACK_030_INT_i.BLIF N_180_1 +11 1 +.names RW_000_c.BLIF nEXP_SPACE_i.BLIF N_180_2 +11 1 +.names pos_clk_un9_clk_000_pe_0_n.BLIF pos_clk_un9_clk_000_pe_n 0 1 -.names RW_000_c.BLIF nEXP_SPACE_i.BLIF un6_amiga_bus_data_dir_2 +.names inst_AS_030_D0.BLIF CLK_000_D_0_.BLIF N_59_i_1 11 1 -.names N_78_i.BLIF SM_AMIGA_0_.BLIF N_104 +.names N_267_i.BLIF N_268_i.BLIF N_127_i_1 11 1 -.names AMIGA_DS_i.BLIF AS_000_i.BLIF pos_clk_as_000_dma6_1_n +.names N_93.BLIF N_266_i.BLIF N_123_i_1 11 1 -.names N_91_0.BLIF N_91 -0 1 -.names pos_clk_un1_bgack_030_int_n.BLIF pos_clk_un3_n.BLIF \ -pos_clk_as_000_dma6_2_n +.names N_68.BLIF N_186_i.BLIF N_121_i_1 11 1 -.names AS_030_i.BLIF N_91.BLIF N_131 +.names N_72.BLIF N_185_i.BLIF N_119_i_1 11 1 -.names DS_000_DMA_0_sqmuxa_i.BLIF pos_clk_as_000_dma6_n.BLIF \ -DS_000_DMA_1_sqmuxa_1 -11 1 -.names N_277_4.BLIF N_277_5.BLIF N_277 -11 1 -.names CLK_030_PE_0_.BLIF clk_030_pe_i_1__n.BLIF pos_clk_un4_rw_000_1_n -11 1 -.names N_130_1.BLIF AS_030_i.BLIF N_130 -11 1 -.names CLK_030_c.BLIF RW_000_i.BLIF pos_clk_un4_rw_000_2_n -11 1 -.names N_270.BLIF RST_DLY_0_.BLIF N_115 -11 1 -.names pos_clk_un12_clk_out_int_n.BLIF AS_000_DMA_i.BLIF \ -pos_clk_un13_clk_out_int_1_n -11 1 -.names N_116_1.BLIF RST_c.BLIF N_116 -11 1 -.names N_76_i.BLIF N_137.BLIF N_125_1 -11 1 -.names N_79.BLIF sm_amiga_i_5__n.BLIF N_105 -11 1 -.names N_76.BLIF rst_dly_i_0__n.BLIF N_116_1 -11 1 -.names N_85.BLIF sm_amiga_i_i_7__n.BLIF N_103 -11 1 -.names cpu_est_i_2__n.BLIF VMA_INT_i.BLIF pos_clk_un29_clk_000_ne_1_1_n -11 1 -.names N_87.BLIF sm_amiga_i_0__n.BLIF N_101 -11 1 -.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF pos_clk_un29_clk_000_ne_1_2_n -11 1 -.names N_259_1.BLIF cpu_est_i_3__n.BLIF N_259 -11 1 -.names pos_clk_un29_clk_000_ne_1_1_n.BLIF pos_clk_un29_clk_000_ne_1_2_n.BLIF \ -pos_clk_un29_clk_000_ne_1_3_n -11 1 -.names N_251.BLIF cpu_est_2_.BLIF N_255 -11 1 -.names N_78_i.BLIF N_263.BLIF N_261_1 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_2__n.BLIF N_256 -11 1 -.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_261_2 -11 1 -.names N_252.BLIF cpu_est_2_.BLIF N_254 -11 1 -.names N_76_i.BLIF N_251_i.BLIF N_262_1 -11 1 -.names cpu_est_1_.BLIF cpu_est_i_2__n.BLIF N_16 -11 1 -.names N_263.BLIF VPA_D_i.BLIF N_262_2 -11 1 -.names BGACK_030_INT_i.BLIF N_86_i.BLIF N_106 -11 1 -.names N_78_i.BLIF RW_c.BLIF DS_000_ENABLE_0_sqmuxa_1_1 -11 1 -.names N_86_i.BLIF N_86 -0 1 -.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_259_1 -11 1 -.names BGACK_030_INT_i.BLIF N_86.BLIF N_107 -11 1 -.names N_16_i.BLIF N_254_i.BLIF N_250_i_1 -11 1 -.names LDS_000_c.BLIF UDS_000_c.BLIF N_117 -11 1 -.names N_255_i.BLIF N_256_i.BLIF N_189_i_1 -11 1 -.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF pos_clk_a0_dma_3_n -11 1 -.names nEXP_SPACE_c.BLIF inst_AS_030_D0.BLIF pos_clk_un6_bg_030_1_n -11 1 -.names AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF BGACK_030_INT_i.BLIF N_129 -11 1 -.names N_77.BLIF N_228_i.BLIF N_108_1 -11 1 -.names pos_clk_size_dma_6_0_1__n.BLIF pos_clk_size_dma_6_1__n -0 1 -.names N_228_i.BLIF rst_dly_i_0__n.BLIF N_114_1 -11 1 -.names pos_clk_size_dma_6_0_0__n.BLIF pos_clk_size_dma_6_0__n -0 1 -.names N_277.BLIF BGACK_000_c.BLIF un21_berr_1 -11 1 -.names pos_clk_rw_000_dma_3_0_n.BLIF pos_clk_rw_000_dma_3_n -0 1 -.names N_277.BLIF BGACK_000_c.BLIF un21_fpu_cs_1 -11 1 -.names pos_clk_amiga_bus_enable_dma_low_3_0_n.BLIF \ -pos_clk_amiga_bus_enable_dma_low_3_n -0 1 -.names inst_BGACK_030_INTreg.BLIF AS_030_000_SYNC_i.BLIF N_130_1 -11 1 -.names pos_clk_amiga_bus_enable_dma_high_3_0_n.BLIF \ -pos_clk_amiga_bus_enable_dma_high_3_n -0 1 -.names N_78.BLIF N_101_i.BLIF N_136_i_1 -11 1 -.names RST_c.BLIF pos_clk_un5_bgack_030_int_d_i_n.BLIF SIZE_DMA_3_sqmuxa -11 1 -.names N_103_i.BLIF N_104_i.BLIF N_152_i_1 -11 1 -.names pos_clk_un5_bgack_030_int_d_i_n.BLIF pos_clk_un5_bgack_030_int_d_n -0 1 -.names N_76.BLIF N_105_i.BLIF N_146_i_1 -11 1 -.names rw_000_dma_0_un1_n.BLIF rw_000_dma_0_un0_n.BLIF N_18 +.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_6 1- 1 -1 1 -.names N_115_i.BLIF N_116_i.BLIF N_267_i_1 +.names N_183_i.BLIF N_184_i.BLIF N_117_i_1 11 1 -.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF N_19 +.names N_72.BLIF N_182_i.BLIF N_115_i_1 +11 1 +.names N_72.BLIF N_181_i.BLIF N_111_i_1 +11 1 +.names inst_BGACK_030_INTreg.BLIF AS_030_000_SYNC_i.BLIF N_165_1 +11 1 +.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_13 1- 1 -1 1 -.names N_226_i.BLIF N_224_i.BLIF pos_clk_ipl_1_n +.names cpu_est_1_.BLIF cpu_est_2_.BLIF N_162_1 11 1 -.names amiga_bus_enable_dma_low_0_un1_n.BLIF \ -amiga_bus_enable_dma_low_0_un0_n.BLIF N_21 +.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_148_1 +11 1 +.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_18 1- 1 -1 1 -.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n +.names N_189_i.BLIF N_187_i.BLIF pos_clk_ipl_1_n +11 1 +.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF N_19 +1- 1 +-1 1 +.names AS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un3_n 0 1 -.names amiga_bus_enable_dma_high_0_un1_n.BLIF \ -amiga_bus_enable_dma_high_0_un0_n.BLIF N_22 +.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_20 1- 1 -1 1 -.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n +.names inst_DS_000_DMA.BLIF AS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un1_n 11 1 -.names un6_amiga_bus_data_dir_1.BLIF un6_amiga_bus_data_dir_2.BLIF \ -un6_amiga_bus_data_dir +.names N_205.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n 11 1 -.names BG_000DFFreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +.names AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un3_n +0 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un1_n 11 1 -.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF un12_amiga_bus_data_dir_m +.names N_205.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n 11 1 .names SM_AMIGA_6_.BLIF uds_000_int_0_un3_n 0 1 -.names CLK_EXP_i.BLIF inst_CLK_OUT_PRE_D.BLIF pos_clk_un3_clk_out_int_n -11 1 .names a_c_0__n.BLIF SM_AMIGA_6_.BLIF uds_000_int_0_un1_n 11 1 -.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF N_3 -1- 1 --1 1 .names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n 11 1 -.names pos_clk_as_000_dma6_1_n.BLIF pos_clk_as_000_dma6_2_n.BLIF \ -pos_clk_as_000_dma6_n +.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n +0 1 +.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n +11 1 +.names BG_000DFFreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n 11 1 .names SM_AMIGA_6_.BLIF lds_000_int_0_un3_n 0 1 -.names DS_000_DMA_1_sqmuxa_1.BLIF pos_clk_un4_rw_000_i_n.BLIF \ -DS_000_DMA_1_sqmuxa -11 1 .names pos_clk_un10_sm_amiga_i_n.BLIF SM_AMIGA_6_.BLIF lds_000_int_0_un1_n 11 1 -.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF N_4 -1- 1 --1 1 .names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n 11 1 -.names pos_clk_as_000_dma6_n.BLIF pos_clk_un3_clk_out_int_n.BLIF \ -AS_000_DMA_1_sqmuxa -11 1 -.names DS_000_ENABLE_1_sqmuxa.BLIF ds_000_enable_0_un3_n +.names RST_c.BLIF as_030_d1_0_un3_n 0 1 -.names AS_000_i.BLIF un1_rst_2_1.BLIF un1_rst_2 +.names inst_AS_030_D0.BLIF RST_c.BLIF as_030_d1_0_un1_n 11 1 -.names inst_DS_000_ENABLE.BLIF DS_000_ENABLE_1_sqmuxa.BLIF \ -ds_000_enable_0_un1_n +.names inst_AS_030_D1.BLIF as_030_d1_0_un3_n.BLIF as_030_d1_0_un0_n 11 1 -.names un1_DS_000_ENABLE_0_sqmuxa.BLIF ds_000_enable_0_un3_n.BLIF \ -ds_000_enable_0_un0_n -11 1 -.names CYCLE_DMA_0_.BLIF pos_clk_un13_bgack_030_int_n.BLIF N_199 -11 1 -.names pos_clk_ipl_n.BLIF ipl_030_0_2__un3_n +.names un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un3_n 0 1 -.names N_76_i.BLIF pos_clk_un15_bgack_030_int_n.BLIF \ -pos_clk_un13_bgack_030_int_n +.names pos_clk_rw_000_int_5_n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF \ +rw_000_int_0_un1_n 11 1 -.names ipl_c_2__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_2__un1_n +.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n 11 1 -.names CLK_030_PE_0_.BLIF pos_clk_un13_clk_out_int_n.BLIF N_205 -11 1 -.names IPL_030DFF_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n -11 1 -.names pos_clk_un13_clk_out_int_1_n.BLIF pos_clk_un3_clk_out_int_n.BLIF \ -pos_clk_un13_clk_out_int_n -11 1 -.names pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un3_n +.names N_244.BLIF as_030_000_sync_0_un3_n 0 1 -.names pos_clk_un15_bgack_030_int_i_n.BLIF pos_clk_un15_bgack_030_int_n -0 1 -.names cpu_est_i_1__n.BLIF pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un1_n +.names AS_030_c.BLIF N_244.BLIF as_030_000_sync_0_un1_n 11 1 -.names pos_clk_un3_0_n.BLIF pos_clk_un3_n -0 1 -.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n -11 1 -.names pos_clk_un12_clk_out_int_0_n.BLIF pos_clk_un12_clk_out_int_n -0 1 -.names N_76.BLIF cpu_est_0_1__un3_n -0 1 -.names pos_clk_un1_bgack_030_int_0_n.BLIF pos_clk_un1_bgack_030_int_n -0 1 -.names cpu_est_1_.BLIF N_76.BLIF cpu_est_0_1__un1_n -11 1 -.names RW_000_c.BLIF pos_clk_un3_clk_out_int_i_n.BLIF DS_000_DMA_0_sqmuxa -11 1 -.names cpu_est_2_1__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n -11 1 -.names RST_c.BLIF pos_clk_as_000_dma6_n.BLIF un1_rst_3 -11 1 -.names N_76.BLIF cpu_est_0_2__un3_n -0 1 -.names cpu_est_2_.BLIF N_76.BLIF cpu_est_0_2__un1_n -11 1 -.names cpu_est_2_2__n.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n -11 1 -.names N_76.BLIF cpu_est_0_3__un3_n -0 1 -.names pos_clk_un4_rw_000_1_n.BLIF pos_clk_un4_rw_000_2_n.BLIF \ -pos_clk_un4_rw_000_n -11 1 -.names cpu_est_3_.BLIF N_76.BLIF cpu_est_0_3__un1_n -11 1 -.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_7 -1- 1 --1 1 -.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c -0 1 -.names N_189_i.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n -11 1 -.names pos_clk_un6_bgack_000_0_n.BLIF pos_clk_un6_bgack_000_n -0 1 -.names inst_VPA_D.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un3_n -0 1 -.names AS_000_c.BLIF N_76_i.BLIF pos_clk_un4_bgack_000_n -11 1 -.names DTACK_D0_i.BLIF inst_VPA_D.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un1_n -11 1 -.names N_265_2_0.BLIF N_265_2 -0 1 -.names pos_clk_un29_clk_000_ne_1_n.BLIF \ -pos_clk_un31_clk_000_ne_1_i_m2_un3_n.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un0_n -11 1 -.names N_76.BLIF rst_dly_i_2__n.BLIF N_111 +.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ +as_030_000_sync_0_un0_n 11 1 .names pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n 0 1 -.names N_137.BLIF N_265_2.BLIF N_109 -11 1 -.names BG_030_c.BLIF BG_030_c_i -0 1 .names BGACK_000_c.BLIF pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n 11 1 -.names N_76.BLIF rst_dly_i_1__n.BLIF N_113 -11 1 -.names pos_clk_un6_bg_030_n.BLIF pos_clk_un6_bg_030_i_n +.names cpu_est_2_0_1__n.BLIF cpu_est_2_1__n 0 1 .names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \ bgack_030_int_0_un0_n 11 1 -.names N_77_i.BLIF N_134.BLIF N_112 -11 1 -.names BG_030_c_i.BLIF pos_clk_un6_bg_030_i_n.BLIF pos_clk_un9_bg_030_0_n -11 1 -.names DS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un3_n -0 1 -.names pos_clk_un31_clk_000_ne_1_i_m2_un1_n.BLIF \ -pos_clk_un31_clk_000_ne_1_i_m2_un0_n.BLIF N_98 -1- 1 --1 1 -.names inst_UDS_000_INT.BLIF UDS_000_INT_i -0 1 -.names inst_DS_000_DMA.BLIF DS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un1_n -11 1 -.names pos_clk_un29_clk_000_ne_1_3_n.BLIF cpu_est_i_1__n.BLIF \ -pos_clk_un29_clk_000_ne_1_n -11 1 -.names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un1_UDS_000_INT_0 -11 1 -.names pos_clk_as_000_dma6_i_n.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n -11 1 -.names N_87_i.BLIF N_87 -0 1 -.names inst_LDS_000_INT.BLIF LDS_000_INT_i -0 1 -.names AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un3_n -0 1 -.names N_270_0.BLIF N_270 -0 1 -.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un1_LDS_000_INT_0 -11 1 -.names inst_AS_000_DMA.BLIF AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un1_n -11 1 -.names N_76_i.BLIF N_137_i_0.BLIF N_134 -11 1 -.names N_23.BLIF N_23_i -0 1 -.names pos_clk_as_000_dma6_i_n.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n -11 1 -.names N_125_1.BLIF RST_c.BLIF N_125 -11 1 -.names N_23_i.BLIF RST_c.BLIF N_30_0 -11 1 -.names SIZE_DMA_3_sqmuxa.BLIF size_dma_0_1__un3_n -0 1 -.names inst_RESET_OUT.BLIF RST_c.BLIF N_124 -11 1 -.names N_20.BLIF N_20_i -0 1 -.names SIZE_DMA_1_.BLIF SIZE_DMA_3_sqmuxa.BLIF size_dma_0_1__un1_n -11 1 -.names N_87_i.BLIF RST_c.BLIF N_121 -11 1 -.names N_20_i.BLIF RST_c.BLIF N_33_0 -11 1 -.names pos_clk_size_dma_6_1__n.BLIF size_dma_0_1__un3_n.BLIF \ -size_dma_0_1__un0_n -11 1 -.names DSACK1_INT_i.BLIF N_274.BLIF N_120 -11 1 -.names N_13.BLIF N_13_i -0 1 -.names SIZE_DMA_3_sqmuxa.BLIF size_dma_0_0__un3_n -0 1 -.names N_77_i.BLIF RST_DLY_2_.BLIF N_137 -11 1 -.names N_13_i.BLIF RST_c.BLIF N_40_0 -11 1 -.names SIZE_DMA_0_.BLIF SIZE_DMA_3_sqmuxa.BLIF size_dma_0_0__un1_n -11 1 -.names pos_clk_un31_clk_000_ne_i_n.BLIF pos_clk_un31_clk_000_ne_n -0 1 -.names ipl_c_2__n.BLIF ipl_c_i_2__n -0 1 -.names pos_clk_size_dma_6_0__n.BLIF size_dma_0_0__un3_n.BLIF \ -size_dma_0_0__un0_n -11 1 -.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_17 -1- 1 --1 1 -.names ipl_c_i_2__n.BLIF RST_c.BLIF N_51_0 -11 1 -.names pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_high_0_un3_n -0 1 -.names pos_clk_un9_clk_000_pe_0_n.BLIF pos_clk_un9_clk_000_pe_n -0 1 -.names N_26.BLIF N_26_i -0 1 -.names pos_clk_amiga_bus_enable_dma_high_3_n.BLIF \ -pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_high_0_un1_n -11 1 -.names cpu_est_2_0_1__n.BLIF cpu_est_2_1__n -0 1 -.names N_26_i.BLIF RST_c.BLIF N_29_0 -11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF \ -amiga_bus_enable_dma_high_0_un3_n.BLIF amiga_bus_enable_dma_high_0_un0_n -11 1 .names cpu_est_2_0_2__n.BLIF cpu_est_2_2__n 0 1 -.names a_c_0__n.BLIF a_c_i_0__n +.names N_68.BLIF cpu_est_0_1__un3_n 0 1 -.names pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_low_0_un3_n +.names cpu_est_2_0_3__n.BLIF cpu_est_2_3__n 0 1 -.names N_261_1.BLIF N_261_2.BLIF N_261 +.names cpu_est_1_.BLIF N_68.BLIF cpu_est_0_1__un1_n 11 1 -.names size_c_1__n.BLIF size_c_i_1__n +.names cpu_est_2_1__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n +11 1 +.names N_68.BLIF cpu_est_0_2__un3_n 0 1 -.names pos_clk_amiga_bus_enable_dma_low_3_n.BLIF \ -pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_low_0_un1_n +.names cpu_est_2_.BLIF N_68.BLIF cpu_est_0_2__un1_n 11 1 -.names N_262_1.BLIF N_262_2.BLIF N_262 -11 1 -.names pos_clk_un10_sm_amiga_i_1_n.BLIF size_c_i_1__n.BLIF \ -pos_clk_un10_sm_amiga_i_n -11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF \ -amiga_bus_enable_dma_low_0_un3_n.BLIF amiga_bus_enable_dma_low_0_un0_n -11 1 -.names N_251_i.BLIF N_251 +.names N_60_0.BLIF N_60 0 1 -.names DS_000_ENABLE_0_sqmuxa_1.BLIF DS_000_ENABLE_0_sqmuxa_1_i +.names cpu_est_2_2__n.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n +11 1 +.names N_63_0.BLIF N_63 0 1 -.names pos_clk_un5_bgack_030_int_d_n.BLIF a0_dma_0_un3_n +.names N_68.BLIF cpu_est_0_3__un3_n 0 1 -.names N_252_0.BLIF N_252 -0 1 -.names DS_000_ENABLE_0_sqmuxa_1_i.BLIF N_157.BLIF un1_DS_000_ENABLE_0_sqmuxa_i +.names N_220_i.BLIF RW_000_i.BLIF N_126 11 1 -.names pos_clk_a0_dma_3_n.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF \ -a0_dma_0_un1_n +.names cpu_est_3_.BLIF N_68.BLIF cpu_est_0_3__un1_n 11 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_258 +.names a_c_1__n.BLIF N_220_i.BLIF N_150 11 1 -.names N_78_i.BLIF SM_AMIGA_4_.BLIF N_157_i +.names cpu_est_2_3__n.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n 11 1 -.names inst_A0_DMA.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n +.names a_i_1__n.BLIF N_220_i.BLIF N_151 11 1 -.names N_251_i.BLIF cpu_est_i_2__n.BLIF N_257 -11 1 -.names N_76_i.BLIF SM_AMIGA_5_.BLIF N_160_0 -11 1 -.names pos_clk_un5_bgack_030_int_d_n.BLIF rw_000_dma_0_un3_n -0 1 -.names AS_030_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_i.BLIF DS_000_ENABLE_1_sqmuxa -11 1 -.names SM_AMIGA_3_.BLIF pos_clk_un31_clk_000_ne_n.BLIF N_161_0 -11 1 -.names pos_clk_rw_000_dma_3_n.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF \ -rw_000_dma_0_un1_n -11 1 -.names un1_DS_000_ENABLE_0_sqmuxa_i.BLIF un1_DS_000_ENABLE_0_sqmuxa -0 1 -.names N_85_i.BLIF sm_amiga_i_i_7__n.BLIF N_162_0 -11 1 -.names inst_RW_000_DMA.BLIF rw_000_dma_0_un3_n.BLIF rw_000_dma_0_un0_n -11 1 -.names N_76.BLIF sm_amiga_i_2__n.BLIF N_102 -11 1 -.names N_165.BLIF N_165_i -0 1 .names pos_clk_ipl_n.BLIF ipl_030_0_0__un3_n 0 1 -.names AS_000_INT_i.BLIF N_274.BLIF N_118 +.names AS_030_i.BLIF DSACK1_INT_i.BLIF N_219 11 1 .names ipl_c_0__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_0__un1_n 11 1 -.names N_79_i.BLIF RST_c.BLIF N_119 +.names AS_000_INT_i.BLIF AS_030_i.BLIF N_175 11 1 -.names N_167.BLIF N_167_i -0 1 .names IPL_030DFF_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n 11 1 -.names N_264_i.BLIF N_264 -0 1 -.names N_166.BLIF N_166_i -0 1 .names pos_clk_ipl_n.BLIF ipl_030_0_1__un3_n 0 1 -.names DS_000_ENABLE_0_sqmuxa_1_1.BLIF SM_AMIGA_6_.BLIF \ -DS_000_ENABLE_0_sqmuxa_1 -11 1 +.names N_59_i.BLIF N_59 +0 1 .names ipl_c_1__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_1__un1_n 11 1 -.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_164 -11 1 -.names N_168.BLIF N_168_i +.names N_68_i.BLIF N_68 0 1 .names IPL_030DFF_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n 11 1 -.names N_162.BLIF sm_amiga_i_6__n.BLIF N_170 -11 1 -.names N_64.BLIF as_030_000_sync_0_un3_n +.names N_72_i.BLIF N_72 0 1 -.names N_160.BLIF sm_amiga_i_4__n.BLIF N_168 -11 1 -.names N_170.BLIF N_170_i +.names pos_clk_ipl_n.BLIF ipl_030_0_2__un3_n 0 1 -.names inst_AS_030_000_SYNC.BLIF N_64.BLIF as_030_000_sync_0_un1_n +.names N_80_i.BLIF N_80 +0 1 +.names ipl_c_2__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_2__un1_n 11 1 -.names N_157.BLIF sm_amiga_i_3__n.BLIF N_166 +.names N_93_i.BLIF N_93 +0 1 +.names IPL_030DFF_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n 11 1 -.names AS_030_c.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n +.names N_98_i.BLIF N_98 +0 1 +.names N_63.BLIF ds_000_enable_0_un3_n +0 1 +.names N_107_i.BLIF N_107 +0 1 +.names un1_DS_000_ENABLE_0_sqmuxa.BLIF N_63.BLIF ds_000_enable_0_un1_n 11 1 -.names N_76_i.BLIF pos_clk_un31_clk_000_ne_n.BLIF N_167 +.names N_128_i.BLIF N_128 +0 1 +.names inst_DS_000_ENABLE.BLIF ds_000_enable_0_un3_n.BLIF \ +ds_000_enable_0_un0_n 11 1 +.names N_131_i.BLIF N_131 +0 1 +.names pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un3_n +0 1 +.names N_134_0.BLIF N_134 +0 1 +.names cpu_est_i_1__n.BLIF pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un1_n +11 1 +.names N_135_0.BLIF N_135 +0 1 +.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n +11 1 +.names N_72.BLIF SM_AMIGA_2_.BLIF N_141 +11 1 +.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c +0 1 +.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_142 +11 1 +.names N_143_1.BLIF N_143_2.BLIF N_143 +11 1 +.names N_144_1.BLIF N_144_2.BLIF N_144 +11 1 +.names LDS_000_c.BLIF UDS_000_c.BLIF N_145 +11 1 +.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF N_146 +11 1 +.names N_205_i_1.BLIF N_205_i_2.BLIF N_205_i +11 1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_147 +11 1 +.names N_140.BLIF N_140_i +0 1 +.names N_148_1.BLIF cpu_est_i_3__n.BLIF N_148 +11 1 +.names inst_AMIGA_DS.BLIF AMIGA_DS_i +0 1 +.names N_98.BLIF cpu_est_2_.BLIF N_149 +11 1 +.names N_98_i.BLIF cpu_est_2_.BLIF N_154 +11 1 +.names N_199.BLIF N_199_i +0 1 +.names N_82_i.BLIF cpu_est_3_.BLIF N_155 +11 1 +.names N_198.BLIF N_198_i +0 1 +.names N_162_1.BLIF cpu_est_i_3__n.BLIF N_162 +11 1 +.names N_180.BLIF N_180_i +0 1 +.names N_165_1.BLIF AS_030_i.BLIF N_165 +11 1 +.names N_262.BLIF N_262_i +0 1 +.names BGACK_030_INT_i.BLIF N_128.BLIF N_259 +11 1 +.names N_180_i.BLIF N_262_i.BLIF AMIGA_BUS_DATA_DIR_c_0 +11 1 +.names BGACK_030_INT_i.BLIF N_128_i.BLIF N_260 +11 1 +.names cycle_dma_i_0__n.BLIF cycle_dma_i_1__n.BLIF pos_clk_un2_i_n +11 1 +.names N_129.BLIF sm_amiga_i_0__n.BLIF N_181 +11 1 +.names N_3.BLIF N_3_i +0 1 +.names N_134.BLIF sm_amiga_i_2__n.BLIF N_182 +11 1 +.names N_3_i.BLIF RST_c.BLIF N_32_0 +11 1 +.names N_68_i.BLIF N_131.BLIF N_183 +11 1 +.names N_4.BLIF N_4_i +0 1 +.names N_107.BLIF sm_amiga_i_3__n.BLIF N_184 +11 1 +.names N_4_i.BLIF RST_c.BLIF N_31_0 +11 1 +.names N_135.BLIF sm_amiga_i_4__n.BLIF N_185 +11 1 +.names BGACK_030_INT_i.BLIF RST_c.BLIF N_220_i +11 1 +.names N_93.BLIF sm_amiga_i_5__n.BLIF N_186 +11 1 +.names BG_030_c.BLIF BG_030_c_i +0 1 +.names N_132.BLIF sm_amiga_i_6__n.BLIF N_266 +11 1 +.names BG_030_c_i.BLIF N_59.BLIF pos_clk_un9_bg_030_0_n +11 1 +.names N_96.BLIF sm_amiga_i_i_7__n.BLIF N_267 +11 1 +.names N_17.BLIF N_17_i +0 1 +.names N_72_i.BLIF SM_AMIGA_0_.BLIF N_268 +11 1 +.names N_17_i.BLIF RST_c.BLIF N_24_0 +11 1 +.names N_68.BLIF cpu_est_i_0__n.BLIF N_190 +11 1 +.names N_16.BLIF N_16_i +0 1 +.names N_68_i.BLIF cpu_est_0_.BLIF N_191 +11 1 +.names N_16_i.BLIF RST_c.BLIF N_25_0 +11 1 +.names N_201_1.BLIF N_201_2.BLIF N_201 +11 1 +.names N_15.BLIF N_15_i +0 1 +.names DTACK_D0_i.BLIF inst_VPA_D.BLIF N_202 +11 1 +.names N_15_i.BLIF RST_c.BLIF N_26_0 +11 1 +.names N_93_i.BLIF RW_c.BLIF N_203 +11 1 +.names N_12.BLIF N_12_i +0 1 +.names N_98_i.BLIF cpu_est_i_2__n.BLIF N_208 +11 1 +.names N_12_i.BLIF RST_c.BLIF N_28_0 +11 1 +.names N_163_3.BLIF un1_dsack1_i.BLIF N_163 +11 1 +.names N_11.BLIF N_11_i +0 1 +.names N_282_0.BLIF N_282 +0 1 +.names N_11_i.BLIF RST_c.BLIF N_29_0 +11 1 +.names AS_030_i.BLIF BGACK_000_c.BLIF un21_berr_1 +11 1 +.names N_5.BLIF N_5_i +0 1 +.names N_132_0.BLIF N_132 +0 1 +.names N_5_i.BLIF RST_c.BLIF N_30_0 +11 1 +.names N_96_0.BLIF N_96 +0 1 +.names a_c_0__n.BLIF a_c_i_0__n +0 1 +.names N_129_i.BLIF N_129 +0 1 +.names size_c_1__n.BLIF size_c_i_1__n +0 1 +.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 +0 1 +.names pos_clk_un10_sm_amiga_i_1_n.BLIF size_c_i_1__n.BLIF \ +pos_clk_un10_sm_amiga_i_n +11 1 +.names N_175.BLIF RST_c.BLIF N_169 +11 1 +.names inst_BGACK_030_INTreg.BLIF nEXP_SPACE_c.BLIF un1_dsack1_i +11 1 +.names N_93_i.BLIF RST_c.BLIF N_170 +11 1 +.names inst_BGACK_030_INTreg.BLIF RST_c.BLIF N_69_i +11 1 +.names N_219.BLIF RST_c.BLIF N_167 +11 1 +.names N_163.BLIF N_163_i +0 1 +.names N_129_i.BLIF RST_c.BLIF N_168 +11 1 +.names AS_030_i.BLIF N_163_i.BLIF N_244_0 +11 1 +.names pos_clk_rw_000_int_5_0_n.BLIF pos_clk_rw_000_int_5_n +0 1 .names N_164.BLIF N_164_i 0 1 -.names un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un3_n +.names pos_clk_un6_bgack_000_0_n.BLIF pos_clk_un6_bgack_000_n 0 1 -.names N_161.BLIF sm_amiga_i_2__n.BLIF N_165 -11 1 -.names pos_clk_rw_000_int_5_n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF \ -rw_000_int_0_un1_n -11 1 -.names N_162_0.BLIF N_162 +.names N_165.BLIF N_165_i 0 1 -.names N_102.BLIF N_102_i -0 1 -.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n +.names AS_000_c.BLIF N_68_i.BLIF N_274 11 1 -.names N_161_0.BLIF N_161 -0 1 -.names N_78.BLIF N_102_i.BLIF N_264_i +.names N_164_i.BLIF N_165_i.BLIF un11_amiga_bus_enable_high_i 11 1 -.names N_160_0.BLIF N_160 -0 1 -.names N_78_i.BLIF SM_AMIGA_6_.BLIF N_79_i +.names AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF BGACK_030_INT_i.BLIF N_164 11 1 -.names N_157_i.BLIF N_157 +.names un10_ciin.BLIF un10_ciin_i 0 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_78_i +.names N_244_0.BLIF N_244 +0 1 +.names nEXP_SPACE_i.BLIF un10_ciin_i.BLIF N_60_0 11 1 -.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_26 +.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_5 1- 1 -1 1 -.names N_119.BLIF N_119_i +.names N_274.BLIF N_274_i 0 1 -.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF N_13 +.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_11 1- 1 -1 1 -.names N_118.BLIF N_118_i +.names BGACK_000_c.BLIF N_274_i.BLIF pos_clk_un6_bgack_000_0_n +11 1 +.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_12 +1- 1 +-1 1 +.names RW_c.BLIF RW_c_i 0 1 -.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_20 +.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF N_15 1- 1 -1 1 -.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF N_23 +.names N_246_i.BLIF RW_c_i.BLIF pos_clk_rw_000_int_5_0_n +11 1 +.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF N_16 1- 1 -1 1 -.names N_255.BLIF N_255_i +.names N_168.BLIF N_168_i 0 1 -.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_8 +.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_17 1- 1 -1 1 -.names N_257.BLIF N_257_i +.names N_167.BLIF N_167_i 0 1 .names pos_clk_un9_bg_030_0_n.BLIF pos_clk_un9_bg_030_n 0 1 -.names N_255_i.BLIF N_257_i.BLIF cpu_est_2_0_2__n +.names N_170.BLIF N_170_i +0 1 +.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF N_3 +1- 1 +-1 1 +.names N_169.BLIF N_169_i +0 1 +.names N_205_i.BLIF N_205 +0 1 +.names AS_000_DMA_1_sqmuxa_1.BLIF N_205_i.BLIF AS_000_DMA_1_sqmuxa +11 1 +.names AS_030_i.BLIF RST_c.BLIF N_38_0 +11 1 +.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF N_4 +1- 1 +-1 1 +.names N_93.BLIF N_246_i.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 +11 1 +.names N_199_1.BLIF cycle_dma_i_1__n.BLIF N_199 +11 1 +.names N_282_0_4.BLIF N_282_0_3.BLIF N_282_0 +11 1 +.names pos_clk_un2_i_n.BLIF pos_clk_un2_n +0 1 +.names CLK_000_D_3_.BLIF clk_000_d_i_3__n +0 1 +.names N_140_1.BLIF RW_000_i.BLIF N_140 +11 1 +.names N_96_0_1.BLIF N_96_0_2.BLIF N_96_0 +11 1 +.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF N_262 +11 1 +.names N_68_i.BLIF SM_AMIGA_1_.BLIF N_129_i +11 1 +.names cycle_dma_i_0__n.BLIF N_68.BLIF N_198 +11 1 +.names N_268.BLIF N_268_i +0 1 +.names N_180_1.BLIF N_180_2.BLIF N_180 +11 1 +.names N_268_i.BLIF SM_AMIGA_i_7_.BLIF N_246_i 11 1 .names un1_amiga_bus_enable_low.BLIF un1_amiga_bus_enable_low_i 0 1 -.names N_258.BLIF N_258_i -0 1 +.names N_96_0.BLIF sm_amiga_i_i_7__n.BLIF N_132_0 +11 1 .names un21_fpu_cs.BLIF un21_fpu_cs_i 0 1 -.names N_259.BLIF N_259_i +.names AS_000_c.BLIF AS_000_i 0 1 -.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n +.names N_142.BLIF N_142_i 0 1 -.names N_258_i.BLIF N_259_i.BLIF cpu_est_2_0_1__n +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +0 1 +.names N_141.BLIF N_141_i +0 1 +.names nEXP_SPACE_c.BLIF nEXP_SPACE_i +0 1 +.names N_68_i.BLIF SM_AMIGA_5_.BLIF N_135_0 11 1 -.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n 0 1 -.names N_262.BLIF N_262_i -0 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n -0 1 -.names N_261.BLIF N_261_i -0 1 -.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n -0 1 -.names N_261_i.BLIF N_262_i.BLIF pos_clk_un9_clk_000_pe_0_n +.names N_134_0_1.BLIF SM_AMIGA_3_.BLIF N_134_0 11 1 -.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n +.names RW_000_c.BLIF RW_000_i 0 1 -.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_251_i +.names N_131_i_1.BLIF N_202_i.BLIF N_131_i +11 1 +.names CLK_OUT_INTreg.BLIF CLK_EXP_i +0 1 +.names LDS_000_c.BLIF LDS_000_c_i +0 1 +.names CYCLE_DMA_1_.BLIF cycle_dma_i_1__n +0 1 +.names UDS_000_c.BLIF UDS_000_c_i +0 1 +.names inst_DS_000_DMA.BLIF DS_000_DMA_i +0 1 +.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_128_i +11 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_i +0 1 +.names N_72_i.BLIF SM_AMIGA_4_.BLIF N_107_i +11 1 +.names a_c_1__n.BLIF a_i_1__n +0 1 +.names N_203.BLIF N_203_i +0 1 +.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i +0 1 +.names N_107.BLIF N_203_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_0 +11 1 +.names a_decode_c_19__n.BLIF a_decode_i_19__n +0 1 +.names N_201.BLIF N_201_i +0 1 +.names a_decode_c_18__n.BLIF a_decode_i_18__n +0 1 +.names N_202.BLIF N_202_i +0 1 +.names a_decode_c_16__n.BLIF a_decode_i_16__n +0 1 +.names inst_VMA_INTreg.BLIF VMA_INT_i +0 1 +.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i +0 1 +.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_98_i +11 1 +.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n +0 1 +.names N_72_i.BLIF SM_AMIGA_6_.BLIF N_93_i 11 1 .names SM_AMIGA_5_.BLIF sm_amiga_i_5__n 0 1 -.names cpu_est_1_.BLIF cpu_est_i_3__n.BLIF N_252_0 +.names cpu_est_i_1__n.BLIF cpu_est_i_2__n.BLIF N_82_i 11 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_0__n +.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n 0 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_76_i +.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF N_80_i 11 1 -.names inst_AS_000_INT.BLIF AS_000_INT_i -0 1 -.names N_17.BLIF N_17_i -0 1 .names SM_AMIGA_i_7_.BLIF sm_amiga_i_i_7__n 0 1 -.names N_17_i.BLIF RST_c.BLIF N_36_0 +.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_72_i 11 1 .names AS_030_c.BLIF AS_030_i 0 1 -.names N_98.BLIF N_98_i -0 1 -.names cpu_est_2_.BLIF cpu_est_i_2__n -0 1 -.names BERR_c.BLIF N_98_i.BLIF pos_clk_un31_clk_000_ne_i_n +.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_68_i 11 1 +.names inst_AS_000_INT.BLIF AS_000_INT_i +0 1 +.names N_59_i_1.BLIF nEXP_SPACE_c.BLIF N_59_i +11 1 +.names inst_DSACK1_INT.BLIF DSACK1_INT_i +0 1 +.names N_190.BLIF N_190_i +0 1 +.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +0 1 +.names N_191.BLIF N_191_i +0 1 +.names FPU_SENSE_c.BLIF FPU_SENSE_i +0 1 +.names inst_AS_030_D1.BLIF AS_030_D1_i +0 1 +.names N_267.BLIF N_267_i +0 1 .names cpu_est_0_.BLIF cpu_est_i_0__n 0 1 -.names N_137_i_0.BLIF RST_c.BLIF N_228_i -11 1 .names cpu_est_3_.BLIF cpu_est_i_3__n 0 1 -.names N_121.BLIF N_121_i +.names N_266.BLIF N_266_i +0 1 +.names inst_VPA_D.BLIF VPA_D_i +0 1 +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names N_186.BLIF N_186_i +0 1 +.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n 0 1 .names cpu_est_1_.BLIF cpu_est_i_1__n 0 1 -.names N_120.BLIF N_120_i +.names N_185.BLIF N_185_i +0 1 +.names CLK_000_D_0_.BLIF clk_000_d_i_0__n +0 1 +.names CLK_000_D_1_.BLIF clk_000_d_i_1__n +0 1 +.names N_183.BLIF N_183_i +0 1 +.names inst_AS_030_D0.BLIF AS_030_D0_i +0 1 +.names N_184.BLIF N_184_i +0 1 +.names cpu_est_2_.BLIF cpu_est_i_2__n +0 1 +.names inst_DTACK_D0.BLIF DTACK_D0_i +0 1 +.names N_182.BLIF N_182_i +0 1 +.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n +0 1 +.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i +0 1 +.names N_181.BLIF N_181_i +0 1 +.names ahigh_c_30__n.BLIF ahigh_i_30__n +0 1 +.names ahigh_c_31__n.BLIF ahigh_i_31__n +0 1 +.names N_260.BLIF N_260_i +0 1 +.names ahigh_c_28__n.BLIF ahigh_i_28__n +0 1 +.names N_260_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n +11 1 +.names ahigh_c_29__n.BLIF ahigh_i_29__n +0 1 +.names N_259.BLIF N_259_i +0 1 +.names ahigh_c_26__n.BLIF ahigh_i_26__n +0 1 +.names N_259_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n +11 1 +.names ahigh_c_27__n.BLIF ahigh_i_27__n +0 1 +.names AS_030_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_0.BLIF N_63_0 +11 1 +.names ahigh_c_24__n.BLIF ahigh_i_24__n +0 1 +.names N_155.BLIF N_155_i +0 1 +.names ahigh_c_25__n.BLIF ahigh_i_25__n +0 1 +.names N_162.BLIF N_162_i +0 1 +.names G_105.BLIF N_187_i +0 1 +.names N_155_i.BLIF N_162_i.BLIF un5_e_0 +11 1 +.names G_106.BLIF N_188_i +0 1 +.names N_154.BLIF N_154_i +0 1 +.names G_107.BLIF N_189_i +0 1 +.names N_80.BLIF N_154_i.BLIF cpu_est_2_0_3__n +11 1 +.names N_149.BLIF N_149_i +0 1 +.names N_208.BLIF N_208_i +0 1 +.names N_149_i.BLIF N_208_i.BLIF cpu_est_2_0_2__n +11 1 +.names N_147.BLIF N_147_i +0 1 +.names un2_ds_030.BLIF un2_ds_030_i +0 1 +.names N_148.BLIF N_148_i +0 1 +.names N_219.BLIF N_219_i +0 1 +.names N_147_i.BLIF N_148_i.BLIF cpu_est_2_0_1__n +11 1 +.names N_175.BLIF N_175_i +0 1 +.names N_146.BLIF N_146_i +0 1 +.names un3_as_030.BLIF un3_as_030_i +0 1 +.names N_146_i.BLIF RST_c.BLIF N_36_0 +11 1 +.names N_145.BLIF N_145_i +0 1 +.names N_145_i.BLIF RST_c.BLIF N_35_0 +11 1 +.names N_143.BLIF N_143_i +0 1 +.names N_144.BLIF N_144_i +0 1 +.names N_143_i.BLIF N_144_i.BLIF pos_clk_un9_clk_000_pe_0_n +11 1 +.names N_20.BLIF N_20_i 0 1 .names IPL_030DFF_2_reg.BLIF IPL_030_2_ 1 1 0 0 -.names un6_ds_030_i.BLIF DS_030 +.names un2_ds_030_i.BLIF DS_030 1 1 0 0 .names BG_000DFFreg.BLIF BG_000 @@ -1598,13 +1262,13 @@ rw_000_int_0_un1_n .names un21_fpu_cs_i.BLIF FPU_CS 1 1 0 0 -.names N_123_i.BLIF DSACK1 +.names N_219_i.BLIF DSACK1 1 1 0 0 .names vcc_n_n.BLIF AVEC 1 1 0 0 -.names N_250_i.BLIF E +.names un5_e.BLIF E 1 1 0 0 .names inst_VMA_INTreg.BLIF VMA @@ -1631,15 +1295,6 @@ rw_000_int_0_un1_n .names IPL_030DFF_0_reg.BLIF IPL_030_0_ 1 1 0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_i_7_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C -1 1 -0 0 .names CLK_OSZI_c.BLIF SM_AMIGA_4_.C 1 1 0 0 @@ -1655,12 +1310,6 @@ rw_000_int_0_un1_n .names CLK_OSZI_c.BLIF SM_AMIGA_0_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF cpu_est_2_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF cpu_est_3_.C -1 1 -0 0 .names CLK_OSZI_c.BLIF IPL_030DFF_0_reg.C 1 1 0 0 @@ -1679,10 +1328,13 @@ rw_000_int_0_un1_n .names CLK_OSZI_c.BLIF IPL_D0_2_.C 1 1 0 0 -.names CLK_000.BLIF CLK_000_D_0_.D +.names CLK_OSZI_c.BLIF SM_AMIGA_i_7_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF CLK_000_D_0_.C +.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C 1 1 0 0 .names CLK_000_D_0_.BLIF CLK_000_D_1_.D @@ -1709,37 +1361,67 @@ rw_000_int_0_un1_n .names CLK_OSZI_c.BLIF CLK_000_D_4_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF CYCLE_DMA_0_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF CYCLE_DMA_1_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_030_PE_0_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_030_PE_1_.C -1 1 -0 0 .names CLK_OSZI_c.BLIF SIZE_DMA_0_.C 1 1 0 0 .names CLK_OSZI_c.BLIF SIZE_DMA_1_.C 1 1 0 0 +.names CLK_OSZI_c.BLIF CYCLE_DMA_0_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF CYCLE_DMA_1_.C +1 1 +0 0 .names CLK_OSZI_c.BLIF cpu_est_0_.C 1 1 0 0 .names CLK_OSZI_c.BLIF cpu_est_1_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF RST_DLY_0_.C +.names CLK_OSZI_c.BLIF cpu_est_2_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF RST_DLY_1_.C +.names CLK_OSZI_c.BLIF cpu_est_3_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF RST_DLY_2_.C +.names CLK_000.BLIF CLK_000_D_0_.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF CLK_000_D_0_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_VPA_D.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_DTACK_D0.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_DS_000_ENABLE.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF BG_000DFFreg.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_RW_000_INT.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C 1 1 0 0 .names CLK_OSZI_c.BLIF inst_DS_000_DMA.C @@ -1754,55 +1436,22 @@ rw_000_int_0_un1_n .names CLK_OSZI_c.BLIF inst_AMIGA_DS.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_AS_030_D0.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_DTACK_D0.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_VPA_D.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_RESET_OUT.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_DS_000_ENABLE.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF BG_000DFFreg.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C -1 1 -0 0 .names CLK_OSZI_c.BLIF inst_A0_DMA.C 1 1 0 0 .names CLK_OSZI_c.BLIF inst_RW_000_DMA.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C +.names CLK_OSZI_c.BLIF inst_AS_030_D0.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_RW_000_INT.C +.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C +.names CLK_OSZI_c.BLIF inst_AS_030_D1.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C +.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C 1 1 0 0 .names CLK_OSZI_c.BLIF inst_BGACK_030_INT_D.C @@ -1829,10 +1478,10 @@ rw_000_int_0_un1_n .names gnd_n_n.BLIF AHIGH_31_ 1 1 0 0 -.names un7_as_030_i.BLIF AS_030 +.names un3_as_030_i.BLIF AS_030 1 1 0 0 -.names N_122_i.BLIF AS_000 +.names N_175_i.BLIF AS_000 1 1 0 0 .names inst_RW_000_INT.BLIF RW_000 @@ -1847,9 +1496,6 @@ rw_000_int_0_un1_n .names gnd_n_n.BLIF BERR 1 1 0 0 -.names gnd_n_n.BLIF DTACK -1 1 -0 0 .names inst_RW_000_DMA.BLIF RW 1 1 0 0 @@ -1880,18 +1526,6 @@ rw_000_int_0_un1_n .names inst_A0_DMA.BLIF A_0_ 1 1 0 0 -.names A_DECODE_2_.BLIF a_decode_2__n -1 1 -0 0 -.names AS_030.PIN.BLIF AS_030_c -1 1 -0 0 -.names AS_000.PIN.BLIF AS_000_c -1 1 -0 0 -.names RW_000.PIN.BLIF RW_000_c -1 1 -0 0 .names UDS_000.PIN.BLIF UDS_000_c 1 1 0 0 @@ -1970,9 +1604,6 @@ rw_000_int_0_un1_n .names BGACK_000.BLIF BGACK_000_c 1 1 0 0 -.names CLK_030.BLIF CLK_030_c -1 1 -0 0 .names CLK_OSZI.BLIF CLK_OSZI_c 1 1 0 0 @@ -1988,7 +1619,7 @@ rw_000_int_0_un1_n .names IPL_2_.BLIF ipl_c_2__n 1 1 0 0 -.names DTACK.PIN.BLIF DTACK_c +.names DTACK.BLIF DTACK_c 1 1 0 0 .names VPA.BLIF VPA_c @@ -1997,9 +1628,6 @@ rw_000_int_0_un1_n .names RST.BLIF RST_c 1 1 0 0 -.names RESET.BLIF RESET_c -1 1 -0 0 .names RW.PIN.BLIF RW_c 1 1 0 0 @@ -2048,108 +1676,100 @@ rw_000_int_0_un1_n .names A_DECODE_3_.BLIF a_decode_3__n 1 1 0 0 -.names N_132.BLIF AS_030.OE +.names A_DECODE_2_.BLIF a_decode_2__n 1 1 0 0 -.names un1_as_000_i.BLIF AS_000.OE +.names AS_030.PIN.BLIF AS_030_c 1 1 0 0 -.names un1_as_000_i.BLIF RW_000.OE +.names AS_000.PIN.BLIF AS_000_c 1 1 0 0 -.names un1_as_000_i.BLIF UDS_000.OE +.names RW_000.PIN.BLIF RW_000_c 1 1 0 0 -.names un1_as_000_i.BLIF LDS_000.OE +.names BGACK_030_INT_i.BLIF AS_030.OE 1 1 0 0 -.names N_276.BLIF SIZE_0_.OE +.names N_69_i.BLIF AS_000.OE 1 1 0 0 -.names N_276.BLIF SIZE_1_.OE +.names N_69_i.BLIF RW_000.OE 1 1 0 0 -.names un3_ahigh_i.BLIF AHIGH_24_.OE +.names N_69_i.BLIF UDS_000.OE 1 1 0 0 -.names un3_ahigh_i.BLIF AHIGH_25_.OE +.names N_69_i.BLIF LDS_000.OE 1 1 0 0 -.names un3_ahigh_i.BLIF AHIGH_26_.OE +.names BGACK_030_INT_i.BLIF SIZE_0_.OE 1 1 0 0 -.names un3_ahigh_i.BLIF AHIGH_27_.OE +.names BGACK_030_INT_i.BLIF SIZE_1_.OE 1 1 0 0 -.names un3_ahigh_i.BLIF AHIGH_28_.OE +.names BGACK_030_INT_i.BLIF AHIGH_24_.OE 1 1 0 0 -.names un3_ahigh_i.BLIF AHIGH_29_.OE +.names BGACK_030_INT_i.BLIF AHIGH_25_.OE 1 1 0 0 -.names un3_ahigh_i.BLIF AHIGH_30_.OE +.names BGACK_030_INT_i.BLIF AHIGH_26_.OE 1 1 0 0 -.names un3_ahigh_i.BLIF AHIGH_31_.OE +.names BGACK_030_INT_i.BLIF AHIGH_27_.OE 1 1 0 0 -.names N_132.BLIF A_0_.OE +.names BGACK_030_INT_i.BLIF AHIGH_28_.OE +1 1 +0 0 +.names BGACK_030_INT_i.BLIF AHIGH_29_.OE +1 1 +0 0 +.names BGACK_030_INT_i.BLIF AHIGH_30_.OE +1 1 +0 0 +.names BGACK_030_INT_i.BLIF AHIGH_31_.OE +1 1 +0 0 +.names BGACK_030_INT_i.BLIF A_0_.OE 1 1 0 0 .names un21_berr.BLIF BERR.OE 1 1 0 0 -.names AS_000_DMA_i.BLIF DTACK.OE +.names BGACK_030_INT_i.BLIF RW.OE 1 1 0 0 -.names N_133.BLIF RW.OE +.names BGACK_030_INT_i.BLIF DS_030.OE 1 1 0 0 -.names N_132.BLIF DS_030.OE +.names un1_dsack1_i.BLIF DSACK1.OE 1 1 0 0 -.names nEXP_SPACE_c.BLIF DSACK1.OE +.names inst_BGACK_030_INTreg.BLIF VMA.OE 1 1 0 0 -.names un13_ciin_i.BLIF CIIN.OE +.names N_60.BLIF CIIN.OE 1 1 0 0 -.names IPL_D0_0_.BLIF ipl_c_0__n.BLIF G_122 +.names IPL_D0_0_.BLIF ipl_c_0__n.BLIF G_105 01 1 10 1 11 0 00 0 -.names IPL_D0_1_.BLIF ipl_c_1__n.BLIF G_123 +.names IPL_D0_1_.BLIF ipl_c_1__n.BLIF G_106 01 1 10 1 11 0 00 0 -.names IPL_D0_2_.BLIF ipl_c_2__n.BLIF G_124 +.names IPL_D0_2_.BLIF ipl_c_2__n.BLIF G_107 01 1 10 1 11 0 00 0 -.names cpu_est_0_.BLIF N_76.BLIF cpu_est_0_0_ -01 1 -10 1 -11 0 -00 0 -.names CYCLE_DMA_1_.BLIF N_199.BLIF G_97 -01 1 -10 1 -11 0 -00 0 -.names CYCLE_DMA_0_.BLIF pos_clk_un13_bgack_030_int_n.BLIF G_95 -01 1 -10 1 -11 0 -00 0 -.names CLK_030_PE_0_.BLIF pos_clk_un13_clk_out_int_n.BLIF G_101 -01 1 -10 1 -11 0 -00 0 -.names CLK_030_PE_1_.BLIF N_205.BLIF G_103 +.names CYCLE_DMA_1_.BLIF N_199.BLIF G_91 01 1 10 1 11 0 diff --git a/Logic/BUS68030.edi b/Logic/BUS68030.edi index 64d4f60..c1387ce 100644 --- a/Logic/BUS68030.edi +++ b/Logic/BUS68030.edi @@ -4,7 +4,7 @@ (keywordMap (keywordLevel 0)) (status (written - (timeStamp 2016 12 29 16 1 51) + (timeStamp 2017 12 30 0 43 31) (author "Synopsys, Inc.") (program "Synplify Pro" (version "I-2014.03LC , mapper maplat, Build 923R")) ) @@ -125,7 +125,7 @@ (port FPU_CS (direction OUTPUT)) (port FPU_SENSE (direction INPUT)) (port DSACK1 (direction OUTPUT)) - (port DTACK (direction INOUT)) + (port DTACK (direction INPUT)) (port AVEC (direction OUTPUT)) (port E (direction OUTPUT)) (port VPA (direction INPUT)) @@ -140,12 +140,6 @@ (port CIIN (direction OUTPUT)) ) (contents - (instance (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename SM_AMIGA_6 "SM_AMIGA[6]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename SM_AMIGA_5 "SM_AMIGA[5]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) (instance (rename SM_AMIGA_4 "SM_AMIGA[4]") (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance (rename SM_AMIGA_3 "SM_AMIGA[3]") (viewRef prim (cellRef DFF (libraryRef mach))) @@ -156,10 +150,6 @@ ) (instance (rename SM_AMIGA_0 "SM_AMIGA[0]") (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance (rename cpu_est_2 "cpu_est[2]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename cpu_est_3 "cpu_est[3]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) (instance (rename IPL_030DFF_0 "IPL_030DFF[0]") (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance (rename IPL_030DFF_1 "IPL_030DFF[1]") (viewRef prim (cellRef DFF (libraryRef mach))) @@ -172,7 +162,11 @@ ) (instance (rename IPL_D0_2 "IPL_D0[2]") (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance (rename CLK_000_D_0 "CLK_000_D[0]") (viewRef prim (cellRef DFF (libraryRef mach))) + (instance (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename SM_AMIGA_6 "SM_AMIGA[6]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename SM_AMIGA_5 "SM_AMIGA[5]") (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance (rename CLK_000_D_1 "CLK_000_D[1]") (viewRef prim (cellRef DFF (libraryRef mach))) ) @@ -182,27 +176,45 @@ ) (instance (rename CLK_000_D_4 "CLK_000_D[4]") (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance (rename CYCLE_DMA_0 "CYCLE_DMA[0]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CYCLE_DMA_1 "CYCLE_DMA[1]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_030_PE_0 "CLK_030_PE[0]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_030_PE_1 "CLK_030_PE[1]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) (instance (rename SIZE_DMA_0 "SIZE_DMA[0]") (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance (rename SIZE_DMA_1 "SIZE_DMA[1]") (viewRef prim (cellRef DFF (libraryRef mach))) ) + (instance (rename CYCLE_DMA_0 "CYCLE_DMA[0]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CYCLE_DMA_1 "CYCLE_DMA[1]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) (instance (rename cpu_est_0 "cpu_est[0]") (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance (rename cpu_est_1 "cpu_est[1]") (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance (rename RST_DLY_0 "RST_DLY[0]") (viewRef prim (cellRef DFF (libraryRef mach))) + (instance (rename cpu_est_2 "cpu_est[2]") (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance (rename RST_DLY_1 "RST_DLY[1]") (viewRef prim (cellRef DFF (libraryRef mach))) + (instance (rename cpu_est_3 "cpu_est[3]") (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance (rename RST_DLY_2 "RST_DLY[2]") (viewRef prim (cellRef DFF (libraryRef mach))) + (instance (rename CLK_000_D_0 "CLK_000_D[0]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance AMIGA_BUS_ENABLE_DMA_HIGH (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance VPA_D (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance DTACK_D0 (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance DS_000_ENABLE (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance BG_000DFF (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance LDS_000_INT (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance VMA_INT (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance RW_000_INT (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance AS_030_000_SYNC (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance BGACK_030_INT (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance AS_000_DMA (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance DS_000_DMA (viewRef prim (cellRef DFF (libraryRef mach))) ) @@ -212,39 +224,17 @@ ) (instance AMIGA_DS (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance AS_030_D0 (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance DTACK_D0 (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance VPA_D (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance RESET_OUT (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance DS_000_ENABLE (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance BG_000DFF (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance AMIGA_BUS_ENABLE_DMA_HIGH (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance AMIGA_BUS_ENABLE_DMA_LOW (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance UDS_000_INT (viewRef prim (cellRef DFF (libraryRef mach))) - ) (instance A0_DMA (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance RW_000_DMA (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance VMA_INT (viewRef prim (cellRef DFF (libraryRef mach))) + (instance AS_030_D0 (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance RW_000_INT (viewRef prim (cellRef DFF (libraryRef mach))) + (instance AMIGA_BUS_ENABLE_DMA_LOW (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance AS_030_000_SYNC (viewRef prim (cellRef DFF (libraryRef mach))) + (instance AS_030_D1 (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance LDS_000_INT (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance BGACK_030_INT (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance AS_000_DMA (viewRef prim (cellRef DFF (libraryRef mach))) + (instance UDS_000_INT (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance BGACK_030_INT_D (viewRef prim (cellRef DFF (libraryRef mach))) ) @@ -314,11 +304,11 @@ (instance (rename IPL_1 "IPL[1]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) (instance (rename IPL_2 "IPL[2]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) (instance DSACK1 (viewRef prim (cellRef BUFTH (libraryRef mach))) ) - (instance DTACK (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) + (instance DTACK (viewRef prim (cellRef IBUF (libraryRef mach))) ) (instance AVEC (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance E (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance VPA (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance VMA (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance VMA (viewRef prim (cellRef BUFTH (libraryRef mach))) ) (instance RST (viewRef prim (cellRef IBUF (libraryRef mach))) ) (instance RESET (viewRef prim (cellRef IBUF (libraryRef mach))) ) (instance RW (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) @@ -329,346 +319,408 @@ (instance AMIGA_BUS_ENABLE_LOW (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance AMIGA_BUS_ENABLE_HIGH (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance CIIN (viewRef prim (cellRef BUFTH (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_1_0 "SM_AMIGA_srsts_i_0_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0 "SM_AMIGA_srsts_i_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_i_0_1_0 "SM_AMIGA_nss_i_i_0_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_i_0_0 "SM_AMIGA_nss_i_i_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_1_5 "SM_AMIGA_srsts_i_0_1[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_5 "SM_AMIGA_srsts_i_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e0_i_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e0_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance G_125_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance G_125 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_e_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_i_0_1_3 "cpu_est_2_i_0_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_i_0_3 "cpu_est_2_i_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un6_bg_030_0_a2_1 "pos_clk.un6_bg_030_0_a2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un6_bg_030_0_a2 "pos_clk.un6_bg_030_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e1_i_a2_1_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e1_i_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un21_berr_0_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un21_berr_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un21_fpu_cs_0_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un21_fpu_cs_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un11_amiga_bus_enable_high_0_a2_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un11_amiga_bus_enable_high_0_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un29_clk_000_ne_1_1 "pos_clk.un29_clk_000_ne_1_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un29_clk_000_ne_1_2 "pos_clk.un29_clk_000_ne_1_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un29_clk_000_ne_1_3 "pos_clk.un29_clk_000_ne_1_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un29_clk_000_ne_1 "pos_clk.un29_clk_000_ne_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_a3_1 "pos_clk.un9_clk_000_pe_0_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_a3_2 "pos_clk.un9_clk_000_pe_0_a3_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_a3 "pos_clk.un9_clk_000_pe_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_a3_0_1 "pos_clk.un9_clk_000_pe_0_a3_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_a3_0_2 "pos_clk.un9_clk_000_pe_0_a3_0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_a3_0 "pos_clk.un9_clk_000_pe_0_a3_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_ENABLE_0_sqmuxa_1_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_ENABLE_0_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_a3_0_1_1 "cpu_est_2_0_0_a3_0_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_a3_0_1 "cpu_est_2_0_0_a3_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_e_i_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un6_amiga_bus_data_dir (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_as_000_dma6_1 "pos_clk.as_000_dma6_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_as_000_dma6_2 "pos_clk.as_000_dma6_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_as_000_dma6 "pos_clk.as_000_dma6") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_DMA_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_DMA_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un4_rw_000_1 "pos_clk.un4_rw_000_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un4_rw_000_2 "pos_clk.un4_rw_000_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un4_rw_000 "pos_clk.un4_rw_000") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un13_clk_out_int_1 "pos_clk.un13_clk_out_int_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un13_clk_out_int "pos_clk.un13_clk_out_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_2_0_a2_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_2_0_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e0_i_a2_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e0_i_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_a2_0 "pos_clk.un34_as_030_d0_i_a2_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_6 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_7 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_8 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_9 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_10 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_11 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un6_amiga_bus_data_dir_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un6_amiga_bus_data_dir_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_4 "SM_AMIGA_srsts_i[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_1_3 "SM_AMIGA_srsts_i_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_3 "SM_AMIGA_srsts_i[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_1_2 "SM_AMIGA_srsts_i_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_2 "SM_AMIGA_srsts_i[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_1_3 "SM_AMIGA_srsts_i_0_0_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_3 "SM_AMIGA_srsts_i_0_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_1_2 "SM_AMIGA_srsts_i_0_0_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_2 "SM_AMIGA_srsts_i_0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_1_0 "SM_AMIGA_srsts_i_0_0_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_0 "SM_AMIGA_srsts_i_0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un11_amiga_bus_enable_high_0_0_a2_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un11_amiga_bus_enable_high_0_0_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_e_0_0_a2_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_e_0_0_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_a2_0_1_1 "cpu_est_2_0_0_a2_0_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_a2_0_1 "cpu_est_2_0_0_a2_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_108_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_108 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_as_000_dma6_i_0_0_2 "pos_clk.as_000_dma6_i_0_0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_as_000_dma6_i_0_0 "pos_clk.as_000_dma6_i_0_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_iv_0_0_a2_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_iv_0_0_a2_0_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_iv_0_0_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un6_bg_030_0_a3_i_1 "pos_clk.un6_bg_030_0_a3_i_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un6_bg_030_0_a3_i "pos_clk.un6_bg_030_0_a3_i") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_i_0_0_1_0 "SM_AMIGA_nss_i_i_0_0_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_i_0_0_0 "SM_AMIGA_nss_i_i_0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_1_6 "SM_AMIGA_srsts_i_0_0_1[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_6 "SM_AMIGA_srsts_i_0_0[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_1_5 "SM_AMIGA_srsts_i_0_0_1[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_5 "SM_AMIGA_srsts_i_0_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_1_4 "SM_AMIGA_srsts_i_0_0_1[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_4 "SM_AMIGA_srsts_i_0_0[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un21_fpu_cs_0_a3_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un21_berr_0_a3_0_a2_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un21_berr_0_a3_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_CYCLE_DMA_5_1_1 "pos_clk.CYCLE_DMA_5_1_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_CYCLE_DMA_5_1 "pos_clk.CYCLE_DMA_5_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_90_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_90 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_DMA_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_DMA_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_as_000_dma6_i_0_0_a2_1 "pos_clk.as_000_dma6_i_0_0_a2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_as_000_dma6_i_0_0_a2 "pos_clk.as_000_dma6_i_0_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_CYCLE_DMA_5_0_i_1 "pos_clk.CYCLE_DMA_5_0_i_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_CYCLE_DMA_5_0_i_2 "pos_clk.CYCLE_DMA_5_0_i_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_CYCLE_DMA_5_0_i "pos_clk.CYCLE_DMA_5_0_i") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_as_000_dma6_i_0_0_1 "pos_clk.as_000_dma6_i_0_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_o2_2 "SM_AMIGA_srsts_i_0_0_o2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_1_1 "SM_AMIGA_srsts_i_0_0_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_2_1 "SM_AMIGA_srsts_i_0_0_2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_1 "SM_AMIGA_srsts_i_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_0_a2_0_1 "pos_clk.un9_clk_000_pe_0_0_a2_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_0_a2_0_2 "pos_clk.un9_clk_000_pe_0_0_a2_0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_0_a2_0 "pos_clk.un9_clk_000_pe_0_0_a2_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_0_a2_1 "pos_clk.un9_clk_000_pe_0_0_a2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_0_a2_2 "pos_clk.un9_clk_000_pe_0_0_a2_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_0_a2 "pos_clk.un9_clk_000_pe_0_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d1_i_i_a2_1 "pos_clk.un34_as_030_d1_i_i_a2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d1_i_i_a2_2 "pos_clk.un34_as_030_d1_i_i_a2_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d1_i_i_a2_3 "pos_clk.un34_as_030_d1_i_i_a2_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d1_i_i_a2 "pos_clk.un34_as_030_d1_i_i_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un21_fpu_cs_0_a3_0_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a2_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a2_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a2_6 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a2_7 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a2_8 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a2_9 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a2_10 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a2_11 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_a2_1_1_3 "SM_AMIGA_srsts_i_0_0_a2_1_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_a2_1_2_3 "SM_AMIGA_srsts_i_0_0_a2_1_2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_a2_1_3 "SM_AMIGA_srsts_i_0_0_a2_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_o2_0_1_3 "SM_AMIGA_srsts_i_0_0_o2_0_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_o2_0_3 "SM_AMIGA_srsts_i_0_0_o2_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_o2_1_2 "SM_AMIGA_srsts_i_0_0_o2_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance UDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_UDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_i_0_0_o2_1_0 "SM_AMIGA_nss_i_i_0_0_o2_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_i_0_0_o2_2_0 "SM_AMIGA_nss_i_i_0_0_o2_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_i_0_0_o2_0 "SM_AMIGA_nss_i_i_0_0_o2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d1_i_i_o2_1 "pos_clk.un34_as_030_d1_i_i_o2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d1_i_i_o2_2 "pos_clk.un34_as_030_d1_i_i_o2_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d1_i_i_o2_3 "pos_clk.un34_as_030_d1_i_i_o2_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d1_i_i_o2_4 "pos_clk.un34_as_030_d1_i_i_o2_4") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d1_i_i_o2 "pos_clk.un34_as_030_d1_i_i_o2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename pos_clk_un10_sm_amiga_1 "pos_clk.un10_sm_amiga_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename pos_clk_un10_sm_amiga "pos_clk.un10_sm_amiga") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un15_clk_000_d_i_i_o2_1 "pos_clk.un15_clk_000_d_i_i_o2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un15_clk_000_d_i_i_o2_2 "pos_clk.un15_clk_000_d_i_i_o2_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un15_clk_000_d_i_i_o2 "pos_clk.un15_clk_000_d_i_i_o2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_a2_0_1 "pos_clk.un34_as_030_d0_i_a2_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_a2_0_2 "pos_clk.un34_as_030_d0_i_a2_0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_a2_0_3 "pos_clk.un34_as_030_d0_i_a2_0_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_a2_0_4 "pos_clk.un34_as_030_d0_i_a2_0_4") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_a2_0_5 "pos_clk.un34_as_030_d0_i_a2_0_5") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RW_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_o2_1 "pos_clk.un34_as_030_d0_i_o2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_o2_2 "pos_clk.un34_as_030_d0_i_o2_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_o2_3 "pos_clk.un34_as_030_d0_i_o2_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_o2 "pos_clk.un34_as_030_d0_i_o2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e2_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e1_i_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e1_i_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e1_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_1_1 "SM_AMIGA_srsts_i_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_1 "SM_AMIGA_srsts_i[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_1_6 "SM_AMIGA_srsts_i_1[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_6 "SM_AMIGA_srsts_i[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_1_4 "SM_AMIGA_srsts_i_1[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_sqmuxa_1_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RW_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_RW_000_INT_5_i "pos_clk.RW_000_INT_5_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename CLK_000_D_i_3 "CLK_000_D_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_25_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_030_1_i_1 "IPL_030_1_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_24_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a2_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a2_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_1_i_0 "IPL_030_1_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_c_i_2 "IPL_c_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_D0_0_i_2 "IPL_D0_0_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename IPL_c_i_1 "IPL_c_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename IPL_D0_0_i_1 "IPL_D0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename IPL_c_i_0 "IPL_c_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename IPL_D0_0_i_0 "IPL_D0_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_14_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_15_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_16_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_254_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_263_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_256_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_101_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_103_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_104_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_105_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_115_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_116_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_131_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_277_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_i "pos_clk.un34_as_030_d0_i_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_o2_i "pos_clk.un34_as_030_d0_i_o2_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un15_clk_000_d_i_i_o2_i "pos_clk.un15_clk_000_d_i_i_o2_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un5_bgack_030_int_d_i_0 "pos_clk.un5_bgack_030_int_d_i_0") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i "pos_clk.AMIGA_BUS_ENABLE_DMA_HIGH_3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i "pos_clk.AMIGA_BUS_ENABLE_DMA_LOW_3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_RW_000_DMA_3_i "pos_clk.RW_000_DMA_3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance UDS_000_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DTACK_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DTACK_D0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VPA_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VPA_D_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_13_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VMA_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance LDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_LDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_147_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_148_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_i_1 "cpu_est_2_0_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_146_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance A0_DMA_0_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_145_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_DS_0_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_143_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_144_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_0_i "pos_clk.un9_clk_000_pe_0_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_20_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_030_1_i_2 "IPL_030_1_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_19_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_030_1_i_1 "IPL_030_1_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_18_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_182_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_181_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_260_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_0_i_1 "pos_clk.SIZE_DMA_6_0_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_259_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_0_i_0 "pos_clk.SIZE_DMA_6_0_0_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DS_000_ENABLE_1_sqmuxa_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_155_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_162_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un5_e_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_154_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_i_3 "cpu_est_2_0_0_0_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_149_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_208_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_i_2 "cpu_est_2_0_0_0_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VMA_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_o2_i_2 "cpu_est_2_0_0_0_o2_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_SM_AMIGA_0_sqmuxa_1_0_1_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_o2_i_3 "cpu_est_2_0_0_0_o2_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_o2_i_1 "SM_AMIGA_srsts_i_0_0_o2_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_130_i_0_o2_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un6_bg_030_0_a3_i_i "pos_clk.un6_bg_030_0_a3_i_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_190_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_191_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_267_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_266_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_186_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_185_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_183_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_184_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_268_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_o2_i_6 "SM_AMIGA_srsts_i_0_0_o2_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_142_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_141_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_o2_i_4 "SM_AMIGA_srsts_i_0_0_o2_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_o2_i_2 "SM_AMIGA_srsts_i_0_0_o2_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_o2_0_i_3 "SM_AMIGA_srsts_i_0_0_o2_0_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance LDS_000_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_o2_i_0 "pos_clk.SIZE_DMA_6_0_0_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_129_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_130_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_117_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_DS_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_107_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_i_0 "pos_clk.SIZE_DMA_6_0_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_106_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_i_1 "pos_clk.SIZE_DMA_6_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance UDS_000_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_0_o2_i_0 "pos_clk.SIZE_DMA_6_0_0_0_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_o2_i_3 "SM_AMIGA_srsts_i_0_0_o2_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_203_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_201_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_202_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un13_ciin_i_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_274_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un6_bgack_000_0_0_i "pos_clk.un6_bgack_000_0_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RW_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_RW_000_INT_5_0_0_i "pos_clk.RW_000_INT_5_0_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_168_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_167_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_170_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_169_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_030_D0_0_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_SM_AMIGA_0_sqmuxa_1_0_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d1_i_i_o2_i "pos_clk.un34_as_030_d1_i_i_o2_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename CLK_000_D_i_3 "CLK_000_D_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_i_0_0_o2_i_0 "SM_AMIGA_nss_i_i_0_0_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_o2_i_0 "SM_AMIGA_srsts_i_0_0_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_15_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance LDS_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_12_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RW_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_11_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_5_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance BGACK_030_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_c_i_0 "A_c_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SIZE_c_i_1 "SIZE_c_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_163_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d1_i_i_i "pos_clk.un34_as_030_d1_i_i_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_164_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_165_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un10_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_180_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_262_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_iv_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance G_99_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_3_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance DS_000_DMA_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_4_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance AS_000_DMA_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un6_amiga_bus_data_dir_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un12_amiga_bus_data_dir_m_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_iv_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_22_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_DMA_HIGH_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_21_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_DMA_LOW_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_19_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance A0_DMA_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_18_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RW_000_DMA_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_108_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_111_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e2_i_2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VPA_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VPA_D_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DTACK_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DTACK_D0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un4_bgack_000_i "pos_clk.un4_bgack_000_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un6_bgack_000_i "pos_clk.un6_bgack_000_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_7_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance BGACK_030_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un1_bgack_030_int_i "pos_clk.un1_bgack_030_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance G_121_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance G_116_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance G_111_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_98_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un31_clk_000_ne_i_0 "pos_clk.un31_clk_000_ne_i_0") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_121_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_120_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_125_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_124_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RESET_OUT_2_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_134_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e2_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e2_i_o2_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_o2_i_0 "SM_AMIGA_srsts_i_0_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_112_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_113_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_114_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_109_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_118_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_255_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_257_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_i_2 "cpu_est_2_0_0_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_258_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_259_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_i_1 "cpu_est_2_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_262_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_261_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_i "pos_clk.un9_clk_000_pe_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_2_i_0_o2_i_3 "cpu_est_2_i_0_o2_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un5_e_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_000_NE_0_o3_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_17_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VMA_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DS_000_ENABLE_0_sqmuxa_0_o3_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_o3_i_4 "SM_AMIGA_srsts_i_o3_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_o3_i_2 "SM_AMIGA_srsts_i_o3_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_o3_i_6 "SM_AMIGA_srsts_i_o3_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_165_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_167_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_166_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_168_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_170_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_164_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_102_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_o4_i_i_1 "SM_AMIGA_srsts_i_o4_i_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_sqmuxa_1_0_o3_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_000_PE_0_o3_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_119_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_LDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_23_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance BG_000_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_20_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance UDS_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_13_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance LDS_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_c_i_2 "IPL_c_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_D0_0_i_2 "IPL_D0_0_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_26_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_030_1_i_2 "IPL_030_1_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_c_i_0 "A_c_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SIZE_c_i_1 "SIZE_c_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DS_000_ENABLE_0_sqmuxa_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_DS_000_ENABLE_0_sqmuxa_i_0 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_rst_2_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance BG_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un6_bg_030_i "pos_clk.un6_bg_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename pos_clk_un9_bg_030_i "pos_clk.un9_bg_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance UDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_UDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance LDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_UDS_000_INT (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_ENABLE_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BG_000_0_r "BG_000_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename BG_000_0_m "BG_000_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BG_000_0_n "BG_000_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BG_000_0_p "BG_000_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance N_17_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance UDS_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_16_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance BG_000_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_as_000_dma6_i_0_0_i "pos_clk.as_000_dma6_i_0_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_140_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_DS_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_199_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_198_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_208 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_iv_0_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename CYCLE_DMA_i_0 "CYCLE_DMA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_CYCLE_DMA_5_0_i_a2 "pos_clk.CYCLE_DMA_5_0_i_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_iv_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance BGACK_030_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance nEXP_SPACE_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_207 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_amiga_bus_enable_low_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un21_fpu_cs_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_DMA_LOW_0_i_a3_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename A_i_1 "A_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_DMA_HIGH_0_i_a3_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_DMA_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un3_as_030 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_DMA_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un2_ds_030 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_r "DS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_m "DS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_n "DS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_p "DS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_r "AS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_m "AS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_n "AS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_p "AS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance AS_000_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_99 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename CYCLE_DMA_i_1 "CYCLE_DMA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_EXP_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance G_91 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance LDS_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance BG_000_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance UDS_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename UDS_000_INT_0_r "UDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename UDS_000_INT_0_m "UDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename UDS_000_INT_0_n "UDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename UDS_000_INT_0_p "UDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename BG_000_0_r "BG_000_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename BG_000_0_m "BG_000_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BG_000_0_n "BG_000_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BG_000_0_p "BG_000_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (instance (rename LDS_000_INT_0_r "LDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename LDS_000_INT_0_m "LDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename LDS_000_INT_0_n "LDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename LDS_000_INT_0_p "LDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename DS_000_ENABLE_0_r "DS_000_ENABLE_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DS_000_ENABLE_0_m "DS_000_ENABLE_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_ENABLE_0_n "DS_000_ENABLE_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_ENABLE_0_p "DS_000_ENABLE_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename AS_030_D1_0_r "AS_030_D1_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_030_D1_0_m "AS_030_D1_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_030_D1_0_n "AS_030_D1_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_030_D1_0_p "AS_030_D1_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename RW_000_INT_0_r "RW_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename RW_000_INT_0_m "RW_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RW_000_INT_0_n "RW_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RW_000_INT_0_p "RW_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_r "AS_030_000_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_m "AS_030_000_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_n "AS_030_000_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_p "AS_030_000_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename BGACK_030_INT_0_r "BGACK_030_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename BGACK_030_INT_0_m "BGACK_030_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BGACK_030_INT_0_n "BGACK_030_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BGACK_030_INT_0_p "BGACK_030_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (instance (rename pos_clk_un9_bg_030 "pos_clk.un9_bg_030") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_amiga_bus_enable_low_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un21_fpu_cs_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_a4_3 "SM_AMIGA_srsts_i_a4[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_a4_2 "SM_AMIGA_srsts_i_a4[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_a4_1 "SM_AMIGA_srsts_i_a4[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_DS_000_ENABLE_0_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance G_124 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance (rename IPL_030_0_2__r "IPL_030_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_030_0_2__m "IPL_030_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_2__n "IPL_030_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_2__p "IPL_030_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename IPL_030_1_2 "IPL_030_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_D0_0_2 "IPL_D0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance LDS_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance UDS_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance BG_000_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_LDS_000_INT (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_INT_0_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename CLK_000_D_i_0 "CLK_000_D_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_000_PE_0_o3_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_sqmuxa_1_0_o3_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_o4_i_1 "SM_AMIGA_srsts_i_o4_i[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_o3_6 "SM_AMIGA_srsts_i_o3[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_o3_2 "SM_AMIGA_srsts_i_o3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_o3_4 "SM_AMIGA_srsts_i_o3[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_ENABLE_0_sqmuxa_0_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_a4_6 "SM_AMIGA_srsts_i_a4[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_a4_4 "SM_AMIGA_srsts_i_a4[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_a4_0_3 "SM_AMIGA_srsts_i_a4_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_i_0_a3_3 "cpu_est_2_i_0_a3[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_i_2 "cpu_est_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un5_e_i_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_e_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_0 "cpu_est_0[0]") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance I_220 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DS_000_ENABLE_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_o4_i_a2_1 "SM_AMIGA_srsts_i_o4_i_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_i_7 "SM_AMIGA_i_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_i_0_a2_0 "SM_AMIGA_nss_i_i_0_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_i_0_a2_0_0 "SM_AMIGA_nss_i_i_0_a2_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_a2_5 "SM_AMIGA_srsts_i_0_a2[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_000_INT_0_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_INT_0_i_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename CLK_000_D_i_1 "CLK_000_D_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_000_NE_0_o3_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_e_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_i_1 "cpu_est_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_2_i_0_o2_3 "cpu_est_2_i_0_o2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0 "pos_clk.un9_clk_000_pe_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_1 "cpu_est_2_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_2 "cpu_est_2_0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_i_3 "cpu_est_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un5_e_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_i_0 "cpu_est_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_a3_1 "cpu_est_2_0_0_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_a3_2 "cpu_est_2_0_0_a3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_i_0_a3_0_3 "cpu_est_2_i_0_a3_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RST_DLY_i_1 "RST_DLY_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e1_i_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e1_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RST_DLY_i_2 "RST_DLY_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e2_i_a2_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_DMA_LOW_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_amiga_bus_enable_low (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_rst_2_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RW_000_DMA_0_i_a3_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_a2_5 "SM_AMIGA_srsts_i_0_0_a2[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_a2_0 "SM_AMIGA_srsts_i_0_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VMA_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un31_clk_000_ne "pos_clk.un31_clk_000_ne") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename VMA_INT_0_r "VMA_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename VMA_INT_0_m "VMA_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename VMA_INT_0_n "VMA_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename VMA_INT_0_p "VMA_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance VMA_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_a2_0 "SM_AMIGA_srsts_i_0_0_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_INT_0_i_0_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_INT_0_i_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_0_i_0_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_0_i_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_DMA_HIGH_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un11_amiga_bus_enable_high_0_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename A_DECODE_i_16 "A_DECODE_i[16]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_DECODE_i_19 "A_DECODE_i[19]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_DECODE_i_18 "A_DECODE_i[18]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance BGACK_030_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RW_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un11_amiga_bus_enable_high_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d1_i_i "pos_clk.un34_as_030_d1_i_i") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_DMA_HIGH_1_sqmuxa_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_dsack1_0_o3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un6_bgack_000_0_0_a2 "pos_clk.un6_bgack_000_0_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_DSACK1_INT_1_i_a2_0_a2 "pos_clk.DSACK1_INT_1_i_a2_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance I_210 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_AS_000_INT_1_i_a2_0_a2 "pos_clk.AS_000_INT_1_i_a2_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_i_7 "SM_AMIGA_i_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_i_0_0_a2_0 "SM_AMIGA_nss_i_i_0_0_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_a2_6 "SM_AMIGA_srsts_i_0_0_a2[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_i_3 "cpu_est_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_030_D1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance FPU_SENSE_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un21_berr_0_a3_0_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_o2_6 "SM_AMIGA_srsts_i_0_0_o2[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_RW_000_INT_5_0_0_o2 "pos_clk.RW_000_INT_5_0_0_o2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_o2_0 "SM_AMIGA_srsts_i_0_0_o2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_SM_AMIGA_0_sqmuxa_1_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_D0_0_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_INT_0_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_0_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_RW_000_INT_5_0_0 "pos_clk.RW_000_INT_5_0_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un6_bgack_000_0_0 "pos_clk.un6_bgack_000_0_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename CLK_000_D_i_0 "CLK_000_D_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_o2_1 "SM_AMIGA_srsts_i_0_0_o2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_o2_3 "cpu_est_2_0_0_0_o2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_0_o2 "pos_clk.un9_clk_000_pe_0_0_o2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_SM_AMIGA_0_sqmuxa_1_0_1_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_i_1 "cpu_est_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_o2_2 "cpu_est_2_0_0_0_o2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_o2_3 "SM_AMIGA_srsts_i_0_0_o2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_0_o2_0 "pos_clk.SIZE_DMA_6_0_0_0_o2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_o2_4 "SM_AMIGA_srsts_i_0_0_o2[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_i_0 "cpu_est_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_a2_0_2 "cpu_est_2_0_0_a2_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_0 "pos_clk.un9_clk_000_pe_0_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_DS_0_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance A0_DMA_0_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_1 "cpu_est_2_0_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_2 "cpu_est_2_0_0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_3 "cpu_est_2_0_0_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_e_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_ENABLE_1_sqmuxa_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_0_0 "pos_clk.SIZE_DMA_6_0_0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_0_1 "pos_clk.SIZE_DMA_6_0_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_0_0_0 "cpu_est_0_0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename CLK_000_D_i_1 "CLK_000_D_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_130_i_0_o2_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_0_a2_0 "pos_clk.SIZE_DMA_6_0_0_0_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_0_a2_1 "pos_clk.SIZE_DMA_6_0_0_0_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_a2_2 "SM_AMIGA_srsts_i_0_0_a2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_a2_3 "SM_AMIGA_srsts_i_0_0_a2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_a2_0_3 "SM_AMIGA_srsts_i_0_0_a2_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_a2_4 "SM_AMIGA_srsts_i_0_0_a2[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_i_0_0_a2_0_0 "SM_AMIGA_nss_i_i_0_0_a2_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_0_0_a2_0 "cpu_est_0_0_0_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_0_0_a2_0_0 "cpu_est_0_0_0_a2_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DTACK_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_a2_2_3 "SM_AMIGA_srsts_i_0_0_a2_2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_i_2 "cpu_est_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_214 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_215 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_212 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_213 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance G_105 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance G_106 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance G_107 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_a2_1 "SM_AMIGA_srsts_i_0_0_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0_a2_0_1 "SM_AMIGA_srsts_i_0_0_a2_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_DS_0_0_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance A0_DMA_0_0_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_a2_1 "cpu_est_2_0_0_0_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_a2_2 "cpu_est_2_0_0_0_a2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_a2_3 "cpu_est_2_0_0_0_a2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_e_0_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance CLK_OUT_PRE_50_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_187_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_188_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_189_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_218 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_219 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_216 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_217 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_126_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_150_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_151_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_D0_0_1 "IPL_D0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_D0_0_2 "IPL_D0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_1_0 "IPL_030_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_1_1 "IPL_030_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_1_2 "IPL_030_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_est_0_1__r "cpu_est_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename cpu_est_0_1__m "cpu_est_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_est_0_1__n "cpu_est_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) @@ -681,171 +733,6 @@ (instance (rename cpu_est_0_3__m "cpu_est_0_3_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_est_0_3__n "cpu_est_0_3_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_est_0_3__p "cpu_est_0_3_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_o2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_0_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_1_sqmuxa_i_0_132_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_D0_0_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_1_sqmuxa_i_0_132_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_137_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e2_i_a2_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_2_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_0_i_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DSACK1_INT_0_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RST_DLY_i_0 "RST_DLY_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e0_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un6_bgack_000 "pos_clk.un6_bgack_000") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un4_bgack_000 "pos_clk.un4_bgack_000") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un3_ahigh (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DTACK_D0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_D_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_as_000_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance nEXP_SPACE_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un2_as_030_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance BGACK_030_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_rw_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un4_as_030_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DTACK_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un31_clk_000_ne_1_i_m2_r "pos_clk.un31_clk_000_ne_1_i_m2.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un31_clk_000_ne_1_i_m2_m "pos_clk.un31_clk_000_ne_1_i_m2.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un31_clk_000_ne_1_i_m2_n "pos_clk.un31_clk_000_ne_1_i_m2.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un31_clk_000_ne_1_i_m2_p "pos_clk.un31_clk_000_ne_1_i_m2.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_o2_0 "SM_AMIGA_srsts_i_0_o2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_CLK_030_PE_4_1 "pos_clk.CLK_030_PE_4_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_rst_2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_rst_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_DS_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_223 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un4_rw_000_i "pos_clk.un4_rw_000_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DS_000_DMA_0_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_222 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename CLK_030_PE_i_1 "CLK_030_PE_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_000_DMA_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance G_95 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance G_101 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance G_103 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance (rename BGACK_030_INT_0_r "BGACK_030_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename BGACK_030_INT_0_m "BGACK_030_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BGACK_030_INT_0_n "BGACK_030_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BGACK_030_INT_0_p "BGACK_030_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance BGACK_030_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename CYCLE_DMA_i_0 "CYCLE_DMA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename CYCLE_DMA_i_1 "CYCLE_DMA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance G_111 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance G_116 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance G_121 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance G_97 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance un7_as_030 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un13_bgack_030_int "pos_clk.un13_bgack_030_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un1_bgack_030_int "pos_clk.un1_bgack_030_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un3_clk_out_int_i "pos_clk.un3_clk_out_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DS_000_DMA_0_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_rst_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_DMA_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_0 "pos_clk.CYCLE_DMA_5_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_CLK_030_PE_4_0 "pos_clk.CLK_030_PE_4_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_amiga_bus_enable_low (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_iv (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un12_amiga_bus_data_dir_m (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_EXP_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un3_clk_out_int "pos_clk.un3_clk_out_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_DMA_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un6_ds_030 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_r "DS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_m "DS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_n "DS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_p "DS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename pos_clk_as_000_dma6_i "pos_clk.as_000_dma6_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_r "AS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_m "AS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_n "AS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_p "AS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_1 "pos_clk.CYCLE_DMA_5_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance G_96 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance G_102 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance I_226 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_227 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_224 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_225 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_1__r "SIZE_DMA_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_1__m "SIZE_DMA_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_1__n "SIZE_DMA_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_1__p "SIZE_DMA_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_0__r "SIZE_DMA_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_0__m "SIZE_DMA_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_0__n "SIZE_DMA_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_0__p "SIZE_DMA_0_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance RW_000_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance A0_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_DMA_LOW_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_DMA_HIGH_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_r "AMIGA_BUS_ENABLE_DMA_HIGH_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_m "AMIGA_BUS_ENABLE_DMA_HIGH_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_n "AMIGA_BUS_ENABLE_DMA_HIGH_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_p "AMIGA_BUS_ENABLE_DMA_HIGH_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_r "AMIGA_BUS_ENABLE_DMA_LOW_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_m "AMIGA_BUS_ENABLE_DMA_LOW_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_n "AMIGA_BUS_ENABLE_DMA_LOW_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_p "AMIGA_BUS_ENABLE_DMA_LOW_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename A0_DMA_0_r "A0_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A0_DMA_0_m "A0_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename A0_DMA_0_n "A0_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename A0_DMA_0_p "A0_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename RW_000_DMA_0_r "RW_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename RW_000_DMA_0_m "RW_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_DMA_0_n "RW_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_DMA_0_p "RW_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_DMA_LOW_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_1 "pos_clk.SIZE_DMA_6_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_0 "pos_clk.SIZE_DMA_6_0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_DS_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un11_amiga_bus_enable_high_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_o2_0 "pos_clk.SIZE_DMA_6_0_0_o2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_RW_000_DMA_3 "pos_clk.RW_000_DMA_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename A_i_1 "A_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3 "pos_clk.AMIGA_BUS_ENABLE_DMA_LOW_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3 "pos_clk.AMIGA_BUS_ENABLE_DMA_HIGH_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SIZE_DMA_3_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un5_bgack_030_int_d "pos_clk.un5_bgack_030_int_d") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance I_230 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_231 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_228 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_229 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i "pos_clk.un34_as_030_d0_i") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_a2 "pos_clk.un34_as_030_d0_i_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance FPU_SENSE_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un10_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un13_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_a2_1 "pos_clk.SIZE_DMA_6_0_0_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_a2_0 "pos_clk.SIZE_DMA_6_0_0_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_DS_0_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_AS_000_INT_1_i_a2 "pos_clk.AS_000_INT_1_i_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_DSACK1_INT_1_i_a2 "pos_clk.DSACK1_INT_1_i_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_A0_DMA_3_0_a2 "pos_clk.A0_DMA_3_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_DMA_HIGH_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un11_amiga_bus_enable_high_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_OUT_PRE_50_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_224_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_225_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_226_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_DECODE_i_18 "A_DECODE_i[18]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_DECODE_i_19 "A_DECODE_i[19]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance G_122 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance G_123 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance (rename A_DECODE_i_16 "A_DECODE_i[16]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_RW_000_INT_5 "pos_clk.RW_000_INT_5") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_sqmuxa_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_o4_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_rst_2_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_245_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_274_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename IPL_030_0_0__r "IPL_030_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename IPL_030_0_0__m "IPL_030_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_0_0__n "IPL_030_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) @@ -854,44 +741,46 @@ (instance (rename IPL_030_0_1__m "IPL_030_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_0_1__n "IPL_030_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_0_1__p "IPL_030_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance un7_as_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_122_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_123_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un6_ds_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un13_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_r "AS_030_000_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_m "AS_030_000_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_n "AS_030_000_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_p "AS_030_000_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename RW_000_INT_0_r "RW_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename RW_000_INT_0_m "RW_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_INT_0_n "RW_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_INT_0_p "RW_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance RW_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_2__r "IPL_030_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_030_0_2__m "IPL_030_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_2__n "IPL_030_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_2__p "IPL_030_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance un3_as_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_175_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_219_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un2_ds_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DS_000_ENABLE_0_r "DS_000_ENABLE_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DS_000_ENABLE_0_m "DS_000_ENABLE_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_ENABLE_0_n "DS_000_ENABLE_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_ENABLE_0_p "DS_000_ENABLE_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename VMA_INT_0_r "VMA_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename VMA_INT_0_m "VMA_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename VMA_INT_0_n "VMA_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename VMA_INT_0_p "VMA_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance DS_000_ENABLE_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_UDS_000_INT (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_LDS_000_INT (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VMA_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_D_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DTACK_D0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_D0_0_0 "IPL_D0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_D0_0_1 "IPL_D0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_1_0 "IPL_030_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_1_1 "IPL_030_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (net BGACK_030_INT (joined (portRef Q (instanceRef BGACK_030_INT)) - (portRef I0 (instanceRef pos_clk_un5_bgack_030_int_d)) - (portRef I0 (instanceRef un12_amiga_bus_data_dir_m)) + (portRef I0 (instanceRef un1_dsack1_0_o3_0)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1_sqmuxa_i_0)) (portRef I0 (instanceRef BGACK_030_INT_0_n)) (portRef I0 (instanceRef BGACK_030_INT_i)) - (portRef I0 (instanceRef un1_as_000_0)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_o2_1)) - (portRef I0 (instanceRef un11_amiga_bus_enable_high_0_a2_0_1)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a2)) + (portRef I0 (instanceRef un11_amiga_bus_enable_high_0_0_a2_0_1)) (portRef I0 (instanceRef BGACK_030)) + (portRef OE (instanceRef VMA)) )) (net VCC (joined (portRef I0 (instanceRef AVEC)) )) - (net VMA_INT (joined - (portRef Q (instanceRef VMA_INT)) - (portRef I0 (instanceRef VMA_INT_0_n)) - (portRef I0 (instanceRef VMA_INT_i)) - (portRef I0 (instanceRef VMA)) + (net un5_e (joined + (portRef O (instanceRef un5_e_0_0_i)) + (portRef I0 (instanceRef E)) )) (net GND (joined (portRef I0 (instanceRef AHIGH_24)) @@ -904,104 +793,97 @@ (portRef I0 (instanceRef AHIGH_31)) (portRef I0 (instanceRef AMIGA_ADDR_ENABLE)) (portRef I0 (instanceRef BERR)) - (portRef I0 (instanceRef DTACK)) )) (net un1_amiga_bus_enable_low (joined (portRef O (instanceRef un1_amiga_bus_enable_low)) (portRef I0 (instanceRef un1_amiga_bus_enable_low_i)) )) - (net un7_as_030 (joined - (portRef O (instanceRef un7_as_030)) - (portRef I0 (instanceRef un7_as_030_i)) - )) - (net un1_LDS_000_INT (joined - (portRef O (instanceRef un1_LDS_000_INT_i)) - (portRef I0 (instanceRef LDS_000)) + (net un3_as_030 (joined + (portRef O (instanceRef un3_as_030)) + (portRef I0 (instanceRef un3_as_030_i)) )) (net un1_UDS_000_INT (joined (portRef O (instanceRef un1_UDS_000_INT_i)) (portRef I0 (instanceRef UDS_000)) )) - (net un1_SM_AMIGA_0_sqmuxa_1 (joined - (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_i)) - (portRef I1 (instanceRef RW_000_INT_0_m)) - (portRef I0 (instanceRef RW_000_INT_0_r)) + (net un1_LDS_000_INT (joined + (portRef O (instanceRef un1_LDS_000_INT_i)) + (portRef I0 (instanceRef LDS_000)) + )) + (net un1_DS_000_ENABLE_0_sqmuxa (joined + (portRef O (instanceRef un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_o2_i)) + (portRef I0 (instanceRef DS_000_ENABLE_0_m)) )) (net un10_ciin (joined - (portRef O (instanceRef un10_ciin)) + (portRef O (instanceRef un13_ciin_i_0_0_a2)) (portRef I0 (instanceRef un10_ciin_i)) (portRef I0 (instanceRef CIIN)) )) (net un21_fpu_cs (joined - (portRef O (instanceRef un21_fpu_cs_0_a2)) + (portRef O (instanceRef un21_fpu_cs_0_a3_0_a2)) (portRef I0 (instanceRef un21_fpu_cs_i)) )) (net un21_berr (joined - (portRef O (instanceRef un21_berr_0_a2)) + (portRef O (instanceRef un21_berr_0_a3_0_a2)) (portRef OE (instanceRef BERR)) )) - (net un6_ds_030 (joined - (portRef O (instanceRef un6_ds_030)) - (portRef I0 (instanceRef un6_ds_030_i)) + (net un2_ds_030 (joined + (portRef O (instanceRef un2_ds_030)) + (portRef I0 (instanceRef un2_ds_030_i)) )) - (net un13_ciin (joined - (portRef O (instanceRef un13_ciin)) - (portRef I0 (instanceRef un13_ciin_i)) + (net (rename cpu_est_0 "cpu_est[0]") (joined + (portRef Q (instanceRef cpu_est_0)) + (portRef I1 (instanceRef cpu_est_0_0_0_a2_0_0)) + (portRef I0 (instanceRef cpu_est_i_0)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_o2_2)) + (portRef I0 (instanceRef cpu_est_2_0_0_a2_0_1_1)) )) (net (rename cpu_est_1 "cpu_est[1]") (joined (portRef Q (instanceRef cpu_est_1)) (portRef I0 (instanceRef cpu_est_0_1__m)) - (portRef I0 (instanceRef cpu_est_2_0_0_a3_1)) - (portRef I1 (instanceRef cpu_est_2_i_0_o2_3)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_a2_1)) + (portRef I1 (instanceRef cpu_est_2_0_0_0_o2_2)) (portRef I0 (instanceRef cpu_est_i_1)) - (portRef I0 (instanceRef un5_e_i_o2)) - (portRef I0 (instanceRef un5_e_i_a3_0)) + (portRef I0 (instanceRef un5_e_0_0_a2_0_1)) )) (net (rename cpu_est_2 "cpu_est[2]") (joined (portRef Q (instanceRef cpu_est_2)) (portRef I0 (instanceRef cpu_est_0_2__m)) - (portRef I1 (instanceRef un5_e_i_a3)) + (portRef I1 (instanceRef cpu_est_2_0_0_0_a2_3)) + (portRef I1 (instanceRef cpu_est_2_0_0_0_a2_2)) (portRef I0 (instanceRef cpu_est_i_2)) - (portRef I1 (instanceRef cpu_est_2_i_0_a3_3)) + (portRef I1 (instanceRef un5_e_0_0_a2_0_1)) )) (net (rename cpu_est_3 "cpu_est[3]") (joined (portRef Q (instanceRef cpu_est_3)) (portRef I0 (instanceRef cpu_est_0_3__m)) + (portRef I1 (instanceRef un5_e_0_0_a2)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_o2_3)) (portRef I0 (instanceRef cpu_est_i_3)) - (portRef I0 (instanceRef pos_clk_un29_clk_000_ne_1_2)) - )) - (net (rename cpu_est_0 "cpu_est[0]") (joined - (portRef Q (instanceRef cpu_est_0)) - (portRef I0 (instanceRef cpu_est_2_i_0_a3_0_3)) - (portRef I0 (instanceRef cpu_est_i_0)) - (portRef I0 (instanceRef cpu_est_2_i_0_o2_3)) - (portRef I1 (instanceRef cpu_est_0_0)) - (portRef I0 (instanceRef cpu_est_2_0_0_a3_0_1_1)) )) (net AMIGA_BUS_ENABLE_DMA_HIGH (joined (portRef Q (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH)) (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_i)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_n)) )) (net AMIGA_BUS_ENABLE_DMA_LOW (joined (portRef Q (instanceRef AMIGA_BUS_ENABLE_DMA_LOW)) (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_i)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_n)) )) (net AS_030_D0 (joined (portRef Q (instanceRef AS_030_D0)) (portRef I0 (instanceRef AS_030_D0_i)) - (portRef I1 (instanceRef pos_clk_un6_bg_030_0_a2_1)) + (portRef I0 (instanceRef AS_030_D1_0_m)) + (portRef I0 (instanceRef pos_clk_un6_bg_030_0_a3_i_1)) + )) + (net AS_030_D1 (joined + (portRef Q (instanceRef AS_030_D1)) + (portRef I0 (instanceRef AS_030_D1_i)) + (portRef I0 (instanceRef AS_030_D1_0_n)) )) (net AS_030_000_SYNC (joined (portRef Q (instanceRef AS_030_000_SYNC)) - (portRef I0 (instanceRef AS_030_000_SYNC_0_m)) (portRef I0 (instanceRef AS_030_000_SYNC_i)) - )) - (net BGACK_030_INT_D (joined - (portRef Q (instanceRef BGACK_030_INT_D)) - (portRef I1 (instanceRef pos_clk_un5_bgack_030_int_d)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_o2_1)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_n)) )) (net AS_000_DMA (joined (portRef Q (instanceRef AS_000_DMA)) @@ -1013,10 +895,15 @@ (portRef I0 (instanceRef DS_000_DMA_0_m)) (portRef I0 (instanceRef DS_000_DMA_i)) )) + (net VMA_INT (joined + (portRef Q (instanceRef VMA_INT)) + (portRef I0 (instanceRef VMA_INT_0_n)) + (portRef I0 (instanceRef VMA_INT_i)) + (portRef I0 (instanceRef VMA)) + )) (net VPA_D (joined (portRef Q (instanceRef VPA_D)) - (portRef I1 (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_m)) - (portRef I0 (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_r)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_2_3)) (portRef I0 (instanceRef VPA_D_i)) )) (net (rename CLK_000_D_3 "CLK_000_D[3]") (joined @@ -1028,34 +915,21 @@ (portRef Q (instanceRef DTACK_D0)) (portRef I0 (instanceRef DTACK_D0_i)) )) - (net RESET_OUT (joined - (portRef Q (instanceRef RESET_OUT)) - (portRef I1 (instanceRef un4_as_030_i_a2)) - (portRef I1 (instanceRef un1_rw_i_a2)) - (portRef I1 (instanceRef un1_as_000_0)) - (portRef I0 (instanceRef RESET_OUT_2_0_a2)) - )) - (net (rename CLK_030_PE_1 "CLK_030_PE[1]") (joined - (portRef Q (instanceRef CLK_030_PE_1)) - (portRef I1 (instanceRef G_121)) - (portRef I0 (instanceRef G_103)) - (portRef I0 (instanceRef CLK_030_PE_i_1)) - )) (net AMIGA_DS (joined (portRef Q (instanceRef AMIGA_DS)) (portRef I0 (instanceRef AMIGA_DS_i)) )) (net (rename CLK_000_D_1 "CLK_000_D[1]") (joined (portRef Q (instanceRef CLK_000_D_1)) - (portRef I0 (instanceRef CLK_000_NE_0_o3_i_o2)) + (portRef I0 (instanceRef N_130_i_0_o2_i_o2)) (portRef I0 (instanceRef CLK_000_D_i_1)) (portRef D (instanceRef CLK_000_D_2)) )) (net (rename CLK_000_D_0 "CLK_000_D[0]") (joined (portRef Q (instanceRef CLK_000_D_0)) - (portRef I0 (instanceRef CLK_000_PE_0_o3_i_o2)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_1)) (portRef I0 (instanceRef CLK_000_D_i_0)) - (portRef I1 (instanceRef pos_clk_un6_bg_030_0_a2)) + (portRef I1 (instanceRef pos_clk_un6_bg_030_0_a3_i_1)) (portRef D (instanceRef CLK_000_D_1)) )) (net CLK_OUT_PRE_50 (joined @@ -1065,20 +939,20 @@ )) (net CLK_OUT_PRE_D (joined (portRef Q (instanceRef CLK_OUT_PRE_D)) - (portRef I1 (instanceRef pos_clk_un3_clk_out_int)) + (portRef I1 (instanceRef AS_000_DMA_1_sqmuxa_1)) (portRef D (instanceRef CLK_OUT_INT)) )) (net (rename IPL_D0_0 "IPL_D0[0]") (joined (portRef Q (instanceRef IPL_D0_0)) - (portRef I0 (instanceRef G_122)) + (portRef I0 (instanceRef G_105)) )) (net (rename IPL_D0_1 "IPL_D0[1]") (joined (portRef Q (instanceRef IPL_D0_1)) - (portRef I0 (instanceRef G_123)) + (portRef I0 (instanceRef G_106)) )) (net (rename IPL_D0_2 "IPL_D0[2]") (joined (portRef Q (instanceRef IPL_D0_2)) - (portRef I0 (instanceRef G_124)) + (portRef I0 (instanceRef G_107)) )) (net (rename CLK_000_D_2 "CLK_000_D[2]") (joined (portRef Q (instanceRef CLK_000_D_2)) @@ -1086,126 +960,93 @@ )) (net (rename CLK_000_D_4 "CLK_000_D[4]") (joined (portRef Q (instanceRef CLK_000_D_4)) - (portRef I0 (instanceRef pos_clk_un15_clk_000_d_i_i_o2_2)) - )) - (net (rename pos_clk_un6_bg_030 "pos_clk.un6_bg_030") (joined - (portRef O (instanceRef pos_clk_un6_bg_030_0_a2)) - (portRef I0 (instanceRef pos_clk_un6_bg_030_i)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_0_o2_1_0)) )) (net (rename pos_clk_ipl "pos_clk.ipl") (joined - (portRef O (instanceRef G_125)) + (portRef O (instanceRef G_108)) + (portRef I1 (instanceRef IPL_030_0_2__m)) + (portRef I0 (instanceRef IPL_030_0_2__r)) (portRef I1 (instanceRef IPL_030_0_1__m)) (portRef I0 (instanceRef IPL_030_0_1__r)) (portRef I1 (instanceRef IPL_030_0_0__m)) (portRef I0 (instanceRef IPL_030_0_0__r)) - (portRef I1 (instanceRef IPL_030_0_2__m)) - (portRef I0 (instanceRef IPL_030_0_2__r)) )) - (net LDS_000_INT (joined - (portRef Q (instanceRef LDS_000_INT)) - (portRef I0 (instanceRef LDS_000_INT_0_n)) - (portRef I0 (instanceRef LDS_000_INT_i)) + (net (rename SIZE_DMA_0 "SIZE_DMA[0]") (joined + (portRef Q (instanceRef SIZE_DMA_0)) + (portRef I0 (instanceRef SIZE_0)) )) - (net DS_000_ENABLE (joined - (portRef Q (instanceRef DS_000_ENABLE)) - (portRef I0 (instanceRef un1_LDS_000_INT)) - (portRef I0 (instanceRef DS_000_ENABLE_0_m)) - (portRef I0 (instanceRef un1_UDS_000_INT)) + (net (rename SIZE_DMA_1 "SIZE_DMA[1]") (joined + (portRef Q (instanceRef SIZE_DMA_1)) + (portRef I0 (instanceRef SIZE_1)) + )) + (net A0_DMA (joined + (portRef Q (instanceRef A0_DMA)) + (portRef I0 (instanceRef A_0)) + )) + (net RW_000_DMA (joined + (portRef Q (instanceRef RW_000_DMA)) + (portRef I0 (instanceRef RW)) )) (net UDS_000_INT (joined (portRef Q (instanceRef UDS_000_INT)) (portRef I0 (instanceRef UDS_000_INT_0_n)) (portRef I0 (instanceRef UDS_000_INT_i)) )) + (net DS_000_ENABLE (joined + (portRef Q (instanceRef DS_000_ENABLE)) + (portRef I0 (instanceRef un1_LDS_000_INT)) + (portRef I0 (instanceRef un1_UDS_000_INT)) + (portRef I0 (instanceRef DS_000_ENABLE_0_n)) + )) + (net LDS_000_INT (joined + (portRef Q (instanceRef LDS_000_INT)) + (portRef I0 (instanceRef LDS_000_INT_0_n)) + (portRef I0 (instanceRef LDS_000_INT_i)) + )) + (net BGACK_030_INT_D (joined + (portRef Q (instanceRef BGACK_030_INT_D)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d1_i_i_a2_1)) + )) (net (rename SM_AMIGA_6 "SM_AMIGA[6]") (joined (portRef Q (instanceRef SM_AMIGA_6)) + (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_o2)) (portRef I0 (instanceRef SM_AMIGA_i_6)) - (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_o3_i_o2)) (portRef I1 (instanceRef LDS_000_INT_0_m)) (portRef I0 (instanceRef LDS_000_INT_0_r)) (portRef I1 (instanceRef UDS_000_INT_0_m)) (portRef I0 (instanceRef UDS_000_INT_0_r)) - (portRef I1 (instanceRef DS_000_ENABLE_0_sqmuxa_1)) - )) - (net (rename SM_AMIGA_4 "SM_AMIGA[4]") (joined - (portRef Q (instanceRef SM_AMIGA_4)) - (portRef I0 (instanceRef SM_AMIGA_i_4)) - (portRef I1 (instanceRef DS_000_ENABLE_0_sqmuxa_0_o3)) - )) - (net (rename SM_AMIGA_1 "SM_AMIGA[1]") (joined - (portRef Q (instanceRef SM_AMIGA_1)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_o2_0)) - (portRef I0 (instanceRef SM_AMIGA_i_1)) - )) - (net (rename SM_AMIGA_0 "SM_AMIGA[0]") (joined - (portRef Q (instanceRef SM_AMIGA_0)) - (portRef I0 (instanceRef SM_AMIGA_i_0)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_a2_0_0)) - )) - (net (rename SIZE_DMA_0 "SIZE_DMA[0]") (joined - (portRef Q (instanceRef SIZE_DMA_0)) - (portRef I0 (instanceRef SIZE_DMA_0_0__m)) - (portRef I0 (instanceRef SIZE_0)) - )) - (net (rename SIZE_DMA_1 "SIZE_DMA[1]") (joined - (portRef Q (instanceRef SIZE_DMA_1)) - (portRef I0 (instanceRef SIZE_DMA_0_1__m)) - (portRef I0 (instanceRef SIZE_1)) - )) - (net (rename CYCLE_DMA_0 "CYCLE_DMA[0]") (joined - (portRef Q (instanceRef CYCLE_DMA_0)) - (portRef I0 (instanceRef G_96)) - (portRef I0 (instanceRef G_111)) - (portRef I0 (instanceRef CYCLE_DMA_i_0)) - (portRef I0 (instanceRef G_95)) - )) - (net (rename CYCLE_DMA_1 "CYCLE_DMA[1]") (joined - (portRef Q (instanceRef CYCLE_DMA_1)) - (portRef I0 (instanceRef G_97)) - (portRef I1 (instanceRef G_111)) - (portRef I0 (instanceRef CYCLE_DMA_i_1)) - )) - (net (rename CLK_030_PE_0 "CLK_030_PE[0]") (joined - (portRef Q (instanceRef CLK_030_PE_0)) - (portRef I0 (instanceRef G_102)) - (portRef I0 (instanceRef G_121)) - (portRef I0 (instanceRef G_101)) - (portRef I0 (instanceRef pos_clk_un4_rw_000_1)) )) (net RW_000_INT (joined (portRef Q (instanceRef RW_000_INT)) (portRef I0 (instanceRef RW_000_INT_0_n)) (portRef I0 (instanceRef RW_000)) )) - (net RW_000_DMA (joined - (portRef Q (instanceRef RW_000_DMA)) - (portRef I0 (instanceRef RW_000_DMA_0_n)) - (portRef I0 (instanceRef RW)) + (net (rename SM_AMIGA_4 "SM_AMIGA[4]") (joined + (portRef Q (instanceRef SM_AMIGA_4)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_o2_3)) + (portRef I0 (instanceRef SM_AMIGA_i_4)) )) - (net (rename RST_DLY_0 "RST_DLY[0]") (joined - (portRef Q (instanceRef RST_DLY_0)) - (portRef I1 (instanceRef RST_DLY_e0_i_a2)) - (portRef I0 (instanceRef RST_DLY_i_0)) - (portRef I0 (instanceRef RST_DLY_e2_i_o2_0)) + (net (rename SM_AMIGA_1 "SM_AMIGA[1]") (joined + (portRef Q (instanceRef SM_AMIGA_1)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_o2_0)) + (portRef I0 (instanceRef SM_AMIGA_i_1)) )) - (net (rename RST_DLY_1 "RST_DLY[1]") (joined - (portRef Q (instanceRef RST_DLY_1)) - (portRef I1 (instanceRef RST_DLY_e2_i_o2_0)) - (portRef I0 (instanceRef RST_DLY_i_1)) + (net (rename SM_AMIGA_0 "SM_AMIGA[0]") (joined + (portRef Q (instanceRef SM_AMIGA_0)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_0_a2_0_0)) + (portRef I0 (instanceRef SM_AMIGA_i_0)) )) - (net (rename RST_DLY_2 "RST_DLY[2]") (joined - (portRef Q (instanceRef RST_DLY_2)) - (portRef I1 (instanceRef RESET_OUT_1_sqmuxa_i_0_132_0_a2)) - (portRef I0 (instanceRef RST_DLY_i_2)) + (net (rename CYCLE_DMA_0 "CYCLE_DMA[0]") (joined + (portRef Q (instanceRef CYCLE_DMA_0)) + (portRef I0 (instanceRef CYCLE_DMA_i_0)) + (portRef I0 (instanceRef pos_clk_as_000_dma6_i_0_0_a2_1)) + (portRef I1 (instanceRef G_90_1)) )) - (net A0_DMA (joined - (portRef Q (instanceRef A0_DMA)) - (portRef I0 (instanceRef A0_DMA_0_n)) - (portRef I0 (instanceRef A_0)) - )) - (net (rename pos_clk_RW_000_INT_5 "pos_clk.RW_000_INT_5") (joined - (portRef O (instanceRef pos_clk_RW_000_INT_5_i)) - (portRef I0 (instanceRef RW_000_INT_0_m)) + (net (rename CYCLE_DMA_1 "CYCLE_DMA[1]") (joined + (portRef Q (instanceRef CYCLE_DMA_1)) + (portRef I0 (instanceRef G_91)) + (portRef I0 (instanceRef CYCLE_DMA_i_1)) + (portRef I1 (instanceRef pos_clk_as_000_dma6_i_0_0_a2_1)) )) (net DSACK1_INT (joined (portRef Q (instanceRef DSACK1_INT)) @@ -1215,446 +1056,517 @@ (portRef Q (instanceRef AS_000_INT)) (portRef I0 (instanceRef AS_000_INT_i)) )) + (net (rename pos_clk_un9_clk_000_pe "pos_clk.un9_clk_000_pe") (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_i)) + (portRef I1 (instanceRef VMA_INT_0_m)) + (portRef I0 (instanceRef VMA_INT_0_r)) + )) (net (rename SM_AMIGA_5 "SM_AMIGA[5]") (joined (portRef Q (instanceRef SM_AMIGA_5)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_o3_4)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_o2_4)) (portRef I0 (instanceRef SM_AMIGA_i_5)) )) (net (rename SM_AMIGA_3 "SM_AMIGA[3]") (joined (portRef Q (instanceRef SM_AMIGA_3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_o3_2)) (portRef I0 (instanceRef SM_AMIGA_i_3)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_o2_2)) )) (net (rename SM_AMIGA_2 "SM_AMIGA[2]") (joined (portRef Q (instanceRef SM_AMIGA_2)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_1)) (portRef I0 (instanceRef SM_AMIGA_i_2)) )) - (net (rename pos_clk_CYCLE_DMA_5_0 "pos_clk.CYCLE_DMA_5[0]") (joined - (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0)) - (portRef D (instanceRef CYCLE_DMA_0)) - )) (net (rename pos_clk_CYCLE_DMA_5_1 "pos_clk.CYCLE_DMA_5[1]") (joined (portRef O (instanceRef pos_clk_CYCLE_DMA_5_1)) (portRef D (instanceRef CYCLE_DMA_1)) )) - (net (rename pos_clk_CLK_030_PE_4_0 "pos_clk.CLK_030_PE_4[0]") (joined - (portRef O (instanceRef pos_clk_CLK_030_PE_4_0)) - (portRef D (instanceRef CLK_030_PE_0)) - )) - (net (rename pos_clk_CLK_030_PE_4_1 "pos_clk.CLK_030_PE_4[1]") (joined - (portRef O (instanceRef pos_clk_CLK_030_PE_4_1)) - (portRef D (instanceRef CLK_030_PE_1)) - )) - (net N_5 (joined - (portRef O (instanceRef SIZE_DMA_0_0__p)) - (portRef D (instanceRef SIZE_DMA_0)) - )) (net N_6 (joined - (portRef O (instanceRef SIZE_DMA_0_1__p)) - (portRef D (instanceRef SIZE_DMA_1)) + (portRef O (instanceRef DS_000_ENABLE_0_p)) + (portRef I0 (instanceRef DS_000_ENABLE_1)) )) - (net N_10 (joined + (net N_8 (joined (portRef O (instanceRef cpu_est_0_1__p)) (portRef D (instanceRef cpu_est_1)) )) - (net N_11 (joined + (net N_9 (joined (portRef O (instanceRef cpu_est_0_2__p)) (portRef D (instanceRef cpu_est_2)) )) - (net N_12 (joined + (net N_10 (joined (portRef O (instanceRef cpu_est_0_3__p)) (portRef D (instanceRef cpu_est_3)) )) + (net N_13 (joined + (portRef O (instanceRef VMA_INT_0_p)) + (portRef I0 (instanceRef N_13_i)) + )) (net N_14 (joined - (portRef O (instanceRef AS_030_000_SYNC_0_p)) - (portRef I0 (instanceRef N_14_i)) + (portRef O (instanceRef AS_030_D1_0_p)) + (portRef D (instanceRef AS_030_D1)) )) - (net N_15 (joined - (portRef O (instanceRef RW_000_INT_0_p)) - (portRef I0 (instanceRef N_15_i)) - )) - (net N_24 (joined + (net N_18 (joined (portRef O (instanceRef IPL_030_0_0__p)) - (portRef I0 (instanceRef N_24_i)) + (portRef I0 (instanceRef N_18_i)) )) - (net N_25 (joined + (net N_19 (joined (portRef O (instanceRef IPL_030_0_1__p)) - (portRef I0 (instanceRef N_25_i)) + (portRef I0 (instanceRef N_19_i)) )) - (net N_27 (joined + (net N_20 (joined + (portRef O (instanceRef IPL_030_0_2__p)) + (portRef I0 (instanceRef N_20_i)) + )) + (net N_21 (joined (portRef O (instanceRef IPL_030_1_i_0)) (portRef D (instanceRef IPL_030DFF_0)) )) - (net N_28 (joined + (net N_22 (joined (portRef O (instanceRef IPL_030_1_i_1)) (portRef D (instanceRef IPL_030DFF_1)) )) - (net N_29 (joined + (net N_23 (joined (portRef O (instanceRef IPL_030_1_i_2)) (portRef D (instanceRef IPL_030DFF_2)) )) - (net N_30 (joined - (portRef O (instanceRef BG_000_1_i)) - (portRef D (instanceRef BG_000DFF)) - )) - (net N_31 (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1_i)) - (portRef D (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH)) - )) - (net N_32 (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1_i)) - (portRef D (instanceRef AMIGA_BUS_ENABLE_DMA_LOW)) - )) - (net N_33 (joined + (net N_24 (joined (portRef O (instanceRef UDS_000_INT_1_i)) (portRef D (instanceRef UDS_000_INT)) )) - (net N_34 (joined - (portRef O (instanceRef A0_DMA_1_i)) - (portRef D (instanceRef A0_DMA)) + (net N_25 (joined + (portRef O (instanceRef BG_000_1_i)) + (portRef D (instanceRef BG_000DFF)) )) - (net N_35 (joined - (portRef O (instanceRef RW_000_DMA_1_i)) - (portRef D (instanceRef RW_000_DMA)) - )) - (net N_36 (joined - (portRef O (instanceRef VMA_INT_1_i)) - (portRef D (instanceRef VMA_INT)) - )) - (net N_38 (joined - (portRef O (instanceRef RW_000_INT_1_i)) - (portRef D (instanceRef RW_000_INT)) - )) - (net N_39 (joined - (portRef O (instanceRef AS_030_000_SYNC_1_i)) - (portRef D (instanceRef AS_030_000_SYNC)) - )) - (net N_40 (joined + (net N_26 (joined (portRef O (instanceRef LDS_000_INT_1_i)) (portRef D (instanceRef LDS_000_INT)) )) - (net N_41 (joined + (net N_27 (joined + (portRef O (instanceRef VMA_INT_1_i)) + (portRef D (instanceRef VMA_INT)) + )) + (net N_28 (joined + (portRef O (instanceRef RW_000_INT_1_i)) + (portRef D (instanceRef RW_000_INT)) + )) + (net N_29 (joined + (portRef O (instanceRef AS_030_000_SYNC_1_i)) + (portRef D (instanceRef AS_030_000_SYNC)) + )) + (net N_30 (joined (portRef O (instanceRef BGACK_030_INT_1_i)) (portRef D (instanceRef BGACK_030_INT)) )) - (net N_42 (joined + (net N_31 (joined (portRef O (instanceRef AS_000_DMA_1_i)) (portRef D (instanceRef AS_000_DMA)) )) - (net N_43 (joined + (net N_32 (joined (portRef O (instanceRef DS_000_DMA_1_i)) (portRef D (instanceRef DS_000_DMA)) )) - (net N_46 (joined - (portRef O (instanceRef AMIGA_DS_0_0_i)) + (net N_35 (joined + (portRef O (instanceRef AMIGA_DS_0_0_0_i)) (portRef D (instanceRef AMIGA_DS)) )) - (net N_48 (joined - (portRef O (instanceRef DTACK_D0_0_i)) - (portRef D (instanceRef DTACK_D0)) + (net N_36 (joined + (portRef O (instanceRef A0_DMA_0_0_0_i)) + (portRef D (instanceRef A0_DMA)) )) - (net N_49 (joined + (net N_38 (joined + (portRef O (instanceRef AS_030_D0_0_0_0_i)) + (portRef D (instanceRef AS_030_D0)) + )) + (net N_41 (joined (portRef O (instanceRef IPL_D0_0_i_0)) (portRef D (instanceRef IPL_D0_0)) )) - (net N_50 (joined + (net N_42 (joined (portRef O (instanceRef IPL_D0_0_i_1)) (portRef D (instanceRef IPL_D0_1)) )) - (net N_51 (joined + (net N_43 (joined (portRef O (instanceRef IPL_D0_0_i_2)) (portRef D (instanceRef IPL_D0_2)) )) - (net N_52 (joined + (net N_44 (joined (portRef O (instanceRef VPA_D_0_i)) (portRef D (instanceRef VPA_D)) )) - (net N_53 (joined - (portRef O (instanceRef RESET_OUT_2_0_i)) - (portRef D (instanceRef RESET_OUT)) + (net N_45 (joined + (portRef O (instanceRef DTACK_D0_0_i)) + (portRef D (instanceRef DTACK_D0)) )) - (net N_54 (joined + (net N_46 (joined (portRef O (instanceRef DS_000_ENABLE_1)) (portRef D (instanceRef DS_000_ENABLE)) )) (net (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (joined (portRef Q (instanceRef SM_AMIGA_i_7)) - (portRef I1 (instanceRef un1_SM_AMIGA_0_o4_0)) + (portRef I1 (instanceRef pos_clk_RW_000_INT_5_0_0_o2)) (portRef I0 (instanceRef SM_AMIGA_i_i_7)) )) - (net N_76 (joined - (portRef O (instanceRef CLK_000_NE_0_o3_i_o2_i)) + (net (rename pos_clk_SIZE_DMA_6_0 "pos_clk.SIZE_DMA_6[0]") (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_i_0)) + (portRef D (instanceRef SIZE_DMA_0)) + )) + (net (rename pos_clk_SIZE_DMA_6_1 "pos_clk.SIZE_DMA_6[1]") (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_i_1)) + (portRef D (instanceRef SIZE_DMA_1)) + )) + (net (rename cpu_est_2_1 "cpu_est_2[1]") (joined + (portRef O (instanceRef cpu_est_2_0_0_0_i_1)) + (portRef I0 (instanceRef cpu_est_0_1__n)) + )) + (net (rename cpu_est_2_2 "cpu_est_2[2]") (joined + (portRef O (instanceRef cpu_est_2_0_0_0_i_2)) + (portRef I0 (instanceRef cpu_est_0_2__n)) + )) + (net (rename cpu_est_2_3 "cpu_est_2[3]") (joined + (portRef O (instanceRef cpu_est_2_0_0_0_i_3)) + (portRef I0 (instanceRef cpu_est_0_3__n)) + )) + (net N_187 (joined + (portRef O (instanceRef G_105)) + (portRef I0 (instanceRef N_187_i)) + )) + (net N_188 (joined + (portRef O (instanceRef G_106)) + (portRef I0 (instanceRef N_188_i)) + )) + (net N_189 (joined + (portRef O (instanceRef G_107)) + (portRef I0 (instanceRef N_189_i)) + )) + (net N_60 (joined + (portRef O (instanceRef un13_ciin_i_0_0_i)) + (portRef OE (instanceRef CIIN)) + )) + (net N_63 (joined + (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_i)) + (portRef I1 (instanceRef DS_000_ENABLE_0_m)) + (portRef I0 (instanceRef DS_000_ENABLE_0_r)) + )) + (net N_126 (joined + (portRef O (instanceRef RW_000_DMA_0_i_a3_0_a2)) + (portRef I0 (instanceRef N_126_i)) + )) + (net N_150 (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_i_a3_0_a2)) + (portRef I0 (instanceRef N_150_i)) + )) + (net N_151 (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_i_a3_0_a2)) + (portRef I0 (instanceRef N_151_i)) + )) + (net N_219 (joined + (portRef O (instanceRef pos_clk_DSACK1_INT_1_i_a2_0_a2)) + (portRef I0 (instanceRef N_219_i)) + (portRef I0 (instanceRef DSACK1_INT_0_i_0_a2)) + )) + (net N_175 (joined + (portRef O (instanceRef pos_clk_AS_000_INT_1_i_a2_0_a2)) + (portRef I0 (instanceRef N_175_i)) + (portRef I0 (instanceRef AS_000_INT_0_i_0_a2)) + )) + (net N_220 (joined + (portRef O (instanceRef un1_rst_2_i_o2_i)) + (portRef D (instanceRef BGACK_030_INT_D)) + )) + (net N_59 (joined + (portRef O (instanceRef pos_clk_un6_bg_030_0_a3_i_i)) + (portRef I1 (instanceRef pos_clk_un9_bg_030)) + )) + (net N_68 (joined + (portRef O (instanceRef N_130_i_0_o2_i_o2_i)) (portRef I1 (instanceRef cpu_est_0_3__m)) (portRef I0 (instanceRef cpu_est_0_3__r)) (portRef I1 (instanceRef cpu_est_0_2__m)) (portRef I0 (instanceRef cpu_est_0_2__r)) (portRef I1 (instanceRef cpu_est_0_1__m)) (portRef I0 (instanceRef cpu_est_0_1__r)) - (portRef I0 (instanceRef RST_DLY_e2_i_a2_2)) - (portRef I0 (instanceRef RST_DLY_e1_i_a2_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_o4_i_a2_1)) - (portRef I0 (instanceRef cpu_est_0_0)) - (portRef I0 (instanceRef RST_DLY_e0_i_a2_0_1)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_1_5)) + (portRef I0 (instanceRef cpu_est_0_0_0_a2_0)) + (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0_i_a2)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_1_1)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_1_5)) )) - (net N_224 (joined - (portRef O (instanceRef G_122)) - (portRef I0 (instanceRef N_224_i)) + (net N_72 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_1)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_1)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_1_4)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_1_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_1_2)) )) - (net N_225 (joined - (portRef O (instanceRef G_123)) - (portRef I0 (instanceRef N_225_i)) + (net N_80 (joined + (portRef O (instanceRef cpu_est_2_0_0_0_o2_i_3)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_3)) )) - (net N_226 (joined - (portRef O (instanceRef G_124)) - (portRef I0 (instanceRef N_226_i)) + (net N_93 (joined + (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_o2_i)) + (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_5)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_1_6)) )) - (net un1_rst_2_1 (joined - (portRef O (instanceRef un1_rst_2_1)) - (portRef I0 (instanceRef un1_rst_2_1_i)) - (portRef I1 (instanceRef un1_rst_2)) + (net N_98 (joined + (portRef O (instanceRef cpu_est_2_0_0_0_o2_i_2)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_a2_2)) )) - (net N_245 (joined - (portRef O (instanceRef cpu_est_0_0)) - (portRef I0 (instanceRef N_245_i)) + (net N_107 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_0_3)) + (portRef I0 (instanceRef un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_o2)) )) - (net N_64 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_i)) + (net N_128 (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_o2_i_0)) + (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a2_0)) + )) + (net N_131 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_0_i_3)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_3)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_o2_1_2)) + )) + (net N_134 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_2)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_2)) + )) + (net N_135 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_4)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_4)) + )) + (net N_141 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_1)) + (portRef I0 (instanceRef N_141_i)) + )) + (net N_142 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_0_1)) + (portRef I0 (instanceRef N_142_i)) + )) + (net N_143 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a2)) + (portRef I0 (instanceRef N_143_i)) + )) + (net N_144 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a2_0)) + (portRef I0 (instanceRef N_144_i)) + )) + (net N_145 (joined + (portRef O (instanceRef AMIGA_DS_0_0_0_a2)) + (portRef I0 (instanceRef N_145_i)) + )) + (net N_146 (joined + (portRef O (instanceRef A0_DMA_0_0_0_a2)) + (portRef I0 (instanceRef N_146_i)) + )) + (net N_147 (joined + (portRef O (instanceRef cpu_est_2_0_0_0_a2_1)) + (portRef I0 (instanceRef N_147_i)) + )) + (net N_148 (joined + (portRef O (instanceRef cpu_est_2_0_0_a2_0_1)) + (portRef I0 (instanceRef N_148_i)) + )) + (net N_149 (joined + (portRef O (instanceRef cpu_est_2_0_0_0_a2_2)) + (portRef I0 (instanceRef N_149_i)) + )) + (net N_154 (joined + (portRef O (instanceRef cpu_est_2_0_0_0_a2_3)) + (portRef I0 (instanceRef N_154_i)) + )) + (net N_155 (joined + (portRef O (instanceRef un5_e_0_0_a2)) + (portRef I0 (instanceRef N_155_i)) + )) + (net N_162 (joined + (portRef O (instanceRef un5_e_0_0_a2_0)) + (portRef I0 (instanceRef N_162_i)) + )) + (net N_165 (joined + (portRef O (instanceRef un11_amiga_bus_enable_high_0_0_a2_0)) + (portRef I0 (instanceRef N_165_i)) + )) + (net N_259 (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a2_0)) + (portRef I0 (instanceRef N_259_i)) + )) + (net N_260 (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a2_1)) + (portRef I0 (instanceRef N_260_i)) + )) + (net N_181 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_0)) + (portRef I0 (instanceRef N_181_i)) + )) + (net N_182 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_2)) + (portRef I0 (instanceRef N_182_i)) + )) + (net N_183 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_3)) + (portRef I0 (instanceRef N_183_i)) + )) + (net N_184 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_0_3)) + (portRef I0 (instanceRef N_184_i)) + )) + (net N_185 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_4)) + (portRef I0 (instanceRef N_185_i)) + )) + (net N_186 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_5)) + (portRef I0 (instanceRef N_186_i)) + )) + (net N_266 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_6)) + (portRef I0 (instanceRef N_266_i)) + )) + (net N_267 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0_a2_0)) + (portRef I0 (instanceRef N_267_i)) + )) + (net N_268 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0_a2_0_0)) + (portRef I0 (instanceRef N_268_i)) + )) + (net N_190 (joined + (portRef O (instanceRef cpu_est_0_0_0_a2_0)) + (portRef I0 (instanceRef N_190_i)) + )) + (net N_191 (joined + (portRef O (instanceRef cpu_est_0_0_0_a2_0_0)) + (portRef I0 (instanceRef N_191_i)) + )) + (net N_201 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_1_3)) + (portRef I0 (instanceRef N_201_i)) + )) + (net N_202 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_2_3)) + (portRef I0 (instanceRef N_202_i)) + )) + (net N_203 (joined + (portRef O (instanceRef un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_a2)) + (portRef I0 (instanceRef N_203_i)) + )) + (net N_208 (joined + (portRef O (instanceRef cpu_est_2_0_0_a2_0_2)) + (portRef I0 (instanceRef N_208_i)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a2_0_1)) + )) + (net N_163 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d1_i_i_a2)) + (portRef I0 (instanceRef N_163_i)) + )) + (net N_282 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d1_i_i_o2_i)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d1_i_i_a2_2)) + )) + (net un21_berr_1 (joined + (portRef O (instanceRef un21_berr_0_a3_0_a2_1)) + (portRef I0 (instanceRef un21_fpu_cs_0_a3_0_a2_1)) + (portRef I0 (instanceRef un21_berr_0_a3_0_a2_1_0)) + )) + (net N_132 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_6)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_6)) + )) + (net N_96 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0_o2_i_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0_a2_0)) + )) + (net N_129 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_0)) + )) + (net un1_SM_AMIGA_0_sqmuxa_1 (joined + (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_i)) + (portRef I1 (instanceRef RW_000_INT_0_m)) + (portRef I0 (instanceRef RW_000_INT_0_r)) + )) + (net N_169 (joined + (portRef O (instanceRef AS_000_INT_0_i_0_a2)) + (portRef I0 (instanceRef N_169_i)) + )) + (net N_170 (joined + (portRef O (instanceRef AS_000_INT_0_i_0_a2_0)) + (portRef I0 (instanceRef N_170_i)) + )) + (net N_167 (joined + (portRef O (instanceRef DSACK1_INT_0_i_0_a2)) + (portRef I0 (instanceRef N_167_i)) + )) + (net N_168 (joined + (portRef O (instanceRef DSACK1_INT_0_i_0_a2_0)) + (portRef I0 (instanceRef N_168_i)) + )) + (net (rename pos_clk_RW_000_INT_5 "pos_clk.RW_000_INT_5") (joined + (portRef O (instanceRef pos_clk_RW_000_INT_5_0_0_i)) + (portRef I0 (instanceRef RW_000_INT_0_m)) + )) + (net (rename pos_clk_un6_bgack_000 "pos_clk.un6_bgack_000") (joined + (portRef O (instanceRef pos_clk_un6_bgack_000_0_0_i)) + (portRef I1 (instanceRef BGACK_030_INT_0_m)) + (portRef I0 (instanceRef BGACK_030_INT_0_r)) + )) + (net N_274 (joined + (portRef O (instanceRef pos_clk_un6_bgack_000_0_0_a2)) + (portRef I0 (instanceRef N_274_i)) + )) + (net N_164 (joined + (portRef O (instanceRef un11_amiga_bus_enable_high_0_0_a2)) + (portRef I0 (instanceRef N_164_i)) + )) + (net N_244 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d1_i_i_i)) (portRef I1 (instanceRef AS_030_000_SYNC_0_m)) (portRef I0 (instanceRef AS_030_000_SYNC_0_r)) )) - (net N_122 (joined - (portRef O (instanceRef pos_clk_AS_000_INT_1_i_a2)) - (portRef I0 (instanceRef N_122_i)) + (net N_5 (joined + (portRef O (instanceRef BGACK_030_INT_0_p)) + (portRef I0 (instanceRef N_5_i)) )) - (net N_123 (joined - (portRef O (instanceRef pos_clk_DSACK1_INT_1_i_a2)) - (portRef I0 (instanceRef N_123_i)) + (net N_11 (joined + (portRef O (instanceRef AS_030_000_SYNC_0_p)) + (portRef I0 (instanceRef N_11_i)) )) - (net N_132 (joined - (portRef O (instanceRef un4_as_030_i_a2)) - (portRef OE (instanceRef AS_030)) - (portRef OE (instanceRef A_0)) - (portRef OE (instanceRef DS_030)) + (net N_12 (joined + (portRef O (instanceRef RW_000_INT_0_p)) + (portRef I0 (instanceRef N_12_i)) )) - (net N_133 (joined - (portRef O (instanceRef un1_rw_i_a2)) - (portRef OE (instanceRef RW)) - )) - (net N_274 (joined - (portRef O (instanceRef AS_030_D0_0_i_a2)) - (portRef I0 (instanceRef N_274_i)) - (portRef I1 (instanceRef DSACK1_INT_0_i_a2)) - (portRef I1 (instanceRef AS_000_INT_0_i_a2)) - )) - (net N_276 (joined - (portRef O (instanceRef un2_as_030_i_a2)) - (portRef I0 (instanceRef un4_as_030_i_a2)) - (portRef I0 (instanceRef un3_ahigh)) - (portRef OE (instanceRef SIZE_0)) - (portRef OE (instanceRef SIZE_1)) - )) - (net N_77 (joined - (portRef O (instanceRef RST_DLY_e2_i_o2_0_i)) - (portRef I0 (instanceRef RST_DLY_e2_i_a2_1)) - )) - (net N_79 (joined - (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_o3_i_o2_i)) - (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_a2_5)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_1_6)) - )) - (net N_78 (joined - (portRef O (instanceRef CLK_000_PE_0_o3_i_o2_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_o4_i_1)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_1_4)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_1_0)) - )) - (net N_263 (joined - (portRef O (instanceRef un5_e_i_a2)) - (portRef I0 (instanceRef N_263_i)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_a3_0_2)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_a3_1)) - )) - (net N_108 (joined - (portRef O (instanceRef RST_DLY_e2_i_a2)) - (portRef I0 (instanceRef N_108_i)) - )) - (net N_114 (joined - (portRef O (instanceRef RST_DLY_e1_i_a2_1)) - (portRef I0 (instanceRef N_114_i)) - )) - (net N_85 (joined - (portRef O (instanceRef pos_clk_un15_clk_000_d_i_i_o2_i)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_a2_0)) - )) - (net N_104 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_i_0_a2_0_0)) - (portRef I0 (instanceRef N_104_i)) - )) - (net N_91 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_o2_i)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_a2)) - )) - (net N_131 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_a2)) - (portRef I0 (instanceRef N_131_i)) - )) - (net N_277 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_a2_0)) - (portRef I0 (instanceRef N_277_i)) - (portRef I0 (instanceRef un21_fpu_cs_0_a2_1)) - (portRef I0 (instanceRef un21_berr_0_a2_1)) - )) - (net N_130 (joined - (portRef O (instanceRef un11_amiga_bus_enable_high_0_a2_0)) - (portRef I0 (instanceRef N_130_i)) - )) - (net N_115 (joined - (portRef O (instanceRef RST_DLY_e0_i_a2)) - (portRef I0 (instanceRef N_115_i)) - )) - (net N_116 (joined - (portRef O (instanceRef RST_DLY_e0_i_a2_0)) - (portRef I0 (instanceRef N_116_i)) - )) - (net N_105 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_a2_5)) - (portRef I0 (instanceRef N_105_i)) - )) - (net N_103 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_i_0_a2_0)) - (portRef I0 (instanceRef N_103_i)) - )) - (net N_101 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_a2_0)) - (portRef I0 (instanceRef N_101_i)) - )) - (net N_259 (joined - (portRef O (instanceRef cpu_est_2_0_0_a3_0_1)) - (portRef I0 (instanceRef N_259_i)) - )) - (net N_255 (joined - (portRef O (instanceRef cpu_est_2_i_0_a3_3)) - (portRef I0 (instanceRef N_255_i)) - )) - (net N_256 (joined - (portRef O (instanceRef cpu_est_2_i_0_a3_0_3)) - (portRef I0 (instanceRef N_256_i)) - )) - (net N_254 (joined - (portRef O (instanceRef un5_e_i_a3)) - (portRef I0 (instanceRef N_254_i)) + (net N_15 (joined + (portRef O (instanceRef LDS_000_INT_0_p)) + (portRef I0 (instanceRef N_15_i)) )) (net N_16 (joined - (portRef O (instanceRef un5_e_i_a3_0)) + (portRef O (instanceRef BG_000_0_p)) (portRef I0 (instanceRef N_16_i)) )) - (net N_106 (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_a2_1)) - (portRef I0 (instanceRef N_106_i)) + (net N_17 (joined + (portRef O (instanceRef UDS_000_INT_0_p)) + (portRef I0 (instanceRef N_17_i)) )) - (net N_86 (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_o2_i_0)) - (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_a2_0)) + (net (rename pos_clk_un9_bg_030 "pos_clk.un9_bg_030") (joined + (portRef O (instanceRef pos_clk_un9_bg_030_i)) + (portRef I1 (instanceRef BG_000_0_m)) + (portRef I0 (instanceRef BG_000_0_r)) )) - (net N_107 (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_a2_0)) - (portRef I0 (instanceRef N_107_i)) - )) - (net N_117 (joined - (portRef O (instanceRef AMIGA_DS_0_0_a2)) - (portRef I0 (instanceRef N_117_i)) - )) - (net (rename pos_clk_A0_DMA_3 "pos_clk.A0_DMA_3") (joined - (portRef O (instanceRef pos_clk_A0_DMA_3_0_a2)) - (portRef I0 (instanceRef A0_DMA_0_m)) - )) - (net N_129 (joined - (portRef O (instanceRef un11_amiga_bus_enable_high_0_a2)) - (portRef I0 (instanceRef N_129_i)) - )) - (net (rename pos_clk_SIZE_DMA_6_1 "pos_clk.SIZE_DMA_6[1]") (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_i_1)) - (portRef I0 (instanceRef SIZE_DMA_0_1__n)) - )) - (net (rename pos_clk_SIZE_DMA_6_0 "pos_clk.SIZE_DMA_6[0]") (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_i_0)) - (portRef I0 (instanceRef SIZE_DMA_0_0__n)) - )) - (net (rename pos_clk_RW_000_DMA_3 "pos_clk.RW_000_DMA_3") (joined - (portRef O (instanceRef pos_clk_RW_000_DMA_3_i)) - (portRef I0 (instanceRef RW_000_DMA_0_m)) - )) - (net (rename pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3 "pos_clk.AMIGA_BUS_ENABLE_DMA_LOW_3") (joined - (portRef O (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_m)) - )) - (net (rename pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3 "pos_clk.AMIGA_BUS_ENABLE_DMA_HIGH_3") (joined - (portRef O (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_m)) - )) - (net SIZE_DMA_3_sqmuxa (joined - (portRef O (instanceRef SIZE_DMA_3_sqmuxa)) - (portRef I1 (instanceRef SIZE_DMA_0_0__m)) - (portRef I0 (instanceRef SIZE_DMA_0_0__r)) - (portRef I1 (instanceRef SIZE_DMA_0_1__m)) - (portRef I0 (instanceRef SIZE_DMA_0_1__r)) - )) - (net (rename pos_clk_un5_bgack_030_int_d "pos_clk.un5_bgack_030_int_d") (joined - (portRef O (instanceRef pos_clk_un5_bgack_030_int_d_i_0)) - (portRef I1 (instanceRef RW_000_DMA_0_m)) - (portRef I0 (instanceRef RW_000_DMA_0_r)) - (portRef I1 (instanceRef A0_DMA_0_m)) - (portRef I0 (instanceRef A0_DMA_0_r)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_m)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_r)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_m)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_r)) - )) - (net N_18 (joined - (portRef O (instanceRef RW_000_DMA_0_p)) - (portRef I0 (instanceRef N_18_i)) - )) - (net N_19 (joined - (portRef O (instanceRef A0_DMA_0_p)) - (portRef I0 (instanceRef N_19_i)) - )) - (net N_21 (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_p)) - (portRef I0 (instanceRef N_21_i)) - )) - (net N_22 (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_p)) - (portRef I0 (instanceRef N_22_i)) - )) - (net un6_amiga_bus_data_dir (joined - (portRef O (instanceRef un6_amiga_bus_data_dir)) - (portRef I0 (instanceRef un6_amiga_bus_data_dir_i)) - )) - (net un12_amiga_bus_data_dir_m (joined - (portRef O (instanceRef un12_amiga_bus_data_dir_m)) - (portRef I0 (instanceRef un12_amiga_bus_data_dir_m_i)) - )) - (net (rename pos_clk_un3_clk_out_int "pos_clk.un3_clk_out_int") (joined - (portRef O (instanceRef pos_clk_un3_clk_out_int)) - (portRef I1 (instanceRef AS_000_DMA_1_sqmuxa)) - (portRef I0 (instanceRef pos_clk_un3_clk_out_int_i)) - (portRef I1 (instanceRef pos_clk_un13_clk_out_int)) + (net (rename un1_CYCLE_DMA_2 "un1_CYCLE_DMA[2]") (joined + (portRef O (instanceRef G_91)) + (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_1)) )) (net N_3 (joined (portRef O (instanceRef DS_000_DMA_0_p)) (portRef I0 (instanceRef N_3_i)) )) - (net (rename pos_clk_as_000_dma6 "pos_clk.as_000_dma6") (joined - (portRef O (instanceRef pos_clk_as_000_dma6)) - (portRef I0 (instanceRef pos_clk_as_000_dma6_i)) - (portRef I0 (instanceRef AS_000_DMA_1_sqmuxa)) - (portRef I1 (instanceRef un1_rst_3)) - (portRef I1 (instanceRef DS_000_DMA_1_sqmuxa_1)) + (net N_205 (joined + (portRef O (instanceRef pos_clk_as_000_dma6_i_0_0_i)) + (portRef I0 (instanceRef AS_000_DMA_0_n)) + (portRef I0 (instanceRef DS_000_DMA_0_n)) )) - (net DS_000_DMA_1_sqmuxa (joined - (portRef O (instanceRef DS_000_DMA_1_sqmuxa)) + (net AS_000_DMA_1_sqmuxa (joined + (portRef O (instanceRef AS_000_DMA_1_sqmuxa)) + (portRef I1 (instanceRef AS_000_DMA_0_m)) + (portRef I0 (instanceRef AS_000_DMA_0_r)) (portRef I1 (instanceRef DS_000_DMA_0_m)) (portRef I0 (instanceRef DS_000_DMA_0_r)) )) @@ -1662,295 +1574,30 @@ (portRef O (instanceRef AS_000_DMA_0_p)) (portRef I0 (instanceRef N_4_i)) )) - (net AS_000_DMA_1_sqmuxa (joined - (portRef O (instanceRef AS_000_DMA_1_sqmuxa)) - (portRef I1 (instanceRef AS_000_DMA_0_m)) - (portRef I0 (instanceRef AS_000_DMA_0_r)) - )) - (net un1_rst_2 (joined - (portRef O (instanceRef un1_rst_2)) - (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_1)) - (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0)) - )) - (net (rename un1_CYCLE_DMA_2 "un1_CYCLE_DMA[2]") (joined - (portRef O (instanceRef G_97)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_1)) - )) (net N_199 (joined - (portRef O (instanceRef G_96)) - (portRef I1 (instanceRef G_97)) + (portRef O (instanceRef G_90)) + (portRef I1 (instanceRef G_91)) + (portRef I0 (instanceRef N_199_i)) )) - (net (rename pos_clk_un13_bgack_030_int "pos_clk.un13_bgack_030_int") (joined - (portRef O (instanceRef pos_clk_un13_bgack_030_int)) - (portRef I1 (instanceRef G_96)) - (portRef I1 (instanceRef G_95)) + (net (rename pos_clk_un2 "pos_clk.un2") (joined + (portRef O (instanceRef G_99_i)) + (portRef I1 (instanceRef pos_clk_as_000_dma6_i_0_0_2)) )) - (net N_205 (joined - (portRef O (instanceRef G_102)) - (portRef I1 (instanceRef G_103)) - )) - (net (rename pos_clk_un13_clk_out_int "pos_clk.un13_clk_out_int") (joined - (portRef O (instanceRef pos_clk_un13_clk_out_int)) - (portRef I1 (instanceRef G_102)) - (portRef I1 (instanceRef G_101)) - )) - (net (rename pos_clk_un15_bgack_030_int "pos_clk.un15_bgack_030_int") (joined - (portRef O (instanceRef G_111_i)) - (portRef I1 (instanceRef pos_clk_un13_bgack_030_int)) - )) - (net (rename pos_clk_un3 "pos_clk.un3") (joined - (portRef O (instanceRef G_116_i)) - (portRef I1 (instanceRef pos_clk_as_000_dma6_2)) - )) - (net (rename pos_clk_un12_clk_out_int "pos_clk.un12_clk_out_int") (joined - (portRef O (instanceRef G_121_i)) - (portRef I0 (instanceRef pos_clk_un13_clk_out_int_1)) - )) - (net (rename pos_clk_un1_bgack_030_int "pos_clk.un1_bgack_030_int") (joined - (portRef O (instanceRef pos_clk_un1_bgack_030_int_i)) - (portRef I0 (instanceRef pos_clk_as_000_dma6_2)) - )) - (net DS_000_DMA_0_sqmuxa (joined - (portRef O (instanceRef DS_000_DMA_0_sqmuxa)) - (portRef I0 (instanceRef DS_000_DMA_0_sqmuxa_i)) - )) - (net un1_rst_3 (joined - (portRef O (instanceRef un1_rst_3)) - (portRef I1 (instanceRef pos_clk_CLK_030_PE_4_0)) - (portRef I1 (instanceRef pos_clk_CLK_030_PE_4_1)) - )) - (net (rename un1_CYCLE_DMA_1 "un1_CYCLE_DMA[1]") (joined - (portRef O (instanceRef G_95)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0)) - )) - (net (rename un1_CLK_030_PE_1_1 "un1_CLK_030_PE_1[1]") (joined - (portRef O (instanceRef G_101)) - (portRef I0 (instanceRef pos_clk_CLK_030_PE_4_0)) - )) - (net (rename un1_CLK_030_PE_1_2 "un1_CLK_030_PE_1[2]") (joined - (portRef O (instanceRef G_103)) - (portRef I0 (instanceRef pos_clk_CLK_030_PE_4_1)) - )) - (net (rename pos_clk_un4_rw_000 "pos_clk.un4_rw_000") (joined - (portRef O (instanceRef pos_clk_un4_rw_000)) - (portRef I0 (instanceRef pos_clk_un4_rw_000_i)) - )) - (net N_7 (joined - (portRef O (instanceRef BGACK_030_INT_0_p)) - (portRef I0 (instanceRef N_7_i)) - )) - (net (rename pos_clk_un6_bgack_000 "pos_clk.un6_bgack_000") (joined - (portRef O (instanceRef pos_clk_un6_bgack_000_i)) - (portRef I1 (instanceRef BGACK_030_INT_0_m)) - (portRef I0 (instanceRef BGACK_030_INT_0_r)) - )) - (net (rename pos_clk_un4_bgack_000 "pos_clk.un4_bgack_000") (joined - (portRef O (instanceRef pos_clk_un4_bgack_000)) - (portRef I0 (instanceRef pos_clk_un4_bgack_000_i)) - )) - (net N_265_2 (joined - (portRef O (instanceRef RST_DLY_e2_i_2_i)) - (portRef I1 (instanceRef RST_DLY_e2_i_a2_0)) - )) - (net N_111 (joined - (portRef O (instanceRef RST_DLY_e2_i_a2_2)) - (portRef I0 (instanceRef N_111_i)) - )) - (net N_109 (joined - (portRef O (instanceRef RST_DLY_e2_i_a2_0)) - (portRef I0 (instanceRef N_109_i)) - )) - (net N_113 (joined - (portRef O (instanceRef RST_DLY_e1_i_a2_0)) - (portRef I0 (instanceRef N_113_i)) - )) - (net N_112 (joined - (portRef O (instanceRef RST_DLY_e1_i_a2)) - (portRef I0 (instanceRef N_112_i)) - )) - (net N_98 (joined - (portRef O (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_p)) - (portRef I0 (instanceRef N_98_i)) - )) - (net (rename pos_clk_un29_clk_000_ne_1 "pos_clk.un29_clk_000_ne_1") (joined - (portRef O (instanceRef pos_clk_un29_clk_000_ne_1)) - (portRef I0 (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_n)) - )) - (net N_87 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_o2_i_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_a2_0)) - )) - (net N_270 (joined - (portRef O (instanceRef RST_DLY_e2_i_o2_i)) - (portRef I0 (instanceRef RST_DLY_e0_i_a2)) - )) - (net N_134 (joined - (portRef O (instanceRef RST_DLY_e2_i_a2_3)) - (portRef I1 (instanceRef RST_DLY_e1_i_a2)) - (portRef I0 (instanceRef N_134_i)) - )) - (net N_125 (joined - (portRef O (instanceRef RESET_OUT_2_0_a2_0)) - (portRef I0 (instanceRef N_125_i)) - )) - (net N_124 (joined - (portRef O (instanceRef RESET_OUT_2_0_a2)) - (portRef I0 (instanceRef N_124_i)) - )) - (net N_121 (joined - (portRef O (instanceRef DSACK1_INT_0_i_a2_0)) - (portRef I0 (instanceRef N_121_i)) - )) - (net N_120 (joined - (portRef O (instanceRef DSACK1_INT_0_i_a2)) - (portRef I0 (instanceRef N_120_i)) - )) - (net N_137 (joined - (portRef O (instanceRef RESET_OUT_1_sqmuxa_i_0_132_0_a2)) - (portRef I0 (instanceRef N_137_i)) - (portRef I0 (instanceRef RST_DLY_e2_i_a2_0)) - (portRef I1 (instanceRef RESET_OUT_2_0_a2_0_1)) - )) - (net (rename pos_clk_un31_clk_000_ne "pos_clk.un31_clk_000_ne") (joined - (portRef O (instanceRef pos_clk_un31_clk_000_ne_i_0)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_a4_0_3)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_o3_2)) - )) - (net N_17 (joined - (portRef O (instanceRef VMA_INT_0_p)) - (portRef I0 (instanceRef N_17_i)) - )) - (net (rename pos_clk_un9_clk_000_pe "pos_clk.un9_clk_000_pe") (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_i)) - (portRef I1 (instanceRef VMA_INT_0_m)) - (portRef I0 (instanceRef VMA_INT_0_r)) - )) - (net (rename cpu_est_2_1 "cpu_est_2[1]") (joined - (portRef O (instanceRef cpu_est_2_0_0_i_1)) - (portRef I0 (instanceRef cpu_est_0_1__n)) - )) - (net (rename cpu_est_2_2 "cpu_est_2[2]") (joined - (portRef O (instanceRef cpu_est_2_0_0_i_2)) - (portRef I0 (instanceRef cpu_est_0_2__n)) - )) - (net N_261 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_a3)) - (portRef I0 (instanceRef N_261_i)) + (net N_140 (joined + (portRef O (instanceRef pos_clk_as_000_dma6_i_0_0_a2)) + (portRef I0 (instanceRef N_140_i)) )) (net N_262 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_a3_0)) + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a2)) (portRef I0 (instanceRef N_262_i)) )) - (net N_251 (joined - (portRef O (instanceRef cpu_est_2_i_0_o2_i_3)) - (portRef I0 (instanceRef cpu_est_2_i_0_a3_3)) + (net N_198 (joined + (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i_a2)) + (portRef I0 (instanceRef N_198_i)) )) - (net N_252 (joined - (portRef O (instanceRef un5_e_i_o2_i)) - (portRef I0 (instanceRef un5_e_i_a3)) - )) - (net N_258 (joined - (portRef O (instanceRef cpu_est_2_0_0_a3_1)) - (portRef I0 (instanceRef N_258_i)) - )) - (net N_257 (joined - (portRef O (instanceRef cpu_est_2_0_0_a3_2)) - (portRef I0 (instanceRef N_257_i)) - )) - (net DS_000_ENABLE_1_sqmuxa (joined - (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa)) - (portRef I1 (instanceRef DS_000_ENABLE_0_m)) - (portRef I0 (instanceRef DS_000_ENABLE_0_r)) - )) - (net un1_DS_000_ENABLE_0_sqmuxa (joined - (portRef O (instanceRef un1_DS_000_ENABLE_0_sqmuxa_i_0)) - (portRef I0 (instanceRef DS_000_ENABLE_0_n)) - )) - (net N_102 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_o4_i_a2_1)) - (portRef I0 (instanceRef N_102_i)) - )) - (net N_118 (joined - (portRef O (instanceRef AS_000_INT_0_i_a2)) - (portRef I0 (instanceRef N_118_i)) - )) - (net N_119 (joined - (portRef O (instanceRef AS_000_INT_0_i_a2_0)) - (portRef I0 (instanceRef N_119_i)) - )) - (net N_264 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_o4_i_i_1)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_1_1)) - )) - (net DS_000_ENABLE_0_sqmuxa_1 (joined - (portRef O (instanceRef DS_000_ENABLE_0_sqmuxa_1)) - (portRef I0 (instanceRef DS_000_ENABLE_0_sqmuxa_1_i)) - )) - (net N_164 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_a4_1)) - (portRef I0 (instanceRef N_164_i)) - )) - (net N_170 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_a4_6)) - (portRef I0 (instanceRef N_170_i)) - )) - (net N_168 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_a4_4)) - (portRef I0 (instanceRef N_168_i)) - )) - (net N_166 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_a4_3)) - (portRef I0 (instanceRef N_166_i)) - )) - (net N_167 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_a4_0_3)) - (portRef I0 (instanceRef N_167_i)) - )) - (net N_165 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_a4_2)) - (portRef I0 (instanceRef N_165_i)) - )) - (net N_162 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_o3_i_6)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_a4_6)) - )) - (net N_161 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_o3_i_2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_a4_2)) - )) - (net N_160 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_o3_i_4)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_a4_4)) - )) - (net N_157 (joined - (portRef O (instanceRef DS_000_ENABLE_0_sqmuxa_0_o3_i)) - (portRef I1 (instanceRef un1_DS_000_ENABLE_0_sqmuxa)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_a4_3)) - )) - (net N_26 (joined - (portRef O (instanceRef IPL_030_0_2__p)) - (portRef I0 (instanceRef N_26_i)) - )) - (net N_13 (joined - (portRef O (instanceRef LDS_000_INT_0_p)) - (portRef I0 (instanceRef N_13_i)) - )) - (net N_20 (joined - (portRef O (instanceRef UDS_000_INT_0_p)) - (portRef I0 (instanceRef N_20_i)) - )) - (net N_23 (joined - (portRef O (instanceRef BG_000_0_p)) - (portRef I0 (instanceRef N_23_i)) - )) - (net N_8 (joined - (portRef O (instanceRef DS_000_ENABLE_0_p)) - (portRef I0 (instanceRef DS_000_ENABLE_1)) - )) - (net (rename pos_clk_un9_bg_030 "pos_clk.un9_bg_030") (joined - (portRef O (instanceRef pos_clk_un9_bg_030_i)) - (portRef I1 (instanceRef BG_000_0_m)) - (portRef I0 (instanceRef BG_000_0_r)) + (net N_180 (joined + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a2_0)) + (portRef I0 (instanceRef N_180_i)) )) (net un1_amiga_bus_enable_low_i (joined (portRef O (instanceRef un1_amiga_bus_enable_low_i)) @@ -1960,338 +1607,288 @@ (portRef O (instanceRef un21_fpu_cs_i)) (portRef I0 (instanceRef FPU_CS)) )) - (net (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (joined - (portRef O (instanceRef SM_AMIGA_i_2)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_o4_i_a2_1)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_a4_1)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_a4_2)) - )) - (net (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (joined - (portRef O (instanceRef SM_AMIGA_i_1)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_a4_1)) - )) - (net (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (joined - (portRef O (instanceRef SM_AMIGA_i_3)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_a4_3)) - )) - (net (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (joined - (portRef O (instanceRef SM_AMIGA_i_4)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_a4_4)) - )) - (net (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (joined - (portRef O (instanceRef SM_AMIGA_i_6)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_a4_6)) - )) - (net (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (joined - (portRef O (instanceRef SM_AMIGA_i_5)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_a2_5)) - )) - (net (rename CLK_000_D_i_0 "CLK_000_D_i[0]") (joined - (portRef O (instanceRef CLK_000_D_i_0)) - (portRef I1 (instanceRef CLK_000_NE_0_o3_i_o2)) - )) - (net AS_000_INT_i (joined - (portRef O (instanceRef AS_000_INT_i)) - (portRef I0 (instanceRef pos_clk_AS_000_INT_1_i_a2)) - (portRef I0 (instanceRef AS_000_INT_0_i_a2)) - )) - (net (rename SM_AMIGA_i_i_7 "SM_AMIGA_i_i[7]") (joined - (portRef O (instanceRef SM_AMIGA_i_i_7)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_a2_0)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_o3_6)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_o2_2)) - )) - (net AS_030_i (joined - (portRef O (instanceRef I_220)) - (portRef I0 (instanceRef pos_clk_DSACK1_INT_1_i_a2)) - (portRef I1 (instanceRef pos_clk_AS_000_INT_1_i_a2)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_a2)) - (portRef I0 (instanceRef AS_030_D0_0_i_a2)) - (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_1)) - (portRef I1 (instanceRef un11_amiga_bus_enable_high_0_a2_0)) - )) - (net (rename cpu_est_i_2 "cpu_est_i[2]") (joined - (portRef O (instanceRef cpu_est_i_2)) - (portRef I1 (instanceRef cpu_est_2_i_0_a3_0_3)) - (portRef I1 (instanceRef cpu_est_2_0_0_a3_2)) - (portRef I0 (instanceRef un5_e_i_a2)) - (portRef I1 (instanceRef un5_e_i_a3_0)) - (portRef I0 (instanceRef pos_clk_un29_clk_000_ne_1_1)) - )) - (net (rename cpu_est_i_0 "cpu_est_i[0]") (joined - (portRef O (instanceRef cpu_est_i_0)) - (portRef I1 (instanceRef cpu_est_2_0_0_a3_1)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_a3_2)) - (portRef I1 (instanceRef pos_clk_un29_clk_000_ne_1_2)) - )) - (net (rename cpu_est_i_3 "cpu_est_i[3]") (joined - (portRef O (instanceRef cpu_est_i_3)) - (portRef I1 (instanceRef un5_e_i_a2)) - (portRef I1 (instanceRef un5_e_i_o2)) - (portRef I1 (instanceRef cpu_est_2_0_0_a3_0_1)) - )) - (net (rename cpu_est_i_1 "cpu_est_i[1]") (joined - (portRef O (instanceRef cpu_est_i_1)) - (portRef I0 (instanceRef VMA_INT_0_m)) - (portRef I1 (instanceRef cpu_est_2_0_0_a3_0_1_1)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_a3_2)) - (portRef I1 (instanceRef pos_clk_un29_clk_000_ne_1)) - )) - (net (rename CLK_000_D_i_1 "CLK_000_D_i[1]") (joined - (portRef O (instanceRef CLK_000_D_i_1)) - (portRef I1 (instanceRef CLK_000_PE_0_o3_i_o2)) - )) - (net VPA_D_i (joined - (portRef O (instanceRef VPA_D_i)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_a3_0_2)) - )) - (net VMA_INT_i (joined - (portRef O (instanceRef VMA_INT_i)) - (portRef I1 (instanceRef pos_clk_un29_clk_000_ne_1_1)) - )) - (net (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (joined - (portRef O (instanceRef SM_AMIGA_i_0)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_a2_0)) - )) - (net (rename RST_DLY_i_2 "RST_DLY_i[2]") (joined - (portRef O (instanceRef RST_DLY_i_2)) - (portRef I1 (instanceRef RST_DLY_e2_i_a2_2)) - (portRef I1 (instanceRef RST_DLY_e2_i_a2)) - )) - (net (rename RST_DLY_i_1 "RST_DLY_i[1]") (joined - (portRef O (instanceRef RST_DLY_i_1)) - (portRef I1 (instanceRef RST_DLY_e1_i_a2_0)) - (portRef I1 (instanceRef RST_DLY_e1_i_a2_1)) - )) - (net (rename RST_DLY_i_0 "RST_DLY_i[0]") (joined - (portRef O (instanceRef RST_DLY_i_0)) - (portRef I1 (instanceRef RST_DLY_e0_i_a2_0_1)) - (portRef I1 (instanceRef RST_DLY_e1_i_a2_1_1)) - )) - (net DSACK1_INT_i (joined - (portRef O (instanceRef DSACK1_INT_i)) - (portRef I1 (instanceRef pos_clk_DSACK1_INT_1_i_a2)) - (portRef I0 (instanceRef DSACK1_INT_0_i_a2)) - )) - (net N_137_i_0 (joined - (portRef O (instanceRef N_137_i)) - (portRef I1 (instanceRef RST_DLY_e2_i_a2_3)) - (portRef I0 (instanceRef RESET_OUT_1_sqmuxa_i_0_132_0)) - )) - (net DTACK_D0_i (joined - (portRef O (instanceRef DTACK_D0_i)) - (portRef I0 (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_m)) + (net AS_000_i (joined + (portRef O (instanceRef I_207)) + (portRef I0 (instanceRef un2_ds_030)) + (portRef I1 (instanceRef un3_as_030)) + (portRef I1 (instanceRef pos_clk_as_000_dma6_i_0_0_1)) + (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_1)) + (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_1_1)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a2_0_1)) )) (net BGACK_030_INT_i (joined (portRef O (instanceRef BGACK_030_INT_i)) - (portRef I1 (instanceRef un11_amiga_bus_enable_high_0_a2)) - (portRef I0 (instanceRef pos_clk_A0_DMA_3_0_a2)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_a2_0)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_a2_1)) - (portRef I1 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3)) - (portRef I1 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3)) - (portRef I0 (instanceRef pos_clk_RW_000_DMA_3)) + (portRef I0 (instanceRef A0_DMA_0_0_0_a2)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a2_1)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a2_0)) + (portRef I1 (instanceRef un11_amiga_bus_enable_high_0_0_a2)) + (portRef I0 (instanceRef un1_rst_2_i_o2)) (portRef I1 (instanceRef un1_amiga_bus_enable_low)) - (portRef I0 (instanceRef un1_rst_2_1)) - (portRef I0 (instanceRef un1_rw_i_a2)) - (portRef I0 (instanceRef un2_as_030_i_a2)) - (portRef I1 (instanceRef un6_amiga_bus_data_dir_1)) + (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a2_0_1)) + (portRef OE (instanceRef AHIGH_24)) + (portRef OE (instanceRef AHIGH_25)) + (portRef OE (instanceRef AHIGH_26)) + (portRef OE (instanceRef AHIGH_27)) + (portRef OE (instanceRef AHIGH_28)) + (portRef OE (instanceRef AHIGH_29)) + (portRef OE (instanceRef AHIGH_30)) + (portRef OE (instanceRef AHIGH_31)) + (portRef OE (instanceRef AS_030)) + (portRef OE (instanceRef A_0)) + (portRef OE (instanceRef DS_030)) + (portRef OE (instanceRef RW)) + (portRef OE (instanceRef SIZE_0)) + (portRef OE (instanceRef SIZE_1)) )) (net nEXP_SPACE_i (joined (portRef O (instanceRef nEXP_SPACE_i)) - (portRef I0 (instanceRef un13_ciin)) - (portRef I1 (instanceRef un2_as_030_i_a2)) - (portRef I1 (instanceRef un6_amiga_bus_data_dir_2)) - )) - (net AS_000_DMA_i (joined - (portRef O (instanceRef AS_000_DMA_i)) - (portRef I0 (instanceRef un7_as_030)) - (portRef I1 (instanceRef pos_clk_un13_clk_out_int_1)) - (portRef OE (instanceRef DTACK)) - )) - (net RW_000_i (joined - (portRef O (instanceRef I_222)) - (portRef I1 (instanceRef pos_clk_RW_000_DMA_3)) - (portRef I1 (instanceRef un12_amiga_bus_data_dir_m)) - (portRef I0 (instanceRef pos_clk_un1_bgack_030_int)) - (portRef I1 (instanceRef pos_clk_un4_rw_000_2)) - )) - (net (rename CLK_030_PE_i_1 "CLK_030_PE_i[1]") (joined - (portRef O (instanceRef CLK_030_PE_i_1)) - (portRef I1 (instanceRef pos_clk_un4_rw_000_1)) - )) - (net DS_000_DMA_0_sqmuxa_i (joined - (portRef O (instanceRef DS_000_DMA_0_sqmuxa_i)) - (portRef I0 (instanceRef DS_000_DMA_1_sqmuxa_1)) - )) - (net (rename pos_clk_un4_rw_000_i "pos_clk.un4_rw_000_i") (joined - (portRef O (instanceRef pos_clk_un4_rw_000_i)) - (portRef I1 (instanceRef DS_000_DMA_1_sqmuxa)) - )) - (net AS_000_i (joined - (portRef O (instanceRef I_223)) - (portRef I0 (instanceRef un6_ds_030)) - (portRef I1 (instanceRef un7_as_030)) - (portRef I0 (instanceRef un1_rst_2)) - (portRef I0 (instanceRef un6_amiga_bus_data_dir_1)) - (portRef I1 (instanceRef pos_clk_as_000_dma6_1)) - )) - (net AMIGA_DS_i (joined - (portRef O (instanceRef AMIGA_DS_i)) - (portRef I0 (instanceRef pos_clk_as_000_dma6_1)) - )) - (net (rename pos_clk_un3_clk_out_int_i "pos_clk.un3_clk_out_int_i") (joined - (portRef O (instanceRef pos_clk_un3_clk_out_int_i)) - (portRef I1 (instanceRef DS_000_DMA_0_sqmuxa)) + (portRef I0 (instanceRef un13_ciin_i_0_0)) + (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a2_0_2)) )) (net (rename CYCLE_DMA_i_0 "CYCLE_DMA_i[0]") (joined (portRef O (instanceRef CYCLE_DMA_i_0)) - (portRef I0 (instanceRef G_116)) + (portRef I0 (instanceRef G_99)) + (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_a2)) )) - (net (rename CYCLE_DMA_i_1 "CYCLE_DMA_i[1]") (joined - (portRef O (instanceRef CYCLE_DMA_i_1)) - (portRef I1 (instanceRef G_116)) - )) - (net (rename pos_clk_as_000_dma6_i "pos_clk.as_000_dma6_i") (joined - (portRef O (instanceRef pos_clk_as_000_dma6_i)) - (portRef I0 (instanceRef AS_000_DMA_0_n)) - (portRef I0 (instanceRef DS_000_DMA_0_n)) - )) - (net DS_000_DMA_i (joined - (portRef O (instanceRef DS_000_DMA_i)) - (portRef I1 (instanceRef un6_ds_030)) + (net RW_000_i (joined + (portRef O (instanceRef I_208)) + (portRef I1 (instanceRef RW_000_DMA_0_i_a3_0_a2)) + (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a2)) + (portRef I1 (instanceRef pos_clk_as_000_dma6_i_0_0_a2)) )) (net CLK_EXP_i (joined (portRef O (instanceRef CLK_EXP_i)) - (portRef I0 (instanceRef pos_clk_un3_clk_out_int)) + (portRef I0 (instanceRef AS_000_DMA_1_sqmuxa_1)) + )) + (net (rename CYCLE_DMA_i_1 "CYCLE_DMA_i[1]") (joined + (portRef O (instanceRef CYCLE_DMA_i_1)) + (portRef I1 (instanceRef G_99)) + (portRef I1 (instanceRef G_90)) + )) + (net DS_000_DMA_i (joined + (portRef O (instanceRef DS_000_DMA_i)) + (portRef I1 (instanceRef un2_ds_030)) + )) + (net AS_000_DMA_i (joined + (portRef O (instanceRef AS_000_DMA_i)) + (portRef I0 (instanceRef un3_as_030)) + )) + (net (rename A_i_1 "A_i[1]") (joined + (portRef O (instanceRef A_i_1)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_i_a3_0_a2)) )) (net AMIGA_BUS_ENABLE_DMA_LOW_i (joined (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_i)) (portRef I0 (instanceRef un1_amiga_bus_enable_low)) )) - (net (rename AHIGH_i_25 "AHIGH_i[25]") (joined - (portRef O (instanceRef I_224)) - (portRef I1 (instanceRef un10_ciin_1)) - )) - (net (rename AHIGH_i_24 "AHIGH_i[24]") (joined - (portRef O (instanceRef I_225)) - (portRef I0 (instanceRef un10_ciin_1)) - )) - (net (rename AHIGH_i_27 "AHIGH_i[27]") (joined - (portRef O (instanceRef I_226)) - (portRef I1 (instanceRef un10_ciin_2)) - )) - (net (rename AHIGH_i_26 "AHIGH_i[26]") (joined - (portRef O (instanceRef I_227)) - (portRef I0 (instanceRef un10_ciin_2)) - )) - (net (rename AHIGH_i_29 "AHIGH_i[29]") (joined - (portRef O (instanceRef I_228)) - (portRef I1 (instanceRef un10_ciin_3)) - )) - (net (rename AHIGH_i_28 "AHIGH_i[28]") (joined - (portRef O (instanceRef I_229)) - (portRef I0 (instanceRef un10_ciin_3)) - )) - (net (rename AHIGH_i_31 "AHIGH_i[31]") (joined - (portRef O (instanceRef I_230)) - (portRef I1 (instanceRef un10_ciin_4)) - )) - (net (rename AHIGH_i_30 "AHIGH_i[30]") (joined - (portRef O (instanceRef I_231)) - (portRef I0 (instanceRef un10_ciin_4)) - )) - (net (rename A_i_1 "A_i[1]") (joined - (portRef O (instanceRef A_i_1)) - (portRef I0 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3)) - )) - (net AMIGA_BUS_ENABLE_DMA_HIGH_i (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_i)) - (portRef I0 (instanceRef un11_amiga_bus_enable_high_0_a2)) - )) - (net AS_030_D0_i (joined - (portRef O (instanceRef AS_030_D0_i)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_o2_2)) - (portRef I1 (instanceRef un10_ciin_5)) - )) - (net un10_ciin_i (joined - (portRef O (instanceRef un10_ciin_i)) - (portRef I1 (instanceRef un13_ciin)) - )) - (net FPU_SENSE_i (joined - (portRef O (instanceRef FPU_SENSE_i)) - (portRef I1 (instanceRef un21_fpu_cs_0_a2)) - )) - (net AS_030_000_SYNC_i (joined - (portRef O (instanceRef AS_030_000_SYNC_i)) - (portRef I0 (instanceRef pos_clk_un15_clk_000_d_i_i_o2_1)) - (portRef I1 (instanceRef un11_amiga_bus_enable_high_0_a2_0_1)) - )) - (net (rename A_DECODE_i_16 "A_DECODE_i[16]") (joined - (portRef O (instanceRef A_DECODE_i_16)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_2)) + (net (rename A_DECODE_i_19 "A_DECODE_i[19]") (joined + (portRef O (instanceRef A_DECODE_i_19)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d1_i_i_o2_3)) )) (net (rename A_DECODE_i_18 "A_DECODE_i[18]") (joined (portRef O (instanceRef A_DECODE_i_18)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_2)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d1_i_i_o2_3)) )) - (net (rename A_DECODE_i_19 "A_DECODE_i[19]") (joined - (portRef O (instanceRef A_DECODE_i_19)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_3)) + (net (rename A_DECODE_i_16 "A_DECODE_i[16]") (joined + (portRef O (instanceRef A_DECODE_i_16)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d1_i_i_o2_2)) )) - (net N_224_i (joined - (portRef O (instanceRef N_224_i)) - (portRef I1 (instanceRef G_125_1)) + (net AMIGA_BUS_ENABLE_DMA_HIGH_i (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_i)) + (portRef I0 (instanceRef un11_amiga_bus_enable_high_0_0_a2)) )) - (net N_225_i (joined - (portRef O (instanceRef N_225_i)) - (portRef I1 (instanceRef G_125)) + (net (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (joined + (portRef O (instanceRef SM_AMIGA_i_0)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_0)) )) - (net N_226_i (joined - (portRef O (instanceRef N_226_i)) - (portRef I0 (instanceRef G_125_1)) + (net (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (joined + (portRef O (instanceRef SM_AMIGA_i_5)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_5)) + )) + (net (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (joined + (portRef O (instanceRef SM_AMIGA_i_6)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_6)) + )) + (net (rename SM_AMIGA_i_i_7 "SM_AMIGA_i_i[7]") (joined + (portRef O (instanceRef SM_AMIGA_i_i_7)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_o2_6)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_0_a2_0)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d1_i_i_a2_2)) + )) + (net AS_030_i (joined + (portRef O (instanceRef I_210)) + (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa_i_0)) + (portRef I0 (instanceRef AS_030_D0_0_0_0)) + (portRef I0 (instanceRef un21_berr_0_a3_0_a2_1)) + (portRef I1 (instanceRef pos_clk_AS_000_INT_1_i_a2_0_a2)) + (portRef I0 (instanceRef pos_clk_DSACK1_INT_1_i_a2_0_a2)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d1_i_i)) + (portRef I1 (instanceRef un11_amiga_bus_enable_high_0_0_a2_0)) + )) + (net AS_000_INT_i (joined + (portRef O (instanceRef AS_000_INT_i)) + (portRef I0 (instanceRef pos_clk_AS_000_INT_1_i_a2_0_a2)) + )) + (net DSACK1_INT_i (joined + (portRef O (instanceRef DSACK1_INT_i)) + (portRef I1 (instanceRef pos_clk_DSACK1_INT_1_i_a2_0_a2)) + )) + (net (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (joined + (portRef O (instanceRef SM_AMIGA_i_1)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_0_1)) + )) + (net FPU_SENSE_i (joined + (portRef O (instanceRef FPU_SENSE_i)) + (portRef I1 (instanceRef un21_fpu_cs_0_a3_0_a2_1)) + )) + (net AS_030_D1_i (joined + (portRef O (instanceRef AS_030_D1_i)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d1_i_i_a2_1)) + )) + (net (rename cpu_est_i_0 "cpu_est_i[0]") (joined + (portRef O (instanceRef cpu_est_i_0)) + (portRef I1 (instanceRef cpu_est_2_0_0_0_a2_1)) + (portRef I1 (instanceRef cpu_est_0_0_0_a2_0)) + (portRef I1 (instanceRef cpu_est_2_0_0_0_o2_3)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a2_2)) + )) + (net (rename cpu_est_i_3 "cpu_est_i[3]") (joined + (portRef O (instanceRef cpu_est_i_3)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a2_2)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a2_0_2)) + (portRef I1 (instanceRef cpu_est_2_0_0_a2_0_1)) + (portRef I1 (instanceRef un5_e_0_0_a2_0)) + )) + (net VPA_D_i (joined + (portRef O (instanceRef VPA_D_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_1_2_3)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a2_0_2)) + )) + (net (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (joined + (portRef O (instanceRef SM_AMIGA_i_3)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_0_3)) + )) + (net (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (joined + (portRef O (instanceRef SM_AMIGA_i_4)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_4)) + )) + (net (rename cpu_est_i_1 "cpu_est_i[1]") (joined + (portRef O (instanceRef cpu_est_i_1)) + (portRef I0 (instanceRef VMA_INT_0_m)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_o2)) + (portRef I1 (instanceRef cpu_est_2_0_0_a2_0_1_1)) + )) + (net (rename CLK_000_D_i_0 "CLK_000_D_i[0]") (joined + (portRef O (instanceRef CLK_000_D_i_0)) + (portRef I1 (instanceRef N_130_i_0_o2_i_o2)) + )) + (net (rename CLK_000_D_i_1 "CLK_000_D_i[1]") (joined + (portRef O (instanceRef CLK_000_D_i_1)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_o2_1)) + )) + (net AS_030_D0_i (joined + (portRef O (instanceRef AS_030_D0_i)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a2_5)) + )) + (net (rename cpu_est_i_2 "cpu_est_i[2]") (joined + (portRef O (instanceRef cpu_est_i_2)) + (portRef I1 (instanceRef cpu_est_2_0_0_a2_0_2)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_o2)) + )) + (net DTACK_D0_i (joined + (portRef O (instanceRef DTACK_D0_i)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_2_3)) + )) + (net (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (joined + (portRef O (instanceRef SM_AMIGA_i_2)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_0_1)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_2)) + )) + (net AS_030_000_SYNC_i (joined + (portRef O (instanceRef AS_030_000_SYNC_i)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0_o2_1_0)) + (portRef I1 (instanceRef un11_amiga_bus_enable_high_0_0_a2_0_1)) + )) + (net (rename AHIGH_i_30 "AHIGH_i[30]") (joined + (portRef O (instanceRef I_212)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a2_4)) + )) + (net (rename AHIGH_i_31 "AHIGH_i[31]") (joined + (portRef O (instanceRef I_213)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a2_4)) + )) + (net (rename AHIGH_i_28 "AHIGH_i[28]") (joined + (portRef O (instanceRef I_214)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a2_3)) + )) + (net (rename AHIGH_i_29 "AHIGH_i[29]") (joined + (portRef O (instanceRef I_215)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a2_3)) + )) + (net (rename AHIGH_i_26 "AHIGH_i[26]") (joined + (portRef O (instanceRef I_216)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a2_2)) + )) + (net (rename AHIGH_i_27 "AHIGH_i[27]") (joined + (portRef O (instanceRef I_217)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a2_2)) + )) + (net (rename AHIGH_i_24 "AHIGH_i[24]") (joined + (portRef O (instanceRef I_218)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a2_1)) + )) + (net (rename AHIGH_i_25 "AHIGH_i[25]") (joined + (portRef O (instanceRef I_219)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a2_1)) + )) + (net N_187_i (joined + (portRef O (instanceRef N_187_i)) + (portRef I1 (instanceRef G_108_1)) + )) + (net N_188_i (joined + (portRef O (instanceRef N_188_i)) + (portRef I1 (instanceRef G_108)) + )) + (net N_189_i (joined + (portRef O (instanceRef N_189_i)) + (portRef I0 (instanceRef G_108_1)) )) (net CLK_OUT_PRE_50_i (joined (portRef O (instanceRef CLK_OUT_PRE_50_i)) (portRef D (instanceRef CLK_OUT_PRE_50)) )) - (net un1_rst_2_1_i (joined - (portRef O (instanceRef un1_rst_2_1_i)) - (portRef D (instanceRef BGACK_030_INT_D)) + (net N_150_i (joined + (portRef O (instanceRef N_150_i)) + (portRef D (instanceRef AMIGA_BUS_ENABLE_DMA_LOW)) )) - (net N_274_i (joined - (portRef O (instanceRef N_274_i)) - (portRef D (instanceRef AS_030_D0)) + (net N_126_i (joined + (portRef O (instanceRef N_126_i)) + (portRef D (instanceRef RW_000_DMA)) )) - (net N_245_i (joined - (portRef O (instanceRef N_245_i)) - (portRef D (instanceRef cpu_est_0)) + (net N_151_i (joined + (portRef O (instanceRef N_151_i)) + (portRef D (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH)) )) - (net un13_ciin_i (joined - (portRef O (instanceRef un13_ciin_i)) - (portRef OE (instanceRef CIIN)) - )) - (net un6_ds_030_i (joined - (portRef O (instanceRef un6_ds_030_i)) + (net un2_ds_030_i (joined + (portRef O (instanceRef un2_ds_030_i)) (portRef I0 (instanceRef DS_030)) )) - (net N_123_i (joined - (portRef O (instanceRef N_123_i)) + (net N_219_i (joined + (portRef O (instanceRef N_219_i)) (portRef I0 (instanceRef DSACK1)) )) - (net N_122_i (joined - (portRef O (instanceRef N_122_i)) + (net N_175_i (joined + (portRef O (instanceRef N_175_i)) (portRef I0 (instanceRef AS_000)) )) - (net un7_as_030_i (joined - (portRef O (instanceRef un7_as_030_i)) + (net un3_as_030_i (joined + (portRef O (instanceRef un3_as_030_i)) (portRef I0 (instanceRef AS_030)) )) (net AS_030_c (joined (portRef O (instanceRef AS_030)) - (portRef I0 (instanceRef AS_030_000_SYNC_0_n)) - (portRef I0 (instanceRef I_220)) + (portRef I0 (instanceRef I_210)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_m)) )) (net AS_030 (joined (portRef AS_030) @@ -2299,8 +1896,8 @@ )) (net AS_000_c (joined (portRef O (instanceRef AS_000)) - (portRef I0 (instanceRef I_223)) - (portRef I0 (instanceRef pos_clk_un4_bgack_000)) + (portRef I0 (instanceRef pos_clk_un6_bgack_000_0_0_a2)) + (portRef I0 (instanceRef I_207)) )) (net AS_000 (joined (portRef AS_000) @@ -2308,9 +1905,8 @@ )) (net RW_000_c (joined (portRef O (instanceRef RW_000)) - (portRef I0 (instanceRef DS_000_DMA_0_sqmuxa)) - (portRef I0 (instanceRef I_222)) - (portRef I0 (instanceRef un6_amiga_bus_data_dir_2)) + (portRef I0 (instanceRef I_208)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a2_0_2)) )) (net RW_000 (joined (portRef IO (instanceRef RW_000)) @@ -2322,8 +1918,8 @@ )) (net UDS_000_c (joined (portRef O (instanceRef UDS_000)) - (portRef I1 (instanceRef pos_clk_A0_DMA_3_0_a2)) - (portRef I1 (instanceRef AMIGA_DS_0_0_a2)) + (portRef I1 (instanceRef A0_DMA_0_0_0_a2)) + (portRef I1 (instanceRef AMIGA_DS_0_0_0_a2)) (portRef I0 (instanceRef UDS_000_c_i)) )) (net UDS_000 (joined @@ -2332,7 +1928,7 @@ )) (net LDS_000_c (joined (portRef O (instanceRef LDS_000)) - (portRef I0 (instanceRef AMIGA_DS_0_0_a2)) + (portRef I0 (instanceRef AMIGA_DS_0_0_0_a2)) (portRef I0 (instanceRef LDS_000_c_i)) )) (net LDS_000 (joined @@ -2357,7 +1953,7 @@ )) (net (rename AHIGH_c_24 "AHIGH_c[24]") (joined (portRef O (instanceRef AHIGH_24)) - (portRef I0 (instanceRef I_225)) + (portRef I0 (instanceRef I_218)) )) (net (rename AHIGH_24 "AHIGH[24]") (joined (portRef IO (instanceRef AHIGH_24)) @@ -2365,7 +1961,7 @@ )) (net (rename AHIGH_c_25 "AHIGH_c[25]") (joined (portRef O (instanceRef AHIGH_25)) - (portRef I0 (instanceRef I_224)) + (portRef I0 (instanceRef I_219)) )) (net (rename AHIGH_25 "AHIGH[25]") (joined (portRef IO (instanceRef AHIGH_25)) @@ -2373,7 +1969,7 @@ )) (net (rename AHIGH_c_26 "AHIGH_c[26]") (joined (portRef O (instanceRef AHIGH_26)) - (portRef I0 (instanceRef I_227)) + (portRef I0 (instanceRef I_216)) )) (net (rename AHIGH_26 "AHIGH[26]") (joined (portRef IO (instanceRef AHIGH_26)) @@ -2381,7 +1977,7 @@ )) (net (rename AHIGH_c_27 "AHIGH_c[27]") (joined (portRef O (instanceRef AHIGH_27)) - (portRef I0 (instanceRef I_226)) + (portRef I0 (instanceRef I_217)) )) (net (rename AHIGH_27 "AHIGH[27]") (joined (portRef IO (instanceRef AHIGH_27)) @@ -2389,7 +1985,7 @@ )) (net (rename AHIGH_c_28 "AHIGH_c[28]") (joined (portRef O (instanceRef AHIGH_28)) - (portRef I0 (instanceRef I_229)) + (portRef I0 (instanceRef I_214)) )) (net (rename AHIGH_28 "AHIGH[28]") (joined (portRef IO (instanceRef AHIGH_28)) @@ -2397,7 +1993,7 @@ )) (net (rename AHIGH_c_29 "AHIGH_c[29]") (joined (portRef O (instanceRef AHIGH_29)) - (portRef I0 (instanceRef I_228)) + (portRef I0 (instanceRef I_215)) )) (net (rename AHIGH_29 "AHIGH[29]") (joined (portRef IO (instanceRef AHIGH_29)) @@ -2405,7 +2001,7 @@ )) (net (rename AHIGH_c_30 "AHIGH_c[30]") (joined (portRef O (instanceRef AHIGH_30)) - (portRef I0 (instanceRef I_231)) + (portRef I0 (instanceRef I_212)) )) (net (rename AHIGH_30 "AHIGH[30]") (joined (portRef IO (instanceRef AHIGH_30)) @@ -2413,7 +2009,7 @@ )) (net (rename AHIGH_c_31 "AHIGH_c[31]") (joined (portRef O (instanceRef AHIGH_31)) - (portRef I0 (instanceRef I_230)) + (portRef I0 (instanceRef I_213)) )) (net (rename AHIGH_31 "AHIGH[31]") (joined (portRef (member ahigh 0)) @@ -2527,7 +2123,7 @@ )) (net (rename A_DECODE_c_17 "A_DECODE_c[17]") (joined (portRef O (instanceRef A_DECODE_17)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_1)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d1_i_i_o2_2)) )) (net (rename A_DECODE_17 "A_DECODE[17]") (joined (portRef (member a_decode 6)) @@ -2551,7 +2147,7 @@ )) (net (rename A_DECODE_c_20 "A_DECODE_c[20]") (joined (portRef O (instanceRef A_DECODE_20)) - (portRef I0 (instanceRef un10_ciin_6)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a2_6)) )) (net (rename A_DECODE_20 "A_DECODE[20]") (joined (portRef (member a_decode 3)) @@ -2559,7 +2155,7 @@ )) (net (rename A_DECODE_c_21 "A_DECODE_c[21]") (joined (portRef O (instanceRef A_DECODE_21)) - (portRef I1 (instanceRef un10_ciin_6)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a2_6)) )) (net (rename A_DECODE_21 "A_DECODE[21]") (joined (portRef (member a_decode 2)) @@ -2567,7 +2163,7 @@ )) (net (rename A_DECODE_c_22 "A_DECODE_c[22]") (joined (portRef O (instanceRef A_DECODE_22)) - (portRef I1 (instanceRef un10_ciin_11)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a2_11)) )) (net (rename A_DECODE_22 "A_DECODE[22]") (joined (portRef (member a_decode 1)) @@ -2575,7 +2171,7 @@ )) (net (rename A_DECODE_c_23 "A_DECODE_c[23]") (joined (portRef O (instanceRef A_DECODE_23)) - (portRef I0 (instanceRef un10_ciin_5)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a2_5)) )) (net (rename A_DECODE_23 "A_DECODE[23]") (joined (portRef (member a_decode 0)) @@ -2592,8 +2188,8 @@ )) (net (rename A_c_1 "A_c[1]") (joined (portRef O (instanceRef A_1)) - (portRef I0 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3)) (portRef I0 (instanceRef A_i_1)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_i_a3_0_a2)) )) (net (rename A_1 "A[1]") (joined (portRef (member a 0)) @@ -2601,11 +2197,10 @@ )) (net nEXP_SPACE_c (joined (portRef O (instanceRef nEXP_SPACE)) + (portRef I1 (instanceRef un1_dsack1_0_o3_0)) (portRef I0 (instanceRef nEXP_SPACE_i)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_o2)) - (portRef I1 (instanceRef pos_clk_un15_clk_000_d_i_i_o2_1)) - (portRef I0 (instanceRef pos_clk_un6_bg_030_0_a2_1)) - (portRef OE (instanceRef DSACK1)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_0_o2_2_0)) + (portRef I1 (instanceRef pos_clk_un6_bg_030_0_a3_i)) )) (net nEXP_SPACE (joined (portRef nEXP_SPACE) @@ -2613,7 +2208,7 @@ )) (net BERR_c (joined (portRef O (instanceRef BERR)) - (portRef I0 (instanceRef pos_clk_un31_clk_000_ne)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_0_1_3)) )) (net BERR (joined (portRef BERR) @@ -2643,10 +2238,9 @@ )) (net BGACK_000_c (joined (portRef O (instanceRef BGACK_000)) + (portRef I0 (instanceRef pos_clk_un6_bgack_000_0_0)) + (portRef I1 (instanceRef un21_berr_0_a3_0_a2_1)) (portRef I0 (instanceRef BGACK_030_INT_0_m)) - (portRef I0 (instanceRef pos_clk_un6_bgack_000)) - (portRef I1 (instanceRef un21_fpu_cs_0_a2_1)) - (portRef I1 (instanceRef un21_berr_0_a2_1)) )) (net BGACK_000 (joined (portRef BGACK_000) @@ -2654,7 +2248,6 @@ )) (net CLK_030_c (joined (portRef O (instanceRef CLK_030)) - (portRef I0 (instanceRef pos_clk_un4_rw_000_2)) )) (net CLK_030 (joined (portRef CLK_030) @@ -2678,6 +2271,7 @@ (portRef CLK (instanceRef AS_000_INT)) (portRef CLK (instanceRef AS_030_000_SYNC)) (portRef CLK (instanceRef AS_030_D0)) + (portRef CLK (instanceRef AS_030_D1)) (portRef CLK (instanceRef BGACK_030_INT)) (portRef CLK (instanceRef BGACK_030_INT_D)) (portRef CLK (instanceRef BG_000DFF)) @@ -2686,8 +2280,6 @@ (portRef CLK (instanceRef CLK_000_D_2)) (portRef CLK (instanceRef CLK_000_D_3)) (portRef CLK (instanceRef CLK_000_D_4)) - (portRef CLK (instanceRef CLK_030_PE_0)) - (portRef CLK (instanceRef CLK_030_PE_1)) (portRef CLK (instanceRef CLK_OUT_INT)) (portRef CLK (instanceRef CLK_OUT_PRE_50)) (portRef CLK (instanceRef CLK_OUT_PRE_D)) @@ -2704,10 +2296,6 @@ (portRef CLK (instanceRef IPL_D0_1)) (portRef CLK (instanceRef IPL_D0_2)) (portRef CLK (instanceRef LDS_000_INT)) - (portRef CLK (instanceRef RESET_OUT)) - (portRef CLK (instanceRef RST_DLY_0)) - (portRef CLK (instanceRef RST_DLY_1)) - (portRef CLK (instanceRef RST_DLY_2)) (portRef CLK (instanceRef RW_000_DMA)) (portRef CLK (instanceRef RW_000_INT)) (portRef CLK (instanceRef SIZE_DMA_0)) @@ -2753,7 +2341,7 @@ (net FPU_SENSE_c (joined (portRef O (instanceRef FPU_SENSE)) (portRef I0 (instanceRef FPU_SENSE_i)) - (portRef I1 (instanceRef un21_berr_0_a2)) + (portRef I1 (instanceRef un21_berr_0_a3_0_a2_1_0)) )) (net FPU_SENSE (joined (portRef FPU_SENSE) @@ -2789,7 +2377,7 @@ (net (rename IPL_c_0 "IPL_c[0]") (joined (portRef O (instanceRef IPL_0)) (portRef I0 (instanceRef IPL_030_0_0__m)) - (portRef I1 (instanceRef G_122)) + (portRef I1 (instanceRef G_105)) (portRef I0 (instanceRef IPL_c_i_0)) )) (net (rename IPL_0 "IPL[0]") (joined @@ -2799,7 +2387,7 @@ (net (rename IPL_c_1 "IPL_c[1]") (joined (portRef O (instanceRef IPL_1)) (portRef I0 (instanceRef IPL_030_0_1__m)) - (portRef I1 (instanceRef G_123)) + (portRef I1 (instanceRef G_106)) (portRef I0 (instanceRef IPL_c_i_1)) )) (net (rename IPL_1 "IPL[1]") (joined @@ -2809,7 +2397,7 @@ (net (rename IPL_c_2 "IPL_c[2]") (joined (portRef O (instanceRef IPL_2)) (portRef I0 (instanceRef IPL_030_0_2__m)) - (portRef I1 (instanceRef G_124)) + (portRef I1 (instanceRef G_107)) (portRef I0 (instanceRef IPL_c_i_2)) )) (net (rename IPL_2 "IPL[2]") (joined @@ -2826,7 +2414,7 @@ )) (net DTACK (joined (portRef DTACK) - (portRef IO (instanceRef DTACK)) + (portRef I0 (instanceRef DTACK)) )) (net AVEC (joined (portRef O (instanceRef AVEC)) @@ -2850,53 +2438,45 @@ )) (net RST_c (joined (portRef O (instanceRef RST)) + (portRef I1 (instanceRef IPL_D0_0_0)) + (portRef I1 (instanceRef DTACK_D0_0)) + (portRef I0 (instanceRef VPA_D_0)) + (portRef I1 (instanceRef VMA_INT_1)) + (portRef I1 (instanceRef DS_000_ENABLE_1)) + (portRef I1 (instanceRef IPL_030_1_2)) (portRef I1 (instanceRef IPL_030_1_1)) (portRef I1 (instanceRef IPL_030_1_0)) + (portRef I1 (instanceRef IPL_D0_0_2)) (portRef I1 (instanceRef IPL_D0_0_1)) - (portRef I1 (instanceRef IPL_D0_0_0)) - (portRef I1 (instanceRef AS_030_000_SYNC_1)) + (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_1)) + (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_0)) + (portRef I1 (instanceRef A0_DMA_0_0_0)) + (portRef I1 (instanceRef AMIGA_DS_0_0_0)) + (portRef I1 (instanceRef AS_030_D0_0_0_0)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1_sqmuxa_i_0)) (portRef I1 (instanceRef RW_000_INT_1)) - (portRef I0 (instanceRef SIZE_DMA_3_sqmuxa)) - (portRef I1 (instanceRef AMIGA_DS_0_0)) - (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0)) - (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_1)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1)) - (portRef I1 (instanceRef A0_DMA_1)) - (portRef I1 (instanceRef RW_000_DMA_1)) + (portRef I1 (instanceRef AS_030_000_SYNC_1)) + (portRef I1 (instanceRef BGACK_030_INT_1)) + (portRef I1 (instanceRef DSACK1_INT_0_i_0_a2)) + (portRef I1 (instanceRef DSACK1_INT_0_i_0_a2_0)) + (portRef I1 (instanceRef AS_000_INT_0_i_0_a2)) + (portRef I1 (instanceRef AS_000_INT_0_i_0_a2_0)) + (portRef I1 (instanceRef un1_rst_2_i_o2)) + (portRef I1 (instanceRef AS_030_D1_0_m)) + (portRef I0 (instanceRef AS_030_D1_0_r)) + (portRef I1 (instanceRef UDS_000_INT_1)) + (portRef I1 (instanceRef BG_000_1)) + (portRef I1 (instanceRef LDS_000_INT_1)) (portRef I1 (instanceRef DS_000_DMA_1)) (portRef I1 (instanceRef AS_000_DMA_1)) - (portRef I0 (instanceRef un1_rst_3)) - (portRef I1 (instanceRef BGACK_030_INT_1)) - (portRef I1 (instanceRef un1_rst_2_1)) - (portRef I1 (instanceRef RST_DLY_e2_i_2)) - (portRef I0 (instanceRef VPA_D_0)) - (portRef I1 (instanceRef DTACK_D0_0)) - (portRef I1 (instanceRef DSACK1_INT_0_i_a2_0)) - (portRef I1 (instanceRef RESET_OUT_2_0_a2)) - (portRef I1 (instanceRef AS_030_D0_0_i_a2)) - (portRef I1 (instanceRef RESET_OUT_1_sqmuxa_i_0_132_0)) - (portRef I1 (instanceRef RST_DLY_e2_i_o2)) - (portRef I1 (instanceRef VMA_INT_1)) - (portRef I1 (instanceRef AS_000_INT_0_i_a2_0)) - (portRef I1 (instanceRef BG_000_1)) - (portRef I1 (instanceRef UDS_000_INT_1)) - (portRef I1 (instanceRef LDS_000_INT_1)) - (portRef I1 (instanceRef IPL_D0_0_2)) - (portRef I1 (instanceRef IPL_030_1_2)) - (portRef I1 (instanceRef DS_000_ENABLE_1)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_6)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_1)) - (portRef I1 (instanceRef RST_DLY_e1_i_1)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_2)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_3)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_4)) - (portRef I1 (instanceRef RST_DLY_e0_i_a2_0)) - (portRef I1 (instanceRef RESET_OUT_2_0_a2_0)) - (portRef I1 (instanceRef RST_DLY_e0_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_5)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_0)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_2_1)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_4)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_5)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_6)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_0_0)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_0)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_2)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_3)) )) (net RST (joined (portRef RST) @@ -2904,7 +2484,6 @@ )) (net RESET_c (joined (portRef O (instanceRef RESET)) - (portRef I1 (instanceRef un3_ahigh)) )) (net RESET (joined (portRef RESET) @@ -2912,8 +2491,8 @@ )) (net RW_c (joined (portRef O (instanceRef RW)) + (portRef I1 (instanceRef un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_a2)) (portRef I0 (instanceRef RW_c_i)) - (portRef I1 (instanceRef DS_000_ENABLE_0_sqmuxa_1_1)) )) (net RW (joined (portRef IO (instanceRef RW)) @@ -2921,7 +2500,7 @@ )) (net (rename FC_c_0 "FC_c[0]") (joined (portRef O (instanceRef FC_0)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_5)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d1_i_i_o2_1)) )) (net (rename FC_0 "FC[0]") (joined (portRef (member fc 1)) @@ -2929,7 +2508,7 @@ )) (net (rename FC_c_1 "FC_c[1]") (joined (portRef O (instanceRef FC_1)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_3)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d1_i_i_o2_1)) )) (net (rename FC_1 "FC[1]") (joined (portRef (member fc 0)) @@ -2940,7 +2519,7 @@ (portRef AMIGA_ADDR_ENABLE) )) (net AMIGA_BUS_DATA_DIR_c (joined - (portRef O (instanceRef AMIGA_BUS_DATA_DIR_iv_i)) + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_i)) (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR)) )) (net AMIGA_BUS_DATA_DIR (joined @@ -2959,73 +2538,127 @@ (portRef O (instanceRef CIIN)) (portRef CIIN) )) + (net N_205_i (joined + (portRef O (instanceRef pos_clk_as_000_dma6_i_0_0)) + (portRef I0 (instanceRef pos_clk_as_000_dma6_i_0_0_i)) + (portRef I1 (instanceRef AS_000_DMA_1_sqmuxa)) + )) + (net N_140_i (joined + (portRef O (instanceRef N_140_i)) + (portRef I0 (instanceRef pos_clk_as_000_dma6_i_0_0_2)) + )) + (net AMIGA_DS_i (joined + (portRef O (instanceRef AMIGA_DS_i)) + (portRef I0 (instanceRef pos_clk_as_000_dma6_i_0_0_1)) + )) + (net N_66_i (joined + (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i)) + (portRef D (instanceRef CYCLE_DMA_0)) + )) + (net N_199_i (joined + (portRef O (instanceRef N_199_i)) + (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_2)) + )) + (net N_198_i (joined + (portRef O (instanceRef N_198_i)) + (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0_i_1)) + )) + (net N_180_i (joined + (portRef O (instanceRef N_180_i)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0)) + )) + (net N_262_i (joined + (portRef O (instanceRef N_262_i)) + (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0)) + )) + (net AMIGA_BUS_DATA_DIR_c_0 (joined + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_i)) + )) + (net (rename pos_clk_un2_i "pos_clk.un2_i") (joined + (portRef O (instanceRef G_99)) + (portRef I0 (instanceRef G_99_i)) + )) + (net N_3_i (joined + (portRef O (instanceRef N_3_i)) + (portRef I0 (instanceRef DS_000_DMA_1)) + )) + (net N_32_0 (joined + (portRef O (instanceRef DS_000_DMA_1)) + (portRef I0 (instanceRef DS_000_DMA_1_i)) + )) + (net N_4_i (joined + (portRef O (instanceRef N_4_i)) + (portRef I0 (instanceRef AS_000_DMA_1)) + )) + (net N_31_0 (joined + (portRef O (instanceRef AS_000_DMA_1)) + (portRef I0 (instanceRef AS_000_DMA_1_i)) + )) + (net N_220_i (joined + (portRef O (instanceRef un1_rst_2_i_o2)) + (portRef I0 (instanceRef RW_000_DMA_0_i_a3_0_a2)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_i_a3_0_a2)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_i_a3_0_a2)) + (portRef I0 (instanceRef un1_rst_2_i_o2_i)) + (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0_i_2)) + (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_1_1)) + )) (net BG_030_c_i (joined (portRef O (instanceRef BG_030_c_i)) (portRef I0 (instanceRef pos_clk_un9_bg_030)) )) - (net (rename pos_clk_un6_bg_030_i "pos_clk.un6_bg_030_i") (joined - (portRef O (instanceRef pos_clk_un6_bg_030_i)) - (portRef I1 (instanceRef pos_clk_un9_bg_030)) - )) (net (rename pos_clk_un9_bg_030_0 "pos_clk.un9_bg_030_0") (joined (portRef O (instanceRef pos_clk_un9_bg_030)) (portRef I0 (instanceRef pos_clk_un9_bg_030_i)) )) - (net UDS_000_INT_i (joined - (portRef O (instanceRef UDS_000_INT_i)) - (portRef I1 (instanceRef un1_UDS_000_INT)) - )) - (net un1_UDS_000_INT_0 (joined - (portRef O (instanceRef un1_UDS_000_INT)) - (portRef I0 (instanceRef un1_UDS_000_INT_i)) - )) - (net LDS_000_INT_i (joined - (portRef O (instanceRef LDS_000_INT_i)) - (portRef I1 (instanceRef un1_LDS_000_INT)) - )) - (net un1_LDS_000_INT_0 (joined - (portRef O (instanceRef un1_LDS_000_INT)) - (portRef I0 (instanceRef un1_LDS_000_INT_i)) - )) - (net N_23_i (joined - (portRef O (instanceRef N_23_i)) - (portRef I0 (instanceRef BG_000_1)) - )) - (net N_30_0 (joined - (portRef O (instanceRef BG_000_1)) - (portRef I0 (instanceRef BG_000_1_i)) - )) - (net N_20_i (joined - (portRef O (instanceRef N_20_i)) + (net N_17_i (joined + (portRef O (instanceRef N_17_i)) (portRef I0 (instanceRef UDS_000_INT_1)) )) - (net N_33_0 (joined + (net N_24_0 (joined (portRef O (instanceRef UDS_000_INT_1)) (portRef I0 (instanceRef UDS_000_INT_1_i)) )) - (net N_13_i (joined - (portRef O (instanceRef N_13_i)) + (net N_16_i (joined + (portRef O (instanceRef N_16_i)) + (portRef I0 (instanceRef BG_000_1)) + )) + (net N_25_0 (joined + (portRef O (instanceRef BG_000_1)) + (portRef I0 (instanceRef BG_000_1_i)) + )) + (net N_15_i (joined + (portRef O (instanceRef N_15_i)) (portRef I0 (instanceRef LDS_000_INT_1)) )) - (net N_40_0 (joined + (net N_26_0 (joined (portRef O (instanceRef LDS_000_INT_1)) (portRef I0 (instanceRef LDS_000_INT_1_i)) )) - (net (rename IPL_c_i_2 "IPL_c_i[2]") (joined - (portRef O (instanceRef IPL_c_i_2)) - (portRef I0 (instanceRef IPL_D0_0_2)) + (net N_12_i (joined + (portRef O (instanceRef N_12_i)) + (portRef I0 (instanceRef RW_000_INT_1)) )) - (net N_51_0 (joined - (portRef O (instanceRef IPL_D0_0_2)) - (portRef I0 (instanceRef IPL_D0_0_i_2)) + (net N_28_0 (joined + (portRef O (instanceRef RW_000_INT_1)) + (portRef I0 (instanceRef RW_000_INT_1_i)) )) - (net N_26_i (joined - (portRef O (instanceRef N_26_i)) - (portRef I0 (instanceRef IPL_030_1_2)) + (net N_11_i (joined + (portRef O (instanceRef N_11_i)) + (portRef I0 (instanceRef AS_030_000_SYNC_1)) )) (net N_29_0 (joined - (portRef O (instanceRef IPL_030_1_2)) - (portRef I0 (instanceRef IPL_030_1_i_2)) + (portRef O (instanceRef AS_030_000_SYNC_1)) + (portRef I0 (instanceRef AS_030_000_SYNC_1_i)) + )) + (net N_5_i (joined + (portRef O (instanceRef N_5_i)) + (portRef I0 (instanceRef BGACK_030_INT_1)) + )) + (net N_30_0 (joined + (portRef O (instanceRef BGACK_030_INT_1)) + (portRef I0 (instanceRef BGACK_030_INT_1_i)) )) (net (rename A_c_i_0 "A_c_i[0]") (joined (portRef O (instanceRef A_c_i_0)) @@ -3039,592 +2672,438 @@ (portRef O (instanceRef pos_clk_un10_sm_amiga)) (portRef I0 (instanceRef LDS_000_INT_0_m)) )) - (net DS_000_ENABLE_0_sqmuxa_1_i (joined - (portRef O (instanceRef DS_000_ENABLE_0_sqmuxa_1_i)) - (portRef I0 (instanceRef un1_DS_000_ENABLE_0_sqmuxa)) + (net un1_dsack1_i (joined + (portRef O (instanceRef un1_dsack1_0_o3_0)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d1_i_i_a2)) + (portRef OE (instanceRef DSACK1)) )) - (net un1_DS_000_ENABLE_0_sqmuxa_i (joined - (portRef O (instanceRef un1_DS_000_ENABLE_0_sqmuxa)) - (portRef I1 (instanceRef DS_000_ENABLE_1_sqmuxa)) - (portRef I0 (instanceRef un1_DS_000_ENABLE_0_sqmuxa_i_0)) - )) - (net N_157_i (joined - (portRef O (instanceRef DS_000_ENABLE_0_sqmuxa_0_o3)) - (portRef I0 (instanceRef DS_000_ENABLE_0_sqmuxa_0_o3_i)) - )) - (net N_160_0 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_o3_4)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_o3_i_4)) - )) - (net N_161_0 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_o3_2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_o3_i_2)) - )) - (net N_162_0 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_o3_6)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_o3_i_6)) - )) - (net N_165_i (joined - (portRef O (instanceRef N_165_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_1_2)) - )) - (net N_140_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_2)) - (portRef D (instanceRef SM_AMIGA_2)) - )) - (net N_167_i (joined - (portRef O (instanceRef N_167_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_1_3)) - )) - (net N_166_i (joined - (portRef O (instanceRef N_166_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_1_3)) - )) - (net N_142_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_3)) - (portRef D (instanceRef SM_AMIGA_3)) - )) - (net N_168_i (joined - (portRef O (instanceRef N_168_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_1_4)) - )) - (net N_144_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_4)) - (portRef D (instanceRef SM_AMIGA_4)) - )) - (net N_170_i (joined - (portRef O (instanceRef N_170_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_1_6)) - )) - (net N_148_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_6)) - (portRef D (instanceRef SM_AMIGA_6)) - )) - (net N_164_i (joined - (portRef O (instanceRef N_164_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_1_1)) - )) - (net N_138_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_1)) - (portRef D (instanceRef SM_AMIGA_1)) - )) - (net N_102_i (joined - (portRef O (instanceRef N_102_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_o4_i_1)) - )) - (net N_264_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_o4_i_1)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_o4_i_i_1)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_1_2)) - )) - (net N_79_i (joined - (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_o3_i_o2)) - (portRef I0 (instanceRef AS_000_INT_0_i_a2_0)) - (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_o3_i_o2_i)) - )) - (net N_78_i (joined - (portRef O (instanceRef CLK_000_PE_0_o3_i_o2)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_a2_0_0)) - (portRef I0 (instanceRef DS_000_ENABLE_0_sqmuxa_0_o3)) - (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_o3_i_o2)) - (portRef I0 (instanceRef CLK_000_PE_0_o3_i_o2_i)) - (portRef I0 (instanceRef DS_000_ENABLE_0_sqmuxa_1_1)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_a3_1)) - )) - (net N_119_i (joined - (portRef O (instanceRef N_119_i)) - (portRef I1 (instanceRef AS_000_INT_0_i)) - )) - (net N_118_i (joined - (portRef O (instanceRef N_118_i)) - (portRef I0 (instanceRef AS_000_INT_0_i)) - )) - (net N_268_i (joined - (portRef O (instanceRef AS_000_INT_0_i)) - (portRef D (instanceRef AS_000_INT)) - )) - (net N_255_i (joined - (portRef O (instanceRef N_255_i)) - (portRef I0 (instanceRef cpu_est_2_0_0_2)) - (portRef I0 (instanceRef cpu_est_2_i_0_1_3)) - )) - (net N_257_i (joined - (portRef O (instanceRef N_257_i)) - (portRef I1 (instanceRef cpu_est_2_0_0_2)) - )) - (net (rename cpu_est_2_0_2 "cpu_est_2_0[2]") (joined - (portRef O (instanceRef cpu_est_2_0_0_2)) - (portRef I0 (instanceRef cpu_est_2_0_0_i_2)) - )) - (net N_258_i (joined - (portRef O (instanceRef N_258_i)) - (portRef I0 (instanceRef cpu_est_2_0_0_1)) - )) - (net N_259_i (joined - (portRef O (instanceRef N_259_i)) - (portRef I1 (instanceRef cpu_est_2_0_0_1)) - )) - (net (rename cpu_est_2_0_1 "cpu_est_2_0[1]") (joined - (portRef O (instanceRef cpu_est_2_0_0_1)) - (portRef I0 (instanceRef cpu_est_2_0_0_i_1)) - )) - (net N_262_i (joined - (portRef O (instanceRef N_262_i)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0)) - )) - (net N_261_i (joined - (portRef O (instanceRef N_261_i)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0)) - )) - (net (rename pos_clk_un9_clk_000_pe_0 "pos_clk.un9_clk_000_pe_0") (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_i)) - )) - (net N_251_i (joined - (portRef O (instanceRef cpu_est_2_i_0_o2_3)) - (portRef I0 (instanceRef cpu_est_2_0_0_a3_2)) - (portRef I0 (instanceRef cpu_est_2_i_0_o2_i_3)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_a3_0_1)) - )) - (net N_252_0 (joined - (portRef O (instanceRef un5_e_i_o2)) - (portRef I0 (instanceRef un5_e_i_o2_i)) - )) - (net N_76_i (joined - (portRef O (instanceRef CLK_000_NE_0_o3_i_o2)) - (portRef I0 (instanceRef pos_clk_un13_bgack_030_int)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_o2_0)) - (portRef I1 (instanceRef pos_clk_un4_bgack_000)) - (portRef I0 (instanceRef RST_DLY_e2_i_a2_3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_a4_0_3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_o3_4)) - (portRef I0 (instanceRef CLK_000_NE_0_o3_i_o2_i)) - (portRef I0 (instanceRef RESET_OUT_2_0_a2_0_1)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_a3_0_1)) - )) - (net N_17_i (joined - (portRef O (instanceRef N_17_i)) - (portRef I0 (instanceRef VMA_INT_1)) - )) - (net N_36_0 (joined - (portRef O (instanceRef VMA_INT_1)) - (portRef I0 (instanceRef VMA_INT_1_i)) - )) - (net N_98_i (joined - (portRef O (instanceRef N_98_i)) - (portRef I1 (instanceRef pos_clk_un31_clk_000_ne)) - )) - (net (rename pos_clk_un31_clk_000_ne_i "pos_clk.un31_clk_000_ne_i") (joined - (portRef O (instanceRef pos_clk_un31_clk_000_ne)) - (portRef I0 (instanceRef pos_clk_un31_clk_000_ne_i_0)) - )) - (net N_228_i (joined - (portRef O (instanceRef RESET_OUT_1_sqmuxa_i_0_132_0)) - (portRef I0 (instanceRef RST_DLY_e1_i_a2_1_1)) - (portRef I1 (instanceRef RST_DLY_e2_i_a2_1)) - )) - (net N_121_i (joined - (portRef O (instanceRef N_121_i)) - (portRef I1 (instanceRef DSACK1_INT_0_i)) - )) - (net N_120_i (joined - (portRef O (instanceRef N_120_i)) - (portRef I0 (instanceRef DSACK1_INT_0_i)) - )) - (net N_269_i (joined - (portRef O (instanceRef DSACK1_INT_0_i)) - (portRef D (instanceRef DSACK1_INT)) - )) - (net N_125_i (joined - (portRef O (instanceRef N_125_i)) - (portRef I1 (instanceRef RESET_OUT_2_0)) - )) - (net N_124_i (joined - (portRef O (instanceRef N_124_i)) - (portRef I0 (instanceRef RESET_OUT_2_0)) - )) - (net N_53_0 (joined - (portRef O (instanceRef RESET_OUT_2_0)) - (portRef I0 (instanceRef RESET_OUT_2_0_i)) - )) - (net N_134_i (joined - (portRef O (instanceRef N_134_i)) - (portRef I0 (instanceRef RST_DLY_e2_i_o2)) - )) - (net N_270_0 (joined - (portRef O (instanceRef RST_DLY_e2_i_o2)) - (portRef I0 (instanceRef RST_DLY_e2_i_o2_i)) - )) - (net N_77_i (joined - (portRef O (instanceRef RST_DLY_e2_i_o2_0)) - (portRef I0 (instanceRef RESET_OUT_1_sqmuxa_i_0_132_0_a2)) - (portRef I0 (instanceRef RST_DLY_e1_i_a2)) - (portRef I0 (instanceRef RST_DLY_e2_i_o2_0_i)) - )) - (net N_87_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_o2_0)) - (portRef I0 (instanceRef DSACK1_INT_0_i_a2_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_o2_i_0)) - )) - (net N_112_i (joined - (portRef O (instanceRef N_112_i)) - (portRef I0 (instanceRef RST_DLY_e1_i_1)) - )) - (net N_113_i (joined - (portRef O (instanceRef N_113_i)) - (portRef I0 (instanceRef RST_DLY_e1_i_2)) - )) - (net N_114_i (joined - (portRef O (instanceRef N_114_i)) - (portRef I1 (instanceRef RST_DLY_e1_i_2)) - )) - (net N_266_i (joined - (portRef O (instanceRef RST_DLY_e1_i)) - (portRef D (instanceRef RST_DLY_1)) - )) - (net N_109_i (joined - (portRef O (instanceRef N_109_i)) - (portRef I1 (instanceRef RST_DLY_e2_i_1)) - )) - (net N_108_i (joined - (portRef O (instanceRef N_108_i)) - (portRef I0 (instanceRef RST_DLY_e2_i_1)) - )) - (net N_111_i (joined - (portRef O (instanceRef N_111_i)) - (portRef I0 (instanceRef RST_DLY_e2_i_2)) - )) - (net N_265_2_0 (joined - (portRef O (instanceRef RST_DLY_e2_i_2)) - (portRef I0 (instanceRef RST_DLY_e2_i_2_i)) - (portRef I1 (instanceRef RST_DLY_e2_i)) - )) - (net N_265_i (joined - (portRef O (instanceRef RST_DLY_e2_i)) - (portRef D (instanceRef RST_DLY_2)) - )) - (net un1_as_000_i (joined - (portRef O (instanceRef un1_as_000_0)) + (net N_69_i (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1_sqmuxa_i_0)) (portRef OE (instanceRef AS_000)) (portRef OE (instanceRef LDS_000)) (portRef OE (instanceRef RW_000)) (portRef OE (instanceRef UDS_000)) )) - (net VPA_c_i (joined - (portRef O (instanceRef VPA_c_i)) - (portRef I1 (instanceRef VPA_D_0)) + (net N_163_i (joined + (portRef O (instanceRef N_163_i)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d1_i_i)) )) - (net N_52_0 (joined - (portRef O (instanceRef VPA_D_0)) - (portRef I0 (instanceRef VPA_D_0_i)) + (net N_244_0 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d1_i_i)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d1_i_i_i)) )) - (net DTACK_c_i (joined - (portRef O (instanceRef DTACK_c_i)) - (portRef I0 (instanceRef DTACK_D0_0)) + (net N_164_i (joined + (portRef O (instanceRef N_164_i)) + (portRef I0 (instanceRef un11_amiga_bus_enable_high_0_0)) )) - (net N_48_0 (joined - (portRef O (instanceRef DTACK_D0_0)) - (portRef I0 (instanceRef DTACK_D0_0_i)) - )) - (net un3_ahigh_i (joined - (portRef O (instanceRef un3_ahigh)) - (portRef OE (instanceRef AHIGH_24)) - (portRef OE (instanceRef AHIGH_25)) - (portRef OE (instanceRef AHIGH_26)) - (portRef OE (instanceRef AHIGH_27)) - (portRef OE (instanceRef AHIGH_28)) - (portRef OE (instanceRef AHIGH_29)) - (portRef OE (instanceRef AHIGH_30)) - (portRef OE (instanceRef AHIGH_31)) - )) - (net (rename pos_clk_un4_bgack_000_i "pos_clk.un4_bgack_000_i") (joined - (portRef O (instanceRef pos_clk_un4_bgack_000_i)) - (portRef I1 (instanceRef pos_clk_un6_bgack_000)) - )) - (net (rename pos_clk_un6_bgack_000_0 "pos_clk.un6_bgack_000_0") (joined - (portRef O (instanceRef pos_clk_un6_bgack_000)) - (portRef I0 (instanceRef pos_clk_un6_bgack_000_i)) - )) - (net N_7_i (joined - (portRef O (instanceRef N_7_i)) - (portRef I0 (instanceRef BGACK_030_INT_1)) - )) - (net N_41_0 (joined - (portRef O (instanceRef BGACK_030_INT_1)) - (portRef I0 (instanceRef BGACK_030_INT_1_i)) - )) - (net (rename pos_clk_un1_bgack_030_int_0 "pos_clk.un1_bgack_030_int_0") (joined - (portRef O (instanceRef pos_clk_un1_bgack_030_int)) - (portRef I0 (instanceRef pos_clk_un1_bgack_030_int_i)) - )) - (net (rename pos_clk_un12_clk_out_int_0 "pos_clk.un12_clk_out_int_0") (joined - (portRef O (instanceRef G_121)) - (portRef I0 (instanceRef G_121_i)) - )) - (net (rename pos_clk_un3_0 "pos_clk.un3_0") (joined - (portRef O (instanceRef G_116)) - (portRef I0 (instanceRef G_116_i)) - )) - (net (rename pos_clk_un15_bgack_030_int_i "pos_clk.un15_bgack_030_int_i") (joined - (portRef O (instanceRef G_111)) - (portRef I1 (instanceRef pos_clk_un1_bgack_030_int)) - (portRef I0 (instanceRef G_111_i)) - )) - (net N_3_i (joined - (portRef O (instanceRef N_3_i)) - (portRef I0 (instanceRef DS_000_DMA_1)) - )) - (net N_43_0 (joined - (portRef O (instanceRef DS_000_DMA_1)) - (portRef I0 (instanceRef DS_000_DMA_1_i)) - )) - (net N_4_i (joined - (portRef O (instanceRef N_4_i)) - (portRef I0 (instanceRef AS_000_DMA_1)) - )) - (net N_42_0 (joined - (portRef O (instanceRef AS_000_DMA_1)) - (portRef I0 (instanceRef AS_000_DMA_1_i)) - )) - (net un6_amiga_bus_data_dir_i (joined - (portRef O (instanceRef un6_amiga_bus_data_dir_i)) - (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_iv)) - )) - (net un12_amiga_bus_data_dir_m_i (joined - (portRef O (instanceRef un12_amiga_bus_data_dir_m_i)) - (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_iv)) - )) - (net AMIGA_BUS_DATA_DIR_c_0 (joined - (portRef O (instanceRef AMIGA_BUS_DATA_DIR_iv)) - (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_iv_i)) - )) - (net N_22_i (joined - (portRef O (instanceRef N_22_i)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1)) - )) - (net N_31_0 (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1_i)) - )) - (net N_21_i (joined - (portRef O (instanceRef N_21_i)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1)) - )) - (net N_32_0 (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1_i)) - )) - (net N_19_i (joined - (portRef O (instanceRef N_19_i)) - (portRef I0 (instanceRef A0_DMA_1)) - )) - (net N_34_0 (joined - (portRef O (instanceRef A0_DMA_1)) - (portRef I0 (instanceRef A0_DMA_1_i)) - )) - (net N_18_i (joined - (portRef O (instanceRef N_18_i)) - (portRef I0 (instanceRef RW_000_DMA_1)) - )) - (net N_35_0 (joined - (portRef O (instanceRef RW_000_DMA_1)) - (portRef I0 (instanceRef RW_000_DMA_1_i)) - )) - (net (rename pos_clk_un5_bgack_030_int_d_i "pos_clk.un5_bgack_030_int_d_i") (joined - (portRef O (instanceRef pos_clk_un5_bgack_030_int_d)) - (portRef I1 (instanceRef SIZE_DMA_3_sqmuxa)) - (portRef I0 (instanceRef pos_clk_un5_bgack_030_int_d_i_0)) - )) - (net (rename pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_0 "pos_clk.AMIGA_BUS_ENABLE_DMA_HIGH_3_0") (joined - (portRef O (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3)) - (portRef I0 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i)) - )) - (net (rename pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_0 "pos_clk.AMIGA_BUS_ENABLE_DMA_LOW_3_0") (joined - (portRef O (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3)) - (portRef I0 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i)) - )) - (net (rename pos_clk_RW_000_DMA_3_0 "pos_clk.RW_000_DMA_3_0") (joined - (portRef O (instanceRef pos_clk_RW_000_DMA_3)) - (portRef I0 (instanceRef pos_clk_RW_000_DMA_3_i)) - )) - (net UDS_000_c_i (joined - (portRef O (instanceRef UDS_000_c_i)) - (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_o2_0)) - )) - (net LDS_000_c_i (joined - (portRef O (instanceRef LDS_000_c_i)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_o2_0)) - )) - (net N_86_i (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_o2_0)) - (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_a2_1)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_o2_i_0)) - )) - (net N_129_i (joined - (portRef O (instanceRef N_129_i)) - (portRef I0 (instanceRef un11_amiga_bus_enable_high_0)) - )) - (net N_130_i (joined - (portRef O (instanceRef N_130_i)) - (portRef I1 (instanceRef un11_amiga_bus_enable_high_0)) + (net N_165_i (joined + (portRef O (instanceRef N_165_i)) + (portRef I1 (instanceRef un11_amiga_bus_enable_high_0_0)) )) (net un11_amiga_bus_enable_high_i (joined - (portRef O (instanceRef un11_amiga_bus_enable_high_0)) + (portRef O (instanceRef un11_amiga_bus_enable_high_0_0)) (portRef I0 (instanceRef AMIGA_BUS_ENABLE_HIGH)) )) - (net N_117_i (joined - (portRef O (instanceRef N_117_i)) - (portRef I0 (instanceRef AMIGA_DS_0_0)) + (net un10_ciin_i (joined + (portRef O (instanceRef un10_ciin_i)) + (portRef I1 (instanceRef un13_ciin_i_0_0)) )) - (net N_46_0 (joined - (portRef O (instanceRef AMIGA_DS_0_0)) - (portRef I0 (instanceRef AMIGA_DS_0_0_i)) + (net N_60_0 (joined + (portRef O (instanceRef un13_ciin_i_0_0)) + (portRef I0 (instanceRef un13_ciin_i_0_0_i)) )) - (net N_107_i (joined - (portRef O (instanceRef N_107_i)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0)) + (net N_274_i (joined + (portRef O (instanceRef N_274_i)) + (portRef I1 (instanceRef pos_clk_un6_bgack_000_0_0)) )) - (net (rename pos_clk_SIZE_DMA_6_0_0 "pos_clk.SIZE_DMA_6_0[0]") (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_i_0)) - )) - (net N_106_i (joined - (portRef O (instanceRef N_106_i)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_1)) - )) - (net (rename pos_clk_SIZE_DMA_6_0_1 "pos_clk.SIZE_DMA_6_0[1]") (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_1)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_i_1)) - )) - (net N_16_i (joined - (portRef O (instanceRef N_16_i)) - (portRef I0 (instanceRef un5_e_i_1)) - )) - (net N_254_i (joined - (portRef O (instanceRef N_254_i)) - (portRef I1 (instanceRef un5_e_i_1)) - )) - (net N_263_i (joined - (portRef O (instanceRef N_263_i)) - (portRef I1 (instanceRef cpu_est_2_i_0_3)) - (portRef I1 (instanceRef un5_e_i)) - )) - (net N_250_i (joined - (portRef O (instanceRef un5_e_i)) - (portRef I0 (instanceRef E)) - )) - (net N_256_i (joined - (portRef O (instanceRef N_256_i)) - (portRef I1 (instanceRef cpu_est_2_i_0_1_3)) - )) - (net N_189_i (joined - (portRef O (instanceRef cpu_est_2_i_0_3)) - (portRef I0 (instanceRef cpu_est_0_3__n)) - )) - (net N_101_i (joined - (portRef O (instanceRef N_101_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_1_0)) - )) - (net N_136_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0)) - (portRef D (instanceRef SM_AMIGA_0)) - )) - (net N_103_i (joined - (portRef O (instanceRef N_103_i)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_1_0)) - )) - (net N_104_i (joined - (portRef O (instanceRef N_104_i)) - (portRef I0 (instanceRef un1_SM_AMIGA_0_o4_0)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_1_0)) - )) - (net N_152_i (joined - (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0)) - (portRef D (instanceRef SM_AMIGA_i_7)) - )) - (net N_105_i (joined - (portRef O (instanceRef N_105_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_1_5)) - )) - (net N_146_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_5)) - (portRef D (instanceRef SM_AMIGA_5)) - )) - (net N_115_i (joined - (portRef O (instanceRef N_115_i)) - (portRef I0 (instanceRef RST_DLY_e0_i_1)) - )) - (net N_116_i (joined - (portRef O (instanceRef N_116_i)) - (portRef I1 (instanceRef RST_DLY_e0_i_1)) - )) - (net N_267_i (joined - (portRef O (instanceRef RST_DLY_e0_i)) - (portRef D (instanceRef RST_DLY_0)) - )) - (net N_131_i (joined - (portRef O (instanceRef N_131_i)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i)) - )) - (net N_277_i (joined - (portRef O (instanceRef N_277_i)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i)) - )) - (net N_64_0 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_i)) - )) - (net N_91_0 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_o2)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_o2_i)) - )) - (net N_159_0 (joined - (portRef O (instanceRef un1_SM_AMIGA_0_o4_0)) - (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0)) - (portRef I0 (instanceRef pos_clk_RW_000_INT_5)) - )) - (net N_85_i (joined - (portRef O (instanceRef pos_clk_un15_clk_000_d_i_i_o2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_o3_6)) - (portRef I0 (instanceRef pos_clk_un15_clk_000_d_i_i_o2_i)) - )) - (net un1_SM_AMIGA_0_sqmuxa_1_0 (joined - (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0)) - (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_i)) + (net (rename pos_clk_un6_bgack_000_0 "pos_clk.un6_bgack_000_0") (joined + (portRef O (instanceRef pos_clk_un6_bgack_000_0_0)) + (portRef I0 (instanceRef pos_clk_un6_bgack_000_0_0_i)) )) (net RW_c_i (joined (portRef O (instanceRef RW_c_i)) - (portRef I1 (instanceRef pos_clk_RW_000_INT_5)) + (portRef I1 (instanceRef pos_clk_RW_000_INT_5_0_0)) )) (net (rename pos_clk_RW_000_INT_5_0 "pos_clk.RW_000_INT_5_0") (joined - (portRef O (instanceRef pos_clk_RW_000_INT_5)) - (portRef I0 (instanceRef pos_clk_RW_000_INT_5_i)) + (portRef O (instanceRef pos_clk_RW_000_INT_5_0_0)) + (portRef I0 (instanceRef pos_clk_RW_000_INT_5_0_0_i)) + )) + (net N_168_i (joined + (portRef O (instanceRef N_168_i)) + (portRef I1 (instanceRef DSACK1_INT_0_i_0)) + )) + (net N_167_i (joined + (portRef O (instanceRef N_167_i)) + (portRef I0 (instanceRef DSACK1_INT_0_i_0)) + )) + (net N_206_i (joined + (portRef O (instanceRef DSACK1_INT_0_i_0)) + (portRef D (instanceRef DSACK1_INT)) + )) + (net N_170_i (joined + (portRef O (instanceRef N_170_i)) + (portRef I1 (instanceRef AS_000_INT_0_i_0)) + )) + (net N_169_i (joined + (portRef O (instanceRef N_169_i)) + (portRef I0 (instanceRef AS_000_INT_0_i_0)) + )) + (net N_48_i (joined + (portRef O (instanceRef AS_000_INT_0_i_0)) + (portRef D (instanceRef AS_000_INT)) + )) + (net N_38_0 (joined + (portRef O (instanceRef AS_030_D0_0_0_0)) + (portRef I0 (instanceRef AS_030_D0_0_0_0_i)) + )) + (net un1_SM_AMIGA_0_sqmuxa_1_0 (joined + (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1)) + (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_i)) + )) + (net N_282_0 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d1_i_i_o2)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d1_i_i_o2_i)) + (portRef I1 (instanceRef un21_berr_0_a3_0_a2)) + (portRef I1 (instanceRef un21_fpu_cs_0_a3_0_a2)) )) (net (rename CLK_000_D_i_3 "CLK_000_D_i[3]") (joined (portRef O (instanceRef CLK_000_D_i_3)) - (portRef I1 (instanceRef pos_clk_un15_clk_000_d_i_i_o2_2)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0_o2_2_0)) )) - (net N_25_i (joined - (portRef O (instanceRef N_25_i)) + (net N_96_0 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0_o2_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_6)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0_o2_i_0)) + )) + (net N_129_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_0)) + (portRef I0 (instanceRef DSACK1_INT_0_i_0_a2_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_0)) + )) + (net N_268_i (joined + (portRef O (instanceRef N_268_i)) + (portRef I0 (instanceRef pos_clk_RW_000_INT_5_0_0_o2)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_0_1_0)) + )) + (net N_246_i (joined + (portRef O (instanceRef pos_clk_RW_000_INT_5_0_0_o2)) + (portRef I0 (instanceRef pos_clk_RW_000_INT_5_0_0)) + (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1)) + )) + (net N_132_0 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_6)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_6)) + )) + (net N_113_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_1)) + (portRef D (instanceRef SM_AMIGA_1)) + )) + (net N_142_i (joined + (portRef O (instanceRef N_142_i)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_2_1)) + )) + (net N_141_i (joined + (portRef O (instanceRef N_141_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_1_1)) + )) + (net N_135_0 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_4)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_4)) + )) + (net N_134_0 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_2)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_2)) + )) + (net N_131_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_0_3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_0_i_3)) + )) + (net LDS_000_c_i (joined + (portRef O (instanceRef LDS_000_c_i)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_o2_0)) + )) + (net UDS_000_c_i (joined + (portRef O (instanceRef UDS_000_c_i)) + (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_o2_0)) + )) + (net N_128_i (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_o2_0)) + (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a2_1)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_o2_i_0)) + )) + (net N_107_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_3)) + )) + (net N_203_i (joined + (portRef O (instanceRef N_203_i)) + (portRef I1 (instanceRef un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_o2)) + )) + (net un1_DS_000_ENABLE_0_sqmuxa_0 (joined + (portRef O (instanceRef un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_o2)) + (portRef I1 (instanceRef DS_000_ENABLE_1_sqmuxa_i_0)) + (portRef I0 (instanceRef un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_o2_i)) + )) + (net N_201_i (joined + (portRef O (instanceRef N_201_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_o2_0_1_3)) + )) + (net N_202_i (joined + (portRef O (instanceRef N_202_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_o2_0_3)) + )) + (net VMA_INT_i (joined + (portRef O (instanceRef VMA_INT_i)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_1_2_3)) + )) + (net N_98_i (joined + (portRef O (instanceRef cpu_est_2_0_0_0_o2_2)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_a2_3)) + (portRef I0 (instanceRef cpu_est_2_0_0_a2_0_2)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_o2_i_2)) + )) + (net N_93_i (joined + (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_o2)) + (portRef I0 (instanceRef un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_a2)) + (portRef I0 (instanceRef AS_000_INT_0_i_0_a2_0)) + (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_o2_i)) + )) + (net N_82_i (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_o2)) + (portRef I0 (instanceRef un5_e_0_0_a2)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_1_1_3)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a2_1)) + )) + (net N_80_i (joined + (portRef O (instanceRef cpu_est_2_0_0_0_o2_3)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_o2_i_3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_1_1_3)) + )) + (net N_72_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_1)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0_a2_0_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_3)) + (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_o2)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_1)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a2_1)) + )) + (net N_68_i (joined + (portRef O (instanceRef N_130_i_0_o2_i_o2)) + (portRef I0 (instanceRef cpu_est_0_0_0_a2_0_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_4)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_0)) + (portRef I1 (instanceRef pos_clk_un6_bgack_000_0_0_a2)) + (portRef I0 (instanceRef N_130_i_0_o2_i_o2_i)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_1_2)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a2_0_1)) + (portRef I0 (instanceRef G_90_1)) + )) + (net N_59_i (joined + (portRef O (instanceRef pos_clk_un6_bg_030_0_a3_i)) + (portRef I0 (instanceRef pos_clk_un6_bg_030_0_a3_i_i)) + )) + (net N_190_i (joined + (portRef O (instanceRef N_190_i)) + (portRef I0 (instanceRef cpu_est_0_0_0_0)) + )) + (net N_191_i (joined + (portRef O (instanceRef N_191_i)) + (portRef I1 (instanceRef cpu_est_0_0_0_0)) + )) + (net N_200_i (joined + (portRef O (instanceRef cpu_est_0_0_0_0)) + (portRef D (instanceRef cpu_est_0)) + )) + (net N_267_i (joined + (portRef O (instanceRef N_267_i)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0_1_0)) + )) + (net N_127_i (joined + (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0_0)) + (portRef D (instanceRef SM_AMIGA_i_7)) + )) + (net N_266_i (joined + (portRef O (instanceRef N_266_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_1_6)) + )) + (net N_123_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_6)) + (portRef D (instanceRef SM_AMIGA_6)) + )) + (net N_186_i (joined + (portRef O (instanceRef N_186_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_1_5)) + )) + (net N_121_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_5)) + (portRef D (instanceRef SM_AMIGA_5)) + )) + (net N_185_i (joined + (portRef O (instanceRef N_185_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_1_4)) + )) + (net N_119_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_4)) + (portRef D (instanceRef SM_AMIGA_4)) + )) + (net N_183_i (joined + (portRef O (instanceRef N_183_i)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_1_3)) + )) + (net N_184_i (joined + (portRef O (instanceRef N_184_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_1_3)) + )) + (net N_117_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_3)) + (portRef D (instanceRef SM_AMIGA_3)) + )) + (net N_182_i (joined + (portRef O (instanceRef N_182_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_1_2)) + )) + (net N_115_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_2)) + (portRef D (instanceRef SM_AMIGA_2)) + )) + (net N_181_i (joined + (portRef O (instanceRef N_181_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_1_0)) + )) + (net N_111_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_0)) + (portRef D (instanceRef SM_AMIGA_0)) + )) + (net N_260_i (joined + (portRef O (instanceRef N_260_i)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_1)) + )) + (net (rename pos_clk_SIZE_DMA_6_0_1 "pos_clk.SIZE_DMA_6_0[1]") (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_1)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_i_1)) + )) + (net N_259_i (joined + (portRef O (instanceRef N_259_i)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_0)) + )) + (net (rename pos_clk_SIZE_DMA_6_0_0 "pos_clk.SIZE_DMA_6_0[0]") (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_0)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_i_0)) + )) + (net N_63_0 (joined + (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa_i_0)) + (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_i)) + )) + (net N_155_i (joined + (portRef O (instanceRef N_155_i)) + (portRef I0 (instanceRef un5_e_0_0)) + )) + (net N_162_i (joined + (portRef O (instanceRef N_162_i)) + (portRef I1 (instanceRef un5_e_0_0)) + )) + (net un5_e_0 (joined + (portRef O (instanceRef un5_e_0_0)) + (portRef I0 (instanceRef un5_e_0_0_i)) + )) + (net N_154_i (joined + (portRef O (instanceRef N_154_i)) + (portRef I1 (instanceRef cpu_est_2_0_0_0_3)) + )) + (net (rename cpu_est_2_0_3 "cpu_est_2_0[3]") (joined + (portRef O (instanceRef cpu_est_2_0_0_0_3)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_i_3)) + )) + (net N_149_i (joined + (portRef O (instanceRef N_149_i)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_2)) + )) + (net N_208_i (joined + (portRef O (instanceRef N_208_i)) + (portRef I1 (instanceRef cpu_est_2_0_0_0_2)) + )) + (net (rename cpu_est_2_0_2 "cpu_est_2_0[2]") (joined + (portRef O (instanceRef cpu_est_2_0_0_0_2)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_i_2)) + )) + (net N_147_i (joined + (portRef O (instanceRef N_147_i)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_1)) + )) + (net N_148_i (joined + (portRef O (instanceRef N_148_i)) + (portRef I1 (instanceRef cpu_est_2_0_0_0_1)) + )) + (net (rename cpu_est_2_0_1 "cpu_est_2_0[1]") (joined + (portRef O (instanceRef cpu_est_2_0_0_0_1)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_i_1)) + )) + (net N_146_i (joined + (portRef O (instanceRef N_146_i)) + (portRef I0 (instanceRef A0_DMA_0_0_0)) + )) + (net N_36_0 (joined + (portRef O (instanceRef A0_DMA_0_0_0)) + (portRef I0 (instanceRef A0_DMA_0_0_0_i)) + )) + (net N_145_i (joined + (portRef O (instanceRef N_145_i)) + (portRef I0 (instanceRef AMIGA_DS_0_0_0)) + )) + (net N_35_0 (joined + (portRef O (instanceRef AMIGA_DS_0_0_0)) + (portRef I0 (instanceRef AMIGA_DS_0_0_0_i)) + )) + (net N_143_i (joined + (portRef O (instanceRef N_143_i)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0)) + )) + (net N_144_i (joined + (portRef O (instanceRef N_144_i)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0)) + )) + (net (rename pos_clk_un9_clk_000_pe_0 "pos_clk.un9_clk_000_pe_0") (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_i)) + )) + (net N_20_i (joined + (portRef O (instanceRef N_20_i)) + (portRef I0 (instanceRef IPL_030_1_2)) + )) + (net N_23_0 (joined + (portRef O (instanceRef IPL_030_1_2)) + (portRef I0 (instanceRef IPL_030_1_i_2)) + )) + (net N_19_i (joined + (portRef O (instanceRef N_19_i)) (portRef I0 (instanceRef IPL_030_1_1)) )) - (net N_28_0 (joined + (net N_22_0 (joined (portRef O (instanceRef IPL_030_1_1)) (portRef I0 (instanceRef IPL_030_1_i_1)) )) - (net N_24_i (joined - (portRef O (instanceRef N_24_i)) + (net N_18_i (joined + (portRef O (instanceRef N_18_i)) (portRef I0 (instanceRef IPL_030_1_0)) )) - (net N_27_0 (joined + (net N_21_0 (joined (portRef O (instanceRef IPL_030_1_0)) (portRef I0 (instanceRef IPL_030_1_i_0)) )) + (net (rename IPL_c_i_2 "IPL_c_i[2]") (joined + (portRef O (instanceRef IPL_c_i_2)) + (portRef I0 (instanceRef IPL_D0_0_2)) + )) + (net N_43_0 (joined + (portRef O (instanceRef IPL_D0_0_2)) + (portRef I0 (instanceRef IPL_D0_0_i_2)) + )) (net (rename IPL_c_i_1 "IPL_c_i[1]") (joined (portRef O (instanceRef IPL_c_i_1)) (portRef I0 (instanceRef IPL_D0_0_1)) )) - (net N_50_0 (joined + (net N_42_0 (joined (portRef O (instanceRef IPL_D0_0_1)) (portRef I0 (instanceRef IPL_D0_0_i_1)) )) @@ -3632,285 +3111,293 @@ (portRef O (instanceRef IPL_c_i_0)) (portRef I0 (instanceRef IPL_D0_0_0)) )) - (net N_49_0 (joined + (net N_41_0 (joined (portRef O (instanceRef IPL_D0_0_0)) (portRef I0 (instanceRef IPL_D0_0_i_0)) )) - (net N_14_i (joined - (portRef O (instanceRef N_14_i)) - (portRef I0 (instanceRef AS_030_000_SYNC_1)) + (net DTACK_c_i (joined + (portRef O (instanceRef DTACK_c_i)) + (portRef I0 (instanceRef DTACK_D0_0)) )) - (net N_39_0 (joined - (portRef O (instanceRef AS_030_000_SYNC_1)) - (portRef I0 (instanceRef AS_030_000_SYNC_1_i)) + (net N_45_0 (joined + (portRef O (instanceRef DTACK_D0_0)) + (portRef I0 (instanceRef DTACK_D0_0_i)) )) - (net N_15_i (joined - (portRef O (instanceRef N_15_i)) - (portRef I0 (instanceRef RW_000_INT_1)) + (net VPA_c_i (joined + (portRef O (instanceRef VPA_c_i)) + (portRef I1 (instanceRef VPA_D_0)) )) - (net N_38_0 (joined - (portRef O (instanceRef RW_000_INT_1)) - (portRef I0 (instanceRef RW_000_INT_1_i)) + (net N_44_0 (joined + (portRef O (instanceRef VPA_D_0)) + (portRef I0 (instanceRef VPA_D_0_i)) )) - (net N_91_0_1 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_o2_1)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_o2_3)) + (net N_13_i (joined + (portRef O (instanceRef N_13_i)) + (portRef I0 (instanceRef VMA_INT_1)) )) - (net N_91_0_2 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_o2_2)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_o2_3)) + (net N_27_0 (joined + (portRef O (instanceRef VMA_INT_1)) + (portRef I0 (instanceRef VMA_INT_1_i)) )) - (net N_91_0_3 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_o2_3)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_o2)) + (net LDS_000_INT_i (joined + (portRef O (instanceRef LDS_000_INT_i)) + (portRef I1 (instanceRef un1_LDS_000_INT)) )) - (net N_265_i_1 (joined - (portRef O (instanceRef RST_DLY_e2_i_1)) - (portRef I0 (instanceRef RST_DLY_e2_i)) + (net un1_LDS_000_INT_0 (joined + (portRef O (instanceRef un1_LDS_000_INT)) + (portRef I0 (instanceRef un1_LDS_000_INT_i)) )) - (net N_266_i_1 (joined - (portRef O (instanceRef RST_DLY_e1_i_1)) - (portRef I0 (instanceRef RST_DLY_e1_i)) + (net UDS_000_INT_i (joined + (portRef O (instanceRef UDS_000_INT_i)) + (portRef I1 (instanceRef un1_UDS_000_INT)) )) - (net N_266_i_2 (joined - (portRef O (instanceRef RST_DLY_e1_i_2)) - (portRef I1 (instanceRef RST_DLY_e1_i)) + (net un1_UDS_000_INT_0 (joined + (portRef O (instanceRef un1_UDS_000_INT)) + (portRef I0 (instanceRef un1_UDS_000_INT_i)) )) - (net N_138_i_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_1_1)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_1)) + (net N_96_0_1 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0_o2_1_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0_o2_0)) )) - (net N_148_i_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_1_6)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_6)) + (net N_96_0_2 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0_o2_2_0)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_0_o2_0)) )) - (net N_144_i_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_1_4)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_4)) + (net N_282_0_1 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d1_i_i_o2_1)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d1_i_i_o2_4)) )) - (net N_142_i_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_1_3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_3)) + (net N_282_0_2 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d1_i_i_o2_2)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d1_i_i_o2_4)) )) - (net N_140_i_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_1_2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_2)) + (net N_282_0_3 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d1_i_i_o2_3)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d1_i_i_o2)) + )) + (net N_282_0_4 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d1_i_i_o2_4)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d1_i_i_o2)) )) (net (rename pos_clk_un10_sm_amiga_i_1 "pos_clk.un10_sm_amiga_i_1") (joined (portRef O (instanceRef pos_clk_un10_sm_amiga_1)) (portRef I0 (instanceRef pos_clk_un10_sm_amiga)) )) - (net N_85_i_1 (joined - (portRef O (instanceRef pos_clk_un15_clk_000_d_i_i_o2_1)) - (portRef I0 (instanceRef pos_clk_un15_clk_000_d_i_i_o2)) - )) - (net N_85_i_2 (joined - (portRef O (instanceRef pos_clk_un15_clk_000_d_i_i_o2_2)) - (portRef I1 (instanceRef pos_clk_un15_clk_000_d_i_i_o2)) - )) - (net N_277_1 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_a2_0_1)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_4)) - )) - (net N_277_2 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_a2_0_2)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_4)) - )) - (net N_277_3 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_a2_0_3)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_5)) - )) - (net N_277_4 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_a2_0_4)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_a2_0)) - )) - (net N_277_5 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_a2_0_5)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_a2_0)) - )) (net un10_ciin_1 (joined - (portRef O (instanceRef un10_ciin_1)) - (portRef I0 (instanceRef un10_ciin_7)) + (portRef O (instanceRef un13_ciin_i_0_0_a2_1)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a2_7)) )) (net un10_ciin_2 (joined - (portRef O (instanceRef un10_ciin_2)) - (portRef I1 (instanceRef un10_ciin_7)) + (portRef O (instanceRef un13_ciin_i_0_0_a2_2)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a2_7)) )) (net un10_ciin_3 (joined - (portRef O (instanceRef un10_ciin_3)) - (portRef I0 (instanceRef un10_ciin_8)) + (portRef O (instanceRef un13_ciin_i_0_0_a2_3)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a2_8)) )) (net un10_ciin_4 (joined - (portRef O (instanceRef un10_ciin_4)) - (portRef I1 (instanceRef un10_ciin_8)) + (portRef O (instanceRef un13_ciin_i_0_0_a2_4)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a2_8)) )) (net un10_ciin_5 (joined - (portRef O (instanceRef un10_ciin_5)) - (portRef I0 (instanceRef un10_ciin_9)) + (portRef O (instanceRef un13_ciin_i_0_0_a2_5)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a2_9)) )) (net un10_ciin_6 (joined - (portRef O (instanceRef un10_ciin_6)) - (portRef I1 (instanceRef un10_ciin_9)) + (portRef O (instanceRef un13_ciin_i_0_0_a2_6)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a2_9)) )) (net un10_ciin_7 (joined - (portRef O (instanceRef un10_ciin_7)) - (portRef I0 (instanceRef un10_ciin_10)) + (portRef O (instanceRef un13_ciin_i_0_0_a2_7)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a2_10)) )) (net un10_ciin_8 (joined - (portRef O (instanceRef un10_ciin_8)) - (portRef I1 (instanceRef un10_ciin_10)) + (portRef O (instanceRef un13_ciin_i_0_0_a2_8)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a2_10)) )) (net un10_ciin_9 (joined - (portRef O (instanceRef un10_ciin_9)) - (portRef I0 (instanceRef un10_ciin_11)) + (portRef O (instanceRef un13_ciin_i_0_0_a2_9)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a2_11)) )) (net un10_ciin_10 (joined - (portRef O (instanceRef un10_ciin_10)) - (portRef I0 (instanceRef un10_ciin)) + (portRef O (instanceRef un13_ciin_i_0_0_a2_10)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a2)) )) (net un10_ciin_11 (joined - (portRef O (instanceRef un10_ciin_11)) - (portRef I1 (instanceRef un10_ciin)) + (portRef O (instanceRef un13_ciin_i_0_0_a2_11)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a2)) )) - (net un6_amiga_bus_data_dir_1 (joined - (portRef O (instanceRef un6_amiga_bus_data_dir_1)) - (portRef I0 (instanceRef un6_amiga_bus_data_dir)) + (net N_201_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_1_1_3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_1_3)) )) - (net un6_amiga_bus_data_dir_2 (joined - (portRef O (instanceRef un6_amiga_bus_data_dir_2)) - (portRef I1 (instanceRef un6_amiga_bus_data_dir)) + (net N_201_2 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_1_2_3)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_1_3)) )) - (net (rename pos_clk_as_000_dma6_1 "pos_clk.as_000_dma6_1") (joined - (portRef O (instanceRef pos_clk_as_000_dma6_1)) - (portRef I0 (instanceRef pos_clk_as_000_dma6)) + (net N_131_i_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_0_1_3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_0_3)) )) - (net (rename pos_clk_as_000_dma6_2 "pos_clk.as_000_dma6_2") (joined - (portRef O (instanceRef pos_clk_as_000_dma6_2)) - (portRef I1 (instanceRef pos_clk_as_000_dma6)) + (net N_134_0_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_1_2)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_2)) )) - (net DS_000_DMA_1_sqmuxa_1 (joined - (portRef O (instanceRef DS_000_DMA_1_sqmuxa_1)) - (portRef I0 (instanceRef DS_000_DMA_1_sqmuxa)) + (net N_113_i_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_1_1)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_1)) )) - (net (rename pos_clk_un4_rw_000_1 "pos_clk.un4_rw_000_1") (joined - (portRef O (instanceRef pos_clk_un4_rw_000_1)) - (portRef I0 (instanceRef pos_clk_un4_rw_000)) + (net N_113_i_2 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_2_1)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_1)) )) - (net (rename pos_clk_un4_rw_000_2 "pos_clk.un4_rw_000_2") (joined - (portRef O (instanceRef pos_clk_un4_rw_000_2)) - (portRef I1 (instanceRef pos_clk_un4_rw_000)) + (net N_144_1 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a2_0_1)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a2_0)) )) - (net (rename pos_clk_un13_clk_out_int_1 "pos_clk.un13_clk_out_int_1") (joined - (portRef O (instanceRef pos_clk_un13_clk_out_int_1)) - (portRef I0 (instanceRef pos_clk_un13_clk_out_int)) + (net N_144_2 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a2_0_2)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a2_0)) )) - (net N_125_1 (joined - (portRef O (instanceRef RESET_OUT_2_0_a2_0_1)) - (portRef I0 (instanceRef RESET_OUT_2_0_a2_0)) + (net N_143_1 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a2_1)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a2)) )) - (net N_116_1 (joined - (portRef O (instanceRef RST_DLY_e0_i_a2_0_1)) - (portRef I0 (instanceRef RST_DLY_e0_i_a2_0)) + (net N_143_2 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a2_2)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a2)) )) - (net (rename pos_clk_un29_clk_000_ne_1_1 "pos_clk.un29_clk_000_ne_1_1") (joined - (portRef O (instanceRef pos_clk_un29_clk_000_ne_1_1)) - (portRef I0 (instanceRef pos_clk_un29_clk_000_ne_1_3)) + (net N_163_1 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d1_i_i_a2_1)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d1_i_i_a2_3)) )) - (net (rename pos_clk_un29_clk_000_ne_1_2 "pos_clk.un29_clk_000_ne_1_2") (joined - (portRef O (instanceRef pos_clk_un29_clk_000_ne_1_2)) - (portRef I1 (instanceRef pos_clk_un29_clk_000_ne_1_3)) + (net N_163_2 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d1_i_i_a2_2)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d1_i_i_a2_3)) )) - (net (rename pos_clk_un29_clk_000_ne_1_3 "pos_clk.un29_clk_000_ne_1_3") (joined - (portRef O (instanceRef pos_clk_un29_clk_000_ne_1_3)) - (portRef I0 (instanceRef pos_clk_un29_clk_000_ne_1)) - )) - (net N_261_1 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_a3_1)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_a3)) - )) - (net N_261_2 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_a3_2)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_a3)) - )) - (net N_262_1 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_a3_0_1)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_a3_0)) - )) - (net N_262_2 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_a3_0_2)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_a3_0)) - )) - (net DS_000_ENABLE_0_sqmuxa_1_1 (joined - (portRef O (instanceRef DS_000_ENABLE_0_sqmuxa_1_1)) - (portRef I0 (instanceRef DS_000_ENABLE_0_sqmuxa_1)) - )) - (net N_259_1 (joined - (portRef O (instanceRef cpu_est_2_0_0_a3_0_1_1)) - (portRef I0 (instanceRef cpu_est_2_0_0_a3_0_1)) - )) - (net N_250_i_1 (joined - (portRef O (instanceRef un5_e_i_1)) - (portRef I0 (instanceRef un5_e_i)) - )) - (net N_189_i_1 (joined - (portRef O (instanceRef cpu_est_2_i_0_1_3)) - (portRef I0 (instanceRef cpu_est_2_i_0_3)) - )) - (net (rename pos_clk_un6_bg_030_1 "pos_clk.un6_bg_030_1") (joined - (portRef O (instanceRef pos_clk_un6_bg_030_0_a2_1)) - (portRef I0 (instanceRef pos_clk_un6_bg_030_0_a2)) - )) - (net N_108_1 (joined - (portRef O (instanceRef RST_DLY_e2_i_a2_1)) - (portRef I0 (instanceRef RST_DLY_e2_i_a2)) - )) - (net N_114_1 (joined - (portRef O (instanceRef RST_DLY_e1_i_a2_1_1)) - (portRef I0 (instanceRef RST_DLY_e1_i_a2_1)) - )) - (net un21_berr_1 (joined - (portRef O (instanceRef un21_berr_0_a2_1)) - (portRef I0 (instanceRef un21_berr_0_a2)) + (net N_163_3 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d1_i_i_a2_3)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d1_i_i_a2)) )) (net un21_fpu_cs_1 (joined - (portRef O (instanceRef un21_fpu_cs_0_a2_1)) - (portRef I0 (instanceRef un21_fpu_cs_0_a2)) + (portRef O (instanceRef un21_fpu_cs_0_a3_0_a2_1)) + (portRef I0 (instanceRef un21_fpu_cs_0_a3_0_a2)) )) - (net N_130_1 (joined - (portRef O (instanceRef un11_amiga_bus_enable_high_0_a2_0_1)) - (portRef I0 (instanceRef un11_amiga_bus_enable_high_0_a2_0)) + (net un21_berr_1_0 (joined + (portRef O (instanceRef un21_berr_0_a3_0_a2_1_0)) + (portRef I0 (instanceRef un21_berr_0_a3_0_a2)) )) - (net N_136_i_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_1_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0)) + (net (rename pos_clk_CYCLE_DMA_5_1_1 "pos_clk.CYCLE_DMA_5_1[1]") (joined + (portRef O (instanceRef pos_clk_CYCLE_DMA_5_1_1)) + (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_1)) )) - (net N_152_i_1 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_i_0_1_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0)) + (net N_199_1 (joined + (portRef O (instanceRef G_90_1)) + (portRef I0 (instanceRef G_90)) )) - (net N_146_i_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_1_5)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_5)) + (net AS_000_DMA_1_sqmuxa_1 (joined + (portRef O (instanceRef AS_000_DMA_1_sqmuxa_1)) + (portRef I0 (instanceRef AS_000_DMA_1_sqmuxa)) )) - (net N_267_i_1 (joined - (portRef O (instanceRef RST_DLY_e0_i_1)) - (portRef I0 (instanceRef RST_DLY_e0_i)) + (net N_140_1 (joined + (portRef O (instanceRef pos_clk_as_000_dma6_i_0_0_a2_1)) + (portRef I0 (instanceRef pos_clk_as_000_dma6_i_0_0_a2)) + )) + (net N_66_i_1 (joined + (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i_1)) + (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i)) + )) + (net N_66_i_2 (joined + (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i_2)) + (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0_i)) + )) + (net N_205_i_1 (joined + (portRef O (instanceRef pos_clk_as_000_dma6_i_0_0_1)) + (portRef I0 (instanceRef pos_clk_as_000_dma6_i_0_0)) + )) + (net N_205_i_2 (joined + (portRef O (instanceRef pos_clk_as_000_dma6_i_0_0_2)) + (portRef I1 (instanceRef pos_clk_as_000_dma6_i_0_0)) + )) + (net N_180_1 (joined + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a2_0_1)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a2_0)) + )) + (net N_180_2 (joined + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a2_0_2)) + (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a2_0)) + )) + (net N_59_i_1 (joined + (portRef O (instanceRef pos_clk_un6_bg_030_0_a3_i_1)) + (portRef I0 (instanceRef pos_clk_un6_bg_030_0_a3_i)) + )) + (net N_127_i_1 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0_1_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0_0)) + )) + (net N_123_i_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_1_6)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_6)) + )) + (net N_121_i_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_1_5)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_5)) + )) + (net N_119_i_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_1_4)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_4)) + )) + (net N_117_i_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_1_3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_3)) + )) + (net N_115_i_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_1_2)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_2)) + )) + (net N_111_i_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_1_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_0)) + )) + (net N_165_1 (joined + (portRef O (instanceRef un11_amiga_bus_enable_high_0_0_a2_0_1)) + (portRef I0 (instanceRef un11_amiga_bus_enable_high_0_0_a2_0)) + )) + (net N_162_1 (joined + (portRef O (instanceRef un5_e_0_0_a2_0_1)) + (portRef I0 (instanceRef un5_e_0_0_a2_0)) + )) + (net N_148_1 (joined + (portRef O (instanceRef cpu_est_2_0_0_a2_0_1_1)) + (portRef I0 (instanceRef cpu_est_2_0_0_a2_0_1)) )) (net (rename pos_clk_ipl_1 "pos_clk.ipl_1") (joined - (portRef O (instanceRef G_125_1)) - (portRef I0 (instanceRef G_125)) + (portRef O (instanceRef G_108_1)) + (portRef I0 (instanceRef G_108)) )) - (net (rename BG_000_0_un3 "BG_000_0.un3") (joined - (portRef O (instanceRef BG_000_0_r)) - (portRef I1 (instanceRef BG_000_0_n)) + (net (rename DS_000_DMA_0_un3 "DS_000_DMA_0.un3") (joined + (portRef O (instanceRef DS_000_DMA_0_r)) + (portRef I1 (instanceRef DS_000_DMA_0_n)) )) - (net (rename BG_000_0_un1 "BG_000_0.un1") (joined - (portRef O (instanceRef BG_000_0_m)) - (portRef I0 (instanceRef BG_000_0_p)) + (net (rename DS_000_DMA_0_un1 "DS_000_DMA_0.un1") (joined + (portRef O (instanceRef DS_000_DMA_0_m)) + (portRef I0 (instanceRef DS_000_DMA_0_p)) )) - (net (rename BG_000_0_un0 "BG_000_0.un0") (joined - (portRef O (instanceRef BG_000_0_n)) - (portRef I1 (instanceRef BG_000_0_p)) + (net (rename DS_000_DMA_0_un0 "DS_000_DMA_0.un0") (joined + (portRef O (instanceRef DS_000_DMA_0_n)) + (portRef I1 (instanceRef DS_000_DMA_0_p)) + )) + (net (rename AS_000_DMA_0_un3 "AS_000_DMA_0.un3") (joined + (portRef O (instanceRef AS_000_DMA_0_r)) + (portRef I1 (instanceRef AS_000_DMA_0_n)) + )) + (net (rename AS_000_DMA_0_un1 "AS_000_DMA_0.un1") (joined + (portRef O (instanceRef AS_000_DMA_0_m)) + (portRef I0 (instanceRef AS_000_DMA_0_p)) + )) + (net (rename AS_000_DMA_0_un0 "AS_000_DMA_0.un0") (joined + (portRef O (instanceRef AS_000_DMA_0_n)) + (portRef I1 (instanceRef AS_000_DMA_0_p)) )) (net (rename UDS_000_INT_0_un3 "UDS_000_INT_0.un3") (joined (portRef O (instanceRef UDS_000_INT_0_r)) @@ -3924,6 +3411,18 @@ (portRef O (instanceRef UDS_000_INT_0_n)) (portRef I1 (instanceRef UDS_000_INT_0_p)) )) + (net (rename BG_000_0_un3 "BG_000_0.un3") (joined + (portRef O (instanceRef BG_000_0_r)) + (portRef I1 (instanceRef BG_000_0_n)) + )) + (net (rename BG_000_0_un1 "BG_000_0.un1") (joined + (portRef O (instanceRef BG_000_0_m)) + (portRef I0 (instanceRef BG_000_0_p)) + )) + (net (rename BG_000_0_un0 "BG_000_0.un0") (joined + (portRef O (instanceRef BG_000_0_n)) + (portRef I1 (instanceRef BG_000_0_p)) + )) (net (rename LDS_000_INT_0_un3 "LDS_000_INT_0.un3") (joined (portRef O (instanceRef LDS_000_INT_0_r)) (portRef I1 (instanceRef LDS_000_INT_0_n)) @@ -3936,41 +3435,53 @@ (portRef O (instanceRef LDS_000_INT_0_n)) (portRef I1 (instanceRef LDS_000_INT_0_p)) )) - (net (rename DS_000_ENABLE_0_un3 "DS_000_ENABLE_0.un3") (joined - (portRef O (instanceRef DS_000_ENABLE_0_r)) - (portRef I1 (instanceRef DS_000_ENABLE_0_n)) + (net (rename AS_030_D1_0_un3 "AS_030_D1_0.un3") (joined + (portRef O (instanceRef AS_030_D1_0_r)) + (portRef I1 (instanceRef AS_030_D1_0_n)) )) - (net (rename DS_000_ENABLE_0_un1 "DS_000_ENABLE_0.un1") (joined - (portRef O (instanceRef DS_000_ENABLE_0_m)) - (portRef I0 (instanceRef DS_000_ENABLE_0_p)) + (net (rename AS_030_D1_0_un1 "AS_030_D1_0.un1") (joined + (portRef O (instanceRef AS_030_D1_0_m)) + (portRef I0 (instanceRef AS_030_D1_0_p)) )) - (net (rename DS_000_ENABLE_0_un0 "DS_000_ENABLE_0.un0") (joined - (portRef O (instanceRef DS_000_ENABLE_0_n)) - (portRef I1 (instanceRef DS_000_ENABLE_0_p)) + (net (rename AS_030_D1_0_un0 "AS_030_D1_0.un0") (joined + (portRef O (instanceRef AS_030_D1_0_n)) + (portRef I1 (instanceRef AS_030_D1_0_p)) )) - (net (rename IPL_030_0_2__un3 "IPL_030_0_2_.un3") (joined - (portRef O (instanceRef IPL_030_0_2__r)) - (portRef I1 (instanceRef IPL_030_0_2__n)) + (net (rename RW_000_INT_0_un3 "RW_000_INT_0.un3") (joined + (portRef O (instanceRef RW_000_INT_0_r)) + (portRef I1 (instanceRef RW_000_INT_0_n)) )) - (net (rename IPL_030_0_2__un1 "IPL_030_0_2_.un1") (joined - (portRef O (instanceRef IPL_030_0_2__m)) - (portRef I0 (instanceRef IPL_030_0_2__p)) + (net (rename RW_000_INT_0_un1 "RW_000_INT_0.un1") (joined + (portRef O (instanceRef RW_000_INT_0_m)) + (portRef I0 (instanceRef RW_000_INT_0_p)) )) - (net (rename IPL_030_0_2__un0 "IPL_030_0_2_.un0") (joined - (portRef O (instanceRef IPL_030_0_2__n)) - (portRef I1 (instanceRef IPL_030_0_2__p)) + (net (rename RW_000_INT_0_un0 "RW_000_INT_0.un0") (joined + (portRef O (instanceRef RW_000_INT_0_n)) + (portRef I1 (instanceRef RW_000_INT_0_p)) )) - (net (rename VMA_INT_0_un3 "VMA_INT_0.un3") (joined - (portRef O (instanceRef VMA_INT_0_r)) - (portRef I1 (instanceRef VMA_INT_0_n)) + (net (rename AS_030_000_SYNC_0_un3 "AS_030_000_SYNC_0.un3") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_r)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_n)) )) - (net (rename VMA_INT_0_un1 "VMA_INT_0.un1") (joined - (portRef O (instanceRef VMA_INT_0_m)) - (portRef I0 (instanceRef VMA_INT_0_p)) + (net (rename AS_030_000_SYNC_0_un1 "AS_030_000_SYNC_0.un1") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_m)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_p)) )) - (net (rename VMA_INT_0_un0 "VMA_INT_0.un0") (joined - (portRef O (instanceRef VMA_INT_0_n)) - (portRef I1 (instanceRef VMA_INT_0_p)) + (net (rename AS_030_000_SYNC_0_un0 "AS_030_000_SYNC_0.un0") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_n)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_p)) + )) + (net (rename BGACK_030_INT_0_un3 "BGACK_030_INT_0.un3") (joined + (portRef O (instanceRef BGACK_030_INT_0_r)) + (portRef I1 (instanceRef BGACK_030_INT_0_n)) + )) + (net (rename BGACK_030_INT_0_un1 "BGACK_030_INT_0.un1") (joined + (portRef O (instanceRef BGACK_030_INT_0_m)) + (portRef I0 (instanceRef BGACK_030_INT_0_p)) + )) + (net (rename BGACK_030_INT_0_un0 "BGACK_030_INT_0.un0") (joined + (portRef O (instanceRef BGACK_030_INT_0_n)) + (portRef I1 (instanceRef BGACK_030_INT_0_p)) )) (net (rename cpu_est_0_1__un3 "cpu_est_0_1_.un3") (joined (portRef O (instanceRef cpu_est_0_1__r)) @@ -4008,126 +3519,6 @@ (portRef O (instanceRef cpu_est_0_3__n)) (portRef I1 (instanceRef cpu_est_0_3__p)) )) - (net (rename pos_clk_un31_clk_000_ne_1_i_m2_un3 "pos_clk.un31_clk_000_ne_1_i_m2.un3") (joined - (portRef O (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_r)) - (portRef I1 (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_n)) - )) - (net (rename pos_clk_un31_clk_000_ne_1_i_m2_un1 "pos_clk.un31_clk_000_ne_1_i_m2.un1") (joined - (portRef O (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_m)) - (portRef I0 (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_p)) - )) - (net (rename pos_clk_un31_clk_000_ne_1_i_m2_un0 "pos_clk.un31_clk_000_ne_1_i_m2.un0") (joined - (portRef O (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_n)) - (portRef I1 (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_p)) - )) - (net (rename BGACK_030_INT_0_un3 "BGACK_030_INT_0.un3") (joined - (portRef O (instanceRef BGACK_030_INT_0_r)) - (portRef I1 (instanceRef BGACK_030_INT_0_n)) - )) - (net (rename BGACK_030_INT_0_un1 "BGACK_030_INT_0.un1") (joined - (portRef O (instanceRef BGACK_030_INT_0_m)) - (portRef I0 (instanceRef BGACK_030_INT_0_p)) - )) - (net (rename BGACK_030_INT_0_un0 "BGACK_030_INT_0.un0") (joined - (portRef O (instanceRef BGACK_030_INT_0_n)) - (portRef I1 (instanceRef BGACK_030_INT_0_p)) - )) - (net (rename DS_000_DMA_0_un3 "DS_000_DMA_0.un3") (joined - (portRef O (instanceRef DS_000_DMA_0_r)) - (portRef I1 (instanceRef DS_000_DMA_0_n)) - )) - (net (rename DS_000_DMA_0_un1 "DS_000_DMA_0.un1") (joined - (portRef O (instanceRef DS_000_DMA_0_m)) - (portRef I0 (instanceRef DS_000_DMA_0_p)) - )) - (net (rename DS_000_DMA_0_un0 "DS_000_DMA_0.un0") (joined - (portRef O (instanceRef DS_000_DMA_0_n)) - (portRef I1 (instanceRef DS_000_DMA_0_p)) - )) - (net (rename AS_000_DMA_0_un3 "AS_000_DMA_0.un3") (joined - (portRef O (instanceRef AS_000_DMA_0_r)) - (portRef I1 (instanceRef AS_000_DMA_0_n)) - )) - (net (rename AS_000_DMA_0_un1 "AS_000_DMA_0.un1") (joined - (portRef O (instanceRef AS_000_DMA_0_m)) - (portRef I0 (instanceRef AS_000_DMA_0_p)) - )) - (net (rename AS_000_DMA_0_un0 "AS_000_DMA_0.un0") (joined - (portRef O (instanceRef AS_000_DMA_0_n)) - (portRef I1 (instanceRef AS_000_DMA_0_p)) - )) - (net (rename SIZE_DMA_0_1__un3 "SIZE_DMA_0_1_.un3") (joined - (portRef O (instanceRef SIZE_DMA_0_1__r)) - (portRef I1 (instanceRef SIZE_DMA_0_1__n)) - )) - (net (rename SIZE_DMA_0_1__un1 "SIZE_DMA_0_1_.un1") (joined - (portRef O (instanceRef SIZE_DMA_0_1__m)) - (portRef I0 (instanceRef SIZE_DMA_0_1__p)) - )) - (net (rename SIZE_DMA_0_1__un0 "SIZE_DMA_0_1_.un0") (joined - (portRef O (instanceRef SIZE_DMA_0_1__n)) - (portRef I1 (instanceRef SIZE_DMA_0_1__p)) - )) - (net (rename SIZE_DMA_0_0__un3 "SIZE_DMA_0_0_.un3") (joined - (portRef O (instanceRef SIZE_DMA_0_0__r)) - (portRef I1 (instanceRef SIZE_DMA_0_0__n)) - )) - (net (rename SIZE_DMA_0_0__un1 "SIZE_DMA_0_0_.un1") (joined - (portRef O (instanceRef SIZE_DMA_0_0__m)) - (portRef I0 (instanceRef SIZE_DMA_0_0__p)) - )) - (net (rename SIZE_DMA_0_0__un0 "SIZE_DMA_0_0_.un0") (joined - (portRef O (instanceRef SIZE_DMA_0_0__n)) - (portRef I1 (instanceRef SIZE_DMA_0_0__p)) - )) - (net (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_un3 "AMIGA_BUS_ENABLE_DMA_HIGH_0.un3") (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_r)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_n)) - )) - (net (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_un1 "AMIGA_BUS_ENABLE_DMA_HIGH_0.un1") (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_m)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_p)) - )) - (net (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_un0 "AMIGA_BUS_ENABLE_DMA_HIGH_0.un0") (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_n)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_p)) - )) - (net (rename AMIGA_BUS_ENABLE_DMA_LOW_0_un3 "AMIGA_BUS_ENABLE_DMA_LOW_0.un3") (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_r)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_n)) - )) - (net (rename AMIGA_BUS_ENABLE_DMA_LOW_0_un1 "AMIGA_BUS_ENABLE_DMA_LOW_0.un1") (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_m)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_p)) - )) - (net (rename AMIGA_BUS_ENABLE_DMA_LOW_0_un0 "AMIGA_BUS_ENABLE_DMA_LOW_0.un0") (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_n)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_p)) - )) - (net (rename A0_DMA_0_un3 "A0_DMA_0.un3") (joined - (portRef O (instanceRef A0_DMA_0_r)) - (portRef I1 (instanceRef A0_DMA_0_n)) - )) - (net (rename A0_DMA_0_un1 "A0_DMA_0.un1") (joined - (portRef O (instanceRef A0_DMA_0_m)) - (portRef I0 (instanceRef A0_DMA_0_p)) - )) - (net (rename A0_DMA_0_un0 "A0_DMA_0.un0") (joined - (portRef O (instanceRef A0_DMA_0_n)) - (portRef I1 (instanceRef A0_DMA_0_p)) - )) - (net (rename RW_000_DMA_0_un3 "RW_000_DMA_0.un3") (joined - (portRef O (instanceRef RW_000_DMA_0_r)) - (portRef I1 (instanceRef RW_000_DMA_0_n)) - )) - (net (rename RW_000_DMA_0_un1 "RW_000_DMA_0.un1") (joined - (portRef O (instanceRef RW_000_DMA_0_m)) - (portRef I0 (instanceRef RW_000_DMA_0_p)) - )) - (net (rename RW_000_DMA_0_un0 "RW_000_DMA_0.un0") (joined - (portRef O (instanceRef RW_000_DMA_0_n)) - (portRef I1 (instanceRef RW_000_DMA_0_p)) - )) (net (rename IPL_030_0_0__un3 "IPL_030_0_0_.un3") (joined (portRef O (instanceRef IPL_030_0_0__r)) (portRef I1 (instanceRef IPL_030_0_0__n)) @@ -4152,29 +3543,41 @@ (portRef O (instanceRef IPL_030_0_1__n)) (portRef I1 (instanceRef IPL_030_0_1__p)) )) - (net (rename AS_030_000_SYNC_0_un3 "AS_030_000_SYNC_0.un3") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_r)) - (portRef I1 (instanceRef AS_030_000_SYNC_0_n)) + (net (rename IPL_030_0_2__un3 "IPL_030_0_2_.un3") (joined + (portRef O (instanceRef IPL_030_0_2__r)) + (portRef I1 (instanceRef IPL_030_0_2__n)) )) - (net (rename AS_030_000_SYNC_0_un1 "AS_030_000_SYNC_0.un1") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_m)) - (portRef I0 (instanceRef AS_030_000_SYNC_0_p)) + (net (rename IPL_030_0_2__un1 "IPL_030_0_2_.un1") (joined + (portRef O (instanceRef IPL_030_0_2__m)) + (portRef I0 (instanceRef IPL_030_0_2__p)) )) - (net (rename AS_030_000_SYNC_0_un0 "AS_030_000_SYNC_0.un0") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_n)) - (portRef I1 (instanceRef AS_030_000_SYNC_0_p)) + (net (rename IPL_030_0_2__un0 "IPL_030_0_2_.un0") (joined + (portRef O (instanceRef IPL_030_0_2__n)) + (portRef I1 (instanceRef IPL_030_0_2__p)) )) - (net (rename RW_000_INT_0_un3 "RW_000_INT_0.un3") (joined - (portRef O (instanceRef RW_000_INT_0_r)) - (portRef I1 (instanceRef RW_000_INT_0_n)) + (net (rename DS_000_ENABLE_0_un3 "DS_000_ENABLE_0.un3") (joined + (portRef O (instanceRef DS_000_ENABLE_0_r)) + (portRef I1 (instanceRef DS_000_ENABLE_0_n)) )) - (net (rename RW_000_INT_0_un1 "RW_000_INT_0.un1") (joined - (portRef O (instanceRef RW_000_INT_0_m)) - (portRef I0 (instanceRef RW_000_INT_0_p)) + (net (rename DS_000_ENABLE_0_un1 "DS_000_ENABLE_0.un1") (joined + (portRef O (instanceRef DS_000_ENABLE_0_m)) + (portRef I0 (instanceRef DS_000_ENABLE_0_p)) )) - (net (rename RW_000_INT_0_un0 "RW_000_INT_0.un0") (joined - (portRef O (instanceRef RW_000_INT_0_n)) - (portRef I1 (instanceRef RW_000_INT_0_p)) + (net (rename DS_000_ENABLE_0_un0 "DS_000_ENABLE_0.un0") (joined + (portRef O (instanceRef DS_000_ENABLE_0_n)) + (portRef I1 (instanceRef DS_000_ENABLE_0_p)) + )) + (net (rename VMA_INT_0_un3 "VMA_INT_0.un3") (joined + (portRef O (instanceRef VMA_INT_0_r)) + (portRef I1 (instanceRef VMA_INT_0_n)) + )) + (net (rename VMA_INT_0_un1 "VMA_INT_0.un1") (joined + (portRef O (instanceRef VMA_INT_0_m)) + (portRef I0 (instanceRef VMA_INT_0_p)) + )) + (net (rename VMA_INT_0_un0 "VMA_INT_0.un0") (joined + (portRef O (instanceRef VMA_INT_0_n)) + (portRef I1 (instanceRef VMA_INT_0_p)) )) ) (property orig_inst_of (string "BUS68030")) diff --git a/Logic/BUS68030.fse b/Logic/BUS68030.fse index aa37a1c..f631b3a 100644 --- a/Logic/BUS68030.fse +++ b/Logic/BUS68030.fse @@ -1,20 +1,20 @@ -fsm_encoding {7132381321} onehot +fsm_encoding {7133381331} onehot -fsm_state_encoding {7132381321} idle_p {00000000} +fsm_state_encoding {7133381331} idle_p {00000000} -fsm_state_encoding {7132381321} idle_n {00000011} +fsm_state_encoding {7133381331} idle_n {00000011} -fsm_state_encoding {7132381321} as_set_p {00000101} +fsm_state_encoding {7133381331} as_set_p {00000101} -fsm_state_encoding {7132381321} as_set_n {00001001} +fsm_state_encoding {7133381331} as_set_n {00001001} -fsm_state_encoding {7132381321} sample_dtack_p {00010001} +fsm_state_encoding {7133381331} sample_dtack_p {00010001} -fsm_state_encoding {7132381321} data_fetch_n {00100001} +fsm_state_encoding {7133381331} data_fetch_n {00100001} -fsm_state_encoding {7132381321} data_fetch_p {01000001} +fsm_state_encoding {7133381331} data_fetch_p {01000001} -fsm_state_encoding {7132381321} end_cycle_n {10000001} +fsm_state_encoding {7133381331} end_cycle_n {10000001} -fsm_registers {7132381321} {SM_AMIGA[0]} {SM_AMIGA[1]} {SM_AMIGA[2]} {SM_AMIGA[3]} {SM_AMIGA[4]} {SM_AMIGA[5]} {SM_AMIGA[6]} {SM_AMIGA_i[7]} +fsm_registers {7133381331} {SM_AMIGA[0]} {SM_AMIGA[1]} {SM_AMIGA[2]} {SM_AMIGA[3]} {SM_AMIGA[4]} {SM_AMIGA[5]} {SM_AMIGA[6]} {SM_AMIGA_i[7]} diff --git a/Logic/BUS68030.prj b/Logic/BUS68030.prj index 3c00fbe..8fee42f 100644 --- a/Logic/BUS68030.prj +++ b/Logic/BUS68030.prj @@ -1,6 +1,6 @@ #-- Lattice Semiconductor Corporation Ltd. #-- Synplify OEM project file c:/users/matze/amiga/hardwarehacks/68030-tk/github/logic\BUS68030.prj -#-- Written on Thu Dec 29 16:01:42 2016 +#-- Written on Sat Dec 30 00:43:20 2017 #device options diff --git a/Logic/BUS68030.srm b/Logic/BUS68030.srm index bd62af7..cc82f41 100644 --- a/Logic/BUS68030.srm +++ b/Logic/BUS68030.srm @@ -187,7 +187,7 @@ NR#3H_8PED;R4 RNP3ONsEDVHC;R( RNP38lFkVDCHRDC(N; P#R3$VM_lRNb"sIF "R\B\:\ks#C#l\\NC0x\l\NH\oN\sEN8sINCOEN \#\ndUjj -0\H\o0LEk\F\Do\HO\jnUdnj-Ujjj-#Lk38PE\M"\"N; -POR3DMCNk#b_0.Cb_l0HC3Rjj.d46;jj +POR3DMCNk#b_0.Cb_l0HC3RjjUcn(;6j RNP3CODNbMk_C#0b04_HRlCj43j66n.jN; P#R30Dl0H0#0HRlCjj3jjjjj;P NRHFsoM_H#F0_VAR"zU1nj"dj;P @@ -201,8 +201,8 @@ PVR3D_FIDbFF#s_LFM CR j;}N; P$R#M#_HlCHG8MDNo;R4 RNP3M#$_#lV_FoskHb_8;Rj -RNP3M#$_lMkOsEN#4RU4 -.;N3PR#_$MD HMC8sHR6"{jBw.7- qgcg6-(cg g-q 7j-(A476g(dd}Bc"N; +RNP3M#$_lMkOsEN#gRnn +j;N3PR#_$MD HMC8sHR "{j((dd-Uc.Bcw-7c w(-g6Aq-nBd(w.cAj}Ug"N; POR38#L_NRPC{P NRM#$_VsCCMsCOOC_D FORN{ P$R1#l0CRN{ @@ -316,12 +316,10 @@ HCR38NHVs$sNMCNlRb'HDd_jj 4;N3HRs_0DFosHMCNlR1"7q4Bi"N; H#R3DsbFHHo8sHR"M0Fk"N; HbR3FNs0Ds8HRk"F0 -";L@R@(c:c:c4:c::67BaqiaR7q;Bi +";H@R@(c:c:c4:c::67BaqiaR7q;Bi RNH3Ds0_HFsolMNC7R"aiqB"N; -H$R#Ms_0HN#004CR;b -oRq7aB -i;N#bR$bM_FVs0D#NoR -U;F@R@(6:c:c4:6::cqBe R qeBN; +HFR3s8HoH'sRHkMF0 +';F@R@(6:c:c4:6::cqBe R qeBN; HsR30FD_sMHoNRlC" qeB ";F@R@(n:c:c4:n::4 ;R RNH3Ds0_HFsolMNC R""H; @@ -354,79 +352,85 @@ F@:@(64U:::6UcQ:BQBhRQ;Qh RNH3Ds0_HFsolMNCBR"Q"Qh;L oR4qr9N; LLR3HF0bsH08s;R4 -RoMk_M4NolHNk_L#M_CNCLD_IDF;M -NRN3#PMC_CV0_D#No46R.no; -MMRk(#_N_jjd;M +RoMk_M6CN; +M#R3N_PCM_C0VoDN#.4R6 +n;okMRMN4_lNHo_#Lk_NCML_DCD;FI +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRdkM__N#j;dj +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR4kM_1z7_jjj_aQh;M NRN3#PMC_CV0_D#No46R.no; MMRk47_p1j_jjh_QaN; M#R3N_PCM_C0VoDN#.4R6 -n;okMRMz4_7j1_jQj_h -a;N3MR#CNP_0MC_NVDoR#4.;6n -RoMk_M41qv_vqQt_#j_JGlkN;_4 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR4kMjH_OH -M;N3MR#CNP_0MC_NVDoR#4.;6n -RoMk4M._kVb_;O# -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR.kM4C_Ls -s;N3MR#CNP_0MC_NVDoR#4.;6n -RoMk_Mn8j#_d -j;N3MR#CNP_0MC_NVDoR#4.;6n -RoMkdM4_HOHMN; +n;okMRM74_1j_jjh_ q Ap_#j_JGlkNN; +M#R3N_PCM_C0VoDN#.4R6 +n;okMRM_4jOMHH;M +NRN3#PMC_CV0_D#No46R.no; +MMRk.V4_bOk_#N; +M#R3N_PCM_C0VoDN#.4R6 +n;okMRM_.4LsCs;M +NRN3#PMC_CV0_D#No46R.no; +MMRk.#_8_jjd;M +NRN3#PMC_CV0_D#No46R.no; +M_RhnN; M#R3N_PCM_C0VoDN#.4R6 n;ohMR_ -6;N3MR#CNP_0MC_NVDoR#4.;6n -RoMh;_n +U;N3MR#CNP_0MC_NVDoR#4.;6n +RoMh;_g RNM3P#NCC_M0D_VN4o#Rn.6;M oR4h_jN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;44 +n;ohMR_;4d RNM3P#NCC_M0D_VN4o#Rn.6;M -oR4h_.N; +oR4h_cN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;4c +n;ohMR_;4U RNM3P#NCC_M0D_VN4o#Rn.6;M -oR4h_6N; +oR4h_gN; +M#R3N_PCM_C0VoDN#.4R6 +n;ohMR_;.j +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR.h_4N; +M#R3N_PCM_C0VoDN#.4R6 +n;ohMR_;.. +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR.h_dN; M#R3N_PCM_C0VoDN#.4R6 n;ohMR_;.c RNM3P#NCC_M0D_VN4o#Rn.6;M oR.h_6N; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;.( +n;ohMR_;.n RNM3P#NCC_M0D_VN4o#Rn.6;M -oR.h_UN; +oR.h_(N; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;.g +n;ohMR_;.U RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_jN; +oR.h_gN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;d4 +n;ohMR_;dj RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_.N; +oRdh_4N; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;dd +n;ohMR_;d. RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_cN; +oRdh_6N; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;d6 +n;ohMR_;dn RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_nN; +oRdh_UN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;dU +n;ohMR_;c4 RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_gN; +oRch_.N; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;cj +n;ohMR_;cd RNM3P#NCC_M0D_VN4o#Rn.6;M -oRch_4N; +oRch_cN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;c. +n;ohMR_;c6 RNM3P#NCC_M0D_VN4o#Rn.6;M -oRch_dN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;cn -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRch_UN; +oRch_nN; M#R3N_PCM_C0VoDN#.4R6 n;ohMR_;cg RNM3P#NCC_M0D_VN4o#Rn.6;M @@ -440,45 +444,53 @@ n;ohMR_;6d RNM3P#NCC_M0D_VN4o#Rn.6;M oR6h_cN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;nU +n;ohMR_;66 RNM3P#NCC_M0D_VN4o#Rn.6;M -oRnh_gN; +oR6h_nN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;(j -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR(h_4N; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;(. -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR(h_dN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;(c -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR(h_6N; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_c..;M +n;ohMR_(4U;M NRN3#PMC_CV0_D#No46R.no; -M_Rh.;.6 +M_Rh4;UU RNM3P#NCC_M0D_VN4o#Rn.6;M -oR.h_. -n;N3MR#CNP_0MC_NVDoR#4.;6n -RoMhc_.6N; +oR4h_U +g;N3MR#CNP_0MC_NVDoR#4.;6n +RoMh4_.gN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_c.(;M +n;ohMR_j..;M NRN3#PMC_CV0_D#No46R.no; -M_Rh.;(n +M_Rh.;6g RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_Atj_jjjM3kdN; +oR.h_n +j;N3MR#CNP_0MC_NVDoR#4.;6n +RoMhn_.nN; M#R3N_PCM_C0VoDN#.4R6 -n;oAMRtj_jj3_jk;M4 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_Atj_jjjM3kjN; -M#R3N_PCM_C0VoDN#.4R6 -n;ozMR7j1_jQj_hja_3dkM;M +n;ohMR_(.n;M NRN3#PMC_CV0_D#No46R.no; -M7Rz1j_jjh_Qa3_jk;M4 +M_Rh.;nU +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR_71j_jj7_vqjM3kdN; +M#R3N_PCM_C0VoDN#.4R6 +n;o7MR1j_jjv_7q3_jk;M4 +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR_71j_jj7_vqjM3kjN; +M#R3N_PCM_C0VoDN#.4R6 +n;oqMR1j_jjv_7q3_jk;Md +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR_q1j_jj7_vqjM3k4N; +M#R3N_PCM_C0VoDN#.4R6 +n;oqMR1j_jjv_7q3_jk;Mj RNM3P#NCC_M0D_VN4o#Rn.6;M oR1z7_jjj_aQh_kj3M +d;N3MR#CNP_0MC_NVDoR#4.;6n +RoMz_71j_jjQ_hajM3k4N; +M#R3N_PCM_C0VoDN#.4R6 +n;ozMR7j1_jQj_hja_3jkM;M +NRN3#PMC_CV0_D#No46R.no; +MtRA_jjj_kj3M +d;N3MR#CNP_0MC_NVDoR#4.;6n +RoMAjt_jjj_34kM;M +NRN3#PMC_CV0_D#No46R.no; +MtRA_jjj_kj3M j;N3MR#CNP_0MC_NVDoR#4.;6n RoMp_71j_jjQ_hajM3kdN; M#R3N_PCM_C0VoDN#.4R6 @@ -486,101 +498,47 @@ n;opMR7j1_jQj_hja_34kM;M NRN3#PMC_CV0_D#No46R.no; M7Rp1j_jjh_Qa3_jk;Mj RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_71j_jj Ahqpj _3dkM;M +oR_q1j_dj7j4_3dkM;M NRN3#PMC_CV0_D#No46R.no; -M1R7_jjj_q hA_p jM3k4N; +M1Rq_jjd__74jM3k4N; M#R3N_PCM_C0VoDN#.4R6 -n;o7MR1j_jjh_ q Ap_kj3M +n;oqMR1d_jj4_7_kj3M j;N3MR#CNP_0MC_NVDoR#4.;6n -RoMQ_upj_djj__.3dkM;M +RoM)jW_jQj_hja_3dkM;M NRN3#PMC_CV0_D#No46R.no; -MuRQpd_jj__j.k_3M +MWR)_jjj_aQh_kj3M 4;N3MR#CNP_0MC_NVDoR#4.;6n -RoMQ_upj_djj__.3jkM;M +RoM)jW_jQj_hja_3jkM;M NRN3#PMC_CV0_D#No46R.no; -MvReqh_Qa3_jk;Md +M1Rq_jjd_jjj_h1YB3_jk;Md RNM3P#NCC_M0D_VN4o#Rn.6;M -oRqev_aQh_kj3M +oR_q1j_djj_jj1BYh_kj3M 4;N3MR#CNP_0MC_NVDoR#4.;6n -RoMe_vqQ_hajM3kjN; +RoMqj1_djj_j1j_Y_hBjM3kjN; M#R3N_PCM_C0VoDN#.4R6 -n;oOMRbCk_#j0__34_k;Md -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRkOb_0C#_4j__M3k4N; -M#R3N_PCM_C0VoDN#.4R6 -n;oOMRbCk_#j0__34_k;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRkOb_0C#_.j__M3kdN; -M#R3N_PCM_C0VoDN#.4R6 -n;oOMRbCk_#j0__3._k;M4 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRkOb_0C#_.j__M3kjN; -M#R3N_PCM_C0VoDN#.4R6 -n;oOMRbCk_#j0__3d_k;Md -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRkOb_0C#_dj__M3k4N; -M#R3N_PCM_C0VoDN#.4R6 -n;oOMRbCk_#j0__3d_k;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR#bF_ OD\M3kdO4_Dj _jMj_C__4H._l3dkM;M -NRN3#PMC_CV0_D#No46R.no; -MFRb#D_O k\3M_d4O_D j_jjM4C__lH_.M3k4N; -M#R3N_PCM_C0VoDN#.4R6 -n;obMRFO#_D3 \k4Md_ OD_jjj__MC4__Hlk.3M -j;N3MR#CNP_0MC_NVDoR#4.;6n -RoMABtqid_jjh_Qa3_jk;Md -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRqAtBji_dQj_hja_34kM;M -NRN3#PMC_CV0_D#No46R.no; -MtRAq_Bij_djQ_hajM3kjN; -M#R3N_PCM_C0VoDN#.4R6 -n;o7MR1j_jjv_7q3_jk;Md -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_71j_jj7_vqjM3k4N; -M#R3N_PCM_C0VoDN#.4R6 -n;o7MR1j_jjv_7q3_jk;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_q1j_jj7_vqjM3kdN; -M#R3N_PCM_C0VoDN#.4R6 -n;oqMR1j_jjv_7q3_jk;M4 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_q1j_jj7_vqjM3kjN; -M#R3N_PCM_C0VoDN#.4R6 -n;o1MRQ_Z 7_vqj__43dkM;M -NRN3#PMC_CV0_D#No46R.no; -MQR1Z7 _vjq__34_k;M4 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRZ1Q v_7q__j4k_3M -j;N3MR#CNP_0MC_NVDoR#4.;6n -RoM1 QZ_q7v_jj__M3kdN; -M#R3N_PCM_C0VoDN#.4R6 -n;o1MRQ_Z 7_vqj__j34kM;M -NRN3#PMC_CV0_D#No46R.no; -MQR1Z7 _vjq__3j_k;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRQqvtAq_z 1_hpqA v_7qQ_]tj]_3dkM;M -NRN3#PMC_CV0_D#No46R.no; -MvRqQ_tqA_z1 Ahqp7 _v]q_Q_t]jM3k4N; -M#R3N_PCM_C0VoDN#.4R6 -n;oqMRvqQt_1Az_q hA_p 7_vq]]Qt_kj3M -j;N3MR#CNP_0MC_NVDoR#4.;6n -RoMqtvQqz_A1h_ q Ap_q7v_Wpm_kj3M +n;oAMRtiqB_jjd_aQh_kj3M d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMqtvQqz_A1h_ q Ap_q7v_Wpm_kj3M -4;N3MR#CNP_0MC_NVDoR#4.;6n -RoMqtvQqz_A1h_ q Ap_q7v_Wpm_kj3M -j;N3MR#CNP_0MC_NVDoR#4.;6n -RoMq7j_vjq_3dkM;M +RoMABtqid_jjh_Qa3_jk;M4 +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRqAtBji_dQj_hja_3jkM;M NRN3#PMC_CV0_D#No46R.no; -MjRq_q7v_kj3M -4;N3MR#CNP_0MC_NVDoR#4.;6n -RoMq7j_vjq_3jkM;M -NRN3#PMC_CV0_D#No46R.no; -MWR)_jjj_q7v_kj3M +MbROk#_C0__j4k_3M d;N3MR#CNP_0MC_NVDoR#4.;6n -RoM)jW_j7j_vjq_34kM;M +RoMO_bkC_#0j__434kM;M NRN3#PMC_CV0_D#No46R.no; -MWR)_jjj_q7v_kj3M +MbROk#_C0__j4k_3M +j;N3MR#CNP_0MC_NVDoR#4.;6n +RoMO_bkC_#0j__.3dkM;M +NRN3#PMC_CV0_D#No46R.no; +MbROk#_C0__j.k_3M +4;N3MR#CNP_0MC_NVDoR#4.;6n +RoMO_bkC_#0j__.3jkM;M +NRN3#PMC_CV0_D#No46R.no; +MbROk#_C0__jdk_3M +d;N3MR#CNP_0MC_NVDoR#4.;6n +RoMO_bkC_#0j__d34kM;M +NRN3#PMC_CV0_D#No46R.no; +MbROk#_C0__jdk_3M j;N3MR#CNP_0MC_NVDoR#4.;6n RoMQ_upj_djj__j3dkM;M NRN3#PMC_CV0_D#No46R.no; @@ -594,651 +552,623 @@ RoMQ_upj_djj__434kM;M NRN3#PMC_CV0_D#No46R.no; MuRQpd_jj__j4k_3M j;N3MR#CNP_0MC_NVDoR#4.;6n -RoMqj1_djj_j1j_Y_hBjM3kdN; -M#R3N_PCM_C0VoDN#.4R6 -n;oqMR1d_jjj_jjY_1hjB_34kM;M +RoMQ_upj_djj__.3dkM;M NRN3#PMC_CV0_D#No46R.no; -M1Rq_jjd_jjj_h1YB3_jk;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_)Wj_jjQ_hajM3kdN; +MuRQpd_jj__j.k_3M +4;N3MR#CNP_0MC_NVDoR#4.;6n +RoMQ_upj_djj__.3jkM;M +NRN3#PMC_CV0_D#No46R.no; +M1R7_jjj_q hA_p jM3kdN; M#R3N_PCM_C0VoDN#.4R6 -n;o)MRWj_jjh_Qa3_jk;M4 +n;o7MR1j_jjh_ q Ap_kj3M +4;N3MR#CNP_0MC_NVDoR#4.;6n +RoM7j1_j j_hpqA 3_jk;Mj RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_)Wj_jjQ_hajM3kjN; +oRqev_aQh_kj3M +d;N3MR#CNP_0MC_NVDoR#4.;6n +RoMe_vqQ_hajM3k4N; M#R3N_PCM_C0VoDN#.4R6 -n;b@R@j::44::4.j+4:k0sCjRf:0jRsRkC0CskRBeB;R -b@:@j4::44+:.4Vj:NCD#R:fjjNRVDR#CV#NDChRt7b; -R(@@:.4d::dU4:d.c4j+jv:1_Qqvtjqr:R(9fjj:RFoE#10Rvv_qQrtqj9:(Rnh_U_,hnhg,_,(jh4_(,(h_._,h(hd,_,(ch6_(;b -oRjmr9N; -b$R#MF_bsD0VNRo#n -c;ombRr;49 -RNb#_$Mb0FsVoDN#cRn;b -oR.mr9N; -b$R#MF_bsD0VNRo#n -c;ombRr;d9 -RNb#_$Mb0FsVoDN#cRn;b -oRcmr9N; -b$R#MF_bsD0VNRo#n -c;ombRr;69 -RNb#_$Mb0FsVoDN#cRn;b -oRnmr9N; -b$R#MF_bsD0VNRo#n -c;ombRr;(9 -RNb#_$Mb0FsVoDN#cRn;H +n;oeMRvQq_hja_3jkM;M +NRN3#PMC_CV0_D#No46R.nb; +Rj@@:44::.4:+:4j0CskR:fjjsR0k0CRsRkCe;BB +@bR@4j::44::4.+jN:VDR#Cfjj:RDVN#VCRNCD#R7th;R +b@:@(4:ddd4U:dcd:jj+4:_1vqtvQq:rj(f9RjR:jo#EF0vR1_Qqvtjqr:R(9hg_c,6h_j_,h6h4,_,6.hd_6,6h_c_,h6h6,_;6n +Robm9rj;b +NRM#$_sbF0NVDon#Rco; +brRm4 +9;N#bR$bM_FVs0D#NoR;nc +Robm9r.;b +NRM#$_sbF0NVDon#Rco; +brRmd +9;N#bR$bM_FVs0D#NoR;nc +Robm9rc;b +NRM#$_sbF0NVDon#Rco; +brRm6 +9;N#bR$bM_FVs0D#NoR;nc +Robm9rn;b +NRM#$_sbF0NVDon#Rco; +brRm( +9;N#bR$bM_FVs0D#NoR;nc +RNH3Ds0CF_0R +4;N#HR$VM_#Hl_8(R"4dddUd4d4 +";N3HRs_0DFosHMCNlRv"1_Qqvt;q" +RNH3lV#_FVslR#0"_1vqtvQq"Rd;H +NR#3VlF_0#"0R1qv_vqQtR;U" +RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" +RNH3lV#_HFsolMNC1R"vv_qQ"tq;H +NR#3Vl0_#Ns0CC4oR;H +NR03#N_0ClbNbHRMo"RRRjjjjj4jjRR->jjjjjjjj\RMRRjjjj4jjj>R-Rjjjj4jj4R\MRjRjj4jjj-jR>jRjj4jjjM4\RjRRj4jjjRjj-j>Rj4jjj\j4MRRRj4jjjjjjRR->j4jjj4jj\RMRR4jjjjjjj>R-R4jjjjjj4R\MR4Rjjjjjj-jR>4RjjjjjjM4\R4RRjjjjjRjj-4>Rjjjjj\j4M +";s@R@(d:4dU:d:d4d:+cj41j:vv_qQrtqj9:(R:fjjNRlO7ERwbwRsRHl1qv_vqQtr +c9S1T=vv_qQrtqcS9 +7_=h4_4gHB +SpBi=pmi_1_ZQON; +HsR30_DC04FR;H +NRM#$_lV#_RH8"d(4d4dUd"d4;H +NR03sDs_FHNoMl"CR1qv_vqQt"N; +HVR3#Vl_s#Fl01R"vv_qQRtqd +";N3HRV_#l00F#Rv"1_QqvtUqR"N; +HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; +HVR3#Fl_sMHoNRlC"_1vqtvQq +";N3HRV_#l#00NCosCR +4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R +s@:@(4:ddd4U:dcd:jj+4:_1vqtvQq:rj(f9RjR:jlENORw7wRHbslvR1_Qqvtdqr9T +S=_1vqtvQq9rd +=S7h4_4( +_HSiBp=iBp_Zm1Q;_O +RNH3Ds0CF_0R +4;N#HR$VM_#Hl_8(R"4dddUd4d4 +";N3HRs_0DFosHMCNlRv"1_Qqvt;q" +RNH3lV#_FVslR#0"_1vqtvQq"Rd;H +NR#3VlF_0#"0R1qv_vqQtR;U" +RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" +RNH3lV#_HFsolMNC1R"vv_qQ"tq;H +NR#3Vl0_#Ns0CC4oR;H +NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 +';s@R@(d:4dU:d:d4d:+cj41j:vv_qQrtqj9:(R:fjjNRlO7ERwbwRsRHl1qv_vqQtr +.9S1T=vv_qQrtq.S9 +7_=h4_46HB +SpBi=pmi_1_ZQON; +HsR30_DC04FR;H +NRM#$_lV#_RH8"d(4d4dUd"d4;H +NR03sDs_FHNoMl"CR1qv_vqQt"N; +HVR3#Vl_s#Fl01R"vv_qQRtqd +";N3HRV_#l00F#Rv"1_QqvtUqR"N; +HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; +HVR3#Fl_sMHoNRlC"_1vqtvQq +";N3HRV_#l#00NCosCR +4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R +s@:@(4:ddd4U:dcd:jj+4:_1vqtvQq:rj(f9RjR:jlENORw7wRHbslvR1_Qqvt4qr9T +S=_1vqtvQq9r4 +=S7h4_4d +_HSiBp=iBp_Zm1Q;_O +RNH3Ds0CF_0R +4;N#HR$VM_#Hl_8(R"4dddUd4d4 +";N3HRs_0DFosHMCNlRv"1_Qqvt;q" +RNH3lV#_FVslR#0"_1vqtvQq"Rd;H +NR#3VlF_0#"0R1qv_vqQtR;U" +RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" +RNH3lV#_HFsolMNC1R"vv_qQ"tq;H +NR#3Vl0_#Ns0CC4oR;H +NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 +';s@R@(d:4dU:d:d4d:+cj41j:vv_qQrtqj9:(R:fjjNRlO7ERwbwRsRHl1qv_vqQtr +j9S1T=vv_qQrtqjS9 +7_=h4_44HB +SpBi=pmi_1_ZQON; +HsR30_DC04FR;H +NRM#$_lV#_RH8"d(4d4dUd"d4;H +NR03sDs_FHNoMl"CR1qv_vqQt"N; +HVR3#Vl_s#Fl01R"vv_qQRtqd +";N3HRV_#l00F#Rv"1_QqvtUqR"N; +HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; +HVR3#Fl_sMHoNRlC"_1vqtvQq +";N3HRV_#l#00NCosCR +4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R +s@:@(4:ddd4U:dcd:jj+4:pQu_jjdrj.:9jRf:ljRNROE7RwwblsHRpQu_jjd7rwwjS9 +Tu=Qpd_jjr_OjS9 +7_=h.S4 +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRu"Qpd_jj +";N3HRksMVNHO_MG8CR +j;s@R@(d:4dU:d:d4d:+cj4Qj:ujp_d.jr:Rj9fjj:ROlNEwR7wsRbHQlRujp_dwj7w9r4 +=STQ_upj_djO9r4 +=S7h._. +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRQ_upj"dj;H +NRM3kVOsN_8HMC4GR;R +s@:@(4:ddd4U:dcd:jj+4:pQu_jjdrj.:9jRf:ljRNROE7RwwblsHRpQu_jjd7rww.S9 +Tu=Qpd_jjr_O.S9 +7_=h.Sd +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRu"Qpd_jj +";N3HRksMVNHO_MG8CR +.;s@R@(d:4dU:d:d4d:+cj4Qj:u7p_j:r.jf9RjR:jlENORw7wRHbsluRQpj_7r +j9SQT=u7p_j9rj +=S7h4_c +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRQ_up7;j" +RNH3VkMs_NOHCM8G;Rj +RNH3M#$_HHM0DPNR""4;R +s@:@(4:ddd4U:dcd:jj+4:pQu_r7j.9:jR:fjjNRlO7ERwbwRsRHlQ_up74jr9T +S=pQu_r7j4S9 +7_=hcS. +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRu"Qpj_7"N; +HkR3MNVsOM_H8RCG4N; +H#R3$HM_MPH0N"DR4 +";s@R@(d:4dU:d:d4d:+cj4Qj:u7p_j:r.jf9RjR:jlENORw7wRHbsluRQpj_7r +.9SQT=u7p_j9r. +=S7hd_c +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRQ_up7;j" +RNH3VkMs_NOHCM8G;R. +RNH3M#$_HHM0DPNR""4;R +s@:@(4:ddd4U:dcd:jj+4:_1vqtvQq:rj(f9RjR:jlENORw7wRHbslvR1_QqvtHq_r +(9S1T=vv_qQ_tqH9r( +=S7h._4( +_HSiBp=iBp_Zm1Q;_O +RNH3Ds0CF_0R +4;N#HR$VM_#Hl_8(R"4dddUd4d4 +";N3HRs_0DFosHMCNlRv"1_Qqvt;q" +RNH3lV#_FVslR#0"_1vqtvQq"Rd;H +NR#3VlF_0#"0R1qv_vqQtR;U" +RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" +RNH3lV#_HFsolMNC1R"vv_qQ"tq;H +NR#3Vl0_#Ns0CC4oR;H +NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 +';N3HRH_MP#sFkO'CR1qv_vqQtr'(9;H +NR$3#MM_HHN0PDjR""s; +R(@@:d4d::dU4:ddc4j+jv:1_Qqvtjqr:R(9fjj:ROlNEwR7wsRbH1lRvv_qQrtqnS9 +Tv=1_Qqvtnqr97 +S=4h_.Hd_ +pSBip=Bi1_mZOQ_;H NR03sD0C_F;R4 -RNH#_$MV_#lH"8R(.4dddU4.;4" +RNH#_$MV_#lH"8R(d4dddU4d;4" RNH3Ds0_HFsolMNC1R"vv_qQ"tq;H NR#3Vls_VF0l#Rv"1_QqvtdqR"N; HVR3#0l_FR#0"_1vqtvQq"RU;H NR#3VlN_0L#DC0jR"j4jRjjjjjsjjjRj4jj4jjjjjsjj4R4jjjjjjj4sj4jRjjj4jj4jsjjjRj4jjjsjj4Rj4jjjjjj4jsj44Rjjjj4jjj4s44jRjjjjjj"4s;H NR#3Vls_FHNoMl"CR1qv_vqQt"N; HVR3##l_0CN0sRCo4N; -H#R30CN0_blNboHMRR"RRjjjjjjj4>R-RjjjjjjjjR\MRjRjjjjj4-jR>jRjjjjj4M4\RjRRjjjj4Rjj-j>Rjjjj4\j4MRRRjjjj4jjjRR->jjjj44jj\RMRRjjj4jjjj>R-Rjjj4jjj4R\MRjRj4jjjj-jR>jRj4jjjjM4\RjRR4jjjjRjj-j>R4jjjj\j4MRRR4jjjjjjjRR->4jjjj4jj\;M" -@sR@4(:dd.:Ud:4.j:c+:4j1qv_vqQtr(j:9jRf:ljRNROE7RwwblsHR_1vqtvQqr_H(S9 -Tv=1_QqvtHq_r -(9Sh7=_.46_SH +HFR3sHHoMM#0NRlC'_1vqtvQq:rj(;9' +@sR@4(:ddd:Ud:4dj:c+:4j1qv_vqQtr(j:9jRf:ljRNROE7RwwblsHR_1vqtvQq9r6 +=ST1qv_vqQtr +69Sh7=_44._SH B=piB_pimQ1Z_ O;N3HRsC0D_R0F4N; -H$R#M#_Vl8_HR4"(dU.d44d."N; +H$R#M#_Vl8_HR4"(dUdd44dd"N; HsR30FD_sMHoNRlC"_1vqtvQq ";N3HRV_#lVlsF#"0R1qv_vqQtR;d" RNH3lV#_#0F01R"vv_qQRtqU ";N3HRV_#l0DNLCR#0"jjjRj4jjjjjjjsj44Rjjjjjjjjs4jjRjj4jjsjjjR44j4jjjjjjsj4jRjjjjj4jjjs44jRjj4jjj4js4jjRjjjjjs4j4R44jjjjj4jjs ";N3HRV_#lFosHMCNlRv"1_Qqvt;q" RNH3lV#_N#00CCso;R4 -RNH3HFso#HM0lMNC1R'vv_qQrtqj9:('N; -HHR3M#P_FOksC1R'vv_qQrtq(;9' -RNH3M#$_HHM0DPNR""j;R -s@:@(4:d.d4U:dc.:jj+4:_1vqtvQq:rj(f9RjR:jlENORw7wRHbslvR1_Qqvtnqr9T -S=_1vqtvQq9rn -=S7hc_4U -_HSiBp=iBp_Zm1Q;_O -RNH3Ds0CF_0R -4;N#HR$VM_#Hl_8(R"4dd.U.4d4 -";N3HRs_0DFosHMCNlRv"1_Qqvt;q" -RNH3lV#_FVslR#0"_1vqtvQq"Rd;H -NR#3VlF_0#"0R1qv_vqQtR;U" -RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" -RNH3lV#_HFsolMNC1R"vv_qQ"tq;H -NR#3Vl0_#Ns0CC4oR;H -NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 -';s@R@(d:4.U:d:.4d:+cj41j:vv_qQrtqj9:(R:fjjNRlO7ERwbwRsRHl1qv_vqQtr -69S1T=vv_qQrtq6S9 -7_=h4_cnHB -SpBi=pmi_1_ZQON; -HsR30_DC04FR;H -NRM#$_lV#_RH8"d(4.4dUd".4;H -NR03sDs_FHNoMl"CR1qv_vqQt"N; -HVR3#Vl_s#Fl01R"vv_qQRtqd -";N3HRV_#l00F#Rv"1_QqvtUqR"N; -HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; -HVR3#Fl_sMHoNRlC"_1vqtvQq -";N3HRV_#l#00NCosCR -4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R -s@:@(4:d.d4U:dc.:jj+4:_1vqtvQq:rj(f9RjR:jlENORw7wRHbslvR1_Qqvtcqr9T -S=_1vqtvQq9rc -=S7hc_4c -_HSiBp=iBp_Zm1Q;_O -RNH3Ds0CF_0R -4;N#HR$VM_#Hl_8(R"4dd.U.4d4 -";N3HRs_0DFosHMCNlRv"1_Qqvt;q" -RNH3lV#_FVslR#0"_1vqtvQq"Rd;H -NR#3VlF_0#"0R1qv_vqQtR;U" -RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" -RNH3lV#_HFsolMNC1R"vv_qQ"tq;H -NR#3Vl0_#Ns0CC4oR;H -NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 -';s@R@(d:4.U:d:.4d:+cj41j:vv_qQrtqj9:(R:fjjNRlO7ERwbwRsRHl1qv_vqQtr -d9S1T=vv_qQrtqdS9 -7_=h4_c.HB -SpBi=pmi_1_ZQON; -HsR30_DC04FR;H -NRM#$_lV#_RH8"d(4.4dUd".4;H -NR03sDs_FHNoMl"CR1qv_vqQt"N; -HVR3#Vl_s#Fl01R"vv_qQRtqd -";N3HRV_#l00F#Rv"1_QqvtUqR"N; -HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; -HVR3#Fl_sMHoNRlC"_1vqtvQq -";N3HRV_#l#00NCosCR -4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R -s@:@(4:d.d4U:dc.:jj+4:_1vqtvQq:rj(f9RjR:jlENORw7wRHbslvR1_Qqvt.qr9T -S=_1vqtvQq9r. -=S7hc_4j -_HSiBp=iBp_Zm1Q;_O -RNH3Ds0CF_0R -4;N#HR$VM_#Hl_8(R"4dd.U.4d4 -";N3HRs_0DFosHMCNlRv"1_Qqvt;q" -RNH3lV#_FVslR#0"_1vqtvQq"Rd;H -NR#3VlF_0#"0R1qv_vqQtR;U" -RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" -RNH3lV#_HFsolMNC1R"vv_qQ"tq;H -NR#3Vl0_#Ns0CC4oR;H -NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 -';s@R@(d:4.U:d:.4d:+cj41j:vv_qQrtqj9:(R:fjjNRlO7ERwbwRsRHl1qv_vqQtr -49S1T=vv_qQrtq4S9 -7_=h4_dUHB -SpBi=pmi_1_ZQON; -HsR30_DC04FR;H -NRM#$_lV#_RH8"d(4.4dUd".4;H -NR03sDs_FHNoMl"CR1qv_vqQt"N; -HVR3#Vl_s#Fl01R"vv_qQRtqd -";N3HRV_#l00F#Rv"1_QqvtUqR"N; -HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; -HVR3#Fl_sMHoNRlC"_1vqtvQq -";N3HRV_#l#00NCosCR -4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R -s@:@(4:d.d4U:dc.:jj+4:_1vqtvQq:rj(f9RjR:jlENORw7wRHbslvR1_Qqvtjqr9T -S=_1vqtvQq9rj -=S7hd_4n -_HSiBp=iBp_Zm1Q;_O -RNH3Ds0CF_0R -4;N#HR$VM_#Hl_8(R"4dd.U.4d4 -";N3HRs_0DFosHMCNlRv"1_Qqvt;q" -RNH3lV#_FVslR#0"_1vqtvQq"Rd;H -NR#3VlF_0#"0R1qv_vqQtR;U" -RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" -RNH3lV#_HFsolMNC1R"vv_qQ"tq;H -NR#3Vl0_#Ns0CC4oR;H -NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 -';s@R@(d:4.U:d:.4d:+cj4Oj:bCk_#d0r:Rj9fjj:ROlNEwR7wsRbHOlRbCk_#.0r9T -S=kOb_0C#r -.9Sh7=_ -44SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCOR"bCk_#;0" -RNH3VkMs_NOHCM8G;R. -@sR@4(:dd.:Ud:4.j:c+:4jO_bkCr#0d9:jR:fjjNRlO7ERwbwRsRHlO_bkCr#0dS9 -Tb=Ok#_C09rd -=S7h._4 -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRO_bkC"#0;H -NRM3kVOsN_8HMCdGR;R -s@:@(4:d.d4U:dc.:jj+4:pQu_jjdrj.:9jRf:ljRNROE7RwwblsHRpQu_jjd7rwwjS9 -Tu=Qpd_jjr_OjS9 -7_=h.S( -B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRu"Qpd_jj -";N3HRksMVNHO_MG8CR -j;s@R@(d:4.U:d:.4d:+cj4Qj:ujp_d.jr:Rj9fjj:ROlNEwR7wsRbHQlRujp_dwj7w9r4 -=STQ_upj_djO9r4 -=S7hU_. -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRQ_upj"dj;H -NRM3kVOsN_8HMC4GR;R -s@:@(4:d.d4U:dc.:jj+4:pQu_jjdrj.:9jRf:ljRNROE7RwwblsHRpQu_jjd7rww.S9 -Tu=Qpd_jjr_O.S9 -7_=h.Sg -B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRu"Qpd_jj -";N3HRksMVNHO_MG8CR -.;s@R@(d:4.U:d:.4d:+cj4Qj:u7p_j:r.jf9RjR:jlENORw7wRHbsluRQpj_7r -j9SQT=u7p_j9rj -=S7hg_c -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRQ_up7;j" -RNH3VkMs_NOHCM8G;Rj -RNH3M#$_HHM0DPNR""4;R -s@:@(4:d.d4U:dc.:jj+4:pQu_r7j.9:jR:fjjNRlO7ERwbwRsRHlQ_up74jr9T -S=pQu_r7j4S9 -7_=h6Sj -B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRu"Qpj_7"N; -HkR3MNVsOM_H8RCG4N; -H#R3$HM_MPH0N"DR4 -";s@R@(d:4.U:d:.4d:+cj4Qj:u7p_j:r.jf9RjR:jlENORw7wRHbsluRQpj_7r -.9SQT=u7p_j9r. -=S7h4_6 -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRQ_up7;j" -RNH3VkMs_NOHCM8G;R. -RNH3M#$_HHM0DPNR""4;R -s@:@(4:d.d4U:dc.:jj+4:iBp_jjj_c7r:Rj9fjj:ROlNEwR7wsRbHBlRpji_j7j_r -j9SBT=pji_j7j_r -j9SB7=pji_jOj_ +RNH3HFso#HM0lMNC1R'vv_qQrtqj9:('s; +R(@@:d4d::dU4:ddc4j+jp:Bij_jjr_7c9:jR:fjjNRlO7ERwbwRsRHlB_pij_jj79r4 +=STB_pij_jj79r4 +=S7B_pij_jj79rj pSBip=Bi1_mZOQ_;H NR03sDs_FHNoMl"CRB_pij_jj7 ";N3HRIMNsCs8bkMMHo;R4 -RNH3VkMs_NOHCM8G;Rj -@sR@4(:dd.:Ud:4.j:c+:4jB_pij_jj7:rcjf9RjR:jlENORw7wRHbslpRBij_jjr_74S9 -Tp=Bij_jjr_74S9 -7p=Bij_jjr_7jS9 +RNH3VkMs_NOHCM8G;R4 +@sR@4(:ddd:Ud:4dj:c+:4jB_pij_jj7:rcjf9RjR:jlENORw7wRHbslpRBij_jjr_7.S9 +Tp=Bij_jjr_7.S9 +7p=Bij_jjr_74S9 B=piB_pimQ1Z_ O;N3HRs_0DFosHMCNlRp"Bij_jj"_7;H NRN3Is8MCbMskHRMo4N; -HkR3MNVsOM_H8RCG4s; -R(@@:.4d::dU4:d.c4j+jp:Bij_jjr_7c9:jR:fjjNRlO7ERwbwRsRHlB_pij_jj79r. -=STB_pij_jj79r. -=S7B_pij_jj79r4 +HkR3MNVsOM_H8RCG.s; +R(@@:d4d::dU4:ddc4j+jp:Bij_jjr_7c9:jR:fjjNRlO7ERwbwRsRHlB_pij_jj79rd +=STB_pij_jj79rd +=S7B_pij_jj79r. pSBip=Bi1_mZOQ_;H NR03sDs_FHNoMl"CRB_pij_jj7 ";N3HRIMNsCs8bkMMHo;R4 -RNH3VkMs_NOHCM8G;R. -@sR@4(:dd.:Ud:4.j:c+:4jB_pij_jj7:rcjf9RjR:jlENORw7wRHbslpRBij_jjr_7dS9 -Tp=Bij_jjr_7dS9 -7p=Bij_jjr_7.S9 +RNH3VkMs_NOHCM8G;Rd +@sR@4(:ddd:Ud:4dj:c+:4jB_pij_jj7:rcjf9RjR:jlENORw7wRHbslpRBij_jjr_7cS9 +Tp=Bij_jjr_7cS9 +7p=Bij_jjr_7dS9 B=piB_pimQ1Z_ O;N3HRs_0DFosHMCNlRp"Bij_jj"_7;H NRN3Is8MCbMskHRMo4N; -HkR3MNVsOM_H8RCGds; -R(@@:.4d::dU4:d.c4j+jp:Bij_jjr_7c9:jR:fjjNRlO7ERwbwRsRHlB_pij_jj79rc -=STB_pij_jj79rc -=S7B_pij_jj79rd -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRB_pij_jj7 -";N3HRIMNsCs8bkMMHo;R4 -RNH3VkMs_NOHCM8G;Rc -@sR@4(:dd.:Ud:4.j:c+:4jBpYB v_7q:r4jf9RjR:jlENORw7wRHbslYRBB_p 7rvqjS9 -TY=BB_p 7rvqjS9 -7F=b#D_O B\3Y Bp_q7v_j6r9B -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"BBYp7 _v;q" -RNH3VkMs_NOHCM8G;Rj -RNH3M#$_HHM0DPNR""j;R -s@:@(4:d.d4U:dc.:jj+4:BBYp7 _v4qr:Rj9fjj:ROlNEwR7wsRbHBlRY Bp_q7vr -49SBT=Y Bp_q7vr -49Sb7=FO#_D3 \BpYB v_7qr_64S9 +HkR3MNVsOM_H8RCGcs; +R(@@:d4d::dU4:ddc4j+jQ:1Z7 _v4qr:Rj9fjj:ROlNEwR7wsRbH1lRQ_Z 7rvqjS9 +TQ=1Z7 _vjqr97 +S=#bF_ OD\Q31Z7 _vnq_r +j9SiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNC1R"Q_Z 7"vq;H +NRM3kVOsN_8HMCjGR;H +NR$3#MM_HHN0PD4R""s; +R(@@:d4d::dU4:ddc4j+jQ:1Z7 _v4qr:Rj9fjj:ROlNEwR7wsRbH1lRQ_Z 7rvq4S9 +TQ=1Z7 _v4qr97 +S=#bF_ OD\Q31Z7 _vnq_r +49SiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNC1R"Q_Z 7"vq;H +NRM3kVOsN_8HMC4GR;H +NR$3#MM_HHN0PD4R""s; +R(@@:d4d::dU4:ddc4j+jY:BB_p 7rvq49:jR:fjjNRlO7ERwbwRsRHlBpYB v_7q9rj +=STBpYB v_7q9rj +=S7hn_n_SH B=piB_pimQ1Z_ O;N3HRs_0DFosHMCNlRY"BB_p 7"vq;H -NRM3kVOsN_8HMC4GR;H +NRM3kVOsN_8HMCjGR;H NR$3#MM_HHN0PDjR""s; -R(@@:.4d::dU4:d.c4j+jp:Bid_jj _urj4:9jRf:ljRNROE7RwwblsHRiBp_jjd_ru jS9 -Tp=Bid_jj _ur -j9Sb7=FO#_D3 \B_pij_djuc _r -j9SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCBR"pji_duj_ -";N3HRksMVNHO_MG8CR -j;N3HR#_$MH0MHPRND";j" -@sR@4(:dd.:Ud:4.j:c+:4jB_pij_dju4 r:Rj9fjj:ROlNEwR7wsRbHBlRpji_duj_ 9r4 -=STB_pij_dju4 r97 -S=#bF_ OD\p3Bid_jj _u_4cr9B -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"iBp_jjd_"u ;H -NRM3kVOsN_8HMC4GR;H -NR$3#MM_HHN0PDjR""s; -R(@@:.4d::dU4:d.c4j+jQ:1Z7 _v4qr:Rj9fjj:ROlNEwR7wsRbH1lRQ_Z 7rvqjS9 -TQ=1Z7 _vjqr97 -S=6h_ -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CR1 QZ_q7v"N; -HkR3MNVsOM_H8RCGjN; -H#R3$HM_MPH0N"DR4 -";s@R@(d:4.U:d:.4d:+cj41j:Q_Z 7rvq49:jR:fjjNRlO7ERwbwRsRHl1 QZ_q7vr -49S1T=Q_Z 7rvq4S9 -7_=hnB -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"Z1Q v_7q -";N3HRksMVNHO_MG8CR -4;N3HR#_$MH0MHPRND";4" -@sR@4(:dd.:Ud:4.j:c+:4jO_bkCr#0d9:jR:fjjNRlO7ERwbwRsRHlO_bkCr#0jS9 -Tb=Ok#_C09rj -=S7hc_.6 -_HSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCOR"bCk_#;0" -RNH3VkMs_NOHCM8G;Rj -@sR@4(:dd.:Ud:4.j:c+:4jO_bkCr#0d9:jR:fjjNRlO7ERwbwRsRHlO_bkCr#04S9 -Tb=Ok#_C09r4 -=S7hj_4 -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRO_bkC"#0;H -NRM3kVOsN_8HMC4GR;R -s@:@(4:d.d4U:dc.:jj+4:a)1_Y7prj.:9jRf:ljRNROE7RwwblsHRa)1_Y7pr -j9S)T=17a_pjYr97 -S=.h_nH(_ -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CR)_1a7"pY;H -NR$3#MM_HHN0PDjR""s; -R(@@:.4d::dU4:d.c4j+j1:)ap_7Y:r.jf9RjR:jlENORw7wRHbsl1R)ap_7Y9r4 -=ST)_1a7rpY4S9 -7_=h._nnHB -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"a)1_Y7p"N; +R(@@:d4d::dU4:ddc4j+jY:BB_p 7rvq49:jR:fjjNRlO7ERwbwRsRHlBpYB v_7q9r4 +=STBpYB v_7q9r4 +=S7b_F#O\D 3BBYp7 _v6q_r +49SiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCBR"Y Bp_q7v"N; +HkR3MNVsOM_H8RCG4N; H#R3$HM_MPH0N"DRj -";s@R@(d:4.U:d:.4d:+cj4)j:17a_p.Yr:Rj9fjj:ROlNEwR7wsRbH)lR17a_p.Yr9T -S=a)1_Y7pr -.9Sh7=_6.n_SH +";s@R@(d:4dU:d:d4d:+cj4Oj:bCk_#d0r:Rj9fjj:ROlNEwR7wsRbHOlRbCk_#j0r9T +S=kOb_0C#r +j9Sh7=_j.j_SH B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlR1")ap_7Y -";N3HR#_$MH0MHPRND";j" -@sR@4(:dd.:Ud:4.j:c+:4j7j1_j7j_vfqRjR:jlENORw7wRHbsl1R7_jjj_q7v -=ST7j1_j7j_vSq -7_=hcSd +O;N3HRs_0DFosHMCNlRb"Ok#_C0 +";N3HRksMVNHO_MG8CR +j;s@R@(d:4dU:d:d4d:+cj4Oj:bCk_#d0r:Rj9fjj:ROlNEwR7wsRbHOlRbCk_#40r9T +S=kOb_0C#r +49Sh7=_SU B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlR1"7_jjj_q7v"N; -H#R3$HM_MPH0N"DR4 -";s@R@(d:4.U:d:.4d:+cj47j:1iqB4h_QajRf:ljRNROE7RwwblsHRq71B_i4Q -haS7T=1iqB4h_Qa7 -S=.h_nHg_ -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CR7B1qiQ4_h;a" -RNH3_HMDbFFR -U;N3HR#_$MH0MHPRND";4" -@sR@4(:dd.:Ud:4.j:c+:4jqj1_jQj_hfaRjR:jlENORw7wRHbsl1Rq_jjj_aQh -=STqj1_jQj_hSa -7_=h._nUHB +O;N3HRs_0DFosHMCNlRb"Ok#_C0 +";N3HRksMVNHO_MG8CR +4;s@R@(d:4dU:d:d4d:+cj4Oj:bCk_#d0r:Rj9fjj:ROlNEwR7wsRbHOlRbCk_#.0r9T +S=kOb_0C#r +.9Sh7=_Sg +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRb"Ok#_C0 +";N3HRksMVNHO_MG8CR +.;s@R@(d:4dU:d:d4d:+cj4Oj:bCk_#d0r:Rj9fjj:ROlNEwR7wsRbHOlRbCk_#d0r9T +S=kOb_0C#r +d9Sh7=_ +4jSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCOR"bCk_#;0" +RNH3VkMs_NOHCM8G;Rd +@sR@4(:ddd:Ud:4dj:c+:4jB_pij_jj7:rcjf9RjR:jlENORw7wRHbslpRBij_jjr_7jS9 +Tp=Bij_jjr_7jS9 +7p=Bij_jj +_OSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCBR"pji_j7j_"N; +HIR3NCsM8kbsMoHMR +4;N3HRksMVNHO_MG8CR +j;s@R@(d:4dU:d:d4d:+cj4qj:vqQt_1Az_q hA_p 7_vq]]QtR:fjjNRlO7ERwbwRsRHlqtvQqz_A1h_ q Ap_q7v_t]Q]T +S=QqvtAq_z 1_hpqA v_7qQ_]tS] +7_=h4_64HB SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"_q1j_jjQ"ha;H -NR$3#MM_HHN0PD4R""s; -R(@@:.4d::dU4:d.c4j+jv:qQ_tq7f1RjR:jlENORw7wRHbslvRqQ_tq7S1 -Tv=qQ_tq7S1 +HsR30FD_sMHoNRlC"QqvtAq_z 1_hpqA v_7qQ_]t;]" +RNH3M#$_HHM0DPNR""4;R +s@:@(4:ddd4U:dcd:jj+4:qeu_f7RjR:jlENORw7wRHbsluReq +_7SeT=u7q_ +=S7hc_c +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRe_uq7 +";N3HR#_$MH0MHPRND";4" +@sR@4(:ddd:Ud:4dj:c+:4j7Baqij_7R:fjjNRlO7ERwbwRsRHl7Baqij_7 +=ST7Baqij_7 +=S7h6_c +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CR7Baqij_7"N; +H#R3$HM_MPH0N"DR4 +";s@R@(d:4dU:d:d4d:+cj47j:1j_jjh_ q ApR:fjjNRlO7ERwbwRsRHl7j1_j j_hpqA T +S=_71j_jj AhqpS 7_=hcSn B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRv"qQ_tq7;1" -RNH3M#$_HHM0DPNR""4;R -s@:@(4:d.d4U:dc.:jj+4:_q1j_dj7fjRjR:jlENORw7wRHbsl1Rq_jjd_ -7jSqT=1d_jjj_7 -=S7h(_.c -_HSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCqR"1d_jjj_7"N; -H#R3$HM_MPH0N"DR4 -";s@R@(d:4.U:d:.4d:+cj47j:aiqB_R7jfjj:ROlNEwR7wsRbH7lRaiqB_ -7jS7T=aiqB_ -7jSh7=_ -cUSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNC7R"aiqB_"7j;H -NR$3#MM_HHN0PD4R""s; -R(@@:.4d::dU4:d.c4j+ju:eqR_7fjj:ROlNEwR7wsRbHelRu7q_ -=STe_uq77 -S=6h_.B +O;N3HRs_0DFosHMCNlR1"7_jjj_q hA"p ;H +NR$3#MM_HHN0PDjR""s; +R(@@:d4d::dU4:ddc4j+jt:A_jjjR:fjjNRlO7ERwbwRsRHlAjt_jwj7wT +S=_Atj_jjO7 +S=.h_6B SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"qeu_;7" -RNH3M#$_HHM0DPNR""4;R -s@:@(4:d.d4U:dc.:jj+4:1) ma_zfaRjR:jlENORw7wRHbsl R)1_ am -zaS)T= a1 _amz -=S7hd_6 -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CR) 1az_ma -";N3HR#_$MH0MHPRND";j" -@sR@4(:dd.:Ud:4.j:c+:4j7j1_j j_hpqA jRf:ljRNROE7RwwblsHR_71j_jj AhqpS -T1=7_jjj_q hA -p Sh7=_ -6cSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNC7R"1j_jjh_ q Ap"N; -H#R3$HM_MPH0N"DRj -";s@R@(d:4.U:d:.4d:+cj4Aj:tj_jjjRf:ljRNROE7RwwblsHR_Atj7jjwSw -Tt=A_jjj_SO -7_=hdSj -B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRt"A_jjj"N; -HHR3MF_DFnbR;R -s@:@(4:d.d4U:dc.:jj+4:QqvtAq_z 1_hpqA v_7qQ_]tf]RjR:jlENORw7wRHbslvRqQ_tqA_z1 Ahqp7 _v]q_Q -t]SqT=vqQt_1Az_q hA_p 7_vq]]Qt -=S7h4_d -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRqtvQqz_A1h_ q Ap_q7v_t]Q] -";N3HR#_$MH0MHPRND";4" -@sR@4(:dd.:Ud:4.j:c+:4jqtvQqz_A1h_ q Ap_q7v_WpmR:fjjNRlO7ERwbwRsRHlqtvQqz_A1h_ q Ap_q7v_Wpm -=STqtvQqz_A1h_ q Ap_q7v_Wpm -=S7h._d -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRqtvQqz_A1h_ q Ap_q7v_Wpm"N; -H#R3$HM_MPH0N"DR4 -";s@R@(d:4.U:d:.4d:+cj4zj:7j1_jQj_hfaRjR:jlENORw7wRHbsl7Rz1j_jjh_QaT -S=1z7_jjj_aQh -=S7hd_d -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRz_71j_jjQ"ha;H -NRM3H_FDFb;Rd -RNH3M#$_HHM0DPNR""4;R -s@:@(4:d.d4U:dc.:jj+4:_qj7Rvqfjj:ROlNEwR7wsRbHqlRjv_7qT -S=_qj7 -vqSh7=_ -dcSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCqR"jv_7q -";N3HRHDM_FRFb6N; -H#R3$HM_MPH0N"DR4 -";s@R@(d:4.U:d:.4d:+cj4)j:Wj_jjv_7qjRf:ljRNROE7RwwblsHR_)Wj_jj7 -vqS)T=Wj_jjv_7q7 -S=dh_6B -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"_)Wj_jj7"vq;H -NRM3H_FDFb;Rj -RNH3M#$_HHM0DPNR""4;R -s@:@(4:d.d4U:dc.:jj+4:qev_aQhR:fjjNRlO7ERwbwRsRHle_vqQ -haSeT=vQq_hSa -7_=hdSn -B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRv"eqh_Qa -";N3HRHDM_FRFbgN; -H#R3$HM_MPH0N"DR4 -";s@R@(d:4.U:d:.4d:+cj4)j:Wj_jjh_QajRf:ljRNROE7RwwblsHR_)Wj_jjQ -haS)T=Wj_jjh_Qa7 -S=dh_UB -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"_)Wj_jjQ"ha;H -NRM3H_FDFb;R4 -RNH3M#$_HHM0DPNR""4;R -s@:@(4:d.d4U:dc.:jj+4:_q1j_djj_jj1BYhR:fjjNRlO7ERwbwRsRHlqj1_djj_j1j_Y -hBSqT=1d_jjj_jjY_1hSB -7_=hdSg -B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlR1"q_jjd_jjj_h1YB -";N3HR#_$MH0MHPRND";4" -@sR@4(:dd.:Ud:4.j:c+:4jp_71j_jjQRhafjj:ROlNEwR7wsRbHplR7j1_jQj_hSa +HsR30FD_sMHoNRlC"_Atj"jj;H +NRM3H_FDFb;Rc +@sR@4(:ddd:Ud:4dj:c+:4jp_71j_jjQRhafjj:ROlNEwR7wsRbHplR7j1_jQj_hSa T7=p1j_jjh_Qa7 -S=ch_jB +S=.h_nB SpBi=pmi_1_ZQON; HsR30FD_sMHoNRlC"1p7_jjj_aQh"N; -HHR3MF_DFcbR;H +HHR3MF_DFdbR;H NR$3#MM_HHN0PD4R""s; -R(@@:.4d::dU4:d.c4j+jt:Aq_Bij_djQRhafjj:ROlNEwR7wsRbHAlRtiqB_jjd_aQh -=STABtqid_jjh_Qa7 -S=ch_4B -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"qAtBji_dQj_h;a" +R(@@:d4d::dU4:ddc4j+jv:eqh_QajRf:ljRNROE7RwwblsHRqev_aQh +=STe_vqQ +haSh7=_ +.(SiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCeR"vQq_h;a" RNH3_HMDbFFR (;N3HR#_$MH0MHPRND";4" -@sR@4(:dd.:Ud:4.j:c+:4jqj1_j7j_vfqRjR:jlENORw7wRHbsl1Rq_jjj_q7v -=STqj1_j7j_vSq -7_=hcS. +@sR@4(:ddd:Ud:4dj:c+:4j)jW_jQj_hfaRjR:jlENORw7wRHbslWR)_jjj_aQh +=ST)jW_jQj_hSa +7_=h.SU B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlR1"q_jjj_q7v"N; -H#R3$HM_MPH0N"DR4 -";s@R@(d:4.U:d:.4d:+cj4Aj:tiqB_jjd_aQh_f7RjR:jlENORw7wRHbsltRAq_Bij_djQ_ha7T -S=qAtBji_dQj_h7a_ -=S7k_M4s_#0.__4HB -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"qAtBji_dQj_h7a_"N; -H#R3$HM_MPH0N"DR4 -";s@R@(d:4j6:d:j4d:+d(4Bj:pmi_zQa_hfaRjR:jlENORw7wRHbslpRBiz_mah_QaT -S=iBp_u X_SO -7p=Biz_ma)_u -_7SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCBR"pmi_zQa_h;a" +O;N3HRs_0DFosHMCNlRW")_jjj_aQh"N; +HHR3MF_DFjbR;H +NR$3#MM_HHN0PD4R""s; +R(@@:d4d::dU4:ddc4j+j1:q_jjd_jjj_h1YBjRf:ljRNROE7RwwblsHR_q1j_djj_jj1BYh +=STqj1_djj_j1j_Y +hBSh7=_ +.gSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCqR"1d_jjj_jjY_1h;B" RNH3M#$_HHM0DPNR""4;R -s@:@(4:dgd4c:ddg:nj+4:iBp_amz_ u)_R6jfjj:ROlNEwR7wsRbHBlRpmi_zua_)6 _jT -S=iBp_amz_ u)_ -6jSB7=pmi_zua_)6 _j -_HSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCBR"pmi_zua_)6 _j +s@:@(4:ddd4U:dcd:jj+4:qAtBji_dQj_hfaRjR:jlENORw7wRHbsltRAq_Bij_djQ +haSAT=tiqB_jjd_aQh +=S7hj_d +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRABtqid_jjh_Qa +";N3HRHDM_FRFb6N; +H#R3$HM_MPH0N"DR4 +";s@R@(d:4dU:d:d4d:+cj4qj:1j_jjv_7qjRf:ljRNROE7RwwblsHR_q1j_jj7 +vqSqT=1j_jjv_7q7 +S=dh_4B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"_q1j_jj7"vq;H +NR$3#MM_HHN0PD4R""s; +R(@@:d4d::dU4:ddc4j+j1:7_jjj_q7vR:fjjNRlO7ERwbwRsRHl7j1_j7j_vSq +T1=7_jjj_q7v +=S7h._d +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CR7j1_j7j_v;q" +RNH3M#$_HHM0DPNR""4;R +s@:@(4:ddd4U:dcd:jj+4:q71B_i4QRhafjj:ROlNEwR7wsRbH7lR1iqB4h_QaT +S=q71B_i4Q +haSh7=_n.j_SH +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlR1"7q4Bi_aQh"N; +HHR3MF_DFnbR;H +NR$3#MM_HHN0PD4R""s; +R(@@:d4d::dU4:ddc4j+j1:q_jjj_aQhR:fjjNRlO7ERwbwRsRHlqj1_jQj_hSa +T1=q_jjj_aQh +=S7hU_c_SH +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlR1"q_jjj_aQh"N; +H#R3$HM_MPH0N"DR4 +";s@R@(d:4dU:d:d4d:+cj4qj:vqQt_R71fjj:ROlNEwR7wsRbHqlRvqQt_ +71SqT=vqQt_ +71Sh7=_ +d6SiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCqR"vqQt_"71;H +NR$3#MM_HHN0PD4R""s; +R(@@:d4d::dU4:ddc4j+jj:q_q7vR:fjjNRlO7ERwbwRsRHlq7j_vSq +Tj=q_q7v +=S7hn_d +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRq7j_v;q" +RNH3M#$_HHM0DPNR""4;R +s@:@(4:ddd4U:dcd:jj+4:_)Wj_jj7Rvqfjj:ROlNEwR7wsRbH)lRWj_jjv_7qT +S=_)Wj_jj7 +vqSh7=_n4._SH +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRW")_jjj_q7v"N; +H#R3$HM_MPH0N"DR4 +";s@R@(d:4dU:d:d4d:+cj4qj:1d_jjj_7R:fjjNRlO7ERwbwRsRHlqj1_d7j_jT +S=_q1j_dj7Sj +7_=hdSU +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlR1"q_jjd_"7j;H +NR$3#MM_HHN0PD4R""s; +R(@@:d4d::dU4:ddc4j+jv:qQ_tqA_z1 Ahqp7 _vpq_mfWRjR:jlENORw7wRHbslvRqQ_tqA_z1 Ahqp7 _vpq_mSW +Tv=qQ_tqA_z1 Ahqp7 _vpq_mSW +7_=h4_6jHB +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"QqvtAq_z 1_hpqA v_7qm_pW ";N3HR#_$MH0MHPRND";4" -@sR@4(:.d(:n.:4(U:d+:4jB_pim_zau_) 7jRf:ljRNROE7RwwblsHRiBp_amz_ u)_S7 -Tp=Biz_ma)_u -_7SB7=pmi_zua_)6 _jB -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"iBp_amz_ u)_;7" +@sR@4(:ddd:Ud:4dj:c+:4jqj1_d7j_4jRf:ljRNROE7RwwblsHR_q1j_dj7S4 +T1=q_jjd_ +74Sh7=_ +4cSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCqR"1d_jj4_7"N; +H#R3$HM_MPH0N"DR4 +";s@R@(d:4dU:d:d4d:+cj4zj:7j1_jQj_hfaRjR:jlENORw7wRHbsl7Rz1j_jjh_QaT +S=1z7_jjj_aQh +=S7hc_. +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRz_71j_jjQ"ha;H +NRM3H_FDFb;R. RNH3M#$_HHM0DPNR""4;R -sfjj:ROlNEQRA_)7QRHbsl1Rq_jjd -=Smqj1_dOj_ -jSQ=(kM__N#j_djHQ -Sm1=q_jjd - Sm=4h_d -.;oQbRmN; +s@:@(4:ddd4U:dcd:jj+4:qAtBji_dQj_h7a_R:fjjNRlO7ERwbwRsRHlABtqid_jjh_Qa +_7SAT=tiqB_jjd_aQh_S7 +7_=h. +.jSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCAR"tiqB_jjd_aQh_;7" +RNH3M#$_HHM0DPNR""4;R +s@:@(4:d4d46:dd4:(j+4:iBp_amz_aQhR:fjjNRlO7ERwbwRsRHlB_pim_zaQ +haSBT=p i_XOu_ +=S7B_pim_zau_) 7B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"iBp_amz_aQh"N; +H#R3$HM_MPH0N"DR4 +";s@R@(c:4jc:d:j4c:+dn4Bj:pmi_zua_)6 _jjRf:ljRNROE7RwwblsHRiBp_amz_ u)_ +6jSBT=pmi_zua_)6 _j7 +S=iBp_amz_ u)__6jHB +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"iBp_amz_ u)_"6j;H +NR$3#MM_HHN0PD4R""s; +R(@@:U4.::dn4:.Ud4U+jp:Biz_ma)_u R_7fjj:ROlNEwR7wsRbHBlRpmi_zua_)7 _ +=STB_pim_zau_) 77 +S=iBp_amz_ u)_ +6jSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCBR"pmi_zua_)7 _"N; +H#R3$HM_MPH0N"DR4 +";sjRf:ljRNROEA7Q_Qb)RsRHlqj1_dSj +m1=q_jjd_SO +Qkj=MNd_#d_jj +_HS=Qmqj1_dSj +mA =tiqB_jjd_aQh_ +H;oQbRmN; b$R#MF_bsD0VNRo#Us; R:fjjNRlOAERQQ_7)sRbHqlR1j_jjm S=_q1j_jjOQ -Sj_=h4_..HQ +Sj_=h4_(6HQ Sm1=q_jjj - Sm=4kM__N#j_jjHo; -bmRQ;b -NRM#$_sbF0NVDoU#R;R -sfjj:ROlNEQRA_)7QRHbslWR)_jjj -=Sm)jW_jOj_ -jSQ=_)Wj_jjQ -haS=Qm)jW_jSj -mk =MN4_#j_jj;_H + Sm=nh_g;_H +RobQ +m;N#bR$bM_FVs0D#NoR +U;sjRf:ljRNROEA7Q_Qb)RsRHl)jW_jSj +mW=)_jjj_SO +Q)j=Wj_jjh_QaQ +SmW=)_jjj + Sm=nh_g;_H RobQ m;N#bR$bM_FVs0D#NoR U;sjRf:ljRNROEAazw]sRbH7lR1d_jjm S=_71j -djS=Qjk_Mn8j#_dHj_ - Sm=4h_d -.;ombR;b -NRM#$_sbF0NVDoU#R;R -sfjj:ROlNEQRA_)7QRHbsl7Rz1j_jjm -S=1z7_jjj_SO -Qkj=Mz4_7j1_jQj_hSa -Qzm=7j1_jSj -mk =MN4_#j_jj;_H +djS=Qjk_M.8j#_dHj_ + Sm=qAtBji_dQj_hHa_;b +oR +m;N#bR$bM_FVs0D#NoR +U;sjRf:ljRNROEA7Q_Qb)RsRHlz_71j +jjSzm=7j1_jOj_ +jSQ=4kM_1z7_jjj_aQh +mSQ=1z7_jjj + Sm=nh_g;_H RobQ m;N#bR$bM_FVs0D#NoR U;sjRf:ljRNROEA7Q_Qb)RsRHlp_71j jjSpm=7j1_jOj_ jSQ=4kM_1p7_jjj_aQh mSQ=1p7_jjj - Sm=4kM__N#j_jjHo; -bmRQ;b -NRM#$_sbF0NVDoU#R;R -sfjj:ROlNEQRA_)7QRHbslQR1Zj r9m -S=Z1Q r_OjS9 -Q1j=Q_Z 7rvqjS9 -Q1m=QrZ jS9 -mh =_n.(;b + Sm=nh_g;_H +RobQ +m;N#bR$bM_FVs0D#NoR +U;sjRf:ljRNROEA7Q_Qb)RsRHl1 QZr +j9S1m=Q_Z O9rj +jSQ=Z1Q v_7q9rj +mSQ=Z1Q 9rj + Sm=qAtBji_dQj_hHa_;b oR;Qm RNb#_$Mb0FsVoDN#;RU fsRjR:jlENOR_AQ7RQ)blsHRZ1Q 9r4 =Sm1 QZ_4Or9Q SjQ=1Z7 _v4qr9Q SmQ=1Z4 r9m -S _=h.;(n -RobQ -m;N#bR$bM_FVs0D#NoR -U;sjRf:ljRNROEA7Q_Qb)RsRHlqt]Q]cr.9m -S=Qq]tO]_r9.c -jSQ=7th -mSQ=Qq]t.]rcS9 -mk =MNd_EEHo_ -H;oQbRmN; -b$R#MF_bsD0VNRo#Us; -R:fjjNRlOAERQQ_7)sRbHqlR]]Qtr9.6 -=Smqt]Q]r_O. -69S=Qjt -h7S=Qmqt]Q]6r.9m -S M=kdE_NH_oEHo; +S t=Aq_Bij_djQ_haHo; bmRQ;b NRM#$_sbF0NVDoU#R;R sfjj:ROlNEQRA_)7QRHbsl]RqQrt]. -n9Sqm=]]Qt_.OrnS9 +c9Sqm=]]Qt_.OrcS9 Qtj=hS7 -Qqm=]]Qtr9.n - Sm=dkM_HNEoHE_;b +Qqm=]]Qtr9.c + Sm=qAtBji_dQj_hHa_;b oR;Qm RNb#_$Mb0FsVoDN#;RU -fsRjR:jlENOR_AQ7RQ)blsHRQq]t.]r(S9 -m]=qQ_t]O(r.9Q +fsRjR:jlENOR_AQ7RQ)blsHRQq]t.]r6S9 +m]=qQ_t]O6r.9Q Sjh=t7Q Sm]=qQrt]. -(9S=m k_MdNoEHE;_H +69S=m ABtqid_jjh_Qa;_H RobQ m;N#bR$bM_FVs0D#NoR -U;sjRf:ljRNROEA7Q_Qb)RsRHlqt]Q]Ur.9m -S=Qq]tO]_r9.U +U;sjRf:ljRNROEA7Q_Qb)RsRHlqt]Q]nr.9m +S=Qq]tO]_r9.n jSQ=7th -mSQ=Qq]t.]rUS9 -mk =MNd_EEHo_ +mSQ=Qq]t.]rnS9 +mA =tiqB_jjd_aQh_ H;oQbRmN; b$R#MF_bsD0VNRo#Us; -R:fjjNRlOAERQQ_7)sRbHqlR]]Qtr9.g +R:fjjNRlOAERQQ_7)sRbHqlR]]Qtr9.( =Smqt]Q]r_O. -g9S=Qjt -h7S=Qmqt]Q]gr.9m -S M=kdE_NH_oEHo; +(9S=Qjt +h7S=Qmqt]Q](r.9m +S t=Aq_Bij_djQ_haHo; bmRQ;b NRM#$_sbF0NVDoU#R;R -sfjj:ROlNEQRA_)7QRHbsl]RqQrt]d -j9Sqm=]]Qt_dOrjS9 +sfjj:ROlNEQRA_)7QRHbsl]RqQrt]. +U9Sqm=]]Qt_.OrUS9 Qtj=hS7 -Qqm=]]Qtr9dj - Sm=dkM_HNEoHE_;b +Qqm=]]Qtr9.U + Sm=qAtBji_dQj_hHa_;b oR;Qm RNb#_$Mb0FsVoDN#;RU -fsRjR:jlENOR_AQ7RQ)blsHRQq]td]r4S9 -m]=qQ_t]O4rd9Q +fsRjR:jlENOR_AQ7RQ)blsHRQq]t.]rgS9 +m]=qQ_t]Ogr.9Q Sjh=t7Q -Sm]=qQrt]d -49S=m k_MdNoEHE;_H +Sm]=qQrt]. +g9S=m ABtqid_jjh_Qa;_H RobQ m;N#bR$bM_FVs0D#NoR -U;sjRf:ljRNROEQwAzRHbsl_Rq7m B7. r9m -S=7q_ 7Bm r_O.S9 -Qqj=_B7 mr7 . -9;sjRf:ljRNROEQwAzRHbsl_Rq7m B7d r9m -S=7q_ 7Bm r_OdS9 -Qqj=_B7 mr7 d -9;sjRf:ljRNROEQwAzRHbsl_Rq7m B7c r9m -S=7q_ 7Bm r_OcS9 -Qqj=_B7 mr7 c -9;sjRf:ljRNROEQwAzRHbsl_Rq7m B76 r9m -S=7q_ 7Bm r_O6S9 -Qqj=_B7 mr7 6 -9;sjRf:ljRNROEQwAzRHbsl_Rq7m B7n r9m -S=7q_ 7Bm r_OnS9 -Qqj=_B7 mr7 n -9;sjRf:ljRNROEQwAzRHbsl_Rq7m B7( r9m -S=7q_ 7Bm r_O(S9 -Qqj=_B7 mr7 ( -9;sjRf:ljRNROEQwAzRHbsl_Rq7m B7U r9m -S=7q_ 7Bm r_OUS9 -Qqj=_B7 mr7 U -9;sjRf:ljRNROEQwAzRHbsl_Rq7m B7g r9m -S=7q_ 7Bm r_OgS9 -Qqj=_B7 mr7 g -9;sjRf:ljRNROEQwAzRHbsl_Rq7m B74 rjS9 -m_=q7m B7O _r94j -jSQ=7q_ 7Bm jr49s; -R:fjjNRlOQERARzwblsHR7q_ 7Bm 4r49m -S=7q_ 7Bm r_O4 -49S=Qjq _7B m7r944;R -sfjj:ROlNEARQzbwRsRHlq _7B m7r94. -=Smq _7B m7_4Or.S9 -Qqj=_B7 mr7 4;.9 +U;sjRf:ljRNROEA7Q_Qb)RsRHlqt]Q]jrd9m +S=Qq]tO]_r9dj +jSQ=7th +mSQ=Qq]td]rjS9 +mA =tiqB_jjd_aQh_ +H;oQbRmN; +b$R#MF_bsD0VNRo#Us; +R:fjjNRlOAERQQ_7)sRbHqlR]]Qtr9d4 +=Smqt]Q]r_Od +49S=Qjt +h7S=Qmqt]Q]4rd9m +S t=Aq_Bij_djQ_haHo; +bmRQ;b +NRM#$_sbF0NVDoU#R;R +sfjj:ROlNEARQzbwRsRHlq _7B m7r +.9Sqm=_B7 m_7 O9r. +jSQ=7q_ 7Bm 9r.;R +sfjj:ROlNEARQzbwRsRHlq _7B m7r +d9Sqm=_B7 m_7 O9rd +jSQ=7q_ 7Bm 9rd;R +sfjj:ROlNEARQzbwRsRHlq _7B m7r +c9Sqm=_B7 m_7 O9rc +jSQ=7q_ 7Bm 9rc;R +sfjj:ROlNEARQzbwRsRHlq _7B m7r +69Sqm=_B7 m_7 O9r6 +jSQ=7q_ 7Bm 9r6;R +sfjj:ROlNEARQzbwRsRHlq _7B m7r +n9Sqm=_B7 m_7 O9rn +jSQ=7q_ 7Bm 9rn;R +sfjj:ROlNEARQzbwRsRHlq _7B m7r +(9Sqm=_B7 m_7 O9r( +jSQ=7q_ 7Bm 9r(;R +sfjj:ROlNEARQzbwRsRHlq _7B m7r +U9Sqm=_B7 m_7 O9rU +jSQ=7q_ 7Bm 9rU;R +sfjj:ROlNEARQzbwRsRHlq _7B m7r +g9Sqm=_B7 m_7 O9rg +jSQ=7q_ 7Bm 9rg;R +sfjj:ROlNEARQzbwRsRHlq _7B m7r94j +=Smq _7B m7_4OrjS9 +Qqj=_B7 mr7 4;j9 fsRjR:jlENORzQAwsRbHqlR_B7 mr7 4 -d9Sqm=_B7 m_7 Odr49Q -Sj_=q7m B74 rd -9;sjRf:ljRNROEQwAzRHbsl_Rq7m B74 rcS9 -m_=q7m B7O _r94c -jSQ=7q_ 7Bm cr49s; -R:fjjNRlOQERARzwblsHR7q_ 7Bm 6r49m +49Sqm=_B7 m_7 O4r49Q +Sj_=q7m B74 r4 +9;sjRf:ljRNROEQwAzRHbsl_Rq7m B74 r.S9 +m_=q7m B7O _r94. +jSQ=7q_ 7Bm .r49s; +R:fjjNRlOQERARzwblsHR7q_ 7Bm dr49m S=7q_ 7Bm r_O4 -69S=Qjq _7B m7r946;R -sfjj:ROlNEARQzbwRsRHlq _7B m7r94n -=Smq _7B m7_4OrnS9 -Qqj=_B7 mr7 4;n9 +d9S=Qjq _7B m7r94d;R +sfjj:ROlNEARQzbwRsRHlq _7B m7r94c +=Smq _7B m7_4OrcS9 +Qqj=_B7 mr7 4;c9 fsRjR:jlENORzQAwsRbHqlR_B7 mr7 4 -(9Sqm=_B7 m_7 O(r49Q -Sj_=q7m B74 r( -9;sjRf:ljRNROEQwAzRHbsl_Rq7m B74 rUS9 -m_=q7m B7O _r94U -jSQ=7q_ 7Bm Ur49s; -R:fjjNRlOQERARzwblsHR7q_ 7Bm gr49m +69Sqm=_B7 m_7 O6r49Q +Sj_=q7m B74 r6 +9;sjRf:ljRNROEQwAzRHbsl_Rq7m B74 rnS9 +m_=q7m B7O _r94n +jSQ=7q_ 7Bm nr49s; +R:fjjNRlOQERARzwblsHR7q_ 7Bm (r49m S=7q_ 7Bm r_O4 -g9S=Qjq _7B m7r94g;R -sfjj:ROlNEARQzbwRsRHlq _7B m7r9.j -=Smq _7B m7_.OrjS9 -Qqj=_B7 mr7 .;j9 -fsRjR:jlENORzQAwsRbHqlR_B7 mr7 . -49Sqm=_B7 m_7 O4r.9Q -Sj_=q7m B7. r4 -9;sjRf:ljRNROEQwAzRHbsl_Rq7m B7. r.S9 -m_=q7m B7O _r9.. -jSQ=7q_ 7Bm .r.9s; -R:fjjNRlOQERARzwblsHR7q_ 7Bm dr.9m +(9S=Qjq _7B m7r94(;R +sfjj:ROlNEARQzbwRsRHlq _7B m7r94U +=Smq _7B m7_4OrUS9 +Qqj=_B7 mr7 4;U9 +fsRjR:jlENORzQAwsRbHqlR_B7 mr7 4 +g9Sqm=_B7 m_7 Ogr49Q +Sj_=q7m B74 rg +9;sjRf:ljRNROEQwAzRHbsl_Rq7m B7. rjS9 +m_=q7m B7O _r9.j +jSQ=7q_ 7Bm jr.9s; +R:fjjNRlOQERARzwblsHR7q_ 7Bm 4r.9m S=7q_ 7Bm r_O. -d9S=Qjq _7B m7r9.d;R -sfjj:ROlNEQRA_)7QRHbslrRqjS9 -m_=qO9rj -jSQ=_qj7 -vqS=Qmq9rj - Sm=4h_d -.;oQbRmN; +49S=Qjq _7B m7r9.4;R +sfjj:ROlNEARQzbwRsRHlq _7B m7r9.. +=Smq _7B m7_.Or.S9 +Qqj=_B7 mr7 .;.9 +fsRjR:jlENORzQAwsRbHqlR_B7 mr7 . +d9Sqm=_B7 m_7 Odr.9Q +Sj_=q7m B7. rd +9;sjRf:ljRNROEA7Q_Qb)RsRHlq9rj +=Smqr_OjS9 +Qqj=jv_7qQ +Smr=qjS9 +mA =tiqB_jjd_aQh_ +H;oQbRmN; b$R#MF_bsD0VNRo#Us; R:fjjNRlOQERARzwblsHR4qr9m S=Oq_r @@ -1306,366 +1236,399 @@ S=pQu_.Or9Q Sju=Qp9r.;R sfjj:ROlNEzRAwRa]blsHRq71B i4S7m=1iqB4Q -Sj_=h4_.dHm -S =MX1u_u qB_ -O;ombR;b +Sj_=h._4gHm +S M=k4#_8N4O _ +H;ombR;b NRM#$_sbF0NVDoU#R;R -sfjj:ROlNEQRA_)7QRHbslaR7q -BiS7m=aiqB_SO -Qtj=hS7 -Q7m=aiqB - Sm=_q1j_jj7_vqHo; -bmRQ;b -NRM#$_sbF0NVDoU#R;R -sfjj:ROlNEARmzbwRsRHlqBe -=SmqBe -jSQ=BeB;R -sfjj:ROlNEARmzbwRsRHl m -S=S -Qhj=_j.6_ -H;sjRf:ljRNROEQwAzRHbsluReqm +sfjj:ROlNEARQzbwRsRHl7Baqim +S=q7aBOi_ +jSQ=q7aB +i;sjRf:ljRNROEmwAzRHbsleRq SB +me=q SB +Qej=B +B;sjRf:ljRNROEmwAzRHbsl +R S m= +jSQ=6kM_ +C;sjRf:ljRNROEQwAzRHbsluReqm S=qeu_SO Qej=u -q;sjRf:ljRNROEmwAzRHbslvReqm -S=qev -jSQ=qev_aQh;R -sfjj:ROlNEARQzbwRsRHl) -1aS)m=1Oa_ -jSQ=a)1;R -sfjj:ROlNEARQzbwRsRHl) 1am -S=1) Oa_ -jSQ=1) -a;sjRf:ljRNROEA7Q_Qb)RsRHl)SW -mW=)_SO -Q)j=Wj_jjv_7qQ -SmW=) - Sm=4h_d -d;oQbRmN; +q;sjRf:ljRNROEAazw]sRbHelRvSq +mv=eqQ +Sjv=eqh_Qam +S t=Aq_Bij_djQ;ha +RobmN; b$R#MF_bsD0VNRo#Us; -R:fjjNRlOQERARzwblsHRrwBjS9 -mB=w_jOr9Q -SjB=wr;j9 -fsRjR:jlENORzQAwsRbHwlRB9r4 -=SmwOB_r -49S=Qjw4Br9s; -R:fjjNRlOmERARzwblsHRQqvtqq_7_7) AhqpS -mv=qQ_tqq)77_q hA -p S=Qjt;h7 -fsRjR:jlENORzmAwsRbHqlRvqQt_1Az_a7qqQ_7)m -S=QqvtAq_z71_q_aq7 -Q)S=QjqtvQqz_A1q_7a7q_QO)_;R -sfjj:ROlNEARmzbwRsRHlqtvQqz_A1h_ q Ap_Wpm -=SmqtvQqz_A1h_ q Ap_Wpm -jSQ=4kM_HNloLN_kC#_MDNLCF_DI;_H -fsRjR:jlENORzmAwsRbHqlRvqQt_1Az_q hA_p ]]Qt -=SmqtvQqz_A1h_ q Ap_t]Q]Q -SjM=k4N4_lNHo_#Lk_NCML_DCEEHo_ -H;sjRf:ljRNROEAazw]sRbHBlRQ -QhSBm=Q -QhS=QjkjM4_HOHMm -S M=k4Od_H_HMHo; +R:fjjNRlOQERARzwblsHRa)1 +=Sm)_1aOQ +Sj1=)as; +R:fjjNRlOQERARzwblsHR1) Sa +m =)1_ aOQ +Sj =)1; a +fsRjR:jlENOR_AQ7RQ)blsHR +)WS)m=W +_OS=Qj)jW_j7j_vSq +Q)m=Wm +S t=Aq_Bij_djQ_haHo; +bmRQ;b +NRM#$_sbF0NVDoU#R;R +sfjj:ROlNEARQzbwRsRHlwjBr9m +S=_wBO9rj +jSQ=rwBj +9;sjRf:ljRNROEQwAzRHbslBRwr +49Swm=Br_O4S9 +Qwj=B9r4;R +sfjj:ROlNEARmzbwRsRHlqtvQq7_q7 )_hpqA m +S=Qqvtqq_7_7) AhqpS +Qtj=h +7;sjRf:ljRNROEmwAzRHbslvRqQ_tqA_z17qqa_)7Q +=SmqtvQqz_A1q_7a7q_QS) +Qqj=vqQt_1Az_a7qqQ_7);_O +fsRjR:jlENORzmAwsRbHqlRvqQt_1Az_q hA_p p +mWSqm=vqQt_1Az_q hA_p p +mWS=Qjk_M4NolHNk_L#M_CNCLD_IDF_ +H;sjRf:ljRNROEmwAzRHbslvRqQ_tqA_z1 Ahqp] _Q +t]Sqm=vqQt_1Az_q hA_p ]]Qt +jSQ=4kM4l_NH_oNL_k#CLMNDEC_H_oEHs; +R:fjjNRlOAERz]waRHbslQRBQSh +mQ=BQSh +Qkj=M_4jOMHH + Sm=nh_jo; b;Rm RNb#_$Mb0FsVoDN#;RU -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hjr_4jS9 -m_=h4_dnH -_4S=QjhU_( -4SQ=4h_jH4_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__jjr9m -S=4h_dHn_ -jSQ=4h_dHn__S4 -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_HH__4j_r -j9Shm=_.46_4H_ -jSQ=4h_jHd_ -4SQ=4h_jHc_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_HH__jjr9m -S=4h_6H._ -jSQ=4h_6H.__S4 -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__4j_r -69Shm=_n4c_4H_ -jSQ=(h_nQ -S4_=h4_j6Hs; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#Hr_j6S9 -m_=h4_cnHQ -Sj_=h4_cnH -_4S=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__CjH -_4Shm=_(.n_4H_ -jSQ=4h_4H6_ -4SQ=4h_4Hn_;R -sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCHj_ -=Smhn_.( -_HS=Qjhn_.(__H4Q +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hj__j49rd +=Smh4_4(__H4Q +Sj_=h4_UdHQ +S4_=h4_UcHs; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jj9rd +=Smh4_4( +_HS=Qjh4_4(__H4Q S41=)a;_O -fsRjR:jlENOR7qh.sRbHtlR_64._S4 -mF=b#D_O H\3b4D_ -jSQ=.h_.Hn_ -4SQ=.h_.Hc_;R -sfjj:ROlNEhRq7b.RsRHlt._46m -S=#bF_ OD\b3HDQ -SjF=b#D_O H\3b4D_ -4SQ=.h_.H6_;R -sfjj:ROlNEhRq7b.RsRHlk_M6C -_HShm=_j.6_SH -Qhj=_j.6_4H_ -4SQ=.h_nHd_;R -sfjj:ROlNEhRq7b.RsRHlO_bkC_#0.__Hjr_4dS9 -m_=h4_UgH -_4S=Qjh6_.6 -_HS=Q4h6_.n;_H -fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__jH_r -d9Shm=_g4U_SH -Qhj=_g4U_4H_ -4SQ=.h_nHd_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3nkM__Loj_djj._N_S4 -mF=b#D_O k\3MLn_od_jj -_4S=QjMu X_q1uBO _ -4SQ=_q1j_dj7 -j;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MLn_od_jj__jNS. -mF=b#D_O k\3MLn_od_jjQ -SjF=b#D_O k\3MLn_od_jj -_4S=Q4B_pij_jj79rj;R -sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH.___N.4m -S=4h_j4U_ -jSQ=(h_(Q -S4_=h._.UHs; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__C.H._N -=Smhj_4UQ -Sj_=h4_jU4Q -S41=)ap_7Yr_H. -9;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y4_C_NH_.__44m -S=4h_44c_ -jSQ=.h_.HU_ -4SQ=a)1_Y7p_jHr9s; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__C4H._N_S4 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hj__j49r. +=Smh4_46__H4Q +Sj_=h(S. +Qh4=_.4U_ +H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__.jr9m +S=4h_4H6_ +jSQ=4h_4H6__S4 +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__jj__j4r9m +S=4h_4H4__S4 +Qhj=_ +(.S=Q4hU_44;_H +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hjr_jjS9 +m_=h4_44HQ +Sj_=h4_44H +_4S=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHR4kM4l_NH_oNL_k#CLMNDEC_H_oEj__jNj.__S4 +m_=h4_n64Q +Sjt=Aq_Bij_djQ +haS=Q4qj1_djj_j1j_Y_hBHs; +R:fjjNRlOqERhR7.blsHR4kM4l_NH_oNL_k#CLMNDEC_H_oEj__jNj._ +=Smhn_46Q +Sj_=h4_n64Q +S41=q_jjd_ +H;sjRf:ljRNROEq.h7RHbslMRk6__Cj__jNj.__S4 +m_=h4_n.4Q +Sjb=Ok#_C09r4 +4SQ=kOb_0C#r;.9 +fsRjR:jlENOR7qh.sRbHklRMC6__jj___N.jm +S=4h_nS. +Qhj=_.4n_S4 +QO4=bCk_#H0_r;d9 +fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__jj___N.jr_44S9 +m_=h4_cU4Q +Sjb=Ok#_C09rj +4SQ=kOb_0C#_4Hr9s; +R:fjjNRlOqERhR7.blsHRkOb_0C#_j.__Nj_.r_j4S9 m_=h4 -4cS=Qjh4_4c -_4S=Q4)_1a7_pYH9r4;R -sfjj:ROlNEhRq7b.RsRHlk4M._sLCs__jN4._ -=Smk4M._sLCs -_4S=Qjh(_.(Q -S4t=Aq_Bij_jjOs; -R:fjjNRlOqERhR7.blsHR.kM4C_Lsjs__ -N.Skm=M_.4LsCs -jSQ=.kM4C_Ls4s_ -4SQ=zwu_h1 1O _;R -sfjj:ROlNEhRq7b.RsRHlk4M._kVb__O#j._N_S4 -mM=k.V4_bOk_# -_4S=Qjh(_.(Q -S4t=Aq_Bij_jjOs; -R:fjjNRlOqERhR7.blsHR.kM4b_Vk#_O_Nj_.m +cUS=Qjhc_4U +_4S=Q4O_bkC_#0H9rd;R +sfjj:ROlNEhRq7b.RsRHltj_4U +_4Sbm=FO#_D3 \H_bD4Q +Sj_=h4_UgHQ +S4_=h4_U(Hs; +R:fjjNRlOqERhR7.blsHR4t_jSU +mF=b#D_O H\3bSD +Qbj=FO#_D3 \H_bD4Q +S4_=h4_UUHs; +R:fjjNRlOqERhR7.blsHR#bF_ OD\#3N_jjj_N8ln__Hj__j.m +S=.h_jH6__S. +Qhj=_j4c_SH +Qb4=FO#_D3 \k;M. +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \Nj#_j8j_l_NnH__jjm +S=.h_jH6_ +jSQ=.h_jH6__S4 +Qh4=_6.j_.H_;R +sfjj:ROlNEhRq7b.RsRHlqtvQqz_A1q_7a7q_QH)_P__jj._N_4j_ +=SmhU_4j +_4S=Qjqj1_jHj_ +4SQ=qAtBji_dQj_hHa_;R +sfjj:ROlNEhRq7b.RsRHlqtvQqz_A1q_7a7q_QH)_P__jj._N_.j_ +=SmhU_4j +_.S=Qj)jW_jOj_ +4SQ=XM uu_1q_B Hs; +R:fjjNRlOqERhR7.blsHRQqvtAq_z71_q_aq7_Q)HjP__Nj_. +_jShm=_j4U +jSQ=4h_U4j_ +4SQ=4h_U.j_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3nkM__Loj_djjd_N_4H_ +=Smhg_6_4H_ +jSQ=_q1j_dj7Sj +QB4=pji_j7j_r;j9 +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MnLjo_djj___NdHm +S=6h_g +_HS=Qjhg_6_4H_ +4SQ=XM uu_1q_B Os; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__HH__jjr_4jS9 +m_=h4_.(H +_4S=Qjhn_.( +_HS=Q4hn_.U;_H +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqM_##H__Hjr_jjS9 +m_=h4_.(HQ +Sj_=h4_.(H +_4S=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jjr_4nS9 +m_=h4_.dH +_4S=Qjhd_g +4SQ=.h_nHn_;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__jj_r +n9Shm=_d4._SH +Qhj=_d4._4H_ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__4j_r +69Shm=_44._4H_ +jSQ=nh_UQ +S4_=h4_UnHs; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jj9r6 +=Smh._44 +_HS=Qjh._44__H4Q +S41=)a;_O +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hj__j49rc +=Smh4_4g__H4Q +Sj_=h(S. +Qh4=_64U_ +H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__cjr9m +S=4h_4Hg_ +jSQ=4h_4Hg__S4 +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHlk4M._kVb__O#jd_N_Nj_.m S=.kM4b_Vk#_O jSQ=.kM4b_Vk#_O_S4 +Qh4=_..U_ +j;sjRf:ljRNROEq.h7RHbslMRk.L4_C_ssjd_N_Nj_.__4jm +S=.kM4C_Ls4s__Sj +Qkj=M_.4LsCs_S4 Qw4=u1z_ h1_ -H;sjRf:ljRNROEq.h7RHbslMRk4N4_lNHo_#Lk_NCML_DCEEHo_Nj_.__j4m -S=4h_d4j_ -jSQ=qAtBji_dQj_hSa -Qq4=1d_jjj_jjY_1hHB_;R -sfjj:ROlNEhRq7b.RsRHlk4M4_HNloLN_kC#_MDNLCH_EojE___N.jm -S=4h_dSj -Qhj=_j4d_S4 -Qq4=1d_jj;_H -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kgM._ OD_jjj__MC4 -_4Sbm=FO#_D3 \kgM._ OD_jjj__MC4 -_4S=QjO_bkC_#0H9r. -4SQ=qev_aQh_ -H;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_.gO_D j_jjM4C__S. -mF=b#D_O k\3M_.gO_D j_jjM4C__S. -QOj=bCk_#d0r9Q -S4b=Ok#_C0r_Hj -9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_.gO_D j_jjM4C__Sd -mF=b#D_O k\3M_.gO_D j_jjM4C__Sd -Qbj=FO#_D3 \kgM._ OD_jjj__MC4 -_4S=Q4b_F#O\D 3.kMgD_O j_jjC_M_.4_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3.kMgD_O j_jjC_M_S4 -mF=b#D_O k\3M_.gO_D j_jjM4C_ -jSQ=#bF_ OD\M3k.Og_Dj _jMj_C__4dQ -S4b=Ok#_C0r_H4 -9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MOg_Dj _jbj_C__jN4d_ -=Smhn_.4 -_4S=QjhU_(_SH -Qh4=_d.n;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3gkM_ OD_jjj__bCjd_N_S. -m_=h._n4.Q -Sjb=Ok#_C0r_HjS9 -QO4=bCk_#H0_r;49 -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MgO_D j_jjbjC__ -NdShm=_4.n -jSQ=.h_n44_ -4SQ=.h_n.4_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3gkM_ OD_jjj__bCjd_N_4j_ -=Smhn_.. -_4S=Qjhn_(_SH -Qh4=_4.6_ -H;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MOg_Dj _jbj_C__jNjd__S. -m_=h._n..Q -Sj_=h. -ndS=Q4e_uq7;_H -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MgO_D j_jjbjC___Ndjm -S=.h_nS. -Qhj=_..n_S4 -Qh4=_..n_ -.;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q hA_p jJ_#lNkG_44_ -=Sm7j1_j j_hpqA __j#kJlG4N__S4 -Qhj=__(UHQ -S4W=)_ -O;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q hA_p jJ_#lNkG_S4 -m1=7_jjj_q hA_p jJ_#lNkG_S4 -Q7j=1j_jjh_ q Ap_#j_JGlkN__44Q -S4v=1_Qqvtnqr9s; -R:fjjNRlOqERhR7.blsHRkOb_0C#_j.__Nj_d__j49r4 -=Smh6_.g -_4S=QjO_bkCr#0jS9 -QO4=bCk_#H0_r;49 -fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__jj___Ndj9r4 -=Smh6_.gQ -Sj_=h._6g4Q +O;sjRf:ljRNROEq.h7RHbslMRk.L4_C_ssjd_N_Nj_.m +S=.kM4C_LsSs +Qkj=M_.4LsCs_j4_ +4SQ=.h_Uj._;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3BBYp7 _v6q__44_ +=Smb_F#O\D 3BBYp7 _v6q__44r9Q +Sj1=q_jjj_SH +Qh4=_j.._ +H;sjRf:ljRNROEq.h7RHbslFRb#D_O B\3Y Bp_q7v_46_ +=Smb_F#O\D 3BBYp7 _v6q_r +49S=Qjb_F#O\D 3BBYp7 _v6q__44r9Q +S4M=k4Y_BB_p 7rvq. +9;sjRf:ljRNROEq.h7RHbsl_Rtg4j_ +=Smhg_4g +_4S=QjhU_n_SH +QB4=Y Bp_q7vr;j9 +fsRjR:jlENOR7qh.sRbHtlR_ +gjShm=_g4g +jSQ=4h_g4g_ +4SQ=BBYp7 _vHq_r;49 +fsRjR:jlENOR7qh.sRbHqlR1j_jjv_7q__4#kJlG4N_ +=Smqj1_j7j_v4q__l#Jk_GN4Q +Sjp=BiX_ u +_HS=Q4B_pim_zau_) 7s; +R:fjjNRlOqERhR7.blsHR_q1j_jj7_vq4J_#lNkG +=Smqj1_j7j_v4q__l#Jk +GNS=Qjqj1_j7j_v4q__l#Jk_GN4Q +S4_=h._j6Hs; +R:fjjNRlOqERhR7.blsHR#bF_ OD\#3N_jjj_N8ln__Hj__jN4._ +=Smhc_4j +_4S=QjBpYB v_7q9rj +4SQ=BBYp7 _v4qr9s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\#3N_jjj_N8ln__Hj__jNS. +m_=h4 +cjS=Qjhc_4j +_4S=Q4)jW_jHj_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3BBYp7 _v6q__Hj__S4 +m_=hnHn__S4 +Qqj=1j_jj +_HS=Q4hg_4U;_H +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \BpYB v_7q__6j__H.m +S=nh_n__H.Q +Sj_=h4_ggHQ +S4_=h._.jHs; +R:fjjNRlOqERhR7.blsHR#bF_ OD\Y3BB_p 7_vq6__jHm +S=nh_n +_HS=Qjhn_n_4H_ +4SQ=nh_n__H.s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\#3N_jjj_N8ln__Hj__j4m +S=.h_jH6__S4 +Qqj=vqQt__71HQ +S41=q_jjj_ +H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__Fj_.9r. +=Smhd_4c +_jS=Qjhd_4c__j4Q +S4v=1_Qqvtdqr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jjr_44S9 +m_=h4_4dH +_4S=QjhU_n +4SQ=4h_cH4_;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__jj__4.r9m +S=4h_4Hd__S. +Qhj=_.4c_SH +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__jj_r +49Shm=_d44_SH +Qhj=_d44_4H_ +4SQ=4h_4Hd__ +.;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MOg_Dj _jbj_C__jj._N_4j_ +=Smhc_4c +_4S=QjhU_n_SH +Qh4=_U.j;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3gkM_ OD_jjj__bCj__jNj.__S. +m_=h4_cc.Q +Sju=eq__7HQ S4b=Ok#_C0r_Hd -9;sjRf:ljRNROEq.h7RHbslMRk6__CH -_4Shm=_j.6_4H_ -jSQ=4h_n -_HS=Q4h6_.c;_H -fsRjR:jlENOR7qh.sRbHklRMNn_lNHo_#Lk_08NNH_8sm -S=nkM_HNloLN_k8#_N_0N8 -HsS=Qjk_MnNolHNk_L#N_808N_H4s_ -4SQ=nkM_HNloLN_k8#_N_0N8_Hs.s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\#3N_jjj_N8ln -_4Sbm=FO#_D3 \Nj#_j8j_l_Nn4Q -Sjv=qQ_tq7H1_ -4SQ=_q1j_jjHs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\#3N_jjj_N8ln -_.Sbm=FO#_D3 \Nj#_j8j_l_Nn.Q -SjF=b#D_O k\3ML4_o NO_jjd_0HM -4SQ=#bF_ OD\M3kds; -R:fjjNRlOqERhR7.blsHR#bF_ OD\#3N_jjj_N8lnm -S=#bF_ OD\#3N_jjj_N8lnQ -SjF=b#D_O N\3#j_jjl_8N4n_ -4SQ=#bF_ OD\#3N_jjj_N8ln;_. -fsRjR:jlENOR7qh.sRbH7lR1j_jjv_7q__4#kJlG4N_ -=Sm7j1_j7j_v4q__l#Jk_GN4Q -Sj1=7_jjj_q7v_#j_JGlkN -_HS=Q4b_F#O\D 3_N#j_jj8nlN;R -sfjj:ROlNEhRq7b.RsRHl7j1_j7j_v4q__l#Jk -GNS7m=1j_jjv_7q__4#kJlGSN -Q7j=1j_jjv_7q__4#kJlG4N_ -4SQ=#bF_ OD\M3kcI_s_jjj_ -H;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3Msc_Ij_jj -_4Sbm=FO#_D3 \k_McsjI_j4j_ -jSQ=iBp_jjd_ru jS9 -QB4=pji_duj_ r_H4 -9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3Msc_Ij_jj -_.Sbm=FO#_D3 \k_McsjI_j.j_ -jSQ=iBp_jjd_SO -Q)4=Wj_jj;_H -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_McsjI_jSj -mF=b#D_O k\3Msc_Ij_jjQ -SjF=b#D_O k\3Msc_Ij_jj -_4S=Q4b_F#O\D 3ckM__sIj_jj.s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k4Od_DF _kH0_M40_ -=Smb_F#O\D 34kMdD_O k_F0M_H0 -_4S=Qjb_F#O\D 34kM.D_O k_F0M_H0Q -S41=q_jjj_q7v_ -H;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_4dO_D F_k0H -M0Sbm=FO#_D3 \kdM4_ OD_0Fk_0HM -jSQ=#bF_ OD\M3k4Od_DF _kH0_M40_ -4SQ=#bF_ OD\M3kdD_O k_F0M_H0s; -R:fjjNRlOqERhR7.blsHR1) ma_z.a__Nj_.__j4m -S=4h_.46_ -jSQ=(h_n -_HS=Q4hd_4(s; -R:fjjNRlOqERhR7.blsHR1) ma_z.a__Nj_. -_jShm=_64. -jSQ=4h_.46_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbsl1R)ap_7Yj_C_NH_.__j4m -S=4h_44n_ -jSQ=(h_nQ -S41=)ap_7Yr_Hj -9;sjRf:ljRNROEq.h7RHbsl1R)ap_7Yj_C_NH_. -_jShm=_n44 -jSQ=4h_44n_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_dcNj#_d8j_j__HNj._ -=Smh(_.(Q -Sj_=h._((cQ -S4_=h._((6s; -R:fjjNRlOqERhR7.blsHR4kMjH_OH4M_ +9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MOg_Dj _jbj_C__jj._N_Sj +m_=h4 +ccS=Qjhc_4c +_4S=Q4hc_4c;_. +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MgO_D j_jjbjC__Nj_. +_4Shm=_d4c_S4 +Qhj=__(.HQ +S4_=hUH._;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3gkM_ OD_jjj__bCj__jN.._ +=Smhc_4d +_.S=QjO_bkC_#0H9rj +4SQ=kOb_0C#_dHr9s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kgD_O j_jjC_b_jj__ +N.Shm=_d4c +jSQ=4h_c4d_ +4SQ=4h_c.d_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkMc#_N_jjd__84H__HN4._ +=Smhn_4d +_4S=Qjqj1_d7j_4 +_HS=Q4ABtqid_jjh_Qa;_7 +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kcMd__N#j_dj8H4__NH_. +_.Shm=_d4n_S. +Qhj=_..U +4SQ=_1vqtvQq__HH9r(;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkMc#_N_jjd__84H__HNd._ +=Smhn_4d +_dS=Qjhn_4d +_4S=Q4hn_4d;_. +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kcMd__N#j_dj8H4__NH_.m +S=4h_nSd +Qhj=_d4n_Sd +Qk4=M84_# NO4;_H +fsRjR:jlENOR7qh.sRbHklRM_.4V_bkOj#___Ndj._N_S4 +mM=k.V4_bOk_# +_4S=Qjk4M._sLCs +_4S=Q4w_uz11 h ;_H +fsRjR:jlENOR7qh.sRbHklRM_4dOMHH_jH__Nj_. +_cSkm=M_4jOMHH_Sc +Qqj=]]Qt_dHrjS9 +Qq4=]]Qt_dHr4 +9;sjRf:ljRNROEq.h7RHbslMRk4Od_H_HMH__jj._N_S6 +mM=k4Oj_H_HM6Q +Sj_=q7m B7O _r9.d +4SQ=_q1j_dj7Hj_;R +sfjj:ROlNEhRq7b.RsRHlkdM4_HOHM__Hj__jNn._ =SmkjM4_HOHM -_4S=Qjqt]Q]r_H. -c9S=Q4qt]Q]r_H.;69 -fsRjR:jlENOR7qh.sRbHklRM_4jOMHH_S. -mM=k4Oj_H_HM.Q -Sj]=qQ_t]Hnr.9Q -S4]=qQ_t]H(r.9s; -R:fjjNRlOqERhR7.blsHR4kMjH_OHdM_ -=SmkjM4_HOHM -_dS=Qjqt]Q]r_H. -U9S=Q4qt]Q]r_H.;g9 -fsRjR:jlENOR7qh.sRbHklRM_4jOMHH_Sc -mM=k4Oj_H_HMcQ -Sj]=qQ_t]Hjrd9Q -S4]=qQ_t]H4rd9s; -R:fjjNRlOqERhR7.blsHR4kMjH_OH6M_ -=SmkjM4_HOHM -_6S=Qjq _7B m7_.OrdS9 -Qq4=1d_jjj_7_ -H;sjRf:ljRNROEq.h7RHbslMRk4Oj_H_HMnm -S=4kMjH_OHnM_ -jSQ=7q_ 7Bm r_O. -j9S=Q4q _7B m7_.Or4 -9;sjRf:ljRNROEq.h7RHbslMRk4Oj_H_HM(m +_nS=Qjq _7B m7_.OrjS9 +Qq4=_B7 m_7 O4r.9s; +R:fjjNRlOqERhR7.blsHR4kMdH_OHHM__jj___N.(m S=4kMjH_OH(M_ jSQ=4kMjH_OH4M_ 4SQ=4kMjH_OH.M_;R -sfjj:ROlNEhRq7b.RsRHlkjM4_HOHM -_USkm=M_4jOMHH_SU -Qkj=M_4jOMHH_Sd +sfjj:ROlNEhRq7b.RsRHlkdM4_HOHM__Hj__jNU._ +=SmkjM4_HOHM +_US=QjkjM4_HOHM +_dS=Q4kjM4_HOHM;_c +fsRjR:jlENOR7qh.sRbHklRM_4dOMHH_jH__Nj_. +_gSkm=M_4jOMHH_Sg +Qkj=M_4jOMHH_S6 Qk4=M_4jOMHH_ -c;sjRf:ljRNROEq.h7RHbslMRk4Oj_H_HMgm -S=4kMjH_OHgM_ -jSQ=4kMjH_OH6M_ -4SQ=4kMjH_OHnM_;R -sfjj:ROlNEhRq7b.RsRHlkjM4_HOHMj_4 -=SmkjM4_HOHMj_4 -jSQ=4kMjH_OH(M_ -4SQ=4kMjH_OHUM_;R -sfjj:ROlNEhRq7b.RsRHlkjM4_HOHM4_4 +n;sjRf:ljRNROEq.h7RHbslMRk4Od_H_HMH__jj._N_ +4jSkm=M_4jOMHH_ +4jS=QjkjM4_HOHM +_(S=Q4kjM4_HOHM;_U +fsRjR:jlENOR7qh.sRbHklRM_4dOMHH_jH__Nj_.4_4 =SmkjM4_HOHM4_4 jSQ=4kMjH_OHgM_ 4SQ=7q_ 7Bm r_O.;.9 -fsRjR:jlENOR7qh.sRbHklRM_4jOMHH -=SmkjM4_HOHMQ -SjM=k4Oj_H_HM4Sj -Qk4=M_4jOMHH_;44 -fsRjR:jlENOR7qh.sRbHklRMNn_lNHo_#Lk_08NNH_8s -_4Skm=MNn_lNHo_#Lk_08NNH_8s -_4S=Qjqj1_jHj_ -4SQ=qAtBji_dQj_hHa_;R -sfjj:ROlNEhRq7b.RsRHlk_MnNolHNk_L#N_808N_H.s_ -=Smk_MnNolHNk_L#N_808N_H.s_ -jSQ=_)Wj_jjOQ -S4 =MX1u_u qB_ -H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_cHr9m -S=4h_cHc_ -jSQ=4h_cHc__S4 -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__d4r9m -S=4h_cH.__S4 -Qhj=_n4n_SH -Qh4=_(4n_ -H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_dHr9m -S=4h_cH._ -jSQ=4h_cH.__S4 -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__.4r9m -S=4h_cHj__S4 -Qhj=_64n_SH -Qh4=_c.n_ -H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_.Hr9m -S=4h_cHj_ -jSQ=4h_cHj__S4 -Q)4=1Oa_;R +fsRjR:jlENOR7qh.sRbHklRM_4dOMHH_jH__Nj_.m +S=4kMjH_OHSM +Qkj=M_4jOMHH_ +4jS=Q4kjM4_HOHM4_4;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__jj___N.4r_4dS9 +m_=h._j44Q +Sj_=hUHj_ +4SQ=Uh_.;_H +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hj__jN4.__d.r9m +S=.h_j.4_ +jSQ=qev_aQh_SH +Qe4=u7q__ +H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__Nj_.r_4dS9 +m_=h. +j4S=Qjhj_.4 +_4S=Q4hj_.4;_. +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hj__jFj.__d4r9m +S=4h_dH4__S4 +QAj= _))OQ +S4_=h._j4Hs; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jj._F_djr9m +S=4h_dH4_ +jSQ=4h_dH4__S4 +Qh4=_..j_ +H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__Fj_.r_4.S9 +m_=h4_dcj +_4S=QjhU_n_SH +Qh4=_44d;R +sfjj:ROlNEhRQesRbHzlR7j1_jQj_hHa_ +=Smz_71j_jjQ_haHQ +Sj7=z1j_jjh_Qas; +R:fjjNRlOQERhbeRsRHlk_M4z_71j_jjQ_haHm +S=4kM_1z7_jjj_aQh +jSQ=4kM_1z7_jjj_aQh_ +j;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jH__Fj_.r_4jS9 +m_=hgjn__S4 +Qqj=1d_jjj_jjY_1hHB_ +4SQ=iBp_jjj_c7r9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__HH__jj._F_j.r9m +S=gh_n__j.Q +Sjp=Bij_jj__7H9rd +4SQ=XM uu_1q_B Os; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__HH__jj._Fr +j9Shm=__gnjQ +Sj_=hgjn__S4 +Qh4=__gnj;_. +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kcMd__N#j_dj8H4__FH_. +_4Shm=_..U_4j_ +jSQ=_wBO9rj +4SQ=_wBO9r4;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkMc#_N_jjd__84H__HF.._ +=SmhU_..__j.Q +Sj_=q7m B7O _r94( +4SQ=7q_ 7Bm r_H4;n9 +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kcMd__N#j_dj8H4__FH_. +_dShm=_..U_dj_ +jSQ=7q_ 7Bm r_H4 +U9S=Q4q _7B m7_4Hrg +9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_dcNj#_d8j_4__HH._F_Sc +m_=h._U.j +_cS=QjhU_..__j4Q +S4_=h._U.j;_. +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kcMd__N#j_dj8H4__FH_.m +S=.h_Uj._ +jSQ=.h_Uj.__Sc +Qh4=_..U_dj_;R sfjj:ROlNEhRq7b.RsRHlb_F#O\D 34kMjl_#_HNlo4N_ =Smb_F#O\D 34kMjl_#_HNloHN__S4 Q1j=Q_Z O9rj @@ -1674,543 +1637,515 @@ R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k4#j_ll_NH oNSbm=FO#_D3 \kjM4__#lNolHN _HS=Qjb_F#O\D 34kMjl_#_HNloHN__S4 Q14=Q_Z Or_H4 -9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_46O_D j_jj8__HH._F_S4 -m_=hUH6__S4 -Qqj=1d_jjj_jjY_1hHB_ -4SQ=XM uu_1q_B Os; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k4O6_Dj _j8j__HH___F..m -S=Uh_6__H.Q -Sjp=Bij_jjr_7cS9 -QB4=pji_j7j__dHr9s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k4O6_Dj _j8j__HH__ -F.Shm=__U6HQ -Sj_=hUH6__S4 -Qh4=__U6H;_. -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kcMd__N#j_dj8Hj___N.j -_4Shm=_(.(_S4 -Qqj=1d_jj -_HS=Q4q _7B m7_4Or( -9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_dcNj#_d8j_j__HNj.__S. -m_=h._((.Q -Sj_=q7m B7H _r94n -4SQ=7q_ 7Bm r_H4;U9 -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kcMd__N#j_dj8Hj___N.j -_dShm=_(.(_Sd -Qwj=Br_O4S9 -Qq4=_B7 m_7 Hgr49s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdNc_#d_jjj_8_NH_.__jcm -S=.h_(c(_ -jSQ=.h_(4(_ -4SQ=.h_(.(_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkMc#_N_jjd__8jH._N_6j_ -=Smh(_.( -_6S=Qjh(_.( -_dS=Q4wOB_r;j9 -fsRjR:jlENOReQhRHbslWR)_jjj_aQh_H4_ -=SmhU_d -jSQ=dh_U;_j -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kcMd__N#j_dj8Hj___F.4m -S=gh_4__j4Q -Sjt=Aq_Bij_djQ_ha7Q -S4t=Aq_Bij_djQ;ha -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kcMd__N#j_dj8Hj___F..m -S=gh_4__j.Q -Sj1=q_jjd__7jHQ -S4v=1_QqvtHq__(Hr9s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdNc_#d_jjj_8_FH_. -_dShm=__g4j -_dS=Qjh4_g_4j_ -4SQ=gh_4__j.s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdNc_#d_jjj_8_FH_.m -S=gh_4 -_jS=Qjh4_g_dj_ -4SQ=XM uu_1q_B Os; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__C.H -_4Shm=_6.n_4H_ -jSQ=4h_jHU_ -4SQ=4h_jHg_;R -sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH._ -=Smhn_.6 -_HS=Qjhn_.6__H4Q -S4_=h._n6.;_j -fsRjR:jlENOR7qh.sRbH)lR17a_pCY_4__H4m -S=.h_nHn__S4 -Qhj=_.44_SH -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH4__S. -m_=h._nnH -_.S=Qjh4_4d -_HS=Q4h4_4c;_H -fsRjR:jlENOR7qh.sRbH)lR17a_pCY_4 -_HShm=_n.n_SH -Qhj=_n.n_4H_ -4SQ=.h_nHn__ -.;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_4H_r -49Shm=_U4d_4H_ -jSQ=4h_nHc_ -4SQ=.h_n -c;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_4Hr9m -S=4h_dHU_ -jSQ=4h_dHU__S4 -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__n4r9m -S=4h_cHU__S4 -Qhj=_ -(gS=Q4h(_4j;_H -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##r_HnS9 -m_=h4_cUHQ -Sj_=h4_cUH -_4S=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#Hr_4cS9 -m_=h4_ccH -_4S=QjhU_( -4SQ=4h_nHU_;R -sfjj:ROlNEhRQesRbHklRM14_vv_qQ_tqjJ_#lNkG_j4__SH -mM=k4v_1_Qqvtjq__l#Jk_GN4Q -SjM=k4v_1_Qqvtjq__l#Jk_GN4;_j -fsRjR:jlENOReQhRHbslWR)_HO_ -=Sm)OW__SH -Q)j=W;_O -fsRjR:jlENOReQhRHbslFRb#D_O )\3Wj_jjh_Qa__6Hm -S=#bF_ OD\W3)_jjj_aQh_S6 -Qbj=FO#_D3 \)jW_jQj_h6a__ -j;sjRf:ljRNROEQRheblsHRiBp_jjj_H7_r -d9SBm=pji_j7j__dHr9Q -Sjp=Bij_jjr_7d -9;sjRf:ljRNROEQRheblsHR.h_6 -_HShm=__.6HQ -Sj_=h. -6;sjRf:ljRNROEQRheblsHRpQu_jjd_H4_r -49Shm=_ -.US=QjhU_._ -j;sjRf:ljRNROEQRheblsHR.h_c -_HShm=__.cHQ -Sj_=h. -c;sjRf:ljRNROEQRheblsHRpQu_jjd_H4_r -j9Shm=_ -.(S=Qjh(_._ -j;sjRf:ljRNROEQRheblsHRpQu_HO_r -49SQm=uOp__4Hr9Q -Sju=Qpr_O4 -9;sjRf:ljRNROEQRheblsHRpQu__7jjr_H4S9 -m_=h6Sj -Qhj=__6jjs; -R:fjjNRlOQERhbeRsRHlQ_upOr_HjS9 -mu=Qp__OH9rj -jSQ=pQu_jOr9s; -R:fjjNRlOQERhbeRsRHlQ_up7jj__jHr9m -S=ch_gQ -Sj_=hcjg_;R -sfjj:ROlNEhRQesRbHhlR__4cHm -S=4h_c -_HS=Qjhc_4;R -sfjj:ROlNEhRQesRbHqlR1d_jjj_jjY_1h4B__SH -m_=hdSg -Qhj=__dgjs; -R:fjjNRlOQERhbeRsRHlh6_4_SH -m_=h4H6_ -jSQ=4h_6s; -R:fjjNRlOQERhbeRsRHlhn_4_SH -m_=h4Hn_ -jSQ=4h_ns; -R:fjjNRlOQERhbeRsRHlh6_.c -_HShm=_c.6_SH -Qhj=_c.6;R -sfjj:ROlNEhRQesRbHhlR_d.n_SH -m_=h._ndHQ -Sj_=h.;nd -fsRjR:jlENOReQhRHbsl_Rh._6nHm -S=.h_6Hn_ -jSQ=.h_6 -n;sjRf:ljRNROEQRheblsHR4h_jH4_ -=Smhj_44 -_HS=Qjhj_44s; -R:fjjNRlOQERhbeRsRHlhj_4d -_HShm=_d4j_SH -Qhj=_d4j;R -sfjj:ROlNEhRQesRbHhlR_c4j_SH -m_=h4_jcHQ -Sj_=h4;jc -fsRjR:jlENOReQhRHbsl_Rh4_j6Hm -S=4h_jH6_ -jSQ=4h_j -6;sjRf:ljRNROEQRheblsHR4h_4H6_ -=Smh4_46 -_HS=Qjh4_46s; -R:fjjNRlOQERhbeRsRHlh4_4n -_HShm=_n44_SH -Qhj=_n44;R -sfjj:ROlNEhRQesRbHhlR_44d_SH -m_=h4_d4HQ -Sj_=h4;d4 -fsRjR:jlENOReQhRHbsl_Rh._((Hm -S=.h_(H(_ -jSQ=.h_( -(;sjRf:ljRNROEQRheblsHR#bF_ OD\M3kdNc_#d_jjj_8_HH_ -=Smhc_n -jSQ=nh_c;_j -fsRjR:jlENOReQhRHbslFRb#D_O k\3M_dcNj#_d8j_j__HFH._ -=Smh4_g -jSQ=gh_4;_j -fsRjR:jlENOReQhRHbslFRb#D_O k\3M_46O_D j_jj8__HH._F_SH -m_=hUS6 -Qhj=__U6Hs; -R:fjjNRlOQERhbeRsRHlb_F#O\D 36kM_NLoOj _dHj_M80__jH_ -=Smb_F#O\D 36kM_NLoOj _dHj_M80_ -jSQ=#bF_ OD\M3k6o_LN_O j_djH_M08;_H -fsRjR:jlENOReQhRHbslFRb#D_O q\3vqQt_1Az_q hA_p 7_vq]]Qt_Hd_ -=Smb_F#O\D 3QqvtAq_z 1_hpqA v_7qQ_]td]_ -jSQ=#bF_ OD\v3qQ_tqA_z1 Ahqp7 _v]q_Q_t]d;_j -fsRjR:jlENOReQhRHbslFRb#D_O q\3vqQt_1Az_q hA_p 7_vqp_mWd -_HSbm=FO#_D3 \qtvQqz_A1h_ q Ap_q7v_Wpm_Sd -Qbj=FO#_D3 \qtvQqz_A1h_ q Ap_q7v_Wpm_jd_;R -sfjj:ROlNEhRQesRbHblRFO#_D3 \)jW_j7j_vdq__SH -mF=b#D_O )\3Wj_jjv_7q -_dS=Qjb_F#O\D 3_)Wj_jj7_vqd;_j -fsRjR:jlENOReQhRHbsl7Rz1j_jj__OHm -S=1z7_jjj_HO_ -jSQ=1z7_jjj_ -O;sjRf:ljRNROEQRheblsHR1p7_jjj_HO_ -=Smp_71j_jjO -_HS=Qjp_71j_jjOs; -R:fjjNRlOQERhbeRsRHlb_F#O\D 3Z1Q v_7q__nj__jFH._r -j9Shm=_ -UnS=Qjhn_U_ -H;sjRf:ljRNROEQRheblsHR4h_.Hg_ -=Smh._4g -_HS=Qjh._4gs; -R:fjjNRlOQERhbeRsRHlhd_4j -_HShm=_j4d_SH -Qhj=_j4d;R -sfjj:ROlNEhRQesRbHhlR_(44_SH -m_=h4_4(HQ -Sj_=h4;4( -fsRjR:jlENOReQhRHbslvRqQ_tq7j1__Hj_ -=Smhn_c -jSQ=ch_n;_j -fsRjR:jlENOReQhRHbsl_Rh4_j(Hm -S=4h_jH(_ -jSQ=4h_j -(;sjRf:ljRNROEQRheblsHR#bF_ OD\Q31Z7 _vnq__jj__jHr9m -S=#bF_ OD\Q31Z7 _vnq_r -j9S=Qjb_F#O\D 3Z1Q v_7q__nj9rj;R -sfjj:ROlNEhRQesRbHhlR_n4j_SH -m_=h4_jnHQ -Sj_=h4;jn -fsRjR:jlENOReQhRHbslFRb#D_O 1\3Q_Z 7_vqn__jjr_H4S9 -mF=b#D_O 1\3Q_Z 7_vqn9r4 -jSQ=#bF_ OD\Q31Z7 _vnq__4jr9s; -R:fjjNRlOQERhbeRsRHlh__dHm -S=dh__SH -Qhj=_ -d;sjRf:ljRNROEQRheblsHR_71j_jj7_vq4 -_HShm=_ -cdS=Qjhd_c_ -j;sjRf:ljRNROEQRheblsHRch__SH -m_=hc -_HS=Qjh;_c -fsRjR:jlENOReQhRHbsl1Rq_jjj_q7v_H4_ -=Smh._c -jSQ=ch_.;_j -fsRjR:jlENOReQhRHbslMRknl_NH_oNL_k#8NN0_s8H_SH -mM=knl_NH_oNL_k#8NN0_s8H_SH -Qkj=MNn_lNHo_#Lk_08NNH_8ss; -R:fjjNRlOQERhbeRsRHlk.M4_HNloLN_k8#_N_0N8_Hsl -_HSkm=M_4.NolHNk_L#N_808N_Hls__SH -Qkj=M_4.NolHNk_L#N_808N_Hls_;R -sfjj:ROlNEhRQesRbHqlRvqQt_1Az_a7qqQ_7)P_H_SH -mv=qQ_tqA_z17qqa_)7Q_SO -Qqj=vqQt_1Az_a7qqQ_7)__Ojs; -R:fjjNRlOQERhbeRsRHlh._._SH -m_=h.H._ -jSQ=.h_.s; -R:fjjNRlOQERhbeRsRHlqtvQqz_A1h_ q Ap_q7v_t]Q]__4Hm -S=dh_4Q -Sj_=hdj4_;R -sfjj:ROlNEhRQesRbHhlR__.4Hm -S=.h_4 -_HS=Qjh4_.;R -sfjj:ROlNEhRQesRbHqlRvqQt_1Az_q hA_p 7_vqp_mW4 -_HShm=_ -d.S=Qjh._d_ -j;sjRf:ljRNROEQRheblsHR4h_g -_HShm=__4gHQ -Sj_=h4 -g;sjRf:ljRNROEQRheblsHR_qj7_vq4 -_HShm=_ -dcS=Qjhc_d_ -j;sjRf:ljRNROEQRheblsHR4h_U -_HShm=__4UHQ -Sj_=h4 -U;sjRf:ljRNROEQRheblsHR_)Wj_jj7_vq4 -_HShm=_ -d6S=Qjh6_d_ -j;sjRf:ljRNROEQRheblsHR4h_jHU_ -=Smhj_4U -_HS=Qjhj_4Us; -R:fjjNRlOQERhbeRsRHlh4_44 -_HShm=_444_SH -Qhj=_444;R -sfjj:ROlNEhRQesRbH)lR17a_pCY_.__H. -_HShm=_6.n_S. -Qhj=_6.n_j._;R -sfjj:ROlNEhRQesRbHelRuOq__SH -mu=eq__OHQ -Sju=eq;_O -fsRjR:jlENOReQhRHbsluReq__7j -_HShm=_ -6.S=Qjh._6_ -j;sjRf:ljRNROEQRheblsHRq7aBOi__SH -ma=7q_BiO -_HS=Qj7Baqi;_O -fsRjR:jlENOReQhRHbslaR7q_Bi7jj__SH -m_=hcSU -Qhj=__cUjs; -R:fjjNRlOQERhbeRsRHlb_F#O\D 3ckM_NLoOj _jHj_ -=Smb_F#O\D 3ckM_NLoOj _jHj_ -jSQ=#bF_ OD\M3kco_LN_O j;jj -fsRjR:jlENOReQhRHbslFRb#D_O k\3MLn_o NO_jjj_SH -mF=b#D_O k\3MLn_o NO_jjj -jSQ=#bF_ OD\M3kno_LN_O j_jjjs; -R:fjjNRlOQERhbeRsRHlh__(Hm -S=(h__SH -Qhj=_ -(;sjRf:ljRNROEQRheblsHRqAtBji_dQj_h4a__SH -m_=hcS4 -Qhj=__c4js; -R:fjjNRlOQERhbeRsRHlb_F#O\D 34kM_NLoOj _dHj_MH0_ -=Smb_F#O\D 34kM_NLoOj _dHj_MS0 -Qbj=FO#_D3 \k_M4LOoN d_jjM_H0;_j -fsRjR:jlENOReQhRHbsl_Rt4_.4Hm -S=#bF_ OD\M3k4O._DF _kH0_MS0 -Qbj=FO#_D3 \k.M4_ OD_0Fk_0HM_ -j;sjRf:ljRNROEQRheblsHR4t_4Hn_ -=Smb_F#O\D 3dkM -jSQ=#bF_ OD\M3kd;_j -fsRjR:jlENOReQhRHbsl_Rt4_44Hm -S=#bF_ OD\M3k4L6_o NO_jjd_0HM -jSQ=#bF_ OD\M3k4L6_o NO_jjd_0HM_ -H;sjRf:ljRNROEQRheblsHRgh_U -_HShm=__gUHQ -Sj_=hg -U;sjRf:ljRNROEQRheblsHR#bF_ OD\M3kdO4_Dj _jMj_C__Hjm -S=#bF_ OD\M3kdO4_Dj _jMj_CQ -SjF=b#D_O k\3M_d4O_D j_jjMHC_;R -sfjj:ROlNEhRQesRbHhlR_44._SH -m_=h4_.4HQ -Sj_=h4;.4 -fsRjR:jlENOReQhRHbsl_Rh4_.jHm -S=4h_.Hj_ -jSQ=4h_. -j;sjRf:ljRNROEQRheblsHR4h_.H6_ -=Smh._46 -_HS=Qjh._46s; -R:fjjNRlOQERhbeRsRHlh._4c -_HShm=_c4._SH -Qhj=_c4.;R -sfjj:ROlNEhRQesRbH)lR a1 _amz_j.__SH -m_=h6Sd -Qhj=__6djs; -R:fjjNRlOQERhbeRsRHlhd_4c -_HShm=_c4d_SH -Qhj=_c4d;R -sfjj:ROlNEhRQesRbH)lR17a_pCY_.__HFH._ -=Smh(_.jQ -Sj_=h._(jjs; -R:fjjNRlOQERhbeRsRHl)_1a7_pYCH.___F.j -_HShm=_ -((S=Qjh(_(_ -H;sjRf:ljRNROEQRheblsHR_1vqtvQqs_##_0#H__jFH._r -j9Shm=_ -U(S=Qjh(_U_ -H;sjRf:ljRNROEQRheblsHR4h_4H._ -=Smh4_4. -_HS=Qjh4_4.s; -R:fjjNRlOQERhbeRsRHlh4_4d -_HShm=_d44_SH -Qhj=_d44;R -sfjj:ROlNEhRQesRbHhlR_c44_SH -m_=h4_4cHQ -Sj_=h4;4c -fsRjR:jlENOReQhRHbsl_Rh4_jgHm -S=4h_jHg_ -jSQ=4h_j -g;sjRf:ljRNROEQRheblsHR4h_4HU_ -=Smh4_4U -_HS=Qjh4_4Us; -R:fjjNRlOQERhbeRsRHlh6_.6 -_HShm=_6.6_SH -Qhj=_6.6;R -sfjj:ROlNEhRQesRbHhlR_(.6_SH -m_=h._6(HQ -Sj_=h.;6( -fsRjR:jlENOReQhRHbslbROk#_C0__.j__jH9r. -=SmO_bkC_#0.9r. -jSQ=kOb_0C#_j._r;.9 -fsRjR:jlENOReQhRHbsl_Rh._6UHm -S=.h_6HU_ -jSQ=.h_6 -U;sjRf:ljRNROEQRheblsHR.h_6Hg_ -=Smh6_.g -_HS=Qjh6_.gs; -R:fjjNRlOQERhbeRsRHlO_bkC_#0.__jjr_H4S9 -mb=Ok#_C0r_.4S9 -QOj=bCk_#.0__4jr9s; -R:fjjNRlOQERhbeRsRHlhn_.. -_HShm=_..n_SH -Qhj=_..n;R -sfjj:ROlNEhRQesRbHhlR_4.n_SH -m_=h._n4HQ -Sj_=h.;n4 -fsRjR:jlENOReQhRHbslFRb#D_O k\3MOg_Dj _jbj_C__jHm -S=#bF_ OD\M3kgD_O j_jjC_b -jSQ=#bF_ OD\M3kgD_O j_jjC_b_ -j;sjRf:ljRNROEQRheblsHRkOb_0C#_H.__Fj_.r_HdS9 -m_=h. -64S=Qjh6_.4;_H -fsRjR:jlENOReQhRHbslMRk6__CH._F_SH -m_=h. -6.S=Qjh6_..;_j -fsRjR:jlENOReQhRHbslpRBij_jj _h_Fj_d__HFH._ -=Smhn_( -jSQ=(h_n;_H -fsRjR:jlENOReQhRHbsl_Rh4H(_ -=Smh(_4_SH -Qhj=_;4( -fsRjR:jlENOReQhRHbslvReqh_Qa__4Hm -S=dh_nQ -Sj_=hdjn_;R -sfjj:ROlNEhRQesRbH7lR1j_jjh_ q Ap_#j_JGlkN__jFHd_ -=Smh6_4(Q -Sj_=h4_6(Hs; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_##s0H#___FdH9rc -=Smhn_4jQ -Sj_=h4_njjs; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_##s0H#___FdH9r. -=Smhn_44Q -Sj_=h4_n4js; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_##s0H#___FdH9rn -=Smhn_4.Q -Sj_=h4_n.js; -R:fjjNRlOQERhbeRsRHlhn_46 -_HShm=_64n_SH -Qhj=_64n;R -sfjj:ROlNEhRQesRbHhlR_(4n_SH -m_=h4_n(HQ -Sj_=h4;n( -fsRjR:jlENOReQhRHbsl_Rh4_nnHm -S=4h_nHn_ -jSQ=4h_n -n;sjRf:ljRNROEQRheblsHR4h_nHU_ -=Smhn_4U -_HS=Qjhn_4Us; -R:fjjNRlOQERhbeRsRHlh(_4j -_HShm=_j4(_SH -Qhj=_j4(;R -sfjj:ROlNEhRQesRbHhlR_c4n_SH -m_=h4_ncHQ -Sj_=h4;nc -fsRjR:jlENOReQhRHbsl_Rh4_j.Hm -S=4h_jH._ -jSQ=4h_j -.;sjRf:ljRNROEQRheblsHR_1vqtvQqs_##_0#Hc_F_HH_r -49Shm=_c.n -jSQ=.h_nHc_;R -sfjj:ROlNEhRQesRbHklRM14_vv_qQ_tqjJ_#lNkG_j4___FdH._F_SH -m_=h(Sg -Qhj=__(gHs; -R:fjjNRlOQERhbeRsRHlB_pij_jjuj ___FdH._F_SH -m_=h(SU -Qhj=__(UHs; -R:fjjNRlOQERhbeRsRHlh4_4g -_HShm=_g44_SH -Qhj=_g44;R -sfjj:ROlNEhRQesRbHklRMp4_7j1_jQj_hHa_ -=Smk_M4p_71j_jjQ -haS=Qjk_M4p_71j_jjQ_hajs; -R:fjjNRlOQERhbeRsRHlhd_._SH -m_=h.Hd_ -jSQ=.h_ds; -R:fjjNRlOQERhbeRsRHlAjt_j4j__SH -m_=hdSj -Qhj=__djjs; -R:fjjNRlOQERhbeRsRHlhj_._SH -m_=h.Hj_ -jSQ=.h_js; -R:fjjNRlOQERhbeRsRHlz_71j_jjQ_ha4 -_HShm=_ -ddS=Qjhd_d_ -j;sjRf:ljRNROEQRheblsHR4h_d -_HShm=__4dHQ -Sj_=h4 -d;sjRf:ljRNROEQRheblsHR1p7_jjj_aQh_H4_ -=Smhj_c -jSQ=ch_j;_j +9;sjRf:ljRNROEq.h7RHbslMRk4Od_H_HMH__jj._N_S4 +mM=k4Oj_H_HM4Q +Sj]=qQ_t]Hcr.9Q +S4]=qQ_t]H6r.9s; +R:fjjNRlOqERhR7.blsHR4kMdH_OHHM__jj___N..m +S=4kMjH_OH.M_ +jSQ=Qq]tH]_r9.n +4SQ=Qq]tH]_r9.(;R +sfjj:ROlNEhRq7b.RsRHlkdM4_HOHM__Hj__jNd._ +=SmkjM4_HOHM +_dS=Qjqt]Q]r_H. +U9S=Q4qt]Q]r_H.;g9 +fsRjR:jlENOReQhRHbsluRQpd_jj__4H9rj +=Smh4_. +jSQ=.h_4;_j fsRjR:jlENOReQhRHbsluRQp__OH9r. =SmQ_upOr_H.S9 QQj=uOp_r;.9 fsRjR:jlENOReQhRHbsluRQpj_7_Hj_r .9Shm=_ -64S=Qjh4_6_ -j;sjRf:ljRNROEQRheblsHR.h_n -_HShm=__.nHQ +cdS=Qjhd_c_ +j;sjRf:ljRNROEQRheblsHRpQu_HO_r +49SQm=uOp__4Hr9Q +Sju=Qpr_O4 +9;sjRf:ljRNROEQRheblsHRpQu__7jjr_H4S9 +m_=hcS. +Qhj=__c.js; +R:fjjNRlOQERhbeRsRHlQ_upOr_HjS9 +mu=Qp__OH9rj +jSQ=pQu_jOr9s; +R:fjjNRlOQERhbeRsRHlQ_up7jj__jHr9m +S=ch_4Q +Sj_=hcj4_;R +sfjj:ROlNEhRQesRbH7lRaiqB_HO_ +=Sm7Baqi__OHQ +Sja=7q_BiOs; +R:fjjNRlOQERhbeRsRHl7Baqij_7_Hj_ +=Smh6_c +jSQ=ch_6;_j +fsRjR:jlENOReQhRHbsluReq__OHm +S=qeu_HO_ +jSQ=qeu_ +O;sjRf:ljRNROEQRheblsHRqeu_j7__SH +m_=hcSc +Qhj=__ccjs; +R:fjjNRlOQERhbeRsRHlhd_4_SH +m_=h4Hd_ +jSQ=4h_ds; +R:fjjNRlOQERhbeRsRHle_vqQ_ha4 +_HShm=_ +.(S=Qjh(_._ +j;sjRf:ljRNROEQRheblsHR1p7_jjj_aQh_SH +m7=p1j_jjh_Qa +_HS=Qjp_71j_jjQ;ha +fsRjR:jlENOReQhRHbslMRk47_p1j_jjh_Qa +_HSkm=Mp4_7j1_jQj_hSa +Qkj=Mp4_7j1_jQj_hja_;R +sfjj:ROlNEhRQesRbHhlR_(4c_SH +m_=h4_c(HQ +Sj_=h4;c( +fsRjR:jlENOReQhRHbsl_Rh4_cUHm +S=4h_cHU_ +jSQ=4h_c +U;sjRf:ljRNROEQRheblsHRkOb_0C#_j.__jj__4Hr9m +S=kOb_0C#_4.r9Q +Sjb=Ok#_C0__.j9r4;R +sfjj:ROlNEhRQesRbHhlR_n4c_SH +m_=h4_cnHQ +Sj_=h4;cn +fsRjR:jlENOReQhRHbsljRq_q7v_jj__Hj_ +=Smhn_d +jSQ=dh_n;_j +fsRjR:jlENOReQhRHbsl_Rh4_c6Hm +S=4h_cH6_ +jSQ=4h_c +6;sjRf:ljRNROEQRheblsHRQqvt7q_1__jj__jHm +S=dh_6Q +Sj_=hdj6_;R +sfjj:ROlNEhRQesRbHhlR_d4c_SH +m_=h4_cdHQ +Sj_=h4;cd +fsRjR:jlENOReQhRHbsl_Rh4_ccHm +S=4h_cHc_ +jSQ=4h_c +c;sjRf:ljRNROEQRheblsHR#bF_ OD\M3kgD_O j_jjC_b_jj__SH +mF=b#D_O k\3MOg_Dj _jbj_CQ +SjF=b#D_O k\3MOg_Dj _jbj_C;_j +fsRjR:jlENOReQhRHbsl_Rh.Hj_ +=Smhj_._SH +Qhj=_;.j +fsRjR:jlENOReQhRHbsluRQpd_jj__4H9r. +=Smhd_. +jSQ=.h_d;_j +fsRjR:jlENOReQhRHbsl_Rh4Hg_ +=Smhg_4_SH +Qhj=_;4g +fsRjR:jlENOReQhRHbsluRQpd_jj__4H9r4 +=Smh._. +jSQ=.h_.;_j +fsRjR:jlENOReQhRHbsl_Rh4HU_ +=SmhU_4_SH +Qhj=_;4U +fsRjR:jlENOReQhRHbsl_Rh4_U.Hm +S=4h_UH._ +jSQ=4h_U +.;sjRf:ljRNROEQRheblsHR4h_UH4_ +=SmhU_44 +_HS=QjhU_44s; +R:fjjNRlOQERhbeRsRHlhn_.j +_HShm=_j.n_SH +Qhj=_j.n;R +sfjj:ROlNEhRQesRbHblRFO#_D3 \1 QZ_q7v_jn__jj__4Hr9m +S=#bF_ OD\Q31Z7 _vnq_r +49S=Qjb_F#O\D 3Z1Q v_7q__nj9r4;R +sfjj:ROlNEhRQesRbHhlR_g.6_SH +m_=h._6gHQ +Sj_=h.;6g +fsRjR:jlENOReQhRHbslFRb#D_O 1\3Q_Z 7_vqn__jj__jH9rj +=Smb_F#O\D 3Z1Q v_7qr_njS9 +Qbj=FO#_D3 \1 QZ_q7v_jn_r;j9 +fsRjR:jlENOReQhRHbsl1R7_jjj_q hA_p 4J_#lNkG_jH__SH +m_=hnSd +Qhj=__ndjs; +R:fjjNRlOQERhbeRsRHlh6_46 +_HShm=_646_SH +Qhj=_646;R +sfjj:ROlNEhRQesRbHhlR_.4n_SH +m_=h4_n.HQ +Sj_=h4;n. +fsRjR:jlENOReQhRHbslMRk6__Cj__jHm +S=6kM_SC +Qkj=MC6__ +j;sjRf:ljRNROEQRheblsHR4h_6Hc_ +=Smh6_4c +_HS=Qjh6_4cs; +R:fjjNRlOQERhbeRsRHlO_bkC_#0.__jj__jH9rd +=SmO_bkC_#0.9rd +jSQ=kOb_0C#_j._r;d9 +fsRjR:jlENOReQhRHbsl_Rh4_cgHm +S=4h_cHg_ +jSQ=4h_c +g;sjRf:ljRNROEQRheblsHR.h_jHU_ +=Smhj_.U +_HS=Qjhj_.Us; +R:fjjNRlOQERhbeRsRHlO_bkC_#0.__jj__jH9r. +=SmO_bkC_#0.9r. +jSQ=kOb_0C#_j._r;.9 +fsRjR:jlENOReQhRHbslvReqh_Qa +_HSem=vQq_hHa_ +jSQ=qev_aQh;R +sfjj:ROlNEhRQesRbHOlRbCk_#.0__jj__Fj_.r_H.S9 +m_=hgSU +Qhj=__gUHs; +R:fjjNRlOQERhbeRsRHlk_M41qv_vqQt_#j_JGlkN__4j__4FH._ +=Smhd_g +jSQ=gh_d;_H +fsRjR:jlENOReQhRHbslbROk#_C0__.j__jj._F_dHr9m +S=Uh_jQ +Sj_=hUHj_;R +sfjj:ROlNEhRQesRbH1lRvv_qQ_tq#0s##__Hj__jFH._r +49Shm=_ +(.S=Qjh._(_ +H;sjRf:ljRNROEQRheblsHR4h_dHj__Fj_.__HFH._ +=SmhU_n +jSQ=nh_U;_H +fsRjR:jlENOReQhRHbslFRb#D_O k\3MLn_od_jj__jNHd__SH +m_=h6Sg +Qhj=__6gHs; +R:fjjNRlOQERhbeRsRHlhg_4j +_HShm=_j4g_SH +Qhj=_j4g;R +sfjj:ROlNEhRQesRbHhlR_44g_SH +m_=h4_g4HQ +Sj_=h4;g4 +fsRjR:jlENOReQhRHbsl_Rh._n(Hm +S=.h_nH(_ +jSQ=.h_n +(;sjRf:ljRNROEQRheblsHR.h_nHn_ +=Smhn_.n +_HS=Qjhn_.ns; +R:fjjNRlOQERhbeRsRHlhU_4n +_HShm=_n4U_SH +Qhj=_n4U;R +sfjj:ROlNEhRQesRbHhlR_64U_SH +m_=h4_U6HQ +Sj_=h4;U6 +fsRjR:jlENOReQhRHbsl_Rh4_UdHm +S=4h_UHd_ +jSQ=4h_U +d;sjRf:ljRNROEQRheblsHR4h_UHc_ +=SmhU_4c +_HS=QjhU_4cs; +R:fjjNRlOQERhbeRsRHlhn_.U +_HShm=_U.n_SH +Qhj=_U.n;R +sfjj:ROlNEhRQesRbH1lRvv_qQ_tq#0s##__Hj__jFH._r +n9Shm=_.4d +jSQ=4h_dj._;R +sfjj:ROlNEhRQesRbHhlR_.4c_SH +m_=h4_c.HQ +Sj_=h4;c. +fsRjR:jlENOReQhRHbsl_Rh4_c4Hm +S=4h_cH4_ +jSQ=4h_c +4;sjRf:ljRNROEQRheblsHR_1vqtvQqs_##_0#H__jj._F_cHr9m +S=4h_dS6 +Qhj=_64d_ +j;sjRf:ljRNROEQRheblsHR_1vqtvQqs_##_0#H__jj._F_.Hr9m +S=4h_dSc +Qhj=_c4d_ +j;sjRf:ljRNROEQRheblsHR_1vqtvQqs_##_0#H__jj._F_Hj_r +d9Shm=_44d +jSQ=4h_dH4_;R +sfjj:ROlNEhRQesRbHplR7j1_jOj__SH +m7=p1j_jj__OHQ +Sj7=p1j_jj;_O +fsRjR:jlENOReQhRHbsl7Rz1j_jj__OHm +S=1z7_jjj_HO_ +jSQ=1z7_jjj_ +O;sjRf:ljRNROEQRheblsHR#bF_ OD\Q31Z7 _vnq__jj__Fj_.r_HjS9 +m_=h4 +.US=Qjh._4U;_H +fsRjR:jlENOReQhRHbslvR1_Qqvt#q_s##0_jH__Fj_.r_HdS9 +m_=h4 +j(S=Qjhj_4(;_H +fsRjR:jlENOReQhRHbsl_Rh._jdHm +S=.h_jHd_ +jSQ=.h_j +d;sjRf:ljRNROEQRheblsHR4kM__71j_jj Ahqpj __l#Jk_GNjd_F_Fj_. +_HSkm=M74_1j_jjh_ q Ap_#j_JGlkNQ +SjM=k41_7_jjj_q hA_p jJ_#lNkG_ +j;sjRf:ljRNROEQRheblsHR.h_jH4_ +=Smhj_.4 +_HS=Qjhj_.4s; +R:fjjNRlOQERhbeRsRHlhj_.. +_HShm=_..j_SH +Qhj=_..j;R +sfjj:ROlNEhRQesRbHklRM_4dOMHH_jH__Hj_ +=Smhj_n +jSQ=nh_j;_j +fsRjR:jlENOReQhRHbsl_Rh._(cHm +S=.h_(Hc_ +jSQ=.h_( +c;sjRf:ljRNROEQRheblsHR#bF_ OD\M3kno_LN_O j_jjj__jHm +S=#bF_ OD\M3kno_LN_O j +jjS=Qjb_F#O\D 3nkM_NLoOj _jjj_;R +sfjj:ROlNEhRQesRbH)lRW__OHm +S=_)WO +_HS=Qj)OW_;R +sfjj:ROlNEhRQesRbHblRFO#_D3 \)jW_jQj_h6a__jj__SH +mF=b#D_O )\3Wj_jjh_Qa +_6S=Qjb_F#O\D 3_)Wj_jjQ_ha6;_j +fsRjR:jlENOReQhRHbsl_Rh4_nUHm +S=4h_nHU_ +jSQ=4h_n +U;sjRf:ljRNROEQRheblsHR4h_nH(_ +=Smhn_4( +_HS=Qjhn_4(s; +R:fjjNRlOQERhbeRsRHlh(_4j +_HShm=_j4(_SH +Qhj=_j4(;R +sfjj:ROlNEhRQesRbHhlR_g4n_SH +m_=h4_ngHQ +Sj_=h4;ng +fsRjR:jlENOReQhRHbsl1Rq_jjd__7jj__jj +_HShm=_ +dUS=QjhU_d_ +j;sjRf:ljRNROEQRheblsHR4kM__1vqtvQq__j#kJlG4N__4j__SH +mM=k4v_1_Qqvtjq__l#Jk_GN4Q +SjM=k4v_1_Qqvtjq__l#Jk_GN4;_j +fsRjR:jlENOReQhRHbslFRb#D_O k\3M_dcNj#_d8j_4__HH._F_SH +m_=h. +U.S=QjhU_..;_j +fsRjR:jlENOReQhRHbslpRBij_jj__7H9rd +=SmB_pij_jj7r_HdS9 +QBj=pji_j7j_r;d9 +fsRjR:jlENOReQhRHbslvR1_QqvtMq_#H#__jH__Fj_.r_HjS9 +m_=hgSn +Qhj=__gnjs; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_##s0H#__jj___F.H9rj +=Smh._4gQ +Sj_=h4_.gHs; +R:fjjNRlOQERhbeRsRHlh6_4_SH +m_=h4H6_ +jSQ=4h_6s; +R:fjjNRlOQERhbeRsRHlp_71j_jjQ_ha4 +_HShm=_ +.nS=Qjhn_._ +j;sjRf:ljRNROEQRheblsHR4h_. +_HShm=__4.HQ +Sj_=h4 +.;sjRf:ljRNROEQRheblsHR_)Wj_jjQ_ha4 +_HShm=_ +.US=QjhU_._ +j;sjRf:ljRNROEQRheblsHR4h_4 +_HShm=__44HQ +Sj_=h4 +4;sjRf:ljRNROEQRheblsHR_q1j_djj_jj1BYh_H4_ +=Smhg_. +jSQ=.h_g;_j +fsRjR:jlENOReQhRHbsl_Rh6 +_HShm=_H6_ +jSQ=6h_;R +sfjj:ROlNEhRQesRbHAlRtiqB_jjd_aQh_H4_ +=Smhj_d +jSQ=dh_j;_j +fsRjR:jlENOReQhRHbsl_RqOr_HjS9 +m_=qOr_HjS9 +Qqj=_jOr9s; +R:fjjNRlOQERhbeRsRHl1 QZ_HO_r +49S1m=Q_Z Or_H4S9 +Q1j=Q_Z O9r4;R +sfjj:ROlNEhRQesRbHhlR_d4n_SH +m_=h4_ndHQ +Sj_=h4;nd +fsRjR:jlENOReQhRHbslFRb#D_O k\3M_dcNj#_d8j_4__HH +_HShm=_c.c +jSQ=.h_cjc_;R +sfjj:ROlNEhRQesRbHhlR_c4n_SH +m_=h4_ncHQ +Sj_=h4;nc +fsRjR:jlENOReQhRHbsl_Rh4_n6Hm +S=4h_nH6_ +jSQ=4h_n +6;sjRf:ljRNROEQRheblsHR4kMjH_OHHM_ +=SmkjM4_HOHM +_HS=QjkjM4_HOHMs; +R:fjjNRlOQERhbeRsRHlhU_4j +_HShm=_j4U_SH +Qhj=_j4U;R +sfjj:ROlNEhRQesRbHhlR_..n_SH +m_=h._n.HQ +Sj_=h.;n. +fsRjR:jlENOReQhRHbslvRqQ_tqA_z17qqa_)7Q__HPj__jHm +S=QqvtAq_z71_q_aq7_Q)OQ +Sjv=qQ_tqA_z17qqa_)7Q_jO_;R +sfjj:ROlNEhRQesRbHtlR__ggHm +S=#bF_ OD\M3k.Q +SjF=b#D_O k\3MH._;R +sfjj:ROlNEhRQesRbHhlR_Hd_ +=Smh__dHQ +Sj_=hds; +R:fjjNRlOQERhbeRsRHl7j1_j7j_v4q__SH +m_=hdS. +Qhj=__d.js; +R:fjjNRlOQERhbeRsRHlh__cHm +S=ch__SH +Qhj=_ +c;sjRf:ljRNROEQRheblsHR_q1j_jj7_vq4 +_HShm=_ +d4S=Qjh4_d_ +j;sjRf:ljRNROEQRheblsHR4kM_0s#_H.___F.Hm +S=.h_.Sj +Qhj=_j.._ +H;sjRf:ljRNROEQRheblsHR_Atj_djO +_HSAm=td_jj__OHQ +Sjt=A_jjd_ +O;sjRf:ljRNROEQRheblsHR#bF_ OD\M3kgo_L_jjd_SH +mF=b#D_O k\3MLg_od_jjQ +SjF=b#D_O k\3MLg_od_jj;_j +fsRjR:jlENOReQhRHbsl_Rh4H(_ +=Smh(_4_SH +Qhj=_;4( +fsRjR:jlENOReQhRHbsl7Rz1j_jjh_Qa__4Hm +S=.h_cQ +Sj_=h.jc_;R +sfjj:ROlNEhRQesRbHhlR__4nHm +S=4h_n +_HS=Qjhn_4;R +sfjj:ROlNEhRQesRbHAlRtj_jj__4Hm +S=.h_6Q +Sj_=h.j6_;R +sfjj:ROlNEhRQesRbHblRFO#_D3 \Nj#_j8j_l_NnH__jj +_HShm=_6.j +jSQ=.h_jH6_;R +sfjj:ROlNEhRQesRbHhlR_j4c_SH +m_=h4_cjHQ +Sj_=h4;cj +fsRjR:jlENOReQhRHbslvRqQ_tq7H1_ +=SmqtvQq1_7_SH +Qqj=vqQt_;71 +fsRjR:jlENOReQhRHbsl_Rh4_ggHm +S=4h_gHg_ +jSQ=4h_g +g;sjRf:ljRNROEQRheblsHR4h_gHU_ +=Smhg_4U +_HS=Qjhg_4Us; +R:fjjNRlOQERhbeRsRHlQj_.Um +S=_)Wj_jjHQ +SjW=)_jjj_ +O;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z17qqa_)7Q__HPj__jNS. +m_=h. +n.S=QjABtqid_jjh_QaQ +S4W=)_jjj_ +H;sjRf:ljRNROEQRheblsHRBBYp7 _vHq_r +j9SBm=Y Bp_q7v_jHr9Q +SjY=BB_p 7rvqj +9;sjRf:ljRNROEq.h7RHbslFRb#D_O B\3Y Bp_q7v_j6__NH_.m +S=4h_gSU +QBj=Y Bp_q7v_jHr9Q +S4_=hn +U;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z17qqa_)7Q__HPj +_jSqm=vqQt_1Az_a7qqQ_7)__OjQ +Sj_=h4_UjHQ +S4_=h._n.Hs; +R:fjjNRlOQERhbeRsRHlABtqid_jjh_Qa +_HSAm=tiqB_jjd_aQh_SH +QAj=tiqB_jjd_aQh;R +sfjj:ROlNEhRQesRbHMlR _Xu1Buq +_HSMm= _Xu1Buq +_HS=QjMu X_q1uBO _;R +sfjj:ROlNEhRQesRbHQlR_(.j +=Smqj1_jHj_ +jSQ=_q1j_jjOs; +R:fjjNRlOQERhbeRsRHlk_M4NolHNk_L#M_CNCLD_IDF_SH +mM=k4l_NH_oNL_k#CLMNDDC_FHI_ +jSQ=4kM_HNloLN_kC#_MDNLCF_DIs; +R:fjjNRlOQERhbeRsRHlk4M._kVb__O#Hm +S=.kM4b_Vk#_O_SH +Qkj=M_.4V_bkO +#;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z1 Ahqp7 _vpq_mjW__NH_d__jNS. +m_=h4 +6jS=Qjqr_O4S9 +Qh4=_j.._ +H;sjRf:ljRNROEQRheblsHRHq_r +49Sqm=_4Hr9Q +Sj_=qO9r4;R +sfjj:ROlNEhRq7b.RsRHlqtvQqz_A1h_ q Ap_q7v_t]Q]__jHd_N_Nj_.m +S=4h_6S4 +Qqj=_4Hr9Q +S4_=h._.jHs; +R:fjjNRlOQERhbeRsRHlqj1_j7j_vHq_ +=Smqj1_j7j_vHq_ +jSQ=_q1j_jj7;vq +fsRjR:jlENOR7qh.sRbHklRMNd_#d_jjm +S=dkM__N#j +djS=Qjqj1_j7j_vHq_ +4SQ=_q1j_jjHs; +R:fjjNRlOQERhbeRsRHl7j1_j7j_vHq_ +=Sm7j1_j7j_vHq_ +jSQ=_71j_jj7;vq +fsRjR:jlENOR7qh.sRbHklRM8._#d_jjm +S=.kM__8#j +djS=Qjqj1_jHj_ +4SQ=_71j_jj7_vqHs; +R:fjjNRlOQERhbeRsRHl7j1_j7j_vjq_3Ss +m1=7_jjj_q7v_kj3MSd +Qqj=1j_jjv_7q__4#kJlG +N;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q7v_lj3 +=Sm7j1_j7j_vjq_34kM +jSQ=_71j_jj7 +vqS=Q4qj1_j7j_v4q__l#Jk;GN +fsRjR:jlENOR7qh.sRbH7lR1j_jjv_7q3_jMm +S=_71j_jj7_vqjM3kjQ Sj_=h. -n;sjRf:ljRNROEQRheblsHRpQu_jjd_H4_r -.9Shm=_ -.gS=Qjhg_._ -j;sjRf:ljRNROEQRheblsHROq__jHr9m -S=Oq__jHr9Q -Sj_=qO9rj;R -sfjj:ROlNEhRQesRbH1lRQ_Z Or_H4S9 -mQ=1ZO __4Hr9Q -SjQ=1ZO _r;49 -fsRjR:jlENOReQhRHbsl1R7_jjj_q hA_p jJ_#lNkG_H4_ -=Sm7j1_j j_hpqA __j#kJlG4N__SH -Q7j=1j_jjh_ q Ap_#j_JGlkN;_4 -fsRjR:jlENOReQhRHbslMRk41_7_jjj_q hA_p jJ_#lNkG_jH_ -=Smk_M47j1_j j_hpqA __j#kJlGSN -Qkj=M74_1j_jjh_ q Ap_#j_JGlkN;_H -fsRjR:jlENOReQhRHbsltRA_jjd_HO_ -=SmAjt_dOj__SH -QAj=td_jj;_O -fsRjR:jlENOReQhRHbslFRb#D_O k\3MLn_od_jj -_HSbm=FO#_D3 \k_MnLjo_dHj_ -jSQ=#bF_ OD\M3kno_L_jjd;R -sfjj:ROlNEhRQesRbHblRFO#_D3 \k_MgLjo_dHj_ -=Smb_F#O\D 3gkM__Loj -djS=Qjb_F#O\D 3gkM__Loj_djjs; -R:fjjNRlOQERhbeRsRHlz_71j_jjQ_haHm -S=1z7_jjj_aQh_SH -Qzj=7j1_jQj_h -a;sjRf:ljRNROEQRheblsHR4kM_1z7_jjj_aQh_SH -mM=k47_z1j_jjh_QaQ -SjM=k47_z1j_jjh_Qa;_j -fsRjR:jlENOReQhRHbsl7Rp1j_jjh_Qa -_HSpm=7j1_jQj_hHa_ -jSQ=1p7_jjj_aQh;R -sfjj:ROlNEhRq7b.RsRHlk_M4z_71j_jjQ -haSkm=Mz4_7j1_jQj_hja_ -jSQ=_71j_jj AhqpS -Qz4=7j1_jQj_hHa_;R -sfjj:ROlNEhRq7b.RsRHl7j1_j j_hpqA -_4Shm=_ -6cS=Qjh -_US=Q4)_1aOs; -R:fjjNRlOQERhbeRsRHlAjt_jjj_3Ss -mt=A_jjj_kj3MSd -Qbj=FO#_D3 \k_MgLjo_d -j;sjRf:ljRNROEq.h7RHbsltRA_jjj_lj3 -=SmAjt_jjj_34kM -jSQ=_Atj_djOQ -S4F=b#D_O k\3MLg_od_jjs; -R:fjjNRlOqERhR7.blsHR_Atj_jjj -3MSAm=tj_jj3_jk -MjS=QjAjt_jOj_ -4SQ=_Atj_jjjM3kds; -R:fjjNRlOmER)b.RsRHlAjt_jjj_3Sb -m_=h.Sd -QAj=tj_jj3_jk -M4S=Q4Ajt_jjj_3jkM;R +j6S=Q47j1_j7j_vjq_3dkM;R +sfjj:ROlNE)Rm.sRbH7lR1j_jjv_7q3_jbm +S=dh_ +jSQ=_71j_jj7_vqjM3k4Q +S41=7_jjj_q7v_kj3M +j;sjRf:ljRNROEQRheblsHR_q1j_jj7_vqj +3sSqm=1j_jjv_7q3_jk +MdS=Qjqj1_j7j_v4q__l#Jk;GN +fsRjR:jlENOR7qh.sRbHqlR1j_jjv_7q3_jlm +S=_q1j_jj7_vqjM3k4Q +Sj1=q_jjj_q7v +4SQ=_q1j_jj7_vq4J_#lNkG;R +sfjj:ROlNEhRq7b.RsRHlqj1_j7j_vjq_3SM +m1=q_jjj_q7v_kj3MSj +Qhj=_6.j +4SQ=_q1j_jj7_vqjM3kds; +R:fjjNRlOmER)b.RsRHlqj1_j7j_vjq_3Sb +m_=hcQ +Sj1=q_jjj_q7v_kj3MS4 +Qq4=1j_jjv_7q3_jk;Mj +fsRjR:jlENOR7qh.sRbHqlR1j_jjv_7q +_4Shm=__d4jQ +Sj_=hc +_HS=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHR_71j_jj7_vq4m +S=dh_. +_jS=Qjh__dHQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbHtlR_ +ggSbm=FO#_D3 \k_M.HQ +SjY=BB_p 7_vqH9rj +4SQ=BBYp7 _vHq_r;49 +fsRjR:jlENOReQhRHbslYRBB_p 7_vqH9r4 +=SmBpYB v_7qr_H4S9 +QBj=Y Bp_q7vr;49 +fsRjR:jlENOReQhRHbslpRBiX_ u +_HSBm=p i_XHu_ +jSQ=iBp_u X_ +O;sjRf:ljRNROEX.m)RHbsl_RtgS4 +mM=k4Y_BB_p 7rvq.S9 +QBj=Y Bp_q7vr +49S=Q4hg_4gs; +R:fjjNRlOqERhR7.blsHR1p7_jjj_aQh_S4 +m_=h.jn_ +jSQ=4h_6 +_HS=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHR_Atj_jj4m +S=.h_6 +_jS=Qjhn_4_SH +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHlz_71j_jjQ_ha4m +S=.h_c +_jS=Qjh(_4_SH +Q)4=1Oa_;R sfjj:ROlNEhRQesRbHzlR7j1_jQj_hja_3Ss m7=z1j_jjh_Qa3_jk MdS=Qj1qv_vqQtr;n9 @@ -2223,78 +2158,635 @@ S=1z7_jjj_aQh_kj3MSj Qzj=7j1_jQj_hSa Qz4=7j1_jQj_hja_3dkM;R sfjj:ROlNE)Rm.sRbHzlR7j1_jQj_hja_3Sb -m_=h.Sj +m_=h4S( Qzj=7j1_jQj_hja_34kM 4SQ=1z7_jjj_aQh_kj3M -j;sjRf:ljRNROEQRheblsHR1p7_jjj_aQh_sj3 -=Smp_71j_jjQ_hajM3kdQ -Sjv=1_Qqvtnqr9s; -R:fjjNRlOqERhR7.blsHR1p7_jjj_aQh_lj3 -=Smp_71j_jjQ_hajM3k4Q -SjF=b#D_O k\3M_4j#Nl_lNHo_SH -Q14=vv_qQrtqn -9;sjRf:ljRNROEq.h7RHbsl7Rp1j_jjh_Qa3_jMm -S=1p7_jjj_aQh_kj3MSj -Qpj=7j1_jQj_hSa -Qp4=7j1_jQj_hja_3dkM;R -sfjj:ROlNE)Rm.sRbHplR7j1_jQj_hja_3Sb -m_=h4Sd -Qpj=7j1_jQj_hja_34kM -4SQ=1p7_jjj_aQh_kj3M -j;sjRf:ljRNROEQRheblsHR_71j_jj Ahqpj _3Ss -m1=7_jjj_q hA_p jM3kdQ -Sj1=7_jjj_q hA_p 4J_#lNkG;R -sfjj:ROlNEhRq7b.RsRHl7j1_j j_hpqA 3_jlm -S=_71j_jj Ahqpj _34kM -jSQ=_71j_jj AhqpS -Q74=1j_jjh_ q Ap_#4_JGlkNs; -R:fjjNRlOqERhR7.blsHR_71j_jj Ahqpj _3SM -m1=7_jjj_q hA_p jM3kjQ -SjM=k41_7_jjj_q hA_p jJ_#lNkG -4SQ=_71j_jj Ahqpj _3dkM;R -sfjj:ROlNE)Rm.sRbH7lR1j_jjh_ q Ap_bj3 -=Smh -_US=Qj7j1_j j_hpqA 3_jk -M4S=Q47j1_j j_hpqA 3_jk;Mj -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MgLjo_dSj -mF=b#D_O k\3MLg_od_jj -_jS=QjAjt_dOj__SH -Qb4=FO#_D3 \k_MnLjo_dHj_;R -sfjj:ROlNEhRQesRbHklRMN4_lNHo_#Lk_NCML_DCD_FIHm -S=4kM_HNloLN_kC#_MDNLCF_DI -_HS=Qjk_M4NolHNk_L#M_CNCLD_IDF;R -sfjj:ROlNEhRQesRbHklRM_.4V_bkOH#_ -=Smk4M._kVb__O#HQ -SjM=k.V4_bOk_#s; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_dHr9m -S=_1vqtvQqr_HdS9 -Q1j=vv_qQrtqd -9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_NH_c9rd -=Smhn_4nQ +j;sjRf:ljRNROEQRheblsHR_Atj_jjj +3sSAm=tj_jj3_jk +MdS=Qjb_F#O\D 3gkM__Loj;dj +fsRjR:jlENOR7qh.sRbHAlRtj_jj3_jlm +S=_Atj_jjjM3k4Q +Sjt=A_jjd_SO +Qb4=FO#_D3 \k_MgLjo_d +j;sjRf:ljRNROEq.h7RHbsltRA_jjj_Mj3 +=SmAjt_jjj_3jkM +jSQ=_Atj_jjOQ +S4t=A_jjj_kj3M +d;sjRf:ljRNROEmR).blsHR_Atj_jjj +3bShm=_ +4nS=QjAjt_jjj_34kM +4SQ=_Atj_jjjM3kjs; +R:fjjNRlOQERhbeRsRHlp_71j_jjQ_haj +3sSpm=7j1_jQj_hja_3dkM +jSQ=_1vqtvQq9rn;R +sfjj:ROlNEhRq7b.RsRHlp_71j_jjQ_haj +3lSpm=7j1_jQj_hja_34kM +jSQ=#bF_ OD\M3k4#j_ll_NH_oNHQ +S4v=1_Qqvtnqr9s; +R:fjjNRlOqERhR7.blsHR1p7_jjj_aQh_Mj3 +=Smp_71j_jjQ_hajM3kjQ +Sj7=p1j_jjh_QaQ +S47=p1j_jjh_Qa3_jk;Md +fsRjR:jlENOR.m)RHbsl7Rp1j_jjh_Qa3_jbm +S=4h_6Q +Sj7=p1j_jjh_Qa3_jk +M4S=Q4p_71j_jjQ_hajM3kjs; +R:fjjNRlOQERhbeRsRHlqj1_d7j_43_jsm +S=_q1j_dj7j4_3dkM +jSQ=a)1_ +O;sjRf:ljRNROEq.h7RHbsl1Rq_jjd__74j +3lSqm=1d_jj4_7_kj3MS4 +Qqj=1d_jjj_7 +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbsl1Rq_jjd__74j +3MSqm=1d_jj4_7_kj3MSj +Qqj=1d_jj4_7 +4SQ=_q1j_dj7j4_3dkM;R +sfjj:ROlNE)Rm.sRbHqlR1d_jj4_7_bj3 +=Smhc_4 +jSQ=_q1j_dj7j4_34kM +4SQ=_q1j_dj7j4_3jkM;R +sfjj:ROlNEhRQesRbH)lRWj_jjh_Qa3_jsm +S=_)Wj_jjQ_hajM3kdQ +SjM=k4v_1_Qqvtjq__l#Jk_GN4s; +R:fjjNRlOqERhR7.blsHR_)Wj_jjQ_haj +3lS)m=Wj_jjh_Qa3_jk +M4S=Qjb_F#O\D 3_)Wj_jjQ_ha6Q +S4M=k4v_1_Qqvtjq__l#Jk_GN4s; +R:fjjNRlOqERhR7.blsHR_)Wj_jjQ_haj +3MS)m=Wj_jjh_Qa3_jk +MjS=Qj)jW_jQj_hSa +Q)4=Wj_jjh_Qa3_jk;Md +fsRjR:jlENOR.m)RHbslWR)_jjj_aQh_bj3 +=Smh._4 +jSQ=_)Wj_jjQ_hajM3k4Q +S4W=)_jjj_aQh_kj3M +j;sjRf:ljRNROEQRheblsHR_q1j_djj_jj1BYh_sj3 +=Smqj1_djj_j1j_Y_hBjM3kdQ +Sj_=h.;cc +fsRjR:jlENOR7qh.sRbHqlR1d_jjj_jjY_1hjB_3Sl +m1=q_jjd_jjj_h1YB3_jk +M4S=Qjqj1_dOj_ +4SQ=.h_c +c;sjRf:ljRNROEq.h7RHbsl1Rq_jjd_jjj_h1YB3_jMm +S=_q1j_djj_jj1BYh_kj3MSj +Qqj=1d_jjj_jjY_1hSB +Qq4=1d_jjj_jjY_1hjB_3dkM;R +sfjj:ROlNE)Rm.sRbHqlR1d_jjj_jjY_1hjB_3Sb +m_=h4S4 +Qqj=1d_jjj_jjY_1hjB_34kM +4SQ=_q1j_djj_jj1BYh_kj3M +j;sjRf:ljRNROEQRheblsHRqAtBji_dQj_hja_3Ss +mt=Aq_Bij_djQ_hajM3kdQ +SjF=b#D_O k\3MLn_o NO_jjj;R +sfjj:ROlNEhRq7b.RsRHlABtqid_jjh_Qa3_jlm +S=qAtBji_dQj_hja_34kM +jSQ=qAtBji_jOj_ +4SQ=#bF_ OD\M3kno_LN_O j;jj +fsRjR:jlENOR7qh.sRbHAlRtiqB_jjd_aQh_Mj3 +=SmABtqid_jjh_Qa3_jk +MjS=QjABtqid_jjh_QaQ +S4t=Aq_Bij_djQ_hajM3kds; +R:fjjNRlOmER)b.RsRHlABtqid_jjh_Qa3_jbm +S=6h_ +jSQ=qAtBji_dQj_hja_34kM +4SQ=qAtBji_dQj_hja_3jkM;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3gkM__Loj +djSbm=FO#_D3 \k_MgLjo_djj_ +jSQ=_Atj_djO +_HS=Q4hg_6;R +sfjj:ROlNEhRQesRbHqlRvqQt_1Az_q hA_p 7_vqp_mWHm +S=QqvtAq_z 1_hpqA v_7qm_pW +_HS=QjqtvQqz_A1h_ q Ap_q7v_Wpm;R +sfjj:ROlNEhRq7b.RsRHlk_M4NolHNk_L#M_CNCLD_IDF +=Smk_M4NolHNk_L#M_CNCLD_IDF +jSQ=QqvtAq_z 1_hpqA v_7qm_pW +_HS=Q4ABtqid_jjh_Qa;_H +fsRjR:jlENOR7qh.sRbHklRMs4_#.0__FH_.m +S=.h_.Hj_ +jSQ=qAtBji_dQj_hHa_ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbslWR)_jjj_q7v_Hj___Ndj._N +=Smh._4nQ +Sj_=h._.jHQ +S4W=)_jjj_ +H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__Nj_.9r6 +=SmhU_4nQ +Sj_=hgSd +Q14=vv_qQ_tqH9r6;R +sfjj:ROlNEhRQesRbH1lRvv_qQ_tqH9rj +=Sm1qv_vqQt_jHr9Q +Sjv=1_Qqvtjqr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jj._Nr +j9Shm=_44U +jSQ=4h_.Sg +Q14=vv_qQ_tqH9rj;R +sfjj:ROlNEhRq7b.RsRHlqj1_jQj_hja__jH___N.jm +S=4h_(Sj +Qhj=__gdHQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbHqlR1j_jjh_Qa__jH__jNS. +m_=h4 +ngS=Qjh(_46Q +S41=)a;_O +fsRjR:jlENOR7qh.sRbH7lR1iqB4h_Qa__jH__jNj._ +=Smhn_4UQ +Sj_=h4_.gHQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbH7lR1iqB4h_Qa__jH__jNS. +m_=h4 +n(S=Qjh4_.gQ +S41=)a;_O +fsRjR:jlENOReQhRHbslvRqQ_tqA_z1 Ahqp7 _v]q_Q_t]Hm +S=QqvtAq_z 1_hpqA v_7qQ_]tH]_ +jSQ=QqvtAq_z 1_hpqA v_7qQ_]t +];sjRf:ljRNROEq.h7RHbslMRk4N4_lNHo_#Lk_NCML_DCEEHo_jj__ +N.Shm=_c4n +jSQ=QqvtAq_z 1_hpqA v_7qQ_]tH]_ +4SQ=qAtBji_dQj_hHa_;R +sfjj:ROlNEhRQesRbHqlR_B7 m_7 Hnr49m +S=7q_ 7Bm r_H4 +n9S=Qjq _7B m7_4Orn +9;sjRf:ljRNROEQRheblsHR7q_ 7Bm r_H4 +g9Sqm=_B7 m_7 Hgr49Q +Sj_=q7m B7O _r94g;R +sfjj:ROlNEhRQesRbHqlR_B7 m_7 HUr49m +S=7q_ 7Bm r_H4 +U9S=Qjq _7B m7_4OrU +9;sjRf:ljRNROEq.h7RHbsltRAq_Bij_djQ_ha4m +S=dh_j +_jS=Qjh__6HQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbHqlR1d_jjj_jjY_1h4B_ +=Smhg_._Sj +Qhj=__44HQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbH)lRWj_jjh_Qa +_4Shm=__.UjQ +Sj_=h4H._ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbslMRk4N4_lNHo_#Lk_NCML_DCEEHo_jj_ +=Smk4M4_HNloLN_kC#_MDNLCH_EoHE_ +jSQ=4h_nHc_ +4SQ=4h_nH6_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkMc#_N_jjd__84H +_HShm=_c.c_Sj +Qqj=1d_jj +_HS=Q4hn_4d;_H +fsRjR:jlENOR7qh.sRbHqlRvqQt_1Az_q hA_p 7_vq]]Qt_#4_JGlkN__Hjm +S=nh_g +_HS=QjABtqid_jjh_QaQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbHklRM84_# NO4__jFjd_ +=Smk_M48O#N H4_ +jSQ=qAtBji_dQj_hSa +QM4= _Xu1Buq ;_O +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MnLOoN j_jj__jj._N +=Smh(_.cQ +Sj1=q_jjj_SO +Qh4=__nUHs; +R:fjjNRlOQERhbeRsRHl7B1qiQ4_hHa_ +=Sm7B1qiQ4_hHa_ +jSQ=q71B_i4Q;ha +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \7B1qiQ4_h4a__NH_.__jNS. +m_=h. +4gS=Qjqj1_dHj_ +4SQ=q71B_i4Q_haHs; +R:fjjNRlOQERhbeRsRHlQ4_.jm +S=_q1j_djHQ +Sj1=q_jjd_ +O;sjRf:ljRNROEQRheblsHR_q1j_jjQ_haHm +S=_q1j_jjQ_haHQ +Sj1=q_jjj_aQh;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3_q1j_jjQ_ha4__HNj.__ +N.Shm=_64( +jSQ=_q1j_jjQ_haHQ +S41=q_jjd_ +H;sjRf:ljRNROEQRheblsHR_1vqtvQq__HH9r( +=Sm1qv_vqQt_HH_r +(9S=Qj1qv_vqQt_(Hr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__HH__jj._Nr +j9Shm=_(.n +jSQ=gh_nQ +S4v=1_QqvtHq__(Hr9s; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_nHr9m +S=_1vqtvQqr_HnS9 +Q1j=vv_qQrtqn +9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__Nj_.9rn +=Smhn_.nQ Sj_=h4 -6(S=Q41qv_vqQt_dHr9s; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#Hc_Nr -.9Shm=_64n -jSQ=4h_nS4 +d.S=Q41qv_vqQt_nHr9s; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_6Hr9m +S=_1vqtvQqr_H6S9 +Q1j=vv_qQrtq6 +9;sjRf:ljRNROEQRheblsHRkOb_0C#_dHr9m +S=kOb_0C#_dHr9Q +Sjb=Ok#_C09rd;R +sfjj:ROlNEhRQesRbHqlR1d_jj4_7_SH +m1=q_jjd__74HQ +Sj1=q_jjd_;74 +fsRjR:jlENOReQhRHbsluRwz _1h_1 Hm +S=zwu_h1 1H _ +jSQ=zwu_h1 1O _;R +sfjj:ROlNEhRq7b.RsRHlk4M._sLCs__jNjd___N.4m +S=.kM4C_Ls4s_ +jSQ=_q1j_djHQ +S4t=Aq_Bij_jjOs; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jj._Fr +n9Shm=_.4d_Sj +Qhj=__gnjQ +S4v=1_QqvtHq__(Hr9s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\W3)_jjj_aQh_j6__Fj_.m +S=.h_cHn_ +jSQ=.h_nHU_ +4SQ=_1vqtvQqr_H( +9;sjRf:ljRNROEQRheblsHR_1vqtvQqr_H4S9 +mv=1_QqvtHq_r +49S=Qj1qv_vqQtr;49 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hj__jFj.r9m +S=4h_.Hg_ +jSQ=nh_U +_HS=Q41qv_vqQtr;49 +fsRjR:jlENOR7qh.sRbHklRM14_vv_qQ_tqjJ_#lNkG_j4__S4 +mM=k4v_1_Qqvtjq__l#Jk_GN4 +_jS=Qjhd_g +4SQ=.h_cHn_;R +sfjj:ROlNEhRq7b.RsRHlqj1_d7j_j__jj +_jShm=__dUjQ +Sj1=q_jjd_SH +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHlqj1_jQj_hja__jH_ +=SmhU_c_SH +Qhj=_g4n_SH +Qh4=_j4(_ +H;sjRf:ljRNROEq.h7RHbsl1R7q4Bi_aQh_Hj__Sj +m_=h._jnHQ +Sj_=h4_n(HQ +S4_=h4_nUHs; +R:fjjNRlOqERhR7.blsHR#bF_ OD\W3)_jjj_aQh_j6__Sj +mF=b#D_O )\3Wj_jjh_Qa__6jQ +Sj_=h._cnHQ +S4W=)_HO_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3nkM_NLoOj _jjj__Sj +mF=b#D_O k\3MLn_o NO_jjj_Sj +QAj=tiqB_jjj_SO +Qh4=_c.(_ +H;sjRf:ljRNROEq.h7RHbslMRk4Od_H_HMH__jjm +S=nh_j +_jS=QjMu X_q1uBH _ +4SQ=4kMjH_OHHM_;R +sfjj:ROlNEhRQesRbHBlRpji_j7j__jHr9m +S=iBp_jjj_H7_r +j9S=QjB_pij_jj79rj;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__jj__rF.4S9 +m_=h(H._ +jSQ=iBp_jjj_j7r9Q +S4p=Bij_jj__7H9r4;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0.__jj__jFd.r9m +S=Uh_j +_HS=QjO_bkCr#0dS9 +QO4=bCk_#H0_r;j9 +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MgO_D j_jjbjC__Fj_.m +S=Uh_. +_HS=QjO_bkC_#0H9r4 +4SQ=kOb_0C#_.Hr9s; +R:fjjNRlOqERhR7.blsHR4kM__1vqtvQq__j#kJlG4N__4j__ +F.Shm=__gdHQ +Sj_=h(H._ +4SQ=_1vqtvQq9rn;R +sfjj:ROlNEhRQesRbHOlRbCk_#H0_r +49SOm=bCk_#H0_r +49S=QjO_bkCr#04 +9;sjRf:ljRNROEq.h7RHbslbROk#_C0__.j__jj._Fr +.9Shm=__gUHQ +Sjb=Ok#_C09rj +4SQ=kOb_0C#r;49 +fsRjR:jlENOR7qh.sRbHklRM74_1j_jjh_ q Ap_#j_JGlkN__jFjd__ +F.Skm=M74_1j_jjh_ q Ap_#j_JGlkN +_jS=Qjhj_4(Q +S4_=h._jdHs; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_cHr9m +S=_1vqtvQqr_HcS9 +Q1j=vv_qQrtqc +9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__Fj_.9rd +=Smhj_4( +_HS=Qjh._(_SH +Q14=vv_qQrtqc +9;sjRf:ljRNROEq.h7RHbslFRb#D_O 1\3Q_Z 7_vqn__jj__jFj.r9m +S=4h_.HU_ +jSQ=1p7_jjj_HO_ +4SQ=1z7_jjj_HO_;R +sfjj:ROlNEhRQesRbH1lRvv_qQ_tqH9rd +=Sm1qv_vqQt_dHr9Q +Sjv=1_Qqvtdqr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jj._Fr +c9Shm=_64d_Sj +Qhj=__nUHQ +S4v=1_Qqvt6qr9s; +R:fjjNRlOQERhbeRsRHle_uq7 +_HSem=u7q__SH +Qej=u7q_;R +sfjj:ROlNEhRQesRbHOlRbCk_#H0_r +j9SOm=bCk_#H0_r +j9S=QjO_bkCr#0j +9;sjRf:ljRNROEq.h7RHbslbROk#_C0__.j__jNj._r +.9Shm=_U.j +jSQ=gh_U +_HS=Q4O_bkC_#0H9r.;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3gkM_ OD_jjj__bCj +_jSbm=FO#_D3 \k_MgO_D j_jjbjC_ +jSQ=4h_cHd_ +4SQ=4h_cHc_;R +sfjj:ROlNEhRq7b.RsRHlqtvQq1_7_jj__Sj +m_=hdj6_ +jSQ=4h_cH6_ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbsljRq_q7v_jj__Sj +m_=hdjn_ +jSQ=4h_cHn_ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbslbROk#_C0__.j__jj9r4 +=SmO_bkC_#0.r_j4S9 +Qhj=_(4c_SH +Qh4=_U4c_ +H;sjRf:ljRNROEq.h7RHbslbROk#_C0__.j__jj9r. +=SmO_bkC_#0.r_j.S9 +Qhj=_g4c_SH +Qh4=_U.j_ +H;sjRf:ljRNROEq.h7RHbslbROk#_C0__.j__jj9rd +=SmO_bkC_#0.r_jdS9 +Qhj=_ +UjS=Q4h6_4c;_H +fsRjR:jlENOR7qh.sRbHklRMC6__jj_ +=Smk_M6C +_jS=Qjh6_46 +_HS=Q4hn_4.;_H +fsRjR:jlENOR7qh.sRbH7lR1j_jjh_ q Ap_#4_JGlkN__Hjm +S=nh_d +_jS=Qjqj1_dHj_ +4SQ=4kM__71j_jj Ahqpj __l#Jk_GNjs; +R:fjjNRlOqERhR7.blsHR#bF_ OD\Q31Z7 _vnq__jj__jjr9m +S=#bF_ OD\Q31Z7 _vnq__jjr9Q +Sj_=h._6gHQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \1 QZ_q7v_jn__jj_r +49Sbm=FO#_D3 \1 QZ_q7v_jn_r +49S=Qjhn_.j +_HS=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHRkOb_0C#_jj__jjr9m +S=.h_jHj_ +jSQ=4h_gHj_ +4SQ=4h_gH4_;R +sfjj:ROlNEhRQesRbHqlR1d_jjj_7_SH +m1=q_jjd__7jHQ +Sj1=q_jjd_;7j +fsRjR:jlENOReQhRHbslpRBij_jj__7H9r4 +=SmB_pij_jj7r_H4S9 +QBj=pji_j7j_r;49 +fsRjR:jlENOR7qh.sRbHhlR_j4d_jH___F.H._F +=SmhU_n_SH +QBj=pji_j7j_r +49S=Q4B_pij_jj7r_Hj +9;sjRf:ljRNROEQRheblsHR_q1j_djj_jj1BYh_SH +m1=q_jjd_jjj_h1YB +_HS=Qjqj1_djj_j1j_Y;hB +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \1 QZ_q7v_jn__jj__rN.jS9 +m_=h. +6gS=QjABtqid_jjh_Qa +_HS=Q4h._4Us; +R:fjjNRlOqERhR7.blsHR#bF_ OD\Q31Z7 _vnq__jj__Nj_.9r4 +=Smhn_.jQ +Sjt=Aq_Bij_djQ_haHQ +S4_=h4_.UHs; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_.Hr9m +S=_1vqtvQqr_H.S9 +Q1j=vv_qQrtq. +9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__Nj_.9r. +=SmhU_4.Q +Sj_=h4 +dcS=Q41qv_vqQt_.Hr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jj._Nr +d9Shm=_d4U +jSQ=nh_U +_HS=Q4hd_44s; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jj._N_djr9m +S=4h_USc +Qhj=_(4j +4SQ=_1vqtvQqr_Hd +9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__Nj_.9rc +=SmhU_46Q +Sj_=h4 +d6S=Q41qv_vqQt_cHr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__HH__jj._N_jjr9m +S=.h_nSU +Qhj=__(.HQ +S4v=1_Qqvtjqr9s; +R:fjjNRlOqERhR7.blsHRkOb_0C#_jj__Nj_.9rj +=Smhg_4jQ +Sj_=hnSU +QO4=bCk_#H0_r;j9 +fsRjR:jlENOR7qh.sRbHOlRbCk_#j0__jj___N.j9rj +=Smhg_44Q +Sj_=hnHU_ +4SQ=kOb_0C#r;j9 +fsRjR:jlENOReQhRHbslaR7q_Bi7Hj_ +=Sm7Baqij_7_SH +Q7j=aiqB_;7j +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hj__jN.._r +d9Shm=_..j +jSQ=q7aB7i_j +_HS=Q4e_uq7s; +R:fjjNRlOqERhR7.blsHR4kM__71j_jj Ahqpj __l#Jk_GNjd_F_Nj_.m +S=.h_jSd +Qhj=__gdHQ +S4W=)_ +O;sjRf:ljRNROEQRheblsHRkOb_0C#_.Hr9m +S=kOb_0C#_.Hr9Q +Sjb=Ok#_C09r.;R +sfjj:ROlNEhRQesRbHQlR_c.4 +=Smqt]Q]r_H. +U9S=Qjqt]Q]r_O.;U9 +fsRjR:jlENOReQhRHbsl_RQ. +46Sqm=]]Qt_.HrgS9 +Qqj=]]Qt_.Org +9;sjRf:ljRNROEQRheblsHR.Q_4S. +m]=qQ_t]Hjrd9Q +Sj]=qQ_t]Ojrd9s; +R:fjjNRlOQERhbeRsRHlQ4_.dm +S=Qq]tH]_r9d4 +jSQ=Qq]tO]_r9d4;R +sfjj:ROlNEmRX)b.RsRHltj_46m +S=4h_US( +QQj=u7p_j9rj +4SQ=pQu_jOr9s; +R:fjjNRlOXERmR).blsHR4t_jSn +m_=h4 +UUS=QjQ_up74jr9Q +S4u=Qpr_O4 +9;sjRf:ljRNROEX.m)RHbsl_Rt4 +j(Shm=_g4U +jSQ=pQu_r7j.S9 +QQ4=uOp_r;.9 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hj__jN4.r9m +S=4h_cS4 +Qhj=_ +(.S=Q41qv_vqQtr;.9 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hj__jNj._r +49Shm=_.4c +jSQ=_1vqtvQqr_H4S9 Q14=vv_qQ_tqH9r.;R -sfjj:ROlNEhRQesRbH1lRvv_qQ_tqH9r. -=Sm1qv_vqQt_.Hr9Q -Sjv=1_Qqvt.qr9s; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_4Hr9m -S=_1vqtvQqr_H4S9 -Q1j=vv_qQrtq4 -9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_NH_c9r4 -=Smhn_4cQ -Sjv=1_QqvtHq_r -49S=Q41qv_vqQt_.Hr9s; -R:fjjNRlOqERhR7.blsHR4kM__71j_jj Ahqpj __l#Jk -GNSkm=M74_1j_jjh_ q Ap_#j_JGlkN -_HS=Qj7j1_j j_hpqA __j#kJlG4N__SH -Qh4=_(46;R -sfjj:ROlNEmRX)b.RsRHlt._4cm -S=.h_.Sn -QQj=u7p_j9r. -4SQ=pQu_.Or9s; +sfjj:ROlNEhRq7b.RsRHlqtvQq1_7_jj__Nj_.m +S=4h_cS6 +Qpj=7j1_jOj_ +4SQ=1z7_jjj_ +O;sjRf:ljRNROEq.h7RHbsljRq_q7v_jj__Nj_.m +S=4h_cSn +QAj=tiqB_jjd_aQh_SH +Qz4=7j1_jOj_;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0.__jj__jN4.r9m +S=4h_cS( +QOj=bCk_#40r9Q +S4b=Ok#_C0r_Hj +9;sjRf:ljRNROEq.h7RHbslbROk#_C0__.j__jj._Nr +.9Shm=_g4c +jSQ=gh_UQ +S4b=Ok#_C09r.;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0.__jj__jNd.r9m +S=4h_6Sc +Qhj=__gUHQ +S4b=Ok#_C09r.;R +sfjj:ROlNEhRq7b.RsRHlk_M6C__jj._N +=Smh6_46Q +Sj_=hUH._ +4SQ=kOb_0C#r;d9 +fsRjR:jlENOReQhRHbslpRBiz_ma)_u j_6_SH +mp=Biz_ma)_u j_6_SH +QBj=pmi_zua_)6 _js; +R:fjjNRlOQERhbeRsRHlhU_4( +_HShm=_(4U_SH +Qhj=_(4U;R +sfjj:ROlNEhRQesRbHhlR_U4U_SH +m_=h4_UUHQ +Sj_=h4;UU +fsRjR:jlENOReQhRHbsl_Rh4_UgHm +S=4h_UHg_ +jSQ=4h_U +g;sjRf:ljRNROEQRheblsHR.Q_4SU +m]=qQ_t]Hcr.9Q +Sj]=qQ_t]Ocr.9s; +R:fjjNRlOQERhbeRsRHlQ4_.gm +S=Qq]tH]_r9.6 +jSQ=Qq]tO]_r9.6;R +sfjj:ROlNEhRQesRbHQlR_n.4 +=Smqt]Q]r_H. +n9S=Qjqt]Q]r_O.;n9 +fsRjR:jlENOReQhRHbsl_RQ. +4(Sqm=]]Qt_.Hr(S9 +Qqj=]]Qt_.Or( +9;sjRf:ljRNROEQRheblsHR4h_.Hn_ +=Smh._4n +_HS=Qjh._4ns; +R:fjjNRlOQERhbeRsRHlh6_4j +_HShm=_j46_SH +Qhj=_j46;R +sfjj:ROlNEhRQesRbHhlR_446_SH +m_=h4_64HQ +Sj_=h4;64 +fsRjR:jlENOR7qh.sRbHQlRu7p_jr_j4S9 +m_=hcj._ +jSQ=pQu_HO_r +49S=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHRpQu__7jj9r. +=Smhd_c_Sj +QQj=uOp__.Hr9Q +S41=)a;_O +fsRjR:jlENOR7qh.sRbHQlRujp_d4j_r +j9Shm=__.4jQ +Sj_=h4HU_ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbsluRQpd_jjr_44S9 +m_=h.j._ +jSQ=4h_g +_HS=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHRpQu_jjd_.4r9m +S=.h_d +_jS=Qjhj_._SH +Q)4=1Oa_;R +sfjj:ROlNEhRQesRbHOlRbCk_#j0__34_sm +S=kOb_0C#_4j__M3kdQ +Sj_=hn +U;sjRf:ljRNROEq.h7RHbslbROk#_C0__j4l_3 +=SmO_bkC_#0j__434kM +jSQ=kOb_0C#r +49S=Q4hU_n;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0j__43SM +mb=Ok#_C0__j4k_3MSj +QOj=bCk_#.0_r +49S=Q4O_bkC_#0j__43dkM;R +sfjj:ROlNE)Rm.sRbHOlRbCk_#j0__34_bm +S=Uh_ +jSQ=kOb_0C#_4j__M3k4Q +S4b=Ok#_C0__j4k_3M +j;sjRf:ljRNROEQRheblsHRkOb_0C#_.j__ +3sSOm=bCk_#j0__3._k +MdS=QjhU_n;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0j__.3Sl +mb=Ok#_C0__j.k_3MS4 +QOj=bCk_#.0r9Q +S4_=hn +U;sjRf:ljRNROEq.h7RHbslbROk#_C0__j.M_3 +=SmO_bkC_#0j__.3jkM +jSQ=kOb_0C#_..r9Q +S4b=Ok#_C0__j.k_3M +d;sjRf:ljRNROEmR).blsHRkOb_0C#_.j__ +3bShm=_Sg +QOj=bCk_#j0__3._k +M4S=Q4O_bkC_#0j__.3jkM;R +sfjj:ROlNEhRQesRbHOlRbCk_#j0__3d_sm +S=kOb_0C#_dj__M3kdQ +Sj_=hn +U;sjRf:ljRNROEq.h7RHbslbROk#_C0__jdl_3 +=SmO_bkC_#0j__d34kM +jSQ=kOb_0C#r +d9S=Q4hU_n;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0j__d3SM +mb=Ok#_C0__jdk_3MSj +QOj=bCk_#.0_r +d9S=Q4O_bkC_#0j__d3dkM;R +sfjj:ROlNE)Rm.sRbHOlRbCk_#j0__3d_bm +S=4h_jQ +Sjb=Ok#_C0__jdk_3MS4 +QO4=bCk_#j0__3d_k;Mj +fsRjR:jlENOReQhRHbsluRQpd_jj__jjs_3 +=SmQ_upj_djj__j3dkM +jSQ=#bF_ OD\b3HDs; +R:fjjNRlOqERhR7.blsHRpQu_jjd_jj__ +3lSQm=ujp_djj__3j_k +M4S=QjQ_upO9rj +4SQ=#bF_ OD\b3HDs; +R:fjjNRlOqERhR7.blsHRpQu_jjd_jj__ +3MSQm=ujp_djj__3j_k +MjS=QjQ_upj_djO9rj +4SQ=pQu_jjd_jj__M3kds; +R:fjjNRlOmER)b.RsRHlQ_upj_djj__j3Sb +m_=h4SU +QQj=ujp_djj__3j_k +M4S=Q4Q_upj_djj__j3jkM;R +sfjj:ROlNEhRQesRbHQlRujp_djj__34_sm +S=pQu_jjd_4j__M3kdQ +SjF=b#D_O H\3b +D;sjRf:ljRNROEq.h7RHbsluRQpd_jj__j4l_3 +=SmQ_upj_djj__434kM +jSQ=pQu_4Or9Q +S4F=b#D_O H\3b +D;sjRf:ljRNROEq.h7RHbsluRQpd_jj__j4M_3 +=SmQ_upj_djj__43jkM +jSQ=pQu_jjd_4Or9Q +S4u=Qpd_jj__j4k_3M +d;sjRf:ljRNROEmR).blsHRpQu_jjd_4j__ +3bShm=_ +4gS=QjQ_upj_djj__434kM +4SQ=pQu_jjd_4j__M3kjs; R:fjjNRlOQERhbeRsRHlQ_upj_djj__.3Ss mu=Qpd_jj__j.k_3MSd Qbj=FO#_D3 \H;bD @@ -2307,1007 +2799,78 @@ S=pQu_jjd_.j__M3kjQ Sju=Qpd_jjr_O.S9 QQ4=ujp_djj__3._k;Md fsRjR:jlENOR.m)RHbsluRQpd_jj__j.b_3 -=Smhn_. +=Smhj_. jSQ=pQu_jjd_.j__M3k4Q S4u=Qpd_jj__j.k_3M -j;sjRf:ljRNROEq.h7RHbsluRQpd_jjr_4.S9 -m_=h.jg_ -jSQ=.h_n -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHRpQu__7jj9r. -=Smh4_6_Sj -QQj=uOp__.Hr9Q -S41=)a;_O -fsRjR:jlENOR7qh.sRbHplR7j1_jQj_h4a_ -=Smhj_c_Sj -Qhj=__4dHQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbHzlR7j1_jQj_h4a_ -=Smhd_d_Sj -Qhj=__.jHQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbHAlRtj_jj -_4Shm=__djjQ -Sj_=h.Hd_ +j;sjRf:ljRNROEQRheblsHRdkM__N#j_djHm +S=dkM__N#j_djHQ +SjM=kd#_N_jjd;R +sfjj:ROlNEhRQesRbHhlR_64(_SH +m_=h4_(6HQ +Sj_=h4;(6 +fsRjR:jlENOReQhRHbsl_Rh._4gHm +S=.h_4Hg_ +jSQ=.h_4 +g;sjRf:ljRNROEQRheblsHR.kM__8#j_djHm +S=.kM__8#j_djHQ +SjM=k.#_8_jjd;R +sfjj:ROlNEhRQesRbH7lR1j_jjh_ q Ap_sj3 +=Sm7j1_j j_hpqA 3_jk +MdS=Qjhd_n;R +sfjj:ROlNEhRq7b.RsRHl7j1_j j_hpqA 3_jlm +S=_71j_jj Ahqpj _34kM +jSQ=4kM__71j_jj Ahqpj __l#Jk +GNS=Q4hd_n;R +sfjj:ROlNEhRq7b.RsRHl7j1_j j_hpqA 3_jMm +S=_71j_jj Ahqpj _3jkM +jSQ=_71j_jj AhqpS +Q74=1j_jjh_ q Ap_kj3M +d;sjRf:ljRNROEmR).blsHR_71j_jj Ahqpj _3Sb +m_=hnQ +Sj1=7_jjj_q hA_p jM3k4Q +S41=7_jjj_q hA_p jM3kjs; +R:fjjNRlOQERhbeRsRHle_vqQ_haj +3sSem=vQq_hja_3dkM +jSQ=#bF_ OD\M3kgD_O j_jjC_b;R +sfjj:ROlNEhRq7b.RsRHle_vqQ_haj +3lSem=vQq_hja_34kM +jSQ=kOb_0C#_4Hr9Q +S4F=b#D_O k\3MOg_Dj _jbj_Cs; +R:fjjNRlOqERhR7.blsHRqev_aQh_Mj3 +=Sme_vqQ_hajM3kjQ +Sjv=eqh_QaQ +S4v=eqh_Qa3_jk;Md +fsRjR:jlENOR.m)RHbslvReqh_Qa3_jbm +S=4h_dQ +Sjv=eqh_Qa3_jk +M4S=Q4e_vqQ_hajM3kjs; +R:fjjNRlOqERhR7.blsHR_71j_jj Ahqp4 _ +=Smhn_c +jSQ=nh_ 4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbslMRk47_p1j_jjh_Qam +O;sjRf:ljRNROEq.h7RHbslMRk47_z1j_jjh_Qam +S=4kM_1z7_jjj_aQh_Sj +Q7j=1j_jjh_ q Ap +4SQ=1z7_jjj_aQh_ +H;sjRf:ljRNROEq.h7RHbslMRk47_p1j_jjh_Qam S=4kM_1p7_jjj_aQh_Sj Q7j=1j_jjh_ q Ap 4SQ=1p7_jjj_aQh_ -H;sjRf:ljRNROEq.h7RHbsl1Rq_jjj_aQh_Hj_ -=Smhn_.U -_HS=Qjh4_4U -_HS=Q4h4_4g;_H -fsRjR:jlENOReQhRHbslpRBij_jj__7H9rj -=SmB_pij_jj7r_HjS9 -QBj=pji_j7j_r;j9 -fsRjR:jlENOR7qh.sRbHBlRpji_juj_ __jFHd__ -F.Shm=__(UHQ -Sjp=Bij_jjr_7jS9 -QB4=pji_j7j__4Hr9s; -R:fjjNRlOqERhR7.blsHR4kM__1vqtvQq__j#kJlG4N__Fj_d__HFS. -m_=h(Hg_ -jSQ=(h_U -_HS=Q41qv_vqQtr;n9 -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__HFHc_r -49Shm=_c.n_SH -Qhj=_ -(US=Q4hj_4.;_H -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__HFndr9m -S=4h_nj._ -jSQ=Uh_6 -_HS=Q41qv_vqQt_HH_r;(9 -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__HF.dr9m -S=4h_nj4_ -jSQ=_1vqtvQq9rd -4SQ=#bF_ OD\M3kdO4_Dj _jMj_Cs; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_6Hr9m -S=_1vqtvQqr_H6S9 -Q1j=vv_qQrtq6 -9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_FH_d9rc -=Smhn_4j -_jS=Qjhn_(_SH -Q14=vv_qQrtq6 -9;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q hA_p jJ_#lNkG_Fj_dm -S=4h_6H(_ -jSQ=(h_U -_HS=Q41qv_vqQtr;c9 -fsRjR:jlENOReQhRHbslvR1_QqvtHq_r -n9S1m=vv_qQ_tqH9rn -jSQ=_1vqtvQq9rn;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__rNcnS9 -m_=h4 -(jS=Qjhn_4.Q -S4v=1_QqvtHq_r;n9 -fsRjR:jlENOReQhRHbslvR1_QqvtHq_r -c9S1m=vv_qQ_tqH9rc -jSQ=_1vqtvQq9rc;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__rNccS9 -m_=h4 -nUS=Qjhn_4jQ -S4v=1_QqvtHq_r;c9 -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__HNjc_r -d9Shm=_(4n -jSQ=(h_n -_HS=Q4b_F#O\D 3dkM4D_O j_jjC_M;R -sfjj:ROlNEhRq7b.RsRHlO_bkC_#0.__Hjd_Nr -d9Shm=_6.6 -jSQ=.h_6S4 -QO4=bCk_#.0r9s; -R:fjjNRlOQERhbeRsRHlO_bkC_#0H9r. -=SmO_bkC_#0H9r. -jSQ=kOb_0C#r;.9 -fsRjR:jlENOR7qh.sRbHklRMC6__NH_d -_jShm=_ -4nS=QjO_bkCr#04S9 -QO4=bCk_#H0_r;.9 -fsRjR:jlENOR7qh.sRbHklRMC6__NH_dm -S=.h_6Sc -Qhj=_..6 -4SQ=kOb_0C#r;.9 -fsRjR:jlENOR)Xm.sRbHOlRbCk_#j0_r -j9Shm=_6.c -jSQ=(h_nQ -S4b=Ok#_C09rj;R -sfjj:ROlNEhRQesRbHQlR_j.. -=Smqj1_dHj_ -jSQ=_q1j_djOs; -R:fjjNRlOqERhR7.blsHR_71j_jj Ahqp4 __l#Jk -GNS7m=1j_jjh_ q Ap_#4_JGlkNQ -Sj1=q_jjd_SH -Qk4=M74_1j_jjh_ q Ap_#j_JGlkN;_H -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__HFHc__rN.4S9 -m_=h4 -j.S=Qjhn_( -4SQ=_1vqtvQqr_H. -9;sjRf:ljRNROEQRheblsHR_1vqtvQq__HH9r( -=Sm1qv_vqQt_HH_r -(9S=Qj1qv_vqQt_(Hr9s; -R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__HH__jNj.r9m -S=4h_jSd -Qhj=_ -U6S=Q41qv_vqQt_HH_r;(9 -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqM_##H__Hj._N_jjr9m -S=4h_jSc -Qhj=__(UHQ -S4v=1_Qqvtjqr9s; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jN6.r9m -S=4h_jS6 -Qhj=_ -(gS=Q41qv_vqQt_6Hr9s; -R:fjjNRlOQERhbeRsRHlqj1_jQj_hHa_ -=Smqj1_jQj_hHa_ -jSQ=_q1j_jjQ;ha -fsRjR:jlENOR7qh.sRbHqlR1j_jjh_Qa__jH._N -=Smh4_4UQ -Sj1=q_jjj_aQh_SH -Qh4=_c.(;R -sfjj:ROlNEhRq7b.RsRHlqj1_jQj_hja__NH_. -_jShm=_g44 -jSQ=(h_g -_HS=Q4)_1aOs; -R:fjjNRlOQERhbeRsRHle_uq7 -_HSem=u7q__SH -Qej=u7q_;R -sfjj:ROlNEhRQesRbHBlRpji_j7j__4Hr9m -S=iBp_jjj_H7_r -49S=QjB_pij_jj79r4;R -sfjj:ROlNEhRq7b.RsRHlB_pij_jjhj ___FdH._F -=Smhn_(_SH -QBj=pji_j7j_r -49S=Q4B_pij_jj7r_Hj -9;sjRf:ljRNROEq.h7RHbslMRk6__CH._F -=Smh6_.. -_jS=QjO_bkCr#04S9 -QO4=bCk_#H0_r;d9 -fsRjR:jlENOReQhRHbslbROk#_C0r_H4S9 -mb=Ok#_C0r_H4S9 -QOj=bCk_#40r9s; -R:fjjNRlOqERhR7.blsHRkOb_0C#_H.__Fj_.9rd -=Smh6_.4 -_HS=QjO_bkCr#0jS9 -QO4=bCk_#40r9s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kgD_O j_jjC_b_Sj -mF=b#D_O k\3MOg_Dj _jbj_C -_jS=Qjhn_.4 -_HS=Q4hn_..;_H -fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__jj_r -49SOm=bCk_#.0__4jr9Q -Sj_=h._6UHQ -S4_=h._6gHs; -R:fjjNRlOqERhR7.blsHRkOb_0C#_j.__.jr9m -S=kOb_0C#_j._r -.9S=Qjh6_.6 -_HS=Q4h6_.(;_H -fsRjR:jlENOReQhRHbslbROk#_C0r_HdS9 -mb=Ok#_C0r_HdS9 -QOj=bCk_#d0r9s; -R:fjjNRlOqERhR7.blsHR6kM_HC__ -N.Shm=_d.n -jSQ=kOb_0C#_.Hr9Q -S4b=Ok#_C0r_Hd -9;sjRf:ljRNROEQRheblsHRkOb_0C#_jHr9m -S=kOb_0C#_jHr9Q -Sjb=Ok#_C09rj;R -sfjj:ROlNEhRq7b.RsRHlO_bkC_#0.__jjd_Nr -49Shm=_U.6 -jSQ=kOb_0C#r -49S=Q4O_bkC_#0H9rj;R -sfjj:ROlNEhRq7b.RsRHlO_bkC_#0.__jjd_Nr -.9Shm=_(.6 -jSQ=.h_6H4_ -4SQ=kOb_0C#_.Hr9s; -R:fjjNRlOqERhR7.blsHRkOb_0C#_H.__Nj_dr_jdS9 -m_=h. -6nS=QjO_bkCr#0jS9 -QO4=bCk_#H0_r;.9 -fsRjR:jlENOReQhRHbsl1R)ap_7Yr_H4S9 -m1=)ap_7Yr_H4S9 -Q)j=17a_p4Yr9s; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__C4H._N_Sj -m_=h4 -4dS=Qjhn_( -4SQ=a)1_Y7p_4Hr9s; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__C4H._N -=Smh4_4.Q -Sj_=h(H(_ -4SQ=4h_d -c;sjRf:ljRNROEQRheblsHRa)1_Y7p_.Hr9m -S=a)1_Y7p_.Hr9Q -Sj1=)ap_7Y9r.;R -sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH.___N..m -S=4h_4S4 -Qhj=_ -(nS=Q4)_1a7_pYH9r.;R -sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH.___N.jm -S=4h_jSg -Qhj=_(4d -4SQ=.h_n.6_;R -sfjj:ROlNEhRQesRbH1lRvv_qQ_tqH9rj -=Sm1qv_vqQt_jHr9Q -Sjv=1_Qqvtjqr9s; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jNj.r9m -S=4h_jS4 -Qhj=_ -U(S=Q41qv_vqQt_jHr9s; -R:fjjNRlOQERhbeRsRHle_vqQ_haHm -S=qev_aQh_SH -Qej=vQq_h -a;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_d4O_D j_jjMSC -mF=b#D_O k\3M_d4O_D j_jjMHC_ -jSQ=)A ) -_OS=Q4hU_g_ -H;sjRf:ljRNROEQRheblsHRqev_aQh_sj3 -=Sme_vqQ_hajM3kdQ -SjF=b#D_O k\3MOg_Dj _jbj_Cs; -R:fjjNRlOqERhR7.blsHRqev_aQh_lj3 -=Sme_vqQ_hajM3k4Q -Sjb=Ok#_C0r_H4S9 -Qb4=FO#_D3 \k_MgO_D j_jjb -C;sjRf:ljRNROEq.h7RHbslvReqh_Qa3_jMm -S=qev_aQh_kj3MSj -Qej=vQq_hSa -Qe4=vQq_hja_3dkM;R -sfjj:ROlNE)Rm.sRbHelRvQq_hja_3Sb -m_=h4S( -Qej=vQq_hja_34kM -4SQ=qev_aQh_kj3M -j;sjRf:ljRNROEq.h7RHbslvReqh_Qa -_4Shm=__dnjQ -Sj_=h4H(_ +H;sjRf:ljRNROEq.h7RHbslvReqh_Qa +_4Shm=__.(jQ +Sj_=h4Hd_ 4SQ=a)1_ -O;sjRf:ljRNROEQRheblsHRkOb_0C#_4j__ -3sSOm=bCk_#j0__34_k -MdS=Qjhn_(;R -sfjj:ROlNEhRq7b.RsRHlO_bkC_#0j__43Sl -mb=Ok#_C0__j4k_3MS4 -QOj=bCk_#40r9Q -S4_=h( -n;sjRf:ljRNROEq.h7RHbslbROk#_C0__j4M_3 -=SmO_bkC_#0j__43jkM -jSQ=kOb_0C#_4.r9Q -S4b=Ok#_C0__j4k_3M -d;sjRf:ljRNROEmR).blsHRkOb_0C#_4j__ -3bShm=_ -4jS=QjO_bkC_#0j__434kM -4SQ=kOb_0C#_4j__M3kjs; -R:fjjNRlOQERhbeRsRHlO_bkC_#0j__.3Ss -mb=Ok#_C0__j.k_3MSd -Qhj=_;(n -fsRjR:jlENOR7qh.sRbHOlRbCk_#j0__3._lm -S=kOb_0C#_.j__M3k4Q -Sjb=Ok#_C09r. -4SQ=(h_ns; -R:fjjNRlOqERhR7.blsHRkOb_0C#_.j__ -3MSOm=bCk_#j0__3._k -MjS=QjO_bkC_#0.9r. -4SQ=kOb_0C#_.j__M3kds; -R:fjjNRlOmER)b.RsRHlO_bkC_#0j__.3Sb -m_=h4S4 -QOj=bCk_#j0__3._k -M4S=Q4O_bkC_#0j__.3jkM;R -sfjj:ROlNEhRQesRbHOlRbCk_#j0__3d_sm -S=kOb_0C#_dj__M3kdQ -Sj_=h( -n;sjRf:ljRNROEq.h7RHbslbROk#_C0__jdl_3 -=SmO_bkC_#0j__d34kM -jSQ=kOb_0C#r -d9S=Q4hn_(;R -sfjj:ROlNEhRq7b.RsRHlO_bkC_#0j__d3SM -mb=Ok#_C0__jdk_3MSj -Qhj=_g4U_SH -QO4=bCk_#j0__3d_k;Md -fsRjR:jlENOR.m)RHbslbROk#_C0__jdb_3 -=Smh._4 -jSQ=kOb_0C#_dj__M3k4Q -S4b=Ok#_C0__jdk_3M -j;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y._C_FH_. -_jShm=__((HQ -Sj1=)ap_7Y9rj -4SQ=a)1_Y7pr;49 -fsRjR:jlENOR7qh.sRbH)lR17a_pCY_.__HFS. -m_=h._(jjQ -Sj_=h4_dcHQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbH)lR a1 _amz_j._ -=Smhd_6_Sj -Qhj=_c4._SH -Qh4=_64._ -H;sjRf:ljRNROEq.h7RHbsl1R7q4Bi_aQh_Hj_ -=Smhn_.g -_HS=Qjh._4j -_HS=Q4h._44;_H -fsRjR:jlENOR7qh.sRbH)lR a1 _amz_#4_JGlkN__Hjd_4. -_jShm=_U.._SH -Qhj=_(4d_jH_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbsl1Rq_jjd__7jj__HNS. -m_=h. -(cS=Qjqj1_dHj_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbsl R)1_ am_za4J_#lNkG_jH__.4d_Nj_.m -S=4h_dS( -Qhj=__((HQ -S41=)ap_7Y9r.;R -sfjj:ROlNEhRQesRbHhlR_(4d_SH -m_=h4_d(H -_jS=Qjhd_4(s; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__C.H._N_Sd -m_=h4 -dcS=Qjhn_(_SH -Qh4=_(4d_jH_;R -sfjj:ROlNEhRq7b.RsRHl) 1az_ma__.j._N -=Smh._4cQ -Sj =)1_ am -zaS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHRq71B_i4Q_haj__HNj._ -=Smh._44Q -Sj_=hUH(_ -4SQ=a)1_ -O;sjRf:ljRNROEQRheblsHRq71B_i4Q_haHm -S=q71B_i4Q_haHQ -Sj1=7q4Bi_aQh;R -sfjj:ROlNEhRq7b.RsRHl7B1qiQ4_hja__NH_.m -S=4h_.Sj -Q7j=1iqB4h_Qa -_HS=Q4h(_.cs; -R:fjjNRlOQERhbeRsRHl)_1a7_pYH9rj -=Sm)_1a7_pYH9rj -jSQ=a)1_Y7pr;j9 -fsRjR:jlENOR7qh.sRbH)lR17a_pCY_j__HNS. -m_=h4 -46S=Qjh(_.jQ -S41=)ap_7Y9rj;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3nkM_NLoOj _jSj -mF=b#D_O k\3MLn_o NO_jjj_Sj -QAj=tiqB_jjj_SO -Qb4=FO#_D3 \k_McLOoN j_jj;_H -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_McLOoN j_jjm -S=#bF_ OD\M3kco_LN_O j -jjS=Qjqj1_jOj_ -4SQ=(h_n;_H -fsRjR:jlENOR7qh.sRbHklRMNd_EEHo -=Smk_MdNoEHE -_HS=Qjh(_.nQ -S4 =)1_ aOs; +O;sjRf:ljRNROEq.h7RHbsluReq__7jm +S=ch_c +_jS=Qj)_1aOQ +S4u=eq__OHs; R:fjjNRlOqERhR7.blsHRq7aB7i_j -_jShm=__cUjQ +_jShm=__c6jQ Sja=7q_BiO _HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHRqeu_j7_ -=Smh._6_Sj -Q)j=1Oa_ -4SQ=qeu_HO_;R -sfjj:ROlNEhRq7b.RsRHlk_M4Nj#_jjj_ -=Smk_M4Nj#_jHj_ -jSQ=qAtBji_dQj_hSa -Q)4= a1 _amz;R -sfjj:ROlNEhRQesRbHMlR _Xu1Buq -_HSMm= _Xu1Buq -_HS=QjMu X_q1uBO _;R -sfjj:ROlNEhRq7b.RsRHlk_M.Nj#_dHj__ -N.Shm=_n.( -jSQ=qAtBji_dQj_hHa_ -4SQ=XM uu_1q_B Hs; -R:fjjNRlOQERhbeRsRHlABtqid_jjh_Qa -_HSAm=tiqB_jjd_aQh_SH -QAj=tiqB_jjd_aQh;R -sfjj:ROlNEhRq7b.RsRHlk_M4sHI__ -N.Shm=_d4d -jSQ=qAtBji_dQj_hHa_ -4SQ=1) ma_z -a;sjRf:ljRNROEq.h7RHbslMRkc#_N_jjd_NH_.m -S=4h_dS. -Qhj=_n.( -4SQ=1) ma_z -a;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y._C_.H_ -=Smhn_.6__.jQ -Sj_=h4_44HQ -S41=)a;_O -fsRjR:jlENOReQhRHbslaR7q_Bi7Hj_ -=Sm7Baqij_7_SH -Q7j=aiqB_;7j -fsRjR:jlENOReQhRHbslFRb#D_O k\3M_d4O_D j_jjM4C__lH_. -3sSbm=FO#_D3 \k4Md_ OD_jjj__MC4__Hlk.3MSd -Qej=u7q_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkM4D_O j_jjC_M_H4__3l.lm -S=#bF_ OD\M3kdO4_Dj _jMj_C__4H._l34kM -jSQ=q7aB7i_j -_HS=Q4e_uq7s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdO4_Dj _jMj_C__4H._l3SM -mF=b#D_O k\3M_d4O_D j_jjM4C__lH_.M3kjQ -SjF=b#D_O k\3M_.gO_D j_jjM4C_ -4SQ=#bF_ OD\M3kdO4_Dj _jMj_C__4H._l3dkM;R -sfjj:ROlNE)Rm.sRbHblRFO#_D3 \k4Md_ OD_jjj__MC4__Hlb.3 -=SmhU_g -jSQ=#bF_ OD\M3kdO4_Dj _jMj_C__4H._l34kM -4SQ=#bF_ OD\M3kdO4_Dj _jMj_C__4H._l3jkM;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__Fj_.9rj -=Smh(_U_SH -Qhj=__(nHQ -S4v=1_Qqvt4qr9s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\p3Bid_jj _u_4c_ -=Smb_F#O\D 3iBp_jjd__u c9r4 -jSQ=4kM_iBp_jjd__u 49r. -4SQ=4kM_0s#_ -d;sjRf:ljRNROEq.h7RHbslMRk4#_s0__.4m -S=4kM_0s#_4._ -jSQ=qAtBji_dQj_hHa_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbslMRk4#_s0 -_.Skm=Ms4_#.0_ -jSQ=_q1j_jjHQ -S4M=k4#_s0__.4s; -R:fjjNRlOQERhbeRsRHlqtvQq1_7_SH -mv=qQ_tq7H1_ -jSQ=Qqvt7q_1s; -R:fjjNRlOQERhbeRsRHlQ._.dm -S=_q1j_jjHQ -Sj1=q_jjj_ -O;sjRf:ljRNROEQRheblsHR#bF_ OD\M3kcI_s_jjj_SH -mF=b#D_O k\3Msc_Ij_jj -_HS=Qjb_F#O\D 3ckM__sIj;jj -fsRjR:jlENOReQhRHbsl1R7_jjj_q7v_#j_JGlkN -_HS7m=1j_jjv_7q__j#kJlGHN_ -jSQ=_71j_jj7_vqjJ_#lNkG;R -sfjj:ROlNEhRQesRbHQlR_... -=Sm)jW_jHj_ -jSQ=_)Wj_jjOs; -R:fjjNRlOQERhbeRsRHlB_pij_djuH _r -49SBm=pji_duj_ r_H4S9 -QBj=pji_duj_ 9r4;R -sfjj:ROlNEhRQesRbHqlR1j_jjv_7q -_HSqm=1j_jjv_7q -_HS=Qjqj1_j7j_v -q;sjRf:ljRNROEX.m)RHbsl_RtgS6 -mM=k4Y_BB_p 7rvq4S9 -QBj=Y Bp_q7vr -j9S=Q4b_F#O\D 34kMdo_LN_O j_djH;M0 -fsRjR:jlENOR)Xm.sRbHtlR_44j -=Smk_M4B_pij_dju4 _r -49S=QjB_pij_djuj r9Q -S4F=b#D_O k\3M_4dO_D F_k0H;M0 -fsRjR:jlENOR)Xm.sRbHtlR_d4j -=Smk_M4B_pij_dju4 _r -.9S=QjB_pij_dju4 r9Q -S4_=h.;j6 -fsRjR:jlENOReQhRHbsltRAq_Bij_djQ_haj -3sSAm=tiqB_jjd_aQh_kj3MSd -Qbj=FO#_D3 \k_MnLOoN j_jjs; -R:fjjNRlOqERhR7.blsHRqAtBji_dQj_hja_3Sl -mt=Aq_Bij_djQ_hajM3k4Q -Sjt=Aq_Bij_jjOQ -S4F=b#D_O k\3MLn_o NO_jjj;R -sfjj:ROlNEhRq7b.RsRHlABtqid_jjh_Qa3_jMm -S=qAtBji_dQj_hja_3jkM -jSQ=qAtBji_dQj_hSa -QA4=tiqB_jjd_aQh_kj3M -d;sjRf:ljRNROEmR).blsHRqAtBji_dQj_hja_3Sb -m_=h(Q -Sjt=Aq_Bij_djQ_hajM3k4Q -S4t=Aq_Bij_djQ_hajM3kjs; -R:fjjNRlOqERhR7.blsHRqAtBji_dQj_h4a_ +R:fjjNRlOqERhR7.blsHRpQu__7jj9rj =Smh4_c_Sj -Qhj=_H(_ -4SQ=a)1_ -O;sjRf:ljRNROEQRheblsHRBBYp7 _vHq_r -j9SBm=Y Bp_q7v_jHr9Q -SjY=BB_p 7rvqj -9;sjRf:ljRNROEQRheblsHRBBYp7 _vHq_r -49SBm=Y Bp_q7v_4Hr9Q -SjY=BB_p 7rvq4 -9;sjRf:ljRNROEq.h7RHbsl_Rt4 -44Sbm=FO#_D3 \k6M4_NLoOj _dHj_MH0_ -jSQ=BBYp7 _vjqr9Q -S4Y=BB_p 7rvq4 -9;sjRf:ljRNROEq.h7RHbsl_Rt4 -4nSbm=FO#_D3 \k_MdjQ -SjY=BB_p 7_vqH9rj -4SQ=BBYp7 _vHq_r;49 -fsRjR:jlENOR7qh.sRbHtlR_44. -=Smb_F#O\D 34kM.D_O k_F0M_H0 -_jS=QjB_pij_djuj r9Q -S4p=Bid_jj _ur;49 -fsRjR:jlENOR)Xm.sRbHtlR_ -g(Skm=MB4_Y Bp_q7vr -.9S=QjBpYB v_7q9r4 -4SQ=4h_g -g;sjRf:ljRNROEq.h7RHbslMRk(#_N_jjd -=Smk_M(Nj#_dSj -Qqj=1j_jjv_7q -_HS=Q4qj1_jHj_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 34kMdo_LN_O j_djH -M0Sbm=FO#_D3 \kdM4_NLoOj _dHj_MS0 -Qhj=__(nHQ -S4F=b#D_O k\3M_46LOoN d_jjM_H0s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k4o_LN_O j_djH -M0Sbm=FO#_D3 \k_M4LOoN d_jjM_H0 -_jS=Qj)jW_jHj_ -4SQ=#bF_ OD\M3k4L6_o NO_jjd_0HM_ -H;sjRf:ljRNROEQRheblsHR#bF_ OD\M3kdD_O k_F0M_H0 -_HSbm=FO#_D3 \k_MdO_D F_k0H_M0HQ -SjF=b#D_O k\3MOd_DF _kH0_M -0;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q7v_#j_JGlkNm -S=_71j_jj7_vqjJ_#lNkG -jSQ=_)Wj_jjOQ -S4F=b#D_O k\3MOd_DF _kH0_MH0_;R -sfjj:ROlNEhRq7b.RsRHlk_M4s_#0dm -S=4kM_0s#_Sd -Q)j=1Oa_ -4SQ=#bF_ OD\#3N_jjj_N8lns; -R:fjjNRlOqERhR7.blsHR_q1j_jj7_vq4J_#lNkG -=Smqj1_j7j_v4q__l#Jk -GNS=Qjb_F#O\D 3_N#j_jj8nlN -4SQ=#bF_ OD\M3kdD_O k_F0M_H0s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\Y3BB_p 7_vq6 -_jSbm=FO#_D3 \BpYB v_7qr_6jS9 -Qkj=MB4_Y Bp_q7vr -49S=Q4k_M4s_#0.s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\p3Bid_jj _u_jc_ -=Smb_F#O\D 3iBp_jjd__u c9rj -jSQ=4kM_iBp_jjd__u 49r4 -4SQ=4kM_0s#_ -d;sjRf:ljRNROEq.h7RHbslMRk4l_NH_oNL_k#CLMNDDC_FSI -mM=k4l_NH_oNL_k#CLMNDDC_FSI -Qqj=vqQt_1Az_q hA_p 7_vqp_mWHQ -S4t=Aq_Bij_djQ_haHs; -R:fjjNRlOqERhR7.blsHRQqvtAq_z71_q_aq7_Q)HSP -mv=qQ_tqA_z17qqa_)7Q_jO_ -jSQ=nkM_HNloLN_k8#_N_0N8_HsHQ -S4M=k4N._lNHo_#Lk_08NNH_8s__lHs; -R:fjjNRlOqERhR7.blsHR4kM.l_NH_oNL_k#8NN0_s8H_Sl -mM=k4N._lNHo_#Lk_08NNH_8s -_lS=QjABtqid_jjh_QaQ -S4W=)_jjj_ -H;sjRf:ljRNROEQRheblsHRiBp_u X_SH -mp=BiX_ u -_HS=QjB_pi _XuOs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdD_O k_F0M_H0m -S=#bF_ OD\M3kdD_O k_F0M_H0Q -Sjp=BiX_ u -_HS=Q4B_pim_zau_) 7s; -R:fjjNRlOQERhbeRsRHl7j1_j7j_vHq_ -=Sm7j1_j7j_vHq_ -jSQ=_71j_jj7;vq -fsRjR:jlENOR7qh.sRbHklRM8n_#d_jjm -S=nkM__8#j -djS=Qjqj1_jHj_ -4SQ=_71j_jj7_vqHs; -R:fjjNRlOQERhbeRsRHl7j1_j7j_vjq_3Ss -m1=7_jjj_q7v_kj3MSd -Q7j=1j_jjv_7q__4#kJlG -N;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q7v_lj3 -=Sm7j1_j7j_vjq_34kM -jSQ=_71j_jj7 -vqS=Q47j1_j7j_v4q__l#Jk;GN -fsRjR:jlENOR7qh.sRbH7lR1j_jjv_7q3_jMm -S=_71j_jj7_vqjM3kjQ -SjF=b#D_O N\3#j_jjl_8NHn_ -4SQ=_71j_jj7_vqjM3kds; -R:fjjNRlOmER)b.RsRHl7j1_j7j_vjq_3Sb -m_=hdQ -Sj1=7_jjj_q7v_kj3MS4 -Q74=1j_jjv_7q3_jk;Mj -fsRjR:jlENOReQhRHbslFRb#D_O N\3#j_jjl_8NHn_ -=Smb_F#O\D 3_N#j_jj8nlN_SH -Qbj=FO#_D3 \Nj#_j8j_l;Nn -fsRjR:jlENOReQhRHbsl1Rq_jjj_q7v_sj3 -=Smqj1_j7j_vjq_3dkM -jSQ=_q1j_jj7_vq4J_#lNkG;R -sfjj:ROlNEhRq7b.RsRHlqj1_j7j_vjq_3Sl -m1=q_jjj_q7v_kj3MS4 -Qqj=1j_jjv_7qQ -S41=q_jjj_q7v_#4_JGlkNs; -R:fjjNRlOqERhR7.blsHR_q1j_jj7_vqj -3MSqm=1j_jjv_7q3_jk -MjS=Qjb_F#O\D 3_N#j_jj8nlN_SH -Qq4=1j_jjv_7q3_jk;Md -fsRjR:jlENOR.m)RHbsl1Rq_jjj_q7v_bj3 -=Smh -_cS=Qjqj1_j7j_vjq_34kM -4SQ=_q1j_jj7_vqjM3kjs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\Y3BB_p 7_vq6 -_4Sbm=FO#_D3 \BpYB v_7qr_64S9 -Qkj=MB4_Y Bp_q7vr -.9S=Q4k_M4s_#0.s; -R:fjjNRlOqERhR7.blsHR_q1j_jj7_vq4m -S=ch_. -_jS=Qjh__cHQ +QQj=uOp__jHr9Q S41=)a;_O -fsRjR:jlENOR7qh.sRbH7lR1j_jjv_7q -_4Shm=__cdjQ -Sj_=hd -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHRgt_nm -S=4h_gSg -QBj=Y Bp_q7vr -j9S=Q4b_F#O\D 34kMdo_LN_O j_djH;M0 -fsRjR:jlENOR7qh.sRbHtlR_.4j -=Smhj_.6Q -Sjp=Bid_jj _ur -j9S=Q4b_F#O\D 34kMdD_O k_F0M_H0s; -R:fjjNRlOQERhbeRsRHlQ._.nm -S=Qq]tH]_r9.( -jSQ=Qq]tO]_r9.(;R -sfjj:ROlNEhRQesRbHQlR_(.. -=Smqt]Q]r_H. -n9S=Qjqt]Q]r_O.;n9 -fsRjR:jlENOReQhRHbsl_RQ. -.cSqm=]]Qt_.Hr6S9 -Qqj=]]Qt_.Or6 -9;sjRf:ljRNROEQRheblsHR.Q_.S6 -m]=qQ_t]Hcr.9Q -Sj]=qQ_t]Ocr.9s; -R:fjjNRlOQERhbeRsRHl1 QZ_q7v_4j__ -3sS1m=Q_Z 7_vqj__43dkM -jSQ=Z1Q v_7q__d#kJlG -N;sjRf:ljRNROEq.h7RHbslQR1Z7 _vjq__34_lm -S=Z1Q v_7q__j4k_3MS4 -Q1j=Q_Z 7rvq4S9 -Q14=Q_Z 7_vqdJ_#lNkG;R -sfjj:ROlNEhRq7b.RsRHl1 QZ_q7v_4j__ -3MS1m=Q_Z 7_vqj__43jkM -jSQ=#bF_ OD\Q31Z7 _vnq_r -49S=Q41 QZ_q7v_4j__M3kds; -R:fjjNRlOmER)b.RsRHl1 QZ_q7v_4j__ -3bShm=_Sn -Q1j=Q_Z 7_vqj__434kM -4SQ=Z1Q v_7q__j4k_3M -j;sjRf:ljRNROEQRheblsHRZ1Q v_7q__jjs_3 -=Sm1 QZ_q7v_jj__M3kdQ -SjQ=1Z7 _vdq__l#Jk;GN -fsRjR:jlENOR7qh.sRbH1lRQ_Z 7_vqj__j3Sl -mQ=1Z7 _vjq__3j_k -M4S=Qj1 QZ_q7vr -j9S=Q41 QZ_q7v_#d_JGlkNs; -R:fjjNRlOqERhR7.blsHRZ1Q v_7q__jjM_3 -=Sm1 QZ_q7v_jj__M3kjQ -SjF=b#D_O 1\3Q_Z 7_vqn9rj -4SQ=Z1Q v_7q__jjk_3M -d;sjRf:ljRNROEmR).blsHRZ1Q v_7q__jjb_3 -=Smh -_6S=Qj1 QZ_q7v_jj__M3k4Q -S4Q=1Z7 _vjq__3j_k;Mj -fsRjR:jlENOR7qh.sRbH)lRWj_jjv_7q -_4Shm=__d6jQ -Sj_=h4HU_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbsljRq_q7v_S4 -m_=hdjc_ -jSQ=4h_g -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHRQqvtAq_z 1_hpqA v_7qm_pW -_4Shm=__d.jQ -Sj_=h.H4_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z1 Ahqp7 _v]q_Q_t]4m -S=dh_4 -_jS=Qjh._._SH -Q)4=1Oa_;R -sfjj:ROlNEhRQesRbHqlRvqQt_1Az_q hA_p 7_vq]]Qt_sj3 -=SmqtvQqz_A1h_ q Ap_q7v_t]Q]3_jk -MdS=Qjb_F#O\D 36kM_NLoOj _dHj_M80_;R -sfjj:ROlNEhRq7b.RsRHlqtvQqz_A1h_ q Ap_q7v_t]Q]3_jlm -S=QqvtAq_z 1_hpqA v_7qQ_]tj]_34kM -jSQ=#bF_ OD\v3qQ_tqA_z1 Ahqp7 _v]q_Q_t]dQ -S4F=b#D_O k\3ML6_o NO_jjd_0HM_ -8;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z1 Ahqp7 _v]q_Q_t]j -3MSqm=vqQt_1Az_q hA_p 7_vq]]Qt_kj3MSj -Qqj=vqQt_1Az_q hA_p 7_vq]]Qt -4SQ=QqvtAq_z 1_hpqA v_7qQ_]tj]_3dkM;R -sfjj:ROlNE)Rm.sRbHqlRvqQt_1Az_q hA_p 7_vq]]Qt_bj3 -=Smh._. -jSQ=QqvtAq_z 1_hpqA v_7qQ_]tj]_34kM -4SQ=QqvtAq_z 1_hpqA v_7qQ_]tj]_3jkM;R -sfjj:ROlNEhRQesRbHqlRvqQt_1Az_q hA_p 7_vqp_mWj -3sSqm=vqQt_1Az_q hA_p 7_vqp_mWjM3kdQ -SjF=b#D_O k\3ML6_o NO_jjd_0HM_ -8;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z1 Ahqp7 _vpq_mjW_3Sl -mv=qQ_tqA_z1 Ahqp7 _vpq_mjW_34kM -jSQ=#bF_ OD\v3qQ_tqA_z1 Ahqp7 _vpq_mdW_ -4SQ=#bF_ OD\M3k6o_LN_O j_djH_M08s; -R:fjjNRlOqERhR7.blsHRQqvtAq_z 1_hpqA v_7qm_pW3_jMm -S=QqvtAq_z 1_hpqA v_7qm_pW3_jk -MjS=QjqtvQqz_A1h_ q Ap_q7v_Wpm -4SQ=QqvtAq_z 1_hpqA v_7qm_pW3_jk;Md -fsRjR:jlENOR.m)RHbslvRqQ_tqA_z1 Ahqp7 _vpq_mjW_3Sb -m_=h.S4 -Qqj=vqQt_1Az_q hA_p 7_vqp_mWjM3k4Q -S4v=qQ_tqA_z1 Ahqp7 _vpq_mjW_3jkM;R -sfjj:ROlNEhRQesRbHqlRjv_7q3_jsm -S=_qj7_vqjM3kdQ -SjF=b#D_O k\3ML6_o NO_jjd_0HM_ -8;sjRf:ljRNROEq.h7RHbsljRq_q7v_lj3 -=Smq7j_vjq_34kM -jSQ=#bF_ OD\j3q_q7v_Sd -Qb4=FO#_D3 \k_M6LOoN d_jjM_H0;_8 -fsRjR:jlENOR7qh.sRbHqlRjv_7q3_jMm -S=_qj7_vqjM3kjQ -Sjj=q_q7v -4SQ=_qj7_vqjM3kds; -R:fjjNRlOmER)b.RsRHlq7j_vjq_3Sb -m_=h4Sg -Qqj=jv_7q3_jk -M4S=Q4q7j_vjq_3jkM;R -sfjj:ROlNEhRQesRbH)lRWj_jjv_7q3_jsm -S=_)Wj_jj7_vqjM3kdQ -SjF=b#D_O k\3ML6_o NO_jjd_0HM_ -8;sjRf:ljRNROEq.h7RHbslWR)_jjj_q7v_lj3 -=Sm)jW_j7j_vjq_34kM -jSQ=#bF_ OD\W3)_jjj_q7v_Sd -Qb4=FO#_D3 \k_M6LOoN d_jjM_H0;_8 -fsRjR:jlENOR7qh.sRbH)lRWj_jjv_7q3_jMm -S=_)Wj_jj7_vqjM3kjQ -SjW=)_jjj_q7v -4SQ=_)Wj_jj7_vqjM3kds; -R:fjjNRlOmER)b.RsRHl)jW_j7j_vjq_3Sb -m_=h4SU -Q)j=Wj_jjv_7q3_jk -M4S=Q4)jW_j7j_vjq_3jkM;R -sfjj:ROlNEhRQesRbHqlRvqQt_1Az_q hA_p 7_vqp_mWHm -S=QqvtAq_z 1_hpqA v_7qm_pW -_HS=QjqtvQqz_A1h_ q Ap_q7v_Wpm;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3Z1Q v_7q__njr_j4S9 -mF=b#D_O 1\3Q_Z 7_vqnr_j4S9 -Qhj=_n4j_SH -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3Z1Q v_7q__njr_jjS9 -mF=b#D_O 1\3Q_Z 7_vqnr_jjS9 -Qhj=_(4j_SH -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHlqtvQq1_7_jj_ -=Smhn_c_Sj -Qhj=_(44_SH -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHlk4M4_HNloLN_kC#_MDNLCH_EojE_ -=Smk4M4_HNloLN_kC#_MDNLCH_EoHE_ -jSQ=4h_.Hg_ -4SQ=4h_dHj_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3Z1Q v_7q__nj__jFj.r9m -S=Uh_n -_HS=Qjp_71j_jjO -_HS=Q4z_71j_jjO;_H -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \)jW_j7j_vdq_ -=Smb_F#O\D 3_)Wj_jj7_vqd -_jS=QjABtqid_jjh_Qa -_HS=Q4)jW_jHj_;R -sfjj:ROlNEhRQesRbHqlR_4Hr9m -S=Hq_r -49S=Qjqr_O4 -9;sjRf:ljRNROEq.h7RHbslFRb#D_O q\3vqQt_1Az_q hA_p 7_vqp_mWdm -S=#bF_ OD\v3qQ_tqA_z1 Ahqp7 _vpq_mdW__Sj -Qqj=_4Or9Q -S4t=Aq_Bij_djQ_haHs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\v3qQ_tqA_z1 Ahqp7 _v]q_Q_t]dm -S=#bF_ OD\v3qQ_tqA_z1 Ahqp7 _v]q_Q_t]d -_jS=Qjqr_H4S9 -QA4=tiqB_jjd_aQh_ -H;sjRf:ljRNROEq.h7RHbslQR1Z7 _vdq__l#Jk -GNS1m=Q_Z 7_vqdJ_#lNkG -jSQ=a)1_SO -Qb4=FO#_D3 \k_M6LOoN d_jjM_H0__8Hs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k6o_LN_O j_djH_M08m -S=#bF_ OD\M3k6o_LN_O j_djH_M08 -_HS=QjABtqid_jjh_QaQ -S4t=Aq_Bij_djQ_ha7s; -R:fjjNRlOQERhbeRsRHlQd_.jm -S=Qq]tH]_r9d4 -jSQ=Qq]tO]_r9d4;R -sfjj:ROlNEhRQesRbHQlR_4.d -=Smqt]Q]r_Hd -j9S=Qjqt]Q]r_Od;j9 -fsRjR:jlENOReQhRHbsl_RQ. -.USqm=]]Qt_.HrgS9 -Qqj=]]Qt_.Org -9;sjRf:ljRNROEQRheblsHR.Q_.Sg -m]=qQ_t]HUr.9Q -Sj]=qQ_t]OUr.9s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdNc_#d_jjj_8_SH -m_=hnjc_ -jSQ=4h_dH4_ -4SQ=.h_(H(_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkMc#_N_jjd__8jH._N -=Smhd_44Q -Sj1=q_jjd_SH -Qh4=_;g4 -fsRjR:jlENOReQhRHbsl1Rq_jjd_jjj_h1YB -_HSqm=1d_jjj_jjY_1hHB_ -jSQ=_q1j_djj_jj1BYh;R -sfjj:ROlNEhRQesRbHwlRu1z_ h1_SH -mu=wz _1h_1 HQ -Sju=wz _1h_1 Os; -R:fjjNRlOQERhbeRsRHlkjM4_HOHM -_HSkm=M_4jOMHH_SH -Qkj=M_4jOMHH;R -sfjj:ROlNEhRq7b.RsRHlkdM4_HOHMm -S=4kMdH_OHSM -QMj= _Xu1Buq -_HS=Q4kjM4_HOHM;_H -fsRjR:jlENOReQhRHbsl1Rq_jjd__7jHm -S=_q1j_dj7Hj_ -jSQ=_q1j_dj7 -j;sjRf:ljRNROEq.h7RHbslFRb#D_O 1\3Q_Z 7_vqn__jj._Nr -49Shm=_n4j -jSQ=qAtBji_dQj_hHa_ -4SQ=Uh_n;_H -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \1 QZ_q7v_jn__Nj_.9rj -=Smhj_4(Q -Sjt=Aq_Bij_djQ_haHQ -S4_=hU -n;sjRf:ljRNROEq.h7RHbslvRqQ_tq7j1__Nj_.m -S=4h_4S( -Qpj=7j1_jOj_ -4SQ=1z7_jjj_ -O;sjRf:ljRNROEq.h7RHbslFRb#D_O q\31j_jjh_Qa__4H._N -=Smh._4.Q -Sj1=q_jjj_aQh_SH -Qq4=1d_jj;_H -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \7B1qiQ4_h4a__NH_.m -S=4h_.Sd -Qqj=1d_jj -_HS=Q47B1qiQ4_hHa_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3_qj7_vqd__jNS. -mF=b#D_O q\3jv_7q -_dS=QjABtqid_jjh_Qa -_HS=Q4z_71j_jjOs; -R:fjjNRlOQERhbeRsRHlqtvQqz_A1h_ q Ap_q7v_t]Q] -_HSqm=vqQt_1Az_q hA_p 7_vq]]Qt_SH -Qqj=vqQt_1Az_q hA_p 7_vq]]Qt;R -sfjj:ROlNEhRq7b.RsRHlk4M4_HNloLN_kC#_MDNLCH_EojE__ -N.Shm=_g4. -jSQ=QqvtAq_z 1_hpqA v_7qQ_]tH]_ -4SQ=qAtBji_dQj_hHa_;R -sfjj:ROlNEhRQesRbHBlRpmi_zua_)6 _j -_HSBm=pmi_zua_)6 _j -_HS=QjB_pim_zau_) 6 -j;sjRf:ljRNROEQRheblsHR.h_.Hc_ -=Smh._.c -_HS=Qjh._.cs; -R:fjjNRlOQERhbeRsRHlh._.6 -_HShm=_6.._SH -Qhj=_6..;R -sfjj:ROlNEhRQesRbHhlR_n.._SH -m_=h._.nHQ -Sj_=h.;.n -fsRjR:jlENOReQhRHbsl_Rq7m B7H _r94U -=Smq _7B m7_4HrUS9 -Qqj=_B7 m_7 OUr49s; -R:fjjNRlOQERhbeRsRHlq _7B m7_4HrgS9 -m_=q7m B7H _r94g -jSQ=7q_ 7Bm r_O4;g9 -fsRjR:jlENOR)Xm.sRbHtlR_.4. -=Smh._.cQ -Sju=Qpj_7r -j9S=Q4Q_upO9rj;R -sfjj:ROlNEmRX)b.RsRHlt._4dm -S=.h_.S6 -QQj=u7p_j9r4 -4SQ=pQu_4Or9s; -R:fjjNRlOQERhbeRsRHlq _7B m7_4HrnS9 -m_=q7m B7H _r94n -jSQ=7q_ 7Bm r_O4;n9 -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \)jW_jQj_h6a_ -=Smb_F#O\D 3_)Wj_jjQ_ha6 -_jS=Qjh6_4g -_jS=Q4)OW__ -H;sjRf:ljRNROEq.h7RHbslMRk4v_1_Qqvtjq__l#Jk_GN4 -_jSkm=M14_vv_qQ_tqjJ_#lNkG_j4_ -jSQ=(h_gQ -S4_=h4_6gjs; -R:fjjNRlOqERhR7.blsHR4kM__1vqtvQq__jFjc_ -=Smh6_4g -_jS=Qjhj_4c -_HS=Q41qv_vqQt_(Hr9s; -R:fjjNRlOQERhbeRsRHlk_M4s_#0.__4Hm -S=4kM_0s#_4.__SH -Qkj=Ms4_#.0__ -4;sjRf:ljRNROEQRheblsHR.h_cH6_ -=Smhc_.6 -_HS=Qjhc_.6s; -R:fjjNRlOQERhbeRsRHlh(_.c -_HShm=_c.(_SH -Qhj=_c.(;R -sfjj:ROlNEhRQesRbHQlRujp_djj__3j_sm -S=pQu_jjd_jj__M3kdQ -SjF=b#D_O H\3b -D;sjRf:ljRNROEq.h7RHbsluRQpd_jj__jjl_3 -=SmQ_upj_djj__j34kM -jSQ=pQu_jOr9Q -S4F=b#D_O H\3b -D;sjRf:ljRNROEq.h7RHbsluRQpd_jj__jjM_3 -=SmQ_upj_djj__j3jkM -jSQ=pQu_jjd_jOr9Q -S4u=Qpd_jj__jjk_3M -d;sjRf:ljRNROEmR).blsHRpQu_jjd_jj__ -3bShm=_ -.cS=QjQ_upj_djj__j34kM -4SQ=pQu_jjd_jj__M3kjs; -R:fjjNRlOQERhbeRsRHlQ_upj_djj__43Ss -mu=Qpd_jj__j4k_3MSd -Qbj=FO#_D3 \H;bD -fsRjR:jlENOR7qh.sRbHQlRujp_djj__34_lm -S=pQu_jjd_4j__M3k4Q -Sju=Qpr_O4S9 -Qb4=FO#_D3 \H;bD -fsRjR:jlENOR7qh.sRbHQlRujp_djj__34_Mm -S=pQu_jjd_4j__M3kjQ -Sju=Qpd_jjr_O4S9 -QQ4=ujp_djj__34_k;Md -fsRjR:jlENOR.m)RHbsluRQpd_jj__j4b_3 -=Smh6_. -jSQ=pQu_jjd_4j__M3k4Q -S4u=Qpd_jj__j4k_3M -j;sjRf:ljRNROEQRheblsHR(kM__N#j_djHm -S=(kM__N#j_djHQ -SjM=k(#_N_jjd;R -sfjj:ROlNEhRQesRbHhlR_.4._SH -m_=h4_..HQ -Sj_=h4;.. -fsRjR:jlENOReQhRHbsl_Rh4_.dHm -S=4h_.Hd_ -jSQ=4h_. -d;sjRf:ljRNROEQRheblsHRnkM__8#j_djHm -S=nkM__8#j_djHQ -SjM=kn#_8_jjd;R -sfjj:ROlNEhRQesRbHklRM_4dOMHH_SH -mM=k4Od_H_HMHQ -SjM=k4Od_H;HM -fsRjR:jlENOReQhRHbsl1Rq_jjd_jjj_h1YB3_jsm -S=_q1j_djj_jj1BYh_kj3MSd -Qhj=_;nc -fsRjR:jlENOR7qh.sRbHqlR1d_jjj_jjY_1hjB_3Sl -m1=q_jjd_jjj_h1YB3_jk -M4S=Qjqj1_djj_j1j_Y -hBS=Q4hc_n;R -sfjj:ROlNEhRq7b.RsRHlqj1_djj_j1j_Y_hBj -3MSqm=1d_jjj_jjY_1hjB_3jkM -jSQ=_q1j_djOQ -S41=q_jjd_jjj_h1YB3_jk;Md -fsRjR:jlENOR.m)RHbsl1Rq_jjd_jjj_h1YB3_jbm -S=4h_cQ -Sj1=q_jjd_jjj_h1YB3_jk -M4S=Q4qj1_djj_j1j_Y_hBjM3kjs; -R:fjjNRlOQERhbeRsRHl)jW_jQj_hja_3Ss -mW=)_jjj_aQh_kj3MSd -Qkj=M14_vv_qQ_tqjJ_#lNkG_ -4;sjRf:ljRNROEq.h7RHbslWR)_jjj_aQh_lj3 -=Sm)jW_jQj_hja_34kM -jSQ=#bF_ OD\W3)_jjj_aQh_S6 -Qk4=M14_vv_qQ_tqjJ_#lNkG_ -4;sjRf:ljRNROEq.h7RHbslWR)_jjj_aQh_Mj3 -=Sm)jW_jQj_hja_3jkM -jSQ=_)Wj_jjQ -haS=Q4)jW_jQj_hja_3dkM;R -sfjj:ROlNE)Rm.sRbH)lRWj_jjh_Qa3_jbm -S=4h_6Q -SjW=)_jjj_aQh_kj3MS4 -Q)4=Wj_jjh_Qa3_jk;Mj -fsRjR:jlENOR7qh.sRbH)lRWj_jjh_Qa -_4Shm=__dUjQ -Sj_=h4H6_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbsl1Rq_jjd_jjj_h1YB -_4Shm=__dgjQ -Sj_=h4Hc_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbsluRQpj_7_jjr9m -S=ch_g -_jS=QjQ_upOr_HjS9 -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHlQ_up7jj_r -49Shm=__6jjQ -Sju=Qp__OH9r4 -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbsluRQpd_jjr_4jS9 -m_=h.j(_ -jSQ=.h_c -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHRpQu_jjd_44r9m -S=.h_U -_jS=Qjh6_._SH -Q)4=1Oa_; - - - @ diff --git a/Logic/BUS68030.srr b/Logic/BUS68030.srr index d27def8..b56015a 100644 --- a/Logic/BUS68030.srr +++ b/Logic/BUS68030.srr @@ -6,7 +6,7 @@ #Implementation: logic $ Start of Compile -#Thu Dec 29 16:01:49 2016 +#Sat Dec 30 00:43:29 2017 Synopsys VHDL Compiler, version comp201403rcp1, Build 060R, built May 27 2014 @N|Running in 64-bit mode @@ -20,18 +20,22 @@ File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vh @N: CD630 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral @N: CD233 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":70:10:70:11|Using sequential encoding for type sm_e @N: CD233 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":87:14:87:15|Using sequential encoding for type sm_68000 -@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":129:7:129:17|Signal clk_out_pre is undriven -@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:7:133:15|Signal clk_030_h is undriven +@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":130:7:130:17|Signal clk_out_pre is undriven +@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":134:7:134:15|Signal clk_030_h is undriven Post processing for work.bus68030.behavioral -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register AS_000_D0_3 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register DS_030_D0_3 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register nEXP_SPACE_D0_3 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register BGACK_030_INT_PRE_2 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:34:131:36|Pruning register CLK_OUT_EXP_INT_1 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":127:36:127:38|Pruning register CLK_OUT_PRE_25_3 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":156:2:156:3|Pruning register CLK_030_D0_2 -@W: CL271 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... -@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Trying to extract state machine for register SM_AMIGA +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register DTACK_DMA_4 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register CLK_030_PE_2(1 downto 0) +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register AS_000_D0_3 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register RESET_OUT_4 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register RST_DLY_6(2 downto 0) +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register DS_030_D0_3 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register nEXP_SPACE_D0_3 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register BGACK_030_INT_PRE_2 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:34:132:36|Pruning register CLK_OUT_EXP_INT_1 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":128:36:128:38|Pruning register CLK_OUT_PRE_25_3 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":158:2:158:3|Pruning register CLK_030_D0_2 +@W: CL271 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... +@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Trying to extract state machine for register SM_AMIGA Extracted state machine for register SM_AMIGA State machine has 8 reachable states with original encodings of: 000 @@ -42,14 +46,16 @@ State machine has 8 reachable states with original encodings of: 101 110 111 -@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Trying to extract state machine for register cpu_est +@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Trying to extract state machine for register cpu_est @W: CL246 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":24:1:24:8|Input port bits 15 to 2 of a_decode(23 downto 2) are unused +@W: CL159 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":34:1:34:7|Input CLK_030 is unused +@W: CL158 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":50:1:50:5|Inout RESET is unused @END At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 70MB peak: 71MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Thu Dec 29 16:01:49 2016 +# Sat Dec 30 00:43:29 2017 ###########################################################] Synopsys Netlist Linker, version comp201403rcp1, Build 060R, built May 27 2014 @@ -59,7 +65,7 @@ File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\synwork\BUS68030_c At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Thu Dec 29 16:01:50 2016 +# Sat Dec 30 00:43:31 2017 ###########################################################] Map & Optimize Report @@ -68,7 +74,6 @@ Synopsys CPLD Technology Mapper, Version maplat, Build 923R, Built May 6 2014 Copyright (C) 1994-2013, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use or distribution of the software is strictly prohibited. Product Version I-2014.03LC @N: MF248 |Running in 64-bit mode. -@N:"c:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Found counter in view:work.BUS68030(behavioral) inst RST_DLY[2:0] Encoding state machine SM_AMIGA[0:7] (view:work.BUS68030(behavioral)) original code -> new code 000 -> 00000000 @@ -83,15 +88,15 @@ original code -> new code Resource Usage Report Simple gate primitives: -DFF 57 uses -BI_DIR 19 uses -BUFTH 3 uses -IBUF 38 uses -OBUF 15 uses -AND2 277 uses -INV 236 uses -OR2 23 uses -XOR2 8 uses +DFF 52 uses +BI_DIR 18 uses +BUFTH 4 uses +IBUF 39 uses +OBUF 14 uses +AND2 221 uses +INV 203 uses +OR2 17 uses +XOR2 4 uses @N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis. @@ -101,6 +106,6 @@ Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 39MB peak: 105MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Thu Dec 29 16:01:51 2016 +# Sat Dec 30 00:43:31 2017 ###########################################################] diff --git a/Logic/BUS68030.srs b/Logic/BUS68030.srs index bc001f98526cde0cf2376fb944c6beae9262de7f..3bae7cf1298170a51d8cd9823e0c314a088d0c43 100644 GIT binary patch delta 11275 zcmV+mEcDafX8u}#ABzY80000001JFl&5GMF5WeRrhJ-*1Nst|9xACcMn!`f7TQ<8r z34$yu@eo-u(wNj`AHE}ZTWAkG$!O;LmFM$0bitF+^!qgR@r2e)W|JA*8?qP)t^tXR z1MlFV2tFANYXL%(#kyQ)kc;e=w-1BsENY|y+$+$cyO^+lfT~AJ3I0V5kl!Xmv0}*1 zcSFE)L-1zz7P9TOSf){;@?9L_0`8n%!Bc|~qCe491p~^}Kni&3VF2>~Cv4f2cXoivKp&Y7nL}$IYUQ+nD^fEGk_l}b<+XP;Cannm1nN&g z9N)Oe*3Q9ym}KY|_#bunU@drN3`uSQ!LZx9*NJceK0wXg1+4lp4GYj;cGEYHHL+s` zHdrBduu3mBnLT`cx_h`kl+%}GD*t6kzI$1=y(NqxPA9Y7^J6*Pmr`QvKJUNnACEiB zO`^_^LdwW*SgB~FtkB&QrsuE{+kRl&zv43{@?j zm6VMNbu!#2ec|EFJFyl^x=4BEPWnnp>(8i1iK`EM|MB@SE*-URyH&DVW}B?oY%?LY zllS|d0JF&f)d7F)Z`#VU@aOVZAbg|?N@Iao88BZOOsIPlo3Ik}v`VxBJ0)FGCx#@w zH&^$6e`eO+_1f4#dY)gU2C%(vGqdwP>rWp2M4EPJ+f713JNQEBgzi3EL~orr=OMkk za{S4)yBqrB8uhQc*RF9%`(xq{Yu7IA8kg+4PsVh3UGsnGuIo?T%f-0qB)=!!hrY8J zFC2GFYt5nGy`~2H%Ui4-;9ld)?&bq++>GoSXJhPcjGKr5_S=qsbMxT4k2n6!<<9Sa z+4;`p^yY(c!=riF=I0+CZ*JU8`|@ghb2FJfx;OKih@Xc%;xOCI`IT|mz3$)KG`w0v zj5qbij>msCD`VAmOqaDExI?=U59Y(BCD!9i$NtLOFvn=G+Jw3E!QrIKEh{p`8rogs z!EKKXx1F@*@NdXDww*lgTxPgld%-63t#Q%8ISzS4^y^M`j}Q00b3q$#^G?JYAs7Aq z)ipeWJ?spFIsLXvYh288@nt+=zR_;~uR}%q$zp%}Wye+%wle(jYUNU=FJQi)-7%Yd z+5GLf8`oVpyibS2+W%o2gstlu51+?Q->2TAc;2AhzaBiccr@5%~8NF%z0z|e?wZk`ec6sI*V-ECQ;O}V}>-w;tn5%2vfH^-nE&4 zo##6-ZFE9-0&!`$^slzZc5T-Hq&VbpSX*_dXg^%RyglPDTwvQ@j34I)&BkitSj}`S zo{YuI$KprF;)lnY<5=_PtKCY*YJDvot3`hsUk{D-m9~zLwZ^g5u&!PL!(KTIdq-i| zI|f6Oa2U(v&7S=xVAP|@C(wesquuso%yypp=)>M=bl$K(j&$PwMUj@;F48ptp0KJt z()9k}@d%DbV7#Yvyr=5%o{o(7bi#Nhj%NllyYrpYw>IU2PJQ-$%ZWXh(d62Y5B7gx z+o6qF<9mJRrhU8Z9gOTdLrQA&aV7dl+O2SJuG*8`;&JR7Lpsmylk)qYuIMLI@MU6J z@OKv9K8Lqk64>V8md3N~^KEDnJBSDL_ICEXwL@YKgZ()IUE}>q_+Y>0?KY?lfIe3A zua(CpiybgL|B=?_!^e1)^gl4IQW$?~eMHCmXddfhe!P$M!9D;+{AeE`sh|fpp@#tJ zA(%5e?)|EddS-na4s4V5Vpi{se$~URX;X6$*I92=|JB>tW@zG=U6%rQ$0!#($A6%# zk+dJy8xo%u;*;RtSkPH)ZwUt+3R)|p?_rGc#6|jO8#@;SWSiEASj!>WiU)t&BWpxn zWzLDm?K=DCr89bo>vih=(|KVp^>`#`y4~H4cWmPNkKRMWq25dVA7Gy^BW*ovTu%Uh zTNm|KonEwRt$jGu8yBr%t9%_7D_S46TIGAdrJus44cv!>5&UHr&zy$*f6bTL1;+?Pc4&W(=JwOCpR7Z_ z&#?brv(ERbvGJaUhi0N;5`y=7Y*&S){nlY4`u6*U(NX6&dwCm?4lCZSOnv&hI*X>AZijdi}mr)xOiI-`7F@PCii(+D@s*cGav%D1u}?GU6R0(uZC{>bf2yxT{XidA*hiT30Z58^ zqfY#@M`#D=os`mMuQO`=Bvo=xw1>T2#)HLtgJdkAWUDt?#y@|Tz*&c*pJlqs66PRe z*MxR=efQD*FVHwQ-lSdouLPb}(ic#75RdNav>xA$cC@{zIs5CqYsB^8D4`|5WrVmy zT@)A}wKg6rYtv}dDMw?G+JM)Xrxv9T1_8e(l^ke`J0S{ zoXmZe>0-ZWVhQXV0t`_geR?9@j6P=y>59 zWw?KB#4`r1TfH8O>-QIpr@G`Nmf)wBMdGnwg_7af=$G-WfCkw}|XLYtNu+5FX3eTn%$)!DE3D^+9Syx3FyiT?Vk`b*cv zzCQh8xDS6T)|KmX_*ISF6k`MMieul_*^EBl?v3+&JG<4^te%A%rThbN0#fj;-eLDo z@kM>cZl8y@YJBAJRserzquKq8j%Ky{{WZ)QquKDjT&EbV=xjK$7XeV@_M#Hwm?B(eQEOQEy7v%GofZ)`qb?YB+!XHEVkgLp_Qbple%E+83F!)y82) zo1EIG*=9oz=)vzA*U+W2XfvdLVo@`KeeZd6Lso3MF`$zns5;d5y4Qy9ILvF0*}^A} z28}=;_dw?*z_=*LjBY28=hlM>r)Cuzweg?vNN9WUF z!f%5*Cg@P#M#uWTAWZ7sY&p9>v476u-s^t}&-PA!_Lbem_iVO2Hs3qKUVxt;?e7T; zfj9PRc}kxn!k*9`09gGqYskn!7(@UA*ME4t^4SKqm^b#X9G6`_)-I2Z<3B#Q{)Sx{fC%5Y8nb^d zpgu&r}f!AN zGUd>>>mBPmaM{$YdGB2_ISE$8BY(u#*U)aWSh3;MI0~E5=$p`yNPK)Bf?R+8Rv$f~ z{%{H(3QvIz@ywIvYHmE@u&Z5dcU;bT?$Nzyg3LK-FP`{Z^e6lPb@(AOkKzdZ&Bt)V z2v@S)XZ<$VN$v@-LcV}{7U2J6-bdcMRz~j+*^4XmW2|jr6JoE=?1+1IW)pJy!*)6K zHrJWWv1w=Dr)?@ed3!rpNnd{vL0=KEd30v$w#N@bIkmYrb6Ye@n?AH%HBW-uo?MKGBwBurvdV!`Xj)p1@K*Z*PO} z#~=q!HD(yt1Ks`(oUKhmErta6L0OKlFcTjL#%OptcV%1uaB}^t>l=r9z~UVCd1Xvj zzN5!-Qh2BsMB1ma!F77NBJA;lKNVMTZT{8clz(76i+^z0Um)Vb0hj$P02hYgc#htm zX1^!&0DR3e9OJi>`OSY-f9RhN)?wP;jvDP8p1`J2pUakNH*caZZf+4C=4l)3YP*Q* z!abda0>B@c4roeuiJvj0O^##02=*Ch3`p-~HuY^R{A0QCioUK_){D{KwYfcL)6=SU zwcBL>aT`6?P2A8S=gGRu+WcZqUv+#`jEVk3!TXB7J&%cV;%Z@ad3)%G}&h@XZZ{lPPIA6qJn%5%y9}4ay z5`Ur;?mg{!9X|T?f-gnnqhRXB@HLjOH=8D=b(r=U3DZ54_*3*g?|?o*E4|+=v+s9H zDn7v$T_y1@BJ$O26E-7BVSD$&e)Mu{zGE+O59jp)Qa+M$o8_+9#K4)ureNxiRsSp7x+EcRhS9~dYF5H(YLidZUp zTOtkQ_zLz9b47pH-f!)DhSM+%L7s#`C}fI~^C;uwUXn6&%ZTEGq|H!X?#X|csU>g# zYvxvhgEW6`%!1x_pyO2cUD045*Cpstn`<>jacbH$h>J_~l_Dv2rKgyzH! zLbYDxiSSgXjK9)eNAXkG7gRo*@yj4tU(gJYUO<1BXCJ0x0SAD*!gb+#&c8NtXyy|n zN>&AcXA9;#=XNM{sWHlMk29yBJF4pl!!etRjzPy&IN=&jMB<(abB=(4(lwtw#VnWfIIR{`>f6F9o;0fv1#udjB~dgx*Kks1oxPo z0MBys%*L2zsw*xGf9&{lF$Swgd@ti!qo#kz?Rc9lm2B$M#X{#lW#17;J>+E__Un6X zCSq@Uc}IakEAvFKzsCJi+{fHgkGZbjz8(|WXvldA#WkEG4-0zS#+(4yUtGXpVe}V0 zPzTd%YA@qH9{r>;Uq$f>jH?gns3bNRROKJAMvtF7zdLTD?_coLJ~b9FK_PcAUjTn) z5PgYdevIy?e-GS5eawCBL1fj$Epb4#|pB+o>f7v`Vz zOfKT;x$iQE1o!OsU!7TImy6i_s3a#LD2wyrxD~J?+FS#iB=9SaIYv64pjL|G{(=^+ z=Xk`5tG%1MPJm^~HM|G!n0uu2r1yWoT9bhY%iR36>q`EC&A~^5jF0os9z1=_a(vCLrxk%@2A&K18T~+F-vGaLU&THqcl0&BLrGuM z&5_RD=&$8qTa|O1>SN|S1o>fxb9;_Cc~X7?k0_=2QI9H`g!Pv02h7LAJXo+n_H%23 z{Tzy?MmBB(?5;yRPUtJdQu=?2q-Xk4S9pL^-Xb=|SlP28LAYBr`X z=2M#hMTK?o*q7%81(bJO)$7^>K2Du;{vD4d3w{w2pOw!MFIsE{YRZmQ@s zgk98xJgW8w&-TaB{#rimpq*BX&r5#}`ecHpjsBU`j}`63 zRv$0jOAW`B&lLR0D%L?CFH7y`D*w#z`BvZ#=Y{y213|-Ap}+ZrVeJt!t~Shfyel?# z#&q&U(Kq&6oWs~*lg)n@TGjUCxuy9Ssc**$!S)8#48Rr$|Ei2Hr?#5kNB!LonSuRk z@n_{zp*-&osKrU&5o|L|6%ByFomq2X7p1Z0l*di3wfJ-51MC}9`e9#R#phtpeKuBX z<@i&HcgrSbL~IMR&?Zl6D!}ebWue>N(eIsE9c)bA8PM7GdtHBgvhVfY_BH04!5%#c z{pi<Tg7L>Tc&v7YqwIK zhiK!(4lTuxgbB_OwhWLpw@@}6>KFG}_?4x8nTOAk?;fxt!&9EYd9Iw}Hspp>@=Mf( zgkBVaK6b(F9DR^p76*BznQxHYFMCD1k+B{*pd+aqfQ)}nH^acP=kuoUJC){w8S{LMG84g}~S^tmBwK~_mFxD{bsCV~xuJ_77Z z&wD{R^T6o_)I;x0%W**&rvGj)Dcad@sSgu%yj-kW(jAUtn}HZs`XSSLGvSAmG?wHq zJgIpUe$@rEl-YN7H8Lxo> zftT~D-#G6B@k=uwD=dkL%6bTk@wyzx>kP;1 z{|JslvgIW>4$+>$?|d8nr*Is~{EZxrLn3Rv$-l*MnXg>dVIr(S)9f3Ig`?MG&IW(< zg+H^2Bh|+5^5Kfw(4>Ah^%u_PU}Pq_5W26{^hg#T^c=-MbN(cv{BNFSqZHfb za$!)1I3`m>olBs6cykN*`Wn$kth_Ib9QB2fN?(}PcIuStIu&vs)(~XyTXUEm;YIib zC&4c$g=AtH}P+0oFKrTaOheyGJZH&%W=m2E3@ z=AfX%u`tNVd6idZuLEKNL@xTFf2e87H4%c90=kTw?>_@+XHm!ezHv61a zUf1FtmH7>r7g1LKR2D}p+W%>83&vy%G2`CB-{=eY!#Gl|pJVX>eeNJPD)ZX3_+zDi zxypAzpKnj{D;4?hdt!evZB)%&)I;OhN3O@bYq#w;#+1|=Djz1CV}1g{At?97V;U)21UNxuptX=n;s2Dxy2KsgVdyG1K5ofP7skw;a?chE5 zd!r5IN5OL=@IG_B@oF-mHM2U7dpI7t*5jcQy36uf*65GAdPILz*)?%ii58z$u~q4_ zTH9t|+mYa@XQY{zo90^hxB6)G?B}v<))l<8>blNjK_8SpGlI#p@PU7Mye<9}jms?F znVv<(T7(Lxviyzytz$7(kvD&W?gx}39JugdVlHd3HbswH74LO?`kKa5q+e4#GuTFo z_YPm`QWga0wzI-O`*fAOX6#QNGtHpo9#5o!>!tVJ}#pKGab>df%bB21Fijmgp32Z^VjRb6)k%+UW zu>rjnOs%zbo!~f;8!E=PcTK{43ow_t3oo42v;27B!?v?Lx!dRY?S3w{c0I|J1Kw|M z=cIV1RhgbH&I00G=P%+6AIwwF&iV-}b#mNaS8Mi&^6fqR<$`}Up5@tXz)RdQ&@-K^ z0u_r0F=f#vCKvi!RbAIn`l76|Cajdc=}WyOpMgWFBc5-Q;jlQX^P-y{w*4 z#V|rsY-A2RH1)6S?N8mWU#v5Pc?q9OO4AA+QXc5_h-n_J)}JJ~onYJT)j0jwWxgy^tC#Cz5T)(+sk^JXF8IHc zO+dn?kPX~K*&ypBm28mt^)X3u;EQpZKlHgIITaYgA(($4mBerKIA?l>AbTT8%w)s! z@tb(L7mHFcN`oZybh01Dny>K>2fOi!+hPnI2J&n|nBNoXG-=%ZN!M?x^C(o!<4L}m z5I7&6hh`yj)oeqco$#1#7=r9Cvki-F6+gMJs~q|YKXbu$42$(O%BHnKOibk=&RowM z1{# z{gdh@Ih|0yzw)y=bJ%mp0&%}?X_D(8{m*GGgvzhC1P=#shq1+ijXhoG^SM)fLC5J@ z$7xkttu{iRd!V;XYAarIwFL6~R=v)rkW(+N;l6*A^)m9TR#lsqo++C4@s{qLoJ>mh zdG5PBKUDRTo)wz*^Hkc;lh#lAU7ib?)w~eQ$AdpIwn}pRu2^e?u?@L4*!$wyELRxECrsUtiMa8ud|9AP)^1NOc z@0fqRI0qdism%xjB_~@q-LJBqh$2Y=e1KOg_XhRjA+~WESStgfSC&@u`in zCxf#3p*{Ub>KnNnD5;xZzK+ym=yROu+s%O(8~c`emDEcttUrNKI4Jzc^YDDR)c1+J zLYzSbV_1|qm3uGeYch}fM|J+F`?ZFiQ>uSM7jqSmKAeR?_3Qfg3OX(3v+MflyYf+c zjVvdkpkIfF=xL4B5yFOU=J<5D@yt{oVYE-meY>HlZ0xG*S}kp^X7Peh-A9)@7qqv` z`3g;co%uyG_%t)U*^C0DOU#)|>JqE%Qc0gx&xkoD`iJnJ@p@)IR@xLL&+9t&9BqGQ z44MYK=-U@{#6tgLZo5n#A^&=0plKp$hbSZ3hwdpGc2%#|#cOR@mlYuH;Un=K=rmgB zH{rLF9X;@jKChGQf>t}Rkux7Y5oe~NOu@LJ9Iw;O?EN%nCzmUy*;R@bdpBKi4rf{) zr0lpfM@h;ZeXm5v^5S?m7Cf{pUypyq9Cc+q=S}is5z~}se-~q$!+TYCXQGeA#6#D? zM$zoCSnB6s3zX&Gsl5;D)aKKX{t6;%RdKH&pD*YXxf;jxY zK8CgB@8MgWM$$*4M^5&UWA3J2Q=7&a_1sM**H&@4tot{9Zg~bhj(@1W1?_(g0u~@x z9$ zozb`K8om#q)OQ$*{iS?|u|d;)DEJ~R^2t${*NcZn`(1T#I9}s5eoqadsCQ56Fb&{c z#+^fRweZtru0DHD2h;Gl*7weP_!^!~T%wCL|BY^+@OP_Hw@2ByvhsiY4rPV~GK03h zww>K3cYYPl#id=q!Fa+~w30Uz{fxM$k?&48-60*8_$h^rS9ZNa_G1qEoHD=19Q`%( z&=UR{Sqr|GOO4lL{xs|o=M%yc^fpaBwlQE-y+eX)xe6xi zS#|c$z|6f{B9|jD>?s~bfWHERAVI;;t#rbmM6b&0k3pHP8Ki%?TcvtvD);u{RQkS) zR^@e#`|%I5AJ5a|Evd9ql6D(E=W{uDZeE#An4V|d`_akxYMN_+2cgJw8`Pd0k$>$E z5q&m#op&_J~-ixdABlXd9pa+l( zL4`d~Mz?u;ASi#c2lnVzw-u_+u#~xKfj9?fZlhhK@}11AW_z=G_?(@GVuqOCS9mTt zSK;Gg{4qUOVfV4UnK~b}S_aP3{KStK+re1T$4z<$!$+-_f^0?pq~1^ZtX7*La>LdA zG)^S?&5cQj8WU}#bbcr|KW4QPN$$EfCvm^f7r|N#y{~`Lc_lgPs(r=02+pfLplbc4 z^CDc$OYcX1*Pg=~i7ZAFf{6lqe9dif7Fm$;c>Sys%;EEZW6AR=)AIqvxrnNtU_M6` z_RL&)TW;r2aDz+4i*XjVak(<%>V7V$@@8^Pe9A_Q1Srn zY%{Ij9DaW|Ef2St$AmH%HEUSmH+nzP0qQ;IQuay{0>Au>hD34n_6OHHbp&A(^hBI70*_b*R*rM)%ys` z?bQ7|I?>wJJ>6^M=OX`$ZODXx&YPrv|P#5?&el2|8 zp&Wm|V7Er^$YGTE?x8$0XF>Z5nSYLFLxRl9JyXyPls&F;!0zksf_>Vbg7G{Q++!W$ z3x&?OtXo(444U74?;h5@C%GhwPgUA|ar;2-M5_BM`xal)Lc}=_P4vB&z1IZ{CdE^$ z-VsxE{Q#e-@cCx^nm*MtS+#R=d|A)kgXe!L?TC@TC%X=vTm2qgI@d?3|CKjX>;;(K z+O&gco#s^OXHJu}P6cq^-}LF;J%r&mHX0!wx394|ut_er2xzr37BlqPS^Nhj7sh`~ zGqJJ55*s_Ywh1*GTRR^@KN~#FaWE|tWKYwyL@uTtSGo$ab7;%+LIQPuZO)&mwbOrc zS=77s|67rv9V`mVpLChOlK)>e!IkJ z6WKQ6G@KV=di<1_9zPH}E8Z(TJ4AoJ3q!$*M+BC{gUAkLeLKcr^>e6DpB29JFuO1F zOfuP;z0;)%&j?dC>ZrWx-`DhI^agvK5&1qqs?kDrR)QH~t|7__-Ikq>|C%}vpe<0s z_xx^ub*EF{TYd82D_Wi2bpLXuW6;eXi0-kwoIx!9$8!=wd2S2aKPP{ouk!DT zaFRa65MPZ3ySW%MHM+il8_X#x!@2Oiao&#}d|K8<*K73HxBmW^RY%{$q|~n%;tNGl zu7I>d`&@sQiVMzQc=Fy`|gV;`arib=qpl`dae}@HgD; zPOLE{SOaErG$B$uFgZ8Y%*nCzn)LaZ9okyvb8dJk-P$Ie=V03Myjp*JM}e;YUl4|K z7rYSGLh=3ywO_g196iV6VwsPHX>=86baf~;r07q)r~DoIsXmWAf1p+E4=m=Ae6thX z1awTZSdTEeR{7Swb>y6MR z8-Aa?i(g54FSE58gdE5rO3t&_d9cJGSjvjtwHzH?2Ji9S3L5x>d?PWh_ta(f3hxFG z@vojkwRZtz=l6e?=?rCYCH-9j|Hc-^d8O~V?~3;YyIy;I?NdNb7Sp$aHRi=P3w1uk z3-@aH3pqBSe%5(D&y$qq&#o)#CBj0El9cmCIo+!|xq;nOd7t){H~(iqsc*E~4-Tw& zdg*nYTHkey$Bsw!Hnn!wz#t73`OF-}Ie|}5iokNgXaIlcGVn>nbFA&S6K|2!E@-j& z;ykbyV1nb7!}i)0>ep1RGZ-KPPAPW@?Sp*vj9M4px62l;m%eiu&+`T4Fo32ctKr18 zQj~Fo`-Z`sReOI-ti=p1P-ZQgl#B`dhZ-1csxhyNFmn;`i%CioCWxNU#G2jxb;6+3 zcyLx|XSIK)s}E)Cjd1J;)*BYbCa~TT4dI(~!^nh>Pm{`f?U-v_S5oXhr< zbyqd<4s6gF7wP-#o6y*f;LDjA@>g5ND}f(22Z&eNho`60zs4Tm%Imr-Z`1Z+MW@j= zu_SHx^)s0D^QI{ov}&DYcQPGMM<0~GYv;O#=RAM1e(ljYC+Fu0mBIgWT01BFJpD!J zdF`AhKaem<4W3ONhO0GB&w27wP_1aI(Ji!1I^yDgjVEozubLQ4P&rb5GA{h(qAgF_ ziYIY1@LD>MxSfnk(x2(L=W-V5oX^vV5HW6Y3+D{C&y%*IFcg*<@K)3<+-kj-0WDgEGqt~RUBwDK8A|KGaG9>6U_;sx*0 z1HLtqwU^}{j_kDiU^<&IY2m2&k z2(ql$kI0gdp2EW|hkZ&Q|6lqr6q>!iChPMxc?F=fU0qh&lpgn7UzksqwLlOQ}4v^nQ#5!Tf z&UJ&wx*>SCdk@)myI#goq;g#t!UFECN>~&F1b3o~^ctkCfEqqSa0(?mhRUhF)s`e7 zi^L^P(|Ob+{Q%_tPuQ|4XUzbmhCVPIGKW&mSJEmC7o=tsB<uBf~_#bunXbd=J^iggBUbEY(SCMc5&O^oBc`W-e4GYj;cH=jX6|rLm zHdrEeki-|8%pSiz-#9{l8 zB&z(F3K94XOBu8fCECq;yf|9^Avk-Yf9PqEtHUqE{@@Y5Ur%243#a` zQiw+SDjII2I`eRIm#)$!orS2mlfD$fxEj?cadDpSKfN5rrK56fmqfd)cDG9N)or?+ zeAvGNv&sS00e@|C;yAPR=iygSc&iRnW?ZIF88BZam@uBL*aTHUcD9mIfi*)$BqWAp z<~cca{`=D{Tekcb$nJgay(fTey;y4X%hj#cXPrH5*JqmhP)L?)3%k@3nYkfW3e4wqHv2){Yjl+#`bN~MW%MEUB?gQ`fCb+pc z1cR@Kz`dB=d@ydrZow__>BHmAjkmQfE+;oP)7hhUv$)xbPh9K-^mhB{(zxhd4Q_5) zexoJZn|}op*Js{$DK`rwZCPqVXZB~JbLd6(i675Gvzy2 zJ>%Z9CWdFlWd;0iBxKp?l}M#Bof$-sE60 zId*>FMzq!C@C44K;n6=VpB*gEfJt%5za0sx3$5xHt=5kcntg1W7t1B zhW%q>Xc7T!nWEiyUga3|Y5WPa;2mhsnoiik_Z|aSJFV_3)+dloygw+?lI0;?6W|H! z#v@Jczug|e_6W51l(hF$-`>-a_MT2?&&2l3aPD;fCe6J=#jx9)|GgK)8O~{ZZGR+& zrLpbO*1Yw1bL1s;d)5J34%`tX4f?p2b;RY?xHi|;^ss!K1jdLiviqd^{^v{j*_3>l zm^S>KN4L-Xc27db9NyAszJI>uCUL@ONN;cF&wGaxa}<{Q2y~72YsUxcHE;J}V+i!I zrhlw`HeDWo;RTPhu^2r@>$v`*X@6Iap;pK4cpdFybu5n8v3au&7$b4C4o+(5!Hel3 zM0yAp%!&FB&2iss?)lI$X+L7k{`jHE_ohS5Vbo;(ar2?ScT8?#n>~-h@J>)J_-=4d zSt~9-YPQsT+BlyC|3;F|B4?DyzKz@A$$ja+4-}eT%3z%#--dW zwDa6LM_$&NjvBQ6`LhFS0)JQucg}atGxCpTdM}z_tSb8vvGGqS^ON!Bpj$zI_~zM(?@=Mn$IsEvI=+^)5%(z` zhY4u3>8cg73n>ES2q z(!b|e|HHidcU{|fPn(B!tYQ*^_xf!9{eix&((j|!Rf%tnY3r%~lg%H#v)9oootK3i zgGD?BK#w%}tm{X!_16oG!89HNl$m_9dvSihcG;M|{(fO}-2Kg7UdN=%s_KyUM%{Q0 z!k8Ar4gAHjcim?9cYl+g z(5Lwe&gEX1&hUlKpHOByds9^Lm6uk0AL{h5PBX3(sFlz6FHfqzw63@6fjTa+4j$J5 zleFuPyV1`+pJKT3?~mGs8B2alS_{^m|k}Zr@+BH4!d=1&7Xe?)>^5QTcBkRr8Zyt?!YV z>rMPlK*_vAyML?Bs9Rn;pkH?7ngN=%W16*X_}lF?o1GPHuDZ=CT7|n%SxdH$Z4an- z_^+wwZ%5XDNq!G?5v&XJ4u^KGJB{mdU$0x8+W8uFu50GKKiVL>+rOM>&Yq*F)9^@DchS>rlg(Stw^{qB zkJt;)!N>FQ9i5NncU3ZB-kRUl@tyJAd|s*Z_&|H<8uqE-23O4TU559m0eZ8&gYy2C z`DDh{TX$qw(6-;ZG6L6SzBOUXfIJ#>2Rbm;MSq~K?QG2~*NETsggTjFnLrOd*v+&BW&$%nZYdv?F2OF8COuHyR;bcHDXh92R57U(=A~v7);&S zfVlhNv3dh|dNy#U`+>`)9C*9Gfy)LncRJX|_Qc!c@Wpr6Yi0zanS1ov;PP=MJ}@D5 zw|}?$u!J!)3>Qe}$h#c~GaA;>`VOvZSf`GEXtBgDJBgK1{9iC8kL|Abh z_TdVy#iMlei{;m4zsY_*MeITH_P5705?#jophTX~KZ!x0zWI%H?;7KybxYkC%iOW~ z>RA2fgel#et>$;E(Lbs00{Z@|5gmQD|9_5WzvE1d?p808Hl-I59UU{%V1cyDjy$)!XMx8agG;tG+)F>0T)4~|JzgB0XD_&aynhVX z7TAM72`=3!n|wV%1{gfH_uhW4ecE%lro{=*0iB)Hw^Qm;?-1)Z^y2Jk3Pc! zBf)3i9`6K0MBZ|gR{Jc*Mo-~eL3rYvaCULwJsxd4p*z+vkIVSS3-97syM35rv;py5 z7!$_!&-*Wp;Aq|5=vOR{U{e45a(}-KjUyhauOoqNJW?XKWH3(p_4-Uu1q61^zU$H0h?Klrt&zkRemY?t} z%*QX}xufUk==f#6o8!+hF32gg!2Xu{3qN(7yDVOxQUBM;Gza`kV!@~Ad4CBueTp6y z*Li||hjoVUsnb5K&fR*EyLNa|Ki5!;lf^B5jH-h088T^i7t zz`dNXQ~6oUn`8S~(aJG-g5xkAf0Mc~iH?s2=r`Y*po;-L?nmbFF-~w?#$K8Par<8peC)k(@M-!Y9m|dH(T!gfrjsj_O@Yu(4)a zG)9lqXOhcZ&;`ctz*2GKuyl(%-IRw*^)Jz zZ4KxYW#oqt4!!dH9A2;`8P)*y9ZjxFKJ-@KfG(&5HTu-M!g0ykF>@H!n#R|Mdp@F# zbuJdcITQM`T+knmCx58Fy~<%*x&F>LmDh!}AFdV7YKG|NcEsY$!DoSH+`(+>0&mRq zQOCfFzZs2vucRsc((BmoU^?hCKXVpxEYFh(k9p*5!aOm*V7rfaM zXGj)mEKu8Cxaa<_1UGJRa(x*e%Ow%<8sEqbqi}m;&xcpWl*VWNsJ*azp&f3vvAG` z&#jF;3t^5(C4W7udj*Wmp=7Am9!Fn;qHXA0TcBUT;c~safwkq@tHRZ8BQ~ecw-Qe% zV)>}MKHtu7f6?l4qvu<-enordI6D}*GcM$N*I{@+u5)8q*(UlBVm&X9@Bd=`2z?1v z{Ymgaxu#%j+88?sy&`HJ6J5VwpwAR9jCFPyyTxc zALx%&u1<-mCgZKXr#Nde#%4UmCh&rIj9=LIh_Zg}oe^`z@q~6>fPd2jgI&k|Zy;af zvCx|{-WC`qF=zenh-c#bTnf4!FKHT+Fka=qKY#pWuk)4k-`3Xm7i+%gbv1vozs4`w zXGI-E&L@YLYRB`5w!-S+wM3g}6JTGF4vW7r)u957dId@K3K^Rc;`vVI}oH`dJ*Mnqp%x%$xW{;*=N+m*y&(EpBeNY!;U-=UiCkfiHZ z*@pX3z_FhJV?-Ln{kt!34pZ@K%%yUDmIXU;S-2^DohU zS3R4JX=rn(D-3O?9oLs(@OgbAyAGPJKQq|`b(pnat~TE!)78k%2KK*${wg^)L4^jM z1N}eOSN%GU*@xLg(h~Jujm|WgZf}rP*n9)J@R?Y%sWH2meCVmQ)qLqNhPp|z4u95H zbUHKGr1#-Q`D0#Kr)d*t!dOqSy_=_Ayv90U#0zG#F^Sjn%ZhdErY74$m|`Bn>j}`p z&Ky<#SFc*mlIu(_pVGB~?;73os&tSi_Ha#3d1g-|&Atdh%z|DV!cg#7kBVh;jHmq| zB^j>lvXae}#7JvAUSPZkyrn4)j(@dH=)rOiTe`Kt0*_;Hupbzsg3kg27fU0UxH$Gp zK?8SU(8)3|mahC>s(0oLt?seCA(yR?wPI(rBgqG=CS+Psxu% z@twUyQXen`9T>}{lu_UNRLLvZx4$2{bEQv9?CKr;!um#i8H?GIF%%xy(pLd(wTQ+i zO%6PQhhT!eIP)jL`ZAVG?-$0a?fY5mn)Y2ji)*^e9{%3WGhZXd0HN=<6t5Ll$EHEM zm1EZ;dS5pjSOkZ)yh9nQt$#sD7fU)=D*30b>+?(P`t`5gp)nslj@PslTM`0f^H<%M-4I&S84cg3IE zxEX-&KsRmkB;Hl>aNx(4^aMJlKHvQ+TEq2r<+?Y_xBLX7PLIf;R9 zXJI>~AZKz z)o%_1vH|{&am#0G;iz(3?sHu~sH9QGc^VtAc4=K%$*T)75`T#u7E06A1X+J(gZ<-F z+w@@YD_==ESJ71|rcU7tslTEQBhc#uy*Jin^Reoc{hK=4TIB5ULoky%rv(J}W01|W znjgQn_n8sye|J7G1j1mvfCtHITam?e=&>_dUBKCPP-BWcwDr0qU4OQdSPqam>3ytM#i(R>Qx1Qy z5wk)%ld;EfKMy~?%6g~t5aW;AuW<~Ej_oAlkj6Wua{@2y;O?GK*eU*k{St|NIXzJA zni>OveJ$cny4{$qTe1Ph=4=p4vfJsptN0tcB#EX zy$0>laF^gcaePz3CY9?QZE>}>FwO+(Zx?t;#d%Mqb~A<@k;PeYM%lv6l2dyztM(Pdt;FvQ;ZeHdGyqj zx_>h6ivS%x3>|xct}oP;UkQ^qEz)IzwIY8=`>i;_sXvQTN~EeUl{bn^b-wg8nGtAP-i!Ce%wnuTAv^g>4Fp ziM=3VHmv&{V{8AmeF7b*Z69vt+Sh)QLVx=dM4Q$o(eI6zS@QADgrn6}lJYCtCWW=1`+tpo z*pug-9BIG$-C>&Z?GsTw@BGbqCn+W&eNZ5;(3V9X0{I#1G@yrgxW^InM}nVV3QLT$ zpqJu%JU*=Ht60gHt|DHusPf&+h4Uhw7&nE)f?{mb7%ZvbzPY~?_k@mzRPE=Lx-K;` zonYdv-;LKLds5|GfM^5T-Ub6|Cx89In(asw_K&!LHZN)0Ft?_T>DQGl`1Q#tw2J#_ zGOP!B3Hl9b=P@jJo|k=Z{yu>T^CKu}jz{eQ_}Fk0D} zTP=&B&t|F5JmVjkj|08$@SnNCEJry!$o5U8GY)i{QtP7`*a^1C>aXJ-)!#!pM&6x| zSqclkv)G~bo|NL26m9M}rXUd9F?Sn`tEn2Zfnb%iX=}8(9#mh4S4`uKlo$l>%d&THga)%2D4 z<#YbAJ zYRvbV-|R)%u0>oN^Fbj#Wme25=7lQU!+cKh9uza~AI3Vqg@21T1}EV0b|oI4<4JZF z6Useg?H1GJlwHK?D{$Q$7F4K9!(t^izX=y9UMl&4DOe%iGsbDQW`^y?am1l~UhyK~ z*c|w;!)*b)D2~a!U_pwhtN59ePmnzCXk4WAguqjQ{~%Z|sSOXJ+7 zdVV9C zHLGGBtM(UegX-(Zw<`7`uH*bSe1l-KV{S|pcdd9!fqy?K%&^3JB9>B>(#m0R9m|Zw6z17 zaP}%3DaVP(umqKV5%gq<&nCX40(Ki?(ZFj@!haNmZ9AaL*hENwgTkYU;%QGFP5Y5x z&?P)Nx2O69zGlYzG0Zb3j^~^+nQL*V^9Z#!80|duy*s4%DU^K&{J4$Dd1Pe#ndqpP zIUFm@rP(3$I?1Vt^p))oe?RZ7^~-8Hsaxltr_Z;w<&XHYq>pIK>+zZj9pGKOy_laz z^?w<2^ms{LSdhA2U|mfJZMCYfsEWKr(icY`u610hb{|6B9)weTeZ_dQg5OK-jgdA6 z^S~Auyvr7->(>$c5=RB7hfCX_>6G@5r?z|NiYi+wl`~CReqM{S>9Fpqzkm8BIzyW7 z7e{>)7VbC9sgcTLAz*!QVLEmp4#qql2Y+MM#lhst=3;(SZ2d9cL4ws3@TE}eH&B*9 zi!vXh+s?-EZVqI@n*QEZW$+1jdm;72N{Z8e&(D}9UEq@|L zpuWF~SaxLbQL-MA)$>%U=SizaeSa#{!zGroFfsS7()(1*gl6+q#^P)DbFmysU+e_s zHK}+WI&K{_#TOwLp={Tz*xQ>M+p1g;b=Ot?=QP%mhXnZvXhAAwU#)+x_PGs!kHr3j zmF&wqmpFT&rF0I+~ZK(&LE~44{ znSNs~aG{u}OTqlxl(}hq49YR2U)N@}xOJZH%^Dt6i_hB{Hm=7kEf5>SJ|%g{b^T7_ zpHjbzx(OCm8Fyfwtm6qT?O)uBdMo1tZ-MogsSO!pd^rDR?td25bGOLmZt)+UyG?2CHu~Ic{-blpm2WXOcU+`7xBruK z$H|^l%pC{*CBKtB{}*$I`j9Pf?wAv$F(EjPjK;r3gf>VdZH0fZwoPZT*lmE7qO8r~ z``pao`$fMU*vu;ak6KVtuOAt)-U)Q zb2fsGKZGC{7ILF`*+;x(QwyK3@x$hx$+ve}ta2S@v9+@JR(-FoL!?{F(f9wVy%_r5 z-$aHxotVn-!Rz-};$vNZFN|Zrn}sNLT8|CKs{qTEMqWZar@@-D{ot z8*?_=rp9)wxn5_ZGQX|of=px^%mlg1KBMyo9WT~-3hKOtdpWxfI2=saCX{(W7U{SkeU`9_ z{#BMApy*T7udRdHxZ_;gn5+Qzb%z+!p6u(c%I8+}8x-49euGo`miY}xdnfmlo6z<` z$7sl#7!4_5G^Duirf6qk{-P?Mb|F`W^yeh!8s&0hB!AcbwO?Dc_nv);>f9gXuR6}D zaA>@)f8W!nDz+^3y^eOnclB9|InMc>_?o_rO@a!GXGU-{@0*ahX10SA|0u4pEnx%1 z&hv2`Amau`4r@=oKdD@ki4DC0T|sUxM|#e!@7-}-2IEC^J*2o#QZFy*?6ri&XSs;* z%n_4k`+xjFcXsv*Qph8aUPrt@-ZOq zuc=QJI|()yc`HVAqhYb5wfoL}=)X$qdGo%xN`Lcc#Q2x7G?oWf@nrhCN-;gm4N&Bp zMV$tED)S4xhu)g4xUJUfs?=|x^}8+mZAyI*@xr1`hxXYIySz_J!_aKS2Rb*sYsF_N zvpd$c)CF}Mu0R{)D7L5THChZ<$sdmTP2Kg1_@-Q+Qha=2w$WV-GXG5Zi-3Qoc7@vi zihtJveG|FV^x&3EXsyzKfi_ zsKq~#3Y}k`nKLKsj;ykG?e?=|uAAhJPS?*uw|C5)4A$a1xo=Xlqq>Tw zs`?SBeL?wtL@Av{gr;&{??<|C4Wxs)bAL9V_fjU^&wp@ zn_9h@PRTh&<-sh3Xb0=G15e)H%NU~|#hh#I>-vJYXNKG(8wFJDPm<^NQ8G-=@k{i3 z1d>6Uh5@j7PW~T4_Eq^gidcb+vpjr7oucYmn#)I2=lV%=V<-6%c;+K1`>$25AAjVT z6hyYVhU*u!U_&rTGELVzL(}|iT%cDOa<7UDG#jSi>2778h-aKet+HS zRO+GRh}_yB2ogH&wzen8wAdajWQiFAJtN;w_mN>9k8F=X{2byQ9}QPxy1_^JJ&wi6 z_P5D>LvgO0k20rQn1gp`#FqI@fO`?#@xtgQsRF76f5WG3dGDLj>=zF8w0F-b$@lwo1>g<8vlo1URC;`Kt8$Dxd$ zQ@jmWZ5wkuwJ{8HBXd{r6LK`vJyV-kykhTvF&|}mt&ZzH8`A?z^v}&jeGh%MbsipQ0-MUim3R zm7hYxIp2zn-W7DkhE+M&rM=wAJnPr>@0Gk@9Q+6Ilc#F@Bz%XxrQ{a3w0(wyrK@a3 zU1lZE06W2qnUr^5< zV=o*$Ulwg+72})w-IKXcc@`_}Go*`m#~a(b1^$U+Ut${5VqYYk62jyj9{Q71+O+!F z(Wk^UfXK$}w=&O?aN1IzsXM1a*JtXUDdzGIT>p|yTy4KdK7YTF$C5oIyUH@z*br{o zL?$WTCG@euT<8XyrTA^!ulTHtt&x2{H-2_7%rcJ05`SsVV`aB0tRh-vm_!YaD%ykZvirKNC?`Kp%;lN#_aw(k;@e4ic)BM} z*8y~yQN)r#-*}I_Oxwq^fDs>No zOT~Ir`?;!eJr{Jyf`6`3&m_9v{yp@X`3G$i<7Q1zFn`WAGFFky1lS6muiF#qT6&&M zA-{dZQROM@`Zfb$>rfnzk&Ov-P_l^SC_n4n2nTBN=M3x+lz6n9Wxb{}Os^=4s~&;WdHR8h-UU z)@elfO%BVYtJ}l$shNB3E&IBNsl7qF@8nZi9j&M4n?4EC#B;1o7&5S-NDjvcwX;L2 zbGU{|4;HkhT&m-rH!~S1A6mY?_{~j zzN_;|@Jw%2Kjz|r`hk~`g{uE>=^pf)i0T^FeMy*04~Ojr)^XC0(pe`3ACx+OPq&Fw z{EW=CqWny_e%3=;xvrFL^xj;(Njp_CNwhNA4*Ipg7(1~jUh0GZ|FmgGAwez>Ac0Z@f^ef`uI4El}2P5I+ zY$3#p^ZT{S#=5-1IUOUm{rdZbv2mB^bd~LEgb{1YP^O$8XEys|GH}_w2(t5K)Y_Qc z^!{*X6U4HJ=A)QR{+PLlWl@rgK@fUO&VR_a(mX<__h85&Px7@5NS51J#lQ@*oSCFJ zPAc{eV~s$Fmtu_q4PX1QE6=&n3lt`|Q}3pi+3vDA&Baad+*tv+c#A6B1WcVB=2+c@ zFvN>?F~@3QA4RNZ>-xI3kD{_%8tYgQCz$y3OJ|rTGO(iGcewh5QABCqpvC4WD- zk}0sHT=r#c%+`U7y+-+i=eHe+g-r1YvdehMcAdpUc5iwr&Txl&R5e~wESt(w|6?p) zbi6!^U(ETv<@588B}_#36O{5BoFGefMOjktx9Rt*a5lNlvzWJPd81^?N%Y<>`+%kY z5X_3Uw*OjN1MR9c(Ad@M97qd4{D1seZwZ~G`k^}4Psyq_o}vW23*+xP=gp38_b0#4 zJMf|Q5U4W@PqDR&`W@19au#5Yp4ByVj!MU*-Svvr$_urQH}QV1joQbH=Li1i@gyk5(J^XtfiZiWT-~_0#zCej49CDCU^PJdLOAg8>Bs=#tBG*0^@w5YO3u z$+h%6Ont9I6~Evz))vN%+kbM;q84jgiaE{4+LDTRR#J?$4KiQbF5_>5n7=K6ziGCx z9^b3yU*B+P``al7skfEGfXe4>R$hBcuaL3bJlogshHgLtQI`FAY_NRR==M;3{rr&6 zNx#!D!T~zdtY9$m4q1Ex>Vop@D4z4ZR*X&QEHsjjiK@C@dERMV+kesVwxgQ1tFD)> zskV#qG+uKervnsY<*^>K;=StDxh8wHywf{^I@lsUb0UWqskx!vLAU8ijs916T~wXL zo9$0Ecc$E*+6F#7o|C&QpTwNTzvtumosRt^GX7L~T#f*IVj?U z#l1lqPVyf7Fl~PnoqrxHuF*(})w)YV;l=olDNXbvotK%ij}?B;`tyL_v zSgtqqmvQ_SM}Kh*B{y>aeeOL8yeAA?Fu7m57J7JQA4+Z8@_nIg8{U_f+Qy-lJjhzQ zGykI8KH)oTe}{4S743tPLy;#gXRdY8VC!B0qvjz&EvIqJZJT4tdl)tItScO~-%|{o zHpO}MsXO?C&46}Y-)r=IYrREX*Eof?^_-&PftEK^JAao7aqm^9+nDrbQ#$*Q`eKZO z=Q01$bq9})PoF+XLc@OzLgA-SKglQB_(UW{##cVUPx?ubrD&uN!z?xg{Ukogukry| z_ET~b{y|wG%Stkb$BAqgiCx6)5=Hk(SrOlqW#Q5%wLIW)XjjBt64);JlvNz}`BTzG z61SUHO@FZLCwVLFb5^k|n>;GwvY%wxxFgUDSynzQ`wZ`()-IM6@^K=s$gvX100=o& zpH$V@E>j{nr7h*t39;;1b3BqQ5 z|FyV4)G9Rm02+g9c|s#eJ@t7#=J_G5iQZm=XNnMw~OS}D)&<#9eS&%Pv@N!o73`q^`i(6 zYn#)G=VczcqW=2PJLE77#OTl`R)udS<6fx;=WG;Br_|1kCB?G@Ropm^d-1nM^Jz{z z%nh#c#r%`A>{LBfG2n@xLXIh}k!P2(J0K9_4Kix{e*gdg|Nr80P~ZXp009600|55| JQSHyG005BVd@TR~ diff --git a/Logic/Programming.xcf b/Logic/Programming.xcf index af14317..d56682f 100644 --- a/Logic/Programming.xcf +++ b/Logic/Programming.xcf @@ -19,8 +19,8 @@ 0 C:\Users\Matze\Amiga\Hardwarehacks\68030-TK\GitHub\Logic\68030_tk.jed - 12/29/16 15:52:11 - 0x82ED + 02/24/17 22:00:28 + 0x1D0F Erase,Program,Verify 

-
+
 #Build: Synplify Pro I-2014.03LC , Build 063R, May 27 2014
 #install: E:\ispLEVER_Classic2_0\synpbase
 #OS: Windows 7 6.2
@@ -8,32 +8,36 @@
 #Implementation: logic
 
 $ Start of Compile
-#Thu Dec 29 16:01:49 2016
+#Sat Dec 30 00:43:29 2017
 
 Synopsys VHDL Compiler, version comp201403rcp1, Build 060R, built May 27 2014
-@N: :  | Running in 64-bit mode 
+@N: :  | Running in 64-bit mode 
 Copyright (C) 1994-2014 Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc.  All other use, reproduction, or distribution of this software is strictly prohibited.
 
-@N:CD720 : std.vhd(123) | Setting time resolution to ns
-@N: : 68030-68000-bus.vhd(13) | Top entity is set to BUS68030.
+@N:CD720 : std.vhd(123) | Setting time resolution to ns
+@N: : 68030-68000-bus.vhd(13) | Top entity is set to BUS68030.
 File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd changed - recompiling
 VHDL syntax check successful!
 File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd changed - recompiling
-@N:CD630 : 68030-68000-bus.vhd(13) | Synthesizing work.bus68030.behavioral 
-@N:CD233 : 68030-68000-bus.vhd(70) | Using sequential encoding for type sm_e
-@N:CD233 : 68030-68000-bus.vhd(87) | Using sequential encoding for type sm_68000
-@W:CD638 : 68030-68000-bus.vhd(129) | Signal clk_out_pre is undriven 
-@W:CD638 : 68030-68000-bus.vhd(133) | Signal clk_030_h is undriven 
+@N:CD630 : 68030-68000-bus.vhd(13) | Synthesizing work.bus68030.behavioral 
+@N:CD233 : 68030-68000-bus.vhd(70) | Using sequential encoding for type sm_e
+@N:CD233 : 68030-68000-bus.vhd(87) | Using sequential encoding for type sm_68000
+@W:CD638 : 68030-68000-bus.vhd(130) | Signal clk_out_pre is undriven 
+@W:CD638 : 68030-68000-bus.vhd(134) | Signal clk_030_h is undriven 
 Post processing for work.bus68030.behavioral
-@W:CL169 : 68030-68000-bus.vhd(132) | Pruning register AS_000_D0_3  
-@W:CL169 : 68030-68000-bus.vhd(132) | Pruning register DS_030_D0_3  
-@W:CL169 : 68030-68000-bus.vhd(132) | Pruning register nEXP_SPACE_D0_3  
-@W:CL169 : 68030-68000-bus.vhd(132) | Pruning register BGACK_030_INT_PRE_2  
-@W:CL169 : 68030-68000-bus.vhd(131) | Pruning register CLK_OUT_EXP_INT_1  
-@W:CL169 : 68030-68000-bus.vhd(127) | Pruning register CLK_OUT_PRE_25_3  
-@W:CL169 : 68030-68000-bus.vhd(156) | Pruning register CLK_030_D0_2  
-@W:CL271 : 68030-68000-bus.vhd(132) | Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... 
-@N:CL201 : 68030-68000-bus.vhd(132) | Trying to extract state machine for register SM_AMIGA
+@W:CL169 : 68030-68000-bus.vhd(133) | Pruning register DTACK_DMA_4  
+@W:CL169 : 68030-68000-bus.vhd(133) | Pruning register CLK_030_PE_2(1 downto 0)  
+@W:CL169 : 68030-68000-bus.vhd(133) | Pruning register AS_000_D0_3  
+@W:CL169 : 68030-68000-bus.vhd(133) | Pruning register RESET_OUT_4  
+@W:CL169 : 68030-68000-bus.vhd(133) | Pruning register RST_DLY_6(2 downto 0)  
+@W:CL169 : 68030-68000-bus.vhd(133) | Pruning register DS_030_D0_3  
+@W:CL169 : 68030-68000-bus.vhd(133) | Pruning register nEXP_SPACE_D0_3  
+@W:CL169 : 68030-68000-bus.vhd(133) | Pruning register BGACK_030_INT_PRE_2  
+@W:CL169 : 68030-68000-bus.vhd(132) | Pruning register CLK_OUT_EXP_INT_1  
+@W:CL169 : 68030-68000-bus.vhd(128) | Pruning register CLK_OUT_PRE_25_3  
+@W:CL169 : 68030-68000-bus.vhd(158) | Pruning register CLK_030_D0_2  
+@W:CL271 : 68030-68000-bus.vhd(133) | Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... 
+@N:CL201 : 68030-68000-bus.vhd(133) | Trying to extract state machine for register SM_AMIGA
 Extracted state machine for register SM_AMIGA
 State machine has 8 reachable states with original encodings of:
    000
@@ -44,24 +48,26 @@ State machine has 8 reachable states with original encodings of:
    101
    110
    111
-@N:CL201 : 68030-68000-bus.vhd(132) | Trying to extract state machine for register cpu_est
-@W:CL246 : 68030-68000-bus.vhd(24) | Input port bits 15 to 2 of a_decode(23 downto 2) are unused 
+@N:CL201 : 68030-68000-bus.vhd(133) | Trying to extract state machine for register cpu_est
+@W:CL246 : 68030-68000-bus.vhd(24) | Input port bits 15 to 2 of a_decode(23 downto 2) are unused 
+@W:CL159 : 68030-68000-bus.vhd(34) | Input CLK_030 is unused
+@W:CL158 : 68030-68000-bus.vhd(50) | Inout RESET is unused
 @END
 
 At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 70MB peak: 71MB)
 
 Process took 0h:00m:01s realtime, 0h:00m:01s cputime
-# Thu Dec 29 16:01:49 2016
+# Sat Dec 30 00:43:29 2017
 
 ###########################################################]
 Synopsys Netlist Linker, version comp201403rcp1, Build 060R, built May 27 2014
-@N: :  | Running in 64-bit mode 
+@N: :  | Running in 64-bit mode 
 File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\synwork\BUS68030_comp.srs changed - recompiling
 
 At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)
 
 Process took 0h:00m:01s realtime, 0h:00m:01s cputime
-# Thu Dec 29 16:01:50 2016
+# Sat Dec 30 00:43:31 2017
 
 ###########################################################]
 Map & Optimize Report
@@ -69,8 +75,7 @@ Map & Optimize Report
 Synopsys CPLD Technology Mapper, Version maplat, Build 923R, Built May  6 2014
 Copyright (C) 1994-2013, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc.  All other use or distribution of the software is strictly prohibited.
 Product Version I-2014.03LC 
-@N:MF248 :  | Running in 64-bit mode. 
-@N: : 68030-68000-bus.vhd(132) | Found counter in view:work.BUS68030(behavioral) inst RST_DLY[2:0]
+@N:MF248 :  | Running in 64-bit mode. 
 Encoding state machine SM_AMIGA[0:7] (view:work.BUS68030(behavioral))
 original code -> new code
    000 -> 00000000
@@ -85,25 +90,25 @@ original code -> new code
 Resource Usage Report
 
 Simple gate primitives:
-DFF             57 uses
-BI_DIR          19 uses
-BUFTH           3 uses
-IBUF            38 uses
-OBUF            15 uses
-AND2            277 uses
-INV             236 uses
-OR2             23 uses
-XOR2            8 uses
+DFF             52 uses
+BI_DIR          18 uses
+BUFTH           4 uses
+IBUF            39 uses
+OBUF            14 uses
+AND2            221 uses
+INV             203 uses
+OR2             17 uses
+XOR2            4 uses
 
 
-@N:FC100 :  | Timing Report not generated for this device, please use place and route tools for timing analysis. 
+@N:FC100 :  | Timing Report not generated for this device, please use place and route tools for timing analysis. 
 I-2014.03LC 
 Mapper successful!
 
 At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 39MB peak: 105MB)
 
 Process took 0h:00m:01s realtime, 0h:00m:01s cputime
-# Thu Dec 29 16:01:51 2016
+# Sat Dec 30 00:43:31 2017
 
 ###########################################################]
 
diff --git a/Logic/syntmp/BUS68030_toc.htm b/Logic/syntmp/BUS68030_toc.htm
index d33688c..a91f8d0 100644
--- a/Logic/syntmp/BUS68030_toc.htm
+++ b/Logic/syntmp/BUS68030_toc.htm
@@ -16,7 +16,7 @@
 
  • Mapper Report  
 
    • 
-
  • Session Log (16:01 29-Dec)  
+
  • Session Log (00:43 30-Dec)  
 
      •          
         
    
diff --git a/Logic/syntmp/run_option.xml b/Logic/syntmp/run_option.xml
index a6aaffc..dfb2db3 100644
--- a/Logic/syntmp/run_option.xml
+++ b/Logic/syntmp/run_option.xml
@@ -3,7 +3,7 @@
   Synopsys, Inc.
   Version I-2014.03LC 
   Project file C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\syntmp\run_option.xml
-  Written on Thu Dec 29 16:01:49 2016
+  Written on Sat Dec 30 00:43:29 2017
 
 
 --> 
diff --git a/Logic/syntmp/statusReport.html b/Logic/syntmp/statusReport.html
index ac2d20b..2ab31c4 100644
--- a/Logic/syntmp/statusReport.html
+++ b/Logic/syntmp/statusReport.html
@@ -33,12 +33,12 @@
   
   Compile InputComplete
  8
- 11
+ 17
 0
 -
 0m:00s
 -
-29.12.2016
      16:01:49
+30.12.2017
      00:43:29
  
 
  
@@ -49,12 +49,12 @@
 0m:00s
 0m:00s
 105MB
-29.12.2016
      16:01:51
+30.12.2017
      00:43:31
  
 
 
   Multi-srs Generator
-  Complete0m:01s29.12.2016
      16:01:50 		
+  Complete0m:01s30.12.2017
      00:43:31 		
      
   
  
\ No newline at end of file
diff --git a/Logic/synwork/BUS68030_comp.fdep b/Logic/synwork/BUS68030_comp.fdep
index 3048e9d..6086b1c 100644
--- a/Logic/synwork/BUS68030_comp.fdep
+++ b/Logic/synwork/BUS68030_comp.fdep
@@ -9,7 +9,7 @@
 #CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\umr_capim.vhd":1401220368
 #CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\arith.vhd":1401220122
 #CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\unsigned.vhd":1401220122
-#CUR:"C:\\users\\matze\\amiga\\hardwarehacks\\68030-tk\\github\\logic\\68030-68000-bus.vhd":1483023695
+#CUR:"C:\\users\\matze\\amiga\\hardwarehacks\\68030-tk\\github\\logic\\68030-68000-bus.vhd":1514590994
 0 "C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd" vhdl
 
 # Dependency Lists (Uses list)
diff --git a/Logic/synwork/BUS68030_comp.fdeporig b/Logic/synwork/BUS68030_comp.fdeporig
index 3ac167f..2796512 100644
--- a/Logic/synwork/BUS68030_comp.fdeporig
+++ b/Logic/synwork/BUS68030_comp.fdeporig
@@ -9,7 +9,7 @@
 #CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\umr_capim.vhd":1401220368
 #CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\arith.vhd":1401220122
 #CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\unsigned.vhd":1401220122
-#CUR:"C:\\users\\matze\\amiga\\hardwarehacks\\68030-tk\\github\\logic\\68030-68000-bus.vhd":1483023695
+#CUR:"C:\\users\\matze\\amiga\\hardwarehacks\\68030-tk\\github\\logic\\68030-68000-bus.vhd":1514590994
 0 "C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd" vhdl
 
 # Dependency Lists (Uses list)
diff --git a/Logic/synwork/BUS68030_comp.srs b/Logic/synwork/BUS68030_comp.srs
index 1789330fb4f4d7f14eee76eb73a3f90720ab4f34..f9230a350d75b10ffc9680ac5d2e13cfd6a8f406 100644
GIT binary patch
delta 8510
zcmV-EA;I3SW3X9}GJllOYTGarhVT0nhxBHHILL{UHo05V!V0AwP1`GhktNv{u_aHE
zn|bKrcjR`34mL&!#>;~O6svO|y>*Wn>P1~tPT6mV$
zDWieoz?`HRSy>PJ(Sk8ujyR*VG7rp&m!D(gMU?3?cvk*Go9FkMuzwQWik?T{6pRI-oVTjz$JL;Ke`h!LahiK{jES`>6z)OXPSioF!+=}q
z8-%MOp8S!%0xZLlsBpXY?qXt`icQd%gz$|&Xeb1j;g{2?bBEYx&9Crgt3KL(X4MFjQ?AB%0)
zvJP2`lz(K)#o5`1Sk8+XcHS)E`yq_(TwXJ5x_xyNpciSn%8r53cs;RXkAdo2n{(Ew
z_8n}oI{yd^YtPq5aitv=tNhzRZjps|-8xEJ=6_-;YgNT4#p)OFR@aR0adNzLiQiLN
zp|QS*g;pv4djeZRlA?F7GRrhut_l7&PksRa0JE$D3ITsXi-Rx_h0o?^Bzy4Ek`gIJ
zFYP9V6zV7gdKw5=4@(Ss$YtrTUlsPGxi8_%P;n@2=XZQ$o6$J;Iii8lLHLElZ^})v)&Ah0)Mnz>u;ON
zw*OrJ6_)7-M@kTuM_}VGjd5MhR>1K{xTn31MmAJV#wjs&lC6`!{;oAJ!+;@=v+vzo
zsWE0|&0{@&>oI(p(=T@4ja--5apcnFba}g^(`Dy&5)OTOWY%o{aP$K&yr;|FbUC^0
zb-rxq7t(jP(1xU2mtOk;C4aks?G_tmc}C^B_&iMb_^ozqM`*AhY~$^iK`d6bCGTi!
zmTgVFt@)0&N!d2h+a`Hiv+u^x){Nq^?I>j4XfgN32XgY=$ynE!{^_O%GTux&wEyLc
z>zXl%UDNd=8tkrV5E8}~BX52fdGXjyDt)+zILXG8O`YzagVQBs>wiX_@nrLbe(6Wh
zhe_OsyF`uUTi|Ur%n0cMW)P5I<9%bHu~`Hj?XrJA4W>_7SB)b{Na7~0zs<*SMcBiq
zaKSj|qOb7kVZlE!e#zVo&&h
zafh?#ETiHFTzAPgDNGGk78He>O1>E|M~oWwF7MA#{W-F)PL|Kblyfmn#lyb|11?~<
zyLEZ}drie>XRX>LdAo$jHHBxNK$qlm|NX>%I~2c{bAJU5jDNck_EG93*+(GyAbB4_wGS@)NKw$i
z?x0Z6WQ%=l*xXqBntdAL+OPk-uTyqx-n*K@oD;NDE9to&CcvD0$PY1rIg(1>t@@FXH=pS+LgBwm;~m@ODX|lm$Ell0*?we~nP8WM
zFMrwXnl#;eq~-U??KGt`ARpbL?`8{QUFJV2ONSu%k6$M9`QWE#}XU5BEXnEotw`*?%|B
zl@QXCI+laX3C50jGD_(Rb*wHEQZJver!HqUH8ykhX)*h?A6D*z0qD>v&DUk}b9pkJ
zDeYDI{m>qaR#elUxE9E7!oC3x<+}bve6>H%^}}0yh|lx@Z}^>%hQogyM}Sd-;|}Ee
zfynjQnyD*POP`n_U>G_oWj{qbdw=!7L1#7H3!b|F2D1+A(pA`|g90z-!oe0OTL-{1
z0SpTA2y!2evTLy1%SSf2d|_Gl_LA+p4xoXX8@Oi>_Sd)jUD$^A01%SDm~kKOz6p9@
zBdCr`q@9ZafdU$|-I(-`)bgL{?+oVFCJwF!D5
z()EIpf5{t^ITf8c;797zQU6{=SieDpl9p4jgmGA{HzF!3iybz
z&E3A38$6rdv(RS`;T78%-c=CJzIx234_`sQrs2cAAMV(d5il?Gu776i;j90(-hbzI
zjjaBvk0fQSA4iBQV>jwYVPDK0+nvz)*K97Zk00JYT!m~0kS~~pSKge>{`FD%;7@5b
zK0)x$LFcC^>%!Mgz^}&*rMtvnA^Hr;FQA-Pd;*E%Q(zJR}2!8VkUI4kS_}S^;A2|IvSauK02fQ_({6#06KZlUH)X;JdE)k>LQ-yShtQ
      )pU5lN2}^vIj^NKTJv^vE0ZvVe;5
zfh8An#PLa7k~d?XK|e0=@~mC^gDj)
zewnU^K`3cyhhdsF$fU{bd+>EO-;`Xp`}{0<6=N>h&0})IgbhI4cc2;BjZgg65{m$B
zfO;kh=8oQflR78+HEfdmJ^S-LdCxPb6JSktnyzY-5#igkj1P5{&|5G>;os8u&M
zBo%*~5r@&Xb${WY)$WbIc9UP{Ql5DtRVCcH(0Xcr7lqZKC+e>+pe9)_uzi+zR}=?
zFyYtZ+|j4izgug8_g{(_0Lr`g4S<@M$7}uWYyIv|`+wcP)i3HJa4c*$jcplA9GOZN
znFbq$WbrAF<&BKRUa#K4k8ZSr?s5k<2kA1d$M_s4p(lM-mIyX|A8>!Dt((RD(
zKcYoy`+rvdK0cWGIte}17HdzeGNwd;noG9Ab}p`|_?=sf9AGMoaohI_-G5FCHmO2O
z`%Ye`^+Dbsq{Qp7_+L`F*YIel%_pCxwhX$)7EI(AETL$Pp;E<
z(M&a(>BngH$0yhQchT%?H2WW;8I4b_qj%AaG@8-JXl}LA|-?0w5UN_@IJ$IT&n~+#qtPG3_pvx`TOB?OV=DMV5
zS81yK20Av57YFIFpu{-*1mnatT*8vLVvm%)aknusVP#0{k|K_v=$SyT@Z%XBk$<-P
zf0JpxA5;1_+H&Cscx<%r=A#4Hpz8NzoOPKq?f!8NW74nZ^h-a<+@i3U+if08Y+Ikr
zsQEsym&(b@_)%NFsu&~2CK3#3f@kn!ayxB}RY$P
zR_Wu-yM69@oW3bX(ALM~=Kp3cn19D_%Rjx>cb9SW-7?QRcC6EQ`g5(^!;lM(Uc<>05P&0vFPG57HyZPMw=5ANNr#qYt;XY<*7Goj{dV>8`!
zi}DS?(zTCtUeS41TlRoHdegl}dMV;}nvPB%*cIN>bq7FjGsa9l;?;^iHGj7v7BB)3
z{=WORx?kE~8-p44wy?kK>^rUjDdJJ`JNodi#C?f~`%c2#7AGLj7>zSQsHw??9g=G=
zW5k1yJ{L7CyvRZ5`=jFOlc%oiGZvAvB!)go-e=j{ib3;fIre)&z@aV
zv8Z|W;=+TKK1SEOO7a}CR#Ygkgdjz5x*4iznc8ONP_`ktuiE^>x42F
z7X!>TT{||hR%NEIH-FmnqE;^P!K}ab8?}V&{OC@F{DV90jxlCydFRK;&XY0HB*KcW
z80Fur(4v8jX@RHHWIc#nkdZqcF7Capbq&M;$id
zT*X%-)J-;btt~xfex7s1cr9WR5mzND$I=?d2dxU~I56u;B^T9&YPCOuro4ruDwG9i69c
z17;_0`Vwva6@RF4vc0=&C`ZhAB
zCD*`q!4M%Fw$r%5U)Z+p&$iqjoYNEgopqQ~@n?Z{thdki?YWZQAt}bwSicWdPLXXAHQzJ-J+)x8ziuD79
zZl-<2xPN&K@<7!4?XuDq(Z@{LPud>~TG$U?SMz9~hZC$Z=AcIBpobB^cs8Rp(0?U1
zp!2b*@v#{D`(hooia}`gYkD200sg14_o&jX`*nG}SvT{I+*7*Db3C}O154qz6lD7Z
z%Q(ILKw`dPkNsJ|=5)SEUaM)@qO<`_b+`Sr?tizNK_YU6z;B}sX}%wjQ@>rx5OqkU
zmPfA_1pDW-`5Aegcg_!eEni;2N%Ny#b6m&ms4E(=J7Vr8tXAaj8r$f&2XrZnz>Y&+
z)uk|&1pKW~u#u=IwOW7c1eT5kZ#Ug`j0ApfQ7;tZKEa1+&H*Fn`vh~nT0DfG1kPZ-
zRe$jh)j5WQS$;*wlPkOOo8WsL-(bBr=*AQkWmMA#gP{Ws%AJUTXuRP}2ie_{2WEaS+sx;*ld2jo4u(q9B~ZJ6Pj}zc8nTQd2GMi>qCSGMWMzai
z&!I13U)yScU@j*5eL$n1p3EhaxJsW(CV%A==Tg+lH_oLc?&J-qk^`xKNqLW}m;%;Q
zzoN6rM{7sVjNJdj_0elVnsoUzsm81)hIJD2I-@<+-)mz@u-*W+4{_HP@ioY(#&6pe
zyw!HUf)P!fqe@}<@`d;pOd+D2kd{7u25%bP}5@#2RMlJSbxoq
zuo37p7+*zBcWh+Tu?$}Cbv%PLnNftOZ40E*%!Hni8yb8ZgvvG%8ZQF
zilVH82a+MK*kq+VN}TbY7$^48dw!{^EKZ^D1h!chP(0M%r8*8`b3-9M9&ssCK{5^>sX%gk~NS02NXC
z=n1G!Sez|)x3WHy5xxj~5sTnHTll-6jLQ}EIU)xtb4M6MOK$Sqjux|v(FaxSY`tBo
z+VyV^l{g>9H8ZNtTAG;SReyOPvpmab9!#ulbpCXwj@dmV1+CL_btJ}E9*JX@>vew4
zuc3;8QWmQ{(PCP0NLMpzcul{N5_6V#MDn1{>uJgB#5E)I`%K`UNXBL>dcKHp)Z%?a
zkHZyym`=aZmdLY#O@4vo_iT{M0CfiP{FBN-y>;G0o{{<}Mu7EHx_{zqUB-*$zMTCU
zs(X~#600b`PM%Y(#|TN-=zl6&C;E^7clxh_+2T{o7K8r7c%WYYso^;_kG2?RBu*;D
zSfCF;bhBH0lQmBHd5_XAmeu63;KZ
zb6M9V>XKGtTJK9dTYsz96Z6oX(fd}kvDgmeSNwK7w{~)z;#}5wwN4KC8Rbom4WBvb
zkMK%=&Eq3#d|DsP<0E2xYAu?^Cu_sB@#%eu>&mmF^c%Sib{@+q626t^Xt92v(5;N2HT`tGLOD`##nx@$Bz&*Zm1qJDSds=WhZfmK`-}bu;<&skLgF^OHCM^
zyz0Y~W*?qZad{OVgrmW=sQE|#QROx;PKy4FlzTnS%7V1wPrr7~9rm@JbBXbsKGt^Q
zsS6q3YN*o|xPKYuPukC+B#q}#3Y*h-er59TRmQ|jQyd_-F~mtqOtHoH5rCkS*O!KR
zr$OsG8~O*La0M{LXzndWiI-yr`8|g3MNNsQG0|c{Wjwf#@!)*4~za@J^$4_7A2c1-l300$A2;J8;k0%SH~~!^<_q!uIS2>
zHD1C#Ro(?rvt81k((*7(HeB@AGc4_FL=>T<#l?BC@=T19VR2pt;|x+pU%~3aR(#~_
zgnp*0>Fh+24{N>OCVNtb8gbLntLP*hBhr1hHSS2m@~o=nKep;Pz#&b%p=kB?-4lM`
z8b6>n=YJBgEM{tkTRPf}#5)L7t`!u6kk21%I>r3n;W;xgx3A|-L5^Evn3KSg`(TP#
z1?GZHQ^XJO+0v#a(#}@i$AYnVf8hrzmSWnN!U1*FH$zg5t;X8>SE})pSmY%$oPa(@kD-fGuux7x74@YGp#7%bK&!oMcM
zM0u{zydun_$K#F!COckvM_lLCmTeY*@9OV>!Q2JmB0;Ol(@$UmG+@qS)sLbQzSt8x0f%@x57?|fporoMm_-iQQ7WZILH>nx}#s~O_
zvwIq*YMu2lb^^0(a}!&RIK-x%4XM7%TByoqk>C*7KCr+N*MZ8{bu-
z(Kv|<*zJCVusK-2m)9Q&T_o+6S$|@W>Hf#G!1$)Di__O~G5fsmP&Ow-tLG6XYV&#?
zr>y63WIfO59rZl5Jk~~!TP%k;MoKd#>Yb#n82lPaA0>4Ugj-{(eCmQ1>b`V|tz^7Q
z^V>`RCdU)2u#6{U-uavLJ<2Y}AYxllFUgB{M5uQ|$-cAj^q%HVDS7OKsejaKt?zMB
zcs9l(W1w5Xi<|fJoIcntFmjM;5HlY5cEt
zzu{hKBen_pgj+E5ed+t?J|PSm6!qx%>V1BCzYYHnR=Lj$xQ-ykm;8XdwHd3uQ9MLa
z^^Oya^EKgr`D~+)^hT_)@qgW7O?GnHZ#+X&c^857FVGjL=UFn^Q~m!JF;Vs2GUxw!
zoX$JPiRZ%s#k*-@<9k9Xb~OQv)Kb5d=mUugkY!^Zye=Yo^xVtm^S$?Lpv450yz
z@5W*sYY3{s^89(QDss6oW~O3*FE~hIQ25#Kn)aF_-Dd4KTrbR2r!I4)91N7gE2-dC%!@4hW+2>W^8guqIUgk9^fV7T#v
zU1$aOun+Iy8M3f*o&jB5d0&wJ&Y9u31NdiSiMjxT4u8AUviJbD<$@Fuj|;jN
z#RT&Cs-CcIK7R#XZObcddD)i3|JAldS6E0%z5mc)KBB9d{EOIyXU!P3<|1$PnHqt?
zR`(--&7{{)B2XnHNqUXB`ywYJ<8BC)@qK?VKdgtS;He+OJbnR|#je>lh5ruBCiNVR
zj;Zjv#E%E}JkPCS&dt~%iS5`DYF4jouA+-
s#G=7@vyYjdu|0>r$Vp$F2y2r-~R#t0RR6304|?~Oc!qe0BvV+BLDyZ

delta 9799
zcmV-NCb-$KS+8S|GJlg@YuhjshVT0;4(ZJXagd$VZF0A!g%wIS`gJ8RvLxFgw&Y22
zGY|dv9l0OS!Nw@T*cQ?`&-+R`=lE!PU~47wQb0Mv-KhIkRU3Y>l3s2HI
zWi)V{$Vj>(OUwIo4(Eev1(2NFLS;?&lFpSM=WwO@BEn5ST7OkH9zJb9L%LqCl1PZ5
zrgx)z4utzgIdG=(duAmtExO!g@9f4gE_08LF|kpl!ZV1+i8@Gi7;qzf
zi;y>C$hmI@xR4yOHKh55q?^?m@UZjed;a$Q{_5M!-DVaNZ~AclaF?HvB?(Ei=Eq(J
z_j3CM&V)o8^njM}@_t|McLqu!$nnVV`VXDAuFY&C|XrUP8s&b?q)~F+lSlD>~ce?a{cw?
z38)(fL^3&zB&X-V|!xB9s)IVw&1K+
z-8~ab*g5RV)cvI)eYl2T%4LN@jFUu
zG&Yp6&}zkB7w}6+QV#A_=4?r_WxhT+`V9a8|Ff&!HZP9<-GF`r3xR?fCA&_dZ+v)Te5ys*~1J_3iMH?*+bJ*CpZ<
zpJ19kdk4(cpnCL;=u2&}?irv^K9qf9Yt#&(R~_WW4&KywI_@&Ld9cQ#H7BT9FHn69
zZAb_s&kuiBaHKD)XwJfjL`Tydc|0rC2deXo0%Nhm3&8W
zc}+_^Z#168b5@%Van24ut2#47JIWwT7%$TJgfXh=rY~{#=}_6$z%0ffwHZT_-l*+k
z(YFh`9eah8$x1K&yK&Fn&FH*eLmPy2e8BtizHSr_6W^Ibm4EySm<+$(--kQnHTwgz
z$pi%l0SS}O3p4@dlNb!Z1>yL_zznn5459*mq+M-~+Bz2gTz&lHe_B`q)
zvB#Fv<^7UPm#zCrGzi#{_h$3QV-Wh$16y{c%gKGG^=`x7QODat9hz=E_9+M%-GzLA
zx7hHW->p0se-9Hn{#8A`qbyudzVUawOMASmOMas+DeDruuK10*qO2?Ix-zdz94~>o
zBu>h@qlo*X#oQks=*jyqM-rNN#0z2;?mn?FqMR>A{`@fV
zld&f%ZFq-7WMjss!}ia^uubXKi(BJ=$>tq<=fuzkpprwKfZ|;TuQ0hif$hl@(q_al0E&%rdU2<
zt<5{{os&@Md0ry7Aqzf*Y)3bIwexv5WL?$oif?w^t{?i(?BCZm@83`QZMA-XNxt@p
zu-3kJ?3%yptG@2TReiY9)qVIJKJa_k{?Yfly*7i7+iTTs?0Bx{IWcuTQI2V`>vF$$
z;0dfNt?YA>96UzH3mB(===Q|eGjpS!bRAezm%?7?F)p*0r<;tww)^~kpWU=y_%K`Y
zyQke93p2`JvgH%+-@NjyeSgD$_w6B++}$moS`7Yku5Rlt-$&>xg|S1wsR(4g7iZes
zv!9=F{@K&ZGJEAW{d?Zd+BbWi4PW@@{m--g{p9=4dfy#bSl|H(|IFIHL#9>C$9}-$vvio)AcReoxZD4zZcvR2JuE+1!!=|z)R(;p)B}IF{
ztZ8+fB(Arj3!cGjq#UxB4Cg0d&0bnrzOPW*Rr?C06r}mS4k=d^a8L5~hNe9}%-fp0
zWO{8#zBUBbM(DNqj+6m^YhXXCzmxlQS&x92QT1q9?>STRf9Bsa=uExqxk``(o5A=#Klt+Jcm6tESD%0W;IGRyzi+Mcc?yq8U^~?Y6V5H$t)_hcqs{(#w*UU*
zuWNgZBA*-7p^hG-`L39s{odGyAYKgp6X_+2S2cfAdKhn*=6_0m7h_iFlEb*%UxE88
zV1ErC>=hwMdEmojH)i3K^1b|__VvJ$F^)m)(fA-rc_ADDODzQG2Hj4VAA5{bC98P1
zNBit*UGiViul4;J=mEMO?xdoTHOgDy#o=_FL5D-DuNdbWrjRDqPZ
z);Lh^z%2SWpBD}y?kO8)eWv8tWZ2hxmIxO#ATWhf>=}W&Zx%Df2Wpo>vf#5fxXzoY
z&&>K;c0&RZ(}gxtX~}5QMyPaL;Ax#@D*?Kts?Y3xtqq~`78{hVW>5o_bbA831
z+mgF{L)m=M<+H(?Z<+?5`BfYA6KA+qu-3f&e8nfO)H;p|AV^pwNsBq^wqFKnU2gbm
zzkPF`?T2mtvd{QW`kDXEH%h+KtfXO*fI1~I@wP++!sreoV+tBHvWaG#X_;l@jPw*`
z^awk$o!|3+k2|*O9ewOWLLc}W*coiLin=SGMgFX-o?E`6tD-g~3pQeGv>3G(jdEec
zR;xySww`fahkG{t(dR$Eww9-M=f0Eg4a)siNB!RAe}zFW3_h`F)|t>wqik4pN2~8$
z_6+pNvhN@PhwOQpDOuKMUzdhYqe&|`vO#Y?=)?Gn|Oa8nc5(##O99NzX&wB#)hN7LXKl@89FD9I-K4!-r
z59Y_mhcNP&tn)ksc5Ip}=**6$gRPR^KyqR$Mk!mN{6;zbyyjPKn@e0%i>A-gI)foh
zS-viRldsE@@l08#((WJa!Dz*D*&=x|RBK`6DcHHPkTr@=rSQi4>s%K9iXQNr4#>!$
z6|rdW@i+n-I6Uq^r#w=rdWeNO;Opdey9(&Z7#R`yTWetzctj7{5(
zwu}Qq^+ZZRlZ#PY-A|AQ6}dAVp6>Op_y_k}ui0ONZWsbpN4-xo3RJDf;8KJ-U=t*6
z5;Bi
ze>30E@@5ds=4{i&`oXusW;tWeWMAb!E&oARyIYi6pp2MEqfg<;v=a_?Vj=hpu}>(u
zuiM;x8-!d4qgTHBN}l908R#V&uBTup$x=3B2U4lYNUAwE+U-ww%RA0xclYDAJkHma
zUlZWJVxA7jTnEenz`%~0C)7(BY@Fg$i{Px(fF{Q4UvTCB&E
zopy0fi1!QIuNf;_vI%_-H=mfjt{`v0PP%!TqV2zw{C>Cws7rq>n`}7%q$Q9pkS=Zc
zvvB!r{)X>@9uGG?TlTmpTjzY&1Kr&_CpSvkkEKXlFGl9aK3-UL-}dd?uCA|-wKh$B
zYVj6mz!WukiT?}UQvS(*h~|1dZ_BCh7sy>F2L5tf2{fp&J2~z?vhYaw$AU*n9!g>Y
zJe+_y(Y}kqR*(uG)pFENJ7ETKs2_|3lXC1@ONzbpH`zt8;+$V0_%YRy{h
zi|xMF+I>A~_w{nSTUZldjV<$XnWOPK)RE(ZJb6Fon`ONg+p(&DkJ$dUMSj^It@UTW
zAHZhFG2~|Fx4JzokJUTk1lzwj;pD`xjJinsA7Bxvl%+qS{;vJTdMwD}|IgfLZEo~*
zZrblj+4%omM_Svr%KL$lvAu3ee%fpIC+kSnE|u$6f4BQ>k#S|uShr`7gBTw;-BO%e
zlq%h=e}{IdS*QAcJFc7dCz0M^T%QvIwfQG~(OO@$+LyF_SJ+oMU-D;rMQc1(eLpbq
zCwoPILG!e-H}&_*UWto)MQvXP#t&lRv7mQkXm8UWT>V}B$o&$wPZo3&pjqRKAOOz+
znhB6+vI|(Wy9E1P?zylqx;zM}u=#%Ze2@e%Xo016OOV@tG?zOYW^`6C*~}U-JGMKK
z1_#GrYyk#}Jx1L+)}RY=25V5`2Mb|U438!~erQp(W{vb%kA0N!A{YsvIxlu;9RtI<
z2^)7+#%Ez6YyTAPF|4up)l|lBo*I2j6Cn*Pq{@@J1z<}n
zeq(5dMBCinlzjAi<*q3|!He*e7FaFOcrj_fi-@_bn1Y4*1Ob^QVRPc59q}G;caF0~
zRN!iVVq?+n(f3=u^YVDj@)*cavP%4;E`z~FQGTo5;5a+-c@RB@4;`QBSV;$cxLr2*
zD+qb`Dd?nAWuz`pjE3afHX)cRb(`fS$ceNhuWYV>c_c+drYio<
zuOgpr-Ky`4jdHnN_bb@Gsd{@Q#@*(=u5Fy?*h`5CiNqVW&=1u*611Oi{SKVS{+KNfU)xgad5NJhF9jY=
zoFnT6OVP`th_n#tJM8AmaTAGldg
zUiuB?*cUdPqL1hRb~xJ97*jl6_jX0x5EdUK1aOfDHusEF`?7ptI~IynH=6m;^=iht
z{&fFks%XkPP($+xP$ThNpnM>I#?+bF^g#-nt-N2XnuW_q0D}PxJOrZ|^Br&*#QM^87Kvyu{FdC-A!VYwBks
zGfZp>`5vT8>g0S6^QNF9)clKF80G7ld}L>1v9OP4ed~2Up7y`Cp6<|${4HN@J+^vD
z2ed|~a^t1bJciEG-Nl$0QE}K9o
z|7!B*F7bF%Z2N5cmu+BwoFVL{K-s2noc6(6vJp!9YmC`w`)3-JaXyS+?fLMF#*yo*
zKL0Y@BfVYm{(5-We<7tl6Cfu*TuA9gq>5X~dE82D+-liAWxVeDGhYmI+$?+N{c(sN
z&tYm98-^}GjYyA)Z5`7(c3kvaxyD4T=XL{@t&WA9jzyfq+Zf}2jFB8M#+f+vv6030
z4BjT&3f}%sxruY0!|S;o`<~e`29F}rr=HF=0vz#K$B{mBWm77dF_8xUU@i%PMJ;oi
zPGzE&lUf!caK@OsqkZ&4zBlnI{XAs(Up+RYT?8N?|D>*`<5K)}Ewznm$CobAb}Q08
zmLvgOs2urBV7I;kcwao6G=p8?dNur)f@r=1r
z$Vb|y*EaT@(hGOQg*NNY2Y8;iV}lhOm7XcRUd)bJz*NkQ(1V+ei)V6hSL4zLikM;Y
zzF|)3_~bc%{jE8r)|}E`&dIUnO>z(-Ll(J~i-TC8wdJhlq*>TkGk!V9)V{7n&L6ftW9L`2*2>-vW+9)m`Np+#
z#g&yJ91$e>-1?MjUz)J(l+vFjlz#3Oyu(H$R|+$NPz
zR6MJkC5;UQ#{FFsyIaInb)BD{(|2i&KXl&EYvCKS{bZJ$LP;f<=bH0vXn%QshnN;|
zO0;_p0B){!pK_3T>DHr8m`bIG#&+*qc3Zl$cwayfn3XYQWF
zR_b{S8S5y%DttjkH(iRaHO2L`uE4f*ED6W0_wVz-l<}#^&mOeCF11~DWZiN<-P(SR
znqz?qL!&O9WSzP$`lB-=tm{{Q&e*|Ulb3?NnM-~~ThBC~D|tELukEk+t40UMm0I7E
zGhd@MTh#aes>k}nHQ&oGx$J9wh;WT_-+Ge_DB7B=o6f$--?k-kyV)LbW^)eRavH#0@Wm?w6>incY9}Ynopz7g&Sxub-3$lqe
z$+j}TTDZzK*t$xu**P6NjL+)j+qmMJJ}cuUVXx7S1s!GT^ao`;*gC^zVpbHj!>~W)
zKd8<*S2>*8POk7xY;-D^A{dTFotjp1tBbrV+*h+U*|$Nzq=Eb#8rr*TZSt5E?$YZP
zqgT#L!J13by8hrG_c5M-I)Vnzl^1@VI)<>ZUuip1u?6B4DW1`*#*iuK`-caW&k)(R
z7GSWh^4Vokj%Sf>mpqS)q79|vrW!vdcsK#$fEbr@MO|+tANf(?fu=I+9Hz-HYC5l3
z#GMp|v+&J{EX%q%?XqEC(=*d&Heqjm%SI{UBEw1l&(6cCxNgCJ_aH+}jLeGnn=*G@
z#&0yfK-t<9D@7Z+Np|VJI`?ZOPs2gL=d<}{!sz93J6nY8Tjn_%%@fvKC{Y=KEUyalI}4cHv(aF$yjZR4Q6n
zF=oEOxTtR1>YHMJzGcxb^0gXg&%efarj^$!4=p)1dI0+?zNxgQb8YSR8pcQU_=>ox
ziQCr4M~m?xmeliY7$3z2w8v++RXm$-F{#=*--U-j@QMpO--0r{;-k=fyopM=EJDf=
zUgDX6Dpr!+=z%{(!DCb20OB!~AJByTY}``M`!U!lkNs(XY^%;-4q0=qknur)JV|0N
zaku$>7ka#-Z-cJ(6>VZOH>I2M+<@4ugUU%cel#{Vo~Oc?5r`~D=lo$_*ZK2QqVYVH
z?LV{6GM&34qO`kDZO6=Km7KtA+Wh{DJl$Oq3X?C{lqaIG7q)!g|1!N4|HRymM9~)U
z0;h^u>-$xIoHIG+7cjBNCjWrWCAs87lubTF%Xf0-Y}r|SbSXb??=zE6uwR$YcFvZ~
zLwZlxGS^+WFa4g0DW$FP={^iQdt)!ua7Xe7xMSo49@n|Hc$Qelc2RDZxzfcs<6@lC
zWf?1L(kVrIou*tIol9u;faZIk_lcJKbjAAXlXF>rs3R`efu(+;0`)2d`jfV;Jp?=J
zM>eIoomJ-lX!{OqvIJ!};F+f1sMfP!6P)A_+V~_cbEnSQ{Z*SUX|fMb#$wx!dMtHa
zZ}9_e^OkscjS%K7jua0~r(aZV16m?KPgS1D0hnoA^G#Q5a&y)g
zLJs@h-&PKl1eYI}`8w`tMeNj{M+lSDNy$;vO1m|rA|{Gv?f2Pt2Y
zl#Od%g
zdF~>or|0U5eBef1(t3Pf=!oX?xn;~tT}0u30uNA@Qe{iSx^MCBsV-kso(tc)^6yx=
z@6^tHZ#m}dfXRO^&cKxK$@pJ6J&dR9U!50K(OFJ@*2ZC8YTtz_!{}Ou3tebvpXqg{c+gn2iw#`6mHiPS^>z`txuDLO`99>AT-GXo@k$)FK*mU<7`Z{&qQ65V!
z&$!+3JU(puL4ilCdakLL-sSkXsN-mV3~TDe#zp*&)S;070{&mH7R^$ZR
zc{tbg*uuHJC}NFCz!$+TWGXKv1PVp}0+zMHvwU(K`W0DGp@Cidf*o4KmTbO%!C2}!
zx@*MLR$r6$MV}x}74Knl@uH{tnI;}4O4njz6`Ln1?;kWdarbR=|3rf
z3mXh{6XCnnhO(r{ME1
zxIq0k9WQCRcR~3HOYFEse-CC~2`@2sadi1e#opCfr;$EeRO-lKLoC0d=VO&S|1W=j
zor0iJ>&>TqW$&yg-z>n6Z=Q3Bi5K4nfB9f%MWY95#hwh>t-D%(@NB8lN5axaJ`X>1H+&(xxmcFzTEN%O}$~=oaUc8D*KVaX#uAg&il!NHDEJFs^y*vTQi}(`te4^gzwb{*8>*~CHdgE8_N2%P6Qa!U)>b55TM>PhU
znr|E9gH|6p24~`bG0q>|yXKdE2<6At^nH;}5Wm)9u_t+IP2<-5(WIj~l$P{KNKBMZ
zE7uqLypVlHu*CEg|A~=>i^X5FkV!SD!z|ZKX5(+;L`zNxxA-53dP6(?0
z7k#TG-3goSM1}57_yluyVrg=Alr5p}cg1@NYBqeOtbtE|Q=8vyAMY-1&Wq7GFiP`a
zu3mW`mwgwcUel(sCVg}gSF>~dN}oxbW2iWd=T3eH9;eb^qKJ<`)$l;sR1M`f#|p2h
zK2z)NES)Pq363Sbquy7YTDg1;YkRJ|q3q)QuGT$RHLP}8u5q?qcFs1?z5x4NY&FNJ
z@vN*xe~!_Aw-od|>RWi!YeLWH^>gL2p}dsogrukknCBp$P4AaWKBa8QmiHBWi8^5t
zUOo$^=`YL5xmI$^NWN}Oe*OYeT5Ci#51jQ;K%0N;qtMu^Ha44fjNGc{g`D_lELymL
zwT7LS?4rK{?=J-Xh+@V$jhEBL^Aq
z8#DIbZm$>lFtJ7WKJdG(LC=qRD(MUUQ3`+I9|g-1tw(sL@J?y*9bX0EywKr7=LTTi
z5esG;pSOAg5FI@~n1`zz#{mEku_uXxPE<+pyRhNA7zI3@T8TY1hAxAjyFMRmT57zo
z-Yfin|3pB(cU3+}f_I+d5TkAv)}VLV<`%C$bU~?Yv2PG=toz_^5PS3%n>S5kb@6)_
z&(x`g*{HXQxc|Pl;DhjF9I1k+B871zxJ-&CdnbfmIW@o+0x`fAIy-
zgdYa2LD<{ukSDsoLo@chC(}`RPpf^0E8anW5)Oh*xa&nQYs9*(*pnD7g
z9zOd1=&|+o?OV0k_^(A7yh{B_-?G+Qs;D9_c?+-XttJiGG9SaDwIq8h->OITfvWqq
z_!0g=U8(9SQiIQ_>K6%4=KWGldqrKD|ETIh(OXTT@HzA=^C3y>m%c3<&d2<=7$VJo
z`!!8dtov5|WX4=Jtm+n@%DnDdRW~09j6&5_AFDCL95nx6U8z2&szj}oEEYhjwR)?Y
z#(uFWS^TK$%Az&ZZ~1dee_X9AbzK}*J_@^TUeNmQgs~Aw3N~L=_+RJi^?W`r@-fgx
zT!H8eIwR(Q3=txx1nt>+PGX;RRQ#}i^OQB>ga@{<^YKmm=fGWc23^auF9Tz1x@ha#
zxg0zHx}saAl$*E_^fL~x_5JR|_8pqOw2sy`m_$d0hfIiPL`4O&;{D4a&-dmuQMS2}
z$5uQk(eWdl_hF9{{df&ADUEIQ*#lK)=wF}M5~Zzp;=8JxwLcd>n|>SUa!%cUgIDBh
zXr6D%&ou2eVgwt*#tB|Y5CdiwxVPDd((k?=X4#StudMUcP=XgEFVS`(4Ytd*jj41F
z+V#$_#GbSrx;p0TcE&zx%yn9^(F$#pVo%jN)!(gkv-T`O`ZV`SqwUaS7igO3JhxBm
h0?9gfAGiN*(rUNhKmP*&0RR6A0{}V5sEKcV006-**o6Q9

diff --git a/Logic/synwork/BUS68030_comp.tlg b/Logic/synwork/BUS68030_comp.tlg
index 7070e15..7dcb0d1 100644
--- a/Logic/synwork/BUS68030_comp.tlg
+++ b/Logic/synwork/BUS68030_comp.tlg
@@ -1,18 +1,22 @@
 @N: CD630 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral 
 @N: CD233 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":70:10:70:11|Using sequential encoding for type sm_e
 @N: CD233 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":87:14:87:15|Using sequential encoding for type sm_68000
-@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":129:7:129:17|Signal clk_out_pre is undriven 
-@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:7:133:15|Signal clk_030_h is undriven 
+@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":130:7:130:17|Signal clk_out_pre is undriven 
+@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":134:7:134:15|Signal clk_030_h is undriven 
 Post processing for work.bus68030.behavioral
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register AS_000_D0_3  
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register DS_030_D0_3  
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register nEXP_SPACE_D0_3  
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register BGACK_030_INT_PRE_2  
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:34:131:36|Pruning register CLK_OUT_EXP_INT_1  
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":127:36:127:38|Pruning register CLK_OUT_PRE_25_3  
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":156:2:156:3|Pruning register CLK_030_D0_2  
-@W: CL271 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... 
-@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Trying to extract state machine for register SM_AMIGA
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register DTACK_DMA_4  
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register CLK_030_PE_2(1 downto 0)  
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register AS_000_D0_3  
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register RESET_OUT_4  
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register RST_DLY_6(2 downto 0)  
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register DS_030_D0_3  
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register nEXP_SPACE_D0_3  
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register BGACK_030_INT_PRE_2  
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:34:132:36|Pruning register CLK_OUT_EXP_INT_1  
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":128:36:128:38|Pruning register CLK_OUT_PRE_25_3  
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":158:2:158:3|Pruning register CLK_030_D0_2  
+@W: CL271 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... 
+@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Trying to extract state machine for register SM_AMIGA
 Extracted state machine for register SM_AMIGA
 State machine has 8 reachable states with original encodings of:
    000
@@ -23,5 +27,7 @@ State machine has 8 reachable states with original encodings of:
    101
    110
    111
-@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Trying to extract state machine for register cpu_est
+@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Trying to extract state machine for register cpu_est
 @W: CL246 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":24:1:24:8|Input port bits 15 to 2 of a_decode(23 downto 2) are unused 
+@W: CL159 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":34:1:34:7|Input CLK_030 is unused
+@W: CL158 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":50:1:50:5|Inout RESET is unused
diff --git a/Logic/synwork/BUS68030_mult.srs b/Logic/synwork/BUS68030_mult.srs
index bc001f98526cde0cf2376fb944c6beae9262de7f..3bae7cf1298170a51d8cd9823e0c314a088d0c43 100644
GIT binary patch
delta 11275
zcmV+mEcDafX8u}#ABzY80000001JFl&5GMF5WeRrhJ-*1Nst|9xACcMn!`f7TQ<8r
z34$yu@eo-u(wNj`AHE}ZTWAkG$!O;LmFM$0bitF+^!qgR@r2e)W|JA*8?qP)t^tXR
z1MlFV2tFANYXL%(#kyQ)kc;e=w-1BsENY|y+$+$cyO^+lfT~AJ3I0V5kl!Xmv0}*1
zcSFE)L-1zz7P9TOSf){;@?9L_0`8n%!Bc|~qCe491p~^}Kni&3VF2>~Cv4f2cXoivKp&Y7nL}$IYUQ+nD^fEGk_l}b<+XP;Cannm1nN&g
z9N)Oe*3Q9ym}KY|_#bunU@drN3`uSQ!LZx9*NJceK0wXg1+4lp4GYj;cGEYHHL+s`
zHdrBduu3mBnLT`cx_h`kl+%}GD*t6kzI$1=y(NqxPA9Y7^J6*Pmr`QvKJUNnACEiB
zO`^_^LdwW*SgB~FtkB&QrsuE{+kRl&zv43{@?j
zm6VMNbu!#2ec|EFJFyl^x=4BEPWnnp>(8i1iK`EM|MB@SE*-URyH&DVW}B?oY%?LY
zllS|d0JF&f)d7F)Z`#VU@aOVZAbg|?N@Iao88BZOOsIPlo3Ik}v`VxBJ0)FGCx#@w
zH&^$6e`eO+_1f4#dY)gU2C%(vGqdwP>rWp2M4EPJ+f713JNQEBgzi3EL~orr=OMkk
za{S4)yBqrB8uhQc*RF9%`(xq{Yu7IA8kg+4PsVh3UGsnGuIo?T%f-0qB)=!!hrY8J
zFC2GFYt5nGy`~2H%Ui4-;9ld)?&bq++>GoSXJhPcjGKr5_S=qsbMxT4k2n6!<<9Sa
z+4;`p^yY(c!=riF=I0+CZ*JU8`|@ghb2FJfx;OKih@Xc%;xOCI`IT|mz3$)KG`w0v
zj5qbij>msCD`VAmOqaDExI?=U59Y(BCD!9i$NtLOFvn=G+Jw3E!QrIKEh{p`8rogs
z!EKKXx1F@*@NdXDww*lgTxPgld%-63t#Q%8ISzS4^y^M`j}Q00b3q$#^G?JYAs7Aq
z)ipeWJ?spFIsLXvYh288@nt+=zR_;~uR}%q$zp%}Wye+%wle(jYUNU=FJQi)-7%Yd
z+5GLf8`oVpyibS2+W%o2gstlu51+?Q->2TAc;2AhzaBiccr@5%~8NF%z0z|e?wZk`ec6sI*V-ECQ;O}V}>-w;tn5%2vfH^-nE&4
zo##6-ZFE9-0&!`$^slzZc5T-Hq&VbpSX*_dXg^%RyglPDTwvQ@j34I)&BkitSj}`S
zo{YuI$KprF;)lnY<5=_PtKCY*YJDvot3`hsUk{D-m9~zLwZ^g5u&!PL!(KTIdq-i|
zI|f6Oa2U(v&7S=xVAP|@C(wesquuso%yypp=)>M=bl$K(j&$PwMUj@;F48ptp0KJt
z()9k}@d%DbV7#Yvyr=5%o{o(7bi#Nhj%NllyYrpYw>IU2PJQ-$%ZWXh(d62Y5B7gx
z+o6qF<9mJRrhU8Z9gOTdLrQA&aV7dl+O2SJuG*8`;&JR7Lpsmylk)qYuIMLI@MU6J
z@OKv9K8Lqk64>V8md3N~^KEDnJBSDL_ICEXwL@YKgZ()IUE}>q_+Y>0?KY?lfIe3A
zua(CpiybgL|B=?_!^e1)^gl4IQW$?~eMHCmXddfhe!P$M!9D;+{AeE`sh|fpp@#tJ
zA(%5e?)|EddS-na4s4V5Vpi{se$~URX;X6$*I92=|JB>tW@zG=U6%rQ$0!#($A6%#
zk+dJy8xo%u;*;RtSkPH)ZwUt+3R)|p?_rGc#6|jO8#@;SWSiEASj!>WiU)t&BWpxn
zWzLDm?K=DCr89bo>vih=(|KVp^>`#`y4~H4cWmPNkKRMWq25dVA7Gy^BW*ovTu%Uh
zTNm|KonEwRt$jGu8yBr%t9%_7D_S46TIGAdrJus44cv!>5&UHr&zy$*f6bTL1;+?Pc4&W(=JwOCpR7Z_
z&#?brv(ERbvGJaUhi0N;5`y=7Y*&S){nlY4`u6*U(NX6&dwCm?4lCZSOnv&hI*X>AZijdi}mr)xOiI-`7F@PCii(+D@s*cGav%D1u}?GU6R0(uZC{>bf2yxT{XidA*hiT30Z58^
zqfY#@M`#D=os`mMuQO`=Bvo=xw1>T2#)HLtgJdkAWUDt?#y@|Tz*&c*pJlqs66PRe
z*MxR=efQD*FVHwQ-lSdouLPb}(ic#75RdNav>xA$cC@{zIs5CqYsB^8D4`|5WrVmy
zT@)A}wKg6rYtv}dDMw?G+JM)Xrxv9T1_8e(l^ke`J0S{
zoXmZe>0-ZWVhQXV0t`_geR?9@j6P=y>59
zWw?KB#4`r1TfH8O>-QIpr@G`Nmf)wBMdGnwg_7af=$G-WfCkw}|XLYtNu+5FX3eTn%$)!DE3D^+9Syx3FyiT?Vk`b*cv
zzCQh8xDS6T)|KmX_*ISF6k`MMieul_*^EBl?v3+&JG<4^te%A%rThbN0#fj;-eLDo
z@kM>cZl8y@YJBAJRserzquKq8j%Ky{{WZ)QquKDjT&EbV=xjK$7XeV@_M#Hwm?B(eQEOQEy7v%GofZ)`qb?YB+!XHEVkgLp_Qbple%E+83F!)y82)
zo1EIG*=9oz=)vzA*U+W2XfvdLVo@`KeeZd6Lso3MF`$zns5;d5y4Qy9ILvF0*}^A}
z28}=;_dw?*z_=*LjBY28=hlM>r)Cuzweg?vNN9WUF
z!f%5*Cg@P#M#uWTAWZ7sY&p9>v476u-s^t}&-PA!_Lbem_iVO2Hs3qKUVxt;?e7T;
zfj9PRc}kxn!k*9`09gGqYskn!7(@UA*ME4t^4SKqm^b#X9G6`_)-I2Z<3B#Q{)Sx{fC%5Y8nb^d
zpgu&r}f!AN
zGUd>>>mBPmaM{$YdGB2_ISE$8BY(u#*U)aWSh3;MI0~E5=$p`yNPK)Bf?R+8Rv$f~
z{%{H(3QvIz@ywIvYHmE@u&Z5dcU;bT?$Nzyg3LK-FP`{Z^e6lPb@(AOkKzdZ&Bt)V
z2v@S)XZ<$VN$v@-LcV}{7U2J6-bdcMRz~j+*^4XmW2|jr6JoE=?1+1IW)pJy!*)6K
zHrJWWv1w=Dr)?@ed3!rpNnd{vL0=KEd30v$w#N@bIkmYrb6Ye@n?AH%HBW-uo?MKGBwBurvdV!`Xj)p1@K*Z*PO}
z#~=q!HD(yt1Ks`(oUKhmErta6L0OKlFcTjL#%OptcV%1uaB}^t>l=r9z~UVCd1Xvj
zzN5!-Qh2BsMB1ma!F77NBJA;lKNVMTZT{8clz(76i+^z0Um)Vb0hj$P02hYgc#htm
zX1^!&0DR3e9OJi>`OSY-f9RhN)?wP;jvDP8p1`J2pUakNH*caZZf+4C=4l)3YP*Q*
z!abda0>B@c4roeuiJvj0O^##02=*Ch3`p-~HuY^R{A0QCioUK_){D{KwYfcL)6=SU
zwcBL>aT`6?P2A8S=gGRu+WcZqUv+#`jEVk3!TXB7J&%cV;%Z@ad3)%G}&h@XZZ{lPPIA6qJn%5%y9}4ay
z5`Ur;?mg{!9X|T?f-gnnqhRXB@HLjOH=8D=b(r=U3DZ54_*3*g?|?o*E4|+=v+s9H
zDn7v$T_y1@BJ$O26E-7BVSD$&e)Mu{zGE+O59jp)Qa+M$o8_+9#K4)ureNxiRsSp7x+EcRhS9~dYF5H(YLidZUp
zTOtkQ_zLz9b47pH-f!)DhSM+%L7s#`C}fI~^C;uwUXn6&%ZTEGq|H!X?#X|csU>g#
zYvxvhgEW6`%!1x_pyO2cUD045*Cpstn`<>jacbH$h>J_~l_Dv2rKgyzH!
zLbYDxiSSgXjK9)eNAXkG7gRo*@yj4tU(gJYUO<1BXCJ0x0SAD*!gb+#&c8NtXyy|n
zN>&AcXA9;#=XNM{sWHlMk29yBJF4pl!!etRjzPy&IN=&jMB<(abB=(4(lwtw#VnWfIIR{`>f6F9o;0fv1#udjB~dgx*Kks1oxPo
z0MBys%*L2zsw*xGf9&{lF$Swgd@ti!qo#kz?Rc9lm2B$M#X{#lW#17;J>+E__Un6X
zCSq@Uc}IakEAvFKzsCJi+{fHgkGZbjz8(|WXvldA#WkEG4-0zS#+(4yUtGXpVe}V0
zPzTd%YA@qH9{r>;Uq$f>jH?gns3bNRROKJAMvtF7zdLTD?_coLJ~b9FK_PcAUjTn)
z5PgYdevIy?e-GS5eawCBL1fj$Epb4#|pB+o>f7v`Vz
zOfKT;x$iQE1o!OsU!7TImy6i_s3a#LD2wyrxD~J?+FS#iB=9SaIYv64pjL|G{(=^+
z=Xk`5tG%1MPJm^~HM|G!n0uu2r1yWoT9bhY%iR36>q`EC&A~^5jF0os9z1=_a(vCLrxk%@2A&K18T~+F-vGaLU&THqcl0&BLrGuM
z&5_RD=&$8qTa|O1>SN|S1o>fxb9;_Cc~X7?k0_=2QI9H`g!Pv02h7LAJXo+n_H%23
z{Tzy?MmBB(?5;yRPUtJdQu=?2q-Xk4S9pL^-Xb=|SlP28LAYBr`X
z=2M#hMTK?o*q7%81(bJO)$7^>K2Du;{vD4d3w{w2pOw!MFIsE{YRZmQ@s
zgk98xJgW8w&-TaB{#rimpq*BX&r5#}`ecHpjsBU`j}`63
zRv$0jOAW`B&lLR0D%L?CFH7y`D*w#z`BvZ#=Y{y213|-Ap}+ZrVeJt!t~Shfyel?#
z#&q&U(Kq&6oWs~*lg)n@TGjUCxuy9Ssc**$!S)8#48Rr$|Ei2Hr?#5kNB!LonSuRk
z@n_{zp*-&osKrU&5o|L|6%ByFomq2X7p1Z0l*di3wfJ-51MC}9`e9#R#phtpeKuBX
z<@i&HcgrSbL~IMR&?Zl6D!}ebWue>N(eIsE9c)bA8PM7GdtHBgvhVfY_BH04!5%#c
z{pi<Tg7L>Tc&v7YqwIK
zhiK!(4lTuxgbB_OwhWLpw@@}6>KFG}_?4x8nTOAk?;fxt!&9EYd9Iw}Hspp>@=Mf(
zgkBVaK6b(F9DR^p76*BznQxHYFMCD1k+B{*pd+aqfQ)}nH^acP=kuoUJC){w8S{LMG84g}~S^tmBwK~_mFxD{bsCV~xuJ_77Z
z&wD{R^T6o_)I;x0%W**&rvGj)Dcad@sSgu%yj-kW(jAUtn}HZs`XSSLGvSAmG?wHq
zJgIpUe$@rEl-YN7H8Lxo>
zftT~D-#G6B@k=uwD=dkL%6bTk@wyzx>kP;1
z{|JslvgIW>4$+>$?|d8nr*Is~{EZxrLn3Rv$-l*MnXg>dVIr(S)9f3Ig`?MG&IW(<
zg+H^2Bh|+5^5Kfw(4>Ah^%u_PU}Pq_5W26{^hg#T^c=-MbN(cv{BNFSqZHfb
za$!)1I3`m>olBs6cykN*`Wn$kth_Ib9QB2fN?(}PcIuStIu&vs)(~XyTXUEm;YIib
zC&4c$g=AtH}P+0oFKrTaOheyGJZH&%W=m2E3@
z=AfX%u`tNVd6idZuLEKNL@xTFf2e87H4%c90=kTw?>_@+XHm!ezHv61a
zUf1FtmH7>r7g1LKR2D}p+W%>83&vy%G2`CB-{=eY!#Gl|pJVX>eeNJPD)ZX3_+zDi
zxypAzpKnj{D;4?hdt!evZB)%&)I;OhN3O@bYq#w;#+1|=Djz1CV}1g{At?97V;U)21UNxuptX=n;s2Dxy2KsgVdyG1K5ofP7skw;a?chE5
zd!r5IN5OL=@IG_B@oF-mHM2U7dpI7t*5jcQy36uf*65GAdPILz*)?%ii58z$u~q4_
zTH9t|+mYa@XQY{zo90^hxB6)G?B}v<))l<8>blNjK_8SpGlI#p@PU7Mye<9}jms?F
znVv<(T7(Lxviyzytz$7(kvD&W?gx}39JugdVlHd3HbswH74LO?`kKa5q+e4#GuTFo
z_YPm`QWga0wzI-O`*fAOX6#QNGtHpo9#5o!>!tVJ}#pKGab>df%bB21Fijmgp32Z^VjRb6)k%+UW
zu>rjnOs%zbo!~f;8!E=PcTK{43ow_t3oo42v;27B!?v?Lx!dRY?S3w{c0I|J1Kw|M
z=cIV1RhgbH&I00G=P%+6AIwwF&iV-}b#mNaS8Mi&^6fqR<$`}Up5@tXz)RdQ&@-K^
z0u_r0F=f#vCKvi!RbAIn`l76|Cajdc=}WyOpMgWFBc5-Q;jlQX^P-y{w*4
z#V|rsY-A2RH1)6S?N8mWU#v5Pc?q9OO4AA+QXc5_h-n_J)}JJ~onYJT)j0jwWxgy^tC#Cz5T)(+sk^JXF8IHc
zO+dn?kPX~K*&ypBm28mt^)X3u;EQpZKlHgIITaYgA(($4mBerKIA?l>AbTT8%w)s!
z@tb(L7mHFcN`oZybh01Dny>K>2fOi!+hPnI2J&n|nBNoXG-=%ZN!M?x^C(o!<4L}m
z5I7&6hh`yj)oeqco$#1#7=r9Cvki-F6+gMJs~q|YKXbu$42$(O%BHnKOibk=&RowM
z1{#
z{gdh@Ih|0yzw)y=bJ%mp0&%}?X_D(8{m*GGgvzhC1P=#shq1+ijXhoG^SM)fLC5J@
z$7xkttu{iRd!V;XYAarIwFL6~R=v)rkW(+N;l6*A^)m9TR#lsqo++C4@s{qLoJ>mh
zdG5PBKUDRTo)wz*^Hkc;lh#lAU7ib?)w~eQ$AdpIwn}pRu2^e?u?@L4*!$wyELRxECrsUtiMa8ud|9AP)^1NOc
z@0fqRI0qdism%xjB_~@q-LJBqh$2Y=e1KOg_XhRjA+~WESStgfSC&@u`in
zCxf#3p*{Ub>KnNnD5;xZzK+ym=yROu+s%O(8~c`emDEcttUrNKI4Jzc^YDDR)c1+J
zLYzSbV_1|qm3uGeYch}fM|J+F`?ZFiQ>uSM7jqSmKAeR?_3Qfg3OX(3v+MflyYf+c
zjVvdkpkIfF=xL4B5yFOU=J<5D@yt{oVYE-meY>HlZ0xG*S}kp^X7Peh-A9)@7qqv`
z`3g;co%uyG_%t)U*^C0DOU#)|>JqE%Qc0gx&xkoD`iJnJ@p@)IR@xLL&+9t&9BqGQ
z44MYK=-U@{#6tgLZo5n#A^&=0plKp$hbSZ3hwdpGc2%#|#cOR@mlYuH;Un=K=rmgB
zH{rLF9X;@jKChGQf>t}Rkux7Y5oe~NOu@LJ9Iw;O?EN%nCzmUy*;R@bdpBKi4rf{)
zr0lpfM@h;ZeXm5v^5S?m7Cf{pUypyq9Cc+q=S}is5z~}se-~q$!+TYCXQGeA#6#D?
zM$zoCSnB6s3zX&Gsl5;D)aKKX{t6;%RdKH&pD*YXxf;jxY
zK8CgB@8MgWM$$*4M^5&UWA3J2Q=7&a_1sM**H&@4tot{9Zg~bhj(@1W1?_(g0u~@x
z9$
zozb`K8om#q)OQ$*{iS?|u|d;)DEJ~R^2t${*NcZn`(1T#I9}s5eoqadsCQ56Fb&{c
z#+^fRweZtru0DHD2h;Gl*7weP_!^!~T%wCL|BY^+@OP_Hw@2ByvhsiY4rPV~GK03h
zww>K3cYYPl#id=q!Fa+~w30Uz{fxM$k?&48-60*8_$h^rS9ZNa_G1qEoHD=19Q`%(
z&=UR{Sqr|GOO4lL{xs|o=M%yc^fpaBwlQE-y+eX)xe6xi
zS#|c$z|6f{B9|jD>?s~bfWHERAVI;;t#rbmM6b&0k3pHP8Ki%?TcvtvD);u{RQkS)
zR^@e#`|%I5AJ5a|Evd9ql6D(E=W{uDZeE#An4V|d`_akxYMN_+2cgJw8`Pd0k$>$E
z5q&m#op&_J~-ixdABlXd9pa+l(
zL4`d~Mz?u;ASi#c2lnVzw-u_+u#~xKfj9?fZlhhK@}11AW_z=G_?(@GVuqOCS9mTt
zSK;Gg{4qUOVfV4UnK~b}S_aP3{KStK+re1T$4z<$!$+-_f^0?pq~1^ZtX7*La>LdA
zG)^S?&5cQj8WU}#bbcr|KW4QPN$$EfCvm^f7r|N#y{~`Lc_lgPs(r=02+pfLplbc4
z^CDc$OYcX1*Pg=~i7ZAFf{6lqe9dif7Fm$;c>Sys%;EEZW6AR=)AIqvxrnNtU_M6`
z_RL&)TW;r2aDz+4i*XjVak(<%>V7V$@@8^Pe9A_Q1Srn
zY%{Ij9DaW|Ef2St$AmH%HEUSmH+nzP0qQ;IQuay{0>Au>hD34n_6OHHbp&A(^hBI70*_b*R*rM)%ys`
z?bQ7|I?>wJJ>6^M=OX`$ZODXx&YPrv|P#5?&el2|8
zp&Wm|V7Er^$YGTE?x8$0XF>Z5nSYLFLxRl9JyXyPls&F;!0zksf_>Vbg7G{Q++!W$
z3x&?OtXo(444U74?;h5@C%GhwPgUA|ar;2-M5_BM`xal)Lc}=_P4vB&z1IZ{CdE^$
z-VsxE{Q#e-@cCx^nm*MtS+#R=d|A)kgXe!L?TC@TC%X=vTm2qgI@d?3|CKjX>;;(K
z+O&gco#s^OXHJu}P6cq^-}LF;J%r&mHX0!wx394|ut_er2xzr37BlqPS^Nhj7sh`~
zGqJJ55*s_Ywh1*GTRR^@KN~#FaWE|tWKYwyL@uTtSGo$ab7;%+LIQPuZO)&mwbOrc
zS=77s|67rv9V`mVpLChOlK)>e!IkJ
z6WKQ6G@KV=di<1_9zPH}E8Z(TJ4AoJ3q!$*M+BC{gUAkLeLKcr^>e6DpB29JFuO1F
zOfuP;z0;)%&j?dC>ZrWx-`DhI^agvK5&1qqs?kDrR)QH~t|7__-Ikq>|C%}vpe<0s
z_xx^ub*EF{TYd82D_Wi2bpLXuW6;eXi0-kwoIx!9$8!=wd2S2aKPP{ouk!DT
zaFRa65MPZ3ySW%MHM+il8_X#x!@2Oiao&#}d|K8<*K73HxBmW^RY%{$q|~n%;tNGl
zu7I>d`&@sQiVMzQc=Fy`|gV;`arib=qpl`dae}@HgD;
zPOLE{SOaErG$B$uFgZ8Y%*nCzn)LaZ9okyvb8dJk-P$Ie=V03Myjp*JM}e;YUl4|K
z7rYSGLh=3ywO_g196iV6VwsPHX>=86baf~;r07q)r~DoIsXmWAf1p+E4=m=Ae6thX
z1awTZSdTEeR{7Swb>y6MR
z8-Aa?i(g54FSE58gdE5rO3t&_d9cJGSjvjtwHzH?2Ji9S3L5x>d?PWh_ta(f3hxFG
z@vojkwRZtz=l6e?=?rCYCH-9j|Hc-^d8O~V?~3;YyIy;I?NdNb7Sp$aHRi=P3w1uk
z3-@aH3pqBSe%5(D&y$qq&#o)#CBj0El9cmCIo+!|xq;nOd7t){H~(iqsc*E~4-Tw&
zdg*nYTHkey$Bsw!Hnn!wz#t73`OF-}Ie|}5iokNgXaIlcGVn>nbFA&S6K|2!E@-j&
z;ykbyV1nb7!}i)0>ep1RGZ-KPPAPW@?Sp*vj9M4px62l;m%eiu&+`T4Fo32ctKr18
zQj~Fo`-Z`sReOI-ti=p1P-ZQgl#B`dhZ-1csxhyNFmn;`i%CioCWxNU#G2jxb;6+3
zcyLx|XSIK)s}E)Cjd1J;)*BYbCa~TT4dI(~!^nh>Pm{`f?U-v_S5oXhr<
zbyqd<4s6gF7wP-#o6y*f;LDjA@>g5ND}f(22Z&eNho`60zs4Tm%Imr-Z`1Z+MW@j=
zu_SHx^)s0D^QI{ov}&DYcQPGMM<0~GYv;O#=RAM1e(ljYC+Fu0mBIgWT01BFJpD!J
zdF`AhKaem<4W3ONhO0GB&w27wP_1aI(Ji!1I^yDgjVEozubLQ4P&rb5GA{h(qAgF_
ziYIY1@LD>MxSfnk(x2(L=W-V5oX^vV5HW6Y3+D{C&y%*IFcg*<@K)3<+-kj-0WDgEGqt~RUBwDK8A|KGaG9>6U_;sx*0
z1HLtqwU^}{j_kDiU^<&IY2m2&k
z2(ql$kI0gdp2EW|hkZ&Q|6lqr6q>!iChPMxc?F=fU0qh&lpgn7UzksqwLlOQ}4v^nQ#5!Tf
z&UJ&wx*>SCdk@)myI#goq;g#t!UFECN>~&F1b3o~^ctkCfEqqSa0(?mhRUhF)s`e7
zi^L^P(|Ob+{Q%_tPuQ|4XUzbmhCVPIGKW&mSJEmC7o=tsB<uBf~_#bunXbd=J^iggBUbEY(SCMc5&O^oBc`W-e4GYj;cH=jX6|rLm
zHdrEeki-|8%pSiz-#9{l8
zB&z(F3K94XOBu8fCECq;yf|9^Avk-Yf9PqEtHUqE{@@Y5Ur%243#a`
zQiw+SDjII2I`eRIm#)$!orS2mlfD$fxEj?cadDpSKfN5rrK56fmqfd)cDG9N)or?+
zeAvGNv&sS00e@|C;yAPR=iygSc&iRnW?ZIF88BZam@uBL*aTHUcD9mIfi*)$BqWAp
z<~cca{`=D{Tekcb$nJgay(fTey;y4X%hj#cXPrH5*JqmhP)L?)3%k@3nYkfW3e4wqHv2){Yjl+#`bN~MW%MEUB?gQ`fCb+pc
z1cR@Kz`dB=d@ydrZow__>BHmAjkmQfE+;oP)7hhUv$)xbPh9K-^mhB{(zxhd4Q_5)
zexoJZn|}op*Js{$DK`rwZCPqVXZB~JbLd6(i675Gvzy2
zJ>%Z9CWdFlWd;0iBxKp?l}M#Bof$-sE60
zId*>FMzq!C@C44K;n6=VpB*gEfJt%5za0sx3$5xHt=5kcntg1W7t1B
zhW%q>Xc7T!nWEiyUga3|Y5WPa;2mhsnoiik_Z|aSJFV_3)+dloygw+?lI0;?6W|H!
z#v@Jczug|e_6W51l(hF$-`>-a_MT2?&&2l3aPD;fCe6J=#jx9)|GgK)8O~{ZZGR+&
zrLpbO*1Yw1bL1s;d)5J34%`tX4f?p2b;RY?xHi|;^ss!K1jdLiviqd^{^v{j*_3>l
zm^S>KN4L-Xc27db9NyAszJI>uCUL@ONN;cF&wGaxa}<{Q2y~72YsUxcHE;J}V+i!I
zrhlw`HeDWo;RTPhu^2r@>$v`*X@6Iap;pK4cpdFybu5n8v3au&7$b4C4o+(5!Hel3
zM0yAp%!&FB&2iss?)lI$X+L7k{`jHE_ohS5Vbo;(ar2?ScT8?#n>~-h@J>)J_-=4d
zSt~9-YPQsT+BlyC|3;F|B4?DyzKz@A$$ja+4-}eT%3z%#--dW
zwDa6LM_$&NjvBQ6`LhFS0)JQucg}atGxCpTdM}z_tSb8vvGGqS^ON!Bpj$zI_~zM(?@=Mn$IsEvI=+^)5%(z`
zhY4u3>8cg73n>ES2q
z(!b|e|HHidcU{|fPn(B!tYQ*^_xf!9{eix&((j|!Rf%tnY3r%~lg%H#v)9oootK3i
zgGD?BK#w%}tm{X!_16oG!89HNl$m_9dvSihcG;M|{(fO}-2Kg7UdN=%s_KyUM%{Q0
z!k8Ar4gAHjcim?9cYl+g
z(5Lwe&gEX1&hUlKpHOByds9^Lm6uk0AL{h5PBX3(sFlz6FHfqzw63@6fjTa+4j$J5
zleFuPyV1`+pJKT3?~mGs8B2alS_{^m|k}Zr@+BH4!d=1&7Xe?)>^5QTcBkRr8Zyt?!YV
z>rMPlK*_vAyML?Bs9Rn;pkH?7ngN=%W16*X_}lF?o1GPHuDZ=CT7|n%SxdH$Z4an-
z_^+wwZ%5XDNq!G?5v&XJ4u^KGJB{mdU$0x8+W8uFu50GKKiVL>+rOM>&Yq*F)9^@DchS>rlg(Stw^{qB
zkJt;)!N>FQ9i5NncU3ZB-kRUl@tyJAd|s*Z_&|H<8uqE-23O4TU559m0eZ8&gYy2C
z`DDh{TX$qw(6-;ZG6L6SzBOUXfIJ#>2Rbm;MSq~K?QG2~*NETsggTjFnLrOd*v+&BW&$%nZYdv?F2OF8COuHyR;bcHDXh92R57U(=A~v7);&S
zfVlhNv3dh|dNy#U`+>`)9C*9Gfy)LncRJX|_Qc!c@Wpr6Yi0zanS1ov;PP=MJ}@D5
zw|}?$u!J!)3>Qe}$h#c~GaA;>`VOvZSf`GEXtBgDJBgK1{9iC8kL|Abh
z_TdVy#iMlei{;m4zsY_*MeITH_P5705?#jophTX~KZ!x0zWI%H?;7KybxYkC%iOW~
z>RA2fgel#et>$;E(Lbs00{Z@|5gmQD|9_5WzvE1d?p808Hl-I59UU{%V1cyDjy$)!XMx8agG;tG+)F>0T)4~|JzgB0XD_&aynhVX
z7TAM72`=3!n|wV%1{gfH_uhW4ecE%lro{=*0iB)Hw^Qm;?-1)Z^y2Jk3Pc!
zBf)3i9`6K0MBZ|gR{Jc*Mo-~eL3rYvaCULwJsxd4p*z+vkIVSS3-97syM35rv;py5
z7!$_!&-*Wp;Aq|5=vOR{U{e45a(}-KjUyhauOoqNJW?XKWH3(p_4-Uu1q61^zU$H0h?Klrt&zkRemY?t}
z%*QX}xufUk==f#6o8!+hF32gg!2Xu{3qN(7yDVOxQUBM;Gza`kV!@~Ad4CBueTp6y
z*Li||hjoVUsnb5K&fR*EyLNa|Ki5!;lf^B5jH-h088T^i7t
zz`dNXQ~6oUn`8S~(aJG-g5xkAf0Mc~iH?s2=r`Y*po;-L?nmbFF-~w?#$K8Par<8peC)k(@M-!Y9m|dH(T!gfrjsj_O@Yu(4)a
zG)9lqXOhcZ&;`ctz*2GKuyl(%-IRw*^)Jz
zZ4KxYW#oqt4!!dH9A2;`8P)*y9ZjxFKJ-@KfG(&5HTu-M!g0ykF>@H!n#R|Mdp@F#
zbuJdcITQM`T+knmCx58Fy~<%*x&F>LmDh!}AFdV7YKG|NcEsY$!DoSH+`(+>0&mRq
zQOCfFzZs2vucRsc((BmoU^?hCKXVpxEYFh(k9p*5!aOm*V7rfaM
zXGj)mEKu8Cxaa<_1UGJRa(x*e%Ow%<8sEqbqi}m;&xcpWl*VWNsJ*azp&f3vvAG`
z&#jF;3t^5(C4W7udj*Wmp=7Am9!Fn;qHXA0TcBUT;c~safwkq@tHRZ8BQ~ecw-Qe%
zV)>}MKHtu7f6?l4qvu<-enordI6D}*GcM$N*I{@+u5)8q*(UlBVm&X9@Bd=`2z?1v
z{Ymgaxu#%j+88?sy&`HJ6J5VwpwAR9jCFPyyTxc
zALx%&u1<-mCgZKXr#Nde#%4UmCh&rIj9=LIh_Zg}oe^`z@q~6>fPd2jgI&k|Zy;af
zvCx|{-WC`qF=zenh-c#bTnf4!FKHT+Fka=qKY#pWuk)4k-`3Xm7i+%gbv1vozs4`w
zXGI-E&L@YLYRB`5w!-S+wM3g}6JTGF4vW7r)u957dId@K3K^Rc;`vVI}oH`dJ*Mnqp%x%$xW{;*=N+m*y&(EpBeNY!;U-=UiCkfiHZ
z*@pX3z_FhJV?-Ln{kt!34pZ@K%%yUDmIXU;S-2^DohU
zS3R4JX=rn(D-3O?9oLs(@OgbAyAGPJKQq|`b(pnat~TE!)78k%2KK*${wg^)L4^jM
z1N}eOSN%GU*@xLg(h~Jujm|WgZf}rP*n9)J@R?Y%sWH2meCVmQ)qLqNhPp|z4u95H
zbUHKGr1#-Q`D0#Kr)d*t!dOqSy_=_Ayv90U#0zG#F^Sjn%ZhdErY74$m|`Bn>j}`p
z&Ky<#SFc*mlIu(_pVGB~?;73os&tSi_Ha#3d1g-|&Atdh%z|DV!cg#7kBVh;jHmq|
zB^j>lvXae}#7JvAUSPZkyrn4)j(@dH=)rOiTe`Kt0*_;Hupbzsg3kg27fU0UxH$Gp
zK?8SU(8)3|mahC>s(0oLt?seCA(yR?wPI(rBgqG=CS+Psxu%
z@twUyQXen`9T>}{lu_UNRLLvZx4$2{bEQv9?CKr;!um#i8H?GIF%%xy(pLd(wTQ+i
zO%6PQhhT!eIP)jL`ZAVG?-$0a?fY5mn)Y2ji)*^e9{%3WGhZXd0HN=<6t5Ll$EHEM
zm1EZ;dS5pjSOkZ)yh9nQt$#sD7fU)=D*30b>+?(P`t`5gp)nslj@PslTM`0f^H<%M-4I&S84cg3IE
zxEX-&KsRmkB;Hl>aNx(4^aMJlKHvQ+TEq2r<+?Y_xBLX7PLIf;R9
zXJI>~AZKz
z)o%_1vH|{&am#0G;iz(3?sHu~sH9QGc^VtAc4=K%$*T)75`T#u7E06A1X+J(gZ<-F
z+w@@YD_==ESJ71|rcU7tslTEQBhc#uy*Jin^Reoc{hK=4TIB5ULoky%rv(J}W01|W
znjgQn_n8sye|J7G1j1mvfCtHITam?e=&>_dUBKCPP-BWcwDr0qU4OQdSPqam>3ytM#i(R>Qx1Qy
z5wk)%ld;EfKMy~?%6g~t5aW;AuW<~Ej_oAlkj6Wua{@2y;O?GK*eU*k{St|NIXzJA
zni>OveJ$cny4{$qTe1Ph=4=p4vfJsptN0tcB#EX
zy$0>laF^gcaePz3CY9?QZE>}>FwO+(Zx?t;#d%Mqb~A<@k;PeYM%lv6l2dyztM(Pdt;FvQ;ZeHdGyqj
zx_>h6ivS%x3>|xct}oP;UkQ^qEz)IzwIY8=`>i;_sXvQTN~EeUl{bn^b-wg8nGtAP-i!Ce%wnuTAv^g>4Fp
ziM=3VHmv&{V{8AmeF7b*Z69vt+Sh)QLVx=dM4Q$o(eI6zS@QADgrn6}lJYCtCWW=1`+tpo
z*pug-9BIG$-C>&Z?GsTw@BGbqCn+W&eNZ5;(3V9X0{I#1G@yrgxW^InM}nVV3QLT$
zpqJu%JU*=Ht60gHt|DHusPf&+h4Uhw7&nE)f?{mb7%ZvbzPY~?_k@mzRPE=Lx-K;`
zonYdv-;LKLds5|GfM^5T-Ub6|Cx89In(asw_K&!LHZN)0Ft?_T>DQGl`1Q#tw2J#_
zGOP!B3Hl9b=P@jJo|k=Z{yu>T^CKu}jz{eQ_}Fk0D}
zTP=&B&t|F5JmVjkj|08$@SnNCEJry!$o5U8GY)i{QtP7`*a^1C>aXJ-)!#!pM&6x|
zSqclkv)G~bo|NL26m9M}rXUd9F?Sn`tEn2Zfnb%iX=}8(9#mh4S4`uKlo$l>%d&THga)%2D4
z<#YbAJ
zYRvbV-|R)%u0>oN^Fbj#Wme25=7lQU!+cKh9uza~AI3Vqg@21T1}EV0b|oI4<4JZF
z6Useg?H1GJlwHK?D{$Q$7F4K9!(t^izX=y9UMl&4DOe%iGsbDQW`^y?am1l~UhyK~
z*c|w;!)*b)D2~a!U_pwhtN59ePmnzCXk4WAguqjQ{~%Z|sSOXJ+7
zdVV9C
zHLGGBtM(UegX-(Zw<`7`uH*bSe1l-KV{S|pcdd9!fqy?K%&^3JB9>B>(#m0R9m|Zw6z17
zaP}%3DaVP(umqKV5%gq<&nCX40(Ki?(ZFj@!haNmZ9AaL*hENwgTkYU;%QGFP5Y5x
z&?P)Nx2O69zGlYzG0Zb3j^~^+nQL*V^9Z#!80|duy*s4%DU^K&{J4$Dd1Pe#ndqpP
zIUFm@rP(3$I?1Vt^p))oe?RZ7^~-8Hsaxltr_Z;w<&XHYq>pIK>+zZj9pGKOy_laz
z^?w<2^ms{LSdhA2U|mfJZMCYfsEWKr(icY`u610hb{|6B9)weTeZ_dQg5OK-jgdA6
z^S~Auyvr7->(>$c5=RB7hfCX_>6G@5r?z|NiYi+wl`~CReqM{S>9Fpqzkm8BIzyW7
z7e{>)7VbC9sgcTLAz*!QVLEmp4#qql2Y+MM#lhst=3;(SZ2d9cL4ws3@TE}eH&B*9
zi!vXh+s?-EZVqI@n*QEZW$+1jdm;72N{Z8e&(D}9UEq@|L
zpuWF~SaxLbQL-MA)$>%U=SizaeSa#{!zGroFfsS7()(1*gl6+q#^P)DbFmysU+e_s
zHK}+WI&K{_#TOwLp={Tz*xQ>M+p1g;b=Ot?=QP%mhXnZvXhAAwU#)+x_PGs!kHr3j
zmF&wqmpFT&rF0I+~ZK(&LE~44{
znSNs~aG{u}OTqlxl(}hq49YR2U)N@}xOJZH%^Dt6i_hB{Hm=7kEf5>SJ|%g{b^T7_
zpHjbzx(OCm8Fyfwtm6qT?O)uBdMo1tZ-MogsSO!pd^rDR?td25bGOLmZt)+UyG?2CHu~Ic{-blpm2WXOcU+`7xBruK
z$H|^l%pC{*CBKtB{}*$I`j9Pf?wAv$F(EjPjK;r3gf>VdZH0fZwoPZT*lmE7qO8r~
z``pao`$fMU*vu;ak6KVtuOAt)-U)Q
zb2fsGKZGC{7ILF`*+;x(QwyK3@x$hx$+ve}ta2S@v9+@JR(-FoL!?{F(f9wVy%_r5
z-$aHxotVn-!Rz-};$vNZFN|Zrn}sNLT8|CKs{qTEMqWZar@@-D{ot
z8*?_=rp9)wxn5_ZGQX|of=px^%mlg1KBMyo9WT~-3hKOtdpWxfI2=saCX{(W7U{SkeU`9_
z{#BMApy*T7udRdHxZ_;gn5+Qzb%z+!p6u(c%I8+}8x-49euGo`miY}xdnfmlo6z<`
z$7sl#7!4_5G^Duirf6qk{-P?Mb|F`W^yeh!8s&0hB!AcbwO?Dc_nv);>f9gXuR6}D
zaA>@)f8W!nDz+^3y^eOnclB9|InMc>_?o_rO@a!GXGU-{@0*ahX10SA|0u4pEnx%1
z&hv2`Amau`4r@=oKdD@ki4DC0T|sUxM|#e!@7-}-2IEC^J*2o#QZFy*?6ri&XSs;*
z%n_4k`+xjFcXsv*Qph8aUPrt@-ZOq
zuc=QJI|()yc`HVAqhYb5wfoL}=)X$qdGo%xN`Lcc#Q2x7G?oWf@nrhCN-;gm4N&Bp
zMV$tED)S4xhu)g4xUJUfs?=|x^}8+mZAyI*@xr1`hxXYIySz_J!_aKS2Rb*sYsF_N
zvpd$c)CF}Mu0R{)D7L5THChZ<$sdmTP2Kg1_@-Q+Qha=2w$WV-GXG5Zi-3Qoc7@vi
zihtJveG|FV^x&3EXsyzKfi_
zsKq~#3Y}k`nKLKsj;ykG?e?=|uAAhJPS?*uw|C5)4A$a1xo=Xlqq>Tw
zs`?SBeL?wtL@Av{gr;&{??<|C4Wxs)bAL9V_fjU^&wp@
zn_9h@PRTh&<-sh3Xb0=G15e)H%NU~|#hh#I>-vJYXNKG(8wFJDPm<^NQ8G-=@k{i3
z1d>6Uh5@j7PW~T4_Eq^gidcb+vpjr7oucYmn#)I2=lV%=V<-6%c;+K1`>$25AAjVT
z6hyYVhU*u!U_&rTGELVzL(}|iT%cDOa<7UDG#jSi>2778h-aKet+HS
zRO+GRh}_yB2ogH&wzen8wAdajWQiFAJtN;w_mN>9k8F=X{2byQ9}QPxy1_^JJ&wi6
z_P5D>LvgO0k20rQn1gp`#FqI@fO`?#@xtgQsRF76f5WG3dGDLj>=zF8w0F-b$@lwo1>g<8vlo1URC;`Kt8$Dxd$
zQ@jmWZ5wkuwJ{8HBXd{r6LK`vJyV-kykhTvF&|}mt&ZzH8`A?z^v}&jeGh%MbsipQ0-MUim3R
zm7hYxIp2zn-W7DkhE+M&rM=wAJnPr>@0Gk@9Q+6Ilc#F@Bz%XxrQ{a3w0(wyrK@a3
zU1lZE06W2qnUr^5<
zV=o*$Ulwg+72})w-IKXcc@`_}Go*`m#~a(b1^$U+Ut${5VqYYk62jyj9{Q71+O+!F
z(Wk^UfXK$}w=&O?aN1IzsXM1a*JtXUDdzGIT>p|yTy4KdK7YTF$C5oIyUH@z*br{o
zL?$WTCG@euT<8XyrTA^!ulTHtt&x2{H-2_7%rcJ05`SsVV`aB0tRh-vm_!YaD%ykZvirKNC?`Kp%;lN#_aw(k;@e4ic)BM}
z*8y~yQN)r#-*}I_Oxwq^fDs>No
zOT~Ir`?;!eJr{Jyf`6`3&m_9v{yp@X`3G$i<7Q1zFn`WAGFFky1lS6muiF#qT6&&M
zA-{dZQROM@`Zfb$>rfnzk&Ov-P_l^SC_n4n2nTBN=M3x+lz6n9Wxb{}Os^=4s~&;WdHR8h-UU
z)@elfO%BVYtJ}l$shNB3E&IBNsl7qF@8nZi9j&M4n?4EC#B;1o7&5S-NDjvcwX;L2
zbGU{|4;HkhT&m-rH!~S1A6mY?_{~j
zzN_;|@Jw%2Kjz|r`hk~`g{uE>=^pf)i0T^FeMy*04~Ojr)^XC0(pe`3ACx+OPq&Fw
z{EW=CqWny_e%3=;xvrFL^xj;(Njp_CNwhNA4*Ipg7(1~jUh0GZ|FmgGAwez>Ac0Z@f^ef`uI4El}2P5I+
zY$3#p^ZT{S#=5-1IUOUm{rdZbv2mB^bd~LEgb{1YP^O$8XEys|GH}_w2(t5K)Y_Qc
z^!{*X6U4HJ=A)QR{+PLlWl@rgK@fUO&VR_a(mX<__h85&Px7@5NS51J#lQ@*oSCFJ
zPAc{eV~s$Fmtu_q4PX1QE6=&n3lt`|Q}3pi+3vDA&Baad+*tv+c#A6B1WcVB=2+c@
zFvN>?F~@3QA4RNZ>-xI3kD{_%8tYgQCz$y3OJ|rTGO(iGcewh5QABCqpvC4WD-
zk}0sHT=r#c%+`U7y+-+i=eHe+g-r1YvdehMcAdpUc5iwr&Txl&R5e~wESt(w|6?p)
zbi6!^U(ETv<@588B}_#36O{5BoFGefMOjktx9Rt*a5lNlvzWJPd81^?N%Y<>`+%kY
z5X_3Uw*OjN1MR9c(Ad@M97qd4{D1seZwZ~G`k^}4Psyq_o}vW23*+xP=gp38_b0#4
zJMf|Q5U4W@PqDR&`W@19au#5Yp4ByVj!MU*-Svvr$_urQH}QV1joQbH=Li1i@gyk5(J^XtfiZiWT-~_0#zCej49CDCU^PJdLOAg8>Bs=#tBG*0^@w5YO3u
z$+h%6Ont9I6~Evz))vN%+kbM;q84jgiaE{4+LDTRR#J?$4KiQbF5_>5n7=K6ziGCx
z9^b3yU*B+P``al7skfEGfXe4>R$hBcuaL3bJlogshHgLtQI`FAY_NRR==M;3{rr&6
zNx#!D!T~zdtY9$m4q1Ex>Vop@D4z4ZR*X&QEHsjjiK@C@dERMV+kesVwxgQ1tFD)>
zskV#qG+uKervnsY<*^>K;=StDxh8wHywf{^I@lsUb0UWqskx!vLAU8ijs916T~wXL
zo9$0Ecc$E*+6F#7o|C&QpTwNTzvtumosRt^GX7L~T#f*IVj?U
z#l1lqPVyf7Fl~PnoqrxHuF*(})w)YV;l=olDNXbvotK%ij}?B;`tyL_v
zSgtqqmvQ_SM}Kh*B{y>aeeOL8yeAA?Fu7m57J7JQA4+Z8@_nIg8{U_f+Qy-lJjhzQ
zGykI8KH)oTe}{4S743tPLy;#gXRdY8VC!B0qvjz&EvIqJZJT4tdl)tItScO~-%|{o
zHpO}MsXO?C&46}Y-)r=IYrREX*Eof?^_-&PftEK^JAao7aqm^9+nDrbQ#$*Q`eKZO
z=Q01$bq9})PoF+XLc@OzLgA-SKglQB_(UW{##cVUPx?ubrD&uN!z?xg{Ukogukry|
z_ET~b{y|wG%Stkb$BAqgiCx6)5=Hk(SrOlqW#Q5%wLIW)XjjBt64);JlvNz}`BTzG
z61SUHO@FZLCwVLFb5^k|n>;GwvY%wxxFgUDSynzQ`wZ`()-IM6@^K=s$gvX100=o&
zpH$V@E>j{nr7h*t39;;1b3BqQ5
z|FyV4)G9Rm02+g9c|s#eJ@t7#=J_G5iQZm=XNnMw~OS}D)&<#9eS&%Pv@N!o73`q^`i(6
zYn#)G=VczcqW=2PJLE77#OTl`R)udS<6fx;=WG;Br_|1kCB?G@Ropm^d-1nM^Jz{z
z%nh#c#r%`A>{LBfG2n@xLXIh}k!P2(J0K9_4Kix{e*gdg|Nr80P~ZXp009600|55|
JQSHyG005BVd@TR~

diff --git a/Logic/synwork/BUS68030_mult_srs/skeleton.srs b/Logic/synwork/BUS68030_mult_srs/skeleton.srs
index cad3475ba199b245c7b367042ab0b88a89b3861e..225946832c0cdbca2889fd9f6a857453768496d0 100644
GIT binary patch
delta 1259
zcmVZz(%25O6h4Oe
zJnb60pgJrp-p$iFZ3^4c7vi6Y6Er=tHXBZiQ1fmz&cC{rva
zA`pKwwzwtSlbEhXG^xjB-C$eTf%{@l=z1Mr72+gh9DltP!-AzwnJI1r-HLlJ_aYDL
z6>|!vcoEcWHTWIX;H?Z?KPaga%6*FFvd4863Y%75Ee!Z3G4{Cay}bcjuSdf{s_Y}!
z8a)zH8uELJ+nO~6(=D4poo*$+4byEa5_-gW*l!`N?M9dWi5QridMjy{>1BK+@d#gf
zEsQF~cYi_vQek}M%m4XuD>0VNjw@OOhLTBsG{Yg8qK#oD?=*XlO6-?a-sjyeBI1jKlpk*0UXm&mDKMH;7yEx+b`$
zGkn$Gqid8%IB{!~G5_cNIYDur(?P$NmbqB%?|+O*TR`f;+|=D~5`8_&b-d%;?5Z@*dWi)i8mRfULbX4@b!~*i2OT
zn}3}TMoJo_)UY6J9>}ob12LN&rnV~O69pMe^On76@bn!rY#
zyx}H7;8fTE(oQDon43GGRgB#2Jdx8y%CMvvzK07<#1lZ9X>5kfWVoyN$84MrIWVV-
zMz`d?>E^O0Ow}atKgw;&=N+A6W9e7JUVooAS5pfTKTto)!_c!t+;n(8^si@O|4W{V
zTBNUiro=RpJpeZOy6H1n&xxADSsr6JZAXEcY(SYfIfL)^h(XJvp*NyVn{(0ohCXTO
z=MYR2wemlQ>&aWLC!fvrC
zg`R))&K;T}Fav-1q<*cOo8&z{7}9q@D(7=iF^Ch2s+4^+rba)^aqKC`InSi-p5m~V
zapc+W*}zHZVoglk@qts7;@6v}DtQ;);oX4s8@&2|#6vzjS?J-7!$8eLJh==0GA{Ws
zR>esnJBpDL
z#ebYr;w?l_(>CHQN?R1`%gXL7XSbN|Nr80
VP~ZXp009600|4u%njNkS0032rZJGc8

delta 1235
zcmV;^1T6cT3WExeK!2=OOK+n{5IzsTq7`z84?#w5g#afWW;!dwgpy36Xswb79^374
zpaDA)qxtXKjqPN1FPq1lx~sbRy6USJ5W~%vr~%XKo{A~w0Zhg$xsAdmac{K*no-1(
za`odZ0Pm?Y<&EMjakbkFMj=Kw`f!*88vIN~w~*b05k`5FCx1HTEDr;E4LwFU%A(B;
z#vAq*3o>@?0@t)(uKGsD^Y{m5dbw$${2Cc({6(+ljh?`8e0H*JgFixjIBHz|OoQZh
z6zk_0hwKXrn(Lo%c4hEqUs&YwYPoz|UOrw3a=E-D+_EmHS6p2z9}EANcIHk@5Geg{
zL7NC}BA0JY?tfq)bzJEzsVkJug3jbpJ8?BIE9-P_lJueG)Ui`AA1J9Em)n|{z-*Sb
zwNp?79&ORi(iyD_$2K12H%t(;e6qD_$0!V81Ns)())p}gc}3w+;`TvH-AL_Iv=$w1=aIB&?N`!(d-cXM?mGY3gq`1^=_1vh8SKms
z30axyJjGqb>w+7$!=Xxdir<7Y-(#oj~<)4g!C8)pd`S#~xt==PI;Wsec
zXn`96kbe!vSAqIoEOzRR1?3;5-CsMPTj4aeX49YuIf9{?o(l*
z%!~o9D&dg?ve4B7O+*qgZBgbI&MhIN?*nB=D)y~pvLoi<{uZmdJ;>u$c-Wc5TZyV7
zxTSaag5RNMu8;`gRj6YB-}^IyQl8Ns-%nS$Tz{SKoGV*E4_aJVUsuptC%xif5rF^I
zNAMRa2Xd)(fDIcE*4(FS?AL4!Nf7ElH!-5<)76q3(bCoO4z_c<=58))P}NG4N5dow
z%c&0k!h0}NQX}Q24Qc&A`V}9DRqqAg*bpZab(LQqz@$e^`Wq(wC?*c>lz;SCt0y^y
z)qh;(iji==&*^fTL&xW}E&Eh{4tgA6-h{&}fl{CT#xFb7Hz4iMGC8Og6Cd`U!>vxZ
z)o-}fXK|I^0}6LX|7Aw+!H{uxn;Q+vd|P*ORa=Rk!+9QKlr_UpPfF0HZqDJmGvv?+
zSvSSOHr4xz4S$V=)G0faU4_9>#-oJ!wtuTte}g1fJvkpnO;(19?!r|2o&yJm520aw
zzmxHP>3xs2VIOn5$1KNe{GM2+V%E|b*0yog?~Pe~mD#Vk&XRGdjo;4QtgpuzeUf&m
zecjFsc(OA+34<6mbc_je%kg`7RQ(COfhs!^~p=|Ug4huQ6KFwi4Yx=@rK|jTz>SGeCRzuw|_i{=P*!MBn?a&miPu`3z
zXFkEffD-Tq+29asX(J7A(rC@wV@xgQvzp;((L=vb@zwEK=?=3-`Yiu5jCbXuoO{w|
xf0d>RgERcbHZjECC^DDD|L3Fj4*&oF|Nr80P~ZXp009600|34d>Al(t008*hc8~x7

diff --git a/Logic/synwork/BUS68030_s.srs b/Logic/synwork/BUS68030_s.srs
index 1789330fb4f4d7f14eee76eb73a3f90720ab4f34..f9230a350d75b10ffc9680ac5d2e13cfd6a8f406 100644
GIT binary patch
delta 8510
zcmV-EA;I3SW3X9}GJllOYTGarhVT0nhxBHHILL{UHo05V!V0AwP1`GhktNv{u_aHE
zn|bKrcjR`34mL&!#>;~O6svO|y>*Wn>P1~tPT6mV$
zDWieoz?`HRSy>PJ(Sk8ujyR*VG7rp&m!D(gMU?3?cvk*Go9FkMuzwQWik?T{6pRI-oVTjz$JL;Ke`h!LahiK{jES`>6z)OXPSioF!+=}q
z8-%MOp8S!%0xZLlsBpXY?qXt`icQd%gz$|&Xeb1j;g{2?bBEYx&9Crgt3KL(X4MFjQ?AB%0)
zvJP2`lz(K)#o5`1Sk8+XcHS)E`yq_(TwXJ5x_xyNpciSn%8r53cs;RXkAdo2n{(Ew
z_8n}oI{yd^YtPq5aitv=tNhzRZjps|-8xEJ=6_-;YgNT4#p)OFR@aR0adNzLiQiLN
zp|QS*g;pv4djeZRlA?F7GRrhut_l7&PksRa0JE$D3ITsXi-Rx_h0o?^Bzy4Ek`gIJ
zFYP9V6zV7gdKw5=4@(Ss$YtrTUlsPGxi8_%P;n@2=XZQ$o6$J;Iii8lLHLElZ^})v)&Ah0)Mnz>u;ON
zw*OrJ6_)7-M@kTuM_}VGjd5MhR>1K{xTn31MmAJV#wjs&lC6`!{;oAJ!+;@=v+vzo
zsWE0|&0{@&>oI(p(=T@4ja--5apcnFba}g^(`Dy&5)OTOWY%o{aP$K&yr;|FbUC^0
zb-rxq7t(jP(1xU2mtOk;C4aks?G_tmc}C^B_&iMb_^ozqM`*AhY~$^iK`d6bCGTi!
zmTgVFt@)0&N!d2h+a`Hiv+u^x){Nq^?I>j4XfgN32XgY=$ynE!{^_O%GTux&wEyLc
z>zXl%UDNd=8tkrV5E8}~BX52fdGXjyDt)+zILXG8O`YzagVQBs>wiX_@nrLbe(6Wh
zhe_OsyF`uUTi|Ur%n0cMW)P5I<9%bHu~`Hj?XrJA4W>_7SB)b{Na7~0zs<*SMcBiq
zaKSj|qOb7kVZlE!e#zVo&&h
zafh?#ETiHFTzAPgDNGGk78He>O1>E|M~oWwF7MA#{W-F)PL|Kblyfmn#lyb|11?~<
zyLEZ}drie>XRX>LdAo$jHHBxNK$qlm|NX>%I~2c{bAJU5jDNck_EG93*+(GyAbB4_wGS@)NKw$i
z?x0Z6WQ%=l*xXqBntdAL+OPk-uTyqx-n*K@oD;NDE9to&CcvD0$PY1rIg(1>t@@FXH=pS+LgBwm;~m@ODX|lm$Ell0*?we~nP8WM
zFMrwXnl#;eq~-U??KGt`ARpbL?`8{QUFJV2ONSu%k6$M9`QWE#}XU5BEXnEotw`*?%|B
zl@QXCI+laX3C50jGD_(Rb*wHEQZJver!HqUH8ykhX)*h?A6D*z0qD>v&DUk}b9pkJ
zDeYDI{m>qaR#elUxE9E7!oC3x<+}bve6>H%^}}0yh|lx@Z}^>%hQogyM}Sd-;|}Ee
zfynjQnyD*POP`n_U>G_oWj{qbdw=!7L1#7H3!b|F2D1+A(pA`|g90z-!oe0OTL-{1
z0SpTA2y!2evTLy1%SSf2d|_Gl_LA+p4xoXX8@Oi>_Sd)jUD$^A01%SDm~kKOz6p9@
zBdCr`q@9ZafdU$|-I(-`)bgL{?+oVFCJwF!D5
z()EIpf5{t^ITf8c;797zQU6{=SieDpl9p4jgmGA{HzF!3iybz
z&E3A38$6rdv(RS`;T78%-c=CJzIx234_`sQrs2cAAMV(d5il?Gu776i;j90(-hbzI
zjjaBvk0fQSA4iBQV>jwYVPDK0+nvz)*K97Zk00JYT!m~0kS~~pSKge>{`FD%;7@5b
zK0)x$LFcC^>%!Mgz^}&*rMtvnA^Hr;FQA-Pd;*E%Q(zJR}2!8VkUI4kS_}S^;A2|IvSauK02fQ_({6#06KZlUH)X;JdE)k>LQ-yShtQ
      )pU5lN2}^vIj^NKTJv^vE0ZvVe;5
zfh8An#PLa7k~d?XK|e0=@~mC^gDj)
zewnU^K`3cyhhdsF$fU{bd+>EO-;`Xp`}{0<6=N>h&0})IgbhI4cc2;BjZgg65{m$B
zfO;kh=8oQflR78+HEfdmJ^S-LdCxPb6JSktnyzY-5#igkj1P5{&|5G>;os8u&M
zBo%*~5r@&Xb${WY)$WbIc9UP{Ql5DtRVCcH(0Xcr7lqZKC+e>+pe9)_uzi+zR}=?
zFyYtZ+|j4izgug8_g{(_0Lr`g4S<@M$7}uWYyIv|`+wcP)i3HJa4c*$jcplA9GOZN
znFbq$WbrAF<&BKRUa#K4k8ZSr?s5k<2kA1d$M_s4p(lM-mIyX|A8>!Dt((RD(
zKcYoy`+rvdK0cWGIte}17HdzeGNwd;noG9Ab}p`|_?=sf9AGMoaohI_-G5FCHmO2O
z`%Ye`^+Dbsq{Qp7_+L`F*YIel%_pCxwhX$)7EI(AETL$Pp;E<
z(M&a(>BngH$0yhQchT%?H2WW;8I4b_qj%AaG@8-JXl}LA|-?0w5UN_@IJ$IT&n~+#qtPG3_pvx`TOB?OV=DMV5
zS81yK20Av57YFIFpu{-*1mnatT*8vLVvm%)aknusVP#0{k|K_v=$SyT@Z%XBk$<-P
zf0JpxA5;1_+H&Cscx<%r=A#4Hpz8NzoOPKq?f!8NW74nZ^h-a<+@i3U+if08Y+Ikr
zsQEsym&(b@_)%NFsu&~2CK3#3f@kn!ayxB}RY$P
zR_Wu-yM69@oW3bX(ALM~=Kp3cn19D_%Rjx>cb9SW-7?QRcC6EQ`g5(^!;lM(Uc<>05P&0vFPG57HyZPMw=5ANNr#qYt;XY<*7Goj{dV>8`!
zi}DS?(zTCtUeS41TlRoHdegl}dMV;}nvPB%*cIN>bq7FjGsa9l;?;^iHGj7v7BB)3
z{=WORx?kE~8-p44wy?kK>^rUjDdJJ`JNodi#C?f~`%c2#7AGLj7>zSQsHw??9g=G=
zW5k1yJ{L7CyvRZ5`=jFOlc%oiGZvAvB!)go-e=j{ib3;fIre)&z@aV
zv8Z|W;=+TKK1SEOO7a}CR#Ygkgdjz5x*4iznc8ONP_`ktuiE^>x42F
z7X!>TT{||hR%NEIH-FmnqE;^P!K}ab8?}V&{OC@F{DV90jxlCydFRK;&XY0HB*KcW
z80Fur(4v8jX@RHHWIc#nkdZqcF7Capbq&M;$id
zT*X%-)J-;btt~xfex7s1cr9WR5mzND$I=?d2dxU~I56u;B^T9&YPCOuro4ruDwG9i69c
z17;_0`Vwva6@RF4vc0=&C`ZhAB
zCD*`q!4M%Fw$r%5U)Z+p&$iqjoYNEgopqQ~@n?Z{thdki?YWZQAt}bwSicWdPLXXAHQzJ-J+)x8ziuD79
zZl-<2xPN&K@<7!4?XuDq(Z@{LPud>~TG$U?SMz9~hZC$Z=AcIBpobB^cs8Rp(0?U1
zp!2b*@v#{D`(hooia}`gYkD200sg14_o&jX`*nG}SvT{I+*7*Db3C}O154qz6lD7Z
z%Q(ILKw`dPkNsJ|=5)SEUaM)@qO<`_b+`Sr?tizNK_YU6z;B}sX}%wjQ@>rx5OqkU
zmPfA_1pDW-`5Aegcg_!eEni;2N%Ny#b6m&ms4E(=J7Vr8tXAaj8r$f&2XrZnz>Y&+
z)uk|&1pKW~u#u=IwOW7c1eT5kZ#Ug`j0ApfQ7;tZKEa1+&H*Fn`vh~nT0DfG1kPZ-
zRe$jh)j5WQS$;*wlPkOOo8WsL-(bBr=*AQkWmMA#gP{Ws%AJUTXuRP}2ie_{2WEaS+sx;*ld2jo4u(q9B~ZJ6Pj}zc8nTQd2GMi>qCSGMWMzai
z&!I13U)yScU@j*5eL$n1p3EhaxJsW(CV%A==Tg+lH_oLc?&J-qk^`xKNqLW}m;%;Q
zzoN6rM{7sVjNJdj_0elVnsoUzsm81)hIJD2I-@<+-)mz@u-*W+4{_HP@ioY(#&6pe
zyw!HUf)P!fqe@}<@`d;pOd+D2kd{7u25%bP}5@#2RMlJSbxoq
zuo37p7+*zBcWh+Tu?$}Cbv%PLnNftOZ40E*%!Hni8yb8ZgvvG%8ZQF
zilVH82a+MK*kq+VN}TbY7$^48dw!{^EKZ^D1h!chP(0M%r8*8`b3-9M9&ssCK{5^>sX%gk~NS02NXC
z=n1G!Sez|)x3WHy5xxj~5sTnHTll-6jLQ}EIU)xtb4M6MOK$Sqjux|v(FaxSY`tBo
z+VyV^l{g>9H8ZNtTAG;SReyOPvpmab9!#ulbpCXwj@dmV1+CL_btJ}E9*JX@>vew4
zuc3;8QWmQ{(PCP0NLMpzcul{N5_6V#MDn1{>uJgB#5E)I`%K`UNXBL>dcKHp)Z%?a
zkHZyym`=aZmdLY#O@4vo_iT{M0CfiP{FBN-y>;G0o{{<}Mu7EHx_{zqUB-*$zMTCU
zs(X~#600b`PM%Y(#|TN-=zl6&C;E^7clxh_+2T{o7K8r7c%WYYso^;_kG2?RBu*;D
zSfCF;bhBH0lQmBHd5_XAmeu63;KZ
zb6M9V>XKGtTJK9dTYsz96Z6oX(fd}kvDgmeSNwK7w{~)z;#}5wwN4KC8Rbom4WBvb
zkMK%=&Eq3#d|DsP<0E2xYAu?^Cu_sB@#%eu>&mmF^c%Sib{@+q626t^Xt92v(5;N2HT`tGLOD`##nx@$Bz&*Zm1qJDSds=WhZfmK`-}bu;<&skLgF^OHCM^
zyz0Y~W*?qZad{OVgrmW=sQE|#QROx;PKy4FlzTnS%7V1wPrr7~9rm@JbBXbsKGt^Q
zsS6q3YN*o|xPKYuPukC+B#q}#3Y*h-er59TRmQ|jQyd_-F~mtqOtHoH5rCkS*O!KR
zr$OsG8~O*La0M{LXzndWiI-yr`8|g3MNNsQG0|c{Wjwf#@!)*4~za@J^$4_7A2c1-l300$A2;J8;k0%SH~~!^<_q!uIS2>
zHD1C#Ro(?rvt81k((*7(HeB@AGc4_FL=>T<#l?BC@=T19VR2pt;|x+pU%~3aR(#~_
zgnp*0>Fh+24{N>OCVNtb8gbLntLP*hBhr1hHSS2m@~o=nKep;Pz#&b%p=kB?-4lM`
z8b6>n=YJBgEM{tkTRPf}#5)L7t`!u6kk21%I>r3n;W;xgx3A|-L5^Evn3KSg`(TP#
z1?GZHQ^XJO+0v#a(#}@i$AYnVf8hrzmSWnN!U1*FH$zg5t;X8>SE})pSmY%$oPa(@kD-fGuux7x74@YGp#7%bK&!oMcM
zM0u{zydun_$K#F!COckvM_lLCmTeY*@9OV>!Q2JmB0;Ol(@$UmG+@qS)sLbQzSt8x0f%@x57?|fporoMm_-iQQ7WZILH>nx}#s~O_
zvwIq*YMu2lb^^0(a}!&RIK-x%4XM7%TByoqk>C*7KCr+N*MZ8{bu-
z(Kv|<*zJCVusK-2m)9Q&T_o+6S$|@W>Hf#G!1$)Di__O~G5fsmP&Ow-tLG6XYV&#?
zr>y63WIfO59rZl5Jk~~!TP%k;MoKd#>Yb#n82lPaA0>4Ugj-{(eCmQ1>b`V|tz^7Q
z^V>`RCdU)2u#6{U-uavLJ<2Y}AYxllFUgB{M5uQ|$-cAj^q%HVDS7OKsejaKt?zMB
zcs9l(W1w5Xi<|fJoIcntFmjM;5HlY5cEt
zzu{hKBen_pgj+E5ed+t?J|PSm6!qx%>V1BCzYYHnR=Lj$xQ-ykm;8XdwHd3uQ9MLa
z^^Oya^EKgr`D~+)^hT_)@qgW7O?GnHZ#+X&c^857FVGjL=UFn^Q~m!JF;Vs2GUxw!
zoX$JPiRZ%s#k*-@<9k9Xb~OQv)Kb5d=mUugkY!^Zye=Yo^xVtm^S$?Lpv450yz
z@5W*sYY3{s^89(QDss6oW~O3*FE~hIQ25#Kn)aF_-Dd4KTrbR2r!I4)91N7gE2-dC%!@4hW+2>W^8guqIUgk9^fV7T#v
zU1$aOun+Iy8M3f*o&jB5d0&wJ&Y9u31NdiSiMjxT4u8AUviJbD<$@Fuj|;jN
z#RT&Cs-CcIK7R#XZObcddD)i3|JAldS6E0%z5mc)KBB9d{EOIyXU!P3<|1$PnHqt?
zR`(--&7{{)B2XnHNqUXB`ywYJ<8BC)@qK?VKdgtS;He+OJbnR|#je>lh5ruBCiNVR
zj;Zjv#E%E}JkPCS&dt~%iS5`DYF4jouA+-
s#G=7@vyYjdu|0>r$Vp$F2y2r-~R#t0RR6304|?~Oc!qe0BvV+BLDyZ

delta 9799
zcmV-NCb-$KS+8S|GJlg@YuhjshVT0;4(ZJXagd$VZF0A!g%wIS`gJ8RvLxFgw&Y22
zGY|dv9l0OS!Nw@T*cQ?`&-+R`=lE!PU~47wQb0Mv-KhIkRU3Y>l3s2HI
zWi)V{$Vj>(OUwIo4(Eev1(2NFLS;?&lFpSM=WwO@BEn5ST7OkH9zJb9L%LqCl1PZ5
zrgx)z4utzgIdG=(duAmtExO!g@9f4gE_08LF|kpl!ZV1+i8@Gi7;qzf
zi;y>C$hmI@xR4yOHKh55q?^?m@UZjed;a$Q{_5M!-DVaNZ~AclaF?HvB?(Ei=Eq(J
z_j3CM&V)o8^njM}@_t|McLqu!$nnVV`VXDAuFY&C|XrUP8s&b?q)~F+lSlD>~ce?a{cw?
z38)(fL^3&zB&X-V|!xB9s)IVw&1K+
z-8~ab*g5RV)cvI)eYl2T%4LN@jFUu
zG&Yp6&}zkB7w}6+QV#A_=4?r_WxhT+`V9a8|Ff&!HZP9<-GF`r3xR?fCA&_dZ+v)Te5ys*~1J_3iMH?*+bJ*CpZ<
zpJ19kdk4(cpnCL;=u2&}?irv^K9qf9Yt#&(R~_WW4&KywI_@&Ld9cQ#H7BT9FHn69
zZAb_s&kuiBaHKD)XwJfjL`Tydc|0rC2deXo0%Nhm3&8W
zc}+_^Z#168b5@%Van24ut2#47JIWwT7%$TJgfXh=rY~{#=}_6$z%0ffwHZT_-l*+k
z(YFh`9eah8$x1K&yK&Fn&FH*eLmPy2e8BtizHSr_6W^Ibm4EySm<+$(--kQnHTwgz
z$pi%l0SS}O3p4@dlNb!Z1>yL_zznn5459*mq+M-~+Bz2gTz&lHe_B`q)
zvB#Fv<^7UPm#zCrGzi#{_h$3QV-Wh$16y{c%gKGG^=`x7QODat9hz=E_9+M%-GzLA
zx7hHW->p0se-9Hn{#8A`qbyudzVUawOMASmOMas+DeDruuK10*qO2?Ix-zdz94~>o
zBu>h@qlo*X#oQks=*jyqM-rNN#0z2;?mn?FqMR>A{`@fV
zld&f%ZFq-7WMjss!}ia^uubXKi(BJ=$>tq<=fuzkpprwKfZ|;TuQ0hif$hl@(q_al0E&%rdU2<
zt<5{{os&@Md0ry7Aqzf*Y)3bIwexv5WL?$oif?w^t{?i(?BCZm@83`QZMA-XNxt@p
zu-3kJ?3%yptG@2TReiY9)qVIJKJa_k{?Yfly*7i7+iTTs?0Bx{IWcuTQI2V`>vF$$
z;0dfNt?YA>96UzH3mB(===Q|eGjpS!bRAezm%?7?F)p*0r<;tww)^~kpWU=y_%K`Y
zyQke93p2`JvgH%+-@NjyeSgD$_w6B++}$moS`7Yku5Rlt-$&>xg|S1wsR(4g7iZes
zv!9=F{@K&ZGJEAW{d?Zd+BbWi4PW@@{m--g{p9=4dfy#bSl|H(|IFIHL#9>C$9}-$vvio)AcReoxZD4zZcvR2JuE+1!!=|z)R(;p)B}IF{
ztZ8+fB(Arj3!cGjq#UxB4Cg0d&0bnrzOPW*Rr?C06r}mS4k=d^a8L5~hNe9}%-fp0
zWO{8#zBUBbM(DNqj+6m^YhXXCzmxlQS&x92QT1q9?>STRf9Bsa=uExqxk``(o5A=#Klt+Jcm6tESD%0W;IGRyzi+Mcc?yq8U^~?Y6V5H$t)_hcqs{(#w*UU*
zuWNgZBA*-7p^hG-`L39s{odGyAYKgp6X_+2S2cfAdKhn*=6_0m7h_iFlEb*%UxE88
zV1ErC>=hwMdEmojH)i3K^1b|__VvJ$F^)m)(fA-rc_ADDODzQG2Hj4VAA5{bC98P1
zNBit*UGiViul4;J=mEMO?xdoTHOgDy#o=_FL5D-DuNdbWrjRDqPZ
z);Lh^z%2SWpBD}y?kO8)eWv8tWZ2hxmIxO#ATWhf>=}W&Zx%Df2Wpo>vf#5fxXzoY
z&&>K;c0&RZ(}gxtX~}5QMyPaL;Ax#@D*?Kts?Y3xtqq~`78{hVW>5o_bbA831
z+mgF{L)m=M<+H(?Z<+?5`BfYA6KA+qu-3f&e8nfO)H;p|AV^pwNsBq^wqFKnU2gbm
zzkPF`?T2mtvd{QW`kDXEH%h+KtfXO*fI1~I@wP++!sreoV+tBHvWaG#X_;l@jPw*`
z^awk$o!|3+k2|*O9ewOWLLc}W*coiLin=SGMgFX-o?E`6tD-g~3pQeGv>3G(jdEec
zR;xySww`fahkG{t(dR$Eww9-M=f0Eg4a)siNB!RAe}zFW3_h`F)|t>wqik4pN2~8$
z_6+pNvhN@PhwOQpDOuKMUzdhYqe&|`vO#Y?=)?Gn|Oa8nc5(##O99NzX&wB#)hN7LXKl@89FD9I-K4!-r
z59Y_mhcNP&tn)ksc5Ip}=**6$gRPR^KyqR$Mk!mN{6;zbyyjPKn@e0%i>A-gI)foh
zS-viRldsE@@l08#((WJa!Dz*D*&=x|RBK`6DcHHPkTr@=rSQi4>s%K9iXQNr4#>!$
z6|rdW@i+n-I6Uq^r#w=rdWeNO;Opdey9(&Z7#R`yTWetzctj7{5(
zwu}Qq^+ZZRlZ#PY-A|AQ6}dAVp6>Op_y_k}ui0ONZWsbpN4-xo3RJDf;8KJ-U=t*6
z5;Bi
ze>30E@@5ds=4{i&`oXusW;tWeWMAb!E&oARyIYi6pp2MEqfg<;v=a_?Vj=hpu}>(u
zuiM;x8-!d4qgTHBN}l908R#V&uBTup$x=3B2U4lYNUAwE+U-ww%RA0xclYDAJkHma
zUlZWJVxA7jTnEenz`%~0C)7(BY@Fg$i{Px(fF{Q4UvTCB&E
zopy0fi1!QIuNf;_vI%_-H=mfjt{`v0PP%!TqV2zw{C>Cws7rq>n`}7%q$Q9pkS=Zc
zvvB!r{)X>@9uGG?TlTmpTjzY&1Kr&_CpSvkkEKXlFGl9aK3-UL-}dd?uCA|-wKh$B
zYVj6mz!WukiT?}UQvS(*h~|1dZ_BCh7sy>F2L5tf2{fp&J2~z?vhYaw$AU*n9!g>Y
zJe+_y(Y}kqR*(uG)pFENJ7ETKs2_|3lXC1@ONzbpH`zt8;+$V0_%YRy{h
zi|xMF+I>A~_w{nSTUZldjV<$XnWOPK)RE(ZJb6Fon`ONg+p(&DkJ$dUMSj^It@UTW
zAHZhFG2~|Fx4JzokJUTk1lzwj;pD`xjJinsA7Bxvl%+qS{;vJTdMwD}|IgfLZEo~*
zZrblj+4%omM_Svr%KL$lvAu3ee%fpIC+kSnE|u$6f4BQ>k#S|uShr`7gBTw;-BO%e
zlq%h=e}{IdS*QAcJFc7dCz0M^T%QvIwfQG~(OO@$+LyF_SJ+oMU-D;rMQc1(eLpbq
zCwoPILG!e-H}&_*UWto)MQvXP#t&lRv7mQkXm8UWT>V}B$o&$wPZo3&pjqRKAOOz+
znhB6+vI|(Wy9E1P?zylqx;zM}u=#%Ze2@e%Xo016OOV@tG?zOYW^`6C*~}U-JGMKK
z1_#GrYyk#}Jx1L+)}RY=25V5`2Mb|U438!~erQp(W{vb%kA0N!A{YsvIxlu;9RtI<
z2^)7+#%Ez6YyTAPF|4up)l|lBo*I2j6Cn*Pq{@@J1z<}n
zeq(5dMBCinlzjAi<*q3|!He*e7FaFOcrj_fi-@_bn1Y4*1Ob^QVRPc59q}G;caF0~
zRN!iVVq?+n(f3=u^YVDj@)*cavP%4;E`z~FQGTo5;5a+-c@RB@4;`QBSV;$cxLr2*
zD+qb`Dd?nAWuz`pjE3afHX)cRb(`fS$ceNhuWYV>c_c+drYio<
zuOgpr-Ky`4jdHnN_bb@Gsd{@Q#@*(=u5Fy?*h`5CiNqVW&=1u*611Oi{SKVS{+KNfU)xgad5NJhF9jY=
zoFnT6OVP`th_n#tJM8AmaTAGldg
zUiuB?*cUdPqL1hRb~xJ97*jl6_jX0x5EdUK1aOfDHusEF`?7ptI~IynH=6m;^=iht
z{&fFks%XkPP($+xP$ThNpnM>I#?+bF^g#-nt-N2XnuW_q0D}PxJOrZ|^Br&*#QM^87Kvyu{FdC-A!VYwBks
zGfZp>`5vT8>g0S6^QNF9)clKF80G7ld}L>1v9OP4ed~2Up7y`Cp6<|${4HN@J+^vD
z2ed|~a^t1bJciEG-Nl$0QE}K9o
z|7!B*F7bF%Z2N5cmu+BwoFVL{K-s2noc6(6vJp!9YmC`w`)3-JaXyS+?fLMF#*yo*
zKL0Y@BfVYm{(5-We<7tl6Cfu*TuA9gq>5X~dE82D+-liAWxVeDGhYmI+$?+N{c(sN
z&tYm98-^}GjYyA)Z5`7(c3kvaxyD4T=XL{@t&WA9jzyfq+Zf}2jFB8M#+f+vv6030
z4BjT&3f}%sxruY0!|S;o`<~e`29F}rr=HF=0vz#K$B{mBWm77dF_8xUU@i%PMJ;oi
zPGzE&lUf!caK@OsqkZ&4zBlnI{XAs(Up+RYT?8N?|D>*`<5K)}Ewznm$CobAb}Q08
zmLvgOs2urBV7I;kcwao6G=p8?dNur)f@r=1r
z$Vb|y*EaT@(hGOQg*NNY2Y8;iV}lhOm7XcRUd)bJz*NkQ(1V+ei)V6hSL4zLikM;Y
zzF|)3_~bc%{jE8r)|}E`&dIUnO>z(-Ll(J~i-TC8wdJhlq*>TkGk!V9)V{7n&L6ftW9L`2*2>-vW+9)m`Np+#
z#g&yJ91$e>-1?MjUz)J(l+vFjlz#3Oyu(H$R|+$NPz
zR6MJkC5;UQ#{FFsyIaInb)BD{(|2i&KXl&EYvCKS{bZJ$LP;f<=bH0vXn%QshnN;|
zO0;_p0B){!pK_3T>DHr8m`bIG#&+*qc3Zl$cwayfn3XYQWF
zR_b{S8S5y%DttjkH(iRaHO2L`uE4f*ED6W0_wVz-l<}#^&mOeCF11~DWZiN<-P(SR
znqz?qL!&O9WSzP$`lB-=tm{{Q&e*|Ulb3?NnM-~~ThBC~D|tELukEk+t40UMm0I7E
zGhd@MTh#aes>k}nHQ&oGx$J9wh;WT_-+Ge_DB7B=o6f$--?k-kyV)LbW^)eRavH#0@Wm?w6>incY9}Ynopz7g&Sxub-3$lqe
z$+j}TTDZzK*t$xu**P6NjL+)j+qmMJJ}cuUVXx7S1s!GT^ao`;*gC^zVpbHj!>~W)
zKd8<*S2>*8POk7xY;-D^A{dTFotjp1tBbrV+*h+U*|$Nzq=Eb#8rr*TZSt5E?$YZP
zqgT#L!J13by8hrG_c5M-I)Vnzl^1@VI)<>ZUuip1u?6B4DW1`*#*iuK`-caW&k)(R
z7GSWh^4Vokj%Sf>mpqS)q79|vrW!vdcsK#$fEbr@MO|+tANf(?fu=I+9Hz-HYC5l3
z#GMp|v+&J{EX%q%?XqEC(=*d&Heqjm%SI{UBEw1l&(6cCxNgCJ_aH+}jLeGnn=*G@
z#&0yfK-t<9D@7Z+Np|VJI`?ZOPs2gL=d<}{!sz93J6nY8Tjn_%%@fvKC{Y=KEUyalI}4cHv(aF$yjZR4Q6n
zF=oEOxTtR1>YHMJzGcxb^0gXg&%efarj^$!4=p)1dI0+?zNxgQb8YSR8pcQU_=>ox
ziQCr4M~m?xmeliY7$3z2w8v++RXm$-F{#=*--U-j@QMpO--0r{;-k=fyopM=EJDf=
zUgDX6Dpr!+=z%{(!DCb20OB!~AJByTY}``M`!U!lkNs(XY^%;-4q0=qknur)JV|0N
zaku$>7ka#-Z-cJ(6>VZOH>I2M+<@4ugUU%cel#{Vo~Oc?5r`~D=lo$_*ZK2QqVYVH
z?LV{6GM&34qO`kDZO6=Km7KtA+Wh{DJl$Oq3X?C{lqaIG7q)!g|1!N4|HRymM9~)U
z0;h^u>-$xIoHIG+7cjBNCjWrWCAs87lubTF%Xf0-Y}r|SbSXb??=zE6uwR$YcFvZ~
zLwZlxGS^+WFa4g0DW$FP={^iQdt)!ua7Xe7xMSo49@n|Hc$Qelc2RDZxzfcs<6@lC
zWf?1L(kVrIou*tIol9u;faZIk_lcJKbjAAXlXF>rs3R`efu(+;0`)2d`jfV;Jp?=J
zM>eIoomJ-lX!{OqvIJ!};F+f1sMfP!6P)A_+V~_cbEnSQ{Z*SUX|fMb#$wx!dMtHa
zZ}9_e^OkscjS%K7jua0~r(aZV16m?KPgS1D0hnoA^G#Q5a&y)g
zLJs@h-&PKl1eYI}`8w`tMeNj{M+lSDNy$;vO1m|rA|{Gv?f2Pt2Y
zl#Od%g
zdF~>or|0U5eBef1(t3Pf=!oX?xn;~tT}0u30uNA@Qe{iSx^MCBsV-kso(tc)^6yx=
z@6^tHZ#m}dfXRO^&cKxK$@pJ6J&dR9U!50K(OFJ@*2ZC8YTtz_!{}Ou3tebvpXqg{c+gn2iw#`6mHiPS^>z`txuDLO`99>AT-GXo@k$)FK*mU<7`Z{&qQ65V!
z&$!+3JU(puL4ilCdakLL-sSkXsN-mV3~TDe#zp*&)S;070{&mH7R^$ZR
zc{tbg*uuHJC}NFCz!$+TWGXKv1PVp}0+zMHvwU(K`W0DGp@Cidf*o4KmTbO%!C2}!
zx@*MLR$r6$MV}x}74Knl@uH{tnI;}4O4njz6`Ln1?;kWdarbR=|3rf
z3mXh{6XCnnhO(r{ME1
zxIq0k9WQCRcR~3HOYFEse-CC~2`@2sadi1e#opCfr;$EeRO-lKLoC0d=VO&S|1W=j
zor0iJ>&>TqW$&yg-z>n6Z=Q3Bi5K4nfB9f%MWY95#hwh>t-D%(@NB8lN5axaJ`X>1H+&(xxmcFzTEN%O}$~=oaUc8D*KVaX#uAg&il!NHDEJFs^y*vTQi}(`te4^gzwb{*8>*~CHdgE8_N2%P6Qa!U)>b55TM>PhU
znr|E9gH|6p24~`bG0q>|yXKdE2<6At^nH;}5Wm)9u_t+IP2<-5(WIj~l$P{KNKBMZ
zE7uqLypVlHu*CEg|A~=>i^X5FkV!SD!z|ZKX5(+;L`zNxxA-53dP6(?0
z7k#TG-3goSM1}57_yluyVrg=Alr5p}cg1@NYBqeOtbtE|Q=8vyAMY-1&Wq7GFiP`a
zu3mW`mwgwcUel(sCVg}gSF>~dN}oxbW2iWd=T3eH9;eb^qKJ<`)$l;sR1M`f#|p2h
zK2z)NES)Pq363Sbquy7YTDg1;YkRJ|q3q)QuGT$RHLP}8u5q?qcFs1?z5x4NY&FNJ
z@vN*xe~!_Aw-od|>RWi!YeLWH^>gL2p}dsogrukknCBp$P4AaWKBa8QmiHBWi8^5t
zUOo$^=`YL5xmI$^NWN}Oe*OYeT5Ci#51jQ;K%0N;qtMu^Ha44fjNGc{g`D_lELymL
zwT7LS?4rK{?=J-Xh+@V$jhEBL^Aq
z8#DIbZm$>lFtJ7WKJdG(LC=qRD(MUUQ3`+I9|g-1tw(sL@J?y*9bX0EywKr7=LTTi
z5esG;pSOAg5FI@~n1`zz#{mEku_uXxPE<+pyRhNA7zI3@T8TY1hAxAjyFMRmT57zo
z-Yfin|3pB(cU3+}f_I+d5TkAv)}VLV<`%C$bU~?Yv2PG=toz_^5PS3%n>S5kb@6)_
z&(x`g*{HXQxc|Pl;DhjF9I1k+B871zxJ-&CdnbfmIW@o+0x`fAIy-
zgdYa2LD<{ukSDsoLo@chC(}`RPpf^0E8anW5)Oh*xa&nQYs9*(*pnD7g
z9zOd1=&|+o?OV0k_^(A7yh{B_-?G+Qs;D9_c?+-XttJiGG9SaDwIq8h->OITfvWqq
z_!0g=U8(9SQiIQ_>K6%4=KWGldqrKD|ETIh(OXTT@HzA=^C3y>m%c3<&d2<=7$VJo
z`!!8dtov5|WX4=Jtm+n@%DnDdRW~09j6&5_AFDCL95nx6U8z2&szj}oEEYhjwR)?Y
z#(uFWS^TK$%Az&ZZ~1dee_X9AbzK}*J_@^TUeNmQgs~Aw3N~L=_+RJi^?W`r@-fgx
zT!H8eIwR(Q3=txx1nt>+PGX;RRQ#}i^OQB>ga@{<^YKmm=fGWc23^auF9Tz1x@ha#
zxg0zHx}saAl$*E_^fL~x_5JR|_8pqOw2sy`m_$d0hfIiPL`4O&;{D4a&-dmuQMS2}
z$5uQk(eWdl_hF9{{df&ADUEIQ*#lK)=wF}M5~Zzp;=8JxwLcd>n|>SUa!%cUgIDBh
zXr6D%&ou2eVgwt*#tB|Y5CdiwxVPDd((k?=X4#StudMUcP=XgEFVS`(4Ytd*jj41F
z+V#$_#GbSrx;p0TcE&zx%yn9^(F$#pVo%jN)!(gkv-T`O`ZV`SqwUaS7igO3JhxBm
h0?9gfAGiN*(rUNhKmP*&0RR6A0{}V5sEKcV006-**o6Q9

      e#uDegUs-Gdws*wAkZ46!ApR zVkpo~{bUe>IUQ4jMEX4Lto1h^ZrPMtGaS6_6|{3{jCF*834y7CC&&%&jXPaCvkq9T zxcEyOBon=Ie#%;rI6?PQnq(g1bU)`y8maY2Vp0n85FluOlj8~Aq{ZgqeZ~kLFB?wh z`VyR84ltXtSBjl~IC!I6LwK*#@sfMj*~B}yUUY7qI5gC~Kz(kqNHj=l{eDGE+EZ_> zeZ%nnI?7SQ@aLw8kRs{Kz{ zm?cY8D?t?8)nY^MVRdeM`V#zx5VxpV$^i)jg7d36Hx{_1E@NsU@f)Q)S)7v;!GNc3 zkF^iyS78sup{=`oSJ#Af+%*0)G2CecSK=e{u~r~wL12N_DQ89tXx@`7sjyL^qFU6t zvYqzy*H?y3D7tE_(W?OD#5z?Jr+TuuQ(MedFJqrq#M;JltbLAM7k={SLp4&2BJ|w9 zkAfOYl=OLb(}~vA|al%Ompz z_xl(X7@_1(t*Jt2j+a7i(wZ?u`QEFB&CQ zfRhSp;2>i(aD7tr?{pdLbp(ANE)1$e&!zP_M@R)G&z-N+;Bd5Ov6FaUej*w8WSpMHy26@qef|nMROxB?Q={<=kw-dn#kT-+4Zox6JU+!A zBX6AsH+h|Q&i)Ws>UV2e#NVXU#E!#n#$q$hMb6}^Y~`1jTP56~pFDhj5>Q@nXTm*f zT1#PB`C@8ruWPRX_@8LUn}5HwhuJF5T?3i^Ps4PoRJbctm5<8Xt|2Y&{v>pr+)0?m z+*u(2q5u_z<$306y|iM~VSlR$q#Yjg^EQ;%giY**^2sU+H>=07Fo{E*o@~5H)WF7t zf*HSMkzHfVuVG`>Q!ZjXMMUL-JK^WdDdmkQyR8PSG5fq*CKK-%B64_GtuaScW$INP z6s=n|HQ;;TerGT-pa1;om!+k=)9<6-R`c(j;rH|-Zgd4O0Li^8#u1U z!_XwZb}Mh!G0*lgL0%BL#`EEmKPQ<&il2FcJT8 zEon;*{MaE6zK2|nrbck{=z^=5Ln4e_z5TV5SL|0_UL4Kh#Q)SkMf_hZ|5ot zly*mCN?3V*eBXkLHtuj#=Npz%t30zNQu91Zc&jp8mmNigjDh%~yr7rBGs;}Q;e!uD zKm1izn2YWW@TFfl4Su&o`7`80wm_byyZ7MF3nkF@m(rCkrYmV+)2=#UzsNatB+JeB z@Ry~Jlp+4l5&=|V=;;T39U{(eEBx=xi_1->2wQy-{>CYF9|bOZ?mhREa;Y<5thjio zah``w2{2?=DoalV%~nl0Ak=&OUd@k_b2hzYZRL>TA27h#y1PFx9Ds@TSlqwsjhv*9 zcN)Rd3z1ets4{%U1}FT6V7vxN*AJ$kHrCpe9!^hcMZ}2T@ggMt=uM*=T@76j z*K1@1LlS`@WJU0#fE(btsnterE)zod7j*Ig{OzB)$jVPl^(`O|-Xr_V2W*ifoL%C7 zY85dSkXcp%OsJOTqX-%mJG1X45FOT9t~Fdvp>am=0QOI~3d{S4LIl>zq<2P_O-#Dp zl!O^s79_kp_z>9FB8%d^S$Xy=@CjE4ueXP`Z?R(%s)`TJFR z9m`hrbzJ81{YSkWO5Zu2wOccz{BV|rCVokw>2F?x86Gvmc7 z7;*=f{antH1{YVuqV220)*^~;McIGi zq-KS?g6`I`smbix&j{}|4dZ_4nwu+thnc`?)$f1}l)0@%&4ZzG_a&gBnDu74%)IHJ z5juWnXOMT;-yd1>j;H4M;U47po(-fY8NIS%X9sz?*Qe2EmIM2`JRdMlls-1J#v!`_k^i4rnZ9$ zn*Y{y{@OHxHmx{!!@PRNke*YbSXd*|urYLF66w&&P;%}m%NzMuaS0So-xE+O12iL< zPBCr`(P?`kGZ~g8oi2g;1DK1qCiniC$zU7^caRS<;E>-YU#tQPDu6~#;6m)ANqW_J z63)20)=YO7UK*JCWH>{qC@@A4@4J1#E=F;2}>qs&!9N$stZAfmfJ?_BkP(OE321859B8CkGXqiv+-BjSI zA+2BwbgxeDz(%3WdTQ=v{$Id{MiIQ=Yu`W3G*TRq7I03zLdVE`V3-d~gyJvhI{{N$jhY#chUO8(T^3FRBq%VycN`g+xi7&6dWPy^|e4fOK)) zr^ETyQRG$xGn~d8hosS!z`-_O>lwQw#N~oLX3n$28yyu>jNqvcL&VQi&Y$Qv#n647 zn+AWRP^Zf1Gq!<~H7BTVeTY}I3fi{@t<cOzP%QZeLzPi|v8I6NW2cK; z`=@dre8*h_4R2#M3e#6k@U>4fQRM+cKx@EPCh)fmzLPcLVgDAu?1mL}U0x6KAG;%^ zYHp<^+wiOGl9~MCAnX1WbIHrZljmu-bpMPrjkkaHepRo+P}RUui7pKg9V(+{c`C2~ z`~M=unHOiL0{>g!KD5=To21c${)!RC{ia5A#EVFFMgb_#Bcu7JrK`l^EnO?ck{pFf zV^?Cw_(;&U4yoW_zIQO~wl*t2c__Rv?X5Vr_OjDdgq-^Xf6Z!?xerDHG?$S6wi{dP z=rmO>=iXLFH5EikMH8|MZ;UFUi+KgJ-`YL+8|3Lu04seF{9@4|M%s%g_29damrr3N5JwVnOaWQ?? zM+5|V@g*?s^0>`2BdWK(#VBoB3MxTT-qH;f7wBD2UqXy71%^6x9@oy)LK%2SuR}o& z2bMiWc)rDHce9>w0@y}>dlxBlqcdMQXzxBjn}|JUm*2v z(SF<%Cl_CT9v#C4^MIr4R*A6Iy`}k|LURM1-IS5HwM4!dYFDp15}K8o_kRCsdA-+$ zIAAhEi4T2mhi-ZP=q&mxJxoQIju7r)#(2<@7p7xHquWuGu(>j_%B*h(!plYFfS#D2 zx_NVC>N-8{Gja3g!K=>#F)eb@+QBjrd2j{oy%k)l=xVpeT{+%)wLHuoS858ora?@b*(IfiXiB6G4iRUqZqHe?m~24z-NPst00e$j(Llk zJ}y=cO!3ym>eByBFuVLhd0S*x>*ga@Mv?3hkgQs(NEExK4rGMPsV4dit?<+8Rum2C z`mWvIPCTGwv4@{KNe-%FgY}2R5tyMW<=>M=jWw87E*RetVU656kG<4tMS9XnmA|3| zhz@*X|2wM-FV!l5gKFXy)_JQ3lz8~R7?qyh#OvwcD`mVpHeL)$tGM3rz@PeS;MQ=+ z@x4z&5}WF!2bJdxR+^`ir1n2Q-VIo~nA^CizEHunZQnO_0`0ZpYa-7iyV{8jHIg0r zxMY%n4j$al@zH{)b_Nq!PiX$#dg)8`lhxz6n-YRn!W=MUU9ssMFa5h2hFu_&Q+>B{ zGM+biq2V*M>D)H2)&v&vAEw>sAiDiD0Tu=yFTSO_&fa8x?xJXPwual!&SbrNW=+!) zVS45>$j|tYh@CT1w{P5J{@;*`Vs62G`Y!>Rv*$Y^Z6cgUDU-?ogfX+@puJ&a^ot%nJ#rM zF>eh$O@D_AY*KKqK6;^S=Py!dr|M8g|Bd;({*1%tHAf%);CU2dH;tupy601)09pnT*Ozp>wu31^5xm5!C}2?vJ3iT?1zWQ?4quFV-W|P~UN@Qc|5-Y^ z0_@GK3s+O^S5lZIo2m*FrK8BQpH@NMqI4`R{5Kv;j=g=Tj84tnFOyj%Gt*+O0-pt> z@_wT%n%W+W{?1*X-mY4OSO_~x{TEPuo#h+xkG8KP+RJV@eIShLnn_M;_&qyscv-CE z2|fpoWte%ckHvYZC#TUn0bX1FkzYyXX%@M&^Rk!467v=7blW;963W!m>r?Kq#RjQ{ zQ0UI3^%<>(RH*MqPz{N?M*yX{>fR|k^6z_$wS1;1ro=~B>Gd5mMs@p&?a@@{J?wqS zigT9p6zCf#8clV$6F!4nGJu{~*K}$yU~Vl46$Cy4PV$;TLycu^h$`k17IgKTfg;~1 z2TgF?T3PEYswF9OD%DUX#=wAWx$`B;I*VERiD)BDo2kFHQ?Jw4&i%UjQgrNUqrd|S z;&Ncqq~?%>Gg~CU+>6y!UN7^_!acj9+&cY|sZ%?6SSZV?;Vm+ql~|vd;X@J-AyT34 zMdLPh&cChPY zz#JISK-L5P7_!oLDn3*%a_+6PKXu0ZSmtI&@XiyYd6n}f{x^IEXP2`9J+oIm9+1aQ zyp5~eGn&9`tX1emdSrq*2-b>~8;8wJ8$x|AYB6_FbEd1%?NFX&0}+m8%fQ{+!mClC z4SA0-hqjE>p!=%pN+?&AQeo+iAfVVw;_1xse z3?hrrBx4$OvsbgP!_PJ*O{}RZu))dB4W}O96(?QuoUr*%59r&}spf-+eiy$=$2=!s zhxyQD`OY*6eLO4r3AcO}#8wXHW0!SNDsO}vf$-|#ua z@rtVb!;jQ@3-XbFJ9%*yacm|EwBL2*kI-%;?6-o>4~jL9hbMe@Yk2C zfSUjfK$-J^)+(@H-`%P|BiEhi`M3o|iwl7PZm`i=yD*pfT2T4rxM#BCp85$+!QK?f zu9t~?Ruc-Sv0Q>_U4uin+<0ex02v`+-Ltg=a=x8CkVPI`EBNX~-`y`8)^a72y?^iG zd7|xq6ITZIY$=EZ&~K$7C6C9w$&wzG(}HQ&I-{K_5vnlw5sAhKMPt(34>l-*i4)Md<{C1CC7K*1Z^tEdoR-YkPdL^7;u zW1EVq3n_c_!#F?*vp<kR6iXO!D121WtXhmoeis&co`hCI;<3 z3PNiAxE%l_z~`xeGwZE6$%u&U*s z=(qPcO@4QewnbAdXt2ldD(w4Uhzh7?U_W@1|Kq-?WkCa)P z(gy6qyAs5Yqu_u3M_F~&=={J4lak^pZ7hFL=_)Z)-X}|a8#VrP*go0UBL|b_3Ve;9 zhCHa`0>7XY3?C!dQuihDm5~uIBL(e5+@ZNxxYQA81$8&9dIlw-s`n z4|GtL?l#eSl0QVIbsbE9PQJfTO8 zZ#9@pqAQ^0{0Jab7Z95;Hz6=rb8uGzou7xBR@lG$FOH?rj^5;l8Z5VzyjjL&CQKx2 z!t|^f`ee_fCwRH0d;cOY{!}2god7xo8W({hMkY()S@`kF*G#Z ztgy(`-%JWs!yM4;KV0`Lr)zH8h1T3+K^vZ*S(6m709e>tkW_yw$k34Cr^!KjQO>Tt ztU**CuA=w6FDDyo@Cs6UKqje>seo^Loj_my0RGuX7oK0RX{2O<+p0fS^|y%_+w*ru zFAO;K!-pi7w5DMhgH?}=#uk$R&<#x+E9kjeY^z1}x|+v+?~aW**3|79>Xi6OK(ov& zeYS$LQL&ge3pmpB`@K}W^V`fCT;oA~uZ}U(6lx<~Y@FjvOFxd+x?~>pUvLHU3ApF` zxO1ye+Kg^^ozBzj>uAlK=bFk+TDhr9M;~5RdH>Gd&aEYvQCol2^%DMl=&d*Fr-RT52khcX-?FONJEP0WF*O%3o|u7GYv9 z`|^kt;xbQBG5AQc>U?1_^XC^VEM8+$ggcf~;)q#Q^}uxNY}cWW^7TG`WsG~4+5J() z=f~K!E$P*)CB=Go1T00d=|=UyU{j(G3$e~{jkTCRbobj&g81Z6co84>B4>xUfJjgg0iU4dovSLsL`{?7$xe(01@c95GEIuukzn zQxxqHNx?E!x?AWXFG`-`1hIOfK<(Y#?`)5kD}D&;M){q&-b^l<62|P3M;u$4YrQRB zTx()9zPht!nS?th2{-c+-o_f?A1n0B^D`G&6Y&zO9cjd3)1P}JX6*;xi1x2 zOJvln@6|n0$NL`ivl^ z2xE$+{}K%5S=iEW%zp&4OW5>q43p;UMnhydwswh=N>InT{Tj({1@!~l>9T?~&Qcgq z0z$ZPzHQj@p83{Jwo3JULE9VBiF8zzQ-HtD)Aw%U&i3DR`885~=LLs-`w^qUW~F6p zEUAp0xnhzrcFmN9ss0{k3zA>P9a`NHzN3!jMGvKrsA_oF*f%NRFCvF_3rzg>10t$w z&E#CA_{we6#|D^r@Pbg#iOE*A3#dqouS;^Mta_PRgsBqA0W0%bw9Di-=ucrEb5l2y za=~^Qe{^*}6moQ`rCvL=Iu4wDsim8GZo9hzqv&4Xtc2FDY4V$iNDO-J>nJjuTBf2U z;99QL1XJgyNa0U!M>ubCO=E`nvQUC<>F}AU{q?9pxtbqS72z}3KjDVLqTY$IW5>KR zD{hnlYVf1Jde2QrRoVkvDBT*F@mB@V_)q!t#PU1?>fJi{uXQh3spojQ!(X!dP~{yK z{C` z0+SAr1cWmr=KOX|cCQ+m*BW{>0L=c1M5}F3nQ@zR+U1u!{Ah$)cfBZr_eud`quAV9 zi0wTpyY6xzY~fE!&Y1DxF5iO97^(rawR5qlMk3hCnnqb!vMDKn1bSd;qnX4=;zRq@ zU4=LPL1hg5_`y}+9<@}`&cx4`cC_%ZmfT94j(sr9@3Ko{!x$WuzvJcZxg3A z1KFy*DnV2qGg%wx-{P-u&jzcP@%<&=Wv2kI&Hv+OW%ru7+A_H$5?$oj%h*31G=hu1 zHdfWx%WPRRUr8^2%Fi!Astr=iiefKW9Nm^6z?L8uu|y(WautQv#%Z%1Mn7dah<{Fm z9SFtzz+|IY7od$g?j z{jps?81Y%^TcmkN<0WyeY~2If8nd=p*KVLZA4D-)k5~Bw_1qVX`JyFnQoS;r_JtOY z+(%YOmS+4w#wibU6$^1JT;rP@XFy*^LJ+SjAb|tbkru-OSGEjXgF8%%Zn?l^-}k3` z7o?KkaNS;|6)UaS&>xR2DQwXZ%4fXHZ2KTC{^y}P{5z-0h&_g;dGYJ(-U8lZ=9Cke z@hbs8AWj+xs_gIGOR#lYO*6-k3q7NY4py%^Ei2rB?e3b0 zle*UrbL@Mq!zqA3LO@5q^1>yoDcEk|#nRblFP5*HtF=0(f9M5L@blgOX2VHmS zAnos(&)M`PX#|YNQ+m1S((AZh1^R1>RJsSSY$4Uw>d(&wy3y~9?MEJme~dl$des@r z7ZPjmw}up)cDwlZuez2mYkxW5{l*@ydav$hBh+mePrm%i7{Wp-3e2f0fh{5>?c3S( z=NQG?ZYc3p``?I9t#uEUi@y(_ZWG+F%)8*#h~8%oN3M07^XQ?Rb(`n&0r#+UV>$&X zryLm5BUCs&)pT~3YqXt+8K(Tb|UE6p!}YcfD@&+&dwA^1RbJoIU!Q17Eh z%l5zN+SW}JYvn{n{{u-n#PVhXgU^%qEL~>Hmpl~!PTD+YHN2NWPn1RlQChyCUYd$O zv%ZaX{JmX5^=77l^-$bbq1$f1o3@CTYpJ6mywrttJtsCnrcT4=a)C*5bbu}?xCBNB z>V#eG(OVR>O^?Y~P`k5O zlwYdAs86jc!;mmlqOH}(<_z*E;M6?R###LMrwkbpbc#g%MB}0yyR_?{w>hV6p`^c`#nY3eai^D(QiTdN?}O~P906V z5HM|Pd_9qDnc?I0#MQb0g@a6OBH+gZt)0ilc=y&Dx19n6&3YV(d_CN?1}xMqrQP42 z6Oat0#c~f043&ureogU$ldWFYkI{O?_oTz)2|g8RW6i=&hgQD!9i{~9M%7K@Vw-^n z9Dak<3Lz?0$rP;(L^CaEAMx65>}xf0vozd$D5lvv4qroR7Pn$FiID z75&cMfka(~!#W|>S4fG3mc5X;;@JTex&Yz3@5SFp~a*JG& z5rQJK9lN0>f8X*(c!4fjFd&A^XD>{(IKJ0&d8?LEt#|gT+$+uQotbxlxI`UkCm<{N zyYS=}J;3qxMmMYGN6aa%GkNAi%{iw)I)An}Z#YdLnRUF+Z9-fZ^Jw6F-K zCC!FLx#)$&;N2)kPfwE@ffA^CpGB#q zNn_jD0lXB045tL@Oh9>5RZ})Iq<*&66(~C007LsM41Ob35A?W`+D}uiq1%nDL5KJ^ zzH58YV!z3-=$p~YxYK{|C361J{7Got%xYO3~@)%MA`>H|h;W_)~_RCado9Fg>&>wxv zRA2~NfogAVf5gXgVM? zXAoUWx!fmNSEe!V-506*y-n%kTg>#D=0q90h>SBHE3r4Q}rTzh!7Phbw^Z1#;9KN3eNJyf)Re+SxO z)3Prhiis{R+8iNnBF2bA*NsE>gr9{@1zT2>YKLX@=ykd%JP?`@bW}O*UA|fCec(QU zb}lEUW$Zdu#jGK8n$dBV`51Uc_|$S3rkD&H)7nSik{XKt+q zt7g@}SxB66!x*BB6(R`)uiz^O-rsGg45{p?z|?xABoNgH!EY=yDa}cXf4S+;0!Rpf z4B95`#9FdQXPH!ur8iIQy9;BK7@+zJ?XHyT;qA=GCwJ9&!^xaPm`7*>5vDCx!d#j6 z_g?{8Xb9&4j~_-WE2(P`)qd`53^UuI&e~2d>cv-PpBg`A6PWAw%4|E;2e4!fw(94` zsklbbbDf_D7#lHrw2L;NCer1;1BSTx@L>ms1FPhbsz=wLVMm%5l!81EWhXb$dZ|~d z>u?|FX}7k_6@^?9^BTzl&QX-Z%iw89+)IF`lj&cByWfx<(Fc%aV)dX>MVw;+;`nB) zoawV-NgRaaA61oUV{Pn3Ns>JaEW||{dRk-O#7gr!6`P(3j3kp{Lsi_sQ?1(R_|{3G zZi=OEyC<6bX-+GB7L+htr~fH;L4Z{;;bJ6{_sKyb=LVOlfE#@U|Mf|_`?;?*S$}gz zpK+w{9c~i25OPCg_trR{r)~1ooox zw!x6{iRQ@awWifJYU-;=!qr8CL9#K z`c)L_`QLmBCaMA{JQuAr6#38;K+%)HWuXRDwc6NS^UM-s9D$e^WGP`}SLwGyqot&}3 zN4d~!sSB>19U}ahJB5y~bs{Db2Wn{0HCP?!F5%cV!2O_{>JxT zv!e>GfbXRbx9FS#=#(oMCav1WCODKtg1@YafB6qX>#uh+Q{^gG5!K3Wpa)A4Q-vqU z{$$}1C@`3D6-q4tLD2PH|GQ9vpi`I^^AXk>v(dZj7GCREdD4H0v{^rUMRk<%aU$(} zEzfDpr={+b(mr~lryP&=ip;=b7u!+aRPlV(2${;YEohhfBSaTUI&hNft$HQ$c5IZT zxQbTS;aj2DcAxjV+uUQxnPu(KUUweZYPxY1vrlm&1O6Y%-UFy&df+1xd!J z&e=Pxdj z5Sz0Uk5GGTa5klALv;%tN|lw|e=%DO1oRr;iS@+J!9)%wRDy;xiuWgxEM$I`8Wuq| z3}p1KoV$%)D{P!&r9}QzsYsi;riMCMs9KZN3&h*Llh3&wJ!YD*_T#{;uZ&W8xJ^3g zhq_W=XF>N5f1YBA`h4j%!O*+o60>T-;heXMC@qO5Lk?#O@&XKX#{dm1@q9R9Nq&s_ z3h;|vx{Ewa>W8qAhEJ?CD#Q9QjRAhYB|P`p_#=oP43Zpe_q;ZwHD?z0(~tv*8CFXF z0Q$zYbiiv`hekJ~^%wDHL`|EyTL?lkO^GVe_dg6qQsRM+iCHy=^cx~(=kZesrKc2+ zFvSxw9t+#S6Ke-`vj^;L2LjOtih>6oO8bPTd+6!y;O4c1SF;B`Z3m?2gJGeAVwHUx z*dDrwsZk}Sb{fxP4L|3*`K(uxWjr*EqN9QrCEh%YNuEFB&M}%I@-$mx6~T_7)D6Y& zvTSr>g`c^>eq_gTtNm(5qGbym`G zfZy$+vi-c`j3k;WzDXjm(nhh{(Z#?x_x>L{^8qDbgK(lr;FduNk-pG>Y>lUCg*8IJ zRaKgbBoUxqTPbKkN52y8nD5X}v*!Zz6Qm9&4ghLUDOpbWY_Wy(1@CG2RTq6K^{GCU z033$jmCsf*aU*MutW9WDm7cG>cBlIeSkUr8#hH)?kUItU{yoIF6w>KIx&-_#hFJ{Y zz8fzR{&C-3FBFElYm!)oLz#Q*Ez2@yXVFJo*NQg^bCKM#S*;d{0wLv#nyij}+3W>t zRsK!<9u6tmYCn{IQlvng>ZZzXH>3qLQx&CXdOcm5D*bYF;-^O>IpCc}TPhWMA8&2x zMHC~i7};5r=n)tXbWGM3AVKo7W}N4J-`laXuvUtU_7L(yRJKksj|UMv*j}%>6%Z3> zmJ5>#sD55)X|BT-3p-6F1YrwodOu`!C;rECBsZ`O-~=Y9nDU_RwQU@zR6`)hwVyTZ<*jy3?^7 zsCZR6W3*ECY;y#ES3~@Lh5AbqN+j={TgB1I<>7}6&sv4>HVzWkwkHWS9}~azX}rFl z%q!Y*i5A$L*p`as-FO=if92KhUdLF$ms()E#=1|I--dUT2=#l){ni;nMSv?#g{kZo zY^F}uq!!%2QY7K}G5YStr)+S)d_Q9%0s4C{Op){U(C2bT-saTDr+nJw2xtlaTlg6M zu%)(-B2U909G3ob*JYy{aBrtnuny9OmPKM9u2=MMf#I)!9o)RYx%QlVwWmy0;T=gc z&3%4z-5H;^(x2w6K631QxjU(_w9T^DG^Mu#s;~EW$xwn?0y3f7)ah#m!~ny?UOW#7 zv?**x_(w$HezXF{Gxry-rN9^iaA2EzUGMj6gjRvGr@$6~26zg)lHM~>btq_NI+Kk| zJ*iQaHsd3x91eD&kY$Ir1}VYeaL!qEW}eiJu42+UUh5FJ@?1``U8KlqVRiF{YzVa zE!_^PZGP&nMZ`^Raev$fwQz2~Q{4mcN?{IR6=i&VWkI>SW?qf()Q9$)nmDarFMb*EtvT_u3b%znRO&QqjrBSNWyBWgIo=1oEzxt=f8r%h*r zRx)fgG#_NJ(d7un+jOKyAp)J``)(GAcVE~==1s_pPJSO5q5yg2)AoZqKM**7;!8pbky@Rox8#&Q)Ty@lp+p1g zNxA-Fk7DEuif)x*OeTysaMuzvK`Q?G)s_h7YTLDKY`8K*>BoeBsy(NRj#kM@Ci z6(HY(CsG7SlsPk)L|cFo2TFJK$$bfY6eKdY@ta8qNE58tiE$#(|dOTrky)Iqx>!Uhurq>o>Bg8)sje3tOLm0_w>Pk8@`> z^E%Bd^IoA@bmirz+Z9*d2yc7AF{I2ltf*tt`0j@;q9P3jPmGA z&pIIhjK&qUZ}=+z?2`p>B>&TZ^c&+3_z{j`Tt7^2A~ zM$|NKSMP)!!Bn4bI0o)jXks*%`pYhYc4@UcD&RE_d6PD7;n`)>&M zKRWDw?Tk(vNNTDsbzf zEFLKay6d9nCm$v)9%|`#A&{iM)7Ioz)@1wzo}SIwFrRl*0AH1QEge&OBgnuE+~QjO zC9d4uE#ofRS^p8UklpO0b68gc0Z|KUmO)FGN2I~FhXpavxnD6y4inpNi%E7A3tY-y z1^$js;QW+-(5dLKIg=?~`98Ryjd`yX+e~R?7Hr~^vN^%Wb=e&;TqwtLRvfC;*E#+G zLiP`@pQ=~I^8mwu-~z>nt#J|Ppa?^CY=uXK`B{C&spOecK7T61$7P7h55joG( z#m*8@PrEdFp7vQ(9D1-k+O+HEJfxbSFsKTM+LOMEB`;-wz8O;g;NP3FZD`>@0|rmeIBagH4BflMoy z^es+)tf3^M&BR~mxLvQj(}&ZRkiZqG6YzS0-h11RWgOMvGN~Zw3QITNNqJQ?y+gfW zFSGLC`(Ebve?O2r;W zUQfpbmWuLVV=ZCMy|55^z8}%IwHw{wESp%@+*NUZVryREx5*Q!btY^Wc+?_!=*vWY zt1aEd#(fcKnzSwlmzNr7&?tk;>mliuzQtMor>`o*D|2WrT?&ZnjrgZF6^UpS+#^Iu z8E!*ban&yW+C&S#oo*5U+xpetCh1(@&cLgn-Z*E0xfhUB?yBWowF(jfJ;G8yf~6X2 zF*(G#CjD(xm8lVJM8w+sfvoR(Y$s!)m4BNp@R+!rmGTVo`f1YeX+myz9#)9Z(8o*Y zyI&DbUC&WCGZvMzyeg}eM-v)&mxpMByahJ(r{sY?pyp2~%PI5AKUhJKS=2Otr)SY* zFt1`mJc#;Dn`pJ2LkM*g`topEFmg8drRRPVJfxUh+2qpw>fBy>aaPAn@nZz{bZeiH z*CxQCj!oVd&qjBI6E8{tECWA%uNhEB>VUKL5z#ixJ1{toZ8vW=(_sj-pKU+tZ)IFY z;EnFfGImrTu|w4sl6bPwbDIgt`&TTl)4Q9SaC<`BxULqaac#+q+(%|vVsWg?U2UN(BJ@#e`{vL+cA~flRr=&eC(b^Ja38halXz*2A5~3*}OnU4h3voS|{X zfQsDVS^dMRl|lHWi9t$u>fRrzjQc%^Dot7A zNGnGik1EswS zl@wN4-=G*G$OliqXe~X>ZbK+4h4e$yAVv@AqjowhqO_g3qSI9N!G@PD0iP+-$Fry) znL-q26J!z2rJGMRZLu#cl*Y4+3Hq^m_DWS6jI6k@p;Wv8Y4BET*=kr~xyC1EPr>_= zUY$z8tHR{b7N%8|LMiw3(cZbdIAef!SZF>{?cU}DR*DB+D1p`K%N8f3^NNg1T{|gB zU-W$SoI3!Sr;(}zGAo(Ng5_JHHi9;WWSHbb_>PL1(~&6zfqI)oUP)VYjSsivl>ead zzK#;UR62Z;Fsr=3OJDHg-4Br7T!%rdo+XB@Pz7}|-UIWN6mps4H+Z+r={6V>!iQT* z6177axzbVPWt0Ac1W&0~;Z3ODmoNTdNxu_QJ81Q~iV}-U*K;KaJEx4-1j32A-RYz2({^Xom2&a&scTwoy9TA;P1^k zIlh6K06nK_cU?`Dwj77~dhJ9%WmgQ3DT2QEi$?WB7JYLe>D|!2d*UY<3mQCimKSpM z(`mH(#TF%$LGc|Iz!lH}M1@L#)bilpF> z@uS*l-?z6~BD$vhh>d=pQ%dqdrVf#-$XZiLbgI(U2N5B%5cD;ihsO6%l{QWQkc*BV zID9eS#G1gzB4%y#voiE`*98P;s`Pk0Xfq;2t=Md*YIhIZj|mYv=$*V!EStD-Ha5+| zHG7Y;%P6ue@l9)xE11X(vGJOB3_Nt^Kp4Rq&h2C)_H_IlA`VnP99#=sh-wS+WGSbD z){d`&dzEu=OZGIi@-**~S-Cso$7pITjw&t$u3_`|{c9z~*(g@th;ag_w7rqR>9vfA zHKIl&2iVLFGJdn9>U4MvCwj{AW=P8tw)XSB%)F8*sITjpt)Rp}-DK{_dx6)&w4$9j1{Vm2Xgjpke|~R&-V&v7Cx{_pK!r@{0U*W2N*(t=(Q`)<+LOZK1`{-$PbQ+ zBwLEQiAwX`Fw5vn(7u50>lh@|ih*9axXYIjQlRYJkFDuu-bjMxO%J4_DnA7Yg)`Qy z`~v2$J4ZdTD63OBu(p|4$$#RiOB(kNuBNn~tU~K_+2|aps(~g;=Bgr^9;Twc=czI) zW;E~4FL4dzCGTyyZ-f*EkUmvKanIg|tf~d{bYUK<>N*Vx9dXv2FJzUzqHX2((?|Qu zUQt1O&)rioD=BE5<>Zvzjfu@OmVPLt*>m_Sw>F~}Fgd#u-8#?5FO?#{QjE(UefHQq zYQw`qr3Z$cU=3lE44l7M)%$whw$#`_2W&-F+P5z5sZg=IvFAxCrnEUtY?_i!b%y@V zs~sfG;(rt=5*+GZAPHes=)#uQw+5bx*SguF#~z8-Pk)+!$+ zvI<$k@m6w_z3H+^vPiMHIy?5}_ax#U{$uTfvt2s+?KYOR7x`z$o%JknA78tGmm8)5 zTFVd4%3XnbES^IHX}tA)Wj>D{U+2l|yf6>Sz-TVS^DBM~aS3!Nx}x?Ll#)_gyy-G_ zc+jZg^dxM|eNU^c0mSU>=1fCRC|)P&V&qU;v_?njg|Lc(%J|ZOYhA_X{L0;*qFTSr zA)i4XAEe6heEHAxLXPLZrk6YpiZ8%AFXEW?`3u@KqX!xFgpQGyyY66K?RVwbgR2z5 zG_{_IR1o~$VY?Szw6C(XgBwz5B1;O}dzYqD{lHg@BhTj7CX~FkbHe1Qw*cLH<<^7EW;qLKb~;t9$5+t zJ8E!^Bg;7|X7x7=8?p?li~((L3o|C3qX_ zGpHp|)!zHU9)t%m%(z3O?H%`}TQ6$N=K?HVq=0&$ItXohv}mc`QCh+~((q7_&1hqN z(wPerM7w4((icz?fop18-#jWy_bJY`dbvzqvrAXe=j9m-Vqw* z7BEpLC>#|UeU+l{M!AdgNy=R^>A8oj>{^3sqbz4}@iz~ot4*etl*g9UjFPC+Q&&WS5Hd-Tp)l)oTbZ%SyqazT1Oi_cyW zS#@J~{ipQRfp76I=_^AB^KJHx!LnJ+qSiB&KPr02BsmDm&AUYJ=)ee#tCDunKZ(R496u*ZZ z`=i4@=@Q5>t^<^>i#2!f!d`g~HTjraey_}fD;EWLHdA#~8Ii|Y$~jrq$i)+isfg{v zh{=ka-eVEmSj`plKDzj{fQUwg?HDJEYcK5baEn(+)O?TwW|=WD{xy@1JOd6!tI#UG z=v@W656Gs-4gxxw?69+u47hUQ7VvHk)C0=yLLqmuK?rFxR<2;+ShJ5ZVD_!lCtj5` zUM;>($k+Ab5rg)yM0qmBvnI?E@W(G;D%hQmlHQ7zIct|d8WH(DUE{Mi1puS^59PA! zA4>{K!?!nn`%{Ev7!>9^?uV7rnlcj69l=@`6ZY{J+A!k(nVz&^{%iWPnajr+STFBo zizclOC$1%1&frz-URKXj9K6JAH7e6VhZni$shggt7!NGJdnlKE)^rdg?_6t6YAn3B zcXaZI`x%XPLnBY{cC^0hnT#RX>d@QWmP9B~aHw`pdDxhDxM!duWu?d^W8-5T@Idg9 zVoyLWjJ+BKvr5bVjc3K{o(EL69o}*Q=KwS0EpKoR9oPkRepV$Q;E|hwilyCa zW_9wKpP-Wi$s4H)$@Ck<`fLzUtp`MP#`+sTvG6*mH7;eNjFOz-L#!`QAv#Qeq+J0a z$c?uN-L6t|hrEkK;*GSgmaBydzKDv8XNQEUY^aq;f2XJ_tEw=2^n+P(@2Gp21dP%_ zo-Jex>tW4ZkTN7UU{^?sdaOs+i>M^P1k6N(03VGx6|`cOY>V}Zko$P zD?eP-HS*R27rbxnW6UffJU7)<0@8#Udhbzz_p%^#E)>B!7!{Sy0kIgAm(T8nkr|(h zultBLpgPx%USD{dwKtkD>E*v-Y$IP)(J;Dke8t8?GP;PIX4{#n-_)Q!J>L6adz7f$ zuf`Qib+I9#%IJ>0M`-GFH|)#aT9%gO{J?Bl5QO-mY0`u0x!U9Tt93o|+kV3!V=N|F z2R?tDd1h9G-0&Qc9bi{AK_(lOl^a~fs%I)OKFpAf-u#b32UcB7h4Fzrm+I)4mMyD( zxKpax68*Y0s<1w3yit*H<^EN+J$&MCV~6YI;=D@C3Rx_-#?lB~f%_4avg)o4GW7$- zekn_SiiHJgv=7FIBbgJYr|8R_qFu8KYmeBVi5FA)y9ty3rrOr7VC-dZ0Mr(DcY@IFn)6O)PTrs+2JCKu zt?wO}J#8T~i%F!kVGP6U2|3Mla%E||)j`4}be z^hpNhU65!3I``P2$zCJ;#>C*`jfrp84KL`-v%U-3%T(CqLPY59HBYJMx$jp~3PjFM zU6m|OE_ku_`r+$RHbSAI^NrqIt$~=RTMg5R+gAx~Q&w+2;H=ARd(v8nv;ml45P{=d zYuZc3?-eujqpq@n+=fxfJNuFGa&2QnHHg*XY6Dy6(?B^Tb;!rHkm{}uY1(7Xj4(f<+oW0G zCC+`qf^6h2ZA)RsdP=PI*#4d{K0o9+lYuSW03Tpse3Qq$AZwVZtE+h5N0O>=8;9cQ z$9Gix_Um}ZLk*JKjGh`KC>7^T30%*W7O-4J8P3!Xf0-OxfKI&dKYG`mFr~lx=t(>p zH>FOagoV|5dCJ_DB;{fJn8x+(%7uRMmD*c+I4!Zm=9+N@06+Ws1UR}(TdfAqpHX{B zAmtH0!1n6JfYpJZYow-u&KIL0Rbt&#VSUg}oPZe$<* zZF9arn8NK@gD-$M>8#I65^<|k+H9-)E}i0ei|E`eK5yd>P7JP-^=tMzu!i7S+BmPQn${>7 zUcLg;C?R}ZwtcGcrqhFSCTv>REoJsY0nH(BA+w~8;;m-3v_K!tJDmvtV$bDlyCM>U zR)ruFHYmlc`F;>b!CbYhvB+1;5jfyMBrB*hohi`;Jr?XlhrEq@o)>$y>;c0fe(90) zfF!)qkT93+rART5ruG4#qX$%B-!b1DZ;IUcpN@naih}9Cz7-rIrC?#%7%?)4M({0 z&2q^p#=1T~LI>d$sVW_sv7d78=)@6fFRh}kb-)9!aDF})y>+?ZO<@SE#D#n8L@mqu zg2iP3N>}eJD~r9*IR4>EEz6a#(B8%fXx@1&GS0*q5%CC zdA|N(x92H9FatXADIUu6P(a@DhZ~(i> zt>5!8XSU`86Gl~z31ImCkVxugZs`y2M>FfbxO_YQiVF4^jrNZ`!=Nq)i4Ji1a6Sm+ zFCcYS9ytqH`OPs69;u(R|5JVZV`jSymdL%a2AyJVeA{W{ zBCSqLHSjN5JWd;GJ+EPBw9r^4P;) z0vu!{E;p2Y>U?kWG5%2$nUm&-7yzdVso{C&Zl9FSv=M=Bs0RDiBP7|K%~=MlD@{!{ z(snyP`0NciCX0MQx&*ngO-6G~e1|^wxl?(eF3az9%0tx%N**daT9U8*kzv_8P=PC^jJ?_?cb5O;s zEs@S&oDVbD+qnWjGno*o@K~joL!uw{(QJZRtC~s&0={JhMY%4DECx<3&)qhWkS+tz zj;$RLR{^x6=lb)A_neQC1E*%@4)aK8R4MJ04s{$W(pN8ue?Ds?--dRHCL=`|ly;O# z8TJ3n1}T+^M3cir8Pn~5X8&&cpGW`EAS@1X(u8)|Y$V&(0sXgIs0GWbK&TG!F;vs{{=erzay#u7t8-ZSN+@n z65(Z^CO85htvX`=%>G>^K>T!Nr272+Q2VM7_$@uof-R8d4L-@`Dj1{p>@@Kk$Jcp_ zN&YT*ev2a6jIk+;8-QeaYQHaC53uvERRRd3W&mOI*F4`4SUsTz2D6X=+wG33aNtyN zlwV1+O^vL5fcN6=py}{&j2Bh@5*m@DY+hm&oo+v%7v!(HV`-!Vz8d|Q20)l{D8d4#bbib`Qrl33RkEZ zXa6PdHN0+XEmL(vR-JXwEJ}-}sQLm@yG7-1(TUfCU(2>YC%v8`wdMLvoo4saZd&uQf z$`K1tl3`-Y?pdkfxIxHf3ekk^Pk@*6;dLiY>9-zmKa-!#!(L5US_$zSM)=csbIvfz zFv4=e(Ga`(~oU&NnapE?&I?R3hT9^5B zXy)X$>Mz>)e>^7tdLT?_D%bw~J^y)XcV`ggeH6Jjh!C#!@0$Pl=l*>mz*YUb89&ti zzcJXn|2p~;*7o;p4czAc%kh7Z-Tv`7{LKDcg=!Z9e_(Ff^uPuj5LC`dgz)zIZT|GsR}!=L!U>nn+n1!mAmPF@7w+27R{RhE5U^BC6e`^8jx4Q`LRDi|W3tpgeHpM}Gt$ zZX+dfWtA9Tgs4@R}{&-I|#m3ZKtr&*6G6ng#)< zq+Fig!q$Jw0#;9@Zs)@Pc+K7nID-=PB7l%3jfk~o9fOh80vSLWaj4ppdUUe1TPgk# zYmxm2gy1pw99yNiS5CgxCESybyu-fj)h5Ibne~UB(l2wpS4llT@U}MVNPUt@sbJ8z zFz>^0QYfQa&<8ybx{=ptgB7>7V-WfvVMOH%Ft5KCk=raP?lC2V^E^wMNYfF8L z#Ol^y5Hksty5_3*4*dTs-7wKb^f}LdvkV3t2;7dKcOpGh^mHd3T|P^PIP3h1n5>*T z?W(GA7Gg#E>>|3F(l-b=?2yN@gzU!*p@x)iVfKC|c#1&3JD;t9rO7?)C14?2p4CGy z+u&fiDO$hZa^P|>PaiPkX7RZGx`9g8o`P|`w`ioVd>h=M>^?*zeLV`A>d?;9YM;Zy zAK6Y&_pH77r$l{F$fDBov(MEJ6V37!KGpL*|I@1TRB^WA5UG3m=qwO}0K#tn^ zX0kMSR~vBtpJ>=v=>#Ia6i3M~7{W-FuFXwFLct{Wo}i}uMOE1D}5;EoIX8m*=fXM?fjz*Qc&2U;zuDSgg zi{cWRF`*KlmWq=9y*N6=J=yn`VjkY}du2?OTAhMy&Q3#c@h6L?cPVTaYw~5#?{^L{ z>aXmxjvFVI5qDUqnio6L4UWLEQLXmQ>G8AfAs?(|rN7#D0#3=rwRz4eU4Xia6g%_R zqW2HD_$2@=9zYuEU0d|9Vt|wS3&XtJ05@%)!#iVU-fj{!)6w&7=iYL!a+ zd&z;nqI5v6c5dQl=J4drkiBTOZG^nvVcY0q!)#eDZGw}kHP;K3q(>GS1x{|z=X!|n zFsJ1vTk{FUqwnUxGfBS^hJb~-JxFRA^_nkKgM)=GDPFa!wdirN>NG!CBmTRAE}42} z_x%ISknhxS-XC5fO#B4PE;5N{GlGkeeX{FcAtuUg3jPKL5)QkeH!Ux2sQ8B+4s6hs z+z+F61~R^^0shtCxderyc=TO?6IhCZ^kv%Kdh(yf?5x)pN&h@;yP#5= zWi_aC1l-KH%;idj!``2x*_sByiUI5KFk*A(aw8)>8@*ulMv54zd{@8wT{2!ABx~qp zmpRw+up?aP9T)hb#JP{ji4Iv7Pkb>G}+AN-v#f2n2qVFK-Xw(|K4g^ z;H&}-rY|s85t}S~56dg&82L_4tAj6NF7h-8{0Ejd_D4+be`Xzwnl}f~)huMkF@kDF zZ&h}PTK&z*{yxuk%iRUQ`=UK$*J+@MVnM@MZM$JD>5%2O9cjr-z3QswScIQzgKml- z(^ea{0(%bTTtp;But4r7=3^B50h7mM1E;?ed8 zJjB!p5jGbSk?byE=IA^<=opwUr8F|yz1w#nUm$&rX*^iD zxM)#P$C#HygJ8Ks0j`fz3FXiWqqRO8fSJZHsWiB+G}z8SvPjJimS2W6r=0$bSU?#= z+V}=&sm?=n=OH;;ntu05Y-7ry9d(&b4hSR2>!_RnA;DKfy?pYgigf$)^*NQt=3xw9 zs#vltQAK>Y=o>2OR*vRM16^GD@w&9Xeo_bWUZOG4 zv7RADyv9E(7pui9LM(qD|7-Moo(IELH6Aoxsf+!CH-f)eX?KT%613v0Q@uB>mNXG_ z66Wn2%#9)5{}kU_=q*qY_}uwjQtRqo)NdQV!u+pL^#ryBa#^wVVdQ2)Z zxAv><^AG$c4Mgk!oPT;{dFX<&pFYuV?v)GA54eE zG0?Z}Qq&H@RM1rIsW$4+qqi34R2^@atO4hyfh$#3(~bU1{Qn|Ruyj&`6onbd*&%O*8TGStcJR>=bIG#u zEPKb54lI9MO666MtF;#nGgpw_Veb0ATwKC&MIXzbCTMg1&kAxu`bPqXGYQftW%QBt z<*dnV>}tx~nS8236}gKqV+)gD(M9uXwD5I$ETv+0;!uzQ=K7IswJPKQEsF<-T@-fuDEP=he+kdNvT4{N(Z!1Lon(bFwBWtaxGM9Wqo#A$vnzwH0pq9hPil{nP zpU_zeEE;aT0Os!XEVcscCc+!*wuNS+7J33kS+5fAy7=LE>3Rciegx#o&!Sj|{E#h2 z+8rft2fGd1c1x_}Wru?I*Gz4M-aL}9So#i7&u<>&sVgrr9^;0S_Kjtst6e$4#B%^F zdQD~(LWentdh1q#WQP`79wu=aLG=Is6_m41&U)I#_u(~uw}jb!#wAFQy3!g>jRHk& z1H!MEhqnxRsn7LPm5)?W7Eg7@Fs*zR&W*OH@%W9`L4EsE%HLCxQ@n}fufVKg0;IA8 z%qn15{r^kV4TUS6t;+`x4A#{Wx#MzK>ooJvwn-9;NG1ilf*2q1LA&z|(6qv|_3;SRo- z|D`|u*~|VAH8SSf)j>b>jpd>Ya=W_9U)i5WfhqXk4gQf$Kzw-DV2ilXo_@vEqth%< zrX-x;EPf!2-QbqvKTTcB#Huz6Rn_{OV2SAR=&$f>t?(Auo74}hw&i4@^0|*rzH-h` zyk4)H1o`vkD`WHi3tHFzN%jqPZ~KatRBaA2uR!{KM^Nhv77Q;D=OB31BoAi@wx}O4bYW$gRm_!#oS3M%|0{_Z*F~>?J1_QrK9rtSXBFM&66reT zWPyc$hpY-G&9B>@m4aLxW5JwMkmi;A3Ay`Iff{T45?NuHwTpb>A1nJ{rPJ(+F6L3+ z8+X9sZ+$^(d8o+*+mWcyxk&jYY;#^QhuZ9ermX8k~=96Ct9~QMb#=g01O9~9QQ8T<|HKT4eZf4(5w-)tb z*iVaG8IQSfWi9IC-zH_l822Caf*axYctR@gFQ>B^>xA}>zRDZ^wq^L| z_6DZX`i9i-%lnW!D~ahYZCAIz|Rs|Bh38L;7COG09n> zj6pAW+al`%YU2_>PQoqt-&o7_DA-xt*h(9ibUj-ma{H0Q^HNa_Yu5`B0e1D`8Tt6_aA`nNB# zHdQ(06aKJSHuMzZSAqj-;4?a6M&(IGik|&Zh2LdVHwYD_UwTf9oUng;H}K+Dy&2I9 z@vYjwkN&29rs{r+HXt1V`ue1DNX8#sI+p=1;9s+#JPp){&<1Vv-AIf8TA9|F8!Z0; zVppKDRa|FukoVtqE=~d%+9c2}dDpZ#H#k%F10hAk|8a?F(ngLTxpSGaL4(x}g;;?I zh}r#XRYm9*_$N8{9=_^@NJ}WD5HyS1s#!}^2_OhHn3jF= zT7V{VfU#SVt8O!R`8HqQpGl$3_rIn;YyY)%8GX0&XeCvor!;cbcG$yW<1ls`1v2BH zb^1S(ihhisK7k_r((M(%@G&eZ9_wMPuk@ zo^pV(P(xm{wXt?_UWVyVU;gr%gPqvV%^+KU_n>D@%m_nn1{(0xDuksJ_KR5 zO=|neO{(qZ-mr6<=G8hH%NWcR+zYOW)ly56ElDR7W?YSW=ojom(t+HO^kB;f7TbNW zHevdam75S2SNjY$ps%6oW(Gngeu-0jC6A#?b4#ydN@mO_c`?;4w}%Z`EQbwEfKQfX zu_29zQI6VC_J>HsIk^#AZ8^>%;}OpGR0~?@t;tFzoLAwPQb=j^eQDOM8`|K8`MBl!EWfC zMuV@C6eB<}=YnH;Qv?PNNr2Maw^IG}t{z0nJ7uh;T+89n&-B{AHpqG~nG3j5u%O#u z2lDY|L2u&ysM(|Ef08J7#VZV1nH8}a^I{hu?i%1ra4dUcz3aR2XSLX0Ftvw_>`Z7U z-^)G#AcC;&Vw*A_J^SL}QJ28nsqF_%Ydxsd8B)?woaa30XxlJrw1)7URLc_t%N_-< z%oGBDr=*AaQtO^FJRuUJcEX}V?h;VKj_nram4rBK_*Sv<@QeJX@dj$`R({{p73Q#t zb}9b1Msf2Tpo+dvjryBH?LSS4caRRxAc8xGe!Q)_V9W{n z-2ne#Cc-1zPH&bOue6}s-XQd02~`b5Myk$m-kId+^e434O6AOQ;btw&bG{168EyN< ziW?hO&9BSqSF}2)K!IziNF81|jM8fplo^0X{B`T$osV`+|@{k}X+9~-0$g8w+i6T-BuVmJfMm~mGF z=>z2=Pc#Y{v~@PGyFc3e#|i(n@L!ra8z{ajCwBX4AY}0a4#>30-7mD)Bb4lFRF0aX zFKwV>#6ZGPBPE$xF2{3Bi8=nW&_=iujgD0^DIV*o{OBtbEGkx{a$H?p%8+(x z!`Df#Wu@x5gJs%X)hkYK-5h;Jw^NXII1gF)^o;*~^-P~u`&j5b>U@-@yvCf=AM!DC zJsR?aImk_J;ycA7#;UrL{0}|Lo%~N1IpU+$4iLmuLz8}SKUM}bkVYC>Wo`TFSH-aXh;hz3s0QH2nJj06gsBJmFwKa8Z1oMPzClm6} z9r=6(vuU2ro-6u}Dsc31q?N=Wnec-{5Z)+P*_;0g`OH1}bp-M-#|Y)0yZY+e5Bdk! za}xk4a>k>sia92McAc$0Kny>_gTl-a!=(W20U#tFZQcYcF?sbhUJb-dFE%~hv{ed_ z5me(f;Z*45FApej_&mA@4zd?shAMP=Dss>507swf`>2cSDqkOlY8^AJ~umw~Xl=3qp9=?Z&I%Q{KBs34rX3L+^4CLzI1V`xpA2E zE;~=A!|3*?LXA6LRbS1*FTnJB@T$}}Qv-6-Dx{ee$o$}J|1|~SUjH&jw}SzYl(Pi< zDv|Z8sbavZZNhXYo$=Wf24O2%sC4pHRH_pwpkUb_`nj%Xp^_Md=o6?}9}x<#Hj2b( zjlb3#C}9Q;gqaPj3xSBGuy>)sRkA+yIlLRbdWcuHp^kc z5CZsO06y-2nPWb)-6Q(_*6Bh@dzZU-xzl>o7+mplu^x;XyE%cc|ID#MEn7+I@0hr@ zOu-no4Fv)U)GbjZl6DEH4Z_1PVOSleQAf7Gl#kuJr&)#t`UodjDyb-KF-(&_GVsaa zO6s+hLIg~vX5g1uoZ&UH3I~4p%&_@Ol{1d$lOEDs=$y98nkJdw%W~CRDPV!R38lhBCr}o$grRk zUsWC_?)5Nt+{g5pDYk~?GL(RL!}3+q*e-|5IpNV4wA(T@asfVzlnrr{1hy%TfNs>qva^rM?I)duIx6iepT+y?l{4Zt&;~%Qze<$ z!k;nTKt!L~luj;vvv@>!bR4i{3c4H-y24`wHC$duQ7g!;RkS zI&=fBkR>l$F5Gj%6(@R9A?x<7wu;1aOrn%VXm~P&tW{m=${Ya#ZTJt2;-lgZjaf-a zW}kcP?Q&Y{&z>?Bxa89PEkH>ZI zzFzlrJ?`1=@|68*d z8T>mZGDx_P^G(o(nJc1z*LD#D-Ml>r#1 zY^h)Zb-{5kL9mE4>Yy)2c_k#%KtxxidDAm2bgu+)oOWmiC?Q&YfW6y$clqS$wgvTB zWL%d`E?GJREwI29@>PsM;}MfadpF{gcDvknkQ=W7Fwc8wjWK@r=ct=&SS^d)LB-qKwDrbD{4SRoa_(Dp&SFh7r3 zt<9ARpS}Iqa3v>@*=UUQkNS?V@_wv9DskQQ5Ylm7jW~WFoaQc8g}bl2O)Q;Fy!w-;X8t;sM>#s&yFIJEb@dKgx`(zY3x; ziZm|?YnoR^ojQxIGqA{_pMEg2C236)k=)B=m67C8Qal!iw{D}t`E~_3(|%BD`Q5CF z#5~fuUWChuUW6lKKVi*M_N1{7~7~r{iht)KTQ=z04PaxU!Lc=q=K+6}xc^Ey(!x<=ATd zkK3E$lZ>&cEyv8Z>|m`_+~tw>?BLq8;;1x!K2`+zO;`ZpQRelsBY=CB5zWdDPVdIu zpZAaB`=_8YS3S;W zKEf`;mNhfsXaO{7RMS32jjZt=MIuIroWyf(w@jD{wq@w>OI?DLf?WapXd?SPS?iH! z=5fwTtDh&Y!`sF+8LF?PfZ5*m^`q|w+50u=M>uvrP<=fpB>fW^v%g^RLojaIcjcF` ztg*{`u`@F^MI7|fS7-&4JCvo%AZYPAN9o?&s13*z7(>!S+o>TG&rdx zGpxwGkRNnUC+6;Eip`7r6IG7C#cZq&A61n!oX;NhyQGt2L0_q)8g-*G*oX3cCxc>K zs}|9NAEg54Za&r(px2SvjDu=poMCE)BDL=M*pR`QzjsDkf!<5({CF%hV}n04LAQ|O z)oN5Tds?)MjpqG*5FHWmX#4ab&KqP0ERcdY^^t8E6dE4mIpo{2@W#Exe*3qiA)gap zQaE-pB|e8>KY#OJ-guI+g6rE^(qu}to!#lK>|J{eE1JPR8Qr->{m(qlb$v=s&iKTX zIz+=LIy(OEs-%QOOmwvV-^Pmn#OnM5cmudC{+}>8IyZ;UBy3j41TqKRt4LeZJc&9E zYRd@2WKV;-n+?jT{hgAw)lUL%MhD*PwKp8V^ySFpuNP%Q6@=o$rXG4Pm#YU@i);6k zBK}{2N1gxb7WwCg`U|F19~=0{NlLt5P@nt1RDrATr`_aVeSs>_w}3_ZVdw9JFBDhIO~510N&aK`9%wz~38SzN5SuywYLuH(#c ze&wC*W1NUSl=4$(dP9?>{goNAl07Yd{NWQRLaz*27%NXqLhF%IoJ&e(MXO{A%V;isvcH{OSL-=yUsH1AU#cB>F}5xquF&w-Z$S@9LjN z;s5OLFV+9)E75PE&+Ul~^l^gzS^f7j{L9IJD$s#RFdy_IxuuiRMir=RNk6R=8m-qn z{Z1g*!#jW^Up`j3I;>+1NV+R28l5)@R*CIaIts2ND_n0=GMY8Ay<06*s}^LVyjqtS z-$C1~^V)o8azf->ak>j|J!f@<4S((k@+!nd&e7%Nb8i_=dKZJsjzyfr;b)GSxH8;h z@2bEfkRmvE#JD4$Q2E$peGoW^XY#Iq;SoDfjcP{)N8paS=VvxZKE#D1ZrDNR+f^X9 zP)${jjBMqjB9%mWza;D50QS{@3g&E6dsED(MM_vXGekP@!D?fWN(YX_Eucdu_4hi&SzEe(i$AxWML_9FdwQ=w zt&j(Y;NKZW;NL|}USsesPPBRM?WhDRWO{i0bN?KOcgtnke3Z(VefA+}**rYfKxr+} zU=(e2*5UB5`_D-0YT$ByIBx%zQR`WCxK*fc3Rri0P&nwI`PP55MrvKNh@Xv( znGJgHtJ1gmO{~wtq&#)DS4Et-6x>WA2|(+F1G>Kd>8G_?kz0( zz`iEe!w#GO=zE=VAb!5d-DPyEt?_r53wv$j%(+1-{NC|#RPrT{ zxRe9kq8V-bv4XV=gLZxv5ijVg;nz1MVLjPR;N4*zs05J$#He`{qw7m&Pve`w+!e!z zm4*OZHvGD~rlVQ!Z*M2TYSmFVg#pM^lf!ebcp;Ckxly}x78tV6L}~%!_&;$L_duuc zIuihXP~|JT^8Og8A1 zUhYos7o!#$Mj#(mJ@xfC?vvWJt;EIM@<-LB1c2u-5M>y_m0jQ;|0=vQ2zs?YUz&6G z{y`=4ay$rh)KOW@9TpDHHVe!t#J-qQZHlgrJ1Yz8Q_CgqTA2)@h&48c9Fjpg4pl{E z5BR|t9JnRb&t7?zCETH_Q(eoHvIx2Z^}07Nn4Wk0{7_j62hG4R2Y}C^# z9}fz2ztyVkzW*2D^;M7 ze~3GqcBcHppxWJXKG-$~}>5A2J5zGig8&NAZA`VAyqEcNIJvbk3G z)t2zQVCvCcvX@c|GM^!u#-RZOr}G||l@TQ}TGcs1g*|$p{kvlaKzkV^KxZ9=f(b6Ex4nyW&MU|cGG63=hY?=b&IH1;Wjr4?%j8TDl31( zwRx0B!>AsQRf$7-q5i2dRoNGaLLVPOimzA1u1302IqoGF&wK2yj7mSR^w1K(BrP&` z=vXi|_G#;>>&~OtH47CsnLhU`w`n{kA|IbA**Z|$9vjkzY^=$^edvdrfwQnAcF}+(WJjIF zs^?o=##+73uGORTv^+3r0EXxxJO1dlbbJ9_WcHu>GEKy{^s9b>J?(n^C;e?cDlWE39#}r=xo-xB!fQgM3f0) z+hLQGgcCC+@XT zCnNZEblJayUt5}`IHeJx*KZt&Egq?n zI{SinFX8D_#1|*x<+^vLP%^OA7cG9$bD6laq;h%?+hd$FX>U(loojL;p1sXTdy}}9 zJ3vDU`5yrA#T>(xeZVYvmaQ|>RngaLr(IXcsYH7)d3HhW-f;n=E)nq)$ZQW|deLUZ zTn>e&d9HjW>OK3bz3C5+@zTD-3myjUwZ05)&^hRc!CvlUDC!(spNoqL`-gDOkOk|}t-XkXDv>uBbF1z52&Dq= zeXkowWJlRm$gBOn*)oTFon9sKj8=(v9dg=Ns0Ti*bPGDd{v4B1SyUU;h{yiWKOC0* zI59pe5_@58qKV5sFsnZCBe$bd+j2;3xNc(2vliWQ%^7&9KE(rbU%p=fb1&36_7fgA zUZcdCU!eU2Chc-rY7V-Aeoq7c#Yg?^;(U`xuAkmoDu5!p21Ya}pR*8PY6du8zuN0G zG#E3-X$a`A>WE2c1HYZSNH2*}1&ctNAl5wC%fD@ObYb2H<@e~;@jh#YE5~NsD^b7QMpKKyM@k}`Y zF+Zs_e%xBU_x6<6;pm%gk+8m3NwA^kvyVsBI!yw7vq+1h03@eEICBk_=DfB? zjt8;T2xdAjl9bPp90^8)3~AG^{>gD*}>pgBhZ5H_tBjrmKy)`&>Ul+%O=_*r6`v8DxGukZG zil~>a8vB-X=QilmR`2KXJ6?X#lLKJa0*>|5@^=&f4Z0e2uIYc44;mf)!#V+t72qN% z5@Gjlslt|z)F{IwulQ3orqrjtS#?|vz4gvQj>*10jvK0e`IO|&B3ofWjUT!`?#9gp z;eW1|Yr;+ZnO~L<;TEeAb7baMjMv`2gzCKQBu{J~Zn3N*b=PV?oD{&jLZ{Q~zEy=z zsvhpBwf@9(;1l-X*BhWU%9~w^S;-$Pk+@aP8Z}H6EZ5r>*o9{ZEHWFQ7`B4Zmbr&? zh5mU=ZuI62D0iwWChX?S{8zSzeJ{6xZEvAs2M(3>s>8xxaZ@UMl* zopYbu=5l*Up_^^ul{MS_4t_ zmV1<3+k)ZmK;OaduAbcf&h4c9yZDo)&#G#wSjuWufSGdFO>FVHF)a>?XXU3{J`IFonNN!_E zjLsp)aP77e{g;cjL2h}TDcH7#R-a4O(N7;VW4x22Ni7my@5%XtU2UCvrn=^cvLpw= zu@Xs|=evd;#gugk3@K>W?ieEN{%aj|L^EIQ&BQ$bQT&(ca|;^-o`-a`I9)yq@P}EO^d;BY*7a1#HQc#!0)|xiuX7*yh z2WqeeJ8mtW?z4+3T8B~~sh{rH8HpCk9p8u(jPdq@ zM1-B=D)}$m&^#p~S#pYa`1@%{M7>(v#5b8gKaWRIWmMdGrFVY{iI|oHMql}hk)2g^ zqYkll)!@yW-=gH1*#kH9z`l}NGkP-dgr7UF3;Q~~{fdqFp|W>F5o^_H5X4i6+OW%q((NG3{j$bC zM>rjq84h3QLU&Q8w|h8jNqYr4BC7Uaz9>7*=|#e{tj#M(zPyGnGNc&YfC(lqdEEBE z{4L|izGHsSi>-t6B4nL(@-?|d-qP2bFJ6|d+C@d`Q4!FqE!8(9KnciE+tael(#eAg z=4I0qsH5Z@*;694!GM*-^h0(V)4!Bl+$AO@YPIvDUhatm3+^_q5CLFob+mkz;7F0W zfE2v8*zBtrL1qQ!y4xSd7DL`O#_tKORl6isf|(|tQ>xo!q87ET3|#u8cDypyX!FF| zVbwR%=1S!UmW+q1HLPpYya)4L=bRLM6_Bnc3?o-{m~}R)b5ecYPY7m*#?ha0a)t|w zi{7>I9+}9Qj-fvt2abiSwPb8z%(ZgdX-R=x48h%pqpID(#`tz2odN=(Ua%-o8P?Z+UrC`0+bY23?6kT^3JV{WGYK+ zcd$MJ2wvQ~ec8_hFBold=C$iO3?1JeR_PGY0z5XV$wOl>lL-qHSx2KkENVRNx9v;jjEH@4cYyOdv-I} z`canA$oeBDFG(r9;>UL$ZJ>UFXKe|W+s3_8M!KE9>@fVnq@wq(O@*piVMSQr*0+G( z{XsEP4!3@Od0(N0*xfKQZ|fg9A7u6#I=l}EF5&f1s^oxo53PPa1{LJJN{+G`P9$o3 zSPpOA@+Q{s9lnD#c|ITv3GK*}i1wPRrdh>&Ki;|rro$76NdCw@3*9^8ww-s1zV@Z@ zn^)WbMpD2>R{J~_EFARZ#|FaDR`Wu(h&biTkKv)PFwfW6bDL40xHqsTpg)#H5kAJ) zoF%zxU~;;L}Q^dI)i)1cbx7=UeebQWK`r6Q5BfvZm3z3jjNbYyI}>J}d)STm<$ z1nV`#`t`m^RLRJ%8o@Htr@f|oyp#*`vgR-))Jmi2&5z0X49fCK0MK?@2nYy^>duwr35P(EI!OL>HCy}tB%8RgM~>7L`RPJWy9;MA*yLXXxpsrdFn%A;4)S`7KiwSC)N@x_6QCl ztl)>})8t{5$rbz84vY1kBklD+h&_$O&9zJG4ls^JPL>#rYMWAda!$hrb0H})*Ukr? z`4@i_fF!2*ezq$e7NF*|w>}{}{M#v~^^dBjfCfs(^rKmXQO4~#2Xv(Q(4tWG>*87> zjI}N+lXv8(A+7R4tLOX3oWZAE-Ha+RV#Ja#G4du=hubcB8!*9oU3&&=2+2Yx8p zP_+jUmS%UDZe@Ktr)x5BXY1|4n++rG&%;SHV<3~Wd9z2)k!1Q$D}!4CUm`TN>jQ#Y z1uW)iO0!PkfN%$@u9kzD&y8QxCb|`o#t97TzE$l9g>I>v`?^)b^3T|5ip>l>{@#%9 z28r&eO2Dnv1#6R%y`tz{^u74es8P0u6|mjj%#18vuUnm?Ki0i#?G`hm|8+V8mrDQK zg}C{2G8ADX8)-pJ(_OJsdZ4A2JK*s|o0PZS8F4Hos2w>7k)`(j z5#OrI!=)lNn}$51L2e@FEFhMVB$T*^Wbw7$2-~%;m?XSu7bFJb6B6Z*x#oY$J~mP`K#LW?i*!D(F_|>AAnJjg^o#&>fZ*?lOA*ln~JKRCkTzi zKji&-3Dn9wNr#P~p8Qv0titaapfoYYm4wd$!EoW(eUehGFU!Uq<%>U44l?!^)TV`9 z7M`A0x?BXjbn8GigZZR9(xan(>mX(9)%A#qWnWz_mN7r+gq#nr@W-(TaMJ8~gXwRm zJb7)6Qz%loQSM4_Xm3mT%;;H(pDz5I@vgo50+@SAtvSrLL?KLQik$9x+WHdc_AK<~ zQK8N$q$B#{vQDrkgYq$u*Oud>_mS-Ks$^k+Dgug8FbWIwFK=4saZ#s`Qa-rK;TK1* zR`1GX#BOB1(*IrrY*5vhYl^OtVH@3A2O;_Xr^XliIA=&2%XNjT1Mm-_U}ZmgCOvAy zF9>*9mUN{TTH{U48N=;@v$X;=6xau}5&eAO4c?VLytju)SWD~Bp-t!G6_V~Toi{enM_l(Z9^qSC$Eq#9F=J=ysqB@lg5feRH>q$p zUhKBU*U<&(-ucu|X7HhpDxOWps>UL1yvc>?08hz^qa{3Cx5?$xX*nnmZxV4=H978iIKGSPXYc(vR-(g(7w)S3rLc(Mu~ zC*3ig)-D)N7s?>XG=miLxz7Q+DTB~mOAC7_FNKPRgJJDmxaR@CiIdLx!QVZ?lwMQE z4Ou>^W#H-qh*+f^U7nH_6foBRhn>N^{`^eQjRRs)vn~{T?XTok{g+^x2%CJ`tSZ>xL!rd!YeD{`|+i zU5eKaiQdScFOF-q&{fkxtd)RAt~ob?=db!q9-Ljh)0h%FwQVOTG{-E>p3?rp-^5$x zi{-$UFw99VvjGo@Oq;XRCL6beWyKxRm1VX)WgXKyEf;jlXd@wA<-nJr!+~nqoIB~Z zq6mazGlVWDr~f?N_8|U+&^!-ZgU}1 z!QbF=Q=65!m=qLsIWJvs>MUj1u0T{v#?ozMi0ef1Qu4S2KV+>aF`!P5avcx@W`Z7= zWA$*F?4aeErIagE`WLR$9m@<0 znYMY3DN?|_fN!0YuLa|s_o&9juzDcT%Q7?-*`63}h9m$941Jb!HC!}RDjc3FMXS=* zy(54QdR@TX_#<_G?P)2UGj7c1<^{ZFbh>zXPU(o4abPf);@q3(i|gV(m6l@Dj?U4^ z-!dPx1rh)hJePxZp@2htH=2Lzdta!ufY#6bwXLE*nfuL7YBvNT(L`nN?3FJSV+GkI z0_iHmSSZA6s~aUzl1KVD{Gcx<>O;`u&zbaw6;#*QIzidC1FTTQ^dAN?{(b5I{%K7Li+ZTor)%!uF)%(Q-{Shb3 zYmL^r(~bttL}kZhZs+&UxD!srk0*-%JO|k_`zrftvAurPqJ>kuK&*e*Hv;g>191~W zU|LFhd?#;T9FqPdoi6|!kY*AEAUxIP>f+1PzVjx?kna1j0#A_cx+y$-y(@|M$ag?i0M>P>AGYq5P$lOScLySfZbGtFb?2Y9gy$9>i zxgrg(N}-v~oA2Dd1_iPD=6T(!^YsG&64w@`df9NQoO|lo!?nPboAzsfF1%OIH^X;h zeg%Y|k#>XSenmSO=lX^W&Jio;YnsX(4f05C^KwUuVVkY4MWtKL@O{nH<1aH*r8V9D z@a=uVD%jRDe_ZvTT)lnLN)f3@WI)JI@Zr*@0S@TGa*J)M;~GcBLKag2^6^tf`5QB%9pa zXGTQ>Vv!FaqLcXxeuq^hhpOICqLj6Xz!c|?fjjG8U{(qC_^q?Im+y6k>*T9lW49j4 zzo_M9ts3)o-#fQ25#Lout!AZ~*L{ zkK_6GC>9^0i|#t*Sreb$ zoS6ds9;=v-Ws+ua?T^%ed;i_=P`f?_t3cVCBTlPzQ&eeR+>mCPKLZpZyOOz2z7fL5>pFmevRI@A(t$Jtf=<1p!+^-&QhSg_s}h zBXh*YT6OpsVZACyX{RmRe6B#ii|8)l3Q6$^Q7*(5K3|xTf?50=`yx=J(#muM*t>;C z3Wb4=+84>uTZPBH3NP<{@+ss94F0o{tFFBlaL-+uXtP=ib$^LbGSXoy8LqXyc+s5sG2~MQ9YFGc)QhW;^?ni zD6lg)G2HuuDqW1=HZu0kTs+3P@7Hxh1L5Kb!bp)V@%1ez^Cl;G^3@NXR)TGUiSQJG# zgpx|hQ9mT1Q5)zT{y%*(()-LBE!1N52oy@S3Y z9%~!Bh6S8kBOLx*IgM9K*!x^GDNzp4dnqXXOXm!Lc>NphE9T$z&;CUU?N@b6p6uo% z^~~W;a^P@qmKd?>(0J*AIkFgu*Ffvti5bsU8W85?jD4(F)P{Xm5J2p%+j`#gq}0(` zDra@+;P#=F{h6ez#Z_JhxL0fh4zQiW3UY&MNIWx!HLbmD!_U4ZDLu$fj4Shauqx{8 zfLdHrl1E={w=+t$!?`f~qnD}fbmC=8VrkM5dVkl&N$_CBpE`MbQ|(=5oxQFXBxCM; zAdQnXwzedxBBMK*l=}IR5hg@a%WLnl{X`xkwArd%=9q{o-D#-1Hest71e#{fkU6nmQql&8BR0wkY--$4&{ zj#wNqO;+u1I9Y2tE77wfEhH9JI4-zo6R%>b6(x1J7hot4c-w0P1zea=qD#`&f+nYeJj5ydjUpB zvi-^;o#puXVeQ(2<3~g~@{^jns(@dR*!quAi_NaXDj278DRGc1pAwWTgA_H z-&qWa6j}^H3oXuz0vicyRJ?UMm+aCr{S7uUGsRA+GDGQ+J+OVW2Up!U9ZDDy14n-l zz9K?4Ar)WBC7cE>7H`{Q0LVbi)r_x|pO_8(OQ7hD(Y)FZ;_9gE^}nvs(MewO$5WWT zs7-3HL|R6*6wiK==lM{RX65GZ70jm+G?ywSQ&Ht;eHVSf6Zfe2 zbnX86>EGFfz@qmB!&bCvk6v@q->N33J zjiN^&iN4m!uKnHHP8Q(|Rwbv)Au?j_Jy{r+L$fbkaWti4GN1yHtC|%(9rOwE~>C@GOk@Qdw`v-kKXHe zzfObeU>$c$Fak7QQGkOc!}f0yHg@aPf2TGbB?>)Ne);hDZJ~-YUqmsI|u@FW8Aml~Ykb-wp9-(mzZy?8o@nvc06o`3ZPKlMto z)}Zy=-;>8+PcO{Cbb9#SHeruKf7;N|FX-@J38D z_FiY&9BQ-PGw})awqBK4Cjz^~*9gimLi`4vH z;!R<<+&qNZYc!;$?mhUU(F1p=Y9A2LKFu+9!ped4S^uZGgl&|c(zy#!`r5Q(In6pN zQ6{z!+)vB|1}2GY8wYVdZK(j0$Z=5^VfZ0$wVNi=s72?u1;T$Wf;WA;?Si%GAF7|w ztghy#subR+Jw#076ab5_K1szS`RuPchkIi>fnVc&vxeLf2V>2_o4>D3_Buh6_6c~s z^%%JD@!>dOZ-6qxx#s9jKSo_0`6BEX{tUj_y=3Ow(I4*$&@P8BF5KNk?NO^7QSiIa zFLQ3dhr3m7^5suMxnCaBbs|wo$tEx1;YVShkW!__fG58QN5HZt%>K>PsikKDKIDtQ zg`^k#=xOP=>NI%ohbDIx@Ow=N4>P$l;9ciF~mmY9c zKn;N+vBS6n{n}#J34%E;Jcq+`l96wQaVF*H62Lw$XBao9_DH1C-{fM3mcAf|D8v?P zx_mlU6)Z9w=`S`q6_TgK)Er@E7hR7u1qfG>u2^`-dmWZGT*LCSauw4{lmP$Z8h2xE z@LnC$>yQf5>sR15rj6|iMDw2_>eaEBk~Hv=VIW#KV8qR~-^PsP-dZ6*I?f7+c z5!djtOqWYX4?u^$&1+bHgI8a_drA+@RyjaY2J^RZb;8?El;oLk_wR{7Y&|VE8QXBk z%9+wGQUS@+M6wI}D?8szzB}^IZ_bx>pMHI10GOm8$|5`+C)0#GMo@N$tgMrwk)syH zhl4G@bt%p_!IH#8SWP))>@fJgJEbIiH75fG%kZfWYmYsYCL^b&Z{!}GP7{aVAqYq0 zL?fg5-y2Rt@a=1M`41w`pj7l~i_Kv3jaDsTyMtQ4fbvpjL_N=MVERTZR~yxfhUV?B zx^BasggSLjAZ+wp{1lJCwL=*-zT&tvVaX!(S0|D(d`-<8N01L8T zRWD!};xgM2dNC-OPW#z72IA|AHExM0G*0Rss&~6L7XtWh{Uwi(z9o=Hs_)Iqb(l5P z6^n6xv@EN>eo#CxESh*tADXaNplKaow5fl6+_5vE?v)f9<&w3X#v*w3P)4wGM5Z~^ zaESob=9XJRo%vTwDA7Ah%95f$RiAv*g}JnBTDF~B(ZTdjw;qk1s}IZHA*XmG{nNci zV|VMr40iq%lz4v_uKGc9?9nUt{!m7QxTVevt|^XNx5A!#zj{%9W!YgrFHFtCg&&>H1Mn(uD^p?gALFnh{e8(=ny}0aWn*fJ9K0=Fh0&6#@}DI(aJMoM7{meU20p#1 ztO6U^-zrJ73DAr-sz!BiXjMP6kZgHQz)lFh|>ZfPxP3rg%7R_TWa_>hG_}?wr-fKzAnhsGnQ+B%5&#aLuaOgb7fF*Gj2l$3(- zR-3CS`c!S=)So^6-swd3`;DQr`+tc7%l#rtj6iIL#QvxAf1L;Vcz*FZQ}XX!7Fny` zSmwTy*Z9WGrbHe}tV_4@kmFA;x-@jAacyynBAJth^>I$Tllzk36Qo2JFD?_fpfFt1 zb#q=BnB1239=lb=HC;b9E#+RU%_Tg9w4>fKW){olQgJF4Exd14DoKE)7V5202g+0zB6{Gl3%6xz z|4!g%X7I^eXA9E)DI}zRMt!FyoLD8~l{q=8lv>;8z?9ypnMVS@{-TlxV|&!nceX(4 z*}rG@11cXXX+P5YcQD&dtHagmA!WO{ZKwC59~=tNF5BIZ*^d!9TKf;s7hvex?{0rG z(_&Z0aU`|&nM7-G$*mwV!ci;F1pF)qR6jES$@$%mUy`Omz;<*FJ21bzRhUi{f_i6a z(xZj@t1Bo6XP#s!_aW{NKUxkKue%j(FRNc1mt)b=nLjaQhFCra2}l&LJE>pX+$oRv z)g#~nQKZvzxX|((Q@1LOuZ*YChP?vy|HzLD@Zi>eZNI5rzQ#D!=4{58`K>_3{Yui1|yyPyBEGBI)@nM%uW|Aq~FP zXZm_)N^Jq8^ZWb=?jI9NiMHs;!Ep@q(gB7axWAo{Ds!<^(K_YcXCW`50E5;M`p-#XB%R z&ZGhIe|I!i{z1Z3n)~>#BwTmd7)bM&e^>_uM!?b4Qq#SlO+Vq)LeFx)k65Wab2Uibc=cSM;j^l|H5m?eJmnKDJ8>W}D^q&}RNY;R2qO{8$V1RVp z4~tTUBfL&ZJ5)VxhO=LNHxZzO zZr63h!Z%;U(nYNFNP=@`>SOSKavwm@DjzxcGK5NR%cln%VK%zw5*S|&{HSka> z_W`+de6`odJ{$ktGN`1;S4aLkEFslA>YW3CWHO%)DbIdBDDd`@J{r*j&kwd`1)Z=UK%3j=MG;l};Gwyo6Cyy^FfV$mgdcoxE-3ruuu_5( zPe`_Z^NKe&x2ZqvDBR0Bz3$S%r(E9f%d%ns)X-Qp64U3fyS z=XpdpZS&dpeWTZ>zikx_63=D~p>th<4iqr(m+Z_`35X=3g6a5sDX+Zr!N0?{yBm$I z33*NHRoi44JoCw#z2fvqul2bi{p|=i-jp2>NOjzABBh+j`-%uTMd;)t9c5R?}JS zW!H31iMuKtjm?tysiPTW>AO+FTD{-D*ibqidW0e(A1!4ru3MlUWa+(8GPZiZX|W-E zJk*&Y(mEh=sQR;*Va6p`w|`6&jCjx`OPLOttoBt$kCj!jCKBLsd0Lu~$^MqJ9Y#j} z-iWUeNZpU>khP|k79}I2AaBG{M0`9nJ$-{UF#(s8gSJQ~9HuKDzi8ndsrPX_Ri7Tb zwAz-_Y7mMn$r;yU8+=mblIS@&yRD0@e`Ite;v}|+;EOtI2d4J7#@q=yiEjHa1dLn* z@8x&EleBo?hiKwGedxy=rJl~@nJELG<#!tEcO?SPMiUR~L&K4wS6j~AtADk$Mya=# znkTBNgO9ZtJbWZT#1o99&gWa}#0H*y-;>ZNb?c+>w~s$Bss?^W`4VN}|6VBevJ`vg z|0;%3<;Sf&ND@x3n)3Aencv8odLVfj(7^gnZ@}EivEa;OgLkX8x7b*joM!=lXaMM< z8ya%fCr_R`dFec*R!PjQA=RtpU&=%q7{LHRIDiF?9u*@4C&sGK-#@~}3fhokEnI_! z5G`%>V(2R5BRf@9eVKA_VwO?7FuFR`agnbr~`l7_wW6gFYs+wLl{4` zVTvHAQWNRA%@FKMe zQ+Q#_z~A}meepq6vo9;W$%l{qj!R_f{W{~rM}Eh}GX+BPMk`1xnwkqX)otp#p-ac^ zXl=P#ZnhiJ)c44!3N7s!%xh2arYj}=3cu%@&l~7xvY0psHsz-Dn$=AapnC_}@RI$K zANkzW-@MBnZtU%U>apSn?OZKPIw$A-#s^}}zIG47-nu#*@2-0$Z&-vq7bDey^dbd5 zh#yZ*6DJK#tWL&_CmTdV6(K>@e+F#BXs8M#sC{BpRgO|@wRQ>f|>YwvxPg&*3w z(aguy4=?`MHY6uyUtd?YCOLE+%GwT9t!1mhcAzHn6o(R}bT58FXO$1}R{>ri_X%n( z&+{sAmjH1a&cZF`EoM8hWckz5iRKN4d7@@eEHrRnXV!CEb_{OSU0y0Q^~K1tOj}=Z zu2ff6i5Ri1DrI=Vx$<&IhkoxjxzT2+)l=d>O&4y8X-(+~pH>)duD|Eg+1&G%t%6V` zQc#%J4bkFHgaMckFyX(SU{s5$E4FDr((*wF z9*2tx+g%Dg>qTZPTJoYSJ==nNJ*wLv_wd7Om9JmYVvN;j@|<_Pc(&>-jA1}DD4W2xe~DYePl6% zSOIthk6Qj7-m%1mMgg*cRitrE&ZQluiU%{@VmuB}NxXDNzOu(krBqiEXdg6Jq3Sqs zh;x92I$OuL`%*WzX|FO4+Rdv>COVK&BeFwvbJI$!ryc#_yp-32dGX(Rc$Z;*UIAY( zr;oQ)pZgZ-tZ`DCIW1nTNWMWm*|Eo95+VnmE_Rg>os~mg(CVA75rd7S}G=&ttv9pL1jqKHfpu9CX>uc2gM^jZvz2@NuEe=ibozb zjt)En;bu?JLgQeqH=-3}G%F)nZ8^$G=EhXZr4Gm?P3E`A%@_K;nL$o@QvK8VzUwCG zL5KB)!({}UVsT^5m%S&XH4!f*AkER@PWr;7GJ^fFI2LVBDNMdOdhUc~Whjewu@u(Y z9Bp?=)3=kg8t23;dasVU-c&7rj%sJ(Js%#9w78c}c*7d1aAp=MXres&tKC|ub~e8A z1Et8mqzppkpG`zL2v57ennD#eE^FvwEnL#nY8N(+Z|Is>xCGHM{I6=Wldsc7O_WQ2 zHMp57VeLErtrQuWl!1<74P`qsg@HE$nouoNiGee|__EC6KzFM}HVRVNBN~a#>Nkg8 z(A#hjq9=dQl8S|X((hVdd#R>5@Uu)b}^c48dd(*naSXBoH94ru~G@#}oO zgJNXO1zjrdqaDH6F2zO==W~Bqv^Tr~ZfRPysWgB{DAbC#%`lf} zUyiBJ^N)FqR!g-t*8!H6(YKH4pN^1;Z^8$Q!i_Bc4+UuYRXl{C=w6d~e6Y#`@_TrB zu#(hX^4>rwm5V;&7$Sb&=?l9F=dX2vZi+b&d9kg&p$jhDn;;!zWThrT=6+fv;9s4i zeG$Tn0ID+A2ZAe@4rlAcYNzRRP}%51u)s@G>Nw<*Ou0=T0e{>fW*KkiANd=mxUhn7 z4vn^1J9v(W+X&dOcW<)4M5|FUrGpN=9q^TvdiqAG+4gf#5 zhi3RRg?^zJxK8K63hIpihqCX0YHI7&J&J%zvmsz8Dk37%Yow_Ns3@q2)IcOuDUpO8 ziWmVE2r5V~Hb8oB0fMy96N*46AtEJ6Nq}HN=WUPY-uu7*-Z9>NW324C=3a|HLbCSU zbA9vsQf4JUS#WTjX8Ury594C9jTfUlaBUd}tvd-Q^7`-m!n5`!-;EWvzs8#nJNn_=}3EvgkC!bmLxv<~$mW>g4cMkpY(xYFEeIb7IQkQ$mArEbrG%tTC%1XcO zb0>+L(wLqt$FVWNweaE;G{n+gZm&_hQn_%eF}=cT{$!pe(Ujb|;_?9W zj?$+j!_mBjhX~k7q^sVwb+-f_$w0ZCiFcPa-)w~0jmRIAf|Nybf}ycSyi@Q~x44T= zKB*0hYEd)z$KMLL_vzoICFMO(B=RLv9~@hd?&Tb)SX2s_vb$JxJGi8t+Ek}_mFA<} z(qeS5=Avr6DK2prnnWCs$P-q)=a%x+lQzG9YY`nP`yt36Q@%!E|IRflv8TZwP@Hj> z;;%L=VujYaJjBt#BjwYtyk~3*Z&C{x(Bs>##-I4%#Bl<}oGMe(&yn+)qW9bPm z<0IpUg1+UD%_VxRb1;w zlF8CB?^MU?SHA*1ph)ZsL|_;Imlyh{oU{fRP_Pg=PTSvylS={q-iLZWu65;r(!E{h zsF4GYQieK z*g1U`ulXLOgDeh&Eu~{$cg>gYyS&o7A1uV%185)QV4K+7#M}KjTt)=@^VfYxzbiZ| zNzFO6g!P_TD>R6mg${ihsdDVn%eHP&7@bK~02H#?g~So~7yoqsjgeUI4^i=(mAQ65 zFF#{mddH*|xDK$f&0EvU+W&M>i2odtj9^VKrwdQSHvc(^9GQ`o0iick{qE9&Mke{k zn(j%`uwRa=aa7{&RYA5gg!qa@(y>qtO+k{c0c3U`$(L%rT92=2%)mm?I_7r{ZFVhK z-RZ#i>n5ETamH+`80;pChxEK@m~FR3P8We!hlMv>|J!Myjl7eFlz=kD%DEoQQCL9K zs4qhtKQx1SQV9=qgo}~xUZ(3=JuO4-J$F>Ma=+AM5jZTNUPf2#jW9;sQi5 zm~dLa238KcFI!jxOX+9-VE}!gsvY2*<7{#yStWd1L$jSI7*4|4u6-vdxn-Zp429r0Qq37IQj*_P^lRfeU`RNkYgWu*&;!BxH?Cj7L`V{hr^H?^uCeW?7P)c|yry zbOSHw@o4QilUpr3uWbQ+%ECIpPYknWuSkQ)tj#{O_^!@v2%J8(-)66zpJ|X5g?7i z24Y?j$E#fBk}g*YFShSso4+EIG3V?%`w}dS*hrrxFu%;tey~1j6Uy`WQrcwN@(p3Wv^T}w<0L!%}#S1bS`dHU5to*|62tqC9 zc#pA&Tf$V`g4Q+O>6oeV597oq@tQhc@zn}1{5|I#i}#jP5BIm#kWq~#(>ob>b^7I@ z=wp%`V}gRit%BD;pLT~#gJM! zDQMe;jXIO1*JJp>;!(evshMBy=yyi^M+evqMqy--$#(6`P^y$##L1qNw`h@?d2(DN zLhOAf|AZmW;ykGdRd{BqSZ=o7qUb1)B?O!DhQmc`Xh&Sl1*)S%8`DEwgg)}R8e42# zMi*!$)YI<7L}LAKGgWObnp(N zFJbV`JsQ|)UgxVh{7Y3kctwz`#B4ns{NwHtMdy(XIr?fo`i`NoT#v|)drv4?ow_*t zH#~}UANkx*gsq-JT2FQLx^XpYED!SWF}6}x3Il_Pb{4abnQi@n#vS|YY-(3@Fl|MN zOZ09X_YyhHZ7#5OAg^N86U~R**Ofdz!Uora>qMo%P+N!$AVCADeL9%ovhA%$O_7tw zA;a!E-Q$)!6;sSGr$B+dC}F?VV-IgD2s3sb9%E$IOUdnF+ z=cOpb8ym@PP6*@H>cN3d*H3*8Tfl(>c^>-j0>&G(==$DeBr&$RN&_5N`;TGRRB6z? zYyaOS1(*V+d;eqp?FV9&YBlIzYZ<(CzfCYF&My4Bw$H^};v$T0BZ}z4_(YBf5Y_5h z7t4Hk4ac3}A#}{{+z){Xk&IQ^dYoEYb{$xIre{S8jxqK}26m=QnM??0tj?~-`2s^4 z+B4*r5Mb^$ZGGBzDK=wi1L5&*p)r3O0{Uw?Npu3e^r*9|m5?Z>qhIc@=;z|xmDqN; zWcU$g{E326)v4LG2_ztePD&My=;`=(J%%ff$$e$Raql$gC9vflWXQyAd{V@+T z1!sn|4v-E+SnIhS7haWQu(?Hu5rZ6n%MIQ^fP1M`EMw_iz54Qq%}6AATfU~l(JfQn7K|_m zW0Fd8f)-0)-^5Uh_+E~S-tP(?j9y83JeSGnExZcBG)><*HsrqQb7;(YHC&fmba-f) z*KD3icmFgT5zqV`PXm`W@>%409l_1NdJM)jo%)-%PBts)>n3Qzauh_75Vg+nHdXU* zWtj_RmBQ=qqy0D5--iunyH}!0bd^SGynpQ@HBSfM{n_y0>8rsIwE56cLBsb|ZB>$i zjhhLJ)*t3<5v--}Tr1vR38{o3GiQ9m;ViO{RZbE@!)SlJhG4&>LgI-a>ZR+(fnuNO z&?loQi}(`+6y0FufeLa@v?uaaVg!ZEr93>rv{@f_UWpy%SO z!M*LM_vqfV(1Lz2+rU?CZTXdvM(i{8M4a{mp zLGOVJLfH?Bj8o8MjOJAOCXzXq4T*w@vk2AHy;Q9|`>mLgp0M-Us?ZdTzgtwUU{TB%p%xzB=h$1V>Ks``28j?E{< zhe{ZBeH9hTmeW!+vJJLR#jUoh2mN}p^0U&;Ar;4LuWpQwO2HZ$d4n#wCdWt57~s7r zKA_KD*InYxvaS6ZBI+nhKLp*m+Ym%kVTM-rJ=MgMGP>F08X@m))4(rEYZc;FAOh4T z4>oF4GQ3K7#~HO{6Vf*kEMH8C!FEOPEwK`2QIfv%O=;tekDu1-*_J2>DlKG|;eDN= z>4a01G!vmmAh3od~Xs755)?=S&F~yDi6%N-$^h)7ME{_F~U&e{-JG4&AUm;se zsTA#}6z!+CnXjf@UJix^w)Gb_tZL5pH}V#>#7G`kPhVd-@FKc$q95abLc2`#kYn4F ztE1Mj#X!0IEruV`;*RBNBX1Dphfvl#=8 z`MW4Yh}fCj%heO z=XBh~DO}?T->yZ5j?KMJ`N9k?t`G63W0uFi7Y-@XVqNGHU0fT#Ll6 z1kgTaFMOObTOQY2z>XQ8(edpA{x$EYvX(6Os=oAE=gD_c!@y+lET7C|9-j7~_edM~HUGOzo`f^p<{@9g||Q=Sk)a85rL`4i58c zf1qddLF|D!ex>{7$1?tS`*axOt-sBYSbttkk|1r*2Qm)CUr+X`TpD*MS^oq5SB}$^#<@bPHp16nWOcjy$e&wy68Fcy$|&cssFs5xYF^go{w7b4V5D}UzTucO$(*e z;hMvAtm!WsP7wh46bXPSv7;J}!Kg1xOq(xPAcJ5b9LV6{%eU>F9z+%jDmoIS7;c;E z>>Vlh98m4v^?45}Bd#LLE2A##zI5(VuRL8GEo>`a9Bp4SaNVlwOGeJqAPMO^?AMwdV;NUo@znXsQ3=?54*&cSP4y#cRX|-OE{lUfU6=TZ6Rm zA|Gn7DX`Fp^;BEMvj&`0$G`(=jC&zOgKXLEt4j%6k`(*lkOXhZc{DAxU=vlD+;QMl zpWHCO6miC}^J?uWF09xq&K0ou{O)dKh-zJ?X`)m%{#Xe_HiVvtG&*Nu6c|zhA+SD= z@!$T%s(bTvw@~eTcu3ODJpbO80VUB=;=QRpKXMa7OSN<+U|QwkQ#kQ8xsA2megwDB zgTM^KgED*%)Gy;iU<~h)ecw?l(T_CiAOcgfORDm?i7fW1<$qEZVL;-j9Y`EKlS+OQ z!Wrok9mCjHXfc&NaFmhBMsID?X%g|{1JXi!=gpth5+Q2MB0oLYD4pd5@0GMWuH$N9 z?kUd##=3V}RV^p6Hvl%8S%|<^<=DZUOo{0P$CeX&yc|q`4Rf{GQ@nPsR&%GHp+zz# zaHYC2V;N`c6lX5X?j|8P4OxX~yGf-(jaxhBm1(DnJG~V|ZQSaNADB~E996PGZUb$q zbH}&%zmd(u1^3m;wsfhxKL~Ki`IY&fpHb2_o8^f;4>Db-tABCg$9w{xU&AVg)X4h{ z#nw1OSg@0cksYEt`ze3tO7M0x-^Yo8oB4136JE)pniDR_r*!UOs5ME=MClAPJwBmVv~YlNyXe1!XFXF{}cjtUhYS|a=v z?6tO3M(sUu*dpa(*xS{{rpA`6D^=DrNLX{#>^oxd{2f<*D}I~`6}xZS)(5n2+x~)m zA=j?*iDP4iC-C%jFLFCmU{L>r6<2>#Vph_^Jg&p4aa7DwJ1R^{*_C_4*YAh`y)o4dmjNZPb1OC1eSEJA#WzQiaJ|isJ!nhnuk)Vg<%1V7N*{_#>1iJdTaxa&-`GAFCAHPD z8R==QV^OOxu^{QHi4WUh?q*sg^PER<<%8_`p1BL}PHKcqQwm&(P?LspNRAYR{mI|~ z9!t{hvyv|jScF1OneDqo`Oc!Xx~_&LUYild?u=CG&OAv1G?JKD!A>^kJVL*Gum@^5 zw$j`i?^EJD+^cX3-d#p((OfWc8>h8IEf{rI|1V4-OIdm-`4#`s8S+_@2D~mxBmNWQ zrQDIHC;jJ^P zS!nhbO7j<@_@`IyiFGsbimnJ47zn_*X(~pL>fsxKRi9`o`ef&zi<}R`h(~b(1u?U8 za%7FD0SZ;iJUMbChRG1wET^#01{vBj__Oh^qq1yseu*Q^kJF};$>=AaNkA`YHF?RqZ3&zF`y|;Z=7873Xl411kPirGWMiv zl|-=g7gqKel?8?}o<+{kchl`bg5@rx!4{7aEYPWC9AGCN1mP42MXdoFfSsb}QU^aG zA4U=^WG*{Z{9n$CDbLyOsPGqrq;r>=q|2XPC-_Y;-9@D5&`UkhS`%v>&6l!dmDlOe|ExrjSGNP>dE5s#**WYZ*RZB z@iG#K4nQ>_4?&af|ECQjl67VcBQ`3xWe#X4N~u<1T&qaSo2>r+MVl+~;;fvJ`Y;;&SQ=U^z7+$mO`MmlAba45F;DgeLw|GUi9+;*YKTpOxo3qHg? zz|dt(Y>585?(=`@p8@C-FTD8WsiSHCA&d4;y0T+32;r9@JOQLJ|8)0P-OFv-M7Ii| z?QJ5i)|M!7ATJ*sb~iUGwuvp!kc)E%9jGCz$p8mV+aYoqz8XHg943r=-7J7`8(vEv zc_}=m1Fj4~xb01ob~{RTVqsg7ZA@d#Qbu_XtRth*ocD>Q>d=Fbfq$V+1S4Okf^QIn z&;19ZqMel)@@}y_CX6cl?jcRR@mbRkPE}J(#+{=-zL;2o7dSXrgqK0e;w=u@Yb$lv zqoz;`*z(oG^Qtc>1icr7xRSq0Mt#Y@51@T^6>!V_EysYYThvz8f+CO=j0iCo*zher zwj{`IU>q*2$e6(^i@vH7U0j=rtQ;SjGN(b0=mv5m+AcNKPanY#szu2Ni_?EC8<}i7 zt1x96oe2G zkCy0$>{tlB0&_~c>fV0#t|L*(VnoEeSTR^$MgP88v_w@X(ske&^2tEHLRnP@=pPVCz0h`-d<7?tuw`*hND#=|9xr-wY zRcT3O&)ni3JGes|J85-!`T9Q85wBkbC)@k(BQKki1dI6j?S`Ugg(Yr@lAo6Y4wSe> z*i2%NbotDk0|MEWh4;CJbvC)GXNL>E=hc>6gOgJyRPP75G>#knli>Y3O_}L@6-ZN> zg@@lhA?<2H(J4)N{7OHZBWR?v7s6J^%>%J6z#Z0--IDF>4IVzK5MEff@Pbf_nfot8 zuf^2p6w@!yZs~6o!f3FiTHeF(aZPl`)-($e<)ItciDt;2zf8CL$dJ`vfpVY~7>L3I zpF1_K7YgsW<(auY;GIb~@u?{yAv=4+2GdRK9s>ss<_NO$b=qU16sWnZu`tr<1%PH& zQI+vKKcWnBOOWOZ_cT*#Bk&1ksBn4+OjSD$9X%tZjjTOvc*!i+BWt<*P3usUH+yq+ zUac(NiR=y)9tKbYD6+C^x3t+}jT_XSSYc^nRAWzsBO4q6MmorNS7cGnXcq$v?>4S( zUh1+TsPeB-Lj{pIAy1 z<93|2do3HI z&X10cM&DMNzO89~Ejd$m8m;MmWujfk?I}H}*u&9ADqr5%l-yKj=KeqknJ=CA(PBOq zcN3J^P!2?c4+U50%g_R8ej#4P2jFDf zMMca?WL`IWR2k$tO<@-q@1G-IY5MNS(OB$8<8m}P!Jcqh=B10vjjl>1Xl;{#NJg@M z(R{F?(}OxkA+^tX@==2u1%6Qt&}yAIJ6kksWk3pE!R0A%xdD=~!6o}}L;JxaL{Z+n z<46M(l(cZs@&KCAm%~-!WDJtRl^+=@*zo0^QZakE^p}Eez?2VLOUxYPhZeMZ-uQ>t z7xke)_+jt1M8ieiDE2z){vm#DcOk2AW&DEIvmLy0MFtoqf8X1p@NB2P-3Hov(TVVU znIIF^A^gDGp)gmKso4gEa&SnV;Vf1xN;V0V^VoZ!>c^qSWUtvZhz@Nczft=QO!dpJ zx!5hFbqsEezsyMx)$K%l!b;?%!Eok3PN%?9Dpp^agHRD+|=d9$H^4+-GIv$#Z&Hhct7RF7#FM zs$B;F>H_Nz(&}-~tFe%dhsAgF7J%YVV$}w7`4Nn=me5o`#$fhorGBoLo~gSSV6tiMAH{&!GKJ zu>78Y6RnW8N0w4|pQJ}bheDtU$i@8`FoAX9+OJd+J8rnJbn1KjSr!o{e!+xR_C@afPy7|Htz3j|Gxg7|uFBSdgpWPPawhvr> z`b)ii{rjNPub(+w$XTd7Cnwz@q&LG;R|}YuuBotZl1z#Y@+F>PGt5_`fjUhDChm%I z2ZEh$tUf6opcLacae3LY>xIC%N0Kr_0!)1U_9#PZ*-TroF6pxOWY0IZDJ8m{QTIJR z0i?X2n0(tR{@Uf8uyMOt)OUK2{Ib~I<=L+LJEpsHz|(vZ zy4D}ip&7ehxHd|^X`1=pGvfA?H1bFOh*Ogcck#AMeE7!h7x7qt{j6zlGJYbD}j5Iz^r4YYNQ0 z8{)+q0}(*_33IPri^irdupvaEcME;bdf#SIQ7V(w1;W3~J@RYsvhoLd@fO*~lYBUt z(`SXeKfoXJWg}DEz+cDDQ&OZIhGfEtNU?j})jdHiv4FS-V=8L*nOo}4skJ-IiFXY2 zqY$`gY*&Mj+!xSpYpL4>Hgw&IFniHQxDf|k1ybpU8|3JfvEjowDBBcPh+fOCJGNQK z<$2QxbfjUr_nGh6KNkzKgMp&EePN#Se?dXUbFKQdB!_3RPm@GHZOSBd|4gqnu06!K zh1^Ywqiq!2Acrj>7HEEJGP>hmS~lU2BC>6ZXReu-W_7a1-y|1KC*ND5t%L<1*h~-R zzGQ)mQrNp>dzdO=QVNQPJm{hgKa9GXDSmmL$9v-b4v)n;_l}4;RH*alta6dT=3>=^ z=8!|k2*q%mgJgegcW5lY6r*kseo?KMU>=TG*nzTVBzh)W(2sJhS9BMj3VL)T@?F2B zlXB%^YnCi^w%7f-jTsxT%xwD^L6%v7;$d-$yXE6fAZU*}0>b$y0 zlne5?RMsxr$ua08%e{#sc8A@oB7p@F(4^-zNAR=TcK2m(fVV}ruygc2?D3&Bc8pHW z9G5WKe&T(Js{uUn3K1eweH(BW6Dbf7YNt< zGGX{`iuP=9dEWP}Ep`$yw_bC2!8P_U|0bSLGiso1Kg7tI=GCJ?`gK~`l#LQC9h zOZu{IhoeQnkhSO;F@}LmP-|j*!m6n`F=6i=bPKhBd5m2O<%wYdlow@&1pc3Fi-b=j zF^&C_a))7?s3}h3fOPOB7%N}3L5-!yL`5ahgA&D~iBeH%bQ#oj^I+sAYG2?_UJeBb zeKLQ7AmuKGF(06$^I!|61MLnh`YzGK0A#ll2!E7i-BKoHXI13cz0cH$DUmx)YPde;VXlfK)4t};7|vFcU&(Syc3E-UC@lHk1Y?FC>ufs)m(H}{@U>E za**X@Cd}+fl3ZXvqe~t%lFyEr3XVB7SSRn;*y0{OVW?&a0Z z>q@RfZj0mHqsJw7`3oIBeOfAnQ!nA%M3olV;;funYC^+(hJ{mK2Dwx49p@~#DT*}g zz{@qealCr;HOj-lnU_~V6id*{32VZ0x{qo+VB;u29}b_r)@~j&hxEI`%hx`672)?< zSoGX%PY7JTD$_IQBhwaz9qI%{4bJ@Oh#mDbHH=Mh@PoR zG8t_rrzes5<_Q~`(LM1**p5s*QK=*)5XKJ9uDgw$fngYr_0Ah_| zpDr!hu4z{H*1yp2BGPhY7rHm32B+nz(3dZkM}$;|)3DXy9^5Q&tt<^m5Nur!EV`a( zWoO)ifWcGTYhsYc?}X4Gn02je=v8@)+$p7&uDLhEC)$6iH?zrcBQ9fXYhIY<-|DMqtat<_R`M8mM~O;xBC3@WLNQXKl%L=1PJ8-#>TW*P!Zmvv!>ln?nv& z(elw`3%S~|LLaA{CBkKL+OIl|gdmDxBiSwr|QNcdG8Rw%3x~mKMtngG*B<6Ey*4)Fs>%i_VBf^Rijqz zcbgi;Jt#3l*y<|6jr}DZ|4ryxnhD0OPW9<@su|Z-d=5gwt5U%xW9eQYV}yN5vw-Bx zVYTr*lZHn)=8NOKj}HMtAsR)Hs&7?1=0rZ3^?0{G_wAsT^nz{GnnD0vsaN*RG)Q-s zjEI~)0KSWXh$7w}U^bjGIIw1X!tzSdyRQh-)0|UJHya78V`DQq#kK|J;Acw+XW~%h z4TRg9Y0}w_61}&u$a8HclZ378fm48g{@ZdU8P8_2|r6Am8)`@Ysz4cgGCy_1-ZEzY-x5^p`4wp=B<|#|MRIt%Vj$ z%$>Kcg#|2aE7Y?%6zWi+FMN3;v`KK`O=ywtCKt;9pik8a!f~=lRMZnn&>R}&Nw)RQ z7F|h)u*}GP26a^p0N1M;4_#pOl;K*#DRV2qb=%gG{lT1LGtL{4A8iK}j|saaEKp1e z^>;<%^R{vOcZwWAJJ4)$tMr=KDeuT%Vy8&S2DxG_xO2H;;GKiOOw8se6oB_5*XGhAg&$TseX$U_& z7`8Td{yiW581Y)IaJuKmpK{aBw`?Gq1N{?ay&w1p>Jd1DD&pz=ti_M+9;4^ctb3zO zXlLWj?QhKZT`yLiGWDmt*Dgzi=)+U!n=Y7FUxqCCE zWlVb~84$IUnre+WLE%$Z^GIq@^9gg$oe#3$2kYgRh?oy9xmmUOhGrrmQ8JQ(LGLv( zWgn%AxS$_IO<$y11~~t-+drqeUjI5POyQ2wDm^~$p=xOvrJb-lQ_fYYI_kH5qO?q` zldzk6q6GG1tQoIrdCANyN(kbS+9+4#Q)4M=W6EqWt2=gk<<|T~o136pHjlFnhDJMO z9OZ|=xgK07552E8{vIpusQN{kRcoEdF2HPemO)?1-8Wk?9=)qLGWU*p($+s72*9s; ziIDWd%&@|Y2SLVuMGA3fjrf?`Cs#DCCut&2*>AUVwXc6o2P@6%YdGDC8Jw@M-1;;; z+L>MGP}k}!TfRmJORs5oymKSkEu_s{dq)d~Suj8h#kBa|B2n(Ke!{!pA+>V?6~W)@ z@qH2iG8JpTG5g_;Yq(<;IxL#KGNm!V<`xtrG>*hLwpJZ2IlTZ6kRMl?KBxFnup#5T zUzKhWao;Jfv$5t0tUDYF{rDw=-D4F0tBbAQ97OqB*15UhhdEC+*cK~j44|(D&g^KR zOFS+faxn^YGI_OR&>{##ol7Z2yU8<=uWrh2n<#XI5l>C6^m=a;_~(BW@V8Z%*=zjH z>pU#7)!7i`@3_%i@BF4F4Am#&Y8z;OEXcZQ@neiMzxIGjJ_AydTZ1G#Serc^IX#_mUUE+vypi3}p>xM**9Ea^92*<*&+vdU z9cu*8Go!!4-wf8+#c-xe%lZ(rP?z3${7@La9OZ!S&DQ-11T6J?SIGXG99YKcUvxI6 z)}aZ`8zGUM3CRFV!FC-5wFLzQEV_PPOsgGtrJrk?xQVHc6-G&dnMR1kv}uw?M~UxS z7%*US8&jVsj8XtI?GTHt)1=6b5&>chbciE)e*@|oXf9pp5F_uUrlbtfkQVzE6`$~# z$_Wb)^@ONUKJ%!^g`HFh@lTh&y%w4)9iUrrW>dmtr(Z1D7XqN*d0N>%=>5DtO~H2t zB)sy0KR%lcWr+$hX3*=z=%ojcK~>Z9Lo1VD!=HS(5jp=n6mzWsnlj?drU> zKEYlxIt)5)TE+ZjbiLvpXjtzzWRZ>~RguGgg!ZofN^lG-AY~-8Bu=8lyyg9rbmY^~ zB1~?HWsOV@%?k*C0{&$A)g1#}{qYWk8A(Bn=R1IgTqfgF?jZa146f#Pz-;g8(NwYS8DXyl+3286dVr+gDJh+vuUf4V?cE2Xv+l z{#>}>D1!E~qek*Pbs{Mh<%FP>bkww+r`n{ZqC63S0_`i1#15y7nj@(|Lu8oo&Rn4+ zNKi2s!M+bVYChc}h?pX1U)pOvouy)4rD|MMnavRAB%tgN6USp2>4~YVmgzd+xwRD7 zoi3r3;v3&Ye{a`+VlSg!dQy0V2eZiGBzpj82Da=5wn0UEVqo}TsX91&hd=Qq0cC`k zK)z+9$ELDUr|YQas9Kl6^hX{3e1-&+Ibx#uEkiUul~p`l7a{Q(U-hzO`!EE^=2y3B3dd-{} z#_x2y<4m@7yJIVKqWkbqx{oR$a_tW)NE5%<9*ITJM8qi3JgO7*=_sdadco7#lKPPC z%37ZT(9w zE?ag1UE&|6@MDM3R5)%H-;t+gR6AVdlMG>@0_RseWCSPiT$+h0Xu6sl+!X zK)gKVx+M8`>N!s)5{r2|Ygu<68IwjbY-co=UM_qrfSz~qmk(wYE`)ol_PQVVDVN^> zlBQS*An`QS`vERDDTco{L2?V1uT-3=yI+2K&kfw z`Q-O@^*Z)MGJ zvG35smBJhIs&ytmQuklosCaUz@BOwV$uXy-j#lSI-mb`wZutZB$^3m!pVLtO87K<< zU85VhU0ZipKb&S=t*Bfi;3hoT<&;SM6z%4<7$x<{`%s65cV?u+UiMlS{yq831RiXvGUCjJSRFfD%N=308v9k0@dDha`YFflpBZ*VHua?G%8>o%u z3(QxOvCaIa_+U2F1I@BdK8aWEX>YLdsDFeuuXWNqJw(IH`_SE4_|hA8v5n?mvt?WM zYYVoV6xB4}x)~*-xjsxmh_!%+7*o1CXBl%Q$h^ZcYu!7>J%;HG8OaTrL>(=n(7@)? zg^TrP+%N2$Ex(|3PWiX&skh!>7zTuz7G3z=ED^XPUETzC+g zp)@NhvPjctZu;t*hZHU0BX}W~c10Ic0(9pO4+T8BbXIkN;8psw@k&A}R-)d0`msxr zl@w`A7Qop6g=uD@hX(Y2{KjW}3)Y>tqny~I;p+3Ttu(^}O0Wl9G{fg|>`V!18~pnk zlF9>lM!oeDo&ri^TvSAQE<~4Ii2}O(7p~1)zz3Hgz-L$C`UN_R+Q%}pttBN;z94GvMj*9_*K*SD^LeL8ns$J$&(C9cde0C(Hzc_&@BlKy3mFw zZl>PK8dndQhIaNS-E`n~6H3~O3`W*p+Uf6YC`{;v9n!uO)Osz$;&m@?e~ygNM6CAAHwNa@sSBd4qlTBux>9Y!(!Ylw4*aYuc5-fTo~_UxNA z-5#}{MW@szBTv~*X2i1@+x!@m=xe+U?ll7xY1DQ@&Gt-fECU=0>Sv%m1BvfcmNQLA zlVT$ksMA_wh*YX)r_^{)q1t5_4ZZC-aRYsnXjtBc5bb=of6ngB!o>zq4f4qn0g1@U; z>tnK03Yp>@TD18NEp}4(egyX%y(0Ghj^P8JArF>vHt@#1^ohAH;ai((=t$zCcD>%C-Mq@&?{InP&7Z?1ijAy}2r?{=i1}NSyTquRtd7yWO zvT>!szoue4QFN*Fj~Mr)uj|< zxmzt}X;jl-nVuwPNlOZG4EAHpu{M}7i9(-JdlHSat32@5cCN2dX^5iKTW)tGVvku3 zK>zNl2%LNPF+h& z7cwk|!z=+Q+`z~gq?PZ+W7%%?$e!-7Pt6a&Eti6-^#P2q6z;TR=e`UTM{iXO$j%9% zA2BIx*Srru;b8M4#h}P~c13SC8|Z;A>_*On=uauXg)jpmx)^{F&1H zM;?jjNf7a2aP#Ha&^K5h|Ge*cJf`N+^I72V87_isKFD`@HvEuu7L|19t5pGf=B$w5 zdQZ?oQ0wiOZDw=x1565&=?=@K1;F77HCERxA9AbcGCDOrZUM+CxgIopMxn3nZLLP@ zfZV$X7UxzKZYNK;{NsH5DpXUH2a&nx>6*BAqhtLI+Yg3vDkx2(2W)n{%dgGfgMLG@ zl9o7(D$Y~eY%HH}u5YUGVf;1WFJkkkCWb!!09s0UegmRPd_Sg{`n{*QsTMsw z+0&3M+;Y(@FxLkoxFzuzuhn5Db3t^OrydCSk`q4^lj;O=i6+7TNm%hw?% zYjNr)TKNtKdY-Qw@>^aK^7fbe3#S!}Gvy5o10Y{J5loi$idMjnis!rdg9phkk1m51 z_G?S(f2Fn@Tu&9;mvOvk25EQci|V=bCKlej_wTwz4_&|a&O)T)u&c0FA+^>;)`fo= zZ(Mr0Ykfj#Yauj*^qpeH>*JR^Vz#uI5{=aiX{6l#amqR4tC9z_DDsEEA?@%oSs}4z zAy{}6@kd;PUEoPhz9AH3EmU}C2fGrQ>UlN;QS;YHRlIihcNF-Xn#2?eTzqM!Nk)KF zr2x^`6t1K_hAhRp3e5bUiO66!9N}ovz*v9QXK^z+B@z>At?ittj#eUrdbX3>CbI(7Ky}H zL;v}+@w><3w>yBy*z8&r_@8<6YgLzb3a|}*skY?ahWo&?asmt@`qVSg?I4QtTvRL^<4!p1v>b-o)B zvsDeSj2-4buW7z$JncKV1;_OOd|*aaf2K25gY%t5sU4u~GR?Z|{a9)J;iDRd>4Tys_;x5Aht!6aY<+0_ z%x`djrR%iYwEMX8HQAQz@5OTcL~~-fBF{9S>Xpngb||S_K008IO481BBQ)eP^*uR* zkh*G5IAUfzq10l{rj0reW|aO2oKg}@^~?$`oQ+aK`n;@j-o1rE5N9&q9Ezc=TMf{D6J4vm2ESs4{9p>L}3KiZ^7R}K4cH+6{eI$AgRNoV92q zzK<}S7nq&Xmzn6f|LzFReB~&nf=3V2u%=NHBH0u-ceUfS%shzEn%L<3V@q211LVuE zE@7Q*$K2nG$iDP2^RL;!7{gSwm<`{WV3N0Gw3q+|_ur|I@=%{@AY@(uHqmu=MMRg= zjukpM{U6581FEU5UDsPtP-!-LQxOo6u0W_NDqCqPDoBS=M0!Fs38)AtQlxhf5fJHJ zT9B4d6Omq$P*Uij2MC0_*n9uy{O8NXM;wsgT62E$d!LueO^XWcaIWIS##xTAhr+Fiow6&s;_G<|QSmdjZAZWeGzmel4@JRu`ZX>It^71MF{5mhTWCvxnnuxYeUYjMzSh8)^A!Q?Nk?0Z-_rq zfwH}=!C)~8Y3X+hz}p$%`};Z7LzgwAc6|iuUqexD7`}Qyq)ARo{tk8cj!Di}bo-z8Do39yo=U9Lx>a3}t#V8&@$36<7AxymL7h*${IlP(3Eo8g0T* zH1`uBP*G&sGaZ8h(Y*HP{^<@UPhzDC#8eO@9ht_hWAITlZ!o%lz9WCSS-n(dG06L3 z1=asu#riMo$H1vpc?zs^rEz_h&foQ`y;u)57{$5y>lJ772vEsl7U!9!(|C_XO<_a6 z-N3RCs{;k`G#LDW}#YJ{2krHQG+Gwbab+MTGG(LXj(I0?&r$SkWdXL<$K z`th-x9{E2@ac@paC(SIF`BscXCDUv+mE#wbbu9c|yKjz`e0JExSoyu?rH9PdEoyhU zx`ZS2r6%r*TpOy9LDrAES{J|8?>4sj3sd9I{ElUW8Qqgs{!HZBB%NsZqItsS4dJrQ zUTGWTp`6dNFQo3TWo?z;>OdiR5e@S|Sxpdcf1XTL4SRT|Xyp^&aNYS|fQ`jOvy<>| z9L(TiBGq~jGuXF0c5d1{SpMygBkwJCzxRQ(Ifn2@y)mCIx@pJ5ywCL&EHIaJ%&T_h z=XKk!erSe}=rOLo;y0_7GFF2b9Nq+%K;4n`*Ew#&i~pI2GV0wnn?@i`k3G z6pA_vu9_+9&T`{lx>t~TioTNXds91N+!xFQ^O~Nt63sp*alkFjzHNM`_-DWkIr1%S z;dejf1&&sBd!p{0`*m+p*}(dvI((T|KzqAT&Ng*CwCt`QM|H_X@iL*(V(T;Ho?=~+ zt7xCLuI~4yv*SnPGn(p(7kA1c^G7a(|)zBae|jfx*!>1rBJOqsFD)I}`wES& zS>V;VV|x?6GBj&F5)~2b&;)qI089L6V2Pg!Eb(>cO8AuV64TqK4k`hp!tWRyG`fOv z$q{=4nw>zfV8p$LK@tX&gJ*sq z%cReOe-JN2k9gn5EbUlIV`-47y6+-tG8|h$RLAR9ZTPR-ElI-4)zWjGQq!@gAfNG1 zQup8NW)%8wH+ojSLg_bVYY~{nJMba{8ymE?+eaB^#_YCeLZgT4XeQ~Ql z_c>Uw_3p6PQ2lrIt<~TEnrNKOymwf|^&(;0oEI#0)B$ytVBhDgmA;c&xbKD1d%&Vb z63!Ir)c8!W-yB*(+&yJgLtPekpz>_(J#-hHYqa8p&95|c>bdYdq&CbpS|#n`@v=S8 z;6~-ol`~SU!#IW1#HcY+drQx zY{~E#Za0^yXMe99_+swgM2DX|jShd@dq63K^R-piUr0dteoJy)?ZS$7^3LF_wV75R zMD`>V6|?dOAwsN=<%&S^jK-DG4#G^L{Cv!2H!o#wyTgsV{yhfQ<9XH#RP8heDH?@1 z(MxXCp0}M#K$gi?%jcr~Z%tEMcFnqcXTC21y7>!j3j%PYb9-*o{*%pD!aMkz2x?mL zq+l0P=B1FJnMnDn?I|?@6Jw)KY9MoCEFas@VEJDB zW}WGS+K~hbH6ln!DR)Uy!rlK;xLN!rkE_*EY{ik;_q8^TnoQhwOQ^cH_DP9=cHrfh ztF`*JzV2Pbh3is62mu}#;XaBUC z@iy%n&KKAP6m2vQC%mfq#*)eCpH>vc_wBWdxW@Jjvlyd4h6fF%imT|bIaUXDUhjo= zjCs5_Gd?uKoY{k8i7v!kOc6UjzRYIgFq~0MaQHa}g(%;wcia#5q3*Imew`Cq{DpSr zL+TbSo-4xV43+&JfsBWq>WdJt$VoJ z8+y<$``@OTL`S zB=$9a{XF!$-oCNELHwH{b1$pTZxzW2N1Y9qq*z8(o;~@g3SPm~c`^pw_2zk6Jqx6) zCavTFvfkviTBo_WoLb*SSxO%Lf^qW71^7z~6MwU#czrgFU)m0$0I$c^awXJ-MRz|~~=|E!cNQD>w>7I5#T5xtTo_~D+Nea#lggz^oZXA^dc zjw%va8D;|7qd4B4^?i*2mU@dEG~?s{K>gm!C_IM)Nw%3`9rb9QVS+m7U^3>|9TZ#rWxHOW zpVH*0(RD*}A-b}l3rMQi)Ss%@zj>HhxtPi2K)l&|t1S{wN()S)%7|Ufo#>^8F3Ffx zxX}vzKLI_KQgQ?f(*P@R^i*Pzu;Io${niJgaSoTW5?e(YkP5ykH!Xjo zlba^sD0m8yxR9fKKn2>A%Mt_$(9XNL-W~N_I@vBF38r}!d8aio7zE)Gstt=YzpGRH zMbx-2x?r~B=^@JbzjuElg>i?}Vmdp$4MtG$RiWIF7vgz&3Za~I>^BbE@n+Gj zck)E~rgXiw&kAYkgkt;nYG%XDyoeW6A*a)8`GF8Z@M|FEXDPFXK|hQ_k-q0zUn&5w zm_`_8mpgq^S{3$bcJbCF@|4CN3|qQd<*#Sz1{91Ul^qv_2JRaU^0Fv|i&x7Vq4e6}BZR$XPQ7YFid)++nVnw7dZ z>mONyM$})!$7OmqXXIJ%5|I|kr?y1b)s0O~E#>Pv<0wiT09(`Qm=S!cE{tVhy;Z8u z8}zNpajtD~w*UV#T!yx>L;9IL&CKfh-2tDb8pjfX*vj5i3);Q^I1@?YgLcelqH1{k zg-z`EbOL|KmJ5EPd0E&o?OzjJKfX^s_HkZ=cUWvwIDGskP4c!b%J540m6*=x?EYD}Bp`OO$hP`75fKiH9vYsgVA!-ZT$m zrIgX(PBk$LH_eCTq?a?BJX^8aHidM%2}8`t6X%0a&p8MgX%n8^u=fCs=e89jah-Em z%q$c6;Qv}al7o4bb1f`q8q8ZDS+Xt59owkT=H4Zh(ZlA%y^l+%}i9=i~(ak26=>f7nR zsh^5y(i2zW%I|+ZI!WNc*C5`SeBZV?U$H+<3dStpos9KhuCIh&s5dJ{PIjlr=M}~6U!4rmc!&e(OasuZ)iQ3+}FTlpY>x*!=W7x5H-a$t__tdvf?j zYb(Rk@+>MM22|ub09d< zAiuq}7a=NeI#9dwqh#K=$xN2Ku=3rC@RIq|jyKb9IzCRvcf?QUcVtdCcI5MC2kkGI zzutNF7)Ca`)tK8YY4KRF@!5ZbP~)@z7HQsDDhszghk~aIS=*oUJeXE`D8Y@y8mX2Y zb7S&eOj5wjk362YSoZ;h<7w^+WD~cA6Bf%b@A`qKb&YR?l?g_57UT;fH>334vTs;h z8)nj5m^u=05AF_lO-rj-_ATw_T$Y_k#k{*kli7?+Z46BZSphsI z#Gb~FVI24!t&W9$yKDwE!mu=VZR-=_t*N5f0F!29fJdST1v)N*NYv6UD~3!8$e|(- z0?o?S%&~~BcrNJ8M5zTt&D#AWjQE@m{c_uVRMeIyuXm!A%B~7qZySQ4ZTNWR zhd1`9mHnYGcliO9hQz`M`k8pd`?Ak?eou?dXSV>FocoM=)Dc%?g#YIVGPTDEXZD~z21Ct8@#E{Zw`>$^IpCat`l!mF!fHP&ictL-2g9rGzc^^?tI1L8 z(~7>7Y20@ZrNXFKI}qKX{C3BDStnmpb;tM+R(gZ2=cU^*T0!oTWU1F8>*98WVVl;W zngNbM?s}I9GvAcOnWj7GUPZFot4J-+h#7zzVh{^QLIoSq#HUs?BBvFXNKzL@7D9=c1=xFZz zSh)6R3F3}P>q7|?+#xlqs!}38ih5QL(w_7%EM$sRcvUm&V$qVr5+U8~SJT?1D3JWq zX7{H%ywjP27j6sICJiILHNPiN3+e=!Zr3z>zDni}vSG`$;8|Wa5Rh!Be2DmamzxW~ zroA%`;|35f^yklw{5hlWe}FW6QeMq)r3JJ(bmv4t6|8I9%H&@$sp;<$VSYa3kxN3* zgVSj4xg^o|DjA_DmF3Xl?$ujQ1lm0B)OFchPU`Z0vdv!E^`VWnm5E8eyyH-x^A~j? z(f{-KNW)`L_@}^X!P$%P=hll^?KZ|3iEBdEw)*Nh?n#88KHbNRa)7V1 zd-q1xo{OFN?Q1`a34RL|k4dMzTNvLFE;OUSdW-F~86Cy`M!sXblEzf-%HxfogD(}i z$4b()t>Bx4@TG&A0kyyG-GDXZ+C z06bV)6aVsH;Q%~X6y1O<&gTPF`1o?(lc{J?;x&x@K=KyVJtSTAGF!e}4AhkdF zPs{mskTN4!RMFtU_7TPrXm}dq_VOo-NbrU4=0~h%>P|bt&QGcg0jFH@C&+O1lSHez zo{Ladzbb`ZuEkeXh}%{Ha?kKdg_;jf9{C2^8p;`6TT2dVIv_z3b&l3#QLg zT}OER!OT7aqV8~6;IhJ9NohH*AkVx2Ht~~zPI_50LC8Jyo_<%Ir^Ga zu^#uQDlW8cZ!)&CdA$*Y$i)qzUUAnKW%Ospiq68I97_{p-<#e_rmurQ;YekPm=V`_ zj&t=zLmx6@!E?@+upT16?kHV2Kwo$ZmbI;&7~nogSsXEBS?+WX*17n)Dv`}Lb>xpr@TeJ%76JUv0Nr{0l?SK%O0`9r z4uX|YM$4{(t@kq{z$)k%4xd@r;^RE`QcBA8ag`9L`l7Jg+CYYJDE^yLkL@I{BpZXylwB!yAs?pu3rpVY2-s!MZa zewyK*-F~;27v-K{XyI1@AA7CbEyX(zJYGgoIcn;Er22oF5P!hQE^Jp28e%@GvAKuO z9^Nv)s{tbGA%?O$JoU419c2KAK)zG;{j2xX$SUFa4U2TYCdbWRJ-yE0wR;jn`y1N% z4(Z9hCWgXgM536kltU0k7e$4kvM!p}yV^H4CyhM49OBoxVo3udewv&P_jZvSCM1w= z`oU>cZ)U&z_ zcPBl@$rrgGHqIFUY;u*!PjJxFqs=acZV--^&RD3*MTYW$0$&^8QY~E{(Bg z-OafJckeVkLLjzj8agM#kUSYRn_zyl^Fe_WM~d~7bu4m%+NiSGKo$erfEU=JjrX=J zWQt4%_-1Nom3GSDy{!lvpo?dw24KI0AY{#XW>jfiKmx7^R0L#J)m=UIZ1w*sjT8Tu zB?#f~xwag*FI?#o>LZbQBfPO=m4r?J2#mp44+74JjJ*5477cpHs|LmcQ&a-3Vuf?L z9;RDuzPr5_Li$~U=bZOJp8>ocg*CM&!lJ0Er6T9L6J!xMsx$IW_{%ulMiISC8b1trVC%#{A6FgjGxX0d}$R{f*fb4OMZ(s8t?lpvex=1@;gt1wK zyORXFy!JT_ELv)Y-?ppeQ3OWe0N9`^BP!n>EOEjCNjuZ_#GIl3)*@ZeUb^a-eAdFt zM1VrlL;A@RIs~hF?H>L?#n|vR;nahVvi#XM66%&;m595#T!Y}k+&Pa+Z4C9!xoS7^ zahVRJKFWIDBntRV({g*52AR=IL;uR#e#CB~V)zU50!k~iPE1&JNP3Uy14z7$HzMbY z8c%^Ku!-ea!EjPaf4GpPbozUe?aV~EiA;HBw3~0Z4zO$C85GclBtF>`U9)@=&uUOR z8Anfp5X@w@YRnf6YRPfVmbF}=?Qt{vrz726x*Z=yP=ETtZ8(H8S_B16V*S1LcTJC8 zyTV2ZaH+&Bs?c<5s}glA6rAqgOALoJB)oCsC#4MPgT03N9>p(Mf?U9f=PbgPwpO;X z!GyOh=dE7(?fj0;3)P(5&*DVANNg>efKSm;@BGOE1l{knBN0^Dcz5^=%z&ibgg#3Z zIBul5^VoQ2Sy!M7ZS~?2P}}1W?2Si%uS=)?`Bb3A=x#Sz@t-Z%UM3?bS+{y0=}q zn!+eZ7Ox)GtUkSYg*X`w8ud@U@QhAUYzS0S_)4^2l1G0(wtJxjaI_HuOwF!?9asTGL)U;HY+4i0ccDqRECI4|;?3nWQ(AE&V}I zMq*P}PspHDVW`$0yabAq9?E=>q^6H!9)EFi{ep|$&J)#j_5T*gb$EYFTqa2kE7`CP z?|L^FJ8t~A@2sT;X#Wx`wtFS~Q4pL1cFnm9o5bV7M4Gf#a6DDm)a`puPO5&E&`F1( zI5?+`A`#!bYJ+Sz9yWjJV#R`m;QUzdJ+ zh8&z&mn8L)nawomyBR&Gj5-N_>nEQ~IqoEBUSn<1eD(JwZ!_5V>`u;I(nGOmt@xUZ z&9C1D?lMZ*limMHlK_uq>9uWJjyR2kQ?c?oqqy=n4aN}fu3#ywnGcBbYS;Fl{%6Av z>zPuBs{wBBK-Zl5S$tGt0zNlJ-Vx^#SID0aGtXj=y2JPtQX^kE1(X`J9+nyaa{R42 z{R$NDG^O%@cH;yQ4IyR7s&3l3VKPh$fN-QAR!_k$X5ZE+XDm&`x6T5-QLeK={E#{#Qjz4;Km({L|Ov5N<( zqKO!iBGE%_z-l&M2+7u$UFw;4C=CfB1~s zj=Rn+>9D$MnF6KcUZEhKELv0kVq1YFzQ4oC1T|FEzE=9=xhih3!s;-v4Q zvV+ly^Bub0#2nSN$3p)3kqu9DEdRaxEa7ge5OGq2z}F&VSJ+srG|2(6hUankeo{Pm z2=3Y;d^9yld2D6e&lNbIJS6dG)U0@R;rh`%Wp0k z$XG{RY3`qqNc}pMzZ*uyAmCo_w(c@zpq0`eMPA7P!JRlVQ(GzIaKK@$2n6{h2znuf zYWZ}r=S=6$0N~4D=7UZiX6`z^BfLFvlKV;V(_*?!v0FgFcbA7T*_NZ9uQnl`n#?Gd ze|H0C-W&`eW*Z-RGT^->HC*)$K)SjQcK#;D@$B$iJNU_51%b`)tDs+H@Q!?bHsRLn zQ+w4r%ObK-D5k5ze71@rm%DwsF45ut z6!>KMzur^3u3KBU7>IrTKCOZ)-aF)>V?nnOuPCKZDWJTM$>xDV6NX=SM}tRyWITU&(4n^r`B9q^&Xb+vENwi=lyMu}q?YN@LlNC`cI_owi7;pNs4ShNnwNCE-ZNe8W%!r$Zbx5P~pS4b-#2!-K3P@+(y^h zv&^<+Ll~9Z(I$Kn!VlX7noZw0MIUct)`}FQ!R{`9>)QOlAyw`1{W_$phd zR+|j(`YSDewF6ayei>>Ne6ANIp@jgePG^&iVw8dMrfpdhH z{O7p$6dXCuD}~b5oi$1Pdx_1yfQWJvT^T=mNW?iL@aAqiqF%VbZNeXeMxwKFlx=^| zSQ8Uq%(}LDks`#DlMOO=I(!upp1Ls|8sm742^~*y_0=4z*?(`K^+nX#(eiDfE1SKt zYPmpq?awl;P4iF6aWCEOIs#E_aKw)?KL*T)jx@wid4H6bOic3uDJQtmY$vra0hO!0 z$_}M%b;Mp}r56Ef5&F0|kwxG-ZZg(gZ%5I^bQTzwTNY^CLFoyI&}cvlFh4nbliyGG zssWQ+E;EBD`{^pP2$B;IN}&Yq8>HF6rzWniHL@d|dEcX`SJ3EoQ57iA9kfLmCLIg9 zq3Njyu0mmp469%v7CbaIfgp_zIA>pvuw4`MAuI*xx(;+r!8xNje2_X@!ixjJ8suhc ztm=BLX)5}sLZ;Y7p2C54jm>83C{4n^h{mhkZA6qzXp)RhBPmZXZRS8R!BblIjWD2K z%?V$)x>|d58jewZ4advAFY8rkPEFal=42&~oc+gS( z?Z{IP_3iWmRo|MDky=%4PaG@;Dr^qpZ&2eKQAHQf{Nrg3^9V}|&#{gA`Uc3Id0*e; zecnMKH&P99o};F;=oI0%K|K~>B}ICFn6_%RCn*fNzwNGZLHLE<>*w3jA!M;HR+Ooc z$3HW&2~WoemQe{R8|aye>0BTH)DXm6EMXbTSJHbv4~ZWMm;`uqce8(Y@SJvs{8 z=X@TOG|G$8ygx9k$qmlzF^{3`BN@WTIW69XqRcJAZZ=_vdPA7N$gEr0I+fPybjAC!emTz$A3U^(`DzhU7^ z0G_wl{ljLaDParGwiv6Jv(}Dzo=6pI)&vM{2nhJ4Vfy-S*_Vb0jLhcf!kk8(^$!ZR zR-IB~VUXU90nJAnc_Z~OI|?Ampal=MK%jMIEw{d^n&bSn=%v_?J?Fq1<7zy{ENjH>86TS^Ru!{DW(Cg7XyR zrGJ@^FnDGGt3J>^ds6*VWS+dBt{D&M5BZXaZ4v(i7CoA4kqCdc3)HBg>!PN*#ZD0$ zb*HyMIC~@5@!Dv0F*>a+@!~?gJIp^|Z>5knw ze?IelJdKc_w+(BMxMQKWex#spsiL^*E(X?SHx%}~Cb`PC+Gbez!CrvKaEAZER^_;g zL(EHGU?YJ;-iU)5UTc~gCqR21^J zKn++p4HL>1t^82sCF{tTs($7UQ;JHysgGHe?-Ou@EnNcuGPJaF9Gp#t%)GeUyF9EJ ziOU)jn(1??cf4lPw8e#IoeWr-us>q;3bE|T%v~6cJ+1Q07gPVUO5E{%svro%3%*tQ zV-a-mmgREUNLA1hq|#3{Q)!a6*8J6cc1MyHzZOTIUvuVTWopwWYn%m7Sv#kH_!Kn> z7I^U5_fvL+x2*69Acv5n#?){iL;#zXHl5YEziB*Oe3fy$y7LNy-KEI?IAlDcZWREN z!3|Dw+0HE?pRSACpcqz)c_n&;yVeb; z7s}_QKdwR5u)iOMzi^t=Z8&^Vu`i&y=sYf9)k|jor02O`HUNqHsQJ8tUU9*X(NLzO^=ZDlQ;mbKsDa8c3 zgehGZ3a&X{1NJ9#cl?@iYNu}Mh*QKzy1q6*pS}XC-ZE{xRp}*EtO#W|RA9oDVsN7D zg(Kb$wp(e+3tJ+M6oPt^r*76n`Evyy)D<^UF6a4Kn`x;9a3d>TFxNky zeNu?Kw$Vm8RoeQ9gM|0(MqXam5W+vFZqNETYK+ZpVN^q|t#Zm~9Yf!3Q(JiCJ9nd@ z!tzauYoOy>m2pCekD4stFUPgwj{f#^X4P|1>4q>~3iE z+kTrQ$pY^K4!%45_4ERVaUpnhK(yz|=2Hb~!gHI%%rZZCKFG&DR~~?4FVlN4JDv}%gv=yo z3xb*%vYlzDeF9sK3oSNJW>Et0PwsaLJ2}FTWqhMd|5Z31ifv2Uv8<(~^;c(b z=I$tGmT3~Y3E-y8$l!#)a0`Y$LQdp^79o3OgzET~uYmmDzxrO#-KZ1sv({ra2n3y-sgS{Bca&uhHiWAf-#8dh=dsN9N6HTf zobm1?5e7ktfx}xKNHk1k!1;_fuG;Lg!30UAnrFV#i59RZn;!@B!S5m)e7>Umt>c7c z%LqxTkBdF7SqnLa(k`f47N667oi=i;Jkhx9BVv1}Ai6 z_+8;`y?}Ig^R?hQJo`yVZ?RK*-nf7RG3K3H`YXUC;RhDDjG();B0V!JN0gUC9l~u+ z69D+Akv!WpV0j6-u)xc_ikLxC<({wwZ6iJNCfig`P*XPmofGnYVnatAZnDkxgu%6t z$u^%81}>qKZDA)23g1t*Wt=cr{4m*84vc-AY(oKK;gfA+z*xj&+cGc~IoWpfBxa8t z2w(vtQF9F8?)HJNsh|8kX~#U%oU3tYVc`S~;i{OlNLKe1qJFNZ8aq8BTdy`wr!KX#(E!xcD;0inaC~Sp%X1 zY=e&12D#S<&&YvgvT7SmcYH1+KJ0;F0ll_Wd)*sADA zgh0J)Rh&(aL2XqQ0N}9!n`5sOGAffSIk}(M)$9Wz&H)|-l^}Ij4#U*ee)3ACs(KNJ zVL@yE{C~fU)Kk(CAAeyHmQ>4S#HFAN`e4OoCa^H#taH%r8R0!*#Esae_9LbF6!g1!?>^SjV(QPo<42X6~<7YjrMjYcKqy)}Px0*upIx-9>+(FhXk9h^Mu30C>?u5Lm z>1cq1Ti6yqoK&=G9!-*)IZtbQ$EQY?5bqhu*OIq!7<(ab&f#8@UIKX!H6ZWppFvU1 zjm*7Ux`7(#0}KIw3mECFzZ8^BHvUAdfIsG0LnQnpy)<$LzOpR$2>X|xD24BS1M`20 z{nu*I{mP3vDfFu5poCS}rgb8+XHWF2tkB|Ga1yQ5c*hSex}2jLW&cLQMp8W?M-z_u zA-p6X2HZ{|HyYi)_&+EL{uUbe5U;C2zWY6dn9e+tnos=1>4R#xHu{2V^Ii!{ zMdg!EtAC8_SXv@+qUOVOyot4{YZHS0ZjtKBIvJ^=*xqOgxdZxFx4DpiF~;PXsEd&KwvSR=|hy8-BP-aK)1V#x9AL2ou8CZ_LVB6yK6bh zyQEp}=~P?pL*Z_a-?1Fcp~mC*qQ)`7d^Nzq>0IUR%MDte@%c1JvlMOqMyC-NHNh7( z8Ls1j5>=TwBk0c&sjj1wku8eti>AzWK)r|{)iuGtx>vwMNg=~wB~>cg{z?$Rd}r6ltuorRRu5q_Q^-zp2OVPMx{+pA+r%Rc*?`I{SzsFplirbw4 z0_5WC3+CfhKYgTe%j83U!D882ipi+24i1fk&DC$&UaI{#HxgAzK0203p%w1?|8`s& zRYXyJfr^e6^~SB$J_1_PV6`gSP;0E_@PE}P)$iY(F+7MMm4EvZMX}A%l*tb0-`zs~ zkr)#c&CRyBa|<}&qFnCi3{At7<(nL-;#dC4kenvee*j^N7^(Y+ji(-6$4k<(hc$IL z{vQGS!8RxB{AZ-1xA_u60xl7_1i=ArDeQ5l47qfd&e-9ZsSE(SiCa#wZ;?EFVTs zFgBSrGrL67(P}t---_1N_-biFTc!G7afDF;rehMa2(jH9?!p4rHQTfTdobu-vs zLV+P63{Ak;G2oViftv5R&OQMkh_mdF|8y(5KyiC3*r*$c*Z;3E=-n4OKgMVZN|$F5 z`3_6;Koni0HkZtA8wOmNnbh{SUt3k2j|?=@u_{oE`WZTpcefDv-rAHmQ7P3#!u#Z< zj{)g%e6@&C)Odg(jsso`W;BoOulW}rNx=4F+|jOMI|NS{g&RSgNCDk7*0TNC_~br| zn&W%-cr(vgEIxF<_kz+sUbmMq(s=$B8!kehuT04bpilm8G5y&%5H4^Pc+l+1p-ooP zTf+inM?m#|_+XAa^i6D4!qgsp(MLHy7?p$%Xxms53rUncgmT^KXgJT&_-LzM;)9b2IA-pMo7@+}=jBA^f z<1dh`154Fhz`_kYAT}Pw7v#5Qk5Ye4?M>5uE3`Ww6LelS6LyVcZ3CW)E=c<=D(l}U z-?#SLc;b|_tOm6HyZQdKQE>n%D{7PLx3c$%WJnNpqWJ1?i=yxz<8f4|br!)q0&HOh zeIuV$5=V;t-u1!d8$>%KK}(D1n^kVRbgH_kX4?8n(?J;u^)Vgt(RgN?eJA*tGZ<7e6GYh~gmX zg!A`A=sVLe1Jha?2NTY=1UHEusS0`EwP0(RjAJIpk5*c9Bm+za0HP!_PJSY=hcfCf zmyc)Fng5;!>S+4-H2a)mWcUlO>7LqEzH}9+n^*QZu~0PI^SAB~hZ)Ib>l$RI$L@Zu z?Jj{AQPkp8;4rjww^82G#~)=7xC1LSzP~5)aOtUoLA=}6RmHq6$E~ZdYyMGuT$!=c z6(i3F{X7UU!pf+P?XU=L(#^4lYXJGD)^^7zsU!cp)LP-#=~_e6WxDoyF(Bfq%<{WX z`K>l=Z+xVyBzMahdhoP2z!iBH3C==eMQ;QmpXUsVeem4V?H;_cD`J^{1_I)Za6X{&+u=BA~P*X@2 zO74l&bI=j55RLs`y7|pOO7RxfD1#GPV=@ds9haMi@ht%1Hsg3fxyN$+bYkQl3K7a@_DJ@y@KCe3?<(b+@bf>pC3buMNb|HYD+OC}W z@i$8kWsN+VT6{909bdvUz9Q=!!?;5FE-2ht`vXt zN6^D0G%C-e8N-NmywtjGUP%{Hijuc+&(}WYk>9(s8PdbAUX8tg4-JlV6RQCZlE*u)>L~WdJe6_$+W^sbeX?Gm(m$uWbHbPa#yf|j{~W#xk^^%v zWEELnsE$Ni6n_lR&6W`YzO(&~KS_Kz=v2DmY|V8{+9t4ujCr0h1q-5CDH2j=o?Sy| ze=g4{InC8iP$N%bZ=m*ew-%|#6SUII?18-nhJ&E56+N{IpCYY1Kr|{gsw8bC3v~;z z?N6N=e;cP|UR*d{W^TG8`3+5jL^;S#LD?~5rQByr=Mg?Dwny9rPo${bfQIy?e=|fFNzc0uu>x| zw6EAl`j?gK&MNyNX}fTTRYYrTynV(@n)t?o8iDDcXUlT z_doy63}EwjXnH)0PC^!f%gi^rrWo^!&k6fay|#?|My>8T26CnUs}WtHCFU6T0Kb44^#kx=SwOd~6Zrb3*U`2>}{gK0bsqUllaR2b0^XSP)5=YAKX z!3&~U6DJCyp(Xb)8bTnN*Af3FY};i`Lm|w_W!fW)bjK7S!s~KRB%0xzWcBCXsfUag zY&r2wPBkyWn{o6ogtA;m^pNo$j?ad7@#>;h^4W{1b#1UZ3)iz+_jy=6$*^jCBvZ;} z`75fS%Y%kDX4`sWBm6~pM48jpV@r5vnPZ*xBy(Aup%x>|-&>hk^HOTUm}QCp@c|y; zyh%DT#-~(L*A>*RzVxF1ES~nj5Kz!9lqe$)cuFRGo`;+lFVEe*sF1%aRbH^&;#@?w z3Y(f*@7i%h1^ESh^Bm{h(v}m`UegeB{#_h%Kg+OF2Gbl=w12r+ao{$)LwdB}RGqoZ z!cy8*iE3Grao}!W;GFwj)Xc)_)m8p5O_D$9^nfPm`QD4ZyoNjo;aRfJ(?bN%uVO&O z+s@Ob2O?IqET+xL9>n2Y3q?HwPkUfJHZ&Hcw`i*CPpaxS`4_E@E;|9W5>zOXr>ixw z+NGm|a$T7af@LyOy3*LxqA?7T{b`9Efp{L&$WIuGPk`sw!^biK?z| z_(9rQm*V$5lCQ-^q84x05%m5b3f`6z-Wa^RfSbAIdIk@Pe@(+qxeRgdO2qx5qj~d-M$RV@IZ}%z4kGEiv^U ztzD`%kC;n+C@$-Re$khB(jJZrRq#R9?B!FSSGVzD?LSB6sK48b?tNNy-!W43*{+$^ zsbmhAXhUMcUGZuplwl?5Ed4chp#GuT(gDhcXDF_Lj8?h-$Fn<@1FGlfK~+@=b9KOG zOdUJkT~3;L;e|H24vYq5O{;0wD!m5uZ&v{3e04JGH*5Z(P1dH?U)CG9XM9GFX-Y@-J7G7KZ)s68`3%lw2 zz9V#N5kxz#wx13PXCCU))TDkmKCYUVI2aYS)x?!}2iVceLFZNd0>GEmXxAcE#jkOV zOkY;;Mw5s0iw5uGEXnsWwZt>)BAYVW{V) z@-K6eQ`F6lnz^Mo*8p+~*S^R69S=`TS?4toTE3Uh(R={rpwoKN)VJ42_j#k{<+S96 z%-Rr7%s|i_1Cy3j-4yP`hzNR6xd&dHe;-T=^F5|($*V?4-NNxHv7^BmM#t(QRlAP{ zg&r2N)YIROGQYu2Pw2o|)Sw}A3rS67kJJI0BH$d3WDkMpW}YQ$O>d?Rm^DP)-8d3c zx1r&BI*aomsqW-{&Je$QX%#B9&N)Kab;a+6=`q%+qJmwNs~qQbX=tkrV5kG2knMMK zXXQ^}c+0e;&dgifyd0ip-NLJcUrs3@q2*eC*_MT$~FZ%IH! zz(NtFR}ls2ASHwnnuH#jkU)SaA#@0#B!Lik+wXkk-gn;{oEHRj#9-OFf6apwNdrqv5qk`!!>F?DBcDP zT6SZ#VPFpU*bVwOtB<(@&kP?0gyg+gPF~X{5doT@~uI z)YV^LHDH!N*m1nQJ{eSDh)>h;o?MDscZy9{Lrm9?O3n64YQPyC|M#2t5_t*NwZ?-# zC?t>A|Ns9vaL>-TbGOr|E@7UW3{|7%mEaT+lnaSZB{I=2qVK%!q9V+Eg=_r}0@=^w z@zRQ*ncl5y4dwWtC1X2q?w-={ewQ8;|L>-qL7A6vmW*pfRPQ~Rgcn@^&1ua5eq^YKqYLcZ z-=(B zjAPPe4DWpS-%p#?10%r8fP!66b>vjyt>|^#hh=5uv7{O%{^4ju(n*$D@3nSbF1@eY zbepc$!z`j3-wH6bzld9&s_QcbpZKg%iaNG^Y-F>RU!gEeo3J(pX7K!H?qepxEs@;=t^{Ss;%YI(Eqq$ZZJNrIu!`r#3bdN zKn|`pHJNGOief)|KPj!BQ5Gon!0Rgk8J$Jpikwp@W}ET>|ipJ7(1A(NF=u~ zF0~~Ahn|86NHQ;|`)3-uk*AhZ`Sx4gyuKKj(}XEw7tTbjUhkFvm6aMcY0YU(-!<_MU>}^__pF^p7ncrn|Gz#Ozi}5 zeMq6W?t1U+ncDqZ*35KV0F{=aQtwQ>hi;^lZ=PH&ZF4NVzvCLWc{ieN4srqrL5y_+ zUOWKM&Hf})d;VF`rBU$yqO=s<@Dnp{3#3LUv1F+Pe@IR>~-EXnjNs#L=#Og%Y*A<>D_YQ6{#VlsM>J}G#$A1QeFok)z(l+v~j>YrdWAHo!2m?^9P2YRl zl129_{H)}At05!leZSKpg9vTds_GrFWS%_h1k_p9&_kQN`R%{%oR!5X@gNg8j|CKk zhr;r;SJoQdP5SG->aCw=A1}Rzi!*m$7CcC~gU0$EYt~uvy<-_5ArUl8axUL3Zm4e_ zvCPI2xX4!u0tu&ijBEw#v%ZITE}2Y_B_9dAQ`A{ISujOAoXhIruw-Y3bws16xd+;j zLs8$#*%8X0XGj@_u_2Pqi%(}mP7Q>XMMRw27F^dq7~wiu!fxIc{<>CUFMvL?Ex713 z5c(=XD6`gd16+NtyJFYl_JEw5Mab zR1dHJu{pm6vhV2tCq774<1xmB#(Sycy&WgKpam6@n@d6-eYE7?plOa z>{e^B)+)6U&na_~Lrkl|L!O(f)Q*#@U$VhnDJmwRvly*Wf6^OjF-b@HB_y=pmWmYI zxr=9hlOSIKm!6nQ6Y96Ujuja=yE=K@mfQ>#K=JiKL9D-4yyq$cSH_yqbfh5i)TTtk z+S_r_?MDV14ccTba4$fHq-t{xWc3Z%uJTVH4Zwr)ir;lhSS4x$WAK+FnFtx&3tYd+ zrEFS3ywM!xDK;{s6r`^=_7Yn)i})Gl3LImAV=^V6m~3eSwqMuT08NT+pFX=`oap^h zw`T@1N01}3{#;5}93w#dnHd8}_`%B_GYBp#M$(Z}v>T7LdY^qvXN|!?;;|!kZs0+` z(U|W*Qq{6?7|&MoU*pnCwLbtRZ-~pGe1Hb=uYf5x!+#_K{f^l2@0rciOMzs~U)0k| zw6zIHeUoQvQ>%k~mqvj>h5GNT)1mE=jP$K|AA7Jv;R-}=WY>h?sQ1SNH=7Hnr~X%7+;%hV!82wYtmfQgdl1Pn5Il=-Ln;dO$-4#E?Z|v4 zqtjHHUib6(5v=Cv4T6xAurg-u=B{yXvAXT|ofoK0oSCLY3zq)-su5DAM%qAmqJ6fX ztA3rZtr5{gK8KKZfayMR#Nv*b%@mRKDCl*1n18O+VZp?5_?H{xj~e=I%aY*YhJ(04+ve(%V!U3+MA*RXw_hdUg!>O|`w-2PXz z{2%Mt?m!-D?}MGmnTD3fQ4gVFMoT;=axs$uB|KaWUXQ)ma<5t<+=gmpo+?Wok^he8_{J43%)H;{sZ zaP`lN0dkTz^?Z*jA#pu$FP8I+8GW*XdWx9|On3uB^UEtjko5ED$?a5ct5{earYdhj zr!Ouv+|ig`x?1;8G!~QB>7>0f$pd`i>iIYg*(Ps)k&CSO_gpMby6J7B@n!|!;*icn zElp6DSNgGDJ-lJT7U6Jx+ypr%xICx*5zPTpKBG;2MQbXzK7#lwk+&F~XT4%lmtDj< zy1=1ngA&7*X~U1n$0CJBw#3QDcw%BpCeQL<5G~A39=69$t=Okoha{{n`7-m!PlT)? z7{*4pw~5RxuN*R*I04HJQ^dPaB+x|HDvGdGkAc7)@?`-TCn_AzahjzyeTtj)S_+)j z@U^Vw`%)Sag7ul1BleXzW;f0@p9*jf^p`}QM)*q-gI!-b&vp*61(;DF`shMtj*MVS ztgfNE&96rRu^O3vvEp`mw+@ana*$cWlm`NDeszD;;O?GXYe3>6DxvBC ze-u-ZgUi(Gn%D zUbWuh#Ph=)7DHs9Y4D%wS`>s5Hja=}&VY`J^5pN@y{5T6oH!AAYm6wG6$%3cV$GXpy*S^*jRpqlCLyjnYn>?Z(OHEO4V`ZN%CaH)ugt8Tf-N)RaDYuEVy zgoxbNB4%14laBntdad-PmD^+u~O045>pOXHdXvH0=a1Z-);b1x1@Ws{$)#GTn z3{yv9I)!ttEc!IlTEqp&mHZtz?hiV;(yuCCKB!-TdlwqX^V;#Nbwe6yZPwXsu@DD4 z6jG@l>6j}x)`8@?h~tOEg#j}|Zh+e5@$_TB7yg#2?!@*K;HCZg6w=j@p8MJ@#k*Uao2{S({~Vz$$%;7Eq^d z00P`weqKERpj)cRibs*bRn{5at`gT$qI_yaQ|d)oR<}#5uk#X1XWqWLuEOF)KH31Y z9Ff;IR2-J{zbu*!m=g_-aRAEqB7x>a01VVmVBFAsQJjLG%N0wl*Ak@ycRKYcmtf=Wbi4Fct;mB3o^+xRDC2M-2SN#?u^=OA6{lUY%(NuA?JuGx&4!YTn}Yd+|gb_FTf z>x#Us(-dE~UNj`j6e?{VF#Zkd{GGdWBt^=V06sG_S)|u-`+EQiP*>X5)vvKHEOqCX z6D4iSu5Qr}$o>F2(b1!#BDIk(kn)H+0}2;wjE=KLK~cL zuz9X%F{O68OT?|R8A$pGpAoGJ8!g|z*9f4@YRDG4q6-L0^3EvjdUfwTZd)Q<%KHx{ zSW8%FNlJj5(u^tRV>D1(5=BJUPr+hzTkKHb!$A#S_C|s z0YV5~RbpNrx$D2hUpYl4&R*-*dtY%frd^vgMps|sp&*#n5^PX$eU!0x<(hIujHQIC zOSx{3K3e3_x*fkA8+@WFHbLFJi*Sm;1FOp^>1Nz4sL3spc#zSoI^reR<2RI)sVYGZJy6hZ!^-u7Z*PV5uHO%f7y)qL<54^Im4y;FQ0(*oiW=r_M=-X%bZcp8NmXS+< z3Md7+N;cma($JlW0tZ7Fip}Umo^CtD#P7k*InI|aLOK^^<&1jv6?M}gexRF^^waV$ zp7%K%$?}eldvIrR?HL?4_ndTqj6+4H0RzT=zAUdpKjN&r&W|2k(kq$1uoQHNtfhR2 z>6@|1oqqEwEcD2q?B=E#k8ng-*mIq7dhN&Zv5@vvL;}HMSb=@gW!oFEJ#s&kEu(te zG--;2CX%u4d{1J4yn+WYH0eY5TrP?~?|6gYFn)VClV2dQ#R~W>gC0fsql-9{!8J)G z6Vr(^vj%SZj2mwfqp54FlCxJo1RPSx#eJ(s$!;);2T5pQGIo>2C}!rt*ZeI8yn#G| zOqJkFn)fq0+h|bp>eA~2euql;h4-sn9(nR3W3BqS{Ue~$_Gn~&qiA2?osq>Tc^=o% zvv5OCc{ZzIUrBVu#9N8f!f1`)U?3Rz_z&o+Uhry)PhZqw#L0=yX-);O7Ay4^bY~PVXGqh&AjNO8cd0QnQ zBd`QKmn}^}F{_h4f^UhC4lZqSvn3nomomdP^>0r;evv6Yi`xWPuhw;7$(c>_iTrNn zahYYDqTWUuiy_rwP2@y#sJzfd!XvZ=rc21@59&gXR5JTP#VAH^=&O7X_ul&*X#`Gk zjR{52>Ckh8lKRG^w^jSx^bUWf*&j;@-lY$PIj&Ipr(N3N5B%0r_Rd@7hRQamaxz98#?{_4!bIs8$?R2A&w%;O9 z+6*J#Z?fus7UU>^dKc@s9=?r&*KW129X8D_*-Z*>0SkX$I)h}5X;$+o>$^AxnX2Tp zr!ZTekjpII=*)iRwQ~r@$f7mCzsyI6Dp4#*ES{XkBNcla%;>z!qP8JPt?C<*y05}R z=E9Qa(T#=TIK#Zv?*&@r(-2)v`<@MU1BjOsLc`tGBZpbc%_5G#R~Ss(mpV=ZrOU=9-fZdGy|6!-<Kl zK9kZS9c}5zyy?|=@yz$FLvyPaHMOG!OmhB5SNUelZTxMQ!sutg(Tgu6&fgTrUfnl4 zFt!MBVrj=@nw3JFs2BEY^#M7{Ry569TX*3_%p<>7G7(w#O|eZ?h7NA)UrL!eUr-;_ zZs7sJjqD=wk!IJ)_60fPUbN%hkcBNHY0ztBot;BB{cbi3y>O+4;~DOGi~=7N?$IA~EHXJe5W0yC?AX z0D5fe)Av>K2mmnW@y_cM~h!W6d@}!sK~}sjEugajJS8C5+I4;cB^Ji1o<-NsQdBN_VLPiAz(s{Lk;<*@YM4EO89i( zw}CY#B=gEa;GK?BW->EBw66^WB5Awu1H2(h42|=inKsXB%t1#=rM;r+%MXVN8XOS} zA@q`maLHr6gUT}(;$eT^qg0>Iu)&<7{EL4$SwU;Gc&WrrcC~MmMjzUfoQRLC8i;>e zyo@;vkKE$dMb~u?``szoN0D2rTYeLQk*|okYhlT_16Aux$G9Tn5qeOCYBcZ^TUgk8 z1S;a@v~4`QJKJaQEtCVeD;@cfvKQK|2t*tGW+v?1YIt@ig32TwSn*Wk#-=AMe>h3; zfnBkk>Y{NS9w*?{OuyM0337Yo@d(>Q!RmxpV_zkZYfrqouA@}K>y;rWykI3Vbu9}B z>WJun4;e9_S_Ge@AVi>Qgw@Js-G@Lx&L_zn5egG5y#Sd-`Cp4#lqsq!PX~+Lx+Q}F z-|SRia;?}$M)^QD!p20W>&ZUZ&q6yhRZdbcra$jI?rXje>Oo}!p-X*FI1TqFRV@tX zYKx3;HjFx{Arw@EUUx4Xd3;S3kT3ihCVr%AMQQ;0h?dDgEg!gxQT~f5SD@6STA{t zdH{g8{#yT;IX@FP?lUQtLq*3pe;%!fBw z)&!^Ta2qCoeqOxkqML%HvheT9p$er9ZSNxL+TD=0ak4YNekP+~uWtz^&KIW*lDPA& z&sdw!O4z5Kzy*c*Lb1*S_p;*4|B8*c33|iR(Wvi(474Tcehv&RbNwLmI^cs=dT0gl z%PI3FKCd5-lE(cjh?wIt3~|$>W!+l-Y5;T3-70Qb=W*TyBsK|hv-HLTK}ZzfKbpov z#Lb)-{KN_N_RdVv%{fbxJT@}z#b_js znskkYQI#90>WcLWXr{hJ4B7Bkttaz!pusr%8j)}*B+G%}w}`(x&wl3G^oX3fll#Ds zXq{x9bWI$sX8Sa7y%b-&WoI}mw|C92RCu*y8ABv&&%?6lDbC#@f*7%tpi zTgIej){5GG?AR%0WmYU>f|+YyJfMFj&+(fEEQ+{E!J+RZe=p+Z*SkNn9nO}X0g$mb z$z>$~jP^PDeYK1j6Zzb%`ooGd~ zpQ!8X$GZgqqS~RqiiDqj*y3Hj6~hyKBGanCBW{a*J}OZAqemhN5(PI#$YqPWKjM<> z!u+}TCidX;6N%&~o(>$&Q(>w0T^OTsALc0lKyCb6=_RaTjy!Cod{MyW*$IsgNE&lR z!>+nJM2#t~HwPQ#lr=_42a41z3KW~Vf$}G-&fbuWdFd7FkG&O6*ScVeM!CYD2hHa0 zcwr*edNjUlSml_Eh1Zrdc__)3YCWdX%?tQPnEAj;q~>;jH;~V&4dk;N?~cgcJ`(G&^m<^!khj8p~Xja^k=j$J?&Ex9`$Ev|rZ$*~*LA;8eW|g6UiR=bZU85Q6`7?yxjojFem_hXukyx=OWjFx=A4A+?0tPU zYFejv?ld-QCCa`&^4rR^C*Cbnrjo-;yCkELK!;XFIkuo%;|MFCr_LXYfX5|>6TN*M zbM9g-)RX6wAAM-v@ry?UyGCsg2c?eO&9xrJ*WB9qCo2gP8UCmCEPt?Cv=uZMEGGO*91`s`x+ zPKIxXB;{Q0J9#7so;@OnZ~pL5a(__XB&2cQ>?b3MCF3}f0p0 zV#MMAu8C0v;Mxy7F)s#R&9Zd<41TKfez(BSi1leiZ6@mxs9|%B>9+}n1Z3bYUAND* z&RL6hO>Ug3BxQPE;5jhJjQ7FKf!VyeyC+qsKYO3y@aeA^?#)rLPuF{BqP~Y<*KS6o zyz~k`Gh)=j(g(GwUkAeKRe-SiajDlnNlLo!zhj1y>rqX$LR`12PDARB|GT)uMUiy3 zRMH&;)SexUtz08*$wukA9XgHO<$DG#D6R56ZrpHkkiuv9e6y$Vq@UOFr2CwXW+SEz z35nyxUBvC)s0EUS@>Ly1gD~r1r+e!Z81Cq}HGN*(sZro#NT=D!g{~URc6r?D6SbG5 zw9bCUwj;6dS2NnRv^O#JH$uEROm4ebnQy&@QOD=+dSFLgbFJs7h%x^6Ig%v)(`$j3 zCCiUU^~v}5=}!QkJ$Cp@dVv1arc~49U%*gv>!lhuP1*$dgIUL4W2960*g{|JpV#h~ zN9blO@4o{1fNr*X~~iXYA)z4Nir2X*PP!_gkE;UEpY%Fn;cFC$FL=hdz=`>FvxZ{@k& zQSTbEI)ZzgP+s(F_xe=QS57yPE6-W)cvl_xeV}Cx`JMQcTdG2hQpQ_2j=Jdf3+Vy- zLxjg6Cg}$WE4TVGPgk)@Cd5ewK=z4hLG;eDsM%JtatYu&u0-=!^14~}E0q1G>JAXl z!nU-Iy&!F+shj1E8J>9^9l?I}Js|a#U`B(e~`p#I{5*3EQR*#58ZFb*1Y>*aDqc)17Q+yttPm$Y+xtt)I!PF=aCq>R^!E0JiOcnx_ z0;!GJ(ltpCXUp}t*wv`Vv@pL99Y?C0y_$t^C&{9?Gh{!A|CR?AEFEsCB)t8%pxHd| zT|#4chsSRC?~KeOubL9GMsd{P?Sc?btoB94J%_5?$K{dvmmJC9=2U`uZjt5s8G+Po zn=gK9g;+J#?L_Q7w8i!rfvg3ZnA#kz>3zb@PO;p__osr+p)8LrN%V=zgYTP`97)$J zvI)bG3%(0o2d_>jY@groFJI;1TaRrZ~YZaBAl~cEofL5&2gxmDf?fl70yCHq}oGU8d9f-PFavxl1)_7;$Fts<*olsEy3Ar-?0;{=Y z*DyYpX3}gX;#DwiRli7r3!f6OEL`f#}a8a?4c%6;jHR`{?|E;^+`M#>MVjghN$6` zG?z z9J#VL059~o{gNHy8$x3b0FXu0;)L6dE=#iUKr}dpHkfy5(mJ>9w_eS3p)A+8#AsC) z`^$<9#Rn~t($U!7|F&ZnU%+loh+;S0@mA!S`ro_xnfe5e|F+Ym+C{yBeJ_Ok6$5?_ zyCbwN+>Y!Y)Romgi#^bBqts7f+=zM;8U@d$obXIPBtdvaxi`n+xv~DGZw=mYq@Jts+sIPjE5+oKvCjd- z9F{q;<>V-`W&^BMOfDYN`?KpreD+63dSP42|6e=cHzg?*b1xU?jeJE3yL@M3z(a$W zT}ltMMoh8#W4^56`0i1!sXo+bE}MXgkaWCmmVvcq4l`ig;4W68Uc6VcCw{3`-B~r) z_olz^A+}b5ciVt5b=XhEpi9MEmOb$`@an>625FU}@lI*h`9HTFR9hMxf9zK6y?HKzl}8`*oR$$5t3L zQ0`^WzvBO8k&T;O_%B}A7;SUI%tEQY;eVfoJxVW^i*b8ss9GT9+7?$e)#2gy7_I4( ztq!#90!^S%Q-K7q;D5$^#fV=t6iAig>5U7U`7hR3;Iy;krT^CC3RMyT&+SZy0bq^Q z{AMOG>K?PC>a6e(Xoj|z3~j5>*0;!GXc!RoSJ(Rl-M~@z%LX6gO;qd!5-7H`7fLYC zkeSsNzfnfgy<7ncT6OQ+W#B8K#9o_)b8d{F|CCmJQb*r##wJ$jg$M4bKmlfSzc|#~FEiWyMUa)Wl7Fu^ z>shUgCEoueZ637@nX22d^yt}2SlR$`tE<(1N$UKMi^TwHoa zuSv-R0j5(nQ&v*9F0bRxtbAz!ehOsi09;wT@6{8CC^nYtH;*8_+8F$VbPXuN?=p;s z{}TZHUbJWIc-FfdSihMxjn zMKoGM{Qqp^{UO>|^}}zp?*=;VC67f?IU_%rzfhs%UR`tqVfg`bIphXqPq zTWTi?jhx_f_?%vQ#E4q?Jb;!aT#xvt|7LKou9knK{J)ILx+gdZs~Z&2BTs28x^CXl zX`7Uz`^@S@lhi|6^!|(@8Gn4M7X#||eqr%4eZ7D>Daq$x(tj4w(&%6_5e+5R>+?=) zXk8?TXJJjtez{B9MSbg)4HVRxvkEBjA@LH|tl&o$sQ^5ne)om#7(fOp=(xgY9}E$s z{+vK8`cp#1WA*GrX}LZ{N@4WzKX=x0E3lM#%XG8mu)->dfZI2uleI-!n&sDaNXL@1`O5(f3Wa$?~aE)`+3*o z*?-Pr4+~aiJzYo?Zfmqcr(J><&1x&!_YNVR_p(Ko#r!wiGmK3!-w|-r6+4!~b67y- zE9!K8?8UQ;=%+7tcdjte6FPhR!P--JXkg1z zw(Z$s-Z`1rD;_^uxjLeQ1H)b0X3pc3N%if49QRLp#bRINX)GHWtIY2I}W9#@Uv01l#eNR!U75&Lr=)Op|&E`;Xq7^`8;gIHBs2DRyrWuhgHsNB=4;kfZWp_tkk;{L8ZmDe~JxiaAOyq`LTY`Np zKgE7f)D6k=1ugXz{FY(-o4^^q0EmnnWV+eOwv+8UYc^{}1^zHp5O}eh9c>>P0G;mk z$jL{)P^7_vgY>|AdVcd%RFoo3E!QPC37DO9_a&}s3AK=6gefGd-cgH&x4tR>3Z zikwB0kkilHf}$_G>C)?-h-Q_&@@TIgyv~?Bd<GN67AWYhn)%dcIAX=zrU zroTJ!_u}%3RTAnfZVzU8a^|dX>Lozpr~S&`L_&y^?`0x!|7e<7v$um!7{uhJn~%~A ziBX_bZuqtK3Vz=KNV&vSz5RtO0qX@bbuF6e1zi5Ps%6xJ^T0fM`tq=&X`MmT169C=8?7#Z8l{Ha^Qx^cFwCXl*pXRKRoPY_)KLY=%NtY$v zESv7+0JA(VNx5m1akj;zc?>xwARtVbu`jYt>!a9+7#{VUX$M;=Wi}RA^KPC8W>Q7S z{dwt8(nY+Wu$q&33e#5(8qWw%8yzIsJ}WEfkq_@2zwhVhk*|6U_xJzHBN{;1M|!#J zs~i1WuLB5oyQQ@fDV`F`7S*N1APvd`QjiAiW=GGu*Gfqr%4Eu7`K#KBME5XgJ(bus zT~8~?oj~x!aDJlWYQfS#^gG?)O9S4t@}yc>Ezf`nL#ti z%fZl7lRoF=*3uNLMZBk(`}VIZ({{2yN~uPaBLXHAb=;4?`h|XSUSbhgqZ4$!Vf$Vj zRU>d~_wIPNbLT)LVyh=0OE+TiV!Ks)y@!vnjm5%K4%F}1h&v~MZ))g<9B+?_$eEb~ zGv&NOAVA?84|#L6?alC`#V~ai-L~4vYent-`AqSnU>c{9yAVL7rY=55xf>} z#FUsGS$<9K`UvkkE@u_fVzsh;<%&3FY}qQdPW2O6r2XJ;pB^#>3xc=S$^$V1&Pdg=SJ#H!AbazaV8rI2tY71Ya zqkhC^r>U)F@-NlRSrpb+eXlQ|b{b!NobDskqP2Jm?)$JLr;9ERY$2~060GE;`5ATO zjN*4s4GkMeME4uTXS5%YlRpDKuiin;rF)WVXtbMpKPT9|^uw4U+!%~JASefIsP3kx z9P@+rh}RV-BeI<~=9_91<|d-ELni(1#nM#olHrz~P~t_`C`xO7Z8)$|o$kqZ`Ny}V zANkDLq?pmHrCKGIT{p?{a{T^oHb!zZ`QQgdRmD;2e6No`0i8DM=Af1|HW^@s&;N64 z7^j=qeMO-DUJ^`QU!cC+fNt|g7Yd3K>XP6C40WP#0m&^J{`5i~@7DC%pS)g5JzL)1 zQ6F{UXk1Drt@*q`Cj}zPy90_uqM(vWd+iFd(|ZRuX7-NUrtTfQvm5&pIQ-A9!~gcM z!H&(}>emT14}I$8qn65JTH#L78e0$kWIu91zEhDr0-m-z0)PC2X{N{rbU*%;2( zJ9-P!II)hXU^uY`pAq{S5vpdmFRC3M{fy$ZMrmSI z3uV&Xdt{{*<#oKCdB~Z)Yn zu!3iJS-ZQ9_iyp@;TW2gm)%Okt`wC$d0$Q!2xHa6ND(CjgTme^8NRDGy-Sa9RMdl| z>JXE%YJW7FopL`iRuL|I)vBi6r(ZM+?Bb)fU~EBY$Vdd>v1 ztK+r)qJF-`A_Ep$g;x+QRJl>FA2qD8u$COw$4D<+M1+Z4CVxAo?C*!Orx{Rd1R&`EVIHq241}}lx5vu(YYCw(0vtb;?rB^(pwmPKw-#R40nmtx2 zYF#N_FFeKjR_0MHj)k+PT)+%pyjJqlB=VVg{{Zru&z&nlfJQCM>teJS*ewSuot7vA9NGJfpT%?S^Y6S8JG+3%h zs}$p$p-C^4*g#n>3d5YEE!VXD-IEj{e^fWN`wzgyGwu7zwsF59&sqZIF{?Vc(zaH^ z7EF6%2!(gCeYEhapKO1xkv$VMA17kXBbYm4>b&>c(J@_X9p~S?@nLJ3i!(nEZAow=x)oyMKbR|+FU0kVb4OyT1iz^&f1kU?s<#31*N> z4*vwsyWWqjg59=Ju0}9}W;7bB_Jh{)c~z&wp35VDEUPApu{y1>`!|OB{dpNuB&xXH zw>eha_4Zgf&5*|fbSd5#@FUNiju#X|Vc@2ptY5DsK5M9cT_AoefQ1#r@E2&Ro{P@T ziV`#W$!YGVo&Fe#&lcPX>|r*=PT9@n`EB!tSVk%?4`j?WdMR!6^3Ih81RlV?pF#Z8 z3sTzfl22E;%C7Ms_cMqOA&G5j+m$ZQiK17g#9?kxK|JT-yqDF=ZBGK}luJxYdyj;N zg1H2inU~_-0BC(4OyfEjD+l)(h%{N@0ZmHqjsU#{|BYWCR5iCDhvg+W62LbW9pMa3 zB3}iP{?Ud*f9>kNaSAg0vMmEII3f5h)ZF%ZD?0^U3Ys*rU2?&BZ_`v&67^xFn_P}u zJ2enz=s|;#5W{h@nqx;_ z`km}Y5|D)#WCEZeid?3}u}Yuge)oDW>l4|Se! z+SX!x2=6;{V8uUB9_B`)dSx{*kDeXb$096S@RTte!X8zO*1BZAB`1!c&*^SyDx7fLOl}0 zIJ8s@+Qun2Odp@u!puGN(E5HSbd>PNx=~`~Mnae3BbLsg$>?Z#uGx&Rx^f~h^Hl(> z!hFrhPZa*m&$wTfXdPO8l^)D6CbF&o#cZdVmx7(T8a?G+E~B3BBd}- zp=UU(*;>MnfZad4fRBst+58cX309he3xOmV0d`ATTswdeGn6Nco~%JA5Q`PFJfBPl z;#HAq5o^k@9e*jsV`&@4K~-c}53+P}$1p6hO%Dh`N{St{P|Fg35|u)u9)`SXeSZnJ z5%}GgS(N8dix>$TXyDQE`?d09%{PHd@7V*9oj(M)L;g_V_SZ~~m#U_p+QUh{CLP%A ztx;zxgeFmH!U7xhD37CQy%%4L!aQeA9(P-ePLNgfe}N!M=JlGFHK3)j-Lc>q6i2~- zV|WY};!ATioNy#_?gm6$WG4HZ4-a{{rPIuqth+6t)!KQ2HEAufUkfk+X8oF9VY(Ct z{U*pVePN3Sc27~>d6hRXCA)?aL1~A-QCT{~@sr#x0Wqb3tj1bFq-Oo_Yk}%U=H{?% zrAcm82*414Y_il%&99Sz*lza)p|&Ki>Qwm21aHz8E~Lq-)bL zr+-Z??1<%7+7+3z1}_nxV+H(2)OX~{fknp@ z*Bm>ho2^^jrBKcjrj<`2<1xXgIUakToaPFH02`Z2NDaT|iabV-H}iq$0eMi6hTjz% z0q!+r0`Bp&;~eqJ;$4CJmgNHR;-7ycPTr;ZgDgB?rxec@BOl(f;l_E78PC;U{VE5A^W=~N5v^R8D&`v_zp*xR4*9vckaJ55xW?buhW zjtoY&=gL`O{xU4-h#Lyhtn|LXG4(cy8ULUX%S|f|xj953Gu^w;H2%oeFKa zs{=KM;D7E3)5Nqk1}>Nj#k7y9DEU(zi}z`qMh$`QD9J14yf(BEt=maMrS<9kLJav! z0ovYDLkK0XNTZiHuPASM6}MGBg2H`HFVaalWo}~WuhaZJF>ZuIa@n_*$LED1?n*9B z)h|ube>4EyQubEZ&iU*jNS7vgXe_Mf_@P-udYZM;dGll@Ot^4Ioea=8>bJXR$sC7D1XX7#FyApVNY}p8CTIDed zVAh%VL_z<+Tl4494u}-*d(#J|EM`xwy@0&ZixY{`nz(Lr#Pu&l(e~Om^>+1(7uH^Q zWgG|-Rmt<%np9P8sQkS9dnpezGNIk1>K(ro;dekk^~9bB#tr9fHzaa3n#z&v!etts z11);A%tfF0Fg_PuYAQwXY5u0H8+d&n5i}&PM_pi!`qKi{VTU+3F6k;~J}pz$U6kog z`q3g)mp^UjKWi|19=+t5YyBBLk(^1tf#@l3gy?Rk5KygpU4mIp8bXJt2RHi_B3+vl z%w5sTgPIkKAx9RXT@^bM6;&Q(QoFV71W?1ru!rvWMC~W}C#XBR$n9gME7OG8K*nWm zJyOS@awtBy%-#7F=NI`LeU*A_cb}~jUzr_CnIdSsZ6J7BS3h~}FW@ELAgiCcTt9yQ zswNNyYZ1H?7Lba}I!ja#nMu!F_+v+uka-1&gQZ?!UBHS=ArEo2h7=`R*z&Vf^~+4! znl1c{A|dZp4ZL1~%f03K_!hiN4uln3^X9IsaSgkB+8i(jmIR&h3%3CfoOZo2FRqpJ zw+y9n!2oGwuoapBy(uhx{$Tz60`+NZwcoSQy|H|(clT>|-TL$B#F%dnY^M;TVFA&vr8A78hO#XXbZ~uQMm^ja^uT?= z+4kg8UR|H$P`UkRFP9r^D;zB-nv}}FkN$I6QLPeTD&nlx7Q-q3rO`Ew_&G4-ns4QCSZn4fX zA5AJz9S^obrR>ygFF_>I6yNT!1ErCYb{}T)0$XpF`08r11kMIkJhD)hljX)5td+29 zM8j_G>Y3OyhtlF7u7EmDYSkZP*o}UhIX5BNv4T5@lng*!3#gk5t71p)vJv8Q?8f%A zW|5Q>MS$k`dC)NiKkdBitTz9^fWfWYi5c)DJ|ITH(lXTwyMb~>k zHPw9W;wl0vB^IQGA|fKagLDxEB@_key@Qm{ix3czA|;6QE?s&j(gG0(z4tC9bP_rw zA@I-p{=WPFzI*SwYt1^dXU?3Hb0+)D>?!+sjHYw?KEdnAFOG1z8#i#P{Z#3FlXU(` z)y*ve{o9s?6U|S91KsG1ea$bUDwr2jRJ0qZF{%!LG+q7aEKfkm>SFu$?=!)eEtd7Z zZI%M3a{{~`PxVGXzG61l4JEjsVLbEnQxiDX znlBPELx1X<VyMRNR*H%9?ws2;ufXbO==R^&Hr!DV$25{I4)>TqHcgC}<@krAm8h_;dMus8qlK&EW z)C@h78bZZnPXUy47syY7v+)U25+BQx;IT=@*E}xS#APauhA!Wl?wd@4oI`yHZ3{<} z)AO?6aMQF_39oN)C``1m%659OcFM>`3{BQi5lN=f#UAZou#JKF6zeXffvkPBPXBB zO+Cyu4wDNNn^L;O7w$5+t>$wYua-4tHJ+R%o^F+bs2Aro2=P+^l9OO($rfeEE_|Qq z_1j zW@~3TW-WE%hg@`Lau9G`-MoJF34Z((Dh)XRcLyc}t2>#(7d{8d{xwa~a|mF%@ZDYk zb+qQ-AC?26rT3FSz%|m|l?zjw?u(3D3D?O?q6`kfk zssPL~GTx~^@ncdOl97P+97PJG)32<7c&=wa2gb@|=jzgey+lUDpiEKhiwT_!4o*UJ;>14{Ysk8{?$be77E01A3Tey-w7pbrd1Cw%0;Yj4oLPd7!_?;gzqsVPI^syh)7HVNCx{l~!h} zbjFs0g_h@8v%3Bst;LM}NkPg@ENuS8vS<>?+Z znYWf-T1eAYM|o3GLP%4Qxr+qq(%5^{WGoO!Z5nyFOd3>Yb*+|O4#WVJF+Q@<=PIQ#;3e%$t>ee-%#8#icwT}r5))b$Pj zzGZCkTZ%akwM*^yp?L6U>&J*02rkExl~-z0PhiWoNn;${?ltm?+2Us9!LZ`vq)Ko|{!{DpF|q{K%z3q~h3t_h>hmP0?ap6{tXEk^$tN0@5)+h{&zXKr2?8rF z9+b-FHt#o~i2xUet@BdCy%clhbn9J)Y_#FgR2Ke@rLx!`NudEW zT=vKhCyMk&UfllRIAYyFYmBT;BhmnPOed)&pB9q?ZzOeUTHCVxiLO%_MforbH0 z`E?XLxa#{xe)=(806GS z2Ik1W>|b+{f?PMgy?JL4TR^d%{zbCTY>+G2{my@h zAi)ieh(} zW)CEybQfLd>bFczQJHa3LQNg=0p>kc;aK5(vc-@mrl>zr>T6&XK_trqtX99(SwZe+ z=#9qvBc%S>p9N_4Q*Ov<34&?*fuwFPf|%Yt(xvHsNb05%l&<;cjHX+bbSM0a=PN{G zo|&;`7ftoBmwavp{Vd_xlZRub16) zdv`8^v@)}x87N1wc= zUWAndQR|X0my<~uQF#2O-E`p_UN-pIUiTu*A&7eF26H*7lo6H3Z^lg*C^^lv^Rvo@ zcVw*uS6e)p{~mLAqahDq!58K;Yj zJ4j?_ISx!uR&P0)idE+Gv3d{D^@MrtOI8j{v`y-koY&%fDID{~DibE#P7O%r9H<-{ z#1{M<)y^`Fw-#$0%pA&t${NV(cNnM39n1_Xf}C2&>T!(I{X7e{c4}t~24j$?x{X6? zjLmA}f1Ps3z|3MkJ9?KJrE!c4n|tj)%;%FD3SU4D!OrG7S>4+F-?hvr10waO%QY5P zv5~_2`u+gA`ZKZlc2(QYvi*Y$2Un0HMaXLp>(0`^3thgJx@@Oc{y!h$J<44>XnPbK zW0^X*%`-|^t5gzMmMyZ@9-a0eM@a%xbo4vrn7_{bpzCHUA! zK&0qkh`=th=KHzIRT>-j8)MCyp9me&)EuZZVb!L59v-b`h=i;;Q`2(=YsWj@_9acG=(~J6PTPi-;6mZLKULb+5^# z9FkhTP6(aX{BrGM63^6T-E>eqR!55<3rsKE4}wTbesPvpKRoG~PaivCsnwacpimuv@fy`I=(%WpX^NG z+a{L-pPR}Fl!sH+;GPU!eE1oJc4DpH66HTlfA|G=UNQT}tBEm2oT{7SgUPqDa=qE) zjvMOCD-~7ZcGK$=vbOW4Q1B^>Yhd3KN9B3b&`fqTmIvCGvxCm;Mzlh1?UW z>+bU+Kq{cXK|U+X+2THs$sN*Pof`ST4dMbc&Ahvl)v<}3XPdXp4mNrsQ;$1pcq0xF zg!QaHTo*T2J>*wFtFFs3*bw3l8jTFy`P0nBO$MC88tO#{AU;e2-OM9$M|D!e;vHFX*0MQ{TaB|MxRIdj3khR)Dq?>Ud;c5NU>)d;$1Zl0wL)$WrgNwFh4eKt@u~R(Akf5eVf1Nhkl#u<;HX+;8uEOLGg)3s zIgV*HP0HJA^nClFRYtE#u1cZdMCqgSu}7qCrnC99GheC$#a!7j(J4iHGTPFzo35`t z5_@aAw}#w*(K>br*zQ|Wm$mcbW0RYhfxaF%6oIR(u9Tw;c1QI7X)vQtr>F^Z(P8p% zxg7273E9AOjHZN5_5Sg7b_3uLYwlM>Q!3EYn8k#L!q`Uku=GQw!z3~1lsI{)z%T%77^vsZ-&pXes_!+- zz4>uQJGImlzeQwu9*>6SqAfd=-MhQOK^!5C5i>o8dJbB*Hp6w6JTu)*;Vo8UE!+;t zW2Ld{rNQYoS_YzL3~OIO#_l8*>c2m9%59z2Z5ZQ3b{#?+jDnv?rummE^qEu3Jxv}O z-flV;MEAj97+h*M|2qFXcGDRBhYc%tG_NXm6~R`ePVB5ZFtUZGoxU57nkFh=Cp|%W zsGk^a7%f>&=lG?r(JKJmEYwyi+1#Tfs@^7nGinU~2=X#K_480!-8Q2;@)+$uHRm1vD))BY6bi@L_sYAPXi!xY( z94dRzqR6z`=DTX=+STlO>(#eC9NcGV^mnVkeB4r!)1AQzZwuZt3PU_sn4)#mqrh=? zJo-;ETBCS2_c5bSDy}=ee?>6h_``0+_z~+n5XnuNYuB#bx|a6ovC1UqLog-9jcby< zx3AqJ=88WT6cOb60OHdTl(gk{^c5*>=_|M68DgFmC|b-J{TA?gUSQyZTs{p~(JK|s z4T5RjwYh%tU5MJ=nBGnl=>y9sA!PDZ;Z)#N;3ex7x|MKtb$E4&4}=9^F;`gm&@1V5 z)2pMai;Am*!2ClE?v22!zN>TAD?(uA(&f(8`4kq*dNmh#rC~WyenorbbYZA>)p>PS zsrM+5V0y5mi34o(HO;qPK5P%f!S-2SG8}J3cLa|gvwi!1%7%SZ6cZUAyf(wH3Ao>` zTf+Qg*jr~TGU}?1qIO?HPu>Bm+kFQ_oyc7JT+g#|-E0978mtys#!BmsyO$C0s*rVL zOWEUpim~YdPYPLkwv^p)|CczkrR;@^)t0vq0G34V(gDLySS^du9<#~Rd}GEihR4?A}iA=oGdajk*W&?=EU@G!7 z+CFvpn>^Gy%%zfg-j&N{V-{S`^*k!q%+v#odG$?*a1cGq5I5vANy{yZp5CBHN#Qk% z9z;$sX<@WkU(vx`$LGY$Z03gbutGX~8e)@7rP9+bl~~Kt=bn*cO0ITX)B~MchOXx; z<`c_BVMUDxUH_x{>=`1U7q6AoiPTPu7oO|BZpR94$4YL;Ah+XpZpYeg#|Cc4rf$c1 z-3g=Ls4+Dnw$&o*GYm(&rCc-me%0*2nb_#vZUwJ(U$0{YuVW=I4|OjOEiVr}FArm{ zH4bT_4+pjnnr@?D`H*9=D-Y1VN4t_}9_fJ(z=~Yf|M|Oq=dy>23b}ar?ny^3wvHm!S1$3BH z59BWCd5BuYD@m+$GogXt&3*2FKsPW9CDd8W`o!nC{J|dB6WhAhZR)lrAazK`jEyAL znJvp}qRKJ2)4BURB(f#_FM_O|*p0Prcegc3$-~mFXP5Nu|BcbB^iMSxj>L{_cH4Wb z8xnPundO!8Q{tQco3keR+>Mb*k_wtmrmP;!?!dp^ZR)Zn@cfXD>E9nzz9f=05Hmp@ zYaGuH?=$({hBn_+HuqN76dU0&*qLUjk z)c$y~EacbCAqTGIc%B*s@Gm3i3)83rGc&*Vy+`xMRF%p$@_OaNNUtAgaf=YQlVkRE zvVS&+%hujpo7hGa0kgs8mAU}9E~g(gxkX_s-(w|$T^n9Z3oz+^gICj-zOQba`o~>u z=o2n~(T)6_TfuHZ>EcQ^Qj^N1ou2%({x-a&d{HU-$aF1fBEA5B2CFZV^Xe_R5r@y|x4?94k{Iv>`sJK2m#+ z$KnHj4y86XT_rf7*XiW+fID_jVaD!4Ha<8-tx58`V+ZYZOUP#_iyrBO;D*Zeh|cY7 z4#Y)w3OtO^t$$20=$?w7j^S;7x$xml7Pql(1Q8XOb*!;mt04%N4?B`YLAK(oso)ZC z!2MC4Z_{9tj&Y53UM3L{hEIvr(wv?l8JPJ%39JqIOND` zV02e@jIw;6oyi*_L!6m$UvNCGF(8PPfrY4c!9Ov}dg8cDe&y!gRNeMrRlgHGMvLIe zn*{o*l*TXSz+hjZfAXX%eR)!x#*)i`^r=ErWk5WKY@u_=-+-;ZOruOhjW;rOX;c5+$!e zzGOGA(cfcoMW@VT9_)^?HnvO8~vL=+N`WI=>41HZr);%>Uj)Pi0 zD7Sfk$>^8uYI6U|po`EyGSfFtoS*oCSQn1@<&5uT&PaA>Z?r{ke5r?-yqo z8g`dhr|R=|vNzGIDITc}9My$$9hsCq6@R8{KaJ z7<=9+T%r!@+4NZS`0tXr^HBfjp>!7GT3iqiA#lcu*@Kdeb=b-}!K-m{zc<{n{psO;HHmZg42&qk|7 zIr5GJ<}nz)F)T|j;Sr9zoGW(iL)qB3HIJWzPvx_b-MV%4Om^VA6~j7-Czj7zfZuG! z1+3Wl?)^C_b6;{%duqbQC%I3bO{MDBVXd?p@Es>T?5rWWP6BaGm}04oG+f8p?0V(T zp-LZ~pwTh|_H}fekk5D}G&sbSC*`pw`Ei+*!P3+H{O@JWYj^z95|GvHjlGw8`CTCU zJPppo5}MdM)rQ@J>YE}z8tG5oJ)T=V8q>8Fz+m8E{tY0$YgbSAT*u*IlZgBuL4hJ* z*@pV;-(eimLd!n=3ioOr32@vU_@puat2H7qH?00^8~w=T8_U>T*JIZ272L~G89nkT zcQzO5_9O|<)UXishT>CYq6^u_iZtmAe>PJU-U6yay28?nN43-i-)i&BD-}E+R`|qB zkDDaTI_d8T_?iaE*x3N89$NXFGR_06Bg;wI!n)A?PXc>cdQ*1QYbz3E)#-6c_Y<`0 zopK1kUIf2a<(+`{^%DCXPLNQa5Knu4UhT-G$fzO$@U?5nE#Qx&@EuXC#)C{;UsdXL{khhAHj9?slTu8^Frk<+a; zx@W&xqAjn=Mo9deGy`i6Nm#QgPH+EUeXjJ{ox|}L!B7NccSXxSc=QI|5QPgN(2_d- zEo%b|sDzE^-@~!o!M})`sOt6ZZhTIeU-K<7)UPh3)HHLK&6BKl4YmJhvxU{t&MyuF zO2~zLMphrS^j|KNJ5sEOjJ|YVM!b2NTdnYG;p+yYhju>S z`e^c5fn5RhXH5x^pU+mcXJ0^uXQrZJKl+AtO*QAqH6QllULS>A+)E9NT{molsL1%8 z*4cMLJ}_4pmC5!T5YB==5tY;9)tvMg_TD*mid)V0!NBz5cD%gTN7$Eir258PDi7l) z(yn#XOAf(9uwnj8dE{r^FKUj8g0(HTBdyCAOzOKXUhyK|m*K)i)Q^r|Pi zf@=>gpB2(Y7L>EFBOIGP^&jcWC;CcNwR%w8!uIPq(JBIyu{kRY{5qkXUzWE<9-0D~ zRzC|5+D0-s7QOL;BF~$piwNA7+5_xTV;u*mBZXSN$DLn`MFzw|nOLtM#{yn=D)TZc z=t)SaRw!4^9j(2wjoeiH#4_;Cr0g6-&km}O18M=ArMemB!z_+7L+iXsbE~z0aGybzo{IG9ZQ}LI z40rKA>x(QZ8RI$)1oa~8owXdEW$jtvTbBL7QcGzA;{$A|jlBR~y;_2vp}e8QjF)>g zVLF@t7p5mGcanxXOfJOfN!XM;!{+X*t(E6k$1X%A)gMvQn~KtpCDtj*!B5C#Q#_xV zGwJ8K=vRFj zTFj#dlc9qnv9E^I_WLiE2Z~!J9L`tBBWm zp{1{_%|#buVTO%|Fo*mTcuZi(S3MT7&cKjodKzmWC)P>LCt04Pr5nMXZOO`vpaBa= zGA4RlttmIl%OTWFq(AtCQcrHlp^8N3w!?nQjQRpgSm)_)B2)`;&n6M2cVt-jN4{^_ z^#ZWS>=4YTe#x*IGMC}-5`H`|Oa*uY^$ZM*CYJ3BC3k0dB`_dj-5#9MxS}94 zt?RuP^fZa*Gja4)WZux>bWLX+Ym!b?sidd&`Qe`%ld|w$hL5#++ydh3OqjF8GP7A` zhrcE`=Nwx}w&d{5YR}M5t~4IT+KOy$`~q=^85Xt_7Ik3Af!phs)Wxa>h$g8t ziXhJU$$pgP$LNNvd9ap1lG6`vWRZe$TRrhNXa0(R0>7ZhB8A=Xw9OFE(Ha0R7(h+5 zoW^bJ?@`*X6Y>1!Lst;9I)h2NAo(%I5Y(-mq8ogoO3cT|KjGv>>`Jx>7FxKNer4VL z@iRYw*Q`?uJ&v)IB8qQdrV8BDN|E+?qU=G^+q8!eg4r~zeJq5k&v~eCHTa7-Qbw=S>x{7y z5cfSWo3+*8CCm6xOa9V#@;#z0w1hdVtl^x{dq?QRTM%mlLl7_6nseXjd?`v$6Jvnq z2~u8J#Dor2y%J$j1~_fdPv%QM+sPt&irg$|_ZPT1hFLRGu z1aA06z|VA*!1tMSHtT=n4lAe47%FIiS!y+L*H|bg`NT7NwT zR`GCM0x(wwPf6w=BOp>cGKw%DDb-w63$luCDNcTH1C)#viw%07*4mAq4C&#*pSw>OI z8|CTO*(iB&ckVDzeHt0x~xB$sd^mM=#?A!-< z0Q>)CZQ+AK5+4uktkN}A-|N+K?phcsG@>q*SYHIcm7D|~9bN4yj@S#1e*2&+IFfNs zXflrI)qis*ZCq`vwkr6MiGjs+LKpF#C*{R`pLFXKq;$sqBZ>u~lVY#$W# z$~>=j?K{y`r=vBIT*%(4NH6#!^NxP3a9c&bk_s)*z18_b9c=tv%bo=F!44tGM||!n z1MMW=&qRda??nH17*jW4v}!8>-`L;f&5|IQnxdT3rNCK^I&61t7|-%_DB3p2^mMR{ zt|UW|Va&6cFiSL(zQ)Yqv4NI@x9R8Fmf(*E5%q_#ig1th;>ud@pBf9bwuoiWLFEm4 z?1P7iJ^@5)+Bk?=WZHzc^9KFiOp==5HEF-f{H4!{uCr>S_64$fUkDf|D1(fB=|?ee zYz9;;{&)|VMD>Bn3vCfF{fM%6Vhjndq?%?}5(UdTi5xJ;UZonuXDz1Ck+RK_gP*#OA! z=VA(@2;%8K(5R`~e%TxWSTkm!Uitj0RnQpyfCQn%!{5DefhjjzfYn!r@CLhie`4vC z*S8fA_Y)%GW90QL?ZK)na}#643lm!L#e;=!=8J9=>HP%(8$NZjfJ@yIl3GK%ZOFf8BOR!>ptmOUd?p&}_mDD1pjQSY1 z;AL@36cWjHw5QBY^zb*vBMuJpV>3ToG|?Y29H9ur#_>+5C0A`*%5uJBpshFz+`!0E zO9`i4pO|IbNGdFgzc_>^q^c3wDz}Jim4Tf+tqbgm0Hse&S#o;m(talB3a*uWiNhrD{Xg?y>A@0qtjc<{})#eFs2gUj*Tv;%$);v zJm8O-qzRWcGDz|e>fq$xoxVr4Lht=DRD|WBr}`tg+!!yXReS&UtuBjiqZ4d|Rw8kW z)lk(Ydt?$^<&te8=H%?)6egS%E0AzOPPM`-PdRxlLH@`#Syxxkh%PxXmUqB~B@j>M znwUiXVB_A=9mr_^SRLwhl$-BL>Urc5 z6leZ6w#4p82??{AI`8~zzD;Xz zGz_&1+0JQUqo3u_q}!u&R-BPkjjRq!wuz>4U>5?63inYZQtYyAS9Ou6XYlS$XON)D z*C4~bmA3;DKAn=0SeSdGy8|jir)Q?9!$XW^q%O0syGBV!G>0kh?rI1bpPd(rDjfh* z6FvM*Q`e_Mw}99LF@QyQsIK{4vQN+6%XDA6B7~XC-`a7}cm8U+e5K!wP8|PZ!f3;W(?|5ag(k|xWlJWRlYNOWyBE6X_KYLAp73gu#Ik^C zB2;X34kx-gw|Vg58Os>6tV?P2?OLDqG z(f5R02%fy%)w%7{3aei#SdfE@+{gwy^{B~9%{Rqe^2gP&P2LKA9wPRJjGcKBVY7fq zPxov@U@yZIj3ctQU9#*82dz`D=O&j@SFNPyo+F+iK~wp9f(vAwjCKa}B@>fGKDO%t zSP%%=Xcfj*AIGg4sf}BtW4*UA6So^hXL^D7`I|O6b}4Q9&g2jwqAu!5TR8mInFE6Z z{c4-%-1(aRtloBWYwbJdlwU+Fm@G?6V`$$yr+y22bJdZ4PiA-A=B$-_}5Uwdft2W69Dc7ci5r0s5y=UTqhp(e9$5wuxU*(8-+ zAc8z15XRJb_r-ksAg74{tpL(iAIqcc3g@#8uOeb)9q*Z+;ibNsM-B9-RpNwlJK;iC zl`{Qje=7GvF^l!Xx(HKV!mq!&CVGW6hc}nlQ%dO#X`h`oTSW0}2>1&&iWCbq8WzJP zHmQq0Caq|TLTDc3;)RX`2^pg65dt)E`B=_>IwQeL%6~hfp4wkRwy6n@Z<;m4Wgh8| zHGia!?3U>~vRa0am=5oSg-H@lkY^YlR2@k8*evhrgZ!JPo`J5^CJco&-p?aVaF5O+ zjhPi}6W$LjU1U1#NG1o2N_dx#V!@j~yYx*%pi)tmZ$FV_w7asK!TNlDxrNL6hkA*v zM~@8Qp3)!QsVZbbCUWg^6?*VmWX&hRjMSf;>G9hp9-NkK)cv^Rp>j(YhPWQegCrXT zpqCpVBh96iEEC9$-K@QqC8p<|z-dalU@;Yx;swL{gmq~kJ_G~;C$1mt$vZE(P(5UM z!DPACbmH{1ZIe16`1f+R_sN0G<>^1DNq_YJ5;Bpm!n74lx$0S65-Z&SniontSbbP?pa!c+I(mwNR~dZavZcSxbhx%Eo1`3imG)oB{nqIblD z-RtL%^}hO8mpActl27ZnbAQ5lY%N0|ZaI%boMNb6%+k5<@e!rtbv0=%H zp}rBs){yOrAE5UXaca_sYEG`V97()7znD3s$c0FtsmMB|i(3$kM>T-YElO7MPtjth zh!Ouj()q%UNQfU3*T$~vmj!n8^s#pgeF0H;l;j=rTd-#7KINIUCY|TE+9144_Uk?J z;2LGhK^CFsejR^z@BLTeZzlgY)p{%xm0vFwKtE6V*9gg? z;!Ycu1TF80;zY)V|ob+gJ9PmqwX5eueIjLsDL;Fyo~ewL53Rju+}o# zXUc@m-?ei90Db`;jhRQCQXP`b!x6q0d%$VAQ5dx=fOxP?_{6*9swnxQAGl=5Z!5Cy zahW}*M;n#R@dK(Y>h52<4Md@bWq#I350t!ce|PXfa81@yrTpAarTjOM&PO%t2hVm` zBF}b3BF{=6yKY!uAg69%sI28Hxpz!Qp98W=+}pC)E!DjZ$ED(i3_WLQZ*876-~bnr zM$Qk8W@&|VS#mWdb2iogf~*#U36HU_jVT@TARGJbE5V4x*MhYTc?*<>oX6QtY=jqc zk7=P?%B3nsBI8b0L||CP2_hE~nIzEJxOQiApo`9uA?!qgI+cRzkXotNyz-Q6#G;br zw$3Bn9Dl%`p1p)3y7T#SahBcm?s}T}qM?!-Lp}(dLG{Sh?-CS&T)d(dm z2a;9DfTwaH-pzjtR5So%<#IK8e(bHyEMR)Si-i5^rlMR)^WneU6+-V0-}CjC?j&+`m)&3{@__iKY?C@^diNaEM)`_I=~;e)CN34cxQW;|82x{v3njwFIkDPI;z zo)6@Lubv)hu1jv0=tKd`CJ2Jy@&ftQNa-QvrwmvAG@!77Ddp^wVLsiQk=4=%Y_`!R zB+d<){WzhTnY6_!$NE+i$vh2n0aG&>n$!69gLl(f)Y!sGT_mESu+k8UVX)B?;9ROo z`z5`VNwpRl<)$pOc4+YsbK$x`QgvAM$%l_>mB3nJiYDWIj2o zF3D9C9a$9vL@EmY&f@jtnYT2VmXs(H@oW4sP}2WyzW-RoTG{B0EMR=QIvptvP}YF#Sy(iHhqM0Y3Ht;*)ChjG;xZ9aj^ z|5z7L#8HS8(2hI-6*W8}3``1W*PMVR93iCqr%ezCVlwRnROV}Sp(&bZYK&Vv-%Xbd zr;Gd&#P$hj@4_(^w&4^bMZ zxkGnpQg`{b%rqHpL5MSGbqTCF(U8N1oS!w}P#u4_MZTowOw4=_yx4AhUaJ08I!3p( z!_L!j^Vv{d#f|jVs(B2}J6ay4(13p?Ya?xpr?A|(Gi&(mlDx)GHTdbDlpj$CA9i<;F+1JA8p2_;L-=1Ylh^{ml zThJ8^FYJn*omf>m-g3}R-Z4sH^G zqi!8-`t|uXU#Ve%A}N^Y6x9YfrzXfOrp|scb2OfLa>WojWvUIGS{fA$2%a1!EY>4j zylg&h2Y@OLdJ;^U(SehO9deK4+9_yBY)d1i1^F*Tq6RBiSJ%doKz>(0GXR!!=& zgVpmWl}?|#y+=^*owN5h4glNK5xFixzt7-;sY&NvQ$Oe3NH_X_(kI@p;@`6+8sLSE z{0k-HPQwI{8igh4shK8Be2xrl9zy#Y)D+_t5bhbS%kXW9I_P&|tlktGBz~^7-_AEC zIqKeILRE)&Jd;1FS6UZ1_QhR$4YQ{C*5GoO-`V^=S-?jP^(iIX=8BYb@7nL_d`yR3 zqC2ho)~Y1QhKPendO-aCo@=>k0OrsUn=48G_}H>Pa-m_UngXS%Qeb3Z!hs^$w8`X5 z49>auis*MQnv2g8q`$P5+8Cd%_E@Y^rGe!kHD}wZXbfybk0Oop401@g)WkRi_-O*=zGzrn}h`8 zY*du>sOXdZCobKUFORN538x(A2dY4|NxKDt%^A z?GE6RK8vV!uXy%P)V{H{FDdD-PMsC^Kg1P#IhohIgT5DUidG2hQVt+`fftzKOzED_ z_aHutvgD|kPWOY(m;k}#;2MqXt{1!M-kj;Jap)fn^qKlslvDc-~Fm#X1{Y@J3; zqXO^2&C>fFInfU0J>#D1AKm^R!DId7{~bOY{a9S}5(*m{S$6k0XJVF9{@+Bzvb)PU z6O$Zy*wDXX>1^^v`CJvl6Ah2#J&RIK2gwcVMy8DtU6dWmmbclntCj$PP$7R^rR~RA z4sxyvcjh>Q$%CZ@gV3Ef)A2zoVMJz1L~#UHn8eDz3qkGEkOI;Z12dECONz4$)}JYZ zn+Ij_-QFEHwin*{_>)^)An$LwZiR&r_yHaZseDLq`y)Op&QR(qSwyTn6hWmvALy}i zIWd1{@Pf+gve!6db3QG6u;tr-MSthhZV^*I(P~kNd`e&;L^3$aC(BGgbcF}lw4f_4 z4ykY~Wmqto(bMzoI41%GS*J;gbm)oKZ< zySjlwKCKop?^~u(rdJ-epHTS*xJo7qjRu`2uBmsEU&)t@8KRAGZ6i1Z8NsH-V_!gBBM$e+P~6LebhN;T8zlu;U>~5^K{Az40y!!)<)L|guJi$b<2|(i8-HLAh z!`D_!SWfrrSYCIsF2!|P=v)Rk5J6W_p4!TKx*gtfny0MnIA08T{8P!!l|m~s`ko-%;!j!V$0Rh=4tGv4 zodEc<0`VY8-EaZA)rQYI($3?D&RMlk;9<|V217o9g?uo=^=7>ZsRMpRY3)Ow;=Q~^l`ltW z50x)9tso(od?W&|(2b#gopmE|vyA0L$1cLE&r*HpRm1D?x!f$P2|1$#|FX|oO=_O3&hdD*mIL&vqui5P2br)z>isHT09lJ z1jyXkNIxar+xRoM*Xj56+0?YNZbR3sC_R3MdmXSUd;46UgVV6%tdKPLca)(wg5 zLRalCCJ)t`!3t%_81}?2TGNT9xWw+iW;wnG!qBQQmrbkJaTtrAS8@h&1XzVI9EX`C zC3sh*NJFtNFcb#AM$$wDRl9+uraiE1}t`m++_z zOcpZtG1BcC<~>IMptqH{-P+Io zd;mnUWf@jApZ%k6&l6Q68Qlx?d&thzdhQ;*=wUok>3MSGv4W?FXN6?#C`eWdO&I-b zO1!d`OQezoUQXGk)Ib<5AAJ8^V+Nk{)jAs96K(8g5D|bHo zOlc!ZE_#qH@aw3#+hVYkBQzFGzu=bV{;0soycF=Lb#o2kPtGhYy*Kgqa{JG#%bZTL z1-jAzcpAPX)v3waLy@&v(ii`}ZSni%A43uQL#gnFvJIv@_P@~_^$%EiB_g8_`~@(y zSzbq(d;o|qsB)V(^(p`&aSybELWHJNHrZ;FIlLTY@p+U8}r1!ml;jDmY?@7)nh3r?X zzrer~sT&?|Z4BV}X#3t2s^(SrxX4JD+qh&*zIK(MTxiq84w?y6l3swqIRLVPfEKUBkl* z^Q@>YTOv;WNs35GG!FX?ebx_uOy207v+j}Sck`oq*G+L8pRLnza%nV6ZrzAwtvIf8 ze*tIbZp$cc1c;j#mvRNN!j4QDEMU048&A;|(oII9g z=cyVA`+^m%i|3aQE9Sl4hSDIb3vjV}a{2=ZFh6C@PAuPrCu`lxvn{Nf&6ZT zbYP*eL)<~v`reG+)NFp3+yb_?r1#+}tcAY5L~tx-?N}nkt=l$478Nh|dbii-Be>y1 z>7v>U6r2a!^Jwxm2_T&Nv#hsxi^1jRvivT?TW9B*F6nrHRngu9bIlQ$WC0U~neSfO z4K~(_f{wc81*|>G4{;2<5RN>FL@v52W(1VT*fxBX{{Ip79#BnmUE8qUDyV>{NRy_b z6zN4ER22o4CL+>{1O!9~9byQmNRf^py@&`%?}Qqpg&vyp5_+f!BtQ~E`A47oDev>X z>-*O_lR1qQ7-r7wv-h>Hi&DtDqi5^8e)e!Y5o0@;K+Y=>O>fMVdF_3;$$E;1R7j_c zo1{UW5~-Nw_dHb)mDV#yi9dRyw&rya|bPSY%(Kww+4soTx}nx<>?`c}dwS9D?x_0#2izuI@0qlD$Ofa}wl+Doou8XT8g`_7Aa zdkO==(HW{KFLOyFC+1`Q{NaeSVt7>i1Mgx9-(WMdu|z4hy4rPgD10Z? z^SYcO515t71Ax7udC+>C(`>tiOQ9`lGsd0^`x7!98_X;y3%;a$?fEr@6Y(>eoekYs6D!dq?mEhe=;s^Uf{CH$9WT$GiBfR^9y2jM3vrJv9tMjDrFhZ6TLOsp9(pJLaGv>br9>2bX+*6k z`I)5S_tOp{L!TuJIsu}!8`H=7e*#clJo&%9@tPhUm>&SC>LMnqrV&}8;M4(Ynyr7c zy#%QHn$svc;z?U!M^-ry63ksY2b#WuTxG?&tlvK%w-LOsR-{7H4Z`f$PeZ5DtY0}( z%5GYaIuL5FD!Eg;)z`=NJNsTZZ*066#!!Y0K~B@amH&$G!;E7`ap95gJXvKXh9dRj zaiRQ*$5{z?7rP@c-juSQxrKZTej{mHZcK{%4#Nt5;MPZY8H{Yeoc<~2VsRNtWXp{F zT0GdV#^bv7a@EOg=}?wDIv3gQ=W_>t1?xI-=zDc`drv;{p}qPWWb_Yrm6eOAh>dYl zcLhBENn`)?R$MK6=HAjPq@hm91r&=Y-_o-zg+qqrYYjDVv%Wv~XQCTLj%ge$a9p{` z*HLN{h9=`WfiF~a&{3xyfXu@{6rohd!>mg-XF{OqcSQ1!Pnn^|;9A8^Q)0ra0Kubk zagki5Ng}VpP+mD(R#HvI8eYt2>lBsN*OWPY8`TqzX7*fsmtG$MOjvylRVnl07!8*M z{8I3Kns*Xd%GH?=riAgI0<-2zB;%W4p`l1{H68Hw9F+3&6rTS1~OJ-6C*Ps8Gg zlFS`?=5l^9%{Sw(?7Q8Je{L7-g8ODpPXk^3?i8rdJ&2kw$hf77)XD&KroM2rSyhjq zq*&wZ&pLizIMsV*)V?gpwW&71?eg^(_GV8#gjThOY1;DajoH>`8$Z_qNyJqrDZQd1 zTg$6JfI3Bi&PR=PU4TQ{z(x2=z3Ilv6|u4mU>`Wlf}kG!3&?w;{mT9icSaW=T{L(|HJ_9#QWUyICNcudr9zl*6so2&~*mWlC`DruqL ztf@DSmCaKd-9wKB$lQu;;kb1-`c&ErF&o>-WVY<1kZ!1YU`z4ua?b-~sKHrzD00>vE!I0Vq*)t#GeuZQhfq%)Gu~JCe zx9f=_x;Umgn9I}cFNm@)a2!3DM^Fd-8U^mBPU)WYZ+TIBtDoz#t;RWa#fqWmmsyo3>ojZ`v3)TeB_GWqf#p=+^7fhTdwHgI!* zBQ$PrExZj&iKFgR4~~CppR12XOY7Hp`84{zIh;=O73R|LRTq{`N|d5IW%97g1Dr41 zGj^L5sIPr1yy5t@@Ut90XyTR$A8@_H%ty1_Jf~?=W&c>l{NVM+9CpR$MC?Y-^Nl)cEKcLc`uJEUf0pvb@^N7O&kFF{6T-p)+!%j{_IFeR%k>ean45D%V=5 zjdYp2KW4}I!COc8LOO`yjEsDdx_i1*3zeCwDaRIuGhVB8=hs8r^Afo8FXJ&fGwYTI z;2r+`GQ*mhj(0hvTfJElw>SF{Lh8}mZCGf0My-EPy74+45%cIMlN27RJYg}9l!!_V zr%tr-c8$_gCjxf++Ig4Myy1$hs*SO~9vPcKNh(9lq4?LXE1&(Jd_ucnI=D zI{90X{_*8b!PyKuZs$Z+7@7X@?}+x}DONsS2Am3Y5iz?jG*_{iI zbFcD;oY?@6xs*;~w&F~T2V+gx!X^KCfqzp*0<6)-L)fYlw^R6Sk$699if#VTgm zfQy;@YKr9*%5l>yY|27&KrwtugCmKyrQ`71I03mUZ!u%B5h`TH)^O<~lp)UdCOv_t z;)#cZ&V8YSBYG>~78}j-s`22s;-@d}^}(`QTf?j;^_rt4?sUc(qUPCu!}f?z20k26 z*9J|l4yBCGCUfwxh|@UM6T#GS3>0a`c$kQ#%k&&*XA?MjNMS=T6Z#gw^+&c_5^A-O z5M|V_)u}7+Fgjj8GoCYD+ci94P=4iN%1Jf=hG3$s>;+`l43O7=M8sN#&#d2;+AJZM z)n2RcTiKv%YC9R2`{ErZ`8?xJ6)Moie zYE&P-AS1bWkI7haxo{1ez8a#*QiQb#pw>TCm zlRX7G9lUV7$D_D|l9x8mUJBQ3RSkXFmcNu)n;>M;8_9Z#`dZ;LH}!S9qp!@mh^==c z$shHKx!_0Li9iw}yZ}ebHUq)gD=1{X)#GQ5Ps73o5YBeB2NmleNgnSLGKimxi_032alx>j^tIWN4)MfOpsWe9+{ zp~~0`s|I<5dYIic3E3$}J&F`NIw?~BVwR1;oYh(QOp8Q(tpLZMnpPZ(9AksD5d9LK z;Ois7bt5JV4(rtM@}-i6>Pj%jNFW`Ua{d_$e2a44^U-8GtDw5CU>j>wl-M&?%I8k8 z;{7-ZCkr&Hv#+?6jln`Pm19MQTwpqIgKe2NdE81Bor%QX>I%;W{Jype>X+#cADJ3Z zqN^E}=&X!m`viil4;~%N5nAEVxd)<@++d7}QX4MMJ76qtZ_q zmw)`kw|iPj6&~S@emR%ogxF4w^`P+w*=v|9b$jAtzSFT!76~>- zd~d$L=750kjI)N4DIG{SX%phz?Z`83;zV`RtU<$DT+OT!OHwuf;?G9XIpl{1Cm*D# zeLTkP45lTIV}`A!;TU*OSW%G6--@ppPAcg7)Ri?bb)VdVZr&Q=5UV9sLO7or2QC8D z5&a3(YZkZ}cJkmDZHUifz+NVQ&fe}Uc(t$|V}zkA#xozph^q*&u)vEa5wT)?n0)LE z7cv!k_-M;>xox%=%hfU{%5o;t>#0I3opAFCeDAc2{grmTUtBs9p{(9|XT+J+IYjw( z2H5pMHRazq+ZY{XcML>_sFeWeL#rNb{z-7v@kNb(Mki9!O0TCktI>XGZSdH*#tRRz zz&Ay^r>r7Y%`jKze8J%X;$gS4%f~~!TEqemuN7$SNDPv?gtMn@8c6ZT52UIZo-=r_ zd>2^zsdi2PB~tHK^!u}~NCF}}q(dg;lu0a4iXwRck9DLuxY#r!jMuZf(ynXZV0g*y zuz%APG%O0{x9AU-RajRK;Jh!{M{;{(QO~}l%qRT1-~^usGfSkCaS}b=k8|2+*o?7k za(&R|U8-UH1naFjg%MrS;_OMBLjSNSlyN0Cjc+mg`-~Whka2)y+&$#>S|V5!B`InxMHvRc;`- z*n`moY298H>L85l$oh@GRS{9!j=1v<5ITnPrUl8=LiEM`tQMrCs|^x`rZIzT>G!Or zpJ1=%g+HODg_Pd^FqeA2$Yc)vqe6FEG0{HPnN}ZIQg*e5ZMc8PeEdTtAIcC0Q`&17 zbSND(4QDIYlDKila!S0RDYL}pa-fNU_(+>`U{%RuMZ0NBW-Gu9ZmE9jl$lSx_@Mh; zT^_Ii0&1sD_C!bCK?Q~omL`CC^tVWSouRkKo+n*}x~-USQl%9?tIy~=jqaRDx0SE> zg|G?Dr8m#0u z9E9l&AI0yCWvh_Hi*C(_BBv<#4@I0`2^?;fVDKD^#WBd2qBN@}9}YaG5Fu1!oXHuU zOz!R=&@yT-iVU?(H- z*y~4WpRYR^bY2|Du?gPK0FHc{VDdNMAbCmd1SMR}9HdGu=k~)da}rxA7OyGGN4M{^ z1CjF%WwN_=UW~W#&&Il{l$&DSEWNdc;4GuC$u>8uuJ!wy=3&-9^5h~P?A=7!IQzXU z7LvF@eS6z#AZ|fs3l=N;5RnX%-1%Zn9(;oE$!#KJ0qnICA{Hz4x(JOLM`?I$u?{KI zwwtwT-MG2-f<?ws@;Y!#i(2EP+J65cWq^4j|Pxs3%O=un)3zCPl>G0OZPS0J*Z4 zfLs|ss!#55qv?~kc3O2sdq1#M{3gZS#2z^trtVC>%y|Sg?DA9LRi(A_tpW}@Q~wjA1(-BoGdA|3A!Ggfiw`;DV^#M@LDsb(_@`?I!= z-ZESGkzMhPL_kw`5Wd67n~=Ch#R2SBT| z1f>ez?`9RUAC)Tr=c`@g4|taXcS*bMn4XiMgkDjEbywvj%^H~xDsijrJ{0iy%237R z^%q(t1He1sEy8s;Sx{C1J?s`&3@iisxvt-mfnXY9ssfX|2lImayPgLG#7MQO7G5js z7vR$wkXEbTQoK$dOc|7upL$X6OA#G=d89BjOSea42033LcgK5u>ez~O!vtY~=qFKY zqK(40GyIzRo~X4SO4K4hd;SJ2O--~BVp9S=lcFZxqe$$M1Po%F5D&`J*?suF?cejd z>F(DJ%(>?h6yo>cdU_U5V=I7s{ToUo)fKq&FAqCLHvE+t^UOlhjsJ9sW*QNHar&&! zA3WS3Tx%pM^6wR@)&wNt?R#SLAvJMZN*{Q@&q-Dlqivo-4Tpsjg@=om>@(tv&AOOW z$A*e-2LTYFdDlD3yZ+q|YZs2{4u{zqbSry)iJ9j;n>o|`z0qA=H(qr^F#fId(q(eg znNUpX&G3e$cVg#ZUDwl@v%6QfABJ^T8V>2<(k4}ZtFe}eF{*5Kv3t{P3borVbx#G7 zIpy^rTYR-C4aG;zAcfQch!l_b)o$sMsqfnX2Ys9z{VC;OR=4@{NlXU)Db*jATbZT# zi@t(f&h&l~veP!b_a8$k<#h@F&skfOaH<*TY(irKg|my%`k*kBn8~3;d6^(Po*4<~ zaV($gs@^(}{jhZf8@9!bjSIVkzQ?YSk}tWO*C@;pA~ro|p|G70BK8TlBZRyuuL3za z6Vy>*Vdou@x~hnrgL-AVQ3J8_ALb}EzuMgPOts%E_@`1g3T4=M30#-=Ds(5r!A7%= zF$zdb5~0(AQ7v!__RVV>_F<0Xc@ax(;Ci=Jpo2=G}XUV(}wHPtF-_t zUFp@3<;4!`W>5A|?YaSbS@})1NnFx?`?6n&gavXd*&{@34JNC0Gl{~Nz*Ib#;>~=g zFAJhwAKCmlllNa`YWru6nCo5a-V<#m!Zmx%%Jr>lAjL-)7(ciBk63V+5wh*LIKskf zT5_=pelZ0+;(mG+L=xf3PXDIZ%JrtF#kYQ?sw|~T**@jVN|Ey8ZO|_*uJv0IaEcJ` z#YQ+V5^H$Vjd-m~$4JF>vUe|r*|?%4LEyxczq>P~;s)5eSHf)EQIhgt_CK>xZx6(j znqfv?T(vF($yNz|%nLF)PNvPu`)HD6Jyw6+sQYXTet_LxEQ;~@{tNL@r|U^V_4)d% z@XO7Muvn&S#MN0C)|dMwqOqN4K%rjix$VCAkvScfzAVxT$8#y$hO-gjrc1)YOn55d zm2*RP&e0rBdwTlq!#pk!bO5KyY5(mp!MZgmZiQkUXgdJtBA=%rlpWIVM#l%}mj{L@ z|Ge|OWWdtLjVjKL>5vg3ub*x)<;a_YSXzQ#ZwS&>C8CNPHKzmFf z8HzR}cy=q|Pv&~kEe+}&3h;8ke6)tQ*XEx^q}(<$9g|6B?oKrf=6>T;lcjOlDqP$y z{(zS8MT%<-GRH0(dIjlrxzk}{7?v9wRFO}5Hn|FkWb%IKGN?3{{K_5So?|F!h^o(+ zinOo-@_JrNSN!mSYr5S_bH#L3D87^R7A?Le*1BZhb|BpY>sWFFBLC)o4cmu8=FrV$ zCXOx3TS>m(6E*$x*aO8@Qv~gg+AcAquL`S0(r!N9sXmwO+I2bGI=C^%I($-J@-g%k zto3M+gO|IinC6%>hO%yXYBduy9rzZ5PZ2CUJW{vF;XGM>cLSQNUc^^#Us{s6&KIGc zd63F9Q$ZH5C#w1~hwGXyZg^Y#NKJ8JLbG@seb@7{G((9mH&oh{zI7jK^`>~vz{9W4 zausBjgM$qX#0_D4*}p8YT9j&@$ESoZ(h#O@47VX##R3VJ(Y4~2i%!n9J`Mj!`D%4m zrTMRA%8qy!W%DK6GwOO5b<*}P_O6N-cMAgRVGVCAQ{vmP15G)NZl2N8znsxgX&bjm zd!LfmZ;vwXwzT*nAQ}bplZZ=Cu}?8-J*%6O!OqKVZ~)CXg|Nw5MnHHoE@UDPk7eUj zP}0SZ0=dK9SS}uZZrcHLvulb`l0$XLuY07%Z$FVCn`eE_(8MbX7=bs6_t%FT*up5y zXtpL$tFOjVhxMr$+qXGt;BfCV6#G45N`=#Vtr&%3taIFLHZ(jpRQ~?N-I~kBPqEfB z`GR5CtUL|8@2ZS|_S2ze!}nfsUMF^pY%LETg^yn85Yt~Z6A38vSg?%ZckaAcsLSa2 zX7a+mn4V&ZF+y@$R)0O&@>pSgsh~?#h8laHqA;v%^YYDPvk6V%UZ`1}Xe0GUs?^rB zy5r>bv=`nd9AmE4)w_=)dYYBvS&S_))tG`$tP8GpxVeA8WwBTTD$b$hC8#ycb*!k_ zT;US+eS)nHa*1SmU#khJRtvZb6Z*9oyPg*`K10dh3s&?SHYcF<6CjOBe#i7f3xQ+p@szH6**+Ri zF1UIv#=3I628AyWJHMNFAzd4H;8H|^T}CQWy^3+ac%|^^Qe)myeNf<0e(Dh1bfX-8 z0nRjYRJ1$Qj{7kwL=jLsajcQy)j^vwVC(DP{J?vt?z0$p7AE|~=SnyCU(jqrShM*g z?H{a#C-dF}?HFS#H^({3x00Ncc`2*n-T=rqUQg_c9!O0kisSfZyY5#N7v{`EF)|Yg zPNnQD>~B3U;%vTRakarQhdfBw-oBPjGI>p$D<`K1#eiSR*%q~IV;I~0R5*_hoexO= ze~n`Ai-LX;Npuc8#+aJ^702<1lKah(Gq*M}vaCDC`?WdQUlJP7hwo&Y6_zS^h0Whw z-0N*hvsavDSna9#aYwBtl6K!oj&=7PB3}yofn!DJB0Who)x7{EVA1`vzB6@C5d1E} zFgaR}6@G@*A8wvA_5IX>xq6iAJ6)&2PY`4JT2*NmKhTQyT$qJ2D%Fb5n7->)Q%CXT zcVhnYBGNBt;EZI&wK-y|tfX32Z9?)x@nH5kkLy8X$4mgiyubVLRlq}nNN#Pkk47Ft zh)3E|jP2Z^upCla?P?|`bGZN%1k3mY$#SpNk!9K#77cWLQkGr19GfZ2W&7Oi{Y3aV zi9C*L7zXgE`F8x&Gq%2a-YUL4bKLZ93eITCNocod_A(2=|8NmYX?w(Yr^ogIRD}lj zX;RUpcwzC47Nf|RMVA?J2WQLZqW!R0w3lDoxp(+%ZLZ%KsbQg=e$~W4EWJ?<6|f6I znsKr8aBf@?0_p8<_|HTDmpG0Wirzwx8_N#1DNp~3(B$h+-I3vVX;2g~lX|hGZ23O5 zM5j1aMjmYt*Ff$le9xBO8-FwENP#V$t^#8`i8#OX2qC*0XH8F&S#JVl{&w}<5khK>8|nD^ zAlYzw-$nOtWHC(fo)_6NZ_hG%IVJl;2ru}OL*eEt?+*;qkw5vEbyhMvaSo44Ebw757tug>HW#(`XqWN}GZ#7&2`Bj!? zDdxpn@GqwLj2+Z>lIfS31m4E7x}9O+$c-Y8%KjRSk3^i>`cd##Ucj}XFA7?^j7D%M z*kMgvmrYzzvY`Fj|5+6FZ~s^Md-VUZA^v4f{L|j}r|I!egCvbK7DDwX2szy&E1{E%@(q$-3T#nk=)G6N3VU5=j|iyXBX96vVecL02$dBT(RN_)d7B)m&x z)LZ2gC25r*kzHISWK?8JLNttI1B9=v$TFbSc?+<)8ETgEz8$->`E_YVxzQ*jgAXPV zDlU&?#-Npw2d)`dWw@~}!31{6=hR!+!~lHPAv2@*bn~6G$zj65@1a2nBN=rTf8qim{3mjLBmmylW|>~Ll8;wjB0T(}+Oq)P*Go$y8-{l( zb3=_?B^7(GNM(2@+4mJK>%QVSgXWzf{eZ@L_kAKh65pT&zZUH$?U;6K#5C31-C3=< zd)V*xem@`k*Y;8(U65a+66;f$E6cqBJ51aMt5f&KA8tf5q|lv**_`zdw&Kw#7i86@ z@7EK}&Y7;n_8i*F5-0U)d74=_)Ma2)rTSMFUhT9$0k!iabNRjTJSZLCZh!S34O`px zbTdvrPnU!7wryLw<+0l>rTT&3d^_{qF^d`gAkuFdL+^CX|Fg<9V;e*opM!gPr~j$` znajg9qi!Nfk}y{~?F*@9)FomqV(?#{$ebcC%ct7k#+c?H9`*M%k~%l72n}xm4Rzu! z_(NnEDOk!l*%>v;7k1qTLUc7leM9|990bW)ZVV!pmIOy@7#92o*(gCfq>jid{=4_u zEa6Wj40)c@kI*vz-DE_;%asMD)fUMQ)`|Vn8fNP)FmL1FK0!4pwciJ5etgK>j~!+w z_%Z>{wE?KqKH*c@@P%M3f~oW0DCYjM?Pu1>C})O4;5V!4>tn^MN@5g%z%Zr3HU`_N z(7_hZYhgUaL==+E<%ud!hubrH9+;YvtWqc5Nf{6<+Sp2pES+(Pa&0d9!&m$?geEj} zq50>9$?;-YmI3t_xlYZsVM~ysnc7=pGP4)jv(C&E)=CR)wCX5(^feH2!tZ(j%GK~P zzWPYA+R4ahl$|hdT6igEwPD&U*fi6vbW(QTJW*}rEDULolVq}B_15X(=BZn0x4G^S z6>po}m*>Bos#^Q_WkJhxvk?znjAI&)2xGPf|FFJ%9I!_Sw%2`|Vn0Hf_yOsoP<$pY zn%lUks}BjYh3THdYMO-)0O@HF6i2XC9n>5ejqg-Udd)rHlkAOmstPrOGk+4>Vxjuh z%v*W+_GI#7eMm!LN)D1MmHM*bm_dhBtCj8WO9VZkX?F>qQU7%{pW~KfNI7dQR?}+)eFN zT1SFSZrU&@EK zy&^gX?R2G2#^-Te&gSzL$8j0>H< zvoyx>8pv&Ja4Umtr($x#l2Dg?{q^1^A=J>*xpB)a{R{Q$ID7Ad4^$tuHH(&DYOPk}v(#yUy?cOZj zKHfZdv^;e!;1#<6^Fq4jh)NCg3(xUlGa4E|(BW%W5%jeQc0jt!T^y~4I-_I7wdFxB zgPkZdKru6P`e=}H4Ta+8mr)+)yqRCr%l@+FH+=Ca_wqRRGI5of*b<(d5zz7&=4i+j2$Qz3eko5sT)Azl(r6M1 zIWa}LL^tvCJ;C-A+{7Y0NExJ)dmI0i7-#J|lhT8pj2(xzeD2fEGe>MBCpN)iZk@gUF8c>S1bBdIwGuc){B4Q>?qhPSl`_sHx}4 zLz#NZuPNjVb99`;j2(Sa#V=f8Cfj01vu7wbxGc8+M{Vi5kP z#!?BWk{H%1dFadhF1q!G-ERD81rQ`ZhFB&4KTdfmh=8RlRkTD!QWo$T+%AMtji zUPN`lOtn15pSY}ynrcpTeUU%aoG`kxH@ckITaB}TpV({4V%!MUuz=#{a6*OYX0BAa zz3z4uFx9#u2uJ$qw7)!QYcY*~&*j-jyEm~ZHs*n7v^+M0o>bT-Fm7~4_N7l#I=gMt zeHWByAgA$?$DQUgQ}y0B)zM8<3kPTRv9xeJ!(2y z;9z9(OLtKrh8KUb?bTNFL&0O?SSu0FT&9xzbTlg(m_ECxcvI=9s7VVLgg+BM7gw$v zvO$(CTOf8sKyE51$8L~~%NF!HBJde<$|3V)$&dx&Ma_0KBc3PQJ|by4sO@R%sYyS1 zSOPwycs2q=z9M@3leD$EvA56L+U|c89;O`W6?Wgx`WaP2a^D#EgZbU4bjajB8j6qN zXdsZ|Y?};M=ItG_bK88)&Y+~Xx$^a_XXeyFcaZm924nDQ!BiK8xR zpdH>wi`){5nU!jkJcsn?9RfUQuGW$u$wbaXO~BGt=ZhI}m`kyFsnP|NmCWY83Or54 z&C|R0Yb5q+E~2bP-S$3_9-m)IHZeIxHouyKJD7<*F0q1c{e}-4Mv95B_q|G7uI$MI zcJhT+xfg>aW?Sv)lTy!!A#xZd#>tavIa@ z+eM~-DHSlh1r_9hZ!bQcb`5Z0FR&2L_8&PB9uAtRovUZ)bv!$g>(s7*3Y$y4m}`>k zn5n5jSAX5x{skL}Vf{Q~NqEQpmERb=7YEd?Hm|U6QfdS2#7QRu#|neMZ@j7l(VaGD zS`GLR?}=UB?$(O(ZfeLNw`G)M6K5EjQxk2fWe&=jUhEnEU3PduK97Mepa8j2Qcj(T z`M*oFzdPj|6~Xbyw-Z`XjJ}+HTwp?j&t7&uWKC1h zd}Hq3`}+6=axQxvM!_YyMy3NgkeI_@)klrSnqKEITKR=ZdWydc*I(Uc5td16()Jy| z!rXQyal@*K6A#DF3UkQCVYx^FO(y=)J}1~W_Zs}=+0yLK(?}!@Mq2zP$e|&#e~cRt z?v>&jLKp$&k#YBh;*gNsn`v?HNDRTGhtrH-eZ3PVEg(L}fd;;H>VeW~W!cnwlDSlv zYmTxHh|(c_+}zojPvM-XDb7IgJ|FaubNZ0$dzMD>CPvjL##5IsKsnZIRb79(3IMTh z|D=SD=@m7ZD4mD3|M1kifZ2EsPV{XCG%mtVVrc;Pzm{S5mE}(T{lo$;rJ^pEo~qmY zh6gjFW00({(1%UvB!hm|PT0`=hC^t1u?QMjB}bk3(=ZT1n-|K#D(5$bL(2cN(cqRZ z@!R47E8vK4q|`d=o60k#X3cjx7rMq;uvRl?tpL+EKr{npE%-Jf@dj+ z|0o$NmQ8s!U=Bt;Z|~FRs>zEm)mJad<24wL&R^@$_gKu6cm3bp!>*Nmh`l?~ZWjLH zN@{oRI`vlGDgtt7J%|m%`Fp-%H+r9;GeGjv{I)$YQp=s}#KkbED@qXr=1!G}L?@`* z_GC&e12^zW7}Oo5C=cfD15t11;2uUoOBK|fi>ityWl0d)xQ)-xOe%ZjvB%(3Q{LtC zP(t03`6I%BN9nt(g>SVZjPr=uo5{Wkj3{2>#Hm+$B59F90Rx7&3))|m%Jh&>prHQE zG!kb5GPJj)F^@2MYmIhsJDs?}`r6;L%k9NgxBB=t!ywZc;70lFalJNL-7one3wjsl zxH_2-N2`ZnRH{!((1?V}tIO24AEXX4G7|UK!|@i|U5@eAkH9w_@_2+}fcQsUh?u)t z9>w6bw2vq#XL`us?_tS3n1pRBLSLuHoH3NgwwQyQ?Y6sK)}5Cs8%afaSn&CwPNAYmz-=VR z6*`uh-_8@bG?FG5moqhE5}?i+{}XKP!t<1-`=r%#M1I}wM}~S#hX?=HFdfE)3SXOsL=Qd-Q{To@4<; zFrl4KQH)BqLU(_5GmlFlmMx~l-@?`l1L>NbAhB*V6zqxSD0iC?NRY}Y|5qvJ!>aSA zN!{K_6r*&rQr)Sa`tI=@3~ugPF{aOH;?lC36Q|pptK!EUG-yFBu? z2Tfv%RL4i#c3BxlG^kjqbz7Bz@Psb}uD~|A!h0oz=Y!#A@wFf`*ynl4*?Jh(0NPh~ z3mYP@(g=ud`f}5xrnf*33hA(dtp3EqL(#6F$11neDSi@PpjRSpHIcN>x2614N`?o* z*7$s20i|+|)4`A$XO4Rfl>6H;OzVSe_F?F5_vw2Q{CN!W$Nd%Je`D1G=kG0yCEDAK z80J(zT0HEz!t=g9J<;k`w=645+z+#<;QVecPzaQ_xu;3CNxK~v9@id;=`y$ zr|sB!vvwb6Lkq1IC_Zm)tmq)VBw5z`4hWq95`hKuyXB@W-Sh(SWjxCQIb))m3 z4h0&s0>1iO3H6Q5_Oo%ca==CfGy7%mW$@twKvHc6C%nc^Yc!3tHGHqgm~Tml`$`ybt&b!OE0o&w zP=A2SvNHlC9+rnqRyYc9M=5>xIe+Pp-Ye{+!#slEgB__3QorA|B?0vx z1VLfpdbf1=@@pJjpoEb{&kbC6M|-AK+1f#gLL48T!+JQvl-s>gb658JLZ<#DBv^8e%Z!fG4~UCX7uv$>fWzJ+ThBC z{80~~w)a*XxhF)fwn)+En(%I%styl^pc8>S_(|!lj9?b&Pi`{W@oUSf-1H zS$Y2S`&m=YGBO9tA|@`E7>Ynt{t#49mv^$x_?)-jS+o2qYb^|@ueYpa3})}PlaZf)xi+n> z5+k~nhm(3u&hvq@_iuM6@S>W7yZ@=SE1!+vy2J_Nm8*}ufX{59u52mG|991P9V(O2 zLS5Wa2G#3az{mW17EoP`H8By=D{>8c8S%8pb%Q=dY15L)fA*-V)lu%V$|PqG@op4;pAv72RKlDwDtu)yiD!eZ8<-lOt z>RKH_v;()sv59eA%Qnk_{8qEsk4r_`kWsvUSoz%)QC`K9XHxZHN6w@&0!< zb3h)+1ng4|ElOB$TwI}!23T6m!z`&Wk6}6Y+e31}#`Td;T~1chxf?=@m_mg{!!aS% zi&E6FXACncPcG=hvhY$%Emeo-L5R?`4MJBO zop#MTuWos919PWHFrpJ^ZF~HsmYe=zYAb@Ytw2HCGsd>67l?k>@(%eQaf9>SdjST}{j97k&MHa%Hxyl>Z z&^rdYOkNC|u`zur!L|s&By6k5w$t`=^4xXvInld)Qu;p{7+LJbcLiJiX^_Gydi=2$ zTKnxyQ1Ea>bhEcGFWJeuM^80u?FJrz%|9a$;#7}~&mLMmyKty{!-3cuH4=8{f##Io ze_pH@%4w;xg5=q_gizR<<`wPP0I?qTq!AYm5kZFsk1*VOL|!;-9wOYRwC%Jo4Tc!c zDD5@(q`^C*#>;6kTmtZ-8pt*Gg(pjUd>(GwOxglaCjFx{HWx* z#OZgsiYY~tprUIhM{WjwWfQhFk!7Bwsdsa+|1>@rmay{=XT>FuHr=|~Cl>)_fSk~F z>e`HLxH^n@X0z^g4reRl!-!ibaz?-a#rJ4FZvOj$vw}|VD9$?Vh8k4pN0H^>B5cg- z?Frt*u-tmXz%i%X&~4K}8q|k#BJ6~2y56e`iUWpT%S=p#6A5jDf8JbqNWmlclKdCy zNOwQ_ZG?om;8&FwU7(|}Su)svA(A0NMMmzQjc}kLe>Ap224^lr0*x1FRhPmqZhF7Q zU6Fa>?de>%F=rk^mkm>b!L18)F7Th&Hr`{#8;y2|)S9$>~0Nif~rFCVp6IB&&K$=6&2fFS@I150DB7O@q)% zt5QfqJ;uNOK4SWFT?XR}cd%=_px^c{MC0F!#}$0RhSspVcu3_j?z2c3&hKNNQ>|e^ zw$qc65gGJo3a@2Fc7d#bK3IPur{D{tJ?Ln@vWOQ2@!qi#uXcd0H&0q27`$zL`32;6GU|UlhWr$I z({HlP4!uh{yZ2zfMB8IQn1*g>grTY8(lyjmyK@)8)ns-2ra;(C?^6$x@3qA8<2ZUQ z?$dX;D@b%5)E9%&hDt=O(Jc7N>r>+Ln8=gsk}OSobG5MM2FF$H9K}~p!D9ivU`N>PT_+4X0;f9qF1eC{qvN3`AjF<35E5er1%!gJ1j&0*x)~r zuJ~nd?>J86;Hw1V#IodkaxYlqwZyM&Wr2L` z|KPiETMrkPV3`mMdp6!ffS>S}Z+kOga4t>t64d@~dI#N}*5a9i82!bEFMC)6BrIlO z`io~K3WdcUSujK2`#z6mU4dv-6lu#9|M)ahnv5~CZ+b?4Be>dLECCQ@V3ND;)6E!} zuR;0zw~r)!@biVPv3|VI{Z%8Ass< z=Q}H+E%E#n8^5&0darg1*BQopf1P}kI^xz5aODBce@?2aJdC!pfm>FKE*ugPrEq=9 z>oY+}>>N7sL6IUoww-Yi-@fF_)Z+ON$0OXH!y_44(kO|E5;KPQ5D$9Y2&;|n_s_cz zi5OIepI)*H+d>*IA$auen)N7W1}2b$@|w0%wAWr#ibiqHj=y0b%&-;M=*_6M?1nF1 zS!aRrGK@;@?Oy+ztK|i1;F2I5J62YdeWjEWh}uSu+P7f`S7DdXo6u>UQcDnb%T`M84Bq4GxTmH+4b8L16^dVFOrr>Yy^SZ$*FwH5+1x<+xRjjm zEXAK9zpTNap4SBcyKY79F~-EkF^j~;4p!h$0S;S2<%XN?&oVAX!t@G0I#L~>fxHF~ zIfc2abRfP{HIxNd^$v*QiH&|z+$v5j#OOmOGu9SlDG#pcGrQZ~x?mb#sq8z_2LE$# z>(PTdaT{K(_3`uRrd3`QY&)tHi3ZozJ~F{yMu2t7)++?hOloBfwWym%XleU=l-ICP zDUo+e{p3dbjZwK%J{&psh;4sXY6;&eH5b}6zWu#k>5s%nubo|!+nWsbzPc=kwXeeBLc>D6~DoT%ea`SE0|>upTWnVpA}Cc%sO}-|-ZhAO--Ymi_>y0HOnsBrBUzU9;NSs|5_9_Ls}2NZOh`V-J!bAPu6sUD}1-p+Vu_d~{xd3SRNRDOb)b zKIHFH3{$q8S7V49DgPfQjqcp=b?RcxTSA!p0P37JhgbF5Aob!U`0*UsOaIMEMQKK; zLAI%<)uVDI)udFm!Hw3aSNws}3KHMPKV9$Drnmps(6bs?LMk=5ttQeiIJbOJ~ug~lKe*gaXT`rGv z?&opN!%)mT&UxH#_v?-A_bbf3=hbo4w}_JKa`{+IxZLI9(eBE=D2)Jv$RO+C}^J$@oYJ@YiGeFe18N~fL3fBSUMNLz+Y-5gPmO~X>nSW3G|8G z3TM?H8Oih$Gs&@GFfdbC)S!*<1^rm>sukuo@At{a#az9oAqqm)bM+)W!Z*%ol9F2 zXKb!eFX;fNB!_|(u<*No*K_q{KY7he2eyCLbD3UQ&rTE&^$*pGsvNkeq;q97vdui| zeW~z8M>So7e=KH0LV4j4bdfMUoYDrYo?}z>{S80XB|jJ^m+P@vuj~ZUwOTYApIYUSfiyRB$s@i2t)^>aBYB3^(k;Smh$vtOwB;*Ke6TSYkL>jLg zK{;54gq;LZ6L=0t5OVL1I(KMSc#fymVxbyUCit>A>`44+jxq3prQevt{SAo5OU7nK zv8?Ohaf)w5D3A~C@Jeg4}(xkE;5y=BF)9|y_n1oExQoGbXb8r};@Kv`3t zfPn$^ep2nlbm=?l)#DjWatT=5ciDIG2}!O>O>VO+Y1>O|TZ8TakY^#Xc18`g-6vJ3 zXl`x#nakmXd+UsN#j8uJxR-D7_4ucYI&%%{38d^kWKMO$k$rIfnSb3a+DZlU2zsUS zJ7k<0%{~(gZf7Yh(S_Z+GZw$ZdlBbtYSVSJxgT?K%n`8VDKEP}3{Uvse@q@z%Nw)j zz#?Ra;)g%XpnXQbb>Xy@v%h+n9T@f^>N3y6EWV4B4vAPto$V_oZ0c#1TUT1$ZfWdL z4WG5gzjepGsSRBc!`Xm0!$yV*GsiADGRix&uP{ebOqYm5wCd+irS)Jo%n`dmMZ+q! z16h$v;1fo>YIKFP))3i zv)*PBI(~NEqYA=SWIsURd(Q}?h8_?0OZL~+_lnj(*T%P18JE;f+4tIf6<^7R7CG$M z>*I0(jH2>0Q;4+&x|w%S_KVVG3g)qYM&wqCw63zh4qF$GEURM}Rt6(YE6!!O$PeA~ znGl5COR5gz;A=XbQzae8aDmzFsU_F&^-B3njIVzSbRRt~{mkpngC$Kna8qp<0O)?) z{N-UO>*8PSMUk$T0(Q1HgUGHSSU=0>Postb!v4~l05QRcS!WV6BC5El_NB@-NzHz$ zG753K&Lc{~$1_U8^{4QoXLWlY0WBEde)FFx2`e~T>m2mc|KUoPZdxHM0@b}*jCeg- ztAxK@+p3}=7vPZgay#s(A$_UaGV5}{3as0OV~rQU6WIJnY}Z4Q!7r;D`PVe(=sDGm zFYT-+!zwxuLd%ESl5F=$LmJXoUqAmi`FlXiQe(YDrQTW0wnTjw?;Ucx{ zsU{hePQn)~$7dP5!#Td0g3iPa#pfgl$s#9=p}}Y9=j<;0bUe>4(qd074r?O!!!lVu zVX6G|`CoHuYUA0*OeW!l(Q{zmdfytWw^viE$YZH_;}cGjd>Z$dUqbvC3M1zPGPdNv z38WY9{8Mz%fhNq{%Q_|zE7Po^3px+7xQt(FysE($^@vY43yOOxj&+9p4&N%l6yd;J zOBc5xBNsQ*IwSQ_doP?W=<>ftDA69%{&I$xakLzxP^LO0WAZp#MIKZPaEE_PZ)d{#U${A4LnH8*IcCM zS_*^3$%e`fAF?k~CDyDdVibIiV3un9<)KS!cPO_V_H)K_emKTK;#wM-mVcCA_p=H+ zP%~|Zw~U&Q=NS)3hnrIkQ{_brJr}lH_?kx(ykz<(u`Q&zeLw4m-;dj!rt{oSN=RH2cc^DY z$_l5ge=R!Pi=27x33ztYO@#%`RfTpPpIR{}Tdug2)N+@yG&ZYNqiSYJU0;2^KGpYF zRmfEU;BY80Lm=n{|6xakW720=SB`Z$M%m4%~iiK{wZ%O7gjh?Zb$&d>mbvkkR#-;&An z^gXD2ai|-(I8=spbD)6Td9~@gdX105s_u;Y;tZk~J6d^t)UvR9Y%W)joaT0P@N0R% z1t$OC2Zx0_U-|#&a1nngEc=ETW`=3#&xH5-fO?gHSt@u#YyR7lu@`F@dU{>)PlG+l zMhBR;AivCKngHhQ!YEq{>-oh(zkcn#T{Zy6<5=fY{%&6~&E1!JKBMH7;Pc(A51%rJ zp8AeTcCgx4M?EGxmucs~RB9lfW;05&OxvzQ@U;Y4@FNe)KiT@usg& zB>-+f#j^YJy)U;XUd^m*`?`^Bi#+}0&Xcp2kFVW1t}mbPWf}eHLF@lqHUKbt|9BkL zUn$&5a0)2gy3dH*@EzXDb&?@0=5#n%Iy|;|o=s#1f8tE&Vg>Wr{C_Reg?c*4m)~7a#6Z?cC<0LMrE&rq25g zUFimQaKWV;K37;pJR&^G2Z>R{niP4S{$|W`A{TnKS!%1hKW!bDjiG#fO^sLR_9@fK zKhf_Nhxu(aB-W1oT`*H(G^}F!sPM$v%zD@KTlv@n)?a^B@bEx@sv{nn6Loqlf}+^$ zOro;Sd*es@lVf5TrjRo&eW~y#e>Nyd&7q+U7`c~qeqBJK_!gG)x<*ymi+$X|nfIg7c7rR1mG&y?cYn+9Er8K4JAT-2Uy=c!I^4yvUu;xCSs0+hxSt<#;6TF8h#c)3-q7 zL%}>hgenwZpm65Qa;6HBpUWm>jn?2nLh%uB+<+JLkWbr;00GC};HQ+KLVxN_C5F?g zlY7doQuv10GPVP!&htf%<*JZYIH$%bG%oI{h9KJVM-|msF7Bj;pqb^HolypDrojtz zZ zUqKLRuI)(G-j?q%+>OQItGVM6)bX1M8ROe(4EF-Q?MCnQ!<9m;K%V9J;rK6Z#&mXy zt(?C;cmS+N@*SIvnSbglt6ALd3T_Sb9edr=dsrTl@c+ESg3BcKYXFX?N{WtOGqgbG zV(nLX-D5>A;Yeh(gflsbw_AfhVv$t`78FM`Q)v@H7d;lJgxSH zaibksqV1lTR~12$%T|=p_KERVc_rtow=^hS_w5jjicWa>gm=*EQYhl~ws4~y8P*f^ z7atI-PBb9LURk<#}!kC$MM_HQW=wP}T6euD0mg70tDGr5suU8HEc?DrczD|s9(MOOrC z+dXzKH~f!|cS}*PP^~U}_cC!M@1Rp|L&5lM$g_v{RJz|BPEnxlyKBG|Dy)u+>llSH z1=vMVH)<<}QY3n38)Ney-fx?~U1z|358Q9s%Q|1~Fn)@)a?q{P$tkB3NDijUhWHJ9 zrb)!}_+oEvT@lMqU{3G^alY5c$CXcvHK#`Z1MwAeJ;!~aCNI<1r^A7%HeFK|2Kftc zQ0;G$Pf#>aOqBggD-|%GFcG7VhvM7DHK>HS-p8_=y{as;38h8n76~72?+LNsTdIzb zc;A-Eg8W|KKbdVFqMt3;wrniB;lEpIB>MkszpwshZ=s5BfjbS(;WTwFE+EnZ|Wqd zebIwr&Bj8|U=}}d^lHXM=LKV2DBl3>{24KrOF81$K*(?t5$JV3hL5T>Cc?PogNRx` zY#ApMfNnU@jRCqYj1#59YK^^r#K%7e4uLB!z!e;D#g1{p3+Q5C-0AWHUf_f$TIF?D z05^|(a}~>t2cutr^S&1;Z;4tGfR{%b?R>wPF7X-Tgs$SNc;I_j40_;+Q1M6@M)d-m zc*A+*#rOqN@sLOa^K_}!@DTU=d&QNvX3&2~2SP90Z*5pz$;?AF^}MNUz+VvBIfnCJ z!l3Mx%?-Vkn{`7`cQnwp^)fbuWDl>Av>CuQ8`b3UU`evQ$$HzlqUidL_bqfBF6;Wj zAW+oiG*obAv8p^x*YEd%6sXiqZP?t<2yBfo0#$2YvY=Va{4RVeb$j4QOd?cWOY@O@ zr~VxkJbP^1^s{KpmWk`R+L1iDp67xMXZWnphha&{33 zT&=XwgFZYzfI~>Rf=08;8J1)9!HTzTm>m_dR$+cvde{PMaNeeOr&}$c$)>NBQul>=*a40BVk-ap$A#v1E?JdFoOv;AD zjfF?vgBi2=Iz8r5pGt-A;Dj$F(Jh`1i8ck{6h}8^>mJ`T;@xCspv|iJu+iy)ZS1sb zu$TLyjAfads>*DeyEjGdsP7r5XRNV)4~uvz*E7Z{_$+*T+7tN<`O1A3LmTF7E_W3e-lvh!rhJL zCD=@o4}}8KML^Dopd9!8D5t-Vu4k$HTh5psX*{eHz_g@|f;QM-Z(`S6WQNd}^7Y9m z3CJTz`7Kb&lH+oQtYyezgskIu0XsS*tWKbIu)sR)8oJ1Rt%M)A`{b8lRcy^oZifVo zUpupT3oEl2OjGCIG{Mo3nd9~t0thDSQ2Ek8s2l(1$1uKqS zo;q1sb(N|`&h|OF9JH9t8kgT$7iJ4_slQV{|T<5Ov znNa;{?}0C7j>%>*!>DJ0M_<$NHRJ2Qwg@N1Bi*+NYpH7%*QaoNn1;grtlcQ}P%vL( zttybpnhUG*V`NdnVtV$P_~I>j?agFZ<>j$5jg5411nxYTY=dOwv5Oa4q`n8vu z-Ag*fy=HRdS0#rEm(q93&ihwCuYHleO}h3N%?b?PKNiW99fTLiPm?K!<`C7VF_2bX z#FNKy0FosXk|U>23lNiinZA3#;;c^ekqZa?{vMr=#5b-|_zI#hvs ze0;-tug%BP?S|yPxP$w_LcL;PnS2pleUq z2VP@{39Z7Bl)FyH=bf=kZ#VX*$3WrZ&{*b^+%@C(jug{EB(HGE`_LRcMv5`|UDCF- zdaBcv!JvY$D#Ow5BG<|LmB(H*^O7U}e+c=LZE z84(?*?IV3xc6*yX*+zFziUf<&w;~auD)%7~(|?eI-PgtLHZi6wv#Yj9*|xsiUzE3t zl45@40^tZC74B>c7{CZVA_5@=P!9dCfY~+ud&sV-H5vFaT{+{SHtHY->DGA=tb97# zjEDX!Fk>W6j{rHr!!cR8~y%PKF-h3>AZRjXo$D&7ZikUS~*=LcWQg9G3Dg{ly!yU4dnzNB7 z?FcXRp~t_15ABF4(EA;Vn`hCYGma7OMHHs?k=-|r`8mViJ*gRP=~LpSp*_^VQpdHO zUGvQ%SK+y(iC$S{qjz6Nr?Ai;t$gU6=|G^T?ca9EXww6kW=&o<{JWf47ssMkuHpBV z-1#r>r;^O(`5+JWz!q6Gd(zL?Jp#gR1Wf~0P41foAzP{3w1gw%wYqECD{3PBn{_*+ z4?*vgwh5Z8$x?`*D+-N221|uc!j{bZ6F5lkMqb|E`#v1}W9?W;BjnY}o04umJEZ;R zs`<#%5MUcJhGQx?eOlf))v4b6mlm*QD1GcBR^i`(Q@~C;)(`}>r5kK|mgI@vO+BBz zIplV4t46`?U53ih)dEPQ8$g?jl)gyW0$-u-qdjSKUTUhpCoRVm2tNOWXQtFhm=Eor zzzg&|Y0rR>Rg(i>b$UDgEv7q=$^Az>2ORz{iQRuo>JG;KQ*-|BqV)fMg@2TIf1mwl z?EgQ&oPUpIN{PS}6wJHX*TW0M;n3|;33C`6=5+Wp3^x1Xx&x6gO_mo#EFV4!&h$KKKZ5p79 zdVQ2pYACb4JPf>Zg&C(|T|(ER)H;fMXpiZ_UyajGL%Ch1t21Ye(CE#HOCnuO=q~-O zO-MCz?!3Uh4*?ZkNyf!6Yo;s@VKFGlk1Fm*y<1F2g>0PQ$V}o&v`;7-aYdY~#q@@t z&721^vtcFfKON#q9PIDGIYU_5)@j_7|hzqHe-lq~fUlU2I9_mS9XqXWFfC{b1u0Y1^sw=7;>%bs z61?)tE6Qy#W951yTmz=Y=Ke;|LN1ykRQ3W}D=&t5uhZ!wTSHHFLl3T@r>mi7s-cI` zV98s((O~Xal~Ee-X{gMq&FU@;Eul=Q(tXHpxRbhY8AZ>}BbuAy0I{`Wif{$%I26Xo zM-Y(1RBHUsw&8kxVa#I?JF)D3eHTRV<#1FDQNTCwlP6j`JffPqbL*7YLnklUMwrX_D-hF*?JRvw|E{ zK8fZYjFoh@^}45A)>&vBmi8b;5I`I`st6$3(@{l$IGe_M;Ci?hTCWav*;L3F-uoc| z(@>C5zaLQ4|75m7jgZZqHCI%cW38h7^0k_*5^H%NDy|pfhe9^ zoXaZBP9_L@-as_YEh=Z1QZWQ!*bT(+L@el_{A{93<-$_7ULd?-PR*zO0z^6qx*91S ze>xuxM?+~k*2kuxj2gJF<2HVRoi0@r3@LKoAx<#0)sRJkYM)8+g;exgbW0)%C|{Gm zQ~AD7Z*5J@%H=1b&2mH^vD*#Dn*tr;kvc=t;u;vY3v|Z!5v8z8D`iF(4})Nsri2!OmwV(->T7aroy?L@({Z$((F^ zSUg+~DW2l@k#vujgS_q*LH-${RHF>jtDWog8Av9DPcZu!Lax36{u)MQ@*DeChm7g^ z3L$iTtnLm!In8?0|LWfBM#%y0cKDa(g2AWF1&S13IDQrx(Lq>yrUQxA`&`O)r zHxqU<#tpw%}b z#tc+#Enajb1z^XoRu`3E6BuNHow=Y}bljH>2!F($?Gz~E0%W~u(S;c``ug?C=#=eI z(pR`VtthOHIT^glmBrzF(Z=O6Z*DEPcQg3(9 zW1e)9`Lf?@sg@*LEhDl2X9$vq!{GqPCDE=*4^h9UHO>ueHW#&i@B&+H?fZ0%#%g7= zTHLY#qIL*($<&`QhWgt$F=-8swT9?dmLF20aBZ%x<1C9xENP2N#+BOJT*j4qvr$gi z6o7;72H}5+e!UmIcLKO+UoCJ}SNiJYF%GyzSwhr=Z#riCk_2@R4N3SbIErs=x35^U zK+UAX*9{uWlc9gfcBCI_USpYAC*bcPHKpF8S%pr{jo&QDQ<>V1D*j`2(hln`%<7fK z#KkD%_lR%KllEy?Bza$ZTof8G^`f$CFT#UOa|d)@%;LafoUGIxpfbC*4tde3kIy_N z-{Xw)+6+?J7n%OJ8Ae27YC7iG7Vq_z^!yn^zcW8((d$;}yZS_4jI0+rGkh~uv}SC`vxAycxO*OY#7hH;0dQYeW@F~*%C@7<=SlF){iAMZ=J*V^~ELUy(8C-hAP0nqF-FW}t%gnlvo)mzwd{_?Dt3F&gT7m_%O$X#Jt_z#7S_o6S zA@z^tJRQ;v-gpY^-Grsvhp8oL(+l*eIy5OXjyHx5wqYOcTEX}^F_lxjZa8RU%QrXC z7{`}PJ@xP7?P|mcowLQ6FWyhsa8J$A)s;}&3C&V#(&A_VDbsB!_N}i|$5$J8m+!!~ ztkbw{c;Y7;62MC8$Pw4|P}v*PrH#$WctnLjALYW1Zh#5bOi^U0O-`@fsR8D`+pRC!&A4 z?NVVm6F-2H)q4XKyd?E_F+La6##S^s93^ILAnb?DK_quB%vmX!tef{LziFPu zmlh_Q!Q=^|Ul%8DwDP6K+$COj0m)lf+`|5ozBB?&>kJ)~=xGD8>M!m#ksU$}r)0$- z{cZbtr+sCY9`2Gx8fXzmG23Yh9sse?n+w!%B*0N^`}i?jb$gZ|)y%nCKbG?Rki+Pj5$Jnp&NpaWe)<0n4t~rTn>#+kXa^Z=SY_On3W^mX~VKQf|O(bu0 zb{Y$~U;nN|>}OrM+4nVuullMp$2Q#WCf@E{guBqIYK1rUwAg%b>dXA4*O@vZ`76?C zkrm{HMr!`3+VD+gZkpP?*&4olpF89nOHZL`#eNIDN|zN>L~MgO`KmS*;7?~&oE*>= zvr)iX7AF{M>1AO&cMxZW^2Z7WdT%YfEYxEjC9-w`D$yF{oQ@v6PCyh1W36JQpGrJVA&`RLdv7B@Y&(6#2=rMZ>hQf(rROGGY~NuG*XVgx1kmf z9+2s%sP~omQl;u>1X9JGkyd3hR!+^EN2q3(fIl#gYpHpcKx*@aeqa;A%eYSQ9Gy~B zPZn$X?)u_B?bUMV(|5HS=j&~`PqHrD_@P&C7WPf1QD9v0CfUZ~IE@V0_*|S!%S|>P znoyTD1b_ZdmL_nLocUqq@G{!n4nQ}(85;9*>v2z(*(^xdlTMi1GccA}+mWxuI(W_a zutFPc@-v8yKJxg#O0BNF)*?s+oL%yaHw-ROg%InZMG&(@24DsQB!CEZqh_2Si_Is# zPJ?_*gW^KquPSeskTKe<5})%)CK?(klk@ME!>@8n&Wbm;6lUtUR7e;Fr)%_J8)+@DM{s&=wx1#?&LdrV@&hI5ep3ZyHy3u{yV-2 z?zU7#iEbOfK3ja_S--mdtTXomAh{s{mGKDydSnoP z7s0C4L`N#W3roDOTx+axWj@atQg3mdqJ3G`21*DC_&|F(56uzScX&Gh7@L~M(?S;= zi$%Om4c3ls)Me5av$5w{$fC@ntFDD~Aq|f|YQKMl=u163#!>=?=jGYUwQhI%Fk)of zL5M%^Bqz;JT3t*MS*%{!=vSjVtGXKfHiEqG?lp@~Q4|(F_sgx)OXf^>nwi9=>azf; z2#2@rsXus6Bi`F1X4UL2=}<9sZA$`}@j`)&>hij_2oPqxqHd;{v+ut*RB@jY_&~RP zPQ|kC!Z&OT$aKS1Y*c}A%yB+tusNuWFTyLqafN#|ZZ$E14$cU3@TDUDdVl^kn>k;b z!AoS3=vNL+{Lsk?krzI1!;E~GAC+Ibu50=L!c`7}Ba8!_vBBA1B9v9!jKA#L;UKM3 zrma~>wD$WI=)(`HOsrBEQJlG2b{jcX!%bp4r|1`@79CJsboX^h4eLSuM%2wUUUFfy z{A0c-hlVQEnX@FXiq*r_rmN6}RE4XtZP%inxgPmowHD!G*$)yWaO05owxx$=4{Xsm zC(l+Ndz$8?~1d zTg|mrUa<#RohykBpHf%<20CpPbztlH0={Xx#_$i=trA97C-0*sgnlDTCj!bS#9`)kA|6;aez7O ztc_W7biftfcU@N;JydDq^{PED?KC{N{3*R6t4;2Z>KlleExVyep%rr$6QV`xHQP1s zYUj7ZO%+*Imi&Zc(CbuUh4#|k7!r@A$f}c>&8m3hO1s+LP2i~=*)!bX*q;sDX$k=1 zOn@_z^`zZ6oOwK5jRH;eQm0(0NzNK0hW_b}o16aDv)4*RT_Z*b-sKgwF(GcPUJQO@ zqfXvaURI_Kro!MZcMzk*mAf0RaMz^KF&a@{=k?z8gXdmms)s+tVc^>8EqbyHalOec z^Dksb4Jzp>_Ke~)x3fNO`U_X_hwjJ^va{GE*o1jZ`=16@WJGk`YqxU;i5tT^<9TcggegcOg^f*it=?L&h~Cve-pa9vXmy9qVJ6F zR^ALsS)*mUC5MQoR;EY+sWVmOw*_M+xmMC6qtIxZ~eS1AZnQZa0%d2ImawNY~}J z*^?{8Oy3)pY2H}5dO0~{^ZKKar82_DC{M>PyN49zT0Vx^1&FxZ6g%=6Vc<{5M+^9)#d{z;U@pl_TZVJf;vXB(R)nC#B{_kP{B?;$7rt z#d?;sq7)qY8k8IO2>i_+1i28e5P6J3_yop|gUSIJR^WJ0I!Shg#KLRtt0BKN31w`K z_zVs4GE1%9(s;H*J;;54xgknlm74clV{N;2S(>Uzd4Wec_^GZ-hsCWMN18=452=sd zcq4m!YC|a~3MT$sz54QNdHq@xqv@Q<-FdEMg}We@y_AjdAS*M;Z&u&PK`Ms5v=>Yn z-XH{!N*hnBbd7zsb!Ay9a64OmvNU(>!knQ?#>L#QgU?qz@M3aVpz1TKl=j+ud~!U` zv>GNH>-@W-qcinxQ^_LwI7g9pS5dQCJRGRj$GoW4 zTM9cp9|F8M8ful7%m_}+(5387Gg@g=LOkDl{ti@sNEwDnWuD@)MasP5Yx(o3piN{t zz=Ke3Hi(dIflhAe?i!c4ekm1Fo-*_g>N*!k`dMMx4?5+Zwa(g7ak-|>@$`vOJaP|-{ z&H2g7u(Cj^f+<-)W9VwL*P(@6KOie$g`HMCK2-3%gxw>uZ*rFaa|3Own8rZMQR-JN z!D+>6j!^j;^beHquO<Bv6dm|kNR6%rpW)mb3khb<(OL~-2l z^_p7M9hv%J=zxXCh~AX@u~PEGtUcv~N6inhY@)j3FB*Me-=6jgwZ1+xJ)E_g?x$GB zJ&XVR4K+*1uwcw_9*-DN*(({r{mKJ-W$)OJ7AnBY+(DxcKUa;WenzSaoc3#0ln}YO zvpES;@!WA5#XE7dgVp;O%R;LriRz8HjGArY(X&F)V{qQ9)-G1~yUOh~1zWw6eJ@K) zI#+Yy9epHedV-ANf0Q@c-^#+>oJ`E*w}oZ6jX)#Qh>FBd%E?G>o60v{thDU_=nkd2 z0uo!R>dHU>7SH;j`HvE_ArSY}$P_~vU_wsVow;P8T25YQ=oR;g#%GGQkC9dI-DFb1 z{lcoHxHiqrL!>(-Pp@rzxKsB)spIQ7BDectLM0O)c zYHOsyS0MBMuK$jCjG}>9FweLi2@0Sh5ck}aCafRJjq5>)uYisy(1H4Y(zwvOryb!b zBa#oALuWh}eSiP5#SyK4T$Rsl8@w~c0`F8Uk{9lI_>qQ^*sAL@y{zpa-S0y)FRGyQ z8hTG<1Ekc>3ZFW0X;-Nn#j?eq+lFq#_zAG46EFRYb^gdolge9cggxabUG=S%Q#gId zp7<9$IVRfkV8!Qv1$qzE%985-)^v`vQNG6MC%Y!ta`3*+34_RZ2{>rYrCTZ?omCga zNGf?gwYm?5ihE8k-HVOb@7W#MHJ*G|H)G?9WL%{)>Jg@rkHZs4xcr)B1VeI_S?eFw z0C`23|A=U*a2!44_)8U$r7}~@mM7>Oj3{0pzfdEZ=o9yD_pldD z#e$x?W?vi%Uc6R9U=P9_e@q}54}-i`gOKW8&HX@?Qy%T42WTE&C#>~WjeO5tieC1U8^NVdjc8;;2ab@hO%J^K?aUJJJbxgnQjp4klhK@u6k zDM}&RgGU3}n!f9o(*H>G9kZQsg)IJ@0>H3)ruQHN`3j@h+f`uZ$Gcc(o3nG9Y+;Iu zAG|-g1)h?Hl$Pg-h&QG{ZgIzTl8@Z?Mo1|G<2$yY{?u zM!hd*=OFr#Yip8V!QQ85@gPbf61Bf@F3Y$dta`S6kob> zBP?H)DgekOoUJ$r(=gjb_(R6*?L7DZ|MWmfBuVK1Y$o*iwSk|QB33H$#_-x4&cv)H zZ=QB%GW;Yaj=b`sbQLIqW6n5L4>usLuhsfY{IHP=KR@iR1P0V*jVQbDh5~kZF5aN6 z1U2)SCYfLLmbAZ~qdQhG>0Y-B;Gx8TS+9FJ&J2+qOpH&-4Q>Z;zI<;$1I^h7ln-1T zdY+V7NF171cs$qyoZR5gL3aHeY+*KeU3c%0$4~|8j^{Hikscd>eMiJo#fFEYYFHa}qKZ}`rld`Eo9&8&Q@`+yk=a0P#zO>A5TxL^Dk!7{Y7B>1H)*LSEb1kxf;dr#ly`JvFm9B|1 zs048}l%*NM?*#UQM)li6lUyINnQkbwZ*3=I7qDI0-S_`(yOg;*%dPEsJXa);wvoFp zJc8OfB|$p8oghX%|A%_^y^_Z3!cOtak;%5hQDK1`Z486KFGL+NPcF1iEox){w27ay zaQv}1pjY~w_t`@YVeVRY5BJS^!5d>-?F{1|#Bo6h4PH`b4J4BCe&m-m$C&Z3sA(%p zu-_`e41 zoqt+u;X@IxUsd-qgF#_ilqVhAm^%tQ{Ol|J1^l$Ui_fQQAIZJd&!1Q4T6&OIr87`L zl-% zB%2l*D*Ji`*_$=ibBVqli(?#{ zgwv-GuVM@r>soE{7g7^(*%6umtQ*kaR2I&I%H_YO ziI#D+c3uAahb=*6RrV=P)_n2`#T2XH^Yz-X%{J-@Tx3YiBlYB`shHq!@V3f6i?Pgg z%Hj6WjXpDT_Q?FBI)g72OoM=yk~ic?0}LiMHIgg+Q5%uJ@GARE+7=x*RZIWfDcoZ` zm4d7KBby&j)-$&TMc=T~FUwq6t?KUC%<{2&NjrnM@+GnTJ1nM#{(g~|8SN6j)2bK` zh9DEfM}~a|LdH37SsY>CER3E9Vbgs-Zo!=hA&de`5|DUCTaXyGe&iquDk`4w(k`H~ zaFQLH?x!J5|L`=zr-KO?V_KG0^WJaME3Kv~mhEx^ETvU6M#<|cy=7$RdCIWXul4DU zK6hf3Gt@wSY^7AGx4_b7>=WDShoF=SM#7Z6DSVZ`!x2u?8X2OE?=Nnli&6#4cMy8b z9eOq%E@`$ybMELf7=_H*U3S<5<+h;IYc~ni9-I|`6K!wI)A4T&i$YjS)AA1L^X{m; zv~&>=qGf6DDBg-=tGeqP*>j9-m=4&}%DM3dsexm08^zgUju#xIgHVhDb|x*XPJLg6 z(NJ1q7XHh2uADANjihf89Mx?;ujsUXVA)Y>>GHArU7TSexPO4+@`6$Q`+#?>#1tds(EV6jYr>A(+H|* zuvEJEM!jeNbFN}}GYIKcB_eI1)}J&0^5(v~5K*2As(}rmxA97ooY+IWmavbYId~p0=d&dyLenVz*&ec+#DnRR9dsg zmXp5ur%C9xHTyZ-xZ6?0gW0@Ugc^M~*kqYD(FUoJ`)Qns`ugX#p0fLv0iQ{!aj z#oE2Q(>Rm8yW#=N2HsH-C;U5o;}t*gHv!w#DMgOxtKCaw_>-Fi(SsZm7x2L?X)1BB zuJP``A?;Gi>%`a$)tp=_75dEuXw9jj$2!Ry!#=OTpv0N_mEbT=B#H235gpYm?F}(h zS{8D1iP8Zx9kxg#W2eQ)3oXA)b##({O+)`$9PMw3{8G~ZmaxzQQj5_6Uln~jlpm>E z)ITY36;IVfxu+@>ZZKvlPiN1LZQIOi0p#EPCHGN&m(=~jxXtMi&HYSoQmetPo^s;K zT@~mme^hYXX1M!%zavw)` zg3W?Fp^XYKKc8KY!%v|m-$Bj#LgCys>7i4$L!0Vru5GMa(a$<1S-gsIlxKyxrO;eU z(HUFu;=W<4zxpQ2lWrj+`9t&+rtl_REq+777;=?opMU|P)KS?#bQKk`=Eykv9+ zkKtg1k+D4Jo8A0et4XMntyEi^j^#kj>az}?`OwQll07f|t1ntOKZ**=pF{j?nJLrk&7(=);qngjb%99_lXp~4+Cvo#R@ z&^S(jD$-0*Yqj_cSij^i{dFnS^c_pM)A_|-_-fkau?t)R+-1@iifXU(9v(fJ5U^LS z*_fT%@uy;sJE&7IJZLaAM4qCMR4(3Lb<|n^XXRUG{hMQt(xQ2&;bqsMHbRv}k>jR1 zv^-J9Ks0l{73DLHzX7!otdxx$=hdNwi87j^nV%^57Pwl}w1)9QWw`A8N{3_jRK24W z?*-yfgN4Jj6X}B=t}$0}z|@J;Dzfw(_3;PI(RVd#l^8#y7$(T?Cqd8=$?$AAHN zP&4i!@Spb3hGS^1we05&A?k`y?w+^DX5WQug4LJ5+cSdI|Ji3#x5F2JuG-iII)Q=8gMVd zl|8QJ3vkzoucjPtg6BdhjnjEvW@s;~lm@iC?g^H%%}W#!6c?^|z4=Tg%91XEiY%Q| zakS=R_&`ACX_9H!LmS&BDc*`es%khT8(s1t>nFO4)X$sw#iU_w0Pp=2;xom>( zRX&}%GgiFrlU+-kD*{$bfz!b5vsKypqsTAW#3U)yf$-p8yL*);94M{Hq;#Su=|jLM z1-X+;e7G9A#P#*GF;0}hz<7zIR8wGEbG$03j-IVs81G0y!$P^pOQFMag32<2_Sw9H zq~W&Z8`;Eb+8eG6kj<>l+lF<~ z;O*w(Mfrg3uSGt5BjDqst+b|7u^kj(M&SjmnDcIKNW8USBKbd%&F0_f_}WEG4Qh;h zM5@~9>wlL}&xili)UCz`Mtn zBHZZ1_+%+Ba6rz8BnyUj7~ilo8s=`_z!DL%hn6_~*$hTx<92u3(K#tD0%f7P51WNA zQ-xMr+>$EslvTlyfH=bAv%lt_O~nO09tEkS9Pi>T);GLhS#*PXYe1Pdmr!ZoLkM0s zPbTWoylPkVeF?NhVa1E4s3ZIDua!p@8t$jRQP0p5 z*@~Y=Oyjfz3`akN{PNqiJB@n6K>SRLr3bI?C?>Q&oDL0QzK_|uHB4DsDaeD?#gFah zVKIy6f%+kfT~g+7G>#VsV@@~~di?qtz7HtMSGRdukDAUt)GFlf5F*LGVF~wk3}M{m zg?WPuPp}w`MuT}filgB2Zyh~Kj_g<6@@&X6V_DoJtltv>FmbRu}v!a4`M zOWg57)&=+2nWGuvz;vCm+r*?<2X4dGW$a9qgz)+0-1f(wZv%54gRRexx|!M}i2uu% zX+lspl=O(d^9?#b@A~Q&|t{_qlg<-DwCpc&^X__Wx0;587nq=E(t1YpTOk z?1ZJ~>g23nJiEsS?<|vIUfQnyHF~}5_Ui-@Z}Gn-P#Db>j*iduyFB7EDROFVo_{Ie zFSn@oeS%&>?0WevPnCoh%bp(bEf&@K{|I{zu%?=JZS++XRGNYsI!IM1p(9;EKm|la z1nDG5krEA3LlNoHL3$HKQ0X;zcJ@o|(y7 zxmJ>yCr`QWD{fo2({o5aPWYFr51kJDISngx-=jRALdMC);-K3P@Nd;mj@C)s^$!^;qBeY_f;OOMg3$m zl|9Xdeh*`rD0;;FWAj*({WQ?I+ZY!NCC1#$s&u$XN>5lJ=2{v)wzO~17TR+AA@^GU z10*XMS_L%3S6SCS*0nG%xCN}KF=Cma*JFbucbpbUs%;y)E6U%kZnE$GCn8ZkyehEf zWB&*F=zl>+L>?i>kDNmVJ=j)Rssu_JLMipZeQVjqr_PXl%!Qn2e=0ZwbHV!Iaol>V z1oOvRfH#nhZiVh8@$H_7h=;x2Q0VdtkKV*ex9rTU?Zx#>5qq49qB5>?LeZf2&uDLA zB6TQpdvP&SM5Gw($aI#}+V{S`kuAnsP`!?0TNxl}?sU!Cmj_s{fu{6h?QvH3N(|6TL$kLqXAB|y7E3LosC-xnz zGVG$KB1$7?Fh)XDLIBZ?UV}R|=WQy&__DYQ8+3KYv*^oJ2}GHLqbelnE-y@cf!jri zBpiiy--=%O6XEuZJ>UETy!>2b99+Z30I{*;KAI{4PxL`8U4V5(o9ZFX;Lqj&zeAO! z@Mf-rhZT+~J3m}gd=Wo+>phtG)l^xq7m=64pOlJjD0nCpUvlp?)vthSMZ`J8yYn zs{fK{L3!{Vpox!esCeoZu*)Tw7G)fRy^yMqMxxvl8{~}o>6*8#Frppx9Po!fBe`x| z!BqgnLzn+*z?I52PX##+jHm8K1a7oZL4C#Bee-KMI8moS;+LB*r(zqpP}a`uGb8-# z$;z-!?iKQc&^r&k)N#e#X`8PU{cl|RA|n|EKeAP8+HQ^+eNQFT4P^ePg?}**KFCV< zKl&AES2lM)R5Cwv$8qI6<&3QT0T-<%w(wu@0+OjZ8fb=OJGlUwXgW|5sOb~en-X;) zx(LvPPh8KtkUtkc_ip!oPYAmIR^Sm63;xC@8lN#^^gZ-9)um*1o@PT=8(ikCPqa8y z!uW$=3k2_+i?NM?qEH|8lNvs{yWYEPJNmKuylClTy&`bXWRP4oP7;;oei6m_Nz=Do zVesXCP`T@Gse*<`o^8Q{zbMf&UAMrGh^*12>AZS5={nQQa@g;UK9($2J4fPqIU_1M z4V&HK1}R={{iVuWsNIsdCtKYzv7?;9t?yxmgNYmhs_dJDr=y920j378 z_ra<^7W)Pie`G1kJtCU*Y7;$KLc;>6JXfjb7O`uzMXCx+d=*DFT<=#vzgGOEx4dmc zLhn{jX*`4=GYxcCZ}bKg?)Iy=aqRY^ex9!8cd#v)^kYS<8?a7t| znY6+aD42ucR`Z$=XwmB^Xwh2Ty@Pzvm*#IvO&p7DNp-V^wJz3~$^9SRn*NhNvrS!M z>Yr8dozA1xg^>H)=obrAh@X7052dh>aWe5cbiXL5j;o>ZbJsVMWwV%to~wRXFB8mH z2EzL|xdjj%3OCUHeVHfh? zgl0#kNIvF7GhnC}o^~=o4dz)z{kRRMF~vX;30S%#^C=yx(*ggI=mvk8h-jV0w8gzv zlW=bAFi;pPYVSLAgkgQC{A3RFtc1rjIpzRVAkYp8CiMihkcPjL%4bSY@X;sR4Oc;a zjVWjMmBHr}Ki8`LCQ^FUEL+0`slRP0{>Wd30MO&>enKZ-!H>y`6M$0wrJMfGTFV4| z3TVOEgG?V$snnqUDZM18b$BZ@%lkdSuFJb{vL{dXxw_At&ETKB;yKd}w_msb%}-Uz zUn@T2IUDXbwV6fW*#)=J_a?~54zOF1|z7vgYmR@3bE9C&*^sTS@q(^xZzpUXoW`w=eS`XG+ zGo@ni3AN=(L~WJ*I_{56CLNhO{K#EQN&a?bP#1k5)}MJBhkaj%i=KXBLrnQ*+)H_; zQS=1yyxg46`K-35_|RXd`zSNhP)CKn`C%8{(%Qz$IHZ>xs{Yz<(FBY7!@7M9?}sR4 zRYuw$0$r0$~aJrw<>ky_gBlxQ!iLAaA|G3zvv7A|jjwmYr$Co_~s`b2YfIW6LO6N_R zz@3FFnVT1Sz0TRIe30R3`gixl=E_ygjZgUGfX=N_Ms(wHhnw3XLUC)F%iA?ZML{P! zL!hrG9`~Q!Gh3zZeRXIDMmkCO*FHfhuWqSs9g7}}dkpXFzTUa#_>PyZ-9_AdDJf{OaDZ;7 zw|*HrSvZyw5V93EcaWjjc)p~O9u1*dmkj*fxW1`83~M?NrDVT3o?)8;&O*N2>F2l| zrSnDp?6lM^S=4#VO$)Xenslp@naC#C057eYHdTShx9C2+u~U4k;eYs)17)9R5HmU0 zKlZGn#^vF@Uq^3Dm;F^Sk0Vaz(Xf3?Iz#@9b`AVXsUef_2y>nN_d{LEV_7SurQByn ztj_$S|^ zW_Py-j**EraIA;U`!gg}&bD-&Ov=3`}wL^-3c!?p%CP(Vk>b#J zZoS~zhC!mBn*rVv6kJzpEf=nUh#m|janC$vOA(#Rq}$ocx`>m#h1EP-kM7?80Xx`| zCvH#rNZrzrI`L{(#XTU^-DAo(B95O;4RRb~1SCSM`V0|l6@HvfHv2tS%0gH6zDer* z@=wlyCcVe>93|5)kK8;exxIY+T_yl=_dX=}2*sVSpWWCc@JzbVX}^^Qn3dS*X}SbE zin)l|G`&=RcpF>TUK$4Zxh^8M(7Fg)+PI31>kNTDpXHP`Yhf1O2-UMR%Y93YIGA{| z7pf=mPB;wGA*Qbbv1{g(_9p1#sjpdBH{4)MGw&>T59wG3r|6@*vHNDO+j|#9_IBI~ z6zb25g+= zkut7vFLWpUx{kse=ODUX$%hep*V28p=dBlwcQh#`+8A=Xv^pO1DQvpisfUx`{Z(;j zBG~7vcPG{h>uU*ZJpQ%TgA<|%s6!qAy|a(KHGS~877C#T2FqTH@1-WDa>lc3V_oi* z61KhC7GWYhf^9pin?{~^6RK34RkuHdC)RCKxnH4}cFUUGf_7Ylx4qbMzKPX28CHNtNRr50X{gLKo zrh$y`QrDgFBO+%}-FvN&k-vPR@h@uCYp2E`K12KM#~4dP{_F^`^ut?pkkyhpos!%2 z%*e9l##a&^D$?EB=o$fNQ`ac|9y41PY;jP7nK95lle2(n zl=3)4;vmi!ciPtO)s80}dX&-nWI}_bg`wAKBrM1OdZ|o$LBL(I@qeQ}OE}XsT4#l+ zQ}y@1<@mMW%rT#7a!t@5jiqS6%A{lEeJ!MHI|0FoMVI=Iu7 z%k@A}l+Mvq@xf46lj&L%*SZrm*PI&e&gcG=DUXp$H}`zIxx;A1T*tjP%TNDL*;tO3 zNp50C&vt0Pu@$&eah;3mZu=XoNCxnMTE3Qk7%_H=(nH8Twq&tz%}dYmpt!9;kY@52 ze=%|locAzlf7rzuT(iJwvp%_{Sby9RgX#HG>TPu_D+GWO@hR&ay3ifh|JSl?=0PpC z#RErADn@(NUW3b+@05E-s&!nMWSIb7LJMH(JWroqVH8equ=i~FdIRi zkTu(YH3wHQb+?{j%NRc<*-}$e$oX)IdS%b4_ivF^QRWQ)W{h#x^!fwtq-t`pteq(9 zdcHlSoB>v6=6YQw*?n9JGSa1;G0_qC`*HV>Ar*++ck)hoBfX(NN1HVf_$)m6tUHye zZT{BcLzloc4Pt~IWs=9apCiQG8&W#?J!_3${KGx9k7j^*ZU|?b;rw92&wtqs|2U;h z`7wZD&8Q_u?^qAkRtFT7jA8g*SiB{^HpRJ~_Ot(w#I-LxAU(Y3X!)bkTw=WmSE+a$ zw;7*ujg}41XP2ie#b;QTH9Flb^}5Q5!G}+k)%m6r!;QX*oY$3v=SeKmG`M_bkP>&Y zTu!lz*5c4LN@;&keeZBl2si+e)E1HymrV9%8l;n4_I@&R&>FNj{nC?vH2k^|Jih+B z{B1nwvlbN&>rXDsiWTcW$uObrA#~%~7h4W@mgE{zIoy^T5*T>|gfwpkcy_0$#my+k z-t{o!gK-hopE+jTQ$FnC9VbNls&u(};uI%@xS{sqMywsnkncI%7W_UJ#=g2SZ5HX6 zyY60@(xzC^CKny`~ zQ^}AqltRoSiseTKB8X|%lW}RKV~-U*@pG}2(T-l{lGDy2)9xw< z9ImI3j$CYnP*{8f{x?Ml%@O5&1xpjPpKjU>+px!O{uSWS7r!pa%GzTx%;sCV=w_LV zGQKn!K;fF2445cCtpK0CYCl289H(#}0+q>b9_zUE@xF=joJg=bpxs|0=GdI;5OIg> z_IBNVAnVSuG|!#o4}lDCqo~P?vDf1|%>cH~B>Row5-WuvS(QvX_h#y9+pjR}xZZN{ zrFu3+#55HLjX(C`PJT{8#G}RpBIT|b&)SHc6<=7^PHUo5rG>FSsG8?TMg zmj?=7g&*Wnk3YD)TOF78Kb$-YJz;>g-Sm`MmYPKHYWO?X`T^FqbNp4r$4-#APHT~_ z0~iK1f}Of(jUly4TON$6p-?-H0lf>NPhbzr1+0&YWg78Izisuk%|0zcKJ(rxi_RnG zJ_oog3Cllw&vs>WV(4H@R{Ny-l>+wouSE3`}2jV8OQj~ z)YKu{5n2-CRdIk5H3#+yijG4e+Py+#fbwLj{9;PY{V12G<73kKZQ=Nz<3M`vSVVRzJsb9=R63ky8|LqJjqVu^dT$b|)BOza<_#Bcgn zW2Ad}Va{=VTMEHKoK80222b9oG*EcyvC6?3aPQ!?5F(6nW0Z2X=U#Y7tx1qaU&Ao= zSAE@wd%i{e2_L^H+SH5hx&aW?H#%;4~s+`=l&y!?oSiGpNex5LS+7 z_c*)l`-~hAugi<-6FfFCEJGdpwIwWTyiZ*)(77MhcjnbitMvt$Rnc(865G-%9`5%e z@~1nwzoM(3I9mQz9ADF>hJhIxF-bvGToI`~Y*{e*zP)EE3CTh4oCD+EHbf=j&yoc8 zFI|dx#W!O)0KbnfZKGZFC^GZmgm8Yd|Jr;`GpBU86+WED*a7x(3{(lFE-X)}#%&S2 zw*X<_%9R~-Scoys+>d!_3sF$ARMo%#Ghs+W3i{}=r*w?*V@lJWXh4cFUjSNGx72)z zwXbyPHM?OBrnbD=*6gn9=i|jQvEFj2g9LNHR{pg78w-m>{BWzBH(fG^SmNX7?lQ&E zKN%5!rKx71?%OvV-OAs! zke?D%8%5v|)xGOFLMj;$S@@b-?o89C=&8ou=BnC^xsZ zJd^W{H;#?~x=gysHf>ak6}=1u66`kY>HXN->lqUYPh+bg`jyT`NrVKFj-kh?GL-uR zhl8!rs1n6^8DJQ8DLg#9!zu#p;? z({#og<*_Uk3l4SdO`DI@&g-V+AFAYGe=}sca|JY;%tW678e7HT3j1zyIyrx9l>Po$ z8BlyXoAai=D3u9^AeybXa)+(04ZU}0<dvFn6H4%-)mhp%BH=y7C5>`={jdeMQDOjLDG!Yd=eWRY_eRm;lrYj7E}~ zm%Rb%)vf77b?Xwcgv+mtL>fcxQ1@$vv#}=bW~G)vYg ziM#biQFOPw!BfkC#z%B8{qo00YFT@JN}Gr8<|(T!Brv`g)<6@K`8}b))7lHJ)qCHE zVP)arAQ2&2Ddh!tmHI)trV&&`{QV{1;OxGxM~=+26Fn%FIawoTdziotU1xU2;MuNo zSUYCVxT|=cu)NV@Sl;2FYaaJf?LOXBjeLmYv31$)18}w1o5|TOY&N^kH{)Bv#=@CP zukcz5sMTxxdPVPTaBR-WvEZgsnX7VOFFTR`k^wgM#p5Q*PF{@LIcj5bcH}}(EArT;=9YE-$v_z!PBd9Wu7DjE6MUlXLNit`=2NeE(%WZ+b3vt-rkS2ps zU9wZ#MrL*`B1rK09OVcCQLqM?I8J;FLjL~>Q{%3mv26*H4BwfnxUv96c*$?5zkxIBo7sU+bm=bEnMm5tB!+==swLw1RFMdWgg^v z^MlcJiqO&&R`P|X%}U<@N|r)Ku%E_774N3da#QLa6~@3o-yGW;+#U_RxQE^S`xAc4 zTZXcinq9I0Ed3=ls=cQ(d3r_$9O=dzVAH8yl}`F$CCezS&Oi{d#B6n->mXjMS|S|T zef4E2&SDJhxvBAn$Jz1rE@K@H#i+wS7Q5pWdEC6!GF#%GO)6#T z9@qSVHAy2~q_YP(HRQ0BRJZC{ETkAS5W$QHNFZ-YOb`*y@gq2v9ugl$+_5@A+yZKmTg4)!^ta;TsikG^UTX^G<#eU z@$X~WkQ`|y-O;W>LfsA>ZPByb2KAfg2S5gA@pS`N{r#qc?CXoS-CvR*OV7H)8?A3 zsduu~__-I8x;Yf?F9kE%?M(HnIIz96*?Dz7QOez&7eb!DcmOIh(3w8mn~h?&uGxI$ zwP9@aA+k>m1Co|EGj_0^x@GW2Ah&uiPk` zJ{ycjm2+XuFE`d(XS}#wP?jHc!oA*MibO{<`uKKv&$tO^;wk_i?-qv4DR%zE)AusZ zn58M3)WM}atKUIFOa>dSjrP>px64;d5=@MxhU|;!A%pAk{c0wD_mn}q6V^)dhJaO1 zhmjK1mUg%g;RfyXeC%0@U~ag7n`&pO37B z9=+R=f{y@>v7Y9LoTwWd1!V7?s%)Nm&!29$oC3m6ftOFM_)Z${`p(VmUgS|1KFCRI zDf`TPb%X%pBgYO%)Ehpj-{7SN5{IACI?C!gO{c-aLrmITXx_O50iigqTY-xY zCJ=ekGIaXW0ep(j&LRNZ4=^A9886Fx{Gd<^AX1+HpfPZUvNta&VqfH_N-FSG3>Hit zUlvSv=UjpDW_HkyTCgqG#Jkyt%5{$wxGRQwx8(sDiCsl%3OVI{mLQNMCAI%^$VYGV z@^RbszPhXeyXX)}I1>_Y@{~G4`keT+w(U}L8(l0B|jMZJ?$Ot0| ztu*k5>npM?hXX~)D?qlwLX$QMOBL{PbH$zbVPoNAH?o%f_?vIzM2 zEcaGmr|Fr4SJoUdwC`Lw!Wc+75C$x}#loIw+nU6BCU70~YX&i6@AcI?mJzdNDZ3H} zu^sr?JcW(S=O(I1On$|JqJwPS)kig+M!YDph|i^G&536Z>&WAVeA>RM3CN-k^}h#t z%#gJ!5jz()$rlQtmmv*Zw6lHCXm6`OB`5vkSf)aBp-ei)ZDX0P*Q%uiT1KiFH)0}h zUI*7R1bjv}cG03l!>K(-*RLa&E@9BpzD-DK6=VrOdV$cP%@`>@AsW zzvHd}R;?Hu%F1Y^^RQ0hHddK!+9SvSyXZBaQUErLFoNg4xMz7yF=RZXKV#aRigOtl zVf70{#pX#ZnOTNe5VbXs&E)Hd_Dtu;(64iMX!DggU96*r=<0lps}HmqquG`4cTPT( z*U<&Jfe7?lzPs$Nz|s1)9fO}?{lL{;_W zd2sP3dem!yE8-;X(Dh~BidBo-K3~YZ*1hezgZ>Wl&2Y914ahr_G1QuqN|{kFAB$2e zUPV!4SH4g_NdhYf|lKc*l{5`?Hqm&H2pGJ#~IzwGB@|~L-Y3e#`1+i ztEKQ#%oVE!0hEu9?{3WA8u#W1Y`&1vVoZuC#jsj6h}d&yXS&~kj?Q(w3=^>Dj`<^~ zEtp>f0M)bDfD?D#g;t)^>1ENL!HL;aJq1o2A5b!dYAIqi9lC1U4tPL0_tViX-=V3l zbWG4yzv`|Z7)G2wv_I3Co7lpr2c{S>1qEffjY|%vA6}z=pBONFW`2Q()yTe!7&|jC z`pUty;B`8vA`^9Llm9J_f+uG|9LQJ*68}es#?Kair|NZ%>nOCrsjpZ2+%|K)N>#da z3@(MKPnMDypW1hpMEDLYW^H6|4aY`VH#MlO@|Lw5s8WyPth^cjwOLE`-CsQFy8y#? zhd+W~$HUYqjxm29{%f3vdvABO7BVc=tGP4wo{KZK7`QktJ=0gvx46wrP#_nUTc{Y^ zXSyD$hMh-taaY~Kj<0pK*12=6UH`L0T~+t;16Kow^rR4)l?--sT#swD&GU+jIp@4?bZSe6WN+55p{s5h&Z%{2^97G+pn z_1scsi$mQd)P}c#U;k3Qqr7A;FRGLir@9;KAFefbrReZ2#_)9h(G^x6DlR*Akhfe_ zKGge;RUB*|OD1!awtLRJs}~M^-tGi?;9gG?g)n*Wk-7S`&W<-=evU zMMlY^Bn7czuKT;qx%Cc~Zv~7w4}lA>+yS&lNvLteZNC~fqc%I->tQd5jIl^@2|~%y zr_X30qA{aT`$WuR=<{XoTcl|^zt`o3Tq}l=S&Dw`KSH@o8_|qX&RxzWK-wGsmC2 zKOeB$x=vHoXV>@{EOU72Ti`^%&Ejq~pHq5TTxxV=qp#uFk}W)Hdc z8wtNOH)F=QKJoVvvOz4SC9fAVQNNAHFPNglOW&c&Jaa&=j!t;GW8cH_3j@m3=l%RC zL3A_-W|IGtRcG8&FG^6Cf-HG5|nj|vl9#FDgc*k`>u9iZpW#b@WG<*k_7|*Zv)kL$?s@j#6;h%FW9bL@v{z3LX;m&p{#laWK}v>5L1DnEQMb;j;*ZD;*6H zcZvE%YG$Y_Jn{cA`1mZsb1O-C|LX5#b$Gcz0fk+c&(r!WqV!6KU-Vs~(>bV>0QLHT z(_|CQ1Yam@Uq_oAECNOFLU3t;1+o@OM%>y4MgTOcoama@}>@lj8EPr7Mz2s zpKm*i(g$TVhctMY2>tIO4`>Z%>@Fh{L;QbbAIB%9>|x?fV2xyAtQc?srURN-Ak6Su zNbg|cKZ6g0GGBmTR;l&$=ie?jO&iwjp2_4U$r%~ns&eH zg%!u*8B;&`@vicZ?u^H-re~;c!rr>GwtL%%*pT?H4BG>LM9xiG*A$%y?Qx)6#wSlN9+6KApd<+OTjDriw03c9^RML zYSOLz2V*-fQgNNr3H`%2@*!A|)s8qzRBQ)}?lY+ve#&i=-*pFV!bP_@MaS*EnF*zA zg-FS8;7h-zJD*1Eql{mIn@z&CXrj_gs(z1u)G~}}Vynujh%D!D;$k=yXVjbFcgk)} z2slWv*Q+A9JtnYcV49?5O&~5eiWgB0-+pve<{tk(p$~XD6Efn-!>)(R*p$Q9%cATW zO6`s@cqTKSHBqhX0dcm^SEN|i~q~imrm6sFP%0~NypjM_>I3S z)=kvNu4+}~S6u^yAOt$0Yyws2!8CQHH*%9G4$g1{-E-LhBto-=cdCg8rl~Z~DgPNZ2 zbh|ufYD@mC%4>`5Z)f_{-2q*j<12KyTG=??s?q6noRFkIr&T-m$n#o=oTvLMzbIisxYc}k+8w6*axilZ4__RT)%padJ+ryRVv*JdY zQQG`-dTYHj8qoNQ`Z#vYMEtYA!uvd!y2jVJGQIaywp<22ZZxy{d;N~RyLaV+`q{Lg z!0vmIJx9N4h?LLmGi{fL3V&lCBLLmmV10CCB!Dj*n(^7HH~B4!TeKRha7Qj+bx)jQ_b5W z3ijUJ$?;{9O5qVx;Cr%+Yp15fsJ=Zw)t8wXEo(E#SGV1;)4C^Gb7&l_BO)BYQOG$Z zEejUaVBq7-4T-j>&wO_=8J8@<&w0P(Y<%H^#oH{1kM~RX|6B9!;_b_bOMg$G7yS^@ zysfe=D!L39J*TXARKF~FY(D?wF_oh#d ztH{Y#Z`9#f=bZy(%VD}lDHl9#0monP%=%wR%=%yl1I~dh_$AtHXcA38=LyfAt_N}! zIKf7(EjCit<$uK@4$n%l7EFsel{Z!-Q>#vD^;^{G7OEn7UexJ2YxYzfzf(SAR!TmQ z-i>4~2Og4VVBGR892k6^5=o-Okta*$27bq-6iRIQRtHv;AAFFm>e7;y|I|4m(MA0I zq|MkOlim)M1vP{#TUonYogp4o^7v7}u70=2SJ9vB!_V*@%%bTF$1T62j)35L5%uX6 ztmks+_<-We75ErYO3%>~gaK_dl=pVmY93)sVxKh}!0{TV^0W)8P8fDl+k1bcL_fsl zJFAXGxxif!rXq@NJF)IFSb-KlYod8(%839jT(7e(baqC~A@`-g^=Iqx%6p=C#ri-v z-mdEWRnZ&uc#?M^XeD8VB=_wGW680G^5!p?m5sAMNax+366XHj%kCJHnO_Wbckj%; zm7r=U2+O}q*0XbFTmp*u`|gVnlvGFGL-FA+thfi(3I)if_#P#<#BUtY zVZ{HR%|8>60ORxzB%jTS8v(dO4S+oM28X+ih0Ausmq?w5YaEuh?Yv6dqn#Z%wL`0b z4k>K=Q{W)ESAA)SFgg5aztgHI9M!IVT)-&|`i zlzur2bHj4aNer*#6m>F^^PA;gb56-Vs0=t>EarB9<%e(U&34j)5+@?*J6aB+_afcjGC)7JH6CNk_Q6nbnS>75wa#0E!U*pMDMpE{t= z`P$630^Vl}$?3$XwR<*NJ5-|^4$o^Ij+6vY=tEPSutV765AlqI$oO2Nk_NDhG=i*0 zy*C@XmHRf*DozpX{b?Slu8^7rF_X`<=6?71(|*S10P&8xB!QyCEqT2Usi~v^$V<9S zE*(tz!;Y`QkUrj|sYwkpHkDC#}*ClG=Rk zHcZKrSCsk}HqllERK~Sj-|d6c-?<^Ql!Z<Li13i6!x} z5NiO?ME>o;GldKggwa+E$3I>or<@ znnNm2^_HC^oTTd%07b$iI`#x8%}Tv{4Q1s+je@f8QxntZP0D8)NexA@{%33-tN`Nt zA03|cymLJ^yxx`{nAV|7O%w^Qzse5`>CnCLpUs4bKNCV}L;aDNppo$-KQNrp_{Oq? zuGN;e!jUywbCJmhlg>MCss28U+m~gl<0Vt>rh+4RK*629k+vu;X)J#lB)%K|VA)LY z;5Lh2QaI|-eJi0ar7Q!+5i5oFcSg$Yp*0I%!D;jpCx;&#F1~K`t}2@zG6ZbDiX!Pv zX6z|RV_DK55#8|n%VzxB;tBiL|JRkpq%HHB65b}7ox`=?N-0rf(;!i}hLOoi1)f|h zg{NoJaDgj9ciXOXc+uqQ^6k(E_XchVNTQ@pSQNwWTmHRI02AEj+$4IT*LIB_aZW)c z`?#P%$e&mmSxzMNLCw@K%r$(Gbpu>8z5$HMIpJy|Q|$bc=5>QkdUl^tHz`(nVTHEt z0KW0%0W*m*Xa}?`m@2Iec ziM-nkmdNg(U{!+sRxsFG?wsDTbw$9Z%K~$tPFR!WY}YA@8`h))RUYRDzH!*5L5>bt z=cJ!du&aP{3noh>`gsZ;67|S4Y3oRt2~Yb9l7ubRrHw39(BQp#0XQSdiDZn64(yQu z3OL1dq{CiOrczpUJsQ2%>?Q8V12R`cr)9h=?6(|5ArpQsuMC|3XF(L6j)b7zZHj=1 zp4bu619X?%B49*Yyb1hm8Lj#Ak zi~6d$KLU<{Ilu*Sqp#D-u>MNlW=qb3)oK4Gg1zzMAp4Pi_Fl#jzVYB-OuoiFYYng= zYvH9W#m0U{8X(FQ8_?z3 z%x;e>=086`GW8KWx%%8(8$oug5omou35EFD=?C*rfe3UoRY>?FGzdgE#R!%tCe$w9 zpHJ7<`ylX^nHUXYqe6fn=HuhYoI#Zf_h{}IV5&a2;qb6G*Zm~v%3ph7{HU?MU7i+q zM6qve-;hssmonQSD19tV_7bU%arFyZ3oV1GK4)hOZSB5rUG$BPZ+Xb+n8jz*rq*4Lr+6u zKBzr4cp$~Uv#DV1w~(>b>9mmX0u0(lr{s)2vr-nF`?xz{YGkFwZS=6~+RAuzVDAY? zsPE;#H@8`)?os{wynEGt<5?s)B`=FZbC7(FsCTcdb9une4HbXRm<6}4Jz=zvu(j(&F@iHhZG;ogu5GMGbVRc8uThz4rxnxW_Gu|u|lqCFrZy&Ko%ZWe8P5=zg5-$;);VSVUJvwav8f#>sdzsyKWy_pc|KwkD6_|rzNu)X~&|Q(E0M|4STH+ zYO*%;#q*AT3$LJ~$(=9Fgza6@GOPc$;BCN9k#;KX`Sq*!Z_Nr%-mPd(B!`bj{g)Ss6sS|ZVJC&1=j8O ztk6RB>~-cYFLf943A+yf8_TF}%wh41F7%ExSTRe#rs?M|eLJovx?M0-==2V86o>#0 z?!2-Y#~F=9=}$?@_M?K2$P?CT!C~aZBk9gVy{{Gv}g79X@Ok~zswTC}W^<$g3YQ-x)V(UkfWw5$3lWyH0@|4slJ%R$$* z$^nt}KLeCw!DL?RL>b(*K6An&l3?J zNiE{t^)uI|AyfxBc+WC}{4EVm$?Gddf$@9U#(;@dx1n*I#pK|C)nI-pLTNjDECuXt zy-X-kWC|VF6yBCMyA2$D#gl8GeV8(%%(TPHX31lEZH|*TVSf~A-Ohwg^k;Xzrr3Ph zdFnP{rO>G4qrQXhrD8H2o<(=i99H(x32JcL$)4*~rv!?7y1)!$hfS=;p_Dq zbMdXgDK#Z6q)B-}|FIpd^1(wx_^-5tq!bHd=R77zl90EkL77mZ{yTehTmlX2OoU5b zy6fRAJ-_!NaOtSS@zMUORl@Ykn&{M=&D(Y>U#JGDDn?CvLgZZ7KkDE=?qbRc8w=*^6 z4k3P0JId}uJ!l9`z%~@m6&KA<8e*Tg38jr$0^K@JzVVCy6Kn@dS+_&Jvln|f`d5EB zRw@GdZnH_n*8umkNjCKAmY}ckwRZ*|QmOG@`2bq{Yc6d}5F@PE!fET*u!O{WxgVUd zu^_M{G_PGM``lppcX&6kG#-!##)5c;bW9* z%6k{ffK&c8Dn8}?g4rWm=4GL&!;B`zlCb1xB8N+c?%17y@Hdtvh!B+Ci7#bKLQ;%-KIX)S6)z6?!mgqji#jM8 zDoYhBhH*oSOD=tvPKI{Q<7UPw2^$s)4`P@d!C;LbFJB{0vNjOk^b_2FWJZw{Sf#Km9v&i`=XRO_r;we9jlz7_1Y&ag&AT{O_-Ky{=w}Jv;Z5PvuguPTg7@!f{Z+r9=4lI6{4MNC51b_3KmgEPZFUDfg> z_Lpa+7v_nukvvCyqxNFym3^oCC;wkfi!Eb_7=k@OPH)F!`++3-tGu5;T{gS~OB3*r zRsDh6Y|0uaQl9y6k66`L1~)Z%-?06Y(YzK3!Z}y>fvp_8L%_vrfNhLn$?($Q{QvZSPAWHFyGrB)YzkJCS=!)*lcC=>i@?NFidy<~Xt>8OV+o|ZR$*Yy9 zTGQH609kvXcq-@eT=6sxWp1La9z7~P=kj$24wOUr$*0Ej3>$Hz%71#XFLI!|6cbyd z>u=q3y{{E8TtR1HT-g6tFH2oL&bnM;E5U}e-eN2_%mBK*Q08gL*79P#uDIT1XOH}i z21pHt`x8)wjxwlnSzIeYITsDXC8Bx;A!9Dmm~HvreACkkmukEvlnQ)4!G1(aF}a|I zu60jY=o9&5Rp1;-W-A}u&*S&xe~uFNdb4Y6FeRg?cOCS|17|63_100wTveCwm}L$$cyF(7w3D6{-A8Jr&cd)U)HR`j3dpVH4nQE3)mUq;2 zus$42hf!~zhs|xuJ6_qD8%Ut>!fnbtvpaokxvq(`UJ(N;pClNxCr7&=a&Q_Z5;5Wr z>$|j4v>vPO<;jUmnegYDKQ#?xel1og&9re3k-yDSPKC9^`%C~+zq*c7 z(zTZ9_SgWl6u8F>!%5?acGJoEA7*hWpwpM#J;!{bj6S$4Q*6{_@vw|O^0?TkE#D=0 zkK9Uu_t9z|aC1E1YzkC4402ISr2y&r4sXF7e5ffu-3DTZE(Y2_3f*}#>07Yy?7$RD z@@4McuU}GBgIjHx2j;|_-pO6Wa)FHYlX;6ia23@RH@M8!oBK&^Kl_*QvQSperNbZn zFAWCJZnxsu)uU+mSZ!}F>yxuH+K6O~c;XZ8iQwPlYd9x1M%usf6Smxr+ekYuEDQV2 zVlX820{#>AdILplpC&qSXR z)&sC>RA9d^SaG`hmTOV?N|o3Fb(L790-MvPgQlFheNbG%LdGvGXys0*)T57S%3Kd| zS7N|5o14;Be(WlA$jaaq9_IsaY2A=o!{nO^%XHLDyMrQfC3}XI)6opz+qJJ)2@!dg ze*ab%eu6@BALn4fbcPiwk@8*1JND;4RU_#s^wbY7S`K_h@rzyi zZRh;U$g{+|hA~2}jJm}C*Ngu9CH{xRw)_~BsvKcM6bwZqvMpC~r>=^Gwi2E>%P}BF`^XRF1*K9PCTEAX{y_D4?Y+ zaA!FlFBoes;JwJvDKPec2cf;yA(x;NQ@_pKp^OduuS%)2dF&w%>hab_T3z}W4<#k% zhq;0W8oPPsudD@4*oLa_7PPEqo4q|873EIh^<&4@XdJumVG`BH<=`Bs-J0duLrWb2 zlDq8I|EeHw<+rZe3;d}t4+ThBvj3-w$Zfi*(0AjP$eqR8(`rpO0+iH$d9K(JIk9tX zRIG5&3eckhu5bbZ!e9$PvQKX?%AMMb?8IP3ubqavXp+~dMspd(%heJGzl}LpWUTz| zVGq{+_`OX$2mYFp+?g_o89Tc07Nqz(PrM{OV~Og#g}J9Tsl6TnvD&`DMm-%^`i zGgvvhJN*x}LMEDI;w39+R~76o;+C~WF6h7buSLr+BM@FSIBe>giP~Zk=aOlQh_0o@ zp5H%!wQsrj1}kMt8*fE-@;2N#BvcNbBJptuHd(yoUBcX$E)_^^K|k9G*8Ubnsr%kG z&Lgp=@~hU*n2~VNg{A*yA@AnlA3}qAf7b+Dre~rk!lAF;_n!mMKTS@aD|Y z8)KU+#%pj&_2AlYN*IN&>R&&V7G5tM=c z`*-?L80U3kXV}Wml`vG}J<*W2=o(epD1l<&h3YEy_c3vUVAOj{Z4YWFcMF10Qaeyc z83^DrYZUp1SLBSr1tuWM742}lxQ!0Msd&|D5rm5l8AF(Xl&X0rd@4`mkHNHc1!L~V zwrRs|Dgu`H%$j5)B6@u)BP@z+<<<<*m7L_DcAZD`j(Y+R({EG#mJn;$QXCjxKdt4o zth@trXtlnx$g{?XWElSKVr$L&Bh-tNB*RrnD09tG46{=USlJ94T>a5%=TcoV&{#Pe zl}*(6vr1CjQC=jZ#!B`(K2f&)M1(Vt!Tdt~OZ(2GAiE>nVg^Yc;?fAJSve87uitPm z#6ydX5?b~)_t$8c|1}U^x0+Y#TV-S4p&m%LC}{||WA(GrIbexd16MmzrRL+*e6adO znnBmwijmym<)6CR%4)kf)*S2EJ-H-hC>pBYmU$7cd0w z0w||@zR7%asTdAE3S@U`nA8%KWbs8V-Prc;b^5@%5|xx|LC9**78~c+oUq{T+WQ{m zVN(_C(biM*M2g;jFg1PZ-C zZWQmBqrO(6LSRSRkG3HEOA4>L-L~nxv`a}teo4u2KC4B)z7@IFaBR=uPxH|gSEmKt zqc-VA>YSKl*XuKxj5MZK*SbS8jCkAURs9X;ed@xA;K9gEqr<%V(3&}rx;bi0q?JrL zjJ7xp7?*Xi7(z~lXRH+DXtIq=(S%+Rao$?|vZ_u>zS9Q_mOp2;+4)eEOnPzuYok1M>@NtK5>s>^^oSZ%&w(b8iyCPA}nV7 zxUi-Z0q&TTogyl7S&(InHvP+0hb4WG80=A2 zOCdwV8js`l9o8V+L$ULaLskH4+0ez@!xL(;7#*v%J^;ophOy=lVYucmhA7$kjgs=? z7S;U>%NOb@ZI<~-^2YQ2@`HU%AIXe;O}{lQUzNr?`;mE(BM!t1F9Lm0-VFQ_!vb@7YRs>NVW_L4;s$vb4+y9HQ z;y?ahOdxYTUI$)#-nf3MrzZ#)-kX!W6Se9<{(#f@q?+;o^;<^SR6E4qea6z4eh^IVZa>!IMJirad1}ZBdwK zC3j-&{BUn)1onq5cz!~mWrdlu(zegtI$9)|@O?ZB0y`JhLN;Q1BYLcQTz?Y6$2`~_ zaU!jC&^5GEJN2a>6Eg{YM$s{jg3H|7k-eHxxz+p0f7jlUL)9e7*QxAs;FTve5vq2R z9jo%~)LcJlPHG(iIfoewF!|h63yK17v(VsRWXfBWar0MUcxHyQ!-E9rG?n>dJf#MN zOdcMhEY>4G{2~!N9Ev$1XnP|()`wuW;TyaEPsM?uYwW3`5y=YU=FG1a0i{401Dn)v z&(T)@FNLf<&b0?2`-cCo2MADVVuZc)t^Sb@&;|$$)72v;c2DYDz7ZRrE}x(fYQ-OL z?PWjVDSbHJt#rA?vZP94jBH(&9B>>-Ine&I*gw}$esBV>is~1`MZ`)rBNU?;PkB7( z0m(6j?OWBZXUX=%on5;Enlfc>v4xdy`SoPv;p9`RqqfuvgV1&JGW#Fvy52L;85^tX zS`auI!v?LMiOROsA86D6Hn{{Q`xW~d#;1#~LqsGl_niit-!*kedM#ywsE(YAMiJNO4DeziXw`w&$Mlb8%S8KP~=6$MK z+UPIxcs$g=+|?%{i634t@;0?=IdQLt^`Y9Yfz~ zwNbO%_|f`4FoV%%NU(48X8T95@f7#wwN^_vL8n;lq?u>29RXKhLXp!tmnrf8>S7}_ zp_+N1%Y%H8%Q2ce+L!%A&ez9BVDABsobhhexQptq1YOsAx_7Q8I$LI=8&#~l+_R-w zcG^mq{UFw&GqnMuS~F;wva324If~WoYkh*$13}CoU#M!!L}8X{OZW^T;!ZMwNZcRU z9&Nbh9iex$)KX7T3O%`koj-{uJ#$+mw!rv8>qk?~#6frJ?6#*G1Ogoc2Mu6Z@PxI> zMDv2Igql+x9OSEjX3XkM?_-1lao8M|Hcqly__O$P_lalb!7Yv7QGJ&T*lu;qEGZlv&(w(CQlo&G`e(8b?h?0FtOIQpr%N%o z4Dg{0;RvBIyD&D5Ll9p1_faC7vfjrTIYBb;G<1}T=NlBYW=C7zFJ@tn^-4Qb7#zr@ z?P(%%tLVJISOlB1X1GFLGw+~H%yQX(nLCsjE{gmO@qOSk6ZcLrL*AMKck`wWAfHJT zcpD8Uif?$QVjXN#oj$c!Q!8YV{ZGY@JDQ3j@*KYQ^{-=WX zo}bvNIyvWjre*v>M5*XGD_vo9@@;>~f1S{rbBdYL;L;0>g<5^>2^@{v3<}`&7E{^bgt+Yi`6fd#-+5~6cg4m-;ymJ3-&RF zA?xgCbO8VrnM|8WIgPwzoYT;{B{)^k2j$g_gO?B7;H5rw4QNj|UN4C-I zu54#O=rJf;>%yD9h|Vd6YPU@23uiv&#JY3Gv6r5whI>aCS+En&6)UO~H55t8uspLR;-W+qcaz{(%Vt7kiRNth{!%{dV z8f%OJI(2DL?H;*nAd929#@IHYcCW9?IszdRxl-mOnm=7V`=w;%FGh(AXKCvCn|i%a z8W{06s`7_TF!102w%wlXYic8SJ^7`Nqk8#p+rpxw;C%Bm;NiSjr&F+v`sw* z(ut6?wCyQhu#&Ifdq<&6CZgUKE$iR?a?i2U&rJXmz z)Jkjj3{t9tVGRc%B*^YxWY=G^W~qYxCJ5);6+iPsTi{lX!m9H;hDEpGX%*;3U%(e9 z<#N5IHGgL|$8*^*#7sD>yx&|Dtq}1jfnO@5c&kg*T;0Qr2)pBRro1IVoyvE)h3$K3 zm$iHlknPz2Q56%Twd?eSNgnF*(!xK=qbe8*FF{+gkpA_hlngai#($Oq{5Fh(M#B>~ z0P_NV1iQ-@)aQMw*0N%&lP1aM(D%AXG)eqJm8*xqgo!Nd8XvPf_1!%(rxSLu9FF-O z1;_ld?(;`ShZYly>lraDg;J9&%nYi?wUF$?IX0@Rd{M2VyabC&a4Er+`E!%yMB<05 zgokBoh~h?He?2A=AK-chE{&B;*~EP^$@GH-86FC=(KO^8*6{LvbBd=>Xs)x_RlPnh zn-pnFs`13-6fs_a;AMX7?Tohj3QWt=9p-|z?GP|u&RU6_oOstWJ3<=_pp zLv};0Z|S8@MpYj;i+>W8&@PVr0T0sN zXsHV&j^=yh*PG~4l<2YLweL>-1eG6L=$gXYjHpAR_H&Q-)o6)l>O|$AfnlX4uTFzX z{`}-ATa<>ucU9tYo;FX$)|E8HHhfy!AuAO-oI{3VPP%v*eC1;JwDAxBCq2;+pw9h) zs)+MsN&NkdoOlaB{NFt@6r}!&ei=SE@dcj3vA*=^yCE`C)-p_eU{PpM_+uPXdEsMtD(Ey{oDCg@YswV`LY-wU4(< zmYt$8PVx7f@@i+BqIt-~jVbYGXDtIo&S@&qx}zIqxT89O%f`zoRuy5XtMJfoZtcWx z0rr!e$~|Oh;K2RL=!O#ZbFIMgg~V0ckGNm&`)u=uO+2UpkzZ}iqO zJ7kJ`pv&4A{JFl#4SZXG&(h*hYiN4$-NIWL;04b$VX}CI7;Z{gi=L-1O|5wBb|;^Z zc+;NDE0)r*So*H?hJD$oi;VkDjQOy$9t~aKCm|q}w!pi9X01404?xz4nHl$`x$w;u z)&x9~Xx?A_ZZHb<&Q(8x!>cT~=N(g^TM#}p_9}<7L zD4&UU=eg=f=|IIg36^axvwh{oC6)foKvVX-ak)CHvCtjS`G5#v#Co*v>wm;k862>Y zROPl+HwkpW^;D*Nlyy$hvB;wv&w3cHKm)GyM2^y?GsOH$E0j%1uW&On(Yv~=9&|wZ zJ{&%_jMa0F; z>I~tAkyW9h7@U$_@mu*NG3Y;6cB0sLBL%;&GzqIYjC(05cE(2|QizY=W6nRUQ3lY6 zJ>du(Nwsd3s92i`P5UEaP`5gV3Cm2*VARcyH_|1<=f5b)R@|=Fj;UWkmA(gwymIBo zc~B;O+JdRsGDKrcfZ;jcFa`RWNB!8Is^yP4#gpO>4aic0hiVYDE+19f*80>*;|TlNjD1TtuNqWY9xYTAo=94G zQ~t8}Yw14#ac|X+4MDA@-P~xkE=9F%0Th{M62Yt$2O(>Ns~(I;ZM=M$k6d}}O!~Qs ze+P8xKk3-2cCv!`w>8NqTDIYiG{q-NI^H)u9qUngD%R^GTHQ0GH8&+m8QL3;J*gkho9)BrZOa`#VZvn>&>Hnlglxg3hD5a?x^_UJ(o*cl4IrVX)NE zHKwmQtnefTM6Yd)c`N-x1}0mmLOmRYd*lfO=l5ow{w^|yFmXiE^skUX@fe(@ZP1?s zXf~Uf@q7+PWR}4d_^o)%il%MB|8bztr`As**@R~)d>^w1Ry9vWb3QKG7tPL!PHwCr zoP|zRJaR^m3pLxA z&4NI>KJAR%%6+Yt$YA~xmFhzO|Ej+x@+_?UZkl6kB!w6{wXsa^*zlExg5 z+1{#BR_F2Cd3GChg}c@c=5Uh(*`-+`7hkBiaO3~dtw<`wNK+T1h)Rkvqls=muJ+{Jl-tYvr?VJl&4m4#HQ7%5 zfyBHN_E0z%z?-TjdH_C0?{fv=u2FcKVE#tMzIPgV z`rdGJclf`7+rzgVc~9#zIqX^LNZm;fN*4=57eQP89Q}mL2%$J9|*ofaA6>Fo`RKL>!2zvWk2q?t6o>|&-aD$ zCWIkQ!<}!6w0s?;cyNIj)n!OTdsfUQnGsbc#0`l}aN3DeCAsnfHkeYmXO zo67h|uW@v-7j9aP{Sr1@Ey)<3(*6#$x-d4X#;4c*V$}%A;5zv=UF6i-4FIR$)r)x_ zh?>qEUh12tyvMhZ4;V?_`z4F65}Ct7V#pE$wYN={S)o2Jz9LIbw5YJko@1G_%xJmd zpMtSmpEi!FVxsUxkIwudIm(m-?t;CzOJgNN)!he$o9maCuH@HPo2O&J&7{#uQSG1B zdKs~yHZFB+^V2(si%-zOg3oEBSpg>ODAaQ2T*-04@wX6A)~<-TXP>~z;k4xLPqz(X z(*Y1RpxA6p`wkxK<^g~`hZ!uibh7^3FG;bj`FqsoqJ8{MR*S9>4TLJ6Jjt==QBeP< z8>H!;PdA`^8NQX}M{<^cu#!xik<}}~Vzqgd=a6RKO2^kE$HA^1kuTrUbRJM~eIoDG zqh@X%^Hl_7HI~9#OJH9OS>cYqiLj~sU|6%@sv&B7=`&En{B)b_*q&e9yhnuPB6@d6 ziXsYCQyfy`@OAl|=1FaBG0+nu>zBFAjpuE0&5vhd^D)bY&xMnmc ziqTHw*8!jfy1T`EQ&ZYIP%D|Z4wI)E?;(MOijWMj?G_kfQa_xbj*cP9ML;J7v`1AnQbl zYCu!DT+{-7FSb2zSXiZ!C5;_QLNWy>MQ8_u{dh#pbUzcPo5l1}Mwbznv|!Woix1wl zqqmuzYhpY-EflxCsUqlFR|pW@5_*msuJ_Qgn0td?24Yz?3s&kK1$aHJFG?y`7__Ox z{qQfn*88}T)u!swsDpo;ZwxCAVtKO>7*GtDw4MN_K|!3QFTCpYx`$p-2bQV~O+1-jNA;vh9Gd)213 zZhq#5N5P9y`Gz`;7UF#7Udm_#$a1Gc>W@%f_`D28RsFrxED~aiAGC<=Sb*Y%w|jxb zxd>B)>%`l=%=*525)#RL)RBUj%V0fy6hjoqqQb+w&h=h>4k{jH{*$Qf#zN30)V_kc zThF5TcpfuTW;*)0Rs@S$s6Z`7u6m+&AeetNZh+wGTE-depPJ3DqXQ+MB&eT4_*lv-l+`s z9yYQlQM=SToM{`X5R{OYPu---fTCKYG@)r_cJ)%;Lh zr^>rn(BXidvi4g@#@xXOb#b_kQA%yTakqDKW1tl0ckRJp(xAp8O2Zi+!CGv2^M3BW zirkLq*ZSl8B~1Ag@R^IR8CjwNX9`5PyTXjEIJ?4Hn4=Yr*=g9mWyHDv!|Z^Gr9m@bzRj&*U-XWN7jGP zQz*}aP61z4UCDIx2j8uW~y1YQZRqOisrlPN@}jwhuw{t)`C-<4X<;ZM!9WB z^+Q5}P8Q9&zJ>UykLnds4pF*oF)Sk5>{dwCqrg^UMAWd~W!A+8KA2 zbdG2EMI?17t*+njdSbxNxIYcI=$NmadYzj05gL|88nuu@<1~E7;2NcdRwpKxpMyro zJN6P)7_M(-(E!bAl`#>;o=-^0B)f^+M@#?J1*j_F$*2arl)W|R^9>jfs?DvhcJ`^1 zSy=oYrDEm!(S;j1={4gqro6D1nL+SsQ+4=!pCFqdKQxS|7s>lv%tEQ-F;oPhg-!5a zMfvM*l%?+>^TE&|O`CCZc~QFUrCqszeo+|O*BWxGr2u%jJLtoEjcd{MDu?t(C`a1Q z6OqAnwiiq?e@V}S=&vXCPHzqJO04>V+RQqXT+FoxxV@rrr}GT;Gs73KkvAsRLCGj!zru7@n1!nDRU54PvBuE(<4^Ls700SJ}81GlOqzKTnT` zeqh|_i5qU<;PbMhw9E=j=u`O3H_~Ad7K?iPXKnkHPVhi|y3&+*T1t@COTxC#OIA%U zPHt19&${fd8>!t6xj?4V({|t?z#Zn)ijBSH8^T&!Oq^n}4&O zqdZtrOtGw39A4zAv2HQN)#Q@%rKEH5t7|F=v=Idk8dfuNS%kIJ-fOUMTe{a|ei0%L zxc9Ott)2HH7tf)(Y)V)GILUiF<1lO{(OkG>hNg^sYTy=c$i@cmW^9Rzt7S67k>rD9 zv0I1B#&idw58HuP601wiZcH)kg1js|j+pv0zA&-&I-aRp7|4eZ7>xKh?H^M^ z;Oju(`3ihsj8mx2Rb;K+^@Bs}YS&DXkwik?CyrQN&FHkN%>?g#hg zc8T-CF`55T+!P-k_qXvNx;Tk?S4rsq=;6^ofct-_B=EmXPDyX>+BBalDR#N`HyrW* zqqwup({rj52lT*(qkTZv;V>D|5$LBaqY;``Il-_2@f9t+TW0~jL4dB zPKy-yu*zXc~Rwi7UYTu1E$60XA`M~+C4GHK*>`Mwyxq@O5 z%JH?U%fTHh7Mj6Kc#0ObN3m`i-Vz@(m~u{fV(+oQ2b6iDvRJkG_ggr*4;~@UKI(eb zTAr{7@n#ou(5fyO-siI{^7$PKx5cOKo3N}Xme^NQ-TawxlY z__`Lna&UZcXioG)l(nc`zL8E(Z@Qhys%V+gfaTd$aF?%30=n_A3Df?=n4Oh)~~5dnO1*UKMODKuVD{0^5W*vewXhb*`QbxN1P%6;s<;p4Uk z7>+$ZJ5Yk%;DHh*$nHr#~=1V^iA9l!Me&KQp$HMAK)3W-J3!vV?_VHwd)Ugfu z13RN={b66Wz;t1vb~?;}V3P_%xCqZ*(ho|^lCMZk1JB!S$a=Khk3BUHV)nzGqPH=5O~_I1(|m_ia!m zKJ8*#1=Rqmy!s!2roVU-@T5vJE6sW=HAo+Wr==zKYus3%e3u#m&X^ceUCO@VBf6NSN&`W=Od!~&`V*~U+UFF{&Ti{H$c7VX6; zUu&_Jyjg8?C_I_MJ3s6YTI?NBCRHNuppPWpWZ6$tVDEdJ5_Gy7S>i1BVT!xNSK|nf zeX*Qxl5*7=RYGlNQ29#>mHL4)8ud*;RovL9Z#S;_wc=$SP=Y_|{8md)-ZEc;tP zc8gO+A|xor*3_}F>=l+nFtw#Fe7;a9b??~W7N`F=gnh}cK${pYVq(#jtx5;4bemK0 zR&6Gb>;eFtQRkqjwy<(}XP1>aNL_of-)!Bq7tQ19^$!Qrv#htIdo5mH_STc>Q~9U9 z;dyxpI>nw)u#8YVheONOF_+0iY+2!&xsOJr+V)E6HWKT+;lR-iA~cQr=sP(nax2CE z+L376k(De$=dRaP+h=%bED}I+qIf!LVpfzH&XLgel3#SjWWwm1*F4Z~)uUs!YU;rH zZAVuX>FM(M=05Ykd;L*ev}X;6$A26=nA2s+hg$H`@QVg9gNc4t%{@(C{k-^9bm?)A z=ah&Sgi_SmuOb)2=1shX9vZGvqO(WfG1((@9#tf9WWk|M+pvV95tIGT0nNxT?~o^Y zOY$(7@#qGVk~;9f&n4W%NNW5XyIk#b3YuO_^JS-4)Irv4P^&_q4YapeBm88>LsfynR@6dO9QHQ_X#*BO zMmSOaMFdcgvBOtnfxkDQR22Wi002>|3+MX_UNn%noKKTaZF$I3vjOfKCf#N%&NP~=Pacq~;UK8N<+6i=5dC zVi->4C=xeuf7P$McG0Kbuj)}xTK>+LRDa2#KNt?Z83p5V)-OrGni*%&m$R$kQFCSq z1YZbDikkb>NYhKI3%%G)7!zeE46(tgl(U~jb2i9CtCot^r?$N2iZ&~~z+m}G+B7Nu z%$gL-{CiQ$5o`TzG^dJ(E3D@G#~G|9SBfpc>$K4&OT&QPFV=Nwd+Cy5=%vT{brU-c zA0{^qnnyOOGkZW(RbSm{+wVtuGm5*~PTW*6ca<*_sg03d(O(j4IXx~r@{QsPq(>CovCj++50$XNr-BAsxxg8>4}9x~wPaOrH{1`tzlWkv4xab1G+K~k_z)WWB}Y~X zC4PY`avLAjVwjid*DDgftx~2#U}tprX*x%AcVq3DA&on9>PCBv;*Fs$5{*1zlWLrE zCG7=T?03w6^lw)`d7EmPBTDYIy|eTFo4B{OD<90ekE|sdJ@eeFsmCbq!-4%Pm-@GKdNROI+_L1CjOx5%$LmrY@hnC3=rknJ4FR*>tyT`leys_( zoWn1JyoEKS<-7|Mk+>=bt4D z75Qo@Um6RmU*`UM)?&Zt#r&1jxW)W{xH*kGf|9^P0K!e^PA&p&@u3B-hnBYH3v=Mf zB3;Gj0rsb{oYNIAh=*^yiQ7yQ0@@6F%2`vG8!1(+5?sw@efXN`$-+BG8(aa>Ag8V+ zM?Vn+AFDC#Q~nu5$X7Qi+g0_A`{Mbt`O!kQbJI_BUbQ0wPpN(O%$aI*3Zx#0G8d&4eOh5s^l;{upUpON5PH?e6)Wl2$MtTxw%kAi?TjO}!H)!0>GiX4V7k~k-k8yU zpzU-C`r+dCf8Jg1+9SyO&R4w$Su+1?rw{1vZMPNX1{>}c6`F-buxq(Mrzz33Th_)_ zEd3dn)MR|#k+nXZKaq*_PEtrRS)(VpxoXPR7(D+&b6tu8%K2jZTf7SMtS>WCIDfHC zZT0&2m8H%P@)YAE&+rti$1~;g2j+IHG67gT$7O%$)I8s`gVbKZjODLkw-nMffA;BlzF7qQm)RT@;n&W#a@9S9 z3^2x<50?w4K-=|e)a9AmJ8r^$pmX(nk=PhbqIRCQ$RH|ydFI}~%@J5uO(J8SH^U$* z`0r?+U4qGzUlWvdFKu$>*FW~zQ50h4L_K1x;s-pZ-1mLVNyS~dWo(M%=9iXQ*C<)b zps9;1x)|8RjZW`!_C_Nf*ue+BWLSqW^6UQ5gHV1(1DdlESLVUEZ~-PI&uEXCvTX4b zc~_4@&M(<+uFRF20JI_muv%la8lO~LpLS4D2aoSq{5hGa(ef zRnv0h?K!+E)G91AU*at5B!VRGh>p^Cc(AuEA%*+vOkAvCE2jc3J|BI2Fx)UiA99#I z->PSkhOdrM8b3CbqBJfyg_og;!d(&&V?&KKDMqV6F{_-QPEdSRXqM`5wUwo>n`Sm& zJYIVNdHz3imxm%;ZeH$>>F^NQo{mrf{eRtIHI50#|M*t=lRqCI(!Y^}-^u!A4olB# z%k?ai%sY5G75PmseGPrH^2<&7DcENgJ+j$Fj-bS*o7i@MB^6RO^I7)HZ=nb2RF3|) z320ZjCB0KcYiXzb4awI>vr)ZLzknh2!FM&v_8qoGKiiq9ab;5hWTE(V^~)1Mn*U9k%IpfY zMw1MUT*qCQXb`Ok(zQEE?x0I1(EgkNKy$(C;+H21G%E}v?Qk5O=&K0=HJJGTU^#NB9RLpMOdH++$H=7OJ#$_@9m$sH*ozZYXHyR!Nj4ObL znE}`FRlMBuH=n7ToxfzE)WP$Mj7SM>3#2j=QX&BzY7e_nQVS55Y~Ej;MM)2W;C7VU zA3$9dOYUvS^Jvk_OodWiO}`$NT!=5!T<{##0s~aJfXlF)4wdI#?t=DJ-_|1A%`upa zeAINQ?9YY+RWnX2iB8^Q&JU91qtE&(pixB?28b3reezW!Zx{8OFIark7M?(!d@QMJ z*j3#TPbU z0+6BGcoM357^A6pIVE(HDV_d_rD;E-)y>p{aGh)VlSr7w2@mal(%p9OFqKq)jVej1 z|LCsEhOb=nK5FCNVW%lt%+XX)R?9H@3o`Rh%WV2+c*89$rb!(OnZZmJ+yt{{Q3i@) zzrF&wLiXzhHk>(7C26Ch;v@@-+n9r`%d2#?VYBCvmN{PwL>k`_n>d~z|o=RyA z&=(*bP))_h*W05$FTNZ~x zfxv3!ohPQockuqfvAa^n_mCmm6tx;LG{i%9OtQII89?D9irXX&k^lf?K4T z|zwqU~}u^h4_6$dM+`tr39EJlre zM8kBO$gBE66zc6ti)UymA&#KO6(4S9H2`JRWQ-ei1%puTO6y82S?ELhUQSg@`r-KNmYDgp*#K$S#eEgy|Q~1 zdyb!9aC2i&-(2=M55E1pQ;A!*I$z~ zwt{^!D@i!8x^2)Je{YZPV1?xsdy}6$VUrQ- zM`gyvMR!{~S5{x>8SNA4Bst+TG6N=kultT{9F8i}USzM$n15ow7)H{U{gknT&<=M( zy$A$2o+=6Mn0>MND$-*jcgDW>4r)nln5khTQ60h+m)_t*UxapX^&1-$NPju?0l51z z+B0PmJihyOOnoI5Rvp_H*bS%(1A})0s>A?^+vyts_I;xyLv&bD62v$_OS`Ivh`Ya^iDav@Ii&G?x zzWJ@XtF!yRt7T_1J(5K5nUR?uVz9on4zR=JzXwA;&xcnmN3bZdf&!i?(-EiiM zZRvGw%w%10JWyo`i|!_28A5!b1~gP3b#a0GhPMcZ05h?f*gjCo=vA zl?SQr>bm$h`$at!qji&d%4wXy^*IRMAUt12J;hTxBYoOpJ@5`7b_#2Ftyl|i+6Ao! zguh68gRMpa!@Lf3C#z(kq$WE^VAU##7{Hguc#*Pm@zxM*McP?#gX4!j`AiOm10v5@rSXWgH&d(0protLX~VQQrY7 z)77c;yOeBa57~c&4dI95E*X>=vcdzN( z@G+cG)+T-W5wsw<@7}v&)iVmHpX|4g*Jpx^d(QR0uE)tcGXYU1$vf|J-}g_o1ahvy-8Wd}9De`F zf}%xZ1K7smPHiSYbaqgoo5d5}dZ-W=zS*1?f?2TI&JBt?IhbhF2!zuuU)>AY=LBqE zel)!X&=UfLj><)R6St-gxfUMl9eQ`aJ@|7_XuVFymgujrlI0_?P7KTgka;{FyNY&f z?_1g9B&ZYK0{WEOVsPW_B=Sv~g&^b%emqS=Xy*ldtBa#0K zL$cZlh@o#YV<@m)VZ`Mt6lw{_DX8^x<}rZ_UB+m-kN$wOVml% zz%4@2$`8mC!P*tG!&RI#Xhf~nJR{2gSE?U(dnsdSK?K(_q5ft?@W%1J;P?u424A9 z@kgCw3=ojgx9!yC%Q3Mt@L`YKIry+hJG}v%9!TwHObN5?E#!nlVTVaiBtAbaH1s;t z;*37An1}f!L#QYl>dn)&VuLNUisF7-fh+2+aq+*OX2ys)+jQ}6tf`7o{BMyQ_~^nL zUOI8`IG&g}HSAX>K68X4N{^5%_y}Ltp^ZPdWm+v3*>MNI(JS=6Fs8%Fdhhb1MftfM zz}BM35%>wAted89J)VfP65Za45bfR74m zFxR3L5Xwyg0c(K)3DZvgdG`>#X0dTzDPY*P#M10t_=N8#z5T`UsfFVWyQ$23T;!15 zOLPx2)H&CZPnXBqY(U_F1g~?g{#D8&-fr9O7SjoBPgm=e;!E>5ZTGh*59@b?vSNer zzF`m%Rp<|@99#XtI~(6}7|;CYzKmjKZign05-riueV=ZAs1N&UFsIn+7* zM&1U_l73*u)le{ zIXgjY*o7jG+q26g86&eN!L2`8UACwvx=y|GS^14EXg^&_C&AHOe5an&X^*g%yh z7g%ZQ1!-y6se#4~@Dtgh?pyjMtq&R;CvGaA`BC0DcNsTbJkXF@o84&c*;fdy({VP$ zu&;&498#N*R)C#!OYEEAZ>z}UZley>uWx)k7hMz8^k*|X&RCz%H@G&tAcYB^Kd&9@ zC_YFPOeJOZE9=4rU^(KYX|9c2gElUWt$QoPfN+GhU%bED5Hx`fCsD*9O8N>yKPT$C z{-ekfx_L%+)4uGu@yCZ|o`ZE66d9~epS9hi>AsWnbc2VdY;Q+UI?+gG)1^6uC#e@n z(#O2oW{IeYmbX)ODMiG7d$(7RB|lO~+fZmr#q0;}XHKYa3WhyYHP>bL79-KrwBJS! zbJuZJSEdw@*{V(Bu0#Y0aLhT+mo8C4&Q~jgEew@5M3S3Z>01tE&AvJCiFG&l3Vd|B zF;5J~oDuHIvGdN12r8D{NoNGmhRC+5%0`&3$aRHah z$ReSlbPGJ?R}UpUPK?f9^f(*%zVZPqz`2yR*)2S8RtsCnRaF9UVu+)(Cafi&4&mYY zpw0b|biWjdf$o@fmM-K@*qrVDN29Vgv@6Yo%{lXQA?vfYk=3X9LLqKvM}>dUmS0u- z5ex!0ou^kXT#^aOb`qjBUmbm!I2xB3jU*G+|&1@6?shXB*bhEYY#Sb$VX z+7WAM4R?CAVGQ>JyD4scBkyfIC-xN$mzgk#Q(_%k-z19k9&?IqZm@|54d#SStZV5a zHp=u6qk-O-B9E8(Vab8+ZVQcYw|b@bO-@E-z|CM;wXKwe#{gggiM3e@h_ktD8*6i! zd5~26YOQFyQ z?uav31N~PMj14J;z@#r)TMA+v*fm>=(Br*-@E^t`ac;wAcF}TQ%UUaYB}P-e@ZycW z>Vs`NE6vTPW~bF}BN%s?{~ZNm= z>Z~eS^%~TV1*ReC%|6j90GXS~wjdoLz7SG(RVmxro`axQ$CawAXhxH+NCi~Ny7mYo zgi^&f#ik9Ul+9k}cA2`(GbjS1V!QWhsm6YS!vK7VUOdG4a_z1n0Oa1G6B1!SWJcF^n8L@j~5-g@)(qVs>xB5p}bnp>cZ0~-$}GZHSS#HbBlQa0B%V z28n#;|9WClV^&jNsJ;ui(x$0ST*v;kO$P*>bC$kqnrA!$49c;H1P3^_A5oAM=m@M@ zmEq!U#9s8i7kR3dq2W90KeQJNaT=rRV)#~Yz(!8Jg#_nUC9oToz9XBm;pdq9$>3=E z#$GP)BuUJ2t+~XdN1hR&!tnw7&N9mG6RL$WL|MT5;I~K3W7?RuQA(^G@E$!Ve)zR~ zdjEd^B6bLH!d3gP2^FnX(O&G8>47&wM{@^{qsMZ?^gIS%4*0fy`@RiyonR9{cK1bDaxAIoJ2B4b4YYI*0{`&jk+;$B91B+x*aHLgzj=*F#$+~W4ATjW$V0AzxO zb>P-FZ zfw=qsRt^g8*;+Zk9!CrY4vERTUr1QEkku@T{J2sLI=eLiq#gd1V9akUvnLMZeKshi zT|nPi(bgm!s#Ke;;^qz-Iu!`vniDcG40yHN>DZhywfe-7EuFm`XTN6B0&HL%IKpRu zzSsOcMzIw~xVv0v|9k2VjN38xNk(HwBMad_oJG`JX5m#XZ4%#Z$md68f^IWxSqa6#e|gcuw{NIKY%Y0JMy@cyG5)Q?q*s> z1T@VSAugt;%2DHUE(^rS`J6)Xo8L)dS5=|0$?Xk2eb;2te&Nj{HYv`Vgh#YTOWd<=IS0f(xSlRiCBP_EiY3M@St}1Bd_7{l${<3c zb!yWbD?fxG5!+Az{oE`rf;$KIbg*7UhIt{oSZh0lt&icI;!2-+IR*w&ITwCW#sF%Z zu1J!dr^85uK$GL1R+r}F!p`P#ml>cKZ`!Gr65Pti3(p^r%}a`mh&`%{9wnNAdszPyhGqdeOAm=~C zP3g7)`gUf!A7H;$^|`t#4jLKcsK(d)?$NPA(k;(83XaTgbuTXx4V}3mPmS-DB;P1^b z_2ky)C6{^NT1v9%ET*)x1tv?a>s~GQ1*Tt4c(v%oPNlu@t@%4SfJ&bHZj@AC^zYS^ z_XNc>nVc1^zC%w+t+GdgYcSPnZNqf+XVFwMR$W!b2c0YPdYlcCdqQNAnWi#~4AcL4 z0=y!V!M-pbuD$=VMkfUoG9MfqSwQ|qKXT&AN__L5LIY9SpMtr25f-d%K+|LIJ2_4C zt<75Q?yID$((2=+qalh{h;?tF5>Jet(Y5r71=S-JC z`kc5aF}5@d+=xH9^lu!P8Jh zu*RArr(p6AD;8;)*0RgPF=8=XtbF{*1%_HN!Zpzo3Q4I|FpnDUu+=#|b%tM>s1FxOi9z zB25r7&UxLBC4)V0ZX=f+h@jn0k=^S}hQ_Bz1q~b#C%MgcW=jHU z$^U+M3D~^rFR>MK&Mzz<0nEpHS(8|diAhq_?xeu^Ze6ISIIo>{n~AY=JMZ|D>!YGc zYR1lEyyL#kikd0{lf~uws;i?G;l>aYrnf0*jh$S-tE?m`0y21DE9U_+xb{yG#DD1_ z>;h{6ra(Y|7IC<}PnjS-F6b*Uu2~&fH^q?iknrmx(~XuC8d%`Ownc)fKm>>0-s4#M zutj*t(ci?|^dMUFFG;qP?yDD}fBbV8*L_ur`Y|c+Tet3GXK^+4gp(kV85gO_;Ui^+ zM_l(qsY-m*s=A7Ra0YwaV)5;*`xh5Z%NcJyytx1Ig+$7F0bj^pZ3)-rQ9OZ)*K^sE zNdFv`UC)*KSI_geq`2Gv>Uqi~P2K)i&+~pX`nUHsjsTeKWi?=xIW1&-!RPV|#g{`U z9&LfPx@$WRx+i;`y#f9W*aCMRTL75p-`J)Ye50G(`I%Y}-5nsQk{cB(D>(-YD^>Kn zQlsK;UN?4rC#5pXo3R-6cZ7kxw&X35Zfc-W%7qUkS+-dNJxWXPCZD?Bh|qMLyf`qi zy;VF4AjWeyPWkPTUWSM<092RD&0SW=v($I{&or*Y>{#71RdOZbKeABI8=}nRf9!X| z%8Ga#yj?Vuxi`#Q(Cj>~S1u(>8Y=Dx7-o2qjpg6zjtQ~(Ix5u`doR9)J=DS}Y78#T z!!5K%jNpv@i|dEH;Tv2+gBrG<^N^5;5U}k>jhvN65%=9cU8h@PAbO)|tV*>WqUiAb z%cZ)FI*rOC@%jLgrfr*jpb!ICSGM&%3me>%NpDvAQRtL}EBQYw8dm~T4{q&qO!Por z)W54_0Oa*nlp~OoheQRaL1{T$TNTBFTMWKJ4+X7}rdZtARkuD~_YwVgjt z5>#d&M^q*tG{PdI+g`>8`$8gPU4j4L(Gjr8*m`Hu_&>5IeA$y@)gN@s!f8nS6#PwNTUY{c1az!x~huuNrJ@pek zd-xvhsh*(eo_azwVkk;%II3wl%62o-7lU=Lj#Nar_#B^L8>9C>jG?uP<2~4Yoc_DE z#?D2NYfhkHs|{0UMR=6;+nV+qI$5vtiST%NwiI*g4zuMhvY2m$g>JVln@A$hMt3~G z)tBpAlA3|hbv|p}Tb?h!M}t7ku+^+I!tPcRHh2x)Xgav}bn8<%vWfALBFb2-nKBr% zV8AK*pPLyUmFU76S7`FrU4 z^C<0luHH;xXy9(=ly2orv}XVSx$e%Ctz3y-4N?)%&0x=6lr!J@KI;;@uD75SeJb`R z0Qf(szyC4(4?-||7JU$`3(1Yw(wj?^T9u;-KdbhihsUqC^M+`)aU1Wf}C!jUMQ1|Awr*E0H_-Ibizw4H$)p>Z-6&g?2>V;p&4Ubnwo^l@-S ze~GzUH@oYwNN(M4Z1-3RvhAzjl>IxZceMVI=LGBg#c9MTK+f()0p#GiRMlYaaWC7u z(%!a8%@u)0pxt2$)Z}{*Ph{Qh(`jxo%S6(t|iu93pp45GGHU<4m;haxhzNL*(Cev1?;!{yF##>pfw14p6Pp7LB))hO&+1k4UghCJbO9L7z6$Otp_bj9zK*z8dutyHnD&g)c z?(Do_KVW+ZSS8X12nNH;^MQ4^``)X_Tqrgz62fd8^hPRx3T+ogb4=yylN-;z=oqeV3Joe?3fNEXlR%d^yD20MJ z)hp4U$MgRwyfWWE>gSUa^^#qy{Z$FClj4*JPIZ;MTb{pe|MAD6#BzR<#BoH$?yn!B(UD{&)kK__nwBaE!2h!?yNDLBs{EXq?J#BT)w6By|KAtBR8V!<4)PtXg)2`4~ zb63ap#;f3!u5{-?a!>A5vR;EM+|Qi08n!ylGG4`2=~`F4Jd&V)oRxfkG>~`^rf!Fz3^x6tq-9}~y5WR9+e30hDpBik^-qZ|DqgX^l>~&9<+E&qVsB4~ z$Yle>sZRz7b)2xssO|49>KshKo{=ox=*foHHNQ5p_>4C4h{u!eLM#=m*4Fmyn^_yk2@pFTF+vPhW7?eB12SSzJAm@gYw7 zZy-^5y=Luqqd18DV+26ic~2;6)m;$_5*;ldbJcDyRY#g?nfC@hDC;RxR%`K8*+Xk&lvIj(9^i zmVfeSVgW?Mt2Zl320n@%T)KH$*ATa#gj7$MJqh{CIquad*b6K(*1=jP4{FbaZJ3;3 z-whydmLM`@87k(RBLS7=+s^hYJ!l|+qg0mh(41D2yXv7gJ{I(k6A*gM^9!JcW!rg| zLA%j}BUbmq$q-+Aa@aU;9CyG%HAuW zu&GDqQu-30Jp~s3J@rjKWlaL>u@{)?GJ8Tqd{;uyKwVgqHZZO8aRR{zKtNMs+I*Ss zlb-v}(vcS}TK7~snmvfAKrWNYnUa!Qwo=Ix5lOZHI{InN7|)0nczJnJ#cNTN!;cF< zkQA3?j7&u2htWD0Io}h+@r_lHey-3dG1ETOXo4QP?Ac(ZEGa?YQNsr zeeG+&$2iZYBl&t;<+ZQc>urtK|31#k_@Nr5C^WJEi_nB%+2vbK76X};iyW1JD9_WA z!>cO)mxLz20O{H_B==omkqF@0-u+;c3%O)@uzVmeyH(Iy(-7k2;ecux1y$7oZ047)h<0ORNiB4PeZp3Qh8A8w>xHWatF+EK<|H z3iQF2s!}+GvQjSOhoz|Hr=;A<|CHjI-xOK*c0_4!@|od4p3qkOcs{eOgmjC;H~} zaF4Fb8?DS*vrk|ul5)|pO+zEDF`p0)Ki`_}V?6fWr7x*|rMxK~+ZUvcNvw{ty>0hv z0N!T_6E$V=6thslvSOCxCgGBB``AaQ(N@Z;^z_20)%jFBZliEb)dNai?Lk$^lCZfQ zvjI?VN)M_@mPCus#_Iq(-KZw1f9y=>;y-lxZ3RvQVQK}b`_m@z=zg7-ZZWxjSJiKK zAEd_V)m<5V*GO@7R;VXK#>IRS&;&xCF=@35nbAd9Ogm3m$%N*VM)V|Z#!EWb(We+9??Jm~*|7C$u2JE3z8ZtO-m`S&yZ|DHLLJp}*P zaSMB0R4BP;O2nKz9RQ_ck{dMQC!3zmljEfPA)+WaSos>G1i0}=Jjg0)X-H)c4@jh3 zJ-vZwZA#AWFnXRIkKEGS=FVYAwCityWWXyYlx-Vk^afrAuA2NY0k)rCQT+}m?=4kJj2ZJjk4>{JRD#b>^&)(IL z%4x!Vc=F(PHz58aB+y-H0rjc4(sAMnYO~JfDmF&mPpqVvg&)s5x-@L0g(DN@R8K3Q z@M9`UoPO3!YccWAIlR>%9|Bh74MBdom9sK}GePHD&@t!&AkT z@HAA(biDTtuX*Yyw)XUsj`PXhr5xeN71T6p`wO|wUG`zgDD7K{U&O~A zHmN2)ZIXYdA?##FzUzQ}FAtL-t0J_tVxe7CeH$Sp>?~ow zr<{3U%CL750J%1tOFpm~Pkd@A^h#JYH7;&RA|v(=@!Ct97x_!sVf9xj=N!=OM=fq5 zo~cLZ9U)hgFHZq}?7Cn)VTI0o>G-Moi*j=XbhY00j;Co<-N{=t7x7sI)}p5{+38t_ zMEr#^wFQu1ak1sIfSB)TKb~;QA-H%TNZ=PZ?c~sFkCVboe`CFB>clqeonQtPyrSC< zh^!X_E=)TCszhOvUy-WCq2f-iqnfcfUID0;UMnpu({W<@>2rWgivt9(1tx7CU0lUX zB-k)`4M+KP$*YTN6$x&Rsi+eZnf2%r=h)|%sR7b2YX?8~DR+Z}?REUNg}kcN)T?LC zaSn}IS6|C|GJM9Xt9-Cdtf8w_Nz^#Nt0^v{zFdr9`>tsX$784C*UbR`{H{P09TI#; z&u_IwT!-e+EP{tDw5)2idvrY%YF?S$4_L#6w>JDz9a=61S4!MipFqYGJ;J^ii?`KP zfhjfmt~uC$TcYN-CgE`7bSNCba#dgTB&tqfD|ojLt)}^mr={8t!_td1B$&p zVD}373LBJ7J5gsSZ1Mv4JXhd(|85qPp?J60<`r^cx%zqt6gbkX4}Xq?&UzfnYNeCn zdj!sa(B~>No{wlQ?QC{C^qSnW2#oiVA8$bm1_t)}TK47YIOPrA#6LOjv9yte$WCYK zgnYR$I1E|Ml-P;r&osU+8}yD}Z#X)4@w&OsJD_K#%Is2lN6{OmPnYRo^?d$hx-M2$ z#Ma;0`s8l7eYqCt$@-q4Z_u@U*Ne5P?DK%bm_1UcU%QkRW;MuCaJJx6wo87~s?*P)S7NLe)ZVR#4bD8xXaj#)&z{_{MWUM?V@3Bh zk$RT&SnPcVc6}sWer6 zRRPE*iWRY?i5D;)DeyV;^JweScw&%qT8F|3zPd9vC-0trY7+LpcIansPL5SJi6Oi6 zeikR^b2!#49HS2P;t{@5FRTU zK#~Z2nkjp1q4z$$o6rU%K4+lb5>#PEcr};_!*!=sF-u_O=mjd&J{gc>x56bwu73c~l zWd~P8||!S=;t+0=W#vj(fgeL7{WoBEUPbbS8|dsox11E)20$SZ|^&6^C^~ zHzw&{kyA33DqC4=M6!K@7i${H)iF9pl zv&hGx?h_}?vI>_x3%LJX2s%fLe6d@(ig6UZ@UrK?|H5;q!CM8V+j?=;=!`Hpsiih8P%0x zK}h7b+wfcPp+5fU&}Ug2!USMGe?t=+E3i}db5@vMc+6OJwf1(P!q?^p^#!{F20D*2 zwggzIiylwD{zAkrraLHsJkHu(!%`p#I;3AGSH$3x6w?3)PNe3-iB0!7{kqE*Pe^c} zhwjrTGqH(6kn33Ss{d<9BqpS0zr_R+$OYZL+#S^OeVF(B z2QbRCE<2vqdy#HU(yS8i3>qw$bwSVQ3R^Z37e1I%0=4F~q7QT^8hf)33Anx7;wl?& z&1rEB%+?p=Sjf=Yxh!xNFK5ayD#!9Spw-@w-?-EC6mw3awmHoe#flK} z*$}a=R0j7(at3c22M4c+G_1N>=nmc9v^Vplo3HxWiv~mX5XW_BG4sFntj!iWG2pYL zSGz-nEvC z2v+VN6+im2DF%It1dXV1+P;{4aM9-8Ng(@VQ%hENU{&{nZ^5*Ltu+NU3FSM8*_NkAW=lt0<|4sdEB#XN{kZprDWyT z9eLYSW?+P6(J-i$Z#1qd^b<&MkOH~ubWGH>$t z3lF~n634;R9hEm;;_GKs>%5{sW3(H{gFXBjt~$;eYmhB>O>T=)A2KpHSjQos!)&yM z?9Sxucqc+c3=goHFOQfFnEKGY*CTk>H$7_VQVmVDeMRHdlKYDyXtHw}b}IH+N1@%8f%R{x69v7*=lTi{aXs%5aL&uqZc z@OMOi4cb9&JD=1@nCxfw@cJSCve}J=`zlwO8Dgss`KeTV!WDe|&L?yx!yZg9Ie>c* z`h>#9LBaJswv3lktYpBn*h)6|MhRzRBtV!GgQ8-r3@I&sB(MPs5#ej=O}XlRdt+pT zRUUH0&tBb)QjVCe!)7-Ta@q9>3%YXjTE;+W!xUvwpD?!$G#3i{hLM7XKUNG~%@>06~9ht2+#IVG8;qrvIv{K+sw_nr}B8r6kXjE)fEL$Dbd1YvDJ;vhd%%Qp_8_ zhG#S?J`|wjm#VMF&sLc&{mhU|TEVBy{#?$j zb3f0x{|y9>`~0Qsw80f)(abizfinPv%|+^6qZ=v;S~Djb)8L{&TVf+q#g`NX#Kk*h z{P?G(;)2M}={E~@2DE{(!gBToh?Ra*1NgHI=cFV(ZaCT;3S*>}G=-<7zHg{E9%g0d z4z@4}`3FUuk^YECZC{X#UwY?b;Ci}-nBbh%={UG(RnV___e@j7oLJ?scRk1Wq6Sl) z)yHmbNA5_MA8@40AJZ2ZA3_QV-4(`ZDO4{9)LFStY;aY7MbFu~iyhr7{OpWaHb@!@ zoZHvqQe`Wr%}?kRrX zdou!4+qy-+1QSMl)qCEISaIF>E}KmfVcAQ8Dm}m^Lqk6|AWeH0K8R+sSpu&~*A&)< zUYD=UrhBe#2{@}{3GszVZ-c{@`o(*eROnK@KWm=p_xh+BqCb!*tyj>cBV)VlZJFILFMJoi0^8zqJ04VIuwdO9>6Yvu;iLECVe&93-7lQi?)Ln8_e}uka z>*07n_H#VAjYgR?_h*Zyg$(O)Ef;66faORB%QY7icNNF3g-#5pj^%mzQw1=?*A(fR ztf}7h^LD*vX_I?WbDVV575J=1yB2@5u~@kl|6H)dXfViVl3oJ+l4rHx)UbQ5OC^T_ ztr>-jB2g~I*?y7A%xZ>$HeE9__v)->=7izfEOdRHx3E|D0iVx3&$2vK3k8b?hqqZy z7VwikBXsPvt)iAzLK{>VP z(c(ZE#YA|$QHEdD`s5abc>LQ_&yrh>ryCvTU-6f;(qCn_KbIgobU~0^N0ba(+(!Ev z`k90`U1YT41$?vxr9az89iQ zc$~NW3&Y8rm;e6Nij*}I$$uCDSfZYYvKtCbQ0V|9LmJ!qK@r_2*j~zAKf&?V{*L{6 zj^64~C>0LZsH1$U7^Ihrd-*-hF21zV_m+YBKqu@T7qVEi+5>4_mdF~VyvyL{Ji{_! z4Fu-;$UC_n6g6a46I0 z1q3HPqOskPQCUGZGZn*s$1r4w0@kUy`gjdx7f(voyIM{IN@iAij%9~Hw6czbU)NOx zMSoKH3W0HU<~1imVi?=^dNZ1C)hG|;VpYDfq@&Q-cjB(%j{pm;BRYY=sT`>pW9i_S z7tKlCSDiQ8=3jN&pN9%Z>9R@E!}=4h%%A58JXP-b{zp)gvlK!=oxCg3y+4IG)`TQo zD<0gxf~Z-3hu#ytRd>J;Wda+;xv4!LPno__b3-y+T=s<4$aN7-1e@Vu6+G@j^1^ho zyq#b03h-}^-uIOZ&FQw6-5mS>3?o=0LfHR?E)MDQO~_tjTzAVmxyBD*9jeV=(2|Z0 z8Us8BH;Geg0P8{eC!X=>psSwAjS0C3_$m@xT}7GpFmD)S^S8x;Asi$ZNvcYIe2p&T z1vYL7#jCAxjbyYqc``>NA138fyTWT#!1wPuXEa~UtEKk)&FlV(A#cexg3GhleKwZa zmudF}d>L&|N^xKh&07C8E8nMUR)S?N(IqZPI1wP}TjZ6a?w-R!Y&0fd%W^OFyV^p; zE?+Lx&S~0AOJd?4wuT{YB)=A&b~wT8O(C!6EH7p8d#1#UnBR+Vn4$M#9-!1+3g)SI z9Nj`DLOY4LJapDwy&boy*zY_*>|1>4nRPYSjT2{MqkEtsc1kiv$XCkB59^#vV{89Z zF1vWE@vqLEH0h`J&n553SzF9jn~Gd+`u9qpyGZAJOA`7_vYhdrr;=f_S-21(zEO1F zO#@`;wVMhAr7nxUi8FNdZVVofAh-Q$FWRk!37s;K1g_xys237R>r(&HKKzFa;=hJcNu-+rLZ?7dM*tEjKC77P zqmoHeH=Q+Jqj-93qORMYcvt@GWs;TFyRm;N_Wnc1_kW4^&Np&gSN}CB?uxSlj}<$h z*h`waLcDe!c7X?RHVXZ)Iw2i$J@EQ`A%|@(1=@w^K<<`;XzZpHF~b7h)c$ z${uJ4{|L+>SwFYc=5?0<5F+`o^Z)2D1Fziw>@Xj-o#%h&nJ~5&pWxQh2WHSsaJ@YJ z1n2@ehx(Px622eH#=9ym(&&D!eXCV~Uk&As9!5zON-F+coSB^+W)6cPDMyu&EMF zV1by5*i!yUshea6;1gx8N3jhdS6I~!zwx}#8|rDccO?EF{QaIu0LY{E0c{VGr>)le7dwj}-DB2N3@MjjU{6j~3d8VQ#5xDw}udb`~Q(DD(zg2U7G0c!Q zFkDpG7m13fz>G_y4*_AD=(Wwta=LW>OWab8*2>jKhQ+skj9P*;!7mr5e?fuxFTIl)fmSB%Wh#3!{UGuuB9Ml<*4my-7HH^oG+K_@&OR8_<(Cq6~LAdbFm0rI%>1`on