From c38da4843c943310acffbdc96c2a5f03721efe76 Mon Sep 17 00:00:00 2001 From: MHeinrichs Date: Sun, 25 May 2014 21:00:40 +0200 Subject: [PATCH] DMA-(potentially) working version but only 25Mhz --- Layout and PCB/68030-TK-V09c.b## | 8117 +++++++++ Layout and PCB/68030-TK-V09c.s## | 14416 ++++++++++++++++ Logic/68030-68000-bus-DMA-Working.vhd | 453 + Logic/68030-68000-bus.vhd | 93 +- Logic/68030_TK.STY | 2 + Logic/68030_TK.cmi | 7 +- Logic/68030_TK.lci | 9 +- Logic/68030_TK.lct | 9 +- Logic/68030_TK.tcl | 7407 ++++++++ Logic/68030_tk.bl2 | 2011 +-- Logic/68030_tk.bl3 | 1022 +- Logic/68030_tk.crf | 2 +- Logic/68030_tk.eq3 | 392 +- Logic/68030_tk.fti | 174 +- Logic/68030_tk.grp | 28 +- Logic/68030_tk.ipr | 2 +- Logic/68030_tk.jed | 647 +- Logic/68030_tk.lco | 100 +- Logic/68030_tk.out | 4219 +++++ Logic/68030_tk.plc | 102 +- Logic/68030_tk.prd | 714 +- Logic/68030_tk.rpt | 1013 +- Logic/68030_tk.tal | 32 +- Logic/68030_tk.tlg | 34 + Logic/68030_tk.trp | 537 + Logic/68030_tk.tt2 | 760 +- Logic/68030_tk.tt3 | 760 +- Logic/68030_tk.tt4 | 369 +- Logic/68030_tk.tte | 369 +- Logic/68030_tk.vcl | 64 +- Logic/68030_tk.vco | 100 +- Logic/68030_tk.vct | 6 +- Logic/68030_tk.xrf | 2 +- Logic/BUS68030.bl0 | 2033 +-- Logic/BUS68030.bl1 | 2011 +-- Logic/BUS68030.cmd | 8 - Logic/BUS68030.edi | 3318 ++-- Logic/BUS68030.fse | 46 +- Logic/BUS68030.prj | 2 +- Logic/BUS68030.srm | 3835 ++-- Logic/BUS68030.srr | 28 +- Logic/BUS68030.srs | Bin 10365 -> 10418 bytes Logic/bus68030.exf | 620 +- Logic/bus68030.srf | 28 +- Logic/dm/BUS68030_compiler.xdm | 1 + Logic/run_options.txt | 2 +- Logic/synlog/bus68030_fpga_mapper.srr | 13 +- .../synlog/report/BUS68030_compiler_notes.txt | 4 +- .../report/BUS68030_compiler_runstatus.xml | 6 +- .../report/BUS68030_compiler_warnings.txt | 7 +- .../report/BUS68030_fpga_mapper_runstatus.xml | 4 +- .../report/BUS68030_fpga_mapper_warnings.txt | 1 - Logic/syntmp/run_option.xml | 2 +- Logic/synwork/BUS68030_compiler.fdep | 2 +- Logic/synwork/BUS68030_compiler.fdeporig | 2 +- Logic/synwork/BUS68030_compiler.srs | Bin 10365 -> 10418 bytes Logic/synwork/BUS68030_compiler.tlg | 11 +- 57 files changed, 45798 insertions(+), 10158 deletions(-) create mode 100644 Layout and PCB/68030-TK-V09c.b## create mode 100644 Layout and PCB/68030-TK-V09c.s## create mode 100644 Logic/68030-68000-bus-DMA-Working.vhd create mode 100644 Logic/68030_tk.tlg create mode 100644 Logic/68030_tk.trp delete mode 100644 Logic/BUS68030.cmd diff --git a/Layout and PCB/68030-TK-V09c.b## b/Layout and PCB/68030-TK-V09c.b## new file mode 100644 index 0000000..291b0f3 --- /dev/null +++ b/Layout and PCB/68030-TK-V09c.b## @@ -0,0 +1,8117 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +TOP +Bot +a1k.org 68030-TK v0.9b +(c) 2013 Matthias +Heinrichs +a1k.org 68030-TK V0.9 +(c)2013 Matthias Heinrichs +Free for non commercial +reproduction + +JTAG + + + +<b>Motorola MC68000 Processors</b><p> +<author>Created by librarian@cadsoft.de</author> + + +<b>micro Ball Grid Array</b> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + +<b>Dual In Line</b> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + +<b>PLASTIC LEADED CHIP CARRIER</b><p> +square + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +<b>Resistors, Capacitors, Inductors</b><p> +Based on the previous libraries: +<ul> +<li>r.lbr +<li>cap.lbr +<li>cap-fe.lbr +<li>captant.lbr +<li>polcap.lbr +<li>ipc-smd.lbr +</ul> +All SMD packages are defined according to the IPC specifications and CECC<p> +<author>Created by librarian@cadsoft.de</author><p> +<p> +for Electrolyt Capacitors see also :<p> +www.bccomponents.com <p> +www.panasonic.com<p> +www.kemet.com<p> +http://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf <b>(SANYO)</b> +<p> +for trimmer refence see : <u>www.electrospec-inc.com/cross_references/trimpotcrossref.asp</u><p> + +<table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0> +<tr valign="top"> + +<! <td width="10">&nbsp;</td> +<td width="90%"> + +<b><font color="#0000FF" size="4">TRIM-POT CROSS REFERENCE</font></b> +<P> +<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2> + <TR> + <TD COLSPAN=8> + <FONT SIZE=3 FACE=ARIAL><B>RECTANGULAR MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">BOURNS</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">BI&nbsp;TECH</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">DALE-VISHAY</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">PHILIPS/MEPCO</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">MURATA</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">PANASONIC</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">SPECTROL</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">MILSPEC</FONT> + </B> + </TD><TD>&nbsp;</TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3 > + 3005P<BR> + 3006P<BR> + 3006W<BR> + 3006Y<BR> + 3009P<BR> + 3009W<BR> + 3009Y<BR> + 3057J<BR> + 3057L<BR> + 3057P<BR> + 3057Y<BR> + 3059J<BR> + 3059L<BR> + 3059P<BR> + 3059Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 89P<BR> + 89W<BR> + 89X<BR> + 89PH<BR> + 76P<BR> + 89XH<BR> + 78SLT<BR> + 78L&nbsp;ALT<BR> + 56P&nbsp;ALT<BR> + 78P&nbsp;ALT<BR> + T8S<BR> + 78L<BR> + 56P<BR> + 78P<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + T18/784<BR> + 783<BR> + 781<BR> + -<BR> + -<BR> + -<BR> + 2199<BR> + 1697/1897<BR> + 1680/1880<BR> + 2187<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 8035EKP/CT20/RJ-20P<BR> + -<BR> + RJ-20X<BR> + -<BR> + -<BR> + -<BR> + 1211L<BR> + 8012EKQ&nbsp;ALT<BR> + 8012EKR&nbsp;ALT<BR> + 1211P<BR> + 8012EKJ<BR> + 8012EKL<BR> + 8012EKQ<BR> + 8012EKR<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 2101P<BR> + 2101W<BR> + 2101Y<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 2102L<BR> + 2102S<BR> + 2102Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + EVMCOG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 43P<BR> + 43W<BR> + 43Y<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 40L<BR> + 40P<BR> + 40Y<BR> + 70Y-T602<BR> + 70L<BR> + 70P<BR> + 70Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + RT/RTR12<BR> + RT/RTR12<BR> + RT/RTR12<BR> + -<BR> + RJ/RJR12<BR> + RJ/RJR12<BR> + RJ/RJR12<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SQUARE MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3250L<BR> + 3250P<BR> + 3250W<BR> + 3250X<BR> + 3252P<BR> + 3252W<BR> + 3252X<BR> + 3260P<BR> + 3260W<BR> + 3260X<BR> + 3262P<BR> + 3262W<BR> + 3262X<BR> + 3266P<BR> + 3266W<BR> + 3266X<BR> + 3290H<BR> + 3290P<BR> + 3290W<BR> + 3292P<BR> + 3292W<BR> + 3292X<BR> + 3296P<BR> + 3296W<BR> + 3296X<BR> + 3296Y<BR> + 3296Z<BR> + 3299P<BR> + 3299W<BR> + 3299X<BR> + 3299Y<BR> + 3299Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + -<BR> + 64W&nbsp;ALT<BR> + -<BR> + 64P&nbsp;ALT<BR> + 64W&nbsp;ALT<BR> + 64X&nbsp;ALT<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66P<BR> + 66W<BR> + 66X<BR> + 67P<BR> + 67W<BR> + 67X<BR> + 67Y<BR> + 67Z<BR> + 68P<BR> + 68W<BR> + 68X<BR> + 67Y&nbsp;ALT<BR> + 67Z&nbsp;ALT<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 5050<BR> + 5091<BR> + 5080<BR> + 5087<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + T63YB<BR> + T63XB<BR> + -<BR> + -<BR> + -<BR> + 5887<BR> + 5891<BR> + 5880<BR> + -<BR> + -<BR> + -<BR> + T93Z<BR> + T93YA<BR> + T93XA<BR> + T93YB<BR> + T93XB<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 8026EKP<BR> + 8026EKW<BR> + 8026EKM<BR> + 8026EKP<BR> + 8026EKB<BR> + 8026EKM<BR> + 1309X<BR> + 1309P<BR> + 1309W<BR> + 8024EKP<BR> + 8024EKW<BR> + 8024EKN<BR> + RJ-9P/CT9P<BR> + RJ-9W<BR> + RJ-9X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3105P/3106P<BR> + 3105W/3106W<BR> + 3105X/3106X<BR> + 3105Y/3106Y<BR> + 3105Z/3105Z<BR> + 3102P<BR> + 3102W<BR> + 3102X<BR> + 3102Y<BR> + 3102Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMCBG<BR> + EVMCCG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 55-1-X<BR> + 55-4-X<BR> + 55-3-X<BR> + 55-2-X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 50-2-X<BR> + 50-4-X<BR> + 50-3-X<BR> + -<BR> + -<BR> + -<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 64Y<BR> + 64Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3323P<BR> + 3323S<BR> + 3323W<BR> + 3329H<BR> + 3329P<BR> + 3329W<BR> + 3339H<BR> + 3339P<BR> + 3339W<BR> + 3352E<BR> + 3352H<BR> + 3352K<BR> + 3352P<BR> + 3352T<BR> + 3352V<BR> + 3352W<BR> + 3362H<BR> + 3362M<BR> + 3362P<BR> + 3362R<BR> + 3362S<BR> + 3362U<BR> + 3362W<BR> + 3362X<BR> + 3386B<BR> + 3386C<BR> + 3386F<BR> + 3386H<BR> + 3386K<BR> + 3386M<BR> + 3386P<BR> + 3386S<BR> + 3386W<BR> + 3386X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 25P<BR> + 25S<BR> + 25RX<BR> + 82P<BR> + 82M<BR> + 82PA<BR> + -<BR> + -<BR> + -<BR> + 91E<BR> + 91X<BR> + 91T<BR> + 91B<BR> + 91A<BR> + 91V<BR> + 91W<BR> + 25W<BR> + 25V<BR> + 25P<BR> + -<BR> + 25S<BR> + 25U<BR> + 25RX<BR> + 25X<BR> + 72XW<BR> + 72XL<BR> + 72PM<BR> + 72RX<BR> + -<BR> + 72PX<BR> + 72P<BR> + 72RXW<BR> + 72RXL<BR> + 72X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + T7YB<BR> + T7YA<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + TXD<BR> + TYA<BR> + TYP<BR> + -<BR> + TYD<BR> + TX<BR> + -<BR> + 150SX<BR> + 100SX<BR> + 102T<BR> + 101S<BR> + 190T<BR> + 150TX<BR> + 101<BR> + -<BR> + -<BR> + 101SX<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ET6P<BR> + ET6S<BR> + ET6X<BR> + RJ-6W/8014EMW<BR> + RJ-6P/8014EMP<BR> + RJ-6X/8014EMX<BR> + TM7W<BR> + TM7P<BR> + TM7X<BR> + -<BR> + 8017SMS<BR> + -<BR> + 8017SMB<BR> + 8017SMA<BR> + -<BR> + -<BR> + CT-6W<BR> + CT-6H<BR> + CT-6P<BR> + CT-6R<BR> + -<BR> + CT-6V<BR> + CT-6X<BR> + -<BR> + -<BR> + 8038EKV<BR> + -<BR> + 8038EKX<BR> + -<BR> + -<BR> + 8038EKP<BR> + 8038EKZ<BR> + 8038EKW<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 3321H<BR> + 3321P<BR> + 3321N<BR> + 1102H<BR> + 1102P<BR> + 1102T<BR> + RVA0911V304A<BR> + -<BR> + RVA0911H413A<BR> + RVG0707V100A<BR> + RVA0607V(H)306A<BR> + RVA1214H213A<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3104B<BR> + 3104C<BR> + 3104F<BR> + 3104H<BR> + -<BR> + 3104M<BR> + 3104P<BR> + 3104S<BR> + 3104W<BR> + 3104X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + EVMQ0G<BR> + EVMQIG<BR> + EVMQ3G<BR> + EVMS0G<BR> + EVMQ0G<BR> + EVMG0G<BR> + -<BR> + -<BR> + -<BR> + EVMK4GA00B<BR> + EVM30GA00B<BR> + EVMK0GA00B<BR> + EVM38GA00B<BR> + EVMB6<BR> + EVLQ0<BR> + -<BR> + EVMMSG<BR> + EVMMBG<BR> + EVMMAG<BR> + -<BR> + -<BR> + EVMMCS<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMM1<BR> + -<BR> + -<BR> + EVMM0<BR> + -<BR> + -<BR> + EVMM3<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 62-3-1<BR> + 62-1-2<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 67R<BR> + -<BR> + 67P<BR> + -<BR> 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BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 23B<BR> + 23A<BR> + 21X<BR> + 21W<BR> + -<BR> + 22B<BR> + 22A<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ST5YL/ST53YL<BR> + ST5YJ/5T53YJ<BR> + ST-23A<BR> + ST-22B<BR> + ST-22<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ST-4B<BR> + ST-4A<BR> + -<BR> + -<BR> + -<BR> + ST-3B<BR> + ST-3A<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + EVM-6YS<BR> + EVM-1E<BR> + EVM-1G<BR> + EVM-1D<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + G4B<BR> + G4A<BR> + TR04-3S1<BR> + TRG04-2S1<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + DVR-43A<BR> + CVR-42C<BR> + CVR-42A/C<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> +</TABLE> +<P> +<FONT SIZE=4 FACE=ARIAL><B>ALT =&nbsp;ALTERNATE</B></FONT> +<P> + +&nbsp; +<P> +</td> +</tr> +</table> + + +<b>Ceramic Chip Capacitor KEMET 0603 reflow solder</b><p> +Metric Code Size 1608 + + + + +>NAME +>VALUE + + + + +<b>Ceramic Chip Capacitor KEMET 0805 reflow solder</b><p> +Metric Code Size 2012 + + + + +>NAME +>VALUE + + + + +<b>RESISTOR</b><p> + + + + + + + + +>NAME +>VALUE + + + + + +<b>RESISTOR</b> + + + + + + + + +>NAME +>VALUE + + + + + +<b>CAPACITOR</b> + + + + + + + + +>NAME +>VALUE + + + + + + + +<b>TTL Devices, 74xx Series with European Symbols</b><p> +Based on the following sources: +<ul> +<li>Texas Instruments <i>TTL Data Book</i>&nbsp;&nbsp;&nbsp;Volume 1, 1996. +<li>TTL Data Book, Volume 2 , 1993 +<li>National Seminconductor Databook 1990, ALS/LS Logic +<li>ttl 74er digital data dictionary, ECA Electronic + Acustic GmbH, ISBN 3-88109-032-0 +<li>http://icmaster.com/ViewCompare.asp +</ul> +<author>Created by librarian@cadsoft.de</author> + + +<b>Wide Small Outline package</b> 300 mil + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>VALUE +>NAME + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +<b>Harting & 3M Connectors</b><p> +Low profile connectors, straight<p> +<author>Created by librarian@cadsoft.de</author> + + +<b>HARTING</b> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +10 +>NAME +>VALUE +1 +2 + + + + + + + + + + + + + + +<b>Crystals and Crystal Resonators</b><p> +<author>Created by librarian@cadsoft.de</author> + + +<b>CRYSTAL RESONATOR</b> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE +1 + + + + +<b>VG Connectors (DIN 41612/DIN 41617)</b><p> +The library contains devices which allow to place the contacts individually or +in one or several blocks.<p> +This behavior is indicated by the key words <i>single</i> and <i>block</i> in +the respective device descriptions.<p> +<author>Created by librarian@cadsoft.de</author> + + +<b>CONNECTOR</b><p> +female, 96 pins, type R, rows ABC, grid 2.54 mm + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE +1 +a +b +c +32 +DIN41612-R + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +<b>Resistors in DIL Packages</b><p> +<author>Created by librarian@cadsoft.de</author> + + +<b>Chip Resistor Array 0603x4</b> 4 resistors in 3.20 mm x 1.60 mm size<p> +Source: PANASONIC .. aoc0000ce1.pdf + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + +<b>AMD MACH4/MACH5 Family (Vantis)</b><p> +<author>Created by librarian@cadsoft.de</author> + + +<b>THIN QUAD FLAT PACK</b> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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Die Optionen Shapes und Misc sind nicht relevant und der minimale und maximale Wert für Roundness Shapes kann frei gewählt werden. Nach unten abweichende Design-Regeln sind möglich, können jedoch Aufpreise erfordern. Hinweis: Freistellungen und Streichstärken von Bestückungsdruck werden nicht im DRC geprüft! +<br><br> +<b>Übersicht der LeitOn Regeln:</b<<br><br> +<u>allgemein:</u><br> +minimale Leiterbahnbreite/-abstand: <b>0.15 mm</b><br> +(Strichstärke für Kupferschrift sollte mind. 0.2 mm sein um gut lesbar zu bleiben)<br> +kleinster Bohrdurchmesser: <b>0.3 mm</b><br><br> +<u>Kupferrestringe um DK-Bohrungen:</u><br> +Aussenlagen: <b>0.15 mm</b><br> +Innenlagen: <b>0.2 mm</b><br> +<br> +<u>Masselagen-Freimachungen:</u><br> +Innenlagen: <b>0.35 mm</b><br> +<br> +<u>Bestückungsdruck</u><br> +minimale Strichstärke: <b>0.2 mm</b><br><br> +<b><u><font color= "blue">Wichtig:</font></b></u> Verwenden Sie als Strichstärke für Masseflächen keine Strichstärken kleiner 0.1mm. Es entstehen sonst extrem große Datenmengen, weil Eagle die Massefläche stets mit Polygonen der gleichen Strichstärke füllt. + +</p> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3250L<BR> + 3250P<BR> + 3250W<BR> + 3250X<BR> + 3252P<BR> + 3252W<BR> + 3252X<BR> + 3260P<BR> + 3260W<BR> + 3260X<BR> + 3262P<BR> + 3262W<BR> + 3262X<BR> + 3266P<BR> + 3266W<BR> + 3266X<BR> + 3290H<BR> + 3290P<BR> + 3290W<BR> + 3292P<BR> + 3292W<BR> + 3292X<BR> + 3296P<BR> + 3296W<BR> + 3296X<BR> + 3296Y<BR> + 3296Z<BR> + 3299P<BR> + 3299W<BR> + 3299X<BR> + 3299Y<BR> + 3299Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + -<BR> + 64W&nbsp;ALT<BR> + -<BR> + 64P&nbsp;ALT<BR> + 64W&nbsp;ALT<BR> + 64X&nbsp;ALT<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66P<BR> + 66W<BR> + 66X<BR> + 67P<BR> + 67W<BR> + 67X<BR> + 67Y<BR> + 67Z<BR> + 68P<BR> + 68W<BR> + 68X<BR> + 67Y&nbsp;ALT<BR> + 67Z&nbsp;ALT<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 5050<BR> + 5091<BR> + 5080<BR> + 5087<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + T63YB<BR> + T63XB<BR> + -<BR> + -<BR> + -<BR> + 5887<BR> + 5891<BR> + 5880<BR> + -<BR> + -<BR> + -<BR> + T93Z<BR> + T93YA<BR> + T93XA<BR> + T93YB<BR> + T93XB<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 8026EKP<BR> + 8026EKW<BR> + 8026EKM<BR> + 8026EKP<BR> + 8026EKB<BR> + 8026EKM<BR> + 1309X<BR> + 1309P<BR> + 1309W<BR> + 8024EKP<BR> + 8024EKW<BR> + 8024EKN<BR> + RJ-9P/CT9P<BR> + RJ-9W<BR> + RJ-9X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3105P/3106P<BR> + 3105W/3106W<BR> + 3105X/3106X<BR> + 3105Y/3106Y<BR> + 3105Z/3105Z<BR> + 3102P<BR> + 3102W<BR> + 3102X<BR> + 3102Y<BR> + 3102Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMCBG<BR> + EVMCCG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 55-1-X<BR> + 55-4-X<BR> + 55-3-X<BR> + 55-2-X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 50-2-X<BR> + 50-4-X<BR> + 50-3-X<BR> + -<BR> + -<BR> + -<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 64Y<BR> + 64Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3323P<BR> + 3323S<BR> + 3323W<BR> + 3329H<BR> + 3329P<BR> + 3329W<BR> + 3339H<BR> + 3339P<BR> + 3339W<BR> + 3352E<BR> + 3352H<BR> + 3352K<BR> + 3352P<BR> + 3352T<BR> + 3352V<BR> + 3352W<BR> + 3362H<BR> + 3362M<BR> + 3362P<BR> + 3362R<BR> + 3362S<BR> + 3362U<BR> + 3362W<BR> + 3362X<BR> + 3386B<BR> + 3386C<BR> + 3386F<BR> + 3386H<BR> + 3386K<BR> + 3386M<BR> + 3386P<BR> + 3386S<BR> + 3386W<BR> + 3386X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 25P<BR> + 25S<BR> + 25RX<BR> + 82P<BR> + 82M<BR> + 82PA<BR> + -<BR> + -<BR> + -<BR> + 91E<BR> + 91X<BR> + 91T<BR> + 91B<BR> + 91A<BR> + 91V<BR> + 91W<BR> + 25W<BR> + 25V<BR> + 25P<BR> + -<BR> + 25S<BR> + 25U<BR> + 25RX<BR> + 25X<BR> + 72XW<BR> + 72XL<BR> + 72PM<BR> + 72RX<BR> + -<BR> + 72PX<BR> + 72P<BR> + 72RXW<BR> + 72RXL<BR> + 72X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + T7YB<BR> + T7YA<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + TXD<BR> + TYA<BR> + TYP<BR> + -<BR> + TYD<BR> + TX<BR> + -<BR> + 150SX<BR> + 100SX<BR> + 102T<BR> + 101S<BR> + 190T<BR> + 150TX<BR> + 101<BR> + -<BR> + -<BR> + 101SX<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ET6P<BR> + ET6S<BR> + ET6X<BR> + RJ-6W/8014EMW<BR> + RJ-6P/8014EMP<BR> + RJ-6X/8014EMX<BR> + TM7W<BR> + TM7P<BR> + TM7X<BR> + -<BR> + 8017SMS<BR> + -<BR> + 8017SMB<BR> + 8017SMA<BR> + -<BR> + -<BR> + CT-6W<BR> + CT-6H<BR> + CT-6P<BR> + CT-6R<BR> + -<BR> + CT-6V<BR> + CT-6X<BR> + -<BR> + -<BR> + 8038EKV<BR> + -<BR> + 8038EKX<BR> + -<BR> + -<BR> + 8038EKP<BR> + 8038EKZ<BR> + 8038EKW<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 3321H<BR> + 3321P<BR> + 3321N<BR> + 1102H<BR> + 1102P<BR> + 1102T<BR> + RVA0911V304A<BR> + -<BR> + RVA0911H413A<BR> + RVG0707V100A<BR> + RVA0607V(H)306A<BR> + RVA1214H213A<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3104B<BR> + 3104C<BR> + 3104F<BR> + 3104H<BR> + -<BR> + 3104M<BR> + 3104P<BR> + 3104S<BR> + 3104W<BR> + 3104X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + EVMQ0G<BR> + EVMQIG<BR> + EVMQ3G<BR> + EVMS0G<BR> + EVMQ0G<BR> + EVMG0G<BR> + -<BR> + -<BR> + -<BR> + EVMK4GA00B<BR> + EVM30GA00B<BR> + EVMK0GA00B<BR> + EVM38GA00B<BR> + EVMB6<BR> + EVLQ0<BR> + -<BR> + EVMMSG<BR> + EVMMBG<BR> + EVMMAG<BR> + -<BR> + -<BR> + EVMMCS<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMM1<BR> + -<BR> + -<BR> + EVMM0<BR> + -<BR> + -<BR> + EVMM3<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 62-3-1<BR> + 62-1-2<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 67R<BR> + -<BR> + 67P<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 67X<BR> + 63V<BR> + 63S<BR> + 63M<BR> + -<BR> + -<BR> + 63H<BR> + 63P<BR> + -<BR> + -<BR> + 63X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + RJ/RJR50<BR> + RJ/RJR50<BR> + RJ/RJR50<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> +</TABLE> +<P>&nbsp;<P> +<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3> + <TR> + <TD COLSPAN=7> + <FONT color="#0000FF" SIZE=4 FACE=ARIAL><B>SMD TRIM-POT CROSS REFERENCE</B></FONT> + <P> + <FONT SIZE=4 FACE=ARIAL><B>MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3224G<BR> + 3224J<BR> + 3224W<BR> + 3269P<BR> + 3269W<BR> + 3269X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 44G<BR> + 44J<BR> + 44W<BR> + 84P<BR> + 84W<BR> + 84X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + ST63Z<BR> + ST63Y<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + ST5P<BR> + ST5W<BR> + ST5X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=7>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=7> + <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT> + </TD> + </TR> + <TR> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3314G<BR> + 3314J<BR> + 3364A/B<BR> + 3364C/D<BR> + 3364W/X<BR> + 3313G<BR> + 3313J<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 23B<BR> + 23A<BR> + 21X<BR> + 21W<BR> + -<BR> + 22B<BR> + 22A<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ST5YL/ST53YL<BR> + ST5YJ/5T53YJ<BR> + ST-23A<BR> + ST-22B<BR> + ST-22<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ST-4B<BR> + ST-4A<BR> + -<BR> + -<BR> + -<BR> + ST-3B<BR> + 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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Logic/68030-68000-bus-DMA-Working.vhd b/Logic/68030-68000-bus-DMA-Working.vhd new file mode 100644 index 0000000..29b171a --- /dev/null +++ b/Logic/68030-68000-bus-DMA-Working.vhd @@ -0,0 +1,453 @@ +-- Copyright: Matthias Heinrichs 2014 +-- Free for non-comercial use +-- No warranty just for fun +-- I you want to earn money with this code, ask me first! + + + +library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_arith.all; +use ieee.std_logic_unsigned.all; + +entity BUS68030 is + +port( + AS_030: inout std_logic ; + AS_000: inout std_logic ; + DS_030: inout std_logic ; + UDS_000: inout std_logic; + LDS_000: inout std_logic; + SIZE: inout std_logic_vector ( 1 downto 0 ); + A: inout std_logic_vector ( 31 downto 0 ); + nEXP_SPACE: in std_logic ; + BERR: inout std_logic ; + BG_030: in std_logic ; + BG_000: out std_logic ; + BGACK_030: out std_logic ; + BGACK_000: in std_logic ; + CLK_030: in std_logic ; + CLK_000: in std_logic ; + CLK_OSZI: in std_logic ; + CLK_DIV_OUT: out std_logic ; + CLK_EXP: out std_logic ; + FPU_CS: out std_logic ; + IPL_030: out std_logic_vector ( 2 downto 0 ); + IPL: in std_logic_vector ( 2 downto 0 ); + DSACK: inout std_logic_vector ( 1 downto 0 ); + DTACK: inout std_logic ; + AVEC: out std_logic ; + AVEC_EXP: inout std_logic ; --this is a "free pin" + E: out std_logic ; + VPA: in std_logic ; + VMA: out std_logic ; + RST: in std_logic ; + RESET: out std_logic ; + RW: in std_logic ; +-- D: inout std_logic_vector ( 31 downto 28 ); + FC: in std_logic_vector ( 1 downto 0 ); + AMIGA_BUS_ENABLE: out std_logic ; + AMIGA_BUS_DATA_DIR: out std_logic ; + AMIGA_BUS_ENABLE_LOW: out std_logic; + CIIN: out std_logic + ); +end BUS68030; + +architecture Behavioral of BUS68030 is + + +subtype ESTATE is std_logic_vector(3 downto 0); + +constant E1 : ESTATE := "0110"; +constant E2 : ESTATE := "0111"; +constant E3 : ESTATE := "0100"; +constant E4 : ESTATE := "0101"; +constant E5 : ESTATE := "0010"; +constant E6 : ESTATE := "0011"; +constant E7 : ESTATE := "1010"; +constant E8 : ESTATE := "1011"; +constant E9 : ESTATE := "1100"; +constant E10 : ESTATE := "1111"; +-- Illegal states +constant E20 : ESTATE := "0000"; +constant E4a : ESTATE := "0001"; +constant E21 : ESTATE := "1000"; +constant E22 : ESTATE := "1001"; +constant E23 : ESTATE := "1101"; +constant E24 : ESTATE := "1110"; + +signal cpu_est : ESTATE := E20; +signal cpu_est_d : ESTATE := E20; + +subtype AMIGA_STATE is std_logic_vector(2 downto 0); + +constant IDLE_P : AMIGA_STATE := "000"; +constant IDLE_N : AMIGA_STATE := "001"; +constant AS_SET_P : AMIGA_STATE := "010"; +constant AS_SET_N : AMIGA_STATE := "011"; +constant SAMPLE_DTACK_P: AMIGA_STATE := "100"; +constant DATA_FETCH_N: AMIGA_STATE := "101"; +constant DATA_FETCH_P : AMIGA_STATE := "110"; +constant END_CYCLE_N : AMIGA_STATE := "111"; + +signal SM_AMIGA : AMIGA_STATE := IDLE_P; + +--signal Dout:STD_LOGIC_VECTOR(3 downto 0) := "0000"; +signal AS_000_INT:STD_LOGIC:= '1'; +signal AS_030_000_SYNC:STD_LOGIC:= '1'; +signal BGACK_030_INT:STD_LOGIC:= '1'; +signal DTACK_SYNC:STD_LOGIC:= '1'; +signal DTACK_DMA:STD_LOGIC:= '1'; +signal FPU_CS_INT:STD_LOGIC:= '1'; +signal VPA_D: STD_LOGIC:='1'; +signal VPA_SYNC: STD_LOGIC:='1'; +signal VMA_INT: STD_LOGIC:='1'; +signal UDS_000_INT: STD_LOGIC:='1'; +signal LDS_000_INT: STD_LOGIC:='1'; +signal DSACK_INT: STD_LOGIC_VECTOR ( 1 downto 0 ) := "11"; +signal CLK_CNT_P: STD_LOGIC_VECTOR ( 1 downto 0 ) := "00"; +signal CLK_CNT_N: STD_LOGIC_VECTOR ( 1 downto 0 ) := "00"; +signal CLK_REF: STD_LOGIC_VECTOR ( 1 downto 0 ) := "10"; +signal CLK_OUT_PRE: STD_LOGIC:='1'; +signal CLK_OUT_INT: STD_LOGIC:='1'; +signal CLK_030_D: STD_LOGIC:='1'; +signal CLK_000_D0: STD_LOGIC := '1'; +signal CLK_000_D1: STD_LOGIC := '1'; +signal CLK_000_D2: STD_LOGIC := '1'; +signal CLK_000_D3: STD_LOGIC := '1'; +signal CLK_000_D4: STD_LOGIC := '1'; +signal CLK_000_D5: STD_LOGIC := '1'; +signal CLK_000_D6: STD_LOGIC := '1'; + +begin + + + --the clocks + neg_clk: process(RST, CLK_OSZI) + begin + if(RST = '0' ) then + CLK_CNT_N <= "10"; + elsif(falling_edge(CLK_OSZI)) then + --clk generation : up to now just half the clock + if(CLK_CNT_N = "10") then + --CLK_OUT_PRE <= not CLK_OUT_PRE; + CLK_CNT_N <= "00"; + else + CLK_CNT_N <= CLK_CNT_N+1; + end if; + end if; + end process neg_clk; + --the clocks + clk: process(RST, CLK_OSZI) + begin + if(RST = '0' ) then + CLK_CNT_P <= "00"; + RESET <= '0'; + CLK_OUT_PRE <= '0'; + CLK_OUT_INT <= '0'; + cpu_est <= E20; + cpu_est_d <= E20; + VPA_D <= '1'; + CLK_000_D0 <= '1'; + CLK_000_D1 <= '1'; + CLK_000_D2 <= '1'; + CLK_000_D3 <= '1'; + CLK_000_D4 <= '1'; + CLK_000_D5 <= '1'; + CLK_000_D6 <= '1'; + + elsif(rising_edge(CLK_OSZI)) then + --reset buffer + RESET <= '1'; + + --clk generation : up to now just half the clock + if(CLK_CNT_P = "10") then + --CLK_OUT_PRE <= not CLK_OUT_PRE; + CLK_CNT_P <= "00"; + else + CLK_CNT_P <= CLK_CNT_P+1; + end if; + if(CLK_CNT_P ="00" or CLK_CNT_N ="00")then --33MHz Clock + CLK_OUT_PRE <= '0'; + else + CLK_OUT_PRE <= '1'; + end if; + -- the external clock to the processor is generated here + CLK_OUT_INT <= CLK_OUT_PRE; --this way we know the clock of the next state: Its like looking in the future, cool! + --delayed Clocks for edge detection + CLK_000_D0 <= CLK_000; + CLK_000_D1 <= CLK_000_D0; + CLK_000_D2 <= CLK_000_D1; + CLK_000_D3 <= CLK_000_D2; + CLK_000_D4 <= CLK_000_D3; + CLK_000_D5 <= CLK_000_D4; + CLK_000_D6 <= CLK_000_D5; + + + + -- e-clock + if(CLK_000_D1 = '0' and CLK_000_D0 = '1') then + case (cpu_est) is + when E1 => cpu_est <= E2 ; + when E2 => cpu_est <= E3 ; + when E3 => cpu_est <= E4; + when E4 => cpu_est <= E5 ; + when E5 => cpu_est <= E6 ; + when E6 => cpu_est <= E7 ; + when E7 => cpu_est <= E8 ; + when E8 => cpu_est <= E9 ; + when E9 => cpu_est <= E10; + when E10 => cpu_est <= E1 ; + -- Illegal states + when E4a => cpu_est <= E5 ; + when E20 => cpu_est <= E10; + when E21 => cpu_est <= E10; + when E22 => cpu_est <= E9 ; + when E23 => cpu_est <= E9 ; + when E24 => cpu_est <= E10; + when others => + null; + end case; + end if; + cpu_est_d <= cpu_est; + VPA_D <= VPA; + end if; + end process clk; + + + --the state process + state_machine: process(RST, CLK_OSZI) + begin + if(RST = '0' ) then + SM_AMIGA <= IDLE_P; + AS_000_INT <= '1'; + AS_030_000_SYNC <= '1'; + UDS_000_INT <= '1'; + LDS_000_INT <= '1'; + CLK_REF <= "00"; + VMA_INT <= '1'; + FPU_CS_INT <= '1'; + BG_000 <= '1'; + BGACK_030_INT <= '1'; + DSACK_INT <= "11"; + DTACK_DMA <= '1'; + DTACK_SYNC <= '1'; + VPA_SYNC <= '1'; + IPL_030 <= "111"; + AMIGA_BUS_ENABLE <= '1'; + elsif(rising_edge(CLK_OSZI)) then + + + + --bgack is simple: assert as soon as Amiga asserts but hold bg_ack for one amiga-clock + if(BGACK_000='0') then + BGACK_030_INT <= '0'; + elsif (BGACK_000='1' AND CLK_000_D1='0' and CLK_000_D0='1') then -- BGACK_000 is high here! + BGACK_030_INT <= '1'; --hold this signal high until 7m clock goes high + end if; + + --bus grant only in idle state + if(BG_030= '1')then + BG_000 <= '1'; + elsif( BG_030= '0' AND (SM_AMIGA = IDLE_P) + and nEXP_SPACE = '1' and AS_030='1' + and CLK_000='1' ) then --bus granted no local access and no AS_030 running! + BG_000 <= '0'; + end if; + + + --interrupt buffering to avoid ghost interrupts + if(CLK_000_D1='0' and CLK_000_D0='1')then + IPL_030<=IPL; + end if; + + -- as030-sampling and FPU-Select + + + if(AS_030 ='1') then -- "async" reset of various signals + AS_030_000_SYNC <= '1'; + FPU_CS_INT <= '1'; + DSACK_INT <="11"; + AS_000_INT <= '1'; + UDS_000_INT <= '1'; + LDS_000_INT <= '1'; + DTACK_SYNC <= '1'; + VPA_SYNC <= '1'; + AMIGA_BUS_ENABLE <= '1'; + elsif( CLK_030 = '1' AND --68030 has a valid AS on high clocks + AS_030 = '0') then + if(FC(1)='1' and FC(0)='1' and A(19)='0' and A(18)='0' and A(17)='1' and A(16)='0' AND BGACK_000='1') then + FPU_CS_INT <= '0'; + else + if(nEXP_SPACE ='1' and SM_AMIGA = IDLE_P )then + AS_030_000_SYNC <= '0'; + end if; + end if; + end if; + + -- VMA generation + if(CLK_000_D0='0' AND VPA_D='0' AND cpu_est = E4)then --assert + VMA_INT <= '0'; + elsif(CLK_000_D0='1' AND AS_000_INT='1' AND cpu_est=E1)then --deassert + VMA_INT <= '1'; + end if; + + + --Amiga statemachine + case (SM_AMIGA) is + when IDLE_P => --68000:S0 wait for a falling edge + if( CLK_000_D2='0' and CLK_000_D3= '1' and AS_030_000_SYNC = '0')then + SM_AMIGA<=IDLE_N; --go to s1 + end if; + when IDLE_N => --68000:S1 place Adress on bus and wait for rising edge, on a rising CLK_000 look for a amiga adressrobe + if(nEXP_SPACE ='1')then + AMIGA_BUS_ENABLE <= '0' ;--for now: allways on for amiga + else -- if this a delayed expansion space detection, aboard this cycle! + AMIGA_BUS_ENABLE <= '1'; + AS_030_000_SYNC <= '1'; + SM_AMIGA <= IDLE_P; --aboard + end if; + + if(CLK_000_D0='1')then --go to s2 + SM_AMIGA <= AS_SET_P; --as for amiga set! + end if; + when AS_SET_P => --68000:S2 Amiga cycle starts here: since AS is asserted during transition to this state we simply wait here + AS_000_INT <= '0'; + if (RW='1' and DS_030 = '0') then --read: set udl/lds + if(A(0)='0') then + UDS_000_INT <= '0'; + else + UDS_000_INT <= '1'; + end if; + if((A(0)='1' OR SIZE(0)='0' OR SIZE(1)='1')) then + LDS_000_INT <= '0'; + else + LDS_000_INT <= '1'; + end if; + end if; + + + if(CLK_000_D0='0')then --go to s3 + SM_AMIGA<=AS_SET_N; + end if; + when AS_SET_N => --68000:S3: nothing happens here; on a transition to s4: assert uds/lds on write + if (RW='0' and DS_030 = '0') then --write: set udl/lds earlier than in the specs. this does not seem to harm anything and is saver, than sampling uds/lds too late + if(A(0)='0') then + UDS_000_INT <= '0'; + else + UDS_000_INT <= '1'; + end if; + if((A(0)='1' OR SIZE(0)='0' OR SIZE(1)='1')) then + LDS_000_INT <= '0'; + else + LDS_000_INT <= '1'; + end if; + end if; + if(CLK_000_D0='1')then --go to s4 + SM_AMIGA <= SAMPLE_DTACK_P; + end if; + when SAMPLE_DTACK_P=> --68000:S4 wait for dtack or VMA + if(CLK_000_D0='0' )then --go to s5 + if(DTACK_SYNC = '0' OR VPA_SYNC ='0')then + SM_AMIGA<=DATA_FETCH_N; + end if; + elsif(CLK_000_D0='1' )then -- high clock: sample DTACK + if(VPA_D = '1' AND DTACK='0') then + DTACK_SYNC <= '0'; + elsif(VPA_D='0' AND cpu_est=E9 AND VMA_INT='0') then --vpa/vma cycle: sync VPA on E9: one 7M-clock to latch! + VPA_SYNC <= '0'; + end if; + end if; + when DATA_FETCH_N=> --68000:S5 nothing happens here just wait for positive clock + if(CLK_000_D0='1')then --go to s6 + SM_AMIGA<=DATA_FETCH_P; + end if; + when DATA_FETCH_P => --68000:S6: READ: here comes the data on the bus! + if( CLK_000_D5 ='1' AND CLK_000_D6 = '0' ) then --go to s7 next 030-clock is high: dsack is sampled at the falling edge + DSACK_INT<="01"; + AS_030_000_SYNC <= '1'; --cycle end + elsif( CLK_000_D0 ='0') then --go to s7 next 030-clock is high: dsack is sampled at the falling edge + --DSACK_INT<="01"; + SM_AMIGA<=END_CYCLE_N; + --AS_030_000_SYNC <= '1'; --cycle end + end if; + when END_CYCLE_N =>--68000:S7: Latch/Store data. Wait here for new cycle and go to IDLE on high clock + if(CLK_000_D0='1' and AS_000_INT = '1' )then --go to s0 + SM_AMIGA<=IDLE_P; + end if; + end case; + + + --dma stuff + --DTACK for DMA cycles + if(AS_000_INT ='0' AND DSACK(1) ='0') then + DTACK_DMA <= '0'; + else + DTACK_DMA <= '1'; + end if; + + end if; + end process state_machine; + + --output clock assignment + CLK_DIV_OUT <= CLK_OUT_INT; + CLK_EXP <= CLK_OUT_INT; + AVEC_EXP <= 'Z' when FPU_CS_INT ='1' else '0'; + + --dtack for dma + DTACK <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' else + DTACK_DMA; + + --fpu + FPU_CS <= FPU_CS_INT; + + --if no copro is installed: + BERR <= 'Z' when FPU_CS_INT ='1' else '0'; + + + + --cache inhibit: For now: disable + CIIN <= '1' WHEN A(31 downto 20) = x"00F" ELSE + --'1' WHEN A(31 downto 16) = x"00E0" ELSE + 'Z' WHEN not(A(31 downto 24) = x"00") ELSE + '0'; + + --bus buffers + AMIGA_BUS_DATA_DIR <='1' WHEN RW='0' ELSE '0'; + AMIGA_BUS_ENABLE_LOW <= '1'; --for now: allways off + + --e and VMA + E <= cpu_est(3); + VMA <= VMA_INT; + + + --AVEC + AVEC <= '1'; + + --as and uds/lds + AS_000 <= 'Z' when BGACK_030_INT ='0' else + AS_000_INT; + UDS_000 <= 'Z' when BGACK_030_INT ='0' else -- output on cpu cycle + UDS_000_INT; + LDS_000 <= 'Z' when BGACK_030_INT ='0' else -- output on cpu cycle + LDS_000_INT; + + --dsack + DSACK <= "ZZ" when nEXP_SPACE = '0' else -- output on amiga cycle + DSACK_INT; + BGACK_030 <= BGACK_030_INT; + -- signal assignment + --DS_030 <= "ZZ"; + --DS_030 <= "ZZ" when BGACK_030_INT ='1' else -- output on dma cycle + -- DS_030_INT; + + --A(1) <= 'Z'; + --A(0) <= 'Z'; + --A[1 downto 0] <= "ZZ" when BGACK_030_INT ='1' else -- output on dma cycle + -- A_INT; + + --SIZE <= "ZZ"; + --SIZE <= "ZZ" when BGACK_030_INT ='1' else -- output on dma cycle + -- SIZE_INT; + +end Behavioral; diff --git a/Logic/68030-68000-bus.vhd b/Logic/68030-68000-bus.vhd index 3419955..90fe4f1 100644 --- a/Logic/68030-68000-bus.vhd +++ b/Logic/68030-68000-bus.vhd @@ -98,6 +98,7 @@ signal AS_030_000_SYNC:STD_LOGIC := '1'; signal BGACK_030_INT:STD_LOGIC := '1'; signal BGACK_030_INT_D:STD_LOGIC := '1'; signal DTACK_SYNC:STD_LOGIC := '1'; +signal DTACK_DMA:STD_LOGIC := '1'; signal AS_000_DMA:STD_LOGIC := '1'; signal DS_000_DMA:STD_LOGIC := '1'; signal SIZE_DMA: STD_LOGIC_VECTOR ( 1 downto 0 ) := "11"; @@ -105,6 +106,7 @@ signal A0_DMA: STD_LOGIC := '1'; signal FPU_CS_INT:STD_LOGIC := '1'; signal VPA_SYNC: STD_LOGIC := '1'; signal VMA_INT: STD_LOGIC := '1'; +signal VPA_D: STD_LOGIC := '1'; signal UDS_000_INT: STD_LOGIC := '1'; signal LDS_000_INT: STD_LOGIC := '1'; signal DSACK1_INT: STD_LOGIC := '1'; @@ -114,6 +116,7 @@ signal CLK_REF: STD_LOGIC_VECTOR ( 1 downto 0 ) := "10"; signal CLK_OUT_PRE: STD_LOGIC := '1'; signal CLK_OUT_INT: STD_LOGIC := '1'; signal CLK_000_D0: STD_LOGIC := '1'; +signal CLK_000_D0a: STD_LOGIC := '1'; signal CLK_000_D1: STD_LOGIC := '1'; signal CLK_000_D2: STD_LOGIC := '1'; signal CLK_000_D3: STD_LOGIC := '1'; @@ -130,9 +133,7 @@ begin if(RST = '0' ) then CLK_CNT_N <= "10"; elsif(falling_edge(CLK_OSZI)) then - --clk generation : up to now just half the clock if(CLK_CNT_N = "10") then - --CLK_OUT_PRE <= not CLK_OUT_PRE; CLK_CNT_N <= "00"; else CLK_CNT_N <= CLK_CNT_N+1; @@ -149,33 +150,36 @@ begin CLK_OUT_INT <= '0'; cpu_est <= E20; CLK_000_D0 <= '1'; + CLK_000_D0a <= '1'; CLK_000_D1 <= '1'; CLK_000_D2 <= '1'; CLK_000_D3 <= '1'; CLK_000_D4 <= '1'; CLK_000_D5 <= '1'; CLK_000_D6 <= '1'; - + VPA_D <= '1'; elsif(rising_edge(CLK_OSZI)) then --reset buffer RESET <= '1'; --clk generation : up to now just half the clock - if(CLK_CNT_P = "10") then - --CLK_OUT_PRE <= not CLK_OUT_PRE; + if(CLK_CNT_P = "01") then + CLK_OUT_PRE <= not CLK_OUT_PRE; CLK_CNT_P <= "00"; else CLK_CNT_P <= CLK_CNT_P+1; end if; - if(CLK_CNT_P ="00" or CLK_CNT_N ="00")then --33MHz Clock - CLK_OUT_PRE <= '0'; - else - CLK_OUT_PRE <= '1'; - end if; + + --if(CLK_CNT_P ="00" or CLK_CNT_N ="00")then --33MHz Clock + -- CLK_OUT_PRE <= '0'; + --else + -- CLK_OUT_PRE <= '1'; + --end if; -- the external clock to the processor is generated here CLK_OUT_INT <= CLK_OUT_PRE; --this way we know the clock of the next state: Its like looking in the future, cool! --delayed Clocks for edge detection CLK_000_D0 <= CLK_000; + CLK_000_D0a <= CLK_000; -- too many signals depend on D0! CLK_000_D1 <= CLK_000_D0; CLK_000_D2 <= CLK_000_D1; CLK_000_D3 <= CLK_000_D2; @@ -209,6 +213,7 @@ begin null; end case; end if; + VPA_D <= VPA; end if; end process clk; @@ -233,6 +238,7 @@ begin VPA_SYNC <= '1'; IPL_030 <= "111"; AMIGA_BUS_ENABLE <= '1' ; + DTACK_DMA <= '1'; AS_000_DMA <= '1'; DS_000_DMA <= '1'; SIZE_DMA <= "11"; @@ -278,6 +284,7 @@ begin LDS_000_INT <= '1'; DTACK_SYNC <= '1'; VPA_SYNC <= '1'; + --AMIGA_BUS_ENABLE <= '1'; elsif( CLK_030 = '1' AND --68030 has a valid AS on high clocks AS_030 = '0') then if(FC(1)='1' and FC(0)='1' and A(19)='0' and A(18)='0' and A(17)='1' and A(16)='0' AND BGACK_000='1') then @@ -290,16 +297,23 @@ begin end if; -- VMA generation - if(CLK_000_D0='0' AND VPA='0' AND cpu_est = E4)then --assert + if(CLK_000_D0='0' AND VPA_D='0' AND cpu_est = E4)then --assert VMA_INT <= '0'; - elsif(CLK_000_D0='1' AND AS_000_INT='1' AND cpu_est=E1)then --deassert - VMA_INT <= '1'; end if; - + if(BGACK_030_INT='1') then + if(BGACK_030_INT_D='0')then + AMIGA_BUS_ENABLE <= '1' ; --end of DMA cycle + DTACK_DMA <= '1'; + AS_000_DMA <= '1'; + DS_000_DMA <= '1'; + SIZE_DMA <= "11"; + A0_DMA <= '0'; + end if; --Amiga statemachine case (SM_AMIGA) is when IDLE_P => --68000:S0 wait for a falling edge + VMA_INT <= '1'; if( CLK_000_D2='0' and CLK_000_D3= '1' and AS_030_000_SYNC = '0')then SM_AMIGA<=IDLE_N; --go to s1 end if; @@ -355,9 +369,9 @@ begin SM_AMIGA<=DATA_FETCH_N; end if; elsif(CLK_000_D0='1' )then -- high clock: sample DTACK - if(VPA = '1' AND DTACK='0') then + if(VPA_D = '1' AND DTACK='0') then DTACK_SYNC <= '0'; - elsif(VPA='0' AND cpu_est=E9 AND VMA_INT='0') then --vpa/vma cycle: sync VPA on E9: one 7M-clock to latch! + elsif(VPA_D='0' AND cpu_est=E9 AND VMA_INT='0') then --vpa/vma cycle: sync VPA on E9: one 7M-clock to latch! VPA_SYNC <= '0'; end if; end if; @@ -368,27 +382,25 @@ begin when DATA_FETCH_P => --68000:S6: READ: here comes the data on the bus! if( CLK_000_D5 ='1' AND CLK_000_D6 = '0' ) then --go to s7 next 030-clock is high: dsack is sampled at the falling edge DSACK1_INT <='0'; - AS_030_000_SYNC <= '1'; --cycle end + AS_030_000_SYNC <= '1'; --cycle end elsif( CLK_000_D0 ='0') then --go to s7 next 030-clock is high: dsack is sampled at the falling edge --DSACK1_INT<='0'; SM_AMIGA<=END_CYCLE_N; --AS_030_000_SYNC <= '1'; --cycle end end if; - when END_CYCLE_N =>--68000:S7: Latch/Store data. Wait here for new cycle and go to IDLE on high clock - if(CLK_000_D0='1' and AS_000_INT = '1' )then --go to s0 + if(AS_030 = '1' )then AMIGA_BUS_ENABLE <= '1'; + end if; + when END_CYCLE_N =>--68000:S7: Latch/Store data. Wait here for new cycle and go to IDLE on high clock + if(AS_030 = '1' )then + AMIGA_BUS_ENABLE <= '1'; + end if; + if(CLK_000_D0='1' and AS_000_INT = '1' )then --go to s0 SM_AMIGA<=IDLE_P; end if; end case; - if(BGACK_030_INT='1') then - if(BGACK_030_INT_D='0')then - AMIGA_BUS_ENABLE <= '1' ; --end of DMA cycle - AS_000_DMA <= '1'; - DS_000_DMA <= '1'; - SIZE_DMA <= "11"; - A0_DMA <= '0'; - end if; + else --dma stuff @@ -396,7 +408,10 @@ begin if(BGACK_030_INT_D='1' )then AMIGA_BUS_ENABLE <= '0' ; end if; - + --DTACK for DMA cycles + --if(DSACK(1) ='0' or DSACK(0) ='0') then + -- DTACK_DMA <= '0'; + --end if; --as can only be done if we know the uds/lds! if(AS_000='0' and CLK_030='0' and (UDS_000='0' or LDS_000='0'))then --sampled on rising edges! @@ -423,6 +438,7 @@ begin --A1 is set by the amiga side else + DTACK_DMA <= '1'; AS_000_DMA <= '1'; DS_000_DMA <= '1'; SIZE_DMA <= "11"; @@ -438,15 +454,15 @@ begin AVEC_EXP <= 'Z' when FPU_CS_INT ='1' else '0'; --dma stuff - DTACK <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' else + DTACK <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' OR AS_000_DMA ='1' else DSACK(1); - AS_030 <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' else + AS_030 <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' OR AS_000_DMA ='1' else AS_000_DMA; - DS_030 <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' else + DS_030 <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' OR AS_000_DMA ='1' else DS_000_DMA; - A0 <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' else + A0 <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' OR AS_000_DMA ='1' else A0_DMA; - SIZE <= "ZZ" when BGACK_030_INT ='1' OR nEXP_SPACE = '1' else + SIZE <= "ZZ" when BGACK_030_INT ='1' OR nEXP_SPACE = '1' OR AS_000_DMA ='1' else SIZE_DMA; --fpu @@ -464,10 +480,11 @@ begin '0'; --bus buffers - AMIGA_BUS_DATA_DIR <= '1' WHEN (RW='0' AND BGACK_030_INT ='1') ELSE - '0' WHEN (RW='1' AND BGACK_030_INT ='1') ELSE - '1' WHEN (RW='1' AND BGACK_030_INT ='0') ELSE - '0' ; + AMIGA_BUS_DATA_DIR <= '1' WHEN (RW='0' AND BGACK_030_INT ='1') ELSE --Amiga WRITE + '0' WHEN (RW='1' AND BGACK_030_INT ='1') ELSE --Amiga READ + '1' WHEN (RW='1' AND BGACK_030_INT ='0' AND nEXP_SPACE = '0') ELSE --DMA READ to expansion space + '0' WHEN (RW='0' AND BGACK_030_INT ='0' AND nEXP_SPACE = '0') ELSE --DMA WRITE to expansion space + '0'; --Point towarts TK AMIGA_BUS_ENABLE_LOW <= '1'; --for now: allways off --e and VMA @@ -491,6 +508,8 @@ begin --dsack DSACK(1) <= 'Z' when nEXP_SPACE = '0' else -- output on amiga cycle DSACK1_INT; + DSACK(0) <= 'Z' when nEXP_SPACE = '0' else -- output on amiga cycle + '1'; BGACK_030 <= BGACK_030_INT; end Behavioral; diff --git a/Logic/68030_TK.STY b/Logic/68030_TK.STY index 0e8afb8..4456bf3 100644 --- a/Logic/68030_TK.STY +++ b/Logic/68030_TK.STY @@ -2,3 +2,5 @@ tool=Synplify [STRATEGY-LIST] Normal=True, 1385910337 +[TOUCHED-REPORT] +Design.impFile=1401021970 diff --git a/Logic/68030_TK.cmi b/Logic/68030_TK.cmi index bf59577..11adeda 100644 --- a/Logic/68030_TK.cmi +++ b/Logic/68030_TK.cmi @@ -40,7 +40,10 @@ State=43,no Constraint Name=162,no Constraint Value=115,no [OPT WINDOWS] -MAIN_WINDOW_POSITION=0,0,1920,1200 +MAIN_WINDOW_POSITION=-8,-8,1928,1168 +CHILD_FRAME_STATE=Maximal +CHILD_WINDOW_SIZE=1936,950 +CHILD_WINDOW_POS=-8,-30 [OPT GUI SETTING] Remember_Setting=1 -ACTIVE_SHEET= +ACTIVE_SHEET=Opt Global Constraints diff --git a/Logic/68030_TK.lci b/Logic/68030_TK.lci index 247fad0..ccce17d 100644 --- a/Logic/68030_TK.lci +++ b/Logic/68030_TK.lci @@ -12,8 +12,8 @@ EN_PinMacrocell = Yes; [Revision] Parent = m4a5.lci; -DATE = 05/24/2014; -TIME = 21:28:20; +DATE = 05/25/2014; +TIME = 14:46:10; Source_Format = Pure_VHDL; Synthesis = Synplify; @@ -26,6 +26,11 @@ Synthesis = Synplify; [Global Constraints] Spread_placement = Yes; Zero_hold_time = No; +Max_pterm_split = 16; +Max_pterm_collapse = 16; +Nodes_collapsing_mode = Speed; +Max_fanin = 32; +Set_reset_dont_care = Yes; [Location Assignments] layer = OFF; diff --git a/Logic/68030_TK.lct b/Logic/68030_TK.lct index 247fad0..ccce17d 100644 --- a/Logic/68030_TK.lct +++ b/Logic/68030_TK.lct @@ -12,8 +12,8 @@ EN_PinMacrocell = Yes; [Revision] Parent = m4a5.lci; -DATE = 05/24/2014; -TIME = 21:28:20; +DATE = 05/25/2014; +TIME = 14:46:10; Source_Format = Pure_VHDL; Synthesis = Synplify; @@ -26,6 +26,11 @@ Synthesis = Synplify; [Global Constraints] Spread_placement = Yes; Zero_hold_time = No; +Max_pterm_split = 16; +Max_pterm_collapse = 16; +Nodes_collapsing_mode = Speed; +Max_fanin = 32; +Set_reset_dont_care = Yes; [Location Assignments] layer = OFF; diff --git a/Logic/68030_TK.tcl b/Logic/68030_TK.tcl index 51d0523..2b577eb 100644 --- a/Logic/68030_TK.tcl +++ b/Logic/68030_TK.tcl @@ -154664,3 +154664,7410 @@ if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 6 ########## Tcl recorder end at 05/24/14 21:59:07 ########### + +########## Tcl recorder starts at 05/24/14 22:06:12 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/24/14 22:06:12 ########### + + +########## Tcl recorder starts at 05/24/14 22:06:12 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/24/14 22:06:12 ########### + + +########## Tcl recorder starts at 05/24/14 22:07:08 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/24/14 22:07:08 ########### + + +########## Tcl recorder starts at 05/24/14 22:07:08 ########## + +# Commands to make the Process: +# Constraint Editor +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +# Application to view the Process: +# Constraint Editor +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -lci \"68030_tk.lct\" -touch \"68030_tk.tt4\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/24/14 22:07:08 ########### + + +########## Tcl recorder starts at 05/24/14 22:11:22 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/24/14 22:11:22 ########### + + +########## Tcl recorder starts at 05/24/14 22:11:23 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/24/14 22:11:23 ########### + + +########## Tcl recorder starts at 05/24/14 22:12:37 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/24/14 22:12:37 ########### + + +########## Tcl recorder starts at 05/24/14 22:12:48 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/24/14 22:12:48 ########### + + +########## Tcl recorder starts at 05/24/14 22:12:48 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/24/14 22:12:48 ########### + + +########## Tcl recorder starts at 05/25/14 09:08:41 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:08:41 ########### + + +########## Tcl recorder starts at 05/25/14 09:08:42 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:08:42 ########### + + +########## Tcl recorder starts at 05/25/14 09:11:11 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:11:11 ########### + + +########## Tcl recorder starts at 05/25/14 09:11:11 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:11:11 ########### + + +########## Tcl recorder starts at 05/25/14 09:22:43 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:22:43 ########### + + +########## Tcl recorder starts at 05/25/14 09:22:43 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:22:43 ########### + + +########## Tcl recorder starts at 05/25/14 09:31:16 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:31:16 ########### + + +########## Tcl recorder starts at 05/25/14 09:31:16 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:31:16 ########### + + +########## Tcl recorder starts at 05/25/14 09:32:41 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:32:41 ########### + + +########## Tcl recorder starts at 05/25/14 09:32:41 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:32:41 ########### + + +########## Tcl recorder starts at 05/25/14 09:36:10 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:36:10 ########### + + +########## Tcl recorder starts at 05/25/14 09:36:10 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:36:10 ########### + + +########## Tcl recorder starts at 05/25/14 09:37:18 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:37:18 ########### + + +########## Tcl recorder starts at 05/25/14 09:37:18 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:37:18 ########### + + +########## Tcl recorder starts at 05/25/14 09:41:54 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:41:54 ########### + + +########## Tcl recorder starts at 05/25/14 09:41:55 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:41:55 ########### + + +########## Tcl recorder starts at 05/25/14 09:43:07 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:43:07 ########### + + +########## Tcl recorder starts at 05/25/14 09:43:07 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:43:07 ########### + + +########## Tcl recorder starts at 05/25/14 09:45:41 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:45:41 ########### + + +########## Tcl recorder starts at 05/25/14 09:45:42 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:45:42 ########### + + +########## Tcl recorder starts at 05/25/14 09:47:09 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:47:09 ########### + + +########## Tcl recorder starts at 05/25/14 09:47:10 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 09:47:10 ########### + + +########## Tcl recorder starts at 05/25/14 13:14:12 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:14:12 ########### + + +########## Tcl recorder starts at 05/25/14 13:14:12 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:14:12 ########### + + +########## Tcl recorder starts at 05/25/14 13:15:09 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:15:09 ########### + + +########## Tcl recorder starts at 05/25/14 13:15:10 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:15:10 ########### + + +########## Tcl recorder starts at 05/25/14 13:16:58 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:16:58 ########### + + +########## Tcl recorder starts at 05/25/14 13:16:58 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:16:58 ########### + + +########## Tcl recorder starts at 05/25/14 13:18:21 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:18:21 ########### + + +########## Tcl recorder starts at 05/25/14 13:18:21 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:18:21 ########### + + +########## Tcl recorder starts at 05/25/14 13:19:31 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:19:31 ########### + + +########## Tcl recorder starts at 05/25/14 13:19:32 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:19:32 ########### + + +########## Tcl recorder starts at 05/25/14 13:22:13 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:22:13 ########### + + +########## Tcl recorder starts at 05/25/14 13:22:13 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:22:13 ########### + + +########## Tcl recorder starts at 05/25/14 13:24:34 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:24:34 ########### + + +########## Tcl recorder starts at 05/25/14 13:24:34 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:24:34 ########### + + +########## Tcl recorder starts at 05/25/14 13:27:05 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:27:05 ########### + + +########## Tcl recorder starts at 05/25/14 13:27:05 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:27:05 ########### + + +########## Tcl recorder starts at 05/25/14 13:48:52 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:48:52 ########### + + +########## Tcl recorder starts at 05/25/14 13:48:52 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:48:52 ########### + + +########## Tcl recorder starts at 05/25/14 13:50:28 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:50:28 ########### + + +########## Tcl recorder starts at 05/25/14 13:50:29 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:50:29 ########### + + +########## Tcl recorder starts at 05/25/14 13:53:02 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:53:02 ########### + + +########## Tcl recorder starts at 05/25/14 13:53:02 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:53:02 ########### + + +########## Tcl recorder starts at 05/25/14 13:55:27 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:55:28 ########### + + +########## Tcl recorder starts at 05/25/14 13:55:28 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:55:28 ########### + + +########## Tcl recorder starts at 05/25/14 13:56:23 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:56:23 ########### + + +########## Tcl recorder starts at 05/25/14 13:56:24 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 13:56:24 ########### + + +########## Tcl recorder starts at 05/25/14 14:10:15 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:10:15 ########### + + +########## Tcl recorder starts at 05/25/14 14:10:15 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:10:15 ########### + + +########## Tcl recorder starts at 05/25/14 14:11:07 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:11:07 ########### + + +########## Tcl recorder starts at 05/25/14 14:11:08 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:11:08 ########### + + +########## Tcl recorder starts at 05/25/14 14:12:00 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:12:00 ########### + + +########## Tcl recorder starts at 05/25/14 14:12:00 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:12:00 ########### + + +########## Tcl recorder starts at 05/25/14 14:13:25 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:13:25 ########### + + +########## Tcl recorder starts at 05/25/14 14:13:25 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:13:25 ########### + + +########## Tcl recorder starts at 05/25/14 14:44:29 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:44:29 ########### + + +########## Tcl recorder starts at 05/25/14 14:44:29 ########## + +# Commands to make the Process: +# Optimization Constraint +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +# Application to view the Process: +# Optimization Constraint +if [catch {open opt_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file opt_cmd.rs2: $rspFile" +} else { + puts $rspFile "-global -lci 68030_tk.lct -touch 68030_tk.imp +" + close $rspFile +} +if [runCmd "\"$cpld_bin/optedit\" @opt_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:44:29 ########### + + +########## Tcl recorder starts at 05/25/14 14:45:31 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:45:31 ########### + + +########## Tcl recorder starts at 05/25/14 14:45:44 ########## + +# Commands to make the Process: +# Optimization Constraint +# - none - +# Application to view the Process: +# Optimization Constraint +if [catch {open opt_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file opt_cmd.rs2: $rspFile" +} else { + puts $rspFile "-global -lci 68030_tk.lct -touch 68030_tk.imp +" + close $rspFile +} +if [runCmd "\"$cpld_bin/optedit\" @opt_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:45:44 ########### + + +########## Tcl recorder starts at 05/25/14 14:45:52 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:45:52 ########### + + +########## Tcl recorder starts at 05/25/14 14:46:00 ########## + +# Commands to make the Process: +# Optimization Constraint +# - none - +# Application to view the Process: +# Optimization Constraint +if [catch {open opt_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file opt_cmd.rs2: $rspFile" +} else { + puts $rspFile "-global -lci 68030_tk.lct -touch 68030_tk.imp +" + close $rspFile +} +if [runCmd "\"$cpld_bin/optedit\" @opt_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:46:01 ########### + + +########## Tcl recorder starts at 05/25/14 14:46:15 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:46:15 ########### + + +########## Tcl recorder starts at 05/25/14 14:55:57 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:55:57 ########### + + +########## Tcl recorder starts at 05/25/14 14:55:58 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:55:58 ########### + + +########## Tcl recorder starts at 05/25/14 14:56:37 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:56:37 ########### + + +########## Tcl recorder starts at 05/25/14 14:56:37 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:56:37 ########### + + +########## Tcl recorder starts at 05/25/14 14:56:52 ########## + +# Commands to make the Process: +# Timing Report +if [runCmd "\"$cpld_bin/timer\" -inp \"68030_tk.tte\" -lci \"68030_tk.lct\" -stamp \"68030_tk.trp\" -exf \"BUS68030.exf\" -lco \"68030_tk.lco\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 14:56:52 ########### + + +########## Tcl recorder starts at 05/25/14 20:50:34 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 20:50:34 ########### + + +########## Tcl recorder starts at 05/25/14 20:50:34 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 20:50:35 ########### + + +########## Tcl recorder starts at 05/25/14 20:54:32 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 20:54:32 ########### + + +########## Tcl recorder starts at 05/25/14 20:54:33 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 20:54:33 ########### + + +########## Tcl recorder starts at 05/25/14 20:57:45 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 20:57:45 ########### + + +########## Tcl recorder starts at 05/25/14 20:57:45 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 20:57:45 ########### + diff --git a/Logic/68030_tk.bl2 b/Logic/68030_tk.bl2 index c6af2e5..39dd475 100644 --- a/Logic/68030_tk.bl2 +++ b/Logic/68030_tk.bl2 @@ -1,83 +1,90 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Sat May 24 21:59:14 2014 +#$ DATE Sun May 25 20:57:52 2014 #$ MODULE 68030_tk -#$ PINS 59 IPL_030_1_ IPL_030_0_ SIZE_1_ IPL_1_ IPL_0_ A_31_ DSACK_0_ FC_0_ IPL_030_2_ \ -# IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 nEXP_SPACE BERR BG_030 \ -# BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS DTACK \ -# AVEC AVEC_EXP E VPA VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \ -# AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ \ -# A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ -#$ NODES 398 BG_030_c BG_000DFFSHreg BGACK_000_c inst_BGACK_030_INTreg \ -# inst_FPU_CS_INTreg CLK_030_c inst_VMA_INTreg inst_AS_030_000_SYNC CLK_000_c \ -# inst_BGACK_030_INT_D inst_DTACK_SYNC CLK_OSZI_c inst_VPA_SYNC inst_CLK_000_D0 \ -# inst_CLK_000_D1 CLK_OUT_INTreg inst_CLK_000_D2 inst_CLK_000_D6 SM_AMIGA_5_ \ -# IPL_030DFFSH_0_reg vcc_n_n gnd_n_n IPL_030DFFSH_1_reg inst_AS_000_INT SM_AMIGA_6_ \ -# IPL_030DFFSH_2_reg inst_UDS_000_INT inst_LDS_000_INT ipl_c_0__n inst_DSACK1_INT \ -# inst_CLK_000_D3 ipl_c_1__n state_machine_un23_clk_000_d0_n inst_CLK_000_D5 \ -# ipl_c_2__n SM_AMIGA_3_ SM_AMIGA_0_ SM_AMIGA_1_ dsack_c_1__n inst_AS_000_DMA \ -# inst_DS_000_DMA DTACK_c SIZE_DMA_0_ SIZE_DMA_1_ inst_A0_DMA G_103 CLK_CNT_N_0_ VPA_c \ -# CLK_CNT_N_1_ G_109 CLK_CNT_P_0_ RST_c CLK_CNT_P_1_ inst_CLK_000_D4 RESETDFFRHreg \ -# SM_AMIGA_7_ state_machine_un15_clk_000_d0_n RW_c SM_AMIGA_4_ \ -# un1_AMIGA_BUS_ENABLE_0_sqmuxa_2 fc_c_0__n inst_CLK_OUT_PRE SM_AMIGA_2_ fc_c_1__n \ -# AMIGA_BUS_ENABLEDFFSHreg state_machine_un23_clk_000_d0_0_n \ -# state_machine_un6_bgack_000_0_n N_214_0 BG_030_c_i N_227_i \ -# state_machine_un10_bg_030_0_n N_215_0 N_216_0 N_126_i N_33_0 N_127_i N_35_0 \ -# state_machine_uds_000_int_5_0_n N_130_i state_machine_lds_000_int_5_0_n N_132_i \ -# N_131_i cpu_est_0_ cpu_est_1_ N_133_i cpu_est_2_ cpu_est_3_reg N_134_i N_137_i N_138_i \ -# sm_amiga_ns_0_5__n cpu_est_ns_1__n N_139_i cpu_est_ns_2__n N_140_i N_46_0 N_52 \ -# N_142_i N_59 N_141_i N_62 sm_amiga_ns_0_7__n N_65 N_144_i N_67 \ -# state_machine_ds_000_dma_5_0_n N_72 CLK_030_c_i N_77 AS_000_c_i N_88 N_59_i N_217 \ -# N_61_0 N_219 N_62_i N_221 CLK_000_D1_i N_224 N_65_i N_225 N_66_i N_226 N_67_i N_128 \ -# N_175_i N_130 un1_as_000_dma5_i_0__n N_132 state_machine_un6_clk_000_d5_i_n N_135 \ -# N_71_i N_136 DS_030_c_i N_138 N_73_i N_143 N_156_i N_145 \ -# un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i N_146 N_75_0 N_147 N_176_i N_148 N_52_0 N_151 \ -# N_173_i N_153 N_226_i N_154 N_77_0 N_155 N_72_i N_173 N_147_i cpu_est_ns_0_0_x2_1_ \ -# N_148_i AMIGA_BUS_DATA_DIR_m1_0_x2 cpu_est_ns_e_0_0__n N_228_1 N_146_i N_237 \ -# sm_amiga_ns_0_0__n N_247 N_88_i N_227 N_145_i N_228 cpu_est_ns_0_2__n N_127 N_143_i \ -# N_66 N_154_i N_175 N_161_i N_176 N_153_i N_75 N_155_i un1_AMIGA_BUS_ENABLE_1_sqmuxa_4 \ -# cpu_est_ns_0_1__n N_61 N_135_i N_156 N_136_i N_73 N_57 N_225_i N_71 \ -# un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0 state_machine_un6_clk_000_d5_n N_219_i \ -# un1_as_000_dma5_0__n N_221_i N_223 state_machine_un15_clk_000_d0_0_n \ -# state_machine_ds_000_dma_5_n N_144 N_66_i_1 N_141 N_66_i_2 N_142 N_66_i_3 N_139 \ -# N_66_i_4 N_140 N_66_i_5 N_137 N_237_1 N_134 N_237_2 N_133 N_247_1 N_131 N_247_2 \ -# state_machine_lds_000_int_5_n N_247_3 state_machine_uds_000_int_5_n N_247_4 N_35 \ -# N_247_5 N_33 N_247_6 N_126 N_52_0_1 N_216 N_52_0_2 N_215 N_224_1 \ -# state_machine_un10_bg_030_n N_224_2 N_214 N_227_1 state_machine_un6_bgack_000_n \ -# N_227_2 state_machine_un8_clk_000_d2_n N_228_1_0 SIZE_DMA_1_sqmuxa N_127_1 \ -# SIZE_DMA_0_sqmuxa N_127_2 AS_000_INT_1_sqmuxa N_151_1 N_249 SIZE_DMA_1_sqmuxa_1 \ -# CLK_000_D6_i state_machine_un8_clk_000_d2_1_n N_228_i sm_amiga_ns_0_1_0__n \ -# sm_amiga_i_5__n cpu_est_ns_0_1_1__n N_224_i N_138_1 N_223_i N_130_1 \ -# SIZE_DMA_0_sqmuxa_i N_128_1 SIZE_DMA_1_sqmuxa_i N_221_1 a_i_18__n N_219_1 a_i_16__n \ -# vpa_sync_0_un3_n a_i_19__n vpa_sync_0_un1_n AS_030_000_SYNC_i vpa_sync_0_un0_n \ -# CLK_000_D2_i as_000_int_0_un3_n BGACK_030_INT_i as_000_int_0_un1_n nEXP_SPACE_i \ -# as_000_int_0_un0_n AS_030_i as_000_dma_0_un3_n BGACK_030_INT_D_i \ -# as_000_dma_0_un1_n sm_amiga_i_7__n as_000_dma_0_un0_n \ -# state_machine_un8_clk_000_d2_i_n bg_000_0_un3_n sm_amiga_i_6__n bg_000_0_un1_n \ -# sm_amiga_i_4__n bg_000_0_un0_n CLK_000_D0_i a0_dma_0_un3_n RW_i a0_dma_0_un1_n \ -# UDS_000_i a0_dma_0_un0_n LDS_000_i dtack_sync_0_un3_n DTACK_i dtack_sync_0_un1_n \ -# VMA_INT_i dtack_sync_0_un0_n VPA_i lds_000_int_0_un3_n cpu_est_i_0__n \ -# lds_000_int_0_un1_n sm_amiga_i_3__n lds_000_int_0_un0_n cpu_est_i_3__n \ -# uds_000_int_0_un3_n cpu_est_i_1__n uds_000_int_0_un1_n A0_i uds_000_int_0_un0_n \ -# size_i_1__n fpu_cs_int_0_un3_n a_i_30__n fpu_cs_int_0_un1_n a_i_31__n \ -# fpu_cs_int_0_un0_n a_i_28__n ds_000_dma_0_un3_n a_i_29__n ds_000_dma_0_un1_n \ -# a_i_26__n ds_000_dma_0_un0_n a_i_27__n as_030_000_sync_0_un3_n a_i_24__n \ -# as_030_000_sync_0_un1_n a_i_25__n as_030_000_sync_0_un0_n RST_i \ -# size_dma_0_1__un3_n size_dma_0_1__un1_n CLK_OSZI_i size_dma_0_1__un0_n \ -# size_dma_0_0__un3_n FPU_CS_INT_i size_dma_0_0__un1_n AS_030_c size_dma_0_0__un0_n \ -# bgack_030_int_0_un3_n AS_000_c bgack_030_int_0_un1_n bgack_030_int_0_un0_n \ -# DS_030_c dsack1_int_0_un3_n dsack1_int_0_un1_n UDS_000_c dsack1_int_0_un0_n \ -# state_machine_uds_000_int_5_0_m2_un3_n LDS_000_c \ -# state_machine_uds_000_int_5_0_m2_un1_n state_machine_uds_000_int_5_0_m2_un0_n \ -# size_c_0__n cpu_est_ns_0_0_m2_2__un3_n cpu_est_ns_0_0_m2_2__un1_n size_c_1__n \ -# cpu_est_ns_0_0_m2_2__un0_n amiga_bus_enable_0_un3_n a_c_16__n \ -# amiga_bus_enable_0_un1_n amiga_bus_enable_0_un0_n a_c_17__n vma_int_0_un3_n \ -# vma_int_0_un1_n a_c_18__n vma_int_0_un0_n ipl_030_0_0__un3_n a_c_19__n \ -# ipl_030_0_0__un1_n ipl_030_0_0__un0_n a_c_20__n ipl_030_0_1__un3_n \ -# ipl_030_0_1__un1_n a_c_21__n ipl_030_0_1__un0_n ipl_030_0_2__un3_n a_c_22__n \ -# ipl_030_0_2__un1_n ipl_030_0_2__un0_n a_c_23__n cpu_estse_0_un3_n \ -# cpu_estse_0_un1_n a_c_24__n cpu_estse_0_un0_n cpu_estse_1_un3_n a_c_25__n \ -# cpu_estse_1_un1_n cpu_estse_1_un0_n a_c_26__n cpu_estse_2_un3_n cpu_estse_2_un1_n \ -# a_c_27__n cpu_estse_2_un0_n a_c_28__n a_c_29__n a_c_30__n a_c_31__n A0_c nEXP_SPACE_c +#$ PINS 59 SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 SIZE_0_ AS_000 A_30_ \ +# DS_030 A_29_ UDS_000 A_28_ LDS_000 A_27_ A0 A_26_ nEXP_SPACE A_25_ BERR A_24_ BG_030 A_23_ \ +# BG_000 A_22_ BGACK_030 A_21_ BGACK_000 A_20_ CLK_030 A_19_ CLK_000 A_18_ CLK_OSZI A_17_ \ +# CLK_DIV_OUT A_16_ CLK_EXP IPL_030_1_ FPU_CS IPL_030_0_ DTACK IPL_1_ AVEC IPL_0_ AVEC_EXP \ +# DSACK_0_ E FC_0_ VPA VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \ +# AMIGA_BUS_ENABLE_LOW CIIN +#$ NODES 428 A0_c lds_000_int_0_un0_n as_030_000_sync_0_un3_n nEXP_SPACE_c \ +# as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n ds_000_dma_0_un3_n BG_030_c \ +# ds_000_dma_0_un1_n ds_000_dma_0_un0_n inst_BGACK_030_INTreg BG_000DFFSHreg \ +# fpu_cs_int_0_un3_n inst_FPU_CS_INTreg fpu_cs_int_0_un1_n inst_VMA_INTreg \ +# fpu_cs_int_0_un0_n inst_AS_030_000_SYNC BGACK_000_c dtack_sync_0_un3_n \ +# inst_DTACK_SYNC dtack_sync_0_un1_n inst_VPA_SYNC CLK_030_c dtack_sync_0_un0_n \ +# inst_VPA_D a0_dma_0_un3_n inst_CLK_000_D0 CLK_000_c a0_dma_0_un1_n inst_CLK_000_D1 \ +# a0_dma_0_un0_n inst_CLK_000_D2 CLK_OSZI_c inst_CLK_000_D6 inst_CLK_OUT_PRE \ +# inst_BGACK_030_INT_D CLK_OUT_INTreg vcc_n_n gnd_n_n CLK_CNT_P_0_ IPL_030DFFSH_0_reg \ +# SM_AMIGA_5_ SM_AMIGA_7_ IPL_030DFFSH_1_reg A0_DMA_1_sqmuxa SM_AMIGA_1_ \ +# IPL_030DFFSH_2_reg SM_AMIGA_0_ SM_AMIGA_6_ ipl_c_0__n inst_AS_000_DMA \ +# inst_AS_000_INT ipl_c_1__n inst_UDS_000_INT inst_LDS_000_INT ipl_c_2__n \ +# inst_DSACK1_INT inst_CLK_000_D3 state_machine_un57_bgack_030_int_n dsack_c_1__n \ +# state_machine_un81_bgack_030_int_n inst_CLK_000_D5 DTACK_c SM_AMIGA_3_ \ +# state_machine_un6_bgack_000_n inst_DS_000_DMA SIZE_DMA_0_ SIZE_DMA_1_ inst_A0_DMA \ +# inst_CLK_000_D4 SM_AMIGA_4_ RST_c SM_AMIGA_2_ state_machine_un10_bg_030_n \ +# RESETDFFRHreg un1_AS_030_000_SYNC_1_sqmuxa_1 SIZE_DMA_0_sqmuxa RW_c \ +# state_machine_a0_dma_4_n un1_AMIGA_BUS_ENABLE_2_sqmuxa fc_c_0__n \ +# state_machine_lds_000_int_6_n state_machine_uds_000_int_6_n fc_c_1__n \ +# state_machine_ds_000_dma_5_n un1_AMIGA_BUS_ENABLE_1_sqmuxa_1 \ +# AMIGA_BUS_ENABLEDFFSHreg AMIGA_BUS_DATA_DIR_c cpu_est_ns_0_1__n N_165_i N_166_i \ +# N_242_i N_243_i N_70_0 N_94_i N_222_i N_100_i AS_030_000_SYNC_i \ +# AMIGA_BUS_ENABLE_1_sqmuxa_1_i AMIGA_BUS_ENABLE_1_sqmuxa_2_i \ +# un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_0 AMIGA_BUS_ENABLE_0_sqmuxa_2_i \ +# AMIGA_BUS_ENABLE_2_sqmuxa_i CLK_OUT_PRE_0 un1_AMIGA_BUS_ENABLE_2_sqmuxa_0 \ +# BG_030_c_i state_machine_un8_bg_030_i_n state_machine_un10_bg_030_0_n N_82_i N_100 \ +# DS_030_c_i cpu_est_0_ N_80_0 cpu_est_1_ N_79_0 cpu_est_2_ A0_DMA_0_sqmuxa_i_0_0 \ +# cpu_est_3_reg N_77_i N_76_i N_75_i N_162_i un1_AS_030_000_SYNC_1_sqmuxa_1_0 \ +# cpu_est_ns_1__n N_72_i cpu_est_ns_2__n CLK_030_c_i A0_DMA_0_sqmuxa_i_0 N_71_i N_221 \ +# N_69_i N_223 CLK_000_D1_i N_224 N_68_i N_225 N_161_i N_31 N_63_i N_33 N_61_i N_35 N_156_i \ +# N_37 N_157_i N_61 cpu_est_ns_e_0_0__n N_62 N_152_i N_63 N_153_i N_68 N_154_i N_69 \ +# sm_amiga_ns_e_0_0__n N_72 N_149_i N_75 N_150_i N_76 N_151_i N_77 sm_amiga_ns_e_0_1__n \ +# N_79 N_146_i N_80 N_147_i N_82 N_148_i N_92 cpu_est_ns_0_2__n N_93 N_145_i N_94 \ +# state_machine_ds_000_dma_5_0_n N_95 N_143_i N_96 N_144_i N_97 AMIGA_BUS_DATA_DIR_c_0 \ +# N_106 N_142_i N_107 N_246_i N_125 N_176_i N_231 N_160_i N_232 N_240_i N_233 N_234 N_238_i \ +# N_235 N_236 N_163_i N_238 N_236_i N_240 N_242 N_234_i N_243 N_235_i N_246 \ +# sm_amiga_ns_e_0_5__n N_142 N_167_i N_143 N_233_i N_144 N_145 N_231_i N_146 N_232_i N_147 \ +# sm_amiga_ns_e_0_7__n N_148 state_machine_uds_000_int_6_0_n N_149 N_125_i N_150 \ +# state_machine_lds_000_int_6_0_n N_151 N_37_0 N_152 N_107_i N_153 N_35_0 N_154 N_106_i \ +# N_155 N_33_0 N_156 N_164_i N_157 N_31_0 N_160 N_225_0 N_161 N_224_0 N_162 N_223_0 N_163 \ +# N_92_i N_164 N_93_i N_165 N_221_0 N_166 state_machine_un6_bgack_000_0_n N_167 \ +# CLK_000_D2_i AMIGA_BUS_ENABLE_1_sqmuxa_1 state_machine_un57_bgack_030_int_0_n \ +# AMIGA_BUS_ENABLE_2_sqmuxa N_255_1 state_machine_un8_bg_030_n N_255_2 \ +# AMIGA_BUS_ENABLE_0_sqmuxa_2 N_265_1 AMIGA_BUS_ENABLE_1_sqmuxa_2 N_265_2 N_70 \ +# N_265_3 N_222 N_265_4 N_255 N_265_5 N_265 N_265_6 VMA_INT_i N_69_i_1 VPA_D_i N_69_i_2 \ +# DTACK_i N_69_i_3 LDS_000_i N_69_i_4 AS_000_i N_69_i_5 nEXP_SPACE_i \ +# A0_DMA_0_sqmuxa_i_0_0_1 AS_030_i N_82_i_1 BGACK_030_INT_i \ +# AMIGA_BUS_ENABLE_0_sqmuxa_2_1 BGACK_030_INT_D_i N_100_i_1 sm_amiga_i_4__n \ +# N_100_i_2 cpu_est_i_3__n state_machine_un8_bg_030_1_n sm_amiga_i_5__n \ +# state_machine_un8_bg_030_2_n CLK_000_D0_i cpu_est_ns_0_1_1__n \ +# state_machine_un81_bgack_030_int_i_n cpu_est_ns_0_2_1__n cpu_est_i_0__n \ +# state_machine_a0_dma_4_1_n cpu_est_i_1__n state_machine_a0_dma_4_2_n UDS_000_i \ +# N_107_1 AS_000_DMA_i N_107_2 RW_i N_97_1 cpu_est_i_2__n N_97_2 sm_amiga_i_3__n N_95_1 \ +# sm_amiga_i_1__n N_95_2 A0_i N_95_3 size_i_1__n sm_amiga_ns_e_0_1_0__n \ +# sm_amiga_i_0__n sm_amiga_ns_e_0_1_1__n a_i_30__n cpu_est_ns_0_1_2__n a_i_31__n \ +# N_155_1 a_i_28__n N_153_1 a_i_29__n N_151_1 a_i_26__n N_144_1 a_i_27__n N_125_1 \ +# a_i_24__n SIZE_DMA_0_sqmuxa_1 a_i_25__n N_96_1 a_i_19__n N_93_1 a_i_16__n \ +# state_machine_lds_000_int_6_0_m2_un3_n a_i_18__n \ +# state_machine_lds_000_int_6_0_m2_un1_n RST_i \ +# state_machine_lds_000_int_6_0_m2_un0_n cpu_estse_0_un3_n SIZE_DMA_0_sqmuxa_i \ +# cpu_estse_0_un1_n N_95_i cpu_estse_0_un0_n N_96_i cpu_estse_1_un3_n N_97_i \ +# cpu_estse_1_un1_n FPU_CS_INT_i cpu_estse_1_un0_n CLK_000_D6_i cpu_estse_2_un3_n \ +# AS_030_c cpu_estse_2_un1_n cpu_estse_2_un0_n AS_000_c bg_000_0_un3_n bg_000_0_un1_n \ +# DS_030_c bg_000_0_un0_n dsack1_int_0_un3_n UDS_000_c dsack1_int_0_un1_n \ +# dsack1_int_0_un0_n LDS_000_c as_000_dma_0_un3_n as_000_dma_0_un1_n size_c_0__n \ +# as_000_dma_0_un0_n as_000_int_0_un3_n size_c_1__n as_000_int_0_un1_n \ +# as_000_int_0_un0_n a_c_16__n vpa_sync_0_un3_n vpa_sync_0_un1_n a_c_17__n \ +# vpa_sync_0_un0_n vma_int_0_un3_n a_c_18__n vma_int_0_un1_n vma_int_0_un0_n \ +# a_c_19__n bgack_030_int_0_un3_n bgack_030_int_0_un1_n a_c_20__n \ +# bgack_030_int_0_un0_n size_dma_0_0__un3_n a_c_21__n size_dma_0_0__un1_n \ +# size_dma_0_0__un0_n a_c_22__n size_dma_0_1__un3_n size_dma_0_1__un1_n a_c_23__n \ +# size_dma_0_1__un0_n ipl_030_0_0__un3_n a_c_24__n ipl_030_0_0__un1_n \ +# ipl_030_0_0__un0_n a_c_25__n ipl_030_0_1__un3_n ipl_030_0_1__un1_n a_c_26__n \ +# ipl_030_0_1__un0_n ipl_030_0_2__un3_n a_c_27__n ipl_030_0_2__un1_n \ +# ipl_030_0_2__un0_n a_c_28__n amiga_bus_enable_0_un3_n amiga_bus_enable_0_un1_n \ +# a_c_29__n amiga_bus_enable_0_un0_n uds_000_int_0_un3_n a_c_30__n \ +# uds_000_int_0_un1_n uds_000_int_0_un0_n a_c_31__n lds_000_int_0_un3_n \ +# lds_000_int_0_un1_n .model bus68030 .inputs A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF \ BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF VPA.BLIF RST.BLIF \ @@ -85,222 +92,239 @@ RW.BLIF A_30_.BLIF A_29_.BLIF A_28_.BLIF A_27_.BLIF A_26_.BLIF A_25_.BLIF \ A_24_.BLIF A_23_.BLIF A_22_.BLIF A_21_.BLIF A_20_.BLIF A_19_.BLIF A_18_.BLIF \ A_17_.BLIF A_16_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF SIZE_1_.BLIF \ DSACK_1_.BLIF AS_030.BLIF AS_000.BLIF DS_030.BLIF UDS_000.BLIF LDS_000.BLIF \ -A0.BLIF DTACK.BLIF SIZE_0_.BLIF DSACK_0_.BLIF BG_030_c.BLIF \ -BG_000DFFSHreg.BLIF BGACK_000_c.BLIF inst_BGACK_030_INTreg.BLIF \ -inst_FPU_CS_INTreg.BLIF CLK_030_c.BLIF inst_VMA_INTreg.BLIF \ -inst_AS_030_000_SYNC.BLIF CLK_000_c.BLIF inst_BGACK_030_INT_D.BLIF \ -inst_DTACK_SYNC.BLIF CLK_OSZI_c.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF \ -inst_CLK_000_D1.BLIF CLK_OUT_INTreg.BLIF inst_CLK_000_D2.BLIF \ -inst_CLK_000_D6.BLIF SM_AMIGA_5_.BLIF IPL_030DFFSH_0_reg.BLIF vcc_n_n.BLIF \ -gnd_n_n.BLIF IPL_030DFFSH_1_reg.BLIF inst_AS_000_INT.BLIF SM_AMIGA_6_.BLIF \ -IPL_030DFFSH_2_reg.BLIF inst_UDS_000_INT.BLIF inst_LDS_000_INT.BLIF \ -ipl_c_0__n.BLIF inst_DSACK1_INT.BLIF inst_CLK_000_D3.BLIF ipl_c_1__n.BLIF \ -state_machine_un23_clk_000_d0_n.BLIF inst_CLK_000_D5.BLIF ipl_c_2__n.BLIF \ -SM_AMIGA_3_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_1_.BLIF dsack_c_1__n.BLIF \ -inst_AS_000_DMA.BLIF inst_DS_000_DMA.BLIF DTACK_c.BLIF SIZE_DMA_0_.BLIF \ -SIZE_DMA_1_.BLIF inst_A0_DMA.BLIF G_103.BLIF CLK_CNT_N_0_.BLIF VPA_c.BLIF \ -CLK_CNT_N_1_.BLIF G_109.BLIF CLK_CNT_P_0_.BLIF RST_c.BLIF CLK_CNT_P_1_.BLIF \ -inst_CLK_000_D4.BLIF RESETDFFRHreg.BLIF SM_AMIGA_7_.BLIF \ -state_machine_un15_clk_000_d0_n.BLIF RW_c.BLIF SM_AMIGA_4_.BLIF \ -un1_AMIGA_BUS_ENABLE_0_sqmuxa_2.BLIF fc_c_0__n.BLIF inst_CLK_OUT_PRE.BLIF \ -SM_AMIGA_2_.BLIF fc_c_1__n.BLIF AMIGA_BUS_ENABLEDFFSHreg.BLIF \ -state_machine_un23_clk_000_d0_0_n.BLIF state_machine_un6_bgack_000_0_n.BLIF \ -N_214_0.BLIF BG_030_c_i.BLIF N_227_i.BLIF state_machine_un10_bg_030_0_n.BLIF \ -N_215_0.BLIF N_216_0.BLIF N_126_i.BLIF N_33_0.BLIF N_127_i.BLIF N_35_0.BLIF \ -state_machine_uds_000_int_5_0_n.BLIF N_130_i.BLIF \ -state_machine_lds_000_int_5_0_n.BLIF N_132_i.BLIF N_131_i.BLIF cpu_est_0_.BLIF \ -cpu_est_1_.BLIF N_133_i.BLIF cpu_est_2_.BLIF cpu_est_3_reg.BLIF N_134_i.BLIF \ -N_137_i.BLIF N_138_i.BLIF sm_amiga_ns_0_5__n.BLIF cpu_est_ns_1__n.BLIF \ -N_139_i.BLIF cpu_est_ns_2__n.BLIF N_140_i.BLIF N_46_0.BLIF N_52.BLIF \ -N_142_i.BLIF N_59.BLIF N_141_i.BLIF N_62.BLIF sm_amiga_ns_0_7__n.BLIF \ -N_65.BLIF N_144_i.BLIF N_67.BLIF state_machine_ds_000_dma_5_0_n.BLIF N_72.BLIF \ -CLK_030_c_i.BLIF N_77.BLIF AS_000_c_i.BLIF N_88.BLIF N_59_i.BLIF N_217.BLIF \ -N_61_0.BLIF N_219.BLIF N_62_i.BLIF N_221.BLIF CLK_000_D1_i.BLIF N_224.BLIF \ -N_65_i.BLIF N_225.BLIF N_66_i.BLIF N_226.BLIF N_67_i.BLIF N_128.BLIF \ -N_175_i.BLIF N_130.BLIF un1_as_000_dma5_i_0__n.BLIF N_132.BLIF \ -state_machine_un6_clk_000_d5_i_n.BLIF N_135.BLIF N_71_i.BLIF N_136.BLIF \ -DS_030_c_i.BLIF N_138.BLIF N_73_i.BLIF N_143.BLIF N_156_i.BLIF N_145.BLIF \ -un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i.BLIF N_146.BLIF N_75_0.BLIF N_147.BLIF \ -N_176_i.BLIF N_148.BLIF N_52_0.BLIF N_151.BLIF N_173_i.BLIF N_153.BLIF \ -N_226_i.BLIF N_154.BLIF N_77_0.BLIF N_155.BLIF N_72_i.BLIF N_173.BLIF \ -N_147_i.BLIF cpu_est_ns_0_0_x2_1_.BLIF N_148_i.BLIF \ -AMIGA_BUS_DATA_DIR_m1_0_x2.BLIF cpu_est_ns_e_0_0__n.BLIF N_228_1.BLIF \ -N_146_i.BLIF N_237.BLIF sm_amiga_ns_0_0__n.BLIF N_247.BLIF N_88_i.BLIF \ -N_227.BLIF N_145_i.BLIF N_228.BLIF cpu_est_ns_0_2__n.BLIF N_127.BLIF \ -N_143_i.BLIF N_66.BLIF N_154_i.BLIF N_175.BLIF N_161_i.BLIF N_176.BLIF \ -N_153_i.BLIF N_75.BLIF N_155_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_4.BLIF \ -cpu_est_ns_0_1__n.BLIF N_61.BLIF N_135_i.BLIF N_156.BLIF N_136_i.BLIF \ -N_73.BLIF N_57.BLIF N_225_i.BLIF N_71.BLIF \ -un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0.BLIF state_machine_un6_clk_000_d5_n.BLIF \ -N_219_i.BLIF un1_as_000_dma5_0__n.BLIF N_221_i.BLIF N_223.BLIF \ -state_machine_un15_clk_000_d0_0_n.BLIF state_machine_ds_000_dma_5_n.BLIF \ -N_144.BLIF N_66_i_1.BLIF N_141.BLIF N_66_i_2.BLIF N_142.BLIF N_66_i_3.BLIF \ -N_139.BLIF N_66_i_4.BLIF N_140.BLIF N_66_i_5.BLIF N_137.BLIF N_237_1.BLIF \ -N_134.BLIF N_237_2.BLIF N_133.BLIF N_247_1.BLIF N_131.BLIF N_247_2.BLIF \ -state_machine_lds_000_int_5_n.BLIF N_247_3.BLIF \ -state_machine_uds_000_int_5_n.BLIF N_247_4.BLIF N_35.BLIF N_247_5.BLIF \ -N_33.BLIF N_247_6.BLIF N_126.BLIF N_52_0_1.BLIF N_216.BLIF N_52_0_2.BLIF \ -N_215.BLIF N_224_1.BLIF state_machine_un10_bg_030_n.BLIF N_224_2.BLIF \ -N_214.BLIF N_227_1.BLIF state_machine_un6_bgack_000_n.BLIF N_227_2.BLIF \ -state_machine_un8_clk_000_d2_n.BLIF N_228_1_0.BLIF SIZE_DMA_1_sqmuxa.BLIF \ -N_127_1.BLIF SIZE_DMA_0_sqmuxa.BLIF N_127_2.BLIF AS_000_INT_1_sqmuxa.BLIF \ -N_151_1.BLIF N_249.BLIF SIZE_DMA_1_sqmuxa_1.BLIF CLK_000_D6_i.BLIF \ -state_machine_un8_clk_000_d2_1_n.BLIF N_228_i.BLIF sm_amiga_ns_0_1_0__n.BLIF \ -sm_amiga_i_5__n.BLIF cpu_est_ns_0_1_1__n.BLIF N_224_i.BLIF N_138_1.BLIF \ -N_223_i.BLIF N_130_1.BLIF SIZE_DMA_0_sqmuxa_i.BLIF N_128_1.BLIF \ -SIZE_DMA_1_sqmuxa_i.BLIF N_221_1.BLIF a_i_18__n.BLIF N_219_1.BLIF \ -a_i_16__n.BLIF vpa_sync_0_un3_n.BLIF a_i_19__n.BLIF vpa_sync_0_un1_n.BLIF \ -AS_030_000_SYNC_i.BLIF vpa_sync_0_un0_n.BLIF CLK_000_D2_i.BLIF \ -as_000_int_0_un3_n.BLIF BGACK_030_INT_i.BLIF as_000_int_0_un1_n.BLIF \ -nEXP_SPACE_i.BLIF as_000_int_0_un0_n.BLIF AS_030_i.BLIF \ -as_000_dma_0_un3_n.BLIF BGACK_030_INT_D_i.BLIF as_000_dma_0_un1_n.BLIF \ -sm_amiga_i_7__n.BLIF as_000_dma_0_un0_n.BLIF \ -state_machine_un8_clk_000_d2_i_n.BLIF bg_000_0_un3_n.BLIF sm_amiga_i_6__n.BLIF \ -bg_000_0_un1_n.BLIF sm_amiga_i_4__n.BLIF bg_000_0_un0_n.BLIF CLK_000_D0_i.BLIF \ -a0_dma_0_un3_n.BLIF RW_i.BLIF a0_dma_0_un1_n.BLIF UDS_000_i.BLIF \ -a0_dma_0_un0_n.BLIF LDS_000_i.BLIF dtack_sync_0_un3_n.BLIF DTACK_i.BLIF \ -dtack_sync_0_un1_n.BLIF VMA_INT_i.BLIF dtack_sync_0_un0_n.BLIF VPA_i.BLIF \ -lds_000_int_0_un3_n.BLIF cpu_est_i_0__n.BLIF lds_000_int_0_un1_n.BLIF \ -sm_amiga_i_3__n.BLIF lds_000_int_0_un0_n.BLIF cpu_est_i_3__n.BLIF \ -uds_000_int_0_un3_n.BLIF cpu_est_i_1__n.BLIF uds_000_int_0_un1_n.BLIF \ -A0_i.BLIF uds_000_int_0_un0_n.BLIF size_i_1__n.BLIF fpu_cs_int_0_un3_n.BLIF \ -a_i_30__n.BLIF fpu_cs_int_0_un1_n.BLIF a_i_31__n.BLIF fpu_cs_int_0_un0_n.BLIF \ -a_i_28__n.BLIF ds_000_dma_0_un3_n.BLIF a_i_29__n.BLIF ds_000_dma_0_un1_n.BLIF \ -a_i_26__n.BLIF ds_000_dma_0_un0_n.BLIF a_i_27__n.BLIF \ -as_030_000_sync_0_un3_n.BLIF a_i_24__n.BLIF as_030_000_sync_0_un1_n.BLIF \ -a_i_25__n.BLIF as_030_000_sync_0_un0_n.BLIF RST_i.BLIF \ -size_dma_0_1__un3_n.BLIF size_dma_0_1__un1_n.BLIF CLK_OSZI_i.BLIF \ -size_dma_0_1__un0_n.BLIF size_dma_0_0__un3_n.BLIF FPU_CS_INT_i.BLIF \ -size_dma_0_0__un1_n.BLIF AS_030_c.BLIF size_dma_0_0__un0_n.BLIF \ -bgack_030_int_0_un3_n.BLIF AS_000_c.BLIF bgack_030_int_0_un1_n.BLIF \ -bgack_030_int_0_un0_n.BLIF DS_030_c.BLIF dsack1_int_0_un3_n.BLIF \ -dsack1_int_0_un1_n.BLIF UDS_000_c.BLIF dsack1_int_0_un0_n.BLIF \ -state_machine_uds_000_int_5_0_m2_un3_n.BLIF LDS_000_c.BLIF \ -state_machine_uds_000_int_5_0_m2_un1_n.BLIF \ -state_machine_uds_000_int_5_0_m2_un0_n.BLIF size_c_0__n.BLIF \ -cpu_est_ns_0_0_m2_2__un3_n.BLIF cpu_est_ns_0_0_m2_2__un1_n.BLIF \ -size_c_1__n.BLIF cpu_est_ns_0_0_m2_2__un0_n.BLIF amiga_bus_enable_0_un3_n.BLIF \ -a_c_16__n.BLIF amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF \ -a_c_17__n.BLIF vma_int_0_un3_n.BLIF vma_int_0_un1_n.BLIF a_c_18__n.BLIF \ -vma_int_0_un0_n.BLIF ipl_030_0_0__un3_n.BLIF a_c_19__n.BLIF \ -ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF a_c_20__n.BLIF \ -ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un1_n.BLIF a_c_21__n.BLIF \ -ipl_030_0_1__un0_n.BLIF ipl_030_0_2__un3_n.BLIF a_c_22__n.BLIF \ -ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF a_c_23__n.BLIF \ -cpu_estse_0_un3_n.BLIF cpu_estse_0_un1_n.BLIF a_c_24__n.BLIF \ -cpu_estse_0_un0_n.BLIF cpu_estse_1_un3_n.BLIF a_c_25__n.BLIF \ -cpu_estse_1_un1_n.BLIF cpu_estse_1_un0_n.BLIF a_c_26__n.BLIF \ -cpu_estse_2_un3_n.BLIF cpu_estse_2_un1_n.BLIF a_c_27__n.BLIF \ -cpu_estse_2_un0_n.BLIF a_c_28__n.BLIF a_c_29__n.BLIF a_c_30__n.BLIF \ -a_c_31__n.BLIF A0_c.BLIF nEXP_SPACE_c.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF \ -DS_030.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF \ -SIZE_1_.PIN.BLIF A0.PIN.BLIF DSACK_1_.PIN.BLIF DTACK.PIN.BLIF +A0.BLIF DTACK.BLIF SIZE_0_.BLIF DSACK_0_.BLIF A0_c.BLIF \ +lds_000_int_0_un0_n.BLIF as_030_000_sync_0_un3_n.BLIF nEXP_SPACE_c.BLIF \ +as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF \ +ds_000_dma_0_un3_n.BLIF BG_030_c.BLIF ds_000_dma_0_un1_n.BLIF \ +ds_000_dma_0_un0_n.BLIF inst_BGACK_030_INTreg.BLIF BG_000DFFSHreg.BLIF \ +fpu_cs_int_0_un3_n.BLIF inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un1_n.BLIF \ +inst_VMA_INTreg.BLIF fpu_cs_int_0_un0_n.BLIF inst_AS_030_000_SYNC.BLIF \ +BGACK_000_c.BLIF dtack_sync_0_un3_n.BLIF inst_DTACK_SYNC.BLIF \ +dtack_sync_0_un1_n.BLIF inst_VPA_SYNC.BLIF CLK_030_c.BLIF \ +dtack_sync_0_un0_n.BLIF inst_VPA_D.BLIF a0_dma_0_un3_n.BLIF \ +inst_CLK_000_D0.BLIF CLK_000_c.BLIF a0_dma_0_un1_n.BLIF inst_CLK_000_D1.BLIF \ +a0_dma_0_un0_n.BLIF inst_CLK_000_D2.BLIF CLK_OSZI_c.BLIF inst_CLK_000_D6.BLIF \ +inst_CLK_OUT_PRE.BLIF inst_BGACK_030_INT_D.BLIF CLK_OUT_INTreg.BLIF \ +vcc_n_n.BLIF gnd_n_n.BLIF CLK_CNT_P_0_.BLIF IPL_030DFFSH_0_reg.BLIF \ +SM_AMIGA_5_.BLIF SM_AMIGA_7_.BLIF IPL_030DFFSH_1_reg.BLIF A0_DMA_1_sqmuxa.BLIF \ +SM_AMIGA_1_.BLIF IPL_030DFFSH_2_reg.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_6_.BLIF \ +ipl_c_0__n.BLIF inst_AS_000_DMA.BLIF inst_AS_000_INT.BLIF ipl_c_1__n.BLIF \ +inst_UDS_000_INT.BLIF inst_LDS_000_INT.BLIF ipl_c_2__n.BLIF \ +inst_DSACK1_INT.BLIF inst_CLK_000_D3.BLIF \ +state_machine_un57_bgack_030_int_n.BLIF dsack_c_1__n.BLIF \ +state_machine_un81_bgack_030_int_n.BLIF inst_CLK_000_D5.BLIF DTACK_c.BLIF \ +SM_AMIGA_3_.BLIF state_machine_un6_bgack_000_n.BLIF inst_DS_000_DMA.BLIF \ +SIZE_DMA_0_.BLIF SIZE_DMA_1_.BLIF inst_A0_DMA.BLIF inst_CLK_000_D4.BLIF \ +SM_AMIGA_4_.BLIF RST_c.BLIF SM_AMIGA_2_.BLIF state_machine_un10_bg_030_n.BLIF \ +RESETDFFRHreg.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1.BLIF SIZE_DMA_0_sqmuxa.BLIF \ +RW_c.BLIF state_machine_a0_dma_4_n.BLIF un1_AMIGA_BUS_ENABLE_2_sqmuxa.BLIF \ +fc_c_0__n.BLIF state_machine_lds_000_int_6_n.BLIF \ +state_machine_uds_000_int_6_n.BLIF fc_c_1__n.BLIF \ +state_machine_ds_000_dma_5_n.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_1.BLIF \ +AMIGA_BUS_ENABLEDFFSHreg.BLIF AMIGA_BUS_DATA_DIR_c.BLIF cpu_est_ns_0_1__n.BLIF \ +N_165_i.BLIF N_166_i.BLIF N_242_i.BLIF N_243_i.BLIF N_70_0.BLIF N_94_i.BLIF \ +N_222_i.BLIF N_100_i.BLIF AS_030_000_SYNC_i.BLIF \ +AMIGA_BUS_ENABLE_1_sqmuxa_1_i.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_2_i.BLIF \ +un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_0.BLIF AMIGA_BUS_ENABLE_0_sqmuxa_2_i.BLIF \ +AMIGA_BUS_ENABLE_2_sqmuxa_i.BLIF CLK_OUT_PRE_0.BLIF \ +un1_AMIGA_BUS_ENABLE_2_sqmuxa_0.BLIF BG_030_c_i.BLIF \ +state_machine_un8_bg_030_i_n.BLIF state_machine_un10_bg_030_0_n.BLIF \ +N_82_i.BLIF N_100.BLIF DS_030_c_i.BLIF cpu_est_0_.BLIF N_80_0.BLIF \ +cpu_est_1_.BLIF N_79_0.BLIF cpu_est_2_.BLIF A0_DMA_0_sqmuxa_i_0_0.BLIF \ +cpu_est_3_reg.BLIF N_77_i.BLIF N_76_i.BLIF N_75_i.BLIF N_162_i.BLIF \ +un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF cpu_est_ns_1__n.BLIF N_72_i.BLIF \ +cpu_est_ns_2__n.BLIF CLK_030_c_i.BLIF A0_DMA_0_sqmuxa_i_0.BLIF N_71_i.BLIF \ +N_221.BLIF N_69_i.BLIF N_223.BLIF CLK_000_D1_i.BLIF N_224.BLIF N_68_i.BLIF \ +N_225.BLIF N_161_i.BLIF N_31.BLIF N_63_i.BLIF N_33.BLIF N_61_i.BLIF N_35.BLIF \ +N_156_i.BLIF N_37.BLIF N_157_i.BLIF N_61.BLIF cpu_est_ns_e_0_0__n.BLIF \ +N_62.BLIF N_152_i.BLIF N_63.BLIF N_153_i.BLIF N_68.BLIF N_154_i.BLIF N_69.BLIF \ +sm_amiga_ns_e_0_0__n.BLIF N_72.BLIF N_149_i.BLIF N_75.BLIF N_150_i.BLIF \ +N_76.BLIF N_151_i.BLIF N_77.BLIF sm_amiga_ns_e_0_1__n.BLIF N_79.BLIF \ +N_146_i.BLIF N_80.BLIF N_147_i.BLIF N_82.BLIF N_148_i.BLIF N_92.BLIF \ +cpu_est_ns_0_2__n.BLIF N_93.BLIF N_145_i.BLIF N_94.BLIF \ +state_machine_ds_000_dma_5_0_n.BLIF N_95.BLIF N_143_i.BLIF N_96.BLIF \ +N_144_i.BLIF N_97.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF N_106.BLIF N_142_i.BLIF \ +N_107.BLIF N_246_i.BLIF N_125.BLIF N_176_i.BLIF N_231.BLIF N_160_i.BLIF \ +N_232.BLIF N_240_i.BLIF N_233.BLIF N_234.BLIF N_238_i.BLIF N_235.BLIF \ +N_236.BLIF N_163_i.BLIF N_238.BLIF N_236_i.BLIF N_240.BLIF N_242.BLIF \ +N_234_i.BLIF N_243.BLIF N_235_i.BLIF N_246.BLIF sm_amiga_ns_e_0_5__n.BLIF \ +N_142.BLIF N_167_i.BLIF N_143.BLIF N_233_i.BLIF N_144.BLIF N_145.BLIF \ +N_231_i.BLIF N_146.BLIF N_232_i.BLIF N_147.BLIF sm_amiga_ns_e_0_7__n.BLIF \ +N_148.BLIF state_machine_uds_000_int_6_0_n.BLIF N_149.BLIF N_125_i.BLIF \ +N_150.BLIF state_machine_lds_000_int_6_0_n.BLIF N_151.BLIF N_37_0.BLIF \ +N_152.BLIF N_107_i.BLIF N_153.BLIF N_35_0.BLIF N_154.BLIF N_106_i.BLIF \ +N_155.BLIF N_33_0.BLIF N_156.BLIF N_164_i.BLIF N_157.BLIF N_31_0.BLIF \ +N_160.BLIF N_225_0.BLIF N_161.BLIF N_224_0.BLIF N_162.BLIF N_223_0.BLIF \ +N_163.BLIF N_92_i.BLIF N_164.BLIF N_93_i.BLIF N_165.BLIF N_221_0.BLIF \ +N_166.BLIF state_machine_un6_bgack_000_0_n.BLIF N_167.BLIF CLK_000_D2_i.BLIF \ +AMIGA_BUS_ENABLE_1_sqmuxa_1.BLIF state_machine_un57_bgack_030_int_0_n.BLIF \ +AMIGA_BUS_ENABLE_2_sqmuxa.BLIF N_255_1.BLIF state_machine_un8_bg_030_n.BLIF \ +N_255_2.BLIF AMIGA_BUS_ENABLE_0_sqmuxa_2.BLIF N_265_1.BLIF \ +AMIGA_BUS_ENABLE_1_sqmuxa_2.BLIF N_265_2.BLIF N_70.BLIF N_265_3.BLIF \ +N_222.BLIF N_265_4.BLIF N_255.BLIF N_265_5.BLIF N_265.BLIF N_265_6.BLIF \ +VMA_INT_i.BLIF N_69_i_1.BLIF VPA_D_i.BLIF N_69_i_2.BLIF DTACK_i.BLIF \ +N_69_i_3.BLIF LDS_000_i.BLIF N_69_i_4.BLIF AS_000_i.BLIF N_69_i_5.BLIF \ +nEXP_SPACE_i.BLIF A0_DMA_0_sqmuxa_i_0_0_1.BLIF AS_030_i.BLIF N_82_i_1.BLIF \ +BGACK_030_INT_i.BLIF AMIGA_BUS_ENABLE_0_sqmuxa_2_1.BLIF BGACK_030_INT_D_i.BLIF \ +N_100_i_1.BLIF sm_amiga_i_4__n.BLIF N_100_i_2.BLIF cpu_est_i_3__n.BLIF \ +state_machine_un8_bg_030_1_n.BLIF sm_amiga_i_5__n.BLIF \ +state_machine_un8_bg_030_2_n.BLIF CLK_000_D0_i.BLIF cpu_est_ns_0_1_1__n.BLIF \ +state_machine_un81_bgack_030_int_i_n.BLIF cpu_est_ns_0_2_1__n.BLIF \ +cpu_est_i_0__n.BLIF state_machine_a0_dma_4_1_n.BLIF cpu_est_i_1__n.BLIF \ +state_machine_a0_dma_4_2_n.BLIF UDS_000_i.BLIF N_107_1.BLIF AS_000_DMA_i.BLIF \ +N_107_2.BLIF RW_i.BLIF N_97_1.BLIF cpu_est_i_2__n.BLIF N_97_2.BLIF \ +sm_amiga_i_3__n.BLIF N_95_1.BLIF sm_amiga_i_1__n.BLIF N_95_2.BLIF A0_i.BLIF \ +N_95_3.BLIF size_i_1__n.BLIF sm_amiga_ns_e_0_1_0__n.BLIF sm_amiga_i_0__n.BLIF \ +sm_amiga_ns_e_0_1_1__n.BLIF a_i_30__n.BLIF cpu_est_ns_0_1_2__n.BLIF \ +a_i_31__n.BLIF N_155_1.BLIF a_i_28__n.BLIF N_153_1.BLIF a_i_29__n.BLIF \ +N_151_1.BLIF a_i_26__n.BLIF N_144_1.BLIF a_i_27__n.BLIF N_125_1.BLIF \ +a_i_24__n.BLIF SIZE_DMA_0_sqmuxa_1.BLIF a_i_25__n.BLIF N_96_1.BLIF \ +a_i_19__n.BLIF N_93_1.BLIF a_i_16__n.BLIF \ +state_machine_lds_000_int_6_0_m2_un3_n.BLIF a_i_18__n.BLIF \ +state_machine_lds_000_int_6_0_m2_un1_n.BLIF RST_i.BLIF \ +state_machine_lds_000_int_6_0_m2_un0_n.BLIF cpu_estse_0_un3_n.BLIF \ +SIZE_DMA_0_sqmuxa_i.BLIF cpu_estse_0_un1_n.BLIF N_95_i.BLIF \ +cpu_estse_0_un0_n.BLIF N_96_i.BLIF cpu_estse_1_un3_n.BLIF N_97_i.BLIF \ +cpu_estse_1_un1_n.BLIF FPU_CS_INT_i.BLIF cpu_estse_1_un0_n.BLIF \ +CLK_000_D6_i.BLIF cpu_estse_2_un3_n.BLIF AS_030_c.BLIF cpu_estse_2_un1_n.BLIF \ +cpu_estse_2_un0_n.BLIF AS_000_c.BLIF bg_000_0_un3_n.BLIF bg_000_0_un1_n.BLIF \ +DS_030_c.BLIF bg_000_0_un0_n.BLIF dsack1_int_0_un3_n.BLIF UDS_000_c.BLIF \ +dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF LDS_000_c.BLIF \ +as_000_dma_0_un3_n.BLIF as_000_dma_0_un1_n.BLIF size_c_0__n.BLIF \ +as_000_dma_0_un0_n.BLIF as_000_int_0_un3_n.BLIF size_c_1__n.BLIF \ +as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF a_c_16__n.BLIF \ +vpa_sync_0_un3_n.BLIF vpa_sync_0_un1_n.BLIF a_c_17__n.BLIF \ +vpa_sync_0_un0_n.BLIF vma_int_0_un3_n.BLIF a_c_18__n.BLIF vma_int_0_un1_n.BLIF \ +vma_int_0_un0_n.BLIF a_c_19__n.BLIF bgack_030_int_0_un3_n.BLIF \ +bgack_030_int_0_un1_n.BLIF a_c_20__n.BLIF bgack_030_int_0_un0_n.BLIF \ +size_dma_0_0__un3_n.BLIF a_c_21__n.BLIF size_dma_0_0__un1_n.BLIF \ +size_dma_0_0__un0_n.BLIF a_c_22__n.BLIF size_dma_0_1__un3_n.BLIF \ +size_dma_0_1__un1_n.BLIF a_c_23__n.BLIF size_dma_0_1__un0_n.BLIF \ +ipl_030_0_0__un3_n.BLIF a_c_24__n.BLIF ipl_030_0_0__un1_n.BLIF \ +ipl_030_0_0__un0_n.BLIF a_c_25__n.BLIF ipl_030_0_1__un3_n.BLIF \ +ipl_030_0_1__un1_n.BLIF a_c_26__n.BLIF ipl_030_0_1__un0_n.BLIF \ +ipl_030_0_2__un3_n.BLIF a_c_27__n.BLIF ipl_030_0_2__un1_n.BLIF \ +ipl_030_0_2__un0_n.BLIF a_c_28__n.BLIF amiga_bus_enable_0_un3_n.BLIF \ +amiga_bus_enable_0_un1_n.BLIF a_c_29__n.BLIF amiga_bus_enable_0_un0_n.BLIF \ +uds_000_int_0_un3_n.BLIF a_c_30__n.BLIF uds_000_int_0_un1_n.BLIF \ +uds_000_int_0_un0_n.BLIF a_c_31__n.BLIF lds_000_int_0_un3_n.BLIF \ +lds_000_int_0_un1_n.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF DS_030.PIN.BLIF \ +UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF \ +A0.PIN.BLIF DSACK_1_.PIN.BLIF DTACK.PIN.BLIF .outputs IPL_030_2_ BERR BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS AVEC \ AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ -CIIN IPL_030_1_ IPL_030_0_ cpu_est_1_.D cpu_est_1_.C cpu_est_1_.AR \ -cpu_est_2_.D cpu_est_2_.C cpu_est_2_.AR cpu_est_3_reg.D cpu_est_3_reg.C \ -cpu_est_3_reg.AR cpu_est_0_.D cpu_est_0_.C cpu_est_0_.AR SM_AMIGA_4_.D \ -SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR \ -SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C \ -SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR CLK_CNT_P_1_.D \ -CLK_CNT_P_1_.C CLK_CNT_P_1_.AR SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_0_.AP \ -SIZE_DMA_1_.D SIZE_DMA_1_.C SIZE_DMA_1_.AP IPL_030DFFSH_0_reg.D \ -IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP IPL_030DFFSH_1_reg.D \ -IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D \ -IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D SM_AMIGA_7_.C \ -SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.D \ -SM_AMIGA_5_.C SM_AMIGA_5_.AR inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP \ -inst_DSACK1_INT.D inst_DSACK1_INT.C inst_DSACK1_INT.AP inst_VMA_INTreg.D \ -inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_BGACK_030_INTreg.D \ -inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP CLK_CNT_N_0_.D CLK_CNT_N_0_.C \ -CLK_CNT_N_0_.AR CLK_CNT_N_1_.D CLK_CNT_N_1_.C CLK_CNT_N_1_.AP CLK_CNT_P_0_.D \ -CLK_CNT_P_0_.C CLK_CNT_P_0_.AR inst_LDS_000_INT.D inst_LDS_000_INT.C \ -inst_LDS_000_INT.AP inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP \ -inst_A0_DMA.D inst_A0_DMA.C inst_A0_DMA.AP BG_000DFFSHreg.D BG_000DFFSHreg.C \ -BG_000DFFSHreg.AP inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_000_DMA.AP \ -AMIGA_BUS_ENABLEDFFSHreg.D AMIGA_BUS_ENABLEDFFSHreg.C \ -AMIGA_BUS_ENABLEDFFSHreg.AP inst_AS_000_INT.D inst_AS_000_INT.C \ -inst_AS_000_INT.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C \ -inst_AS_030_000_SYNC.AP inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DS_000_DMA.AP \ +CIIN IPL_030_1_ IPL_030_0_ cpu_est_0_.D cpu_est_0_.C cpu_est_0_.AR \ +cpu_est_1_.D cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.D cpu_est_2_.C \ +cpu_est_2_.AR cpu_est_3_reg.D cpu_est_3_reg.C cpu_est_3_reg.AR \ +IPL_030DFFSH_0_reg.D IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP \ +IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP \ +IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D \ +SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR \ +SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C \ +SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D \ +SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR \ +SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR inst_VPA_SYNC.D inst_VPA_SYNC.C \ +inst_VPA_SYNC.AP inst_VMA_INTreg.D inst_VMA_INTreg.C inst_VMA_INTreg.AP \ +inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP \ +inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR SIZE_DMA_0_.D \ +SIZE_DMA_0_.C SIZE_DMA_0_.AP SIZE_DMA_1_.D SIZE_DMA_1_.C SIZE_DMA_1_.AP \ inst_FPU_CS_INTreg.D inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP \ -inst_UDS_000_INT.D inst_UDS_000_INT.C inst_UDS_000_INT.AP CLK_OUT_INTreg.D \ -CLK_OUT_INTreg.C CLK_OUT_INTreg.AR inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C \ -inst_CLK_OUT_PRE.AR inst_CLK_000_D5.D inst_CLK_000_D5.C inst_CLK_000_D5.AP \ -inst_CLK_000_D6.D inst_CLK_000_D6.C inst_CLK_000_D6.AP inst_CLK_000_D4.D \ -inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_CLK_000_D2.D inst_CLK_000_D2.C \ -inst_CLK_000_D2.AP inst_CLK_000_D3.D inst_CLK_000_D3.C inst_CLK_000_D3.AP \ -inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP \ -inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D0.AP RESETDFFRHreg.D \ -RESETDFFRHreg.C RESETDFFRHreg.AR inst_CLK_000_D1.D inst_CLK_000_D1.C \ -inst_CLK_000_D1.AP SIZE_1_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 \ -DTACK SIZE_0_ DSACK_0_ BG_030_c BGACK_000_c CLK_030_c CLK_000_c CLK_OSZI_c \ -vcc_n_n gnd_n_n ipl_c_0__n ipl_c_1__n state_machine_un23_clk_000_d0_n \ -ipl_c_2__n dsack_c_1__n DTACK_c VPA_c RST_c state_machine_un15_clk_000_d0_n \ -RW_c un1_AMIGA_BUS_ENABLE_0_sqmuxa_2 fc_c_0__n fc_c_1__n \ -state_machine_un23_clk_000_d0_0_n state_machine_un6_bgack_000_0_n N_214_0 \ -BG_030_c_i N_227_i state_machine_un10_bg_030_0_n N_215_0 N_216_0 N_126_i \ -N_33_0 N_127_i N_35_0 state_machine_uds_000_int_5_0_n N_130_i \ -state_machine_lds_000_int_5_0_n N_132_i N_131_i N_133_i N_134_i N_137_i \ -N_138_i sm_amiga_ns_0_5__n cpu_est_ns_1__n N_139_i cpu_est_ns_2__n N_140_i \ -N_46_0 N_52 N_142_i N_59 N_141_i N_62 sm_amiga_ns_0_7__n N_65 N_144_i N_67 \ -state_machine_ds_000_dma_5_0_n N_72 CLK_030_c_i N_77 AS_000_c_i N_88 N_59_i \ -N_217 N_61_0 N_219 N_62_i N_221 CLK_000_D1_i N_224 N_65_i N_225 N_66_i N_226 \ -N_67_i N_128 N_175_i N_130 un1_as_000_dma5_i_0__n N_132 \ -state_machine_un6_clk_000_d5_i_n N_135 N_71_i N_136 DS_030_c_i N_138 N_73_i \ -N_143 N_156_i N_145 un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i N_146 N_75_0 N_147 \ -N_176_i N_148 N_52_0 N_151 N_173_i N_153 N_226_i N_154 N_77_0 N_155 N_72_i \ -N_173 N_147_i N_148_i cpu_est_ns_e_0_0__n N_228_1 N_146_i N_237 \ -sm_amiga_ns_0_0__n N_247 N_88_i N_227 N_145_i N_228 cpu_est_ns_0_2__n N_127 \ -N_143_i N_66 N_154_i N_175 N_161_i N_176 N_153_i N_75 N_155_i \ -un1_AMIGA_BUS_ENABLE_1_sqmuxa_4 cpu_est_ns_0_1__n N_61 N_135_i N_156 N_136_i \ -N_73 N_57 N_225_i N_71 un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0 \ -state_machine_un6_clk_000_d5_n N_219_i un1_as_000_dma5_0__n N_221_i N_223 \ -state_machine_un15_clk_000_d0_0_n state_machine_ds_000_dma_5_n N_144 N_66_i_1 \ -N_141 N_66_i_2 N_142 N_66_i_3 N_139 N_66_i_4 N_140 N_66_i_5 N_137 N_237_1 \ -N_134 N_237_2 N_133 N_247_1 N_131 N_247_2 state_machine_lds_000_int_5_n \ -N_247_3 state_machine_uds_000_int_5_n N_247_4 N_35 N_247_5 N_33 N_247_6 N_126 \ -N_52_0_1 N_216 N_52_0_2 N_215 N_224_1 state_machine_un10_bg_030_n N_224_2 \ -N_214 N_227_1 state_machine_un6_bgack_000_n N_227_2 \ -state_machine_un8_clk_000_d2_n N_228_1_0 SIZE_DMA_1_sqmuxa N_127_1 \ -SIZE_DMA_0_sqmuxa N_127_2 AS_000_INT_1_sqmuxa N_151_1 N_249 \ -SIZE_DMA_1_sqmuxa_1 CLK_000_D6_i state_machine_un8_clk_000_d2_1_n N_228_i \ -sm_amiga_ns_0_1_0__n sm_amiga_i_5__n cpu_est_ns_0_1_1__n N_224_i N_138_1 \ -N_223_i N_130_1 SIZE_DMA_0_sqmuxa_i N_128_1 SIZE_DMA_1_sqmuxa_i N_221_1 \ -a_i_18__n N_219_1 a_i_16__n vpa_sync_0_un3_n a_i_19__n vpa_sync_0_un1_n \ -AS_030_000_SYNC_i vpa_sync_0_un0_n CLK_000_D2_i as_000_int_0_un3_n \ -BGACK_030_INT_i as_000_int_0_un1_n nEXP_SPACE_i as_000_int_0_un0_n AS_030_i \ -as_000_dma_0_un3_n BGACK_030_INT_D_i as_000_dma_0_un1_n sm_amiga_i_7__n \ -as_000_dma_0_un0_n state_machine_un8_clk_000_d2_i_n bg_000_0_un3_n \ -sm_amiga_i_6__n bg_000_0_un1_n sm_amiga_i_4__n bg_000_0_un0_n CLK_000_D0_i \ -a0_dma_0_un3_n RW_i a0_dma_0_un1_n UDS_000_i a0_dma_0_un0_n LDS_000_i \ -dtack_sync_0_un3_n DTACK_i dtack_sync_0_un1_n VMA_INT_i dtack_sync_0_un0_n \ -VPA_i lds_000_int_0_un3_n cpu_est_i_0__n lds_000_int_0_un1_n sm_amiga_i_3__n \ -lds_000_int_0_un0_n cpu_est_i_3__n uds_000_int_0_un3_n cpu_est_i_1__n \ -uds_000_int_0_un1_n A0_i uds_000_int_0_un0_n size_i_1__n fpu_cs_int_0_un3_n \ -a_i_30__n fpu_cs_int_0_un1_n a_i_31__n fpu_cs_int_0_un0_n a_i_28__n \ -ds_000_dma_0_un3_n a_i_29__n ds_000_dma_0_un1_n a_i_26__n ds_000_dma_0_un0_n \ -a_i_27__n as_030_000_sync_0_un3_n a_i_24__n as_030_000_sync_0_un1_n a_i_25__n \ -as_030_000_sync_0_un0_n RST_i size_dma_0_1__un3_n size_dma_0_1__un1_n \ -CLK_OSZI_i size_dma_0_1__un0_n size_dma_0_0__un3_n FPU_CS_INT_i \ -size_dma_0_0__un1_n AS_030_c size_dma_0_0__un0_n bgack_030_int_0_un3_n \ -AS_000_c bgack_030_int_0_un1_n bgack_030_int_0_un0_n DS_030_c \ -dsack1_int_0_un3_n dsack1_int_0_un1_n UDS_000_c dsack1_int_0_un0_n \ -state_machine_uds_000_int_5_0_m2_un3_n LDS_000_c \ -state_machine_uds_000_int_5_0_m2_un1_n state_machine_uds_000_int_5_0_m2_un0_n \ -size_c_0__n cpu_est_ns_0_0_m2_2__un3_n cpu_est_ns_0_0_m2_2__un1_n size_c_1__n \ -cpu_est_ns_0_0_m2_2__un0_n amiga_bus_enable_0_un3_n a_c_16__n \ -amiga_bus_enable_0_un1_n amiga_bus_enable_0_un0_n a_c_17__n vma_int_0_un3_n \ -vma_int_0_un1_n a_c_18__n vma_int_0_un0_n ipl_030_0_0__un3_n a_c_19__n \ -ipl_030_0_0__un1_n ipl_030_0_0__un0_n a_c_20__n ipl_030_0_1__un3_n \ -ipl_030_0_1__un1_n a_c_21__n ipl_030_0_1__un0_n ipl_030_0_2__un3_n a_c_22__n \ -ipl_030_0_2__un1_n ipl_030_0_2__un0_n a_c_23__n cpu_estse_0_un3_n \ -cpu_estse_0_un1_n a_c_24__n cpu_estse_0_un0_n cpu_estse_1_un3_n a_c_25__n \ -cpu_estse_1_un1_n cpu_estse_1_un0_n a_c_26__n cpu_estse_2_un3_n \ -cpu_estse_2_un1_n a_c_27__n cpu_estse_2_un0_n a_c_28__n a_c_29__n a_c_30__n \ -a_c_31__n A0_c nEXP_SPACE_c AS_030.OE AS_000.OE DS_030.OE UDS_000.OE \ -LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE \ -DSACK_0_.OE AVEC_EXP.OE CIIN.OE G_103 G_109 cpu_est_ns_0_0_x2_1_ \ -AMIGA_BUS_DATA_DIR_m1_0_x2 +inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_A0_DMA.D \ +inst_A0_DMA.C inst_A0_DMA.AP BG_000DFFSHreg.D BG_000DFFSHreg.C \ +BG_000DFFSHreg.AP inst_DSACK1_INT.D inst_DSACK1_INT.C inst_DSACK1_INT.AP \ +inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_000_DMA.AP inst_AS_000_INT.D \ +inst_AS_000_INT.C inst_AS_000_INT.AP AMIGA_BUS_ENABLEDFFSHreg.D \ +AMIGA_BUS_ENABLEDFFSHreg.C AMIGA_BUS_ENABLEDFFSHreg.AP inst_UDS_000_INT.D \ +inst_UDS_000_INT.C inst_UDS_000_INT.AP inst_LDS_000_INT.D inst_LDS_000_INT.C \ +inst_LDS_000_INT.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C \ +inst_AS_030_000_SYNC.AP inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DS_000_DMA.AP \ +inst_CLK_000_D5.D inst_CLK_000_D5.C inst_CLK_000_D5.AP inst_CLK_000_D6.D \ +inst_CLK_000_D6.C inst_CLK_000_D6.AP inst_CLK_000_D4.D inst_CLK_000_D4.C \ +inst_CLK_000_D4.AP CLK_CNT_P_0_.D CLK_CNT_P_0_.C CLK_CNT_P_0_.AR \ +inst_CLK_000_D2.D inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D3.D \ +inst_CLK_000_D3.C inst_CLK_000_D3.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C \ +CLK_OUT_INTreg.AR inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C \ +inst_BGACK_030_INT_D.AP inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D0.AP \ +inst_VPA_D.D inst_VPA_D.C inst_VPA_D.AP RESETDFFRHreg.D RESETDFFRHreg.C \ +RESETDFFRHreg.AR inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D1.AP \ +SIZE_1_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 DTACK SIZE_0_ \ +DSACK_0_ A0_c lds_000_int_0_un0_n as_030_000_sync_0_un3_n nEXP_SPACE_c \ +as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n ds_000_dma_0_un3_n BG_030_c \ +ds_000_dma_0_un1_n ds_000_dma_0_un0_n fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n \ +fpu_cs_int_0_un0_n BGACK_000_c dtack_sync_0_un3_n dtack_sync_0_un1_n CLK_030_c \ +dtack_sync_0_un0_n a0_dma_0_un3_n CLK_000_c a0_dma_0_un1_n a0_dma_0_un0_n \ +CLK_OSZI_c vcc_n_n gnd_n_n A0_DMA_1_sqmuxa ipl_c_0__n ipl_c_1__n ipl_c_2__n \ +state_machine_un57_bgack_030_int_n dsack_c_1__n \ +state_machine_un81_bgack_030_int_n DTACK_c state_machine_un6_bgack_000_n RST_c \ +state_machine_un10_bg_030_n un1_AS_030_000_SYNC_1_sqmuxa_1 SIZE_DMA_0_sqmuxa \ +RW_c state_machine_a0_dma_4_n un1_AMIGA_BUS_ENABLE_2_sqmuxa fc_c_0__n \ +state_machine_lds_000_int_6_n state_machine_uds_000_int_6_n fc_c_1__n \ +state_machine_ds_000_dma_5_n un1_AMIGA_BUS_ENABLE_1_sqmuxa_1 \ +AMIGA_BUS_DATA_DIR_c cpu_est_ns_0_1__n N_165_i N_166_i N_242_i N_243_i N_70_0 \ +N_94_i N_222_i N_100_i AS_030_000_SYNC_i AMIGA_BUS_ENABLE_1_sqmuxa_1_i \ +AMIGA_BUS_ENABLE_1_sqmuxa_2_i un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_0 \ +AMIGA_BUS_ENABLE_0_sqmuxa_2_i AMIGA_BUS_ENABLE_2_sqmuxa_i \ +un1_AMIGA_BUS_ENABLE_2_sqmuxa_0 BG_030_c_i state_machine_un8_bg_030_i_n \ +state_machine_un10_bg_030_0_n N_82_i N_100 DS_030_c_i N_80_0 N_79_0 \ +A0_DMA_0_sqmuxa_i_0_0 N_77_i N_76_i N_75_i N_162_i \ +un1_AS_030_000_SYNC_1_sqmuxa_1_0 cpu_est_ns_1__n N_72_i cpu_est_ns_2__n \ +CLK_030_c_i A0_DMA_0_sqmuxa_i_0 N_71_i N_221 N_69_i N_223 CLK_000_D1_i N_224 \ +N_68_i N_225 N_161_i N_31 N_63_i N_33 N_61_i N_35 N_156_i N_37 N_157_i N_61 \ +cpu_est_ns_e_0_0__n N_62 N_152_i N_63 N_153_i N_68 N_154_i N_69 \ +sm_amiga_ns_e_0_0__n N_72 N_149_i N_75 N_150_i N_76 N_151_i N_77 \ +sm_amiga_ns_e_0_1__n N_79 N_146_i N_80 N_147_i N_82 N_148_i N_92 \ +cpu_est_ns_0_2__n N_93 N_145_i N_94 state_machine_ds_000_dma_5_0_n N_95 \ +N_143_i N_96 N_144_i N_97 AMIGA_BUS_DATA_DIR_c_0 N_106 N_142_i N_107 N_246_i \ +N_125 N_176_i N_231 N_160_i N_232 N_240_i N_233 N_234 N_238_i N_235 N_236 \ +N_163_i N_238 N_236_i N_240 N_242 N_234_i N_243 N_235_i N_246 \ +sm_amiga_ns_e_0_5__n N_142 N_167_i N_143 N_233_i N_144 N_145 N_231_i N_146 \ +N_232_i N_147 sm_amiga_ns_e_0_7__n N_148 state_machine_uds_000_int_6_0_n N_149 \ +N_125_i N_150 state_machine_lds_000_int_6_0_n N_151 N_37_0 N_152 N_107_i N_153 \ +N_35_0 N_154 N_106_i N_155 N_33_0 N_156 N_164_i N_157 N_31_0 N_160 N_225_0 \ +N_161 N_224_0 N_162 N_223_0 N_163 N_92_i N_164 N_93_i N_165 N_221_0 N_166 \ +state_machine_un6_bgack_000_0_n N_167 CLK_000_D2_i AMIGA_BUS_ENABLE_1_sqmuxa_1 \ +state_machine_un57_bgack_030_int_0_n AMIGA_BUS_ENABLE_2_sqmuxa N_255_1 \ +state_machine_un8_bg_030_n N_255_2 AMIGA_BUS_ENABLE_0_sqmuxa_2 N_265_1 \ +AMIGA_BUS_ENABLE_1_sqmuxa_2 N_265_2 N_70 N_265_3 N_222 N_265_4 N_255 N_265_5 \ +N_265 N_265_6 VMA_INT_i N_69_i_1 VPA_D_i N_69_i_2 DTACK_i N_69_i_3 LDS_000_i \ +N_69_i_4 AS_000_i N_69_i_5 nEXP_SPACE_i A0_DMA_0_sqmuxa_i_0_0_1 AS_030_i \ +N_82_i_1 BGACK_030_INT_i AMIGA_BUS_ENABLE_0_sqmuxa_2_1 BGACK_030_INT_D_i \ +N_100_i_1 sm_amiga_i_4__n N_100_i_2 cpu_est_i_3__n \ +state_machine_un8_bg_030_1_n sm_amiga_i_5__n state_machine_un8_bg_030_2_n \ +CLK_000_D0_i cpu_est_ns_0_1_1__n state_machine_un81_bgack_030_int_i_n \ +cpu_est_ns_0_2_1__n cpu_est_i_0__n state_machine_a0_dma_4_1_n cpu_est_i_1__n \ +state_machine_a0_dma_4_2_n UDS_000_i N_107_1 AS_000_DMA_i N_107_2 RW_i N_97_1 \ +cpu_est_i_2__n N_97_2 sm_amiga_i_3__n N_95_1 sm_amiga_i_1__n N_95_2 A0_i \ +N_95_3 size_i_1__n sm_amiga_ns_e_0_1_0__n sm_amiga_i_0__n \ +sm_amiga_ns_e_0_1_1__n a_i_30__n cpu_est_ns_0_1_2__n a_i_31__n N_155_1 \ +a_i_28__n N_153_1 a_i_29__n N_151_1 a_i_26__n N_144_1 a_i_27__n N_125_1 \ +a_i_24__n SIZE_DMA_0_sqmuxa_1 a_i_25__n N_96_1 a_i_19__n N_93_1 a_i_16__n \ +state_machine_lds_000_int_6_0_m2_un3_n a_i_18__n \ +state_machine_lds_000_int_6_0_m2_un1_n RST_i \ +state_machine_lds_000_int_6_0_m2_un0_n cpu_estse_0_un3_n SIZE_DMA_0_sqmuxa_i \ +cpu_estse_0_un1_n N_95_i cpu_estse_0_un0_n N_96_i cpu_estse_1_un3_n N_97_i \ +cpu_estse_1_un1_n FPU_CS_INT_i cpu_estse_1_un0_n CLK_000_D6_i \ +cpu_estse_2_un3_n AS_030_c cpu_estse_2_un1_n cpu_estse_2_un0_n AS_000_c \ +bg_000_0_un3_n bg_000_0_un1_n DS_030_c bg_000_0_un0_n dsack1_int_0_un3_n \ +UDS_000_c dsack1_int_0_un1_n dsack1_int_0_un0_n LDS_000_c as_000_dma_0_un3_n \ +as_000_dma_0_un1_n size_c_0__n as_000_dma_0_un0_n as_000_int_0_un3_n \ +size_c_1__n as_000_int_0_un1_n as_000_int_0_un0_n a_c_16__n vpa_sync_0_un3_n \ +vpa_sync_0_un1_n a_c_17__n vpa_sync_0_un0_n vma_int_0_un3_n a_c_18__n \ +vma_int_0_un1_n vma_int_0_un0_n a_c_19__n bgack_030_int_0_un3_n \ +bgack_030_int_0_un1_n a_c_20__n bgack_030_int_0_un0_n size_dma_0_0__un3_n \ +a_c_21__n size_dma_0_0__un1_n size_dma_0_0__un0_n a_c_22__n \ +size_dma_0_1__un3_n size_dma_0_1__un1_n a_c_23__n size_dma_0_1__un0_n \ +ipl_030_0_0__un3_n a_c_24__n ipl_030_0_0__un1_n ipl_030_0_0__un0_n a_c_25__n \ +ipl_030_0_1__un3_n ipl_030_0_1__un1_n a_c_26__n ipl_030_0_1__un0_n \ +ipl_030_0_2__un3_n a_c_27__n ipl_030_0_2__un1_n ipl_030_0_2__un0_n a_c_28__n \ +amiga_bus_enable_0_un3_n amiga_bus_enable_0_un1_n a_c_29__n \ +amiga_bus_enable_0_un0_n uds_000_int_0_un3_n a_c_30__n uds_000_int_0_un1_n \ +uds_000_int_0_un0_n a_c_31__n lds_000_int_0_un3_n lds_000_int_0_un1_n \ +AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE \ +A0.OE DSACK_1_.OE DTACK.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE \ +CLK_OUT_PRE_0 +.names cpu_est_ns_e_0_0__n.BLIF cpu_est_0_.D +0 1 .names cpu_estse_0_un1_n.BLIF cpu_estse_0_un0_n.BLIF cpu_est_1_.D 1- 1 -1 1 @@ -310,24 +334,6 @@ AMIGA_BUS_DATA_DIR_m1_0_x2 .names cpu_estse_2_un1_n.BLIF cpu_estse_2_un0_n.BLIF cpu_est_3_reg.D 1- 1 -1 1 -.names cpu_est_ns_e_0_0__n.BLIF cpu_est_0_.D -0 1 -.names CLK_000_D0_i.BLIF N_134_i.BLIF SM_AMIGA_4_.D -11 1 -.names N_135_i.BLIF N_136_i.BLIF SM_AMIGA_3_.D -11 1 -.names sm_amiga_ns_0_5__n.BLIF SM_AMIGA_2_.D -0 1 -.names N_46_0.BLIF SM_AMIGA_1_.D -0 1 -.names sm_amiga_ns_0_7__n.BLIF SM_AMIGA_0_.D -0 1 -.names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D -1- 1 --1 1 -.names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D -1- 1 --1 1 .names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF IPL_030DFFSH_0_reg.D 1- 1 -1 1 @@ -337,18 +343,25 @@ AMIGA_BUS_DATA_DIR_m1_0_x2 .names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF IPL_030DFFSH_2_reg.D 1- 1 -1 1 -.names sm_amiga_ns_0_0__n.BLIF SM_AMIGA_7_.D +.names sm_amiga_ns_e_0_0__n.BLIF SM_AMIGA_7_.D 0 1 -.names N_131_i.BLIF N_132_i.BLIF SM_AMIGA_6_.D +.names sm_amiga_ns_e_0_1__n.BLIF SM_AMIGA_6_.D +0 1 +.names N_160_i.BLIF N_240_i.BLIF SM_AMIGA_5_.D 11 1 -.names inst_CLK_000_D0.BLIF N_133_i.BLIF SM_AMIGA_5_.D +.names N_61.BLIF N_238_i.BLIF SM_AMIGA_4_.D 11 1 +.names N_163_i.BLIF N_236_i.BLIF SM_AMIGA_3_.D +11 1 +.names sm_amiga_ns_e_0_5__n.BLIF SM_AMIGA_2_.D +0 1 +.names N_167_i.BLIF N_233_i.BLIF SM_AMIGA_1_.D +11 1 +.names sm_amiga_ns_e_0_7__n.BLIF SM_AMIGA_0_.D +0 1 .names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D 1- 1 -1 1 -.names dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF inst_DSACK1_INT.D -1- 1 --1 1 .names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF inst_VMA_INTreg.D 1- 1 -1 1 @@ -356,11 +369,13 @@ AMIGA_BUS_DATA_DIR_m1_0_x2 inst_BGACK_030_INTreg.D 1- 1 -1 1 -.names G_103.BLIF CLK_CNT_N_0_.D -0 1 -.names G_109.BLIF CLK_CNT_P_0_.D -0 1 -.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INT.D +.names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D +1- 1 +-1 1 +.names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D +1- 1 +-1 1 +.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D 1- 1 -1 1 .names dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.D @@ -372,14 +387,23 @@ inst_BGACK_030_INTreg.D .names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF BG_000DFFSHreg.D 1- 1 -1 1 +.names dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF inst_DSACK1_INT.D +1- 1 +-1 1 .names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF inst_AS_000_DMA.D 1- 1 -1 1 +.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INT.D +1- 1 +-1 1 .names amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF \ AMIGA_BUS_ENABLEDFFSHreg.D 1- 1 -1 1 -.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INT.D +.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF inst_UDS_000_INT.D +1- 1 +-1 1 +.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INT.D 1- 1 -1 1 .names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF \ @@ -389,562 +413,656 @@ inst_AS_030_000_SYNC.D .names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF inst_DS_000_DMA.D 1- 1 -1 1 -.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D -1- 1 --1 1 -.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF inst_UDS_000_INT.D -1- 1 --1 1 -.names G_109.BLIF G_103.BLIF inst_CLK_OUT_PRE.D +.names CLK_CNT_P_0_.BLIF CLK_CNT_P_0_.D +0 1 +.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n +11 1 +.names N_35.BLIF as_030_000_sync_0_un3_n +0 1 +.names un1_AS_030_000_SYNC_1_sqmuxa_1.BLIF N_35.BLIF as_030_000_sync_0_un1_n +11 1 +.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ +as_030_000_sync_0_un0_n +11 1 +.names A0_DMA_1_sqmuxa.BLIF ds_000_dma_0_un3_n +0 1 +.names inst_DS_000_DMA.BLIF A0_DMA_1_sqmuxa.BLIF ds_000_dma_0_un1_n +11 1 +.names state_machine_ds_000_dma_5_n.BLIF ds_000_dma_0_un3_n.BLIF \ +ds_000_dma_0_un0_n +11 1 +.names N_33.BLIF fpu_cs_int_0_un3_n +0 1 +.names AS_030_c.BLIF N_33.BLIF fpu_cs_int_0_un1_n +11 1 +.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n +11 1 +.names N_225.BLIF dtack_sync_0_un3_n +0 1 +.names N_97_i.BLIF N_225.BLIF dtack_sync_0_un1_n +11 1 +.names inst_DTACK_SYNC.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n +11 1 +.names A0_DMA_1_sqmuxa.BLIF a0_dma_0_un3_n +0 1 +.names inst_A0_DMA.BLIF A0_DMA_1_sqmuxa.BLIF a0_dma_0_un1_n +11 1 +.names state_machine_a0_dma_4_n.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n 11 1 .names vcc_n_n 1 .names gnd_n_n -.names state_machine_un23_clk_000_d0_0_n.BLIF state_machine_un23_clk_000_d0_n -0 1 -.names state_machine_un15_clk_000_d0_0_n.BLIF state_machine_un15_clk_000_d0_n -0 1 -.names un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0.BLIF un1_AMIGA_BUS_ENABLE_0_sqmuxa_2 -0 1 -.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \ -state_machine_un23_clk_000_d0_0_n -11 1 -.names BGACK_000_c.BLIF N_65.BLIF state_machine_un6_bgack_000_0_n -11 1 -.names AS_030_i.BLIF N_224_i.BLIF N_214_0 -11 1 -.names BG_030_c.BLIF BG_030_c_i -0 1 -.names N_227.BLIF N_227_i -0 1 -.names BG_030_c_i.BLIF N_227_i.BLIF state_machine_un10_bg_030_0_n -11 1 -.names AS_030_i.BLIF N_73.BLIF N_215_0 -11 1 -.names AS_030_i.BLIF N_228_i.BLIF N_216_0 -11 1 -.names N_126.BLIF N_126_i -0 1 -.names AS_030_i.BLIF N_126_i.BLIF N_33_0 -11 1 -.names N_127.BLIF N_127_i -0 1 -.names N_127_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i.BLIF N_35_0 -11 1 -.names A0_i.BLIF N_73_i.BLIF state_machine_uds_000_int_5_0_n -11 1 -.names N_130.BLIF N_130_i -0 1 -.names N_73_i.BLIF N_130_i.BLIF state_machine_lds_000_int_5_0_n -11 1 -.names N_132.BLIF N_132_i -0 1 -.names N_131.BLIF N_131_i -0 1 -.names N_133.BLIF N_133_i -0 1 -.names N_134.BLIF N_134_i -0 1 -.names N_137.BLIF N_137_i -0 1 -.names N_138.BLIF N_138_i -0 1 -.names N_137_i.BLIF N_138_i.BLIF sm_amiga_ns_0_5__n -11 1 -.names cpu_est_ns_0_1__n.BLIF cpu_est_ns_1__n -0 1 -.names N_139.BLIF N_139_i -0 1 -.names cpu_est_ns_0_2__n.BLIF cpu_est_ns_2__n -0 1 -.names N_140.BLIF N_140_i -0 1 -.names N_139_i.BLIF N_140_i.BLIF N_46_0 -11 1 -.names N_52_0.BLIF N_52 -0 1 -.names N_142.BLIF N_142_i -0 1 -.names N_59_i.BLIF N_59 -0 1 -.names N_141.BLIF N_141_i -0 1 -.names N_62_i.BLIF N_62 -0 1 -.names N_141_i.BLIF N_142_i.BLIF sm_amiga_ns_0_7__n -11 1 -.names N_65_i.BLIF N_65 -0 1 -.names N_144.BLIF N_144_i -0 1 -.names N_67_i.BLIF N_67 -0 1 -.names N_144_i.BLIF un1_as_000_dma5_i_0__n.BLIF state_machine_ds_000_dma_5_0_n -11 1 -.names N_72_i.BLIF N_72 -0 1 -.names CLK_030_c.BLIF CLK_030_c_i -0 1 -.names N_77_0.BLIF N_77 -0 1 -.names AS_000_c.BLIF AS_000_c_i -0 1 -.names cpu_est_ns_0_0_m2_2__un1_n.BLIF cpu_est_ns_0_0_m2_2__un0_n.BLIF N_88 -1- 1 --1 1 -.names inst_AS_000_INT.BLIF inst_CLK_000_D0.BLIF N_59_i -11 1 -.names BGACK_030_INT_i.BLIF nEXP_SPACE_i.BLIF N_217 -11 1 -.names AS_030_i.BLIF N_223_i.BLIF N_61_0 -11 1 -.names N_219_1.BLIF VPA_i.BLIF N_219 -11 1 -.names inst_BGACK_030_INT_D.BLIF BGACK_030_INT_i.BLIF N_62_i -11 1 -.names N_221_1.BLIF cpu_est_2_.BLIF N_221 -11 1 -.names inst_CLK_000_D1.BLIF CLK_000_D1_i -0 1 -.names N_224_1.BLIF N_224_2.BLIF N_224 -11 1 -.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF N_65_i -11 1 -.names N_62.BLIF N_173.BLIF N_225 -11 1 -.names N_66_i_4.BLIF N_66_i_5.BLIF N_66_i -11 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_D_i.BLIF N_226 -11 1 -.names SM_AMIGA_6_.BLIF nEXP_SPACE_c.BLIF N_67_i -11 1 -.names N_128_1.BLIF UDS_000_c.BLIF N_128 -11 1 -.names N_175.BLIF N_175_i -0 1 -.names N_130_1.BLIF size_i_1__n.BLIF N_130 -11 1 -.names N_151.BLIF N_175_i.BLIF un1_as_000_dma5_i_0__n -11 1 -.names SM_AMIGA_7_.BLIF state_machine_un8_clk_000_d2_i_n.BLIF N_132 -11 1 -.names state_machine_un6_clk_000_d5_n.BLIF state_machine_un6_clk_000_d5_i_n -0 1 -.names CLK_000_D0_i.BLIF N_77.BLIF N_135 -11 1 -.names CLK_000_D0_i.BLIF state_machine_un6_clk_000_d5_i_n.BLIF N_71_i -11 1 -.names sm_amiga_i_3__n.BLIF sm_amiga_i_4__n.BLIF N_136 -11 1 -.names DS_030_c.BLIF DS_030_c_i -0 1 -.names N_138_1.BLIF state_machine_un23_clk_000_d0_n.BLIF N_138 -11 1 -.names DS_030_c_i.BLIF N_57.BLIF N_73_i -11 1 -.names N_72.BLIF cpu_est_2_.BLIF N_143 -11 1 -.names N_156.BLIF N_156_i -0 1 -.names cpu_est_0_.BLIF cpu_est_3_reg.BLIF N_145 -11 1 -.names N_61_0.BLIF N_156_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i -11 1 -.names CLK_000_D0_i.BLIF N_156.BLIF N_146 -11 1 -.names CLK_000_D0_i.BLIF N_67_i.BLIF N_75_0 -11 1 -.names N_65.BLIF cpu_est_0_.BLIF N_147 -11 1 -.names N_176.BLIF N_176_i -0 1 -.names N_65_i.BLIF cpu_est_i_0__n.BLIF N_148 -11 1 -.names N_52_0_1.BLIF N_52_0_2.BLIF N_52_0 -11 1 -.names N_151_1.BLIF BGACK_030_INT_i.BLIF N_151 -11 1 -.names N_173.BLIF N_173_i -0 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_153 -11 1 -.names N_226.BLIF N_226_i -0 1 -.names N_153.BLIF cpu_est_i_3__n.BLIF N_154 -11 1 -.names SM_AMIGA_3_.BLIF state_machine_un23_clk_000_d0_0_n.BLIF N_77_0 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_155 -11 1 -.names cpu_est_3_reg.BLIF cpu_est_i_1__n.BLIF N_72_i -11 1 -.names N_59_i.BLIF SM_AMIGA_0_.BLIF N_173 -11 1 -.names N_147.BLIF N_147_i -0 1 -.names N_148.BLIF N_148_i -0 1 -.names N_147_i.BLIF N_148_i.BLIF cpu_est_ns_e_0_0__n -11 1 -.names inst_CLK_000_D0.BLIF SM_AMIGA_3_.BLIF N_228_1 -11 1 -.names N_146.BLIF N_146_i -0 1 -.names N_237_1.BLIF N_237_2.BLIF N_237 -11 1 -.names sm_amiga_ns_0_1_0__n.BLIF N_146_i.BLIF sm_amiga_ns_0_0__n -11 1 -.names N_247_5.BLIF N_247_6.BLIF N_247 -11 1 -.names N_88.BLIF N_88_i -0 1 -.names N_227_1.BLIF N_227_2.BLIF N_227 -11 1 -.names N_145.BLIF N_145_i -0 1 -.names N_228_1_0.BLIF VPA_c.BLIF N_228 -11 1 -.names N_88_i.BLIF N_145_i.BLIF cpu_est_ns_0_2__n -11 1 -.names N_127_1.BLIF N_127_2.BLIF N_127 -11 1 -.names N_143.BLIF N_143_i -0 1 -.names N_66_i.BLIF N_66 -0 1 -.names N_154.BLIF N_154_i -0 1 -.names LDS_000_c.BLIF UDS_000_c.BLIF N_175 -11 1 -.names N_143_i.BLIF N_154_i.BLIF N_161_i -11 1 -.names LDS_000_i.BLIF UDS_000_i.BLIF N_176 -11 1 -.names N_153.BLIF N_153_i -0 1 -.names N_75_0.BLIF N_75 -0 1 -.names N_155.BLIF N_155_i -0 1 -.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_4 -0 1 -.names cpu_est_ns_0_1_1__n.BLIF N_153_i.BLIF cpu_est_ns_0_1__n -11 1 -.names N_61_0.BLIF N_61 -0 1 -.names N_135.BLIF N_135_i -0 1 -.names SM_AMIGA_6_.BLIF nEXP_SPACE_i.BLIF N_156 -11 1 -.names N_136.BLIF N_136_i -0 1 -.names N_73_i.BLIF N_73 -0 1 -.names state_machine_uds_000_int_5_0_m2_un1_n.BLIF \ -state_machine_uds_000_int_5_0_m2_un0_n.BLIF N_57 -1- 1 --1 1 -.names N_225.BLIF N_225_i -0 1 -.names N_71_i.BLIF N_71 -0 1 -.names N_225_i.BLIF N_226_i.BLIF un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0 -11 1 -.names inst_CLK_000_D5.BLIF CLK_000_D6_i.BLIF state_machine_un6_clk_000_d5_n -11 1 -.names N_219.BLIF N_219_i -0 1 -.names un1_as_000_dma5_i_0__n.BLIF un1_as_000_dma5_0__n -0 1 -.names N_221.BLIF N_221_i -0 1 -.names SM_AMIGA_1_.BLIF state_machine_un6_clk_000_d5_n.BLIF N_223 -11 1 -.names N_219_i.BLIF N_221_i.BLIF state_machine_un15_clk_000_d0_0_n -11 1 -.names state_machine_ds_000_dma_5_0_n.BLIF state_machine_ds_000_dma_5_n -0 1 -.names inst_AS_000_DMA.BLIF RW_i.BLIF N_144 -11 1 -.names BGACK_000_c.BLIF a_i_19__n.BLIF N_66_i_1 -11 1 -.names N_59.BLIF SM_AMIGA_0_.BLIF N_141 -11 1 -.names a_i_16__n.BLIF a_i_18__n.BLIF N_66_i_2 -11 1 -.names N_71_i.BLIF SM_AMIGA_1_.BLIF N_142 -11 1 -.names a_c_17__n.BLIF fc_c_0__n.BLIF N_66_i_3 -11 1 -.names N_71.BLIF SM_AMIGA_1_.BLIF N_139 -11 1 -.names N_66_i_1.BLIF N_66_i_2.BLIF N_66_i_4 -11 1 -.names inst_CLK_000_D0.BLIF SM_AMIGA_2_.BLIF N_140 -11 1 -.names N_66_i_3.BLIF fc_c_1__n.BLIF N_66_i_5 -11 1 -.names CLK_000_D0_i.BLIF SM_AMIGA_2_.BLIF N_137 -11 1 -.names a_c_20__n.BLIF a_c_21__n.BLIF N_237_1 -11 1 -.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_134 -11 1 -.names a_c_22__n.BLIF a_c_23__n.BLIF N_237_2 -11 1 -.names sm_amiga_i_5__n.BLIF sm_amiga_i_6__n.BLIF N_133 -11 1 -.names a_i_24__n.BLIF a_i_25__n.BLIF N_247_1 -11 1 -.names N_75.BLIF sm_amiga_i_7__n.BLIF N_131 -11 1 -.names a_i_26__n.BLIF a_i_27__n.BLIF N_247_2 -11 1 -.names state_machine_lds_000_int_5_0_n.BLIF state_machine_lds_000_int_5_n -0 1 -.names a_i_28__n.BLIF a_i_29__n.BLIF N_247_3 -11 1 -.names state_machine_uds_000_int_5_0_n.BLIF state_machine_uds_000_int_5_n -0 1 -.names a_i_30__n.BLIF a_i_31__n.BLIF N_247_4 -11 1 -.names N_35_0.BLIF N_35 -0 1 -.names N_247_1.BLIF N_247_2.BLIF N_247_5 -11 1 -.names N_33_0.BLIF N_33 -0 1 -.names N_247_3.BLIF N_247_4.BLIF N_247_6 -11 1 -.names CLK_030_c.BLIF N_66_i.BLIF N_126 -11 1 -.names N_62.BLIF N_67.BLIF N_52_0_1 -11 1 -.names N_216_0.BLIF N_216 -0 1 -.names N_173_i.BLIF N_226_i.BLIF N_52_0_2 -11 1 -.names N_215_0.BLIF N_215 -0 1 -.names N_72_i.BLIF N_228_1.BLIF N_224_1 -11 1 -.names state_machine_un10_bg_030_0_n.BLIF state_machine_un10_bg_030_n -0 1 -.names VMA_INT_i.BLIF VPA_i.BLIF N_224_2 +.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF A0_DMA_1_sqmuxa 11 1 -.names N_214_0.BLIF N_214 +.names state_machine_un57_bgack_030_int_0_n.BLIF \ +state_machine_un57_bgack_030_int_n 0 1 -.names AS_030_c.BLIF CLK_000_c.BLIF N_227_1 +.names inst_CLK_000_D5.BLIF CLK_000_D6_i.BLIF \ +state_machine_un81_bgack_030_int_n 11 1 .names state_machine_un6_bgack_000_0_n.BLIF state_machine_un6_bgack_000_n 0 1 -.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF N_227_2 -11 1 -.names state_machine_un8_clk_000_d2_1_n.BLIF CLK_000_D2_i.BLIF \ -state_machine_un8_clk_000_d2_n -11 1 -.names DTACK_i.BLIF N_228_1.BLIF N_228_1_0 -11 1 -.names SIZE_DMA_1_sqmuxa_1.BLIF N_175_i.BLIF SIZE_DMA_1_sqmuxa -11 1 -.names CLK_030_c.BLIF N_66.BLIF N_127_1 -11 1 -.names N_151.BLIF N_176.BLIF SIZE_DMA_0_sqmuxa -11 1 -.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF N_127_2 -11 1 -.names AS_030_i.BLIF sm_amiga_i_5__n.BLIF AS_000_INT_1_sqmuxa -11 1 -.names CLK_030_c_i.BLIF AS_000_c_i.BLIF N_151_1 -11 1 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_249 -11 1 -.names N_176_i.BLIF N_151.BLIF SIZE_DMA_1_sqmuxa_1 -11 1 -.names inst_CLK_000_D6.BLIF CLK_000_D6_i +.names state_machine_un10_bg_030_0_n.BLIF state_machine_un10_bg_030_n 0 1 -.names inst_CLK_000_D3.BLIF AS_030_000_SYNC_i.BLIF \ -state_machine_un8_clk_000_d2_1_n +.names un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1 +0 1 +.names SIZE_DMA_0_sqmuxa_1.BLIF N_71_i.BLIF SIZE_DMA_0_sqmuxa 11 1 -.names N_228.BLIF N_228_i -0 1 -.names N_173_i.BLIF N_132_i.BLIF sm_amiga_ns_0_1_0__n +.names state_machine_a0_dma_4_1_n.BLIF state_machine_a0_dma_4_2_n.BLIF \ +state_machine_a0_dma_4_n 11 1 -.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n +.names un1_AMIGA_BUS_ENABLE_2_sqmuxa_0.BLIF un1_AMIGA_BUS_ENABLE_2_sqmuxa 0 1 -.names N_155_i.BLIF cpu_est_ns_0_0_x2_1_.BLIF cpu_est_ns_0_1_1__n +.names state_machine_lds_000_int_6_0_n.BLIF state_machine_lds_000_int_6_n +0 1 +.names state_machine_uds_000_int_6_0_n.BLIF state_machine_uds_000_int_6_n +0 1 +.names state_machine_ds_000_dma_5_0_n.BLIF state_machine_ds_000_dma_5_n +0 1 +.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_0.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_1 +0 1 +.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c +0 1 +.names cpu_est_ns_0_1_1__n.BLIF cpu_est_ns_0_2_1__n.BLIF cpu_est_ns_0_1__n 11 1 -.names N_224.BLIF N_224_i +.names N_165.BLIF N_165_i 0 1 -.names CLK_000_D0_i.BLIF SM_AMIGA_3_.BLIF N_138_1 +.names N_166.BLIF N_166_i +0 1 +.names N_242.BLIF N_242_i +0 1 +.names N_243.BLIF N_243_i +0 1 +.names SM_AMIGA_6_.BLIF nEXP_SPACE_c.BLIF N_70_0 11 1 -.names N_223.BLIF N_223_i +.names N_94.BLIF N_94_i 0 1 -.names A0_i.BLIF size_c_0__n.BLIF N_130_1 +.names AS_030_c.BLIF N_94_i.BLIF N_222_i 11 1 -.names SIZE_DMA_0_sqmuxa.BLIF SIZE_DMA_0_sqmuxa_i -0 1 -.names LDS_000_i.BLIF N_151.BLIF N_128_1 -11 1 -.names SIZE_DMA_1_sqmuxa.BLIF SIZE_DMA_1_sqmuxa_i -0 1 -.names N_59_i.BLIF N_154.BLIF N_221_1 -11 1 -.names a_c_18__n.BLIF a_i_18__n -0 1 -.names CLK_000_D0_i.BLIF N_155.BLIF N_219_1 -11 1 -.names a_c_16__n.BLIF a_i_16__n -0 1 -.names N_214.BLIF vpa_sync_0_un3_n -0 1 -.names a_c_19__n.BLIF a_i_19__n -0 1 -.names N_224_i.BLIF N_214.BLIF vpa_sync_0_un1_n +.names N_100_i_1.BLIF N_100_i_2.BLIF N_100_i 11 1 .names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i 0 1 -.names inst_VPA_SYNC.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n +.names AMIGA_BUS_ENABLE_1_sqmuxa_1.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_1_i +0 1 +.names AMIGA_BUS_ENABLE_1_sqmuxa_2.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_2_i +0 1 +.names AMIGA_BUS_ENABLE_1_sqmuxa_1_i.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_2_i.BLIF \ +un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_0 +11 1 +.names AMIGA_BUS_ENABLE_0_sqmuxa_2.BLIF AMIGA_BUS_ENABLE_0_sqmuxa_2_i +0 1 +.names AMIGA_BUS_ENABLE_2_sqmuxa.BLIF AMIGA_BUS_ENABLE_2_sqmuxa_i +0 1 +.names AMIGA_BUS_ENABLE_0_sqmuxa_2_i.BLIF AMIGA_BUS_ENABLE_2_sqmuxa_i.BLIF \ +un1_AMIGA_BUS_ENABLE_2_sqmuxa_0 +11 1 +.names BG_030_c.BLIF BG_030_c_i +0 1 +.names state_machine_un8_bg_030_n.BLIF state_machine_un8_bg_030_i_n +0 1 +.names BG_030_c_i.BLIF state_machine_un8_bg_030_i_n.BLIF \ +state_machine_un10_bg_030_0_n +11 1 +.names N_82_i_1.BLIF DS_030_c_i.BLIF N_82_i +11 1 +.names N_100_i.BLIF N_100 +0 1 +.names DS_030_c.BLIF DS_030_c_i +0 1 +.names N_61_i.BLIF SM_AMIGA_4_.BLIF N_80_0 +11 1 +.names N_61_i.BLIF SM_AMIGA_2_.BLIF N_79_0 +11 1 +.names A0_DMA_0_sqmuxa_i_0_0_1.BLIF N_161_i.BLIF A0_DMA_0_sqmuxa_i_0_0 +11 1 +.names inst_AS_000_INT.BLIF N_61_i.BLIF N_77_i +11 1 +.names cpu_est_3_reg.BLIF cpu_est_i_1__n.BLIF N_76_i +11 1 +.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_6_.BLIF N_75_i +11 1 +.names N_162.BLIF N_162_i +0 1 +.names N_63_i.BLIF N_162_i.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1_0 +11 1 +.names cpu_est_ns_0_1__n.BLIF cpu_est_ns_1__n +0 1 +.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_5_.BLIF N_72_i +11 1 +.names cpu_est_ns_0_2__n.BLIF cpu_est_ns_2__n +0 1 +.names CLK_030_c.BLIF CLK_030_c_i +0 1 +.names A0_DMA_0_sqmuxa_i_0_0.BLIF A0_DMA_0_sqmuxa_i_0 +0 1 +.names BGACK_030_INT_i.BLIF CLK_030_c_i.BLIF N_71_i +11 1 +.names N_221_0.BLIF N_221 +0 1 +.names N_69_i_4.BLIF N_69_i_5.BLIF N_69_i +11 1 +.names N_223_0.BLIF N_223 +0 1 +.names inst_CLK_000_D1.BLIF CLK_000_D1_i +0 1 +.names N_224_0.BLIF N_224 +0 1 +.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF N_68_i +11 1 +.names N_225_0.BLIF N_225 +0 1 +.names N_161.BLIF N_161_i +0 1 +.names N_31_0.BLIF N_31 +0 1 +.names AS_030_i.BLIF N_96_i.BLIF N_63_i +11 1 +.names N_33_0.BLIF N_33 +0 1 +.names inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF N_61_i +11 1 +.names N_35_0.BLIF N_35 +0 1 +.names N_156.BLIF N_156_i +0 1 +.names N_37_0.BLIF N_37 +0 1 +.names N_157.BLIF N_157_i +0 1 +.names N_61_i.BLIF N_61 +0 1 +.names N_156_i.BLIF N_157_i.BLIF cpu_est_ns_e_0_0__n +11 1 +.names state_machine_lds_000_int_6_0_m2_un1_n.BLIF \ +state_machine_lds_000_int_6_0_m2_un0_n.BLIF N_62 +1- 1 +-1 1 +.names N_152.BLIF N_152_i +0 1 +.names N_63_i.BLIF N_63 +0 1 +.names N_153.BLIF N_153_i +0 1 +.names N_68_i.BLIF N_68 +0 1 +.names N_154.BLIF N_154_i +0 1 +.names N_69_i.BLIF N_69 +0 1 +.names sm_amiga_ns_e_0_1_0__n.BLIF N_153_i.BLIF sm_amiga_ns_e_0_0__n +11 1 +.names N_72_i.BLIF N_72 +0 1 +.names N_149.BLIF N_149_i +0 1 +.names N_75_i.BLIF N_75 +0 1 +.names N_150.BLIF N_150_i +0 1 +.names N_76_i.BLIF N_76 +0 1 +.names N_151.BLIF N_151_i +0 1 +.names N_77_i.BLIF N_77 +0 1 +.names sm_amiga_ns_e_0_1_1__n.BLIF N_150_i.BLIF sm_amiga_ns_e_0_1__n +11 1 +.names N_79_0.BLIF N_79 +0 1 +.names N_146.BLIF N_146_i +0 1 +.names N_80_0.BLIF N_80 +0 1 +.names N_147.BLIF N_147_i +0 1 +.names N_82_i.BLIF N_82 +0 1 +.names N_148.BLIF N_148_i +0 1 +.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_7_.BLIF N_92 +11 1 +.names cpu_est_ns_0_1_2__n.BLIF N_147_i.BLIF cpu_est_ns_0_2__n +11 1 +.names N_93_1.BLIF VPA_D_i.BLIF N_93 +11 1 +.names N_145.BLIF N_145_i +0 1 +.names sm_amiga_i_0__n.BLIF sm_amiga_i_1__n.BLIF N_94 +11 1 +.names A0_DMA_0_sqmuxa_i_0_0.BLIF N_145_i.BLIF state_machine_ds_000_dma_5_0_n +11 1 +.names N_95_3.BLIF VPA_D_i.BLIF N_95 +11 1 +.names N_143.BLIF N_143_i +0 1 +.names N_96_1.BLIF state_machine_un81_bgack_030_int_n.BLIF N_96 +11 1 +.names N_144.BLIF N_144_i +0 1 +.names N_97_1.BLIF N_97_2.BLIF N_97 +11 1 +.names N_143_i.BLIF N_144_i.BLIF AMIGA_BUS_DATA_DIR_c_0 +11 1 +.names CLK_030_c.BLIF N_69_i.BLIF N_106 +11 1 +.names N_142.BLIF N_142_i +0 1 +.names N_107_1.BLIF N_107_2.BLIF N_107 +11 1 +.names N_246.BLIF N_246_i +0 1 +.names N_125_1.BLIF size_i_1__n.BLIF N_125 +11 1 +.names N_142_i.BLIF N_246_i.BLIF N_176_i +11 1 +.names N_77.BLIF SM_AMIGA_0_.BLIF N_231 +11 1 +.names N_160.BLIF N_160_i +0 1 +.names N_167.BLIF SM_AMIGA_1_.BLIF N_232 +11 1 +.names N_240.BLIF N_240_i +0 1 +.names N_79.BLIF sm_amiga_i_1__n.BLIF N_233 +11 1 +.names N_61.BLIF SM_AMIGA_2_.BLIF N_234 +11 1 +.names N_238.BLIF N_238_i +0 1 +.names N_163.BLIF SM_AMIGA_3_.BLIF N_235 +11 1 +.names N_80.BLIF sm_amiga_i_3__n.BLIF N_236 +11 1 +.names N_163.BLIF N_163_i +0 1 +.names N_72.BLIF sm_amiga_i_4__n.BLIF N_238 +11 1 +.names N_236.BLIF N_236_i +0 1 +.names N_75.BLIF sm_amiga_i_5__n.BLIF N_240 +11 1 +.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF N_242 +11 1 +.names N_234.BLIF N_234_i +0 1 +.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_243 +11 1 +.names N_235.BLIF N_235_i +0 1 +.names N_76.BLIF cpu_est_2_.BLIF N_246 +11 1 +.names N_234_i.BLIF N_235_i.BLIF sm_amiga_ns_e_0_5__n +11 1 +.names N_166.BLIF cpu_est_i_3__n.BLIF N_142 +11 1 +.names N_167.BLIF N_167_i +0 1 +.names inst_BGACK_030_INTreg.BLIF RW_i.BLIF N_143 +11 1 +.names N_233.BLIF N_233_i +0 1 +.names N_144_1.BLIF nEXP_SPACE_i.BLIF N_144 +11 1 +.names inst_AS_000_DMA.BLIF RW_i.BLIF N_145 +11 1 +.names N_231.BLIF N_231_i +0 1 +.names cpu_est_1_.BLIF cpu_est_2_.BLIF N_146 +11 1 +.names N_232.BLIF N_232_i +0 1 +.names cpu_est_0_.BLIF cpu_est_3_reg.BLIF N_147 +11 1 +.names N_231_i.BLIF N_232_i.BLIF sm_amiga_ns_e_0_7__n +11 1 +.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_148 +11 1 +.names A0_i.BLIF N_82_i.BLIF state_machine_uds_000_int_6_0_n +11 1 +.names BGACK_030_INT_i.BLIF SM_AMIGA_6_.BLIF N_149 +11 1 +.names N_125.BLIF N_125_i +0 1 +.names N_100_i.BLIF SM_AMIGA_7_.BLIF N_150 +11 1 +.names N_82_i.BLIF N_125_i.BLIF state_machine_lds_000_int_6_0_n +11 1 +.names N_151_1.BLIF nEXP_SPACE_c.BLIF N_151 +11 1 +.names AS_030_i.BLIF N_82.BLIF N_37_0 +11 1 +.names N_100.BLIF SM_AMIGA_7_.BLIF N_152 +11 1 +.names N_107.BLIF N_107_i +0 1 +.names N_153_1.BLIF nEXP_SPACE_i.BLIF N_153 +11 1 +.names N_107_i.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF N_35_0 +11 1 +.names N_77_i.BLIF SM_AMIGA_0_.BLIF N_154 +11 1 +.names N_106.BLIF N_106_i +0 1 +.names N_155_1.BLIF nEXP_SPACE_i.BLIF N_155 +11 1 +.names AS_030_i.BLIF N_106_i.BLIF N_33_0 +11 1 +.names N_68.BLIF cpu_est_0_.BLIF N_156 +11 1 +.names N_164.BLIF N_164_i +0 1 +.names N_68_i.BLIF cpu_est_i_0__n.BLIF N_157 +11 1 +.names A0_DMA_0_sqmuxa_i_0_0.BLIF N_164_i.BLIF N_31_0 +11 1 +.names inst_BGACK_030_INTreg.BLIF CLK_000_D0_i.BLIF N_160 +11 1 +.names AS_030_i.BLIF N_97_i.BLIF N_225_0 +11 1 +.names LDS_000_c.BLIF UDS_000_c.BLIF N_161 +11 1 +.names AS_030_i.BLIF N_95_i.BLIF N_224_0 +11 1 +.names N_75_i.BLIF nEXP_SPACE_i.BLIF N_162 +11 1 +.names AS_030_i.BLIF N_72.BLIF N_223_0 +11 1 +.names N_160.BLIF state_machine_un57_bgack_030_int_n.BLIF N_163 +11 1 +.names N_92.BLIF N_92_i +0 1 +.names LDS_000_i.BLIF UDS_000_i.BLIF N_164 +11 1 +.names N_93.BLIF N_93_i +0 1 +.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_165 +11 1 +.names N_92_i.BLIF N_93_i.BLIF N_221_0 +11 1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_166 +11 1 +.names BGACK_000_c.BLIF N_68.BLIF state_machine_un6_bgack_000_0_n +11 1 +.names N_160.BLIF state_machine_un81_bgack_030_int_i_n.BLIF N_167 11 1 .names inst_CLK_000_D2.BLIF CLK_000_D2_i 0 1 -.names AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un3_n -0 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i -0 1 -.names inst_AS_000_INT.BLIF AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un1_n +.names BGACK_030_INT_D_i.BLIF BGACK_030_INT_i.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_1 11 1 -.names nEXP_SPACE_c.BLIF nEXP_SPACE_i -0 1 -.names sm_amiga_i_5__n.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n +.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \ +state_machine_un57_bgack_030_int_0_n 11 1 -.names AS_030_c.BLIF AS_030_i -0 1 -.names N_249.BLIF as_000_dma_0_un3_n -0 1 -.names inst_BGACK_030_INT_D.BLIF BGACK_030_INT_D_i -0 1 -.names inst_AS_000_DMA.BLIF N_249.BLIF as_000_dma_0_un1_n +.names inst_BGACK_030_INTreg.BLIF N_222_i.BLIF AMIGA_BUS_ENABLE_2_sqmuxa 11 1 -.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n -0 1 -.names un1_as_000_dma5_0__n.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n +.names a_c_20__n.BLIF a_c_21__n.BLIF N_255_1 11 1 -.names state_machine_un8_clk_000_d2_n.BLIF state_machine_un8_clk_000_d2_i_n -0 1 -.names state_machine_un10_bg_030_n.BLIF bg_000_0_un3_n -0 1 -.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n -0 1 -.names BG_030_c.BLIF state_machine_un10_bg_030_n.BLIF bg_000_0_un1_n +.names state_machine_un8_bg_030_1_n.BLIF state_machine_un8_bg_030_2_n.BLIF \ +state_machine_un8_bg_030_n 11 1 -.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n -0 1 -.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +.names a_c_22__n.BLIF a_c_23__n.BLIF N_255_2 11 1 -.names inst_CLK_000_D0.BLIF CLK_000_D0_i -0 1 -.names N_249.BLIF a0_dma_0_un3_n -0 1 -.names RW_c.BLIF RW_i -0 1 -.names inst_A0_DMA.BLIF N_249.BLIF a0_dma_0_un1_n +.names AMIGA_BUS_ENABLE_0_sqmuxa_2_1.BLIF N_222.BLIF \ +AMIGA_BUS_ENABLE_0_sqmuxa_2 11 1 -.names UDS_000_c.BLIF UDS_000_i -0 1 -.names N_128.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n +.names a_i_24__n.BLIF a_i_25__n.BLIF N_265_1 11 1 -.names LDS_000_c.BLIF LDS_000_i +.names AMIGA_BUS_ENABLE_0_sqmuxa_2.BLIF inst_BGACK_030_INT_D.BLIF \ +AMIGA_BUS_ENABLE_1_sqmuxa_2 +11 1 +.names a_i_26__n.BLIF a_i_27__n.BLIF N_265_2 +11 1 +.names N_70_0.BLIF N_70 0 1 -.names N_216.BLIF dtack_sync_0_un3_n +.names a_i_28__n.BLIF a_i_29__n.BLIF N_265_3 +11 1 +.names N_222_i.BLIF N_222 0 1 -.names DTACK_c.BLIF DTACK_i -0 1 -.names N_228_i.BLIF N_216.BLIF dtack_sync_0_un1_n +.names a_i_30__n.BLIF a_i_31__n.BLIF N_265_4 +11 1 +.names N_255_1.BLIF N_255_2.BLIF N_255 +11 1 +.names N_265_1.BLIF N_265_2.BLIF N_265_5 +11 1 +.names N_265_5.BLIF N_265_6.BLIF N_265 +11 1 +.names N_265_3.BLIF N_265_4.BLIF N_265_6 11 1 .names inst_VMA_INTreg.BLIF VMA_INT_i 0 1 -.names inst_DTACK_SYNC.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n +.names a_c_17__n.BLIF BGACK_000_c.BLIF N_69_i_1 11 1 -.names VPA_c.BLIF VPA_i +.names inst_VPA_D.BLIF VPA_D_i 0 1 -.names N_215.BLIF lds_000_int_0_un3_n -0 1 -.names cpu_est_0_.BLIF cpu_est_i_0__n -0 1 -.names state_machine_lds_000_int_5_n.BLIF N_215.BLIF lds_000_int_0_un1_n +.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_69_i_2 11 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +.names DTACK_c.BLIF DTACK_i 0 1 -.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n +.names a_i_19__n.BLIF a_i_16__n.BLIF N_69_i_3 +11 1 +.names LDS_000_c.BLIF LDS_000_i +0 1 +.names N_69_i_1.BLIF N_69_i_2.BLIF N_69_i_4 +11 1 +.names AS_000_c.BLIF AS_000_i +0 1 +.names N_69_i_3.BLIF a_i_18__n.BLIF N_69_i_5 +11 1 +.names nEXP_SPACE_c.BLIF nEXP_SPACE_i +0 1 +.names AS_000_i.BLIF N_71_i.BLIF A0_DMA_0_sqmuxa_i_0_0_1 +11 1 +.names AS_030_c.BLIF AS_030_i +0 1 +.names N_62.BLIF inst_BGACK_030_INTreg.BLIF N_82_i_1 +11 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +0 1 +.names inst_BGACK_030_INTreg.BLIF N_70.BLIF AMIGA_BUS_ENABLE_0_sqmuxa_2_1 +11 1 +.names inst_BGACK_030_INT_D.BLIF BGACK_030_INT_D_i +0 1 +.names AS_030_000_SYNC_i.BLIF inst_BGACK_030_INTreg.BLIF N_100_i_1 +11 1 +.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n +0 1 +.names CLK_000_D2_i.BLIF inst_CLK_000_D3.BLIF N_100_i_2 11 1 .names cpu_est_3_reg.BLIF cpu_est_i_3__n 0 1 -.names N_215.BLIF uds_000_int_0_un3_n +.names AS_030_c.BLIF CLK_000_c.BLIF state_machine_un8_bg_030_1_n +11 1 +.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n 0 1 +.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF state_machine_un8_bg_030_2_n +11 1 +.names inst_CLK_000_D0.BLIF CLK_000_D0_i +0 1 +.names N_165_i.BLIF N_166_i.BLIF cpu_est_ns_0_1_1__n +11 1 +.names state_machine_un81_bgack_030_int_n.BLIF \ +state_machine_un81_bgack_030_int_i_n +0 1 +.names N_242_i.BLIF N_243_i.BLIF cpu_est_ns_0_2_1__n +11 1 +.names cpu_est_0_.BLIF cpu_est_i_0__n +0 1 +.names AS_000_i.BLIF LDS_000_i.BLIF state_machine_a0_dma_4_1_n +11 1 .names cpu_est_1_.BLIF cpu_est_i_1__n 0 1 -.names state_machine_uds_000_int_5_n.BLIF N_215.BLIF uds_000_int_0_un1_n +.names N_71_i.BLIF UDS_000_c.BLIF state_machine_a0_dma_4_2_n +11 1 +.names UDS_000_c.BLIF UDS_000_i +0 1 +.names CLK_030_c.BLIF N_69.BLIF N_107_1 +11 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_i +0 1 +.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF N_107_2 +11 1 +.names RW_c.BLIF RW_i +0 1 +.names DTACK_i.BLIF N_61_i.BLIF N_97_1 +11 1 +.names cpu_est_2_.BLIF cpu_est_i_2__n +0 1 +.names SM_AMIGA_3_.BLIF inst_VPA_D.BLIF N_97_2 +11 1 +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names N_61_i.BLIF N_76_i.BLIF N_95_1 +11 1 +.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +0 1 +.names SM_AMIGA_3_.BLIF VMA_INT_i.BLIF N_95_2 11 1 .names A0_c.BLIF A0_i 0 1 -.names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n +.names N_95_1.BLIF N_95_2.BLIF N_95_3 11 1 .names size_c_1__n.BLIF size_i_1__n 0 1 -.names N_33.BLIF fpu_cs_int_0_un3_n +.names N_154_i.BLIF N_152_i.BLIF sm_amiga_ns_e_0_1_0__n +11 1 +.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n 0 1 +.names N_151_i.BLIF N_149_i.BLIF sm_amiga_ns_e_0_1_1__n +11 1 .names a_c_30__n.BLIF a_i_30__n 0 1 -.names AS_030_c.BLIF N_33.BLIF fpu_cs_int_0_un1_n +.names N_148_i.BLIF N_146_i.BLIF cpu_est_ns_0_1_2__n 11 1 .names a_c_31__n.BLIF a_i_31__n 0 1 -.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n +.names AS_000_DMA_i.BLIF BGACK_030_INT_i.BLIF N_155_1 11 1 .names a_c_28__n.BLIF a_i_28__n 0 1 -.names N_249.BLIF ds_000_dma_0_un3_n -0 1 +.names N_160.BLIF SM_AMIGA_6_.BLIF N_153_1 +11 1 .names a_c_29__n.BLIF a_i_29__n 0 1 -.names inst_DS_000_DMA.BLIF N_249.BLIF ds_000_dma_0_un1_n +.names CLK_000_D0_i.BLIF SM_AMIGA_6_.BLIF N_151_1 11 1 .names a_c_26__n.BLIF a_i_26__n 0 1 -.names state_machine_ds_000_dma_5_n.BLIF ds_000_dma_0_un3_n.BLIF \ -ds_000_dma_0_un0_n +.names BGACK_030_INT_i.BLIF RW_c.BLIF N_144_1 11 1 .names a_c_27__n.BLIF a_i_27__n 0 1 -.names N_35.BLIF as_030_000_sync_0_un3_n -0 1 +.names A0_i.BLIF size_c_0__n.BLIF N_125_1 +11 1 .names a_c_24__n.BLIF a_i_24__n 0 1 -.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_4.BLIF N_35.BLIF as_030_000_sync_0_un1_n +.names N_164.BLIF AS_000_i.BLIF SIZE_DMA_0_sqmuxa_1 11 1 .names a_c_25__n.BLIF a_i_25__n 0 1 -.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ -as_030_000_sync_0_un0_n +.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_1_.BLIF N_96_1 +11 1 +.names a_c_19__n.BLIF a_i_19__n +0 1 +.names CLK_000_D0_i.BLIF N_165.BLIF N_93_1 +11 1 +.names a_c_16__n.BLIF a_i_16__n +0 1 +.names RW_c.BLIF state_machine_lds_000_int_6_0_m2_un3_n +0 1 +.names a_c_18__n.BLIF a_i_18__n +0 1 +.names SM_AMIGA_5_.BLIF RW_c.BLIF state_machine_lds_000_int_6_0_m2_un1_n 11 1 .names RST_c.BLIF RST_i 0 1 -.names N_249.BLIF size_dma_0_1__un3_n -0 1 -.names SIZE_DMA_1_.BLIF N_249.BLIF size_dma_0_1__un1_n +.names SM_AMIGA_4_.BLIF state_machine_lds_000_int_6_0_m2_un3_n.BLIF \ +state_machine_lds_000_int_6_0_m2_un0_n 11 1 -.names CLK_OSZI_c.BLIF CLK_OSZI_i +.names N_68.BLIF cpu_estse_0_un3_n 0 1 -.names SIZE_DMA_1_sqmuxa_i.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un0_n +.names SIZE_DMA_0_sqmuxa.BLIF SIZE_DMA_0_sqmuxa_i +0 1 +.names cpu_est_1_.BLIF N_68.BLIF cpu_estse_0_un1_n 11 1 -.names N_249.BLIF size_dma_0_0__un3_n +.names N_95.BLIF N_95_i 0 1 +.names cpu_est_ns_1__n.BLIF cpu_estse_0_un3_n.BLIF cpu_estse_0_un0_n +11 1 +.names N_96.BLIF N_96_i +0 1 +.names N_68.BLIF cpu_estse_1_un3_n +0 1 +.names N_97.BLIF N_97_i +0 1 +.names cpu_est_2_.BLIF N_68.BLIF cpu_estse_1_un1_n +11 1 .names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i 0 1 -.names SIZE_DMA_0_.BLIF N_249.BLIF size_dma_0_0__un1_n +.names cpu_est_ns_2__n.BLIF cpu_estse_1_un3_n.BLIF cpu_estse_1_un0_n 11 1 -.names SIZE_DMA_0_sqmuxa_i.BLIF size_dma_0_0__un3_n.BLIF size_dma_0_0__un0_n +.names inst_CLK_000_D6.BLIF CLK_000_D6_i +0 1 +.names N_68.BLIF cpu_estse_2_un3_n +0 1 +.names cpu_est_3_reg.BLIF N_68.BLIF cpu_estse_2_un1_n +11 1 +.names N_176_i.BLIF cpu_estse_2_un3_n.BLIF cpu_estse_2_un0_n +11 1 +.names state_machine_un10_bg_030_n.BLIF bg_000_0_un3_n +0 1 +.names BG_030_c.BLIF state_machine_un10_bg_030_n.BLIF bg_000_0_un1_n +11 1 +.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +11 1 +.names N_63.BLIF dsack1_int_0_un3_n +0 1 +.names N_96_i.BLIF N_63.BLIF dsack1_int_0_un1_n +11 1 +.names inst_DSACK1_INT.BLIF dsack1_int_0_un3_n.BLIF dsack1_int_0_un0_n +11 1 +.names A0_DMA_1_sqmuxa.BLIF as_000_dma_0_un3_n +0 1 +.names inst_AS_000_DMA.BLIF A0_DMA_1_sqmuxa.BLIF as_000_dma_0_un1_n +11 1 +.names A0_DMA_0_sqmuxa_i_0.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n +11 1 +.names N_223.BLIF as_000_int_0_un3_n +0 1 +.names N_72.BLIF N_223.BLIF as_000_int_0_un1_n +11 1 +.names inst_AS_000_INT.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n +11 1 +.names N_224.BLIF vpa_sync_0_un3_n +0 1 +.names N_95_i.BLIF N_224.BLIF vpa_sync_0_un1_n +11 1 +.names inst_VPA_SYNC.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n +11 1 +.names N_221.BLIF vma_int_0_un3_n +0 1 +.names N_92.BLIF N_221.BLIF vma_int_0_un1_n +11 1 +.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n 11 1 .names state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n 0 1 @@ -954,91 +1072,55 @@ bgack_030_int_0_un1_n .names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \ bgack_030_int_0_un0_n 11 1 -.names N_61.BLIF dsack1_int_0_un3_n +.names A0_DMA_1_sqmuxa.BLIF size_dma_0_0__un3_n 0 1 -.names N_223_i.BLIF N_61.BLIF dsack1_int_0_un1_n +.names SIZE_DMA_0_.BLIF A0_DMA_1_sqmuxa.BLIF size_dma_0_0__un1_n 11 1 -.names inst_DSACK1_INT.BLIF dsack1_int_0_un3_n.BLIF dsack1_int_0_un0_n +.names SIZE_DMA_0_sqmuxa_i.BLIF size_dma_0_0__un3_n.BLIF size_dma_0_0__un0_n 11 1 -.names RW_c.BLIF state_machine_uds_000_int_5_0_m2_un3_n +.names A0_DMA_1_sqmuxa.BLIF size_dma_0_1__un3_n 0 1 -.names SM_AMIGA_5_.BLIF RW_c.BLIF state_machine_uds_000_int_5_0_m2_un1_n +.names SIZE_DMA_1_.BLIF A0_DMA_1_sqmuxa.BLIF size_dma_0_1__un1_n 11 1 -.names SM_AMIGA_4_.BLIF state_machine_uds_000_int_5_0_m2_un3_n.BLIF \ -state_machine_uds_000_int_5_0_m2_un0_n +.names N_31.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un0_n 11 1 -.names cpu_est_1_.BLIF cpu_est_ns_0_0_m2_2__un3_n +.names N_68.BLIF ipl_030_0_0__un3_n 0 1 -.names cpu_est_2_.BLIF cpu_est_1_.BLIF cpu_est_ns_0_0_m2_2__un1_n -11 1 -.names cpu_est_i_0__n.BLIF cpu_est_ns_0_0_m2_2__un3_n.BLIF \ -cpu_est_ns_0_0_m2_2__un0_n -11 1 -.names N_52.BLIF amiga_bus_enable_0_un3_n -0 1 -.names un1_AMIGA_BUS_ENABLE_0_sqmuxa_2.BLIF N_52.BLIF amiga_bus_enable_0_un1_n -11 1 -.names AMIGA_BUS_ENABLEDFFSHreg.BLIF amiga_bus_enable_0_un3_n.BLIF \ -amiga_bus_enable_0_un0_n -11 1 -.names state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un3_n -0 1 -.names N_59_i.BLIF state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un1_n -11 1 -.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n -11 1 -.names N_65.BLIF ipl_030_0_0__un3_n -0 1 -.names IPL_030DFFSH_0_reg.BLIF N_65.BLIF ipl_030_0_0__un1_n +.names IPL_030DFFSH_0_reg.BLIF N_68.BLIF ipl_030_0_0__un1_n 11 1 .names ipl_c_0__n.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n 11 1 -.names N_65.BLIF ipl_030_0_1__un3_n +.names N_68.BLIF ipl_030_0_1__un3_n 0 1 -.names IPL_030DFFSH_1_reg.BLIF N_65.BLIF ipl_030_0_1__un1_n +.names IPL_030DFFSH_1_reg.BLIF N_68.BLIF ipl_030_0_1__un1_n 11 1 .names ipl_c_1__n.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n 11 1 -.names N_65.BLIF ipl_030_0_2__un3_n +.names N_68.BLIF ipl_030_0_2__un3_n 0 1 -.names IPL_030DFFSH_2_reg.BLIF N_65.BLIF ipl_030_0_2__un1_n +.names IPL_030DFFSH_2_reg.BLIF N_68.BLIF ipl_030_0_2__un1_n 11 1 .names ipl_c_2__n.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n 11 1 -.names N_65.BLIF cpu_estse_0_un3_n +.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_1.BLIF amiga_bus_enable_0_un3_n 0 1 -.names cpu_est_1_.BLIF N_65.BLIF cpu_estse_0_un1_n +.names AMIGA_BUS_ENABLEDFFSHreg.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_1.BLIF \ +amiga_bus_enable_0_un1_n 11 1 -.names cpu_est_ns_1__n.BLIF cpu_estse_0_un3_n.BLIF cpu_estse_0_un0_n +.names un1_AMIGA_BUS_ENABLE_2_sqmuxa.BLIF amiga_bus_enable_0_un3_n.BLIF \ +amiga_bus_enable_0_un0_n 11 1 -.names N_65.BLIF cpu_estse_1_un3_n +.names N_37.BLIF uds_000_int_0_un3_n 0 1 -.names cpu_est_2_.BLIF N_65.BLIF cpu_estse_1_un1_n +.names state_machine_uds_000_int_6_n.BLIF N_37.BLIF uds_000_int_0_un1_n 11 1 -.names cpu_est_ns_2__n.BLIF cpu_estse_1_un3_n.BLIF cpu_estse_1_un0_n +.names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n 11 1 -.names N_65.BLIF cpu_estse_2_un3_n +.names N_37.BLIF lds_000_int_0_un3_n 0 1 -.names cpu_est_3_reg.BLIF N_65.BLIF cpu_estse_2_un1_n +.names state_machine_lds_000_int_6_n.BLIF N_37.BLIF lds_000_int_0_un1_n 11 1 -.names N_161_i.BLIF cpu_estse_2_un3_n.BLIF cpu_estse_2_un0_n -11 1 -.names CLK_CNT_N_0_.BLIF CLK_CNT_N_1_.BLIF G_103 -01 1 -10 1 -11 0 -00 0 -.names CLK_CNT_P_0_.BLIF CLK_CNT_P_1_.BLIF G_109 -01 1 -10 1 -11 0 -00 0 -.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF cpu_est_ns_0_0_x2_1_ -01 1 -10 1 -11 0 -00 0 -.names inst_BGACK_030_INTreg.BLIF RW_c.BLIF AMIGA_BUS_DATA_DIR_m1_0_x2 +.names inst_CLK_OUT_PRE.BLIF CLK_CNT_P_0_.BLIF CLK_OUT_PRE_0 01 1 10 1 11 0 @@ -1082,13 +1164,13 @@ amiga_bus_enable_0_un0_n .names AMIGA_BUS_ENABLEDFFSHreg.BLIF AMIGA_BUS_ENABLE 1 1 0 0 -.names AMIGA_BUS_DATA_DIR_m1_0_x2.BLIF AMIGA_BUS_DATA_DIR +.names AMIGA_BUS_DATA_DIR_c.BLIF AMIGA_BUS_DATA_DIR 1 1 0 0 .names vcc_n_n.BLIF AMIGA_BUS_ENABLE_LOW 1 1 0 0 -.names N_237.BLIF CIIN +.names N_255.BLIF CIIN 1 1 0 0 .names IPL_030DFFSH_1_reg.BLIF IPL_030_1_ @@ -1097,6 +1179,12 @@ amiga_bus_enable_0_un0_n .names IPL_030DFFSH_0_reg.BLIF IPL_030_0_ 1 1 0 0 +.names CLK_OSZI_c.BLIF cpu_est_0_.C +1 1 +0 0 +.names RST_i.BLIF cpu_est_0_.AR +1 1 +0 0 .names CLK_OSZI_c.BLIF cpu_est_1_.C 1 1 0 0 @@ -1115,63 +1203,6 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF cpu_est_3_reg.AR 1 1 0 0 -.names CLK_OSZI_c.BLIF cpu_est_0_.C -1 1 -0 0 -.names RST_i.BLIF cpu_est_0_.AR -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C -1 1 -0 0 -.names RST_i.BLIF SM_AMIGA_4_.AR -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C -1 1 -0 0 -.names RST_i.BLIF SM_AMIGA_3_.AR -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C -1 1 -0 0 -.names RST_i.BLIF SM_AMIGA_2_.AR -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C -1 1 -0 0 -.names RST_i.BLIF SM_AMIGA_1_.AR -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C -1 1 -0 0 -.names RST_i.BLIF SM_AMIGA_0_.AR -1 1 -0 0 -.names CLK_CNT_P_0_.BLIF CLK_CNT_P_1_.D -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_CNT_P_1_.C -1 1 -0 0 -.names RST_i.BLIF CLK_CNT_P_1_.AR -1 1 -0 0 -.names CLK_OSZI_c.BLIF SIZE_DMA_0_.C -1 1 -0 0 -.names RST_i.BLIF SIZE_DMA_0_.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF SIZE_DMA_1_.C -1 1 -0 0 -.names RST_i.BLIF SIZE_DMA_1_.AP -1 1 -0 0 .names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C 1 1 0 0 @@ -1208,18 +1239,42 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF SM_AMIGA_5_.AR 1 1 0 0 +.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C +1 1 +0 0 +.names RST_i.BLIF SM_AMIGA_4_.AR +1 1 +0 0 +.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C +1 1 +0 0 +.names RST_i.BLIF SM_AMIGA_3_.AR +1 1 +0 0 +.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C +1 1 +0 0 +.names RST_i.BLIF SM_AMIGA_2_.AR +1 1 +0 0 +.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C +1 1 +0 0 +.names RST_i.BLIF SM_AMIGA_1_.AR +1 1 +0 0 +.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C +1 1 +0 0 +.names RST_i.BLIF SM_AMIGA_0_.AR +1 1 +0 0 .names CLK_OSZI_c.BLIF inst_VPA_SYNC.C 1 1 0 0 .names RST_i.BLIF inst_VPA_SYNC.AP 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_DSACK1_INT.C -1 1 -0 0 -.names RST_i.BLIF inst_DSACK1_INT.AP -1 1 -0 0 .names CLK_OSZI_c.BLIF inst_VMA_INTreg.C 1 1 0 0 @@ -1232,31 +1287,31 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_BGACK_030_INTreg.AP 1 1 0 0 -.names CLK_OSZI_i.BLIF CLK_CNT_N_0_.C +.names CLK_OUT_PRE_0.BLIF inst_CLK_OUT_PRE.D 1 1 0 0 -.names RST_i.BLIF CLK_CNT_N_0_.AR +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C 1 1 0 0 -.names CLK_CNT_N_0_.BLIF CLK_CNT_N_1_.D +.names RST_i.BLIF inst_CLK_OUT_PRE.AR 1 1 0 0 -.names CLK_OSZI_i.BLIF CLK_CNT_N_1_.C +.names CLK_OSZI_c.BLIF SIZE_DMA_0_.C 1 1 0 0 -.names RST_i.BLIF CLK_CNT_N_1_.AP +.names RST_i.BLIF SIZE_DMA_0_.AP 1 1 0 0 -.names CLK_OSZI_c.BLIF CLK_CNT_P_0_.C +.names CLK_OSZI_c.BLIF SIZE_DMA_1_.C 1 1 0 0 -.names RST_i.BLIF CLK_CNT_P_0_.AR +.names RST_i.BLIF SIZE_DMA_1_.AP 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C +.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C 1 1 0 0 -.names RST_i.BLIF inst_LDS_000_INT.AP +.names RST_i.BLIF inst_FPU_CS_INTreg.AP 1 1 0 0 .names CLK_OSZI_c.BLIF inst_DTACK_SYNC.C @@ -1277,22 +1332,40 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF BG_000DFFSHreg.AP 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_DSACK1_INT.C +1 1 +0 0 +.names RST_i.BLIF inst_DSACK1_INT.AP +1 1 +0 0 .names CLK_OSZI_c.BLIF inst_AS_000_DMA.C 1 1 0 0 .names RST_i.BLIF inst_AS_000_DMA.AP 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_AS_000_INT.C +1 1 +0 0 +.names RST_i.BLIF inst_AS_000_INT.AP +1 1 +0 0 .names CLK_OSZI_c.BLIF AMIGA_BUS_ENABLEDFFSHreg.C 1 1 0 0 .names RST_i.BLIF AMIGA_BUS_ENABLEDFFSHreg.AP 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_AS_000_INT.C +.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C 1 1 0 0 -.names RST_i.BLIF inst_AS_000_INT.AP +.names RST_i.BLIF inst_UDS_000_INT.AP +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C +1 1 +0 0 +.names RST_i.BLIF inst_LDS_000_INT.AP 1 1 0 0 .names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C @@ -1307,33 +1380,6 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_DS_000_DMA.AP 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C -1 1 -0 0 -.names RST_i.BLIF inst_FPU_CS_INTreg.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C -1 1 -0 0 -.names RST_i.BLIF inst_UDS_000_INT.AP -1 1 -0 0 -.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C -1 1 -0 0 -.names RST_i.BLIF CLK_OUT_INTreg.AR -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C -1 1 -0 0 -.names RST_i.BLIF inst_CLK_OUT_PRE.AR -1 1 -0 0 .names inst_CLK_000_D4.BLIF inst_CLK_000_D5.D 1 1 0 0 @@ -1361,6 +1407,12 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_CLK_000_D4.AP 1 1 0 0 +.names CLK_OSZI_c.BLIF CLK_CNT_P_0_.C +1 1 +0 0 +.names RST_i.BLIF CLK_CNT_P_0_.AR +1 1 +0 0 .names inst_CLK_000_D1.BLIF inst_CLK_000_D2.D 1 1 0 0 @@ -1379,6 +1431,15 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_CLK_000_D3.AP 1 1 0 0 +.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C +1 1 +0 0 +.names RST_i.BLIF CLK_OUT_INTreg.AR +1 1 +0 0 .names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.D 1 1 0 0 @@ -1397,6 +1458,15 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_CLK_000_D0.AP 1 1 0 0 +.names VPA.BLIF inst_VPA_D.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_VPA_D.C +1 1 +0 0 +.names RST_i.BLIF inst_VPA_D.AP +1 1 +0 0 .names vcc_n_n.BLIF RESETDFFRHreg.D 1 1 0 0 @@ -1445,7 +1515,13 @@ amiga_bus_enable_0_un0_n .names SIZE_DMA_0_.BLIF SIZE_0_ 1 1 0 0 -.names gnd_n_n.BLIF DSACK_0_ +.names vcc_n_n.BLIF DSACK_0_ +1 1 +0 0 +.names A0.PIN.BLIF A0_c +1 1 +0 0 +.names nEXP_SPACE.BLIF nEXP_SPACE_c 1 1 0 0 .names BG_030.BLIF BG_030_c @@ -1478,9 +1554,6 @@ amiga_bus_enable_0_un0_n .names DTACK.PIN.BLIF DTACK_c 1 1 0 0 -.names VPA.BLIF VPA_c -1 1 -0 0 .names RST.BLIF RST_c 1 1 0 0 @@ -1562,19 +1635,13 @@ amiga_bus_enable_0_un0_n .names A_31_.BLIF a_c_31__n 1 1 0 0 -.names A0.PIN.BLIF A0_c -1 1 -0 0 -.names nEXP_SPACE.BLIF nEXP_SPACE_c -1 1 -0 0 -.names N_217.BLIF AS_030.OE +.names N_155.BLIF AS_030.OE 1 1 0 0 .names inst_BGACK_030_INTreg.BLIF AS_000.OE 1 1 0 0 -.names N_217.BLIF DS_030.OE +.names N_155.BLIF DS_030.OE 1 1 0 0 .names inst_BGACK_030_INTreg.BLIF UDS_000.OE @@ -1583,31 +1650,31 @@ amiga_bus_enable_0_un0_n .names inst_BGACK_030_INTreg.BLIF LDS_000.OE 1 1 0 0 -.names N_217.BLIF SIZE_0_.OE +.names N_155.BLIF SIZE_0_.OE 1 1 0 0 -.names N_217.BLIF SIZE_1_.OE +.names N_155.BLIF SIZE_1_.OE 1 1 0 0 -.names N_217.BLIF A0.OE +.names N_155.BLIF A0.OE 1 1 0 0 .names nEXP_SPACE_c.BLIF DSACK_1_.OE 1 1 0 0 -.names N_217.BLIF DTACK.OE +.names N_155.BLIF DTACK.OE 1 1 0 0 .names FPU_CS_INT_i.BLIF BERR.OE 1 1 0 0 -.names gnd_n_n.BLIF DSACK_0_.OE +.names nEXP_SPACE_c.BLIF DSACK_0_.OE 1 1 0 0 .names FPU_CS_INT_i.BLIF AVEC_EXP.OE 1 1 0 0 -.names N_247.BLIF CIIN.OE +.names N_265.BLIF CIIN.OE 1 1 0 0 .end diff --git a/Logic/68030_tk.bl3 b/Logic/68030_tk.bl3 index c6b5cd0..5a9beae 100644 --- a/Logic/68030_tk.bl3 +++ b/Logic/68030_tk.bl3 @@ -1,86 +1,91 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Sat May 24 21:59:14 2014 +#$ DATE Sun May 25 20:57:52 2014 #$ MODULE 68030_tk -#$ PINS 59 IPL_030_1_ IPL_030_0_ SIZE_1_ IPL_1_ IPL_0_ A_31_ DSACK_0_ FC_0_ IPL_030_2_ \ -# IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 nEXP_SPACE BERR BG_030 \ -# BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS DTACK \ -# AVEC AVEC_EXP E VPA VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \ -# AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ \ -# A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ -#$ NODES 47 BG_000DFFSHreg inst_BGACK_030_INTreg inst_FPU_CS_INTreg \ -# inst_VMA_INTreg inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_DTACK_SYNC \ -# inst_VPA_SYNC inst_CLK_000_D0 inst_CLK_000_D1 CLK_OUT_INTreg inst_CLK_000_D2 \ -# inst_CLK_000_D6 SM_AMIGA_5_ IPL_030DFFSH_0_reg IPL_030DFFSH_1_reg inst_AS_000_INT \ -# SM_AMIGA_6_ IPL_030DFFSH_2_reg inst_UDS_000_INT inst_LDS_000_INT inst_DSACK1_INT \ -# inst_CLK_000_D3 inst_CLK_000_D5 SM_AMIGA_3_ SM_AMIGA_0_ SM_AMIGA_1_ inst_AS_000_DMA \ -# inst_DS_000_DMA SIZE_DMA_0_ SIZE_DMA_1_ inst_A0_DMA CLK_CNT_N_0_ CLK_CNT_N_1_ \ -# CLK_CNT_P_0_ CLK_CNT_P_1_ inst_CLK_000_D4 RESETDFFRHreg SM_AMIGA_7_ SM_AMIGA_4_ \ -# inst_CLK_OUT_PRE SM_AMIGA_2_ AMIGA_BUS_ENABLEDFFSHreg cpu_est_0_ cpu_est_1_ \ -# cpu_est_2_ cpu_est_3_reg +#$ PINS 59 SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 SIZE_0_ AS_000 A_30_ \ +# DS_030 A_29_ UDS_000 A_28_ LDS_000 A_27_ A0 A_26_ nEXP_SPACE A_25_ BERR A_24_ BG_030 A_23_ \ +# BG_000 A_22_ BGACK_030 A_21_ BGACK_000 A_20_ CLK_030 A_19_ CLK_000 A_18_ CLK_OSZI A_17_ \ +# CLK_DIV_OUT A_16_ CLK_EXP IPL_030_1_ FPU_CS IPL_030_0_ DTACK IPL_1_ AVEC IPL_0_ AVEC_EXP \ +# DSACK_0_ E FC_0_ VPA VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \ +# AMIGA_BUS_ENABLE_LOW CIIN +#$ NODES 45 inst_BGACK_030_INTreg BG_000DFFSHreg inst_FPU_CS_INTreg \ +# inst_VMA_INTreg inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_SYNC inst_VPA_D \ +# inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D6 inst_CLK_OUT_PRE \ +# inst_BGACK_030_INT_D CLK_OUT_INTreg CLK_CNT_P_0_ IPL_030DFFSH_0_reg SM_AMIGA_5_ \ +# SM_AMIGA_7_ IPL_030DFFSH_1_reg SM_AMIGA_1_ IPL_030DFFSH_2_reg SM_AMIGA_0_ \ +# SM_AMIGA_6_ inst_AS_000_DMA inst_AS_000_INT inst_UDS_000_INT inst_LDS_000_INT \ +# inst_DSACK1_INT inst_CLK_000_D3 inst_CLK_000_D5 SM_AMIGA_3_ inst_DS_000_DMA \ +# SIZE_DMA_0_ SIZE_DMA_1_ inst_A0_DMA inst_CLK_000_D4 SM_AMIGA_4_ SM_AMIGA_2_ \ +# RESETDFFRHreg AMIGA_BUS_ENABLEDFFSHreg cpu_est_0_ cpu_est_1_ cpu_est_2_ \ +# cpu_est_3_reg .model bus68030 .inputs A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF \ BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF VPA.BLIF RST.BLIF \ RW.BLIF A_30_.BLIF A_29_.BLIF A_28_.BLIF A_27_.BLIF A_26_.BLIF A_25_.BLIF \ A_24_.BLIF A_23_.BLIF A_22_.BLIF A_21_.BLIF A_20_.BLIF A_19_.BLIF A_18_.BLIF \ -A_17_.BLIF A_16_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF BG_000DFFSHreg.BLIF \ -inst_BGACK_030_INTreg.BLIF inst_FPU_CS_INTreg.BLIF inst_VMA_INTreg.BLIF \ -inst_AS_030_000_SYNC.BLIF inst_BGACK_030_INT_D.BLIF inst_DTACK_SYNC.BLIF \ -inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \ -CLK_OUT_INTreg.BLIF inst_CLK_000_D2.BLIF inst_CLK_000_D6.BLIF SM_AMIGA_5_.BLIF \ -IPL_030DFFSH_0_reg.BLIF IPL_030DFFSH_1_reg.BLIF inst_AS_000_INT.BLIF \ -SM_AMIGA_6_.BLIF IPL_030DFFSH_2_reg.BLIF inst_UDS_000_INT.BLIF \ -inst_LDS_000_INT.BLIF inst_DSACK1_INT.BLIF inst_CLK_000_D3.BLIF \ -inst_CLK_000_D5.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_1_.BLIF \ -inst_AS_000_DMA.BLIF inst_DS_000_DMA.BLIF SIZE_DMA_0_.BLIF SIZE_DMA_1_.BLIF \ -inst_A0_DMA.BLIF CLK_CNT_N_0_.BLIF CLK_CNT_N_1_.BLIF CLK_CNT_P_0_.BLIF \ -CLK_CNT_P_1_.BLIF inst_CLK_000_D4.BLIF RESETDFFRHreg.BLIF SM_AMIGA_7_.BLIF \ -SM_AMIGA_4_.BLIF inst_CLK_OUT_PRE.BLIF SM_AMIGA_2_.BLIF \ +A_17_.BLIF A_16_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF \ +inst_BGACK_030_INTreg.BLIF BG_000DFFSHreg.BLIF inst_FPU_CS_INTreg.BLIF \ +inst_VMA_INTreg.BLIF inst_AS_030_000_SYNC.BLIF inst_DTACK_SYNC.BLIF \ +inst_VPA_SYNC.BLIF inst_VPA_D.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \ +inst_CLK_000_D2.BLIF inst_CLK_000_D6.BLIF inst_CLK_OUT_PRE.BLIF \ +inst_BGACK_030_INT_D.BLIF CLK_OUT_INTreg.BLIF CLK_CNT_P_0_.BLIF \ +IPL_030DFFSH_0_reg.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_7_.BLIF \ +IPL_030DFFSH_1_reg.BLIF SM_AMIGA_1_.BLIF IPL_030DFFSH_2_reg.BLIF \ +SM_AMIGA_0_.BLIF SM_AMIGA_6_.BLIF inst_AS_000_DMA.BLIF inst_AS_000_INT.BLIF \ +inst_UDS_000_INT.BLIF inst_LDS_000_INT.BLIF inst_DSACK1_INT.BLIF \ +inst_CLK_000_D3.BLIF inst_CLK_000_D5.BLIF SM_AMIGA_3_.BLIF \ +inst_DS_000_DMA.BLIF SIZE_DMA_0_.BLIF SIZE_DMA_1_.BLIF inst_A0_DMA.BLIF \ +inst_CLK_000_D4.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_2_.BLIF RESETDFFRHreg.BLIF \ AMIGA_BUS_ENABLEDFFSHreg.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF \ cpu_est_3_reg.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF DS_030.PIN.BLIF \ UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF \ A0.PIN.BLIF DSACK_1_.PIN.BLIF DTACK.PIN.BLIF .outputs IPL_030_2_ BERR BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS AVEC \ AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ -CIIN IPL_030_1_ IPL_030_0_ cpu_est_1_.D cpu_est_1_.C cpu_est_1_.AR \ -cpu_est_2_.D cpu_est_2_.C cpu_est_2_.AR cpu_est_3_reg.C cpu_est_3_reg.AR \ -cpu_est_0_.D cpu_est_0_.C cpu_est_0_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C \ -SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D \ -SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR \ -SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR CLK_CNT_P_1_.D CLK_CNT_P_1_.C \ -CLK_CNT_P_1_.AR SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_0_.AP SIZE_DMA_1_.D \ -SIZE_DMA_1_.C SIZE_DMA_1_.AP IPL_030DFFSH_0_reg.D IPL_030DFFSH_0_reg.C \ -IPL_030DFFSH_0_reg.AP IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C \ -IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C \ -IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.D \ -SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR \ -inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_DSACK1_INT.D \ -inst_DSACK1_INT.C inst_DSACK1_INT.AP inst_VMA_INTreg.C inst_VMA_INTreg.AP \ -inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP \ -CLK_CNT_N_0_.D CLK_CNT_N_0_.C CLK_CNT_N_0_.AR CLK_CNT_N_1_.D CLK_CNT_N_1_.C \ -CLK_CNT_N_1_.AP CLK_CNT_P_0_.D CLK_CNT_P_0_.C CLK_CNT_P_0_.AR \ -inst_LDS_000_INT.D inst_LDS_000_INT.C inst_LDS_000_INT.AP inst_DTACK_SYNC.D \ -inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_A0_DMA.D inst_A0_DMA.C \ -inst_A0_DMA.AP BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP \ -inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_000_DMA.AP \ -AMIGA_BUS_ENABLEDFFSHreg.C AMIGA_BUS_ENABLEDFFSHreg.AP inst_AS_000_INT.D \ -inst_AS_000_INT.C inst_AS_000_INT.AP inst_AS_030_000_SYNC.D \ -inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_DS_000_DMA.D \ -inst_DS_000_DMA.C inst_DS_000_DMA.AP inst_FPU_CS_INTreg.D inst_FPU_CS_INTreg.C \ -inst_FPU_CS_INTreg.AP inst_UDS_000_INT.D inst_UDS_000_INT.C \ -inst_UDS_000_INT.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C CLK_OUT_INTreg.AR \ -inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR inst_CLK_000_D5.D \ +CIIN IPL_030_1_ IPL_030_0_ cpu_est_0_.D cpu_est_0_.C cpu_est_0_.AR \ +cpu_est_1_.D cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.D cpu_est_2_.C \ +cpu_est_2_.AR cpu_est_3_reg.C cpu_est_3_reg.AR IPL_030DFFSH_0_reg.D \ +IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP IPL_030DFFSH_1_reg.D \ +IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D \ +IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D SM_AMIGA_7_.C \ +SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.D \ +SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR \ +SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C \ +SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D \ +SM_AMIGA_0_.C SM_AMIGA_0_.AR inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP \ +inst_VMA_INTreg.D inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_BGACK_030_INTreg.D \ +inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE.D \ +inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR SIZE_DMA_0_.D SIZE_DMA_0_.C \ +SIZE_DMA_0_.AP SIZE_DMA_1_.D SIZE_DMA_1_.C SIZE_DMA_1_.AP inst_FPU_CS_INTreg.D \ +inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP inst_DTACK_SYNC.D inst_DTACK_SYNC.C \ +inst_DTACK_SYNC.AP inst_A0_DMA.D inst_A0_DMA.C inst_A0_DMA.AP BG_000DFFSHreg.D \ +BG_000DFFSHreg.C BG_000DFFSHreg.AP inst_DSACK1_INT.D inst_DSACK1_INT.C \ +inst_DSACK1_INT.AP inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_000_DMA.AP \ +inst_AS_000_INT.D inst_AS_000_INT.C inst_AS_000_INT.AP \ +AMIGA_BUS_ENABLEDFFSHreg.D AMIGA_BUS_ENABLEDFFSHreg.C \ +AMIGA_BUS_ENABLEDFFSHreg.AP inst_UDS_000_INT.D inst_UDS_000_INT.C \ +inst_UDS_000_INT.AP inst_LDS_000_INT.D inst_LDS_000_INT.C inst_LDS_000_INT.AP \ +inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP \ +inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DS_000_DMA.AP inst_CLK_000_D5.D \ inst_CLK_000_D5.C inst_CLK_000_D5.AP inst_CLK_000_D6.D inst_CLK_000_D6.C \ inst_CLK_000_D6.AP inst_CLK_000_D4.D inst_CLK_000_D4.C inst_CLK_000_D4.AP \ -inst_CLK_000_D2.D inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D3.D \ -inst_CLK_000_D3.C inst_CLK_000_D3.AP inst_BGACK_030_INT_D.D \ -inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP inst_CLK_000_D0.D \ -inst_CLK_000_D0.C inst_CLK_000_D0.AP RESETDFFRHreg.D RESETDFFRHreg.C \ -RESETDFFRHreg.AR inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D1.AP \ -SIZE_1_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 DTACK SIZE_0_ \ -DSACK_0_ AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE SIZE_0_.OE \ -SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE \ -inst_VMA_INTreg.D.X1 inst_VMA_INTreg.D.X2 AMIGA_BUS_ENABLEDFFSHreg.D.X1 \ -AMIGA_BUS_ENABLEDFFSHreg.D.X2 cpu_est_3_reg.D.X1 cpu_est_3_reg.D.X2 +CLK_CNT_P_0_.D CLK_CNT_P_0_.C CLK_CNT_P_0_.AR inst_CLK_000_D2.D \ +inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D3.D inst_CLK_000_D3.C \ +inst_CLK_000_D3.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C CLK_OUT_INTreg.AR \ +inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP \ +inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D0.AP inst_VPA_D.D \ +inst_VPA_D.C inst_VPA_D.AP RESETDFFRHreg.D RESETDFFRHreg.C RESETDFFRHreg.AR \ +inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D1.AP SIZE_1_ DSACK_1_ AS_030 \ +AS_000 DS_030 UDS_000 LDS_000 A0 DTACK SIZE_0_ DSACK_0_ AS_030.OE AS_000.OE \ +DS_030.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE \ +DTACK.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE cpu_est_3_reg.D.X1 \ +cpu_est_3_reg.D.X2 +.names inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF cpu_est_0_.BLIF cpu_est_0_.D +100 1 +-11 1 +0-1 1 +101 0 +-10 0 +0-0 0 .names inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF cpu_est_0_.BLIF \ cpu_est_1_.BLIF cpu_est_2_.BLIF cpu_est_3_reg.BLIF cpu_est_1_.D 1010-- 1 @@ -107,77 +112,6 @@ cpu_est_1_.BLIF cpu_est_2_.BLIF cpu_est_3_reg.BLIF cpu_est_2_.D --010- 0 -1--0- 0 0---0- 0 -.names inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF cpu_est_0_.BLIF cpu_est_0_.D -100 1 --11 1 -0-1 1 -101 0 --10 0 -0-0 0 -.names inst_CLK_000_D0.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_4_.D -01- 1 -0-1 1 --00 0 -1-- 0 -.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF \ -SM_AMIGA_3_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_3_.D -11-1- 1 ---11- 1 ---1-1 1 --00-- 0 -0-0-- 0 ---00- 0 ----00 0 -.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF \ -SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_2_.D --001- 1 -0-01- 1 ---0-1 1 -11--0 0 ---1-- 0 ----00 0 -.names inst_CLK_000_D0.BLIF inst_CLK_000_D6.BLIF inst_CLK_000_D5.BLIF \ -SM_AMIGA_1_.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_1_.D --011- 1 -1--1- 1 -1---1 1 -0-0-- 0 -01--- 0 -0--0- 0 ----00 0 -.names inst_CLK_000_D0.BLIF inst_CLK_000_D6.BLIF inst_AS_000_INT.BLIF \ -inst_CLK_000_D5.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_0_.D ---0-1- 1 -0--0-1 1 -01---1 1 -0---1- 1 --0-10- 0 -1-1--- 0 -1---0- 0 -----00 0 -.names CLK_030.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -SIZE_DMA_0_.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ -SIZE_DMA_0_.D --1-1--- 1 --0---1- 1 --0--1-- 1 -10----- 1 --10---- 1 --0----1 1 -00--000 0 --110--- 0 -.names CLK_030.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -SIZE_DMA_1_.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ -SIZE_DMA_1_.D --1-1--- 1 --0---00 1 --0---11 1 --0--1-- 1 -10----- 1 --10---- 1 -00--010 0 -00--001 0 --110--- 0 .names IPL_0_.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \ IPL_030DFFSH_0_reg.BLIF IPL_030DFFSH_0_reg.D 110- 1 @@ -202,65 +136,135 @@ IPL_030DFFSH_2_reg.BLIF IPL_030DFFSH_2_reg.D 010- 0 --10 0 -0-0 0 -.names nEXP_SPACE.BLIF inst_AS_030_000_SYNC.BLIF inst_CLK_000_D0.BLIF \ -inst_CLK_000_D2.BLIF inst_AS_000_INT.BLIF SM_AMIGA_6_.BLIF \ -inst_CLK_000_D3.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_7_.BLIF SM_AMIGA_7_.D ---1-1--1- 1 -0-0--1--- 1 -------0-1 1 +.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_030_000_SYNC.BLIF \ +inst_CLK_000_D0.BLIF inst_CLK_000_D2.BLIF SM_AMIGA_7_.BLIF SM_AMIGA_0_.BLIF \ +SM_AMIGA_6_.BLIF inst_AS_000_INT.BLIF inst_CLK_000_D3.BLIF SM_AMIGA_7_.D +-1-1--1-1- 1 +01-0---1-- 1 +----11---- 1 +--1--1---- 1 +-0---1---- 1 +-----1---0 1 +-1010---01 0 +-1000--0-1 0 +-1010-0--1 0 +11000----1 0 +---1-0--0- 0 +---0-0-0-- 0 +---1-00--- 0 +1--0-0---- 0 +-0---0---- 0 +.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_030_000_SYNC.BLIF \ +inst_CLK_000_D0.BLIF inst_CLK_000_D2.BLIF SM_AMIGA_7_.BLIF SM_AMIGA_6_.BLIF \ +inst_CLK_000_D3.BLIF SM_AMIGA_6_.D +-10-01-1 1 +1--0--1- 1 +-0----1- 1 +-1-1-0-- 0 +01---0-- 0 +-1-11--- 0 +01--1--- 0 +-111---- 0 +011----- 0 +-1-1---0 0 +01-----0 0 +-0----0- 0 +-----00- 0 +----1-0- 0 +--1---0- 0 +------00 0 +.names inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF SM_AMIGA_5_.BLIF \ +SM_AMIGA_6_.BLIF SM_AMIGA_5_.D +11-1 1 +0-1- 1 +-11- 1 +0-0- 0 +10-- 0 +--00 0 +.names inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF SM_AMIGA_5_.BLIF \ +SM_AMIGA_4_.BLIF SM_AMIGA_4_.D +101- 1 +0--1 1 +-0-1 1 +11-- 0 +--00 0 +0--0 0 +.names inst_BGACK_030_INTreg.BLIF inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \ +inst_CLK_000_D0.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_3_.D +-11-1- 1 +1--1-1 1 +0---1- 1 +---11- 1 +1-00-- 0 +10-0-- 0 +0---0- 0 +---00- 0 +----00 0 +.names inst_BGACK_030_INTreg.BLIF inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \ +inst_CLK_000_D0.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_2_.D +1-001- 1 +10-01- 1 +0----1 1 +---0-1 1 +1--1-- 0 +-11--0 0 +----00 0 +0----0 0 +.names inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D6.BLIF \ +SM_AMIGA_1_.BLIF inst_CLK_000_D5.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_1_.D +--011- 1 +11---1 1 +0--1-- 1 +-1-1-- 1 +10--0- 0 +101--- 0 +0--0-- 0 +-0-0-- 0 +---0-0 0 +.names inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D6.BLIF \ +SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF inst_AS_000_INT.BLIF inst_CLK_000_D5.BLIF \ +SM_AMIGA_0_.D +1011--- 1 +10-1--0 1 +----10- 1 +0---1-- 1 +-0--1-- 1 +11---1- 0 +---00-- 0 +0---0-- 0 +--0-0-1 0 +-1--0-- 0 +.names inst_BGACK_030_INTreg.BLIF inst_VMA_INTreg.BLIF inst_VPA_SYNC.BLIF \ +inst_VPA_D.BLIF inst_CLK_000_D0.BLIF SM_AMIGA_3_.BLIF cpu_est_1_.BLIF \ +cpu_est_3_reg.BLIF AS_030.PIN.BLIF inst_VPA_SYNC.D +--1----0- 1 +--1---1-- 1 +--1--0--- 1 +--1-0---- 1 +--11----- 1 +-11------ 1 +0-1------ 1 +-------01 1 +------1-1 1 +-----0--1 1 +----0---1 1 ---1----1 1 -1------1 1 --010--10- 0 --000-01-- 0 --0100-1-- 0 -1000--1-- 0 ---1----00 0 ---0--0--0 0 ---1-0---0 0 -1-0-----0 0 -.names nEXP_SPACE.BLIF inst_AS_030_000_SYNC.BLIF inst_CLK_000_D0.BLIF \ -inst_CLK_000_D2.BLIF SM_AMIGA_6_.BLIF inst_CLK_000_D3.BLIF SM_AMIGA_7_.BLIF \ -SM_AMIGA_6_.D -1-0-1-0 1 --0-0-11 1 -----0-0 0 ---1---0 0 -0-----0 0 ------01 0 ----1--1 0 --1----1 0 -.names inst_CLK_000_D0.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_5_.D -11- 1 -1-1 1 --00 0 -0-- 0 -.names VPA.BLIF inst_VMA_INTreg.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF \ -SM_AMIGA_3_.BLIF cpu_est_1_.BLIF cpu_est_3_reg.BLIF AS_030.PIN.BLIF \ -inst_VPA_SYNC.D ---1---0- 1 ---1--1-- 1 ---1-0--- 1 ---10---- 1 --11----- 1 -1-1----- 1 -------01 1 ------1-1 1 -----0--1 1 ----0---1 1 --1-----1 1 -1------1 1 -00-1101- 0 ---0----0 0 -.names inst_CLK_000_D6.BLIF inst_DSACK1_INT.BLIF inst_CLK_000_D5.BLIF \ -SM_AMIGA_1_.BLIF AS_030.PIN.BLIF inst_DSACK1_INT.D --1-0- 1 --10-- 1 -11--- 1 ----01 1 ---0-1 1 -1---1 1 -0-11- 0 --0--0 0 +0-------1 1 +10-01101- 0 +--0-----0 0 +.names inst_BGACK_030_INTreg.BLIF inst_VMA_INTreg.BLIF inst_VPA_D.BLIF \ +inst_CLK_000_D0.BLIF SM_AMIGA_7_.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF \ +inst_VMA_INTreg.D +1---1-- 1 +-1---0- 1 +-1-1--- 1 +-11---- 1 +-1----1 1 +--00010 0 +0-00-10 0 +-0--0-- 0 +00----- 0 .names BGACK_000.BLIF inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF \ inst_CLK_000_D1.BLIF inst_BGACK_030_INTreg.D 1-10 1 @@ -268,48 +272,58 @@ inst_CLK_000_D1.BLIF inst_BGACK_030_INTreg.D -00- 0 0--- 0 -0-1 0 -.names CLK_CNT_N_0_.BLIF CLK_CNT_N_1_.BLIF CLK_CNT_N_0_.D -00 1 -11 1 -10 0 -01 0 -.names CLK_CNT_P_0_.BLIF CLK_CNT_P_1_.BLIF CLK_CNT_P_0_.D -00 1 -11 1 -10 0 -01 0 -.names RW.BLIF SM_AMIGA_5_.BLIF inst_LDS_000_INT.BLIF SM_AMIGA_4_.BLIF \ -AS_030.PIN.BLIF DS_030.PIN.BLIF SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF A0.PIN.BLIF \ -inst_LDS_000_INT.D -0--1-0100 1 -11---0100 1 -0--01---- 1 -10--1---- 1 -0-10----- 1 -101------ 1 -----11--- 1 ---1--1--- 1 -0--1-0-1- 0 -11---0-1- 0 -0--1-00-- 0 -11---00-- 0 -0-000---- 0 -100-0---- 0 -0--1-0--1 0 -11---0--1 0 ---0-01--- 0 -.names VPA.BLIF inst_DTACK_SYNC.BLIF inst_CLK_000_D0.BLIF SM_AMIGA_3_.BLIF \ -AS_030.PIN.BLIF DTACK.PIN.BLIF inst_DTACK_SYNC.D --1-0-- 1 --10--- 1 -01---- 1 --1---1 1 ----01- 1 ---0-1- 1 -0---1- 1 -----11 1 -1-11-0 0 --0--0- 0 +.names CLK_030.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ +SIZE_DMA_0_.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ +SIZE_DMA_0_.D +-1-1--- 1 +-0---1- 1 +-0--1-- 1 +10----- 1 +-10---- 1 +-0----1 1 +00--000 0 +-110--- 0 +.names CLK_030.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ +SIZE_DMA_1_.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ +SIZE_DMA_1_.D +-1-1--- 1 +-0---00 1 +-0---11 1 +-0--1-- 1 +10----- 1 +-10---- 1 +00--010 0 +00--001 0 +-110--- 0 +.names FC_1_.BLIF BGACK_000.BLIF CLK_030.BLIF A_19_.BLIF A_18_.BLIF A_17_.BLIF \ +A_16_.BLIF FC_0_.BLIF inst_FPU_CS_INTreg.BLIF AS_030.PIN.BLIF \ +inst_FPU_CS_INTreg.D +-------01- 1 +------1-1- 1 +-----0--1- 1 +----1---1- 1 +---1----1- 1 +--0-----1- 1 +-0------1- 1 +0-------1- 1 +---------1 1 +11100101-0 0 +--------00 0 +.names inst_BGACK_030_INTreg.BLIF inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF \ +inst_CLK_000_D0.BLIF SM_AMIGA_3_.BLIF AS_030.PIN.BLIF DTACK.PIN.BLIF \ +inst_DTACK_SYNC.D +-1--0-- 1 +-1-0--- 1 +-10---- 1 +01----- 1 +-1----1 1 +----01- 1 +---0-1- 1 +--0--1- 1 +0----1- 1 +-----11 1 +1-111-0 0 +-0---0- 0 .names CLK_030.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ inst_A0_DMA.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ inst_A0_DMA.D @@ -330,6 +344,18 @@ SM_AMIGA_7_.BLIF AS_030.PIN.BLIF BG_000DFFSHreg.D -1---- 1 101-11 0 -0-0-- 0 +.names inst_BGACK_030_INTreg.BLIF inst_CLK_000_D6.BLIF SM_AMIGA_1_.BLIF \ +inst_DSACK1_INT.BLIF inst_CLK_000_D5.BLIF AS_030.PIN.BLIF inst_DSACK1_INT.D +---10- 1 +--01-- 1 +-1-1-- 1 +0--1-- 1 +----01 1 +--0--1 1 +-1---1 1 +0----1 1 +101-1- 0 +---0-0 0 .names CLK_030.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ inst_AS_000_DMA.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ inst_AS_000_DMA.D @@ -341,49 +367,119 @@ inst_AS_000_DMA.D 00--00- 0 00--0-0 0 -110--- 0 -.names SM_AMIGA_5_.BLIF inst_AS_000_INT.BLIF AS_030.PIN.BLIF inst_AS_000_INT.D -01- 1 -0-1 1 --00 0 -1-- 0 +.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_5_.BLIF inst_AS_000_INT.BLIF \ +AS_030.PIN.BLIF inst_AS_000_INT.D +-01- 1 +0-1- 1 +-0-1 1 +0--1 1 +11-- 0 +--00 0 +.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ +SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_6_.BLIF \ +AMIGA_BUS_ENABLEDFFSHreg.BLIF AS_030.PIN.BLIF AMIGA_BUS_ENABLEDFFSHreg.D +-1---01- 1 +01----1- 1 +-10--0-- 1 +010----- 1 +-00---1- 1 +-1--1--1 1 +-1-1---1 1 +11-001-- 0 +--100-0- 0 +11---1-0 0 +--1---00 0 +-0----0- 0 +-01----- 0 +.names RW.BLIF inst_BGACK_030_INTreg.BLIF SM_AMIGA_5_.BLIF \ +inst_UDS_000_INT.BLIF SM_AMIGA_4_.BLIF AS_030.PIN.BLIF DS_030.PIN.BLIF \ +A0.PIN.BLIF inst_UDS_000_INT.D +01--1-01 1 +111---01 1 +0--10--- 1 +1-01---- 1 +0---01-- 1 +1-0--1-- 1 +---1--1- 1 +-0-1---- 1 +-----11- 1 +-0---1-- 1 +01--1-00 0 +111---00 0 +0--000-- 0 +1-00-0-- 0 +---0-01- 0 +-0-0-0-- 0 +.names RW.BLIF inst_BGACK_030_INTreg.BLIF SM_AMIGA_5_.BLIF \ +inst_LDS_000_INT.BLIF SM_AMIGA_4_.BLIF AS_030.PIN.BLIF DS_030.PIN.BLIF \ +SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF A0.PIN.BLIF inst_LDS_000_INT.D +01--1-0100 1 +111---0100 1 +0--10----- 1 +1-01------ 1 +0---01---- 1 +1-0--1---- 1 +---1--1--- 1 +-0-1------ 1 +-----11--- 1 +-0---1---- 1 +01--1-0-1- 0 +111---0-1- 0 +01--1-00-- 0 +111---00-- 0 +01--1-0--1 0 +111---0--1 0 +0--000---- 0 +1-00-0---- 0 +---0-01--- 0 +-0-0-0---- 0 .names FC_1_.BLIF nEXP_SPACE.BLIF BGACK_000.BLIF CLK_030.BLIF A_19_.BLIF \ -A_18_.BLIF A_17_.BLIF A_16_.BLIF FC_0_.BLIF inst_AS_030_000_SYNC.BLIF \ -inst_CLK_000_D6.BLIF SM_AMIGA_6_.BLIF inst_CLK_000_D5.BLIF SM_AMIGA_1_.BLIF \ -SM_AMIGA_7_.BLIF AS_030.PIN.BLIF inst_AS_030_000_SYNC.D -1-1-001011------ 1 -----------0-11-- 1 --0---------1---- 1 ----------1----0- 1 ----0-----1------ 1 --0-------1------ 1 ----------------1 1 ----------0-0-0-0 0 ----------0-00--0 0 ----------010---0 0 --1-1----0----010 0 --1-1---1-----010 0 --1-1--0------010 0 --1-1-1-------010 0 --1-11--------010 0 --101---------010 0 -01-1---------010 0 --1-1----0---0-10 0 --1-1---1----0-10 0 --1-1--0-----0-10 0 --1-1-1------0-10 0 --1-11-------0-10 0 --101--------0-10 0 -01-1--------0-10 0 --1-1----0-1---10 0 --1-1---1--1---10 0 --1-1--0---1---10 0 --1-1-1----1---10 0 --1-11-----1---10 0 --101------1---10 0 -01-1------1---10 0 --1-------0---0-0 0 --1-------0--0--0 0 --1-------01----0 0 +A_18_.BLIF A_17_.BLIF A_16_.BLIF FC_0_.BLIF inst_BGACK_030_INTreg.BLIF \ +inst_AS_030_000_SYNC.BLIF inst_CLK_000_D6.BLIF SM_AMIGA_7_.BLIF \ +SM_AMIGA_1_.BLIF SM_AMIGA_6_.BLIF inst_CLK_000_D5.BLIF AS_030.PIN.BLIF \ +inst_AS_030_000_SYNC.D +1-1-00101-1------ 1 +---------1-0-1-1- 1 +-0-------1----1-- 1 +----------1-0---- 1 +---0------1------ 1 +-0--------1------ 1 +----------------1 1 +----------0---000 0 +----------0--00-0 0 +----------01--0-0 0 +-1-1----00--1---0 0 +-1-1---1-0--1---0 0 +-1-1--0--0--1---0 0 +-1-1-1---0--1---0 0 +-1-11----0--1---0 0 +-101-----0--1---0 0 +01-1-----0--1---0 0 +-1-1----0---1--00 0 +-1-1---1----1--00 0 +-1-1--0-----1--00 0 +-1-1-1------1--00 0 +-1-11-------1--00 0 +-101--------1--00 0 +01-1--------1--00 0 +-1-1----0---10--0 0 +-1-1---1----10--0 0 +-1-1--0-----10--0 0 +-1-1-1------10--0 0 +-1-11-------10--0 0 +-101--------10--0 0 +01-1--------10--0 0 +-1-1----0--11---0 0 +-1-1---1---11---0 0 +-1-1--0----11---0 0 +-1-1-1-----11---0 0 +-1-11------11---0 0 +-101-------11---0 0 +01-1-------11---0 0 +-1--------0----00 0 +-1--------0--0--0 0 +-1--------01----0 0 +---------00-----0 0 .names CLK_030.BLIF RW.BLIF inst_BGACK_030_INTreg.BLIF \ inst_BGACK_030_INT_D.BLIF inst_AS_000_DMA.BLIF inst_DS_000_DMA.BLIF \ AS_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF inst_DS_000_DMA.D @@ -398,45 +494,9 @@ AS_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF inst_DS_000_DMA.D --11-0--- 0 0-0-0-0-0 0 010---0-0 0 -.names FC_1_.BLIF BGACK_000.BLIF CLK_030.BLIF A_19_.BLIF A_18_.BLIF A_17_.BLIF \ -A_16_.BLIF FC_0_.BLIF inst_FPU_CS_INTreg.BLIF AS_030.PIN.BLIF \ -inst_FPU_CS_INTreg.D --------01- 1 -------1-1- 1 ------0--1- 1 -----1---1- 1 ----1----1- 1 ---0-----1- 1 --0------1- 1 -0-------1- 1 ----------1 1 -11100101-0 0 ---------00 0 -.names RW.BLIF SM_AMIGA_5_.BLIF inst_UDS_000_INT.BLIF SM_AMIGA_4_.BLIF \ -AS_030.PIN.BLIF DS_030.PIN.BLIF A0.PIN.BLIF inst_UDS_000_INT.D -0-10--- 1 -101---- 1 -0--1-01 1 -11---01 1 -0--01-- 1 -10--1-- 1 ---1--1- 1 -----11- 1 -0--1-00 0 -11---00 0 -0-000-- 0 -100-0-- 0 ---0-01- 0 -.names CLK_CNT_N_0_.BLIF CLK_CNT_N_1_.BLIF CLK_CNT_P_0_.BLIF CLK_CNT_P_1_.BLIF \ -inst_CLK_OUT_PRE.D -1010 1 -0110 1 -1001 1 -0101 1 -00-- 0 -11-- 0 ---00 0 ---11 0 +.names CLK_CNT_P_0_.BLIF CLK_CNT_P_0_.D +0 1 +1 0 .names IPL_030DFFSH_2_reg.BLIF IPL_030_2_ 1 1 0 0 @@ -473,11 +533,12 @@ inst_CLK_OUT_PRE.D .names AMIGA_BUS_ENABLEDFFSHreg.BLIF AMIGA_BUS_ENABLE 1 1 0 0 -.names RW.BLIF inst_BGACK_030_INTreg.BLIF AMIGA_BUS_DATA_DIR -10 1 -01 1 -00 0 -11 0 +.names nEXP_SPACE.BLIF RW.BLIF inst_BGACK_030_INTreg.BLIF AMIGA_BUS_DATA_DIR +010 1 +-01 1 +1-0 0 +-00 0 +-11 0 .names AMIGA_BUS_ENABLE_LOW 1 .names A_23_.BLIF A_22_.BLIF A_21_.BLIF A_20_.BLIF CIIN @@ -492,6 +553,12 @@ inst_CLK_OUT_PRE.D .names IPL_030DFFSH_0_reg.BLIF IPL_030_0_ 1 1 0 0 +.names CLK_OSZI.BLIF cpu_est_0_.C +1 1 +0 0 +.names RST.BLIF cpu_est_0_.AR +0 1 +1 0 .names CLK_OSZI.BLIF cpu_est_1_.C 1 1 0 0 @@ -510,63 +577,6 @@ inst_CLK_OUT_PRE.D .names RST.BLIF cpu_est_3_reg.AR 0 1 1 0 -.names CLK_OSZI.BLIF cpu_est_0_.C -1 1 -0 0 -.names RST.BLIF cpu_est_0_.AR -0 1 -1 0 -.names CLK_OSZI.BLIF SM_AMIGA_4_.C -1 1 -0 0 -.names RST.BLIF SM_AMIGA_4_.AR -0 1 -1 0 -.names CLK_OSZI.BLIF SM_AMIGA_3_.C -1 1 -0 0 -.names RST.BLIF SM_AMIGA_3_.AR -0 1 -1 0 -.names CLK_OSZI.BLIF SM_AMIGA_2_.C -1 1 -0 0 -.names RST.BLIF SM_AMIGA_2_.AR -0 1 -1 0 -.names CLK_OSZI.BLIF SM_AMIGA_1_.C -1 1 -0 0 -.names RST.BLIF SM_AMIGA_1_.AR -0 1 -1 0 -.names CLK_OSZI.BLIF SM_AMIGA_0_.C -1 1 -0 0 -.names RST.BLIF SM_AMIGA_0_.AR -0 1 -1 0 -.names CLK_CNT_P_0_.BLIF CLK_CNT_P_1_.D -1 1 -0 0 -.names CLK_OSZI.BLIF CLK_CNT_P_1_.C -1 1 -0 0 -.names RST.BLIF CLK_CNT_P_1_.AR -0 1 -1 0 -.names CLK_OSZI.BLIF SIZE_DMA_0_.C -1 1 -0 0 -.names RST.BLIF SIZE_DMA_0_.AP -0 1 -1 0 -.names CLK_OSZI.BLIF SIZE_DMA_1_.C -1 1 -0 0 -.names RST.BLIF SIZE_DMA_1_.AP -0 1 -1 0 .names CLK_OSZI.BLIF IPL_030DFFSH_0_reg.C 1 1 0 0 @@ -603,18 +613,42 @@ inst_CLK_OUT_PRE.D .names RST.BLIF SM_AMIGA_5_.AR 0 1 1 0 +.names CLK_OSZI.BLIF SM_AMIGA_4_.C +1 1 +0 0 +.names RST.BLIF SM_AMIGA_4_.AR +0 1 +1 0 +.names CLK_OSZI.BLIF SM_AMIGA_3_.C +1 1 +0 0 +.names RST.BLIF SM_AMIGA_3_.AR +0 1 +1 0 +.names CLK_OSZI.BLIF SM_AMIGA_2_.C +1 1 +0 0 +.names RST.BLIF SM_AMIGA_2_.AR +0 1 +1 0 +.names CLK_OSZI.BLIF SM_AMIGA_1_.C +1 1 +0 0 +.names RST.BLIF SM_AMIGA_1_.AR +0 1 +1 0 +.names CLK_OSZI.BLIF SM_AMIGA_0_.C +1 1 +0 0 +.names RST.BLIF SM_AMIGA_0_.AR +0 1 +1 0 .names CLK_OSZI.BLIF inst_VPA_SYNC.C 1 1 0 0 .names RST.BLIF inst_VPA_SYNC.AP 0 1 1 0 -.names CLK_OSZI.BLIF inst_DSACK1_INT.C -1 1 -0 0 -.names RST.BLIF inst_DSACK1_INT.AP -0 1 -1 0 .names CLK_OSZI.BLIF inst_VMA_INTreg.C 1 1 0 0 @@ -627,31 +661,33 @@ inst_CLK_OUT_PRE.D .names RST.BLIF inst_BGACK_030_INTreg.AP 0 1 1 0 -.names CLK_OSZI.BLIF CLK_CNT_N_0_.C -0 1 -1 0 -.names RST.BLIF CLK_CNT_N_0_.AR -0 1 -1 0 -.names CLK_CNT_N_0_.BLIF CLK_CNT_N_1_.D +.names inst_CLK_OUT_PRE.BLIF CLK_CNT_P_0_.BLIF inst_CLK_OUT_PRE.D +10 1 +01 1 +00 0 +11 0 +.names CLK_OSZI.BLIF inst_CLK_OUT_PRE.C 1 1 0 0 -.names CLK_OSZI.BLIF CLK_CNT_N_1_.C +.names RST.BLIF inst_CLK_OUT_PRE.AR 0 1 1 0 -.names RST.BLIF CLK_CNT_N_1_.AP -0 1 -1 0 -.names CLK_OSZI.BLIF CLK_CNT_P_0_.C +.names CLK_OSZI.BLIF SIZE_DMA_0_.C 1 1 0 0 -.names RST.BLIF CLK_CNT_P_0_.AR +.names RST.BLIF SIZE_DMA_0_.AP 0 1 1 0 -.names CLK_OSZI.BLIF inst_LDS_000_INT.C +.names CLK_OSZI.BLIF SIZE_DMA_1_.C 1 1 0 0 -.names RST.BLIF inst_LDS_000_INT.AP +.names RST.BLIF SIZE_DMA_1_.AP +0 1 +1 0 +.names CLK_OSZI.BLIF inst_FPU_CS_INTreg.C +1 1 +0 0 +.names RST.BLIF inst_FPU_CS_INTreg.AP 0 1 1 0 .names CLK_OSZI.BLIF inst_DTACK_SYNC.C @@ -672,22 +708,40 @@ inst_CLK_OUT_PRE.D .names RST.BLIF BG_000DFFSHreg.AP 0 1 1 0 +.names CLK_OSZI.BLIF inst_DSACK1_INT.C +1 1 +0 0 +.names RST.BLIF inst_DSACK1_INT.AP +0 1 +1 0 .names CLK_OSZI.BLIF inst_AS_000_DMA.C 1 1 0 0 .names RST.BLIF inst_AS_000_DMA.AP 0 1 1 0 +.names CLK_OSZI.BLIF inst_AS_000_INT.C +1 1 +0 0 +.names RST.BLIF inst_AS_000_INT.AP +0 1 +1 0 .names CLK_OSZI.BLIF AMIGA_BUS_ENABLEDFFSHreg.C 1 1 0 0 .names RST.BLIF AMIGA_BUS_ENABLEDFFSHreg.AP 0 1 1 0 -.names CLK_OSZI.BLIF inst_AS_000_INT.C +.names CLK_OSZI.BLIF inst_UDS_000_INT.C 1 1 0 0 -.names RST.BLIF inst_AS_000_INT.AP +.names RST.BLIF inst_UDS_000_INT.AP +0 1 +1 0 +.names CLK_OSZI.BLIF inst_LDS_000_INT.C +1 1 +0 0 +.names RST.BLIF inst_LDS_000_INT.AP 0 1 1 0 .names CLK_OSZI.BLIF inst_AS_030_000_SYNC.C @@ -702,33 +756,6 @@ inst_CLK_OUT_PRE.D .names RST.BLIF inst_DS_000_DMA.AP 0 1 1 0 -.names CLK_OSZI.BLIF inst_FPU_CS_INTreg.C -1 1 -0 0 -.names RST.BLIF inst_FPU_CS_INTreg.AP -0 1 -1 0 -.names CLK_OSZI.BLIF inst_UDS_000_INT.C -1 1 -0 0 -.names RST.BLIF inst_UDS_000_INT.AP -0 1 -1 0 -.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D -1 1 -0 0 -.names CLK_OSZI.BLIF CLK_OUT_INTreg.C -1 1 -0 0 -.names RST.BLIF CLK_OUT_INTreg.AR -0 1 -1 0 -.names CLK_OSZI.BLIF inst_CLK_OUT_PRE.C -1 1 -0 0 -.names RST.BLIF inst_CLK_OUT_PRE.AR -0 1 -1 0 .names inst_CLK_000_D4.BLIF inst_CLK_000_D5.D 1 1 0 0 @@ -756,6 +783,12 @@ inst_CLK_OUT_PRE.D .names RST.BLIF inst_CLK_000_D4.AP 0 1 1 0 +.names CLK_OSZI.BLIF CLK_CNT_P_0_.C +1 1 +0 0 +.names RST.BLIF CLK_CNT_P_0_.AR +0 1 +1 0 .names inst_CLK_000_D1.BLIF inst_CLK_000_D2.D 1 1 0 0 @@ -774,6 +807,15 @@ inst_CLK_OUT_PRE.D .names RST.BLIF inst_CLK_000_D3.AP 0 1 1 0 +.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D +1 1 +0 0 +.names CLK_OSZI.BLIF CLK_OUT_INTreg.C +1 1 +0 0 +.names RST.BLIF CLK_OUT_INTreg.AR +0 1 +1 0 .names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.D 1 1 0 0 @@ -792,6 +834,15 @@ inst_CLK_OUT_PRE.D .names RST.BLIF inst_CLK_000_D0.AP 0 1 1 0 +.names VPA.BLIF inst_VPA_D.D +1 1 +0 0 +.names CLK_OSZI.BLIF inst_VPA_D.C +1 1 +0 0 +.names RST.BLIF inst_VPA_D.AP +0 1 +1 0 .names RESETDFFRHreg.D 1 .names CLK_OSZI.BLIF RESETDFFRHreg.C @@ -840,48 +891,60 @@ inst_CLK_OUT_PRE.D 1 1 0 0 .names DSACK_0_ - 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF AS_030.OE -00 1 -1- 0 --1 0 + 1 +.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_000_DMA.BLIF \ +AS_030.OE +000 1 +-1- 0 +1-- 0 +--1 0 .names inst_BGACK_030_INTreg.BLIF AS_000.OE 1 1 0 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF DS_030.OE -00 1 -1- 0 --1 0 +.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_000_DMA.BLIF \ +DS_030.OE +000 1 +-1- 0 +1-- 0 +--1 0 .names inst_BGACK_030_INTreg.BLIF UDS_000.OE 1 1 0 0 .names inst_BGACK_030_INTreg.BLIF LDS_000.OE 1 1 0 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF SIZE_0_.OE -00 1 -1- 0 --1 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF SIZE_1_.OE -00 1 -1- 0 --1 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF A0.OE -00 1 -1- 0 --1 0 +.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_000_DMA.BLIF \ +SIZE_0_.OE +000 1 +-1- 0 +1-- 0 +--1 0 +.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_000_DMA.BLIF \ +SIZE_1_.OE +000 1 +-1- 0 +1-- 0 +--1 0 +.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_000_DMA.BLIF A0.OE +000 1 +-1- 0 +1-- 0 +--1 0 .names nEXP_SPACE.BLIF DSACK_1_.OE 1 1 0 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF DTACK.OE -00 1 -1- 0 --1 0 +.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_000_DMA.BLIF \ +DTACK.OE +000 1 +-1- 0 +1-- 0 +--1 0 .names inst_FPU_CS_INTreg.BLIF BERR.OE 0 1 1 0 -.names DSACK_0_.OE - 0 +.names nEXP_SPACE.BLIF DSACK_0_.OE +1 1 +0 0 .names inst_FPU_CS_INTreg.BLIF AVEC_EXP.OE 0 1 1 0 @@ -896,49 +959,6 @@ A_25_.BLIF A_24_.BLIF CIIN.OE -1------ 0 1------- 0 -------1 0 -.names inst_VMA_INTreg.BLIF inst_CLK_000_D0.BLIF inst_VMA_INTreg.D.X1 -10 1 -0- 0 --1 0 -.names VPA.BLIF inst_VMA_INTreg.BLIF inst_CLK_000_D0.BLIF inst_AS_000_INT.BLIF \ -cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF cpu_est_3_reg.BLIF \ -inst_VMA_INTreg.D.X2 -01--10-- 1 --11----- 1 ---110110 1 -1-0----- 0 --0-0---- 0 --0--1--- 0 ---0-0--- 0 ---0--1-- 0 --0---0-- 0 --0----0- 0 --0-----1 0 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -AMIGA_BUS_ENABLEDFFSHreg.D.X1 -01 1 -1- 0 --0 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -inst_CLK_000_D0.BLIF inst_AS_000_INT.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_0_.BLIF \ -AMIGA_BUS_ENABLEDFFSHreg.BLIF AMIGA_BUS_ENABLEDFFSHreg.D.X2 -0------1 1 ------0-1 1 ----11-1- 1 --01----- 1 --10----- 1 --110---0 0 --000---0 0 --11-0--0 0 --00-0--0 0 --11---00 0 --00---00 0 -1110-1-- 0 -1000-1-- 0 -111-01-- 0 -100-01-- 0 -111--10- 0 -100--10- 0 .names inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF cpu_est_1_.BLIF \ cpu_est_2_.BLIF cpu_est_3_reg.BLIF cpu_est_3_reg.D.X1 10111 1 diff --git a/Logic/68030_tk.crf b/Logic/68030_tk.crf index 1315fee..a78422c 100644 --- a/Logic/68030_tk.crf +++ b/Logic/68030_tk.crf @@ -1,7 +1,7 @@ // Signal Name Cross Reference File // ispLEVER Classic 1.7.00.05.28.13 -// Design '68030_tk' created Sat May 24 21:59:14 2014 +// Design '68030_tk' created Sun May 25 20:57:52 2014 // LEGEND: '>' Functional Block Port Separator diff --git a/Logic/68030_tk.eq3 b/Logic/68030_tk.eq3 index edc9fd4..f145155 100644 --- a/Logic/68030_tk.eq3 +++ b/Logic/68030_tk.eq3 @@ -2,34 +2,28 @@ Copyright(C), 1992-2013, Lattice Semiconductor Corp. All Rights Reserved. -Design bus68030 created Sat May 24 21:59:14 2014 +Design bus68030 created Sun May 25 20:57:52 2014 P-Terms Fan-in Fan-out Type Name (attributes) --------- ------ ------- ---- ----------------- - 0 0 1 Pin DSACK_0_ - 0 0 1 Pin DSACK_0_.OE 0 0 1 Pin BERR 1 1 1 Pin BERR.OE 1 1 1 Pin CLK_DIV_OUT.AR 1 1 1 Pin CLK_DIV_OUT.D 1 1 1 Pin CLK_DIV_OUT.C 1 1 1 Pin DTACK - 1 2 1 Pin DTACK.OE + 1 3 1 Pin DTACK.OE 1 0 1 Pin AVEC 0 0 1 Pin AVEC_EXP 1 1 1 Pin AVEC_EXP.OE - 2 2 1 Pin AMIGA_BUS_DATA_DIR + 1 0 1 Pin DSACK_0_ + 1 1 1 Pin DSACK_0_.OE + 2 3 1 Pin AMIGA_BUS_DATA_DIR 1 0 1 Pin AMIGA_BUS_ENABLE_LOW 1 4 1 Pin CIIN 1 8 1 Pin CIIN.OE - 3 4 1 Pin IPL_030_1_.D - 1 1 1 Pin IPL_030_1_.AP - 1 1 1 Pin IPL_030_1_.C - 3 4 1 Pin IPL_030_0_.D - 1 1 1 Pin IPL_030_0_.AP - 1 1 1 Pin IPL_030_0_.C - 1 2 1 Pin SIZE_1_.OE + 1 3 1 Pin SIZE_1_.OE 3 7 1 Pin SIZE_1_.D- 1 1 1 Pin SIZE_1_.AP 1 1 1 Pin SIZE_1_.C @@ -37,30 +31,34 @@ Design bus68030 created Sat May 24 21:59:14 2014 1 1 1 Pin IPL_030_2_.AP 1 1 1 Pin IPL_030_2_.C 1 1 1 Pin DSACK_1_.OE - 2 5 1 Pin DSACK_1_.D- + 2 6 1 Pin DSACK_1_.D- 1 1 1 Pin DSACK_1_.AP 1 1 1 Pin DSACK_1_.C - 1 2 1 Pin AS_030.OE + 1 3 1 Pin AS_030.OE 3 7 1 Pin AS_030.D- 1 1 1 Pin AS_030.AP 1 1 1 Pin AS_030.C + 1 3 1 Pin SIZE_0_.OE + 2 7 1 Pin SIZE_0_.D- + 1 1 1 Pin SIZE_0_.AP + 1 1 1 Pin SIZE_0_.C 1 1 1 Pin AS_000.OE - 2 3 1 Pin AS_000.D + 2 4 1 Pin AS_000.D- 1 1 1 Pin AS_000.AP 1 1 1 Pin AS_000.C - 1 2 1 Pin DS_030.OE + 1 3 1 Pin DS_030.OE 5 9 1 Pin DS_030.D- 1 1 1 Pin DS_030.AP 1 1 1 Pin DS_030.C 1 1 1 Pin UDS_000.OE - 5 7 1 Pin UDS_000.D- + 6 8 1 Pin UDS_000.D- 1 1 1 Pin UDS_000.AP 1 1 1 Pin UDS_000.C 1 1 1 Pin LDS_000.OE - 8 9 1 Pin LDS_000.D + 10 10 1 Pin LDS_000.D 1 1 1 Pin LDS_000.AP 1 1 1 Pin LDS_000.C - 1 2 1 Pin A0.OE + 1 3 1 Pin A0.OE 2 7 1 Pin A0.D 1 1 1 Pin A0.AP 1 1 1 Pin A0.C @@ -73,39 +71,40 @@ Design bus68030 created Sat May 24 21:59:14 2014 1 1 1 Pin CLK_EXP.AR 1 1 1 Pin CLK_EXP.D 1 1 1 Pin CLK_EXP.C + 3 4 1 Pin IPL_030_1_.D + 1 1 1 Pin IPL_030_1_.AP + 1 1 1 Pin IPL_030_1_.C 2 10 1 Pin FPU_CS.D- 1 1 1 Pin FPU_CS.AP 1 1 1 Pin FPU_CS.C + 3 4 1 Pin IPL_030_0_.D + 1 1 1 Pin IPL_030_0_.AP + 1 1 1 Pin IPL_030_0_.C 3 6 1 PinX1 E.D.X1 1 1 1 PinX2 E.D.X2 1 1 1 Pin E.AR 1 1 1 Pin E.C - 2 7 1 PinX1 VMA.D.X1 - 1 5 1 PinX2 VMA.D.X2 + 4 7 1 Pin VMA.D- 1 1 1 Pin VMA.AP 1 1 1 Pin VMA.C 1 1 1 Pin RESET.AR 1 0 1 Pin RESET.D 1 1 1 Pin RESET.C - 7 8 1 Pin AMIGA_BUS_ENABLE.D + 6 8 1 Pin AMIGA_BUS_ENABLE.D- 1 1 1 Pin AMIGA_BUS_ENABLE.AP 1 1 1 Pin AMIGA_BUS_ENABLE.C - 1 2 1 Pin SIZE_0_.OE - 2 7 1 Pin SIZE_0_.D- - 1 1 1 Pin SIZE_0_.AP - 1 1 1 Pin SIZE_0_.C - 7 16 1 Node inst_AS_030_000_SYNC.D + 7 17 1 Node inst_AS_030_000_SYNC.D 1 1 1 Node inst_AS_030_000_SYNC.AP 1 1 1 Node inst_AS_030_000_SYNC.C - 1 1 1 Node inst_BGACK_030_INT_D.D - 1 1 1 Node inst_BGACK_030_INT_D.AP - 1 1 1 Node inst_BGACK_030_INT_D.C - 2 6 1 Node inst_DTACK_SYNC.D- + 2 7 1 Node inst_DTACK_SYNC.D- 1 1 1 Node inst_DTACK_SYNC.AP 1 1 1 Node inst_DTACK_SYNC.C - 2 8 1 Node inst_VPA_SYNC.D- + 2 9 1 Node inst_VPA_SYNC.D- 1 1 1 Node inst_VPA_SYNC.AP 1 1 1 Node inst_VPA_SYNC.C + 1 1 1 Node inst_VPA_D.D + 1 1 1 Node inst_VPA_D.AP + 1 1 1 Node inst_VPA_D.C 1 1 1 Node inst_CLK_000_D0.D 1 1 1 Node inst_CLK_000_D0.AP 1 1 1 Node inst_CLK_000_D0.C @@ -118,11 +117,30 @@ Design bus68030 created Sat May 24 21:59:14 2014 1 1 1 Node inst_CLK_000_D6.D 1 1 1 Node inst_CLK_000_D6.AP 1 1 1 Node inst_CLK_000_D6.C + 1 1 1 Node inst_CLK_OUT_PRE.AR + 2 2 1 Node inst_CLK_OUT_PRE.D + 1 1 1 Node inst_CLK_OUT_PRE.C + 1 1 1 Node inst_BGACK_030_INT_D.D + 1 1 1 Node inst_BGACK_030_INT_D.AP + 1 1 1 Node inst_BGACK_030_INT_D.C + 1 1 1 Node CLK_CNT_P_0_.AR + 1 1 1 Node CLK_CNT_P_0_.D + 1 1 1 Node CLK_CNT_P_0_.C 1 1 1 Node SM_AMIGA_5_.AR - 2 3 1 Node SM_AMIGA_5_.D + 3 4 1 Node SM_AMIGA_5_.D 1 1 1 Node SM_AMIGA_5_.C + 6 10 1 Node SM_AMIGA_7_.D + 1 1 1 Node SM_AMIGA_7_.AP + 1 1 1 Node SM_AMIGA_7_.C + 1 1 1 Node SM_AMIGA_1_.AR + 4 6 1 Node SM_AMIGA_1_.D + 1 1 1 Node SM_AMIGA_1_.C + 3 6 1 NodeX1 SM_AMIGA_0_.D.X1 + 1 4 1 NodeX2 SM_AMIGA_0_.D.X2 + 1 1 1 Node SM_AMIGA_0_.AR + 1 1 1 Node SM_AMIGA_0_.C 1 1 1 Node SM_AMIGA_6_.AR - 2 7 1 Node SM_AMIGA_6_.D + 3 8 1 Node SM_AMIGA_6_.D 1 1 1 Node SM_AMIGA_6_.C 1 1 1 Node inst_CLK_000_D3.D 1 1 1 Node inst_CLK_000_D3.AP @@ -131,40 +149,16 @@ Design bus68030 created Sat May 24 21:59:14 2014 1 1 1 Node inst_CLK_000_D5.AP 1 1 1 Node inst_CLK_000_D5.C 1 1 1 Node SM_AMIGA_3_.AR - 3 5 1 Node SM_AMIGA_3_.D + 4 6 1 Node SM_AMIGA_3_.D 1 1 1 Node SM_AMIGA_3_.C - 1 1 1 Node SM_AMIGA_0_.AR - 4 6 1 Node SM_AMIGA_0_.D - 1 1 1 Node SM_AMIGA_0_.C - 1 1 1 Node SM_AMIGA_1_.AR - 3 5 1 Node SM_AMIGA_1_.D - 1 1 1 Node SM_AMIGA_1_.C - 1 1 1 Node CLK_CNT_N_0_.AR - 2 2 1 Node CLK_CNT_N_0_.D - 1 1 1 Node CLK_CNT_N_0_.C - 1 1 1 Node CLK_CNT_N_1_.D - 1 1 1 Node CLK_CNT_N_1_.AP - 1 1 1 Node CLK_CNT_N_1_.C - 1 1 1 Node CLK_CNT_P_0_.AR - 2 2 1 Node CLK_CNT_P_0_.D - 1 1 1 Node CLK_CNT_P_0_.C - 1 1 1 Node CLK_CNT_P_1_.AR - 1 1 1 Node CLK_CNT_P_1_.D - 1 1 1 Node CLK_CNT_P_1_.C 1 1 1 Node inst_CLK_000_D4.D 1 1 1 Node inst_CLK_000_D4.AP 1 1 1 Node inst_CLK_000_D4.C - 5 9 1 Node SM_AMIGA_7_.D - 1 1 1 Node SM_AMIGA_7_.AP - 1 1 1 Node SM_AMIGA_7_.C 1 1 1 Node SM_AMIGA_4_.AR - 2 3 1 Node SM_AMIGA_4_.D + 3 4 1 Node SM_AMIGA_4_.D 1 1 1 Node SM_AMIGA_4_.C - 1 1 1 Node inst_CLK_OUT_PRE.AR - 4 4 1 Node inst_CLK_OUT_PRE.D - 1 1 1 Node inst_CLK_OUT_PRE.C 1 1 1 Node SM_AMIGA_2_.AR - 3 5 1 Node SM_AMIGA_2_.D + 4 6 1 Node SM_AMIGA_2_.D 1 1 1 Node SM_AMIGA_2_.C 1 1 1 Node cpu_est_0_.AR 3 3 1 Node cpu_est_0_.D @@ -177,18 +171,14 @@ Design bus68030 created Sat May 24 21:59:14 2014 1 1 1 Node cpu_est_2_.AR 1 1 1 Node cpu_est_2_.C ========= - 243 P-Term Total: 243 + 245 P-Term Total: 245 Total Pins: 59 - Total Nodes: 27 + Total Nodes: 25 Average P-Term/Output: 2 Equations: -DSACK_0_ = (0); - -DSACK_0_.OE = (0); - BERR = (0); BERR.OE = (!FPU_CS.Q); @@ -201,7 +191,7 @@ CLK_DIV_OUT.C = (CLK_OSZI); DTACK = (DSACK_1_.PIN); -DTACK.OE = (!nEXP_SPACE & !BGACK_030.Q); +DTACK.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); AVEC = (1); @@ -209,8 +199,12 @@ AVEC_EXP = (0); AVEC_EXP.OE = (!FPU_CS.Q); +DSACK_0_ = (1); + +DSACK_0_.OE = (nEXP_SPACE); + AMIGA_BUS_DATA_DIR = (!RW & BGACK_030.Q - # RW & !BGACK_030.Q); + # !nEXP_SPACE & RW & !BGACK_030.Q); AMIGA_BUS_ENABLE_LOW = (1); @@ -218,23 +212,7 @@ CIIN = (A_23_ & A_22_ & A_21_ & A_20_); CIIN.OE = (!A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_); -IPL_030_1_.D = (!inst_CLK_000_D0.Q & IPL_030_1_.Q - # inst_CLK_000_D1.Q & IPL_030_1_.Q - # IPL_1_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); - -IPL_030_1_.AP = (!RST); - -IPL_030_1_.C = (CLK_OSZI); - -IPL_030_0_.D = (!inst_CLK_000_D0.Q & IPL_030_0_.Q - # inst_CLK_000_D1.Q & IPL_030_0_.Q - # IPL_0_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); - -IPL_030_0_.AP = (!RST); - -IPL_030_0_.C = (CLK_OSZI); - -SIZE_1_.OE = (!nEXP_SPACE & !BGACK_030.Q); +SIZE_1_.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); !SIZE_1_.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !SIZE_1_.Q # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & LDS_000.PIN @@ -255,13 +233,13 @@ IPL_030_2_.C = (CLK_OSZI); DSACK_1_.OE = (nEXP_SPACE); !DSACK_1_.D = (!DSACK_1_.Q & !AS_030.PIN - # !inst_CLK_000_D6.Q & inst_CLK_000_D5.Q & SM_AMIGA_1_.Q); + # BGACK_030.Q & !inst_CLK_000_D6.Q & SM_AMIGA_1_.Q & inst_CLK_000_D5.Q); DSACK_1_.AP = (!RST); DSACK_1_.C = (CLK_OSZI); -AS_030.OE = (!nEXP_SPACE & !BGACK_030.Q); +AS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); !AS_030.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !AS_030.Q # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN @@ -271,16 +249,25 @@ AS_030.AP = (!RST); AS_030.C = (CLK_OSZI); +SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); + +!SIZE_0_.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !SIZE_0_.Q + # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & !LDS_000.PIN); + +SIZE_0_.AP = (!RST); + +SIZE_0_.C = (CLK_OSZI); + AS_000.OE = (BGACK_030.Q); -AS_000.D = (!SM_AMIGA_5_.Q & AS_000.Q - # !SM_AMIGA_5_.Q & AS_030.PIN); +!AS_000.D = (BGACK_030.Q & SM_AMIGA_5_.Q + # !AS_000.Q & !AS_030.PIN); AS_000.AP = (!RST); AS_000.C = (CLK_OSZI); -DS_030.OE = (!nEXP_SPACE & !BGACK_030.Q); +DS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); !DS_030.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !DS_030.Q # !CLK_030 & RW & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN @@ -294,11 +281,12 @@ DS_030.C = (CLK_OSZI); UDS_000.OE = (BGACK_030.Q); -!UDS_000.D = (!UDS_000.Q & !AS_030.PIN & DS_030.PIN +!UDS_000.D = (!BGACK_030.Q & !UDS_000.Q & !AS_030.PIN + # !UDS_000.Q & !AS_030.PIN & DS_030.PIN # RW & !SM_AMIGA_5_.Q & !UDS_000.Q & !AS_030.PIN # !RW & !UDS_000.Q & !SM_AMIGA_4_.Q & !AS_030.PIN - # RW & SM_AMIGA_5_.Q & !DS_030.PIN & !A0.PIN - # !RW & SM_AMIGA_4_.Q & !DS_030.PIN & !A0.PIN); + # RW & BGACK_030.Q & SM_AMIGA_5_.Q & !DS_030.PIN & !A0.PIN + # !RW & BGACK_030.Q & SM_AMIGA_4_.Q & !DS_030.PIN & !A0.PIN); UDS_000.AP = (!RST); @@ -306,20 +294,22 @@ UDS_000.C = (CLK_OSZI); LDS_000.OE = (BGACK_030.Q); -LDS_000.D = (LDS_000.Q & DS_030.PIN +LDS_000.D = (!BGACK_030.Q & LDS_000.Q + # !BGACK_030.Q & AS_030.PIN + # LDS_000.Q & DS_030.PIN # AS_030.PIN & DS_030.PIN # RW & !SM_AMIGA_5_.Q & LDS_000.Q # !RW & LDS_000.Q & !SM_AMIGA_4_.Q # RW & !SM_AMIGA_5_.Q & AS_030.PIN # !RW & !SM_AMIGA_4_.Q & AS_030.PIN - # RW & SM_AMIGA_5_.Q & !DS_030.PIN & SIZE_0_.PIN & !SIZE_1_.PIN & !A0.PIN - # !RW & SM_AMIGA_4_.Q & !DS_030.PIN & SIZE_0_.PIN & !SIZE_1_.PIN & !A0.PIN); + # RW & BGACK_030.Q & SM_AMIGA_5_.Q & !DS_030.PIN & SIZE_0_.PIN & !SIZE_1_.PIN & !A0.PIN + # !RW & BGACK_030.Q & SM_AMIGA_4_.Q & !DS_030.PIN & SIZE_0_.PIN & !SIZE_1_.PIN & !A0.PIN); LDS_000.AP = (!RST); LDS_000.C = (CLK_OSZI); -A0.OE = (!nEXP_SPACE & !BGACK_030.Q); +A0.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); A0.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & A0.Q # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN); @@ -348,6 +338,14 @@ CLK_EXP.D = (inst_CLK_OUT_PRE.Q); CLK_EXP.C = (CLK_OSZI); +IPL_030_1_.D = (!inst_CLK_000_D0.Q & IPL_030_1_.Q + # inst_CLK_000_D1.Q & IPL_030_1_.Q + # IPL_1_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); + +IPL_030_1_.AP = (!RST); + +IPL_030_1_.C = (CLK_OSZI); + !FPU_CS.D = (!FPU_CS.Q & !AS_030.PIN # FC_1_ & BGACK_000 & CLK_030 & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & !AS_030.PIN); @@ -355,6 +353,14 @@ FPU_CS.AP = (!RST); FPU_CS.C = (CLK_OSZI); +IPL_030_0_.D = (!inst_CLK_000_D0.Q & IPL_030_0_.Q + # inst_CLK_000_D1.Q & IPL_030_0_.Q + # IPL_0_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); + +IPL_030_0_.AP = (!RST); + +IPL_030_0_.C = (CLK_OSZI); + E.D.X1 = (inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & cpu_est_1_.Q & cpu_est_2_.Q & E.Q # inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & cpu_est_0_.Q & !cpu_est_2_.Q & !E.Q # inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !E.Q); @@ -365,10 +371,10 @@ E.AR = (!RST); E.C = (CLK_OSZI); -VMA.D.X1 = (VMA.Q - # !VMA.Q & inst_CLK_000_D0.Q & AS_000.Q & !cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & !E.Q); - -VMA.D.X2 = (!VPA & VMA.Q & !inst_CLK_000_D0.Q & cpu_est_0_.Q & !cpu_est_1_.Q); +!VMA.D = (!BGACK_030.Q & !VMA.Q + # !VMA.Q & !SM_AMIGA_7_.Q + # !BGACK_030.Q & !inst_VPA_D.Q & !inst_CLK_000_D0.Q & cpu_est_0_.Q & !cpu_est_1_.Q + # !inst_VPA_D.Q & !inst_CLK_000_D0.Q & !SM_AMIGA_7_.Q & cpu_est_0_.Q & !cpu_est_1_.Q); VMA.AP = (!RST); @@ -380,59 +386,49 @@ RESET.D = (1); RESET.C = (CLK_OSZI); -AMIGA_BUS_ENABLE.D = (BGACK_030.Q & !inst_BGACK_030_INT_D.Q - # !nEXP_SPACE & BGACK_030.Q & AMIGA_BUS_ENABLE.Q - # !nEXP_SPACE & !inst_BGACK_030_INT_D.Q & AMIGA_BUS_ENABLE.Q - # BGACK_030.Q & !SM_AMIGA_6_.Q & AMIGA_BUS_ENABLE.Q - # !inst_BGACK_030_INT_D.Q & !SM_AMIGA_6_.Q & AMIGA_BUS_ENABLE.Q - # BGACK_030.Q & inst_CLK_000_D0.Q & AS_000.Q & SM_AMIGA_0_.Q - # !inst_BGACK_030_INT_D.Q & inst_CLK_000_D0.Q & AS_000.Q & SM_AMIGA_0_.Q); +!AMIGA_BUS_ENABLE.D = (!BGACK_030.Q & inst_BGACK_030_INT_D.Q + # !BGACK_030.Q & !AMIGA_BUS_ENABLE.Q + # inst_BGACK_030_INT_D.Q & !AMIGA_BUS_ENABLE.Q & !AS_030.PIN + # inst_BGACK_030_INT_D.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q & !AMIGA_BUS_ENABLE.Q + # nEXP_SPACE & BGACK_030.Q & SM_AMIGA_6_.Q & !AS_030.PIN + # nEXP_SPACE & BGACK_030.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q & SM_AMIGA_6_.Q); AMIGA_BUS_ENABLE.AP = (!RST); AMIGA_BUS_ENABLE.C = (CLK_OSZI); -SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q); - -!SIZE_0_.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !SIZE_0_.Q - # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & !LDS_000.PIN); - -SIZE_0_.AP = (!RST); - -SIZE_0_.C = (CLK_OSZI); - inst_AS_030_000_SYNC.D = (AS_030.PIN # !nEXP_SPACE & inst_AS_030_000_SYNC.Q # !CLK_030 & inst_AS_030_000_SYNC.Q - # !nEXP_SPACE & SM_AMIGA_6_.Q # inst_AS_030_000_SYNC.Q & !SM_AMIGA_7_.Q - # !inst_CLK_000_D6.Q & inst_CLK_000_D5.Q & SM_AMIGA_1_.Q + # !nEXP_SPACE & BGACK_030.Q & SM_AMIGA_6_.Q + # BGACK_030.Q & !inst_CLK_000_D6.Q & SM_AMIGA_1_.Q & inst_CLK_000_D5.Q # FC_1_ & BGACK_000 & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & inst_AS_030_000_SYNC.Q); inst_AS_030_000_SYNC.AP = (!RST); inst_AS_030_000_SYNC.C = (CLK_OSZI); -inst_BGACK_030_INT_D.D = (BGACK_030.Q); - -inst_BGACK_030_INT_D.AP = (!RST); - -inst_BGACK_030_INT_D.C = (CLK_OSZI); - !inst_DTACK_SYNC.D = (!inst_DTACK_SYNC.Q & !AS_030.PIN - # VPA & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !DTACK.PIN); + # BGACK_030.Q & inst_VPA_D.Q & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !DTACK.PIN); inst_DTACK_SYNC.AP = (!RST); inst_DTACK_SYNC.C = (CLK_OSZI); !inst_VPA_SYNC.D = (!inst_VPA_SYNC.Q & !AS_030.PIN - # !VPA & !VMA.Q & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !cpu_est_1_.Q & E.Q); + # BGACK_030.Q & !VMA.Q & !inst_VPA_D.Q & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !cpu_est_1_.Q & E.Q); inst_VPA_SYNC.AP = (!RST); inst_VPA_SYNC.C = (CLK_OSZI); +inst_VPA_D.D = (VPA); + +inst_VPA_D.AP = (!RST); + +inst_VPA_D.C = (CLK_OSZI); + inst_CLK_000_D0.D = (CLK_000); inst_CLK_000_D0.AP = (!RST); @@ -457,17 +453,68 @@ inst_CLK_000_D6.AP = (!RST); inst_CLK_000_D6.C = (CLK_OSZI); +inst_CLK_OUT_PRE.AR = (!RST); + +inst_CLK_OUT_PRE.D = (!inst_CLK_OUT_PRE.Q & CLK_CNT_P_0_.Q + # inst_CLK_OUT_PRE.Q & !CLK_CNT_P_0_.Q); + +inst_CLK_OUT_PRE.C = (CLK_OSZI); + +inst_BGACK_030_INT_D.D = (BGACK_030.Q); + +inst_BGACK_030_INT_D.AP = (!RST); + +inst_BGACK_030_INT_D.C = (CLK_OSZI); + +CLK_CNT_P_0_.AR = (!RST); + +CLK_CNT_P_0_.D = (!CLK_CNT_P_0_.Q); + +CLK_CNT_P_0_.C = (CLK_OSZI); + SM_AMIGA_5_.AR = (!RST); -SM_AMIGA_5_.D = (inst_CLK_000_D0.Q & SM_AMIGA_5_.Q - # inst_CLK_000_D0.Q & SM_AMIGA_6_.Q); +SM_AMIGA_5_.D = (!BGACK_030.Q & SM_AMIGA_5_.Q + # inst_CLK_000_D0.Q & SM_AMIGA_5_.Q + # BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_6_.Q); SM_AMIGA_5_.C = (CLK_OSZI); +SM_AMIGA_7_.D = (!BGACK_030.Q & SM_AMIGA_7_.Q + # inst_AS_030_000_SYNC.Q & SM_AMIGA_7_.Q + # inst_CLK_000_D2.Q & SM_AMIGA_7_.Q + # SM_AMIGA_7_.Q & !inst_CLK_000_D3.Q + # !nEXP_SPACE & BGACK_030.Q & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q + # BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_0_.Q & AS_000.Q); + +SM_AMIGA_7_.AP = (!RST); + +SM_AMIGA_7_.C = (CLK_OSZI); + +SM_AMIGA_1_.AR = (!RST); + +SM_AMIGA_1_.D = (!BGACK_030.Q & SM_AMIGA_1_.Q + # inst_CLK_000_D0.Q & SM_AMIGA_1_.Q + # !inst_CLK_000_D6.Q & SM_AMIGA_1_.Q & inst_CLK_000_D5.Q + # BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_2_.Q); + +SM_AMIGA_1_.C = (CLK_OSZI); + +SM_AMIGA_0_.D.X1 = (SM_AMIGA_0_.Q + # BGACK_030.Q & !inst_CLK_000_D0.Q & inst_CLK_000_D6.Q & SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q + # BGACK_030.Q & !inst_CLK_000_D0.Q & SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q & !inst_CLK_000_D5.Q); + +SM_AMIGA_0_.D.X2 = (BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_0_.Q & AS_000.Q); + +SM_AMIGA_0_.AR = (!RST); + +SM_AMIGA_0_.C = (CLK_OSZI); + SM_AMIGA_6_.AR = (!RST); -SM_AMIGA_6_.D = (!inst_AS_030_000_SYNC.Q & !inst_CLK_000_D2.Q & inst_CLK_000_D3.Q & SM_AMIGA_7_.Q - # nEXP_SPACE & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q & !SM_AMIGA_7_.Q); +SM_AMIGA_6_.D = (!BGACK_030.Q & SM_AMIGA_6_.Q + # nEXP_SPACE & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q + # BGACK_030.Q & !inst_AS_030_000_SYNC.Q & !inst_CLK_000_D2.Q & SM_AMIGA_7_.Q & inst_CLK_000_D3.Q); SM_AMIGA_6_.C = (CLK_OSZI); @@ -485,92 +532,33 @@ inst_CLK_000_D5.C = (CLK_OSZI); SM_AMIGA_3_.AR = (!RST); -SM_AMIGA_3_.D = (inst_CLK_000_D0.Q & SM_AMIGA_3_.Q - # inst_CLK_000_D0.Q & SM_AMIGA_4_.Q - # inst_DTACK_SYNC.Q & inst_VPA_SYNC.Q & SM_AMIGA_3_.Q); +SM_AMIGA_3_.D = (!BGACK_030.Q & SM_AMIGA_3_.Q + # inst_CLK_000_D0.Q & SM_AMIGA_3_.Q + # inst_DTACK_SYNC.Q & inst_VPA_SYNC.Q & SM_AMIGA_3_.Q + # BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q); SM_AMIGA_3_.C = (CLK_OSZI); -SM_AMIGA_0_.AR = (!RST); - -SM_AMIGA_0_.D = (!inst_CLK_000_D0.Q & SM_AMIGA_0_.Q - # !AS_000.Q & SM_AMIGA_0_.Q - # !inst_CLK_000_D0.Q & inst_CLK_000_D6.Q & SM_AMIGA_1_.Q - # !inst_CLK_000_D0.Q & !inst_CLK_000_D5.Q & SM_AMIGA_1_.Q); - -SM_AMIGA_0_.C = (CLK_OSZI); - -SM_AMIGA_1_.AR = (!RST); - -SM_AMIGA_1_.D = (inst_CLK_000_D0.Q & SM_AMIGA_1_.Q - # inst_CLK_000_D0.Q & SM_AMIGA_2_.Q - # !inst_CLK_000_D6.Q & inst_CLK_000_D5.Q & SM_AMIGA_1_.Q); - -SM_AMIGA_1_.C = (CLK_OSZI); - -CLK_CNT_N_0_.AR = (!RST); - -CLK_CNT_N_0_.D = (CLK_CNT_N_0_.Q & CLK_CNT_N_1_.Q - # !CLK_CNT_N_0_.Q & !CLK_CNT_N_1_.Q); - -CLK_CNT_N_0_.C = (!CLK_OSZI); - -CLK_CNT_N_1_.D = (CLK_CNT_N_0_.Q); - -CLK_CNT_N_1_.AP = (!RST); - -CLK_CNT_N_1_.C = (!CLK_OSZI); - -CLK_CNT_P_0_.AR = (!RST); - -CLK_CNT_P_0_.D = (CLK_CNT_P_0_.Q & CLK_CNT_P_1_.Q - # !CLK_CNT_P_0_.Q & !CLK_CNT_P_1_.Q); - -CLK_CNT_P_0_.C = (CLK_OSZI); - -CLK_CNT_P_1_.AR = (!RST); - -CLK_CNT_P_1_.D = (CLK_CNT_P_0_.Q); - -CLK_CNT_P_1_.C = (CLK_OSZI); - inst_CLK_000_D4.D = (inst_CLK_000_D3.Q); inst_CLK_000_D4.AP = (!RST); inst_CLK_000_D4.C = (CLK_OSZI); -SM_AMIGA_7_.D = (inst_AS_030_000_SYNC.Q & SM_AMIGA_7_.Q - # inst_CLK_000_D2.Q & SM_AMIGA_7_.Q - # !inst_CLK_000_D3.Q & SM_AMIGA_7_.Q - # !nEXP_SPACE & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q - # inst_CLK_000_D0.Q & AS_000.Q & SM_AMIGA_0_.Q); - -SM_AMIGA_7_.AP = (!RST); - -SM_AMIGA_7_.C = (CLK_OSZI); - SM_AMIGA_4_.AR = (!RST); -SM_AMIGA_4_.D = (!inst_CLK_000_D0.Q & SM_AMIGA_5_.Q - # !inst_CLK_000_D0.Q & SM_AMIGA_4_.Q); +SM_AMIGA_4_.D = (!BGACK_030.Q & SM_AMIGA_4_.Q + # !inst_CLK_000_D0.Q & SM_AMIGA_4_.Q + # BGACK_030.Q & !inst_CLK_000_D0.Q & SM_AMIGA_5_.Q); SM_AMIGA_4_.C = (CLK_OSZI); -inst_CLK_OUT_PRE.AR = (!RST); - -inst_CLK_OUT_PRE.D = (!CLK_CNT_N_0_.Q & CLK_CNT_N_1_.Q & !CLK_CNT_P_0_.Q & CLK_CNT_P_1_.Q - # CLK_CNT_N_0_.Q & !CLK_CNT_N_1_.Q & !CLK_CNT_P_0_.Q & CLK_CNT_P_1_.Q - # !CLK_CNT_N_0_.Q & CLK_CNT_N_1_.Q & CLK_CNT_P_0_.Q & !CLK_CNT_P_1_.Q - # CLK_CNT_N_0_.Q & !CLK_CNT_N_1_.Q & CLK_CNT_P_0_.Q & !CLK_CNT_P_1_.Q); - -inst_CLK_OUT_PRE.C = (CLK_OSZI); - SM_AMIGA_2_.AR = (!RST); -SM_AMIGA_2_.D = (!inst_CLK_000_D0.Q & SM_AMIGA_2_.Q - # !inst_DTACK_SYNC.Q & !inst_CLK_000_D0.Q & SM_AMIGA_3_.Q - # !inst_VPA_SYNC.Q & !inst_CLK_000_D0.Q & SM_AMIGA_3_.Q); +SM_AMIGA_2_.D = (!BGACK_030.Q & SM_AMIGA_2_.Q + # !inst_CLK_000_D0.Q & SM_AMIGA_2_.Q + # BGACK_030.Q & !inst_DTACK_SYNC.Q & !inst_CLK_000_D0.Q & SM_AMIGA_3_.Q + # BGACK_030.Q & !inst_VPA_SYNC.Q & !inst_CLK_000_D0.Q & SM_AMIGA_3_.Q); SM_AMIGA_2_.C = (CLK_OSZI); diff --git a/Logic/68030_tk.fti b/Logic/68030_tk.fti index 574abc6..f0d900d 100644 --- a/Logic/68030_tk.fti +++ b/Logic/68030_tk.fti @@ -1,5 +1,5 @@ #PLAFILE 68030_tk.tt4 -#DATE 05/24/2014 +#DATE 05/25/2014 #DESIGN #DEVICE mach447a @@ -35,10 +35,7 @@ DATA LOCATION BG_030:C_*_21 // INP DATA LOCATION CIIN:E_12_47 // OUT DATA LOCATION CLK_000:*_*_11 // INP DATA LOCATION CLK_030:*_*_64 // INP -DATA LOCATION CLK_CNT_N_0_:C_1 // NOD -DATA LOCATION CLK_CNT_N_1_:A_9 // NOD -DATA LOCATION CLK_CNT_P_0_:G_5 // NOD -DATA LOCATION CLK_CNT_P_1_:E_5 // NOD +DATA LOCATION CLK_CNT_P_0_:F_5 // NOD DATA LOCATION CLK_DIV_OUT:G_1_65 // OUT DATA LOCATION CLK_EXP:B_0_10 // OUT DATA LOCATION CLK_OSZI:*_*_61 // Cin @@ -80,32 +77,33 @@ DATA LOCATION RST:*_*_86 // INP DATA LOCATION RW:G_*_71 // INP DATA LOCATION SIZE_0_:G_0_70 // IO {RN_SIZE_0_} DATA LOCATION SIZE_1_:H_0_79 // IO {RN_SIZE_1_} -DATA LOCATION SM_AMIGA_0_:F_1 // NOD -DATA LOCATION SM_AMIGA_1_:B_5 // NOD -DATA LOCATION SM_AMIGA_2_:B_9 // NOD -DATA LOCATION SM_AMIGA_3_:C_8 // NOD -DATA LOCATION SM_AMIGA_4_:A_12 // NOD -DATA LOCATION SM_AMIGA_5_:A_1 // NOD -DATA LOCATION SM_AMIGA_6_:F_8 // NOD -DATA LOCATION SM_AMIGA_7_:F_12 // NOD +DATA LOCATION SM_AMIGA_0_:C_9 // NOD +DATA LOCATION SM_AMIGA_1_:F_0 // NOD +DATA LOCATION SM_AMIGA_2_:C_1 // NOD +DATA LOCATION SM_AMIGA_3_:C_5 // NOD +DATA LOCATION SM_AMIGA_4_:A_5 // NOD +DATA LOCATION SM_AMIGA_5_:G_12 // NOD +DATA LOCATION SM_AMIGA_6_:C_4 // NOD +DATA LOCATION SM_AMIGA_7_:C_8 // NOD DATA LOCATION UDS_000:D_12_32 // IO {RN_UDS_000} DATA LOCATION VMA:D_1_35 // IO {RN_VMA} DATA LOCATION VPA:*_*_36 // INP -DATA LOCATION cpu_est_0_:A_8 // NOD -DATA LOCATION cpu_est_1_:G_12 // NOD -DATA LOCATION cpu_est_2_:G_9 // NOD -DATA LOCATION inst_AS_030_000_SYNC:F_5 // NOD +DATA LOCATION cpu_est_0_:A_1 // NOD +DATA LOCATION cpu_est_1_:A_12 // NOD +DATA LOCATION cpu_est_2_:A_9 // NOD +DATA LOCATION inst_AS_030_000_SYNC:F_1 // NOD DATA LOCATION inst_BGACK_030_INT_D:F_4 // NOD -DATA LOCATION inst_CLK_000_D0:E_8 // NOD -DATA LOCATION inst_CLK_000_D1:F_0 // NOD -DATA LOCATION inst_CLK_000_D2:A_5 // NOD -DATA LOCATION inst_CLK_000_D3:E_9 // NOD -DATA LOCATION inst_CLK_000_D4:F_9 // NOD -DATA LOCATION inst_CLK_000_D5:E_1 // NOD -DATA LOCATION inst_CLK_000_D6:H_5 // NOD -DATA LOCATION inst_CLK_OUT_PRE:C_4 // NOD -DATA LOCATION inst_DTACK_SYNC:C_9 // NOD -DATA LOCATION inst_VPA_SYNC:C_5 // NOD +DATA LOCATION inst_CLK_000_D0:A_8 // NOD +DATA LOCATION inst_CLK_000_D1:E_8 // NOD +DATA LOCATION inst_CLK_000_D2:E_1 // NOD +DATA LOCATION inst_CLK_000_D3:G_9 // NOD +DATA LOCATION inst_CLK_000_D4:E_9 // NOD +DATA LOCATION inst_CLK_000_D5:G_5 // NOD +DATA LOCATION inst_CLK_000_D6:F_12 // NOD +DATA LOCATION inst_CLK_OUT_PRE:F_8 // NOD +DATA LOCATION inst_DTACK_SYNC:B_9 // NOD +DATA LOCATION inst_VPA_D:E_5 // NOD +DATA LOCATION inst_VPA_SYNC:B_5 // NOD DATA LOCATION nEXP_SPACE:*_*_14 // INP DATA IO_DIR A0:BI DATA IO_DIR AMIGA_BUS_DATA_DIR:OUT @@ -167,48 +165,12 @@ DATA IO_DIR VMA:OUT DATA IO_DIR VPA:IN DATA IO_DIR nEXP_SPACE:IN DATA GLB_CLOCK CLK_OSZI -DATA PW_LEVEL IPL_1_:0 -DATA SLEW IPL_1_:0 -DATA PW_LEVEL IPL_0_:0 -DATA SLEW IPL_0_:0 DATA PW_LEVEL A_31_:0 DATA SLEW A_31_:0 -DATA PW_LEVEL DSACK_0_:0 -DATA SLEW DSACK_0_:0 -DATA PW_LEVEL FC_0_:0 -DATA SLEW FC_0_:0 DATA PW_LEVEL IPL_2_:0 DATA SLEW IPL_2_:0 DATA PW_LEVEL FC_1_:0 DATA SLEW FC_1_:0 -DATA SLEW nEXP_SPACE:0 -DATA PW_LEVEL BERR:0 -DATA SLEW BERR:0 -DATA PW_LEVEL BG_030:0 -DATA SLEW BG_030:0 -DATA PW_LEVEL BGACK_000:0 -DATA SLEW BGACK_000:0 -DATA SLEW CLK_030:0 -DATA SLEW CLK_000:0 -DATA SLEW CLK_OSZI:0 -DATA PW_LEVEL CLK_DIV_OUT:0 -DATA SLEW CLK_DIV_OUT:0 -DATA PW_LEVEL DTACK:0 -DATA SLEW DTACK:0 -DATA PW_LEVEL AVEC:0 -DATA SLEW AVEC:0 -DATA PW_LEVEL AVEC_EXP:0 -DATA SLEW AVEC_EXP:0 -DATA SLEW VPA:0 -DATA SLEW RST:0 -DATA PW_LEVEL RW:0 -DATA SLEW RW:0 -DATA PW_LEVEL AMIGA_BUS_DATA_DIR:0 -DATA SLEW AMIGA_BUS_DATA_DIR:0 -DATA PW_LEVEL AMIGA_BUS_ENABLE_LOW:0 -DATA SLEW AMIGA_BUS_ENABLE_LOW:0 -DATA PW_LEVEL CIIN:0 -DATA SLEW CIIN:0 DATA PW_LEVEL A_30_:0 DATA SLEW A_30_:0 DATA PW_LEVEL A_29_:0 @@ -219,30 +181,62 @@ DATA PW_LEVEL A_27_:0 DATA SLEW A_27_:0 DATA PW_LEVEL A_26_:0 DATA SLEW A_26_:0 +DATA SLEW nEXP_SPACE:0 DATA PW_LEVEL A_25_:0 DATA SLEW A_25_:0 +DATA PW_LEVEL BERR:0 +DATA SLEW BERR:0 DATA PW_LEVEL A_24_:0 DATA SLEW A_24_:0 +DATA PW_LEVEL BG_030:0 +DATA SLEW BG_030:0 DATA PW_LEVEL A_23_:0 DATA SLEW A_23_:0 DATA PW_LEVEL A_22_:0 DATA SLEW A_22_:0 DATA PW_LEVEL A_21_:0 DATA SLEW A_21_:0 +DATA PW_LEVEL BGACK_000:0 +DATA SLEW BGACK_000:0 DATA PW_LEVEL A_20_:0 DATA SLEW A_20_:0 +DATA SLEW CLK_030:0 DATA PW_LEVEL A_19_:0 DATA SLEW A_19_:0 +DATA SLEW CLK_000:0 DATA PW_LEVEL A_18_:0 DATA SLEW A_18_:0 +DATA SLEW CLK_OSZI:0 DATA PW_LEVEL A_17_:0 DATA SLEW A_17_:0 +DATA PW_LEVEL CLK_DIV_OUT:0 +DATA SLEW CLK_DIV_OUT:0 DATA PW_LEVEL A_16_:0 DATA SLEW A_16_:0 -DATA PW_LEVEL IPL_030_1_:0 -DATA SLEW IPL_030_1_:0 -DATA PW_LEVEL IPL_030_0_:0 -DATA SLEW IPL_030_0_:0 +DATA PW_LEVEL DTACK:0 +DATA SLEW DTACK:0 +DATA PW_LEVEL IPL_1_:0 +DATA SLEW IPL_1_:0 +DATA PW_LEVEL AVEC:0 +DATA SLEW AVEC:0 +DATA PW_LEVEL IPL_0_:0 +DATA SLEW IPL_0_:0 +DATA PW_LEVEL AVEC_EXP:0 +DATA SLEW AVEC_EXP:0 +DATA PW_LEVEL DSACK_0_:0 +DATA SLEW DSACK_0_:0 +DATA PW_LEVEL FC_0_:0 +DATA SLEW FC_0_:0 +DATA SLEW VPA:0 +DATA SLEW RST:0 +DATA PW_LEVEL RW:0 +DATA SLEW RW:0 +DATA PW_LEVEL AMIGA_BUS_DATA_DIR:0 +DATA SLEW AMIGA_BUS_DATA_DIR:0 +DATA PW_LEVEL AMIGA_BUS_ENABLE_LOW:0 +DATA SLEW AMIGA_BUS_ENABLE_LOW:0 +DATA PW_LEVEL CIIN:0 +DATA SLEW CIIN:0 DATA PW_LEVEL SIZE_1_:0 DATA SLEW SIZE_1_:0 DATA PW_LEVEL IPL_030_2_:0 @@ -251,6 +245,8 @@ DATA PW_LEVEL DSACK_1_:0 DATA SLEW DSACK_1_:0 DATA PW_LEVEL AS_030:0 DATA SLEW AS_030:0 +DATA PW_LEVEL SIZE_0_:0 +DATA SLEW SIZE_0_:0 DATA PW_LEVEL AS_000:0 DATA SLEW AS_000:0 DATA PW_LEVEL DS_030:0 @@ -267,8 +263,12 @@ DATA PW_LEVEL BGACK_030:0 DATA SLEW BGACK_030:0 DATA PW_LEVEL CLK_EXP:0 DATA SLEW CLK_EXP:0 +DATA PW_LEVEL IPL_030_1_:0 +DATA SLEW IPL_030_1_:0 DATA PW_LEVEL FPU_CS:0 DATA SLEW FPU_CS:0 +DATA PW_LEVEL IPL_030_0_:0 +DATA SLEW IPL_030_0_:0 DATA PW_LEVEL E:0 DATA SLEW E:0 DATA PW_LEVEL VMA:0 @@ -277,16 +277,14 @@ DATA PW_LEVEL RESET:0 DATA SLEW RESET:0 DATA PW_LEVEL AMIGA_BUS_ENABLE:0 DATA SLEW AMIGA_BUS_ENABLE:0 -DATA PW_LEVEL SIZE_0_:0 -DATA SLEW SIZE_0_:0 DATA PW_LEVEL inst_AS_030_000_SYNC:0 DATA SLEW inst_AS_030_000_SYNC:0 -DATA PW_LEVEL inst_BGACK_030_INT_D:0 -DATA SLEW inst_BGACK_030_INT_D:0 DATA PW_LEVEL inst_DTACK_SYNC:0 DATA SLEW inst_DTACK_SYNC:0 DATA PW_LEVEL inst_VPA_SYNC:0 DATA SLEW inst_VPA_SYNC:0 +DATA PW_LEVEL inst_VPA_D:0 +DATA SLEW inst_VPA_D:0 DATA PW_LEVEL inst_CLK_000_D0:0 DATA SLEW inst_CLK_000_D0:0 DATA PW_LEVEL inst_CLK_000_D1:0 @@ -295,8 +293,20 @@ DATA PW_LEVEL inst_CLK_000_D2:0 DATA SLEW inst_CLK_000_D2:0 DATA PW_LEVEL inst_CLK_000_D6:0 DATA SLEW inst_CLK_000_D6:0 +DATA PW_LEVEL inst_CLK_OUT_PRE:0 +DATA SLEW inst_CLK_OUT_PRE:0 +DATA PW_LEVEL inst_BGACK_030_INT_D:0 +DATA SLEW inst_BGACK_030_INT_D:0 +DATA PW_LEVEL CLK_CNT_P_0_:0 +DATA SLEW CLK_CNT_P_0_:0 DATA PW_LEVEL SM_AMIGA_5_:0 DATA SLEW SM_AMIGA_5_:0 +DATA PW_LEVEL SM_AMIGA_7_:0 +DATA SLEW SM_AMIGA_7_:0 +DATA PW_LEVEL SM_AMIGA_1_:0 +DATA SLEW SM_AMIGA_1_:0 +DATA PW_LEVEL SM_AMIGA_0_:0 +DATA SLEW SM_AMIGA_0_:0 DATA PW_LEVEL SM_AMIGA_6_:0 DATA SLEW SM_AMIGA_6_:0 DATA PW_LEVEL inst_CLK_000_D3:0 @@ -305,26 +315,10 @@ DATA PW_LEVEL inst_CLK_000_D5:0 DATA SLEW inst_CLK_000_D5:0 DATA PW_LEVEL SM_AMIGA_3_:0 DATA SLEW SM_AMIGA_3_:0 -DATA PW_LEVEL SM_AMIGA_0_:0 -DATA SLEW SM_AMIGA_0_:0 -DATA PW_LEVEL SM_AMIGA_1_:0 -DATA SLEW SM_AMIGA_1_:0 -DATA PW_LEVEL CLK_CNT_N_0_:0 -DATA SLEW CLK_CNT_N_0_:0 -DATA PW_LEVEL CLK_CNT_N_1_:0 -DATA SLEW CLK_CNT_N_1_:0 -DATA PW_LEVEL CLK_CNT_P_0_:0 -DATA SLEW CLK_CNT_P_0_:0 -DATA PW_LEVEL CLK_CNT_P_1_:0 -DATA SLEW CLK_CNT_P_1_:0 DATA PW_LEVEL inst_CLK_000_D4:0 DATA SLEW inst_CLK_000_D4:0 -DATA PW_LEVEL SM_AMIGA_7_:0 -DATA SLEW SM_AMIGA_7_:0 DATA PW_LEVEL SM_AMIGA_4_:0 DATA SLEW SM_AMIGA_4_:0 -DATA PW_LEVEL inst_CLK_OUT_PRE:0 -DATA SLEW inst_CLK_OUT_PRE:0 DATA PW_LEVEL SM_AMIGA_2_:0 DATA SLEW SM_AMIGA_2_:0 DATA PW_LEVEL cpu_est_0_:0 @@ -333,12 +327,11 @@ DATA PW_LEVEL cpu_est_1_:0 DATA SLEW cpu_est_1_:0 DATA PW_LEVEL cpu_est_2_:0 DATA SLEW cpu_est_2_:0 -DATA PW_LEVEL RN_IPL_030_1_:0 -DATA PW_LEVEL RN_IPL_030_0_:0 DATA PW_LEVEL RN_SIZE_1_:0 DATA PW_LEVEL RN_IPL_030_2_:0 DATA PW_LEVEL RN_DSACK_1_:0 DATA PW_LEVEL RN_AS_030:0 +DATA PW_LEVEL RN_SIZE_0_:0 DATA PW_LEVEL RN_AS_000:0 DATA PW_LEVEL RN_DS_030:0 DATA PW_LEVEL RN_UDS_000:0 @@ -346,9 +339,10 @@ DATA PW_LEVEL RN_LDS_000:0 DATA PW_LEVEL RN_A0:0 DATA PW_LEVEL RN_BG_000:0 DATA PW_LEVEL RN_BGACK_030:0 +DATA PW_LEVEL RN_IPL_030_1_:0 DATA PW_LEVEL RN_FPU_CS:0 +DATA PW_LEVEL RN_IPL_030_0_:0 DATA PW_LEVEL RN_E:0 DATA PW_LEVEL RN_VMA:0 DATA PW_LEVEL RN_AMIGA_BUS_ENABLE:0 -DATA PW_LEVEL RN_SIZE_0_:0 END diff --git a/Logic/68030_tk.grp b/Logic/68030_tk.grp index b0ce9a9..92f9b96 100644 --- a/Logic/68030_tk.grp +++ b/Logic/68030_tk.grp @@ -1,18 +1,18 @@ -GROUP MACH_SEG_A DS_030 RN_DS_030 SM_AMIGA_4_ SM_AMIGA_5_ cpu_est_0_ CLK_CNT_N_1_ - inst_CLK_000_D2 AVEC +GROUP MACH_SEG_A DS_030 RN_DS_030 cpu_est_1_ cpu_est_2_ SM_AMIGA_4_ cpu_est_0_ + inst_CLK_000_D0 AVEC GROUP MACH_SEG_B IPL_030_1_ RN_IPL_030_1_ IPL_030_0_ RN_IPL_030_0_ IPL_030_2_ - RN_IPL_030_2_ CLK_EXP RESET SM_AMIGA_2_ SM_AMIGA_1_ -GROUP MACH_SEG_C inst_VPA_SYNC inst_DTACK_SYNC SM_AMIGA_3_ inst_CLK_OUT_PRE - CLK_CNT_N_0_ AVEC_EXP AMIGA_BUS_ENABLE_LOW -GROUP MACH_SEG_D LDS_000 RN_LDS_000 AMIGA_BUS_ENABLE RN_AMIGA_BUS_ENABLE - UDS_000 RN_UDS_000 VMA RN_VMA BG_000 RN_BG_000 AS_000 RN_AS_000 DTACK - -GROUP MACH_SEG_E inst_CLK_000_D5 inst_CLK_000_D0 inst_CLK_000_D3 CLK_CNT_P_1_ + RN_IPL_030_2_ CLK_EXP RESET inst_VPA_SYNC inst_DTACK_SYNC +GROUP MACH_SEG_C SM_AMIGA_7_ SM_AMIGA_6_ SM_AMIGA_0_ SM_AMIGA_2_ SM_AMIGA_3_ + AVEC_EXP AMIGA_BUS_ENABLE_LOW +GROUP MACH_SEG_D LDS_000 RN_LDS_000 UDS_000 RN_UDS_000 AMIGA_BUS_ENABLE + RN_AMIGA_BUS_ENABLE VMA RN_VMA BG_000 RN_BG_000 AS_000 RN_AS_000 + DTACK +GROUP MACH_SEG_E inst_VPA_D inst_CLK_000_D4 inst_CLK_000_D2 inst_CLK_000_D1 CIIN AMIGA_BUS_DATA_DIR BERR -GROUP MACH_SEG_F inst_AS_030_000_SYNC SM_AMIGA_7_ SM_AMIGA_6_ SM_AMIGA_0_ - inst_CLK_000_D4 inst_BGACK_030_INT_D inst_CLK_000_D1 -GROUP MACH_SEG_G A0 RN_A0 SIZE_0_ RN_SIZE_0_ E RN_E CLK_DIV_OUT cpu_est_1_ - cpu_est_2_ CLK_CNT_P_0_ +GROUP MACH_SEG_F inst_AS_030_000_SYNC SM_AMIGA_1_ inst_CLK_OUT_PRE CLK_CNT_P_0_ + inst_CLK_000_D6 inst_BGACK_030_INT_D +GROUP MACH_SEG_G A0 RN_A0 SIZE_0_ RN_SIZE_0_ E RN_E CLK_DIV_OUT SM_AMIGA_5_ + inst_CLK_000_D5 inst_CLK_000_D3 GROUP MACH_SEG_H FPU_CS RN_FPU_CS SIZE_1_ RN_SIZE_1_ AS_030 RN_AS_030 DSACK_1_ - RN_DSACK_1_ BGACK_030 RN_BGACK_030 inst_CLK_000_D6 DSACK_0_ \ No newline at end of file + RN_DSACK_1_ BGACK_030 RN_BGACK_030 DSACK_0_ \ No newline at end of file diff --git a/Logic/68030_tk.ipr b/Logic/68030_tk.ipr index 098eec0..aae7ae1 100644 --- a/Logic/68030_tk.ipr +++ b/Logic/68030_tk.ipr @@ -1 +1 @@ -44722<6CO\OH}Y( \ No newline at end of file +2607057)M. \ No newline at end of file diff --git a/Logic/68030_tk.jed b/Logic/68030_tk.jed index 3864be9..d26e462 100644 --- a/Logic/68030_tk.jed +++ b/Logic/68030_tk.jed @@ -10,7 +10,7 @@ AUTHOR: PATTERN: COMPANY: REVISION: -DATE: Sat May 24 21:59:18 2014 +DATE: Sun May 25 20:57:57 2014 ABEL mach447a * @@ -22,7 +22,7 @@ NOTE Handling of Preplacements No Change * NOTE Use placement data from 68030_tk.vct * NOTE Global clocks routable as PT clocks? N * NOTE 22V10/MACH1XX/2XX S/R Compatibility? Y * -NOTE SET/RESET treated as DONT_CARE? N * +NOTE SET/RESET treated as DONT_CARE? Y * NOTE Reduce Unforced Global Clocks? N * NOTE Iterate between partitioning and place/route? Y * NOTE Balanced partitioning? Y * @@ -31,55 +31,54 @@ NOTE Spread Placement? Y * NOTE Run Time Upper Bound in 15 minutes 0 * NOTE Zero Hold Time For Input Registers? N * NOTE Table of pin names and numbers* -NOTE PINS IPL_1_:56 IPL_0_:67 A_31_:4 DSACK_0_:80 FC_0_:57* -NOTE PINS IPL_2_:68 FC_1_:58 nEXP_SPACE:14 BERR:41 BG_030:21* -NOTE PINS BGACK_000:28 CLK_030:64 CLK_000:11 CLK_OSZI:61* -NOTE PINS CLK_DIV_OUT:65 DTACK:30 AVEC:92 AVEC_EXP:22 VPA:36* -NOTE PINS RST:86 RW:71 AMIGA_BUS_DATA_DIR:48 AMIGA_BUS_ENABLE_LOW:20* -NOTE PINS CIIN:47 A_30_:5 A_29_:6 A_28_:15 A_27_:16 A_26_:17* -NOTE PINS A_25_:18 A_24_:19 A_23_:84 A_22_:85 A_21_:94 A_20_:93* -NOTE PINS A_19_:97 A_18_:95 A_17_:59 A_16_:96 IPL_030_1_:7* -NOTE PINS IPL_030_0_:8 SIZE_1_:79 IPL_030_2_:9 DSACK_1_:81* -NOTE PINS AS_030:82 AS_000:33 DS_030:98 UDS_000:32 LDS_000:31* -NOTE PINS A0:69 BG_000:29 BGACK_030:83 CLK_EXP:10 FPU_CS:78* -NOTE PINS E:66 VMA:35 RESET:3 AMIGA_BUS_ENABLE:34 SIZE_0_:70* +NOTE PINS A_31_:4 IPL_2_:68 FC_1_:58 A_30_:5 A_29_:6 A_28_:15* +NOTE PINS A_27_:16 A_26_:17 nEXP_SPACE:14 A_25_:18 BERR:41* +NOTE PINS A_24_:19 BG_030:21 A_23_:84 A_22_:85 A_21_:94 BGACK_000:28* +NOTE PINS A_20_:93 CLK_030:64 A_19_:97 CLK_000:11 A_18_:95* +NOTE PINS CLK_OSZI:61 A_17_:59 CLK_DIV_OUT:65 A_16_:96 DTACK:30* +NOTE PINS IPL_1_:56 AVEC:92 IPL_0_:67 AVEC_EXP:22 DSACK_0_:80* +NOTE PINS FC_0_:57 VPA:36 RST:86 RW:71 AMIGA_BUS_DATA_DIR:48* +NOTE PINS AMIGA_BUS_ENABLE_LOW:20 CIIN:47 SIZE_1_:79 IPL_030_2_:9* +NOTE PINS DSACK_1_:81 AS_030:82 SIZE_0_:70 AS_000:33 DS_030:98* +NOTE PINS UDS_000:32 LDS_000:31 A0:69 BG_000:29 BGACK_030:83* +NOTE PINS CLK_EXP:10 IPL_030_1_:7 FPU_CS:78 IPL_030_0_:8* +NOTE PINS E:66 VMA:35 RESET:3 AMIGA_BUS_ENABLE:34 * NOTE Table of node names and numbers* -NOTE NODES RN_DTACK:173 RN_IPL_030_1_:143 RN_IPL_030_0_:137 * -NOTE NODES RN_SIZE_1_:269 RN_IPL_030_2_:131 RN_DSACK_1_:287 * -NOTE NODES RN_AS_030:281 RN_AS_000:179 RN_DS_030:101 RN_UDS_000:191 * -NOTE NODES RN_LDS_000:185 RN_A0:257 RN_BG_000:193 RN_BGACK_030:275 * -NOTE NODES RN_FPU_CS:271 RN_E:251 RN_VMA:175 RN_AMIGA_BUS_ENABLE:181 * -NOTE NODES RN_SIZE_0_:245 inst_AS_030_000_SYNC:229 inst_BGACK_030_INT_D:227 * -NOTE NODES inst_DTACK_SYNC:163 inst_VPA_SYNC:157 inst_CLK_000_D0:209 * -NOTE NODES inst_CLK_000_D1:221 inst_CLK_000_D2:109 inst_CLK_000_D6:277 * -NOTE NODES SM_AMIGA_5_:103 SM_AMIGA_6_:233 inst_CLK_000_D3:211 * -NOTE NODES inst_CLK_000_D5:199 SM_AMIGA_3_:161 SM_AMIGA_0_:223 * -NOTE NODES SM_AMIGA_1_:133 CLK_CNT_N_0_:151 CLK_CNT_N_1_:115 * -NOTE NODES CLK_CNT_P_0_:253 CLK_CNT_P_1_:205 inst_CLK_000_D4:235 * -NOTE NODES SM_AMIGA_7_:239 SM_AMIGA_4_:119 inst_CLK_OUT_PRE:155 * -NOTE NODES SM_AMIGA_2_:139 cpu_est_0_:113 cpu_est_1_:263 * -NOTE NODES cpu_est_2_:259 * +NOTE NODES RN_DTACK:173 RN_SIZE_1_:269 RN_IPL_030_2_:131 * +NOTE NODES RN_DSACK_1_:287 RN_AS_030:281 RN_SIZE_0_:245 * +NOTE NODES RN_AS_000:179 RN_DS_030:101 RN_UDS_000:191 RN_LDS_000:185 * +NOTE NODES RN_A0:257 RN_BG_000:193 RN_BGACK_030:275 RN_IPL_030_1_:143 * +NOTE NODES RN_FPU_CS:271 RN_IPL_030_0_:137 RN_E:251 RN_VMA:175 * +NOTE NODES RN_AMIGA_BUS_ENABLE:181 inst_AS_030_000_SYNC:223 * +NOTE NODES inst_DTACK_SYNC:139 inst_VPA_SYNC:133 inst_VPA_D:205 * +NOTE NODES inst_CLK_000_D0:113 inst_CLK_000_D1:209 inst_CLK_000_D2:199 * +NOTE NODES inst_CLK_000_D6:239 inst_CLK_OUT_PRE:233 inst_BGACK_030_INT_D:227 * +NOTE NODES CLK_CNT_P_0_:229 SM_AMIGA_5_:263 SM_AMIGA_7_:161 * +NOTE NODES SM_AMIGA_1_:221 SM_AMIGA_0_:163 SM_AMIGA_6_:155 * +NOTE NODES inst_CLK_000_D3:259 inst_CLK_000_D5:253 SM_AMIGA_3_:157 * +NOTE NODES inst_CLK_000_D4:211 SM_AMIGA_4_:109 SM_AMIGA_2_:151 * +NOTE NODES cpu_est_0_:103 cpu_est_1_:119 cpu_est_2_:115 * NOTE BLOCK 0 * L000000 - 111111111011111111111111111111111111111111111111111111111111111111 + 111111011011111011111111111111111111111111111111111111111111111111 111111111101111110111111111111111111111111111111111111111111111111 - 111110111111111111111111111111111111111111111111111111111111111111 - 111111111111111111111011111111111111111111111111111111111111111111 - 110111111111111111111111111111111111111111111111111011111111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111111111111010111111111111111111111111111111111111111111 + 111111111111111111111111111111111111111111111111111111111111111111 111111111111111111111111111111111111111111111111011111111111111111 - 111111101111111111111111111111111011011111111111111111011111111111 - 111111111111111111111111011111111111111110111101111111111111111111 + 111101111111111111111111111011111011111111111111111111011111011111 + 111111111111111111111111011111111111011110111101111111111111111111 101111111111111111011111111111011111111111111111111111111111111111* L000594 000000000000000000000000000000000000000000000000000000000000000000* L000660 111111111111111111110111111111101111111101111111111111111111111111* L000726 111111111011111101111111101111111111111110111110111111111111111111* -L000792 111111101011111111111111101111111111111110111110111111111111111111* +L000792 111111111011111111111111101011111111111110111110111111111111111111* L000858 111111111011111101111111111111111111111110111110111111101111111111* -L000924 111111101011111111111111111111111111111110111110111111101111111111* -L000990 111111111111111111011111111111110111111111111111111111111111111111* -L001056 111101111111111111111111111111110111111111111111111111111111111111* -L001122 000000000000000000000000000000000000000000000000000000000000000000* +L000924 111111111011111111111111111011111111111110111110111111101111111111* +L000990 111111111111111111011111111111111111111111111111111111111111101111* +L001056 111111111111111111011111111111110111111111111111111111111111111111* +L001122 111111111111111111101111111111111011111111111111111111111111011111* L001188 000000000000000000000000000000000000000000000000000000000000000000* L001254 000000000000000000000000000000000000000000000000000000000000000000* L001320 @@ -101,11 +100,11 @@ L002178 111111111111111111111111111111111111111111111111111111111111111111* L002244 111111111111111111111111111111111111111111111111111111111111111111* L002310 111111111111111111111111111111111111111111111111111111111111111111* L002376 111111111111111111111111111111111111111111111111111111111111111111* -L002442 111111111111111111111111111111111111111111111111110111111111111111* -L002508 111111111111111111111111111111111111111111111111111111111111111111* -L002574 111111111111111111111111111111111111111111111111111111111111111111* -L002640 111111111111111111111111111111111111111111111111111111111111111111* -L002706 111111111111111111111111111111111111111111111111111111111111111111* +L002442 111111111111110111111111111111111111111101111111111111111111101111* +L002508 111111111111111111111111111111111111011110111111111111111111111111* +L002574 111111111111111111111111111111111111011111111111111111111111101111* +L002640 000000000000000000000000000000000000000000000000000000000000000000* +L002706 000000000000000000000000000000000000000000000000000000000000000000* L002772 000000000000000000000000000000000000000000000000000000000000000000* L002838 111111111111111111111111111111111111111111111111111111111111111111* @@ -120,16 +119,16 @@ L003366 111111111111111111111111111111111111111111111111111111111111111111* L003432 111111111111111111111111111111111111111111111111111111111111111111* L003498 000000000000000000000000000000000000000000000000000000000000000000* -L003564 111111111111111111111111111111111011011111111111111111111111111111* -L003630 111111111111111111111111111111111111011111111111110111111111111111* -L003696 111111111111111111111111111111110111101111111111111011111111111111* -L003762 000000000000000000000000000000000000000000000000000000000000000000* -L003828 000000000000000000000000000000000000000000000000000000000000000000* -L003894 110111111111111111111111111111111111111111111111111111111111111111* -L003960 111111111111111111111111111111111111111111111111111111111111111111* -L004026 111111111111111111111111111111111111111111111111111111111111111111* -L004092 111111111111111111111111111111111111111111111111111111111111111111* -L004158 111111111111111111111111111111111111111111111111111111111111111111* +L003564 111111011111111111111111111111111111111111111111111111111111111111* +L003630 111111111111111111111111111111111111111111111111111111111111111111* +L003696 111111111111111111111111111111111111111111111111111111111111111111* +L003762 111111111111111111111111111111111111111111111111111111111111111111* +L003828 111111111111111111111111111111111111111111111111111111111111111111* +L003894 111101111111111111111111111111111111111111111111111111111111111111* +L003960 111110111111111111011101111111111011111111111111111111111111011111* +L004026 111110111111111111101111111111111011111111111111101111111111011111* +L004092 111101111111111111011110111111111011111111111111101111111111011111* +L004158 000000000000000000000000000000000000000000000000000000000000000000* L004224 000000000000000000000000000000000000000000000000000000000000000000* L004290 111111111111111111111111111111111111111111111111111111111111111111* @@ -144,10 +143,10 @@ L004818 111111111111111111111111111111111111111111111111111111111111111111* L004884 111111111111111111111111111111111111111111111111111111111111111111* L004950 000000000000000000000000000000000000000000000000000000000000000000* -L005016 111111111111111111011111111111111011111111111111111111111111111111* -L005082 111111111111111111111111111111111011111111111111011111111111111111* -L005148 000000000000000000000000000000000000000000000000000000000000000000* -L005214 000000000000000000000000000000000000000000000000000000000000000000* +L005016 111110111111111111111110111111111011111111111111101111111111011111* +L005082 111101111111111111111101111111111011111111111111101111111111011111* +L005148 111110111111111111011101111111111011111111111111111111111111011111* +L005214 111101111111111111011110111111111011111111111111111111111111011111* L005280 000000000000000000000000000000000000000000000000000000000000000000* L005346 111111111111111111111111111111111111111111111111111111111111111111* L005412 111111111111111111111111111111111111111111111111111111111111111111* @@ -155,7 +154,7 @@ L005478 111111111111111111111111111111111111111111111111111111111111111111* L005544 111111111111111111111111111111111111111111111111111111111111111111* L005610 111111111111111111111111111111111111111111111111111111111111111111* L005676 - 111111111110111111111111111111111111111110111111111111111111111111* + 111111111110111111111111111011111111111110111111111111111111111111* L005742 111111111111111111111111111111111111111111111111111111111111111111* L005808 111111111111111111111111111111111111111111111111111111111111111111* L005874 111111111111111111111111111111111111111111111111111111111111111111* @@ -172,34 +171,34 @@ L006402 L006534 0010* L006538 11100110011000* L006552 10100100011110* -L006566 11010011110100* -L006580 11111111111111* -L006594 00111011111000* -L006608 00000110010011* -L006622 11011011110000* -L006636 11110011110010* -L006650 10100100010001* -L006664 00001110010011* -L006678 11011111110000* -L006692 11110011110010* -L006706 10100100010001* -L006720 11001011110011* -L006734 11110111110100* -L006748 11111111110011* +L006566 11011111110100* +L006580 11111011111111* +L006594 00110011111000* +L006608 10100100010010* +L006622 11010011110001* +L006636 11111111110011* +L006650 00110110010000* +L006664 00100100010011* +L006678 11011011110001* +L006692 11111111110011* +L006706 10100101010000* +L006720 11000011110011* +L006734 11111011110100* +L006748 11111111110010* NOTE BLOCK 1 * L006762 110111111111111111111111111111111111111111111111111111111111111111 - 111111111111011111111111110111111111111111111111111111111111111111 - 111111101111111101111111111111110111111111111011111111110111111111 - 101111111111110111111111111101111111111111111111111111011111111111 - 111111111111111111111111111111111111111111111111111011111111111111 + 111111111111011111111111111111111111111111111111111111111111111111 + 111111101011111101111111111111111111111110111111111111110111111111 + 101111111111110111111110111111111111111111111111111111011111111111 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111111111111111111111111111111111111111111111101111 - 111111111011111111111111111111111111111111111111111111111111111111 - 111111111110111111111111111111111111111111101111111111111111111111* + 111111111111111111111111111111011111111111111111111111111111111111 + 111111111111111111011111111111111011011111111111111111111111111111 + 111111111111111111111111111110111111111011111110111111111111111111 + 111101111111111111111111111111111111111111101111111111111111111111* L007356 111111111111111111111111111111111111111111111111111111111111111111* -L007422 111111111111111111111111111101111111111111111111111111111111111111* +L007422 111111111111111111111111111111111111111101111111111111111111111111* L007488 000000000000000000000000000000000000000000000000000000000000000000* L007554 000000000000000000000000000000000000000000000000000000000000000000* L007620 000000000000000000000000000000000000000000000000000000000000000000* @@ -223,14 +222,14 @@ L008676 111111111111111111111111111111111111111111111111111111111111111111* L008742 111111111111111111111111111111111111111111111111111111111111111111* L008808 111111111111111111111111111111111111111111111111111111111111111111* -L008874 111111111111111111111111111111111111111111110111111011111111011111* -L008940 111111111111111111111111111111111111111111111111111111011111101111* -L009006 111111111111111111111111111111111111111111111111110111011111111111* +L008874 111111110111111111111111111111111011011111111111111111111111111111* +L008940 111111111111111111111111111111111111101111111111111111011111111111* +L009006 111111111111111111111111111111110111111111111111111111011111111111* L009072 000000000000000000000000000000000000000000000000000000000000000000* L009138 000000000000000000000000000000000000000000000000000000000000000000* -L009204 111111111001111111111111111111111111111111111111111111110111111111* -L009270 111111111111111111111111111111111111111111111111111111110111011111* -L009336 111111111111011111111111111111111111111111111111111111111111011111* +L009204 111110111111110111111101111110101111011111111101111111111111111111* +L009270 111111111111111111111111111111111111111011111111111111111011111111* +L009336 000000000000000000000000000000000000000000000000000000000000000000* L009402 000000000000000000000000000000000000000000000000000000000000000000* L009468 000000000000000000000000000000000000000000000000000000000000000000* L009534 @@ -247,14 +246,14 @@ L010128 111111111111111111111111111111111111111111111111111111111111111111* L010194 111111111111111111111111111111111111111111111111111111111111111111* L010260 000000000000000000000000000000000000000000000000000000000000000000* -L010326 011111111111111111111111111111111111111111111111111011111111011111* -L010392 111111111111111101111111111111111111111111111111111111111111101111* -L010458 111111111111111101111111111111111111111111111111110111111111111111* +L010326 011111111111111111111111111111111011011111111111111111111111111111* +L010392 111111111111111101111111111111111111101111111111111111111111111111* +L010458 111111111111111101111111111111110111111111111111111111111111111111* L010524 000000000000000000000000000000000000000000000000000000000000000000* L010590 000000000000000000000000000000000000000000000000000000000000000000* -L010656 111111111111111111111111111011110111111111111111111111111111101111* -L010722 111111111111111011111111111111110111111111111111111111111111101111* -L010788 111111111111011111111111111111111111111111111111111111111111101111* +L010656 111111111111101111111111111111111111111011111111111111111111111111* +L010722 111111111111110111101111111101111111011111111101111111111111111111* +L010788 000000000000000000000000000000000000000000000000000000000000000000* L010854 000000000000000000000000000000000000000000000000000000000000000000* L010920 000000000000000000000000000000000000000000000000000000000000000000* L010986 @@ -271,9 +270,9 @@ L011580 111111111111111111111111111111111111111111111111111111111111111111* L011646 111111111111111111111111111111111111111111111111111111111111111111* L011712 000000000000000000000000000000000000000000000000000000000000000000* -L011778 111111011111111111111111111111111111111111111111111011111111011111* -L011844 110111111111111111111111111111111111111111111111111111111111101111* -L011910 110111111111111111111111111111111111111111111111110111111111111111* +L011778 111111011111111111111111111111111011011111111111111111111111111111* +L011844 110111111111111111111111111111111111101111111111111111111111111111* +L011910 110111111111111111111111111111110111111111111111111111111111111111* L011976 000000000000000000000000000000000000000000000000000000000000000000* L012042 000000000000000000000000000000000000000000000000000000000000000000* L012108 111111111111111111111111111111111111111111111111111111111111111111* @@ -302,11 +301,11 @@ L013314 00010100011110* L013328 11011111110100* L013342 11111011111111* L013356 10100110010010* -L013370 10100100011110* +L013370 11100110011110* L013384 11011111110111* L013398 11111011111111* L013412 10100110011000* -L013426 10100100010010* +L013426 11100110010010* L013440 11010011110000* L013454 11111011110011* L013468 10100110011000* @@ -315,15 +314,15 @@ L013496 11110011111101* L013510 11111011111111* NOTE BLOCK 2 * L013524 - 111111111111111111111111111110111111111111111111111111111111111111 - 111111111111111111111111110111111111111111111111111111111111111111 - 111111111111111111111111111111110111111111111111111111111111111111 - 111111111111110111111110111111111111111111111011111111111111111111 - 110111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111011111111111111111111111111111111111111111111111 - 111101111111111110111111111111111111111111111101111111111111111111 - 111111101111111111111111111111111111111011111111111111111111111111 - 101111111111111111110111101111111101111111111111111111111111111111* + 111111111111111111111111111111111110111111111111111111111111111111 + 111111011101011111111011111111111111111111111111111111111111111111 + 111111111111111111111111111111110111111111111111111111110111111111 + 111111111111110111111111111111111111111111111011111111111101111111 + 110111111111111111111111111111101111111111111111111011111111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111111111111111111111111111011111111111111111111111111111 + 111101111111111111111111111101111111111110111111111111111111111111 + 101111111111111111111111101011111111111111111111111111111111111111* L014118 000000000000000000000000000000000000000000000000000000000000000000* L014184 000000000000000000000000000000000000000000000000000000000000000000* @@ -331,10 +330,10 @@ L014250 000000000000000000000000000000000000000000000000000000000000000000* L014316 000000000000000000000000000000000000000000000000000000000000000000* L014382 000000000000000000000000000000000000000000000000000000000000000000* L014448 000000000000000000000000000000000000000000000000000000000000000000* -L014514 110101111111111111111111111111111111111111111111111111111111111111* -L014580 111010111111111111111111111111111111111111111111111111111111111111* -L014646 000000000000000000000000000000000000000000000000000000000000000000* -L014712 000000000000000000000000000000000000000000000000000000000000000000* +L014514 111111111111100111111111111111111111101101111111111111111111111111* +L014580 111111111111110111111111111111111111101101111111111111111011111111* +L014646 110111111111111111111111111111111111111110111111111111111111111111* +L014712 110111111111111111111111111111111111101111111111111111111111111111* L014778 000000000000000000000000000000000000000000000000000000000000000000* L014844 000000000000000000000000000000000000000000000000000000000000000000* @@ -350,15 +349,15 @@ L015438 111111111111111111111111111111111111111111111111111111111111111111* L015504 111111111111111111111111111111111111111111111111111111111111111111* L015570 000000000000000000000000000000000000000000000000000000000000000000* -L015636 111001011111111111111111111111111111111111111011111111111111111111* -L015702 110110011111111111111111111111111111111111111011111111111111111111* -L015768 111001101111111111111111111111111111111111110111111111111111111111* -L015834 110110101111111111111111111111111111111111110111111111111111111111* +L015636 111111111111111111111111111111111111111110111111111111111101111111* +L015702 111111111101111111111111111111111111101111111111111111111101111111* +L015768 111111111111111111110111111011100111111101111111111111111111111111* +L015834 000000000000000000000000000000000000000000000000000000000000000000* L015900 000000000000000000000000000000000000000000000000000000000000000000* -L015966 111111111111111101111001111110110110111111111111111111111111111111* -L016032 111111111111111011111111111111111111111011111111111111111111111111* -L016098 000000000000000000000000000000000000000000000000000000000000000000* -L016164 000000000000000000000000000000000000000000000000000000000000000000* +L015966 111111111111110111111111111111111111111110111111111111111111111111* +L016032 111111111111010111111111111111111111111111111111111111110111111111* +L016098 111111111111110111111111111111111111011111111111111111111111111111* +L016164 111101111111111111111111111111111111011101111111111111111111111111* L016230 000000000000000000000000000000000000000000000000000000000000000000* L016296 000000000000000000000000000000000000000000000000000000000000000000* @@ -374,23 +373,23 @@ L016890 111111111111111111111111111111111111111111111111111111111111111111* L016956 111111111111111111111111111111111111111111111111111111111111111111* L017022 000000000000000000000000000000000000000000000000000000000000000000* -L017088 111111111111110111111111110111110111111111111111111111111111111111* -L017154 111111111111111101111111111111110111111111111111111111111111111111* -L017220 111111111111111101011111111111111111111111111111111111111111111111* -L017286 000000000000000000000000000000000000000000000000000000000000000000* -L017352 000000000000000000000000000000000000000000000000000000000000000000* -L017418 111111111111111111111111111011111111111011111111111111111111111111* -L017484 111111111111111101110111111111110111111111111110111111111111111111* +L017088 111111111111111111111111111111110111111110111111111111111111111111* +L017154 111111111111111111111111111111010111111111111111111111111111111111* +L017220 111111111111111111111111110111110111111111111111111111111111111111* +L017286 111111111110111111111111111111111111101101111111111111111101111111* +L017352 111111011111111111111111111101111111011101111111111111111111111111* +L017418 111111011111111111111111111101111111011101111111111111111111111111* +L017484 111111111111111111111011111111110111111111111111111111111111111111* L017550 000000000000000000000000000000000000000000000000000000000000000000* L017616 000000000000000000000000000000000000000000000000000000000000000000* L017682 000000000000000000000000000000000000000000000000000000000000000000* L017748 111111111111111111111111111111111111111111111111111111111111111111* -L017814 111111111111111111111111111111111111111111111111111111111111111111* -L017880 111111111111111111111111111111111111111111111111111111111111111111* -L017946 111111111111111111111111111111111111111111111111111111111111111111* -L018012 111111111111111111111111111111111111111111111111111111111111111111* -L018078 111111111111111111111111111111111111111111111111111111111111111111* +L017814 111111011111111111111111111111111111111111111111111111111111111111* +L017880 111111101111111111111111111111111111101101111011110111111111111111* +L017946 111111101111111111111111111111111101101101111111110111111111111111* +L018012 000000000000000000000000000000000000000000000000000000000000000000* +L018078 000000000000000000000000000000000000000000000000000000000000000000* L018144 111111111111111111111111111111111111111111111111111111111111111111* L018210 111111111111111111111111111111111111111111111111111111111111111111* L018276 111111111111111111111111111111111111111111111111111111111111111111* @@ -421,36 +420,36 @@ L019728 111111111111111111111111111111111111111111111111111111111111111111* L019794 111111111111111111111111111111111111111111111111111111111111111111* L019860 111111111111111111111111111111111111111111111111111111111111111111* L019926 - 000000000000000000000000000000000000000000000000000000000000000000 - 101111111111111111111111111111111111111111111111111111111111111111* + 101111111111111111111111111111111111111111111111111111111111111111 + 000000000000000000000000000000000000000000000000000000000000000000* L020058 0010* L020062 00100011111000* -L020076 10101100010011* -L020090 11011011110000* -L020104 11110011110010* -L020118 10100100010001* -L020132 11100110010011* -L020146 11011011110000* -L020160 11110011110011* -L020174 10100100010001* -L020188 11100110010011* -L020202 11010111110100* -L020216 11111111111110* -L020230 00110011111001* +L020076 10100110010011* +L020090 11010011110001* +L020104 11111111110011* +L020118 10100110010000* +L020132 10100110010011* +L020146 11010011110000* +L020160 11111111110010* +L020174 10100100010000* +L020188 00110110010011* +L020202 11111011110101* +L020216 11111111111111* +L020230 00110011111000* L020244 11001011110011* L020258 11110111110100* -L020272 11111111111111* +L020272 11111111111110* NOTE BLOCK 3 * L020286 - 111111011111111011111111111111111111111111111111111111111111111011 - 111111110111111111111111111110011111111111111111111011101111111111 - 101111111111111111111111111111111111111110111111111111111111111111 - 111110111111111111111111111111111111111111111111111111111110111111 - 111111111101111111111111111111111111111111111111111111111111101111 - 110111111111101111011101111111111111111111111111111111111111111111 - 111111111111111110111111111111110111011111111111111111111111111110 - 111111111111111111110111111111111111111011111110011111111111111111 - 111111111111111111111111010111111101111111101111111111111111111111* + 111111111111111111111111111111111111111111111110011111111111111111 + 111111110101111110111111110111111110111111111111111111111111111111 + 101111111111111111111111111111111111111111111111111111111101111111 + 111111111111011111111011111111111111111111111111111111111111111111 + 111111111111111111111111011111111111111111111111111111111111111011 + 110111111111111111111101111111011111111111111111111111101111111111 + 111111111111111111111111111111110111111111111111111011111111011110 + 111111101111110111111111111101111111011010111111111111111111111111 + 111101111111111111011111111111111111111111101111111111111111111111* L020880 111111111111111111111111111111111111111111111111111111111111111111* L020946 111111111111111111111111111111111111111111111111111111111111111101* @@ -458,10 +457,10 @@ L021012 000000000000000000000000000000000000000000000000000000000000000000* L021078 000000000000000000000000000000000000000000000000000000000000000000* L021144 000000000000000000000000000000000000000000000000000000000000000000* L021210 000000000000000000000000000000000000000000000000000000000000000000* -L021276 111111111111111010111111111011111101011111111111111111111111111111* -L021342 111111111111111111111111111111111101111111111111111111111111111111* -L021408 111110111111110101110111111111111110101111111111111111011111111111* -L021474 000000000000000000000000000000000000000000000000000000000000000000* +L021276 111110111111111111111111111111111111111110111111111111111111111111* +L021342 111110111111111111111111111111111111111111111111111111111110111111* +L021408 111111101111111111011111111111101111111110111111111111111111101111* +L021474 111111101111111111011111111111101111111111111111111111111110101111* L021540 000000000000000000000000000000000000000000000000000000000000000000* L021606 111111111111111111111111111111111111111111111111111111111111111111* @@ -476,21 +475,21 @@ L022134 111111111111111111111111111111111111111111111111111111111111111111* L022200 111111111111111111111111111111111111111111111111111111111111111111* L022266 111111111111111111111111111111111111111111111111111111111111111111* L022332 - 111111111111111111111111111111111111111111111101111111111111111111* -L022398 111111111111111111110111101111111111111111111111111111111111111111* -L022464 111111111111111111111111101111111111110111111111111111111111111111* + 111111111111111111111111111111111111111101111111111111111111111111* +L022398 111111111111111111111111111111111111111101111101111111111111111111* +L022464 111111111111111111111111111110111111111011111111111111111111111111* L022530 000000000000000000000000000000000000000000000000000000000000000000* L022596 000000000000000000000000000000000000000000000000000000000000000000* L022662 000000000000000000000000000000000000000000000000000000000000000000* -L022728 111111111111111111111111111111111111111111111101111111111110111111* -L022794 111111111111111101110111111111111111111111111101111111111111011111* -L022860 111111111111111101110111111111111111111111111111111111111110011111* -L022926 111111111111111111111111111111101111111111111101011111111111111111* -L022992 111111111111111111111111111111101111111111111111011111111110111111* +L022728 111111111111111111110111111111111111111110111111111111111111111111* +L022794 111111111101011111111111111011111111111101111111111111111111111011* +L022860 111111111111111011111111111111111111111110111111111111111111111111* +L022926 111111111111111011110111111011111111111111111111111111111111111011* +L022992 111111111101011111111111111111111111111001111111111111111111111111* L023058 - 111111111111111111111111111111111111111111111101111111111111111111* -L023124 111111111111111111111111111111111111111110111101011111111111111111* -L023190 111111111111111111111111111111111111111110111111011111111110111111* + 111111111111111111111111111111111111111101111111111111111111111111* +L023124 111111111111111011110111111111111111111011111111111111111111111111* +L023190 000000000000000000000000000000000000000000000000000000000000000000* L023256 000000000000000000000000000000000000000000000000000000000000000000* L023322 000000000000000000000000000000000000000000000000000000000000000000* L023388 000000000000000000000000000000000000000000000000000000000000000000* @@ -500,24 +499,24 @@ L023586 111111111111111111111111111111111111111111111111111111111111111111* L023652 111111111111111111111111111111111111111111111111111111111111111111* L023718 111111111111111111111111111111111111111111111111111111111111111111* L023784 - 111111111111111111111111111111111111111111111101111111111111111111* + 111111111111111111111111111111111111111101111111111111111111111111* L023850 111111111111111111111111111111111111111111111111111111111111111111* L023916 111111111111111111111111111111111111111111111111111111111111111111* L023982 111111111111111111111111111111111111111111111111111111111111111111* L024048 111111111111111111111111111111111111111111111111111111111111111111* L024114 111111111111111111111111111111111111111111111111111111111111111111* -L024180 111111111111111111111111101111110111111111111111110111111111111111* -L024246 111111111111111111101111111111110111111111111111111011111111111111* -L024312 111111111111111111111111101111111111110111111111110111111111111111* -L024378 111111111111111111101111111111111111110111111111111011111111111111* -L024444 111111111101111111111111111111110111111111111111111111111111111111* +L024180 111111111111111111111111111111110111111110111111111111111111111111* +L024246 111111111111111101111111111111110111111111111110111111111111111111* +L024312 111111111111111110111111111111110111101111111111111111111111111111* +L024378 111111111111111111111111111111111111110110111111111111111111111111* +L024444 111111111111111101111111111111111111110111111110111111111111111111* L024510 - 111111111111111111111111111111101111111111111110111111111111111111* -L024576 111111111101111111111111111111111111110111111111111111111111111111* -L024642 101111111110101111111111011101111111111111111111110111111111111111* -L024708 101111111110101111011111111101111111111111111111111011111111111111* -L024774 000000000000000000000000000000000000000000000000000000000000000000* -L024840 000000000000000000000000000000000000000000000000000000000000000000* + 111111111110111111111111111111111111111110111111111011111111111111* +L024576 111111111111111110111111111111111111100111111111111111111111111111* +L024642 111111111111111111111111011111110111111111111111111111111111111111* +L024708 111111111111111111111111011111111111110111111111111111111111111111* +L024774 101111111111111101111111101111111101111101111101111111101111111111* +L024840 101111111111111110111111101111111101011101111111111111101111111111* L024906 111111111111111111111111111111111111111111111111111111111111111111* L024972 111111111111111111111111111111111111111111111111111111111111111111* L025038 111111111111111111111111111111111111111111111111111111111111111111* @@ -525,23 +524,23 @@ L025104 111111111111111111111111111111111111111111111111111111111111111111* L025170 111111111111111111111111111111111111111111111111111111111111111111* L025236 111111111111111111111111111111111111111111111111111111111111111111* -L025302 111111111111111111111110101111111111111011111111110111111111111111* -L025368 111111111111111111101110111111111111111011111111111011111111111111* -L025434 111111111101111111111110111111111111111011111111111111111111111111* -L025500 101111111110111111111111011111111111111111111111110111111111111111* -L025566 101111111110111111011111111111111111111111111111111011111111111111* +L025302 111111111111111111111110111111111111111010111111111111111111111111* +L025368 111111111111111101111110111111111111111011111110111111111111111111* +L025434 111111111111111110111110111111111111101011111111111111111111111111* +L025500 111111111111111111111110011111111111111011111111111111111111111111* +L025566 101111111111111101111111101111111111111101111101111111111111111111* L025632 111011111011111111111111111111111111111111111111111111111111111111* -L025698 111111011011111111111111111111011111110111111111111111111111110111* +L025698 111111111001111111111111111111111111110111111111011111111101111111* L025764 000000000000000000000000000000000000000000000000000000000000000000* L025830 000000000000000000000000000000000000000000000000000000000000000000* L025896 000000000000000000000000000000000000000000000000000000000000000000* L025962 000000000000000000000000000000000000000000000000000000000000000000* -L026028 111111111111111111111111111111111111111111111111111111111111111111* -L026094 111111111111111111111111111111111111111111111111111111111111111111* -L026160 111111111111111111111111111111111111111111111111111111111111111111* -L026226 111111111111111111111111111111111111111111111111111111111111111111* -L026292 111111111111111111111111111111111111111111111111111111111111111111* +L026028 101111111111111110111111101111111111011101111111111111111111111111* +L026094 000000000000000000000000000000000000000000000000000000000000000000* +L026160 000000000000000000000000000000000000000000000000000000000000000000* +L026226 000000000000000000000000000000000000000000000000000000000000000000* +L026292 000000000000000000000000000000000000000000000000000000000000000000* L026358 111111111111111111111111111111111111111111111111111111111111111111* L026424 111111111111111111111111111111111111111111111111111111111111111111* L026490 111111111111111111111111111111111111111111111111111111111111111111* @@ -552,11 +551,11 @@ L026688 111111111111111111111111111111111111111111101111111111111111111111* L026820 0010* L026824 00100011111000* -L026838 00100110011111* +L026838 11100110011111* L026852 11010011111101* L026866 11111111111111* -L026880 10100110010000* -L026894 10100110010011* +L026880 11100110010000* +L026894 11100110010011* L026908 11110011110110* L026922 11111111110010* L026936 10110110010000* @@ -565,27 +564,27 @@ L026964 11001111110111* L026978 11110011110011* L026992 11100110011000* L027006 11100110011111* -L027020 11011011110000* +L027020 11001011110000* L027034 11111111110010* NOTE BLOCK 4 * L027048 - 111111111111111111111111111101111111111111111111111111111111111111 - 110111111111111111011111111111111111101111111111111011111111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 110111111111111111011111111111111111111111011111111011101111111111 111111110101111111111111011111111111111111111111111111111111111111 - 111111011111111111111111111111111101111111111011111111111111111111 + 111111011111111111111111111111111101111111111111111111111111111111 111111111111110111111111111111111111111111111111111111111111111111 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111111111111111111111111111111111111111111111111111 - 111101111111111111111111111111011111111110111111111111111101111111 - 101111111111111110111010111111111111111111111111111111111111111111* + 111111111111111111111111111111111011011111111111111111111111111111 + 111111111111111111111111111111011111111110111111111111111101111111 + 101111111111111110110110111111111111111011111111111111111111111111* L027642 - 111111111111111111111011111111111111111111111111111111111111111111* + 111111111111111111111111111111111111111011111111111111111111111111* L027708 111111111111111111111111111111111111111101111111111011111111111111* -L027774 111111111111111111111111111111111111111110111111110111111111111111* +L027774 111111111111111111111111111111111111111110101111110111111111111111* L027840 000000000000000000000000000000000000000000000000000000000000000000* L027906 000000000000000000000000000000000000000000000000000000000000000000* L027972 000000000000000000000000000000000000000000000000000000000000000000* -L028038 111111111111111111111111111111111111011111111111111111111111111111* +L028038 111111111111111111111111111111110111111111111111111111111111111111* L028104 111111111111111111111111111111111111111111111111111111111111111111* L028170 111111111111111111111111111111111111111111111111111111111111111111* L028236 111111111111111111111111111111111111111111111111111111111111111111* @@ -609,7 +608,7 @@ L029226 111111111111111111111111111111111111111111111111111111111111111111* L029292 111111111111111111111111111111111111111111111111111111111111111111* L029358 111111111111111111111111111111111111111111111111111111111111111111* L029424 111111111111111111111111111111111111111111111111111111111111111111* -L029490 111111111111111111111111111111111111111111110111111111111111111111* +L029490 111111111111111111110111111111111111111111111111111111111111111111* L029556 111111111111111111111111111111111111111111111111111111111111111111* L029622 111111111111111111111111111111111111111111111111111111111111111111* L029688 111111111111111111111111111111111111111111111111111111111111111111* @@ -628,12 +627,12 @@ L030414 111111111111111111111111111111111111111111111111111111111111111111* L030480 111111111111111111111111111111111111111111111111111111111111111111* L030546 000000000000000000000000000000000000000000000000000000000000000000* -L030612 111111111111111111111111111101111111111111111111111111111111111111* +L030612 111111111111111111111111111111111111011111111111111111111111111111* L030678 111111111111111111111111111111111111111111111111111111111111111111* L030744 111111111111111111111111111111111111111111111111111111111111111111* L030810 111111111111111111111111111111111111111111111111111111111111111111* L030876 111111111111111111111111111111111111111111111111111111111111111111* -L030942 111101111111111111111111111111111111111111111111111111111111111111* +L030942 111111111111111111111111111111111111111111111111111111011111111111* L031008 111111111111111111111111111111111111111111111111111111111111111111* L031074 111111111111111111111111111111111111111111111111111111111111111111* L031140 111111111111111111111111111111111111111111111111111111111111111111* @@ -683,7 +682,7 @@ L033600 00010100011111* L033614 11010011110001* L033628 11111111111111* L033642 00111011111000* -L033656 00000110011111* +L033656 00000100011111* L033670 11011011110000* L033684 11110011111110* L033698 00110100010001* @@ -698,32 +697,32 @@ NOTE BLOCK 5 * L033810 111111111111111111111111111111111111111110111111111111111111111011 111111111101111111111111111111111111111111111111111111111111111111 - 111111111111101111101111111111111111111111111111111111110111111110 - 111011111111111110111111111111111111111111111111111111111111111111 - 111111111111111111111111111111101111111111111111111111111111111111 + 111110111111100111101111111111111111111111111111111111111111111111 + 111011101111111110111111111101111111111111111111111111111111111111 + 111111111111111111111011111111111111111111110111111011111111111111 111111110111111111111111011111111111111111111111111111111111111111 - 111110111111111111111101111111111001111111111111111111111111111111 - 111111111111111111110111111011111111011011111110111111111111111111 - 101111111111111111111111111111111111111111111111111111111110111111* + 111111111111111111111101111111111101011111111111111111111111111111 + 111111111111111111111111111111111111111011111110111111111111111111 + 101111111111111111111111111111111111111111111111111111111111111111* L034404 000000000000000000000000000000000000000000000000000000000000000000* -L034470 111111111111111111111111111111110111111111111111111111111111111111* -L034536 000000000000000000000000000000000000000000000000000000000000000000* -L034602 000000000000000000000000000000000000000000000000000000000000000000* -L034668 000000000000000000000000000000000000000000000000000000000000000000* +L034470 111111111111111111111111111111111111111111111110110111111111111111* +L034536 111111111111111111111111111111111111011111111111110111111111111111* +L034602 111111011111111111111111111111111111111111111111110111111111111011* +L034668 111111111111111111111111111111111111011111110101111111111111111111* L034734 000000000000000000000000000000000000000000000000000000000000000000* -L034800 111111111111111111111111111111011011111111111111111111111111111111* -L034866 111111111111111111111011111111011111111111111111111111111111111111* -L034932 111111111111111111111111110111111011111111111111111111110111111111* -L034998 111111111111111111111111111111111011111111111111111111110110111111* -L035064 000000000000000000000000000000000000000000000000000000000000000000* +L034800 111111011111111111111111111111111111111111111101110111111111111011* +L034866 111111111110111111110111111111111111111111111111111111111111111111* +L034932 111111111111111111110111111111111111111110111111111111111111111111* +L034998 110111110111011101110110101111111110111111111111111111111111111111* +L035064 111111111111111011110111111111111111111111111111111111111111111111* L035130 000000000000000000000000000000000000000000000000000000000000000000* -L035196 111111111111111111111111111111111111111111111111111111111111111111* -L035262 111111111111111111111111111111111111111111111111111111111111111111* -L035328 111111111111111111111111111111111111111111111111111111111111111111* -L035394 111111111111111111111111111111111111111111111111111111111111111111* -L035460 111111111111111111111111111111111111111111111111111111111111111111* +L035196 111111111110111111111111111101111111111111111101111111111111111111* +L035262 111111111111111111111111111111111111110111111111111111111111111111* +L035328 000000000000000000000000000000000000000000000000000000000000000000* +L035394 000000000000000000000000000000000000000000000000000000000000000000* +L035460 000000000000000000000000000000000000000000000000000000000000000000* L035526 111111111111111111111111111111111111111111111111111111111111111111* L035592 111111111111111111111111111111111111111111111111111111111111111111* L035658 111111111111111111111111111111111111111111111111111111111111111111* @@ -736,18 +735,18 @@ L035988 111111111111111111111111111111111111111111111111111111111111111111* L036054 111111111111111111111111111111111111111111111111111111111111111111* L036120 111111111111111111111111111111111111111111111111111111111111111111* L036186 111111111111111111111111111111111111111111111111111111111111111111* -L036252 111111111111111111111111111011111111111111111111111111110101111111* -L036318 111111111110111111011111111111111111111111111111111111111111111111* -L036384 111111111111111111011111111111111111111110111111111111111111111111* -L036450 110111110111011101011110101111111110111111111111111111111111111111* -L036516 111111111110111111111111111111111111111111111111111111111111111101* +L036252 111111111111111111101111111111111111111111111111111111111111111111* +L036318 111111111111111111111111111111111111111111111111111111111111111111* +L036384 111111111111111111111111111111111111111111111111111111111111111111* +L036450 111111111111111111111111111111111111111111111111111111111111111111* +L036516 111111111111111111111111111111111111111111111111111111111111111111* L036582 000000000000000000000000000000000000000000000000000000000000000000* -L036648 111111111111111111011111111111111111111111111111111111111111111011* -L036714 111111111111111111111111111111111111110111111111111111111111111111* -L036780 000000000000000000000000000000000000000000000000000000000000000000* -L036846 000000000000000000000000000000000000000000000000000000000000000000* -L036912 000000000000000000000000000000000000000000000000000000000000000000* +L036648 111111111111111111111111111111111111111111111111111111111111111111* +L036714 111111111111111111111111111111111111111111111111111111111111111111* +L036780 111111111111111111111111111111111111111111111111111111111111111111* +L036846 111111111111111111111111111111111111111111111111111111111111111111* +L036912 111111111111111111111111111111111111111111111111111111111111111111* L036978 111111111111111111111111111111111111111111111111111111111111111111* L037044 111111111111111111111111111111111111111111111111111111111111111111* L037110 111111111111111111111111111111111111111111111111111111111111111111* @@ -760,9 +759,9 @@ L037440 111111111111111111111111111111111111111111111111111111111111111111* L037506 111111111111111111111111111111111111111111111111111111111111111111* L037572 111111111111111111111111111111111111111111111111111111111111111111* L037638 111111111111111111111111111111111111111111111111111111111111111111* -L037704 111101111111111111111111111111111111111111111111111111111111111111* -L037770 111101111111111111101111111111111111101111111111111111111111110111* -L037836 111111111101111111111111111111111011111111111111111111111111111001* +L037704 111110111111111111011111111111111111111111111111111111111111111111* +L037770 111101111111111111101111111111111111111111111111111111111111111111* +L037836 000000000000000000000000000000000000000000000000000000000000000000* L037902 000000000000000000000000000000000000000000000000000000000000000000* L037968 000000000000000000000000000000000000000000000000000000000000000000* L038034 @@ -779,11 +778,11 @@ L038628 111111111111111111111111111111111111111111111111111111111111111111* L038694 111111111111111111111111111111111111111111111111111111111111111111* L038760 000000000000000000000000000000000000000000000000000000000000000000* -L038826 111111111110111111111111111111111011111111111111111111111111111101* -L038892 111111111111111111110111111111010111111111111111111111111111111111* -L038958 111111111111111111011111111111111111111111111111111111111111110111* -L039024 111111111111111111111111111111111111011111111111111111111111110111* -L039090 111110111111111111111111111111111111111111111111111111111111110111* +L038826 111111011111111111111111111111111111111111111111111111111111111111* +L038892 111111111111111111111111111111111111111111111111111111111111111111* +L038958 111111111111111111111111111111111111111111111111111111111111111111* +L039024 111111111111111111111111111111111111111111111111111111111111111111* +L039090 111111111111111111111111111111111111111111111111111111111111111111* L039156 111111111111111111111111111111111111111111111111111111111111111111* L039222 111111111111111111111111111111111111111111111111111111111111111111* L039288 111111111111111111111111111111111111111111111111111111111111111111* @@ -805,41 +804,41 @@ L040212 000000000000000000000000000000000000000000000000000000000000000000 101111111111111111111111111111111111111111111111111111111111111111* L040344 0010* -L040348 00100110011110* -L040362 10100100011110* -L040376 11011111111110* +L040348 10100100011110* +L040362 10100110011110* +L040376 11111111111110* L040390 11111011110011* L040404 00110110011110* -L040418 10100110010010* -L040432 11111111111111* +L040418 00000100010010* +L040432 11011111111111* L040446 11111011110011* L040460 10110100011110* -L040474 00110110010010* -L040488 11010011111110* -L040502 11111011111111* -L040516 10100110011110* -L040530 11001111111110* -L040544 11110011111111* -L040558 11111011111111* +L040474 11110011110010* +L040488 11111011111110* +L040502 11111111111111* +L040516 00110110011110* +L040530 11000011111110* +L040544 11111011111111* +L040558 11111111111111* NOTE BLOCK 6 * L040572 111111111011111011111111111111111111111111111111111111111111111111 - 111111111101111111111111101111111111111111111111111111111111111111 - 111111111111111111111011111111111111111111111111111111111111111111 - 111110111111011111111111111110111111111111111011111111111111111111 - 111111111111111111111111111111111110111111111111111011111111111111 - 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111111111111111111011011111111111011111111111111111 - 111111101111111101111111111111111111111110111101111111111111111111 - 101111111111111111111111111111111111111111111111111111111111111111* + 111111111101111111111111111111111111111111111111111111111111111111 + 111111111111111111111011111111111111111110111111111111111111111111 + 111111111111011111111110111110111111111111111111111111111111111111 + 111111111111111111111111111111111110111111111111111111111111111111 + 111111111111111111111111111111011111111111111111111111111111111111 + 111110101111111110111111111111111111010111111111011111111111111111 + 111111111111111111111111011111111111111111111110111101111111111111 + 101111111111111111011111111011111111111111111111111111111111111111* L041166 111111111111111111111111111111111111111111111111111111111111111111* -L041232 111111111111111111111111111101111110111101111111111111111111111111* -L041298 111111111011111110111111111111111111111110111110101111111111111111* +L041232 111111111111111111111111111101111110111111111101111111111111111111* +L041298 111111111011111111111111101111111111111111111110101110111111111111* L041364 000000000000000000000000000000000000000000000000000000000000000000* L041430 000000000000000000000000000000000000000000000000000000000000000000* L041496 000000000000000000000000000000000000000000000000000000000000000000* -L041562 111111111111011111111111111111111111111111111111111111111111111111* +L041562 111111111111111111111111111111111111111101111111111111111111111111* L041628 111111111111111111111111111111111111111111111111111111111111111111* L041694 111111111111111111111111111111111111111111111111111111111111111111* L041760 111111111111111111111111111111111111111111111111111111111111111111* @@ -858,16 +857,16 @@ L042486 111111111111111111111111111111111111111111111111111111111111111111* L042552 111111111111111111111111111111111111111111111111111111111111111111* L042618 000000000000000000000000000000000000000000000000000000000000000000* -L042684 111101111111111111111111111111111111111111111111111111111111111111* -L042750 111101111111110111111111011111110111111111111111111011111111111111* -L042816 111110111111111011111111101111110111111111111111111011111111111111* -L042882 111110111111111111111111101111110111011111111111111011111111111111* +L042684 111111111111111111111101111111111111111111111111111111111111111111* +L042750 111111111111111110111101111111011111010111111111111111111111111111* +L042816 111111111111111110111110111111101111011011111111111111111111111111* +L042882 111111111111111110011110111111111111011011111111111111111111111111* L042948 000000000000000000000000000000000000000000000000000000000000000000* -L043014 111111011111111111111111111111111111111111110111111111111111111111* -L043080 111111101111111111111111111111111111111111111011111111111111111111* -L043146 000000000000000000000000000000000000000000000000000000000000000000* -L043212 000000000000000000000000000000000000000000000000000000000000000000* -L043278 000000000000000000000000000000000000000000000000000000000000000000* +L043014 111101111111111111111111111111111111111111111111111111111111111111* +L043080 111111111111111111111111111111111111111111111111111111111111111111* +L043146 111111111111111111111111111111111111111111111111111111111111111111* +L043212 111111111111111111111111111111111111111111111111111111111111111111* +L043278 111111111111111111111111111111111111111111111111111111111111111111* L043344 000000000000000000000000000000000000000000000000000000000000000000* L043410 111111111111111111111111111111111111111111111111111111111111111111* @@ -881,19 +880,19 @@ L043872 111111111111111111111111111111111111111111111111111111111111111111* L043938 111111111111111111111111111111111111111111111111111111111111111111* L044004 111111111111111111111111111111111111111111111111111111111111111111* L044070 - 111111111110111111111111111111111111111110111111111111111111111111* -L044136 111111111011111101111111111111111111111110111110101111111111111111* -L044202 111111111111111111110111111101111111111101111111111111111111111111* + 111111101110111111111111111111111111111111111110111111111111111111* +L044136 111111111011111111111111011111111111111111111110101110111111111111* +L044202 111111111111111111110111111101111111111111111101111111111111111111* L044268 000000000000000000000000000000000000000000000000000000000000000000* L044334 000000000000000000000000000000000000000000000000000000000000000000* L044400 000000000000000000000000000000000000000000000000000000000000000000* -L044466 111111111111111111111111011111111111111111111111111111111111111111* -L044532 111101111111111111111111101111110111011111111111111011111111111111* -L044598 111111111111111011111111101111110111101111111111111011111111111111* -L044664 111110111111111011111111011111110111011111111111111011111111111111* -L044730 000000000000000000000000000000000000000000000000000000000000000000* +L044466 111111111111111111111111110111111111111111111111111111111111111111* +L044532 111111111111111111111111111111111111111111111111111111111111111111* +L044598 111111111111111111111111111111111111111111111111111111111111111111* +L044664 111111111111111111111111111111111111111111111111111111111111111111* +L044730 111111111111111111111111111111111111111111111111111111111111111111* L044796 - 111111111110111111111111111111111111111110111111111111111111111111* + 111111101110111111111111111111111111111111111110111111111111111111* L044862 111111111111111111111111111111111111111111111111111111111111111111* L044928 111111111111111111111111111111111111111111111111111111111111111111* L044994 111111111111111111111111111111111111111111111111111111111111111111* @@ -906,10 +905,10 @@ L045390 111111111111111111111111111111111111111111111111111111111111111111* L045456 111111111111111111111111111111111111111111111111111111111111111111* L045522 000000000000000000000000000000000000000000000000000000000000000000* -L045588 111110111111111011111111101111110111111111111111111011111111111111* -L045654 111101111111111011111111011111110111111111111111111011111111111111* -L045720 111101111111111111111111101111110111011111111111111011111111111111* -L045786 111110111111111111111111011111110111011111111111111011111111111111* +L045588 111111111111110111111111111111111111111111111110111111111111111111* +L045654 111111111111110111111111111111111111011111111111111111111111111111* +L045720 111111111111011111111111111111111111011111111101111111111111111111* +L045786 000000000000000000000000000000000000000000000000000000000000000000* L045852 000000000000000000000000000000000000000000000000000000000000000000* L045918 111111111111111111111111111111111111111111111111111111111111111111* L045984 111111111111111111111111111111111111111111111111111111111111111111* @@ -937,28 +936,28 @@ L047124 00010100011110* L047138 11011111110100* L047152 11111011111111* L047166 00100100011000* -L047180 10100100010010* +L047180 00000110010010* L047194 11011111110001* L047208 11111011110011* L047222 10100110010000* -L047236 00100100010010* +L047236 00000110010010* L047250 11010011110110* L047264 11111011110011* -L047278 10100101010000* +L047278 10100100010000* L047292 11001111110010* L047306 11110011110001* L047320 11111011111111* NOTE BLOCK 7 * L047334 - 111111111111111111111111111111111111111110111111111111111111111111 + 111111111111111111111111111111111111111110111111111111111111111011 111111111101111111111111111111111111111111111111111111111111111111 - 111111111111101111111111111111111111111111111111111111110111111111 - 111011111111111111111111111010111111111111111111111111111111111111 + 111111111111101111111111111111111111111111111111111111111111111111 + 111011111111111111111111111010111111111111111011111111111111111111 111111111111111111111111111111111111111111111111111011111111111111 - 111111111111111111111111011111101111011111111111111111111111111111 - 111111101111111111111101111111111001111111111111011111111111111111 - 101111111011111101101111111111111111111111111111111101111111111111 - 111111111111111111111011111111111111111111101110111111111110111111* + 111111110111111111111111011111101111111111111111111111111111111111 + 111111101111111111111101111111111001011111111111011111111111111111 + 101111111111111101101111111111111111111111111111111101111111111111 + 111111111111111111111011111111111111111111101110111111111111111111* L047928 000000000000000000000000000000000000000000000000000000000000000000* L047994 011111111111111111111111111101111111111111111110111111111111111111* @@ -966,7 +965,7 @@ L048060 101111111111111110111111111111111111111110111111011110111111111111* L048126 101111111111111101111111111111111111111110111111101110111111111111* L048192 000000000000000000000000000000000000000000000000000000000000000000* L048258 000000000000000000000000000000000000000000000000000000000000000000* -L048324 110111111111011111101110100111111110011101111111111111111111111111* +L048324 110111110111011111101110100111111110111101111111111111111111111111* L048390 111111111111111111101011111111111111111111111111111111111111111111* L048456 000000000000000000000000000000000000000000000000000000000000000000* L048522 000000000000000000000000000000000000000000000000000000000000000000* @@ -985,18 +984,18 @@ L049248 111111111111111111111111111111111111111111111111111111111111111111* L049314 111111111111111111111111111111111111111111111111111111111111111111* L049380 111111111111111111111111111111111111111111111111111111111111111111* -L049446 011111111111111111111111111111111111011111111111111111111111111111* -L049512 111111111111111111111111111111110111011111111111111011111111111111* +L049446 011111110111111111111111111111111111111111111111111111111111111111* +L049512 111111110111111111111111111111111011011111111111111111111111111111* L049578 000000000000000000000000000000000000000000000000000000000000000000* L049644 000000000000000000000000000000000000000000000000000000000000000000* L049710 000000000000000000000000000000000000000000000000000000000000000000* -L049776 111111111111111111111111111111111111111111111111111111111101111111* +L049776 111111111111111111111111111111111111111111111111111111111111111111* L049842 111111111111111111111111111111111111111111111111111111111111111111* L049908 111111111111111111111111111111111111111111111111111111111111111111* L049974 111111111111111111111111111111111111111111111111111111111111111111* L050040 111111111111111111111111111111111111111111111111111111111111111111* L050106 - 101111111110111111111111111111111111111111111111111111111111111111* + 101111101110111111111111111111111111111111111111111111111111111111* L050172 111111111111111111111111111111111111111111111111111111111111111111* L050238 111111111111111111111111111111111111111111111111111111111111111111* L050304 111111111111111111111111111111111111111111111111111111111111111111* @@ -1020,7 +1019,7 @@ L051360 111111111111111111111111111111111111111111111111111111111111111111* L051426 111111111111111111111111111111111111111111111111111111111111111111* L051492 111111111111111111111111111111111111111111111111111111111111111111* L051558 - 000000000000000000000000000000000000000000000000000000000000000000* + 111111111101111111111111111111111111111111111111111111111111111111* L051624 111111111111111111111111111111111111111111111111111111111111111111* L051690 111111111111111111111111111111111111111111111111111111111111111111* L051756 111111111111111111111111111111111111111111111111111111111111111111* @@ -1032,13 +1031,13 @@ L052086 111111111111111111111111111111111111111111111111111111111111111111* L052152 111111111111111111111111111111111111111111111111111111111111111111* L052218 111111111111111111111111111111111111111111111111111111111111111111* L052284 - 101111111110111111111111111111111111111111111111111111111111111111* -L052350 111111111011111111111111111111111111111111111111111111110101111111* + 101111101110111111111111111111111111111111111111111111111111111111* +L052350 011111111111111111111111111111111111111111110111110111111111111011* L052416 111111111111111111101111111111101111111111111111111111111111111111* L052482 000000000000000000000000000000000000000000000000000000000000000000* L052548 000000000000000000000000000000000000000000000000000000000000000000* L052614 000000000000000000000000000000000000000000000000000000000000000000* -L052680 000000000000000000000000000000000000000000000000000000000000000000* +L052680 111111111111111111111111111111111111111111111111111111111111111111* L052746 111111111111111111111111111111111111111111111111111111111111111111* L052812 111111111111111111111111111111111111111111111111111111111111111111* L052878 111111111111111111111111111111111111111111111111111111111111111111* @@ -1064,17 +1063,17 @@ L053886 11100110010010* L053900 11011111110000* L053914 11111011110011* L053928 10100110010000* -L053942 00000110011110* -L053956 11011111110101* -L053970 11111011110011* +L053942 11001011111110* +L053956 11110011110101* +L053970 11111111110011* L053984 11100110010010* -L053998 11000011110010* -L054012 11111011111100* -L054026 11111111111111* +L053998 11001011110010* +L054012 11111111111101* +L054026 11110011111111* L054040 11100110010010* -L054054 00000011110010* -L054068 11011011111101* -L054082 11111111111111* +L054054 00001011110011* +L054068 11010111111100* +L054082 11111111111110* E0 0 00000000 @@ -1094,6 +1093,6 @@ E0 00000000 1 * -C2CE1* +C6F7C* U00000000000000000000000000000000* -F0F6 +E6C0 diff --git a/Logic/68030_tk.lco b/Logic/68030_tk.lco index 4083529..8d34449 100644 --- a/Logic/68030_tk.lco +++ b/Logic/68030_tk.lco @@ -16,8 +16,8 @@ RCS = "$Revision: 1.2 $"; Parent = m4a5.lci; SDS_File = m4a5.sds; Design = 68030_tk.tt4; -DATE = 5/24/14; -TIME = 21:59:18; +DATE = 5/25/14; +TIME = 20:57:57; Source_Format = Pure_VHDL; Type = TT2; Pre_Fit_Time = 1; @@ -65,7 +65,7 @@ XOR_Synthesis = Yes; DT_Synthesis = Yes; Node_Collapse = Yes; Run_Time = 0; -Set_Reset_Dont_Care = No; +Set_Reset_Dont_Care = Yes; Clock_Optimize = No; In_Reg_Optimize = Yes; Balanced_Partitioning = Yes; @@ -76,51 +76,50 @@ Usercode_Format = Hex; [LOCATION ASSIGNMENTS] Layer = OFF; -IPL_1_ = pin,56,-,F,-; -IPL_0_ = pin,67,-,G,-; A_31_ = pin,4,-,B,-; -DSACK_0_ = pin,80,-,H,-; -FC_0_ = pin,57,-,F,-; IPL_2_ = pin,68,-,G,-; FC_1_ = pin,58,-,F,-; +A_30_ = pin,5,-,B,-; +A_29_ = pin,6,-,B,-; +A_28_ = pin,15,-,C,-; +A_27_ = pin,16,-,C,-; +A_26_ = pin,17,-,C,-; nEXP_SPACE = pin,14,-,-,-; +A_25_ = pin,18,-,C,-; BERR = pin,41,-,E,-; +A_24_ = pin,19,-,C,-; BG_030 = pin,21,-,C,-; +A_23_ = pin,84,-,H,-; +A_22_ = pin,85,-,H,-; +A_21_ = pin,94,-,A,-; BGACK_000 = pin,28,-,D,-; +A_20_ = pin,93,-,A,-; CLK_030 = pin,64,-,-,-; +A_19_ = pin,97,-,A,-; CLK_000 = pin,11,-,-,-; +A_18_ = pin,95,-,A,-; CLK_OSZI = pin,61,-,-,-; +A_17_ = pin,59,-,F,-; CLK_DIV_OUT = pin,65,-,G,-; +A_16_ = pin,96,-,A,-; DTACK = pin,30,-,D,-; +IPL_1_ = pin,56,-,F,-; AVEC = pin,92,-,A,-; +IPL_0_ = pin,67,-,G,-; AVEC_EXP = pin,22,-,C,-; +DSACK_0_ = pin,80,-,H,-; +FC_0_ = pin,57,-,F,-; VPA = pin,36,-,-,-; RST = pin,86,-,-,-; RW = pin,71,-,G,-; AMIGA_BUS_DATA_DIR = pin,48,-,E,-; AMIGA_BUS_ENABLE_LOW = pin,20,-,C,-; CIIN = pin,47,-,E,-; -A_30_ = pin,5,-,B,-; -A_29_ = pin,6,-,B,-; -A_28_ = pin,15,-,C,-; -A_27_ = pin,16,-,C,-; -A_26_ = pin,17,-,C,-; -A_25_ = pin,18,-,C,-; -A_24_ = pin,19,-,C,-; -A_23_ = pin,84,-,H,-; -A_22_ = pin,85,-,H,-; -A_21_ = pin,94,-,A,-; -A_20_ = pin,93,-,A,-; -A_19_ = pin,97,-,A,-; -A_18_ = pin,95,-,A,-; -A_17_ = pin,59,-,F,-; -A_16_ = pin,96,-,A,-; -IPL_030_1_ = pin,7,-,B,-; -IPL_030_0_ = pin,8,-,B,-; SIZE_1_ = pin,79,-,H,-; IPL_030_2_ = pin,9,-,B,-; DSACK_1_ = pin,81,-,H,-; AS_030 = pin,82,-,H,-; +SIZE_0_ = pin,70,-,G,-; AS_000 = pin,33,-,D,-; DS_030 = pin,98,-,A,-; UDS_000 = pin,32,-,D,-; @@ -129,39 +128,38 @@ A0 = pin,69,-,G,-; BG_000 = pin,29,-,D,-; BGACK_030 = pin,83,-,H,-; CLK_EXP = pin,10,-,B,-; +IPL_030_1_ = pin,7,-,B,-; FPU_CS = pin,78,-,H,-; +IPL_030_0_ = pin,8,-,B,-; E = pin,66,-,G,-; VMA = pin,35,-,D,-; RESET = pin,3,-,B,-; AMIGA_BUS_ENABLE = pin,34,-,D,-; -SIZE_0_ = pin,70,-,G,-; -inst_AS_030_000_SYNC = node,-,-,F,5; +inst_AS_030_000_SYNC = node,-,-,F,1; +inst_DTACK_SYNC = node,-,-,B,9; +inst_VPA_SYNC = node,-,-,B,5; +inst_VPA_D = node,-,-,E,5; +inst_CLK_000_D0 = node,-,-,A,8; +inst_CLK_000_D1 = node,-,-,E,8; +inst_CLK_000_D2 = node,-,-,E,1; +inst_CLK_000_D6 = node,-,-,F,12; +inst_CLK_OUT_PRE = node,-,-,F,8; inst_BGACK_030_INT_D = node,-,-,F,4; -inst_DTACK_SYNC = node,-,-,C,9; -inst_VPA_SYNC = node,-,-,C,5; -inst_CLK_000_D0 = node,-,-,E,8; -inst_CLK_000_D1 = node,-,-,F,0; -inst_CLK_000_D2 = node,-,-,A,5; -inst_CLK_000_D6 = node,-,-,H,5; -SM_AMIGA_5_ = node,-,-,A,1; -SM_AMIGA_6_ = node,-,-,F,8; -inst_CLK_000_D3 = node,-,-,E,9; -inst_CLK_000_D5 = node,-,-,E,1; -SM_AMIGA_3_ = node,-,-,C,8; -SM_AMIGA_0_ = node,-,-,F,1; -SM_AMIGA_1_ = node,-,-,B,5; -CLK_CNT_N_0_ = node,-,-,C,1; -CLK_CNT_N_1_ = node,-,-,A,9; -CLK_CNT_P_0_ = node,-,-,G,5; -CLK_CNT_P_1_ = node,-,-,E,5; -inst_CLK_000_D4 = node,-,-,F,9; -SM_AMIGA_7_ = node,-,-,F,12; -SM_AMIGA_4_ = node,-,-,A,12; -inst_CLK_OUT_PRE = node,-,-,C,4; -SM_AMIGA_2_ = node,-,-,B,9; -cpu_est_0_ = node,-,-,A,8; -cpu_est_1_ = node,-,-,G,12; -cpu_est_2_ = node,-,-,G,9; +CLK_CNT_P_0_ = node,-,-,F,5; +SM_AMIGA_5_ = node,-,-,G,12; +SM_AMIGA_7_ = node,-,-,C,8; +SM_AMIGA_1_ = node,-,-,F,0; +SM_AMIGA_0_ = node,-,-,C,9; +SM_AMIGA_6_ = node,-,-,C,4; +inst_CLK_000_D3 = node,-,-,G,9; +inst_CLK_000_D5 = node,-,-,G,5; +SM_AMIGA_3_ = node,-,-,C,5; +inst_CLK_000_D4 = node,-,-,E,9; +SM_AMIGA_4_ = node,-,-,A,5; +SM_AMIGA_2_ = node,-,-,C,1; +cpu_est_0_ = node,-,-,A,1; +cpu_est_1_ = node,-,-,A,12; +cpu_est_2_ = node,-,-,A,9; [GROUP ASSIGNMENTS] Layer = OFF; diff --git a/Logic/68030_tk.out b/Logic/68030_tk.out index bc44477..525cf1f 100644 --- a/Logic/68030_tk.out +++ b/Logic/68030_tk.out @@ -66400,6 +66400,4225 @@ 17 A_25_ 1 -1 -1 1 4 17 -1 16 A_26_ 1 -1 -1 1 4 16 -1 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21 + 29 DTACK 5 -1 3 1 1 29 -1 1 0 21 + 30 LDS_000 5 324 3 0 30 -1 8 0 21 + 31 UDS_000 5 323 3 0 31 -1 5 0 21 + 65 E 5 328 6 0 65 -1 3 1 21 + 33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20 + 8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21 + 82 BGACK_030 5 326 7 0 82 -1 2 0 21 + 77 FPU_CS 5 327 7 0 77 -1 2 0 21 + 34 VMA 5 329 3 0 34 -1 2 1 21 + 32 AS_000 5 322 3 0 32 -1 2 0 21 + 28 BG_000 5 325 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 298 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21 + 297 inst_CLK_000_D0 3 -1 3 4 1 3 6 7 -1 -1 1 0 21 + 306 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 5 0 21 + 318 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 21 + 328 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21 + 317 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21 + 327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 304 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 2 0 21 + 302 SM_AMIGA_6_ 3 -1 7 3 3 6 7 -1 -1 2 0 21 + 293 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 4 0 21 + 319 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21 + 313 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21 + 308 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21 + 329 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21 + 326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21 + 322 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21 + 311 CLK_CNT_P_0_ 3 -1 6 2 6 7 -1 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 1 2 1 6 -1 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21 + 310 CLK_CNT_N_1_ 3 -1 1 2 1 6 -1 -1 1 0 21 + 305 inst_CLK_000_D5 3 -1 6 2 6 7 -1 -1 1 0 21 + 303 inst_CLK_000_D3 3 -1 7 2 6 7 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 7 2 6 7 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 3 2 6 7 -1 -1 1 0 21 + 295 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21 + 324 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 323 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 314 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20 + 320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 307 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 3 0 21 + 325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 1 1 1 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21 + 315 inst_CLK_000_D4 3 -1 7 1 6 -1 -1 1 0 21 + 312 CLK_CNT_P_1_ 3 -1 7 1 6 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 1 3 60 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 81 AS_030 1 -1 -1 3 1 3 7 81 -1 + 13 nEXP_SPACE 1 -1 -1 3 3 6 7 13 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A_0_ 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +95 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21 + 29 DTACK 5 -1 3 1 0 29 -1 1 0 21 + 30 LDS_000 5 320 3 0 30 -1 8 0 21 + 31 UDS_000 5 319 3 0 31 -1 5 0 21 + 65 E 5 324 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 325 1 0 6 -1 3 0 21 + 82 BGACK_030 5 322 7 0 82 -1 2 0 21 + 77 FPU_CS 5 323 7 0 77 -1 2 0 21 + 34 VMA 5 326 3 0 34 -1 2 1 21 + 33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 2 0 21 + 32 AS_000 5 318 3 0 32 -1 2 0 21 + 28 BG_000 5 321 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 297 inst_CLK_000_D0 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 303 SM_AMIGA_6_ 3 -1 5 4 2 3 5 6 -1 -1 2 0 21 + 307 SM_AMIGA_7_ 3 -1 6 3 3 5 6 -1 -1 5 0 21 + 314 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 324 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21 + 313 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21 + 309 SM_AMIGA_1_ 3 -1 2 3 2 5 7 -1 -1 3 0 21 + 323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 318 RN_AS_000 3 32 3 3 2 3 6 32 -1 2 0 21 + 302 SM_AMIGA_5_ 3 -1 2 3 0 2 3 -1 -1 2 0 21 + 306 inst_CLK_000_D5 3 -1 5 3 2 5 7 -1 -1 1 0 21 + 301 inst_CLK_OUT_PRE 3 -1 4 3 1 4 6 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 5 3 2 5 7 -1 -1 1 0 21 + 298 inst_CLK_000_D1 3 -1 5 3 1 6 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 5 6 -1 -1 7 0 21 + 311 SM_AMIGA_0_ 3 -1 2 2 2 6 -1 -1 4 0 21 + 315 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 310 SM_AMIGA_2_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 326 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21 + 322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21 + 305 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 304 inst_CLK_000_D3 3 -1 5 2 5 6 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 1 2 5 6 -1 -1 1 0 21 + 295 inst_VPA_D 3 -1 4 2 0 3 -1 -1 1 0 21 + 320 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 319 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21 + 328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 2 0 21 + 321 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 312 inst_CLK_000_D4 3 -1 6 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1 + 13 nEXP_SPACE 1 -1 -1 4 3 5 6 7 13 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 5 7 63 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 2 3 10 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A_0_ 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 4 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21 + 29 DTACK 5 -1 3 1 0 29 -1 1 0 21 + 30 LDS_000 5 324 3 0 30 -1 8 0 21 + 31 UDS_000 5 323 3 0 31 -1 5 0 21 + 65 E 5 328 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21 + 82 BGACK_030 5 326 7 0 82 -1 2 0 21 + 77 FPU_CS 5 327 7 0 77 -1 2 0 21 + 34 VMA 5 329 3 0 34 -1 2 1 21 + 33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 2 0 21 + 32 AS_000 5 322 3 0 32 -1 2 0 21 + 28 BG_000 5 325 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 297 inst_CLK_000_D0 3 -1 5 6 0 1 2 3 6 7 -1 -1 1 0 21 + 318 cpu_est_1_ 3 -1 2 4 0 2 3 6 -1 -1 4 0 21 + 328 RN_E 3 65 6 4 0 2 3 6 65 -1 3 1 21 + 302 SM_AMIGA_6_ 3 -1 2 4 2 3 5 6 -1 -1 2 0 21 + 298 inst_CLK_000_D1 3 -1 6 4 1 2 6 7 -1 -1 1 0 21 + 306 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21 + 319 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 1 21 + 317 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 + 308 SM_AMIGA_1_ 3 -1 1 3 1 5 7 -1 -1 3 0 21 + 327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 322 RN_AS_000 3 32 3 3 1 2 3 32 -1 2 0 21 + 311 CLK_CNT_P_0_ 3 -1 7 3 0 6 7 -1 -1 2 0 21 + 304 SM_AMIGA_4_ 3 -1 6 3 0 3 6 -1 -1 2 0 21 + 305 inst_CLK_000_D5 3 -1 5 3 1 5 7 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 5 3 1 5 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 4 0 21 + 314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 4 0 21 + 313 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 3 0 21 + 329 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21 + 326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 4 2 4 6 -1 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21 + 312 CLK_CNT_P_1_ 3 -1 0 2 6 7 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 4 2 4 6 -1 -1 1 0 21 + 303 inst_CLK_000_D3 3 -1 4 2 2 5 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 7 2 2 4 -1 -1 1 0 21 + 295 inst_VPA_D 3 -1 5 2 0 3 -1 -1 1 0 21 + 324 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 323 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 307 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21 + 330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 2 0 21 + 325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 315 inst_CLK_000_D4 3 -1 5 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1 + 13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 5 7 63 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 5 10 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A_0_ 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +104 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 325 7 4 2 3 5 7 81 -1 3 0 21 + 30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 327 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 324 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 337 6 1 3 69 -1 2 0 21 + 68 A0 5 330 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 2 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 336 3 0 33 -1 7 0 21 + 65 E 5 334 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 323 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 322 1 0 6 -1 3 0 21 + 82 BGACK_030 5 332 7 0 82 -1 2 0 21 + 77 FPU_CS 5 333 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 335 3 0 34 -1 2 1 21 + 28 BG_000 5 331 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 297 inst_CLK_000_D0 3 -1 6 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 + 332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 298 inst_CLK_000_D1 3 -1 5 5 0 1 4 6 7 -1 -1 1 0 21 + 304 inst_CLK_000_D5 3 -1 2 4 0 1 5 7 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 21 + 313 SM_AMIGA_7_ 3 -1 5 3 0 3 5 -1 -1 5 0 21 + 318 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 + 334 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21 + 317 cpu_est_0_ 3 -1 4 3 3 4 6 -1 -1 3 0 21 + 307 SM_AMIGA_1_ 3 -1 1 3 1 5 7 -1 -1 3 0 21 + 333 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 314 SM_AMIGA_4_ 3 -1 1 3 1 2 3 -1 -1 2 0 21 + 302 SM_AMIGA_6_ 3 -1 0 3 0 3 5 -1 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 5 3 1 3 5 -1 -1 2 0 21 + 300 inst_CLK_000_D6 3 -1 0 3 1 5 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 0 5 -1 -1 7 0 21 + 315 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21 + 306 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 4 0 21 + 325 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21 + 319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 316 SM_AMIGA_2_ 3 -1 2 2 1 2 -1 -1 3 0 21 + 335 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21 + 326 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 21 + 310 CLK_CNT_P_0_ 3 -1 4 2 0 4 -1 -1 2 0 21 + 308 CLK_CNT_N_0_ 3 -1 0 2 0 4 -1 -1 2 0 21 + 311 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21 + 303 inst_CLK_000_D3 3 -1 5 2 0 5 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 0 2 0 5 -1 -1 1 0 21 + 329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 336 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21 + 328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 305 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 3 0 21 + 337 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 330 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21 + 312 inst_CLK_000_D4 3 -1 5 1 2 -1 -1 1 0 21 + 309 CLK_CNT_N_1_ 3 -1 4 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1 + 63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 35 VPA 1 -1 -1 2 2 3 35 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 6 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +104 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 323 7 4 2 3 5 7 81 -1 3 0 21 + 30 LDS_000 5 327 3 3 0 6 7 30 -1 10 0 21 + 31 UDS_000 5 326 3 3 0 6 7 31 -1 6 0 21 + 32 AS_000 5 324 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 325 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 329 6 1 3 69 -1 2 0 21 + 68 A0 5 328 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 2 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 337 3 0 33 -1 6 0 21 + 65 E 5 333 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 335 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 334 1 0 6 -1 3 0 21 + 82 BGACK_030 5 331 7 0 82 -1 2 0 21 + 77 FPU_CS 5 332 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 336 3 0 34 -1 2 1 21 + 28 BG_000 5 330 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 331 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 2 0 21 + 296 inst_CLK_000_D0 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 300 inst_BGACK_030_INT_D 3 -1 6 4 0 3 6 7 -1 -1 1 0 21 + 297 inst_CLK_000_D1 3 -1 5 4 1 2 6 7 -1 -1 1 0 21 + 318 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 + 307 SM_AMIGA_1_ 3 -1 1 3 1 5 7 -1 -1 4 0 21 + 333 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21 + 317 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 + 302 SM_AMIGA_6_ 3 -1 5 3 0 3 5 -1 -1 3 0 21 + 332 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 308 CLK_CNT_N_0_ 3 -1 2 3 1 2 5 -1 -1 2 0 21 + 304 inst_CLK_000_D5 3 -1 0 3 1 5 7 -1 -1 1 0 21 + 299 inst_CLK_000_D6 3 -1 5 3 1 5 7 -1 -1 1 0 21 + 313 SM_AMIGA_7_ 3 -1 5 2 3 5 -1 -1 6 0 21 + 316 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 4 0 21 + 315 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21 + 305 SM_AMIGA_3_ 3 -1 0 2 0 2 -1 -1 4 0 21 + 323 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21 + 319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 314 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 306 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 3 1 21 + 301 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 336 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21 + 324 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 21 + 310 CLK_CNT_P_0_ 3 -1 4 2 1 4 -1 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 2 2 0 2 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 2 2 0 2 -1 -1 2 0 21 + 311 CLK_CNT_P_1_ 3 -1 4 2 1 4 -1 -1 1 0 21 + 309 CLK_CNT_N_1_ 3 -1 5 2 1 2 -1 -1 1 0 21 + 303 inst_CLK_000_D3 3 -1 4 2 4 5 -1 -1 1 0 21 + 298 inst_CLK_000_D2 3 -1 7 2 4 5 -1 -1 1 0 21 + 327 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 8 0 21 + 337 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 326 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21 + 325 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 335 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 334 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 330 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 329 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 328 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 312 inst_CLK_000_D4 3 -1 4 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1 + 63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 35 VPA 1 -1 -1 2 2 3 35 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 2 3 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +104 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 323 7 4 2 3 5 7 81 -1 3 0 21 + 30 LDS_000 5 327 3 3 0 6 7 30 -1 10 0 21 + 31 UDS_000 5 326 3 3 0 6 7 31 -1 6 0 21 + 32 AS_000 5 324 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 325 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 329 6 1 3 69 -1 2 0 21 + 68 A0 5 328 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 2 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 337 3 0 33 -1 6 0 21 + 65 E 5 333 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 335 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 334 1 0 6 -1 3 0 21 + 82 BGACK_030 5 331 7 0 82 -1 2 0 21 + 77 FPU_CS 5 332 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 336 3 0 34 -1 2 1 21 + 28 BG_000 5 330 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 331 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 2 0 21 + 296 inst_CLK_000_D0 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 300 inst_BGACK_030_INT_D 3 -1 6 4 0 3 6 7 -1 -1 1 0 21 + 297 inst_CLK_000_D1 3 -1 5 4 1 2 6 7 -1 -1 1 0 21 + 318 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 + 307 SM_AMIGA_1_ 3 -1 1 3 1 5 7 -1 -1 4 0 21 + 333 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21 + 317 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 + 302 SM_AMIGA_6_ 3 -1 5 3 0 3 5 -1 -1 3 0 21 + 332 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 308 CLK_CNT_N_0_ 3 -1 2 3 1 2 5 -1 -1 2 0 21 + 304 inst_CLK_000_D5 3 -1 0 3 1 5 7 -1 -1 1 0 21 + 299 inst_CLK_000_D6 3 -1 5 3 1 5 7 -1 -1 1 0 21 + 313 SM_AMIGA_7_ 3 -1 5 2 3 5 -1 -1 6 0 21 + 316 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 4 0 21 + 315 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21 + 305 SM_AMIGA_3_ 3 -1 0 2 0 2 -1 -1 4 0 21 + 323 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21 + 319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 314 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 306 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 3 1 21 + 301 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 336 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21 + 324 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 21 + 310 CLK_CNT_P_0_ 3 -1 4 2 1 4 -1 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 2 2 0 2 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 2 2 0 2 -1 -1 2 0 21 + 311 CLK_CNT_P_1_ 3 -1 4 2 1 4 -1 -1 1 0 21 + 309 CLK_CNT_N_1_ 3 -1 5 2 1 2 -1 -1 1 0 21 + 303 inst_CLK_000_D3 3 -1 4 2 4 5 -1 -1 1 0 21 + 298 inst_CLK_000_D2 3 -1 7 2 4 5 -1 -1 1 0 21 + 327 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 8 0 21 + 337 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 326 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21 + 325 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 335 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 334 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 330 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 329 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 328 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 312 inst_CLK_000_D4 3 -1 4 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1 + 63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 35 VPA 1 -1 -1 2 2 3 35 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 2 3 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 324 3 0 30 -1 10 0 21 + 33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 6 0 21 + 31 UDS_000 5 323 3 0 31 -1 6 0 21 + 65 E 5 328 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21 + 82 BGACK_030 5 326 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 321 7 0 80 -1 2 0 21 + 77 FPU_CS 5 327 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 329 3 0 34 -1 2 1 21 + 32 AS_000 5 322 3 0 32 -1 2 0 21 + 28 BG_000 5 325 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 326 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 2 0 21 + 296 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 297 inst_CLK_000_D1 3 -1 0 4 1 4 6 7 -1 -1 1 0 21 + 306 SM_AMIGA_7_ 3 -1 2 3 2 3 7 -1 -1 6 0 21 + 308 SM_AMIGA_0_ 3 -1 5 3 2 3 5 -1 -1 3 1 21 + 304 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 3 0 21 + 302 SM_AMIGA_6_ 3 -1 2 3 2 3 7 -1 -1 3 0 21 + 301 SM_AMIGA_5_ 3 -1 2 3 1 2 3 -1 -1 3 0 21 + 327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 322 RN_AS_000 3 32 3 3 2 3 5 32 -1 2 0 21 + 312 CLK_CNT_P_0_ 3 -1 0 3 0 4 5 -1 -1 2 0 21 + 305 inst_CLK_000_D5 3 -1 2 3 2 5 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 7 2 2 7 -1 -1 8 0 21 + 318 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 316 inst_CLK_OUT_PRE 3 -1 5 2 1 6 -1 -1 4 0 21 + 315 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 4 0 21 + 309 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 4 0 21 + 307 SM_AMIGA_3_ 3 -1 0 2 0 6 -1 -1 4 0 21 + 328 RN_E 3 65 6 2 3 6 65 -1 3 1 21 + 319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 317 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 329 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21 + 295 inst_VPA_SYNC 3 -1 6 2 0 6 -1 -1 2 0 21 + 313 CLK_CNT_P_1_ 3 -1 4 2 0 5 -1 -1 1 0 21 + 303 inst_CLK_000_D3 3 -1 0 2 2 4 -1 -1 1 0 21 + 299 inst_CLK_000_D6 3 -1 2 2 5 7 -1 -1 1 0 21 + 298 inst_CLK_000_D2 3 -1 4 2 0 2 -1 -1 1 0 21 + 324 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21 + 330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21 + 332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 310 CLK_CNT_N_0_ 3 -1 5 1 5 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 314 inst_CLK_000_D4 3 -1 4 1 2 -1 -1 1 0 21 + 311 CLK_CNT_N_1_ 3 -1 5 1 5 -1 -1 1 0 21 + 300 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 81 AS_030 1 -1 -1 4 0 3 6 7 81 -1 + 13 nEXP_SPACE 1 -1 -1 4 2 3 4 7 13 -1 + 35 VPA 1 -1 -1 3 0 3 6 35 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 10 CLK_000 1 -1 -1 2 3 5 10 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A0 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 324 3 0 30 -1 8 0 21 + 33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 7 0 21 + 31 UDS_000 5 323 3 0 31 -1 5 0 21 + 65 E 5 330 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 326 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 325 1 0 6 -1 3 0 21 + 82 BGACK_030 5 328 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 321 7 0 80 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 331 3 0 34 -1 2 1 21 + 32 AS_000 5 322 3 0 32 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 297 inst_CLK_000_D0 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 328 RN_BGACK_030 3 82 7 4 3 4 5 7 82 -1 2 0 21 + 302 SM_AMIGA_6_ 3 -1 2 4 2 3 5 6 -1 -1 2 0 21 + 306 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21 + 318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 308 SM_AMIGA_0_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 + 330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21 + 317 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21 + 309 SM_AMIGA_1_ 3 -1 5 3 5 6 7 -1 -1 3 0 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 322 RN_AS_000 3 32 3 3 2 3 6 32 -1 2 0 21 + 312 CLK_CNT_P_0_ 3 -1 0 3 0 1 2 -1 -1 2 0 21 + 304 SM_AMIGA_4_ 3 -1 2 3 0 2 3 -1 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 6 3 2 3 6 -1 -1 2 0 21 + 305 inst_CLK_000_D5 3 -1 5 3 5 6 7 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 5 3 5 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D1 3 -1 5 3 1 6 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21 + 319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 314 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 331 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21 + 310 CLK_CNT_N_0_ 3 -1 1 2 1 2 -1 -1 2 0 21 + 313 CLK_CNT_P_1_ 3 -1 2 2 0 1 -1 -1 1 0 21 + 303 inst_CLK_000_D3 3 -1 4 2 2 4 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 7 2 2 4 -1 -1 1 0 21 + 324 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21 + 323 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 307 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 315 inst_CLK_000_D4 3 -1 4 1 5 -1 -1 1 0 21 + 311 CLK_CNT_N_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 5 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 2 3 4 5 7 13 -1 + 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 5 7 63 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 35 VPA 1 -1 -1 2 0 3 35 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 4 10 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A0 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +98 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 325 3 0 30 -1 8 0 21 + 31 UDS_000 5 324 3 0 31 -1 5 0 21 + 65 E 5 329 6 0 65 -1 3 1 21 + 33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 3 0 21 + 8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 323 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 321 1 0 6 -1 3 0 21 + 82 BGACK_030 5 327 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 320 7 0 80 -1 2 0 21 + 77 FPU_CS 5 328 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 330 3 0 34 -1 2 1 21 + 32 AS_000 5 322 3 0 32 -1 2 0 21 + 28 BG_000 5 326 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 296 inst_CLK_000_D0 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 305 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21 + 317 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 307 SM_AMIGA_0_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 + 329 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21 + 316 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21 + 308 SM_AMIGA_1_ 3 -1 7 3 5 6 7 -1 -1 3 0 21 + 328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 327 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21 + 322 RN_AS_000 3 32 3 3 2 3 6 32 -1 2 0 21 + 311 CLK_CNT_P_0_ 3 -1 6 3 2 4 6 -1 -1 2 0 21 + 301 SM_AMIGA_6_ 3 -1 5 3 2 3 5 -1 -1 2 0 21 + 300 SM_AMIGA_5_ 3 -1 2 3 0 2 3 -1 -1 2 0 21 + 304 inst_CLK_000_D5 3 -1 4 3 5 6 7 -1 -1 1 0 21 + 299 inst_CLK_000_D6 3 -1 5 3 5 6 7 -1 -1 1 0 21 + 297 inst_CLK_000_D1 3 -1 5 3 1 6 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 + 315 inst_CLK_OUT_PRE 3 -1 2 2 1 6 -1 -1 4 0 21 + 318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 313 SM_AMIGA_2_ 3 -1 0 2 0 7 -1 -1 3 0 21 + 330 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21 + 309 CLK_CNT_N_0_ 3 -1 2 2 2 4 -1 -1 2 0 21 + 303 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 312 CLK_CNT_P_1_ 3 -1 4 2 2 6 -1 -1 1 0 21 + 302 inst_CLK_000_D3 3 -1 5 2 2 5 -1 -1 1 0 21 + 298 inst_CLK_000_D2 3 -1 7 2 2 5 -1 -1 1 0 21 + 325 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 324 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21 + 323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 306 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21 + 326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 314 inst_CLK_000_D4 3 -1 5 1 4 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 4 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 2 3 4 5 7 13 -1 + 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 5 7 63 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 35 VPA 1 -1 -1 2 0 3 35 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 2 3 10 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A0 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +98 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 325 3 0 30 -1 8 0 21 + 31 UDS_000 5 324 3 0 31 -1 5 0 21 + 65 E 5 329 6 0 65 -1 3 1 21 + 33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 3 0 21 + 8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 320 1 0 6 -1 3 0 21 + 82 BGACK_030 5 327 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 322 7 0 80 -1 2 0 21 + 77 FPU_CS 5 328 7 0 77 -1 2 0 21 + 34 VMA 5 330 3 0 34 -1 2 1 21 + 32 AS_000 5 323 3 0 32 -1 2 0 21 + 28 BG_000 5 326 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 296 inst_CLK_000_D0 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 305 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21 + 317 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 307 SM_AMIGA_0_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 + 329 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21 + 316 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21 + 308 SM_AMIGA_1_ 3 -1 7 3 5 6 7 -1 -1 3 0 21 + 328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 327 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21 + 323 RN_AS_000 3 32 3 3 2 3 6 32 -1 2 0 21 + 311 CLK_CNT_P_0_ 3 -1 6 3 2 4 6 -1 -1 2 0 21 + 301 SM_AMIGA_6_ 3 -1 5 3 2 3 5 -1 -1 2 0 21 + 300 SM_AMIGA_5_ 3 -1 2 3 0 2 3 -1 -1 2 0 21 + 304 inst_CLK_000_D5 3 -1 4 3 5 6 7 -1 -1 1 0 21 + 299 inst_CLK_000_D6 3 -1 5 3 5 6 7 -1 -1 1 0 21 + 297 inst_CLK_000_D1 3 -1 5 3 1 6 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 + 315 inst_CLK_OUT_PRE 3 -1 2 2 1 6 -1 -1 4 0 21 + 318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 313 SM_AMIGA_2_ 3 -1 0 2 0 7 -1 -1 3 0 21 + 330 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21 + 309 CLK_CNT_N_0_ 3 -1 2 2 2 4 -1 -1 2 0 21 + 303 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 312 CLK_CNT_P_1_ 3 -1 4 2 2 6 -1 -1 1 0 21 + 302 inst_CLK_000_D3 3 -1 5 2 2 5 -1 -1 1 0 21 + 298 inst_CLK_000_D2 3 -1 7 2 2 5 -1 -1 1 0 21 + 325 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 324 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21 + 321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 306 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21 + 326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 314 inst_CLK_000_D4 3 -1 5 1 4 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 4 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1 + 13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 5 7 63 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 35 VPA 1 -1 -1 2 0 3 35 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 2 3 10 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A0 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 326 3 0 30 -1 8 0 21 + 31 UDS_000 5 325 3 0 31 -1 5 0 21 + 65 E 5 330 6 0 65 -1 3 1 21 + 33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 3 0 21 + 8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 322 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 321 1 0 6 -1 3 0 21 + 82 BGACK_030 5 328 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 323 7 0 80 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 34 VMA 5 331 3 0 34 -1 2 1 21 + 32 AS_000 5 324 3 0 32 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 297 inst_CLK_000_D0 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 309 SM_AMIGA_1_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21 + 305 inst_CLK_000_D5 3 -1 7 4 2 5 6 7 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 5 4 2 5 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D1 3 -1 5 4 1 5 6 7 -1 -1 1 0 21 + 306 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21 + 318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21 + 317 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 328 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21 + 310 CLK_CNT_N_0_ 3 -1 1 3 1 4 6 -1 -1 2 0 21 + 304 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21 + 302 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 5 3 1 3 5 -1 -1 2 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21 + 308 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 4 0 21 + 319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 314 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 331 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21 + 324 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21 + 312 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21 + 313 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21 + 311 CLK_CNT_N_1_ 3 -1 6 2 1 4 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21 + 326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21 + 322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 307 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 315 inst_CLK_000_D4 3 -1 2 1 7 -1 -1 1 0 21 + 303 inst_CLK_000_D3 3 -1 2 1 2 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 5 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1 + 13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 5 7 63 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 4 10 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A0 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 7 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +100 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 325 3 0 30 -1 8 0 21 + 33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 7 0 21 + 31 UDS_000 5 324 3 0 31 -1 5 0 21 + 65 E 5 331 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21 + 82 BGACK_030 5 329 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 322 7 0 80 -1 2 0 21 + 77 FPU_CS 5 330 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 332 3 0 34 -1 2 1 21 + 32 AS_000 5 323 3 0 32 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 298 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 299 inst_CLK_000_D1 3 -1 5 5 0 1 2 6 7 -1 -1 1 0 21 + 318 cpu_est_0_ 3 -1 0 4 0 2 3 6 -1 -1 3 0 21 + 310 SM_AMIGA_1_ 3 -1 6 4 0 5 6 7 -1 -1 3 0 21 + 306 inst_CLK_000_D5 3 -1 6 4 0 5 6 7 -1 -1 1 0 21 + 301 inst_CLK_000_D6 3 -1 5 4 0 5 6 7 -1 -1 1 0 21 + 307 SM_AMIGA_7_ 3 -1 0 3 0 3 5 -1 -1 5 0 21 + 319 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 + 331 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21 + 320 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 1 21 + 330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 329 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21 + 311 CLK_CNT_N_0_ 3 -1 1 3 1 5 6 -1 -1 2 0 21 + 305 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 2 0 21 + 303 SM_AMIGA_6_ 3 -1 0 3 0 3 5 -1 -1 2 0 21 + 302 SM_AMIGA_5_ 3 -1 5 3 3 5 6 -1 -1 2 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 0 5 -1 -1 7 0 21 + 317 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 4 0 21 + 309 SM_AMIGA_0_ 3 -1 0 2 0 3 -1 -1 4 0 21 + 315 SM_AMIGA_2_ 3 -1 2 2 2 6 -1 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 1 2 1 2 -1 -1 3 0 21 + 332 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21 + 323 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21 + 313 CLK_CNT_P_0_ 3 -1 4 2 4 6 -1 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 2 2 1 2 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 2 2 1 2 -1 -1 2 0 21 + 314 CLK_CNT_P_1_ 3 -1 4 2 4 6 -1 -1 1 0 21 + 312 CLK_CNT_N_1_ 3 -1 5 2 1 6 -1 -1 1 0 21 + 300 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21 + 325 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21 + 324 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 316 inst_CLK_000_D4 3 -1 0 1 6 -1 -1 1 0 21 + 304 inst_CLK_000_D3 3 -1 7 1 0 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 5 7 13 -1 + 81 AS_030 1 -1 -1 4 2 3 5 7 81 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 5 7 63 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 5 10 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A0 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 4 35 -1 + 29 DTACK 1 -1 -1 1 2 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +100 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 9 0 21 + 30 LDS_000 5 325 3 0 30 -1 8 0 21 + 31 UDS_000 5 324 3 0 31 -1 5 0 21 + 65 E 5 329 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21 + 82 BGACK_030 5 327 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 322 7 0 80 -1 2 0 21 + 77 FPU_CS 5 328 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 332 3 0 34 -1 2 1 21 + 32 AS_000 5 323 3 0 32 -1 2 0 21 + 28 BG_000 5 326 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 298 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 303 SM_AMIGA_1_ 3 -1 6 5 0 3 5 6 7 -1 -1 3 0 21 + 299 inst_CLK_000_D1 3 -1 5 5 0 1 2 6 7 -1 -1 1 0 21 + 318 cpu_est_0_ 3 -1 0 4 0 2 3 6 -1 -1 3 0 21 + 308 inst_CLK_000_D5 3 -1 6 4 0 5 6 7 -1 -1 1 0 21 + 301 inst_CLK_000_D6 3 -1 5 4 0 5 6 7 -1 -1 1 0 21 + 309 SM_AMIGA_7_ 3 -1 0 3 0 3 5 -1 -1 5 0 21 + 319 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 + 329 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21 + 320 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 1 21 + 328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 327 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21 + 311 CLK_CNT_N_0_ 3 -1 1 3 1 5 6 -1 -1 2 0 21 + 307 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 2 0 21 + 305 SM_AMIGA_6_ 3 -1 0 3 0 3 5 -1 -1 2 0 21 + 302 SM_AMIGA_5_ 3 -1 5 3 3 5 6 -1 -1 2 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 0 5 -1 -1 7 0 21 + 317 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 4 0 21 + 304 SM_AMIGA_0_ 3 -1 0 2 0 3 -1 -1 4 0 21 + 315 SM_AMIGA_2_ 3 -1 2 2 2 6 -1 -1 3 0 21 + 310 SM_AMIGA_3_ 3 -1 1 2 1 2 -1 -1 3 0 21 + 332 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21 + 323 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21 + 313 CLK_CNT_P_0_ 3 -1 4 2 4 6 -1 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 2 2 1 2 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 2 2 1 2 -1 -1 2 0 21 + 314 CLK_CNT_P_1_ 3 -1 4 2 4 6 -1 -1 1 0 21 + 312 CLK_CNT_N_1_ 3 -1 5 2 1 6 -1 -1 1 0 21 + 300 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21 + 333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 325 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 324 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 316 inst_CLK_000_D4 3 -1 0 1 6 -1 -1 1 0 21 + 306 inst_CLK_000_D3 3 -1 7 1 0 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 5 7 13 -1 + 81 AS_030 1 -1 -1 4 2 3 5 7 81 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 5 7 63 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 5 10 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A0 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 4 35 -1 + 29 DTACK 1 -1 -1 1 2 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 326 3 0 30 -1 8 0 21 + 31 UDS_000 5 325 3 0 31 -1 5 0 21 + 65 E 5 330 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 322 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 321 1 0 6 -1 3 0 21 + 82 BGACK_030 5 328 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 323 7 0 80 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 34 VMA 5 331 3 0 34 -1 2 1 21 + 33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 2 0 21 + 32 AS_000 5 324 3 0 32 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 297 inst_CLK_000_D0 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 308 SM_AMIGA_1_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21 + 305 inst_CLK_000_D5 3 -1 7 4 2 5 6 7 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 5 4 2 5 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D1 3 -1 5 4 1 5 6 7 -1 -1 1 0 21 + 306 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21 + 318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21 + 317 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 328 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 1 3 1 4 6 -1 -1 2 0 21 + 304 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21 + 302 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 5 3 1 3 5 -1 -1 2 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21 + 319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 313 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 331 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21 + 324 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21 + 311 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21 + 312 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 6 2 1 4 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21 + 326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 314 SM_AMIGA_0_ 3 -1 2 1 2 -1 -1 4 0 21 + 322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 307 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21 + 332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 2 0 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 315 inst_CLK_000_D4 3 -1 2 1 7 -1 -1 1 0 21 + 303 inst_CLK_000_D3 3 -1 2 1 2 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 5 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1 + 13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 5 7 63 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 4 10 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A0 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 7 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 326 3 0 30 -1 8 0 21 + 31 UDS_000 5 325 3 0 31 -1 5 0 21 + 65 E 5 330 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 323 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 321 1 0 6 -1 3 0 21 + 82 BGACK_030 5 328 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 322 7 0 80 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 34 VMA 5 331 3 0 34 -1 2 0 21 + 33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 2 0 21 + 32 AS_000 5 324 3 0 32 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 301 inst_CLK_000_D0 3 -1 4 6 0 1 2 5 6 7 -1 -1 1 0 21 + 297 inst_CLK_000_D1 3 -1 5 5 1 3 5 6 7 -1 -1 1 0 21 + 308 SM_AMIGA_1_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21 + 305 inst_CLK_000_D5 3 -1 7 4 2 5 6 7 -1 -1 1 0 21 + 299 inst_CLK_000_D6 3 -1 5 4 2 5 6 7 -1 -1 1 0 21 + 306 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21 + 318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21 + 317 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 328 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 1 3 1 4 6 -1 -1 2 0 21 + 304 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21 + 302 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 2 0 21 + 300 SM_AMIGA_5_ 3 -1 5 3 1 3 5 -1 -1 2 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21 + 319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 313 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 331 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21 + 324 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21 + 311 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21 + 312 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 6 2 1 4 -1 -1 1 0 21 + 298 inst_CLK_000_D2 3 -1 5 2 2 3 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21 + 326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 314 SM_AMIGA_0_ 3 -1 2 1 2 -1 -1 4 0 21 + 323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 307 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21 + 332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 2 0 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 315 inst_CLK_000_D4 3 -1 2 1 7 -1 -1 1 0 21 + 303 inst_CLK_000_D3 3 -1 2 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1 + 13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 5 7 63 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 4 10 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A0 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 7 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 326 3 0 30 -1 8 0 21 + 31 UDS_000 5 325 3 0 31 -1 5 0 21 + 65 E 5 330 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 322 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 321 1 0 6 -1 3 0 21 + 82 BGACK_030 5 328 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 323 7 0 80 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 34 VMA 5 331 3 0 34 -1 2 1 21 + 33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 2 0 21 + 32 AS_000 5 324 3 0 32 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 297 inst_CLK_000_D0 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D1 3 -1 5 5 1 3 5 6 7 -1 -1 1 0 21 + 308 SM_AMIGA_1_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21 + 305 inst_CLK_000_D5 3 -1 7 4 2 5 6 7 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 5 4 2 5 6 7 -1 -1 1 0 21 + 306 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21 + 318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21 + 317 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 328 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 1 3 1 4 6 -1 -1 2 0 21 + 304 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21 + 302 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 5 3 1 3 5 -1 -1 2 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21 + 319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 313 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 331 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21 + 324 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21 + 311 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21 + 312 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 6 2 1 4 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 5 2 2 3 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21 + 326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 314 SM_AMIGA_0_ 3 -1 2 1 2 -1 -1 4 0 21 + 322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 307 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21 + 332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 2 0 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 315 inst_CLK_000_D4 3 -1 2 1 7 -1 -1 1 0 21 + 303 inst_CLK_000_D3 3 -1 2 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1 + 13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 5 7 63 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 4 10 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A0 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 7 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 326 3 0 30 -1 8 0 21 + 31 UDS_000 5 325 3 0 31 -1 5 0 21 + 65 E 5 330 6 0 65 -1 3 1 21 + 33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 3 0 21 + 8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 323 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 322 1 0 6 -1 3 0 21 + 82 BGACK_030 5 328 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 321 7 0 80 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 34 VMA 5 331 3 0 34 -1 2 1 21 + 32 AS_000 5 324 3 0 32 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 301 inst_CLK_000_D0 3 -1 4 6 0 1 2 5 6 7 -1 -1 1 0 21 + 297 inst_CLK_000_D1 3 -1 5 5 1 3 5 6 7 -1 -1 1 0 21 + 309 SM_AMIGA_1_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21 + 306 inst_CLK_000_D5 3 -1 7 4 2 5 6 7 -1 -1 1 0 21 + 299 inst_CLK_000_D6 3 -1 5 4 2 5 6 7 -1 -1 1 0 21 + 307 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21 + 318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21 + 317 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 328 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21 + 310 CLK_CNT_N_0_ 3 -1 1 3 1 4 6 -1 -1 2 0 21 + 305 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21 + 302 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 2 0 21 + 300 SM_AMIGA_5_ 3 -1 5 3 1 3 5 -1 -1 2 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21 + 303 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 4 0 21 + 319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 314 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 331 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21 + 324 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21 + 312 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21 + 313 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21 + 311 CLK_CNT_N_1_ 3 -1 6 2 1 4 -1 -1 1 0 21 + 298 inst_CLK_000_D2 3 -1 5 2 2 3 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21 + 326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21 + 323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 315 inst_CLK_000_D4 3 -1 2 1 7 -1 -1 1 0 21 + 304 inst_CLK_000_D3 3 -1 2 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1 + 13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 5 7 63 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 4 10 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A0 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 7 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 326 3 0 30 -1 8 0 21 + 31 UDS_000 5 325 3 0 31 -1 5 0 21 + 65 E 5 330 6 0 65 -1 3 1 21 + 33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 3 0 21 + 8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 323 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 322 1 0 6 -1 3 0 21 + 82 BGACK_030 5 328 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 321 7 0 80 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 34 VMA 5 331 3 0 34 -1 2 1 21 + 32 AS_000 5 324 3 0 32 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 301 inst_CLK_000_D0 3 -1 4 6 0 1 2 5 6 7 -1 -1 1 0 21 + 297 inst_CLK_000_D1 3 -1 5 5 1 3 5 6 7 -1 -1 1 0 21 + 309 SM_AMIGA_1_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21 + 306 inst_CLK_000_D4 3 -1 2 4 2 5 6 7 -1 -1 1 0 21 + 299 inst_CLK_000_D6 3 -1 7 4 2 5 6 7 -1 -1 1 0 21 + 307 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21 + 318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21 + 317 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 328 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21 + 310 CLK_CNT_N_0_ 3 -1 1 3 1 4 6 -1 -1 2 0 21 + 305 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21 + 302 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 2 0 21 + 300 SM_AMIGA_5_ 3 -1 5 3 1 3 5 -1 -1 2 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21 + 303 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 4 0 21 + 319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 314 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 331 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21 + 324 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21 + 312 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21 + 313 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21 + 311 CLK_CNT_N_1_ 3 -1 6 2 1 4 -1 -1 1 0 21 + 298 inst_CLK_000_D2 3 -1 5 2 2 3 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21 + 326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21 + 323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 315 inst_CLK_000_D5 3 -1 5 1 7 -1 -1 1 0 21 + 304 inst_CLK_000_D3 3 -1 2 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1 + 13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 5 7 63 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 4 10 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A0 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 7 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 326 3 0 30 -1 8 0 21 + 31 UDS_000 5 325 3 0 31 -1 5 0 21 + 33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 4 0 21 + 65 E 5 330 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21 + 82 BGACK_030 5 328 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 321 7 0 80 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 34 VMA 5 331 3 0 34 -1 2 1 21 + 32 AS_000 5 322 3 0 32 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 301 inst_CLK_000_D0 3 -1 4 6 0 1 2 5 6 7 -1 -1 1 0 21 + 302 SM_AMIGA_1_ 3 -1 6 5 2 3 5 6 7 -1 -1 3 0 21 + 297 inst_CLK_000_D1 3 -1 5 5 1 3 5 6 7 -1 -1 1 0 21 + 307 inst_CLK_000_D5 3 -1 7 4 2 5 6 7 -1 -1 1 0 21 + 299 inst_CLK_000_D6 3 -1 5 4 2 5 6 7 -1 -1 1 0 21 + 308 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21 + 318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21 + 317 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 328 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21 + 310 CLK_CNT_N_0_ 3 -1 1 3 1 4 6 -1 -1 2 0 21 + 306 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21 + 304 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 2 0 21 + 300 SM_AMIGA_5_ 3 -1 5 3 1 3 5 -1 -1 2 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21 + 303 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 4 0 21 + 319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 314 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 331 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21 + 322 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21 + 312 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21 + 313 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21 + 311 CLK_CNT_N_1_ 3 -1 6 2 1 4 -1 -1 1 0 21 + 298 inst_CLK_000_D2 3 -1 5 2 2 3 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21 + 326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 4 0 21 + 324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 309 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 315 inst_CLK_000_D4 3 -1 2 1 7 -1 -1 1 0 21 + 305 inst_CLK_000_D3 3 -1 2 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1 + 13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 5 7 63 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 4 10 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A0 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 7 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +100 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 325 3 0 30 -1 8 0 21 + 31 UDS_000 5 324 3 0 31 -1 5 0 21 + 33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 4 0 21 + 65 E 5 331 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21 + 82 BGACK_030 5 329 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 322 7 0 80 -1 2 0 21 + 77 FPU_CS 5 330 7 0 77 -1 2 0 21 + 34 VMA 5 332 3 0 34 -1 2 1 21 + 32 AS_000 5 323 3 0 32 -1 2 0 21 + 28 BG_000 5 328 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 301 inst_CLK_000_D0 3 -1 2 6 0 1 2 5 6 7 -1 -1 1 0 21 + 297 inst_CLK_000_D1 3 -1 5 5 1 2 3 6 7 -1 -1 1 0 21 + 318 cpu_est_1_ 3 -1 6 4 0 2 3 6 -1 -1 4 0 21 + 331 RN_E 3 65 6 4 0 2 3 6 65 -1 3 1 21 + 302 SM_AMIGA_1_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21 + 304 SM_AMIGA_6_ 3 -1 5 4 2 3 5 6 -1 -1 2 0 21 + 308 SM_AMIGA_7_ 3 -1 6 3 3 5 6 -1 -1 5 0 21 + 303 SM_AMIGA_0_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 + 319 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 1 21 + 317 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 + 330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 329 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21 + 323 RN_AS_000 3 32 3 3 2 3 6 32 -1 2 0 21 + 300 SM_AMIGA_5_ 3 -1 2 3 0 2 3 -1 -1 2 0 21 + 307 inst_CLK_000_D5 3 -1 6 3 2 5 7 -1 -1 1 0 21 + 299 inst_CLK_000_D6 3 -1 5 3 2 5 7 -1 -1 1 0 21 + 298 inst_CLK_000_D2 3 -1 7 3 3 5 6 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 5 6 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21 + 314 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 332 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21 + 312 CLK_CNT_P_0_ 3 -1 4 2 1 4 -1 -1 2 0 21 + 310 CLK_CNT_N_0_ 3 -1 1 2 1 4 -1 -1 2 0 21 + 306 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 313 CLK_CNT_P_1_ 3 -1 4 2 1 4 -1 -1 1 0 21 + 305 inst_CLK_000_D3 3 -1 5 2 5 6 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 + 325 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 324 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 4 0 21 + 327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 309 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21 + 328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21 + 320 DSACK_0__0 3 -1 7 1 7 -1 -1 1 0 21 + 315 inst_CLK_000_D4 3 -1 5 1 6 -1 -1 1 0 21 + 311 CLK_CNT_N_1_ 3 -1 4 1 1 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1 + 13 nEXP_SPACE 1 -1 -1 4 3 5 6 7 13 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 5 7 63 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 2 3 10 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A0 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +106 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 326 7 4 1 3 5 7 81 -1 3 0 21 + 30 LDS_000 5 331 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 329 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 327 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 328 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 323 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 325 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21 + 68 A0 5 333 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 1 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 339 3 0 33 -1 9 0 21 + 65 E 5 337 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 324 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21 + 82 BGACK_030 5 335 7 0 82 -1 2 0 21 + 77 FPU_CS 5 336 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 338 3 0 34 -1 2 1 21 + 28 BG_000 5 334 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 335 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21 + 302 inst_CLK_000_D0 3 -1 4 6 0 1 2 5 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D1 3 -1 7 5 1 3 5 6 7 -1 -1 1 0 21 + 303 SM_AMIGA_1_ 3 -1 2 4 2 3 5 7 -1 -1 3 0 21 + 305 SM_AMIGA_6_ 3 -1 5 4 0 2 3 5 -1 -1 2 0 21 + 294 inst_BGACK_030_INT_D 3 -1 5 4 0 3 6 7 -1 -1 1 0 21 + 314 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21 + 319 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21 + 337 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21 + 336 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 315 SM_AMIGA_4_ 3 -1 0 3 0 2 3 -1 -1 2 0 21 + 307 inst_CLK_000_D5 3 -1 0 3 2 5 7 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 7 3 2 5 7 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 5 3 2 3 5 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21 + 304 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 4 0 21 + 326 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21 + 320 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 318 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 317 SM_AMIGA_2_ 3 -1 1 2 1 2 -1 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 2 2 1 2 -1 -1 3 0 21 + 338 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21 + 327 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21 + 311 CLK_CNT_P_0_ 3 -1 0 2 0 2 -1 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 4 2 0 4 -1 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 1 2 1 2 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 1 2 1 2 -1 -1 2 0 21 + 310 CLK_CNT_N_1_ 3 -1 4 2 0 4 -1 -1 1 0 21 + 306 inst_CLK_000_D3 3 -1 5 2 2 5 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 4 2 1 3 -1 -1 1 0 21 + 339 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 331 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 329 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 328 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 324 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 323 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 334 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 333 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 325 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 321 DSACK_0__0 3 -1 5 1 7 -1 -1 1 0 21 + 313 inst_CLK_000_D4 3 -1 5 1 0 -1 -1 1 0 21 + 312 CLK_CNT_P_1_ 3 -1 2 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1 + 63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 4 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 4 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +106 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 326 7 4 2 3 5 7 81 -1 3 0 21 + 30 LDS_000 5 330 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 329 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 327 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 328 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 322 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 325 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 324 6 1 3 69 -1 2 0 21 + 68 A0 5 331 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 2 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 339 3 0 33 -1 9 0 21 + 65 E 5 337 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 323 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 335 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 333 1 0 6 -1 3 0 21 + 82 BGACK_030 5 334 7 0 82 -1 2 0 21 + 77 FPU_CS 5 336 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 338 3 0 34 -1 2 1 21 + 28 BG_000 5 332 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 334 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21 + 302 inst_CLK_000_D0 3 -1 4 6 0 1 2 5 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D1 3 -1 5 5 1 2 3 6 7 -1 -1 1 0 21 + 326 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 303 SM_AMIGA_1_ 3 -1 0 4 0 3 5 7 -1 -1 3 0 21 + 305 SM_AMIGA_6_ 3 -1 1 4 1 2 3 5 -1 -1 2 0 21 + 299 inst_CLK_000_D2 3 -1 7 4 0 1 3 5 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 1 4 0 3 6 7 -1 -1 1 0 21 + 314 SM_AMIGA_7_ 3 -1 5 3 1 3 5 -1 -1 5 0 21 + 319 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 + 337 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21 + 320 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 1 21 + 318 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 3 0 21 + 336 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 311 CLK_CNT_P_0_ 3 -1 4 3 1 4 6 -1 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 2 3 1 2 4 -1 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 2 3 0 2 3 -1 -1 2 0 21 + 307 inst_CLK_000_D5 3 -1 5 3 0 5 7 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 7 3 0 5 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 1 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21 + 304 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 4 0 21 + 308 SM_AMIGA_3_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 338 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21 + 327 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 21 + 315 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 2 2 0 2 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 2 2 0 2 -1 -1 2 0 21 + 312 CLK_CNT_P_1_ 3 -1 6 2 1 4 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 4 2 1 2 -1 -1 1 0 21 + 306 inst_CLK_000_D3 3 -1 0 2 1 5 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21 + 339 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 330 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 329 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 328 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 335 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 322 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 317 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 3 0 21 + 332 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 331 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 325 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 324 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 321 DSACK_0__0 3 -1 5 1 7 -1 -1 1 0 21 + 313 inst_CLK_000_D4 3 -1 5 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1 + 63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 4 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 4 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +105 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 325 7 4 2 3 5 7 81 -1 3 0 21 + 30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 327 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 324 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21 + 68 A0 5 330 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 2 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 338 3 0 33 -1 9 0 21 + 65 E 5 336 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 323 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 333 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21 + 82 BGACK_030 5 334 7 0 82 -1 2 0 21 + 77 FPU_CS 5 335 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 337 3 0 34 -1 2 1 21 + 28 BG_000 5 332 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 334 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21 + 302 inst_CLK_000_D0 3 -1 0 6 0 1 2 5 6 7 -1 -1 1 0 21 + 325 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 303 SM_AMIGA_1_ 3 -1 2 4 2 3 5 7 -1 -1 3 0 21 + 305 SM_AMIGA_6_ 3 -1 5 4 1 2 3 5 -1 -1 2 0 21 + 298 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 5 4 0 3 6 7 -1 -1 1 0 21 + 313 SM_AMIGA_7_ 3 -1 1 3 1 3 5 -1 -1 5 0 21 + 318 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 + 304 SM_AMIGA_0_ 3 -1 2 3 1 2 3 -1 -1 4 0 21 + 336 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21 + 317 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21 + 335 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 326 RN_AS_000 3 32 3 3 1 2 3 32 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 2 3 0 2 3 -1 -1 2 0 21 + 307 inst_CLK_000_D4 3 -1 5 3 2 5 7 -1 -1 1 0 21 + 300 inst_CLK_000_D5 3 -1 5 3 2 5 7 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 6 3 1 3 5 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 1 5 -1 -1 7 0 21 + 315 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21 + 319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 316 SM_AMIGA_2_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 337 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21 + 314 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 4 2 4 5 -1 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 2 2 0 2 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 2 2 0 2 -1 -1 2 0 21 + 306 inst_CLK_000_D3 3 -1 5 2 1 5 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21 + 338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 332 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 330 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 311 CLK_CNT_P_0_ 3 -1 4 1 4 -1 -1 2 0 21 + 320 DSACK_0__0 3 -1 7 1 7 -1 -1 1 0 21 + 312 CLK_CNT_P_1_ 3 -1 4 1 4 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 5 1 4 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1 + 63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 0 3 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +106 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 325 7 5 2 3 4 5 7 81 -1 3 0 21 + 30 LDS_000 5 331 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 329 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 327 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 322 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 324 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 339 6 1 3 69 -1 2 0 21 + 68 A0 5 332 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 2 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 338 3 0 33 -1 9 0 21 + 65 E 5 336 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 323 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21 + 82 BGACK_030 5 334 7 0 82 -1 2 0 21 + 77 FPU_CS 5 335 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 337 3 0 34 -1 2 1 21 + 28 BG_000 5 333 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 334 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21 + 302 inst_CLK_000_D0 3 -1 1 6 0 1 2 5 6 7 -1 -1 1 0 21 + 303 SM_AMIGA_1_ 3 -1 6 5 0 3 5 6 7 -1 -1 2 0 21 + 298 inst_CLK_000_D1 3 -1 7 5 1 2 3 6 7 -1 -1 1 0 21 + 325 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 294 inst_BGACK_030_INT_D 3 -1 5 4 0 3 6 7 -1 -1 1 0 21 + 314 SM_AMIGA_7_ 3 -1 0 3 0 3 5 -1 -1 5 0 21 + 319 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 + 336 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21 + 320 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 1 21 + 318 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 3 0 21 + 335 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 315 SM_AMIGA_4_ 3 -1 0 3 0 2 3 -1 -1 2 0 21 + 305 SM_AMIGA_6_ 3 -1 5 3 0 3 5 -1 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 5 3 0 3 5 -1 -1 2 0 21 + 299 inst_CLK_000_D2 3 -1 7 3 0 3 5 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 0 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21 + 317 SM_AMIGA_2_ 3 -1 2 2 2 6 -1 -1 3 0 21 + 304 SM_AMIGA_0_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 337 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21 + 326 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21 + 311 CLK_CNT_P_0_ 3 -1 4 2 1 4 -1 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 1 2 0 1 -1 -1 2 0 21 + 312 CLK_CNT_P_1_ 3 -1 4 2 1 4 -1 -1 1 0 21 + 307 inst_CLK_000_D5 3 -1 5 2 5 7 -1 -1 1 0 21 + 306 inst_CLK_000_D3 3 -1 0 2 0 5 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 5 2 5 7 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21 + 338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 331 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 329 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 322 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 3 0 21 + 339 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 333 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 332 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21 + 321 DSACK_0__0 3 -1 4 1 7 -1 -1 1 0 21 + 313 inst_CLK_000_D4 3 -1 5 1 5 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 0 1 1 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1 + 63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 1 3 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 4 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +103 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 324 7 5 2 3 4 5 7 81 -1 3 0 21 + 30 LDS_000 5 328 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 327 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 325 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 326 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 319 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 336 6 1 3 69 -1 2 0 21 + 68 A0 5 329 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 2 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 335 3 0 33 -1 9 0 21 + 65 E 5 333 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 323 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 322 1 0 6 -1 3 0 21 + 82 BGACK_030 5 331 7 0 82 -1 2 0 21 + 77 FPU_CS 5 332 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 334 3 0 34 -1 2 1 21 + 28 BG_000 5 330 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 331 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 299 inst_CLK_000_D1 3 -1 5 5 1 3 4 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D0 3 -1 0 5 1 2 5 6 7 -1 -1 1 0 21 + 311 SM_AMIGA_7_ 3 -1 1 4 1 2 3 5 -1 -1 5 0 21 + 324 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 304 SM_AMIGA_6_ 3 -1 2 4 1 2 3 5 -1 -1 2 0 21 + 302 SM_AMIGA_1_ 3 -1 5 4 1 3 5 7 -1 -1 2 0 21 + 300 inst_CLK_000_D2 3 -1 4 4 1 2 3 4 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 3 1 2 5 -1 -1 7 0 21 + 316 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 + 333 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21 + 332 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 312 SM_AMIGA_4_ 3 -1 5 3 2 3 5 -1 -1 2 0 21 + 313 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21 + 317 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 315 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 314 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 303 SM_AMIGA_0_ 3 -1 1 2 1 3 -1 -1 3 0 21 + 334 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21 + 325 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21 + 309 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 5 2 3 5 -1 -1 2 0 21 + 305 inst_CLK_000_D3 3 -1 4 2 1 2 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 5 2 2 3 -1 -1 1 0 21 + 335 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 328 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 327 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 326 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 319 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 306 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 3 0 21 + 336 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 330 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 329 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 307 CLK_CNT_N_0_ 3 -1 0 1 0 -1 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21 + 318 DSACK_0__0 3 -1 4 1 7 -1 -1 1 0 21 + 310 CLK_CNT_P_1_ 3 -1 4 1 0 -1 -1 1 0 21 + 308 CLK_CNT_N_1_ 3 -1 0 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 0 3 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +105 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 324 7 4 1 3 5 7 81 -1 3 0 21 + 30 LDS_000 5 330 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 329 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 325 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 327 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 338 6 1 3 69 -1 2 0 21 + 68 A0 5 331 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 1 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 337 3 0 33 -1 9 0 21 + 65 E 5 335 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 322 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21 + 82 BGACK_030 5 333 7 0 82 -1 2 0 21 + 77 FPU_CS 5 334 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 336 3 0 34 -1 2 1 21 + 28 BG_000 5 332 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 302 inst_CLK_000_D0 3 -1 4 6 0 1 2 5 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D1 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 + 333 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 324 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 318 cpu_est_0_ 3 -1 0 4 0 1 3 6 -1 -1 3 0 21 + 305 SM_AMIGA_6_ 3 -1 5 4 0 2 3 5 -1 -1 2 0 21 + 303 SM_AMIGA_1_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21 + 294 inst_BGACK_030_INT_D 3 -1 4 4 0 3 6 7 -1 -1 1 0 21 + 314 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21 + 319 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21 + 335 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21 + 320 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 1 21 + 334 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 0 3 0 2 3 -1 -1 2 0 21 + 307 inst_CLK_000_D5 3 -1 6 3 0 5 7 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 5 3 2 3 5 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21 + 317 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 2 2 1 2 -1 -1 3 0 21 + 304 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 3 0 21 + 336 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21 + 325 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21 + 315 SM_AMIGA_4_ 3 -1 2 2 2 3 -1 -1 2 0 21 + 311 CLK_CNT_P_0_ 3 -1 4 2 0 4 -1 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 0 2 0 5 -1 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 1 2 1 2 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 1 2 1 2 -1 -1 2 0 21 + 312 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21 + 306 inst_CLK_000_D3 3 -1 5 2 2 5 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 0 2 5 7 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 6 2 1 3 -1 -1 1 0 21 + 337 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 330 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 329 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 338 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 332 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 331 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 313 inst_CLK_000_D4 3 -1 5 1 6 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 5 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1 + 63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 4 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +105 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 325 7 4 2 3 5 7 81 -1 3 0 21 + 30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 327 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 324 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21 + 68 A0 5 330 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 2 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 338 3 0 33 -1 9 0 21 + 65 E 5 336 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 323 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21 + 82 BGACK_030 5 334 7 0 82 -1 2 0 21 + 77 FPU_CS 5 335 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 337 3 0 34 -1 2 1 21 + 28 BG_000 5 333 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 302 inst_CLK_000_D0 3 -1 5 6 0 1 2 5 6 7 -1 -1 1 0 21 + 303 SM_AMIGA_1_ 3 -1 0 5 0 2 3 5 7 -1 -1 3 0 21 + 334 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 298 inst_CLK_000_D1 3 -1 7 5 1 3 4 6 7 -1 -1 1 0 21 + 325 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 307 inst_CLK_000_D5 3 -1 4 4 0 2 5 7 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 5 4 0 2 5 7 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 0 4 0 3 6 7 -1 -1 1 0 21 + 314 SM_AMIGA_7_ 3 -1 1 3 1 3 5 -1 -1 5 0 21 + 319 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 + 304 SM_AMIGA_0_ 3 -1 2 3 1 2 3 -1 -1 4 0 21 + 336 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21 + 318 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21 + 335 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 326 RN_AS_000 3 32 3 3 1 2 3 32 -1 2 0 21 + 315 SM_AMIGA_4_ 3 -1 5 3 2 3 5 -1 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 4 3 0 4 6 -1 -1 2 0 21 + 305 SM_AMIGA_6_ 3 -1 1 3 1 3 5 -1 -1 2 0 21 + 299 inst_CLK_000_D2 3 -1 4 3 0 1 3 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 1 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21 + 320 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 317 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 3 0 21 + 337 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21 + 311 CLK_CNT_P_0_ 3 -1 5 2 0 5 -1 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 5 2 3 5 -1 -1 2 0 21 + 312 CLK_CNT_P_1_ 3 -1 5 2 0 5 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 6 2 0 4 -1 -1 1 0 21 + 306 inst_CLK_000_D3 3 -1 0 2 0 1 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21 + 338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 3 0 21 + 333 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 330 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21 + 313 inst_CLK_000_D4 3 -1 0 1 4 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1 + 63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 5 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 4 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +105 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21 + 81 AS_030 5 325 7 2 3 7 81 -1 3 0 21 + 97 DS_030 5 327 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21 + 69 SIZE_0_ 5 323 6 1 3 69 -1 2 0 21 + 68 A0 5 330 6 1 3 68 -1 2 0 21 + 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 9 0 21 + 65 E 0 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 0 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 3 0 21 + 82 BGACK_030 0 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 324 7 0 80 -1 2 0 21 + 77 FPU_CS 0 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 0 3 0 34 -1 2 1 21 + 28 BG_000 0 3 0 28 -1 2 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 79 DSACK_0_ 0 -1 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 -1 0 40 -1 1 0 21 + 29 DTACK 0 -1 0 29 -1 1 0 21 + 21 AVEC_EXP 0 -1 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 299 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21 + 325 RN_AS_030 3 81 7 3 0 6 7 81 -1 3 0 21 + 319 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21 + 316 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21 + 336 RN_E 3 65 6 2 3 6 65 -1 3 1 21 + 320 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21 + 318 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21 + 303 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21 + 338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 314 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21 + 304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21 + 334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 337 RN_VMA 3 34 3 1 3 34 -1 2 1 21 + 335 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21 + 331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 330 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 326 RN_AS_000 3 32 3 1 3 32 -1 2 0 21 + 324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 323 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 315 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21 + 305 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21 + 302 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21 + 307 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21 + 301 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21 + 300 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 + 317 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21 + 311 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 313 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21 + 312 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21 + 306 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 63 CLK_030 1 -1 -1 3 0 6 7 63 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 + 35 VPA 1 -1 -1 0 35 -1 +105 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21 + 81 AS_030 5 325 7 2 3 7 81 -1 3 0 21 + 97 DS_030 5 327 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21 + 69 SIZE_0_ 5 323 6 1 3 69 -1 2 0 21 + 68 A0 5 330 6 1 3 68 -1 2 0 21 + 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 9 0 21 + 65 E 0 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 0 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 3 0 21 + 82 BGACK_030 0 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 324 7 0 80 -1 2 0 21 + 77 FPU_CS 0 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 0 3 0 34 -1 2 1 21 + 28 BG_000 0 3 0 28 -1 2 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 79 DSACK_0_ 0 -1 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 -1 0 40 -1 1 0 21 + 29 DTACK 0 -1 0 29 -1 1 0 21 + 21 AVEC_EXP 0 -1 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 299 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21 + 325 RN_AS_030 3 81 7 3 0 6 7 81 -1 3 0 21 + 319 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21 + 316 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21 + 336 RN_E 3 65 6 2 3 6 65 -1 3 1 21 + 320 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21 + 318 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21 + 303 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21 + 338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 314 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21 + 304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21 + 334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 337 RN_VMA 3 34 3 1 3 34 -1 2 1 21 + 335 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21 + 331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 330 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 326 RN_AS_000 3 32 3 1 3 32 -1 2 0 21 + 324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 323 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 315 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21 + 305 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21 + 302 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21 + 307 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21 + 301 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21 + 300 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 + 317 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21 + 311 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 313 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21 + 312 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21 + 306 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 63 CLK_030 1 -1 -1 3 0 6 7 63 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 + 35 VPA 1 -1 -1 0 35 -1 +105 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 325 7 4 2 3 5 7 81 -1 3 0 21 + 30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 327 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 324 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 323 6 1 3 69 -1 2 0 21 + 68 A0 5 330 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 2 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 338 3 0 33 -1 9 0 21 + 65 E 5 336 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 322 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 334 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 333 1 0 6 -1 3 0 21 + 82 BGACK_030 5 332 7 0 82 -1 2 0 21 + 77 FPU_CS 5 335 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 337 3 0 34 -1 2 1 21 + 28 BG_000 5 331 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 302 inst_CLK_000_D0 3 -1 5 6 0 1 2 5 6 7 -1 -1 1 0 21 + 303 SM_AMIGA_1_ 3 -1 0 5 0 2 3 5 7 -1 -1 3 0 21 + 332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 298 inst_CLK_000_D1 3 -1 7 5 1 3 4 6 7 -1 -1 1 0 21 + 325 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 307 inst_CLK_000_D5 3 -1 4 4 0 2 5 7 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 5 4 0 2 5 7 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 0 4 0 3 6 7 -1 -1 1 0 21 + 314 SM_AMIGA_7_ 3 -1 1 3 1 3 5 -1 -1 5 0 21 + 319 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 + 304 SM_AMIGA_0_ 3 -1 2 3 1 2 3 -1 -1 4 0 21 + 336 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21 + 318 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21 + 335 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 326 RN_AS_000 3 32 3 3 1 2 3 32 -1 2 0 21 + 315 SM_AMIGA_4_ 3 -1 5 3 2 3 5 -1 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 4 3 0 4 6 -1 -1 2 0 21 + 305 SM_AMIGA_6_ 3 -1 1 3 1 3 5 -1 -1 2 0 21 + 299 inst_CLK_000_D2 3 -1 4 3 0 1 3 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 1 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21 + 320 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 317 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 3 0 21 + 337 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21 + 311 CLK_CNT_P_0_ 3 -1 5 2 0 5 -1 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 5 2 3 5 -1 -1 2 0 21 + 312 CLK_CNT_P_1_ 3 -1 5 2 0 5 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 6 2 0 4 -1 -1 1 0 21 + 306 inst_CLK_000_D3 3 -1 0 2 0 1 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21 + 338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 3 0 21 + 331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 330 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 323 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21 + 313 inst_CLK_000_D4 3 -1 0 1 4 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1 + 63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 5 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 4 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +105 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 325 7 4 2 3 5 7 81 -1 3 0 21 + 30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 327 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 324 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 323 6 1 3 69 -1 2 0 21 + 68 A0 5 330 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 2 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 338 3 0 33 -1 9 0 21 + 65 E 5 336 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 322 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 334 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 333 1 0 6 -1 3 0 21 + 82 BGACK_030 5 332 7 0 82 -1 2 0 21 + 77 FPU_CS 5 335 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 337 3 0 34 -1 2 1 21 + 28 BG_000 5 331 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 302 inst_CLK_000_D0 3 -1 5 6 0 1 2 5 6 7 -1 -1 1 0 21 + 303 SM_AMIGA_1_ 3 -1 0 5 0 2 3 5 7 -1 -1 3 0 21 + 332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 298 inst_CLK_000_D1 3 -1 7 5 1 3 4 6 7 -1 -1 1 0 21 + 325 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 307 inst_CLK_000_D5 3 -1 4 4 0 2 5 7 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 5 4 0 2 5 7 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 0 4 0 3 6 7 -1 -1 1 0 21 + 314 SM_AMIGA_7_ 3 -1 1 3 1 3 5 -1 -1 5 0 21 + 319 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 + 304 SM_AMIGA_0_ 3 -1 2 3 1 2 3 -1 -1 4 0 21 + 336 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21 + 318 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21 + 335 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 326 RN_AS_000 3 32 3 3 1 2 3 32 -1 2 0 21 + 315 SM_AMIGA_4_ 3 -1 5 3 2 3 5 -1 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 4 3 0 4 6 -1 -1 2 0 21 + 305 SM_AMIGA_6_ 3 -1 1 3 1 3 5 -1 -1 2 0 21 + 299 inst_CLK_000_D2 3 -1 4 3 0 1 3 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 1 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21 + 320 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 317 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 3 0 21 + 337 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21 + 311 CLK_CNT_P_0_ 3 -1 5 2 0 5 -1 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 5 2 3 5 -1 -1 2 0 21 + 312 CLK_CNT_P_1_ 3 -1 5 2 0 5 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 6 2 0 4 -1 -1 1 0 21 + 306 inst_CLK_000_D3 3 -1 0 2 0 1 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21 + 338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 3 0 21 + 331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 330 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 323 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21 + 313 inst_CLK_000_D4 3 -1 0 1 4 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1 + 63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 5 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 4 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +105 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21 + 81 AS_030 5 325 7 2 3 7 81 -1 3 0 21 + 97 DS_030 5 327 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21 + 69 SIZE_0_ 5 324 6 1 3 69 -1 2 0 21 + 68 A0 5 330 6 1 3 68 -1 2 0 21 + 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 9 0 21 + 65 E 0 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 0 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 3 0 21 + 82 BGACK_030 0 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 323 7 0 80 -1 2 0 21 + 77 FPU_CS 0 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 0 3 0 34 -1 2 1 21 + 28 BG_000 0 3 0 28 -1 2 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 79 DSACK_0_ 0 -1 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 -1 0 40 -1 1 0 21 + 29 DTACK 0 -1 0 29 -1 1 0 21 + 21 AVEC_EXP 0 -1 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 299 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21 + 325 RN_AS_030 3 81 7 3 0 6 7 81 -1 3 0 21 + 319 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21 + 316 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21 + 336 RN_E 3 65 6 2 3 6 65 -1 3 1 21 + 320 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21 + 318 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21 + 303 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21 + 338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 314 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21 + 304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21 + 334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 337 RN_VMA 3 34 3 1 3 34 -1 2 1 21 + 335 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21 + 331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 330 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 326 RN_AS_000 3 32 3 1 3 32 -1 2 0 21 + 324 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 315 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21 + 305 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21 + 302 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21 + 307 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21 + 301 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21 + 300 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 + 317 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21 + 311 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 313 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21 + 312 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21 + 306 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 63 CLK_030 1 -1 -1 3 0 6 7 63 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 + 35 VPA 1 -1 -1 0 35 -1 +105 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21 + 81 AS_030 5 325 7 2 3 7 81 -1 3 0 21 + 97 DS_030 5 327 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21 + 69 SIZE_0_ 5 324 6 1 3 69 -1 2 0 21 + 68 A0 5 330 6 1 3 68 -1 2 0 21 + 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 9 0 21 + 65 E 0 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 0 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 3 0 21 + 82 BGACK_030 0 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 323 7 0 80 -1 2 0 21 + 77 FPU_CS 0 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 0 3 0 34 -1 2 1 21 + 28 BG_000 0 3 0 28 -1 2 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 79 DSACK_0_ 0 -1 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 -1 0 40 -1 1 0 21 + 29 DTACK 0 -1 0 29 -1 1 0 21 + 21 AVEC_EXP 0 -1 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 299 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21 + 325 RN_AS_030 3 81 7 3 0 6 7 81 -1 3 0 21 + 319 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21 + 316 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21 + 336 RN_E 3 65 6 2 3 6 65 -1 3 1 21 + 320 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21 + 318 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21 + 303 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21 + 338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 314 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21 + 304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21 + 334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 337 RN_VMA 3 34 3 1 3 34 -1 2 1 21 + 335 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21 + 331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 330 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 326 RN_AS_000 3 32 3 1 3 32 -1 2 0 21 + 324 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 315 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21 + 305 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21 + 302 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21 + 307 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21 + 301 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21 + 300 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 + 317 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21 + 311 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 313 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21 + 312 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21 + 306 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 63 CLK_030 1 -1 -1 3 0 6 7 63 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 + 35 VPA 1 -1 -1 0 35 -1 +105 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21 + 81 AS_030 5 325 7 2 3 7 81 -1 3 0 21 + 97 DS_030 5 327 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21 + 69 SIZE_0_ 5 324 6 1 3 69 -1 2 0 21 + 68 A0 5 330 6 1 3 68 -1 2 0 21 + 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 9 0 21 + 65 E 0 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 0 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 3 0 21 + 82 BGACK_030 0 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 323 7 0 80 -1 2 0 21 + 77 FPU_CS 0 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 0 3 0 34 -1 2 1 21 + 28 BG_000 0 3 0 28 -1 2 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 79 DSACK_0_ 0 -1 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 -1 0 40 -1 1 0 21 + 29 DTACK 0 -1 0 29 -1 1 0 21 + 21 AVEC_EXP 0 -1 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 299 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21 + 325 RN_AS_030 3 81 7 3 0 6 7 81 -1 3 0 21 + 319 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21 + 316 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21 + 336 RN_E 3 65 6 2 3 6 65 -1 3 1 21 + 320 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21 + 318 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21 + 303 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21 + 338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 314 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21 + 304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21 + 334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 337 RN_VMA 3 34 3 1 3 34 -1 2 1 21 + 335 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21 + 331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 330 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 326 RN_AS_000 3 32 3 1 3 32 -1 2 0 21 + 324 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 315 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21 + 305 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21 + 302 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21 + 307 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21 + 301 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21 + 300 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 + 317 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21 + 311 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 313 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21 + 312 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21 + 306 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 63 CLK_030 1 -1 -1 3 0 6 7 63 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 + 35 VPA 1 -1 -1 0 35 -1 +105 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21 + 81 AS_030 5 325 7 2 3 7 81 -1 3 0 21 + 97 DS_030 5 327 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21 + 69 SIZE_0_ 5 324 6 1 3 69 -1 2 0 21 + 68 A0 5 330 6 1 3 68 -1 2 0 21 + 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 9 0 21 + 65 E 0 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 0 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 3 0 21 + 82 BGACK_030 0 7 0 82 -1 2 0 21 + 80 DSACK_1_ 5 323 7 0 80 -1 2 0 21 + 77 FPU_CS 0 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 0 3 0 34 -1 2 1 21 + 28 BG_000 0 3 0 28 -1 2 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 79 DSACK_0_ 0 -1 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 -1 0 40 -1 1 0 21 + 29 DTACK 0 -1 0 29 -1 1 0 21 + 21 AVEC_EXP 0 -1 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 299 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D0a 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21 + 325 RN_AS_030 3 81 7 3 0 6 7 81 -1 3 0 21 + 319 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21 + 316 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21 + 336 RN_E 3 65 6 2 3 6 65 -1 3 1 21 + 320 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21 + 318 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21 + 303 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21 + 338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 314 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21 + 304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21 + 334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 337 RN_VMA 3 34 3 1 3 34 -1 2 1 21 + 335 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21 + 331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 330 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 326 RN_AS_000 3 32 3 1 3 32 -1 2 0 21 + 324 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 315 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21 + 305 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21 + 302 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21 + 307 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21 + 301 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21 + 300 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 + 317 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21 + 311 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 313 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21 + 312 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21 + 306 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 63 CLK_030 1 -1 -1 3 0 6 7 63 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 + 35 VPA 1 -1 -1 0 35 -1 +105 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 325 7 4 2 3 5 7 81 -1 3 0 21 + 30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 327 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 324 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21 + 68 A0 5 330 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 2 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 338 3 0 33 -1 9 0 21 + 65 E 5 336 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 323 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21 + 82 BGACK_030 5 334 7 0 82 -1 2 0 21 + 77 FPU_CS 5 335 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 337 3 0 34 -1 2 1 21 + 28 BG_000 5 333 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 302 inst_CLK_000_D0 3 -1 5 6 0 1 2 5 6 7 -1 -1 1 0 21 + 303 SM_AMIGA_1_ 3 -1 0 5 0 2 3 5 7 -1 -1 3 0 21 + 334 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 298 inst_CLK_000_D1 3 -1 7 5 1 3 4 6 7 -1 -1 1 0 21 + 325 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 307 inst_CLK_000_D5 3 -1 4 4 0 2 5 7 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 5 4 0 2 5 7 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 0 4 0 3 6 7 -1 -1 1 0 21 + 314 SM_AMIGA_7_ 3 -1 1 3 1 3 5 -1 -1 5 0 21 + 319 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 + 304 SM_AMIGA_0_ 3 -1 2 3 1 2 3 -1 -1 4 0 21 + 336 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21 + 318 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21 + 335 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 326 RN_AS_000 3 32 3 3 1 2 3 32 -1 2 0 21 + 315 SM_AMIGA_4_ 3 -1 5 3 2 3 5 -1 -1 2 0 21 + 309 CLK_CNT_N_0_ 3 -1 4 3 0 4 6 -1 -1 2 0 21 + 305 SM_AMIGA_6_ 3 -1 1 3 1 3 5 -1 -1 2 0 21 + 299 inst_CLK_000_D2 3 -1 4 3 0 1 3 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 1 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21 + 320 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 317 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 3 0 21 + 337 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21 + 311 CLK_CNT_P_0_ 3 -1 5 2 0 5 -1 -1 2 0 21 + 301 SM_AMIGA_5_ 3 -1 5 2 3 5 -1 -1 2 0 21 + 312 CLK_CNT_P_1_ 3 -1 5 2 0 5 -1 -1 1 0 21 + 310 CLK_CNT_N_1_ 3 -1 6 2 0 4 -1 -1 1 0 21 + 306 inst_CLK_000_D3 3 -1 0 2 0 1 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21 + 338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 308 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 3 0 21 + 333 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 330 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21 + 313 inst_CLK_000_D4 3 -1 0 1 4 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1 + 63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 5 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 4 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +105 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 325 7 4 1 2 3 7 81 -1 3 0 21 + 30 LDS_000 5 330 3 3 0 6 7 30 -1 8 0 21 + 31 UDS_000 5 329 3 3 0 6 7 31 -1 5 0 21 + 32 AS_000 5 327 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 328 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 338 6 1 3 69 -1 2 0 21 + 68 A0 5 331 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 1 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 337 3 0 33 -1 9 0 21 + 65 E 5 335 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 322 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 326 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 324 1 0 6 -1 3 0 21 + 82 BGACK_030 5 333 7 0 82 -1 2 0 21 + 77 FPU_CS 5 334 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 336 3 0 34 -1 2 0 21 + 28 BG_000 5 332 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 298 inst_CLK_000_D0 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 333 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 299 inst_CLK_000_D1 3 -1 7 5 1 4 5 6 7 -1 -1 1 0 21 + 325 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 304 SM_AMIGA_1_ 3 -1 2 4 2 3 5 7 -1 -1 3 0 21 + 306 SM_AMIGA_6_ 3 -1 5 4 0 2 3 5 -1 -1 2 0 21 + 294 inst_BGACK_030_INT_D 3 -1 0 4 0 3 6 7 -1 -1 1 0 21 + 302 SM_AMIGA_7_ 3 -1 5 3 2 3 5 -1 -1 5 0 21 + 319 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21 + 318 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 334 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 315 SM_AMIGA_4_ 3 -1 0 3 0 3 5 -1 -1 2 0 21 + 310 CLK_CNT_N_0_ 3 -1 6 3 0 4 6 -1 -1 2 0 21 + 308 inst_CLK_000_D5 3 -1 5 3 2 5 7 -1 -1 1 0 21 + 301 inst_CLK_000_D6 3 -1 2 3 2 5 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 + 316 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21 + 305 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 4 0 21 + 335 RN_E 3 65 6 2 1 6 65 -1 3 1 21 + 317 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 309 SM_AMIGA_3_ 3 -1 5 2 1 5 -1 -1 3 0 21 + 336 RN_VMA 3 34 3 2 1 3 34 -1 2 0 21 + 327 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 21 + 312 CLK_CNT_P_0_ 3 -1 0 2 0 1 -1 -1 2 0 21 + 303 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 296 inst_VPA_SYNC 3 -1 1 2 1 5 -1 -1 2 0 21 + 295 inst_DTACK_SYNC 3 -1 1 2 1 5 -1 -1 2 0 21 + 311 CLK_CNT_N_1_ 3 -1 4 2 0 6 -1 -1 1 0 21 + 307 inst_CLK_000_D3 3 -1 2 2 4 5 -1 -1 1 0 21 + 300 inst_CLK_000_D2 3 -1 4 2 2 5 -1 -1 1 0 21 + 297 inst_VPA_D 3 -1 2 2 1 3 -1 -1 1 0 21 + 337 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21 + 330 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21 + 329 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21 + 328 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 320 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21 + 338 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 332 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 331 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 314 inst_CLK_000_D4 3 -1 4 1 5 -1 -1 1 0 21 + 313 CLK_CNT_P_1_ 3 -1 1 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1 + 63 CLK_030 1 -1 -1 4 0 2 6 7 63 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 2 7 96 -1 + 95 A_16_ 1 -1 -1 2 2 7 95 -1 + 94 A_18_ 1 -1 -1 2 2 7 94 -1 + 58 A_17_ 1 -1 -1 2 2 7 58 -1 + 57 FC_1_ 1 -1 -1 2 2 7 57 -1 + 56 FC_0_ 1 -1 -1 2 2 7 56 -1 + 27 BGACK_000 1 -1 -1 2 2 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 4 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 2 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +105 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 324 7 4 2 3 5 7 81 -1 3 0 21 + 30 LDS_000 5 328 3 3 0 6 7 30 -1 10 0 21 + 31 UDS_000 5 327 3 3 0 6 7 31 -1 6 0 21 + 32 AS_000 5 325 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 326 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 332 6 1 3 69 -1 2 0 21 + 68 A0 5 329 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 2 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 337 3 0 33 -1 6 0 21 + 34 VMA 5 335 3 0 34 -1 4 0 21 + 65 E 5 334 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 322 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 338 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 336 1 0 6 -1 3 0 21 + 82 BGACK_030 5 331 7 0 82 -1 2 0 21 + 77 FPU_CS 5 333 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 28 BG_000 5 330 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 331 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 2 0 21 + 297 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 304 SM_AMIGA_1_ 3 -1 2 5 1 2 3 5 7 -1 -1 4 0 21 + 324 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 308 inst_CLK_000_D5 3 -1 4 4 1 2 5 7 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 5 4 1 2 5 7 -1 -1 1 0 21 + 298 inst_CLK_000_D1 3 -1 5 4 1 5 6 7 -1 -1 1 0 21 + 303 SM_AMIGA_7_ 3 -1 0 3 0 3 5 -1 -1 6 0 21 + 319 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 + 306 SM_AMIGA_6_ 3 -1 0 3 0 3 5 -1 -1 3 0 21 + 305 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 3 1 21 + 302 SM_AMIGA_5_ 3 -1 0 3 0 2 3 -1 -1 3 0 21 + 333 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 325 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21 + 312 CLK_CNT_P_0_ 3 -1 4 3 1 4 5 -1 -1 2 0 21 + 310 CLK_CNT_N_0_ 3 -1 0 3 0 1 4 -1 -1 2 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 0 5 -1 -1 7 0 21 + 335 RN_VMA 3 34 3 2 2 3 34 -1 4 0 21 + 316 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21 + 334 RN_E 3 65 6 2 2 6 65 -1 3 1 21 + 318 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 315 SM_AMIGA_4_ 3 -1 2 2 2 3 -1 -1 3 0 21 + 313 CLK_CNT_P_1_ 3 -1 5 2 1 4 -1 -1 1 0 21 + 311 CLK_CNT_N_1_ 3 -1 4 2 0 1 -1 -1 1 0 21 + 307 inst_CLK_000_D3 3 -1 0 2 0 5 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21 + 328 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21 + 337 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 327 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21 + 326 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 317 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 4 0 21 + 309 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 4 0 21 + 338 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 336 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 320 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21 + 332 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 330 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 329 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21 + 314 inst_CLK_000_D4 3 -1 5 1 4 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 5 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1 + 63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 5 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 4 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +102 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 321 7 4 1 3 5 7 81 -1 3 0 21 + 30 LDS_000 5 326 3 3 0 6 7 30 -1 10 0 21 + 31 UDS_000 5 325 3 3 0 6 7 31 -1 6 0 21 + 32 AS_000 5 323 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 324 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 318 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21 + 68 A0 5 327 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 1 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 335 3 0 33 -1 6 0 21 + 34 VMA 5 334 3 0 34 -1 4 0 21 + 65 E 5 333 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21 + 82 BGACK_030 5 329 7 0 82 -1 2 0 21 + 77 FPU_CS 5 331 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 28 BG_000 5 328 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 329 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 2 0 21 + 297 inst_CLK_000_D0 3 -1 0 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D1 3 -1 4 5 0 1 4 6 7 -1 -1 1 0 21 + 316 cpu_est_1_ 3 -1 0 4 0 1 3 6 -1 -1 4 0 21 + 306 SM_AMIGA_1_ 3 -1 5 4 2 3 5 7 -1 -1 4 0 21 + 321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 308 SM_AMIGA_6_ 3 -1 2 4 2 3 5 6 -1 -1 3 0 21 + 302 inst_BGACK_030_INT_D 3 -1 5 4 0 3 6 7 -1 -1 1 0 21 + 305 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 6 0 21 + 333 RN_E 3 65 6 3 0 1 6 65 -1 3 1 21 + 315 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 + 313 SM_AMIGA_4_ 3 -1 0 3 0 2 3 -1 -1 3 0 21 + 304 SM_AMIGA_5_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 + 331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 301 inst_CLK_OUT_PRE 3 -1 5 3 1 5 6 -1 -1 2 0 21 + 310 inst_CLK_000_D5 3 -1 6 3 2 5 7 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 5 3 2 5 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 + 334 RN_VMA 3 34 3 2 1 3 34 -1 4 0 21 + 314 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21 + 311 SM_AMIGA_3_ 3 -1 2 2 1 2 -1 -1 4 0 21 + 317 cpu_est_2_ 3 -1 0 2 0 6 -1 -1 3 1 21 + 307 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 3 1 21 + 323 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 1 2 1 2 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 1 2 1 2 -1 -1 2 0 21 + 309 inst_CLK_000_D3 3 -1 6 2 2 4 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 4 2 2 6 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 4 2 1 3 -1 -1 1 0 21 + 326 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21 + 335 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 325 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21 + 324 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 318 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 327 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 312 inst_CLK_000_D4 3 -1 4 1 6 -1 -1 1 0 21 + 303 CLK_CNT_P_0_ 3 -1 5 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1 + 63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 5 7 96 -1 + 95 A_16_ 1 -1 -1 2 5 7 95 -1 + 94 A_18_ 1 -1 -1 2 5 7 94 -1 + 58 A_17_ 1 -1 -1 2 5 7 58 -1 + 57 FC_1_ 1 -1 -1 2 5 7 57 -1 + 56 FC_0_ 1 -1 -1 2 5 7 56 -1 + 27 BGACK_000 1 -1 -1 2 5 7 27 -1 + 10 CLK_000 1 -1 -1 2 0 3 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 4 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 14 A_28_ 1 -1 -1 1 4 14 -1 5 A_29_ 1 -1 -1 1 4 5 -1 4 A_30_ 1 -1 -1 1 4 4 -1 diff --git a/Logic/68030_tk.plc b/Logic/68030_tk.plc index 4442394..e171bbc 100644 --- a/Logic/68030_tk.plc +++ b/Logic/68030_tk.plc @@ -8,54 +8,53 @@ ; Source file 68030_tk.tt4 ; FITTER-generated Placements. ; DEVICE mach447a -; DATE Sat May 24 21:59:18 2014 +; DATE Sun May 25 20:57:57 2014 -Pin 56 IPL_1_ -Pin 67 IPL_0_ Pin 4 A_31_ -Pin 80 DSACK_0_ Comb ; S6=1 S9=1 Pair 289 -Pin 57 FC_0_ Pin 68 IPL_2_ Pin 58 FC_1_ +Pin 5 A_30_ +Pin 6 A_29_ +Pin 15 A_28_ +Pin 16 A_27_ +Pin 17 A_26_ Pin 14 nEXP_SPACE +Pin 18 A_25_ Pin 41 BERR Comb ; S6=1 S9=1 Pair 203 +Pin 19 A_24_ Pin 21 BG_030 +Pin 84 A_23_ +Pin 85 A_22_ +Pin 94 A_21_ Pin 28 BGACK_000 +Pin 93 A_20_ Pin 64 CLK_030 +Pin 97 A_19_ Pin 11 CLK_000 +Pin 95 A_18_ Pin 61 CLK_OSZI +Pin 59 A_17_ Pin 65 CLK_DIV_OUT Reg ; S6=0 S9=1 Pair 247 +Pin 96 A_16_ Pin 30 DTACK Comb ; S6=1 S9=1 Pair 173 +Pin 56 IPL_1_ Pin 92 AVEC Comb ; S6=1 S9=1 Pair 107 +Pin 67 IPL_0_ Pin 22 AVEC_EXP Comb ; S6=1 S9=1 Pair 149 +Pin 80 DSACK_0_ Comb ; S6=1 S9=1 Pair 289 +Pin 57 FC_0_ Pin 36 VPA Pin 86 RST Pin 71 RW Pin 48 AMIGA_BUS_DATA_DIR Comb ; S6=1 S9=1 Pair 197 Pin 20 AMIGA_BUS_ENABLE_LOW Comb ; S6=1 S9=1 Pair 167 Pin 47 CIIN Comb ; S6=1 S9=1 Pair 215 -Pin 5 A_30_ -Pin 6 A_29_ -Pin 15 A_28_ -Pin 16 A_27_ -Pin 17 A_26_ -Pin 18 A_25_ -Pin 19 A_24_ -Pin 84 A_23_ -Pin 85 A_22_ -Pin 94 A_21_ -Pin 93 A_20_ -Pin 97 A_19_ -Pin 95 A_18_ -Pin 59 A_17_ -Pin 96 A_16_ -Pin 7 IPL_030_1_ Reg ; S6=1 S9=1 Pair 143 -Pin 8 IPL_030_0_ Reg ; S6=1 S9=1 Pair 137 Pin 79 SIZE_1_ Reg ; S6=1 S9=1 Pair 269 Pin 9 IPL_030_2_ Reg ; S6=1 S9=1 Pair 131 Pin 81 DSACK_1_ Reg ; S6=1 S9=1 Pair 287 Pin 82 AS_030 Reg ; S6=1 S9=1 Pair 281 +Pin 70 SIZE_0_ Reg ; S6=1 S9=1 Pair 245 Pin 33 AS_000 Reg ; S6=1 S9=1 Pair 179 Pin 98 DS_030 Reg ; S6=1 S9=1 Pair 101 Pin 32 UDS_000 Reg ; S6=1 S9=1 Pair 191 @@ -64,19 +63,19 @@ Pin 69 A0 Reg ; S6=1 S9=1 Pair 257 Pin 29 BG_000 Reg ; S6=1 S9=1 Pair 193 Pin 83 BGACK_030 Reg ; S6=1 S9=1 Pair 275 Pin 10 CLK_EXP Reg ; S6=0 S9=1 Pair 125 +Pin 7 IPL_030_1_ Reg ; S6=1 S9=1 Pair 143 Pin 78 FPU_CS Reg ; S6=1 S9=1 Pair 271 +Pin 8 IPL_030_0_ Reg ; S6=1 S9=1 Pair 137 Pin 66 E Reg ; S6=0 S9=1 Pair 251 Pin 35 VMA Reg ; S6=1 S9=1 Pair 175 Pin 3 RESET Reg ; S6=0 S9=1 Pair 127 Pin 34 AMIGA_BUS_ENABLE Reg ; S6=1 S9=1 Pair 181 -Pin 70 SIZE_0_ Reg ; S6=1 S9=1 Pair 245 Node 173 RN_DTACK Comb ; S6=1 S9=1 -Node 143 RN_IPL_030_1_ Reg ; S6=1 S9=1 -Node 137 RN_IPL_030_0_ Reg ; S6=1 S9=1 Node 269 RN_SIZE_1_ Reg ; S6=1 S9=1 Node 131 RN_IPL_030_2_ Reg ; S6=1 S9=1 Node 287 RN_DSACK_1_ Reg ; S6=1 S9=1 Node 281 RN_AS_030 Reg ; S6=1 S9=1 +Node 245 RN_SIZE_0_ Reg ; S6=1 S9=1 Node 179 RN_AS_000 Reg ; S6=1 S9=1 Node 101 RN_DS_030 Reg ; S6=1 S9=1 Node 191 RN_UDS_000 Reg ; S6=1 S9=1 @@ -84,37 +83,36 @@ Node 185 RN_LDS_000 Reg ; S6=1 S9=1 Node 257 RN_A0 Reg ; S6=1 S9=1 Node 193 RN_BG_000 Reg ; S6=1 S9=1 Node 275 RN_BGACK_030 Reg ; S6=1 S9=1 +Node 143 RN_IPL_030_1_ Reg ; S6=1 S9=1 Node 271 RN_FPU_CS Reg ; S6=1 S9=1 +Node 137 RN_IPL_030_0_ Reg ; S6=1 S9=1 Node 251 RN_E Reg ; S6=0 S9=1 Node 175 RN_VMA Reg ; S6=1 S9=1 Node 181 RN_AMIGA_BUS_ENABLE Reg ; S6=1 S9=1 -Node 245 RN_SIZE_0_ Reg ; S6=1 S9=1 -Node 229 inst_AS_030_000_SYNC Reg ; S6=1 S9=1 +Node 223 inst_AS_030_000_SYNC Reg ; S6=1 S9=1 +Node 139 inst_DTACK_SYNC Reg ; S6=1 S9=1 +Node 133 inst_VPA_SYNC Reg ; S6=1 S9=1 +Node 205 inst_VPA_D Reg ; S6=0 S9=1 +Node 113 inst_CLK_000_D0 Reg ; S6=1 S9=1 +Node 209 inst_CLK_000_D1 Reg ; S6=0 S9=1 +Node 199 inst_CLK_000_D2 Reg ; S6=0 S9=1 +Node 239 inst_CLK_000_D6 Reg ; S6=1 S9=1 +Node 233 inst_CLK_OUT_PRE Reg ; S6=0 S9=1 Node 227 inst_BGACK_030_INT_D Reg ; S6=1 S9=1 -Node 163 inst_DTACK_SYNC Reg ; S6=1 S9=1 -Node 157 inst_VPA_SYNC Reg ; S6=1 S9=1 -Node 209 inst_CLK_000_D0 Reg ; S6=0 S9=1 -Node 221 inst_CLK_000_D1 Reg ; S6=1 S9=1 -Node 109 inst_CLK_000_D2 Reg ; S6=1 S9=1 -Node 277 inst_CLK_000_D6 Reg ; S6=1 S9=1 -Node 103 SM_AMIGA_5_ Reg ; S6=0 S9=1 -Node 233 SM_AMIGA_6_ Reg ; S6=0 S9=1 -Node 211 inst_CLK_000_D3 Reg ; S6=0 S9=1 -Node 199 inst_CLK_000_D5 Reg ; S6=0 S9=1 -Node 161 SM_AMIGA_3_ Reg ; S6=0 S9=1 -Node 223 SM_AMIGA_0_ Reg ; S6=0 S9=1 -Node 133 SM_AMIGA_1_ Reg ; S6=0 S9=1 -Node 151 CLK_CNT_N_0_ Reg ; S6=0 S9=1 -Node 115 CLK_CNT_N_1_ Reg ; S6=1 S9=1 -Node 253 CLK_CNT_P_0_ Reg ; S6=0 S9=1 -Node 205 CLK_CNT_P_1_ Reg ; S6=1 S9=1 -Node 235 inst_CLK_000_D4 Reg ; S6=1 S9=1 -Node 239 SM_AMIGA_7_ Reg ; S6=1 S9=1 -Node 119 SM_AMIGA_4_ Reg ; S6=0 S9=1 -Node 155 inst_CLK_OUT_PRE Reg ; S6=0 S9=1 -Node 139 SM_AMIGA_2_ Reg ; S6=0 S9=1 -Node 113 cpu_est_0_ Reg ; S6=0 S9=1 -Node 263 cpu_est_1_ Reg ; S6=0 S9=1 -Node 259 cpu_est_2_ Reg ; S6=0 S9=1 +Node 229 CLK_CNT_P_0_ Reg ; S6=0 S9=1 +Node 263 SM_AMIGA_5_ Reg ; S6=0 S9=1 +Node 161 SM_AMIGA_7_ Reg ; S6=0 S9=1 +Node 221 SM_AMIGA_1_ Reg ; S6=0 S9=1 +Node 163 SM_AMIGA_0_ Reg ; S6=1 S9=1 +Node 155 SM_AMIGA_6_ Reg ; S6=1 S9=1 +Node 259 inst_CLK_000_D3 Reg ; S6=1 S9=1 +Node 253 inst_CLK_000_D5 Reg ; S6=1 S9=1 +Node 157 SM_AMIGA_3_ Reg ; S6=1 S9=1 +Node 211 inst_CLK_000_D4 Reg ; S6=0 S9=1 +Node 109 SM_AMIGA_4_ Reg ; S6=0 S9=1 +Node 151 SM_AMIGA_2_ Reg ; S6=1 S9=1 +Node 103 cpu_est_0_ Reg ; S6=0 S9=1 +Node 119 cpu_est_1_ Reg ; S6=0 S9=1 +Node 115 cpu_est_2_ Reg ; S6=0 S9=1 ; Unused Pins & Nodes ; -> None Found. diff --git a/Logic/68030_tk.prd b/Logic/68030_tk.prd index cd5c566..b865f5a 100644 --- a/Logic/68030_tk.prd +++ b/Logic/68030_tk.prd @@ -5,8 +5,8 @@ |--------------------------------------------| -Start: Sat May 24 21:59:18 2014 -End : Sat May 24 21:59:18 2014 $$$ Elapsed time: 00:00:00 +Start: Sun May 25 20:57:57 2014 +End : Sun May 25 20:57:57 2014 $$$ Elapsed time: 00:00:00 =========================================================================== Part [C:/Program Files (x86)/ispLever/ispcpld/dat/mach4a/mach447a] Design [68030_tk.tt4] @@ -21,16 +21,16 @@ Part [C:/Program Files (x86)/ispLever/ispcpld/dat/mach4a/mach447a] Design [68030 | | +- Signals to Place | | +----- Logic Array Inputs | | | +- Placed | | | +- Array Inputs Used _|____|____|____|_______________|____|_____________|___|________________ - 0 | 16 | 7 | 7 => 100% | 8 | 7 => 87% | 33 | 18 => 54% - 1 | 16 | 7 | 7 => 100% | 8 | 8 => 100% | 33 | 17 => 51% - 2 | 16 | 7 | 7 => 100% | 8 | 8 => 100% | 33 | 17 => 51% + 0 | 16 | 7 | 7 => 100% | 8 | 7 => 87% | 33 | 20 => 60% + 1 | 16 | 7 | 7 => 100% | 8 | 8 => 100% | 33 | 20 => 60% + 2 | 16 | 7 | 7 => 100% | 8 | 8 => 100% | 33 | 20 => 60% 3 | 16 | 7 | 7 => 100% | 8 | 8 => 100% | 33 | 30 => 90% - 4 | 16 | 7 | 7 => 100% | 8 | 3 => 37% | 33 | 20 => 60% - 5 | 16 | 7 | 7 => 100% | 8 | 4 => 50% | 33 | 23 => 69% - 6 | 16 | 7 | 7 => 100% | 8 | 7 => 87% | 33 | 19 => 57% - 7 | 16 | 7 | 7 => 100% | 8 | 8 => 100% | 33 | 25 => 75% + 4 | 16 | 7 | 7 => 100% | 8 | 3 => 37% | 33 | 21 => 63% + 5 | 16 | 6 | 6 => 100% | 8 | 4 => 50% | 33 | 22 => 66% + 6 | 16 | 7 | 7 => 100% | 8 | 7 => 87% | 33 | 22 => 66% + 7 | 16 | 6 | 6 => 100% | 8 | 8 => 100% | 33 | 25 => 75% ---|----|----|------------|-------|------------|-----|------------------ - | Avg number of array inputs in used blocks : 21.13 => 64% + | Avg number of array inputs in used blocks : 22.50 => 68% * Input/Clock Signal count: 30 -> placed: 30 = 100% @@ -41,13 +41,13 @@ _|____|____|____|_______________|____|_____________|___|________________ Clock Only Pins : 0 0 => 0% Clock/Input Pins : 4 4 => 100% Logic Blocks : 8 8 => 100% - Macrocells : 128 56 => 43% + Macrocells : 128 54 => 42% PT Clusters : 128 39 => 30% - Single PT Clusters : 128 20 => 15% Input Registers : 0 * Routing Completion: 100% -* Attempts: Place [ 104] Route [ 0] +* Attempts: Place [ 102] Route [ 0] =========================================================================== Signal Fanout Table =========================================================================== @@ -65,7 +65,7 @@ ___|__|__|____|____________________________________________________________ 4| 2|OUT| 20|=> ....|....| AMIGA_BUS_ENABLE_LOW 5| 3| IO| 33|=> 0...|..67| AS_000 |=> Paired w/: RN_AS_000 - 6| 7| IO| 82|=> ..23|.5.7| AS_030 + 6| 7| IO| 82|=> .1.3|.5.7| AS_030 |=> Paired w/: RN_AS_030 7| 0|OUT| 92|=> ....|....| AVEC 8| 2|OUT| 22|=> ....|....| AVEC_EXP @@ -93,110 +93,108 @@ ___|__|__|____|____________________________________________________________ |=> Paired w/: RN_BG_000 29| 2|INP| 21|=> ...3|....| BG_030 30| 4|OUT| 47|=> ....|....| CIIN - 31| +|INP| 11|=> ...3|4...| CLK_000 + 31| +|INP| 11|=> 0..3|....| CLK_000 32| +|INP| 64|=> 0...|.567| CLK_030 - 33| 2|NOD| . |=> 0.2.|....| CLK_CNT_N_0_ - 34| 0|NOD| . |=> ..2.|....| CLK_CNT_N_1_ - 35| 6|NOD| . |=> ..2.|4.6.| CLK_CNT_P_0_ - 36| 4|NOD| . |=> ..2.|..6.| CLK_CNT_P_1_ - 37| 6|OUT| 65|=> ....|....| CLK_DIV_OUT - 38| 1|OUT| 10|=> ....|....| CLK_EXP - 39| +|Cin| 61|=> ....|....| CLK_OSZI - 40| 7|OUT| 80|=> ....|....| DSACK_0_ - 41| 7| IO| 81|=> ...3|....| DSACK_1_ + 33| 5|NOD| . |=> ....|.5..| CLK_CNT_P_0_ + 34| 6|OUT| 65|=> ....|....| CLK_DIV_OUT + 35| 1|OUT| 10|=> ....|....| CLK_EXP + 36| +|Cin| 61|=> ....|....| CLK_OSZI + 37| 7|OUT| 80|=> ....|....| DSACK_0_ + 38| 7| IO| 81|=> ...3|....| DSACK_1_ |=> Paired w/: RN_DSACK_1_ - 42| 0| IO| 98|=> ...3|....| DS_030 + 39| 0| IO| 98|=> ...3|....| DS_030 |=> Paired w/: RN_DS_030 - 43| 3| IO| 30|=> ..2.|....| DTACK - 44| 6| IO| 66|=> ....|....| E + 40| 3| IO| 30|=> .1..|....| DTACK + 41| 6| IO| 66|=> ....|....| E |=> Paired w/: RN_E - 45| 5|INP| 57|=> ....|.5.7| FC_0_ - 46| 5|INP| 58|=> ....|.5.7| FC_1_ - 47| 7| IO| 78|=> ....|....| FPU_CS + 42| 5|INP| 57|=> ....|.5.7| FC_0_ + 43| 5|INP| 58|=> ....|.5.7| FC_1_ + 44| 7| IO| 78|=> ....|....| FPU_CS |=> Paired w/: RN_FPU_CS - 48| 1| IO| 8|=> ....|....| IPL_030_0_ + 45| 1| IO| 8|=> ....|....| IPL_030_0_ |=> Paired w/: RN_IPL_030_0_ - 49| 1| IO| 7|=> ....|....| IPL_030_1_ + 46| 1| IO| 7|=> ....|....| IPL_030_1_ |=> Paired w/: RN_IPL_030_1_ - 50| 1| IO| 9|=> ....|....| IPL_030_2_ + 47| 1| IO| 9|=> ....|....| IPL_030_2_ |=> Paired w/: RN_IPL_030_2_ - 51| 6|INP| 67|=> .1..|....| IPL_0_ - 52| 5|INP| 56|=> .1..|....| IPL_1_ - 53| 6|INP| 68|=> .1..|....| IPL_2_ - 54| 3| IO| 31|=> 0...|..67| LDS_000 + 48| 6|INP| 67|=> .1..|....| IPL_0_ + 49| 5|INP| 56|=> .1..|....| IPL_1_ + 50| 6|INP| 68|=> .1..|....| IPL_2_ + 51| 3| IO| 31|=> 0...|..67| LDS_000 |=> Paired w/: RN_LDS_000 - 55| 1|OUT| 3|=> ....|....| RESET - 56| 6|NOD| . |=> ....|..6.| RN_A0 + 52| 1|OUT| 3|=> ....|....| RESET + 53| 6|NOD| . |=> ....|..6.| RN_A0 |=> Paired w/: A0 - 57| 3|NOD| . |=> ...3|....| RN_AMIGA_BUS_ENABLE + 54| 3|NOD| . |=> ...3|....| RN_AMIGA_BUS_ENABLE |=> Paired w/: AMIGA_BUS_ENABLE - 58| 3|NOD| . |=> ...3|.5..| RN_AS_000 + 55| 3|NOD| . |=> ..23|....| RN_AS_000 |=> Paired w/: AS_000 - 59| 7|NOD| . |=> 0...|...7| RN_AS_030 + 56| 7|NOD| . |=> 0..3|..67| RN_AS_030 |=> Paired w/: AS_030 - 60| 7|NOD| . |=> 0..3|4567| RN_BGACK_030 + 57| 7|NOD| . |=> 0123|4567| RN_BGACK_030 |=> Paired w/: BGACK_030 - 61| 3|NOD| . |=> ...3|....| RN_BG_000 + 58| 3|NOD| . |=> ...3|....| RN_BG_000 |=> Paired w/: BG_000 - 62| 7|NOD| . |=> ....|...7| RN_DSACK_1_ + 59| 7|NOD| . |=> ....|...7| RN_DSACK_1_ |=> Paired w/: DSACK_1_ - 63| 0|NOD| . |=> 0...|....| RN_DS_030 + 60| 0|NOD| . |=> 0...|....| RN_DS_030 |=> Paired w/: DS_030 - 64| 6|NOD| . |=> ..23|..6.| RN_E + 61| 6|NOD| . |=> 01..|..6.| RN_E |=> Paired w/: E - 65| 7|NOD| . |=> ..2.|4..7| RN_FPU_CS + 62| 7|NOD| . |=> ..2.|4..7| RN_FPU_CS |=> Paired w/: FPU_CS - 66| 1|NOD| . |=> .1..|....| RN_IPL_030_0_ + 63| 1|NOD| . |=> .1..|....| RN_IPL_030_0_ |=> Paired w/: IPL_030_0_ - 67| 1|NOD| . |=> .1..|....| RN_IPL_030_1_ + 64| 1|NOD| . |=> .1..|....| RN_IPL_030_1_ |=> Paired w/: IPL_030_1_ - 68| 1|NOD| . |=> .1..|....| RN_IPL_030_2_ + 65| 1|NOD| . |=> .1..|....| RN_IPL_030_2_ |=> Paired w/: IPL_030_2_ - 69| 3|NOD| . |=> ...3|....| RN_LDS_000 + 66| 3|NOD| . |=> ...3|....| RN_LDS_000 |=> Paired w/: LDS_000 - 70| 6|NOD| . |=> ....|..6.| RN_SIZE_0_ + 67| 6|NOD| . |=> ....|..6.| RN_SIZE_0_ |=> Paired w/: SIZE_0_ - 71| 7|NOD| . |=> ....|...7| RN_SIZE_1_ + 68| 7|NOD| . |=> ....|...7| RN_SIZE_1_ |=> Paired w/: SIZE_1_ - 72| 3|NOD| . |=> ...3|....| RN_UDS_000 + 69| 3|NOD| . |=> ...3|....| RN_UDS_000 |=> Paired w/: UDS_000 - 73| 3|NOD| . |=> ..23|....| RN_VMA + 70| 3|NOD| . |=> .1.3|....| RN_VMA |=> Paired w/: VMA - 74| +|INP| 86|=> 0123|4567| RST - 75| 6|INP| 71|=> 0..3|4...| RW - 76| 6| IO| 70|=> ...3|....| SIZE_0_ + 71| +|INP| 86|=> 0123|4567| RST + 72| 6|INP| 71|=> 0..3|4...| RW + 73| 6| IO| 70|=> ...3|....| SIZE_0_ |=> Paired w/: RN_SIZE_0_ - 77| 7| IO| 79|=> ...3|....| SIZE_1_ + 74| 7| IO| 79|=> ...3|....| SIZE_1_ |=> Paired w/: RN_SIZE_1_ - 78| 5|NOD| . |=> ...3|.5..| SM_AMIGA_0_ - 79| 1|NOD| . |=> .1..|.5.7| SM_AMIGA_1_ - 80| 1|NOD| . |=> .1..|....| SM_AMIGA_2_ - 81| 2|NOD| . |=> .12.|....| SM_AMIGA_3_ - 82| 0|NOD| . |=> 0.23|....| SM_AMIGA_4_ - 83| 0|NOD| . |=> 0..3|....| SM_AMIGA_5_ - 84| 5|NOD| . |=> 0..3|.5..| SM_AMIGA_6_ - 85| 5|NOD| . |=> ...3|.5..| SM_AMIGA_7_ - 86| 3| IO| 32|=> 0...|..67| UDS_000 + 75| 2|NOD| . |=> ..23|....| SM_AMIGA_0_ + 76| 5|NOD| . |=> ..23|.5.7| SM_AMIGA_1_ + 77| 2|NOD| . |=> ..2.|.5..| SM_AMIGA_2_ + 78| 2|NOD| . |=> .12.|....| SM_AMIGA_3_ + 79| 0|NOD| . |=> 0.23|....| SM_AMIGA_4_ + 80| 6|NOD| . |=> 0..3|..6.| SM_AMIGA_5_ + 81| 2|NOD| . |=> ..23|.56.| SM_AMIGA_6_ + 82| 2|NOD| . |=> ..23|.5..| SM_AMIGA_7_ + 83| 3| IO| 32|=> 0...|..67| UDS_000 |=> Paired w/: RN_UDS_000 - 87| 3| IO| 35|=> ....|....| VMA + 84| 3| IO| 35|=> ....|....| VMA |=> Paired w/: RN_VMA - 88| +|INP| 36|=> ..23|....| VPA - 89| 0|NOD| . |=> 0..3|..6.| cpu_est_0_ - 90| 6|NOD| . |=> ..23|..6.| cpu_est_1_ - 91| 6|NOD| . |=> ...3|..6.| cpu_est_2_ - 92| 5|NOD| . |=> ....|.5..| inst_AS_030_000_SYNC - 93| 5|NOD| . |=> 0..3|..67| inst_BGACK_030_INT_D - 94| 4|NOD| . |=> 0123|.567| inst_CLK_000_D0 - 95| 5|NOD| . |=> 01..|..67| inst_CLK_000_D1 - 96| 0|NOD| . |=> ....|45..| inst_CLK_000_D2 - 97| 4|NOD| . |=> ....|.5..| inst_CLK_000_D3 - 98| 5|NOD| . |=> ....|4...| inst_CLK_000_D4 - 99| 4|NOD| . |=> .1..|.5.7| inst_CLK_000_D5 - 100| 7|NOD| . |=> .1..|.5.7| inst_CLK_000_D6 - 101| 2|NOD| . |=> .1..|..6.| inst_CLK_OUT_PRE - 102| 2|NOD| . |=> .12.|....| inst_DTACK_SYNC - 103| 2|NOD| . |=> .12.|....| inst_VPA_SYNC - 104| +|INP| 14|=> 0..3|.567| nEXP_SPACE + 85| +|INP| 36|=> ....|4...| VPA + 86| 0|NOD| . |=> 0..3|..6.| cpu_est_0_ + 87| 0|NOD| . |=> 01.3|..6.| cpu_est_1_ + 88| 0|NOD| . |=> 0...|..6.| cpu_est_2_ + 89| 5|NOD| . |=> ..2.|.5..| inst_AS_030_000_SYNC + 90| 5|NOD| . |=> 0..3|..67| inst_BGACK_030_INT_D + 91| 0|NOD| . |=> 0123|4567| inst_CLK_000_D0 + 92| 4|NOD| . |=> 01..|4.67| inst_CLK_000_D1 + 93| 4|NOD| . |=> ..2.|..6.| inst_CLK_000_D2 + 94| 6|NOD| . |=> ..2.|4...| inst_CLK_000_D3 + 95| 4|NOD| . |=> ....|..6.| inst_CLK_000_D4 + 96| 6|NOD| . |=> ..2.|.5.7| inst_CLK_000_D5 + 97| 5|NOD| . |=> ..2.|.5.7| inst_CLK_000_D6 + 98| 5|NOD| . |=> .1..|.56.| inst_CLK_OUT_PRE + 99| 1|NOD| . |=> .12.|....| inst_DTACK_SYNC + 100| 4|NOD| . |=> .1.3|....| inst_VPA_D + 101| 1|NOD| . |=> .12.|....| inst_VPA_SYNC + 102| +|INP| 14|=> 0.23|4567| nEXP_SPACE --------------------------------------------------------------------------- =========================================================================== < C:/Program Files (x86)/ispLever/ispcpld/dat/mach4a/mach447a Device Pin Assignments > @@ -317,18 +315,18 @@ ____|_____|_________|______________________________________________________ | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| DS_030| IO| | S | 5 | 4 to [ 0]| 1 XOR to [ 0] as logic PT - 1| SM_AMIGA_5_|NOD| | S | 2 | 4 to [ 1]| 1 XOR free + 1| cpu_est_0_|NOD| | S | 3 | 4 to [ 1]| 1 XOR free 2| | ? | | S | | 4 free | 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free 4| AVEC|OUT| | S | 1 | 4 free | 1 XOR to [ 4] for 1 PT sig - 5|inst_CLK_000_D2|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig + 5| SM_AMIGA_4_|NOD| | S | 3 | 4 to [ 5]| 1 XOR free 6| | ? | | S | | 4 free | 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free - 8| cpu_est_0_|NOD| | S | 3 | 4 to [ 8]| 1 XOR free - 9| CLK_CNT_N_1_|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig + 8|inst_CLK_000_D0|NOD| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig + 9| cpu_est_2_|NOD| | S | 3 :+: 1| 4 to [ 9]| 1 XOR to [ 9] 10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free -12| SM_AMIGA_4_|NOD| | S | 2 | 4 to [12]| 1 XOR free +12| cpu_est_1_|NOD| | S | 4 | 4 to [12]| 1 XOR free 13| | ? | | S | | 4 free | 1 XOR free 14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free @@ -344,18 +342,18 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ 0| DS_030| IO| | S | 5 |=> can support up to [ 10] logic PT(s) - 1| SM_AMIGA_5_|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) + 1| cpu_est_0_|NOD| | S | 3 |=> can support up to [ 15] logic PT(s) 2| | ? | | S | |=> can support up to [ 14] logic PT(s) - 3| | ? | | S | |=> can support up to [ 18] logic PT(s) - 4| AVEC|OUT| | S | 1 |=> can support up to [ 19] logic PT(s) - 5|inst_CLK_000_D2|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) + 3| | ? | | S | |=> can support up to [ 14] logic PT(s) + 4| AVEC|OUT| | S | 1 |=> can support up to [ 15] logic PT(s) + 5| SM_AMIGA_4_|NOD| | S | 3 |=> can support up to [ 19] logic PT(s) 6| | ? | | S | |=> can support up to [ 14] logic PT(s) 7| | ? | | S | |=> can support up to [ 14] logic PT(s) - 8| cpu_est_0_|NOD| | S | 3 |=> can support up to [ 19] logic PT(s) - 9| CLK_CNT_N_1_|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) -10| | ? | | S | |=> can support up to [ 14] logic PT(s) + 8|inst_CLK_000_D0|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) + 9| cpu_est_2_|NOD| | S | 3 :+: 1|=> can support up to [ 18] logic PT(s) +10| | ? | | S | |=> can support up to [ 10] logic PT(s) 11| | ? | | S | |=> can support up to [ 15] logic PT(s) -12| SM_AMIGA_4_|NOD| | S | 2 |=> can support up to [ 20] logic PT(s) +12| cpu_est_1_|NOD| | S | 4 |=> can support up to [ 20] logic PT(s) 13| | ? | | S | |=> can support up to [ 15] logic PT(s) 14| | ? | | S | |=> can support up to [ 15] logic PT(s) 15| | ? | | S | |=> can support up to [ 10] logic PT(s) @@ -369,18 +367,18 @@ _|_________________|__|__|___|_____|_______________________________________ | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ 0| DS_030| IO| | => | 5 6 ( 7) 0 | 96 97 ( 98) 91 - 1| SM_AMIGA_5_|NOD| | => | 5 6 7 0 | 96 97 98 91 + 1| cpu_est_0_|NOD| | => | 5 6 7 0 | 96 97 98 91 2| | | | => | 6 7 0 1 | 97 98 91 92 3| | | | => | 6 7 0 1 | 97 98 91 92 4| AVEC|OUT| | => | 7 0 ( 1) 2 | 98 91 ( 92) 93 - 5|inst_CLK_000_D2|NOD| | => | 7 0 1 2 | 98 91 92 93 + 5| SM_AMIGA_4_|NOD| | => | 7 0 1 2 | 98 91 92 93 6| | | | => | 0 1 2 3 | 91 92 93 94 7| | | | => | 0 1 2 3 | 91 92 93 94 - 8| cpu_est_0_|NOD| | => | 1 2 3 4 | 92 93 94 95 - 9| CLK_CNT_N_1_|NOD| | => | 1 2 3 4 | 92 93 94 95 + 8|inst_CLK_000_D0|NOD| | => | 1 2 3 4 | 92 93 94 95 + 9| cpu_est_2_|NOD| | => | 1 2 3 4 | 92 93 94 95 10| | | | => | 2 3 4 5 | 93 94 95 96 11| | | | => | 2 3 4 5 | 93 94 95 96 -12| SM_AMIGA_4_|NOD| | => | 3 4 5 6 | 94 95 96 97 +12| cpu_est_1_|NOD| | => | 3 4 5 6 | 94 95 96 97 13| | | | => | 3 4 5 6 | 94 95 96 97 14| | | | => | 4 5 6 7 | 95 96 97 98 15| | | | => | 4 5 6 7 | 95 96 97 98 @@ -434,7 +432,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 0 [IOpin 0 | 91| -| | ] [RegIn 0 |102| -| | ] [MCell 0 |101|NOD RN_DS_030| |*] paired w/[ DS_030] - [MCell 1 |103|NOD SM_AMIGA_5_| |*] + [MCell 1 |103|NOD cpu_est_0_| |*] 1 [IOpin 1 | 92|OUT AVEC|*| ] [RegIn 1 |105| -| | ] @@ -444,7 +442,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 2 [IOpin 2 | 93|INP A_20_|*|*] [RegIn 2 |108| -| | ] [MCell 4 |107|OUT AVEC| | ] - [MCell 5 |109|NOD inst_CLK_000_D2| |*] + [MCell 5 |109|NOD SM_AMIGA_4_| |*] 3 [IOpin 3 | 94|INP A_21_|*|*] [RegIn 3 |111| -| | ] @@ -453,8 +451,8 @@ IMX No. | +---- Block IO Pin or Macrocell Number 4 [IOpin 4 | 95|INP A_18_|*|*] [RegIn 4 |114| -| | ] - [MCell 8 |113|NOD cpu_est_0_| |*] - [MCell 9 |115|NOD CLK_CNT_N_1_| |*] + [MCell 8 |113|NOD inst_CLK_000_D0| |*] + [MCell 9 |115|NOD cpu_est_2_| |*] 5 [IOpin 5 | 96|INP A_16_|*|*] [RegIn 5 |117| -| | ] @@ -463,7 +461,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 6 [IOpin 6 | 97|INP A_19_|*|*] [RegIn 6 |120| -| | ] - [MCell 12 |119|NOD SM_AMIGA_4_| |*] + [MCell 12 |119|NOD cpu_est_1_| |*] [MCell 13 |121| -| | ] 7 [IOpin 7 | 98| IO DS_030|*|*] paired w/[ RN_DS_030] @@ -478,36 +476,36 @@ IMX No. | +---- Block IO Pin or Macrocell Number | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- Mux00| Input Pin ( 86)| RST -Mux01| Mcel 2 1 ( 151)| CLK_CNT_N_0_ -Mux02| Mcel 5 8 ( 233)| SM_AMIGA_6_ -Mux03| Mcel 7 8 ( 281)| RN_AS_030 +Mux01| ... | ... +Mux02| Mcel 0 9 ( 115)| cpu_est_2_ +Mux03| Input Pin ( 11)| CLK_000 Mux04| Input Pin ( 64)| CLK_030 Mux05| Input Pin ( 14)| nEXP_SPACE Mux06| ... | ... -Mux07| ... | ... +Mux07| Mcel 6 12 ( 263)| SM_AMIGA_5_ Mux08| IOPin 6 6 ( 71)| RW -Mux09| Mcel 0 1 ( 103)| SM_AMIGA_5_ +Mux09| Mcel 0 1 ( 103)| cpu_est_0_ Mux10| Mcel 5 4 ( 227)| inst_BGACK_030_INT_D -Mux11| ... | ... +Mux11| Mcel 6 4 ( 251)| RN_E Mux12| IOPin 3 3 ( 32)| UDS_000 -Mux13| ... | ... +Mux13| Mcel 7 8 ( 281)| RN_AS_030 Mux14| ... | ... Mux15| Mcel 0 0 ( 101)| RN_DS_030 -Mux16| Mcel 4 8 ( 209)| inst_CLK_000_D0 +Mux16| Mcel 4 8 ( 209)| inst_CLK_000_D1 Mux17| ... | ... -Mux18| Mcel 0 8 ( 113)| cpu_est_0_ +Mux18| Mcel 0 5 ( 109)| SM_AMIGA_4_ Mux19| ... | ... Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 Mux21| ... | ... Mux22| ... | ... Mux23| IOPin 3 2 ( 33)| AS_000 -Mux24| Mcel 0 12 ( 119)| SM_AMIGA_4_ -Mux25| Mcel 5 0 ( 221)| inst_CLK_000_D1 +Mux24| Mcel 0 12 ( 119)| cpu_est_1_ +Mux25| ... | ... Mux26| ... | ... Mux27| IOPin 3 4 ( 31)| LDS_000 Mux28| ... | ... Mux29| ... | ... -Mux30| ... | ... +Mux30| Mcel 0 8 ( 113)| inst_CLK_000_D0 Mux31| ... | ... Mux32| ... | ... --------------------------------------------------------------------------- @@ -526,11 +524,11 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ 2| | ? | | S | | 4 free | 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free 4| IPL_030_2_| IO| | S | 3 | 4 to [ 4]| 1 XOR free - 5| SM_AMIGA_1_|NOD| | S | 3 | 4 to [ 5]| 1 XOR free + 5| inst_VPA_SYNC|NOD| | S | 2 | 4 to [ 5]| 1 XOR free 6| | ? | | S | | 4 free | 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free 8| IPL_030_0_| IO| | S | 3 | 4 to [ 8]| 1 XOR free - 9| SM_AMIGA_2_|NOD| | S | 3 | 4 to [ 9]| 1 XOR free + 9|inst_DTACK_SYNC|NOD| | S | 2 | 4 to [ 9]| 1 XOR free 10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free 12| IPL_030_1_| IO| | S | 3 | 4 to [12]| 1 XOR free @@ -553,11 +551,11 @@ _|_________________|__|__|___|_____|_______________________________________ 2| | ? | | S | |=> can support up to [ 14] logic PT(s) 3| | ? | | S | |=> can support up to [ 10] logic PT(s) 4| IPL_030_2_| IO| | S | 3 |=> can support up to [ 15] logic PT(s) - 5| SM_AMIGA_1_|NOD| | S | 3 |=> can support up to [ 15] logic PT(s) + 5| inst_VPA_SYNC|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) 6| | ? | | S | |=> can support up to [ 10] logic PT(s) 7| | ? | | S | |=> can support up to [ 10] logic PT(s) 8| IPL_030_0_| IO| | S | 3 |=> can support up to [ 15] logic PT(s) - 9| SM_AMIGA_2_|NOD| | S | 3 |=> can support up to [ 15] logic PT(s) + 9|inst_DTACK_SYNC|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) 10| | ? | | S | |=> can support up to [ 10] logic PT(s) 11| | ? | | S | |=> can support up to [ 15] logic PT(s) 12| IPL_030_1_| IO| | S | 3 |=> can support up to [ 20] logic PT(s) @@ -578,11 +576,11 @@ _|_________________|__|_____|____________________|________________________ 2| | | | => | 6 7 0 1 | 4 3 10 9 3| | | | => | 6 7 0 1 | 4 3 10 9 4| IPL_030_2_| IO| | => | 7 0 ( 1) 2 | 3 10 ( 9) 8 - 5| SM_AMIGA_1_|NOD| | => | 7 0 1 2 | 3 10 9 8 + 5| inst_VPA_SYNC|NOD| | => | 7 0 1 2 | 3 10 9 8 6| | | | => | 0 1 2 3 | 10 9 8 7 7| | | | => | 0 1 2 3 | 10 9 8 7 8| IPL_030_0_| IO| | => | 1 ( 2) 3 4 | 9 ( 8) 7 6 - 9| SM_AMIGA_2_|NOD| | => | 1 2 3 4 | 9 8 7 6 + 9|inst_DTACK_SYNC|NOD| | => | 1 2 3 4 | 9 8 7 6 10| | | | => | 2 3 4 5 | 8 7 6 5 11| | | | => | 2 3 4 5 | 8 7 6 5 12| IPL_030_1_| IO| | => |( 3) 4 5 6 |( 7) 6 5 4 @@ -651,7 +649,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 2 [IOpin 2 | 8| IO IPL_030_0_|*| ] paired w/[ RN_IPL_030_0_] [RegIn 2 |132| -| | ] [MCell 4 |131|NOD RN_IPL_030_2_| |*] paired w/[ IPL_030_2_] - [MCell 5 |133|NOD SM_AMIGA_1_| |*] + [MCell 5 |133|NOD inst_VPA_SYNC| |*] 3 [IOpin 3 | 7| IO IPL_030_1_|*| ] paired w/[ RN_IPL_030_1_] [RegIn 3 |135| -| | ] @@ -661,7 +659,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 4 [IOpin 4 | 6|INP A_29_|*|*] [RegIn 4 |138| -| | ] [MCell 8 |137|NOD RN_IPL_030_0_| |*] paired w/[ IPL_030_0_] - [MCell 9 |139|NOD SM_AMIGA_2_| |*] + [MCell 9 |139|NOD inst_DTACK_SYNC| |*] 5 [IOpin 5 | 5|INP A_30_|*|*] [RegIn 5 |141| -| | ] @@ -686,35 +684,35 @@ IMX No. | +---- Block IO Pin or Macrocell Number --|--|--------------------|--------------------------------------------------- Mux00| IOPin 6 2 ( 67)| IPL_0_ Mux01| Mcel 1 12 ( 143)| RN_IPL_030_1_ -Mux02| ... | ... +Mux02| Mcel 3 1 ( 175)| RN_VMA Mux03| IOPin 5 4 ( 56)| IPL_1_ -Mux04| Mcel 7 5 ( 277)| inst_CLK_000_D6 -Mux05| Mcel 4 1 ( 199)| inst_CLK_000_D5 -Mux06| Mcel 1 9 ( 139)| SM_AMIGA_2_ -Mux07| Mcel 2 5 ( 157)| inst_VPA_SYNC +Mux04| IOPin 6 3 ( 68)| IPL_2_ +Mux05| ... | ... +Mux06| Mcel 1 9 ( 139)| inst_DTACK_SYNC +Mux07| Mcel 2 5 ( 157)| SM_AMIGA_3_ Mux08| Mcel 1 8 ( 137)| RN_IPL_030_0_ -Mux09| ... | ... +Mux09| IOPin 3 5 ( 30)| DTACK Mux10| ... | ... -Mux11| ... | ... +Mux11| Mcel 6 4 ( 251)| RN_E Mux12| ... | ... -Mux13| Mcel 2 9 ( 163)| inst_DTACK_SYNC -Mux14| Mcel 2 4 ( 155)| inst_CLK_OUT_PRE -Mux15| ... | ... -Mux16| Mcel 2 8 ( 161)| SM_AMIGA_3_ +Mux13| ... | ... +Mux14| Mcel 4 5 ( 205)| inst_VPA_D +Mux15| Mcel 0 12 ( 119)| cpu_est_1_ +Mux16| Mcel 4 8 ( 209)| inst_CLK_000_D1 Mux17| ... | ... -Mux18| ... | ... -Mux19| ... | ... -Mux20| ... | ... +Mux18| Mcel 0 8 ( 113)| inst_CLK_000_D0 +Mux19| IOPin 7 3 ( 82)| AS_030 +Mux20| Mcel 5 8 ( 233)| inst_CLK_OUT_PRE Mux21| Input Pin ( 86)| RST -Mux22| IOPin 6 3 ( 68)| IPL_2_ -Mux23| ... | ... +Mux22| ... | ... +Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 Mux24| ... | ... -Mux25| Mcel 5 0 ( 221)| inst_CLK_000_D1 +Mux25| ... | ... Mux26| ... | ... Mux27| Mcel 1 4 ( 131)| RN_IPL_030_2_ -Mux28| Mcel 1 5 ( 133)| SM_AMIGA_1_ +Mux28| Mcel 1 5 ( 133)| inst_VPA_SYNC Mux29| ... | ... -Mux30| Mcel 4 8 ( 209)| inst_CLK_000_D0 +Mux30| ... | ... Mux31| ... | ... Mux32| ... | ... --------------------------------------------------------------------------- @@ -729,16 +727,16 @@ Mux32| ... | ... | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| AVEC_EXP|OUT| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig - 1| CLK_CNT_N_0_|NOD| | S | 2 | 4 to [ 1]| 1 XOR free + 1| SM_AMIGA_2_|NOD| | S | 4 | 4 to [ 1]| 1 XOR free 2| | ? | | S | | 4 free | 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free - 4|inst_CLK_OUT_PRE|NOD| | S | 4 | 4 to [ 4]| 1 XOR free - 5| inst_VPA_SYNC|NOD| | S | 2 | 4 to [ 5]| 1 XOR free + 4| SM_AMIGA_6_|NOD| | S | 3 | 4 to [ 4]| 1 XOR free + 5| SM_AMIGA_3_|NOD| | S | 4 | 4 to [ 5]| 1 XOR free 6| | ? | | S | | 4 free | 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free - 8| SM_AMIGA_3_|NOD| | S | 3 | 4 to [ 8]| 1 XOR free - 9|inst_DTACK_SYNC|NOD| | S | 2 | 4 to [ 9]| 1 XOR free -10| | ? | | S | | 4 free | 1 XOR free + 8| SM_AMIGA_7_|NOD| | S | 6 | 4 to [ 8]| 1 XOR to [ 8] as logic PT + 9| SM_AMIGA_0_|NOD| | S | 3 :+: 1| 4 to [ 8]| 1 XOR to [ 9] +10| | ? | | S | | 4 to [ 9]| 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free 12|AMIGA_BUS_ENABLE_LOW|OUT| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig 13| | ? | | S | | 4 free | 1 XOR free @@ -756,17 +754,17 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ 0| AVEC_EXP|OUT| | S | 1 |=> can support up to [ 10] logic PT(s) - 1| CLK_CNT_N_0_|NOD| | S | 2 |=> can support up to [ 19] logic PT(s) + 1| SM_AMIGA_2_|NOD| | S | 4 |=> can support up to [ 19] logic PT(s) 2| | ? | | S | |=> can support up to [ 10] logic PT(s) 3| | ? | | S | |=> can support up to [ 10] logic PT(s) - 4|inst_CLK_OUT_PRE|NOD| | S | 4 |=> can support up to [ 15] logic PT(s) - 5| inst_VPA_SYNC|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) + 4| SM_AMIGA_6_|NOD| | S | 3 |=> can support up to [ 15] logic PT(s) + 5| SM_AMIGA_3_|NOD| | S | 4 |=> can support up to [ 15] logic PT(s) 6| | ? | | S | |=> can support up to [ 10] logic PT(s) 7| | ? | | S | |=> can support up to [ 10] logic PT(s) - 8| SM_AMIGA_3_|NOD| | S | 3 |=> can support up to [ 15] logic PT(s) - 9|inst_DTACK_SYNC|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) -10| | ? | | S | |=> can support up to [ 14] logic PT(s) -11| | ? | | S | |=> can support up to [ 19] logic PT(s) + 8| SM_AMIGA_7_|NOD| | S | 6 |=> can support up to [ 14] logic PT(s) + 9| SM_AMIGA_0_|NOD| | S | 3 :+: 1|=> can support up to [ 10] logic PT(s) +10| | ? | | S | |=> can support up to [ 10] logic PT(s) +11| | ? | | S | |=> can support up to [ 14] logic PT(s) 12|AMIGA_BUS_ENABLE_LOW|OUT| | S | 1 |=> can support up to [ 20] logic PT(s) 13| | ? | | S | |=> can support up to [ 19] logic PT(s) 14| | ? | | S | |=> can support up to [ 15] logic PT(s) @@ -781,15 +779,15 @@ _|_________________|__|__|___|_____|_______________________________________ | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ 0| AVEC_EXP|OUT| | => | 5 6 ( 7) 0 | 20 21 ( 22) 15 - 1| CLK_CNT_N_0_|NOD| | => | 5 6 7 0 | 20 21 22 15 + 1| SM_AMIGA_2_|NOD| | => | 5 6 7 0 | 20 21 22 15 2| | | | => | 6 7 0 1 | 21 22 15 16 3| | | | => | 6 7 0 1 | 21 22 15 16 - 4|inst_CLK_OUT_PRE|NOD| | => | 7 0 1 2 | 22 15 16 17 - 5| inst_VPA_SYNC|NOD| | => | 7 0 1 2 | 22 15 16 17 + 4| SM_AMIGA_6_|NOD| | => | 7 0 1 2 | 22 15 16 17 + 5| SM_AMIGA_3_|NOD| | => | 7 0 1 2 | 22 15 16 17 6| | | | => | 0 1 2 3 | 15 16 17 18 7| | | | => | 0 1 2 3 | 15 16 17 18 - 8| SM_AMIGA_3_|NOD| | => | 1 2 3 4 | 16 17 18 19 - 9|inst_DTACK_SYNC|NOD| | => | 1 2 3 4 | 16 17 18 19 + 8| SM_AMIGA_7_|NOD| | => | 1 2 3 4 | 16 17 18 19 + 9| SM_AMIGA_0_|NOD| | => | 1 2 3 4 | 16 17 18 19 10| | | | => | 2 3 4 5 | 17 18 19 20 11| | | | => | 2 3 4 5 | 17 18 19 20 12|AMIGA_BUS_ENABLE_LOW|OUT| | => | 3 4 ( 5) 6 | 18 19 ( 20) 21 @@ -845,7 +843,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 0 [IOpin 0 | 15|INP A_28_|*|*] [RegIn 0 |150| -| | ] [MCell 0 |149|OUT AVEC_EXP| | ] - [MCell 1 |151|NOD CLK_CNT_N_0_| |*] + [MCell 1 |151|NOD SM_AMIGA_2_| |*] 1 [IOpin 1 | 16|INP A_27_|*|*] [RegIn 1 |153| -| | ] @@ -854,8 +852,8 @@ IMX No. | +---- Block IO Pin or Macrocell Number 2 [IOpin 2 | 17|INP A_26_|*|*] [RegIn 2 |156| -| | ] - [MCell 4 |155|NOD inst_CLK_OUT_PRE| |*] - [MCell 5 |157|NOD inst_VPA_SYNC| |*] + [MCell 4 |155|NOD SM_AMIGA_6_| |*] + [MCell 5 |157|NOD SM_AMIGA_3_| |*] 3 [IOpin 3 | 18|INP A_25_|*|*] [RegIn 3 |159| -| | ] @@ -864,8 +862,8 @@ IMX No. | +---- Block IO Pin or Macrocell Number 4 [IOpin 4 | 19|INP A_24_|*|*] [RegIn 4 |162| -| | ] - [MCell 8 |161|NOD SM_AMIGA_3_| |*] - [MCell 9 |163|NOD inst_DTACK_SYNC| |*] + [MCell 8 |161|NOD SM_AMIGA_7_| |*] + [MCell 9 |163|NOD SM_AMIGA_0_| |*] 5 [IOpin 5 | 20|OUT AMIGA_BUS_ENABLE_LOW|*| ] [RegIn 5 |165| -| | ] @@ -889,35 +887,35 @@ IMX No. | +---- Block IO Pin or Macrocell Number | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- Mux00| Input Pin ( 86)| RST -Mux01| Mcel 2 1 ( 151)| CLK_CNT_N_0_ -Mux02| Mcel 0 9 ( 115)| CLK_CNT_N_1_ -Mux03| Mcel 4 5 ( 205)| CLK_CNT_P_1_ +Mux01| Mcel 2 1 ( 151)| SM_AMIGA_2_ +Mux02| Mcel 0 5 ( 109)| SM_AMIGA_4_ +Mux03| Mcel 2 9 ( 163)| SM_AMIGA_0_ Mux04| ... | ... -Mux05| ... | ... -Mux06| ... | ... -Mux07| Mcel 2 5 ( 157)| inst_VPA_SYNC -Mux08| Mcel 4 8 ( 209)| inst_CLK_000_D0 -Mux09| Mcel 0 12 ( 119)| SM_AMIGA_4_ -Mux10| Input Pin ( 36)| VPA -Mux11| Mcel 6 4 ( 251)| RN_E +Mux05| Input Pin ( 14)| nEXP_SPACE +Mux06| Mcel 1 9 ( 139)| inst_DTACK_SYNC +Mux07| Mcel 2 5 ( 157)| SM_AMIGA_3_ +Mux08| ... | ... +Mux09| ... | ... +Mux10| Mcel 6 9 ( 259)| inst_CLK_000_D3 +Mux11| ... | ... Mux12| Mcel 7 1 ( 271)| RN_FPU_CS -Mux13| Mcel 2 9 ( 163)| inst_DTACK_SYNC -Mux14| Mcel 6 12 ( 263)| cpu_est_1_ -Mux15| ... | ... -Mux16| Mcel 2 8 ( 161)| SM_AMIGA_3_ -Mux17| Mcel 3 1 ( 175)| RN_VMA -Mux18| ... | ... -Mux19| IOPin 7 3 ( 82)| AS_030 -Mux20| ... | ... +Mux13| Mcel 4 1 ( 199)| inst_CLK_000_D2 +Mux14| Mcel 3 4 ( 179)| RN_AS_000 +Mux15| Mcel 5 1 ( 223)| inst_AS_030_000_SYNC +Mux16| Mcel 2 8 ( 161)| SM_AMIGA_7_ +Mux17| Mcel 5 12 ( 239)| inst_CLK_000_D6 +Mux18| Mcel 0 8 ( 113)| inst_CLK_000_D0 +Mux19| ... | ... +Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 Mux21| ... | ... -Mux22| Mcel 6 5 ( 253)| CLK_CNT_P_0_ -Mux23| IOPin 3 5 ( 30)| DTACK +Mux22| Mcel 6 5 ( 253)| inst_CLK_000_D5 +Mux23| ... | ... Mux24| ... | ... -Mux25| ... | ... +Mux25| Mcel 5 0 ( 221)| SM_AMIGA_1_ Mux26| ... | ... Mux27| ... | ... -Mux28| ... | ... -Mux29| ... | ... +Mux28| Mcel 1 5 ( 133)| inst_VPA_SYNC +Mux29| Mcel 2 4 ( 155)| SM_AMIGA_6_ Mux30| ... | ... Mux31| ... | ... Mux32| ... | ... @@ -933,20 +931,20 @@ Mux32| ... | ... | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| DTACK| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig - 1| VMA| IO| | S | 2 :+: 1| 4 to [ 1]| 1 XOR to [ 1] + 1| VMA| IO| | S | 4 | 4 to [ 1]| 1 XOR free 2| | ? | | S | | 4 free | 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free 4| AS_000| IO| | S | 2 | 4 to [ 4]| 1 XOR free - 5|AMIGA_BUS_ENABLE| IO| | S | 7 | 4 to [ 5]| 1 XOR to [ 5] as logic PT + 5|AMIGA_BUS_ENABLE| IO| | S | 6 | 4 to [ 5]| 1 XOR to [ 5] as logic PT 6| | ? | | S | | 4 to [ 5]| 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free - 8| LDS_000| IO| | S | 8 | 4 free | 1 XOR free - 9| | ? | | S | | 4 to [ 8]| 1 XOR free -10| | ? | | S | | 4 to [ 8]| 1 XOR free + 8| LDS_000| IO| | S |10 | 4 free | 1 XOR free + 9| | ? | | S | | 4 to [ 8]| 1 XOR to [ 8] as logic PT +10| | ? | | S | | 4 to [ 8]| 1 XOR to [ 8] as logic PT 11| | ? | | S | | 4 free | 1 XOR free -12| UDS_000| IO| | S | 5 | 4 to [12]| 1 XOR to [12] as logic PT +12| UDS_000| IO| | S | 6 | 4 to [12]| 1 XOR to [12] as logic PT 13| BG_000| IO| | S | 2 | 4 to [13]| 1 XOR free -14| | ? | | S | | 4 free | 1 XOR free +14| | ? | | S | | 4 to [12]| 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== @@ -960,21 +958,21 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ 0| DTACK| IO| | S | 1 |=> can support up to [ 10] logic PT(s) - 1| VMA| IO| | S | 2 :+: 1|=> can support up to [ 18] logic PT(s) + 1| VMA| IO| | S | 4 |=> can support up to [ 19] logic PT(s) 2| | ? | | S | |=> can support up to [ 10] logic PT(s) 3| | ? | | S | |=> can support up to [ 10] logic PT(s) 4| AS_000| IO| | S | 2 |=> can support up to [ 10] logic PT(s) - 5|AMIGA_BUS_ENABLE| IO| | S | 7 |=> can support up to [ 15] logic PT(s) + 5|AMIGA_BUS_ENABLE| IO| | S | 6 |=> can support up to [ 15] logic PT(s) 6| | ? | | S | |=> can support up to [ 11] logic PT(s) 7| | ? | | S | |=> can support up to [ 10] logic PT(s) - 8| LDS_000| IO| | S | 8 |=> can support up to [ 20] logic PT(s) - 9| | ? | | S | |=> can support up to [ 11] logic PT(s) -10| | ? | | S | |=> can support up to [ 6] logic PT(s) + 8| LDS_000| IO| | S |10 |=> can support up to [ 20] logic PT(s) + 9| | ? | | S | |=> can support up to [ 10] logic PT(s) +10| | ? | | S | |=> can support up to [ 5] logic PT(s) 11| | ? | | S | |=> can support up to [ 5] logic PT(s) -12| UDS_000| IO| | S | 5 |=> can support up to [ 15] logic PT(s) -13| BG_000| IO| | S | 2 |=> can support up to [ 15] logic PT(s) -14| | ? | | S | |=> can support up to [ 10] logic PT(s) -15| | ? | | S | |=> can support up to [ 10] logic PT(s) +12| UDS_000| IO| | S | 6 |=> can support up to [ 15] logic PT(s) +13| BG_000| IO| | S | 2 |=> can support up to [ 10] logic PT(s) +14| | ? | | S | |=> can support up to [ 6] logic PT(s) +15| | ? | | S | |=> can support up to [ 5] logic PT(s) --------------------------------------------------------------------------- =========================================================================== < Block [ 3] > Node-Pin Assignments @@ -1100,36 +1098,36 @@ IMX No. | +---- Block IO Pin or Macrocell Number --|--|--------------------|--------------------------------------------------- Mux00| IOPin 6 4 ( 69)| A0 Mux01| Mcel 3 13 ( 193)| RN_BG_000 -Mux02| Mcel 6 4 ( 251)| RN_E -Mux03| Input Pin ( 11)| CLK_000 +Mux02| Mcel 3 1 ( 175)| RN_VMA +Mux03| Mcel 4 5 ( 205)| inst_VPA_D Mux04| IOPin 2 6 ( 21)| BG_030 -Mux05| IOPin 0 7 ( 98)| DS_030 -Mux06| IOPin 7 6 ( 79)| SIZE_1_ -Mux07| Mcel 6 12 ( 263)| cpu_est_1_ -Mux08| Mcel 4 8 ( 209)| inst_CLK_000_D0 -Mux09| Mcel 0 12 ( 119)| SM_AMIGA_4_ -Mux10| Mcel 3 4 ( 179)| RN_AS_000 +Mux05| Input Pin ( 14)| nEXP_SPACE +Mux06| Mcel 2 4 ( 155)| SM_AMIGA_6_ +Mux07| Mcel 3 5 ( 181)| RN_AMIGA_BUS_ENABLE +Mux08| IOPin 6 6 ( 71)| RW +Mux09| Mcel 0 1 ( 103)| cpu_est_0_ +Mux10| Mcel 5 4 ( 227)| inst_BGACK_030_INT_D Mux11| Mcel 3 12 ( 191)| RN_UDS_000 -Mux12| Mcel 0 1 ( 103)| SM_AMIGA_5_ -Mux13| Input Pin ( 36)| VPA -Mux14| IOPin 6 5 ( 70)| SIZE_0_ -Mux15| Input Pin ( 14)| nEXP_SPACE +Mux12| IOPin 0 7 ( 98)| DS_030 +Mux13| Mcel 2 9 ( 163)| SM_AMIGA_0_ +Mux14| Mcel 3 4 ( 179)| RN_AS_000 +Mux15| Mcel 0 12 ( 119)| cpu_est_1_ Mux16| Mcel 3 8 ( 185)| RN_LDS_000 -Mux17| Mcel 3 1 ( 175)| RN_VMA -Mux18| Mcel 0 8 ( 113)| cpu_est_0_ +Mux17| IOPin 6 5 ( 70)| SIZE_0_ +Mux18| Mcel 0 5 ( 109)| SM_AMIGA_4_ Mux19| IOPin 7 3 ( 82)| AS_030 -Mux20| Mcel 5 8 ( 233)| SM_AMIGA_6_ +Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 Mux21| Input Pin ( 86)| RST Mux22| ... | ... -Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux24| Mcel 3 5 ( 181)| RN_AMIGA_BUS_ENABLE -Mux25| IOPin 6 6 ( 71)| RW +Mux23| Mcel 6 12 ( 263)| SM_AMIGA_5_ +Mux24| Input Pin ( 11)| CLK_000 +Mux25| Mcel 7 8 ( 281)| RN_AS_030 Mux26| ... | ... -Mux27| Mcel 6 9 ( 259)| cpu_est_2_ +Mux27| IOPin 7 6 ( 79)| SIZE_1_ Mux28| ... | ... -Mux29| Mcel 5 4 ( 227)| inst_BGACK_030_INT_D -Mux30| Mcel 5 1 ( 223)| SM_AMIGA_0_ -Mux31| Mcel 5 12 ( 239)| SM_AMIGA_7_ +Mux29| Mcel 2 8 ( 161)| SM_AMIGA_7_ +Mux30| Mcel 0 8 ( 113)| inst_CLK_000_D0 +Mux31| Mcel 5 0 ( 221)| SM_AMIGA_1_ Mux32| IOPin 7 4 ( 81)| DSACK_1_ --------------------------------------------------------------------------- =========================================================================== @@ -1143,15 +1141,15 @@ Mux32| IOPin 7 4 ( 81)| DSACK_1_ | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ 0|AMIGA_BUS_DATA_DIR|OUT| | S | 2 | 4 to [ 0]| 1 XOR free - 1|inst_CLK_000_D5|NOD| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig + 1|inst_CLK_000_D2|NOD| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig 2| | ? | | S | | 4 free | 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free 4| BERR|OUT| | S | 1 | 4 free | 1 XOR to [ 4] for 1 PT sig - 5| CLK_CNT_P_1_|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig + 5| inst_VPA_D|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig 6| | ? | | S | | 4 free | 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free - 8|inst_CLK_000_D0|NOD| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig - 9|inst_CLK_000_D3|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig + 8|inst_CLK_000_D1|NOD| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig + 9|inst_CLK_000_D4|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig 10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free 12| CIIN|OUT| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig @@ -1170,15 +1168,15 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ 0|AMIGA_BUS_DATA_DIR|OUT| | S | 2 |=> can support up to [ 14] logic PT(s) - 1|inst_CLK_000_D5|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) + 1|inst_CLK_000_D2|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) 2| | ? | | S | |=> can support up to [ 18] logic PT(s) 3| | ? | | S | |=> can support up to [ 18] logic PT(s) 4| BERR|OUT| | S | 1 |=> can support up to [ 19] logic PT(s) - 5| CLK_CNT_P_1_|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) + 5| inst_VPA_D|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) 6| | ? | | S | |=> can support up to [ 18] logic PT(s) 7| | ? | | S | |=> can support up to [ 18] logic PT(s) - 8|inst_CLK_000_D0|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) - 9|inst_CLK_000_D3|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) + 8|inst_CLK_000_D1|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) + 9|inst_CLK_000_D4|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) 10| | ? | | S | |=> can support up to [ 18] logic PT(s) 11| | ? | | S | |=> can support up to [ 19] logic PT(s) 12| CIIN|OUT| | S | 1 |=> can support up to [ 20] logic PT(s) @@ -1195,15 +1193,15 @@ _|_________________|__|__|___|_____|_______________________________________ | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ 0|AMIGA_BUS_DATA_DIR|OUT| | => | 5 6 ( 7) 0 | 46 47 ( 48) 41 - 1|inst_CLK_000_D5|NOD| | => | 5 6 7 0 | 46 47 48 41 + 1|inst_CLK_000_D2|NOD| | => | 5 6 7 0 | 46 47 48 41 2| | | | => | 6 7 0 1 | 47 48 41 42 3| | | | => | 6 7 0 1 | 47 48 41 42 4| BERR|OUT| | => | 7 ( 0) 1 2 | 48 ( 41) 42 43 - 5| CLK_CNT_P_1_|NOD| | => | 7 0 1 2 | 48 41 42 43 + 5| inst_VPA_D|NOD| | => | 7 0 1 2 | 48 41 42 43 6| | | | => | 0 1 2 3 | 41 42 43 44 7| | | | => | 0 1 2 3 | 41 42 43 44 - 8|inst_CLK_000_D0|NOD| | => | 1 2 3 4 | 42 43 44 45 - 9|inst_CLK_000_D3|NOD| | => | 1 2 3 4 | 42 43 44 45 + 8|inst_CLK_000_D1|NOD| | => | 1 2 3 4 | 42 43 44 45 + 9|inst_CLK_000_D4|NOD| | => | 1 2 3 4 | 42 43 44 45 10| | | | => | 2 3 4 5 | 43 44 45 46 11| | | | => | 2 3 4 5 | 43 44 45 46 12| CIIN|OUT| | => | 3 4 5 ( 6)| 44 45 46 ( 47) @@ -1259,7 +1257,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 0 [IOpin 0 | 41|OUT BERR|*| ] [RegIn 0 |198| -| | ] [MCell 0 |197|OUT AMIGA_BUS_DATA_DIR| | ] - [MCell 1 |199|NOD inst_CLK_000_D5| |*] + [MCell 1 |199|NOD inst_CLK_000_D2| |*] 1 [IOpin 1 | 42| -| | ] [RegIn 1 |201| -| | ] @@ -1269,7 +1267,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 2 [IOpin 2 | 43| -| | ] [RegIn 2 |204| -| | ] [MCell 4 |203|OUT BERR| | ] - [MCell 5 |205|NOD CLK_CNT_P_1_| |*] + [MCell 5 |205|NOD inst_VPA_D| |*] 3 [IOpin 3 | 44| -| | ] [RegIn 3 |207| -| | ] @@ -1278,8 +1276,8 @@ IMX No. | +---- Block IO Pin or Macrocell Number 4 [IOpin 4 | 45| -| | ] [RegIn 4 |210| -| | ] - [MCell 8 |209|NOD inst_CLK_000_D0| |*] - [MCell 9 |211|NOD inst_CLK_000_D3| |*] + [MCell 8 |209|NOD inst_CLK_000_D1| |*] + [MCell 9 |211|NOD inst_CLK_000_D4| |*] 5 [IOpin 5 | 46| -| | ] [RegIn 5 |213| -| | ] @@ -1304,7 +1302,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number --|--|--------------------|--------------------------------------------------- Mux00| Input Pin ( 86)| RST Mux01| IOPin 1 6 ( 4)| A_31_ -Mux02| Mcel 0 5 ( 109)| inst_CLK_000_D2 +Mux02| ... | ... Mux03| IOPin 2 1 ( 16)| A_27_ Mux04| IOPin 1 4 ( 6)| A_29_ Mux05| IOPin 2 4 ( 19)| A_24_ @@ -1312,24 +1310,24 @@ Mux06| ... | ... Mux07| IOPin 2 0 ( 15)| A_28_ Mux08| IOPin 7 0 ( 85)| A_22_ Mux09| IOPin 1 5 ( 5)| A_30_ -Mux10| Mcel 7 1 ( 271)| RN_FPU_CS +Mux10| Input Pin ( 36)| VPA Mux11| IOPin 7 1 ( 84)| A_23_ Mux12| IOPin 2 3 ( 18)| A_25_ Mux13| ... | ... -Mux14| Input Pin ( 11)| CLK_000 +Mux14| ... | ... Mux15| IOPin 0 3 ( 94)| A_21_ -Mux16| ... | ... +Mux16| Mcel 4 8 ( 209)| inst_CLK_000_D1 Mux17| IOPin 2 2 ( 17)| A_26_ -Mux18| Mcel 5 9 ( 235)| inst_CLK_000_D4 -Mux19| ... | ... +Mux18| Mcel 0 8 ( 113)| inst_CLK_000_D0 +Mux19| Mcel 7 1 ( 271)| RN_FPU_CS Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux21| ... | ... -Mux22| Mcel 6 5 ( 253)| CLK_CNT_P_0_ +Mux21| Input Pin ( 14)| nEXP_SPACE +Mux22| ... | ... Mux23| ... | ... Mux24| ... | ... Mux25| IOPin 6 6 ( 71)| RW Mux26| ... | ... -Mux27| ... | ... +Mux27| Mcel 6 9 ( 259)| inst_CLK_000_D3 Mux28| ... | ... Mux29| IOPin 0 2 ( 93)| A_20_ Mux30| ... | ... @@ -1346,19 +1344,19 @@ Mux32| ... | ... | Sig Type-+ | | | | | | | XOR to Mcell Assignment | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ - 0|inst_CLK_000_D1|NOD| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig - 1| SM_AMIGA_0_|NOD| | S | 4 | 4 to [ 1]| 1 XOR free - 2| | ? | | S | | 4 free | 1 XOR free + 0| SM_AMIGA_1_|NOD| | S | 4 | 4 to [ 0]| 1 XOR free + 1|inst_AS_030_000_SYNC|NOD| | S | 7 | 4 to [ 1]| 1 XOR to [ 1] as logic PT + 2| | ? | | S | | 4 to [ 1]| 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free 4|inst_BGACK_030_INT_D|NOD| | S | 1 | 4 free | 1 XOR to [ 4] for 1 PT sig - 5|inst_AS_030_000_SYNC|NOD| | S | 7 | 4 to [ 5]| 1 XOR to [ 5] as logic PT - 6| | ? | | S | | 4 to [ 5]| 1 XOR free + 5| CLK_CNT_P_0_|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig + 6| | ? | | S | | 4 free | 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free - 8| SM_AMIGA_6_|NOD| | S | 2 | 4 free | 1 XOR free - 9|inst_CLK_000_D4|NOD| | S | 1 | 4 to [ 8]| 1 XOR to [ 9] for 1 PT sig + 8|inst_CLK_OUT_PRE|NOD| | S | 2 | 4 free | 1 XOR free + 9| | ? | | S | | 4 to [ 8]| 1 XOR free 10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free -12| SM_AMIGA_7_|NOD| | S | 5 | 4 to [12]| 1 XOR to [12] as logic PT +12|inst_CLK_000_D6|NOD| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig 13| | ? | | S | | 4 free | 1 XOR free 14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free @@ -1373,20 +1371,20 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0|inst_CLK_000_D1|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) - 1| SM_AMIGA_0_|NOD| | S | 4 |=> can support up to [ 19] logic PT(s) - 2| | ? | | S | |=> can support up to [ 14] logic PT(s) - 3| | ? | | S | |=> can support up to [ 14] logic PT(s) - 4|inst_BGACK_030_INT_D|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) - 5|inst_AS_030_000_SYNC|NOD| | S | 7 |=> can support up to [ 19] logic PT(s) - 6| | ? | | S | |=> can support up to [ 11] logic PT(s) - 7| | ? | | S | |=> can support up to [ 10] logic PT(s) - 8| SM_AMIGA_6_|NOD| | S | 2 |=> can support up to [ 19] logic PT(s) - 9|inst_CLK_000_D4|NOD| | S | 1 |=> can support up to [ 16] logic PT(s) -10| | ? | | S | |=> can support up to [ 10] logic PT(s) -11| | ? | | S | |=> can support up to [ 15] logic PT(s) -12| SM_AMIGA_7_|NOD| | S | 5 |=> can support up to [ 20] logic PT(s) -13| | ? | | S | |=> can support up to [ 15] logic PT(s) + 0| SM_AMIGA_1_|NOD| | S | 4 |=> can support up to [ 5] logic PT(s) + 1|inst_AS_030_000_SYNC|NOD| | S | 7 |=> can support up to [ 15] logic PT(s) + 2| | ? | | S | |=> can support up to [ 10] logic PT(s) + 3| | ? | | S | |=> can support up to [ 13] logic PT(s) + 4|inst_BGACK_030_INT_D|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) + 5| CLK_CNT_P_0_|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) + 6| | ? | | S | |=> can support up to [ 19] logic PT(s) + 7| | ? | | S | |=> can support up to [ 15] logic PT(s) + 8|inst_CLK_OUT_PRE|NOD| | S | 2 |=> can support up to [ 20] logic PT(s) + 9| | ? | | S | |=> can support up to [ 16] logic PT(s) +10| | ? | | S | |=> can support up to [ 14] logic PT(s) +11| | ? | | S | |=> can support up to [ 19] logic PT(s) +12|inst_CLK_000_D6|NOD| | S | 1 |=> can support up to [ 20] logic PT(s) +13| | ? | | S | |=> can support up to [ 19] logic PT(s) 14| | ? | | S | |=> can support up to [ 15] logic PT(s) 15| | ? | | S | |=> can support up to [ 10] logic PT(s) --------------------------------------------------------------------------- @@ -1398,19 +1396,19 @@ _|_________________|__|__|___|_____|_______________________________________ | Sig Type---+ | to | Block [ 5] IO Pin | Device Pin | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ - 0|inst_CLK_000_D1|NOD| | => | 5 6 7 0 | 55 54 53 60 - 1| SM_AMIGA_0_|NOD| | => | 5 6 7 0 | 55 54 53 60 + 0| SM_AMIGA_1_|NOD| | => | 5 6 7 0 | 55 54 53 60 + 1|inst_AS_030_000_SYNC|NOD| | => | 5 6 7 0 | 55 54 53 60 2| | | | => | 6 7 0 1 | 54 53 60 59 3| | | | => | 6 7 0 1 | 54 53 60 59 4|inst_BGACK_030_INT_D|NOD| | => | 7 0 1 2 | 53 60 59 58 - 5|inst_AS_030_000_SYNC|NOD| | => | 7 0 1 2 | 53 60 59 58 + 5| CLK_CNT_P_0_|NOD| | => | 7 0 1 2 | 53 60 59 58 6| | | | => | 0 1 2 3 | 60 59 58 57 7| | | | => | 0 1 2 3 | 60 59 58 57 - 8| SM_AMIGA_6_|NOD| | => | 1 2 3 4 | 59 58 57 56 - 9|inst_CLK_000_D4|NOD| | => | 1 2 3 4 | 59 58 57 56 + 8|inst_CLK_OUT_PRE|NOD| | => | 1 2 3 4 | 59 58 57 56 + 9| | | | => | 1 2 3 4 | 59 58 57 56 10| | | | => | 2 3 4 5 | 58 57 56 55 11| | | | => | 2 3 4 5 | 58 57 56 55 -12| SM_AMIGA_7_|NOD| | => | 3 4 5 6 | 57 56 55 54 +12|inst_CLK_000_D6|NOD| | => | 3 4 5 6 | 57 56 55 54 13| | | | => | 3 4 5 6 | 57 56 55 54 14| | | | => | 4 5 6 7 | 56 55 54 53 15| | | | => | 4 5 6 7 | 56 55 54 53 @@ -1462,8 +1460,8 @@ IMX No. | +---- Block IO Pin or Macrocell Number ---|-------|----|---|---|----------|------|-|------------------------------ 0 [IOpin 0 | 60| -| | ] [RegIn 0 |222| -| | ] - [MCell 0 |221|NOD inst_CLK_000_D1| |*] - [MCell 1 |223|NOD SM_AMIGA_0_| |*] + [MCell 0 |221|NOD SM_AMIGA_1_| |*] + [MCell 1 |223|NOD inst_AS_030_000_SYNC| |*] 1 [IOpin 1 | 59|INP A_17_|*|*] [RegIn 1 |225| -| | ] @@ -1473,7 +1471,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 2 [IOpin 2 | 58|INP FC_1_|*|*] [RegIn 2 |228| -| | ] [MCell 4 |227|NOD inst_BGACK_030_INT_D| |*] - [MCell 5 |229|NOD inst_AS_030_000_SYNC| |*] + [MCell 5 |229|NOD CLK_CNT_P_0_| |*] 3 [IOpin 3 | 57|INP FC_0_|*|*] [RegIn 3 |231| -| | ] @@ -1482,8 +1480,8 @@ IMX No. | +---- Block IO Pin or Macrocell Number 4 [IOpin 4 | 56|INP IPL_1_|*|*] [RegIn 4 |234| -| | ] - [MCell 8 |233|NOD SM_AMIGA_6_| |*] - [MCell 9 |235|NOD inst_CLK_000_D4| |*] + [MCell 8 |233|NOD inst_CLK_OUT_PRE| |*] + [MCell 9 |235| -| | ] 5 [IOpin 5 | 55| -| | ] [RegIn 5 |237| -| | ] @@ -1492,7 +1490,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 6 [IOpin 6 | 54| -| | ] [RegIn 6 |240| -| | ] - [MCell 12 |239|NOD SM_AMIGA_7_| |*] + [MCell 12 |239|NOD inst_CLK_000_D6| |*] [MCell 13 |241| -| | ] 7 [IOpin 7 | 53| -| | ] @@ -1508,37 +1506,37 @@ IMX No. | +---- Block IO Pin or Macrocell Number --|--|--------------------|--------------------------------------------------- Mux00| Input Pin ( 86)| RST Mux01| IOPin 5 2 ( 58)| FC_1_ -Mux02| Mcel 4 9 ( 211)| inst_CLK_000_D3 -Mux03| ... | ... +Mux02| Mcel 5 8 ( 233)| inst_CLK_OUT_PRE +Mux03| Mcel 6 5 ( 253)| inst_CLK_000_D5 Mux04| IOPin 3 7 ( 28)| BGACK_000 Mux05| Input Pin ( 14)| nEXP_SPACE Mux06| IOPin 5 3 ( 57)| FC_0_ -Mux07| ... | ... +Mux07| Mcel 2 8 ( 161)| SM_AMIGA_7_ Mux08| IOPin 5 1 ( 59)| A_17_ -Mux09| Mcel 5 5 ( 229)| inst_AS_030_000_SYNC -Mux10| Mcel 3 4 ( 179)| RN_AS_000 +Mux09| Mcel 5 5 ( 229)| CLK_CNT_P_0_ +Mux10| Mcel 5 1 ( 223)| inst_AS_030_000_SYNC Mux11| IOPin 0 5 ( 96)| A_16_ Mux12| IOPin 0 6 ( 97)| A_19_ -Mux13| Mcel 7 5 ( 277)| inst_CLK_000_D6 -Mux14| ... | ... -Mux15| Mcel 5 1 ( 223)| SM_AMIGA_0_ -Mux16| Mcel 4 8 ( 209)| inst_CLK_000_D0 +Mux13| ... | ... +Mux14| Mcel 2 4 ( 155)| SM_AMIGA_6_ +Mux15| ... | ... +Mux16| ... | ... Mux17| IOPin 0 4 ( 95)| A_18_ -Mux18| Mcel 0 5 ( 109)| inst_CLK_000_D2 +Mux18| Mcel 0 8 ( 113)| inst_CLK_000_D0 Mux19| IOPin 7 3 ( 82)| AS_030 Mux20| Input Pin ( 64)| CLK_030 Mux21| ... | ... -Mux22| ... | ... +Mux22| Mcel 2 1 ( 151)| SM_AMIGA_2_ Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 Mux24| ... | ... -Mux25| ... | ... +Mux25| Mcel 5 0 ( 221)| SM_AMIGA_1_ Mux26| ... | ... Mux27| ... | ... -Mux28| Mcel 1 5 ( 133)| SM_AMIGA_1_ -Mux29| Mcel 4 1 ( 199)| inst_CLK_000_D5 +Mux28| ... | ... +Mux29| ... | ... Mux30| ... | ... -Mux31| Mcel 5 12 ( 239)| SM_AMIGA_7_ -Mux32| Mcel 5 8 ( 233)| SM_AMIGA_6_ +Mux31| Mcel 5 12 ( 239)| inst_CLK_000_D6 +Mux32| ... | ... --------------------------------------------------------------------------- =========================================================================== < Block [ 6] > Macrocell (MCell) Cluster Assignments @@ -1555,14 +1553,14 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ 2| | ? | | S | | 4 free | 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free 4| E| IO| | S | 3 :+: 1| 4 to [ 4]| 1 XOR to [ 4] - 5| CLK_CNT_P_0_|NOD| | S | 2 | 4 to [ 5]| 1 XOR free + 5|inst_CLK_000_D5|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig 6| | ? | | S | | 4 free | 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free 8| A0| IO| | S | 2 | 4 to [ 8]| 1 XOR free - 9| cpu_est_2_|NOD| | S | 3 :+: 1| 4 to [ 9]| 1 XOR to [ 9] + 9|inst_CLK_000_D3|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig 10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free -12| cpu_est_1_|NOD| | S | 4 | 4 to [12]| 1 XOR free +12| SM_AMIGA_5_|NOD| | S | 3 | 4 to [12]| 1 XOR free 13| | ? | | S | | 4 free | 1 XOR free 14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free @@ -1580,16 +1578,16 @@ _|_________________|__|__|___|_____|_______________________________________ 0| SIZE_0_| IO| | S | 2 |=> can support up to [ 14] logic PT(s) 1| CLK_DIV_OUT|OUT| | S | 1 |=> can support up to [ 15] logic PT(s) 2| | ? | | S | |=> can support up to [ 14] logic PT(s) - 3| | ? | | S | |=> can support up to [ 10] logic PT(s) - 4| E| IO| | S | 3 :+: 1|=> can support up to [ 14] logic PT(s) - 5| CLK_CNT_P_0_|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) - 6| | ? | | S | |=> can support up to [ 10] logic PT(s) - 7| | ? | | S | |=> can support up to [ 10] logic PT(s) - 8| A0| IO| | S | 2 |=> can support up to [ 15] logic PT(s) - 9| cpu_est_2_|NOD| | S | 3 :+: 1|=> can support up to [ 14] logic PT(s) -10| | ? | | S | |=> can support up to [ 10] logic PT(s) + 3| | ? | | S | |=> can support up to [ 14] logic PT(s) + 4| E| IO| | S | 3 :+: 1|=> can support up to [ 18] logic PT(s) + 5|inst_CLK_000_D5|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) + 6| | ? | | S | |=> can support up to [ 14] logic PT(s) + 7| | ? | | S | |=> can support up to [ 14] logic PT(s) + 8| A0| IO| | S | 2 |=> can support up to [ 19] logic PT(s) + 9|inst_CLK_000_D3|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) +10| | ? | | S | |=> can support up to [ 14] logic PT(s) 11| | ? | | S | |=> can support up to [ 15] logic PT(s) -12| cpu_est_1_|NOD| | S | 4 |=> can support up to [ 20] logic PT(s) +12| SM_AMIGA_5_|NOD| | S | 3 |=> can support up to [ 20] logic PT(s) 13| | ? | | S | |=> can support up to [ 15] logic PT(s) 14| | ? | | S | |=> can support up to [ 15] logic PT(s) 15| | ? | | S | |=> can support up to [ 10] logic PT(s) @@ -1607,14 +1605,14 @@ _|_________________|__|_____|____________________|________________________ 2| | | | => | 6 7 0 1 | 71 72 65 66 3| | | | => | 6 7 0 1 | 71 72 65 66 4| E| IO| | => | 7 0 ( 1) 2 | 72 65 ( 66) 67 - 5| CLK_CNT_P_0_|NOD| | => | 7 0 1 2 | 72 65 66 67 + 5|inst_CLK_000_D5|NOD| | => | 7 0 1 2 | 72 65 66 67 6| | | | => | 0 1 2 3 | 65 66 67 68 7| | | | => | 0 1 2 3 | 65 66 67 68 8| A0| IO| | => | 1 2 3 ( 4)| 66 67 68 ( 69) - 9| cpu_est_2_|NOD| | => | 1 2 3 4 | 66 67 68 69 + 9|inst_CLK_000_D3|NOD| | => | 1 2 3 4 | 66 67 68 69 10| | | | => | 2 3 4 5 | 67 68 69 70 11| | | | => | 2 3 4 5 | 67 68 69 70 -12| cpu_est_1_|NOD| | => | 3 4 5 6 | 68 69 70 71 +12| SM_AMIGA_5_|NOD| | => | 3 4 5 6 | 68 69 70 71 13| | | | => | 3 4 5 6 | 68 69 70 71 14| | | | => | 4 5 6 7 | 69 70 71 72 15| | | | => | 4 5 6 7 | 69 70 71 72 @@ -1680,7 +1678,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 2 [IOpin 2 | 67|INP IPL_0_|*|*] [RegIn 2 |252| -| | ] [MCell 4 |251|NOD RN_E| |*] paired w/[ E] - [MCell 5 |253|NOD CLK_CNT_P_0_| |*] + [MCell 5 |253|NOD inst_CLK_000_D5| |*] 3 [IOpin 3 | 68|INP IPL_2_|*|*] [RegIn 3 |255| -| | ] @@ -1690,7 +1688,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 4 [IOpin 4 | 69| IO A0|*|*] paired w/[ RN_A0] [RegIn 4 |258| -| | ] [MCell 8 |257|NOD RN_A0| |*] paired w/[ A0] - [MCell 9 |259|NOD cpu_est_2_| |*] + [MCell 9 |259|NOD inst_CLK_000_D3| |*] 5 [IOpin 5 | 70| IO SIZE_0_|*|*] paired w/[ RN_SIZE_0_] [RegIn 5 |261| -| | ] @@ -1699,7 +1697,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 6 [IOpin 6 | 71|INP RW|*|*] [RegIn 6 |264| -| | ] - [MCell 12 |263|NOD cpu_est_1_| |*] + [MCell 12 |263|NOD SM_AMIGA_5_| |*] [MCell 13 |265| -| | ] 7 [IOpin 7 | 72| -| | ] @@ -1715,31 +1713,31 @@ IMX No. | +---- Block IO Pin or Macrocell Number --|--|--------------------|--------------------------------------------------- Mux00| Input Pin ( 86)| RST Mux01| ... | ... -Mux02| Mcel 6 4 ( 251)| RN_E -Mux03| Mcel 4 5 ( 205)| CLK_CNT_P_1_ +Mux02| Mcel 4 9 ( 211)| inst_CLK_000_D4 +Mux03| Mcel 7 8 ( 281)| RN_AS_030 Mux04| Input Pin ( 64)| CLK_030 Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| Mcel 2 4 ( 155)| inst_CLK_OUT_PRE -Mux07| Mcel 6 12 ( 263)| cpu_est_1_ -Mux08| IOPin 3 3 ( 32)| UDS_000 -Mux09| ... | ... +Mux06| Mcel 2 4 ( 155)| SM_AMIGA_6_ +Mux07| Mcel 6 12 ( 263)| SM_AMIGA_5_ +Mux08| Mcel 4 8 ( 209)| inst_CLK_000_D1 +Mux09| Mcel 0 1 ( 103)| cpu_est_0_ Mux10| Mcel 6 8 ( 257)| RN_A0 -Mux11| ... | ... -Mux12| Mcel 6 9 ( 259)| cpu_est_2_ -Mux13| ... | ... +Mux11| Mcel 6 4 ( 251)| RN_E +Mux12| IOPin 3 3 ( 32)| UDS_000 +Mux13| Mcel 4 1 ( 199)| inst_CLK_000_D2 Mux14| Mcel 5 4 ( 227)| inst_BGACK_030_INT_D -Mux15| ... | ... -Mux16| Mcel 4 8 ( 209)| inst_CLK_000_D0 +Mux15| Mcel 0 12 ( 119)| cpu_est_1_ +Mux16| ... | ... Mux17| Mcel 6 0 ( 245)| RN_SIZE_0_ -Mux18| Mcel 0 8 ( 113)| cpu_est_0_ -Mux19| ... | ... -Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux18| Mcel 0 8 ( 113)| inst_CLK_000_D0 +Mux19| Mcel 0 9 ( 115)| cpu_est_2_ +Mux20| Mcel 5 8 ( 233)| inst_CLK_OUT_PRE Mux21| ... | ... -Mux22| Mcel 6 5 ( 253)| CLK_CNT_P_0_ -Mux23| IOPin 3 2 ( 33)| AS_000 +Mux22| ... | ... +Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 Mux24| IOPin 3 4 ( 31)| LDS_000 -Mux25| Mcel 5 0 ( 221)| inst_CLK_000_D1 -Mux26| ... | ... +Mux25| ... | ... +Mux26| IOPin 3 2 ( 33)| AS_000 Mux27| ... | ... Mux28| ... | ... Mux29| ... | ... @@ -1762,7 +1760,7 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ 2| | ? | | S | | 4 free | 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free 4| BGACK_030| IO| | S | 2 | 4 to [ 4]| 1 XOR free - 5|inst_CLK_000_D6|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig + 5| | ? | | S | | 4 free | 1 XOR free 6| | ? | | S | | 4 free | 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free 8| AS_030| IO| | S | 3 | 4 to [ 8]| 1 XOR free @@ -1787,10 +1785,10 @@ _|_________________|__|__|___|_____|_______________________________________ 0| SIZE_1_| IO| | S | 3 |=> can support up to [ 10] logic PT(s) 1| FPU_CS| IO| | S | 2 |=> can support up to [ 15] logic PT(s) 2| | ? | | S | |=> can support up to [ 10] logic PT(s) - 3| | ? | | S | |=> can support up to [ 14] logic PT(s) - 4| BGACK_030| IO| | S | 2 |=> can support up to [ 19] logic PT(s) - 5|inst_CLK_000_D6|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) - 6| | ? | | S | |=> can support up to [ 14] logic PT(s) + 3| | ? | | S | |=> can support up to [ 15] logic PT(s) + 4| BGACK_030| IO| | S | 2 |=> can support up to [ 20] logic PT(s) + 5| | ? | | S | |=> can support up to [ 15] logic PT(s) + 6| | ? | | S | |=> can support up to [ 15] logic PT(s) 7| | ? | | S | |=> can support up to [ 15] logic PT(s) 8| AS_030| IO| | S | 3 |=> can support up to [ 20] logic PT(s) 9| | ? | | S | |=> can support up to [ 15] logic PT(s) @@ -1814,7 +1812,7 @@ _|_________________|__|_____|____________________|________________________ 2| | | | => | 6 7 0 1 | 79 78 85 84 3| | | | => | 6 7 0 1 | 79 78 85 84 4| BGACK_030| IO| | => | 7 0 1 ( 2)| 78 85 84 ( 83) - 5|inst_CLK_000_D6|NOD| | => | 7 0 1 2 | 78 85 84 83 + 5| | | | => | 7 0 1 2 | 78 85 84 83 6| | | | => | 0 1 2 3 | 85 84 83 82 7| | | | => | 0 1 2 3 | 85 84 83 82 8| AS_030| IO| | => | 1 2 ( 3) 4 | 84 83 ( 82) 81 @@ -1889,7 +1887,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 2 [IOpin 2 | 83| IO BGACK_030|*| ] paired w/[ RN_BGACK_030] [RegIn 2 |276| -| | ] [MCell 4 |275|NOD RN_BGACK_030| |*] paired w/[ BGACK_030] - [MCell 5 |277|NOD inst_CLK_000_D6| |*] + [MCell 5 |277| -| | ] 3 [IOpin 3 | 82| IO AS_030|*|*] paired w/[ RN_AS_030] [RegIn 3 |279| -| | ] @@ -1926,7 +1924,7 @@ Mux00| Mcel 7 4 ( 275)| RN_BGACK_030 Mux01| IOPin 5 2 ( 58)| FC_1_ Mux02| ... | ... Mux03| Mcel 7 8 ( 281)| RN_AS_030 -Mux04| Mcel 7 5 ( 277)| inst_CLK_000_D6 +Mux04| IOPin 3 7 ( 28)| BGACK_000 Mux05| Input Pin ( 14)| nEXP_SPACE Mux06| IOPin 5 3 ( 57)| FC_0_ Mux07| ... | ... @@ -1938,21 +1936,21 @@ Mux12| IOPin 0 6 ( 97)| A_19_ Mux13| IOPin 5 1 ( 59)| A_17_ Mux14| Mcel 5 4 ( 227)| inst_BGACK_030_INT_D Mux15| Mcel 7 12 ( 287)| RN_DSACK_1_ -Mux16| Mcel 4 8 ( 209)| inst_CLK_000_D0 +Mux16| Mcel 4 8 ( 209)| inst_CLK_000_D1 Mux17| IOPin 0 4 ( 95)| A_18_ -Mux18| IOPin 3 7 ( 28)| BGACK_000 +Mux18| Mcel 0 8 ( 113)| inst_CLK_000_D0 Mux19| ... | ... Mux20| Input Pin ( 64)| CLK_030 Mux21| Input Pin ( 86)| RST -Mux22| ... | ... +Mux22| Mcel 6 5 ( 253)| inst_CLK_000_D5 Mux23| Mcel 7 0 ( 269)| RN_SIZE_1_ Mux24| IOPin 3 4 ( 31)| LDS_000 -Mux25| Mcel 5 0 ( 221)| inst_CLK_000_D1 +Mux25| Mcel 5 0 ( 221)| SM_AMIGA_1_ Mux26| IOPin 3 2 ( 33)| AS_000 Mux27| ... | ... -Mux28| Mcel 1 5 ( 133)| SM_AMIGA_1_ -Mux29| Mcel 4 1 ( 199)| inst_CLK_000_D5 +Mux28| ... | ... +Mux29| ... | ... Mux30| ... | ... -Mux31| ... | ... +Mux31| Mcel 5 12 ( 239)| inst_CLK_000_D6 Mux32| ... | ... --------------------------------------------------------------------------- \ No newline at end of file diff --git a/Logic/68030_tk.rpt b/Logic/68030_tk.rpt index bbe8ecd..3c0547f 100644 --- a/Logic/68030_tk.rpt +++ b/Logic/68030_tk.rpt @@ -12,7 +12,7 @@ Project_Summary Project Name : 68030_tk Project Path : C:\Users\Matze\Documents\GitHub\68030tk\Logic -Project Fitted on : Sat May 24 21:59:18 2014 +Project Fitted on : Sun May 25 20:57:57 2014 Device : M4A5-128/64 Package : 100TQFP @@ -40,8 +40,8 @@ Design_Summary Total Input Pins : 30 Total Output Pins : 19 Total Bidir I/O Pins : 10 - Total Flip-Flops : 48 - Total Product Terms : 134 + Total Flip-Flops : 46 + Total Product Terms : 138 Total Reserved Pins : 0 Total Reserved Blocks : 0 @@ -54,12 +54,12 @@ Dedicated Pins Input-Only Pins 2 2 0 --> 100% Clock/Input Pins 4 4 0 --> 100% I/O Pins 64 53 11 --> 82% -Logic Macrocells 128 56 72 --> 43% +Logic Macrocells 128 54 74 --> 42% Input Registers 64 0 64 --> 0% Unusable Macrocells .. 0 .. -CSM Outputs/Total Block Inputs 264 169 95 --> 64% -Logical Product Terms 640 137 503 --> 21% +CSM Outputs/Total Block Inputs 264 180 84 --> 68% +Logical Product Terms 640 141 499 --> 22% Product Term Clusters 128 39 89 --> 30%  @@ -71,14 +71,14 @@ Blocks_Resource_Summary --------------------------------------------------------------------------------- Maximum 33 8 8 -- -- 16 80 16 - --------------------------------------------------------------------------------- -Block A 18 7 0 7 0 9 15 12 Hi -Block B 17 8 0 7 0 9 17 11 Hi -Block C 17 8 0 7 0 9 15 11 Hi -Block D 30 8 0 7 0 9 28 8 Hi -Block E 20 3 0 7 0 9 8 15 Hi -Block F 23 4 0 7 0 9 21 11 Hi -Block G 19 7 0 7 0 9 19 10 Hi -Block H 25 8 0 7 0 9 14 11 Hi +Block A 20 7 0 7 0 9 21 11 Hi +Block B 20 8 0 7 0 9 15 11 Hi +Block C 20 8 0 7 0 9 23 10 Hi +Block D 30 8 0 7 0 9 31 7 Hi +Block E 21 3 0 7 0 9 8 15 Hi +Block F 22 4 0 6 0 10 16 12 Hi +Block G 22 7 0 7 0 9 14 12 Hi +Block H 25 8 0 6 0 10 13 11 Hi --------------------------------------------------------------------------------- Four rightmost columns above reflect last status of the placement process. @@ -311,9 +311,9 @@ Pin Blk PTs Type e s E Fanout Pwr Slew Signal 56 F . I/O -B------ Hi Fast IPL_1_ 68 G . I/O -B------ Hi Fast IPL_2_ 71 G . I/O A--DE--- Hi Fast RW - 11 . . Ck/I ---DE--- - Fast CLK_000 - 14 . . Ck/I A--D-FGH - Fast nEXP_SPACE - 36 . . Ded --CD---- - Fast VPA + 11 . . Ck/I A--D---- - Fast CLK_000 + 14 . . Ck/I A-CDEFGH - Fast nEXP_SPACE + 36 . . Ded ----E--- - Fast VPA 61 . . Ck/I ABCDEFGH - Fast CLK_OSZI 64 . . Ck/I A----FGH - Fast CLK_030 86 . . Ded ABCDEFGH - Fast RST @@ -333,24 +333,24 @@ Output_Signal_List Pin Blk PTs Type e s E Fanout Pwr Slew Signal ---------------------------------------------------------------------- 48 E 2 COM -------- Hi Fast AMIGA_BUS_DATA_DIR - 34 D 7 DFF * * -------- Hi Fast AMIGA_BUS_ENABLE + 34 D 6 DFF * -------- Hi Fast AMIGA_BUS_ENABLE 20 C 1 COM -------- Hi Fast AMIGA_BUS_ENABLE_LOW 92 A 1 COM -------- Hi Fast AVEC 22 C 1 COM -------- Hi Fast AVEC_EXP 41 E 1 COM -------- Hi Fast BERR - 83 H 2 DFF * * -------- Hi Fast BGACK_030 - 29 D 2 DFF * * -------- Hi Fast BG_000 + 83 H 2 DFF * -------- Hi Fast BGACK_030 + 29 D 2 DFF * -------- Hi Fast BG_000 47 E 1 COM -------- Hi Fast CIIN - 65 G 1 DFF * * -------- Hi Fast CLK_DIV_OUT - 10 B 1 DFF * * -------- Hi Fast CLK_EXP + 65 G 1 DFF * -------- Hi Fast CLK_DIV_OUT + 10 B 1 DFF * -------- Hi Fast CLK_EXP 80 H 1 COM -------- Hi Fast DSACK_0_ - 66 G 3 DFF * * -------- Hi Fast E - 78 H 2 DFF * * -------- Hi Fast FPU_CS - 8 B 3 DFF * * -------- Hi Fast IPL_030_0_ - 7 B 3 DFF * * -------- Hi Fast IPL_030_1_ - 9 B 3 DFF * * -------- Hi Fast IPL_030_2_ - 3 B 1 DFF * * -------- Hi Fast RESET - 35 D 2 DFF * * -------- Hi Fast VMA + 66 G 3 DFF * -------- Hi Fast E + 78 H 2 DFF * -------- Hi Fast FPU_CS + 8 B 3 DFF * -------- Hi Fast IPL_030_0_ + 7 B 3 DFF * -------- Hi Fast IPL_030_1_ + 9 B 3 DFF * -------- Hi Fast IPL_030_2_ + 3 B 1 DFF * -------- Hi Fast RESET + 35 D 4 DFF * -------- Hi Fast VMA ---------------------------------------------------------------------- Power : Hi = High @@ -366,16 +366,16 @@ Bidir_Signal_List Pin r e O Bidir Pin Blk PTs Type e s E Fanout Pwr Slew Signal ---------------------------------------------------------------------- - 69 G 2 DFF * * ---D---- Hi Fast A0 - 33 D 2 DFF * * A-----GH Hi Fast AS_000 - 82 H 3 DFF * * --CD-F-H Hi Fast AS_030 - 81 H 2 DFF * * ---D---- Hi Fast DSACK_1_ - 98 A 5 DFF * * ---D---- Hi Fast DS_030 - 30 D 1 COM --C----- Hi Fast DTACK - 31 D 8 DFF * * A-----GH Hi Fast LDS_000 - 70 G 2 DFF * * ---D---- Hi Fast SIZE_0_ - 79 H 3 DFF * * ---D---- Hi Fast SIZE_1_ - 32 D 5 DFF * * A-----GH Hi Fast UDS_000 + 69 G 2 DFF * ---D---- Hi Fast A0 + 33 D 2 DFF * A-----GH Hi Fast AS_000 + 82 H 3 DFF * -B-D-F-H Hi Fast AS_030 + 81 H 2 DFF * ---D---- Hi Fast DSACK_1_ + 98 A 5 DFF * ---D---- Hi Fast DS_030 + 30 D 1 COM -B------ Hi Fast DTACK + 31 D 10 DFF * A-----GH Hi Fast LDS_000 + 70 G 2 DFF * ---D---- Hi Fast SIZE_0_ + 79 H 3 DFF * ---D---- Hi Fast SIZE_1_ + 32 D 6 DFF * A-----GH Hi Fast UDS_000 ---------------------------------------------------------------------- Power : Hi = High @@ -391,51 +391,49 @@ Buried_Signal_List Pin r e O Node #Mc Blk PTs Type e s E Fanout Pwr Slew Signal ---------------------------------------------------------------------- - C1 C 2 DFF * * A-C----- Hi Fast CLK_CNT_N_0_ - A9 A 1 DFF * * --C----- Hi Fast CLK_CNT_N_1_ - G5 G 2 DFF * * --C-E-G- Hi Fast CLK_CNT_P_0_ - E5 E 1 DFF * * --C---G- Hi Fast CLK_CNT_P_1_ - G8 G 2 DFF * * ------G- Hi - RN_A0 --> A0 - D5 D 7 DFF * * ---D---- Hi - RN_AMIGA_BUS_ENABLE --> AMIGA_BUS_ENABLE - D4 D 2 DFF * * ---D-F-- Hi - RN_AS_000 --> AS_000 - H8 H 3 DFF * * A------H Hi - RN_AS_030 --> AS_030 - H4 H 2 DFF * * A--DEFGH Hi - RN_BGACK_030 --> BGACK_030 - D13 D 2 DFF * * ---D---- Hi - RN_BG_000 --> BG_000 - H12 H 2 DFF * * -------H Hi - RN_DSACK_1_ --> DSACK_1_ - A0 A 5 DFF * * A------- Hi - RN_DS_030 --> DS_030 - G4 G 3 DFF * * --CD--G- Hi - RN_E --> E - H1 H 2 DFF * * --C-E--H Hi - RN_FPU_CS --> FPU_CS - B8 B 3 DFF * * -B------ Hi - RN_IPL_030_0_ --> IPL_030_0_ - B12 B 3 DFF * * -B------ Hi - RN_IPL_030_1_ --> IPL_030_1_ - B4 B 3 DFF * * -B------ Hi - RN_IPL_030_2_ --> IPL_030_2_ - D8 D 8 DFF * * ---D---- Hi - RN_LDS_000 --> LDS_000 - G0 G 2 DFF * * ------G- Hi - RN_SIZE_0_ --> SIZE_0_ - H0 H 3 DFF * * -------H Hi - RN_SIZE_1_ --> SIZE_1_ - D12 D 5 DFF * * ---D---- Hi - RN_UDS_000 --> UDS_000 - D1 D 2 DFF * * --CD---- Hi - RN_VMA --> VMA - F1 F 4 DFF * * ---D-F-- Hi Fast SM_AMIGA_0_ - B5 B 3 DFF * * -B---F-H Hi Fast SM_AMIGA_1_ - B9 B 3 DFF * * -B------ Hi Fast SM_AMIGA_2_ - C8 C 3 DFF * * -BC----- Hi Fast SM_AMIGA_3_ - A12 A 2 DFF * * A-CD---- Hi Fast SM_AMIGA_4_ - A1 A 2 DFF * * A--D---- Hi Fast SM_AMIGA_5_ - F8 F 2 DFF * * A--D-F-- Hi Fast SM_AMIGA_6_ - F12 F 5 DFF * * ---D-F-- Hi Fast SM_AMIGA_7_ - A8 A 3 DFF * * A--D--G- Hi Fast cpu_est_0_ - G12 G 4 TFF * * --CD--G- Hi Fast cpu_est_1_ - G9 G 3 DFF * * ---D--G- Hi Fast cpu_est_2_ - F5 F 7 DFF * * -----F-- Hi Fast inst_AS_030_000_SYNC - F4 F 1 DFF * * A--D--GH Hi Fast inst_BGACK_030_INT_D - E8 E 1 DFF * * ABCD-FGH Hi Fast inst_CLK_000_D0 - F0 F 1 DFF * * AB----GH Hi Fast inst_CLK_000_D1 - A5 A 1 DFF * * ----EF-- Hi Fast inst_CLK_000_D2 - E9 E 1 DFF * * -----F-- Hi Fast inst_CLK_000_D3 - F9 F 1 DFF * * ----E--- Hi Fast inst_CLK_000_D4 - E1 E 1 DFF * * -B---F-H Hi Fast inst_CLK_000_D5 - H5 H 1 DFF * * -B---F-H Hi Fast inst_CLK_000_D6 - C4 C 4 DFF * * -B----G- Hi Fast inst_CLK_OUT_PRE - C9 C 2 DFF * * -BC----- Hi Fast inst_DTACK_SYNC - C5 C 2 DFF * * -BC----- Hi Fast inst_VPA_SYNC + F5 F 1 DFF * -----F-- Hi Fast CLK_CNT_P_0_ + G8 G 2 DFF * ------G- Hi - RN_A0 --> A0 + D5 D 6 DFF * ---D---- Hi - RN_AMIGA_BUS_ENABLE --> AMIGA_BUS_ENABLE + D4 D 2 DFF * --CD---- Hi - RN_AS_000 --> AS_000 + H8 H 3 DFF * A--D--GH Hi - RN_AS_030 --> AS_030 + H4 H 2 DFF * ABCDEFGH Hi - RN_BGACK_030 --> BGACK_030 + D13 D 2 DFF * ---D---- Hi - RN_BG_000 --> BG_000 + H12 H 2 DFF * -------H Hi - RN_DSACK_1_ --> DSACK_1_ + A0 A 5 DFF * A------- Hi - RN_DS_030 --> DS_030 + G4 G 3 DFF * AB----G- Hi - RN_E --> E + H1 H 2 DFF * --C-E--H Hi - RN_FPU_CS --> FPU_CS + B8 B 3 DFF * -B------ Hi - RN_IPL_030_0_ --> IPL_030_0_ + B12 B 3 DFF * -B------ Hi - RN_IPL_030_1_ --> IPL_030_1_ + B4 B 3 DFF * -B------ Hi - RN_IPL_030_2_ --> IPL_030_2_ + D8 D 10 DFF * ---D---- Hi - RN_LDS_000 --> LDS_000 + G0 G 2 DFF * ------G- Hi - RN_SIZE_0_ --> SIZE_0_ + H0 H 3 DFF * -------H Hi - RN_SIZE_1_ --> SIZE_1_ + D12 D 6 DFF * ---D---- Hi - RN_UDS_000 --> UDS_000 + D1 D 4 DFF * -B-D---- Hi - RN_VMA --> VMA + C9 C 3 DFF * --CD---- Hi Fast SM_AMIGA_0_ + F0 F 4 DFF * --CD-F-H Hi Fast SM_AMIGA_1_ + C1 C 4 DFF * --C--F-- Hi Fast SM_AMIGA_2_ + C5 C 4 DFF * -BC----- Hi Fast SM_AMIGA_3_ + A5 A 3 DFF * A-CD---- Hi Fast SM_AMIGA_4_ + G12 G 3 DFF * A--D--G- Hi Fast SM_AMIGA_5_ + C4 C 3 DFF * --CD-FG- Hi Fast SM_AMIGA_6_ + C8 C 6 DFF * --CD-F-- Hi Fast SM_AMIGA_7_ + A1 A 3 DFF * A--D--G- Hi Fast cpu_est_0_ + A12 A 4 TFF * AB-D--G- Hi Fast cpu_est_1_ + A9 A 3 DFF * A-----G- Hi Fast cpu_est_2_ + F1 F 7 DFF * --C--F-- Hi Fast inst_AS_030_000_SYNC + F4 F 1 DFF * A--D--GH Hi Fast inst_BGACK_030_INT_D + A8 A 1 DFF * ABCDEFGH Hi Fast inst_CLK_000_D0 + E8 E 1 DFF * AB--E-GH Hi Fast inst_CLK_000_D1 + E1 E 1 DFF * --C---G- Hi Fast inst_CLK_000_D2 + G9 G 1 DFF * --C-E--- Hi Fast inst_CLK_000_D3 + E9 E 1 DFF * ------G- Hi Fast inst_CLK_000_D4 + G5 G 1 DFF * --C--F-H Hi Fast inst_CLK_000_D5 + F12 F 1 DFF * --C--F-H Hi Fast inst_CLK_000_D6 + F8 F 2 DFF * -B---FG- Hi Fast inst_CLK_OUT_PRE + B9 B 2 DFF * -BC----- Hi Fast inst_DTACK_SYNC + E5 E 1 DFF * -B-D---- Hi Fast inst_VPA_D + B5 B 2 DFF * -BC----- Hi Fast inst_VPA_SYNC ---------------------------------------------------------------------- Power : Hi = High @@ -450,59 +448,58 @@ Signals_Fanout_List ~~~~~~~~~~~~~~~~~~~ Signal Source : Fanout List ----------------------------------------------------------------------------- - IPL_1_{ G}: IPL_030_1_{ B} - IPL_0_{ H}: IPL_030_0_{ B} A_31_{ C}: CIIN{ E} - FC_0_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ F} IPL_2_{ H}: IPL_030_2_{ B} FC_1_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ F} - nEXP_SPACE{. }: DTACK{ D} SIZE_1_{ H} DSACK_1_{ H} - : AS_030{ H} DS_030{ A} A0{ G} - : BG_000{ D}AMIGA_BUS_ENABLE{ D} SIZE_0_{ G} - :inst_AS_030_000_SYNC{ F} SM_AMIGA_6_{ F} SM_AMIGA_7_{ F} - BG_030{ D}: BG_000{ D} - BGACK_000{ E}: BGACK_030{ H} FPU_CS{ H}inst_AS_030_000_SYNC{ F} - CLK_030{. }: SIZE_1_{ H} AS_030{ H} DS_030{ A} - : A0{ G} FPU_CS{ H} SIZE_0_{ G} - :inst_AS_030_000_SYNC{ F} - CLK_000{. }: BG_000{ D}inst_CLK_000_D0{ E} - DTACK{ E}:inst_DTACK_SYNC{ C} - VPA{. }: VMA{ D}inst_DTACK_SYNC{ C} inst_VPA_SYNC{ C} - RST{. }: CLK_DIV_OUT{ G} IPL_030_1_{ B} IPL_030_0_{ B} - : SIZE_1_{ H} IPL_030_2_{ B} DSACK_1_{ H} - : AS_030{ H} AS_000{ D} DS_030{ A} - : UDS_000{ D} LDS_000{ D} A0{ G} - : BG_000{ D} BGACK_030{ H} CLK_EXP{ B} - : FPU_CS{ H} E{ G} VMA{ D} - : RESET{ B}AMIGA_BUS_ENABLE{ D} SIZE_0_{ G} - :inst_AS_030_000_SYNC{ F}inst_BGACK_030_INT_D{ F}inst_DTACK_SYNC{ C} - : inst_VPA_SYNC{ C}inst_CLK_000_D0{ E}inst_CLK_000_D1{ F} - :inst_CLK_000_D2{ A}inst_CLK_000_D6{ H} SM_AMIGA_5_{ A} - : SM_AMIGA_6_{ F}inst_CLK_000_D3{ E}inst_CLK_000_D5{ E} - : SM_AMIGA_3_{ C} SM_AMIGA_0_{ F} SM_AMIGA_1_{ B} - : CLK_CNT_N_0_{ C} CLK_CNT_N_1_{ A} CLK_CNT_P_0_{ G} - : CLK_CNT_P_1_{ E}inst_CLK_000_D4{ F} SM_AMIGA_7_{ F} - : SM_AMIGA_4_{ A}inst_CLK_OUT_PRE{ C} SM_AMIGA_2_{ B} - : cpu_est_0_{ A} cpu_est_1_{ G} cpu_est_2_{ G} - RW{ H}:AMIGA_BUS_DATA_DIR{ E} DS_030{ A} UDS_000{ D} - : LDS_000{ D} A_30_{ C}: CIIN{ E} A_29_{ C}: CIIN{ E} A_28_{ D}: CIIN{ E} A_27_{ D}: CIIN{ E} A_26_{ D}: CIIN{ E} + nEXP_SPACE{. }: DTACK{ D} DSACK_0_{ H}AMIGA_BUS_DATA_DIR{ E} + : SIZE_1_{ H} DSACK_1_{ H} AS_030{ H} + : SIZE_0_{ G} DS_030{ A} A0{ G} + : BG_000{ D}AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ F} + : SM_AMIGA_7_{ C} SM_AMIGA_6_{ C} A_25_{ D}: CIIN{ E} A_24_{ D}: CIIN{ E} + BG_030{ D}: BG_000{ D} A_23_{ I}: CIIN{ E} A_22_{ I}: CIIN{ E} A_21_{ B}: CIIN{ E} + BGACK_000{ E}: BGACK_030{ H} FPU_CS{ H}inst_AS_030_000_SYNC{ F} A_20_{ B}: CIIN{ E} + CLK_030{. }: SIZE_1_{ H} AS_030{ H} SIZE_0_{ G} + : DS_030{ A} A0{ G} FPU_CS{ H} + :inst_AS_030_000_SYNC{ F} A_19_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ F} + CLK_000{. }: BG_000{ D}inst_CLK_000_D0{ A} A_18_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ F} A_17_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ F} A_16_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ F} -RN_IPL_030_1_{ C}: IPL_030_1_{ B} -RN_IPL_030_0_{ C}: IPL_030_0_{ B} + DTACK{ E}:inst_DTACK_SYNC{ B} + IPL_1_{ G}: IPL_030_1_{ B} + IPL_0_{ H}: IPL_030_0_{ B} + FC_0_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ F} + VPA{. }: inst_VPA_D{ E} + RST{. }: CLK_DIV_OUT{ G} SIZE_1_{ H} IPL_030_2_{ B} + : DSACK_1_{ H} AS_030{ H} SIZE_0_{ G} + : AS_000{ D} DS_030{ A} UDS_000{ D} + : LDS_000{ D} A0{ G} BG_000{ D} + : BGACK_030{ H} CLK_EXP{ B} IPL_030_1_{ B} + : FPU_CS{ H} IPL_030_0_{ B} E{ G} + : VMA{ D} RESET{ B}AMIGA_BUS_ENABLE{ D} + :inst_AS_030_000_SYNC{ F}inst_DTACK_SYNC{ B} inst_VPA_SYNC{ B} + : inst_VPA_D{ E}inst_CLK_000_D0{ A}inst_CLK_000_D1{ E} + :inst_CLK_000_D2{ E}inst_CLK_000_D6{ F}inst_CLK_OUT_PRE{ F} + :inst_BGACK_030_INT_D{ F} CLK_CNT_P_0_{ F} SM_AMIGA_5_{ G} + : SM_AMIGA_7_{ C} SM_AMIGA_1_{ F} SM_AMIGA_0_{ C} + : SM_AMIGA_6_{ C}inst_CLK_000_D3{ G}inst_CLK_000_D5{ G} + : SM_AMIGA_3_{ C}inst_CLK_000_D4{ E} SM_AMIGA_4_{ A} + : SM_AMIGA_2_{ C} cpu_est_0_{ A} cpu_est_1_{ A} + : cpu_est_2_{ A} + RW{ H}:AMIGA_BUS_DATA_DIR{ E} DS_030{ A} UDS_000{ D} + : LDS_000{ D} SIZE_1_{ I}: LDS_000{ D} RN_SIZE_1_{ I}: SIZE_1_{ H} RN_IPL_030_2_{ C}: IPL_030_2_{ B} @@ -510,82 +507,86 @@ RN_IPL_030_2_{ C}: IPL_030_2_{ B} RN_DSACK_1_{ I}: DSACK_1_{ H} AS_030{ I}: DSACK_1_{ H} AS_000{ D} UDS_000{ D} : LDS_000{ D} BG_000{ D} FPU_CS{ H} - :inst_AS_030_000_SYNC{ F}inst_DTACK_SYNC{ C} inst_VPA_SYNC{ C} - RN_AS_030{ I}: AS_030{ H} DS_030{ A} - AS_000{ E}: SIZE_1_{ H} AS_030{ H} DS_030{ A} - : A0{ G} SIZE_0_{ G} - RN_AS_000{ E}: AS_000{ D} VMA{ D}AMIGA_BUS_ENABLE{ D} - : SM_AMIGA_0_{ F} SM_AMIGA_7_{ F} + :AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ F}inst_DTACK_SYNC{ B} + : inst_VPA_SYNC{ B} + RN_AS_030{ I}: DTACK{ D} SIZE_1_{ H} AS_030{ H} + : SIZE_0_{ G} DS_030{ A} A0{ G} + SIZE_0_{ H}: LDS_000{ D} + RN_SIZE_0_{ H}: SIZE_0_{ G} + AS_000{ E}: SIZE_1_{ H} AS_030{ H} SIZE_0_{ G} + : DS_030{ A} A0{ G} + RN_AS_000{ E}: AS_000{ D} SM_AMIGA_7_{ C} SM_AMIGA_0_{ C} DS_030{ B}: UDS_000{ D} LDS_000{ D} RN_DS_030{ B}: DS_030{ A} - UDS_000{ E}: SIZE_1_{ H} AS_030{ H} DS_030{ A} - : A0{ G} SIZE_0_{ G} + UDS_000{ E}: SIZE_1_{ H} AS_030{ H} SIZE_0_{ G} + : DS_030{ A} A0{ G} RN_UDS_000{ E}: UDS_000{ D} - LDS_000{ E}: SIZE_1_{ H} AS_030{ H} DS_030{ A} - : A0{ G} SIZE_0_{ G} + LDS_000{ E}: SIZE_1_{ H} AS_030{ H} SIZE_0_{ G} + : DS_030{ A} A0{ G} RN_LDS_000{ E}: LDS_000{ D} A0{ H}: UDS_000{ D} LDS_000{ D} RN_A0{ H}: A0{ G} RN_BG_000{ E}: BG_000{ D} RN_BGACK_030{ I}: DTACK{ D}AMIGA_BUS_DATA_DIR{ E} SIZE_1_{ H} - : AS_030{ H} AS_000{ D} DS_030{ A} - : UDS_000{ D} LDS_000{ D} A0{ G} - : BGACK_030{ H}AMIGA_BUS_ENABLE{ D} SIZE_0_{ G} - :inst_BGACK_030_INT_D{ F} + : DSACK_1_{ H} AS_030{ H} SIZE_0_{ G} + : AS_000{ D} DS_030{ A} UDS_000{ D} + : LDS_000{ D} A0{ G} BGACK_030{ H} + : VMA{ D}AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ F} + :inst_DTACK_SYNC{ B} inst_VPA_SYNC{ B}inst_BGACK_030_INT_D{ F} + : SM_AMIGA_5_{ G} SM_AMIGA_7_{ C} SM_AMIGA_1_{ F} + : SM_AMIGA_0_{ C} SM_AMIGA_6_{ C} SM_AMIGA_3_{ C} + : SM_AMIGA_4_{ A} SM_AMIGA_2_{ C} +RN_IPL_030_1_{ C}: IPL_030_1_{ B} RN_FPU_CS{ I}: BERR{ E} AVEC_EXP{ C} FPU_CS{ H} - RN_E{ H}: E{ G} VMA{ D} inst_VPA_SYNC{ C} - : cpu_est_1_{ G} cpu_est_2_{ G} - RN_VMA{ E}: VMA{ D} inst_VPA_SYNC{ C} +RN_IPL_030_0_{ C}: IPL_030_0_{ B} + RN_E{ H}: E{ G} inst_VPA_SYNC{ B} cpu_est_1_{ A} + : cpu_est_2_{ A} + RN_VMA{ E}: VMA{ D} inst_VPA_SYNC{ B} RN_AMIGA_BUS_ENABLE{ E}:AMIGA_BUS_ENABLE{ D} - SIZE_0_{ H}: LDS_000{ D} - RN_SIZE_0_{ H}: SIZE_0_{ G} -inst_AS_030_000_SYNC{ G}:inst_AS_030_000_SYNC{ F} SM_AMIGA_6_{ F} SM_AMIGA_7_{ F} -inst_BGACK_030_INT_D{ G}: SIZE_1_{ H} AS_030{ H} DS_030{ A} - : A0{ G}AMIGA_BUS_ENABLE{ D} SIZE_0_{ G} -inst_DTACK_SYNC{ D}:inst_DTACK_SYNC{ C} SM_AMIGA_3_{ C} SM_AMIGA_2_{ B} -inst_VPA_SYNC{ D}: inst_VPA_SYNC{ C} SM_AMIGA_3_{ C} SM_AMIGA_2_{ B} -inst_CLK_000_D0{ F}: IPL_030_1_{ B} IPL_030_0_{ B} IPL_030_2_{ B} - : BGACK_030{ H} E{ G} VMA{ D} - :AMIGA_BUS_ENABLE{ D}inst_DTACK_SYNC{ C} inst_VPA_SYNC{ C} - :inst_CLK_000_D1{ F} SM_AMIGA_5_{ A} SM_AMIGA_6_{ F} - : SM_AMIGA_3_{ C} SM_AMIGA_0_{ F} SM_AMIGA_1_{ B} - : SM_AMIGA_7_{ F} SM_AMIGA_4_{ A} SM_AMIGA_2_{ B} - : cpu_est_0_{ A} cpu_est_1_{ G} cpu_est_2_{ G} -inst_CLK_000_D1{ G}: IPL_030_1_{ B} IPL_030_0_{ B} IPL_030_2_{ B} - : BGACK_030{ H} E{ G}inst_CLK_000_D2{ A} - : cpu_est_0_{ A} cpu_est_1_{ G} cpu_est_2_{ G} -inst_CLK_000_D2{ B}: SM_AMIGA_6_{ F}inst_CLK_000_D3{ E} SM_AMIGA_7_{ F} -inst_CLK_000_D6{ I}: DSACK_1_{ H}inst_AS_030_000_SYNC{ F} SM_AMIGA_0_{ F} - : SM_AMIGA_1_{ B} -SM_AMIGA_5_{ B}: AS_000{ D} UDS_000{ D} LDS_000{ D} - : SM_AMIGA_5_{ A} SM_AMIGA_4_{ A} -SM_AMIGA_6_{ G}:AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ F} SM_AMIGA_5_{ A} - : SM_AMIGA_6_{ F} SM_AMIGA_7_{ F} -inst_CLK_000_D3{ F}: SM_AMIGA_6_{ F}inst_CLK_000_D4{ F} SM_AMIGA_7_{ F} -inst_CLK_000_D5{ F}: DSACK_1_{ H}inst_AS_030_000_SYNC{ F}inst_CLK_000_D6{ H} - : SM_AMIGA_0_{ F} SM_AMIGA_1_{ B} -SM_AMIGA_3_{ D}:inst_DTACK_SYNC{ C} inst_VPA_SYNC{ C} SM_AMIGA_3_{ C} - : SM_AMIGA_2_{ B} -SM_AMIGA_0_{ G}:AMIGA_BUS_ENABLE{ D} SM_AMIGA_0_{ F} SM_AMIGA_7_{ F} -SM_AMIGA_1_{ C}: DSACK_1_{ H}inst_AS_030_000_SYNC{ F} SM_AMIGA_0_{ F} - : SM_AMIGA_1_{ B} -CLK_CNT_N_0_{ D}: CLK_CNT_N_0_{ C} CLK_CNT_N_1_{ A}inst_CLK_OUT_PRE{ C} -CLK_CNT_N_1_{ B}: CLK_CNT_N_0_{ C}inst_CLK_OUT_PRE{ C} -CLK_CNT_P_0_{ H}: CLK_CNT_P_0_{ G} CLK_CNT_P_1_{ E}inst_CLK_OUT_PRE{ C} -CLK_CNT_P_1_{ F}: CLK_CNT_P_0_{ G}inst_CLK_OUT_PRE{ C} -inst_CLK_000_D4{ G}:inst_CLK_000_D5{ E} -SM_AMIGA_7_{ G}: BG_000{ D}inst_AS_030_000_SYNC{ F} SM_AMIGA_6_{ F} - : SM_AMIGA_7_{ F} +inst_AS_030_000_SYNC{ G}:inst_AS_030_000_SYNC{ F} SM_AMIGA_7_{ C} SM_AMIGA_6_{ C} +inst_DTACK_SYNC{ C}:inst_DTACK_SYNC{ B} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} +inst_VPA_SYNC{ C}: inst_VPA_SYNC{ B} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} + inst_VPA_D{ F}: VMA{ D}inst_DTACK_SYNC{ B} inst_VPA_SYNC{ B} +inst_CLK_000_D0{ B}: IPL_030_2_{ B} BGACK_030{ H} IPL_030_1_{ B} + : IPL_030_0_{ B} E{ G} VMA{ D} + :inst_DTACK_SYNC{ B} inst_VPA_SYNC{ B}inst_CLK_000_D1{ E} + : SM_AMIGA_5_{ G} SM_AMIGA_7_{ C} SM_AMIGA_1_{ F} + : SM_AMIGA_0_{ C} SM_AMIGA_6_{ C} SM_AMIGA_3_{ C} + : SM_AMIGA_4_{ A} SM_AMIGA_2_{ C} cpu_est_0_{ A} + : cpu_est_1_{ A} cpu_est_2_{ A} +inst_CLK_000_D1{ F}: IPL_030_2_{ B} BGACK_030{ H} IPL_030_1_{ B} + : IPL_030_0_{ B} E{ G}inst_CLK_000_D2{ E} + : cpu_est_0_{ A} cpu_est_1_{ A} cpu_est_2_{ A} +inst_CLK_000_D2{ F}: SM_AMIGA_7_{ C} SM_AMIGA_6_{ C}inst_CLK_000_D3{ G} +inst_CLK_000_D6{ G}: DSACK_1_{ H}inst_AS_030_000_SYNC{ F} SM_AMIGA_1_{ F} + : SM_AMIGA_0_{ C} +inst_CLK_OUT_PRE{ G}: CLK_DIV_OUT{ G} CLK_EXP{ B}inst_CLK_OUT_PRE{ F} +inst_BGACK_030_INT_D{ G}: SIZE_1_{ H} AS_030{ H} SIZE_0_{ G} + : DS_030{ A} A0{ G}AMIGA_BUS_ENABLE{ D} +CLK_CNT_P_0_{ G}:inst_CLK_OUT_PRE{ F} CLK_CNT_P_0_{ F} +SM_AMIGA_5_{ H}: AS_000{ D} UDS_000{ D} LDS_000{ D} + : SM_AMIGA_5_{ G} SM_AMIGA_4_{ A} +SM_AMIGA_7_{ D}: BG_000{ D} VMA{ D}inst_AS_030_000_SYNC{ F} + : SM_AMIGA_7_{ C} SM_AMIGA_6_{ C} +SM_AMIGA_1_{ G}: DSACK_1_{ H}AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ F} + : SM_AMIGA_1_{ F} SM_AMIGA_0_{ C} +SM_AMIGA_0_{ D}:AMIGA_BUS_ENABLE{ D} SM_AMIGA_7_{ C} SM_AMIGA_0_{ C} +SM_AMIGA_6_{ D}:AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ F} SM_AMIGA_5_{ G} + : SM_AMIGA_7_{ C} SM_AMIGA_6_{ C} +inst_CLK_000_D3{ H}: SM_AMIGA_7_{ C} SM_AMIGA_6_{ C}inst_CLK_000_D4{ E} +inst_CLK_000_D5{ H}: DSACK_1_{ H}inst_AS_030_000_SYNC{ F}inst_CLK_000_D6{ F} + : SM_AMIGA_1_{ F} SM_AMIGA_0_{ C} +SM_AMIGA_3_{ D}:inst_DTACK_SYNC{ B} inst_VPA_SYNC{ B} SM_AMIGA_3_{ C} + : SM_AMIGA_2_{ C} +inst_CLK_000_D4{ F}:inst_CLK_000_D5{ G} SM_AMIGA_4_{ B}: UDS_000{ D} LDS_000{ D} SM_AMIGA_3_{ C} : SM_AMIGA_4_{ A} -inst_CLK_OUT_PRE{ D}: CLK_DIV_OUT{ G} CLK_EXP{ B} -SM_AMIGA_2_{ C}: SM_AMIGA_1_{ B} SM_AMIGA_2_{ B} +SM_AMIGA_2_{ D}: SM_AMIGA_1_{ F} SM_AMIGA_2_{ C} cpu_est_0_{ B}: E{ G} VMA{ D} cpu_est_0_{ A} - : cpu_est_1_{ G} cpu_est_2_{ G} - cpu_est_1_{ H}: E{ G} VMA{ D} inst_VPA_SYNC{ C} - : cpu_est_1_{ G} cpu_est_2_{ G} - cpu_est_2_{ H}: E{ G} VMA{ D} cpu_est_1_{ G} - : cpu_est_2_{ G} + : cpu_est_1_{ A} cpu_est_2_{ A} + cpu_est_1_{ B}: E{ G} VMA{ D} inst_VPA_SYNC{ B} + : cpu_est_1_{ A} cpu_est_2_{ A} + cpu_est_2_{ B}: E{ G} cpu_est_1_{ A} cpu_est_2_{ A} ----------------------------------------------------------------------------- {.} : Indicates block location of signal @@ -596,19 +597,19 @@ Set_Reset_Summary Block A block level set pt : !RST -block level reset pt : GND +block level reset pt : Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name +-----+-----+-----+-----+------------------------ | * | S | BS | BR | DS_030 | | | | | AVEC +| * | S | BS | BR | inst_CLK_000_D0 +| * | S | BR | BS | cpu_est_1_ | * | S | BR | BS | cpu_est_0_ | * | S | BR | BS | SM_AMIGA_4_ -| * | S | BR | BS | SM_AMIGA_5_ -| * | S | BS | BR | inst_CLK_000_D2 +| * | S | BR | BS | cpu_est_2_ | * | S | BS | BR | RN_DS_030 -| * | S | BS | BR | CLK_CNT_N_1_ | | | | | A_19_ | | | | | A_16_ | | | | | A_18_ @@ -618,7 +619,7 @@ Equations : Block B block level set pt : !RST -block level reset pt : GND +block level reset pt : Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name @@ -628,30 +629,30 @@ Equations : | * | S | BS | BR | IPL_030_1_ | * | S | BR | BS | CLK_EXP | * | S | BR | BS | RESET -| * | S | BR | BS | SM_AMIGA_1_ -| * | S | BS | BR | RN_IPL_030_2_ +| * | S | BS | BR | inst_VPA_SYNC +| * | S | BS | BR | inst_DTACK_SYNC | * | S | BS | BR | RN_IPL_030_0_ | * | S | BS | BR | RN_IPL_030_1_ -| * | S | BR | BS | SM_AMIGA_2_ +| * | S | BS | BR | RN_IPL_030_2_ | | | | | A_29_ | | | | | A_30_ | | | | | A_31_ Block C -block level set pt : !RST -block level reset pt : GND +block level set pt : +block level reset pt : !RST Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name +-----+-----+-----+-----+------------------------ | | | | | AVEC_EXP | | | | | AMIGA_BUS_ENABLE_LOW -| * | S | BR | BS | inst_CLK_OUT_PRE -| * | S | BR | BS | SM_AMIGA_3_ -| * | S | BR | BS | CLK_CNT_N_0_ -| * | S | BS | BR | inst_VPA_SYNC -| * | S | BS | BR | inst_DTACK_SYNC +| * | S | BS | BR | SM_AMIGA_6_ +| * | S | BR | BS | SM_AMIGA_7_ +| * | S | BS | BR | SM_AMIGA_2_ +| * | S | BS | BR | SM_AMIGA_3_ +| * | S | BS | BR | SM_AMIGA_0_ | | | | | BG_030 | | | | | A_24_ | | | | | A_25_ @@ -662,7 +663,7 @@ Equations : Block D block level set pt : !RST -block level reset pt : GND +block level reset pt : Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name @@ -684,7 +685,7 @@ Equations : Block E -block level set pt : GND +block level set pt : block level reset pt : !RST Equations : | | |Block|Block| Signal @@ -693,26 +694,25 @@ Equations : | | | | | AMIGA_BUS_DATA_DIR | | | | | CIIN | | | | | BERR -| * | S | BR | BS | inst_CLK_000_D0 -| * | S | BR | BS | inst_CLK_000_D5 -| * | S | BS | BR | CLK_CNT_P_1_ -| * | S | BR | BS | inst_CLK_000_D3 +| * | S | BR | BS | inst_CLK_000_D1 +| * | S | BR | BS | inst_CLK_000_D2 +| * | S | BR | BS | inst_VPA_D +| * | S | BR | BS | inst_CLK_000_D4 Block F block level set pt : !RST -block level reset pt : GND +block level reset pt : Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name +-----+-----+-----+-----+------------------------ -| * | S | BS | BR | inst_CLK_000_D1 +| * | S | BR | BS | SM_AMIGA_1_ | * | S | BS | BR | inst_BGACK_030_INT_D -| * | S | BR | BS | SM_AMIGA_6_ -| * | S | BS | BR | SM_AMIGA_7_ -| * | S | BR | BS | SM_AMIGA_0_ +| * | S | BR | BS | inst_CLK_OUT_PRE +| * | S | BS | BR | inst_CLK_000_D6 | * | S | BS | BR | inst_AS_030_000_SYNC -| * | S | BS | BR | inst_CLK_000_D4 +| * | S | BR | BS | CLK_CNT_P_0_ | | | | | A_17_ | | | | | FC_1_ | | | | | FC_0_ @@ -721,7 +721,7 @@ Equations : Block G block level set pt : !RST -block level reset pt : GND +block level reset pt : Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name @@ -730,12 +730,12 @@ Equations : | * | S | BS | BR | A0 | * | S | BR | BS | E | * | S | BR | BS | CLK_DIV_OUT -| * | S | BR | BS | cpu_est_1_ | * | S | BR | BS | RN_E -| * | S | BR | BS | CLK_CNT_P_0_ -| * | S | BR | BS | cpu_est_2_ -| * | S | BS | BR | RN_SIZE_0_ +| * | S | BR | BS | SM_AMIGA_5_ +| * | S | BS | BR | inst_CLK_000_D5 +| * | S | BS | BR | inst_CLK_000_D3 | * | S | BS | BR | RN_A0 +| * | S | BS | BR | RN_SIZE_0_ | | | | | RW | | | | | IPL_2_ | | | | | IPL_0_ @@ -743,7 +743,7 @@ Equations : Block H block level set pt : !RST -block level reset pt : GND +block level reset pt : Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name @@ -755,9 +755,8 @@ Equations : | * | S | BS | BR | FPU_CS | | | | | DSACK_0_ | * | S | BS | BR | RN_BGACK_030 -| * | S | BS | BR | RN_FPU_CS -| * | S | BS | BR | inst_CLK_000_D6 | * | S | BS | BR | RN_AS_030 +| * | S | BS | BR | RN_FPU_CS | * | S | BS | BR | RN_SIZE_1_ | * | S | BS | BR | RN_DSACK_1_ | | | | | A_22_ @@ -779,22 +778,22 @@ BLOCK_A_LOGIC_ARRAY_FANIN CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ mx A0 RST pin 86 mx A17 ... ... -mx A1 CLK_CNT_N_0_ mcell C1 mx A18 cpu_est_0_ mcell A8 -mx A2 SM_AMIGA_6_ mcell F8 mx A19 ... ... -mx A3 RN_AS_030 mcell H8 mx A20 RN_BGACK_030 mcell H4 +mx A1 ... ... mx A18 SM_AMIGA_4_ mcell A5 +mx A2 cpu_est_2_ mcell A9 mx A19 ... ... +mx A3 CLK_000 pin 11 mx A20 RN_BGACK_030 mcell H4 mx A4 CLK_030 pin 64 mx A21 ... ... mx A5 nEXP_SPACE pin 14 mx A22 ... ... mx A6 ... ... mx A23 AS_000 pin 33 -mx A7 ... ... mx A24 SM_AMIGA_4_ mcell A12 -mx A8 RW pin 71 mx A25 inst_CLK_000_D1 mcell F0 -mx A9 SM_AMIGA_5_ mcell A1 mx A26 ... ... +mx A7 SM_AMIGA_5_ mcell G12 mx A24 cpu_est_1_ mcell A12 +mx A8 RW pin 71 mx A25 ... ... +mx A9 cpu_est_0_ mcell A1 mx A26 ... ... mx A10inst_BGACK_030_INT_D mcell F4 mx A27 LDS_000 pin 31 -mx A11 ... ... mx A28 ... ... +mx A11 RN_E mcell G4 mx A28 ... ... mx A12 UDS_000 pin 32 mx A29 ... ... -mx A13 ... ... mx A30 ... ... +mx A13 RN_AS_030 mcell H8 mx A30 inst_CLK_000_D0 mcell A8 mx A14 ... ... mx A31 ... ... mx A15 RN_DS_030 mcell A0 mx A32 ... ... -mx A16 inst_CLK_000_D0 mcell E8 +mx A16 inst_CLK_000_D1 mcell E8 ---------------------------------------------------------------------------- @@ -803,22 +802,22 @@ BLOCK_B_LOGIC_ARRAY_FANIN CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ mx B0 IPL_0_ pin 67 mx B17 ... ... -mx B1 RN_IPL_030_1_ mcell B12 mx B18 ... ... -mx B2 ... ... mx B19 ... ... -mx B3 IPL_1_ pin 56 mx B20 ... ... -mx B4 inst_CLK_000_D6 mcell H5 mx B21 RST pin 86 -mx B5 inst_CLK_000_D5 mcell E1 mx B22 IPL_2_ pin 68 -mx B6 SM_AMIGA_2_ mcell B9 mx B23 ... ... -mx B7 inst_VPA_SYNC mcell C5 mx B24 ... ... -mx B8 RN_IPL_030_0_ mcell B8 mx B25 inst_CLK_000_D1 mcell F0 -mx B9 ... ... mx B26 ... ... +mx B1 RN_IPL_030_1_ mcell B12 mx B18 inst_CLK_000_D0 mcell A8 +mx B2 RN_VMA mcell D1 mx B19 AS_030 pin 82 +mx B3 IPL_1_ pin 56 mx B20inst_CLK_OUT_PRE mcell F8 +mx B4 IPL_2_ pin 68 mx B21 RST pin 86 +mx B5 ... ... mx B22 ... ... +mx B6 inst_DTACK_SYNC mcell B9 mx B23 RN_BGACK_030 mcell H4 +mx B7 SM_AMIGA_3_ mcell C5 mx B24 ... ... +mx B8 RN_IPL_030_0_ mcell B8 mx B25 ... ... +mx B9 DTACK pin 30 mx B26 ... ... mx B10 ... ... mx B27 RN_IPL_030_2_ mcell B4 -mx B11 ... ... mx B28 SM_AMIGA_1_ mcell B5 +mx B11 RN_E mcell G4 mx B28 inst_VPA_SYNC mcell B5 mx B12 ... ... mx B29 ... ... -mx B13 inst_DTACK_SYNC mcell C9 mx B30 inst_CLK_000_D0 mcell E8 -mx B14inst_CLK_OUT_PRE mcell C4 mx B31 ... ... -mx B15 ... ... mx B32 ... ... -mx B16 SM_AMIGA_3_ mcell C8 +mx B13 ... ... mx B30 ... ... +mx B14 inst_VPA_D mcell E5 mx B31 ... ... +mx B15 cpu_est_1_ mcell A12 mx B32 ... ... +mx B16 inst_CLK_000_D1 mcell E8 ---------------------------------------------------------------------------- @@ -826,23 +825,23 @@ BLOCK_C_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx C0 RST pin 86 mx C17 RN_VMA mcell D1 -mx C1 CLK_CNT_N_0_ mcell C1 mx C18 ... ... -mx C2 CLK_CNT_N_1_ mcell A9 mx C19 AS_030 pin 82 -mx C3 CLK_CNT_P_1_ mcell E5 mx C20 ... ... +mx C0 RST pin 86 mx C17 inst_CLK_000_D6 mcell F12 +mx C1 SM_AMIGA_2_ mcell C1 mx C18 inst_CLK_000_D0 mcell A8 +mx C2 SM_AMIGA_4_ mcell A5 mx C19 ... ... +mx C3 SM_AMIGA_0_ mcell C9 mx C20 RN_BGACK_030 mcell H4 mx C4 ... ... mx C21 ... ... -mx C5 ... ... mx C22 CLK_CNT_P_0_ mcell G5 -mx C6 ... ... mx C23 DTACK pin 30 -mx C7 inst_VPA_SYNC mcell C5 mx C24 ... ... -mx C8 inst_CLK_000_D0 mcell E8 mx C25 ... ... -mx C9 SM_AMIGA_4_ mcell A12 mx C26 ... ... -mx C10 VPA pin 36 mx C27 ... ... -mx C11 RN_E mcell G4 mx C28 ... ... -mx C12 RN_FPU_CS mcell H1 mx C29 ... ... -mx C13 inst_DTACK_SYNC mcell C9 mx C30 ... ... -mx C14 cpu_est_1_ mcell G12 mx C31 ... ... -mx C15 ... ... mx C32 ... ... -mx C16 SM_AMIGA_3_ mcell C8 +mx C5 nEXP_SPACE pin 14 mx C22 inst_CLK_000_D5 mcell G5 +mx C6 inst_DTACK_SYNC mcell B9 mx C23 ... ... +mx C7 SM_AMIGA_3_ mcell C5 mx C24 ... ... +mx C8 ... ... mx C25 SM_AMIGA_1_ mcell F0 +mx C9 ... ... mx C26 ... ... +mx C10 inst_CLK_000_D3 mcell G9 mx C27 ... ... +mx C11 ... ... mx C28 inst_VPA_SYNC mcell B5 +mx C12 RN_FPU_CS mcell H1 mx C29 SM_AMIGA_6_ mcell C4 +mx C13 inst_CLK_000_D2 mcell E1 mx C30 ... ... +mx C14 RN_AS_000 mcell D4 mx C31 ... ... +mx C15inst_AS_030_000_SYNC mcell F1 mx C32 ... ... +mx C16 SM_AMIGA_7_ mcell C8 ---------------------------------------------------------------------------- @@ -850,22 +849,22 @@ BLOCK_D_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx D0 A0 pin 69 mx D17 RN_VMA mcell D1 -mx D1 RN_BG_000 mcell D13 mx D18 cpu_est_0_ mcell A8 -mx D2 RN_E mcell G4 mx D19 AS_030 pin 82 -mx D3 CLK_000 pin 11 mx D20 SM_AMIGA_6_ mcell F8 +mx D0 A0 pin 69 mx D17 SIZE_0_ pin 70 +mx D1 RN_BG_000 mcell D13 mx D18 SM_AMIGA_4_ mcell A5 +mx D2 RN_VMA mcell D1 mx D19 AS_030 pin 82 +mx D3 inst_VPA_D mcell E5 mx D20 RN_BGACK_030 mcell H4 mx D4 BG_030 pin 21 mx D21 RST pin 86 -mx D5 DS_030 pin 98 mx D22 ... ... -mx D6 SIZE_1_ pin 79 mx D23 RN_BGACK_030 mcell H4 -mx D7 cpu_est_1_ mcell G12 mx D24RN_AMIGA_BUS_ENABLE mcell D5 -mx D8 inst_CLK_000_D0 mcell E8 mx D25 RW pin 71 -mx D9 SM_AMIGA_4_ mcell A12 mx D26 ... ... -mx D10 RN_AS_000 mcell D4 mx D27 cpu_est_2_ mcell G9 +mx D5 nEXP_SPACE pin 14 mx D22 ... ... +mx D6 SM_AMIGA_6_ mcell C4 mx D23 SM_AMIGA_5_ mcell G12 +mx D7RN_AMIGA_BUS_ENABLE mcell D5 mx D24 CLK_000 pin 11 +mx D8 RW pin 71 mx D25 RN_AS_030 mcell H8 +mx D9 cpu_est_0_ mcell A1 mx D26 ... ... +mx D10inst_BGACK_030_INT_D mcell F4 mx D27 SIZE_1_ pin 79 mx D11 RN_UDS_000 mcell D12 mx D28 ... ... -mx D12 SM_AMIGA_5_ mcell A1 mx D29inst_BGACK_030_INT_D mcell F4 -mx D13 VPA pin 36 mx D30 SM_AMIGA_0_ mcell F1 -mx D14 SIZE_0_ pin 70 mx D31 SM_AMIGA_7_ mcell F12 -mx D15 nEXP_SPACE pin 14 mx D32 DSACK_1_ pin 81 +mx D12 DS_030 pin 98 mx D29 SM_AMIGA_7_ mcell C8 +mx D13 SM_AMIGA_0_ mcell C9 mx D30 inst_CLK_000_D0 mcell A8 +mx D14 RN_AS_000 mcell D4 mx D31 SM_AMIGA_1_ mcell F0 +mx D15 cpu_est_1_ mcell A12 mx D32 DSACK_1_ pin 81 mx D16 RN_LDS_000 mcell D8 ---------------------------------------------------------------------------- @@ -875,22 +874,22 @@ BLOCK_E_LOGIC_ARRAY_FANIN CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ mx E0 RST pin 86 mx E17 A_26_ pin 17 -mx E1 A_31_ pin 4 mx E18 inst_CLK_000_D4 mcell F9 -mx E2 inst_CLK_000_D2 mcell A5 mx E19 ... ... +mx E1 A_31_ pin 4 mx E18 inst_CLK_000_D0 mcell A8 +mx E2 ... ... mx E19 RN_FPU_CS mcell H1 mx E3 A_27_ pin 16 mx E20 RN_BGACK_030 mcell H4 -mx E4 A_29_ pin 6 mx E21 ... ... -mx E5 A_24_ pin 19 mx E22 CLK_CNT_P_0_ mcell G5 +mx E4 A_29_ pin 6 mx E21 nEXP_SPACE pin 14 +mx E5 A_24_ pin 19 mx E22 ... ... mx E6 ... ... mx E23 ... ... mx E7 A_28_ pin 15 mx E24 ... ... mx E8 A_22_ pin 85 mx E25 RW pin 71 mx E9 A_30_ pin 5 mx E26 ... ... -mx E10 RN_FPU_CS mcell H1 mx E27 ... ... +mx E10 VPA pin 36 mx E27 inst_CLK_000_D3 mcell G9 mx E11 A_23_ pin 84 mx E28 ... ... mx E12 A_25_ pin 18 mx E29 A_20_ pin 93 mx E13 ... ... mx E30 ... ... -mx E14 CLK_000 pin 11 mx E31 ... ... +mx E14 ... ... mx E31 ... ... mx E15 A_21_ pin 94 mx E32 ... ... -mx E16 ... ... +mx E16 inst_CLK_000_D1 mcell E8 ---------------------------------------------------------------------------- @@ -899,22 +898,22 @@ BLOCK_F_LOGIC_ARRAY_FANIN CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ mx F0 RST pin 86 mx F17 A_18_ pin 95 -mx F1 FC_1_ pin 58 mx F18 inst_CLK_000_D2 mcell A5 -mx F2 inst_CLK_000_D3 mcell E9 mx F19 AS_030 pin 82 -mx F3 ... ... mx F20 CLK_030 pin 64 +mx F1 FC_1_ pin 58 mx F18 inst_CLK_000_D0 mcell A8 +mx F2inst_CLK_OUT_PRE mcell F8 mx F19 AS_030 pin 82 +mx F3 inst_CLK_000_D5 mcell G5 mx F20 CLK_030 pin 64 mx F4 BGACK_000 pin 28 mx F21 ... ... -mx F5 nEXP_SPACE pin 14 mx F22 ... ... +mx F5 nEXP_SPACE pin 14 mx F22 SM_AMIGA_2_ mcell C1 mx F6 FC_0_ pin 57 mx F23 RN_BGACK_030 mcell H4 -mx F7 ... ... mx F24 ... ... -mx F8 A_17_ pin 59 mx F25 ... ... -mx F9inst_AS_030_000_SYNC mcell F5 mx F26 ... ... -mx F10 RN_AS_000 mcell D4 mx F27 ... ... -mx F11 A_16_ pin 96 mx F28 SM_AMIGA_1_ mcell B5 -mx F12 A_19_ pin 97 mx F29 inst_CLK_000_D5 mcell E1 -mx F13 inst_CLK_000_D6 mcell H5 mx F30 ... ... -mx F14 ... ... mx F31 SM_AMIGA_7_ mcell F12 -mx F15 SM_AMIGA_0_ mcell F1 mx F32 SM_AMIGA_6_ mcell F8 -mx F16 inst_CLK_000_D0 mcell E8 +mx F7 SM_AMIGA_7_ mcell C8 mx F24 ... ... +mx F8 A_17_ pin 59 mx F25 SM_AMIGA_1_ mcell F0 +mx F9 CLK_CNT_P_0_ mcell F5 mx F26 ... ... +mx F10inst_AS_030_000_SYNC mcell F1 mx F27 ... ... +mx F11 A_16_ pin 96 mx F28 ... ... +mx F12 A_19_ pin 97 mx F29 ... ... +mx F13 ... ... mx F30 ... ... +mx F14 SM_AMIGA_6_ mcell C4 mx F31 inst_CLK_000_D6 mcell F12 +mx F15 ... ... mx F32 ... ... +mx F16 ... ... ---------------------------------------------------------------------------- @@ -923,22 +922,22 @@ BLOCK_G_LOGIC_ARRAY_FANIN CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ mx G0 RST pin 86 mx G17 RN_SIZE_0_ mcell G0 -mx G1 ... ... mx G18 cpu_est_0_ mcell A8 -mx G2 RN_E mcell G4 mx G19 ... ... -mx G3 CLK_CNT_P_1_ mcell E5 mx G20 RN_BGACK_030 mcell H4 +mx G1 ... ... mx G18 inst_CLK_000_D0 mcell A8 +mx G2 inst_CLK_000_D4 mcell E9 mx G19 cpu_est_2_ mcell A9 +mx G3 RN_AS_030 mcell H8 mx G20inst_CLK_OUT_PRE mcell F8 mx G4 CLK_030 pin 64 mx G21 ... ... -mx G5 nEXP_SPACE pin 14 mx G22 CLK_CNT_P_0_ mcell G5 -mx G6inst_CLK_OUT_PRE mcell C4 mx G23 AS_000 pin 33 -mx G7 cpu_est_1_ mcell G12 mx G24 LDS_000 pin 31 -mx G8 UDS_000 pin 32 mx G25 inst_CLK_000_D1 mcell F0 -mx G9 ... ... mx G26 ... ... +mx G5 nEXP_SPACE pin 14 mx G22 ... ... +mx G6 SM_AMIGA_6_ mcell C4 mx G23 RN_BGACK_030 mcell H4 +mx G7 SM_AMIGA_5_ mcell G12 mx G24 LDS_000 pin 31 +mx G8 inst_CLK_000_D1 mcell E8 mx G25 ... ... +mx G9 cpu_est_0_ mcell A1 mx G26 AS_000 pin 33 mx G10 RN_A0 mcell G8 mx G27 ... ... -mx G11 ... ... mx G28 ... ... -mx G12 cpu_est_2_ mcell G9 mx G29 ... ... -mx G13 ... ... mx G30 ... ... +mx G11 RN_E mcell G4 mx G28 ... ... +mx G12 UDS_000 pin 32 mx G29 ... ... +mx G13 inst_CLK_000_D2 mcell E1 mx G30 ... ... mx G14inst_BGACK_030_INT_D mcell F4 mx G31 ... ... -mx G15 ... ... mx G32 ... ... -mx G16 inst_CLK_000_D0 mcell E8 +mx G15 cpu_est_1_ mcell A12 mx G32 ... ... +mx G16 ... ... ---------------------------------------------------------------------------- @@ -947,22 +946,22 @@ BLOCK_H_LOGIC_ARRAY_FANIN CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ mx H0 RN_BGACK_030 mcell H4 mx H17 A_18_ pin 95 -mx H1 FC_1_ pin 58 mx H18 BGACK_000 pin 28 +mx H1 FC_1_ pin 58 mx H18 inst_CLK_000_D0 mcell A8 mx H2 ... ... mx H19 ... ... mx H3 RN_AS_030 mcell H8 mx H20 CLK_030 pin 64 -mx H4 inst_CLK_000_D6 mcell H5 mx H21 RST pin 86 -mx H5 nEXP_SPACE pin 14 mx H22 ... ... +mx H4 BGACK_000 pin 28 mx H21 RST pin 86 +mx H5 nEXP_SPACE pin 14 mx H22 inst_CLK_000_D5 mcell G5 mx H6 FC_0_ pin 57 mx H23 RN_SIZE_1_ mcell H0 mx H7 ... ... mx H24 LDS_000 pin 31 -mx H8 UDS_000 pin 32 mx H25 inst_CLK_000_D1 mcell F0 +mx H8 UDS_000 pin 32 mx H25 SM_AMIGA_1_ mcell F0 mx H9 AS_030 pin 82 mx H26 AS_000 pin 33 mx H10 RN_FPU_CS mcell H1 mx H27 ... ... -mx H11 A_16_ pin 96 mx H28 SM_AMIGA_1_ mcell B5 -mx H12 A_19_ pin 97 mx H29 inst_CLK_000_D5 mcell E1 +mx H11 A_16_ pin 96 mx H28 ... ... +mx H12 A_19_ pin 97 mx H29 ... ... mx H13 A_17_ pin 59 mx H30 ... ... -mx H14inst_BGACK_030_INT_D mcell F4 mx H31 ... ... +mx H14inst_BGACK_030_INT_D mcell F4 mx H31 inst_CLK_000_D6 mcell F12 mx H15 RN_DSACK_1_ mcell H12 mx H32 ... ... -mx H16 inst_CLK_000_D0 mcell E8 +mx H16 inst_CLK_000_D1 mcell E8 ---------------------------------------------------------------------------- CSM indicates the mux inputs from the Central Switch Matrix. @@ -977,29 +976,23 @@ PostFit_Equations P-Terms Fan-in Fan-out Type Name (attributes) --------- ------ ------- ---- ----------------- - 0 0 1 Pin DSACK_0_ - 0 0 1 Pin DSACK_0_.OE 0 0 1 Pin BERR 1 1 1 Pin BERR.OE 1 1 1 Pin CLK_DIV_OUT.AR 1 1 1 Pin CLK_DIV_OUT.D 1 1 1 Pin CLK_DIV_OUT.C 1 1 1 Pin DTACK - 1 2 1 Pin DTACK.OE + 1 3 1 Pin DTACK.OE 1 0 1 Pin AVEC 0 0 1 Pin AVEC_EXP 1 1 1 Pin AVEC_EXP.OE - 2 2 1 Pin AMIGA_BUS_DATA_DIR + 1 0 1 Pin DSACK_0_ + 1 1 1 Pin DSACK_0_.OE + 2 3 1 Pin AMIGA_BUS_DATA_DIR 1 0 1 Pin AMIGA_BUS_ENABLE_LOW 1 4 1 Pin CIIN 1 8 1 Pin CIIN.OE - 3 4 1 Pin IPL_030_1_.D - 1 1 1 Pin IPL_030_1_.AP - 1 1 1 Pin IPL_030_1_.C - 3 4 1 Pin IPL_030_0_.D - 1 1 1 Pin IPL_030_0_.AP - 1 1 1 Pin IPL_030_0_.C - 1 2 1 Pin SIZE_1_.OE + 1 3 1 Pin SIZE_1_.OE 3 7 1 Pin SIZE_1_.D- 1 1 1 Pin SIZE_1_.AP 1 1 1 Pin SIZE_1_.C @@ -1007,30 +1000,34 @@ PostFit_Equations 1 1 1 Pin IPL_030_2_.AP 1 1 1 Pin IPL_030_2_.C 1 1 1 Pin DSACK_1_.OE - 2 5 1 Pin DSACK_1_.D- + 2 6 1 Pin DSACK_1_.D- 1 1 1 Pin DSACK_1_.AP 1 1 1 Pin DSACK_1_.C - 1 2 1 Pin AS_030.OE + 1 3 1 Pin AS_030.OE 3 7 1 Pin AS_030.D- 1 1 1 Pin AS_030.AP 1 1 1 Pin AS_030.C + 1 3 1 Pin SIZE_0_.OE + 2 7 1 Pin SIZE_0_.D- + 1 1 1 Pin SIZE_0_.AP + 1 1 1 Pin SIZE_0_.C 1 1 1 Pin AS_000.OE - 2 3 1 Pin AS_000.D + 2 4 1 Pin AS_000.D- 1 1 1 Pin AS_000.AP 1 1 1 Pin AS_000.C - 1 2 1 Pin DS_030.OE + 1 3 1 Pin DS_030.OE 5 9 1 Pin DS_030.D- 1 1 1 Pin DS_030.AP 1 1 1 Pin DS_030.C 1 1 1 Pin UDS_000.OE - 5 7 1 Pin UDS_000.D- + 6 8 1 Pin UDS_000.D- 1 1 1 Pin UDS_000.AP 1 1 1 Pin UDS_000.C 1 1 1 Pin LDS_000.OE - 8 9 1 Pin LDS_000.D + 10 10 1 Pin LDS_000.D 1 1 1 Pin LDS_000.AP 1 1 1 Pin LDS_000.C - 1 2 1 Pin A0.OE + 1 3 1 Pin A0.OE 2 7 1 Pin A0.D 1 1 1 Pin A0.AP 1 1 1 Pin A0.C @@ -1043,39 +1040,40 @@ PostFit_Equations 1 1 1 Pin CLK_EXP.AR 1 1 1 Pin CLK_EXP.D 1 1 1 Pin CLK_EXP.C + 3 4 1 Pin IPL_030_1_.D + 1 1 1 Pin IPL_030_1_.AP + 1 1 1 Pin IPL_030_1_.C 2 10 1 Pin FPU_CS.D- 1 1 1 Pin FPU_CS.AP 1 1 1 Pin FPU_CS.C + 3 4 1 Pin IPL_030_0_.D + 1 1 1 Pin IPL_030_0_.AP + 1 1 1 Pin IPL_030_0_.C 3 6 1 PinX1 E.D.X1 1 1 1 PinX2 E.D.X2 1 1 1 Pin E.AR 1 1 1 Pin E.C - 2 7 1 PinX1 VMA.D.X1 - 1 5 1 PinX2 VMA.D.X2 + 4 7 1 Pin VMA.D- 1 1 1 Pin VMA.AP 1 1 1 Pin VMA.C 1 1 1 Pin RESET.AR 1 0 1 Pin RESET.D 1 1 1 Pin RESET.C - 7 8 1 Pin AMIGA_BUS_ENABLE.D + 6 8 1 Pin AMIGA_BUS_ENABLE.D- 1 1 1 Pin AMIGA_BUS_ENABLE.AP 1 1 1 Pin AMIGA_BUS_ENABLE.C - 1 2 1 Pin SIZE_0_.OE - 2 7 1 Pin SIZE_0_.D- - 1 1 1 Pin SIZE_0_.AP - 1 1 1 Pin SIZE_0_.C - 7 16 1 Node inst_AS_030_000_SYNC.D + 7 17 1 Node inst_AS_030_000_SYNC.D 1 1 1 Node inst_AS_030_000_SYNC.AP 1 1 1 Node inst_AS_030_000_SYNC.C - 1 1 1 Node inst_BGACK_030_INT_D.D - 1 1 1 Node inst_BGACK_030_INT_D.AP - 1 1 1 Node inst_BGACK_030_INT_D.C - 2 6 1 Node inst_DTACK_SYNC.D- + 2 7 1 Node inst_DTACK_SYNC.D- 1 1 1 Node inst_DTACK_SYNC.AP 1 1 1 Node inst_DTACK_SYNC.C - 2 8 1 Node inst_VPA_SYNC.D- + 2 9 1 Node inst_VPA_SYNC.D- 1 1 1 Node inst_VPA_SYNC.AP 1 1 1 Node inst_VPA_SYNC.C + 1 1 1 Node inst_VPA_D.D + 1 1 1 Node inst_VPA_D.AP + 1 1 1 Node inst_VPA_D.C 1 1 1 Node inst_CLK_000_D0.D 1 1 1 Node inst_CLK_000_D0.AP 1 1 1 Node inst_CLK_000_D0.C @@ -1088,11 +1086,30 @@ PostFit_Equations 1 1 1 Node inst_CLK_000_D6.D 1 1 1 Node inst_CLK_000_D6.AP 1 1 1 Node inst_CLK_000_D6.C + 1 1 1 Node inst_CLK_OUT_PRE.AR + 2 2 1 Node inst_CLK_OUT_PRE.D + 1 1 1 Node inst_CLK_OUT_PRE.C + 1 1 1 Node inst_BGACK_030_INT_D.D + 1 1 1 Node inst_BGACK_030_INT_D.AP + 1 1 1 Node inst_BGACK_030_INT_D.C + 1 1 1 Node CLK_CNT_P_0_.AR + 1 1 1 Node CLK_CNT_P_0_.D + 1 1 1 Node CLK_CNT_P_0_.C 1 1 1 Node SM_AMIGA_5_.AR - 2 3 1 Node SM_AMIGA_5_.D + 3 4 1 Node SM_AMIGA_5_.D 1 1 1 Node SM_AMIGA_5_.C + 6 10 1 Node SM_AMIGA_7_.D + 1 1 1 Node SM_AMIGA_7_.AP + 1 1 1 Node SM_AMIGA_7_.C + 1 1 1 Node SM_AMIGA_1_.AR + 4 6 1 Node SM_AMIGA_1_.D + 1 1 1 Node SM_AMIGA_1_.C + 3 6 1 NodeX1 SM_AMIGA_0_.D.X1 + 1 4 1 NodeX2 SM_AMIGA_0_.D.X2 + 1 1 1 Node SM_AMIGA_0_.AR + 1 1 1 Node SM_AMIGA_0_.C 1 1 1 Node SM_AMIGA_6_.AR - 2 7 1 Node SM_AMIGA_6_.D + 3 8 1 Node SM_AMIGA_6_.D 1 1 1 Node SM_AMIGA_6_.C 1 1 1 Node inst_CLK_000_D3.D 1 1 1 Node inst_CLK_000_D3.AP @@ -1101,40 +1118,16 @@ PostFit_Equations 1 1 1 Node inst_CLK_000_D5.AP 1 1 1 Node inst_CLK_000_D5.C 1 1 1 Node SM_AMIGA_3_.AR - 3 5 1 Node SM_AMIGA_3_.D + 4 6 1 Node SM_AMIGA_3_.D 1 1 1 Node SM_AMIGA_3_.C - 1 1 1 Node SM_AMIGA_0_.AR - 4 6 1 Node SM_AMIGA_0_.D - 1 1 1 Node SM_AMIGA_0_.C - 1 1 1 Node SM_AMIGA_1_.AR - 3 5 1 Node SM_AMIGA_1_.D - 1 1 1 Node SM_AMIGA_1_.C - 1 1 1 Node CLK_CNT_N_0_.AR - 2 2 1 Node CLK_CNT_N_0_.D - 1 1 1 Node CLK_CNT_N_0_.C - 1 1 1 Node CLK_CNT_N_1_.D - 1 1 1 Node CLK_CNT_N_1_.AP - 1 1 1 Node CLK_CNT_N_1_.C - 1 1 1 Node CLK_CNT_P_0_.AR - 2 2 1 Node CLK_CNT_P_0_.D - 1 1 1 Node CLK_CNT_P_0_.C - 1 1 1 Node CLK_CNT_P_1_.AR - 1 1 1 Node CLK_CNT_P_1_.D - 1 1 1 Node CLK_CNT_P_1_.C 1 1 1 Node inst_CLK_000_D4.D 1 1 1 Node inst_CLK_000_D4.AP 1 1 1 Node inst_CLK_000_D4.C - 5 9 1 Node SM_AMIGA_7_.D - 1 1 1 Node SM_AMIGA_7_.AP - 1 1 1 Node SM_AMIGA_7_.C 1 1 1 Node SM_AMIGA_4_.AR - 2 3 1 Node SM_AMIGA_4_.D + 3 4 1 Node SM_AMIGA_4_.D 1 1 1 Node SM_AMIGA_4_.C - 1 1 1 Node inst_CLK_OUT_PRE.AR - 4 4 1 Node inst_CLK_OUT_PRE.D - 1 1 1 Node inst_CLK_OUT_PRE.C 1 1 1 Node SM_AMIGA_2_.AR - 3 5 1 Node SM_AMIGA_2_.D + 4 6 1 Node SM_AMIGA_2_.D 1 1 1 Node SM_AMIGA_2_.C 1 1 1 Node cpu_est_0_.AR 3 3 1 Node cpu_est_0_.D @@ -1147,18 +1140,14 @@ PostFit_Equations 1 1 1 Node cpu_est_2_.AR 1 1 1 Node cpu_est_2_.C ========= - 243 P-Term Total: 243 + 245 P-Term Total: 245 Total Pins: 59 - Total Nodes: 27 + Total Nodes: 25 Average P-Term/Output: 2 Equations: -DSACK_0_ = (0); - -DSACK_0_.OE = (0); - BERR = (0); BERR.OE = (!FPU_CS.Q); @@ -1171,7 +1160,7 @@ CLK_DIV_OUT.C = (CLK_OSZI); DTACK = (DSACK_1_.PIN); -DTACK.OE = (!nEXP_SPACE & !BGACK_030.Q); +DTACK.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); AVEC = (1); @@ -1179,8 +1168,12 @@ AVEC_EXP = (0); AVEC_EXP.OE = (!FPU_CS.Q); +DSACK_0_ = (1); + +DSACK_0_.OE = (nEXP_SPACE); + AMIGA_BUS_DATA_DIR = (!RW & BGACK_030.Q - # RW & !BGACK_030.Q); + # !nEXP_SPACE & RW & !BGACK_030.Q); AMIGA_BUS_ENABLE_LOW = (1); @@ -1188,23 +1181,7 @@ CIIN = (A_23_ & A_22_ & A_21_ & A_20_); CIIN.OE = (!A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_); -IPL_030_1_.D = (!inst_CLK_000_D0.Q & IPL_030_1_.Q - # inst_CLK_000_D1.Q & IPL_030_1_.Q - # IPL_1_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); - -IPL_030_1_.AP = (!RST); - -IPL_030_1_.C = (CLK_OSZI); - -IPL_030_0_.D = (!inst_CLK_000_D0.Q & IPL_030_0_.Q - # inst_CLK_000_D1.Q & IPL_030_0_.Q - # IPL_0_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); - -IPL_030_0_.AP = (!RST); - -IPL_030_0_.C = (CLK_OSZI); - -SIZE_1_.OE = (!nEXP_SPACE & !BGACK_030.Q); +SIZE_1_.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); !SIZE_1_.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !SIZE_1_.Q # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & LDS_000.PIN @@ -1225,13 +1202,13 @@ IPL_030_2_.C = (CLK_OSZI); DSACK_1_.OE = (nEXP_SPACE); !DSACK_1_.D = (!DSACK_1_.Q & !AS_030.PIN - # !inst_CLK_000_D6.Q & inst_CLK_000_D5.Q & SM_AMIGA_1_.Q); + # BGACK_030.Q & !inst_CLK_000_D6.Q & SM_AMIGA_1_.Q & inst_CLK_000_D5.Q); DSACK_1_.AP = (!RST); DSACK_1_.C = (CLK_OSZI); -AS_030.OE = (!nEXP_SPACE & !BGACK_030.Q); +AS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); !AS_030.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !AS_030.Q # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN @@ -1241,16 +1218,25 @@ AS_030.AP = (!RST); AS_030.C = (CLK_OSZI); +SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); + +!SIZE_0_.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !SIZE_0_.Q + # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & !LDS_000.PIN); + +SIZE_0_.AP = (!RST); + +SIZE_0_.C = (CLK_OSZI); + AS_000.OE = (BGACK_030.Q); -AS_000.D = (!SM_AMIGA_5_.Q & AS_000.Q - # !SM_AMIGA_5_.Q & AS_030.PIN); +!AS_000.D = (BGACK_030.Q & SM_AMIGA_5_.Q + # !AS_000.Q & !AS_030.PIN); AS_000.AP = (!RST); AS_000.C = (CLK_OSZI); -DS_030.OE = (!nEXP_SPACE & !BGACK_030.Q); +DS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); !DS_030.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !DS_030.Q # !CLK_030 & RW & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN @@ -1264,11 +1250,12 @@ DS_030.C = (CLK_OSZI); UDS_000.OE = (BGACK_030.Q); -!UDS_000.D = (!UDS_000.Q & !AS_030.PIN & DS_030.PIN +!UDS_000.D = (!BGACK_030.Q & !UDS_000.Q & !AS_030.PIN + # !UDS_000.Q & !AS_030.PIN & DS_030.PIN # RW & !SM_AMIGA_5_.Q & !UDS_000.Q & !AS_030.PIN # !RW & !UDS_000.Q & !SM_AMIGA_4_.Q & !AS_030.PIN - # RW & SM_AMIGA_5_.Q & !DS_030.PIN & !A0.PIN - # !RW & SM_AMIGA_4_.Q & !DS_030.PIN & !A0.PIN); + # RW & BGACK_030.Q & SM_AMIGA_5_.Q & !DS_030.PIN & !A0.PIN + # !RW & BGACK_030.Q & SM_AMIGA_4_.Q & !DS_030.PIN & !A0.PIN); UDS_000.AP = (!RST); @@ -1276,20 +1263,22 @@ UDS_000.C = (CLK_OSZI); LDS_000.OE = (BGACK_030.Q); -LDS_000.D = (LDS_000.Q & DS_030.PIN +LDS_000.D = (!BGACK_030.Q & LDS_000.Q + # !BGACK_030.Q & AS_030.PIN + # LDS_000.Q & DS_030.PIN # AS_030.PIN & DS_030.PIN # RW & !SM_AMIGA_5_.Q & LDS_000.Q # !RW & LDS_000.Q & !SM_AMIGA_4_.Q # RW & !SM_AMIGA_5_.Q & AS_030.PIN # !RW & !SM_AMIGA_4_.Q & AS_030.PIN - # RW & SM_AMIGA_5_.Q & !DS_030.PIN & SIZE_0_.PIN & !SIZE_1_.PIN & !A0.PIN - # !RW & SM_AMIGA_4_.Q & !DS_030.PIN & SIZE_0_.PIN & !SIZE_1_.PIN & !A0.PIN); + # RW & BGACK_030.Q & SM_AMIGA_5_.Q & !DS_030.PIN & SIZE_0_.PIN & !SIZE_1_.PIN & !A0.PIN + # !RW & BGACK_030.Q & SM_AMIGA_4_.Q & !DS_030.PIN & SIZE_0_.PIN & !SIZE_1_.PIN & !A0.PIN); LDS_000.AP = (!RST); LDS_000.C = (CLK_OSZI); -A0.OE = (!nEXP_SPACE & !BGACK_030.Q); +A0.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); A0.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & A0.Q # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN); @@ -1318,6 +1307,14 @@ CLK_EXP.D = (inst_CLK_OUT_PRE.Q); CLK_EXP.C = (CLK_OSZI); +IPL_030_1_.D = (!inst_CLK_000_D0.Q & IPL_030_1_.Q + # inst_CLK_000_D1.Q & IPL_030_1_.Q + # IPL_1_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); + +IPL_030_1_.AP = (!RST); + +IPL_030_1_.C = (CLK_OSZI); + !FPU_CS.D = (!FPU_CS.Q & !AS_030.PIN # FC_1_ & BGACK_000 & CLK_030 & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & !AS_030.PIN); @@ -1325,6 +1322,14 @@ FPU_CS.AP = (!RST); FPU_CS.C = (CLK_OSZI); +IPL_030_0_.D = (!inst_CLK_000_D0.Q & IPL_030_0_.Q + # inst_CLK_000_D1.Q & IPL_030_0_.Q + # IPL_0_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); + +IPL_030_0_.AP = (!RST); + +IPL_030_0_.C = (CLK_OSZI); + E.D.X1 = (inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & cpu_est_1_.Q & cpu_est_2_.Q & E.Q # inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & cpu_est_0_.Q & !cpu_est_2_.Q & !E.Q # inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !E.Q); @@ -1335,10 +1340,10 @@ E.AR = (!RST); E.C = (CLK_OSZI); -VMA.D.X1 = (VMA.Q - # !VMA.Q & inst_CLK_000_D0.Q & AS_000.Q & !cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & !E.Q); - -VMA.D.X2 = (!VPA & VMA.Q & !inst_CLK_000_D0.Q & cpu_est_0_.Q & !cpu_est_1_.Q); +!VMA.D = (!BGACK_030.Q & !VMA.Q + # !VMA.Q & !SM_AMIGA_7_.Q + # !BGACK_030.Q & !inst_VPA_D.Q & !inst_CLK_000_D0.Q & cpu_est_0_.Q & !cpu_est_1_.Q + # !inst_VPA_D.Q & !inst_CLK_000_D0.Q & !SM_AMIGA_7_.Q & cpu_est_0_.Q & !cpu_est_1_.Q); VMA.AP = (!RST); @@ -1350,59 +1355,49 @@ RESET.D = (1); RESET.C = (CLK_OSZI); -AMIGA_BUS_ENABLE.D = (BGACK_030.Q & !inst_BGACK_030_INT_D.Q - # !nEXP_SPACE & BGACK_030.Q & AMIGA_BUS_ENABLE.Q - # !nEXP_SPACE & !inst_BGACK_030_INT_D.Q & AMIGA_BUS_ENABLE.Q - # BGACK_030.Q & !SM_AMIGA_6_.Q & AMIGA_BUS_ENABLE.Q - # !inst_BGACK_030_INT_D.Q & !SM_AMIGA_6_.Q & AMIGA_BUS_ENABLE.Q - # BGACK_030.Q & inst_CLK_000_D0.Q & AS_000.Q & SM_AMIGA_0_.Q - # !inst_BGACK_030_INT_D.Q & inst_CLK_000_D0.Q & AS_000.Q & SM_AMIGA_0_.Q); +!AMIGA_BUS_ENABLE.D = (!BGACK_030.Q & inst_BGACK_030_INT_D.Q + # !BGACK_030.Q & !AMIGA_BUS_ENABLE.Q + # inst_BGACK_030_INT_D.Q & !AMIGA_BUS_ENABLE.Q & !AS_030.PIN + # inst_BGACK_030_INT_D.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q & !AMIGA_BUS_ENABLE.Q + # nEXP_SPACE & BGACK_030.Q & SM_AMIGA_6_.Q & !AS_030.PIN + # nEXP_SPACE & BGACK_030.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q & SM_AMIGA_6_.Q); AMIGA_BUS_ENABLE.AP = (!RST); AMIGA_BUS_ENABLE.C = (CLK_OSZI); -SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q); - -!SIZE_0_.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !SIZE_0_.Q - # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & !LDS_000.PIN); - -SIZE_0_.AP = (!RST); - -SIZE_0_.C = (CLK_OSZI); - inst_AS_030_000_SYNC.D = (AS_030.PIN # !nEXP_SPACE & inst_AS_030_000_SYNC.Q # !CLK_030 & inst_AS_030_000_SYNC.Q - # !nEXP_SPACE & SM_AMIGA_6_.Q # inst_AS_030_000_SYNC.Q & !SM_AMIGA_7_.Q - # !inst_CLK_000_D6.Q & inst_CLK_000_D5.Q & SM_AMIGA_1_.Q + # !nEXP_SPACE & BGACK_030.Q & SM_AMIGA_6_.Q + # BGACK_030.Q & !inst_CLK_000_D6.Q & SM_AMIGA_1_.Q & inst_CLK_000_D5.Q # FC_1_ & BGACK_000 & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & inst_AS_030_000_SYNC.Q); inst_AS_030_000_SYNC.AP = (!RST); inst_AS_030_000_SYNC.C = (CLK_OSZI); -inst_BGACK_030_INT_D.D = (BGACK_030.Q); - -inst_BGACK_030_INT_D.AP = (!RST); - -inst_BGACK_030_INT_D.C = (CLK_OSZI); - !inst_DTACK_SYNC.D = (!inst_DTACK_SYNC.Q & !AS_030.PIN - # VPA & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !DTACK.PIN); + # BGACK_030.Q & inst_VPA_D.Q & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !DTACK.PIN); inst_DTACK_SYNC.AP = (!RST); inst_DTACK_SYNC.C = (CLK_OSZI); !inst_VPA_SYNC.D = (!inst_VPA_SYNC.Q & !AS_030.PIN - # !VPA & !VMA.Q & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !cpu_est_1_.Q & E.Q); + # BGACK_030.Q & !VMA.Q & !inst_VPA_D.Q & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !cpu_est_1_.Q & E.Q); inst_VPA_SYNC.AP = (!RST); inst_VPA_SYNC.C = (CLK_OSZI); +inst_VPA_D.D = (VPA); + +inst_VPA_D.AP = (!RST); + +inst_VPA_D.C = (CLK_OSZI); + inst_CLK_000_D0.D = (CLK_000); inst_CLK_000_D0.AP = (!RST); @@ -1427,17 +1422,68 @@ inst_CLK_000_D6.AP = (!RST); inst_CLK_000_D6.C = (CLK_OSZI); +inst_CLK_OUT_PRE.AR = (!RST); + +inst_CLK_OUT_PRE.D = (!inst_CLK_OUT_PRE.Q & CLK_CNT_P_0_.Q + # inst_CLK_OUT_PRE.Q & !CLK_CNT_P_0_.Q); + +inst_CLK_OUT_PRE.C = (CLK_OSZI); + +inst_BGACK_030_INT_D.D = (BGACK_030.Q); + +inst_BGACK_030_INT_D.AP = (!RST); + +inst_BGACK_030_INT_D.C = (CLK_OSZI); + +CLK_CNT_P_0_.AR = (!RST); + +CLK_CNT_P_0_.D = (!CLK_CNT_P_0_.Q); + +CLK_CNT_P_0_.C = (CLK_OSZI); + SM_AMIGA_5_.AR = (!RST); -SM_AMIGA_5_.D = (inst_CLK_000_D0.Q & SM_AMIGA_5_.Q - # inst_CLK_000_D0.Q & SM_AMIGA_6_.Q); +SM_AMIGA_5_.D = (!BGACK_030.Q & SM_AMIGA_5_.Q + # inst_CLK_000_D0.Q & SM_AMIGA_5_.Q + # BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_6_.Q); SM_AMIGA_5_.C = (CLK_OSZI); +SM_AMIGA_7_.D = (!BGACK_030.Q & SM_AMIGA_7_.Q + # inst_AS_030_000_SYNC.Q & SM_AMIGA_7_.Q + # inst_CLK_000_D2.Q & SM_AMIGA_7_.Q + # SM_AMIGA_7_.Q & !inst_CLK_000_D3.Q + # !nEXP_SPACE & BGACK_030.Q & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q + # BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_0_.Q & AS_000.Q); + +SM_AMIGA_7_.AP = (!RST); + +SM_AMIGA_7_.C = (CLK_OSZI); + +SM_AMIGA_1_.AR = (!RST); + +SM_AMIGA_1_.D = (!BGACK_030.Q & SM_AMIGA_1_.Q + # inst_CLK_000_D0.Q & SM_AMIGA_1_.Q + # !inst_CLK_000_D6.Q & SM_AMIGA_1_.Q & inst_CLK_000_D5.Q + # BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_2_.Q); + +SM_AMIGA_1_.C = (CLK_OSZI); + +SM_AMIGA_0_.D.X1 = (SM_AMIGA_0_.Q + # BGACK_030.Q & !inst_CLK_000_D0.Q & inst_CLK_000_D6.Q & SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q + # BGACK_030.Q & !inst_CLK_000_D0.Q & SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q & !inst_CLK_000_D5.Q); + +SM_AMIGA_0_.D.X2 = (BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_0_.Q & AS_000.Q); + +SM_AMIGA_0_.AR = (!RST); + +SM_AMIGA_0_.C = (CLK_OSZI); + SM_AMIGA_6_.AR = (!RST); -SM_AMIGA_6_.D = (!inst_AS_030_000_SYNC.Q & !inst_CLK_000_D2.Q & inst_CLK_000_D3.Q & SM_AMIGA_7_.Q - # nEXP_SPACE & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q & !SM_AMIGA_7_.Q); +SM_AMIGA_6_.D = (!BGACK_030.Q & SM_AMIGA_6_.Q + # nEXP_SPACE & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q + # BGACK_030.Q & !inst_AS_030_000_SYNC.Q & !inst_CLK_000_D2.Q & SM_AMIGA_7_.Q & inst_CLK_000_D3.Q); SM_AMIGA_6_.C = (CLK_OSZI); @@ -1455,92 +1501,33 @@ inst_CLK_000_D5.C = (CLK_OSZI); SM_AMIGA_3_.AR = (!RST); -SM_AMIGA_3_.D = (inst_CLK_000_D0.Q & SM_AMIGA_3_.Q - # inst_CLK_000_D0.Q & SM_AMIGA_4_.Q - # inst_DTACK_SYNC.Q & inst_VPA_SYNC.Q & SM_AMIGA_3_.Q); +SM_AMIGA_3_.D = (!BGACK_030.Q & SM_AMIGA_3_.Q + # inst_CLK_000_D0.Q & SM_AMIGA_3_.Q + # inst_DTACK_SYNC.Q & inst_VPA_SYNC.Q & SM_AMIGA_3_.Q + # BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q); SM_AMIGA_3_.C = (CLK_OSZI); -SM_AMIGA_0_.AR = (!RST); - -SM_AMIGA_0_.D = (!inst_CLK_000_D0.Q & SM_AMIGA_0_.Q - # !AS_000.Q & SM_AMIGA_0_.Q - # !inst_CLK_000_D0.Q & inst_CLK_000_D6.Q & SM_AMIGA_1_.Q - # !inst_CLK_000_D0.Q & !inst_CLK_000_D5.Q & SM_AMIGA_1_.Q); - -SM_AMIGA_0_.C = (CLK_OSZI); - -SM_AMIGA_1_.AR = (!RST); - -SM_AMIGA_1_.D = (inst_CLK_000_D0.Q & SM_AMIGA_1_.Q - # inst_CLK_000_D0.Q & SM_AMIGA_2_.Q - # !inst_CLK_000_D6.Q & inst_CLK_000_D5.Q & SM_AMIGA_1_.Q); - -SM_AMIGA_1_.C = (CLK_OSZI); - -CLK_CNT_N_0_.AR = (!RST); - -CLK_CNT_N_0_.D = (CLK_CNT_N_0_.Q & CLK_CNT_N_1_.Q - # !CLK_CNT_N_0_.Q & !CLK_CNT_N_1_.Q); - -CLK_CNT_N_0_.C = (!CLK_OSZI); - -CLK_CNT_N_1_.D = (CLK_CNT_N_0_.Q); - -CLK_CNT_N_1_.AP = (!RST); - -CLK_CNT_N_1_.C = (!CLK_OSZI); - -CLK_CNT_P_0_.AR = (!RST); - -CLK_CNT_P_0_.D = (CLK_CNT_P_0_.Q & CLK_CNT_P_1_.Q - # !CLK_CNT_P_0_.Q & !CLK_CNT_P_1_.Q); - -CLK_CNT_P_0_.C = (CLK_OSZI); - -CLK_CNT_P_1_.AR = (!RST); - -CLK_CNT_P_1_.D = (CLK_CNT_P_0_.Q); - -CLK_CNT_P_1_.C = (CLK_OSZI); - inst_CLK_000_D4.D = (inst_CLK_000_D3.Q); inst_CLK_000_D4.AP = (!RST); inst_CLK_000_D4.C = (CLK_OSZI); -SM_AMIGA_7_.D = (inst_AS_030_000_SYNC.Q & SM_AMIGA_7_.Q - # inst_CLK_000_D2.Q & SM_AMIGA_7_.Q - # !inst_CLK_000_D3.Q & SM_AMIGA_7_.Q - # !nEXP_SPACE & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q - # inst_CLK_000_D0.Q & AS_000.Q & SM_AMIGA_0_.Q); - -SM_AMIGA_7_.AP = (!RST); - -SM_AMIGA_7_.C = (CLK_OSZI); - SM_AMIGA_4_.AR = (!RST); -SM_AMIGA_4_.D = (!inst_CLK_000_D0.Q & SM_AMIGA_5_.Q - # !inst_CLK_000_D0.Q & SM_AMIGA_4_.Q); +SM_AMIGA_4_.D = (!BGACK_030.Q & SM_AMIGA_4_.Q + # !inst_CLK_000_D0.Q & SM_AMIGA_4_.Q + # BGACK_030.Q & !inst_CLK_000_D0.Q & SM_AMIGA_5_.Q); SM_AMIGA_4_.C = (CLK_OSZI); -inst_CLK_OUT_PRE.AR = (!RST); - -inst_CLK_OUT_PRE.D = (!CLK_CNT_N_0_.Q & CLK_CNT_N_1_.Q & !CLK_CNT_P_0_.Q & CLK_CNT_P_1_.Q - # CLK_CNT_N_0_.Q & !CLK_CNT_N_1_.Q & !CLK_CNT_P_0_.Q & CLK_CNT_P_1_.Q - # !CLK_CNT_N_0_.Q & CLK_CNT_N_1_.Q & CLK_CNT_P_0_.Q & !CLK_CNT_P_1_.Q - # CLK_CNT_N_0_.Q & !CLK_CNT_N_1_.Q & CLK_CNT_P_0_.Q & !CLK_CNT_P_1_.Q); - -inst_CLK_OUT_PRE.C = (CLK_OSZI); - SM_AMIGA_2_.AR = (!RST); -SM_AMIGA_2_.D = (!inst_CLK_000_D0.Q & SM_AMIGA_2_.Q - # !inst_DTACK_SYNC.Q & !inst_CLK_000_D0.Q & SM_AMIGA_3_.Q - # !inst_VPA_SYNC.Q & !inst_CLK_000_D0.Q & SM_AMIGA_3_.Q); +SM_AMIGA_2_.D = (!BGACK_030.Q & SM_AMIGA_2_.Q + # !inst_CLK_000_D0.Q & SM_AMIGA_2_.Q + # BGACK_030.Q & !inst_DTACK_SYNC.Q & !inst_CLK_000_D0.Q & SM_AMIGA_3_.Q + # BGACK_030.Q & !inst_VPA_SYNC.Q & !inst_CLK_000_D0.Q & SM_AMIGA_3_.Q); SM_AMIGA_2_.C = (CLK_OSZI); diff --git a/Logic/68030_tk.tal b/Logic/68030_tk.tal index 6e527a8..bc2424f 100644 --- a/Logic/68030_tk.tal +++ b/Logic/68030_tk.tal @@ -36,10 +36,6 @@ SIGNAL NAME min max min max min max min max DTACK .. .. .. .. 1 1 .. .. AMIGA_BUS_DATA_DIR .. .. .. .. 1 1 .. .. CIIN .. .. .. .. 1 1 .. .. - IPL_030_1_ 1 1 0 0 .. .. 1 1 - RN_IPL_030_1_ 1 1 0 0 .. .. 1 1 - IPL_030_0_ 1 1 0 0 .. .. 1 1 - RN_IPL_030_0_ 1 1 0 0 .. .. 1 1 SIZE_1_ 1 1 0 0 .. .. 1 1 RN_SIZE_1_ 1 1 0 0 .. .. 1 1 IPL_030_2_ 1 1 0 0 .. .. 1 1 @@ -48,6 +44,8 @@ AMIGA_BUS_DATA_DIR .. .. .. .. 1 1 .. .. RN_DSACK_1_ 1 1 0 0 .. .. 1 1 AS_030 1 1 0 0 .. .. 1 1 RN_AS_030 1 1 0 0 .. .. 1 1 + SIZE_0_ 1 1 0 0 .. .. 1 1 + RN_SIZE_0_ 1 1 0 0 .. .. 1 1 AS_000 1 1 0 0 .. .. 1 1 RN_AS_000 1 1 0 0 .. .. 1 1 DS_030 1 1 0 0 .. .. 1 1 @@ -62,38 +60,38 @@ AMIGA_BUS_DATA_DIR .. .. .. .. 1 1 .. .. RN_BG_000 1 1 0 0 .. .. 1 1 BGACK_030 1 1 0 1 .. .. 1 1 RN_BGACK_030 1 1 0 1 .. .. 1 1 + IPL_030_1_ 1 1 0 0 .. .. 1 1 + RN_IPL_030_1_ 1 1 0 0 .. .. 1 1 FPU_CS 1 1 0 0 .. .. 1 1 RN_FPU_CS 1 1 0 0 .. .. 1 1 + IPL_030_0_ 1 1 0 0 .. .. 1 1 + RN_IPL_030_0_ 1 1 0 0 .. .. 1 1 E .. .. 0 0 .. .. 1 1 RN_E .. .. 0 0 .. .. 1 1 - VMA 1 1 0 0 .. .. 1 1 - RN_VMA 1 1 0 0 .. .. 1 1 + VMA .. .. 0 0 .. .. 1 1 + RN_VMA .. .. 0 0 .. .. 1 1 AMIGA_BUS_ENABLE 1 1 0 0 .. .. 1 1 RN_AMIGA_BUS_ENABLE 1 1 0 0 .. .. 1 1 - SIZE_0_ 1 1 0 0 .. .. 1 1 - RN_SIZE_0_ 1 1 0 0 .. .. 1 1 inst_AS_030_000_SYNC 1 1 .. .. .. .. 1 1 -inst_BGACK_030_INT_D .. .. .. .. .. .. 1 1 inst_VPA_SYNC 1 1 .. .. .. .. 1 1 + inst_VPA_D 1 1 .. .. .. .. 1 1 inst_CLK_000_D0 1 1 .. .. .. .. 1 1 inst_CLK_000_D1 .. .. .. .. .. .. 1 1 inst_CLK_000_D2 .. .. .. .. .. .. 1 1 inst_CLK_000_D6 .. .. .. .. .. .. 1 1 +inst_CLK_OUT_PRE .. .. .. .. .. .. 1 1 +inst_BGACK_030_INT_D .. .. .. .. .. .. 1 1 + CLK_CNT_P_0_ .. .. .. .. .. .. 1 1 SM_AMIGA_5_ .. .. .. .. .. .. 1 1 + SM_AMIGA_7_ 1 1 .. .. .. .. 1 1 + SM_AMIGA_1_ .. .. .. .. .. .. 1 1 + SM_AMIGA_0_ .. .. .. .. .. .. 1 1 SM_AMIGA_6_ 1 1 .. .. .. .. 1 1 inst_CLK_000_D3 .. .. .. .. .. .. 1 1 inst_CLK_000_D5 .. .. .. .. .. .. 1 1 SM_AMIGA_3_ .. .. .. .. .. .. 1 1 - SM_AMIGA_0_ .. .. .. .. .. .. 1 1 - SM_AMIGA_1_ .. .. .. .. .. .. 1 1 - CLK_CNT_N_0_ .. .. .. .. .. .. 1 1 - CLK_CNT_N_1_ .. .. .. .. .. .. 1 1 - CLK_CNT_P_0_ .. .. .. .. .. .. 1 1 - CLK_CNT_P_1_ .. .. .. .. .. .. 1 1 inst_CLK_000_D4 .. .. .. .. .. .. 1 1 - SM_AMIGA_7_ 1 1 .. .. .. .. 1 1 SM_AMIGA_4_ .. .. .. .. .. .. 1 1 -inst_CLK_OUT_PRE .. .. .. .. .. .. 1 1 SM_AMIGA_2_ .. .. .. .. .. .. 1 1 cpu_est_0_ .. .. .. .. .. .. 1 1 cpu_est_1_ .. .. .. .. .. .. 1 1 diff --git a/Logic/68030_tk.tlg b/Logic/68030_tk.tlg new file mode 100644 index 0000000..3cf792e --- /dev/null +++ b/Logic/68030_tk.tlg @@ -0,0 +1,34 @@ + +// Batch Timer Log File (Release Version: 1.7.00.05.28.13) + +// Project = 68030_tk +// Family = mach4a +// Device = M4A5-128/64 +// Speed = -10 +// Voltage = 5.0 +// Operating Condition = COM +// Data sheet version = RevD-8/2000 + +// Pass Bidirection = OFF +// Pass S/R = OFF +// Pass Latch = OFF +// Pass Clock = OFF +// Maximum Paths = 20 +// T_SU Endpoints D/T inputs = ON +// T_SU Endpoints CE inputs = OFF +// T_SU Endpoints S/R inputs = OFF +// T_SU Endpoints RAM gated = ON +// Fmax of CE = ON +// Fmax of RAM = ON + +// Location(From => To) +// Pin number: numeric number preceded by "p", BGA number as is +// Macrocell number: Segment#,GLB#,Macrocell# +// Segment#: starts from 0 (if applicable) +// GLB#: starts from A..Z, AA..ZZ +// Macrocell#: starts from 0 to 31 + +// Register-to-register critical path delay: 9.5 ns +// - 3.0 tCOSi E.C ==> E.Q +// - 0.0 E.Q ==> cpu_est_1_.T +// - 6.5 tSST cpu_est_1_.T ==> cpu_est_1_.C diff --git a/Logic/68030_tk.trp b/Logic/68030_tk.trp new file mode 100644 index 0000000..32b0ec8 --- /dev/null +++ b/Logic/68030_tk.trp @@ -0,0 +1,537 @@ + +Timing Report for STAMP + +// Project = 68030_tk +// Family = mach4a +// Device = M4A5-128/64 +// Speed = -10 +// Voltage = 5.0 +// Operating Condition = COM +// Data sheet version = RevD-8/2000 + +// Pass Bidirection = OFF +// Pass S/R = OFF +// Pass Latch = OFF +// T_SU Endpoints D/T inputs = ON +// T_SU Endpoints CE inputs = OFF +// T_SU Endpoints S/R inputs = OFF +// T_SU Endpoints RAM gated = ON +// Fmax of CE = ON +// Fmax of RAM = ON + +// Location(From => To) +// Pin number: numeric number preceded by "p", BGA number as is +// Macrocell number: Segment#,GLB#,Macrocell# +// Segment#: starts from 0 (if applicable) +// GLB#: starts from A..Z, AA..ZZ +// Macrocell#: starts from 0 to 31 + + +Section IO + //DESTINATION NODES; + A0 [bidi] + AS_000 [bidi] + AS_030 [bidi] + DSACK[1] [bidi] + DS_030 [bidi] + DTACK [bidi] + LDS_000 [bidi] + SIZE[0] [bidi] + SIZE[1] [bidi] + UDS_000 [bidi] + AMIGA_BUS_DATA_DIR [out] + AMIGA_BUS_ENABLE [out] + AMIGA_BUS_ENABLE_LOW [out] + AVEC [out] + AVEC_EXP [out] + BERR [out] + BGACK_030 [out] + BG_000 [out] + CIIN [out] + CLK_DIV_OUT [out] + CLK_EXP [out] + DSACK[0] [out] + E [out] + FPU_CS [out] + IPL_030[0] [out] + IPL_030[1] [out] + IPL_030[2] [out] + RESET [out] + VMA [out] + A0.C [reg] + AMIGA_BUS_ENABLE.C [reg] + AS_000.C [reg] + AS_030.C [reg] + BGACK_030.C [reg] + BG_000.C [reg] + CLK_CNT_N_0_.C [reg] + CLK_CNT_N_1_.C [reg] + CLK_CNT_P_0_.C [reg] + CLK_CNT_P_1_.C [reg] + CLK_DIV_OUT.C [reg] + CLK_EXP.C [reg] + DSACK_1_.C [reg] + DS_030.C [reg] + E.C [reg] + FPU_CS.C [reg] + IPL_030_0_.C [reg] + IPL_030_1_.C [reg] + IPL_030_2_.C [reg] + LDS_000.C [reg] + RESET.C [reg] + SIZE_0_.C [reg] + SIZE_1_.C [reg] + SM_AMIGA_0_.C [reg] + SM_AMIGA_1_.C [reg] + SM_AMIGA_2_.C [reg] + SM_AMIGA_3_.C [reg] + SM_AMIGA_4_.C [reg] + SM_AMIGA_5_.C [reg] + SM_AMIGA_6_.C [reg] + SM_AMIGA_7_.C [reg] + UDS_000.C [reg] + VMA.C [reg] + cpu_est_0_.C [reg] + cpu_est_1_.C [reg] + cpu_est_2_.C [reg] + inst_AS_030_000_SYNC.C [reg] + inst_BGACK_030_INT_D.C [reg] + inst_CLK_000_D0.C [reg] + inst_CLK_000_D1.C [reg] + inst_CLK_000_D2.C [reg] + inst_CLK_000_D3.C [reg] + inst_CLK_000_D4.C [reg] + inst_CLK_000_D5.C [reg] + inst_CLK_000_D6.C [reg] + inst_CLK_OUT_PRE.C [reg] + inst_DTACK_SYNC.C [reg] + inst_VPA_D.C [reg] + inst_VPA_SYNC.C [reg] + A0.D [reg] + AMIGA_BUS_ENABLE.D [reg] + AS_000.D [reg] + AS_030.D [reg] + BGACK_030.D [reg] + BG_000.D [reg] + CLK_CNT_N_0_.D [reg] + CLK_CNT_N_1_.D [reg] + CLK_CNT_P_0_.D [reg] + CLK_CNT_P_1_.D [reg] + CLK_DIV_OUT.D [reg] + CLK_EXP.D [reg] + DSACK_1_.D [reg] + DS_030.D [reg] + E.D.X1 [reg] + E.D.X2 [reg] + FPU_CS.D [reg] + IPL_030_0_.D [reg] + IPL_030_1_.D [reg] + IPL_030_2_.D [reg] + LDS_000.D [reg] + RESET.D [reg] + SIZE_0_.D [reg] + SIZE_1_.D [reg] + SM_AMIGA_0_.D [reg] + SM_AMIGA_1_.D [reg] + SM_AMIGA_2_.D [reg] + SM_AMIGA_3_.D [reg] + SM_AMIGA_4_.D [reg] + SM_AMIGA_5_.D [reg] + SM_AMIGA_6_.D [reg] + SM_AMIGA_7_.D [reg] + UDS_000.D [reg] + VMA.D.X1 [reg] + VMA.D.X2 [reg] + cpu_est_0_.D [reg] + cpu_est_1_.T [reg] + cpu_est_2_.D.X1 [reg] + cpu_est_2_.D.X2 [reg] + inst_AS_030_000_SYNC.D [reg] + inst_BGACK_030_INT_D.D [reg] + inst_CLK_000_D0.D [reg] + inst_CLK_000_D1.D [reg] + inst_CLK_000_D2.D [reg] + inst_CLK_000_D3.D [reg] + inst_CLK_000_D4.D [reg] + inst_CLK_000_D5.D [reg] + inst_CLK_000_D6.D [reg] + inst_CLK_OUT_PRE.D [reg] + inst_DTACK_SYNC.D [reg] + inst_VPA_D.D [reg] + inst_VPA_SYNC.D [reg] + + //SOURCE NODES; + A[16] [in] + A[17] [in] + A[18] [in] + A[19] [in] + A[20] [in] + A[21] [in] + A[22] [in] + A[23] [in] + A[24] [in] + A[25] [in] + A[26] [in] + A[27] [in] + A[28] [in] + A[29] [in] + A[30] [in] + A[31] [in] + BGACK_000 [in] + BG_030 [in] + CLK_000 [in] + CLK_030 [in] + CLK_OSZI [in] + FC[0] [in] + FC[1] [in] + IPL[0] [in] + IPL[1] [in] + IPL[2] [in] + RST [in] + RW [in] + VPA [in] + nEXP_SPACE [in] + A0.Q [reg] + AMIGA_BUS_ENABLE.Q [reg] + AS_000.Q [reg] + AS_030.Q [reg] + BGACK_030.Q [reg] + BG_000.Q [reg] + CLK_CNT_N_0_.Q [reg] + CLK_CNT_N_1_.Q [reg] + CLK_CNT_P_0_.Q [reg] + CLK_CNT_P_1_.Q [reg] + CLK_DIV_OUT.Q [reg] + CLK_EXP.Q [reg] + DSACK_1_.Q [reg] + DS_030.Q [reg] + E.Q [reg] + FPU_CS.Q [reg] + IPL_030_0_.Q [reg] + IPL_030_1_.Q [reg] + IPL_030_2_.Q [reg] + LDS_000.Q [reg] + RESET.Q [reg] + SIZE_0_.Q [reg] + SIZE_1_.Q [reg] + SM_AMIGA_0_.Q [reg] + SM_AMIGA_1_.Q [reg] + SM_AMIGA_2_.Q [reg] + SM_AMIGA_3_.Q [reg] + SM_AMIGA_4_.Q [reg] + SM_AMIGA_5_.Q [reg] + SM_AMIGA_6_.Q [reg] + SM_AMIGA_7_.Q [reg] + UDS_000.Q [reg] + VMA.Q [reg] + cpu_est_0_.Q [reg] + cpu_est_1_.Q [reg] + cpu_est_2_.Q [reg] + inst_AS_030_000_SYNC.Q [reg] + inst_BGACK_030_INT_D.Q [reg] + inst_CLK_000_D0.Q [reg] + inst_CLK_000_D1.Q [reg] + inst_CLK_000_D2.Q [reg] + inst_CLK_000_D3.Q [reg] + inst_CLK_000_D4.Q [reg] + inst_CLK_000_D5.Q [reg] + inst_CLK_000_D6.Q [reg] + inst_CLK_OUT_PRE.Q [reg] + inst_DTACK_SYNC.Q [reg] + inst_VPA_D.Q [reg] + inst_VPA_SYNC.Q [reg] + + +Section fMAX + + Maximum Operating Frequency: 105.26 MHz + Clock Source From: CLK_OSZI + Logic Levels: 1 + Path Delay: 9.5 ns + Path Expansion Source Destination + ============== ====== =========== + 3.0 tCOSi E.C E.Q + 0.0 E.Q cpu_est_1_.T + 6.5 tSST cpu_est_1_.T cpu_est_1_.C + + Clock Source From: CLK_OSZI + Delay Level Location(From => To) Source Destination Destination_Clock + ===== ===== ==================== ====== =========== ================= + 9.5 1 G4 => G12 E.C cpu_est_1_.T CLK_OSZI + 9.5 1 B9 => G12 cpu_est_0_.C cpu_est_1_.T CLK_OSZI + 9.5 1 G12 => G12 cpu_est_1_.C cpu_est_1_.T CLK_OSZI + 9.5 1 G5 => G12 cpu_est_2_.C cpu_est_1_.T CLK_OSZI + 9.5 1 F0 => G12 inst_CLK_000_D0.C cpu_est_1_.T CLK_OSZI + 9.5 1 H5 => G12 inst_CLK_000_D1.C cpu_est_1_.T CLK_OSZI + 8.5 1 G8 => G8 A0.C A0.D CLK_OSZI + 8.5 1 D5 => D5 AMIGA_BUS_ENABLE.C AMIGA_BUS_ENABLE.D CLK_OSZI + 8.5 1 D4 => D4 AS_000.C AS_000.D CLK_OSZI + 8.5 1 D4 => C4 AS_000.C SM_AMIGA_0_.D CLK_OSZI + 8.5 1 D4 => B5 AS_000.C SM_AMIGA_7_.D CLK_OSZI + 8.5 1 D4 => D1 AS_000.C VMA.D.X1 CLK_OSZI + 8.5 1 H8 => H8 AS_030.C AS_030.D CLK_OSZI + 8.5 1 H8 => A0 AS_030.C DS_030.D CLK_OSZI + 8.5 1 H4 => G8 BGACK_030.C A0.D CLK_OSZI + 8.5 1 H4 => D5 BGACK_030.C AMIGA_BUS_ENABLE.D CLK_OSZI + 8.5 1 H4 => H8 BGACK_030.C AS_030.D CLK_OSZI + 8.5 1 H4 => H4 BGACK_030.C BGACK_030.D CLK_OSZI + 8.5 1 H4 => A0 BGACK_030.C DS_030.D CLK_OSZI + 8.5 1 H4 => G0 BGACK_030.C SIZE_0_.D CLK_OSZI + 8.5 1 H4 => H0 BGACK_030.C SIZE_1_.D CLK_OSZI + 8.5 1 H4 => A12 BGACK_030.C inst_BGACK_030_INT_D.D CLK_OSZI + 8.5 1 D13 => D13 BG_000.C BG_000.D CLK_OSZI + 8.5 1 E1 => E1 CLK_CNT_N_0_.C CLK_CNT_N_0_.D CLK_OSZI + 8.5 1 E1 => G9 CLK_CNT_N_0_.C CLK_CNT_N_1_.D CLK_OSZI + 8.5 1 E1 => A1 CLK_CNT_N_0_.C inst_CLK_OUT_PRE.D CLK_OSZI + 8.5 1 G9 => E1 CLK_CNT_N_1_.C CLK_CNT_N_0_.D CLK_OSZI + 8.5 1 G9 => A1 CLK_CNT_N_1_.C inst_CLK_OUT_PRE.D CLK_OSZI + 8.5 1 F1 => F1 CLK_CNT_P_0_.C CLK_CNT_P_0_.D CLK_OSZI + 8.5 1 F1 => F9 CLK_CNT_P_0_.C CLK_CNT_P_1_.D CLK_OSZI + 8.5 1 F1 => A1 CLK_CNT_P_0_.C inst_CLK_OUT_PRE.D CLK_OSZI + 8.5 1 F9 => F1 CLK_CNT_P_1_.C CLK_CNT_P_0_.D CLK_OSZI + 8.5 1 F9 => A1 CLK_CNT_P_1_.C inst_CLK_OUT_PRE.D CLK_OSZI + 8.5 1 H12 => H12 DSACK_1_.C DSACK_1_.D CLK_OSZI + 8.5 1 A0 => A0 DS_030.C DS_030.D CLK_OSZI + 8.5 1 G4 => G4 E.C E.D.X1 CLK_OSZI + 8.5 1 G4 => G4 E.C E.D.X2 CLK_OSZI + 8.5 1 G4 => D1 E.C VMA.D.X1 CLK_OSZI + 8.5 1 G4 => G5 E.C cpu_est_2_.D.X1 CLK_OSZI + 8.5 1 G4 => C5 E.C inst_VPA_SYNC.D CLK_OSZI + 8.5 1 H1 => H1 FPU_CS.C FPU_CS.D CLK_OSZI + 8.5 1 B8 => B8 IPL_030_0_.C IPL_030_0_.D CLK_OSZI + 8.5 1 B12 => B12 IPL_030_1_.C IPL_030_1_.D CLK_OSZI + 8.5 1 B4 => B4 IPL_030_2_.C IPL_030_2_.D CLK_OSZI + 8.5 1 D8 => D8 LDS_000.C LDS_000.D CLK_OSZI + 8.5 1 G0 => G0 SIZE_0_.C SIZE_0_.D CLK_OSZI + 8.5 1 H0 => H0 SIZE_1_.C SIZE_1_.D CLK_OSZI + 8.5 1 C4 => D5 SM_AMIGA_0_.C AMIGA_BUS_ENABLE.D CLK_OSZI + 8.5 1 C4 => C4 SM_AMIGA_0_.C SM_AMIGA_0_.D CLK_OSZI + 8.5 1 C4 => B5 SM_AMIGA_0_.C SM_AMIGA_7_.D CLK_OSZI + 8.5 1 A8 => D5 SM_AMIGA_1_.C AMIGA_BUS_ENABLE.D CLK_OSZI + 8.5 1 A8 => H12 SM_AMIGA_1_.C DSACK_1_.D CLK_OSZI + 8.5 1 A8 => C4 SM_AMIGA_1_.C SM_AMIGA_0_.D CLK_OSZI + 8.5 1 A8 => A8 SM_AMIGA_1_.C SM_AMIGA_1_.D CLK_OSZI + 8.5 1 A8 => F12 SM_AMIGA_1_.C inst_AS_030_000_SYNC.D CLK_OSZI + 8.5 1 C8 => A8 SM_AMIGA_2_.C SM_AMIGA_1_.D CLK_OSZI + 8.5 1 C8 => C8 SM_AMIGA_2_.C SM_AMIGA_2_.D CLK_OSZI + 8.5 1 C1 => C8 SM_AMIGA_3_.C SM_AMIGA_2_.D CLK_OSZI + 8.5 1 C1 => C1 SM_AMIGA_3_.C SM_AMIGA_3_.D CLK_OSZI + 8.5 1 C1 => C9 SM_AMIGA_3_.C inst_DTACK_SYNC.D CLK_OSZI + 8.5 1 C1 => C5 SM_AMIGA_3_.C inst_VPA_SYNC.D CLK_OSZI + 8.5 1 F8 => D8 SM_AMIGA_4_.C LDS_000.D CLK_OSZI + 8.5 1 F8 => C1 SM_AMIGA_4_.C SM_AMIGA_3_.D CLK_OSZI + 8.5 1 F8 => F8 SM_AMIGA_4_.C SM_AMIGA_4_.D CLK_OSZI + 8.5 1 F8 => D12 SM_AMIGA_4_.C UDS_000.D CLK_OSZI + 8.5 1 F5 => D4 SM_AMIGA_5_.C AS_000.D CLK_OSZI + 8.5 1 F5 => D8 SM_AMIGA_5_.C LDS_000.D CLK_OSZI + 8.5 1 F5 => F8 SM_AMIGA_5_.C SM_AMIGA_4_.D CLK_OSZI + 8.5 1 F5 => F5 SM_AMIGA_5_.C SM_AMIGA_5_.D CLK_OSZI + 8.5 1 F5 => D12 SM_AMIGA_5_.C UDS_000.D CLK_OSZI + 8.5 1 B13 => D5 SM_AMIGA_6_.C AMIGA_BUS_ENABLE.D CLK_OSZI + 8.5 1 B13 => F5 SM_AMIGA_6_.C SM_AMIGA_5_.D CLK_OSZI + 8.5 1 B13 => B13 SM_AMIGA_6_.C SM_AMIGA_6_.D CLK_OSZI + 8.5 1 B13 => B5 SM_AMIGA_6_.C SM_AMIGA_7_.D CLK_OSZI + 8.5 1 B13 => F12 SM_AMIGA_6_.C inst_AS_030_000_SYNC.D CLK_OSZI + 8.5 1 B5 => D13 SM_AMIGA_7_.C BG_000.D CLK_OSZI + 8.5 1 B5 => B13 SM_AMIGA_7_.C SM_AMIGA_6_.D CLK_OSZI + 8.5 1 B5 => B5 SM_AMIGA_7_.C SM_AMIGA_7_.D CLK_OSZI + 8.5 1 B5 => F12 SM_AMIGA_7_.C inst_AS_030_000_SYNC.D CLK_OSZI + 8.5 1 D12 => D12 UDS_000.C UDS_000.D CLK_OSZI + 8.5 1 D1 => D1 VMA.C VMA.D.X1 CLK_OSZI + 8.5 1 D1 => D1 VMA.C VMA.D.X2 CLK_OSZI + 8.5 1 D1 => C5 VMA.C inst_VPA_SYNC.D CLK_OSZI + 8.5 1 B9 => G4 cpu_est_0_.C E.D.X1 CLK_OSZI + 8.5 1 B9 => D1 cpu_est_0_.C VMA.D.X1 CLK_OSZI + 8.5 1 B9 => D1 cpu_est_0_.C VMA.D.X2 CLK_OSZI + 8.5 1 B9 => B9 cpu_est_0_.C cpu_est_0_.D CLK_OSZI + 8.5 1 B9 => G5 cpu_est_0_.C cpu_est_2_.D.X1 CLK_OSZI + 8.5 1 G12 => G4 cpu_est_1_.C E.D.X1 CLK_OSZI + 8.5 1 G12 => D1 cpu_est_1_.C VMA.D.X1 CLK_OSZI + 8.5 1 G12 => D1 cpu_est_1_.C VMA.D.X2 CLK_OSZI + 8.5 1 G12 => G5 cpu_est_1_.C cpu_est_2_.D.X1 CLK_OSZI + 8.5 1 G12 => C5 cpu_est_1_.C inst_VPA_SYNC.D CLK_OSZI + 8.5 1 G5 => G4 cpu_est_2_.C E.D.X1 CLK_OSZI + 8.5 1 G5 => D1 cpu_est_2_.C VMA.D.X1 CLK_OSZI + 8.5 1 G5 => G5 cpu_est_2_.C cpu_est_2_.D.X1 CLK_OSZI + 8.5 1 G5 => G5 cpu_est_2_.C cpu_est_2_.D.X2 CLK_OSZI + 8.5 1 F12 => B13 inst_AS_030_000_SYNC.C SM_AMIGA_6_.D CLK_OSZI + 8.5 1 F12 => B5 inst_AS_030_000_SYNC.C SM_AMIGA_7_.D CLK_OSZI + 8.5 1 F12 => F12 inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.D CLK_OSZI + 8.5 1 A12 => G8 inst_BGACK_030_INT_D.C A0.D CLK_OSZI + 8.5 1 A12 => D5 inst_BGACK_030_INT_D.C AMIGA_BUS_ENABLE.D CLK_OSZI + 8.5 1 A12 => H8 inst_BGACK_030_INT_D.C AS_030.D CLK_OSZI + 8.5 1 A12 => A0 inst_BGACK_030_INT_D.C DS_030.D CLK_OSZI + 8.5 1 A12 => G0 inst_BGACK_030_INT_D.C SIZE_0_.D CLK_OSZI + 8.5 1 A12 => H0 inst_BGACK_030_INT_D.C SIZE_1_.D CLK_OSZI + 8.5 1 F0 => H4 inst_CLK_000_D0.C BGACK_030.D CLK_OSZI + 8.5 1 F0 => G4 inst_CLK_000_D0.C E.D.X1 CLK_OSZI + 8.5 1 F0 => B8 inst_CLK_000_D0.C IPL_030_0_.D CLK_OSZI + 8.5 1 F0 => B12 inst_CLK_000_D0.C IPL_030_1_.D CLK_OSZI + 8.5 1 F0 => B4 inst_CLK_000_D0.C IPL_030_2_.D CLK_OSZI + 8.5 1 F0 => C4 inst_CLK_000_D0.C SM_AMIGA_0_.D CLK_OSZI + 8.5 1 F0 => A8 inst_CLK_000_D0.C SM_AMIGA_1_.D CLK_OSZI + 8.5 1 F0 => C8 inst_CLK_000_D0.C SM_AMIGA_2_.D CLK_OSZI + 8.5 1 F0 => C1 inst_CLK_000_D0.C SM_AMIGA_3_.D CLK_OSZI + 8.5 1 F0 => F8 inst_CLK_000_D0.C SM_AMIGA_4_.D CLK_OSZI + 8.5 1 F0 => F5 inst_CLK_000_D0.C SM_AMIGA_5_.D CLK_OSZI + 8.5 1 F0 => B13 inst_CLK_000_D0.C SM_AMIGA_6_.D CLK_OSZI + 8.5 1 F0 => B5 inst_CLK_000_D0.C SM_AMIGA_7_.D CLK_OSZI + 8.5 1 F0 => B9 inst_CLK_000_D0.C cpu_est_0_.D CLK_OSZI + 8.5 1 F0 => G5 inst_CLK_000_D0.C cpu_est_2_.D.X1 CLK_OSZI + 8.5 1 F0 => H5 inst_CLK_000_D0.C inst_CLK_000_D1.D CLK_OSZI + 8.5 1 F0 => C9 inst_CLK_000_D0.C inst_DTACK_SYNC.D CLK_OSZI + 8.5 1 F0 => C5 inst_CLK_000_D0.C inst_VPA_SYNC.D CLK_OSZI + 8.5 1 H5 => H4 inst_CLK_000_D1.C BGACK_030.D CLK_OSZI + 8.5 1 H5 => G4 inst_CLK_000_D1.C E.D.X1 CLK_OSZI + 8.5 1 H5 => B8 inst_CLK_000_D1.C IPL_030_0_.D CLK_OSZI + 8.5 1 H5 => B12 inst_CLK_000_D1.C IPL_030_1_.D CLK_OSZI + 8.5 1 H5 => B4 inst_CLK_000_D1.C IPL_030_2_.D CLK_OSZI + 8.5 1 H5 => D1 inst_CLK_000_D1.C VMA.D.X1 CLK_OSZI + 8.5 1 H5 => D1 inst_CLK_000_D1.C VMA.D.X2 CLK_OSZI + 8.5 1 H5 => B9 inst_CLK_000_D1.C cpu_est_0_.D CLK_OSZI + 8.5 1 H5 => G5 inst_CLK_000_D1.C cpu_est_2_.D.X1 CLK_OSZI + 8.5 1 H5 => E5 inst_CLK_000_D1.C inst_CLK_000_D2.D CLK_OSZI + 8.5 1 E5 => B13 inst_CLK_000_D2.C SM_AMIGA_6_.D CLK_OSZI + 8.5 1 E5 => B5 inst_CLK_000_D2.C SM_AMIGA_7_.D CLK_OSZI + 8.5 1 E5 => D1 inst_CLK_000_D2.C VMA.D.X1 CLK_OSZI + 8.5 1 E5 => A5 inst_CLK_000_D2.C inst_CLK_000_D3.D CLK_OSZI + 8.5 1 A5 => B13 inst_CLK_000_D3.C SM_AMIGA_6_.D CLK_OSZI + 8.5 1 A5 => B5 inst_CLK_000_D3.C SM_AMIGA_7_.D CLK_OSZI + 8.5 1 A5 => A9 inst_CLK_000_D3.C inst_CLK_000_D4.D CLK_OSZI + 8.5 1 A9 => E8 inst_CLK_000_D4.C inst_CLK_000_D5.D CLK_OSZI + 8.5 1 E8 => H12 inst_CLK_000_D5.C DSACK_1_.D CLK_OSZI + 8.5 1 E8 => C4 inst_CLK_000_D5.C SM_AMIGA_0_.D CLK_OSZI + 8.5 1 E8 => A8 inst_CLK_000_D5.C SM_AMIGA_1_.D CLK_OSZI + 8.5 1 E8 => F12 inst_CLK_000_D5.C inst_AS_030_000_SYNC.D CLK_OSZI + 8.5 1 E8 => F4 inst_CLK_000_D5.C inst_CLK_000_D6.D CLK_OSZI + 8.5 1 F4 => H12 inst_CLK_000_D6.C DSACK_1_.D CLK_OSZI + 8.5 1 F4 => C4 inst_CLK_000_D6.C SM_AMIGA_0_.D CLK_OSZI + 8.5 1 F4 => A8 inst_CLK_000_D6.C SM_AMIGA_1_.D CLK_OSZI + 8.5 1 F4 => F12 inst_CLK_000_D6.C inst_AS_030_000_SYNC.D CLK_OSZI + 8.5 1 A1 => G1 inst_CLK_OUT_PRE.C CLK_DIV_OUT.D CLK_OSZI + 8.5 1 A1 => B0 inst_CLK_OUT_PRE.C CLK_EXP.D CLK_OSZI + 8.5 1 C9 => C8 inst_DTACK_SYNC.C SM_AMIGA_2_.D CLK_OSZI + 8.5 1 C9 => C1 inst_DTACK_SYNC.C SM_AMIGA_3_.D CLK_OSZI + 8.5 1 C9 => C9 inst_DTACK_SYNC.C inst_DTACK_SYNC.D CLK_OSZI + 8.5 1 E9 => D1 inst_VPA_D.C VMA.D.X2 CLK_OSZI + 8.5 1 E9 => C9 inst_VPA_D.C inst_DTACK_SYNC.D CLK_OSZI + 8.5 1 E9 => C5 inst_VPA_D.C inst_VPA_SYNC.D CLK_OSZI + 8.5 1 C5 => C8 inst_VPA_SYNC.C SM_AMIGA_2_.D CLK_OSZI + 8.5 1 C5 => C1 inst_VPA_SYNC.C SM_AMIGA_3_.D CLK_OSZI + 8.5 1 C5 => C5 inst_VPA_SYNC.C inst_VPA_SYNC.D CLK_OSZI + + +Section tSU + + tSU, tHD Level Location(From => To) Source Destination Reference_Clock + =========== ===== ==================== ====== =========== =============== + 5.5, 0.0 1 p69 => D8 A0 LDS_000.D CLK_OSZI + 5.5, 0.0 1 p69 => D12 A0 UDS_000.D CLK_OSZI + 5.5, 0.0 1 p33 => G8 AS_000 A0.D CLK_OSZI + 5.5, 0.0 1 p33 => H8 AS_000 AS_030.D CLK_OSZI + 5.5, 0.0 1 p33 => A0 AS_000 DS_030.D CLK_OSZI + 5.5, 0.0 1 p33 => G0 AS_000 SIZE_0_.D CLK_OSZI + 5.5, 0.0 1 p33 => H0 AS_000 SIZE_1_.D CLK_OSZI + 5.5, 0.0 1 p82 => D5 AS_030 AMIGA_BUS_ENABLE.D CLK_OSZI + 5.5, 0.0 1 p82 => D4 AS_030 AS_000.D CLK_OSZI + 5.5, 0.0 1 p82 => D13 AS_030 BG_000.D CLK_OSZI + 5.5, 0.0 1 p82 => H12 AS_030 DSACK_1_.D CLK_OSZI + 5.5, 0.0 1 p82 => H1 AS_030 FPU_CS.D CLK_OSZI + 5.5, 0.0 1 p82 => D8 AS_030 LDS_000.D CLK_OSZI + 5.5, 0.0 1 p82 => D12 AS_030 UDS_000.D CLK_OSZI + 5.5, 0.0 1 p82 => F12 AS_030 inst_AS_030_000_SYNC.D CLK_OSZI + 5.5, 0.0 1 p82 => C9 AS_030 inst_DTACK_SYNC.D CLK_OSZI + 5.5, 0.0 1 p82 => C5 AS_030 inst_VPA_SYNC.D CLK_OSZI + 5.5, 0.0 1 p96 => H1 A[16] FPU_CS.D CLK_OSZI + 5.5, 0.0 1 p96 => F12 A[16] inst_AS_030_000_SYNC.D CLK_OSZI + 5.5, 0.0 1 p59 => H1 A[17] FPU_CS.D CLK_OSZI + 5.5, 0.0 1 p59 => F12 A[17] inst_AS_030_000_SYNC.D CLK_OSZI + 5.5, 0.0 1 p95 => H1 A[18] FPU_CS.D CLK_OSZI + 5.5, 0.0 1 p95 => F12 A[18] inst_AS_030_000_SYNC.D CLK_OSZI + 5.5, 0.0 1 p97 => H1 A[19] FPU_CS.D CLK_OSZI + 5.5, 0.0 1 p97 => F12 A[19] inst_AS_030_000_SYNC.D CLK_OSZI + 5.5, 0.0 1 p28 => H4 BGACK_000 BGACK_030.D CLK_OSZI + 5.5, 0.0 1 p28 => H1 BGACK_000 FPU_CS.D CLK_OSZI + 5.5, 0.0 1 p28 => F12 BGACK_000 inst_AS_030_000_SYNC.D CLK_OSZI + 5.5, 0.0 1 p21 => D13 BG_030 BG_000.D CLK_OSZI + 5.5, 0.0 1 p11 => D13 CLK_000 BG_000.D CLK_OSZI + 5.5, 0.0 1 p11 => F0 CLK_000 inst_CLK_000_D0.D CLK_OSZI + 5.5, 0.0 1 p64 => G8 CLK_030 A0.D CLK_OSZI + 5.5, 0.0 1 p64 => H8 CLK_030 AS_030.D CLK_OSZI + 5.5, 0.0 1 p64 => A0 CLK_030 DS_030.D CLK_OSZI + 5.5, 0.0 1 p64 => H1 CLK_030 FPU_CS.D CLK_OSZI + 5.5, 0.0 1 p64 => G0 CLK_030 SIZE_0_.D CLK_OSZI + 5.5, 0.0 1 p64 => H0 CLK_030 SIZE_1_.D CLK_OSZI + 5.5, 0.0 1 p64 => F12 CLK_030 inst_AS_030_000_SYNC.D CLK_OSZI + 5.5, 0.0 1 p98 => D8 DS_030 LDS_000.D CLK_OSZI + 5.5, 0.0 1 p98 => D12 DS_030 UDS_000.D CLK_OSZI + 5.5, 0.0 1 p30 => C9 DTACK inst_DTACK_SYNC.D CLK_OSZI + 5.5, 0.0 1 p57 => H1 FC[0] FPU_CS.D CLK_OSZI + 5.5, 0.0 1 p57 => F12 FC[0] inst_AS_030_000_SYNC.D CLK_OSZI + 5.5, 0.0 1 p58 => H1 FC[1] FPU_CS.D CLK_OSZI + 5.5, 0.0 1 p58 => F12 FC[1] inst_AS_030_000_SYNC.D CLK_OSZI + 5.5, 0.0 1 p67 => B8 IPL[0] IPL_030_0_.D CLK_OSZI + 5.5, 0.0 1 p56 => B12 IPL[1] IPL_030_1_.D CLK_OSZI + 5.5, 0.0 1 p68 => B4 IPL[2] IPL_030_2_.D CLK_OSZI + 5.5, 0.0 1 p31 => G8 LDS_000 A0.D CLK_OSZI + 5.5, 0.0 1 p31 => H8 LDS_000 AS_030.D CLK_OSZI + 5.5, 0.0 1 p31 => A0 LDS_000 DS_030.D CLK_OSZI + 5.5, 0.0 1 p31 => G0 LDS_000 SIZE_0_.D CLK_OSZI + 5.5, 0.0 1 p31 => H0 LDS_000 SIZE_1_.D CLK_OSZI + 5.5, 0.0 1 p71 => A0 RW DS_030.D CLK_OSZI + 5.5, 0.0 1 p71 => D8 RW LDS_000.D CLK_OSZI + 5.5, 0.0 1 p71 => D12 RW UDS_000.D CLK_OSZI + 5.5, 0.0 1 p70 => D8 SIZE[0] LDS_000.D CLK_OSZI + 5.5, 0.0 1 p79 => D8 SIZE[1] LDS_000.D CLK_OSZI + 5.5, 0.0 1 p32 => G8 UDS_000 A0.D CLK_OSZI + 5.5, 0.0 1 p32 => H8 UDS_000 AS_030.D CLK_OSZI + 5.5, 0.0 1 p32 => A0 UDS_000 DS_030.D CLK_OSZI + 5.5, 0.0 1 p32 => G0 UDS_000 SIZE_0_.D CLK_OSZI + 5.5, 0.0 1 p32 => H0 UDS_000 SIZE_1_.D CLK_OSZI + 5.5, 0.0 1 p36 => E9 VPA inst_VPA_D.D CLK_OSZI + 5.5, 0.0 1 p14 => D5 nEXP_SPACE AMIGA_BUS_ENABLE.D CLK_OSZI + 5.5, 0.0 1 p14 => D13 nEXP_SPACE BG_000.D CLK_OSZI + 5.5, 0.0 1 p14 => B13 nEXP_SPACE SM_AMIGA_6_.D CLK_OSZI + 5.5, 0.0 1 p14 => B5 nEXP_SPACE SM_AMIGA_7_.D CLK_OSZI + 5.5, 0.0 1 p14 => F12 nEXP_SPACE inst_AS_030_000_SYNC.D CLK_OSZI + + +Section tPD + + Delay Level Location(From => To) Source Destination + ===== ===== ==================== ====== =========== + 10.0 1 p93 => p47 A[20] CIIN + 10.0 1 p94 => p47 A[21] CIIN + 10.0 1 p85 => p47 A[22] CIIN + 10.0 1 p84 => p47 A[23] CIIN + 10.0 1 p81 => p30 DSACK[1] DTACK + 10.0 1 p71 => p48 RW AMIGA_BUS_DATA_DIR + 10.0 1 p14 => p48 nEXP_SPACE AMIGA_BUS_DATA_DIR + + +Section tCO + + tCO Level Location(From => To) Source Destination Register_Clock + === ===== ==================== ====== =========== ============== + 13.0 2 p61 => p48 CLK_OSZI AMIGA_BUS_DATA_DIR BGACK_030.C + 6.0 1 p61 => p69 CLK_OSZI A0 A0.C + 6.0 1 p61 => p34 CLK_OSZI AMIGA_BUS_ENABLE AMIGA_BUS_ENABLE.C + 6.0 1 p61 => p33 CLK_OSZI AS_000 AS_000.C + 6.0 1 p61 => p82 CLK_OSZI AS_030 AS_030.C + 6.0 1 p61 => p83 CLK_OSZI BGACK_030 BGACK_030.C + 6.0 1 p61 => p29 CLK_OSZI BG_000 BG_000.C + 6.0 1 p61 => p65 CLK_OSZI CLK_DIV_OUT CLK_DIV_OUT.C + 6.0 1 p61 => p10 CLK_OSZI CLK_EXP CLK_EXP.C + 6.0 1 p61 => p81 CLK_OSZI DSACK[1] DSACK_1_.C + 6.0 1 p61 => p98 CLK_OSZI DS_030 DS_030.C + 6.0 1 p61 => p66 CLK_OSZI E E.C + 6.0 1 p61 => p78 CLK_OSZI FPU_CS FPU_CS.C + 6.0 1 p61 => p8 CLK_OSZI IPL_030[0] IPL_030_0_.C + 6.0 1 p61 => p7 CLK_OSZI IPL_030[1] IPL_030_1_.C + 6.0 1 p61 => p9 CLK_OSZI IPL_030[2] IPL_030_2_.C + 6.0 1 p61 => p31 CLK_OSZI LDS_000 LDS_000.C + 6.0 1 p61 => p3 CLK_OSZI RESET RESET.C + 6.0 1 p61 => p70 CLK_OSZI SIZE[0] SIZE_0_.C + 6.0 1 p61 => p79 CLK_OSZI SIZE[1] SIZE_1_.C + 6.0 1 p61 => p32 CLK_OSZI UDS_000 UDS_000.C + 6.0 1 p61 => p35 CLK_OSZI VMA VMA.C diff --git a/Logic/68030_tk.tt2 b/Logic/68030_tk.tt2 index 858afac..3a70ff5 100644 --- a/Logic/68030_tk.tt2 +++ b/Logic/68030_tk.tt2 @@ -1,374 +1,394 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Sat May 24 21:59:14 2014 +#$ DATE Sun May 25 20:57:52 2014 #$ MODULE 68030_tk -#$ PINS 59 IPL_1_ IPL_0_ A_31_ DSACK_0_ FC_0_ IPL_2_ FC_1_ nEXP_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT DTACK AVEC AVEC_EXP VPA RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ IPL_030_1_ IPL_030_0_ SIZE_1_ IPL_030_2_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 BG_000 BGACK_030 CLK_EXP FPU_CS E VMA RESET AMIGA_BUS_ENABLE SIZE_0_ -#$ NODES 27 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_DTACK_SYNC inst_VPA_SYNC inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D6 SM_AMIGA_5_ SM_AMIGA_6_ inst_CLK_000_D3 inst_CLK_000_D5 SM_AMIGA_3_ SM_AMIGA_0_ SM_AMIGA_1_ CLK_CNT_N_0_ CLK_CNT_N_1_ CLK_CNT_P_0_ CLK_CNT_P_1_ inst_CLK_000_D4 SM_AMIGA_7_ SM_AMIGA_4_ inst_CLK_OUT_PRE SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ cpu_est_2_ +#$ PINS 59 A_31_ IPL_2_ FC_1_ A_30_ A_29_ A_28_ A_27_ A_26_ nEXP_SPACE A_25_ BERR A_24_ BG_030 A_23_ A_22_ A_21_ BGACK_000 A_20_ CLK_030 A_19_ CLK_000 A_18_ CLK_OSZI A_17_ CLK_DIV_OUT A_16_ DTACK IPL_1_ AVEC IPL_0_ AVEC_EXP DSACK_0_ FC_0_ VPA RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_1_ IPL_030_2_ DSACK_1_ AS_030 SIZE_0_ AS_000 DS_030 UDS_000 LDS_000 A0 BG_000 BGACK_030 CLK_EXP IPL_030_1_ FPU_CS IPL_030_0_ E VMA RESET AMIGA_BUS_ENABLE +#$ NODES 25 inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_SYNC inst_VPA_D inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D6 inst_CLK_OUT_PRE inst_BGACK_030_INT_D CLK_CNT_P_0_ SM_AMIGA_5_ SM_AMIGA_7_ SM_AMIGA_1_ SM_AMIGA_0_ SM_AMIGA_6_ inst_CLK_000_D3 inst_CLK_000_D5 SM_AMIGA_3_ inst_CLK_000_D4 SM_AMIGA_4_ SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ cpu_est_2_ .type fr -.i 85 -.o 166 -.ilb A_31_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BG_000.Q BGACK_030.Q FPU_CS.Q VMA.Q inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_DTACK_SYNC.Q inst_VPA_SYNC.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q inst_CLK_000_D6.Q SM_AMIGA_5_.Q IPL_030_0_.Q IPL_030_1_.Q AS_000.Q SM_AMIGA_6_.Q IPL_030_2_.Q UDS_000.Q LDS_000.Q DSACK_1_.Q inst_CLK_000_D3.Q inst_CLK_000_D5.Q SM_AMIGA_3_.Q SM_AMIGA_0_.Q SM_AMIGA_1_.Q AS_030.Q DS_030.Q SIZE_0_.Q SIZE_1_.Q A0.Q CLK_CNT_N_0_.Q CLK_CNT_N_1_.Q CLK_CNT_P_0_.Q CLK_CNT_P_1_.Q inst_CLK_000_D4.Q SM_AMIGA_7_.Q SM_AMIGA_4_.Q inst_CLK_OUT_PRE.Q SM_AMIGA_2_.Q AMIGA_BUS_ENABLE.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q E.Q AS_030.PIN AS_000.PIN DS_030.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN A0.PIN DSACK_1_.PIN DTACK.PIN -.ob BERR AVEC AVEC_EXP AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.C cpu_est_2_.AR E.C E.AR cpu_est_0_.C cpu_est_0_.AR SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.C SM_AMIGA_0_.AR CLK_CNT_P_1_.C CLK_CNT_P_1_.AR SIZE_0_.C SIZE_0_.AP SIZE_1_.C SIZE_1_.AP IPL_030_0_.C IPL_030_0_.AP IPL_030_1_.C IPL_030_1_.AP IPL_030_2_.C IPL_030_2_.AP SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.C SM_AMIGA_5_.AR inst_VPA_SYNC.C inst_VPA_SYNC.AP DSACK_1_.C DSACK_1_.AP VMA.C VMA.AP BGACK_030.C BGACK_030.AP CLK_CNT_N_0_.C CLK_CNT_N_0_.AR CLK_CNT_N_1_.C CLK_CNT_N_1_.AP CLK_CNT_P_0_.C CLK_CNT_P_0_.AR LDS_000.C LDS_000.AP inst_DTACK_SYNC.C inst_DTACK_SYNC.AP A0.C A0.AP BG_000.C BG_000.AP AS_030.C AS_030.AP AMIGA_BUS_ENABLE.C AMIGA_BUS_ENABLE.AP AS_000.C AS_000.AP inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP DS_030.C DS_030.AP FPU_CS.C FPU_CS.AP UDS_000.C UDS_000.AP CLK_EXP.C CLK_EXP.AR inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR inst_CLK_000_D5.C inst_CLK_000_D5.AP inst_CLK_000_D6.C inst_CLK_000_D6.AP inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D3.C inst_CLK_000_D3.AP inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP inst_CLK_000_D0.C inst_CLK_000_D0.AP RESET.C RESET.AR inst_CLK_000_D1.C inst_CLK_000_D1.AP DTACK DSACK_0_ AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_DIV_OUT.AR CLK_DIV_OUT.C CLK_DIV_OUT.D BG_000.D BGACK_030.D FPU_CS.D VMA.D inst_AS_030_000_SYNC.D inst_BGACK_030_INT_D.D inst_DTACK_SYNC.D inst_VPA_SYNC.D inst_CLK_000_D0.D inst_CLK_000_D1.D CLK_EXP.D inst_CLK_000_D2.D inst_CLK_000_D6.D SM_AMIGA_5_.D IPL_030_0_.D IPL_030_1_.D AS_000.D SM_AMIGA_6_.D IPL_030_2_.D UDS_000.D LDS_000.D DSACK_1_.D inst_CLK_000_D3.D inst_CLK_000_D5.D SM_AMIGA_3_.D SM_AMIGA_0_.D SM_AMIGA_1_.D AS_030.D DS_030.D SIZE_0_.D SIZE_1_.D A0.D CLK_CNT_N_0_.D CLK_CNT_N_1_.D CLK_CNT_P_0_.D CLK_CNT_P_1_.D inst_CLK_000_D4.D RESET.D SM_AMIGA_7_.D SM_AMIGA_4_.D inst_CLK_OUT_PRE.D SM_AMIGA_2_.D AMIGA_BUS_ENABLE.D cpu_est_0_.D cpu_est_1_.T cpu_est_2_.D E.D -.p 362 -------------------------------------------------------------------------------------- ~1~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ ----1--------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----1-------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------1----------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------1---------------------------------------------------------------------------- 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------0----------------------------------------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ -------0------------------------0--------------------------------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ -------0----1-------------------0--------------------------------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ -------0------------------------0------------------------0-------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ --------------------------------0-----------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ -------0------------------------0--------------------------------------------0-01----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ -------0------------------------0--------------------------------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ -------0----1-------------------0--------------------------------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ -------0------------------------0------------------------0-------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ -------0------------------------0--------------------------------------------0-10----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ -------0------------------------0--------------------------------------------0-00----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ ------------1------------------------------1----------------------------------0--0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0-------------------------------------------------------1---------0--0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------1----------------------------------0---1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0-------------------------------------------------------1---------0---1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------1----------------------------------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0-------------------------------------------------------1---------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------1----------------------------------0----0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0-------------------------------------------------------1---------0----0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------1----------------------------1--------------1------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +.i 83 +.o 160 +.ilb A_31_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BGACK_030.Q BG_000.Q FPU_CS.Q VMA.Q inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_SYNC.Q inst_VPA_D.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q inst_CLK_000_D6.Q inst_CLK_OUT_PRE.Q inst_BGACK_030_INT_D.Q CLK_CNT_P_0_.Q IPL_030_0_.Q SM_AMIGA_5_.Q SM_AMIGA_7_.Q IPL_030_1_.Q SM_AMIGA_1_.Q IPL_030_2_.Q SM_AMIGA_0_.Q SM_AMIGA_6_.Q AS_030.Q AS_000.Q UDS_000.Q LDS_000.Q DSACK_1_.Q inst_CLK_000_D3.Q inst_CLK_000_D5.Q SM_AMIGA_3_.Q DS_030.Q SIZE_0_.Q SIZE_1_.Q A0.Q inst_CLK_000_D4.Q SM_AMIGA_4_.Q SM_AMIGA_2_.Q AMIGA_BUS_ENABLE.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q E.Q AS_030.PIN AS_000.PIN DS_030.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN A0.PIN DSACK_1_.PIN DTACK.PIN +.ob BERR AVEC AVEC_EXP AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN cpu_est_0_.C cpu_est_0_.AR cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.C cpu_est_2_.AR E.C E.AR IPL_030_0_.C IPL_030_0_.AP IPL_030_1_.C IPL_030_1_.AP IPL_030_2_.C IPL_030_2_.AP SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.C SM_AMIGA_0_.AR inst_VPA_SYNC.C inst_VPA_SYNC.AP VMA.C VMA.AP BGACK_030.C BGACK_030.AP inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR SIZE_0_.C SIZE_0_.AP SIZE_1_.C SIZE_1_.AP FPU_CS.C FPU_CS.AP inst_DTACK_SYNC.C inst_DTACK_SYNC.AP A0.C A0.AP BG_000.C BG_000.AP DSACK_1_.C DSACK_1_.AP AS_030.C AS_030.AP AS_000.C AS_000.AP AMIGA_BUS_ENABLE.C AMIGA_BUS_ENABLE.AP UDS_000.C UDS_000.AP LDS_000.C LDS_000.AP inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP DS_030.C DS_030.AP inst_CLK_000_D5.C inst_CLK_000_D5.AP inst_CLK_000_D6.C inst_CLK_000_D6.AP inst_CLK_000_D4.C inst_CLK_000_D4.AP CLK_CNT_P_0_.C CLK_CNT_P_0_.AR inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D3.C inst_CLK_000_D3.AP CLK_EXP.C CLK_EXP.AR inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP inst_CLK_000_D0.C inst_CLK_000_D0.AP inst_VPA_D.C inst_VPA_D.AP RESET.C RESET.AR inst_CLK_000_D1.C inst_CLK_000_D1.AP DTACK DSACK_0_ AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_DIV_OUT.AR CLK_DIV_OUT.C CLK_DIV_OUT.D BGACK_030.D BG_000.D FPU_CS.D VMA.D inst_AS_030_000_SYNC.D inst_DTACK_SYNC.D inst_VPA_SYNC.D inst_VPA_D.D inst_CLK_000_D0.D inst_CLK_000_D1.D inst_CLK_000_D2.D inst_CLK_000_D6.D inst_CLK_OUT_PRE.D inst_BGACK_030_INT_D.D CLK_EXP.D CLK_CNT_P_0_.D IPL_030_0_.D SM_AMIGA_5_.D SM_AMIGA_7_.D IPL_030_1_.D SM_AMIGA_1_.D IPL_030_2_.D SM_AMIGA_0_.D SM_AMIGA_6_.D AS_030.D AS_000.D UDS_000.D LDS_000.D DSACK_1_.D inst_CLK_000_D3.D inst_CLK_000_D5.D SM_AMIGA_3_.D DS_030.D SIZE_0_.D SIZE_1_.D A0.D inst_CLK_000_D4.D SM_AMIGA_4_.D SM_AMIGA_2_.D RESET.D AMIGA_BUS_ENABLE.D cpu_est_0_.D cpu_est_1_.T cpu_est_2_.D E.D +.p 382 +----------------------------------------------------------------------------------- ~1~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +---1------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------1--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------1-------------------------------------------------------------------------- ~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------0------------------------------------------------------------------------ ~~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +0-----------0000000---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------1111------------------------------------------------------------ ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~11~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----1------------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0------------------1---------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1-----------------------0---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~111~~~~~~~~~~ +---0-------1------------------0---------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0---------------------------1--------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------0-----------------------1--------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--0-----------------------------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----0--------------------------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0-------------------------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1--------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1-------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------0------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1-----1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------0--1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------0-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0------------------------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0---------------------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 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+------0----1------------------0-------------------------------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +------0-----------------------0----------------------0--------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +------------------------------0----------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +------0-----------------------0-------------------------------------------0-01----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ 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+------0-----------------------0-------------------------------------------0-00----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +-----------1------------------1---------------1----------------------------0--0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------0------------------1-----------------------------------1--------0--0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1------------------1---------------1----------------------------0---1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------0------------------1-----------------------------------1--------0---1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1------------------1---------------1----------------------------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------0------------------1-----------------------------------1--------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1------------------1---------------1----------------------------0----0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------0------------------1-----------------------------------1--------0----0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1------11---------------------1---------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ .end diff --git a/Logic/68030_tk.tt3 b/Logic/68030_tk.tt3 index 39482c9..b90f0c5 100644 --- a/Logic/68030_tk.tt3 +++ b/Logic/68030_tk.tt3 @@ -1,374 +1,394 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Sat May 24 21:59:14 2014 +#$ DATE Sun May 25 20:57:52 2014 #$ MODULE 68030_tk -#$ PINS 59 IPL_1_ IPL_0_ A_31_ DSACK_0_ FC_0_ IPL_2_ FC_1_ nEXP_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT DTACK AVEC AVEC_EXP VPA RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ IPL_030_1_ IPL_030_0_ SIZE_1_ IPL_030_2_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 BG_000 BGACK_030 CLK_EXP FPU_CS E VMA RESET AMIGA_BUS_ENABLE SIZE_0_ -#$ NODES 27 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_DTACK_SYNC inst_VPA_SYNC inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D6 SM_AMIGA_5_ SM_AMIGA_6_ inst_CLK_000_D3 inst_CLK_000_D5 SM_AMIGA_3_ SM_AMIGA_0_ SM_AMIGA_1_ CLK_CNT_N_0_ CLK_CNT_N_1_ CLK_CNT_P_0_ CLK_CNT_P_1_ inst_CLK_000_D4 SM_AMIGA_7_ SM_AMIGA_4_ inst_CLK_OUT_PRE SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ cpu_est_2_ +#$ PINS 59 A_31_ IPL_2_ FC_1_ A_30_ A_29_ A_28_ A_27_ A_26_ nEXP_SPACE A_25_ BERR A_24_ BG_030 A_23_ A_22_ A_21_ BGACK_000 A_20_ CLK_030 A_19_ CLK_000 A_18_ CLK_OSZI A_17_ CLK_DIV_OUT A_16_ DTACK IPL_1_ AVEC IPL_0_ AVEC_EXP DSACK_0_ FC_0_ VPA RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_1_ IPL_030_2_ DSACK_1_ AS_030 SIZE_0_ AS_000 DS_030 UDS_000 LDS_000 A0 BG_000 BGACK_030 CLK_EXP IPL_030_1_ FPU_CS IPL_030_0_ E VMA RESET AMIGA_BUS_ENABLE +#$ NODES 25 inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_SYNC inst_VPA_D inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D6 inst_CLK_OUT_PRE inst_BGACK_030_INT_D CLK_CNT_P_0_ SM_AMIGA_5_ SM_AMIGA_7_ SM_AMIGA_1_ SM_AMIGA_0_ SM_AMIGA_6_ inst_CLK_000_D3 inst_CLK_000_D5 SM_AMIGA_3_ inst_CLK_000_D4 SM_AMIGA_4_ SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ cpu_est_2_ .type fr -.i 85 -.o 166 -.ilb A_31_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BG_000.Q BGACK_030.Q FPU_CS.Q VMA.Q inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_DTACK_SYNC.Q inst_VPA_SYNC.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q inst_CLK_000_D6.Q SM_AMIGA_5_.Q IPL_030_0_.Q IPL_030_1_.Q AS_000.Q SM_AMIGA_6_.Q IPL_030_2_.Q UDS_000.Q LDS_000.Q DSACK_1_.Q inst_CLK_000_D3.Q inst_CLK_000_D5.Q SM_AMIGA_3_.Q SM_AMIGA_0_.Q SM_AMIGA_1_.Q AS_030.Q DS_030.Q SIZE_0_.Q SIZE_1_.Q A0.Q CLK_CNT_N_0_.Q CLK_CNT_N_1_.Q CLK_CNT_P_0_.Q CLK_CNT_P_1_.Q inst_CLK_000_D4.Q SM_AMIGA_7_.Q SM_AMIGA_4_.Q inst_CLK_OUT_PRE.Q SM_AMIGA_2_.Q AMIGA_BUS_ENABLE.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q E.Q AS_030.PIN AS_000.PIN DS_030.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN A0.PIN DSACK_1_.PIN DTACK.PIN -.ob BERR AVEC AVEC_EXP AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.C cpu_est_2_.AR E.C E.AR cpu_est_0_.C cpu_est_0_.AR SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.C SM_AMIGA_0_.AR CLK_CNT_P_1_.C CLK_CNT_P_1_.AR SIZE_0_.C SIZE_0_.AP SIZE_1_.C SIZE_1_.AP IPL_030_0_.C IPL_030_0_.AP IPL_030_1_.C IPL_030_1_.AP IPL_030_2_.C IPL_030_2_.AP SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.C SM_AMIGA_5_.AR inst_VPA_SYNC.C inst_VPA_SYNC.AP DSACK_1_.C DSACK_1_.AP VMA.C VMA.AP BGACK_030.C BGACK_030.AP CLK_CNT_N_0_.C CLK_CNT_N_0_.AR CLK_CNT_N_1_.C CLK_CNT_N_1_.AP CLK_CNT_P_0_.C CLK_CNT_P_0_.AR LDS_000.C LDS_000.AP inst_DTACK_SYNC.C inst_DTACK_SYNC.AP A0.C A0.AP BG_000.C BG_000.AP AS_030.C AS_030.AP AMIGA_BUS_ENABLE.C AMIGA_BUS_ENABLE.AP AS_000.C AS_000.AP inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP DS_030.C DS_030.AP FPU_CS.C FPU_CS.AP UDS_000.C UDS_000.AP CLK_EXP.C CLK_EXP.AR inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR inst_CLK_000_D5.C inst_CLK_000_D5.AP inst_CLK_000_D6.C inst_CLK_000_D6.AP inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D3.C inst_CLK_000_D3.AP inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP inst_CLK_000_D0.C inst_CLK_000_D0.AP RESET.C RESET.AR inst_CLK_000_D1.C inst_CLK_000_D1.AP DTACK DSACK_0_ AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_DIV_OUT.AR CLK_DIV_OUT.C CLK_DIV_OUT.D BG_000.D BGACK_030.D FPU_CS.D VMA.D inst_AS_030_000_SYNC.D inst_BGACK_030_INT_D.D inst_DTACK_SYNC.D inst_VPA_SYNC.D inst_CLK_000_D0.D inst_CLK_000_D1.D CLK_EXP.D inst_CLK_000_D2.D inst_CLK_000_D6.D SM_AMIGA_5_.D IPL_030_0_.D IPL_030_1_.D AS_000.D SM_AMIGA_6_.D IPL_030_2_.D UDS_000.D LDS_000.D DSACK_1_.D inst_CLK_000_D3.D inst_CLK_000_D5.D SM_AMIGA_3_.D SM_AMIGA_0_.D SM_AMIGA_1_.D AS_030.D DS_030.D SIZE_0_.D SIZE_1_.D A0.D CLK_CNT_N_0_.D CLK_CNT_N_1_.D CLK_CNT_P_0_.D CLK_CNT_P_1_.D inst_CLK_000_D4.D RESET.D SM_AMIGA_7_.D SM_AMIGA_4_.D inst_CLK_OUT_PRE.D SM_AMIGA_2_.D AMIGA_BUS_ENABLE.D cpu_est_0_.D cpu_est_1_.T cpu_est_2_.D E.D -.p 362 -------------------------------------------------------------------------------------- ~1~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ ----1--------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----1-------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------1----------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------1---------------------------------------------------------------------------- ~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------0---------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------0-------------------------------------------------------------------------- ~~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -0-----------0000000------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------1111-------------------------------------------------------------- ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0--------------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------0----------------------1------------------------------------------------------ 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--------------------------------0-------1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------0--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --0------------------------------------10--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------0----------10--------------------------------------------- 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-------------------------------------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------0----0----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------1---0----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------0-----0---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------1----0---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------1------1--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ ----------------------------------0-----------0--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1---------------------------0------0-------1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ ----1-------------------------------1--0-------1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ ----1---------------------------0-------------01-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ ----1-------------------------------1---------01-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ -------------------------------------------0---0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------0--------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------1-------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1------------------------------0---0-0----------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ -----------------------------------0---1-0----0-----1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ -----------------------------------0---0-0-----0----1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ ----------------------------------------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ -----------------------------------------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------0-------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ ---------------------------------------0--------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------1---------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ ----1---------------------------0--------------1-------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ ----1-------------------------------1----------1-------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ -----------------------------------0---1-0----------1--0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ ------------------------------------------0----------1-0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------0----------1--1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------0----------------0----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ -------------------------------------------------------00----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ --------------------------------1---1--------------------0---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ --------------------------------1---1---------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ --------------------------------1---1----------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ --------------------------------1---1-----------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ --------------------------------1----------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ --------------------------------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ --------------------------------------------------------------11---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ --------------------------------------------------------------01---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ --------------------------------------------------------------10---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ --------------------------------------------------------------00---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ----------------------------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ ----------------------------------------------------------------11-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ----------------------------------------------------------------01-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ ----------------------------------------------------------------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ ----------------------------------------------------------------00-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ------------------------------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------1-------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------1-------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------------0--------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0--------------------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------1---------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1----------------------------------0---------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ ---------------------------------------1------0--------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ -----------------------------------------------0-------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------0-------0-------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ ---------------------------------------1---------------0-----------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ -------------------------------------------0------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ------------------------------------------------------0-------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------11-------------------------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ ------------------------------------------------------0---------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ --------------------------------------------------------0-------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ --------------------------------0------0-------------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ ------------------------------------1--0-------------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ --------------------------------0-------------0------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ ------------------------------------1---------0------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ --------------------------------0----------------------0---------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ ------------------------------------1------------------0---------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ ----------------------------------0-------------------------------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------10-------------------------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ ---------------------------------------0--------------------------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ ----------------------------------------1-------------------------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ ----------------------------------0--------------------------------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------0----------------------------0--------------------------------10------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------10--------------------------------11----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ----------------------------------0---------------------------------------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------0----------------------------------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ ----------------------------------------1---------------------------------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ ------------------------------------------------------------------------010----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ ----------------------------------0----------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------0-----------------------0----1--------------1------------------0-1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------------------------------------111---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ ------------------------------------------------------------------------0-01---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ ---------------------------------------0-----------------------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ----------------------------------------1----------------------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ------------------------------------------------------------------------01-0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ---------------------------------------10-------------------------------10-0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ --------------------------------------------------------------------------10---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 ------------------------------------------------------------------------0-10---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ ------------------------------------------------------------------------1-00---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ -------------------------------------------------------------------------100---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ ----10--1----------------------------------------------------------1--------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---1--11----------------0010--1---------------------------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------0------------------------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------0--------------------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------0-------------------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1------------------------------0------1---------------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------0-----------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------0------1----0----------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0-----0--------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------0------0-------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------------0------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ ----1------------------------------0-----------------0----------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------0-----------0-----0----------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1------------------------------0--------------------0-------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------0-----------0--------0-------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---01--1----------------------------------1------------------------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-01----------------------------------1------------------------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1--1----------------1-----------------1------------------------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1--1-----------------1----------------1------------------------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1--1------------------0---------------1------------------------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1--1-------------------1--------------1------------------------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1--1----------------------0-----------1------------------------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---01--1---------------------------------------------0-------------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-01---------------------------------------------0-------------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1--1----------------1----------------------------0-------------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1--1-----------------1---------------------------0-------------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1--1------------------0--------------------------0-------------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1--1-------------------1-------------------------0-------------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1--1----------------------0----------------------0-------------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---01--1------------------------------------------------0----------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-01------------------------------------------------0----------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1--1----------------1-------------------------------0----------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1--1-----------------1------------------------------0----------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1--1------------------0-----------------------------0----------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1--1-------------------1----------------------------0----------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1--1----------------------0-------------------------0----------1--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0------------------------------------0------------------0-------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0-------------------------------------0-----------------0-------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------0--------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ -------------------------------------------------0--------------------------0-1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------0-------------------------0-1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------0----------------------------------------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ -------0------------------------0--------------------------------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ -------0----1-------------------0--------------------------------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ -------0------------------------0------------------------0-------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ --------------------------------0-----------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ -------0------------------------0--------------------------------------------0-01----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ -------0------------------------0--------------------------------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ -------0----1-------------------0--------------------------------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ -------0------------------------0------------------------0-------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ -------0------------------------0--------------------------------------------0-10----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ -------0------------------------0--------------------------------------------0-00----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ ------------1------------------------------1----------------------------------0--0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0-------------------------------------------------------1---------0--0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------1----------------------------------0---1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0-------------------------------------------------------1---------0---1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------1----------------------------------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0-------------------------------------------------------1---------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------1------------------------------1----------------------------------0----0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0-------------------------------------------------------1---------0----0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------1----------------------------1--------------1------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +.i 83 +.o 160 +.ilb A_31_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BGACK_030.Q BG_000.Q FPU_CS.Q VMA.Q inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_SYNC.Q inst_VPA_D.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q inst_CLK_000_D6.Q inst_CLK_OUT_PRE.Q inst_BGACK_030_INT_D.Q CLK_CNT_P_0_.Q IPL_030_0_.Q SM_AMIGA_5_.Q SM_AMIGA_7_.Q IPL_030_1_.Q SM_AMIGA_1_.Q IPL_030_2_.Q SM_AMIGA_0_.Q SM_AMIGA_6_.Q AS_030.Q AS_000.Q UDS_000.Q LDS_000.Q DSACK_1_.Q inst_CLK_000_D3.Q inst_CLK_000_D5.Q SM_AMIGA_3_.Q DS_030.Q SIZE_0_.Q SIZE_1_.Q A0.Q inst_CLK_000_D4.Q SM_AMIGA_4_.Q SM_AMIGA_2_.Q AMIGA_BUS_ENABLE.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q E.Q AS_030.PIN AS_000.PIN DS_030.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN A0.PIN DSACK_1_.PIN DTACK.PIN +.ob BERR AVEC AVEC_EXP AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN cpu_est_0_.C cpu_est_0_.AR cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.C cpu_est_2_.AR E.C E.AR IPL_030_0_.C IPL_030_0_.AP IPL_030_1_.C IPL_030_1_.AP IPL_030_2_.C IPL_030_2_.AP SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.C SM_AMIGA_0_.AR inst_VPA_SYNC.C inst_VPA_SYNC.AP VMA.C VMA.AP BGACK_030.C BGACK_030.AP inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR SIZE_0_.C SIZE_0_.AP SIZE_1_.C SIZE_1_.AP FPU_CS.C FPU_CS.AP inst_DTACK_SYNC.C inst_DTACK_SYNC.AP A0.C A0.AP BG_000.C BG_000.AP DSACK_1_.C DSACK_1_.AP AS_030.C AS_030.AP AS_000.C AS_000.AP AMIGA_BUS_ENABLE.C AMIGA_BUS_ENABLE.AP UDS_000.C UDS_000.AP LDS_000.C LDS_000.AP inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP DS_030.C DS_030.AP inst_CLK_000_D5.C inst_CLK_000_D5.AP inst_CLK_000_D6.C inst_CLK_000_D6.AP inst_CLK_000_D4.C inst_CLK_000_D4.AP CLK_CNT_P_0_.C CLK_CNT_P_0_.AR inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D3.C inst_CLK_000_D3.AP CLK_EXP.C CLK_EXP.AR inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP inst_CLK_000_D0.C inst_CLK_000_D0.AP inst_VPA_D.C inst_VPA_D.AP RESET.C RESET.AR inst_CLK_000_D1.C inst_CLK_000_D1.AP DTACK DSACK_0_ AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_DIV_OUT.AR CLK_DIV_OUT.C CLK_DIV_OUT.D BGACK_030.D BG_000.D FPU_CS.D VMA.D inst_AS_030_000_SYNC.D inst_DTACK_SYNC.D inst_VPA_SYNC.D inst_VPA_D.D inst_CLK_000_D0.D inst_CLK_000_D1.D inst_CLK_000_D2.D inst_CLK_000_D6.D inst_CLK_OUT_PRE.D inst_BGACK_030_INT_D.D CLK_EXP.D CLK_CNT_P_0_.D IPL_030_0_.D SM_AMIGA_5_.D SM_AMIGA_7_.D IPL_030_1_.D SM_AMIGA_1_.D IPL_030_2_.D SM_AMIGA_0_.D SM_AMIGA_6_.D AS_030.D AS_000.D UDS_000.D LDS_000.D DSACK_1_.D inst_CLK_000_D3.D inst_CLK_000_D5.D SM_AMIGA_3_.D DS_030.D SIZE_0_.D SIZE_1_.D A0.D inst_CLK_000_D4.D SM_AMIGA_4_.D SM_AMIGA_2_.D RESET.D AMIGA_BUS_ENABLE.D cpu_est_0_.D cpu_est_1_.T cpu_est_2_.D E.D +.p 382 +----------------------------------------------------------------------------------- ~1~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +---1------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------1--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------1-------------------------------------------------------------------------- ~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------0------------------------------------------------------------------------ ~~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +0-----------0000000---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------1111------------------------------------------------------------ ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~11~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----1------------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0------------------1---------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1-----------------------0---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~111~~~~~~~~~~ +---0-------1------------------0---------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0---------------------------1--------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------0-----------------------1--------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--0-----------------------------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----0--------------------------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0-------------------------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1--------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1-------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------0------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1-----1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------0--1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------0-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0------------------------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0---------------------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--1--1-----------------0010--1----1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0----1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0-----1---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------1--1---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------1---1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------11--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------1-0--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------1----1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------1--0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------1-0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-1------------------------------------10------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ +-----1--------------------------------10------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1----------10------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------1---------10------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +------------------------------------------1---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1------------0--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~111~~~~~~~~~~ +---0--------------------------1------------0--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +------------------------------------------0-1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1-0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------0------1------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1-----1------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0---------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------1-------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1-------0-------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +------------------------------1----------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0----------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------1------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------1------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------1---------------0----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------1------------0----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------0---------1---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1--------1---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0------------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------1----------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1-------0--1-------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------0-----------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1----------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0--------------------1------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------0------------1------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------------1---------------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0---------------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ +------------------------------1-------1-------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1----------------------------------0-------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ +---0--------------------------1-------0-------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1------------0--------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +------------------------------1----------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +-----------0------------------0----------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +---0--------------------------0----------------------0----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~111~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0-----------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +----------------------------------------------0-------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +------------------------------1-------1------------1--1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1--0---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0------------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------0--------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +------------------------------0-------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1----------------------------------0---------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +------------------------------0--------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-----------------------------------------1---------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-------------------------------------------------0-------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +----------------------------------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +------------------------------1---0-----0------1----------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------1----------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------0-------1---------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1----------0-------1---------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1-------0----------1---------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------1-0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +------------------------------0-----------------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +-----------------------------------11-----------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +--------------------------------------1---------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +------------------------------1----0--0---------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +------------------------------1-----0-0---------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------------------------------1------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------1-----------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +------------------------------1-------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +------------------------------1--------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +------------------------------1------------1--------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-----------------------------------------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +------------------------------0-----------------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +------------------------------1-------1---------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +--------------------------------------0---------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------0-------------------------------------------1----------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +-----------0--------------------------------------------1---------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +------------------------------0------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +------------------------------1-------1----------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------0----------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +---0--------------------------1-------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +------------------------------0------------0------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +------------------------------1---------------------0---------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +--------------------------------------0------------------------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ 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+------------------------------------1---------------------------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------10-----------------------------00------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +--------------------------------------0--------------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +---------------------------------------1-------------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +----------------------------------------------------------------------11----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +--------------------------------------10-----------------------------1-0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +--------------------------------------10------------------------------00----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +--------------------------------------0---------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +---------------------------------------1--------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +--------------------------------------10-----------------------------1--1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +----------------------------------------------------------------------0-1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +--------------------------------------10------------------------------011---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-----------------------------------------------------------------------01---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +--------------------------------------10-----------------------------1-01---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +------------------------------------1-----------------------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------10-----------------------------1-10---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------------------------10------------------------------000---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-------------------------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~1111~~~~~~~~~~~~~~~~ +---------------------------------1---------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------1-----------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------0-----------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------0----------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------1-------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +----------------------------------------------0--------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------0--------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~ +------------------------------1------------------1-----------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +-------------------------------------------------0-----------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +------------------------------1--------------------1---------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +-----------------------------------------------------------0-------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +------------------------------------------------------------0------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0------------------------------------------------------0------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------1--1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------01--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------1-----------------------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0-------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~111~~~~~~~~~~ +-------------------------------------------------------1-------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------1------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------1-1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~ +------------------------------0---------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +------------------------------0----------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +------------------------------0---------------------------------------------11----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~1~1~~~~~~~~~~ +------0-----------------------0-------------------------------------------0-10----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +------------------------------0---------------------------------------------00----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ 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+---------------------------------------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------1----------------------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------1--------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------------- 0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 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+-------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------0-------------------------------------------------------------------------- ~~~~~~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------0------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------1------------------------------------------------------------------------ ~~~~~~~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------1-------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------1----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------1---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------0--------------------------------------------------------------- ~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------0-------------------------------------------------------------- ~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------0------------------------------------------------------------- ~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------0------------------------------------------------------------ ~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~000~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------1---------------------------------------------------- ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~00~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--------------------------0---------------------------------------------------- ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1-----------------------0---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +-----------0------------------0---------------------------------------------------- ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----0--------------------------0--------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0--0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------------1---1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +------------------------------1-------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~ +------------------------------1---1---1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +------------------------------1-------0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0-------0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1----0--0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +------------------------------1-----0-0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ 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+----------------------------------------0------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +------------------------------1-------0--1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------0---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0------------1--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +------------------------------1------------0--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +--------------------------------------------1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1-1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------0-0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------0------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1-----0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1---------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +------------------------------0---------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ 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+------------------------------1-------1---------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------1--------0------0---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--------------------------1---0---0-0-----------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1---0---1-0----------0------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1---0---0-0-----------0-----1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1---0---1-0-------------0---1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +---0--------------------------1---------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ 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+----------------------------------0------1----------0--------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------0--------------0--0--------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------0------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +------------------------------0------------------------0-----------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------0--------0-----------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +------------------------------0-------------------------0----------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1----------------------------------0---------0----------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +---------------------------------------------------------0---------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +---1------------------------------0------------------------0-------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--01--1----------------------------------------1-----------0-------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-01----------------------------------------1-----------0-------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1----------------1-----------------------1-----------0-------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1-----------------1----------------------1-----------0-------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1------------------0---------------------1-----------0-------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1-------------------1--------------------1-----------0-------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1----------------------0-----------------1-----------0-------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------0-----------------0------0-------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-------------------------------------------0----------0------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------0--------------------------------------------0---------0------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-------------------------------------------1------------------------0----0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +------------------------------0-------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +-------------------------------------------------------0-----------------0-1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------0----------------0-1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +------------------------------0---------------------------------------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +------0-----------------------0-------------------------------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +------0----1------------------0-------------------------------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +------0-----------------------0----------------------0--------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +------------------------------0----------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +------0-----------------------0-------------------------------------------0-01----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +------0-----------------------0-------------------------------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +------0----1------------------0-------------------------------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +------0-----------------------0----------------------0--------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +------0-----------------------0-------------------------------------------0-10----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +------0-----------------------0-------------------------------------------0-00----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +-----------1------------------1---------------1----------------------------0--0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------0------------------1-----------------------------------1--------0--0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1------------------1---------------1----------------------------0---1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------0------------------1-----------------------------------1--------0---1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1------------------1---------------1----------------------------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------0------------------1-----------------------------------1--------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1------------------1---------------1----------------------------0----0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------0------------------1-----------------------------------1--------0----0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1------11---------------------1---------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ .end diff --git a/Logic/68030_tk.tt4 b/Logic/68030_tk.tt4 index f291d58..f2d17be 100644 --- a/Logic/68030_tk.tt4 +++ b/Logic/68030_tk.tt4 @@ -1,197 +1,198 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Sat May 24 21:59:14 2014 +#$ DATE Sun May 25 20:57:52 2014 #$ MODULE BUS68030 -#$ PINS 59 IPL_1_ IPL_0_ A_31_ DSACK_0_ FC_0_ IPL_2_ FC_1_ nEXP_SPACE BERR - BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT DTACK AVEC AVEC_EXP VPA - RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN A_30_ A_29_ A_28_ A_27_ - A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ IPL_030_1_ - IPL_030_0_ SIZE_1_ IPL_030_2_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 - BG_000 BGACK_030 CLK_EXP FPU_CS E VMA RESET AMIGA_BUS_ENABLE SIZE_0_ -#$ NODES 27 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_DTACK_SYNC - inst_VPA_SYNC inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D6 - SM_AMIGA_5_ SM_AMIGA_6_ inst_CLK_000_D3 inst_CLK_000_D5 SM_AMIGA_3_ SM_AMIGA_0_ - SM_AMIGA_1_ CLK_CNT_N_0_ CLK_CNT_N_1_ CLK_CNT_P_0_ CLK_CNT_P_1_ inst_CLK_000_D4 - SM_AMIGA_7_ SM_AMIGA_4_ inst_CLK_OUT_PRE SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ - cpu_est_2_ +#$ PINS 59 A_31_ IPL_2_ FC_1_ A_30_ A_29_ A_28_ A_27_ A_26_ nEXP_SPACE A_25_ + BERR A_24_ BG_030 A_23_ A_22_ A_21_ BGACK_000 A_20_ CLK_030 A_19_ CLK_000 A_18_ + CLK_OSZI A_17_ CLK_DIV_OUT A_16_ DTACK IPL_1_ AVEC IPL_0_ AVEC_EXP DSACK_0_ + FC_0_ VPA RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_1_ IPL_030_2_ + DSACK_1_ AS_030 SIZE_0_ AS_000 DS_030 UDS_000 LDS_000 A0 BG_000 BGACK_030 + CLK_EXP IPL_030_1_ FPU_CS IPL_030_0_ E VMA RESET AMIGA_BUS_ENABLE +#$ NODES 25 inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_SYNC inst_VPA_D + inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D6 inst_CLK_OUT_PRE + inst_BGACK_030_INT_D CLK_CNT_P_0_ SM_AMIGA_5_ SM_AMIGA_7_ SM_AMIGA_1_ + SM_AMIGA_0_ SM_AMIGA_6_ inst_CLK_000_D3 inst_CLK_000_D5 SM_AMIGA_3_ + inst_CLK_000_D4 SM_AMIGA_4_ SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ cpu_est_2_ .type f -.i 85 -.o 169 +.i 83 +.o 163 .ilb A_31_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ - A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BG_000.Q BGACK_030.Q FPU_CS.Q VMA.Q - inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_DTACK_SYNC.Q inst_VPA_SYNC.Q + A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BGACK_030.Q BG_000.Q FPU_CS.Q VMA.Q + inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_SYNC.Q inst_VPA_D.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q inst_CLK_000_D6.Q - SM_AMIGA_5_.Q IPL_030_0_.Q IPL_030_1_.Q AS_000.Q SM_AMIGA_6_.Q IPL_030_2_.Q - UDS_000.Q LDS_000.Q DSACK_1_.Q inst_CLK_000_D3.Q inst_CLK_000_D5.Q SM_AMIGA_3_.Q - SM_AMIGA_0_.Q SM_AMIGA_1_.Q AS_030.Q DS_030.Q SIZE_0_.Q SIZE_1_.Q A0.Q - CLK_CNT_N_0_.Q CLK_CNT_N_1_.Q CLK_CNT_P_0_.Q CLK_CNT_P_1_.Q inst_CLK_000_D4.Q - SM_AMIGA_7_.Q SM_AMIGA_4_.Q inst_CLK_OUT_PRE.Q SM_AMIGA_2_.Q AMIGA_BUS_ENABLE.Q + inst_CLK_OUT_PRE.Q inst_BGACK_030_INT_D.Q CLK_CNT_P_0_.Q IPL_030_0_.Q + SM_AMIGA_5_.Q SM_AMIGA_7_.Q IPL_030_1_.Q SM_AMIGA_1_.Q IPL_030_2_.Q + SM_AMIGA_0_.Q SM_AMIGA_6_.Q AS_030.Q AS_000.Q UDS_000.Q LDS_000.Q DSACK_1_.Q + inst_CLK_000_D3.Q inst_CLK_000_D5.Q SM_AMIGA_3_.Q DS_030.Q SIZE_0_.Q SIZE_1_.Q + A0.Q inst_CLK_000_D4.Q SM_AMIGA_4_.Q SM_AMIGA_2_.Q AMIGA_BUS_ENABLE.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q E.Q AS_030.PIN AS_000.PIN DS_030.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN A0.PIN DSACK_1_.PIN DTACK.PIN -.ob DSACK_0_ DSACK_0_.OE BERR BERR.OE CLK_DIV_OUT.D CLK_DIV_OUT.C CLK_DIV_OUT.AR - DTACK DTACK.OE AVEC AVEC_EXP AVEC_EXP.OE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW - CIIN CIIN.OE IPL_030_1_.D IPL_030_1_.C IPL_030_1_.AP IPL_030_0_.D IPL_030_0_.C - IPL_030_0_.AP SIZE_1_.D% SIZE_1_.C SIZE_1_.AP SIZE_1_.OE IPL_030_2_.D - IPL_030_2_.C IPL_030_2_.AP DSACK_1_.D% DSACK_1_.C DSACK_1_.AP DSACK_1_.OE - AS_030.D% AS_030.C AS_030.AP AS_030.OE AS_000.D AS_000.C AS_000.AP AS_000.OE - DS_030.D% DS_030.C DS_030.AP DS_030.OE UDS_000.D% UDS_000.C UDS_000.AP - UDS_000.OE LDS_000.D LDS_000.C LDS_000.AP LDS_000.OE A0.D A0.C A0.AP A0.OE - BG_000.D% BG_000.C BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_EXP.D - CLK_EXP.C CLK_EXP.AR FPU_CS.D% FPU_CS.C FPU_CS.AP E.D.X1 E.D.X2 E.C E.AR - VMA.D.X1 VMA.D.X2 VMA.C VMA.AP RESET.D RESET.C RESET.AR AMIGA_BUS_ENABLE.D - AMIGA_BUS_ENABLE.C AMIGA_BUS_ENABLE.AP SIZE_0_.D% SIZE_0_.C SIZE_0_.AP - SIZE_0_.OE inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP +.ob BERR BERR.OE CLK_DIV_OUT.D CLK_DIV_OUT.C CLK_DIV_OUT.AR DTACK DTACK.OE AVEC + AVEC_EXP AVEC_EXP.OE DSACK_0_ DSACK_0_.OE AMIGA_BUS_DATA_DIR + AMIGA_BUS_ENABLE_LOW CIIN CIIN.OE SIZE_1_.D% SIZE_1_.C SIZE_1_.AP SIZE_1_.OE + IPL_030_2_.D IPL_030_2_.C IPL_030_2_.AP DSACK_1_.D% DSACK_1_.C DSACK_1_.AP + DSACK_1_.OE AS_030.D% AS_030.C AS_030.AP AS_030.OE SIZE_0_.D% SIZE_0_.C + SIZE_0_.AP SIZE_0_.OE AS_000.D% AS_000.C AS_000.AP AS_000.OE DS_030.D% DS_030.C + DS_030.AP DS_030.OE UDS_000.D% UDS_000.C UDS_000.AP UDS_000.OE LDS_000.D + LDS_000.C LDS_000.AP LDS_000.OE A0.D A0.C A0.AP A0.OE BG_000.D% BG_000.C + BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_EXP.D CLK_EXP.C CLK_EXP.AR + IPL_030_1_.D IPL_030_1_.C IPL_030_1_.AP FPU_CS.D% FPU_CS.C FPU_CS.AP + IPL_030_0_.D IPL_030_0_.C IPL_030_0_.AP E.D.X1 E.D.X2 E.C E.AR VMA.D% VMA.C + VMA.AP RESET.D RESET.C RESET.AR AMIGA_BUS_ENABLE.D% AMIGA_BUS_ENABLE.C + AMIGA_BUS_ENABLE.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C + inst_AS_030_000_SYNC.AP inst_DTACK_SYNC.D% inst_DTACK_SYNC.C inst_DTACK_SYNC.AP + inst_VPA_SYNC.D% inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_VPA_D.D inst_VPA_D.C + inst_VPA_D.AP inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D0.AP + inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D1.AP inst_CLK_000_D2.D + inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D6.D inst_CLK_000_D6.C + inst_CLK_000_D6.AP inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP - inst_DTACK_SYNC.D% inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_VPA_SYNC.D% - inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_CLK_000_D0.D inst_CLK_000_D0.C - inst_CLK_000_D0.AP inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D1.AP - inst_CLK_000_D2.D inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D6.D - inst_CLK_000_D6.C inst_CLK_000_D6.AP SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR - SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR inst_CLK_000_D3.D inst_CLK_000_D3.C - inst_CLK_000_D3.AP inst_CLK_000_D5.D inst_CLK_000_D5.C inst_CLK_000_D5.AP - SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C - SM_AMIGA_0_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR CLK_CNT_N_0_.D - CLK_CNT_N_0_.C CLK_CNT_N_0_.AR CLK_CNT_N_1_.D CLK_CNT_N_1_.C CLK_CNT_N_1_.AP - CLK_CNT_P_0_.D CLK_CNT_P_0_.C CLK_CNT_P_0_.AR CLK_CNT_P_1_.D CLK_CNT_P_1_.C - CLK_CNT_P_1_.AR inst_CLK_000_D4.D inst_CLK_000_D4.C inst_CLK_000_D4.AP - SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_4_.D SM_AMIGA_4_.C - SM_AMIGA_4_.AR inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR + CLK_CNT_P_0_.D CLK_CNT_P_0_.C CLK_CNT_P_0_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C + SM_AMIGA_5_.AR SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_1_.D + SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D.X1 SM_AMIGA_0_.D.X2 SM_AMIGA_0_.C + SM_AMIGA_0_.AR SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR inst_CLK_000_D3.D + inst_CLK_000_D3.C inst_CLK_000_D3.AP inst_CLK_000_D5.D inst_CLK_000_D5.C + inst_CLK_000_D5.AP SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR inst_CLK_000_D4.D + inst_CLK_000_D4.C inst_CLK_000_D4.AP SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR cpu_est_0_.D cpu_est_0_.C cpu_est_0_.AR cpu_est_1_.T cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C cpu_est_2_.AR -.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 -.p 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+-----------------------------------------------------------------------1----------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 .end diff --git a/Logic/68030_tk.tte b/Logic/68030_tk.tte index 7a062e0..9a559c4 100644 --- a/Logic/68030_tk.tte +++ b/Logic/68030_tk.tte @@ -1,197 +1,198 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Sat May 24 21:59:14 2014 +#$ DATE Sun May 25 20:57:52 2014 #$ MODULE BUS68030 -#$ PINS 59 IPL_1_ IPL_0_ A_31_ DSACK_0_ FC_0_ IPL_2_ FC_1_ nEXP_SPACE BERR - BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT DTACK AVEC AVEC_EXP VPA - RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN A_30_ A_29_ A_28_ A_27_ - A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ IPL_030_1_ - IPL_030_0_ SIZE_1_ IPL_030_2_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 - BG_000 BGACK_030 CLK_EXP FPU_CS E VMA RESET AMIGA_BUS_ENABLE SIZE_0_ -#$ NODES 27 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_DTACK_SYNC - inst_VPA_SYNC inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D6 - SM_AMIGA_5_ SM_AMIGA_6_ inst_CLK_000_D3 inst_CLK_000_D5 SM_AMIGA_3_ SM_AMIGA_0_ - SM_AMIGA_1_ CLK_CNT_N_0_ CLK_CNT_N_1_ CLK_CNT_P_0_ CLK_CNT_P_1_ inst_CLK_000_D4 - SM_AMIGA_7_ SM_AMIGA_4_ inst_CLK_OUT_PRE SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ - cpu_est_2_ +#$ PINS 59 A_31_ IPL_2_ FC_1_ A_30_ A_29_ A_28_ A_27_ A_26_ nEXP_SPACE A_25_ + BERR A_24_ BG_030 A_23_ A_22_ A_21_ BGACK_000 A_20_ CLK_030 A_19_ CLK_000 A_18_ + CLK_OSZI A_17_ CLK_DIV_OUT A_16_ DTACK IPL_1_ AVEC IPL_0_ AVEC_EXP DSACK_0_ + FC_0_ VPA RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_1_ IPL_030_2_ + DSACK_1_ AS_030 SIZE_0_ AS_000 DS_030 UDS_000 LDS_000 A0 BG_000 BGACK_030 + CLK_EXP IPL_030_1_ FPU_CS IPL_030_0_ E VMA RESET AMIGA_BUS_ENABLE +#$ NODES 25 inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_SYNC inst_VPA_D + inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D6 inst_CLK_OUT_PRE + inst_BGACK_030_INT_D CLK_CNT_P_0_ SM_AMIGA_5_ SM_AMIGA_7_ SM_AMIGA_1_ + SM_AMIGA_0_ SM_AMIGA_6_ inst_CLK_000_D3 inst_CLK_000_D5 SM_AMIGA_3_ + inst_CLK_000_D4 SM_AMIGA_4_ SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ cpu_est_2_ .type f -.i 85 -.o 169 +.i 83 +.o 163 .ilb A_31_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ - A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BG_000.Q BGACK_030.Q FPU_CS.Q VMA.Q - inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_DTACK_SYNC.Q inst_VPA_SYNC.Q + A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BGACK_030.Q BG_000.Q FPU_CS.Q VMA.Q + inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_SYNC.Q inst_VPA_D.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q inst_CLK_000_D6.Q - SM_AMIGA_5_.Q IPL_030_0_.Q IPL_030_1_.Q AS_000.Q SM_AMIGA_6_.Q IPL_030_2_.Q - UDS_000.Q LDS_000.Q DSACK_1_.Q inst_CLK_000_D3.Q inst_CLK_000_D5.Q SM_AMIGA_3_.Q - SM_AMIGA_0_.Q SM_AMIGA_1_.Q AS_030.Q DS_030.Q SIZE_0_.Q SIZE_1_.Q A0.Q - CLK_CNT_N_0_.Q CLK_CNT_N_1_.Q CLK_CNT_P_0_.Q CLK_CNT_P_1_.Q inst_CLK_000_D4.Q - SM_AMIGA_7_.Q SM_AMIGA_4_.Q inst_CLK_OUT_PRE.Q SM_AMIGA_2_.Q AMIGA_BUS_ENABLE.Q + inst_CLK_OUT_PRE.Q inst_BGACK_030_INT_D.Q CLK_CNT_P_0_.Q IPL_030_0_.Q + SM_AMIGA_5_.Q SM_AMIGA_7_.Q IPL_030_1_.Q SM_AMIGA_1_.Q IPL_030_2_.Q + SM_AMIGA_0_.Q SM_AMIGA_6_.Q AS_030.Q AS_000.Q UDS_000.Q LDS_000.Q DSACK_1_.Q + inst_CLK_000_D3.Q inst_CLK_000_D5.Q SM_AMIGA_3_.Q DS_030.Q SIZE_0_.Q SIZE_1_.Q + A0.Q inst_CLK_000_D4.Q SM_AMIGA_4_.Q SM_AMIGA_2_.Q AMIGA_BUS_ENABLE.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q E.Q AS_030.PIN AS_000.PIN DS_030.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN A0.PIN DSACK_1_.PIN DTACK.PIN -.ob DSACK_0_ DSACK_0_.OE BERR BERR.OE CLK_DIV_OUT.D CLK_DIV_OUT.C CLK_DIV_OUT.AR - DTACK DTACK.OE AVEC AVEC_EXP AVEC_EXP.OE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW - CIIN CIIN.OE IPL_030_1_.D IPL_030_1_.C IPL_030_1_.AP IPL_030_0_.D IPL_030_0_.C - IPL_030_0_.AP SIZE_1_.D- SIZE_1_.C SIZE_1_.AP SIZE_1_.OE IPL_030_2_.D - IPL_030_2_.C IPL_030_2_.AP DSACK_1_.D- DSACK_1_.C DSACK_1_.AP DSACK_1_.OE - AS_030.D- AS_030.C AS_030.AP AS_030.OE AS_000.D AS_000.C AS_000.AP AS_000.OE - DS_030.D- DS_030.C DS_030.AP DS_030.OE UDS_000.D- UDS_000.C UDS_000.AP - UDS_000.OE LDS_000.D LDS_000.C LDS_000.AP LDS_000.OE A0.D A0.C A0.AP A0.OE - BG_000.D- BG_000.C BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_EXP.D - CLK_EXP.C CLK_EXP.AR FPU_CS.D- FPU_CS.C FPU_CS.AP E.D.X1 E.D.X2 E.C E.AR - VMA.D.X1 VMA.D.X2 VMA.C VMA.AP RESET.D RESET.C RESET.AR AMIGA_BUS_ENABLE.D - AMIGA_BUS_ENABLE.C AMIGA_BUS_ENABLE.AP SIZE_0_.D- SIZE_0_.C SIZE_0_.AP - SIZE_0_.OE inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP +.ob BERR BERR.OE CLK_DIV_OUT.D CLK_DIV_OUT.C CLK_DIV_OUT.AR DTACK DTACK.OE AVEC + AVEC_EXP AVEC_EXP.OE DSACK_0_ DSACK_0_.OE AMIGA_BUS_DATA_DIR + AMIGA_BUS_ENABLE_LOW CIIN CIIN.OE SIZE_1_.D- SIZE_1_.C SIZE_1_.AP SIZE_1_.OE + IPL_030_2_.D IPL_030_2_.C IPL_030_2_.AP DSACK_1_.D- DSACK_1_.C DSACK_1_.AP + DSACK_1_.OE AS_030.D- AS_030.C AS_030.AP AS_030.OE SIZE_0_.D- SIZE_0_.C + SIZE_0_.AP SIZE_0_.OE AS_000.D- AS_000.C AS_000.AP AS_000.OE DS_030.D- DS_030.C + DS_030.AP DS_030.OE UDS_000.D- UDS_000.C UDS_000.AP UDS_000.OE LDS_000.D + LDS_000.C LDS_000.AP LDS_000.OE A0.D A0.C A0.AP A0.OE BG_000.D- BG_000.C + BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_EXP.D CLK_EXP.C CLK_EXP.AR + IPL_030_1_.D IPL_030_1_.C IPL_030_1_.AP FPU_CS.D- FPU_CS.C FPU_CS.AP + IPL_030_0_.D IPL_030_0_.C IPL_030_0_.AP E.D.X1 E.D.X2 E.C E.AR VMA.D- VMA.C + VMA.AP RESET.D RESET.C RESET.AR AMIGA_BUS_ENABLE.D- AMIGA_BUS_ENABLE.C + AMIGA_BUS_ENABLE.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C + inst_AS_030_000_SYNC.AP inst_DTACK_SYNC.D- inst_DTACK_SYNC.C inst_DTACK_SYNC.AP + inst_VPA_SYNC.D- inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_VPA_D.D inst_VPA_D.C + inst_VPA_D.AP inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D0.AP + inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D1.AP inst_CLK_000_D2.D + inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D6.D inst_CLK_000_D6.C + inst_CLK_000_D6.AP inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP - inst_DTACK_SYNC.D- inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_VPA_SYNC.D- - inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_CLK_000_D0.D inst_CLK_000_D0.C - inst_CLK_000_D0.AP inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D1.AP - inst_CLK_000_D2.D inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D6.D - inst_CLK_000_D6.C inst_CLK_000_D6.AP SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR - SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR inst_CLK_000_D3.D inst_CLK_000_D3.C - inst_CLK_000_D3.AP inst_CLK_000_D5.D inst_CLK_000_D5.C inst_CLK_000_D5.AP - SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C - SM_AMIGA_0_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR CLK_CNT_N_0_.D - CLK_CNT_N_0_.C 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+--------------------------------------10-----------------------------1010---------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +-----------------------------------------------------------------------1----------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 .end diff --git a/Logic/68030_tk.vcl b/Logic/68030_tk.vcl index ad3a526..6b4b094 100644 --- a/Logic/68030_tk.vcl +++ b/Logic/68030_tk.vcl @@ -17,8 +17,8 @@ Parent = m4a5.lci; SDS_file = m4a5.sds; Design = 68030_tk.tt4; Rev = 0.01; -DATE = 5/24/14; -TIME = 21:59:18; +DATE = 5/25/14; +TIME = 20:57:57; Type = TT2; Pre_Fit_Time = 1; Source_Format = Pure_VHDL; @@ -109,7 +109,7 @@ DT_Synthesis = Yes; [FITTER GLOBAL OPTIONS] Run_Time = 0; -Set_Reset_Dont_Care = NO; +Set_Reset_Dont_Care = YES; In_Reg_Optimize = YES; Clock_Optimize = NO; Conf_Unused_IOs = OUT_LOW; @@ -145,6 +145,7 @@ SIZE_0_ = BIDIR,70,6,-; A0 = BIDIR,69,6,-; DTACK = OUTPUT,30,3,-; AMIGA_BUS_ENABLE = OUTPUT,34,3,-; +VMA = OUTPUT,35,3,-; E = OUTPUT,66,6,-; IPL_030_2_ = OUTPUT,9,1,-; IPL_030_0_ = OUTPUT,8,1,-; @@ -152,7 +153,6 @@ IPL_030_1_ = OUTPUT,7,1,-; BGACK_030 = OUTPUT,83,7,-; FPU_CS = OUTPUT,78,7,-; AMIGA_BUS_DATA_DIR = OUTPUT,48,4,-; -VMA = OUTPUT,35,3,-; BG_000 = OUTPUT,29,3,-; AVEC = OUTPUT,92,0,-; DSACK_0_ = OUTPUT,80,7,-; @@ -163,49 +163,47 @@ AVEC_EXP = OUTPUT,22,2,-; AMIGA_BUS_ENABLE_LOW = OUTPUT,20,2,-; CLK_EXP = OUTPUT,10,1,-; RESET = OUTPUT,3,1,-; -inst_CLK_000_D0 = NODE,*,4,-; RN_BGACK_030 = NODE,-1,7,-; -inst_CLK_000_D1 = NODE,*,5,-; +inst_CLK_000_D0 = NODE,*,0,-; +inst_CLK_000_D1 = NODE,*,4,-; +cpu_est_1_ = NODE,*,0,-; +SM_AMIGA_1_ = NODE,*,5,-; +RN_AS_030 = NODE,-1,7,-; +SM_AMIGA_6_ = NODE,*,2,-; inst_BGACK_030_INT_D = NODE,*,5,-; -cpu_est_1_ = NODE,*,6,-; +SM_AMIGA_7_ = NODE,*,2,-; RN_E = NODE,-1,6,-; cpu_est_0_ = NODE,*,0,-; -SM_AMIGA_1_ = NODE,*,1,-; -RN_FPU_CS = NODE,-1,7,-; SM_AMIGA_4_ = NODE,*,0,-; -CLK_CNT_P_0_ = NODE,*,6,-; -SM_AMIGA_6_ = NODE,*,5,-; -inst_CLK_000_D5 = NODE,*,4,-; -inst_CLK_000_D6 = NODE,*,7,-; -SM_AMIGA_7_ = NODE,*,5,-; -inst_CLK_OUT_PRE = NODE,*,2,-; -SM_AMIGA_0_ = NODE,*,5,-; -RN_AS_030 = NODE,-1,7,-; -cpu_est_2_ = NODE,*,6,-; -SM_AMIGA_3_ = NODE,*,2,-; +SM_AMIGA_5_ = NODE,*,6,-; +RN_FPU_CS = NODE,-1,7,-; +inst_CLK_OUT_PRE = NODE,*,5,-; +inst_CLK_000_D5 = NODE,*,6,-; +inst_CLK_000_D6 = NODE,*,5,-; +inst_AS_030_000_SYNC = NODE,*,5,-; RN_VMA = NODE,-1,3,-; +SM_AMIGA_2_ = NODE,*,2,-; +SM_AMIGA_3_ = NODE,*,2,-; +cpu_est_2_ = NODE,*,0,-; +SM_AMIGA_0_ = NODE,*,2,-; RN_AS_000 = NODE,-1,3,-; -CLK_CNT_N_0_ = NODE,*,2,-; -SM_AMIGA_5_ = NODE,*,0,-; -inst_VPA_SYNC = NODE,*,2,-; -inst_DTACK_SYNC = NODE,*,2,-; -CLK_CNT_P_1_ = NODE,*,4,-; -inst_CLK_000_D2 = NODE,*,0,-; +inst_VPA_SYNC = NODE,*,1,-; +inst_DTACK_SYNC = NODE,*,1,-; +inst_CLK_000_D3 = NODE,*,6,-; +inst_CLK_000_D2 = NODE,*,4,-; +inst_VPA_D = NODE,*,4,-; RN_LDS_000 = NODE,-1,3,-; RN_AMIGA_BUS_ENABLE = NODE,-1,3,-; -inst_AS_030_000_SYNC = NODE,*,5,-; RN_UDS_000 = NODE,-1,3,-; RN_DS_030 = NODE,-1,0,-; -RN_IPL_030_2_ = NODE,-1,1,-; -RN_SIZE_1_ = NODE,-1,7,-; RN_IPL_030_0_ = NODE,-1,1,-; RN_IPL_030_1_ = NODE,-1,1,-; -SM_AMIGA_2_ = NODE,*,1,-; -RN_SIZE_0_ = NODE,-1,6,-; +RN_IPL_030_2_ = NODE,-1,1,-; +RN_SIZE_1_ = NODE,-1,7,-; RN_BG_000 = NODE,-1,3,-; RN_A0 = NODE,-1,6,-; +RN_SIZE_0_ = NODE,-1,6,-; RN_DSACK_1_ = NODE,-1,7,-; -inst_CLK_000_D4 = NODE,*,5,-; -CLK_CNT_N_1_ = NODE,*,0,-; -inst_CLK_000_D3 = NODE,*,4,-; +inst_CLK_000_D4 = NODE,*,4,-; +CLK_CNT_P_0_ = NODE,*,5,-; CLK_OSZI = INPUT,61,-,-; diff --git a/Logic/68030_tk.vco b/Logic/68030_tk.vco index 9892544..99fc189 100644 --- a/Logic/68030_tk.vco +++ b/Logic/68030_tk.vco @@ -17,8 +17,8 @@ Parent = m4a5.lci; SDS_file = m4a5.sds; Design = 68030_tk.tt4; Rev = 0.01; -DATE = 5/24/14; -TIME = 21:59:18; +DATE = 5/25/14; +TIME = 20:57:57; Type = TT2; Pre_Fit_Time = 1; Source_Format = Pure_VHDL; @@ -109,7 +109,7 @@ DT_Synthesis = Yes; [FITTER GLOBAL OPTIONS] Run_Time = 0; -Set_Reset_Dont_Care = NO; +Set_Reset_Dont_Care = YES; In_Reg_Optimize = YES; Clock_Optimize = NO; Conf_Unused_IOs = OUT_LOW; @@ -134,51 +134,50 @@ layer = OFF; [LOCATION ASSIGNMENT] Layer = OFF; -IPL_1_ = INPUT,56, F,-; -IPL_0_ = INPUT,67, G,-; A_31_ = INPUT,4, B,-; -DSACK_0_ = OUTPUT,80, H,-; -FC_0_ = INPUT,57, F,-; IPL_2_ = INPUT,68, G,-; FC_1_ = INPUT,58, F,-; +A_30_ = INPUT,5, B,-; +A_29_ = INPUT,6, B,-; +A_28_ = INPUT,15, C,-; +A_27_ = INPUT,16, C,-; +A_26_ = INPUT,17, C,-; nEXP_SPACE = INPUT,14,-,-; +A_25_ = INPUT,18, C,-; BERR = OUTPUT,41, E,-; +A_24_ = INPUT,19, C,-; BG_030 = INPUT,21, C,-; +A_23_ = INPUT,84, H,-; +A_22_ = INPUT,85, H,-; +A_21_ = INPUT,94, A,-; BGACK_000 = INPUT,28, D,-; +A_20_ = INPUT,93, A,-; CLK_030 = INPUT,64,-,-; +A_19_ = INPUT,97, A,-; CLK_000 = INPUT,11,-,-; +A_18_ = INPUT,95, A,-; CLK_OSZI = INPUT,61,-,-; +A_17_ = INPUT,59, F,-; CLK_DIV_OUT = OUTPUT,65, G,-; +A_16_ = INPUT,96, A,-; DTACK = BIDIR,30, D,-; +IPL_1_ = INPUT,56, F,-; AVEC = OUTPUT,92, A,-; +IPL_0_ = INPUT,67, G,-; AVEC_EXP = OUTPUT,22, C,-; +DSACK_0_ = OUTPUT,80, H,-; +FC_0_ = INPUT,57, F,-; VPA = INPUT,36,-,-; RST = INPUT,86,-,-; RW = INPUT,71, G,-; AMIGA_BUS_DATA_DIR = OUTPUT,48, E,-; AMIGA_BUS_ENABLE_LOW = OUTPUT,20, C,-; CIIN = OUTPUT,47, E,-; -A_30_ = INPUT,5, B,-; -A_29_ = INPUT,6, B,-; -A_28_ = INPUT,15, C,-; -A_27_ = INPUT,16, C,-; -A_26_ = INPUT,17, C,-; -A_25_ = INPUT,18, C,-; -A_24_ = INPUT,19, C,-; -A_23_ = INPUT,84, H,-; -A_22_ = INPUT,85, H,-; -A_21_ = INPUT,94, A,-; -A_20_ = INPUT,93, A,-; -A_19_ = INPUT,97, A,-; -A_18_ = INPUT,95, A,-; -A_17_ = INPUT,59, F,-; -A_16_ = INPUT,96, A,-; -IPL_030_1_ = OUTPUT,7, B,-; -IPL_030_0_ = OUTPUT,8, B,-; SIZE_1_ = BIDIR,79, H,-; IPL_030_2_ = OUTPUT,9, B,-; DSACK_1_ = BIDIR,81, H,-; AS_030 = BIDIR,82, H,-; +SIZE_0_ = BIDIR,70, G,-; AS_000 = BIDIR,33, D,-; DS_030 = BIDIR,98, A,-; UDS_000 = BIDIR,32, D,-; @@ -187,36 +186,35 @@ A0 = BIDIR,69, G,-; BG_000 = OUTPUT,29, D,-; BGACK_030 = OUTPUT,83, H,-; CLK_EXP = OUTPUT,10, B,-; +IPL_030_1_ = OUTPUT,7, B,-; FPU_CS = OUTPUT,78, H,-; +IPL_030_0_ = OUTPUT,8, B,-; E = OUTPUT,66, G,-; VMA = OUTPUT,35, D,-; RESET = OUTPUT,3, B,-; AMIGA_BUS_ENABLE = OUTPUT,34, D,-; -SIZE_0_ = BIDIR,70, G,-; -inst_AS_030_000_SYNC = NODE,5, F,-; +inst_AS_030_000_SYNC = NODE,1, F,-; +inst_DTACK_SYNC = NODE,9, B,-; +inst_VPA_SYNC = NODE,5, B,-; +inst_VPA_D = NODE,5, E,-; +inst_CLK_000_D0 = NODE,8, A,-; +inst_CLK_000_D1 = NODE,8, E,-; +inst_CLK_000_D2 = NODE,1, E,-; +inst_CLK_000_D6 = NODE,12, F,-; +inst_CLK_OUT_PRE = NODE,8, F,-; inst_BGACK_030_INT_D = NODE,4, F,-; -inst_DTACK_SYNC = NODE,9, C,-; -inst_VPA_SYNC = NODE,5, C,-; -inst_CLK_000_D0 = NODE,8, E,-; -inst_CLK_000_D1 = NODE,0, F,-; -inst_CLK_000_D2 = NODE,5, A,-; -inst_CLK_000_D6 = NODE,5, H,-; -SM_AMIGA_5_ = NODE,1, A,-; -SM_AMIGA_6_ = NODE,8, F,-; -inst_CLK_000_D3 = NODE,9, E,-; -inst_CLK_000_D5 = NODE,1, E,-; -SM_AMIGA_3_ = NODE,8, C,-; -SM_AMIGA_0_ = NODE,1, F,-; -SM_AMIGA_1_ = NODE,5, B,-; -CLK_CNT_N_0_ = NODE,1, C,-; -CLK_CNT_N_1_ = NODE,9, A,-; -CLK_CNT_P_0_ = NODE,5, G,-; -CLK_CNT_P_1_ = NODE,5, E,-; -inst_CLK_000_D4 = NODE,9, F,-; -SM_AMIGA_7_ = NODE,12, F,-; -SM_AMIGA_4_ = NODE,12, A,-; -inst_CLK_OUT_PRE = NODE,4, C,-; -SM_AMIGA_2_ = NODE,9, B,-; -cpu_est_0_ = NODE,8, A,-; -cpu_est_1_ = NODE,12, G,-; -cpu_est_2_ = NODE,9, G,-; +CLK_CNT_P_0_ = NODE,5, F,-; +SM_AMIGA_5_ = NODE,12, G,-; +SM_AMIGA_7_ = NODE,8, C,-; +SM_AMIGA_1_ = NODE,0, F,-; +SM_AMIGA_0_ = NODE,9, C,-; +SM_AMIGA_6_ = NODE,4, C,-; +inst_CLK_000_D3 = NODE,9, G,-; +inst_CLK_000_D5 = NODE,5, G,-; +SM_AMIGA_3_ = NODE,5, C,-; +inst_CLK_000_D4 = NODE,9, E,-; +SM_AMIGA_4_ = NODE,5, A,-; +SM_AMIGA_2_ = NODE,1, C,-; +cpu_est_0_ = NODE,1, A,-; +cpu_est_1_ = NODE,12, A,-; +cpu_est_2_ = NODE,9, A,-; diff --git a/Logic/68030_tk.vct b/Logic/68030_tk.vct index ca85bcb..058001a 100644 --- a/Logic/68030_tk.vct +++ b/Logic/68030_tk.vct @@ -15,8 +15,8 @@ Voltage = 5.0; RCS = "$Revision: 1.2 $"; Parent = m4a5.lci; SDS_File = m4a5.sds; -DATE = 05/24/2014; -TIME = 21:28:20; +DATE = 05/25/2014; +TIME = 14:46:10; Source_Format = Pure_VHDL; Type = TT2; Pre_Fit_Time = 1; @@ -90,7 +90,7 @@ Max_Symbols = 32; [FITTER GLOBAL OPTIONS] Run_Time = 0; -Set_Reset_Dont_Care = No; +Set_Reset_Dont_Care = Yes; EN_Set_Reset_Dont_Care = Yes; In_Reg_Optimize = Yes; EN_In_Reg_Optimize = No; diff --git a/Logic/68030_tk.xrf b/Logic/68030_tk.xrf index 32d990c..afef560 100644 --- a/Logic/68030_tk.xrf +++ b/Logic/68030_tk.xrf @@ -2,7 +2,7 @@ Signal Name Cross Reference File ispLEVER Classic 1.7.00.05.28.13 -Design '68030_tk' created Sat May 24 21:59:14 2014 +Design '68030_tk' created Sun May 25 20:57:52 2014 LEGEND: '>' Functional Block Port Separator diff --git a/Logic/BUS68030.bl0 b/Logic/BUS68030.bl0 index 00c2f13..a03ab0a 100644 --- a/Logic/BUS68030.bl0 +++ b/Logic/BUS68030.bl0 @@ -1,151 +1,159 @@ -#$ DATE Sat May 24 21:59:14 2014 +#$ DATE Sun May 25 20:57:52 2014 #$ TOOL EDIF2BLIF version IspLever 1.0 #$ MODULE bus68030 -#$ PINS 59 IPL_030_1_ IPL_030_0_ SIZE_1_ IPL_1_ IPL_0_ A_31_ DSACK_0_ FC_0_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 nEXP_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS DTACK AVEC AVEC_EXP E VPA VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ -#$ NODES 398 BG_030_c BG_000DFFSHreg BGACK_000_c inst_BGACK_030_INTreg inst_FPU_CS_INTreg CLK_030_c inst_VMA_INTreg inst_AS_030_000_SYNC CLK_000_c inst_BGACK_030_INT_D \ -# inst_DTACK_SYNC CLK_OSZI_c inst_VPA_SYNC inst_CLK_000_D0 inst_CLK_000_D1 CLK_OUT_INTreg inst_CLK_000_D2 inst_CLK_000_D6 SM_AMIGA_5_ IPL_030DFFSH_0_reg \ -# vcc_n_n gnd_n_n IPL_030DFFSH_1_reg inst_AS_000_INT SM_AMIGA_6_ IPL_030DFFSH_2_reg inst_UDS_000_INT inst_LDS_000_INT ipl_c_0__n inst_DSACK1_INT \ -# inst_CLK_000_D3 ipl_c_1__n state_machine_un23_clk_000_d0_n inst_CLK_000_D5 ipl_c_2__n SM_AMIGA_3_ SM_AMIGA_0_ SM_AMIGA_1_ dsack_c_1__n inst_AS_000_DMA \ -# inst_DS_000_DMA DTACK_c SIZE_DMA_0_ SIZE_DMA_1_ inst_A0_DMA G_103 CLK_CNT_N_0_ VPA_c CLK_CNT_N_1_ G_109 \ -# CLK_CNT_P_0_ RST_c CLK_CNT_P_1_ inst_CLK_000_D4 RESETDFFRHreg SM_AMIGA_7_ state_machine_un15_clk_000_d0_n RW_c SM_AMIGA_4_ un1_AMIGA_BUS_ENABLE_0_sqmuxa_2 \ -# fc_c_0__n inst_CLK_OUT_PRE SM_AMIGA_2_ fc_c_1__n AMIGA_BUS_ENABLEDFFSHreg state_machine_un23_clk_000_d0_0_n state_machine_un6_bgack_000_0_n N_214_0 BG_030_c_i N_227_i \ -# state_machine_un10_bg_030_0_n N_215_0 N_216_0 N_126_i N_33_0 N_127_i N_35_0 state_machine_uds_000_int_5_0_n N_130_i state_machine_lds_000_int_5_0_n \ -# N_132_i N_131_i cpu_est_0_ cpu_est_1_ N_133_i cpu_est_2_ cpu_est_3_reg N_134_i N_137_i N_138_i \ -# sm_amiga_ns_0_5__n cpu_est_ns_1__n N_139_i cpu_est_ns_2__n N_140_i N_46_0 N_52 N_142_i N_59 N_141_i \ -# N_62 sm_amiga_ns_0_7__n N_65 N_144_i N_67 state_machine_ds_000_dma_5_0_n N_72 CLK_030_c_i N_77 AS_000_c_i \ -# N_88 N_59_i N_217 N_61_0 N_219 N_62_i N_221 CLK_000_D1_i N_224 N_65_i \ -# N_225 N_66_i N_226 N_67_i N_128 N_175_i N_130 un1_as_000_dma5_i_0__n N_132 state_machine_un6_clk_000_d5_i_n \ -# N_135 N_71_i N_136 DS_030_c_i N_138 N_73_i N_143 N_156_i N_145 un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i \ -# N_146 N_75_0 N_147 N_176_i N_148 N_52_0 N_151 N_173_i N_153 N_226_i \ -# N_154 N_77_0 N_155 N_72_i N_173 N_147_i cpu_est_ns_0_0_x2_1_ N_148_i AMIGA_BUS_DATA_DIR_m1_0_x2 cpu_est_ns_e_0_0__n \ -# N_228_1 N_146_i N_237 sm_amiga_ns_0_0__n N_247 N_88_i N_227 N_145_i N_228 cpu_est_ns_0_2__n \ -# N_127 N_143_i N_66 N_154_i N_175 N_161_i N_176 N_153_i N_75 N_155_i \ -# un1_AMIGA_BUS_ENABLE_1_sqmuxa_4 cpu_est_ns_0_1__n N_61 N_135_i N_156 N_136_i N_73 N_57 N_225_i N_71 \ -# un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0 state_machine_un6_clk_000_d5_n N_219_i un1_as_000_dma5_0__n N_221_i N_223 state_machine_un15_clk_000_d0_0_n state_machine_ds_000_dma_5_n N_144 N_66_i_1 \ -# N_141 N_66_i_2 N_142 N_66_i_3 N_139 N_66_i_4 N_140 N_66_i_5 N_137 N_237_1 \ -# N_134 N_237_2 N_133 N_247_1 N_131 N_247_2 state_machine_lds_000_int_5_n N_247_3 state_machine_uds_000_int_5_n N_247_4 \ -# N_35 N_247_5 N_33 N_247_6 N_126 N_52_0_1 N_216 N_52_0_2 N_215 N_224_1 \ -# state_machine_un10_bg_030_n N_224_2 N_214 N_227_1 state_machine_un6_bgack_000_n N_227_2 state_machine_un8_clk_000_d2_n N_228_1_0 SIZE_DMA_1_sqmuxa N_127_1 \ -# SIZE_DMA_0_sqmuxa N_127_2 AS_000_INT_1_sqmuxa N_151_1 N_249 SIZE_DMA_1_sqmuxa_1 CLK_000_D6_i state_machine_un8_clk_000_d2_1_n N_228_i sm_amiga_ns_0_1_0__n \ -# sm_amiga_i_5__n cpu_est_ns_0_1_1__n N_224_i N_138_1 N_223_i N_130_1 SIZE_DMA_0_sqmuxa_i N_128_1 SIZE_DMA_1_sqmuxa_i N_221_1 \ -# a_i_18__n N_219_1 a_i_16__n vpa_sync_0_un3_n a_i_19__n vpa_sync_0_un1_n AS_030_000_SYNC_i vpa_sync_0_un0_n CLK_000_D2_i as_000_int_0_un3_n \ -# BGACK_030_INT_i as_000_int_0_un1_n nEXP_SPACE_i as_000_int_0_un0_n AS_030_i as_000_dma_0_un3_n BGACK_030_INT_D_i as_000_dma_0_un1_n sm_amiga_i_7__n as_000_dma_0_un0_n \ -# state_machine_un8_clk_000_d2_i_n bg_000_0_un3_n sm_amiga_i_6__n bg_000_0_un1_n sm_amiga_i_4__n bg_000_0_un0_n CLK_000_D0_i a0_dma_0_un3_n RW_i a0_dma_0_un1_n \ -# UDS_000_i a0_dma_0_un0_n LDS_000_i dtack_sync_0_un3_n DTACK_i dtack_sync_0_un1_n VMA_INT_i dtack_sync_0_un0_n VPA_i lds_000_int_0_un3_n \ -# cpu_est_i_0__n lds_000_int_0_un1_n sm_amiga_i_3__n lds_000_int_0_un0_n cpu_est_i_3__n uds_000_int_0_un3_n cpu_est_i_1__n uds_000_int_0_un1_n A0_i uds_000_int_0_un0_n \ -# size_i_1__n fpu_cs_int_0_un3_n a_i_30__n fpu_cs_int_0_un1_n a_i_31__n fpu_cs_int_0_un0_n a_i_28__n ds_000_dma_0_un3_n a_i_29__n ds_000_dma_0_un1_n \ -# a_i_26__n ds_000_dma_0_un0_n a_i_27__n as_030_000_sync_0_un3_n a_i_24__n as_030_000_sync_0_un1_n a_i_25__n as_030_000_sync_0_un0_n RST_i size_dma_0_1__un3_n \ -# size_dma_0_1__un1_n CLK_OSZI_i size_dma_0_1__un0_n size_dma_0_0__un3_n FPU_CS_INT_i size_dma_0_0__un1_n AS_030_c size_dma_0_0__un0_n bgack_030_int_0_un3_n AS_000_c \ -# bgack_030_int_0_un1_n bgack_030_int_0_un0_n DS_030_c dsack1_int_0_un3_n dsack1_int_0_un1_n UDS_000_c dsack1_int_0_un0_n state_machine_uds_000_int_5_0_m2_un3_n LDS_000_c state_machine_uds_000_int_5_0_m2_un1_n \ -# state_machine_uds_000_int_5_0_m2_un0_n size_c_0__n cpu_est_ns_0_0_m2_2__un3_n cpu_est_ns_0_0_m2_2__un1_n size_c_1__n cpu_est_ns_0_0_m2_2__un0_n amiga_bus_enable_0_un3_n a_c_16__n amiga_bus_enable_0_un1_n amiga_bus_enable_0_un0_n \ -# a_c_17__n vma_int_0_un3_n vma_int_0_un1_n a_c_18__n vma_int_0_un0_n ipl_030_0_0__un3_n a_c_19__n ipl_030_0_0__un1_n ipl_030_0_0__un0_n a_c_20__n \ -# ipl_030_0_1__un3_n ipl_030_0_1__un1_n a_c_21__n ipl_030_0_1__un0_n ipl_030_0_2__un3_n a_c_22__n ipl_030_0_2__un1_n ipl_030_0_2__un0_n a_c_23__n cpu_estse_0_un3_n \ -# cpu_estse_0_un1_n a_c_24__n cpu_estse_0_un0_n cpu_estse_1_un3_n a_c_25__n cpu_estse_1_un1_n cpu_estse_1_un0_n a_c_26__n cpu_estse_2_un3_n cpu_estse_2_un1_n \ -# a_c_27__n cpu_estse_2_un0_n a_c_28__n a_c_29__n a_c_30__n a_c_31__n A0_c nEXP_SPACE_c +#$ PINS 59 SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 SIZE_0_ AS_000 A_30_ DS_030 A_29_ UDS_000 A_28_ LDS_000 A_27_ A0 A_26_ nEXP_SPACE A_25_ BERR A_24_ BG_030 A_23_ BG_000 A_22_ BGACK_030 A_21_ BGACK_000 A_20_ CLK_030 A_19_ CLK_000 A_18_ CLK_OSZI A_17_ CLK_DIV_OUT A_16_ CLK_EXP IPL_030_1_ FPU_CS IPL_030_0_ DTACK IPL_1_ AVEC IPL_0_ AVEC_EXP DSACK_0_ E FC_0_ VPA VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN +#$ NODES 428 A0_c lds_000_int_0_un0_n as_030_000_sync_0_un3_n nEXP_SPACE_c as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n ds_000_dma_0_un3_n BG_030_c ds_000_dma_0_un1_n ds_000_dma_0_un0_n \ +# inst_BGACK_030_INTreg BG_000DFFSHreg fpu_cs_int_0_un3_n inst_FPU_CS_INTreg fpu_cs_int_0_un1_n inst_VMA_INTreg fpu_cs_int_0_un0_n inst_AS_030_000_SYNC BGACK_000_c dtack_sync_0_un3_n \ +# inst_DTACK_SYNC dtack_sync_0_un1_n inst_VPA_SYNC CLK_030_c dtack_sync_0_un0_n inst_VPA_D a0_dma_0_un3_n inst_CLK_000_D0 CLK_000_c a0_dma_0_un1_n \ +# inst_CLK_000_D1 a0_dma_0_un0_n inst_CLK_000_D2 CLK_OSZI_c inst_CLK_000_D6 inst_CLK_OUT_PRE inst_BGACK_030_INT_D CLK_OUT_INTreg vcc_n_n gnd_n_n \ +# CLK_CNT_P_0_ IPL_030DFFSH_0_reg SM_AMIGA_5_ SM_AMIGA_7_ IPL_030DFFSH_1_reg A0_DMA_1_sqmuxa SM_AMIGA_1_ IPL_030DFFSH_2_reg SM_AMIGA_0_ SM_AMIGA_6_ \ +# ipl_c_0__n inst_AS_000_DMA inst_AS_000_INT ipl_c_1__n inst_UDS_000_INT inst_LDS_000_INT ipl_c_2__n inst_DSACK1_INT inst_CLK_000_D3 state_machine_un57_bgack_030_int_n \ +# dsack_c_1__n state_machine_un81_bgack_030_int_n inst_CLK_000_D5 DTACK_c SM_AMIGA_3_ state_machine_un6_bgack_000_n inst_DS_000_DMA SIZE_DMA_0_ SIZE_DMA_1_ inst_A0_DMA \ +# inst_CLK_000_D4 SM_AMIGA_4_ RST_c SM_AMIGA_2_ state_machine_un10_bg_030_n RESETDFFRHreg un1_AS_030_000_SYNC_1_sqmuxa_1 SIZE_DMA_0_sqmuxa RW_c state_machine_a0_dma_4_n \ +# un1_AMIGA_BUS_ENABLE_2_sqmuxa fc_c_0__n state_machine_lds_000_int_6_n state_machine_uds_000_int_6_n fc_c_1__n state_machine_ds_000_dma_5_n un1_AMIGA_BUS_ENABLE_1_sqmuxa_1 AMIGA_BUS_ENABLEDFFSHreg AMIGA_BUS_DATA_DIR_c cpu_est_ns_0_1__n \ +# N_165_i N_166_i N_242_i N_243_i N_70_0 N_94_i N_222_i N_100_i AS_030_000_SYNC_i AMIGA_BUS_ENABLE_1_sqmuxa_1_i \ +# AMIGA_BUS_ENABLE_1_sqmuxa_2_i un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_0 AMIGA_BUS_ENABLE_0_sqmuxa_2_i AMIGA_BUS_ENABLE_2_sqmuxa_i CLK_OUT_PRE_0 un1_AMIGA_BUS_ENABLE_2_sqmuxa_0 BG_030_c_i state_machine_un8_bg_030_i_n state_machine_un10_bg_030_0_n N_82_i \ +# N_100 DS_030_c_i cpu_est_0_ N_80_0 cpu_est_1_ N_79_0 cpu_est_2_ A0_DMA_0_sqmuxa_i_0_0 cpu_est_3_reg N_77_i \ +# N_76_i N_75_i N_162_i un1_AS_030_000_SYNC_1_sqmuxa_1_0 cpu_est_ns_1__n N_72_i cpu_est_ns_2__n CLK_030_c_i A0_DMA_0_sqmuxa_i_0 N_71_i \ +# N_221 N_69_i N_223 CLK_000_D1_i N_224 N_68_i N_225 N_161_i N_31 N_63_i \ +# N_33 N_61_i N_35 N_156_i N_37 N_157_i N_61 cpu_est_ns_e_0_0__n N_62 N_152_i \ +# N_63 N_153_i N_68 N_154_i N_69 sm_amiga_ns_e_0_0__n N_72 N_149_i N_75 N_150_i \ +# N_76 N_151_i N_77 sm_amiga_ns_e_0_1__n N_79 N_146_i N_80 N_147_i N_82 N_148_i \ +# N_92 cpu_est_ns_0_2__n N_93 N_145_i N_94 state_machine_ds_000_dma_5_0_n N_95 N_143_i N_96 N_144_i \ +# N_97 AMIGA_BUS_DATA_DIR_c_0 N_106 N_142_i N_107 N_246_i N_125 N_176_i N_231 N_160_i \ +# N_232 N_240_i N_233 N_234 N_238_i N_235 N_236 N_163_i N_238 N_236_i \ +# N_240 N_242 N_234_i N_243 N_235_i N_246 sm_amiga_ns_e_0_5__n N_142 N_167_i N_143 \ +# N_233_i N_144 N_145 N_231_i N_146 N_232_i N_147 sm_amiga_ns_e_0_7__n N_148 state_machine_uds_000_int_6_0_n \ +# N_149 N_125_i N_150 state_machine_lds_000_int_6_0_n N_151 N_37_0 N_152 N_107_i N_153 N_35_0 \ +# N_154 N_106_i N_155 N_33_0 N_156 N_164_i N_157 N_31_0 N_160 N_225_0 \ +# N_161 N_224_0 N_162 N_223_0 N_163 N_92_i N_164 N_93_i N_165 N_221_0 \ +# N_166 state_machine_un6_bgack_000_0_n N_167 CLK_000_D2_i AMIGA_BUS_ENABLE_1_sqmuxa_1 state_machine_un57_bgack_030_int_0_n AMIGA_BUS_ENABLE_2_sqmuxa N_255_1 state_machine_un8_bg_030_n N_255_2 \ +# AMIGA_BUS_ENABLE_0_sqmuxa_2 N_265_1 AMIGA_BUS_ENABLE_1_sqmuxa_2 N_265_2 N_70 N_265_3 N_222 N_265_4 N_255 N_265_5 \ +# N_265 N_265_6 VMA_INT_i N_69_i_1 VPA_D_i N_69_i_2 DTACK_i N_69_i_3 LDS_000_i N_69_i_4 \ +# AS_000_i N_69_i_5 nEXP_SPACE_i A0_DMA_0_sqmuxa_i_0_0_1 AS_030_i N_82_i_1 BGACK_030_INT_i AMIGA_BUS_ENABLE_0_sqmuxa_2_1 BGACK_030_INT_D_i N_100_i_1 \ +# sm_amiga_i_4__n N_100_i_2 cpu_est_i_3__n state_machine_un8_bg_030_1_n sm_amiga_i_5__n state_machine_un8_bg_030_2_n CLK_000_D0_i cpu_est_ns_0_1_1__n state_machine_un81_bgack_030_int_i_n cpu_est_ns_0_2_1__n \ +# cpu_est_i_0__n state_machine_a0_dma_4_1_n cpu_est_i_1__n state_machine_a0_dma_4_2_n UDS_000_i N_107_1 AS_000_DMA_i N_107_2 RW_i N_97_1 \ +# cpu_est_i_2__n N_97_2 sm_amiga_i_3__n N_95_1 sm_amiga_i_1__n N_95_2 A0_i N_95_3 size_i_1__n sm_amiga_ns_e_0_1_0__n \ +# sm_amiga_i_0__n sm_amiga_ns_e_0_1_1__n a_i_30__n cpu_est_ns_0_1_2__n a_i_31__n N_155_1 a_i_28__n N_153_1 a_i_29__n N_151_1 \ +# a_i_26__n N_144_1 a_i_27__n N_125_1 a_i_24__n SIZE_DMA_0_sqmuxa_1 a_i_25__n N_96_1 a_i_19__n N_93_1 \ +# a_i_16__n state_machine_lds_000_int_6_0_m2_un3_n a_i_18__n state_machine_lds_000_int_6_0_m2_un1_n RST_i state_machine_lds_000_int_6_0_m2_un0_n cpu_estse_0_un3_n SIZE_DMA_0_sqmuxa_i cpu_estse_0_un1_n N_95_i \ +# cpu_estse_0_un0_n N_96_i cpu_estse_1_un3_n N_97_i cpu_estse_1_un1_n FPU_CS_INT_i cpu_estse_1_un0_n CLK_000_D6_i cpu_estse_2_un3_n AS_030_c \ +# cpu_estse_2_un1_n cpu_estse_2_un0_n AS_000_c bg_000_0_un3_n bg_000_0_un1_n DS_030_c bg_000_0_un0_n dsack1_int_0_un3_n UDS_000_c dsack1_int_0_un1_n \ +# dsack1_int_0_un0_n LDS_000_c as_000_dma_0_un3_n as_000_dma_0_un1_n size_c_0__n as_000_dma_0_un0_n as_000_int_0_un3_n size_c_1__n as_000_int_0_un1_n as_000_int_0_un0_n \ +# a_c_16__n vpa_sync_0_un3_n vpa_sync_0_un1_n a_c_17__n vpa_sync_0_un0_n vma_int_0_un3_n a_c_18__n vma_int_0_un1_n vma_int_0_un0_n a_c_19__n \ +# bgack_030_int_0_un3_n bgack_030_int_0_un1_n a_c_20__n bgack_030_int_0_un0_n size_dma_0_0__un3_n a_c_21__n size_dma_0_0__un1_n size_dma_0_0__un0_n a_c_22__n size_dma_0_1__un3_n \ +# size_dma_0_1__un1_n a_c_23__n size_dma_0_1__un0_n ipl_030_0_0__un3_n a_c_24__n ipl_030_0_0__un1_n ipl_030_0_0__un0_n a_c_25__n ipl_030_0_1__un3_n ipl_030_0_1__un1_n \ +# a_c_26__n ipl_030_0_1__un0_n ipl_030_0_2__un3_n a_c_27__n ipl_030_0_2__un1_n ipl_030_0_2__un0_n a_c_28__n amiga_bus_enable_0_un3_n amiga_bus_enable_0_un1_n a_c_29__n \ +# amiga_bus_enable_0_un0_n uds_000_int_0_un3_n a_c_30__n uds_000_int_0_un1_n uds_000_int_0_un0_n a_c_31__n lds_000_int_0_un3_n lds_000_int_0_un1_n .model bus68030 .inputs A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF \ VPA.BLIF RST.BLIF RW.BLIF A_30_.BLIF A_29_.BLIF A_28_.BLIF A_27_.BLIF A_26_.BLIF A_25_.BLIF \ A_24_.BLIF A_23_.BLIF A_22_.BLIF A_21_.BLIF A_20_.BLIF A_19_.BLIF A_18_.BLIF A_17_.BLIF A_16_.BLIF \ - IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF SIZE_1_.BLIF DSACK_1_.BLIF AS_030.BLIF AS_000.BLIF DS_030.BLIF UDS_000.BLIF LDS_000.BLIF A0.BLIF DTACK.BLIF SIZE_0_.BLIF DSACK_0_.BLIF BG_030_c.BLIF BG_000DFFSHreg.BLIF BGACK_000_c.BLIF inst_BGACK_030_INTreg.BLIF inst_FPU_CS_INTreg.BLIF CLK_030_c.BLIF \ - inst_VMA_INTreg.BLIF inst_AS_030_000_SYNC.BLIF CLK_000_c.BLIF inst_BGACK_030_INT_D.BLIF inst_DTACK_SYNC.BLIF CLK_OSZI_c.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \ - CLK_OUT_INTreg.BLIF inst_CLK_000_D2.BLIF inst_CLK_000_D6.BLIF SM_AMIGA_5_.BLIF IPL_030DFFSH_0_reg.BLIF vcc_n_n.BLIF gnd_n_n.BLIF IPL_030DFFSH_1_reg.BLIF inst_AS_000_INT.BLIF \ - SM_AMIGA_6_.BLIF IPL_030DFFSH_2_reg.BLIF inst_UDS_000_INT.BLIF inst_LDS_000_INT.BLIF ipl_c_0__n.BLIF inst_DSACK1_INT.BLIF inst_CLK_000_D3.BLIF ipl_c_1__n.BLIF state_machine_un23_clk_000_d0_n.BLIF \ - inst_CLK_000_D5.BLIF ipl_c_2__n.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_1_.BLIF dsack_c_1__n.BLIF inst_AS_000_DMA.BLIF inst_DS_000_DMA.BLIF DTACK_c.BLIF \ - SIZE_DMA_0_.BLIF SIZE_DMA_1_.BLIF inst_A0_DMA.BLIF G_103.BLIF CLK_CNT_N_0_.BLIF VPA_c.BLIF CLK_CNT_N_1_.BLIF G_109.BLIF CLK_CNT_P_0_.BLIF \ - RST_c.BLIF CLK_CNT_P_1_.BLIF inst_CLK_000_D4.BLIF RESETDFFRHreg.BLIF SM_AMIGA_7_.BLIF state_machine_un15_clk_000_d0_n.BLIF RW_c.BLIF SM_AMIGA_4_.BLIF un1_AMIGA_BUS_ENABLE_0_sqmuxa_2.BLIF \ - fc_c_0__n.BLIF inst_CLK_OUT_PRE.BLIF SM_AMIGA_2_.BLIF fc_c_1__n.BLIF AMIGA_BUS_ENABLEDFFSHreg.BLIF state_machine_un23_clk_000_d0_0_n.BLIF state_machine_un6_bgack_000_0_n.BLIF N_214_0.BLIF BG_030_c_i.BLIF \ - N_227_i.BLIF state_machine_un10_bg_030_0_n.BLIF N_215_0.BLIF N_216_0.BLIF N_126_i.BLIF N_33_0.BLIF N_127_i.BLIF N_35_0.BLIF state_machine_uds_000_int_5_0_n.BLIF \ - N_130_i.BLIF state_machine_lds_000_int_5_0_n.BLIF N_132_i.BLIF N_131_i.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF N_133_i.BLIF cpu_est_2_.BLIF cpu_est_3_reg.BLIF \ - N_134_i.BLIF N_137_i.BLIF N_138_i.BLIF sm_amiga_ns_0_5__n.BLIF cpu_est_ns_1__n.BLIF N_139_i.BLIF cpu_est_ns_2__n.BLIF N_140_i.BLIF N_46_0.BLIF \ - N_52.BLIF N_142_i.BLIF N_59.BLIF N_141_i.BLIF N_62.BLIF sm_amiga_ns_0_7__n.BLIF N_65.BLIF N_144_i.BLIF N_67.BLIF \ - state_machine_ds_000_dma_5_0_n.BLIF N_72.BLIF CLK_030_c_i.BLIF N_77.BLIF AS_000_c_i.BLIF N_88.BLIF N_59_i.BLIF N_217.BLIF N_61_0.BLIF \ - N_219.BLIF N_62_i.BLIF N_221.BLIF CLK_000_D1_i.BLIF N_224.BLIF N_65_i.BLIF N_225.BLIF N_66_i.BLIF N_226.BLIF \ - N_67_i.BLIF N_128.BLIF N_175_i.BLIF N_130.BLIF un1_as_000_dma5_i_0__n.BLIF N_132.BLIF state_machine_un6_clk_000_d5_i_n.BLIF N_135.BLIF N_71_i.BLIF \ - N_136.BLIF DS_030_c_i.BLIF N_138.BLIF N_73_i.BLIF N_143.BLIF N_156_i.BLIF N_145.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i.BLIF N_146.BLIF \ - N_75_0.BLIF N_147.BLIF N_176_i.BLIF N_148.BLIF N_52_0.BLIF N_151.BLIF N_173_i.BLIF N_153.BLIF N_226_i.BLIF \ - N_154.BLIF N_77_0.BLIF N_155.BLIF N_72_i.BLIF N_173.BLIF N_147_i.BLIF cpu_est_ns_0_0_x2_1_.BLIF N_148_i.BLIF AMIGA_BUS_DATA_DIR_m1_0_x2.BLIF \ - cpu_est_ns_e_0_0__n.BLIF N_228_1.BLIF N_146_i.BLIF N_237.BLIF sm_amiga_ns_0_0__n.BLIF N_247.BLIF N_88_i.BLIF N_227.BLIF N_145_i.BLIF \ - N_228.BLIF cpu_est_ns_0_2__n.BLIF N_127.BLIF N_143_i.BLIF N_66.BLIF N_154_i.BLIF N_175.BLIF N_161_i.BLIF N_176.BLIF \ - N_153_i.BLIF N_75.BLIF N_155_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_4.BLIF cpu_est_ns_0_1__n.BLIF N_61.BLIF N_135_i.BLIF N_156.BLIF N_136_i.BLIF \ - N_73.BLIF N_57.BLIF N_225_i.BLIF N_71.BLIF un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0.BLIF state_machine_un6_clk_000_d5_n.BLIF N_219_i.BLIF un1_as_000_dma5_0__n.BLIF N_221_i.BLIF \ - N_223.BLIF state_machine_un15_clk_000_d0_0_n.BLIF state_machine_ds_000_dma_5_n.BLIF N_144.BLIF N_66_i_1.BLIF N_141.BLIF N_66_i_2.BLIF N_142.BLIF N_66_i_3.BLIF \ - N_139.BLIF N_66_i_4.BLIF N_140.BLIF N_66_i_5.BLIF N_137.BLIF N_237_1.BLIF N_134.BLIF N_237_2.BLIF N_133.BLIF \ - N_247_1.BLIF N_131.BLIF N_247_2.BLIF state_machine_lds_000_int_5_n.BLIF N_247_3.BLIF state_machine_uds_000_int_5_n.BLIF N_247_4.BLIF N_35.BLIF N_247_5.BLIF \ - N_33.BLIF N_247_6.BLIF N_126.BLIF N_52_0_1.BLIF N_216.BLIF N_52_0_2.BLIF N_215.BLIF N_224_1.BLIF state_machine_un10_bg_030_n.BLIF \ - N_224_2.BLIF N_214.BLIF N_227_1.BLIF state_machine_un6_bgack_000_n.BLIF N_227_2.BLIF state_machine_un8_clk_000_d2_n.BLIF N_228_1_0.BLIF SIZE_DMA_1_sqmuxa.BLIF N_127_1.BLIF \ - SIZE_DMA_0_sqmuxa.BLIF N_127_2.BLIF AS_000_INT_1_sqmuxa.BLIF N_151_1.BLIF N_249.BLIF SIZE_DMA_1_sqmuxa_1.BLIF CLK_000_D6_i.BLIF state_machine_un8_clk_000_d2_1_n.BLIF N_228_i.BLIF \ - sm_amiga_ns_0_1_0__n.BLIF sm_amiga_i_5__n.BLIF cpu_est_ns_0_1_1__n.BLIF N_224_i.BLIF N_138_1.BLIF N_223_i.BLIF N_130_1.BLIF SIZE_DMA_0_sqmuxa_i.BLIF N_128_1.BLIF \ - SIZE_DMA_1_sqmuxa_i.BLIF N_221_1.BLIF a_i_18__n.BLIF N_219_1.BLIF a_i_16__n.BLIF vpa_sync_0_un3_n.BLIF a_i_19__n.BLIF vpa_sync_0_un1_n.BLIF AS_030_000_SYNC_i.BLIF \ - vpa_sync_0_un0_n.BLIF CLK_000_D2_i.BLIF as_000_int_0_un3_n.BLIF BGACK_030_INT_i.BLIF as_000_int_0_un1_n.BLIF nEXP_SPACE_i.BLIF as_000_int_0_un0_n.BLIF AS_030_i.BLIF as_000_dma_0_un3_n.BLIF \ - BGACK_030_INT_D_i.BLIF as_000_dma_0_un1_n.BLIF sm_amiga_i_7__n.BLIF as_000_dma_0_un0_n.BLIF state_machine_un8_clk_000_d2_i_n.BLIF bg_000_0_un3_n.BLIF sm_amiga_i_6__n.BLIF bg_000_0_un1_n.BLIF sm_amiga_i_4__n.BLIF \ - bg_000_0_un0_n.BLIF CLK_000_D0_i.BLIF a0_dma_0_un3_n.BLIF RW_i.BLIF a0_dma_0_un1_n.BLIF UDS_000_i.BLIF a0_dma_0_un0_n.BLIF LDS_000_i.BLIF dtack_sync_0_un3_n.BLIF \ - DTACK_i.BLIF dtack_sync_0_un1_n.BLIF VMA_INT_i.BLIF dtack_sync_0_un0_n.BLIF VPA_i.BLIF lds_000_int_0_un3_n.BLIF cpu_est_i_0__n.BLIF lds_000_int_0_un1_n.BLIF sm_amiga_i_3__n.BLIF \ - lds_000_int_0_un0_n.BLIF cpu_est_i_3__n.BLIF uds_000_int_0_un3_n.BLIF cpu_est_i_1__n.BLIF uds_000_int_0_un1_n.BLIF A0_i.BLIF uds_000_int_0_un0_n.BLIF size_i_1__n.BLIF fpu_cs_int_0_un3_n.BLIF \ - a_i_30__n.BLIF fpu_cs_int_0_un1_n.BLIF a_i_31__n.BLIF fpu_cs_int_0_un0_n.BLIF a_i_28__n.BLIF ds_000_dma_0_un3_n.BLIF a_i_29__n.BLIF ds_000_dma_0_un1_n.BLIF a_i_26__n.BLIF \ - ds_000_dma_0_un0_n.BLIF a_i_27__n.BLIF as_030_000_sync_0_un3_n.BLIF a_i_24__n.BLIF as_030_000_sync_0_un1_n.BLIF a_i_25__n.BLIF as_030_000_sync_0_un0_n.BLIF RST_i.BLIF size_dma_0_1__un3_n.BLIF \ - size_dma_0_1__un1_n.BLIF CLK_OSZI_i.BLIF size_dma_0_1__un0_n.BLIF size_dma_0_0__un3_n.BLIF FPU_CS_INT_i.BLIF size_dma_0_0__un1_n.BLIF AS_030_c.BLIF size_dma_0_0__un0_n.BLIF bgack_030_int_0_un3_n.BLIF \ - AS_000_c.BLIF bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF DS_030_c.BLIF dsack1_int_0_un3_n.BLIF dsack1_int_0_un1_n.BLIF UDS_000_c.BLIF dsack1_int_0_un0_n.BLIF state_machine_uds_000_int_5_0_m2_un3_n.BLIF \ - LDS_000_c.BLIF state_machine_uds_000_int_5_0_m2_un1_n.BLIF state_machine_uds_000_int_5_0_m2_un0_n.BLIF size_c_0__n.BLIF cpu_est_ns_0_0_m2_2__un3_n.BLIF cpu_est_ns_0_0_m2_2__un1_n.BLIF size_c_1__n.BLIF cpu_est_ns_0_0_m2_2__un0_n.BLIF amiga_bus_enable_0_un3_n.BLIF \ - a_c_16__n.BLIF amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF a_c_17__n.BLIF vma_int_0_un3_n.BLIF vma_int_0_un1_n.BLIF a_c_18__n.BLIF vma_int_0_un0_n.BLIF ipl_030_0_0__un3_n.BLIF \ - a_c_19__n.BLIF ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF a_c_20__n.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un1_n.BLIF a_c_21__n.BLIF ipl_030_0_1__un0_n.BLIF ipl_030_0_2__un3_n.BLIF \ - a_c_22__n.BLIF ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF a_c_23__n.BLIF cpu_estse_0_un3_n.BLIF cpu_estse_0_un1_n.BLIF a_c_24__n.BLIF cpu_estse_0_un0_n.BLIF cpu_estse_1_un3_n.BLIF \ - a_c_25__n.BLIF cpu_estse_1_un1_n.BLIF cpu_estse_1_un0_n.BLIF a_c_26__n.BLIF cpu_estse_2_un3_n.BLIF cpu_estse_2_un1_n.BLIF a_c_27__n.BLIF cpu_estse_2_un0_n.BLIF a_c_28__n.BLIF \ - a_c_29__n.BLIF a_c_30__n.BLIF a_c_31__n.BLIF A0_c.BLIF nEXP_SPACE_c.BLIF AS_030.PIN AS_000.PIN DS_030.PIN UDS_000.PIN \ - LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN A0.PIN DSACK_1_.PIN DTACK.PIN + IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF SIZE_1_.BLIF DSACK_1_.BLIF AS_030.BLIF AS_000.BLIF DS_030.BLIF UDS_000.BLIF LDS_000.BLIF A0.BLIF DTACK.BLIF SIZE_0_.BLIF DSACK_0_.BLIF A0_c.BLIF lds_000_int_0_un0_n.BLIF as_030_000_sync_0_un3_n.BLIF nEXP_SPACE_c.BLIF as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF \ + ds_000_dma_0_un3_n.BLIF BG_030_c.BLIF ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF inst_BGACK_030_INTreg.BLIF BG_000DFFSHreg.BLIF fpu_cs_int_0_un3_n.BLIF inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un1_n.BLIF \ + inst_VMA_INTreg.BLIF fpu_cs_int_0_un0_n.BLIF inst_AS_030_000_SYNC.BLIF BGACK_000_c.BLIF dtack_sync_0_un3_n.BLIF inst_DTACK_SYNC.BLIF dtack_sync_0_un1_n.BLIF inst_VPA_SYNC.BLIF CLK_030_c.BLIF \ + dtack_sync_0_un0_n.BLIF inst_VPA_D.BLIF a0_dma_0_un3_n.BLIF inst_CLK_000_D0.BLIF CLK_000_c.BLIF a0_dma_0_un1_n.BLIF inst_CLK_000_D1.BLIF a0_dma_0_un0_n.BLIF inst_CLK_000_D2.BLIF \ + CLK_OSZI_c.BLIF inst_CLK_000_D6.BLIF inst_CLK_OUT_PRE.BLIF inst_BGACK_030_INT_D.BLIF CLK_OUT_INTreg.BLIF vcc_n_n.BLIF gnd_n_n.BLIF CLK_CNT_P_0_.BLIF IPL_030DFFSH_0_reg.BLIF \ + SM_AMIGA_5_.BLIF SM_AMIGA_7_.BLIF IPL_030DFFSH_1_reg.BLIF A0_DMA_1_sqmuxa.BLIF SM_AMIGA_1_.BLIF IPL_030DFFSH_2_reg.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_6_.BLIF ipl_c_0__n.BLIF \ + inst_AS_000_DMA.BLIF inst_AS_000_INT.BLIF ipl_c_1__n.BLIF inst_UDS_000_INT.BLIF inst_LDS_000_INT.BLIF ipl_c_2__n.BLIF inst_DSACK1_INT.BLIF inst_CLK_000_D3.BLIF state_machine_un57_bgack_030_int_n.BLIF \ + dsack_c_1__n.BLIF state_machine_un81_bgack_030_int_n.BLIF inst_CLK_000_D5.BLIF DTACK_c.BLIF SM_AMIGA_3_.BLIF state_machine_un6_bgack_000_n.BLIF inst_DS_000_DMA.BLIF SIZE_DMA_0_.BLIF SIZE_DMA_1_.BLIF \ + inst_A0_DMA.BLIF inst_CLK_000_D4.BLIF SM_AMIGA_4_.BLIF RST_c.BLIF SM_AMIGA_2_.BLIF state_machine_un10_bg_030_n.BLIF RESETDFFRHreg.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1.BLIF SIZE_DMA_0_sqmuxa.BLIF \ + RW_c.BLIF state_machine_a0_dma_4_n.BLIF un1_AMIGA_BUS_ENABLE_2_sqmuxa.BLIF fc_c_0__n.BLIF state_machine_lds_000_int_6_n.BLIF state_machine_uds_000_int_6_n.BLIF fc_c_1__n.BLIF state_machine_ds_000_dma_5_n.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_1.BLIF \ + AMIGA_BUS_ENABLEDFFSHreg.BLIF AMIGA_BUS_DATA_DIR_c.BLIF cpu_est_ns_0_1__n.BLIF N_165_i.BLIF N_166_i.BLIF N_242_i.BLIF N_243_i.BLIF N_70_0.BLIF N_94_i.BLIF \ + N_222_i.BLIF N_100_i.BLIF AS_030_000_SYNC_i.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_1_i.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_2_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_0.BLIF AMIGA_BUS_ENABLE_0_sqmuxa_2_i.BLIF AMIGA_BUS_ENABLE_2_sqmuxa_i.BLIF CLK_OUT_PRE_0.BLIF \ + un1_AMIGA_BUS_ENABLE_2_sqmuxa_0.BLIF BG_030_c_i.BLIF state_machine_un8_bg_030_i_n.BLIF state_machine_un10_bg_030_0_n.BLIF N_82_i.BLIF N_100.BLIF DS_030_c_i.BLIF cpu_est_0_.BLIF N_80_0.BLIF \ + cpu_est_1_.BLIF N_79_0.BLIF cpu_est_2_.BLIF A0_DMA_0_sqmuxa_i_0_0.BLIF cpu_est_3_reg.BLIF N_77_i.BLIF N_76_i.BLIF N_75_i.BLIF N_162_i.BLIF \ + un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF cpu_est_ns_1__n.BLIF N_72_i.BLIF cpu_est_ns_2__n.BLIF CLK_030_c_i.BLIF A0_DMA_0_sqmuxa_i_0.BLIF N_71_i.BLIF N_221.BLIF N_69_i.BLIF \ + N_223.BLIF CLK_000_D1_i.BLIF N_224.BLIF N_68_i.BLIF N_225.BLIF N_161_i.BLIF N_31.BLIF N_63_i.BLIF N_33.BLIF \ + N_61_i.BLIF N_35.BLIF N_156_i.BLIF N_37.BLIF N_157_i.BLIF N_61.BLIF cpu_est_ns_e_0_0__n.BLIF N_62.BLIF N_152_i.BLIF \ + N_63.BLIF N_153_i.BLIF N_68.BLIF N_154_i.BLIF N_69.BLIF sm_amiga_ns_e_0_0__n.BLIF N_72.BLIF N_149_i.BLIF N_75.BLIF \ + N_150_i.BLIF N_76.BLIF N_151_i.BLIF N_77.BLIF sm_amiga_ns_e_0_1__n.BLIF N_79.BLIF N_146_i.BLIF N_80.BLIF N_147_i.BLIF \ + N_82.BLIF N_148_i.BLIF N_92.BLIF cpu_est_ns_0_2__n.BLIF N_93.BLIF N_145_i.BLIF N_94.BLIF state_machine_ds_000_dma_5_0_n.BLIF N_95.BLIF \ + N_143_i.BLIF N_96.BLIF N_144_i.BLIF N_97.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF N_106.BLIF N_142_i.BLIF N_107.BLIF N_246_i.BLIF \ + N_125.BLIF N_176_i.BLIF N_231.BLIF N_160_i.BLIF N_232.BLIF N_240_i.BLIF N_233.BLIF N_234.BLIF N_238_i.BLIF \ + N_235.BLIF N_236.BLIF N_163_i.BLIF N_238.BLIF N_236_i.BLIF N_240.BLIF N_242.BLIF N_234_i.BLIF N_243.BLIF \ + N_235_i.BLIF N_246.BLIF sm_amiga_ns_e_0_5__n.BLIF N_142.BLIF N_167_i.BLIF N_143.BLIF N_233_i.BLIF N_144.BLIF N_145.BLIF \ + N_231_i.BLIF N_146.BLIF N_232_i.BLIF N_147.BLIF sm_amiga_ns_e_0_7__n.BLIF N_148.BLIF state_machine_uds_000_int_6_0_n.BLIF N_149.BLIF N_125_i.BLIF \ + N_150.BLIF state_machine_lds_000_int_6_0_n.BLIF N_151.BLIF N_37_0.BLIF N_152.BLIF N_107_i.BLIF N_153.BLIF N_35_0.BLIF N_154.BLIF \ + N_106_i.BLIF N_155.BLIF N_33_0.BLIF N_156.BLIF N_164_i.BLIF N_157.BLIF N_31_0.BLIF N_160.BLIF N_225_0.BLIF \ + N_161.BLIF N_224_0.BLIF N_162.BLIF N_223_0.BLIF N_163.BLIF N_92_i.BLIF N_164.BLIF N_93_i.BLIF N_165.BLIF \ + N_221_0.BLIF N_166.BLIF state_machine_un6_bgack_000_0_n.BLIF N_167.BLIF CLK_000_D2_i.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_1.BLIF state_machine_un57_bgack_030_int_0_n.BLIF AMIGA_BUS_ENABLE_2_sqmuxa.BLIF N_255_1.BLIF \ + state_machine_un8_bg_030_n.BLIF N_255_2.BLIF AMIGA_BUS_ENABLE_0_sqmuxa_2.BLIF N_265_1.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_2.BLIF N_265_2.BLIF N_70.BLIF N_265_3.BLIF N_222.BLIF \ + N_265_4.BLIF N_255.BLIF N_265_5.BLIF N_265.BLIF N_265_6.BLIF VMA_INT_i.BLIF N_69_i_1.BLIF VPA_D_i.BLIF N_69_i_2.BLIF \ + DTACK_i.BLIF N_69_i_3.BLIF LDS_000_i.BLIF N_69_i_4.BLIF AS_000_i.BLIF N_69_i_5.BLIF nEXP_SPACE_i.BLIF A0_DMA_0_sqmuxa_i_0_0_1.BLIF AS_030_i.BLIF \ + N_82_i_1.BLIF BGACK_030_INT_i.BLIF AMIGA_BUS_ENABLE_0_sqmuxa_2_1.BLIF BGACK_030_INT_D_i.BLIF N_100_i_1.BLIF sm_amiga_i_4__n.BLIF N_100_i_2.BLIF cpu_est_i_3__n.BLIF state_machine_un8_bg_030_1_n.BLIF \ + sm_amiga_i_5__n.BLIF state_machine_un8_bg_030_2_n.BLIF CLK_000_D0_i.BLIF cpu_est_ns_0_1_1__n.BLIF state_machine_un81_bgack_030_int_i_n.BLIF cpu_est_ns_0_2_1__n.BLIF cpu_est_i_0__n.BLIF state_machine_a0_dma_4_1_n.BLIF cpu_est_i_1__n.BLIF \ + state_machine_a0_dma_4_2_n.BLIF UDS_000_i.BLIF N_107_1.BLIF AS_000_DMA_i.BLIF N_107_2.BLIF RW_i.BLIF N_97_1.BLIF cpu_est_i_2__n.BLIF N_97_2.BLIF \ + sm_amiga_i_3__n.BLIF N_95_1.BLIF sm_amiga_i_1__n.BLIF N_95_2.BLIF A0_i.BLIF N_95_3.BLIF size_i_1__n.BLIF sm_amiga_ns_e_0_1_0__n.BLIF sm_amiga_i_0__n.BLIF \ + sm_amiga_ns_e_0_1_1__n.BLIF a_i_30__n.BLIF cpu_est_ns_0_1_2__n.BLIF a_i_31__n.BLIF N_155_1.BLIF a_i_28__n.BLIF N_153_1.BLIF a_i_29__n.BLIF N_151_1.BLIF \ + a_i_26__n.BLIF N_144_1.BLIF a_i_27__n.BLIF N_125_1.BLIF a_i_24__n.BLIF SIZE_DMA_0_sqmuxa_1.BLIF a_i_25__n.BLIF N_96_1.BLIF a_i_19__n.BLIF \ + N_93_1.BLIF a_i_16__n.BLIF state_machine_lds_000_int_6_0_m2_un3_n.BLIF a_i_18__n.BLIF state_machine_lds_000_int_6_0_m2_un1_n.BLIF RST_i.BLIF state_machine_lds_000_int_6_0_m2_un0_n.BLIF cpu_estse_0_un3_n.BLIF SIZE_DMA_0_sqmuxa_i.BLIF \ + cpu_estse_0_un1_n.BLIF N_95_i.BLIF cpu_estse_0_un0_n.BLIF N_96_i.BLIF cpu_estse_1_un3_n.BLIF N_97_i.BLIF cpu_estse_1_un1_n.BLIF FPU_CS_INT_i.BLIF cpu_estse_1_un0_n.BLIF \ + CLK_000_D6_i.BLIF cpu_estse_2_un3_n.BLIF AS_030_c.BLIF cpu_estse_2_un1_n.BLIF cpu_estse_2_un0_n.BLIF AS_000_c.BLIF bg_000_0_un3_n.BLIF bg_000_0_un1_n.BLIF DS_030_c.BLIF \ + bg_000_0_un0_n.BLIF dsack1_int_0_un3_n.BLIF UDS_000_c.BLIF dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF LDS_000_c.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un1_n.BLIF size_c_0__n.BLIF \ + as_000_dma_0_un0_n.BLIF as_000_int_0_un3_n.BLIF size_c_1__n.BLIF as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF a_c_16__n.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un1_n.BLIF a_c_17__n.BLIF \ + vpa_sync_0_un0_n.BLIF vma_int_0_un3_n.BLIF a_c_18__n.BLIF vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF a_c_19__n.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un1_n.BLIF a_c_20__n.BLIF \ + bgack_030_int_0_un0_n.BLIF size_dma_0_0__un3_n.BLIF a_c_21__n.BLIF size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF a_c_22__n.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un1_n.BLIF a_c_23__n.BLIF \ + size_dma_0_1__un0_n.BLIF ipl_030_0_0__un3_n.BLIF a_c_24__n.BLIF ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF a_c_25__n.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un1_n.BLIF a_c_26__n.BLIF \ + ipl_030_0_1__un0_n.BLIF ipl_030_0_2__un3_n.BLIF a_c_27__n.BLIF ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF a_c_28__n.BLIF amiga_bus_enable_0_un3_n.BLIF amiga_bus_enable_0_un1_n.BLIF a_c_29__n.BLIF \ + amiga_bus_enable_0_un0_n.BLIF uds_000_int_0_un3_n.BLIF a_c_30__n.BLIF uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF a_c_31__n.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un1_n.BLIF AS_030.PIN \ + AS_000.PIN DS_030.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN A0.PIN DSACK_1_.PIN DTACK.PIN .outputs IPL_030_2_ BERR BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS AVEC AVEC_EXP E VMA \ - RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ cpu_est_1_.D cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.D \ - cpu_est_2_.C cpu_est_2_.AR cpu_est_3_reg.D cpu_est_3_reg.C cpu_est_3_reg.AR cpu_est_0_.D cpu_est_0_.C cpu_est_0_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR \ - SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C \ - SM_AMIGA_0_.AR CLK_CNT_P_1_.D CLK_CNT_P_1_.C CLK_CNT_P_1_.AR SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_0_.AP SIZE_DMA_1_.D SIZE_DMA_1_.C SIZE_DMA_1_.AP IPL_030DFFSH_0_reg.D \ - IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP \ - SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_DSACK1_INT.D inst_DSACK1_INT.C \ - inst_DSACK1_INT.AP inst_VMA_INTreg.D inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP CLK_CNT_N_0_.D CLK_CNT_N_0_.C CLK_CNT_N_0_.AR CLK_CNT_N_1_.D \ - CLK_CNT_N_1_.C CLK_CNT_N_1_.AP CLK_CNT_P_0_.D CLK_CNT_P_0_.C CLK_CNT_P_0_.AR inst_LDS_000_INT.D inst_LDS_000_INT.C inst_LDS_000_INT.AP inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP \ - inst_A0_DMA.D inst_A0_DMA.C inst_A0_DMA.AP BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_000_DMA.AP AMIGA_BUS_ENABLEDFFSHreg.D AMIGA_BUS_ENABLEDFFSHreg.C \ - AMIGA_BUS_ENABLEDFFSHreg.AP inst_AS_000_INT.D inst_AS_000_INT.C inst_AS_000_INT.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DS_000_DMA.AP inst_FPU_CS_INTreg.D \ - inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP inst_UDS_000_INT.D inst_UDS_000_INT.C inst_UDS_000_INT.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C CLK_OUT_INTreg.AR inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR \ - inst_CLK_000_D5.D inst_CLK_000_D5.C inst_CLK_000_D5.AP inst_CLK_000_D6.D inst_CLK_000_D6.C inst_CLK_000_D6.AP inst_CLK_000_D4.D inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_CLK_000_D2.D inst_CLK_000_D2.C \ - inst_CLK_000_D2.AP inst_CLK_000_D3.D inst_CLK_000_D3.C inst_CLK_000_D3.AP inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D0.AP RESETDFFRHreg.D \ - RESETDFFRHreg.C RESETDFFRHreg.AR inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D1.AP AMIGA_BUS_DATA_DIR_m1_0_x2.X1 AMIGA_BUS_DATA_DIR_m1_0_x2.X2 cpu_est_ns_0_0_x2_1_.X1 cpu_est_ns_0_0_x2_1_.X2 G_103.X1 G_103.X2 \ - G_109.X1 G_109.X2 SIZE_1_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 DTACK SIZE_0_ DSACK_0_ BG_030_c BGACK_000_c CLK_030_c CLK_000_c CLK_OSZI_c vcc_n_n gnd_n_n ipl_c_0__n ipl_c_1__n \ - state_machine_un23_clk_000_d0_n ipl_c_2__n dsack_c_1__n DTACK_c VPA_c RST_c state_machine_un15_clk_000_d0_n RW_c un1_AMIGA_BUS_ENABLE_0_sqmuxa_2 fc_c_0__n fc_c_1__n \ - state_machine_un23_clk_000_d0_0_n state_machine_un6_bgack_000_0_n N_214_0 BG_030_c_i N_227_i state_machine_un10_bg_030_0_n N_215_0 N_216_0 N_126_i N_33_0 N_127_i \ - N_35_0 state_machine_uds_000_int_5_0_n N_130_i state_machine_lds_000_int_5_0_n N_132_i N_131_i N_133_i N_134_i N_137_i N_138_i sm_amiga_ns_0_5__n \ - cpu_est_ns_1__n N_139_i cpu_est_ns_2__n N_140_i N_46_0 N_52 N_142_i N_59 N_141_i N_62 sm_amiga_ns_0_7__n \ - N_65 N_144_i N_67 state_machine_ds_000_dma_5_0_n N_72 CLK_030_c_i N_77 AS_000_c_i N_88 N_59_i N_217 \ - N_61_0 N_219 N_62_i N_221 CLK_000_D1_i N_224 N_65_i N_225 N_66_i N_226 N_67_i \ - N_128 N_175_i N_130 un1_as_000_dma5_i_0__n N_132 state_machine_un6_clk_000_d5_i_n N_135 N_71_i N_136 DS_030_c_i N_138 \ - N_73_i N_143 N_156_i N_145 un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i N_146 N_75_0 N_147 N_176_i N_148 N_52_0 \ - N_151 N_173_i N_153 N_226_i N_154 N_77_0 N_155 N_72_i N_173 N_147_i N_148_i \ - cpu_est_ns_e_0_0__n N_228_1 N_146_i N_237 sm_amiga_ns_0_0__n N_247 N_88_i N_227 N_145_i N_228 cpu_est_ns_0_2__n \ - N_127 N_143_i N_66 N_154_i N_175 N_161_i N_176 N_153_i N_75 N_155_i un1_AMIGA_BUS_ENABLE_1_sqmuxa_4 \ - cpu_est_ns_0_1__n N_61 N_135_i N_156 N_136_i N_73 N_57 N_225_i N_71 un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0 state_machine_un6_clk_000_d5_n \ - N_219_i un1_as_000_dma5_0__n N_221_i N_223 state_machine_un15_clk_000_d0_0_n state_machine_ds_000_dma_5_n N_144 N_66_i_1 N_141 N_66_i_2 N_142 \ - N_66_i_3 N_139 N_66_i_4 N_140 N_66_i_5 N_137 N_237_1 N_134 N_237_2 N_133 N_247_1 \ - N_131 N_247_2 state_machine_lds_000_int_5_n N_247_3 state_machine_uds_000_int_5_n N_247_4 N_35 N_247_5 N_33 N_247_6 N_126 \ - N_52_0_1 N_216 N_52_0_2 N_215 N_224_1 state_machine_un10_bg_030_n N_224_2 N_214 N_227_1 state_machine_un6_bgack_000_n N_227_2 \ - state_machine_un8_clk_000_d2_n N_228_1_0 SIZE_DMA_1_sqmuxa N_127_1 SIZE_DMA_0_sqmuxa N_127_2 AS_000_INT_1_sqmuxa N_151_1 N_249 SIZE_DMA_1_sqmuxa_1 CLK_000_D6_i \ - state_machine_un8_clk_000_d2_1_n N_228_i sm_amiga_ns_0_1_0__n sm_amiga_i_5__n cpu_est_ns_0_1_1__n N_224_i N_138_1 N_223_i N_130_1 SIZE_DMA_0_sqmuxa_i N_128_1 \ - SIZE_DMA_1_sqmuxa_i N_221_1 a_i_18__n N_219_1 a_i_16__n vpa_sync_0_un3_n a_i_19__n vpa_sync_0_un1_n AS_030_000_SYNC_i vpa_sync_0_un0_n CLK_000_D2_i \ - as_000_int_0_un3_n BGACK_030_INT_i as_000_int_0_un1_n nEXP_SPACE_i as_000_int_0_un0_n AS_030_i as_000_dma_0_un3_n BGACK_030_INT_D_i as_000_dma_0_un1_n sm_amiga_i_7__n as_000_dma_0_un0_n \ - state_machine_un8_clk_000_d2_i_n bg_000_0_un3_n sm_amiga_i_6__n bg_000_0_un1_n sm_amiga_i_4__n bg_000_0_un0_n CLK_000_D0_i a0_dma_0_un3_n RW_i a0_dma_0_un1_n UDS_000_i \ - a0_dma_0_un0_n LDS_000_i dtack_sync_0_un3_n DTACK_i dtack_sync_0_un1_n VMA_INT_i dtack_sync_0_un0_n VPA_i lds_000_int_0_un3_n cpu_est_i_0__n lds_000_int_0_un1_n \ - sm_amiga_i_3__n lds_000_int_0_un0_n cpu_est_i_3__n uds_000_int_0_un3_n cpu_est_i_1__n uds_000_int_0_un1_n A0_i uds_000_int_0_un0_n size_i_1__n fpu_cs_int_0_un3_n a_i_30__n \ - fpu_cs_int_0_un1_n a_i_31__n fpu_cs_int_0_un0_n a_i_28__n ds_000_dma_0_un3_n a_i_29__n ds_000_dma_0_un1_n a_i_26__n ds_000_dma_0_un0_n a_i_27__n as_030_000_sync_0_un3_n \ - a_i_24__n as_030_000_sync_0_un1_n a_i_25__n as_030_000_sync_0_un0_n RST_i size_dma_0_1__un3_n size_dma_0_1__un1_n CLK_OSZI_i size_dma_0_1__un0_n size_dma_0_0__un3_n FPU_CS_INT_i \ - size_dma_0_0__un1_n AS_030_c size_dma_0_0__un0_n bgack_030_int_0_un3_n AS_000_c bgack_030_int_0_un1_n bgack_030_int_0_un0_n DS_030_c dsack1_int_0_un3_n dsack1_int_0_un1_n UDS_000_c \ - dsack1_int_0_un0_n state_machine_uds_000_int_5_0_m2_un3_n LDS_000_c state_machine_uds_000_int_5_0_m2_un1_n state_machine_uds_000_int_5_0_m2_un0_n size_c_0__n cpu_est_ns_0_0_m2_2__un3_n cpu_est_ns_0_0_m2_2__un1_n size_c_1__n cpu_est_ns_0_0_m2_2__un0_n amiga_bus_enable_0_un3_n \ - a_c_16__n amiga_bus_enable_0_un1_n amiga_bus_enable_0_un0_n a_c_17__n vma_int_0_un3_n vma_int_0_un1_n a_c_18__n vma_int_0_un0_n ipl_030_0_0__un3_n a_c_19__n ipl_030_0_0__un1_n \ - ipl_030_0_0__un0_n a_c_20__n ipl_030_0_1__un3_n ipl_030_0_1__un1_n a_c_21__n ipl_030_0_1__un0_n ipl_030_0_2__un3_n a_c_22__n ipl_030_0_2__un1_n ipl_030_0_2__un0_n a_c_23__n \ - cpu_estse_0_un3_n cpu_estse_0_un1_n a_c_24__n cpu_estse_0_un0_n cpu_estse_1_un3_n a_c_25__n cpu_estse_1_un1_n cpu_estse_1_un0_n a_c_26__n cpu_estse_2_un3_n cpu_estse_2_un1_n \ - a_c_27__n cpu_estse_2_un0_n a_c_28__n a_c_29__n a_c_30__n a_c_31__n A0_c nEXP_SPACE_c AS_030.OE \ - AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE \ - BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE + RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ cpu_est_0_.D cpu_est_0_.C cpu_est_0_.AR cpu_est_1_.D \ + cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.D cpu_est_2_.C cpu_est_2_.AR cpu_est_3_reg.D cpu_est_3_reg.C cpu_est_3_reg.AR IPL_030DFFSH_0_reg.D IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP \ + IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C \ + SM_AMIGA_6_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D \ + SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP \ + inst_VMA_INTreg.D inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR SIZE_DMA_0_.D SIZE_DMA_0_.C \ + SIZE_DMA_0_.AP SIZE_DMA_1_.D SIZE_DMA_1_.C SIZE_DMA_1_.AP inst_FPU_CS_INTreg.D inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_A0_DMA.D \ + inst_A0_DMA.C inst_A0_DMA.AP BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP inst_DSACK1_INT.D inst_DSACK1_INT.C inst_DSACK1_INT.AP inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_000_DMA.AP \ + inst_AS_000_INT.D inst_AS_000_INT.C inst_AS_000_INT.AP AMIGA_BUS_ENABLEDFFSHreg.D AMIGA_BUS_ENABLEDFFSHreg.C AMIGA_BUS_ENABLEDFFSHreg.AP inst_UDS_000_INT.D inst_UDS_000_INT.C inst_UDS_000_INT.AP inst_LDS_000_INT.D inst_LDS_000_INT.C \ + inst_LDS_000_INT.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DS_000_DMA.AP inst_CLK_000_D5.D inst_CLK_000_D5.C inst_CLK_000_D5.AP inst_CLK_000_D6.D \ + inst_CLK_000_D6.C inst_CLK_000_D6.AP inst_CLK_000_D4.D inst_CLK_000_D4.C inst_CLK_000_D4.AP CLK_CNT_P_0_.D CLK_CNT_P_0_.C CLK_CNT_P_0_.AR inst_CLK_000_D2.D inst_CLK_000_D2.C inst_CLK_000_D2.AP \ + inst_CLK_000_D3.D inst_CLK_000_D3.C inst_CLK_000_D3.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C CLK_OUT_INTreg.AR inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP inst_CLK_000_D0.D inst_CLK_000_D0.C \ + inst_CLK_000_D0.AP inst_VPA_D.D inst_VPA_D.C inst_VPA_D.AP RESETDFFRHreg.D RESETDFFRHreg.C RESETDFFRHreg.AR inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D1.AP CLK_OUT_PRE_0.X1 \ + CLK_OUT_PRE_0.X2 SIZE_1_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 DTACK SIZE_0_ DSACK_0_ A0_c lds_000_int_0_un0_n as_030_000_sync_0_un3_n nEXP_SPACE_c as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n ds_000_dma_0_un3_n BG_030_c ds_000_dma_0_un1_n ds_000_dma_0_un0_n \ + fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n fpu_cs_int_0_un0_n BGACK_000_c dtack_sync_0_un3_n dtack_sync_0_un1_n CLK_030_c dtack_sync_0_un0_n a0_dma_0_un3_n CLK_000_c a0_dma_0_un1_n \ + a0_dma_0_un0_n CLK_OSZI_c vcc_n_n gnd_n_n A0_DMA_1_sqmuxa ipl_c_0__n ipl_c_1__n ipl_c_2__n state_machine_un57_bgack_030_int_n dsack_c_1__n state_machine_un81_bgack_030_int_n \ + DTACK_c state_machine_un6_bgack_000_n RST_c state_machine_un10_bg_030_n un1_AS_030_000_SYNC_1_sqmuxa_1 SIZE_DMA_0_sqmuxa RW_c state_machine_a0_dma_4_n un1_AMIGA_BUS_ENABLE_2_sqmuxa fc_c_0__n state_machine_lds_000_int_6_n \ + state_machine_uds_000_int_6_n fc_c_1__n state_machine_ds_000_dma_5_n un1_AMIGA_BUS_ENABLE_1_sqmuxa_1 AMIGA_BUS_DATA_DIR_c cpu_est_ns_0_1__n N_165_i N_166_i N_242_i N_243_i N_70_0 \ + N_94_i N_222_i N_100_i AS_030_000_SYNC_i AMIGA_BUS_ENABLE_1_sqmuxa_1_i AMIGA_BUS_ENABLE_1_sqmuxa_2_i un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_0 AMIGA_BUS_ENABLE_0_sqmuxa_2_i AMIGA_BUS_ENABLE_2_sqmuxa_i un1_AMIGA_BUS_ENABLE_2_sqmuxa_0 BG_030_c_i \ + state_machine_un8_bg_030_i_n state_machine_un10_bg_030_0_n N_82_i N_100 DS_030_c_i N_80_0 N_79_0 A0_DMA_0_sqmuxa_i_0_0 N_77_i N_76_i N_75_i \ + N_162_i un1_AS_030_000_SYNC_1_sqmuxa_1_0 cpu_est_ns_1__n N_72_i cpu_est_ns_2__n CLK_030_c_i A0_DMA_0_sqmuxa_i_0 N_71_i N_221 N_69_i N_223 \ + CLK_000_D1_i N_224 N_68_i N_225 N_161_i N_31 N_63_i N_33 N_61_i N_35 N_156_i \ + N_37 N_157_i N_61 cpu_est_ns_e_0_0__n N_62 N_152_i N_63 N_153_i N_68 N_154_i N_69 \ + sm_amiga_ns_e_0_0__n N_72 N_149_i N_75 N_150_i N_76 N_151_i N_77 sm_amiga_ns_e_0_1__n N_79 N_146_i \ + N_80 N_147_i N_82 N_148_i N_92 cpu_est_ns_0_2__n N_93 N_145_i N_94 state_machine_ds_000_dma_5_0_n N_95 \ + N_143_i N_96 N_144_i N_97 AMIGA_BUS_DATA_DIR_c_0 N_106 N_142_i N_107 N_246_i N_125 N_176_i \ + N_231 N_160_i N_232 N_240_i N_233 N_234 N_238_i N_235 N_236 N_163_i N_238 \ + N_236_i N_240 N_242 N_234_i N_243 N_235_i N_246 sm_amiga_ns_e_0_5__n N_142 N_167_i N_143 \ + N_233_i N_144 N_145 N_231_i N_146 N_232_i N_147 sm_amiga_ns_e_0_7__n N_148 state_machine_uds_000_int_6_0_n N_149 \ + N_125_i N_150 state_machine_lds_000_int_6_0_n N_151 N_37_0 N_152 N_107_i N_153 N_35_0 N_154 N_106_i \ + N_155 N_33_0 N_156 N_164_i N_157 N_31_0 N_160 N_225_0 N_161 N_224_0 N_162 \ + N_223_0 N_163 N_92_i N_164 N_93_i N_165 N_221_0 N_166 state_machine_un6_bgack_000_0_n N_167 CLK_000_D2_i \ + AMIGA_BUS_ENABLE_1_sqmuxa_1 state_machine_un57_bgack_030_int_0_n AMIGA_BUS_ENABLE_2_sqmuxa N_255_1 state_machine_un8_bg_030_n N_255_2 AMIGA_BUS_ENABLE_0_sqmuxa_2 N_265_1 AMIGA_BUS_ENABLE_1_sqmuxa_2 N_265_2 N_70 \ + N_265_3 N_222 N_265_4 N_255 N_265_5 N_265 N_265_6 VMA_INT_i N_69_i_1 VPA_D_i N_69_i_2 \ + DTACK_i N_69_i_3 LDS_000_i N_69_i_4 AS_000_i N_69_i_5 nEXP_SPACE_i A0_DMA_0_sqmuxa_i_0_0_1 AS_030_i N_82_i_1 BGACK_030_INT_i \ + AMIGA_BUS_ENABLE_0_sqmuxa_2_1 BGACK_030_INT_D_i N_100_i_1 sm_amiga_i_4__n N_100_i_2 cpu_est_i_3__n state_machine_un8_bg_030_1_n sm_amiga_i_5__n state_machine_un8_bg_030_2_n CLK_000_D0_i cpu_est_ns_0_1_1__n \ + state_machine_un81_bgack_030_int_i_n cpu_est_ns_0_2_1__n cpu_est_i_0__n state_machine_a0_dma_4_1_n cpu_est_i_1__n state_machine_a0_dma_4_2_n UDS_000_i N_107_1 AS_000_DMA_i N_107_2 RW_i \ + N_97_1 cpu_est_i_2__n N_97_2 sm_amiga_i_3__n N_95_1 sm_amiga_i_1__n N_95_2 A0_i N_95_3 size_i_1__n sm_amiga_ns_e_0_1_0__n \ + sm_amiga_i_0__n sm_amiga_ns_e_0_1_1__n a_i_30__n cpu_est_ns_0_1_2__n a_i_31__n N_155_1 a_i_28__n N_153_1 a_i_29__n N_151_1 a_i_26__n \ + N_144_1 a_i_27__n N_125_1 a_i_24__n SIZE_DMA_0_sqmuxa_1 a_i_25__n N_96_1 a_i_19__n N_93_1 a_i_16__n state_machine_lds_000_int_6_0_m2_un3_n \ + a_i_18__n state_machine_lds_000_int_6_0_m2_un1_n RST_i state_machine_lds_000_int_6_0_m2_un0_n cpu_estse_0_un3_n SIZE_DMA_0_sqmuxa_i cpu_estse_0_un1_n N_95_i cpu_estse_0_un0_n N_96_i cpu_estse_1_un3_n \ + N_97_i cpu_estse_1_un1_n FPU_CS_INT_i cpu_estse_1_un0_n CLK_000_D6_i cpu_estse_2_un3_n AS_030_c cpu_estse_2_un1_n cpu_estse_2_un0_n AS_000_c bg_000_0_un3_n \ + bg_000_0_un1_n DS_030_c bg_000_0_un0_n dsack1_int_0_un3_n UDS_000_c dsack1_int_0_un1_n dsack1_int_0_un0_n LDS_000_c as_000_dma_0_un3_n as_000_dma_0_un1_n size_c_0__n \ + as_000_dma_0_un0_n as_000_int_0_un3_n size_c_1__n as_000_int_0_un1_n as_000_int_0_un0_n a_c_16__n vpa_sync_0_un3_n vpa_sync_0_un1_n a_c_17__n vpa_sync_0_un0_n vma_int_0_un3_n \ + a_c_18__n vma_int_0_un1_n vma_int_0_un0_n a_c_19__n bgack_030_int_0_un3_n bgack_030_int_0_un1_n a_c_20__n bgack_030_int_0_un0_n size_dma_0_0__un3_n a_c_21__n size_dma_0_0__un1_n \ + size_dma_0_0__un0_n a_c_22__n size_dma_0_1__un3_n size_dma_0_1__un1_n a_c_23__n size_dma_0_1__un0_n ipl_030_0_0__un3_n a_c_24__n ipl_030_0_0__un1_n ipl_030_0_0__un0_n a_c_25__n \ + ipl_030_0_1__un3_n ipl_030_0_1__un1_n a_c_26__n ipl_030_0_1__un0_n ipl_030_0_2__un3_n a_c_27__n ipl_030_0_2__un1_n ipl_030_0_2__un0_n a_c_28__n amiga_bus_enable_0_un3_n amiga_bus_enable_0_un1_n \ + a_c_29__n amiga_bus_enable_0_un0_n uds_000_int_0_un3_n a_c_30__n uds_000_int_0_un1_n uds_000_int_0_un0_n a_c_31__n lds_000_int_0_un3_n lds_000_int_0_un1_n \ + AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE \ + DTACK.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE .names inst_AS_000_DMA.BLIF AS_030 1 1 .names AS_030.PIN AS_030_c 1 1 -.names N_217.BLIF AS_030.OE +.names N_155.BLIF AS_030.OE 1 1 .names inst_AS_000_INT.BLIF AS_000 1 1 @@ -157,7 +165,7 @@ 1 1 .names DS_030.PIN DS_030_c 1 1 -.names N_217.BLIF DS_030.OE +.names N_155.BLIF DS_030.OE 1 1 .names inst_UDS_000_INT.BLIF UDS_000 1 1 @@ -175,19 +183,19 @@ 1 1 .names SIZE_0_.PIN size_c_0__n 1 1 -.names N_217.BLIF SIZE_0_.OE +.names N_155.BLIF SIZE_0_.OE 1 1 .names SIZE_DMA_1_.BLIF SIZE_1_ 1 1 .names SIZE_1_.PIN size_c_1__n 1 1 -.names N_217.BLIF SIZE_1_.OE +.names N_155.BLIF SIZE_1_.OE 1 1 .names inst_A0_DMA.BLIF A0 1 1 .names A0.PIN A0_c 1 1 -.names N_217.BLIF A0.OE +.names N_155.BLIF A0.OE 1 1 .names inst_DSACK1_INT.BLIF DSACK_1_ 1 1 @@ -199,1048 +207,1093 @@ 1 1 .names DTACK.PIN DTACK_c 1 1 -.names N_217.BLIF DTACK.OE +.names N_155.BLIF DTACK.OE 1 1 .names gnd_n_n.BLIF BERR 1 1 .names FPU_CS_INT_i.BLIF BERR.OE 1 1 -.names gnd_n_n.BLIF DSACK_0_ +.names vcc_n_n.BLIF DSACK_0_ 1 1 -.names gnd_n_n.BLIF DSACK_0_.OE +.names nEXP_SPACE_c.BLIF DSACK_0_.OE 1 1 .names gnd_n_n.BLIF AVEC_EXP 1 1 .names FPU_CS_INT_i.BLIF AVEC_EXP.OE 1 1 -.names N_237.BLIF CIIN +.names N_255.BLIF CIIN 1 1 -.names N_247.BLIF CIIN.OE +.names N_265.BLIF CIIN.OE 1 1 -.names sm_amiga_ns_0_7__n.BLIF SM_AMIGA_0_.D +.names N_246.BLIF N_246_i +0 1 +.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n +11 1 +.names RST_i.BLIF CLK_CNT_P_0_.AR +1 1 +.names N_160.BLIF N_160_i +0 1 +.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D +1- 1 +-1 1 +.names N_240.BLIF N_240_i +0 1 +.names N_97.BLIF N_97_i +0 1 +.names N_69_i.BLIF N_69 +0 1 +.names N_225.BLIF dtack_sync_0_un3_n 0 1 .names inst_CLK_000_D1.BLIF inst_CLK_000_D2.D 1 1 -.names N_144.BLIF N_144_i +.names inst_CLK_000_D1.BLIF CLK_000_D1_i 0 1 -.names state_machine_ds_000_dma_5_0_n.BLIF state_machine_ds_000_dma_5_n +.names N_97_i.BLIF N_225.BLIF dtack_sync_0_un1_n +11 1 +.names N_68_i.BLIF N_68 0 1 +.names inst_DTACK_SYNC.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n +11 1 .names CLK_OSZI_c.BLIF inst_CLK_000_D2.C 1 1 -.names state_machine_un23_clk_000_d0_0_n.BLIF state_machine_un23_clk_000_d0_n +.names N_161.BLIF N_161_i 0 1 -.names state_machine_un6_bgack_000_0_n.BLIF state_machine_un6_bgack_000_n +.names dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.D +1- 1 +-1 1 +.names N_63_i.BLIF N_63 +0 1 +.names A0_DMA_1_sqmuxa.BLIF a0_dma_0_un3_n 0 1 .names RST_i.BLIF inst_CLK_000_D2.AP 1 1 -.names N_214_0.BLIF N_214 +.names N_61_i.BLIF N_61 0 1 -.names BG_030_c.BLIF BG_030_c_i +.names inst_A0_DMA.BLIF A0_DMA_1_sqmuxa.BLIF a0_dma_0_un1_n +11 1 +.names N_156.BLIF N_156_i 0 1 -.names N_227.BLIF N_227_i +.names state_machine_a0_dma_4_n.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n +11 1 +.names N_157.BLIF N_157_i 0 1 -.names CLK_OSZI_c.BLIF cpu_est_1_.C -1 1 +.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF inst_A0_DMA.D +1- 1 +-1 1 .names inst_CLK_000_D2.BLIF inst_CLK_000_D3.D 1 1 -.names state_machine_un10_bg_030_0_n.BLIF state_machine_un10_bg_030_n +.names cpu_est_ns_e_0_0__n.BLIF cpu_est_0_.D 0 1 -.names N_215_0.BLIF N_215 +.names vcc_n_n +1 +.names N_152.BLIF N_152_i 0 1 -.names RST_i.BLIF cpu_est_1_.AR -1 1 +.names gnd_n_n .names CLK_OSZI_c.BLIF inst_CLK_000_D3.C 1 1 -.names N_216_0.BLIF N_216 +.names N_153.BLIF N_153_i 0 1 -.names N_126.BLIF N_126_i +.names N_154.BLIF N_154_i 0 1 .names RST_i.BLIF inst_CLK_000_D3.AP 1 1 -.names N_33_0.BLIF N_33 +.names sm_amiga_ns_e_0_0__n.BLIF SM_AMIGA_7_.D 0 1 -.names N_127.BLIF N_127_i +.names N_149.BLIF N_149_i 0 1 -.names CLK_OSZI_c.BLIF cpu_est_2_.C +.names N_150.BLIF N_150_i +0 1 +.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D 1 1 -.names N_35_0.BLIF N_35 +.names BG_030_c.BLIF BG_030_c_i +0 1 +.names state_machine_un8_bg_030_n.BLIF state_machine_un8_bg_030_i_n +0 1 +.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C +1 1 +.names state_machine_un10_bg_030_0_n.BLIF state_machine_un10_bg_030_n +0 1 +.names N_82_i.BLIF N_82 +0 1 +.names RST_i.BLIF CLK_OUT_INTreg.AR +1 1 +.names DS_030_c.BLIF DS_030_c_i +0 1 +.names N_80_0.BLIF N_80 +0 1 +.names N_79_0.BLIF N_79 0 1 .names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.D 1 1 -.names state_machine_uds_000_int_5_0_n.BLIF state_machine_uds_000_int_5_n +.names A0_DMA_0_sqmuxa_i_0_0.BLIF A0_DMA_0_sqmuxa_i_0 0 1 -.names RST_i.BLIF cpu_est_2_.AR -1 1 -.names N_130.BLIF N_130_i +.names N_77_i.BLIF N_77 0 1 .names CLK_OSZI_c.BLIF inst_BGACK_030_INT_D.C 1 1 -.names state_machine_lds_000_int_5_0_n.BLIF state_machine_lds_000_int_5_n +.names N_76_i.BLIF N_76 +0 1 +.names N_75_i.BLIF N_75 0 1 -.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF state_machine_un23_clk_000_d0_0_n -11 1 .names RST_i.BLIF inst_BGACK_030_INT_D.AP 1 1 -.names N_214.BLIF vpa_sync_0_un3_n +.names N_162.BLIF N_162_i +0 1 +.names un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1 +0 1 +.names N_72_i.BLIF N_72 0 1 -.names CLK_OSZI_c.BLIF cpu_est_3_reg.C -1 1 -.names N_224_i.BLIF N_214.BLIF vpa_sync_0_un1_n -11 1 -.names inst_VPA_SYNC.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n -11 1 -.names RST_i.BLIF cpu_est_3_reg.AR -1 1 .names CLK_000_c.BLIF inst_CLK_000_D0.D 1 1 -.names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D -1- 1 --1 1 -.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n +.names CLK_030_c.BLIF CLK_030_c_i +0 1 +.names N_165.BLIF N_165_i 0 1 .names CLK_OSZI_c.BLIF inst_CLK_000_D0.C 1 1 -.names AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un3_n +.names N_166.BLIF N_166_i +0 1 +.names N_242.BLIF N_242_i 0 1 -.names inst_AS_000_INT.BLIF AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un1_n -11 1 -.names CLK_OSZI_c.BLIF cpu_est_0_.C -1 1 .names RST_i.BLIF inst_CLK_000_D0.AP 1 1 -.names sm_amiga_i_5__n.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n -11 1 -.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INT.D -1- 1 --1 1 +.names N_243.BLIF N_243_i +0 1 +.names CLK_OSZI_c.BLIF cpu_est_0_.C +1 1 +.names N_70_0.BLIF N_70 +0 1 +.names N_94.BLIF N_94_i +0 1 .names RST_i.BLIF cpu_est_0_.AR 1 1 -.names N_249.BLIF as_000_dma_0_un3_n +.names N_222_i.BLIF N_222 0 1 +.names CLK_OSZI_c.BLIF inst_VPA_D.C +1 1 +.names N_100_i.BLIF N_100 +0 1 +.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i +0 1 +.names RST_i.BLIF inst_VPA_D.AP +1 1 +.names AMIGA_BUS_ENABLE_1_sqmuxa_1.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_1_i +0 1 +.names CLK_OSZI_c.BLIF cpu_est_1_.C +1 1 +.names AMIGA_BUS_ENABLE_1_sqmuxa_2.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_2_i +0 1 +.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_0.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_1 +0 1 +.names RST_i.BLIF cpu_est_1_.AR +1 1 .names vcc_n_n.BLIF RESETDFFRHreg.D 1 1 -.names inst_AS_000_DMA.BLIF N_249.BLIF as_000_dma_0_un1_n -11 1 -.names un1_as_000_dma5_0__n.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n -11 1 +.names AMIGA_BUS_ENABLE_0_sqmuxa_2.BLIF AMIGA_BUS_ENABLE_0_sqmuxa_2_i +0 1 +.names AMIGA_BUS_ENABLE_2_sqmuxa.BLIF AMIGA_BUS_ENABLE_2_sqmuxa_i +0 1 .names CLK_OSZI_c.BLIF RESETDFFRHreg.C 1 1 -.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF inst_AS_000_DMA.D -1- 1 --1 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C -1 1 -.names state_machine_un10_bg_030_n.BLIF bg_000_0_un3_n +.names un1_AMIGA_BUS_ENABLE_2_sqmuxa_0.BLIF un1_AMIGA_BUS_ENABLE_2_sqmuxa 0 1 +.names cpu_est_ns_0_1__n.BLIF cpu_est_ns_1__n +0 1 +.names CLK_OSZI_c.BLIF cpu_est_2_.C +1 1 .names RST_i.BLIF RESETDFFRHreg.AR 1 1 -.names BG_030_c.BLIF state_machine_un10_bg_030_n.BLIF bg_000_0_un1_n +.names inst_BGACK_030_INTreg.BLIF N_222_i.BLIF AMIGA_BUS_ENABLE_2_sqmuxa 11 1 +.names BG_030_c_i.BLIF state_machine_un8_bg_030_i_n.BLIF state_machine_un10_bg_030_0_n +11 1 +.names RST_i.BLIF cpu_est_2_.AR +1 1 +.names AMIGA_BUS_ENABLE_0_sqmuxa_2_i.BLIF AMIGA_BUS_ENABLE_2_sqmuxa_i.BLIF un1_AMIGA_BUS_ENABLE_2_sqmuxa_0 +11 1 +.names inst_CLK_000_D0.BLIF inst_CLK_000_D1.D +1 1 +.names AMIGA_BUS_ENABLE_0_sqmuxa_2.BLIF inst_BGACK_030_INT_D.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_2 +11 1 +.names AMIGA_BUS_ENABLE_1_sqmuxa_1_i.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_2_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_0 +11 1 +.names CLK_OSZI_c.BLIF inst_CLK_000_D1.C +1 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +0 1 +.names CLK_OSZI_c.BLIF cpu_est_3_reg.C +1 1 +.names AS_030_c.BLIF AS_030_i +0 1 +.names RST_i.BLIF inst_CLK_000_D1.AP +1 1 +.names AS_030_c.BLIF N_94_i.BLIF N_222_i +11 1 +.names RST_i.BLIF cpu_est_3_reg.AR +1 1 +.names SM_AMIGA_6_.BLIF nEXP_SPACE_c.BLIF N_70_0 +11 1 +.names nEXP_SPACE_c.BLIF nEXP_SPACE_i +0 1 +.names CLK_CNT_P_0_.BLIF CLK_OUT_PRE_0.X1 +1 1 +.names AS_000_c.BLIF AS_000_i +0 1 +.names LDS_000_c.BLIF LDS_000_i +0 1 +.names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C +1 1 +.names inst_CLK_OUT_PRE.BLIF CLK_OUT_PRE_0.X2 +1 1 +.names DTACK_c.BLIF DTACK_i +0 1 +.names inst_VPA_D.BLIF VPA_D_i +0 1 +.names RST_i.BLIF IPL_030DFFSH_0_reg.AP +1 1 +.names inst_VMA_INTreg.BLIF VMA_INT_i +0 1 +.names CLK_OUT_PRE_0.BLIF inst_CLK_OUT_PRE.D +1 1 +.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF N_68_i +11 1 +.names inst_CLK_000_D4.BLIF inst_CLK_000_D5.D +1 1 +.names BGACK_030_INT_i.BLIF CLK_030_c_i.BLIF N_71_i +11 1 +.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n +0 1 +.names CLK_OSZI_c.BLIF IPL_030DFFSH_1_reg.C +1 1 +.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_5_.BLIF N_72_i +11 1 +.names N_63_i.BLIF N_162_i.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1_0 +11 1 +.names RST_i.BLIF IPL_030DFFSH_1_reg.AP +1 1 +.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_6_.BLIF N_75_i +11 1 +.names cpu_est_3_reg.BLIF cpu_est_i_3__n +0 1 +.names cpu_est_3_reg.BLIF cpu_est_i_1__n.BLIF N_76_i +11 1 +.names inst_AS_000_INT.BLIF N_61_i.BLIF N_77_i +11 1 +.names CLK_OSZI_c.BLIF IPL_030DFFSH_2_reg.C +1 1 +.names N_61_i.BLIF SM_AMIGA_2_.BLIF N_79_0 +11 1 +.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n +0 1 +.names RST_i.BLIF IPL_030DFFSH_2_reg.AP +1 1 +.names N_61_i.BLIF SM_AMIGA_4_.BLIF N_80_0 +11 1 +.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF A0_DMA_1_sqmuxa +11 1 +.names inst_BGACK_030_INT_D.BLIF BGACK_030_INT_D_i +0 1 +.names BGACK_030_INT_D_i.BLIF BGACK_030_INT_i.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_1 +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_7_.C +1 1 +.names A0_i.BLIF N_82_i.BLIF state_machine_uds_000_int_6_0_n +11 1 +.names N_231_i.BLIF N_232_i.BLIF sm_amiga_ns_e_0_7__n +11 1 +.names RST_i.BLIF SM_AMIGA_7_.AP +1 1 +.names N_167_i.BLIF N_233_i.BLIF SM_AMIGA_1_.D +11 1 +.names N_234_i.BLIF N_235_i.BLIF sm_amiga_ns_e_0_5__n +11 1 +.names N_163_i.BLIF N_236_i.BLIF SM_AMIGA_3_.D +11 1 +.names N_61.BLIF N_238_i.BLIF SM_AMIGA_4_.D +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C +1 1 +.names N_160_i.BLIF N_240_i.BLIF SM_AMIGA_5_.D +11 1 +.names N_142_i.BLIF N_246_i.BLIF N_176_i +11 1 +.names RST_i.BLIF SM_AMIGA_6_.AR +1 1 +.names N_143_i.BLIF N_144_i.BLIF AMIGA_BUS_DATA_DIR_c_0 +11 1 +.names A0_DMA_0_sqmuxa_i_0_0.BLIF N_145_i.BLIF state_machine_ds_000_dma_5_0_n +11 1 +.names N_156_i.BLIF N_157_i.BLIF cpu_est_ns_e_0_0__n +11 1 +.names inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF N_61_i +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C +1 1 +.names RW_c.BLIF state_machine_lds_000_int_6_0_m2_un3_n +0 1 +.names SM_AMIGA_5_.BLIF RW_c.BLIF state_machine_lds_000_int_6_0_m2_un1_n +11 1 +.names RST_i.BLIF SM_AMIGA_5_.AR +1 1 +.names SM_AMIGA_4_.BLIF state_machine_lds_000_int_6_0_m2_un3_n.BLIF state_machine_lds_000_int_6_0_m2_un0_n +11 1 +.names state_machine_lds_000_int_6_0_m2_un1_n.BLIF state_machine_lds_000_int_6_0_m2_un0_n.BLIF N_62 +1- 1 +-1 1 +.names AS_030_i.BLIF N_96_i.BLIF N_63_i +11 1 +.names A_16_.BLIF a_c_16__n +1 1 +.names inst_CLK_000_D0.BLIF CLK_000_D0_i +0 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C +1 1 +.names A_17_.BLIF a_c_17__n +1 1 +.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_165 +11 1 +.names A_18_.BLIF a_c_18__n +1 1 +.names cpu_est_0_.BLIF cpu_est_i_0__n +0 1 .names RST_i.BLIF SM_AMIGA_4_.AR 1 1 +.names A_19_.BLIF a_c_19__n +1 1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_166 +11 1 +.names A_20_.BLIF a_c_20__n +1 1 +.names state_machine_un81_bgack_030_int_n.BLIF state_machine_un81_bgack_030_int_i_n +0 1 +.names A_21_.BLIF a_c_21__n +1 1 +.names N_160.BLIF state_machine_un81_bgack_030_int_i_n.BLIF N_167 +11 1 +.names A_22_.BLIF a_c_22__n +1 1 +.names BGACK_000_c.BLIF N_68.BLIF state_machine_un6_bgack_000_0_n +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C +1 1 +.names A_23_.BLIF a_c_23__n +1 1 +.names N_92_i.BLIF N_93_i.BLIF N_221_0 +11 1 +.names A_24_.BLIF a_c_24__n +1 1 +.names AS_030_i.BLIF N_72.BLIF N_223_0 +11 1 +.names RST_i.BLIF SM_AMIGA_3_.AR +1 1 +.names A_25_.BLIF a_c_25__n +1 1 +.names AS_030_i.BLIF N_95_i.BLIF N_224_0 +11 1 +.names A_26_.BLIF a_c_26__n +1 1 +.names AS_030_i.BLIF N_97_i.BLIF N_225_0 +11 1 +.names A_27_.BLIF a_c_27__n +1 1 +.names A0_DMA_0_sqmuxa_i_0_0.BLIF N_164_i.BLIF N_31_0 +11 1 +.names A_28_.BLIF a_c_28__n +1 1 +.names AS_030_i.BLIF N_106_i.BLIF N_33_0 +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C +1 1 +.names A_29_.BLIF a_c_29__n +1 1 +.names N_107_i.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF N_35_0 +11 1 +.names A_30_.BLIF a_c_30__n +1 1 +.names AS_030_i.BLIF N_82.BLIF N_37_0 +11 1 +.names RST_i.BLIF SM_AMIGA_2_.AR +1 1 +.names A_31_.BLIF a_c_31__n +1 1 +.names N_82_i.BLIF N_125_i.BLIF state_machine_lds_000_int_6_0_n +11 1 +.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_148 +11 1 +.names nEXP_SPACE.BLIF nEXP_SPACE_c +1 1 +.names BGACK_030_INT_i.BLIF SM_AMIGA_6_.BLIF N_149 +11 1 +.names N_100_i.BLIF SM_AMIGA_7_.BLIF N_150 +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C +1 1 +.names BG_030.BLIF BG_030_c +1 1 +.names N_100.BLIF SM_AMIGA_7_.BLIF N_152 +11 1 +.names BG_000DFFSHreg.BLIF BG_000 +1 1 +.names N_77_i.BLIF SM_AMIGA_0_.BLIF N_154 +11 1 +.names RST_i.BLIF SM_AMIGA_1_.AR +1 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030 +1 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_i +0 1 +.names BGACK_000.BLIF BGACK_000_c +1 1 +.names N_68.BLIF cpu_est_0_.BLIF N_156 +11 1 +.names CLK_030.BLIF CLK_030_c +1 1 +.names N_68_i.BLIF cpu_est_i_0__n.BLIF N_157 +11 1 +.names CLK_000.BLIF CLK_000_c +1 1 +.names inst_BGACK_030_INTreg.BLIF CLK_000_D0_i.BLIF N_160 +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C +1 1 +.names CLK_OSZI.BLIF CLK_OSZI_c +1 1 +.names LDS_000_c.BLIF UDS_000_c.BLIF N_161 +11 1 +.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT +1 1 +.names N_75_i.BLIF nEXP_SPACE_i.BLIF N_162 +11 1 +.names RST_i.BLIF SM_AMIGA_0_.AR +1 1 +.names CLK_OUT_INTreg.BLIF CLK_EXP +1 1 +.names N_160.BLIF state_machine_un57_bgack_030_int_n.BLIF N_163 +11 1 +.names inst_FPU_CS_INTreg.BLIF FPU_CS +1 1 +.names UDS_000_c.BLIF UDS_000_i +0 1 +.names IPL_030DFFSH_0_reg.BLIF IPL_030_0_ +1 1 +.names LDS_000_i.BLIF UDS_000_i.BLIF N_164 +11 1 +.names IPL_030DFFSH_1_reg.BLIF IPL_030_1_ +1 1 +.names cpu_est_1_.BLIF cpu_est_i_1__n +0 1 +.names CLK_OSZI_c.BLIF inst_VPA_SYNC.C +1 1 +.names IPL_030DFFSH_2_reg.BLIF IPL_030_2_ +1 1 +.names N_163.BLIF SM_AMIGA_3_.BLIF N_235 +11 1 +.names IPL_0_.BLIF ipl_c_0__n +1 1 +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names RST_i.BLIF inst_VPA_SYNC.AP +1 1 +.names IPL_1_.BLIF ipl_c_1__n +1 1 +.names N_80.BLIF sm_amiga_i_3__n.BLIF N_236 +11 1 +.names IPL_2_.BLIF ipl_c_2__n +1 1 +.names N_72.BLIF sm_amiga_i_4__n.BLIF N_238 +11 1 +.names N_75.BLIF sm_amiga_i_5__n.BLIF N_240 +11 1 +.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF N_242 +11 1 +.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C +1 1 +.names cpu_est_2_.BLIF cpu_est_i_2__n +0 1 +.names vcc_n_n.BLIF AVEC +1 1 +.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_243 +11 1 +.names RST_i.BLIF inst_VMA_INTreg.AP +1 1 +.names N_76.BLIF cpu_est_2_.BLIF N_246 +11 1 +.names cpu_est_3_reg.BLIF E +1 1 +.names N_166.BLIF cpu_est_i_3__n.BLIF N_142 +11 1 +.names VPA.BLIF inst_VPA_D.D +1 1 +.names inst_BGACK_030_INTreg.BLIF RW_i.BLIF N_143 +11 1 +.names inst_VMA_INTreg.BLIF VMA +1 1 +.names RW_c.BLIF RW_i +0 1 +.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C +1 1 +.names RST.BLIF RST_c +1 1 +.names inst_AS_000_DMA.BLIF RW_i.BLIF N_145 +11 1 +.names RESETDFFRHreg.BLIF RESET +1 1 +.names cpu_est_1_.BLIF cpu_est_2_.BLIF N_146 +11 1 +.names RST_i.BLIF inst_BGACK_030_INTreg.AP +1 1 +.names RW.BLIF RW_c +1 1 +.names cpu_est_0_.BLIF cpu_est_3_reg.BLIF N_147 +11 1 +.names FC_0_.BLIF fc_c_0__n +1 1 +.names a_c_29__n.BLIF a_i_29__n +0 1 +.names FC_1_.BLIF fc_c_1__n +1 1 +.names a_c_30__n.BLIF a_i_30__n +0 1 +.names AMIGA_BUS_ENABLEDFFSHreg.BLIF AMIGA_BUS_ENABLE +1 1 +.names a_c_31__n.BLIF a_i_31__n +0 1 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C +1 1 +.names AMIGA_BUS_DATA_DIR_c.BLIF AMIGA_BUS_DATA_DIR +1 1 +.names vcc_n_n.BLIF AMIGA_BUS_ENABLE_LOW +1 1 +.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_7_.BLIF N_92 +11 1 +.names RST_i.BLIF inst_CLK_OUT_PRE.AR +1 1 +.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n +0 1 +.names N_164.BLIF AS_000_i.BLIF SIZE_DMA_0_sqmuxa_1 +11 1 +.names sm_amiga_i_0__n.BLIF sm_amiga_i_1__n.BLIF N_94 +11 1 +.names SIZE_DMA_0_sqmuxa_1.BLIF N_71_i.BLIF SIZE_DMA_0_sqmuxa +11 1 +.names CLK_030_c.BLIF N_69_i.BLIF N_106 +11 1 +.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_1_.BLIF N_96_1 +11 1 +.names A0_c.BLIF A0_i +0 1 +.names CLK_OSZI_c.BLIF SIZE_DMA_0_.C +1 1 +.names N_96_1.BLIF state_machine_un81_bgack_030_int_n.BLIF N_96 +11 1 +.names size_c_1__n.BLIF size_i_1__n +0 1 +.names CLK_000_D0_i.BLIF N_165.BLIF N_93_1 +11 1 +.names N_77.BLIF SM_AMIGA_0_.BLIF N_231 +11 1 +.names RST_i.BLIF SIZE_DMA_0_.AP +1 1 +.names N_93_1.BLIF VPA_D_i.BLIF N_93 +11 1 +.names N_167.BLIF SM_AMIGA_1_.BLIF N_232 +11 1 +.names sm_amiga_ns_e_0_1_0__n.BLIF N_153_i.BLIF sm_amiga_ns_e_0_0__n +11 1 +.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +0 1 +.names N_151_i.BLIF N_149_i.BLIF sm_amiga_ns_e_0_1_1__n +11 1 +.names N_79.BLIF sm_amiga_i_1__n.BLIF N_233 +11 1 +.names sm_amiga_ns_e_0_1_1__n.BLIF N_150_i.BLIF sm_amiga_ns_e_0_1__n +11 1 +.names N_61.BLIF SM_AMIGA_2_.BLIF N_234 +11 1 +.names CLK_OSZI_c.BLIF SIZE_DMA_1_.C +1 1 +.names N_148_i.BLIF N_146_i.BLIF cpu_est_ns_0_1_2__n +11 1 +.names RST_c.BLIF RST_i +0 1 +.names cpu_est_ns_0_1_2__n.BLIF N_147_i.BLIF cpu_est_ns_0_2__n +11 1 +.names a_c_16__n.BLIF a_i_16__n +0 1 +.names RST_i.BLIF SIZE_DMA_1_.AP +1 1 +.names AS_000_DMA_i.BLIF BGACK_030_INT_i.BLIF N_155_1 +11 1 +.names a_c_18__n.BLIF a_i_18__n +0 1 +.names N_155_1.BLIF nEXP_SPACE_i.BLIF N_155 +11 1 +.names a_c_19__n.BLIF a_i_19__n +0 1 +.names N_160.BLIF SM_AMIGA_6_.BLIF N_153_1 +11 1 +.names a_c_24__n.BLIF a_i_24__n +0 1 +.names N_153_1.BLIF nEXP_SPACE_i.BLIF N_153 +11 1 +.names a_c_25__n.BLIF a_i_25__n +0 1 +.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C +1 1 +.names CLK_000_D0_i.BLIF SM_AMIGA_6_.BLIF N_151_1 +11 1 +.names a_c_26__n.BLIF a_i_26__n +0 1 +.names N_151_1.BLIF nEXP_SPACE_c.BLIF N_151 +11 1 +.names a_c_27__n.BLIF a_i_27__n +0 1 +.names RST_i.BLIF inst_FPU_CS_INTreg.AP +1 1 +.names BGACK_030_INT_i.BLIF RW_c.BLIF N_144_1 +11 1 +.names a_c_28__n.BLIF a_i_28__n +0 1 +.names N_144_1.BLIF nEXP_SPACE_i.BLIF N_144 +11 1 +.names CLK_CNT_P_0_.BLIF CLK_CNT_P_0_.D +0 1 +.names A0_i.BLIF size_c_0__n.BLIF N_125_1 +11 1 +.names N_68.BLIF cpu_estse_0_un3_n +0 1 +.names N_125_1.BLIF size_i_1__n.BLIF N_125 +11 1 +.names cpu_est_1_.BLIF N_68.BLIF cpu_estse_0_un1_n +11 1 +.names CLK_OSZI_c.BLIF inst_DTACK_SYNC.C +1 1 +.names cpu_est_ns_0_1_1__n.BLIF cpu_est_ns_0_2_1__n.BLIF cpu_est_ns_0_1__n +11 1 +.names cpu_est_ns_1__n.BLIF cpu_estse_0_un3_n.BLIF cpu_estse_0_un0_n +11 1 +.names AS_000_i.BLIF LDS_000_i.BLIF state_machine_a0_dma_4_1_n +11 1 +.names cpu_estse_0_un1_n.BLIF cpu_estse_0_un0_n.BLIF cpu_est_1_.D +1- 1 +-1 1 +.names RST_i.BLIF inst_DTACK_SYNC.AP +1 1 +.names N_71_i.BLIF UDS_000_c.BLIF state_machine_a0_dma_4_2_n +11 1 +.names N_68.BLIF cpu_estse_1_un3_n +0 1 +.names state_machine_a0_dma_4_1_n.BLIF state_machine_a0_dma_4_2_n.BLIF state_machine_a0_dma_4_n +11 1 +.names cpu_est_2_.BLIF N_68.BLIF cpu_estse_1_un1_n +11 1 +.names CLK_030_c.BLIF N_69.BLIF N_107_1 +11 1 +.names cpu_est_ns_2__n.BLIF cpu_estse_1_un3_n.BLIF cpu_estse_1_un0_n +11 1 +.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF N_107_2 +11 1 +.names cpu_estse_1_un1_n.BLIF cpu_estse_1_un0_n.BLIF cpu_est_2_.D +1- 1 +-1 1 +.names CLK_OSZI_c.BLIF inst_A0_DMA.C +1 1 +.names N_107_1.BLIF N_107_2.BLIF N_107 +11 1 +.names N_68.BLIF cpu_estse_2_un3_n +0 1 +.names DTACK_i.BLIF N_61_i.BLIF N_97_1 +11 1 +.names cpu_est_3_reg.BLIF N_68.BLIF cpu_estse_2_un1_n +11 1 +.names RST_i.BLIF inst_A0_DMA.AP +1 1 +.names SM_AMIGA_3_.BLIF inst_VPA_D.BLIF N_97_2 +11 1 +.names N_176_i.BLIF cpu_estse_2_un3_n.BLIF cpu_estse_2_un0_n +11 1 +.names N_97_1.BLIF N_97_2.BLIF N_97 +11 1 +.names cpu_estse_2_un1_n.BLIF cpu_estse_2_un0_n.BLIF cpu_est_3_reg.D +1- 1 +-1 1 +.names N_61_i.BLIF N_76_i.BLIF N_95_1 +11 1 +.names state_machine_un10_bg_030_n.BLIF bg_000_0_un3_n +0 1 +.names SM_AMIGA_3_.BLIF VMA_INT_i.BLIF N_95_2 +11 1 +.names BG_030_c.BLIF state_machine_un10_bg_030_n.BLIF bg_000_0_un1_n +11 1 +.names CLK_OSZI_c.BLIF BG_000DFFSHreg.C +1 1 +.names N_95_1.BLIF N_95_2.BLIF N_95_3 +11 1 .names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n 11 1 +.names N_95_3.BLIF VPA_D_i.BLIF N_95 +11 1 .names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF BG_000DFFSHreg.D 1- 1 -1 1 -.names inst_CLK_000_D0.BLIF inst_CLK_000_D1.D +.names RST_i.BLIF BG_000DFFSHreg.AP 1 1 -.names N_249.BLIF a0_dma_0_un3_n -0 1 -.names inst_A0_DMA.BLIF N_249.BLIF a0_dma_0_un1_n +.names N_154_i.BLIF N_152_i.BLIF sm_amiga_ns_e_0_1_0__n 11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C -1 1 -.names CLK_OSZI_c.BLIF inst_CLK_000_D1.C -1 1 -.names N_128.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n -11 1 -.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF inst_A0_DMA.D -1- 1 --1 1 -.names RST_i.BLIF SM_AMIGA_3_.AR -1 1 -.names RST_i.BLIF inst_CLK_000_D1.AP -1 1 -.names N_228.BLIF N_228_i +.names N_96.BLIF N_96_i 0 1 -.names N_216.BLIF dtack_sync_0_un3_n -0 1 -.names N_228_i.BLIF N_216.BLIF dtack_sync_0_un1_n +.names N_69_i_4.BLIF N_69_i_5.BLIF N_69_i 11 1 -.names inst_BGACK_030_INTreg.BLIF AMIGA_BUS_DATA_DIR_m1_0_x2.X1 -1 1 -.names inst_DTACK_SYNC.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C -1 1 -.names dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.D -1- 1 --1 1 -.names RW_c.BLIF AMIGA_BUS_DATA_DIR_m1_0_x2.X2 -1 1 -.names N_215.BLIF lds_000_int_0_un3_n +.names N_63.BLIF dsack1_int_0_un3_n 0 1 -.names RST_i.BLIF SM_AMIGA_2_.AR -1 1 -.names state_machine_lds_000_int_5_n.BLIF N_215.BLIF lds_000_int_0_un1_n +.names AS_000_i.BLIF N_71_i.BLIF A0_DMA_0_sqmuxa_i_0_0_1 11 1 -.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n +.names N_96_i.BLIF N_63.BLIF dsack1_int_0_un1_n 11 1 -.names cpu_est_2_.BLIF cpu_est_ns_0_0_x2_1_.X1 -1 1 -.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INT.D -1- 1 --1 1 -.names N_215.BLIF uds_000_int_0_un3_n -0 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C -1 1 -.names cpu_est_3_reg.BLIF cpu_est_ns_0_0_x2_1_.X2 -1 1 -.names state_machine_uds_000_int_5_n.BLIF N_215.BLIF uds_000_int_0_un1_n -11 1 -.names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n -11 1 -.names RST_i.BLIF SM_AMIGA_1_.AR -1 1 -.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF inst_UDS_000_INT.D -1- 1 --1 1 -.names CLK_CNT_N_0_.BLIF G_103.X1 -1 1 -.names N_33.BLIF fpu_cs_int_0_un3_n -0 1 -.names AS_030_c.BLIF N_33.BLIF fpu_cs_int_0_un1_n -11 1 -.names CLK_CNT_N_1_.BLIF G_103.X2 -1 1 -.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C -1 1 -.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D -1- 1 --1 1 -.names N_249.BLIF ds_000_dma_0_un3_n -0 1 -.names RST_i.BLIF SM_AMIGA_0_.AR -1 1 -.names CLK_CNT_P_0_.BLIF G_109.X1 -1 1 -.names inst_DS_000_DMA.BLIF N_249.BLIF ds_000_dma_0_un1_n -11 1 -.names state_machine_ds_000_dma_5_n.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n -11 1 -.names CLK_CNT_P_1_.BLIF G_109.X2 -1 1 -.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF inst_DS_000_DMA.D -1- 1 --1 1 -.names CLK_CNT_P_0_.BLIF CLK_CNT_P_1_.D -1 1 -.names N_35.BLIF as_030_000_sync_0_un3_n -0 1 -.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_4.BLIF N_35.BLIF as_030_000_sync_0_un1_n -11 1 -.names CLK_OSZI_c.BLIF CLK_CNT_P_1_.C -1 1 -.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D -1 1 -.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n -11 1 -.names inst_CLK_000_D4.BLIF inst_CLK_000_D5.D -1 1 -.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF inst_AS_030_000_SYNC.D -1- 1 --1 1 -.names RST_i.BLIF CLK_CNT_P_1_.AR -1 1 -.names inst_CLK_000_D6.BLIF CLK_000_D6_i -0 1 -.names inst_CLK_000_D5.BLIF CLK_000_D6_i.BLIF state_machine_un6_clk_000_d5_n -11 1 -.names nEXP_SPACE_c.BLIF nEXP_SPACE_i -0 1 -.names BGACK_030_INT_i.BLIF nEXP_SPACE_i.BLIF N_217 -11 1 -.names CLK_OSZI_c.BLIF SIZE_DMA_0_.C -1 1 -.names inst_CLK_000_D2.BLIF CLK_000_D2_i -0 1 -.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i -0 1 -.names RST_i.BLIF SIZE_DMA_0_.AP -1 1 -.names a_c_19__n.BLIF a_i_19__n -0 1 -.names a_c_18__n.BLIF a_i_18__n -0 1 -.names a_c_16__n.BLIF a_i_16__n -0 1 -.names SIZE_DMA_1_sqmuxa.BLIF SIZE_DMA_1_sqmuxa_i -0 1 -.names CLK_OSZI_c.BLIF SIZE_DMA_1_.C -1 1 -.names N_249.BLIF size_dma_0_1__un3_n -0 1 -.names SIZE_DMA_1_.BLIF N_249.BLIF size_dma_0_1__un1_n -11 1 -.names RST_i.BLIF SIZE_DMA_1_.AP -1 1 -.names SIZE_DMA_1_sqmuxa_i.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un0_n -11 1 -.names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D -1- 1 --1 1 -.names SIZE_DMA_0_sqmuxa.BLIF SIZE_DMA_0_sqmuxa_i -0 1 -.names N_249.BLIF size_dma_0_0__un3_n -0 1 -.names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C -1 1 -.names SIZE_DMA_0_.BLIF N_249.BLIF size_dma_0_0__un1_n -11 1 -.names SIZE_DMA_0_sqmuxa_i.BLIF size_dma_0_0__un3_n.BLIF size_dma_0_0__un0_n -11 1 -.names RST_i.BLIF IPL_030DFFSH_0_reg.AP -1 1 -.names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D -1- 1 --1 1 -.names state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n -0 1 -.names BGACK_000_c.BLIF state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n -11 1 -.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un0_n -11 1 -.names CLK_OSZI_c.BLIF IPL_030DFFSH_1_reg.C -1 1 -.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF inst_BGACK_030_INTreg.D -1- 1 --1 1 -.names N_223.BLIF N_223_i -0 1 -.names RST_i.BLIF IPL_030DFFSH_1_reg.AP -1 1 -.names N_61.BLIF dsack1_int_0_un3_n -0 1 -.names N_223_i.BLIF N_61.BLIF dsack1_int_0_un1_n +.names A0_DMA_0_sqmuxa_i_0_0_1.BLIF N_161_i.BLIF A0_DMA_0_sqmuxa_i_0_0 11 1 .names inst_DSACK1_INT.BLIF dsack1_int_0_un3_n.BLIF dsack1_int_0_un0_n 11 1 +.names CLK_OSZI_c.BLIF inst_DSACK1_INT.C +1 1 +.names N_62.BLIF inst_BGACK_030_INTreg.BLIF N_82_i_1 +11 1 .names dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF inst_DSACK1_INT.D 1- 1 -1 1 -.names CLK_OSZI_c.BLIF IPL_030DFFSH_2_reg.C -1 1 -.names N_224.BLIF N_224_i +.names N_82_i_1.BLIF DS_030_c_i.BLIF N_82_i +11 1 +.names A0_DMA_1_sqmuxa.BLIF as_000_dma_0_un3_n 0 1 -.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_134 -11 1 -.names RST_i.BLIF IPL_030DFFSH_2_reg.AP -1 1 -.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n -0 1 -.names sm_amiga_i_5__n.BLIF sm_amiga_i_6__n.BLIF N_133 -11 1 -.names state_machine_un8_clk_000_d2_n.BLIF state_machine_un8_clk_000_d2_i_n -0 1 -.names A_16_.BLIF a_c_16__n -1 1 -.names SM_AMIGA_7_.BLIF state_machine_un8_clk_000_d2_i_n.BLIF N_132 -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_7_.C -1 1 -.names A_17_.BLIF a_c_17__n -1 1 -.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n -0 1 -.names A_18_.BLIF a_c_18__n -1 1 -.names N_75.BLIF sm_amiga_i_7__n.BLIF N_131 -11 1 -.names RST_i.BLIF SM_AMIGA_7_.AP -1 1 -.names A_19_.BLIF a_c_19__n -1 1 -.names CLK_030_c.BLIF N_66_i.BLIF N_126 -11 1 -.names A_20_.BLIF a_c_20__n -1 1 -.names N_151.BLIF N_176.BLIF SIZE_DMA_0_sqmuxa -11 1 -.names A_21_.BLIF a_c_21__n -1 1 -.names inst_BGACK_030_INT_D.BLIF BGACK_030_INT_D_i -0 1 -.names A_22_.BLIF a_c_22__n -1 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_D_i.BLIF N_226 -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C -1 1 -.names A_23_.BLIF a_c_23__n -1 1 -.names SM_AMIGA_1_.BLIF state_machine_un6_clk_000_d5_n.BLIF N_223 -11 1 -.names A_24_.BLIF a_c_24__n -1 1 -.names AS_030_c.BLIF AS_030_i -0 1 -.names RST_i.BLIF SM_AMIGA_6_.AR -1 1 -.names A_25_.BLIF a_c_25__n -1 1 -.names AS_030_i.BLIF sm_amiga_i_5__n.BLIF AS_000_INT_1_sqmuxa -11 1 -.names A_26_.BLIF a_c_26__n -1 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i -0 1 -.names A_27_.BLIF a_c_27__n -1 1 -.names LDS_000_i.BLIF UDS_000_i.BLIF N_176 -11 1 -.names A_28_.BLIF a_c_28__n -1 1 -.names LDS_000_c.BLIF UDS_000_c.BLIF N_175 -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C -1 1 -.names A_29_.BLIF a_c_29__n -1 1 -.names N_59_i.BLIF SM_AMIGA_0_.BLIF N_173 -11 1 -.names A_30_.BLIF a_c_30__n -1 1 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_249 -11 1 -.names RST_i.BLIF SM_AMIGA_5_.AR -1 1 -.names A_31_.BLIF a_c_31__n -1 1 -.names SM_AMIGA_6_.BLIF nEXP_SPACE_i.BLIF N_156 -11 1 -.names CLK_000_D0_i.BLIF N_156.BLIF N_146 -11 1 -.names nEXP_SPACE.BLIF nEXP_SPACE_c -1 1 -.names RW_c.BLIF RW_i -0 1 -.names inst_AS_000_DMA.BLIF RW_i.BLIF N_144 -11 1 -.names CLK_OSZI_c.BLIF inst_VPA_SYNC.C -1 1 -.names BG_030.BLIF BG_030_c -1 1 -.names N_71_i.BLIF SM_AMIGA_1_.BLIF N_142 -11 1 -.names BG_000DFFSHreg.BLIF BG_000 -1 1 -.names N_59.BLIF SM_AMIGA_0_.BLIF N_141 -11 1 -.names RST_i.BLIF inst_VPA_SYNC.AP -1 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030 -1 1 -.names inst_CLK_000_D0.BLIF SM_AMIGA_2_.BLIF N_140 -11 1 -.names BGACK_000.BLIF BGACK_000_c -1 1 -.names N_71.BLIF SM_AMIGA_1_.BLIF N_139 -11 1 -.names CLK_030.BLIF CLK_030_c -1 1 -.names inst_CLK_000_D0.BLIF CLK_000_D0_i -0 1 -.names CLK_000.BLIF CLK_000_c -1 1 -.names CLK_000_D0_i.BLIF SM_AMIGA_2_.BLIF N_137 -11 1 -.names CLK_OSZI_c.BLIF inst_DSACK1_INT.C -1 1 -.names CLK_OSZI.BLIF CLK_OSZI_c -1 1 -.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n -0 1 -.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT -1 1 -.names N_137_i.BLIF N_138_i.BLIF sm_amiga_ns_0_5__n -11 1 .names RST_i.BLIF inst_DSACK1_INT.AP 1 1 -.names CLK_OUT_INTreg.BLIF CLK_EXP -1 1 -.names CLK_000_D0_i.BLIF N_134_i.BLIF SM_AMIGA_4_.D +.names inst_BGACK_030_INTreg.BLIF N_70.BLIF AMIGA_BUS_ENABLE_0_sqmuxa_2_1 11 1 -.names inst_FPU_CS_INTreg.BLIF FPU_CS -1 1 -.names inst_CLK_000_D0.BLIF N_133_i.BLIF SM_AMIGA_5_.D +.names inst_AS_000_DMA.BLIF A0_DMA_1_sqmuxa.BLIF as_000_dma_0_un1_n 11 1 -.names IPL_030DFFSH_0_reg.BLIF IPL_030_0_ -1 1 -.names N_131_i.BLIF N_132_i.BLIF SM_AMIGA_6_.D +.names AMIGA_BUS_ENABLE_0_sqmuxa_2_1.BLIF N_222.BLIF AMIGA_BUS_ENABLE_0_sqmuxa_2 11 1 -.names IPL_030DFFSH_1_reg.BLIF IPL_030_1_ -1 1 -.names N_73_i.BLIF N_130_i.BLIF state_machine_lds_000_int_5_0_n +.names A0_DMA_0_sqmuxa_i_0.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n 11 1 -.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C -1 1 -.names IPL_030DFFSH_2_reg.BLIF IPL_030_2_ -1 1 -.names A0_i.BLIF N_73_i.BLIF state_machine_uds_000_int_5_0_n +.names AS_030_000_SYNC_i.BLIF inst_BGACK_030_INTreg.BLIF N_100_i_1 11 1 -.names IPL_0_.BLIF ipl_c_0__n -1 1 -.names N_127_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i.BLIF N_35_0 -11 1 -.names RST_i.BLIF inst_VMA_INTreg.AP -1 1 -.names IPL_1_.BLIF ipl_c_1__n -1 1 -.names AS_030_i.BLIF N_126_i.BLIF N_33_0 -11 1 -.names IPL_2_.BLIF ipl_c_2__n -1 1 -.names AS_030_i.BLIF N_228_i.BLIF N_216_0 -11 1 -.names AS_030_i.BLIF N_73.BLIF N_215_0 -11 1 -.names BG_030_c_i.BLIF N_227_i.BLIF state_machine_un10_bg_030_0_n -11 1 -.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C -1 1 -.names AS_030_i.BLIF N_224_i.BLIF N_214_0 -11 1 -.names vcc_n_n.BLIF AVEC -1 1 -.names BGACK_000_c.BLIF N_65.BLIF state_machine_un6_bgack_000_0_n -11 1 -.names RST_i.BLIF inst_BGACK_030_INTreg.AP -1 1 -.names UDS_000_c.BLIF UDS_000_i -0 1 -.names cpu_est_3_reg.BLIF E -1 1 -.names LDS_000_c.BLIF LDS_000_i -0 1 -.names VPA.BLIF VPA_c -1 1 -.names inst_VMA_INTreg.BLIF VMA -1 1 -.names CLK_000_D0_i.BLIF N_67_i.BLIF N_75_0 -11 1 -.names CLK_OSZI_i.BLIF CLK_CNT_N_0_.C -1 1 -.names RST.BLIF RST_c -1 1 -.names N_61_0.BLIF N_156_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i -11 1 -.names RESETDFFRHreg.BLIF RESET -1 1 -.names DS_030_c_i.BLIF N_57.BLIF N_73_i -11 1 -.names RST_i.BLIF CLK_CNT_N_0_.AR -1 1 -.names RW.BLIF RW_c -1 1 -.names CLK_000_D0_i.BLIF state_machine_un6_clk_000_d5_i_n.BLIF N_71_i -11 1 -.names FC_0_.BLIF fc_c_0__n -1 1 -.names N_151.BLIF N_175_i.BLIF un1_as_000_dma5_i_0__n -11 1 -.names FC_1_.BLIF fc_c_1__n -1 1 -.names SM_AMIGA_6_.BLIF nEXP_SPACE_c.BLIF N_67_i -11 1 -.names CLK_CNT_N_0_.BLIF CLK_CNT_N_1_.D -1 1 -.names AMIGA_BUS_ENABLEDFFSHreg.BLIF AMIGA_BUS_ENABLE -1 1 -.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF N_65_i -11 1 -.names AMIGA_BUS_DATA_DIR_m1_0_x2.BLIF AMIGA_BUS_DATA_DIR -1 1 -.names inst_BGACK_030_INT_D.BLIF BGACK_030_INT_i.BLIF N_62_i -11 1 -.names CLK_OSZI_i.BLIF CLK_CNT_N_1_.C -1 1 -.names vcc_n_n.BLIF AMIGA_BUS_ENABLE_LOW -1 1 -.names AS_030_i.BLIF N_223_i.BLIF N_61_0 -11 1 -.names inst_AS_000_INT.BLIF inst_CLK_000_D0.BLIF N_59_i -11 1 -.names RST_i.BLIF CLK_CNT_N_1_.AP -1 1 -.names N_59_i.BLIF N_154.BLIF N_221_1 -11 1 -.names RW_c.BLIF state_machine_uds_000_int_5_0_m2_un3_n -0 1 -.names N_221_1.BLIF cpu_est_2_.BLIF N_221 -11 1 -.names SM_AMIGA_5_.BLIF RW_c.BLIF state_machine_uds_000_int_5_0_m2_un1_n -11 1 -.names CLK_000_D0_i.BLIF N_155.BLIF N_219_1 -11 1 -.names SM_AMIGA_4_.BLIF state_machine_uds_000_int_5_0_m2_un3_n.BLIF state_machine_uds_000_int_5_0_m2_un0_n -11 1 -.names N_219_1.BLIF VPA_i.BLIF N_219 -11 1 -.names state_machine_uds_000_int_5_0_m2_un1_n.BLIF state_machine_uds_000_int_5_0_m2_un0_n.BLIF N_57 +.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF inst_AS_000_DMA.D 1- 1 -1 1 -.names CLK_OSZI_c.BLIF CLK_CNT_P_0_.C -1 1 -.names N_151_1.BLIF BGACK_030_INT_i.BLIF N_151 +.names CLK_000_D2_i.BLIF inst_CLK_000_D3.BLIF N_100_i_2 11 1 -.names N_144_i.BLIF un1_as_000_dma5_i_0__n.BLIF state_machine_ds_000_dma_5_0_n -11 1 -.names N_176_i.BLIF N_151.BLIF SIZE_DMA_1_sqmuxa_1 -11 1 -.names N_141_i.BLIF N_142_i.BLIF sm_amiga_ns_0_7__n -11 1 -.names RST_i.BLIF CLK_CNT_P_0_.AR -1 1 -.names SIZE_DMA_1_sqmuxa_1.BLIF N_175_i.BLIF SIZE_DMA_1_sqmuxa -11 1 -.names N_139_i.BLIF N_140_i.BLIF N_46_0 -11 1 -.names inst_CLK_000_D3.BLIF AS_030_000_SYNC_i.BLIF state_machine_un8_clk_000_d2_1_n -11 1 -.names N_135_i.BLIF N_136_i.BLIF SM_AMIGA_3_.D -11 1 -.names state_machine_un8_clk_000_d2_1_n.BLIF CLK_000_D2_i.BLIF state_machine_un8_clk_000_d2_n -11 1 -.names N_143_i.BLIF N_154_i.BLIF N_161_i -11 1 -.names N_173_i.BLIF N_132_i.BLIF sm_amiga_ns_0_1_0__n -11 1 -.names N_88_i.BLIF N_145_i.BLIF cpu_est_ns_0_2__n -11 1 -.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C -1 1 -.names sm_amiga_ns_0_1_0__n.BLIF N_146_i.BLIF sm_amiga_ns_0_0__n -11 1 -.names N_147_i.BLIF N_148_i.BLIF cpu_est_ns_e_0_0__n -11 1 -.names N_155_i.BLIF cpu_est_ns_0_0_x2_1_.BLIF cpu_est_ns_0_1_1__n -11 1 -.names cpu_est_3_reg.BLIF cpu_est_i_3__n +.names N_223.BLIF as_000_int_0_un3_n 0 1 -.names RST_i.BLIF inst_LDS_000_INT.AP -1 1 -.names cpu_est_ns_0_1_1__n.BLIF N_153_i.BLIF cpu_est_ns_0_1__n -11 1 -.names cpu_est_3_reg.BLIF cpu_est_i_1__n.BLIF N_72_i -11 1 -.names CLK_000_D0_i.BLIF SM_AMIGA_3_.BLIF N_138_1 -11 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n -0 1 -.names N_138_1.BLIF state_machine_un23_clk_000_d0_n.BLIF N_138 -11 1 -.names SM_AMIGA_3_.BLIF state_machine_un23_clk_000_d0_0_n.BLIF N_77_0 -11 1 -.names A0_i.BLIF size_c_0__n.BLIF N_130_1 -11 1 -.names CLK_OSZI_c.BLIF inst_DTACK_SYNC.C -1 1 -.names N_130_1.BLIF size_i_1__n.BLIF N_130 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_0__n -0 1 -.names LDS_000_i.BLIF N_151.BLIF N_128_1 -11 1 -.names cpu_est_1_.BLIF cpu_est_ns_0_0_m2_2__un3_n -0 1 -.names RST_i.BLIF inst_DTACK_SYNC.AP -1 1 -.names N_128_1.BLIF UDS_000_c.BLIF N_128 -11 1 -.names cpu_est_2_.BLIF cpu_est_1_.BLIF cpu_est_ns_0_0_m2_2__un1_n -11 1 -.names N_62.BLIF N_67.BLIF N_52_0_1 -11 1 -.names cpu_est_i_0__n.BLIF cpu_est_ns_0_0_m2_2__un3_n.BLIF cpu_est_ns_0_0_m2_2__un0_n -11 1 -.names N_173_i.BLIF N_226_i.BLIF N_52_0_2 -11 1 -.names cpu_est_ns_0_0_m2_2__un1_n.BLIF cpu_est_ns_0_0_m2_2__un0_n.BLIF N_88 -1- 1 --1 1 -.names N_52_0_1.BLIF N_52_0_2.BLIF N_52_0 -11 1 -.names inst_VMA_INTreg.BLIF VMA_INT_i -0 1 -.names CLK_OSZI_c.BLIF inst_A0_DMA.C -1 1 -.names N_72_i.BLIF N_228_1.BLIF N_224_1 -11 1 -.names VPA_c.BLIF VPA_i -0 1 -.names VMA_INT_i.BLIF VPA_i.BLIF N_224_2 -11 1 -.names inst_CLK_000_D0.BLIF SM_AMIGA_3_.BLIF N_228_1 -11 1 -.names RST_i.BLIF inst_A0_DMA.AP -1 1 -.names N_224_1.BLIF N_224_2.BLIF N_224 -11 1 -.names DTACK_c.BLIF DTACK_i -0 1 -.names AS_030_c.BLIF CLK_000_c.BLIF N_227_1 -11 1 -.names N_62.BLIF N_173.BLIF N_225 -11 1 -.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF N_227_2 -11 1 -.names A0_c.BLIF A0_i -0 1 -.names N_227_1.BLIF N_227_2.BLIF N_227 -11 1 -.names size_c_1__n.BLIF size_i_1__n -0 1 -.names CLK_OSZI_c.BLIF BG_000DFFSHreg.C -1 1 -.names DTACK_i.BLIF N_228_1.BLIF N_228_1_0 -11 1 -.names CLK_000_D0_i.BLIF N_77.BLIF N_135 -11 1 -.names N_228_1_0.BLIF VPA_c.BLIF N_228 -11 1 -.names sm_amiga_i_3__n.BLIF sm_amiga_i_4__n.BLIF N_136 -11 1 -.names RST_i.BLIF BG_000DFFSHreg.AP -1 1 -.names CLK_030_c.BLIF N_66.BLIF N_127_1 -11 1 -.names N_72.BLIF cpu_est_2_.BLIF N_143 -11 1 -.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF N_127_2 -11 1 -.names cpu_est_0_.BLIF cpu_est_3_reg.BLIF N_145 -11 1 -.names N_127_1.BLIF N_127_2.BLIF N_127 -11 1 -.names N_65.BLIF cpu_est_0_.BLIF N_147 -11 1 -.names CLK_030_c_i.BLIF AS_000_c_i.BLIF N_151_1 -11 1 -.names N_65_i.BLIF cpu_est_i_0__n.BLIF N_148 -11 1 .names CLK_OSZI_c.BLIF inst_AS_000_DMA.C 1 1 -.names a_i_16__n.BLIF a_i_18__n.BLIF N_66_i_2 +.names N_100_i_1.BLIF N_100_i_2.BLIF N_100_i 11 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_153 +.names N_72.BLIF N_223.BLIF as_000_int_0_un1_n 11 1 -.names a_c_17__n.BLIF fc_c_0__n.BLIF N_66_i_3 +.names AS_030_c.BLIF CLK_000_c.BLIF state_machine_un8_bg_030_1_n 11 1 -.names N_153.BLIF cpu_est_i_3__n.BLIF N_154 +.names inst_AS_000_INT.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n 11 1 .names RST_i.BLIF inst_AS_000_DMA.AP 1 1 -.names N_66_i_1.BLIF N_66_i_2.BLIF N_66_i_4 +.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF state_machine_un8_bg_030_2_n 11 1 -.names cpu_est_1_.BLIF cpu_est_i_1__n -0 1 -.names N_66_i_3.BLIF fc_c_1__n.BLIF N_66_i_5 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_155 -11 1 -.names N_66_i_4.BLIF N_66_i_5.BLIF N_66_i -11 1 -.names N_219_i.BLIF N_221_i.BLIF state_machine_un15_clk_000_d0_0_n -11 1 -.names a_c_20__n.BLIF a_c_21__n.BLIF N_237_1 -11 1 -.names N_225_i.BLIF N_226_i.BLIF un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0 -11 1 -.names CLK_OSZI_c.BLIF AMIGA_BUS_ENABLEDFFSHreg.C -1 1 -.names a_c_22__n.BLIF a_c_23__n.BLIF N_237_2 -11 1 -.names RST_c.BLIF RST_i -0 1 -.names N_237_1.BLIF N_237_2.BLIF N_237 -11 1 -.names a_c_24__n.BLIF a_i_24__n -0 1 -.names RST_i.BLIF AMIGA_BUS_ENABLEDFFSHreg.AP -1 1 -.names a_i_24__n.BLIF a_i_25__n.BLIF N_247_1 -11 1 -.names a_c_25__n.BLIF a_i_25__n -0 1 -.names a_i_26__n.BLIF a_i_27__n.BLIF N_247_2 -11 1 -.names a_c_26__n.BLIF a_i_26__n -0 1 -.names a_i_28__n.BLIF a_i_29__n.BLIF N_247_3 -11 1 -.names a_c_27__n.BLIF a_i_27__n -0 1 -.names a_i_30__n.BLIF a_i_31__n.BLIF N_247_4 -11 1 -.names a_c_28__n.BLIF a_i_28__n -0 1 -.names CLK_OSZI_c.BLIF inst_AS_000_INT.C -1 1 -.names N_247_1.BLIF N_247_2.BLIF N_247_5 -11 1 -.names a_c_29__n.BLIF a_i_29__n -0 1 -.names N_247_3.BLIF N_247_4.BLIF N_247_6 -11 1 -.names a_c_30__n.BLIF a_i_30__n -0 1 -.names RST_i.BLIF inst_AS_000_INT.AP -1 1 -.names N_247_5.BLIF N_247_6.BLIF N_247 -11 1 -.names a_c_31__n.BLIF a_i_31__n -0 1 -.names N_145.BLIF N_145_i -0 1 -.names cpu_est_ns_0_2__n.BLIF cpu_est_ns_2__n -0 1 -.names N_143.BLIF N_143_i -0 1 -.names G_103.BLIF CLK_CNT_N_0_.D -0 1 -.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C -1 1 -.names N_154.BLIF N_154_i -0 1 -.names CLK_OSZI_c.BLIF CLK_OSZI_i -0 1 -.names N_153.BLIF N_153_i -0 1 -.names G_109.BLIF CLK_CNT_P_0_.D -0 1 -.names RST_i.BLIF inst_AS_030_000_SYNC.AP -1 1 -.names N_155.BLIF N_155_i -0 1 -.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i -0 1 -.names cpu_est_ns_0_1__n.BLIF cpu_est_ns_1__n -0 1 -.names G_109.BLIF G_103.BLIF inst_CLK_OUT_PRE.D -11 1 -.names N_135.BLIF N_135_i -0 1 -.names N_52.BLIF amiga_bus_enable_0_un3_n -0 1 -.names N_136.BLIF N_136_i -0 1 -.names un1_AMIGA_BUS_ENABLE_0_sqmuxa_2.BLIF N_52.BLIF amiga_bus_enable_0_un1_n -11 1 -.names CLK_OSZI_c.BLIF inst_DS_000_DMA.C -1 1 -.names N_225.BLIF N_225_i -0 1 -.names AMIGA_BUS_ENABLEDFFSHreg.BLIF amiga_bus_enable_0_un3_n.BLIF amiga_bus_enable_0_un0_n -11 1 -.names un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0.BLIF un1_AMIGA_BUS_ENABLE_0_sqmuxa_2 -0 1 -.names amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF AMIGA_BUS_ENABLEDFFSHreg.D +.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INT.D 1- 1 -1 1 -.names RST_i.BLIF inst_DS_000_DMA.AP -1 1 -.names N_219.BLIF N_219_i -0 1 -.names state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un3_n -0 1 -.names N_221.BLIF N_221_i -0 1 -.names N_59_i.BLIF state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un1_n +.names state_machine_un8_bg_030_1_n.BLIF state_machine_un8_bg_030_2_n.BLIF state_machine_un8_bg_030_n 11 1 -.names state_machine_un15_clk_000_d0_0_n.BLIF state_machine_un15_clk_000_d0_n +.names N_95.BLIF N_95_i 0 1 +.names N_165_i.BLIF N_166_i.BLIF cpu_est_ns_0_1_1__n +11 1 +.names N_224.BLIF vpa_sync_0_un3_n +0 1 +.names N_242_i.BLIF N_243_i.BLIF cpu_est_ns_0_2_1__n +11 1 +.names N_95_i.BLIF N_224.BLIF vpa_sync_0_un1_n +11 1 +.names CLK_OSZI_c.BLIF inst_AS_000_INT.C +1 1 +.names a_c_20__n.BLIF a_c_21__n.BLIF N_255_1 +11 1 +.names inst_VPA_SYNC.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n +11 1 +.names a_c_22__n.BLIF a_c_23__n.BLIF N_255_2 +11 1 +.names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D +1- 1 +-1 1 +.names RST_i.BLIF inst_AS_000_INT.AP +1 1 +.names N_255_1.BLIF N_255_2.BLIF N_255 +11 1 +.names N_221.BLIF vma_int_0_un3_n +0 1 +.names a_i_24__n.BLIF a_i_25__n.BLIF N_265_1 +11 1 +.names N_92.BLIF N_221.BLIF vma_int_0_un1_n +11 1 +.names a_i_26__n.BLIF a_i_27__n.BLIF N_265_2 +11 1 .names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n 11 1 -.names BGACK_000_c.BLIF a_i_19__n.BLIF N_66_i_1 +.names a_i_28__n.BLIF a_i_29__n.BLIF N_265_3 11 1 .names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF inst_VMA_INTreg.D 1- 1 -1 1 -.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C +.names CLK_OSZI_c.BLIF AMIGA_BUS_ENABLEDFFSHreg.C 1 1 -.names N_156.BLIF N_156_i -0 1 -.names N_65.BLIF ipl_030_0_0__un3_n -0 1 -.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_4 -0 1 -.names IPL_030DFFSH_0_reg.BLIF N_65.BLIF ipl_030_0_0__un1_n +.names a_i_30__n.BLIF a_i_31__n.BLIF N_265_4 11 1 -.names RST_i.BLIF inst_FPU_CS_INTreg.AP +.names state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n +0 1 +.names N_265_1.BLIF N_265_2.BLIF N_265_5 +11 1 +.names BGACK_000_c.BLIF state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n +11 1 +.names RST_i.BLIF AMIGA_BUS_ENABLEDFFSHreg.AP 1 1 -.names N_75_0.BLIF N_75 +.names N_265_3.BLIF N_265_4.BLIF N_265_6 +11 1 +.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un0_n +11 1 +.names N_265_5.BLIF N_265_6.BLIF N_265 +11 1 +.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF inst_BGACK_030_INTreg.D +1- 1 +-1 1 +.names a_c_17__n.BLIF BGACK_000_c.BLIF N_69_i_1 +11 1 +.names SIZE_DMA_0_sqmuxa.BLIF SIZE_DMA_0_sqmuxa_i +0 1 +.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_69_i_2 +11 1 +.names A0_DMA_1_sqmuxa.BLIF size_dma_0_0__un3_n +0 1 +.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C +1 1 +.names a_i_19__n.BLIF a_i_16__n.BLIF N_69_i_3 +11 1 +.names SIZE_DMA_0_.BLIF A0_DMA_1_sqmuxa.BLIF size_dma_0_0__un1_n +11 1 +.names N_69_i_1.BLIF N_69_i_2.BLIF N_69_i_4 +11 1 +.names SIZE_DMA_0_sqmuxa_i.BLIF size_dma_0_0__un3_n.BLIF size_dma_0_0__un0_n +11 1 +.names RST_i.BLIF inst_UDS_000_INT.AP +1 1 +.names N_69_i_3.BLIF a_i_18__n.BLIF N_69_i_5 +11 1 +.names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D +1- 1 +-1 1 +.names N_107.BLIF N_107_i +0 1 +.names A0_DMA_1_sqmuxa.BLIF size_dma_0_1__un3_n +0 1 +.names N_35_0.BLIF N_35 +0 1 +.names SIZE_DMA_1_.BLIF A0_DMA_1_sqmuxa.BLIF size_dma_0_1__un1_n +11 1 +.names N_106.BLIF N_106_i +0 1 +.names N_31.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un0_n +11 1 +.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C +1 1 +.names N_33_0.BLIF N_33 +0 1 +.names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D +1- 1 +-1 1 +.names N_164.BLIF N_164_i +0 1 +.names N_68.BLIF ipl_030_0_0__un3_n +0 1 +.names RST_i.BLIF inst_LDS_000_INT.AP +1 1 +.names N_31_0.BLIF N_31 +0 1 +.names IPL_030DFFSH_0_reg.BLIF N_68.BLIF ipl_030_0_0__un1_n +11 1 +.names N_225_0.BLIF N_225 0 1 .names ipl_c_0__n.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n 11 1 -.names N_176.BLIF N_176_i +.names N_224_0.BLIF N_224 0 1 .names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF IPL_030DFFSH_0_reg.D 1- 1 -1 1 -.names N_52_0.BLIF N_52 +.names N_223_0.BLIF N_223 0 1 -.names N_65.BLIF ipl_030_0_1__un3_n +.names N_68.BLIF ipl_030_0_1__un3_n 0 1 -.names N_173.BLIF N_173_i -0 1 -.names IPL_030DFFSH_1_reg.BLIF N_65.BLIF ipl_030_0_1__un1_n -11 1 -.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C +.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C 1 1 -.names N_226.BLIF N_226_i +.names N_92.BLIF N_92_i +0 1 +.names IPL_030DFFSH_1_reg.BLIF N_68.BLIF ipl_030_0_1__un1_n +11 1 +.names N_93.BLIF N_93_i 0 1 .names ipl_c_1__n.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n 11 1 -.names N_77_0.BLIF N_77 +.names RST_i.BLIF inst_AS_030_000_SYNC.AP +1 1 +.names N_221_0.BLIF N_221 0 1 .names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF IPL_030DFFSH_1_reg.D 1- 1 -1 1 -.names RST_i.BLIF inst_UDS_000_INT.AP -1 1 -.names N_72_i.BLIF N_72 +.names state_machine_un6_bgack_000_0_n.BLIF state_machine_un6_bgack_000_n 0 1 -.names N_65.BLIF ipl_030_0_2__un3_n +.names N_68.BLIF ipl_030_0_2__un3_n 0 1 -.names N_147.BLIF N_147_i +.names inst_CLK_000_D2.BLIF CLK_000_D2_i 0 1 -.names IPL_030DFFSH_2_reg.BLIF N_65.BLIF ipl_030_0_2__un1_n +.names IPL_030DFFSH_2_reg.BLIF N_68.BLIF ipl_030_0_2__un1_n 11 1 -.names N_148.BLIF N_148_i +.names state_machine_un57_bgack_030_int_0_n.BLIF state_machine_un57_bgack_030_int_n 0 1 .names ipl_c_2__n.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n 11 1 -.names cpu_est_ns_e_0_0__n.BLIF cpu_est_0_.D +.names CLK_OSZI_c.BLIF inst_DS_000_DMA.C +1 1 +.names N_238.BLIF N_238_i 0 1 .names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF IPL_030DFFSH_2_reg.D 1- 1 -1 1 -.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C +.names N_163.BLIF N_163_i +0 1 +.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF state_machine_un57_bgack_030_int_0_n +11 1 +.names RST_i.BLIF inst_DS_000_DMA.AP 1 1 -.names N_146.BLIF N_146_i +.names N_236.BLIF N_236_i 0 1 -.names N_65.BLIF cpu_estse_0_un3_n +.names inst_CLK_000_D6.BLIF CLK_000_D6_i 0 1 -.names sm_amiga_ns_0_0__n.BLIF SM_AMIGA_7_.D +.names N_234.BLIF N_234_i 0 1 -.names cpu_est_1_.BLIF N_65.BLIF cpu_estse_0_un1_n +.names inst_CLK_000_D5.BLIF CLK_000_D6_i.BLIF state_machine_un81_bgack_030_int_n 11 1 -.names RST_i.BLIF CLK_OUT_INTreg.AR -1 1 -.names N_88.BLIF N_88_i +.names N_235.BLIF N_235_i 0 1 -.names cpu_est_ns_1__n.BLIF cpu_estse_0_un3_n.BLIF cpu_estse_0_un0_n -11 1 -.names CLK_030_c.BLIF CLK_030_c_i +.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i 0 1 -.names cpu_estse_0_un1_n.BLIF cpu_estse_0_un0_n.BLIF cpu_est_1_.D -1- 1 --1 1 -.names AS_000_c.BLIF AS_000_c_i +.names sm_amiga_ns_e_0_5__n.BLIF SM_AMIGA_2_.D 0 1 -.names N_65.BLIF cpu_estse_1_un3_n +.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_1.BLIF amiga_bus_enable_0_un3_n 0 1 -.names N_59_i.BLIF N_59 -0 1 -.names cpu_est_2_.BLIF N_65.BLIF cpu_estse_1_un1_n -11 1 -.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C -1 1 -.names N_61_0.BLIF N_61 -0 1 -.names cpu_est_ns_2__n.BLIF cpu_estse_1_un3_n.BLIF cpu_estse_1_un0_n -11 1 -.names N_62_i.BLIF N_62 -0 1 -.names cpu_estse_1_un1_n.BLIF cpu_estse_1_un0_n.BLIF cpu_est_2_.D -1- 1 --1 1 -.names RST_i.BLIF inst_CLK_OUT_PRE.AR -1 1 -.names inst_CLK_000_D1.BLIF CLK_000_D1_i -0 1 -.names N_65.BLIF cpu_estse_2_un3_n -0 1 -.names N_65_i.BLIF N_65 -0 1 -.names cpu_est_3_reg.BLIF N_65.BLIF cpu_estse_2_un1_n -11 1 -.names N_66_i.BLIF N_66 -0 1 -.names N_161_i.BLIF cpu_estse_2_un3_n.BLIF cpu_estse_2_un0_n -11 1 -.names N_67_i.BLIF N_67 -0 1 -.names cpu_estse_2_un1_n.BLIF cpu_estse_2_un0_n.BLIF cpu_est_3_reg.D -1- 1 --1 1 .names CLK_OSZI_c.BLIF inst_CLK_000_D5.C 1 1 -.names N_175.BLIF N_175_i +.names N_167.BLIF N_167_i 0 1 -.names vcc_n_n -1 -.names un1_as_000_dma5_i_0__n.BLIF un1_as_000_dma5_0__n +.names AMIGA_BUS_ENABLEDFFSHreg.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_1.BLIF amiga_bus_enable_0_un1_n +11 1 +.names N_233.BLIF N_233_i 0 1 -.names gnd_n_n +.names un1_AMIGA_BUS_ENABLE_2_sqmuxa.BLIF amiga_bus_enable_0_un3_n.BLIF amiga_bus_enable_0_un0_n +11 1 .names RST_i.BLIF inst_CLK_000_D5.AP 1 1 -.names state_machine_un6_clk_000_d5_n.BLIF state_machine_un6_clk_000_d5_i_n +.names N_231.BLIF N_231_i 0 1 -.names N_71_i.BLIF N_71 +.names amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF AMIGA_BUS_ENABLEDFFSHreg.D +1- 1 +-1 1 +.names N_232.BLIF N_232_i 0 1 -.names DS_030_c.BLIF DS_030_c_i +.names N_37.BLIF uds_000_int_0_un3_n 0 1 +.names sm_amiga_ns_e_0_7__n.BLIF SM_AMIGA_0_.D +0 1 +.names state_machine_uds_000_int_6_n.BLIF N_37.BLIF uds_000_int_0_un1_n +11 1 .names inst_CLK_000_D5.BLIF inst_CLK_000_D6.D 1 1 -.names N_73_i.BLIF N_73 +.names state_machine_uds_000_int_6_0_n.BLIF state_machine_uds_000_int_6_n 0 1 -.names N_132.BLIF N_132_i +.names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n +11 1 +.names N_125.BLIF N_125_i 0 1 +.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF inst_UDS_000_INT.D +1- 1 +-1 1 .names CLK_OSZI_c.BLIF inst_CLK_000_D6.C 1 1 -.names N_131.BLIF N_131_i +.names state_machine_lds_000_int_6_0_n.BLIF state_machine_lds_000_int_6_n 0 1 -.names N_133.BLIF N_133_i +.names N_37.BLIF lds_000_int_0_un3_n 0 1 +.names N_37_0.BLIF N_37 +0 1 +.names state_machine_lds_000_int_6_n.BLIF N_37.BLIF lds_000_int_0_un1_n +11 1 .names RST_i.BLIF inst_CLK_000_D6.AP 1 1 -.names N_134.BLIF N_134_i +.names N_151.BLIF N_151_i 0 1 -.names N_137.BLIF N_137_i +.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n +11 1 +.names sm_amiga_ns_e_0_1__n.BLIF SM_AMIGA_6_.D 0 1 -.names N_138.BLIF N_138_i +.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INT.D +1- 1 +-1 1 +.names N_146.BLIF N_146_i +0 1 +.names N_35.BLIF as_030_000_sync_0_un3_n 0 1 .names inst_CLK_000_D3.BLIF inst_CLK_000_D4.D 1 1 -.names sm_amiga_ns_0_5__n.BLIF SM_AMIGA_2_.D +.names N_147.BLIF N_147_i 0 1 -.names N_139.BLIF N_139_i +.names un1_AS_030_000_SYNC_1_sqmuxa_1.BLIF N_35.BLIF as_030_000_sync_0_un1_n +11 1 +.names N_148.BLIF N_148_i 0 1 +.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n +11 1 .names CLK_OSZI_c.BLIF inst_CLK_000_D4.C 1 1 -.names N_140.BLIF N_140_i +.names cpu_est_ns_0_2__n.BLIF cpu_est_ns_2__n 0 1 -.names N_46_0.BLIF SM_AMIGA_1_.D +.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF inst_AS_030_000_SYNC.D +1- 1 +-1 1 +.names N_145.BLIF N_145_i +0 1 +.names A0_DMA_1_sqmuxa.BLIF ds_000_dma_0_un3_n 0 1 .names RST_i.BLIF inst_CLK_000_D4.AP 1 1 +.names state_machine_ds_000_dma_5_0_n.BLIF state_machine_ds_000_dma_5_n +0 1 +.names inst_DS_000_DMA.BLIF A0_DMA_1_sqmuxa.BLIF ds_000_dma_0_un1_n +11 1 +.names N_143.BLIF N_143_i +0 1 +.names state_machine_ds_000_dma_5_n.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n +11 1 +.names N_144.BLIF N_144_i +0 1 +.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF inst_DS_000_DMA.D +1- 1 +-1 1 +.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c +0 1 +.names N_33.BLIF fpu_cs_int_0_un3_n +0 1 +.names CLK_OSZI_c.BLIF CLK_CNT_P_0_.C +1 1 .names N_142.BLIF N_142_i 0 1 -.names N_141.BLIF N_141_i -0 1 +.names AS_030_c.BLIF N_33.BLIF fpu_cs_int_0_un1_n +11 1 .end diff --git a/Logic/BUS68030.bl1 b/Logic/BUS68030.bl1 index b6c6592..e361ec3 100644 --- a/Logic/BUS68030.bl1 +++ b/Logic/BUS68030.bl1 @@ -1,83 +1,90 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Sat May 24 21:59:14 2014 +#$ DATE Sun May 25 20:57:52 2014 #$ MODULE bus68030 -#$ PINS 59 IPL_030_1_ IPL_030_0_ SIZE_1_ IPL_1_ IPL_0_ A_31_ DSACK_0_ FC_0_ IPL_030_2_ \ -# IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 nEXP_SPACE BERR BG_030 \ -# BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS DTACK \ -# AVEC AVEC_EXP E VPA VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \ -# AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ \ -# A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ -#$ NODES 398 BG_030_c BG_000DFFSHreg BGACK_000_c inst_BGACK_030_INTreg \ -# inst_FPU_CS_INTreg CLK_030_c inst_VMA_INTreg inst_AS_030_000_SYNC CLK_000_c \ -# inst_BGACK_030_INT_D inst_DTACK_SYNC CLK_OSZI_c inst_VPA_SYNC inst_CLK_000_D0 \ -# inst_CLK_000_D1 CLK_OUT_INTreg inst_CLK_000_D2 inst_CLK_000_D6 SM_AMIGA_5_ \ -# IPL_030DFFSH_0_reg vcc_n_n gnd_n_n IPL_030DFFSH_1_reg inst_AS_000_INT SM_AMIGA_6_ \ -# IPL_030DFFSH_2_reg inst_UDS_000_INT inst_LDS_000_INT ipl_c_0__n inst_DSACK1_INT \ -# inst_CLK_000_D3 ipl_c_1__n state_machine_un23_clk_000_d0_n inst_CLK_000_D5 \ -# ipl_c_2__n SM_AMIGA_3_ SM_AMIGA_0_ SM_AMIGA_1_ dsack_c_1__n inst_AS_000_DMA \ -# inst_DS_000_DMA DTACK_c SIZE_DMA_0_ SIZE_DMA_1_ inst_A0_DMA G_103 CLK_CNT_N_0_ VPA_c \ -# CLK_CNT_N_1_ G_109 CLK_CNT_P_0_ RST_c CLK_CNT_P_1_ inst_CLK_000_D4 RESETDFFRHreg \ -# SM_AMIGA_7_ state_machine_un15_clk_000_d0_n RW_c SM_AMIGA_4_ \ -# un1_AMIGA_BUS_ENABLE_0_sqmuxa_2 fc_c_0__n inst_CLK_OUT_PRE SM_AMIGA_2_ fc_c_1__n \ -# AMIGA_BUS_ENABLEDFFSHreg state_machine_un23_clk_000_d0_0_n \ -# state_machine_un6_bgack_000_0_n N_214_0 BG_030_c_i N_227_i \ -# state_machine_un10_bg_030_0_n N_215_0 N_216_0 N_126_i N_33_0 N_127_i N_35_0 \ -# state_machine_uds_000_int_5_0_n N_130_i state_machine_lds_000_int_5_0_n N_132_i \ -# N_131_i cpu_est_0_ cpu_est_1_ N_133_i cpu_est_2_ cpu_est_3_reg N_134_i N_137_i N_138_i \ -# sm_amiga_ns_0_5__n cpu_est_ns_1__n N_139_i cpu_est_ns_2__n N_140_i N_46_0 N_52 \ -# N_142_i N_59 N_141_i N_62 sm_amiga_ns_0_7__n N_65 N_144_i N_67 \ -# state_machine_ds_000_dma_5_0_n N_72 CLK_030_c_i N_77 AS_000_c_i N_88 N_59_i N_217 \ -# N_61_0 N_219 N_62_i N_221 CLK_000_D1_i N_224 N_65_i N_225 N_66_i N_226 N_67_i N_128 \ -# N_175_i N_130 un1_as_000_dma5_i_0__n N_132 state_machine_un6_clk_000_d5_i_n N_135 \ -# N_71_i N_136 DS_030_c_i N_138 N_73_i N_143 N_156_i N_145 \ -# un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i N_146 N_75_0 N_147 N_176_i N_148 N_52_0 N_151 \ -# N_173_i N_153 N_226_i N_154 N_77_0 N_155 N_72_i N_173 N_147_i cpu_est_ns_0_0_x2_1_ \ -# N_148_i AMIGA_BUS_DATA_DIR_m1_0_x2 cpu_est_ns_e_0_0__n N_228_1 N_146_i N_237 \ -# sm_amiga_ns_0_0__n N_247 N_88_i N_227 N_145_i N_228 cpu_est_ns_0_2__n N_127 N_143_i \ -# N_66 N_154_i N_175 N_161_i N_176 N_153_i N_75 N_155_i un1_AMIGA_BUS_ENABLE_1_sqmuxa_4 \ -# cpu_est_ns_0_1__n N_61 N_135_i N_156 N_136_i N_73 N_57 N_225_i N_71 \ -# un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0 state_machine_un6_clk_000_d5_n N_219_i \ -# un1_as_000_dma5_0__n N_221_i N_223 state_machine_un15_clk_000_d0_0_n \ -# state_machine_ds_000_dma_5_n N_144 N_66_i_1 N_141 N_66_i_2 N_142 N_66_i_3 N_139 \ -# N_66_i_4 N_140 N_66_i_5 N_137 N_237_1 N_134 N_237_2 N_133 N_247_1 N_131 N_247_2 \ -# state_machine_lds_000_int_5_n N_247_3 state_machine_uds_000_int_5_n N_247_4 N_35 \ -# N_247_5 N_33 N_247_6 N_126 N_52_0_1 N_216 N_52_0_2 N_215 N_224_1 \ -# state_machine_un10_bg_030_n N_224_2 N_214 N_227_1 state_machine_un6_bgack_000_n \ -# N_227_2 state_machine_un8_clk_000_d2_n N_228_1_0 SIZE_DMA_1_sqmuxa N_127_1 \ -# SIZE_DMA_0_sqmuxa N_127_2 AS_000_INT_1_sqmuxa N_151_1 N_249 SIZE_DMA_1_sqmuxa_1 \ -# CLK_000_D6_i state_machine_un8_clk_000_d2_1_n N_228_i sm_amiga_ns_0_1_0__n \ -# sm_amiga_i_5__n cpu_est_ns_0_1_1__n N_224_i N_138_1 N_223_i N_130_1 \ -# SIZE_DMA_0_sqmuxa_i N_128_1 SIZE_DMA_1_sqmuxa_i N_221_1 a_i_18__n N_219_1 a_i_16__n \ -# vpa_sync_0_un3_n a_i_19__n vpa_sync_0_un1_n AS_030_000_SYNC_i vpa_sync_0_un0_n \ -# CLK_000_D2_i as_000_int_0_un3_n BGACK_030_INT_i as_000_int_0_un1_n nEXP_SPACE_i \ -# as_000_int_0_un0_n AS_030_i as_000_dma_0_un3_n BGACK_030_INT_D_i \ -# as_000_dma_0_un1_n sm_amiga_i_7__n as_000_dma_0_un0_n \ -# state_machine_un8_clk_000_d2_i_n bg_000_0_un3_n sm_amiga_i_6__n bg_000_0_un1_n \ -# sm_amiga_i_4__n bg_000_0_un0_n CLK_000_D0_i a0_dma_0_un3_n RW_i a0_dma_0_un1_n \ -# UDS_000_i a0_dma_0_un0_n LDS_000_i dtack_sync_0_un3_n DTACK_i dtack_sync_0_un1_n \ -# VMA_INT_i dtack_sync_0_un0_n VPA_i lds_000_int_0_un3_n cpu_est_i_0__n \ -# lds_000_int_0_un1_n sm_amiga_i_3__n lds_000_int_0_un0_n cpu_est_i_3__n \ -# uds_000_int_0_un3_n cpu_est_i_1__n uds_000_int_0_un1_n A0_i uds_000_int_0_un0_n \ -# size_i_1__n fpu_cs_int_0_un3_n a_i_30__n fpu_cs_int_0_un1_n a_i_31__n \ -# fpu_cs_int_0_un0_n a_i_28__n ds_000_dma_0_un3_n a_i_29__n ds_000_dma_0_un1_n \ -# a_i_26__n ds_000_dma_0_un0_n a_i_27__n as_030_000_sync_0_un3_n a_i_24__n \ -# as_030_000_sync_0_un1_n a_i_25__n as_030_000_sync_0_un0_n RST_i \ -# size_dma_0_1__un3_n size_dma_0_1__un1_n CLK_OSZI_i size_dma_0_1__un0_n \ -# size_dma_0_0__un3_n FPU_CS_INT_i size_dma_0_0__un1_n AS_030_c size_dma_0_0__un0_n \ -# bgack_030_int_0_un3_n AS_000_c bgack_030_int_0_un1_n bgack_030_int_0_un0_n \ -# DS_030_c dsack1_int_0_un3_n dsack1_int_0_un1_n UDS_000_c dsack1_int_0_un0_n \ -# state_machine_uds_000_int_5_0_m2_un3_n LDS_000_c \ -# state_machine_uds_000_int_5_0_m2_un1_n state_machine_uds_000_int_5_0_m2_un0_n \ -# size_c_0__n cpu_est_ns_0_0_m2_2__un3_n cpu_est_ns_0_0_m2_2__un1_n size_c_1__n \ -# cpu_est_ns_0_0_m2_2__un0_n amiga_bus_enable_0_un3_n a_c_16__n \ -# amiga_bus_enable_0_un1_n amiga_bus_enable_0_un0_n a_c_17__n vma_int_0_un3_n \ -# vma_int_0_un1_n a_c_18__n vma_int_0_un0_n ipl_030_0_0__un3_n a_c_19__n \ -# ipl_030_0_0__un1_n ipl_030_0_0__un0_n a_c_20__n ipl_030_0_1__un3_n \ -# ipl_030_0_1__un1_n a_c_21__n ipl_030_0_1__un0_n ipl_030_0_2__un3_n a_c_22__n \ -# ipl_030_0_2__un1_n ipl_030_0_2__un0_n a_c_23__n cpu_estse_0_un3_n \ -# cpu_estse_0_un1_n a_c_24__n cpu_estse_0_un0_n cpu_estse_1_un3_n a_c_25__n \ -# cpu_estse_1_un1_n cpu_estse_1_un0_n a_c_26__n cpu_estse_2_un3_n cpu_estse_2_un1_n \ -# a_c_27__n cpu_estse_2_un0_n a_c_28__n a_c_29__n a_c_30__n a_c_31__n A0_c nEXP_SPACE_c +#$ PINS 59 SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 SIZE_0_ AS_000 A_30_ \ +# DS_030 A_29_ UDS_000 A_28_ LDS_000 A_27_ A0 A_26_ nEXP_SPACE A_25_ BERR A_24_ BG_030 A_23_ \ +# BG_000 A_22_ BGACK_030 A_21_ BGACK_000 A_20_ CLK_030 A_19_ CLK_000 A_18_ CLK_OSZI A_17_ \ +# CLK_DIV_OUT A_16_ CLK_EXP IPL_030_1_ FPU_CS IPL_030_0_ DTACK IPL_1_ AVEC IPL_0_ AVEC_EXP \ +# DSACK_0_ E FC_0_ VPA VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \ +# AMIGA_BUS_ENABLE_LOW CIIN +#$ NODES 428 A0_c lds_000_int_0_un0_n as_030_000_sync_0_un3_n nEXP_SPACE_c \ +# as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n ds_000_dma_0_un3_n BG_030_c \ +# ds_000_dma_0_un1_n ds_000_dma_0_un0_n inst_BGACK_030_INTreg BG_000DFFSHreg \ +# fpu_cs_int_0_un3_n inst_FPU_CS_INTreg fpu_cs_int_0_un1_n inst_VMA_INTreg \ +# fpu_cs_int_0_un0_n inst_AS_030_000_SYNC BGACK_000_c dtack_sync_0_un3_n \ +# inst_DTACK_SYNC dtack_sync_0_un1_n inst_VPA_SYNC CLK_030_c dtack_sync_0_un0_n \ +# inst_VPA_D a0_dma_0_un3_n inst_CLK_000_D0 CLK_000_c a0_dma_0_un1_n inst_CLK_000_D1 \ +# a0_dma_0_un0_n inst_CLK_000_D2 CLK_OSZI_c inst_CLK_000_D6 inst_CLK_OUT_PRE \ +# inst_BGACK_030_INT_D CLK_OUT_INTreg vcc_n_n gnd_n_n CLK_CNT_P_0_ IPL_030DFFSH_0_reg \ +# SM_AMIGA_5_ SM_AMIGA_7_ IPL_030DFFSH_1_reg A0_DMA_1_sqmuxa SM_AMIGA_1_ \ +# IPL_030DFFSH_2_reg SM_AMIGA_0_ SM_AMIGA_6_ ipl_c_0__n inst_AS_000_DMA \ +# inst_AS_000_INT ipl_c_1__n inst_UDS_000_INT inst_LDS_000_INT ipl_c_2__n \ +# inst_DSACK1_INT inst_CLK_000_D3 state_machine_un57_bgack_030_int_n dsack_c_1__n \ +# state_machine_un81_bgack_030_int_n inst_CLK_000_D5 DTACK_c SM_AMIGA_3_ \ +# state_machine_un6_bgack_000_n inst_DS_000_DMA SIZE_DMA_0_ SIZE_DMA_1_ inst_A0_DMA \ +# inst_CLK_000_D4 SM_AMIGA_4_ RST_c SM_AMIGA_2_ state_machine_un10_bg_030_n \ +# RESETDFFRHreg un1_AS_030_000_SYNC_1_sqmuxa_1 SIZE_DMA_0_sqmuxa RW_c \ +# state_machine_a0_dma_4_n un1_AMIGA_BUS_ENABLE_2_sqmuxa fc_c_0__n \ +# state_machine_lds_000_int_6_n state_machine_uds_000_int_6_n fc_c_1__n \ +# state_machine_ds_000_dma_5_n un1_AMIGA_BUS_ENABLE_1_sqmuxa_1 \ +# AMIGA_BUS_ENABLEDFFSHreg AMIGA_BUS_DATA_DIR_c cpu_est_ns_0_1__n N_165_i N_166_i \ +# N_242_i N_243_i N_70_0 N_94_i N_222_i N_100_i AS_030_000_SYNC_i \ +# AMIGA_BUS_ENABLE_1_sqmuxa_1_i AMIGA_BUS_ENABLE_1_sqmuxa_2_i \ +# un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_0 AMIGA_BUS_ENABLE_0_sqmuxa_2_i \ +# AMIGA_BUS_ENABLE_2_sqmuxa_i CLK_OUT_PRE_0 un1_AMIGA_BUS_ENABLE_2_sqmuxa_0 \ +# BG_030_c_i state_machine_un8_bg_030_i_n state_machine_un10_bg_030_0_n N_82_i N_100 \ +# DS_030_c_i cpu_est_0_ N_80_0 cpu_est_1_ N_79_0 cpu_est_2_ A0_DMA_0_sqmuxa_i_0_0 \ +# cpu_est_3_reg N_77_i N_76_i N_75_i N_162_i un1_AS_030_000_SYNC_1_sqmuxa_1_0 \ +# cpu_est_ns_1__n N_72_i cpu_est_ns_2__n CLK_030_c_i A0_DMA_0_sqmuxa_i_0 N_71_i N_221 \ +# N_69_i N_223 CLK_000_D1_i N_224 N_68_i N_225 N_161_i N_31 N_63_i N_33 N_61_i N_35 N_156_i \ +# N_37 N_157_i N_61 cpu_est_ns_e_0_0__n N_62 N_152_i N_63 N_153_i N_68 N_154_i N_69 \ +# sm_amiga_ns_e_0_0__n N_72 N_149_i N_75 N_150_i N_76 N_151_i N_77 sm_amiga_ns_e_0_1__n \ +# N_79 N_146_i N_80 N_147_i N_82 N_148_i N_92 cpu_est_ns_0_2__n N_93 N_145_i N_94 \ +# state_machine_ds_000_dma_5_0_n N_95 N_143_i N_96 N_144_i N_97 AMIGA_BUS_DATA_DIR_c_0 \ +# N_106 N_142_i N_107 N_246_i N_125 N_176_i N_231 N_160_i N_232 N_240_i N_233 N_234 N_238_i \ +# N_235 N_236 N_163_i N_238 N_236_i N_240 N_242 N_234_i N_243 N_235_i N_246 \ +# sm_amiga_ns_e_0_5__n N_142 N_167_i N_143 N_233_i N_144 N_145 N_231_i N_146 N_232_i N_147 \ +# sm_amiga_ns_e_0_7__n N_148 state_machine_uds_000_int_6_0_n N_149 N_125_i N_150 \ +# state_machine_lds_000_int_6_0_n N_151 N_37_0 N_152 N_107_i N_153 N_35_0 N_154 N_106_i \ +# N_155 N_33_0 N_156 N_164_i N_157 N_31_0 N_160 N_225_0 N_161 N_224_0 N_162 N_223_0 N_163 \ +# N_92_i N_164 N_93_i N_165 N_221_0 N_166 state_machine_un6_bgack_000_0_n N_167 \ +# CLK_000_D2_i AMIGA_BUS_ENABLE_1_sqmuxa_1 state_machine_un57_bgack_030_int_0_n \ +# AMIGA_BUS_ENABLE_2_sqmuxa N_255_1 state_machine_un8_bg_030_n N_255_2 \ +# AMIGA_BUS_ENABLE_0_sqmuxa_2 N_265_1 AMIGA_BUS_ENABLE_1_sqmuxa_2 N_265_2 N_70 \ +# N_265_3 N_222 N_265_4 N_255 N_265_5 N_265 N_265_6 VMA_INT_i N_69_i_1 VPA_D_i N_69_i_2 \ +# DTACK_i N_69_i_3 LDS_000_i N_69_i_4 AS_000_i N_69_i_5 nEXP_SPACE_i \ +# A0_DMA_0_sqmuxa_i_0_0_1 AS_030_i N_82_i_1 BGACK_030_INT_i \ +# AMIGA_BUS_ENABLE_0_sqmuxa_2_1 BGACK_030_INT_D_i N_100_i_1 sm_amiga_i_4__n \ +# N_100_i_2 cpu_est_i_3__n state_machine_un8_bg_030_1_n sm_amiga_i_5__n \ +# state_machine_un8_bg_030_2_n CLK_000_D0_i cpu_est_ns_0_1_1__n \ +# state_machine_un81_bgack_030_int_i_n cpu_est_ns_0_2_1__n cpu_est_i_0__n \ +# state_machine_a0_dma_4_1_n cpu_est_i_1__n state_machine_a0_dma_4_2_n UDS_000_i \ +# N_107_1 AS_000_DMA_i N_107_2 RW_i N_97_1 cpu_est_i_2__n N_97_2 sm_amiga_i_3__n N_95_1 \ +# sm_amiga_i_1__n N_95_2 A0_i N_95_3 size_i_1__n sm_amiga_ns_e_0_1_0__n \ +# sm_amiga_i_0__n sm_amiga_ns_e_0_1_1__n a_i_30__n cpu_est_ns_0_1_2__n a_i_31__n \ +# N_155_1 a_i_28__n N_153_1 a_i_29__n N_151_1 a_i_26__n N_144_1 a_i_27__n N_125_1 \ +# a_i_24__n SIZE_DMA_0_sqmuxa_1 a_i_25__n N_96_1 a_i_19__n N_93_1 a_i_16__n \ +# state_machine_lds_000_int_6_0_m2_un3_n a_i_18__n \ +# state_machine_lds_000_int_6_0_m2_un1_n RST_i \ +# state_machine_lds_000_int_6_0_m2_un0_n cpu_estse_0_un3_n SIZE_DMA_0_sqmuxa_i \ +# cpu_estse_0_un1_n N_95_i cpu_estse_0_un0_n N_96_i cpu_estse_1_un3_n N_97_i \ +# cpu_estse_1_un1_n FPU_CS_INT_i cpu_estse_1_un0_n CLK_000_D6_i cpu_estse_2_un3_n \ +# AS_030_c cpu_estse_2_un1_n cpu_estse_2_un0_n AS_000_c bg_000_0_un3_n bg_000_0_un1_n \ +# DS_030_c bg_000_0_un0_n dsack1_int_0_un3_n UDS_000_c dsack1_int_0_un1_n \ +# dsack1_int_0_un0_n LDS_000_c as_000_dma_0_un3_n as_000_dma_0_un1_n size_c_0__n \ +# as_000_dma_0_un0_n as_000_int_0_un3_n size_c_1__n as_000_int_0_un1_n \ +# as_000_int_0_un0_n a_c_16__n vpa_sync_0_un3_n vpa_sync_0_un1_n a_c_17__n \ +# vpa_sync_0_un0_n vma_int_0_un3_n a_c_18__n vma_int_0_un1_n vma_int_0_un0_n \ +# a_c_19__n bgack_030_int_0_un3_n bgack_030_int_0_un1_n a_c_20__n \ +# bgack_030_int_0_un0_n size_dma_0_0__un3_n a_c_21__n size_dma_0_0__un1_n \ +# size_dma_0_0__un0_n a_c_22__n size_dma_0_1__un3_n size_dma_0_1__un1_n a_c_23__n \ +# size_dma_0_1__un0_n ipl_030_0_0__un3_n a_c_24__n ipl_030_0_0__un1_n \ +# ipl_030_0_0__un0_n a_c_25__n ipl_030_0_1__un3_n ipl_030_0_1__un1_n a_c_26__n \ +# ipl_030_0_1__un0_n ipl_030_0_2__un3_n a_c_27__n ipl_030_0_2__un1_n \ +# ipl_030_0_2__un0_n a_c_28__n amiga_bus_enable_0_un3_n amiga_bus_enable_0_un1_n \ +# a_c_29__n amiga_bus_enable_0_un0_n uds_000_int_0_un3_n a_c_30__n \ +# uds_000_int_0_un1_n uds_000_int_0_un0_n a_c_31__n lds_000_int_0_un3_n \ +# lds_000_int_0_un1_n .model bus68030 .inputs A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF \ BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF VPA.BLIF RST.BLIF \ @@ -85,222 +92,239 @@ RW.BLIF A_30_.BLIF A_29_.BLIF A_28_.BLIF A_27_.BLIF A_26_.BLIF A_25_.BLIF \ A_24_.BLIF A_23_.BLIF A_22_.BLIF A_21_.BLIF A_20_.BLIF A_19_.BLIF A_18_.BLIF \ A_17_.BLIF A_16_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF SIZE_1_.BLIF \ DSACK_1_.BLIF AS_030.BLIF AS_000.BLIF DS_030.BLIF UDS_000.BLIF LDS_000.BLIF \ -A0.BLIF DTACK.BLIF SIZE_0_.BLIF DSACK_0_.BLIF BG_030_c.BLIF \ -BG_000DFFSHreg.BLIF BGACK_000_c.BLIF inst_BGACK_030_INTreg.BLIF \ -inst_FPU_CS_INTreg.BLIF CLK_030_c.BLIF inst_VMA_INTreg.BLIF \ -inst_AS_030_000_SYNC.BLIF CLK_000_c.BLIF inst_BGACK_030_INT_D.BLIF \ -inst_DTACK_SYNC.BLIF CLK_OSZI_c.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF \ -inst_CLK_000_D1.BLIF CLK_OUT_INTreg.BLIF inst_CLK_000_D2.BLIF \ -inst_CLK_000_D6.BLIF SM_AMIGA_5_.BLIF IPL_030DFFSH_0_reg.BLIF vcc_n_n.BLIF \ -gnd_n_n.BLIF IPL_030DFFSH_1_reg.BLIF inst_AS_000_INT.BLIF SM_AMIGA_6_.BLIF \ -IPL_030DFFSH_2_reg.BLIF inst_UDS_000_INT.BLIF inst_LDS_000_INT.BLIF \ -ipl_c_0__n.BLIF inst_DSACK1_INT.BLIF inst_CLK_000_D3.BLIF ipl_c_1__n.BLIF \ -state_machine_un23_clk_000_d0_n.BLIF inst_CLK_000_D5.BLIF ipl_c_2__n.BLIF \ -SM_AMIGA_3_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_1_.BLIF dsack_c_1__n.BLIF \ -inst_AS_000_DMA.BLIF inst_DS_000_DMA.BLIF DTACK_c.BLIF SIZE_DMA_0_.BLIF \ -SIZE_DMA_1_.BLIF inst_A0_DMA.BLIF G_103.BLIF CLK_CNT_N_0_.BLIF VPA_c.BLIF \ -CLK_CNT_N_1_.BLIF G_109.BLIF CLK_CNT_P_0_.BLIF RST_c.BLIF CLK_CNT_P_1_.BLIF \ -inst_CLK_000_D4.BLIF RESETDFFRHreg.BLIF SM_AMIGA_7_.BLIF \ -state_machine_un15_clk_000_d0_n.BLIF RW_c.BLIF SM_AMIGA_4_.BLIF \ -un1_AMIGA_BUS_ENABLE_0_sqmuxa_2.BLIF fc_c_0__n.BLIF inst_CLK_OUT_PRE.BLIF \ -SM_AMIGA_2_.BLIF fc_c_1__n.BLIF AMIGA_BUS_ENABLEDFFSHreg.BLIF \ -state_machine_un23_clk_000_d0_0_n.BLIF state_machine_un6_bgack_000_0_n.BLIF \ -N_214_0.BLIF BG_030_c_i.BLIF N_227_i.BLIF state_machine_un10_bg_030_0_n.BLIF \ -N_215_0.BLIF N_216_0.BLIF N_126_i.BLIF N_33_0.BLIF N_127_i.BLIF N_35_0.BLIF \ -state_machine_uds_000_int_5_0_n.BLIF N_130_i.BLIF \ -state_machine_lds_000_int_5_0_n.BLIF N_132_i.BLIF N_131_i.BLIF cpu_est_0_.BLIF \ -cpu_est_1_.BLIF N_133_i.BLIF cpu_est_2_.BLIF cpu_est_3_reg.BLIF N_134_i.BLIF \ -N_137_i.BLIF N_138_i.BLIF sm_amiga_ns_0_5__n.BLIF cpu_est_ns_1__n.BLIF \ -N_139_i.BLIF cpu_est_ns_2__n.BLIF N_140_i.BLIF N_46_0.BLIF N_52.BLIF \ -N_142_i.BLIF N_59.BLIF N_141_i.BLIF N_62.BLIF sm_amiga_ns_0_7__n.BLIF \ -N_65.BLIF N_144_i.BLIF N_67.BLIF state_machine_ds_000_dma_5_0_n.BLIF N_72.BLIF \ -CLK_030_c_i.BLIF N_77.BLIF AS_000_c_i.BLIF N_88.BLIF N_59_i.BLIF N_217.BLIF \ -N_61_0.BLIF N_219.BLIF N_62_i.BLIF N_221.BLIF CLK_000_D1_i.BLIF N_224.BLIF \ -N_65_i.BLIF N_225.BLIF N_66_i.BLIF N_226.BLIF N_67_i.BLIF N_128.BLIF \ -N_175_i.BLIF N_130.BLIF un1_as_000_dma5_i_0__n.BLIF N_132.BLIF \ -state_machine_un6_clk_000_d5_i_n.BLIF N_135.BLIF N_71_i.BLIF N_136.BLIF \ -DS_030_c_i.BLIF N_138.BLIF N_73_i.BLIF N_143.BLIF N_156_i.BLIF N_145.BLIF \ -un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i.BLIF N_146.BLIF N_75_0.BLIF N_147.BLIF \ -N_176_i.BLIF N_148.BLIF N_52_0.BLIF N_151.BLIF N_173_i.BLIF N_153.BLIF \ -N_226_i.BLIF N_154.BLIF N_77_0.BLIF N_155.BLIF N_72_i.BLIF N_173.BLIF \ -N_147_i.BLIF cpu_est_ns_0_0_x2_1_.BLIF N_148_i.BLIF \ -AMIGA_BUS_DATA_DIR_m1_0_x2.BLIF cpu_est_ns_e_0_0__n.BLIF N_228_1.BLIF \ -N_146_i.BLIF N_237.BLIF sm_amiga_ns_0_0__n.BLIF N_247.BLIF N_88_i.BLIF \ -N_227.BLIF N_145_i.BLIF N_228.BLIF cpu_est_ns_0_2__n.BLIF N_127.BLIF \ -N_143_i.BLIF N_66.BLIF N_154_i.BLIF N_175.BLIF N_161_i.BLIF N_176.BLIF \ -N_153_i.BLIF N_75.BLIF N_155_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_4.BLIF \ -cpu_est_ns_0_1__n.BLIF N_61.BLIF N_135_i.BLIF N_156.BLIF N_136_i.BLIF \ -N_73.BLIF N_57.BLIF N_225_i.BLIF N_71.BLIF \ -un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0.BLIF state_machine_un6_clk_000_d5_n.BLIF \ -N_219_i.BLIF un1_as_000_dma5_0__n.BLIF N_221_i.BLIF N_223.BLIF \ -state_machine_un15_clk_000_d0_0_n.BLIF state_machine_ds_000_dma_5_n.BLIF \ -N_144.BLIF N_66_i_1.BLIF N_141.BLIF N_66_i_2.BLIF N_142.BLIF N_66_i_3.BLIF \ -N_139.BLIF N_66_i_4.BLIF N_140.BLIF N_66_i_5.BLIF N_137.BLIF N_237_1.BLIF \ -N_134.BLIF N_237_2.BLIF N_133.BLIF N_247_1.BLIF N_131.BLIF N_247_2.BLIF \ -state_machine_lds_000_int_5_n.BLIF N_247_3.BLIF \ -state_machine_uds_000_int_5_n.BLIF N_247_4.BLIF N_35.BLIF N_247_5.BLIF \ -N_33.BLIF N_247_6.BLIF N_126.BLIF N_52_0_1.BLIF N_216.BLIF N_52_0_2.BLIF \ -N_215.BLIF N_224_1.BLIF state_machine_un10_bg_030_n.BLIF N_224_2.BLIF \ -N_214.BLIF N_227_1.BLIF state_machine_un6_bgack_000_n.BLIF N_227_2.BLIF \ -state_machine_un8_clk_000_d2_n.BLIF N_228_1_0.BLIF SIZE_DMA_1_sqmuxa.BLIF \ -N_127_1.BLIF SIZE_DMA_0_sqmuxa.BLIF N_127_2.BLIF AS_000_INT_1_sqmuxa.BLIF \ -N_151_1.BLIF N_249.BLIF SIZE_DMA_1_sqmuxa_1.BLIF CLK_000_D6_i.BLIF \ -state_machine_un8_clk_000_d2_1_n.BLIF N_228_i.BLIF sm_amiga_ns_0_1_0__n.BLIF \ -sm_amiga_i_5__n.BLIF cpu_est_ns_0_1_1__n.BLIF N_224_i.BLIF N_138_1.BLIF \ -N_223_i.BLIF N_130_1.BLIF SIZE_DMA_0_sqmuxa_i.BLIF N_128_1.BLIF \ -SIZE_DMA_1_sqmuxa_i.BLIF N_221_1.BLIF a_i_18__n.BLIF N_219_1.BLIF \ -a_i_16__n.BLIF vpa_sync_0_un3_n.BLIF a_i_19__n.BLIF vpa_sync_0_un1_n.BLIF \ -AS_030_000_SYNC_i.BLIF vpa_sync_0_un0_n.BLIF CLK_000_D2_i.BLIF \ -as_000_int_0_un3_n.BLIF BGACK_030_INT_i.BLIF as_000_int_0_un1_n.BLIF \ -nEXP_SPACE_i.BLIF as_000_int_0_un0_n.BLIF AS_030_i.BLIF \ -as_000_dma_0_un3_n.BLIF BGACK_030_INT_D_i.BLIF as_000_dma_0_un1_n.BLIF \ -sm_amiga_i_7__n.BLIF as_000_dma_0_un0_n.BLIF \ -state_machine_un8_clk_000_d2_i_n.BLIF bg_000_0_un3_n.BLIF sm_amiga_i_6__n.BLIF \ -bg_000_0_un1_n.BLIF sm_amiga_i_4__n.BLIF bg_000_0_un0_n.BLIF CLK_000_D0_i.BLIF \ -a0_dma_0_un3_n.BLIF RW_i.BLIF a0_dma_0_un1_n.BLIF UDS_000_i.BLIF \ -a0_dma_0_un0_n.BLIF LDS_000_i.BLIF dtack_sync_0_un3_n.BLIF DTACK_i.BLIF \ -dtack_sync_0_un1_n.BLIF VMA_INT_i.BLIF dtack_sync_0_un0_n.BLIF VPA_i.BLIF \ -lds_000_int_0_un3_n.BLIF cpu_est_i_0__n.BLIF lds_000_int_0_un1_n.BLIF \ -sm_amiga_i_3__n.BLIF lds_000_int_0_un0_n.BLIF cpu_est_i_3__n.BLIF \ -uds_000_int_0_un3_n.BLIF cpu_est_i_1__n.BLIF uds_000_int_0_un1_n.BLIF \ -A0_i.BLIF uds_000_int_0_un0_n.BLIF size_i_1__n.BLIF fpu_cs_int_0_un3_n.BLIF \ -a_i_30__n.BLIF fpu_cs_int_0_un1_n.BLIF a_i_31__n.BLIF fpu_cs_int_0_un0_n.BLIF \ -a_i_28__n.BLIF ds_000_dma_0_un3_n.BLIF a_i_29__n.BLIF ds_000_dma_0_un1_n.BLIF \ -a_i_26__n.BLIF ds_000_dma_0_un0_n.BLIF a_i_27__n.BLIF \ -as_030_000_sync_0_un3_n.BLIF a_i_24__n.BLIF as_030_000_sync_0_un1_n.BLIF \ -a_i_25__n.BLIF as_030_000_sync_0_un0_n.BLIF RST_i.BLIF \ -size_dma_0_1__un3_n.BLIF size_dma_0_1__un1_n.BLIF CLK_OSZI_i.BLIF \ -size_dma_0_1__un0_n.BLIF size_dma_0_0__un3_n.BLIF FPU_CS_INT_i.BLIF \ -size_dma_0_0__un1_n.BLIF AS_030_c.BLIF size_dma_0_0__un0_n.BLIF \ -bgack_030_int_0_un3_n.BLIF AS_000_c.BLIF bgack_030_int_0_un1_n.BLIF \ -bgack_030_int_0_un0_n.BLIF DS_030_c.BLIF dsack1_int_0_un3_n.BLIF \ -dsack1_int_0_un1_n.BLIF UDS_000_c.BLIF dsack1_int_0_un0_n.BLIF \ -state_machine_uds_000_int_5_0_m2_un3_n.BLIF LDS_000_c.BLIF \ -state_machine_uds_000_int_5_0_m2_un1_n.BLIF \ -state_machine_uds_000_int_5_0_m2_un0_n.BLIF size_c_0__n.BLIF \ -cpu_est_ns_0_0_m2_2__un3_n.BLIF cpu_est_ns_0_0_m2_2__un1_n.BLIF \ -size_c_1__n.BLIF cpu_est_ns_0_0_m2_2__un0_n.BLIF amiga_bus_enable_0_un3_n.BLIF \ -a_c_16__n.BLIF amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF \ -a_c_17__n.BLIF vma_int_0_un3_n.BLIF vma_int_0_un1_n.BLIF a_c_18__n.BLIF \ -vma_int_0_un0_n.BLIF ipl_030_0_0__un3_n.BLIF a_c_19__n.BLIF \ -ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF a_c_20__n.BLIF \ -ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un1_n.BLIF a_c_21__n.BLIF \ -ipl_030_0_1__un0_n.BLIF ipl_030_0_2__un3_n.BLIF a_c_22__n.BLIF \ -ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF a_c_23__n.BLIF \ -cpu_estse_0_un3_n.BLIF cpu_estse_0_un1_n.BLIF a_c_24__n.BLIF \ -cpu_estse_0_un0_n.BLIF cpu_estse_1_un3_n.BLIF a_c_25__n.BLIF \ -cpu_estse_1_un1_n.BLIF cpu_estse_1_un0_n.BLIF a_c_26__n.BLIF \ -cpu_estse_2_un3_n.BLIF cpu_estse_2_un1_n.BLIF a_c_27__n.BLIF \ -cpu_estse_2_un0_n.BLIF a_c_28__n.BLIF a_c_29__n.BLIF a_c_30__n.BLIF \ -a_c_31__n.BLIF A0_c.BLIF nEXP_SPACE_c.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF \ -DS_030.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF \ -SIZE_1_.PIN.BLIF A0.PIN.BLIF DSACK_1_.PIN.BLIF DTACK.PIN.BLIF +A0.BLIF DTACK.BLIF SIZE_0_.BLIF DSACK_0_.BLIF A0_c.BLIF \ +lds_000_int_0_un0_n.BLIF as_030_000_sync_0_un3_n.BLIF nEXP_SPACE_c.BLIF \ +as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF \ +ds_000_dma_0_un3_n.BLIF BG_030_c.BLIF ds_000_dma_0_un1_n.BLIF \ +ds_000_dma_0_un0_n.BLIF inst_BGACK_030_INTreg.BLIF BG_000DFFSHreg.BLIF \ +fpu_cs_int_0_un3_n.BLIF inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un1_n.BLIF \ +inst_VMA_INTreg.BLIF fpu_cs_int_0_un0_n.BLIF inst_AS_030_000_SYNC.BLIF \ +BGACK_000_c.BLIF dtack_sync_0_un3_n.BLIF inst_DTACK_SYNC.BLIF \ +dtack_sync_0_un1_n.BLIF inst_VPA_SYNC.BLIF CLK_030_c.BLIF \ +dtack_sync_0_un0_n.BLIF inst_VPA_D.BLIF a0_dma_0_un3_n.BLIF \ +inst_CLK_000_D0.BLIF CLK_000_c.BLIF a0_dma_0_un1_n.BLIF inst_CLK_000_D1.BLIF \ +a0_dma_0_un0_n.BLIF inst_CLK_000_D2.BLIF CLK_OSZI_c.BLIF inst_CLK_000_D6.BLIF \ +inst_CLK_OUT_PRE.BLIF inst_BGACK_030_INT_D.BLIF CLK_OUT_INTreg.BLIF \ +vcc_n_n.BLIF gnd_n_n.BLIF CLK_CNT_P_0_.BLIF IPL_030DFFSH_0_reg.BLIF \ +SM_AMIGA_5_.BLIF SM_AMIGA_7_.BLIF IPL_030DFFSH_1_reg.BLIF A0_DMA_1_sqmuxa.BLIF \ +SM_AMIGA_1_.BLIF IPL_030DFFSH_2_reg.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_6_.BLIF \ +ipl_c_0__n.BLIF inst_AS_000_DMA.BLIF inst_AS_000_INT.BLIF ipl_c_1__n.BLIF \ +inst_UDS_000_INT.BLIF inst_LDS_000_INT.BLIF ipl_c_2__n.BLIF \ +inst_DSACK1_INT.BLIF inst_CLK_000_D3.BLIF \ +state_machine_un57_bgack_030_int_n.BLIF dsack_c_1__n.BLIF \ +state_machine_un81_bgack_030_int_n.BLIF inst_CLK_000_D5.BLIF DTACK_c.BLIF \ +SM_AMIGA_3_.BLIF state_machine_un6_bgack_000_n.BLIF inst_DS_000_DMA.BLIF \ +SIZE_DMA_0_.BLIF SIZE_DMA_1_.BLIF inst_A0_DMA.BLIF inst_CLK_000_D4.BLIF \ +SM_AMIGA_4_.BLIF RST_c.BLIF SM_AMIGA_2_.BLIF state_machine_un10_bg_030_n.BLIF \ +RESETDFFRHreg.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1.BLIF SIZE_DMA_0_sqmuxa.BLIF \ +RW_c.BLIF state_machine_a0_dma_4_n.BLIF un1_AMIGA_BUS_ENABLE_2_sqmuxa.BLIF \ +fc_c_0__n.BLIF state_machine_lds_000_int_6_n.BLIF \ +state_machine_uds_000_int_6_n.BLIF fc_c_1__n.BLIF \ +state_machine_ds_000_dma_5_n.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_1.BLIF \ +AMIGA_BUS_ENABLEDFFSHreg.BLIF AMIGA_BUS_DATA_DIR_c.BLIF cpu_est_ns_0_1__n.BLIF \ +N_165_i.BLIF N_166_i.BLIF N_242_i.BLIF N_243_i.BLIF N_70_0.BLIF N_94_i.BLIF \ +N_222_i.BLIF N_100_i.BLIF AS_030_000_SYNC_i.BLIF \ +AMIGA_BUS_ENABLE_1_sqmuxa_1_i.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_2_i.BLIF \ +un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_0.BLIF AMIGA_BUS_ENABLE_0_sqmuxa_2_i.BLIF \ +AMIGA_BUS_ENABLE_2_sqmuxa_i.BLIF CLK_OUT_PRE_0.BLIF \ +un1_AMIGA_BUS_ENABLE_2_sqmuxa_0.BLIF BG_030_c_i.BLIF \ +state_machine_un8_bg_030_i_n.BLIF state_machine_un10_bg_030_0_n.BLIF \ +N_82_i.BLIF N_100.BLIF DS_030_c_i.BLIF cpu_est_0_.BLIF N_80_0.BLIF \ +cpu_est_1_.BLIF N_79_0.BLIF cpu_est_2_.BLIF A0_DMA_0_sqmuxa_i_0_0.BLIF \ +cpu_est_3_reg.BLIF N_77_i.BLIF N_76_i.BLIF N_75_i.BLIF N_162_i.BLIF \ +un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF cpu_est_ns_1__n.BLIF N_72_i.BLIF \ +cpu_est_ns_2__n.BLIF CLK_030_c_i.BLIF A0_DMA_0_sqmuxa_i_0.BLIF N_71_i.BLIF \ +N_221.BLIF N_69_i.BLIF N_223.BLIF CLK_000_D1_i.BLIF N_224.BLIF N_68_i.BLIF \ +N_225.BLIF N_161_i.BLIF N_31.BLIF N_63_i.BLIF N_33.BLIF N_61_i.BLIF N_35.BLIF \ +N_156_i.BLIF N_37.BLIF N_157_i.BLIF N_61.BLIF cpu_est_ns_e_0_0__n.BLIF \ +N_62.BLIF N_152_i.BLIF N_63.BLIF N_153_i.BLIF N_68.BLIF N_154_i.BLIF N_69.BLIF \ +sm_amiga_ns_e_0_0__n.BLIF N_72.BLIF N_149_i.BLIF N_75.BLIF N_150_i.BLIF \ +N_76.BLIF N_151_i.BLIF N_77.BLIF sm_amiga_ns_e_0_1__n.BLIF N_79.BLIF \ +N_146_i.BLIF N_80.BLIF N_147_i.BLIF N_82.BLIF N_148_i.BLIF N_92.BLIF \ +cpu_est_ns_0_2__n.BLIF N_93.BLIF N_145_i.BLIF N_94.BLIF \ +state_machine_ds_000_dma_5_0_n.BLIF N_95.BLIF N_143_i.BLIF N_96.BLIF \ +N_144_i.BLIF N_97.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF N_106.BLIF N_142_i.BLIF \ +N_107.BLIF N_246_i.BLIF N_125.BLIF N_176_i.BLIF N_231.BLIF N_160_i.BLIF \ +N_232.BLIF N_240_i.BLIF N_233.BLIF N_234.BLIF N_238_i.BLIF N_235.BLIF \ +N_236.BLIF N_163_i.BLIF N_238.BLIF N_236_i.BLIF N_240.BLIF N_242.BLIF \ +N_234_i.BLIF N_243.BLIF N_235_i.BLIF N_246.BLIF sm_amiga_ns_e_0_5__n.BLIF \ +N_142.BLIF N_167_i.BLIF N_143.BLIF N_233_i.BLIF N_144.BLIF N_145.BLIF \ +N_231_i.BLIF N_146.BLIF N_232_i.BLIF N_147.BLIF sm_amiga_ns_e_0_7__n.BLIF \ +N_148.BLIF state_machine_uds_000_int_6_0_n.BLIF N_149.BLIF N_125_i.BLIF \ +N_150.BLIF state_machine_lds_000_int_6_0_n.BLIF N_151.BLIF N_37_0.BLIF \ +N_152.BLIF N_107_i.BLIF N_153.BLIF N_35_0.BLIF N_154.BLIF N_106_i.BLIF \ +N_155.BLIF N_33_0.BLIF N_156.BLIF N_164_i.BLIF N_157.BLIF N_31_0.BLIF \ +N_160.BLIF N_225_0.BLIF N_161.BLIF N_224_0.BLIF N_162.BLIF N_223_0.BLIF \ +N_163.BLIF N_92_i.BLIF N_164.BLIF N_93_i.BLIF N_165.BLIF N_221_0.BLIF \ +N_166.BLIF state_machine_un6_bgack_000_0_n.BLIF N_167.BLIF CLK_000_D2_i.BLIF \ +AMIGA_BUS_ENABLE_1_sqmuxa_1.BLIF state_machine_un57_bgack_030_int_0_n.BLIF \ +AMIGA_BUS_ENABLE_2_sqmuxa.BLIF N_255_1.BLIF state_machine_un8_bg_030_n.BLIF \ +N_255_2.BLIF AMIGA_BUS_ENABLE_0_sqmuxa_2.BLIF N_265_1.BLIF \ +AMIGA_BUS_ENABLE_1_sqmuxa_2.BLIF N_265_2.BLIF N_70.BLIF N_265_3.BLIF \ +N_222.BLIF N_265_4.BLIF N_255.BLIF N_265_5.BLIF N_265.BLIF N_265_6.BLIF \ +VMA_INT_i.BLIF N_69_i_1.BLIF VPA_D_i.BLIF N_69_i_2.BLIF DTACK_i.BLIF \ +N_69_i_3.BLIF LDS_000_i.BLIF N_69_i_4.BLIF AS_000_i.BLIF N_69_i_5.BLIF \ +nEXP_SPACE_i.BLIF A0_DMA_0_sqmuxa_i_0_0_1.BLIF AS_030_i.BLIF N_82_i_1.BLIF \ +BGACK_030_INT_i.BLIF AMIGA_BUS_ENABLE_0_sqmuxa_2_1.BLIF BGACK_030_INT_D_i.BLIF \ +N_100_i_1.BLIF sm_amiga_i_4__n.BLIF N_100_i_2.BLIF cpu_est_i_3__n.BLIF \ +state_machine_un8_bg_030_1_n.BLIF sm_amiga_i_5__n.BLIF \ +state_machine_un8_bg_030_2_n.BLIF CLK_000_D0_i.BLIF cpu_est_ns_0_1_1__n.BLIF \ +state_machine_un81_bgack_030_int_i_n.BLIF cpu_est_ns_0_2_1__n.BLIF \ +cpu_est_i_0__n.BLIF state_machine_a0_dma_4_1_n.BLIF cpu_est_i_1__n.BLIF \ +state_machine_a0_dma_4_2_n.BLIF UDS_000_i.BLIF N_107_1.BLIF AS_000_DMA_i.BLIF \ +N_107_2.BLIF RW_i.BLIF N_97_1.BLIF cpu_est_i_2__n.BLIF N_97_2.BLIF \ +sm_amiga_i_3__n.BLIF N_95_1.BLIF sm_amiga_i_1__n.BLIF N_95_2.BLIF A0_i.BLIF \ +N_95_3.BLIF size_i_1__n.BLIF sm_amiga_ns_e_0_1_0__n.BLIF sm_amiga_i_0__n.BLIF \ +sm_amiga_ns_e_0_1_1__n.BLIF a_i_30__n.BLIF cpu_est_ns_0_1_2__n.BLIF \ +a_i_31__n.BLIF N_155_1.BLIF a_i_28__n.BLIF N_153_1.BLIF a_i_29__n.BLIF \ +N_151_1.BLIF a_i_26__n.BLIF N_144_1.BLIF a_i_27__n.BLIF N_125_1.BLIF \ +a_i_24__n.BLIF SIZE_DMA_0_sqmuxa_1.BLIF a_i_25__n.BLIF N_96_1.BLIF \ +a_i_19__n.BLIF N_93_1.BLIF a_i_16__n.BLIF \ +state_machine_lds_000_int_6_0_m2_un3_n.BLIF a_i_18__n.BLIF \ +state_machine_lds_000_int_6_0_m2_un1_n.BLIF RST_i.BLIF \ +state_machine_lds_000_int_6_0_m2_un0_n.BLIF cpu_estse_0_un3_n.BLIF \ +SIZE_DMA_0_sqmuxa_i.BLIF cpu_estse_0_un1_n.BLIF N_95_i.BLIF \ +cpu_estse_0_un0_n.BLIF N_96_i.BLIF cpu_estse_1_un3_n.BLIF N_97_i.BLIF \ +cpu_estse_1_un1_n.BLIF FPU_CS_INT_i.BLIF cpu_estse_1_un0_n.BLIF \ +CLK_000_D6_i.BLIF cpu_estse_2_un3_n.BLIF AS_030_c.BLIF cpu_estse_2_un1_n.BLIF \ +cpu_estse_2_un0_n.BLIF AS_000_c.BLIF bg_000_0_un3_n.BLIF bg_000_0_un1_n.BLIF \ +DS_030_c.BLIF bg_000_0_un0_n.BLIF dsack1_int_0_un3_n.BLIF UDS_000_c.BLIF \ +dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF LDS_000_c.BLIF \ +as_000_dma_0_un3_n.BLIF as_000_dma_0_un1_n.BLIF size_c_0__n.BLIF \ +as_000_dma_0_un0_n.BLIF as_000_int_0_un3_n.BLIF size_c_1__n.BLIF \ +as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF a_c_16__n.BLIF \ +vpa_sync_0_un3_n.BLIF vpa_sync_0_un1_n.BLIF a_c_17__n.BLIF \ +vpa_sync_0_un0_n.BLIF vma_int_0_un3_n.BLIF a_c_18__n.BLIF vma_int_0_un1_n.BLIF \ +vma_int_0_un0_n.BLIF a_c_19__n.BLIF bgack_030_int_0_un3_n.BLIF \ +bgack_030_int_0_un1_n.BLIF a_c_20__n.BLIF bgack_030_int_0_un0_n.BLIF \ +size_dma_0_0__un3_n.BLIF a_c_21__n.BLIF size_dma_0_0__un1_n.BLIF \ +size_dma_0_0__un0_n.BLIF a_c_22__n.BLIF size_dma_0_1__un3_n.BLIF \ +size_dma_0_1__un1_n.BLIF a_c_23__n.BLIF size_dma_0_1__un0_n.BLIF \ +ipl_030_0_0__un3_n.BLIF a_c_24__n.BLIF ipl_030_0_0__un1_n.BLIF \ +ipl_030_0_0__un0_n.BLIF a_c_25__n.BLIF ipl_030_0_1__un3_n.BLIF \ +ipl_030_0_1__un1_n.BLIF a_c_26__n.BLIF ipl_030_0_1__un0_n.BLIF \ +ipl_030_0_2__un3_n.BLIF a_c_27__n.BLIF ipl_030_0_2__un1_n.BLIF \ +ipl_030_0_2__un0_n.BLIF a_c_28__n.BLIF amiga_bus_enable_0_un3_n.BLIF \ +amiga_bus_enable_0_un1_n.BLIF a_c_29__n.BLIF amiga_bus_enable_0_un0_n.BLIF \ +uds_000_int_0_un3_n.BLIF a_c_30__n.BLIF uds_000_int_0_un1_n.BLIF \ +uds_000_int_0_un0_n.BLIF a_c_31__n.BLIF lds_000_int_0_un3_n.BLIF \ +lds_000_int_0_un1_n.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF DS_030.PIN.BLIF \ +UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF \ +A0.PIN.BLIF DSACK_1_.PIN.BLIF DTACK.PIN.BLIF .outputs IPL_030_2_ BERR BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS AVEC \ AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ -CIIN IPL_030_1_ IPL_030_0_ cpu_est_1_.D cpu_est_1_.C cpu_est_1_.AR \ -cpu_est_2_.D cpu_est_2_.C cpu_est_2_.AR cpu_est_3_reg.D cpu_est_3_reg.C \ -cpu_est_3_reg.AR cpu_est_0_.D cpu_est_0_.C cpu_est_0_.AR SM_AMIGA_4_.D \ -SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR \ -SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C \ -SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR CLK_CNT_P_1_.D \ -CLK_CNT_P_1_.C CLK_CNT_P_1_.AR SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_0_.AP \ -SIZE_DMA_1_.D SIZE_DMA_1_.C SIZE_DMA_1_.AP IPL_030DFFSH_0_reg.D \ -IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP IPL_030DFFSH_1_reg.D \ -IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D \ -IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D SM_AMIGA_7_.C \ -SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.D \ -SM_AMIGA_5_.C SM_AMIGA_5_.AR inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP \ -inst_DSACK1_INT.D inst_DSACK1_INT.C inst_DSACK1_INT.AP inst_VMA_INTreg.D \ -inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_BGACK_030_INTreg.D \ -inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP CLK_CNT_N_0_.D CLK_CNT_N_0_.C \ -CLK_CNT_N_0_.AR CLK_CNT_N_1_.D CLK_CNT_N_1_.C CLK_CNT_N_1_.AP CLK_CNT_P_0_.D \ -CLK_CNT_P_0_.C CLK_CNT_P_0_.AR inst_LDS_000_INT.D inst_LDS_000_INT.C \ -inst_LDS_000_INT.AP inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP \ -inst_A0_DMA.D inst_A0_DMA.C inst_A0_DMA.AP BG_000DFFSHreg.D BG_000DFFSHreg.C \ -BG_000DFFSHreg.AP inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_000_DMA.AP \ -AMIGA_BUS_ENABLEDFFSHreg.D AMIGA_BUS_ENABLEDFFSHreg.C \ -AMIGA_BUS_ENABLEDFFSHreg.AP inst_AS_000_INT.D inst_AS_000_INT.C \ -inst_AS_000_INT.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C \ -inst_AS_030_000_SYNC.AP inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DS_000_DMA.AP \ +CIIN IPL_030_1_ IPL_030_0_ cpu_est_0_.D cpu_est_0_.C cpu_est_0_.AR \ +cpu_est_1_.D cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.D cpu_est_2_.C \ +cpu_est_2_.AR cpu_est_3_reg.D cpu_est_3_reg.C cpu_est_3_reg.AR \ +IPL_030DFFSH_0_reg.D IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP \ +IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP \ +IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D \ +SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR \ +SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C \ +SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D \ +SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR \ +SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR inst_VPA_SYNC.D inst_VPA_SYNC.C \ +inst_VPA_SYNC.AP inst_VMA_INTreg.D inst_VMA_INTreg.C inst_VMA_INTreg.AP \ +inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP \ +inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR SIZE_DMA_0_.D \ +SIZE_DMA_0_.C SIZE_DMA_0_.AP SIZE_DMA_1_.D SIZE_DMA_1_.C SIZE_DMA_1_.AP \ inst_FPU_CS_INTreg.D inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP \ -inst_UDS_000_INT.D inst_UDS_000_INT.C inst_UDS_000_INT.AP CLK_OUT_INTreg.D \ -CLK_OUT_INTreg.C CLK_OUT_INTreg.AR inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C \ -inst_CLK_OUT_PRE.AR inst_CLK_000_D5.D inst_CLK_000_D5.C inst_CLK_000_D5.AP \ -inst_CLK_000_D6.D inst_CLK_000_D6.C inst_CLK_000_D6.AP inst_CLK_000_D4.D \ -inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_CLK_000_D2.D inst_CLK_000_D2.C \ -inst_CLK_000_D2.AP inst_CLK_000_D3.D inst_CLK_000_D3.C inst_CLK_000_D3.AP \ -inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP \ -inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D0.AP RESETDFFRHreg.D \ -RESETDFFRHreg.C RESETDFFRHreg.AR inst_CLK_000_D1.D inst_CLK_000_D1.C \ -inst_CLK_000_D1.AP SIZE_1_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 \ -DTACK SIZE_0_ DSACK_0_ BG_030_c BGACK_000_c CLK_030_c CLK_000_c CLK_OSZI_c \ -vcc_n_n gnd_n_n ipl_c_0__n ipl_c_1__n state_machine_un23_clk_000_d0_n \ -ipl_c_2__n dsack_c_1__n DTACK_c VPA_c RST_c state_machine_un15_clk_000_d0_n \ -RW_c un1_AMIGA_BUS_ENABLE_0_sqmuxa_2 fc_c_0__n fc_c_1__n \ -state_machine_un23_clk_000_d0_0_n state_machine_un6_bgack_000_0_n N_214_0 \ -BG_030_c_i N_227_i state_machine_un10_bg_030_0_n N_215_0 N_216_0 N_126_i \ -N_33_0 N_127_i N_35_0 state_machine_uds_000_int_5_0_n N_130_i \ -state_machine_lds_000_int_5_0_n N_132_i N_131_i N_133_i N_134_i N_137_i \ -N_138_i sm_amiga_ns_0_5__n cpu_est_ns_1__n N_139_i cpu_est_ns_2__n N_140_i \ -N_46_0 N_52 N_142_i N_59 N_141_i N_62 sm_amiga_ns_0_7__n N_65 N_144_i N_67 \ -state_machine_ds_000_dma_5_0_n N_72 CLK_030_c_i N_77 AS_000_c_i N_88 N_59_i \ -N_217 N_61_0 N_219 N_62_i N_221 CLK_000_D1_i N_224 N_65_i N_225 N_66_i N_226 \ -N_67_i N_128 N_175_i N_130 un1_as_000_dma5_i_0__n N_132 \ -state_machine_un6_clk_000_d5_i_n N_135 N_71_i N_136 DS_030_c_i N_138 N_73_i \ -N_143 N_156_i N_145 un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i N_146 N_75_0 N_147 \ -N_176_i N_148 N_52_0 N_151 N_173_i N_153 N_226_i N_154 N_77_0 N_155 N_72_i \ -N_173 N_147_i N_148_i cpu_est_ns_e_0_0__n N_228_1 N_146_i N_237 \ -sm_amiga_ns_0_0__n N_247 N_88_i N_227 N_145_i N_228 cpu_est_ns_0_2__n N_127 \ -N_143_i N_66 N_154_i N_175 N_161_i N_176 N_153_i N_75 N_155_i \ -un1_AMIGA_BUS_ENABLE_1_sqmuxa_4 cpu_est_ns_0_1__n N_61 N_135_i N_156 N_136_i \ -N_73 N_57 N_225_i N_71 un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0 \ -state_machine_un6_clk_000_d5_n N_219_i un1_as_000_dma5_0__n N_221_i N_223 \ -state_machine_un15_clk_000_d0_0_n state_machine_ds_000_dma_5_n N_144 N_66_i_1 \ -N_141 N_66_i_2 N_142 N_66_i_3 N_139 N_66_i_4 N_140 N_66_i_5 N_137 N_237_1 \ -N_134 N_237_2 N_133 N_247_1 N_131 N_247_2 state_machine_lds_000_int_5_n \ -N_247_3 state_machine_uds_000_int_5_n N_247_4 N_35 N_247_5 N_33 N_247_6 N_126 \ -N_52_0_1 N_216 N_52_0_2 N_215 N_224_1 state_machine_un10_bg_030_n N_224_2 \ -N_214 N_227_1 state_machine_un6_bgack_000_n N_227_2 \ -state_machine_un8_clk_000_d2_n N_228_1_0 SIZE_DMA_1_sqmuxa N_127_1 \ -SIZE_DMA_0_sqmuxa N_127_2 AS_000_INT_1_sqmuxa N_151_1 N_249 \ -SIZE_DMA_1_sqmuxa_1 CLK_000_D6_i state_machine_un8_clk_000_d2_1_n N_228_i \ -sm_amiga_ns_0_1_0__n sm_amiga_i_5__n cpu_est_ns_0_1_1__n N_224_i N_138_1 \ -N_223_i N_130_1 SIZE_DMA_0_sqmuxa_i N_128_1 SIZE_DMA_1_sqmuxa_i N_221_1 \ -a_i_18__n N_219_1 a_i_16__n vpa_sync_0_un3_n a_i_19__n vpa_sync_0_un1_n \ -AS_030_000_SYNC_i vpa_sync_0_un0_n CLK_000_D2_i as_000_int_0_un3_n \ -BGACK_030_INT_i as_000_int_0_un1_n nEXP_SPACE_i as_000_int_0_un0_n AS_030_i \ -as_000_dma_0_un3_n BGACK_030_INT_D_i as_000_dma_0_un1_n sm_amiga_i_7__n \ -as_000_dma_0_un0_n state_machine_un8_clk_000_d2_i_n bg_000_0_un3_n \ -sm_amiga_i_6__n bg_000_0_un1_n sm_amiga_i_4__n bg_000_0_un0_n CLK_000_D0_i \ -a0_dma_0_un3_n RW_i a0_dma_0_un1_n UDS_000_i a0_dma_0_un0_n LDS_000_i \ -dtack_sync_0_un3_n DTACK_i dtack_sync_0_un1_n VMA_INT_i dtack_sync_0_un0_n \ -VPA_i lds_000_int_0_un3_n cpu_est_i_0__n lds_000_int_0_un1_n sm_amiga_i_3__n \ -lds_000_int_0_un0_n cpu_est_i_3__n uds_000_int_0_un3_n cpu_est_i_1__n \ -uds_000_int_0_un1_n A0_i uds_000_int_0_un0_n size_i_1__n fpu_cs_int_0_un3_n \ -a_i_30__n fpu_cs_int_0_un1_n a_i_31__n fpu_cs_int_0_un0_n a_i_28__n \ -ds_000_dma_0_un3_n a_i_29__n ds_000_dma_0_un1_n a_i_26__n ds_000_dma_0_un0_n \ -a_i_27__n as_030_000_sync_0_un3_n a_i_24__n as_030_000_sync_0_un1_n a_i_25__n \ -as_030_000_sync_0_un0_n RST_i size_dma_0_1__un3_n size_dma_0_1__un1_n \ -CLK_OSZI_i size_dma_0_1__un0_n size_dma_0_0__un3_n FPU_CS_INT_i \ -size_dma_0_0__un1_n AS_030_c size_dma_0_0__un0_n bgack_030_int_0_un3_n \ -AS_000_c bgack_030_int_0_un1_n bgack_030_int_0_un0_n DS_030_c \ -dsack1_int_0_un3_n dsack1_int_0_un1_n UDS_000_c dsack1_int_0_un0_n \ -state_machine_uds_000_int_5_0_m2_un3_n LDS_000_c \ -state_machine_uds_000_int_5_0_m2_un1_n state_machine_uds_000_int_5_0_m2_un0_n \ -size_c_0__n cpu_est_ns_0_0_m2_2__un3_n cpu_est_ns_0_0_m2_2__un1_n size_c_1__n \ -cpu_est_ns_0_0_m2_2__un0_n amiga_bus_enable_0_un3_n a_c_16__n \ -amiga_bus_enable_0_un1_n amiga_bus_enable_0_un0_n a_c_17__n vma_int_0_un3_n \ -vma_int_0_un1_n a_c_18__n vma_int_0_un0_n ipl_030_0_0__un3_n a_c_19__n \ -ipl_030_0_0__un1_n ipl_030_0_0__un0_n a_c_20__n ipl_030_0_1__un3_n \ -ipl_030_0_1__un1_n a_c_21__n ipl_030_0_1__un0_n ipl_030_0_2__un3_n a_c_22__n \ -ipl_030_0_2__un1_n ipl_030_0_2__un0_n a_c_23__n cpu_estse_0_un3_n \ -cpu_estse_0_un1_n a_c_24__n cpu_estse_0_un0_n cpu_estse_1_un3_n a_c_25__n \ -cpu_estse_1_un1_n cpu_estse_1_un0_n a_c_26__n cpu_estse_2_un3_n \ -cpu_estse_2_un1_n a_c_27__n cpu_estse_2_un0_n a_c_28__n a_c_29__n a_c_30__n \ -a_c_31__n A0_c nEXP_SPACE_c AS_030.OE AS_000.OE DS_030.OE UDS_000.OE \ -LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE \ -DSACK_0_.OE AVEC_EXP.OE CIIN.OE G_103 G_109 cpu_est_ns_0_0_x2_1_ \ -AMIGA_BUS_DATA_DIR_m1_0_x2 +inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_A0_DMA.D \ +inst_A0_DMA.C inst_A0_DMA.AP BG_000DFFSHreg.D BG_000DFFSHreg.C \ +BG_000DFFSHreg.AP inst_DSACK1_INT.D inst_DSACK1_INT.C inst_DSACK1_INT.AP \ +inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_000_DMA.AP inst_AS_000_INT.D \ +inst_AS_000_INT.C inst_AS_000_INT.AP AMIGA_BUS_ENABLEDFFSHreg.D \ +AMIGA_BUS_ENABLEDFFSHreg.C AMIGA_BUS_ENABLEDFFSHreg.AP inst_UDS_000_INT.D \ +inst_UDS_000_INT.C inst_UDS_000_INT.AP inst_LDS_000_INT.D inst_LDS_000_INT.C \ +inst_LDS_000_INT.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C \ +inst_AS_030_000_SYNC.AP inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DS_000_DMA.AP \ +inst_CLK_000_D5.D inst_CLK_000_D5.C inst_CLK_000_D5.AP inst_CLK_000_D6.D \ +inst_CLK_000_D6.C inst_CLK_000_D6.AP inst_CLK_000_D4.D inst_CLK_000_D4.C \ +inst_CLK_000_D4.AP CLK_CNT_P_0_.D CLK_CNT_P_0_.C CLK_CNT_P_0_.AR \ +inst_CLK_000_D2.D inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D3.D \ +inst_CLK_000_D3.C inst_CLK_000_D3.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C \ +CLK_OUT_INTreg.AR inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C \ +inst_BGACK_030_INT_D.AP inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D0.AP \ +inst_VPA_D.D inst_VPA_D.C inst_VPA_D.AP RESETDFFRHreg.D RESETDFFRHreg.C \ +RESETDFFRHreg.AR inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D1.AP \ +SIZE_1_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 DTACK SIZE_0_ \ +DSACK_0_ A0_c lds_000_int_0_un0_n as_030_000_sync_0_un3_n nEXP_SPACE_c \ +as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n ds_000_dma_0_un3_n BG_030_c \ +ds_000_dma_0_un1_n ds_000_dma_0_un0_n fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n \ +fpu_cs_int_0_un0_n BGACK_000_c dtack_sync_0_un3_n dtack_sync_0_un1_n CLK_030_c \ +dtack_sync_0_un0_n a0_dma_0_un3_n CLK_000_c a0_dma_0_un1_n a0_dma_0_un0_n \ +CLK_OSZI_c vcc_n_n gnd_n_n A0_DMA_1_sqmuxa ipl_c_0__n ipl_c_1__n ipl_c_2__n \ +state_machine_un57_bgack_030_int_n dsack_c_1__n \ +state_machine_un81_bgack_030_int_n DTACK_c state_machine_un6_bgack_000_n RST_c \ +state_machine_un10_bg_030_n un1_AS_030_000_SYNC_1_sqmuxa_1 SIZE_DMA_0_sqmuxa \ +RW_c state_machine_a0_dma_4_n un1_AMIGA_BUS_ENABLE_2_sqmuxa fc_c_0__n \ +state_machine_lds_000_int_6_n state_machine_uds_000_int_6_n fc_c_1__n \ +state_machine_ds_000_dma_5_n un1_AMIGA_BUS_ENABLE_1_sqmuxa_1 \ +AMIGA_BUS_DATA_DIR_c cpu_est_ns_0_1__n N_165_i N_166_i N_242_i N_243_i N_70_0 \ +N_94_i N_222_i N_100_i AS_030_000_SYNC_i AMIGA_BUS_ENABLE_1_sqmuxa_1_i \ +AMIGA_BUS_ENABLE_1_sqmuxa_2_i un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_0 \ +AMIGA_BUS_ENABLE_0_sqmuxa_2_i AMIGA_BUS_ENABLE_2_sqmuxa_i \ +un1_AMIGA_BUS_ENABLE_2_sqmuxa_0 BG_030_c_i state_machine_un8_bg_030_i_n \ +state_machine_un10_bg_030_0_n N_82_i N_100 DS_030_c_i N_80_0 N_79_0 \ +A0_DMA_0_sqmuxa_i_0_0 N_77_i N_76_i N_75_i N_162_i \ +un1_AS_030_000_SYNC_1_sqmuxa_1_0 cpu_est_ns_1__n N_72_i cpu_est_ns_2__n \ +CLK_030_c_i A0_DMA_0_sqmuxa_i_0 N_71_i N_221 N_69_i N_223 CLK_000_D1_i N_224 \ +N_68_i N_225 N_161_i N_31 N_63_i N_33 N_61_i N_35 N_156_i N_37 N_157_i N_61 \ +cpu_est_ns_e_0_0__n N_62 N_152_i N_63 N_153_i N_68 N_154_i N_69 \ +sm_amiga_ns_e_0_0__n N_72 N_149_i N_75 N_150_i N_76 N_151_i N_77 \ +sm_amiga_ns_e_0_1__n N_79 N_146_i N_80 N_147_i N_82 N_148_i N_92 \ +cpu_est_ns_0_2__n N_93 N_145_i N_94 state_machine_ds_000_dma_5_0_n N_95 \ +N_143_i N_96 N_144_i N_97 AMIGA_BUS_DATA_DIR_c_0 N_106 N_142_i N_107 N_246_i \ +N_125 N_176_i N_231 N_160_i N_232 N_240_i N_233 N_234 N_238_i N_235 N_236 \ +N_163_i N_238 N_236_i N_240 N_242 N_234_i N_243 N_235_i N_246 \ +sm_amiga_ns_e_0_5__n N_142 N_167_i N_143 N_233_i N_144 N_145 N_231_i N_146 \ +N_232_i N_147 sm_amiga_ns_e_0_7__n N_148 state_machine_uds_000_int_6_0_n N_149 \ +N_125_i N_150 state_machine_lds_000_int_6_0_n N_151 N_37_0 N_152 N_107_i N_153 \ +N_35_0 N_154 N_106_i N_155 N_33_0 N_156 N_164_i N_157 N_31_0 N_160 N_225_0 \ +N_161 N_224_0 N_162 N_223_0 N_163 N_92_i N_164 N_93_i N_165 N_221_0 N_166 \ +state_machine_un6_bgack_000_0_n N_167 CLK_000_D2_i AMIGA_BUS_ENABLE_1_sqmuxa_1 \ +state_machine_un57_bgack_030_int_0_n AMIGA_BUS_ENABLE_2_sqmuxa N_255_1 \ +state_machine_un8_bg_030_n N_255_2 AMIGA_BUS_ENABLE_0_sqmuxa_2 N_265_1 \ +AMIGA_BUS_ENABLE_1_sqmuxa_2 N_265_2 N_70 N_265_3 N_222 N_265_4 N_255 N_265_5 \ +N_265 N_265_6 VMA_INT_i N_69_i_1 VPA_D_i N_69_i_2 DTACK_i N_69_i_3 LDS_000_i \ +N_69_i_4 AS_000_i N_69_i_5 nEXP_SPACE_i A0_DMA_0_sqmuxa_i_0_0_1 AS_030_i \ +N_82_i_1 BGACK_030_INT_i AMIGA_BUS_ENABLE_0_sqmuxa_2_1 BGACK_030_INT_D_i \ +N_100_i_1 sm_amiga_i_4__n N_100_i_2 cpu_est_i_3__n \ +state_machine_un8_bg_030_1_n sm_amiga_i_5__n state_machine_un8_bg_030_2_n \ +CLK_000_D0_i cpu_est_ns_0_1_1__n state_machine_un81_bgack_030_int_i_n \ +cpu_est_ns_0_2_1__n cpu_est_i_0__n state_machine_a0_dma_4_1_n cpu_est_i_1__n \ +state_machine_a0_dma_4_2_n UDS_000_i N_107_1 AS_000_DMA_i N_107_2 RW_i N_97_1 \ +cpu_est_i_2__n N_97_2 sm_amiga_i_3__n N_95_1 sm_amiga_i_1__n N_95_2 A0_i \ +N_95_3 size_i_1__n sm_amiga_ns_e_0_1_0__n sm_amiga_i_0__n \ +sm_amiga_ns_e_0_1_1__n a_i_30__n cpu_est_ns_0_1_2__n a_i_31__n N_155_1 \ +a_i_28__n N_153_1 a_i_29__n N_151_1 a_i_26__n N_144_1 a_i_27__n N_125_1 \ +a_i_24__n SIZE_DMA_0_sqmuxa_1 a_i_25__n N_96_1 a_i_19__n N_93_1 a_i_16__n \ +state_machine_lds_000_int_6_0_m2_un3_n a_i_18__n \ +state_machine_lds_000_int_6_0_m2_un1_n RST_i \ +state_machine_lds_000_int_6_0_m2_un0_n cpu_estse_0_un3_n SIZE_DMA_0_sqmuxa_i \ +cpu_estse_0_un1_n N_95_i cpu_estse_0_un0_n N_96_i cpu_estse_1_un3_n N_97_i \ +cpu_estse_1_un1_n FPU_CS_INT_i cpu_estse_1_un0_n CLK_000_D6_i \ +cpu_estse_2_un3_n AS_030_c cpu_estse_2_un1_n cpu_estse_2_un0_n AS_000_c \ +bg_000_0_un3_n bg_000_0_un1_n DS_030_c bg_000_0_un0_n dsack1_int_0_un3_n \ +UDS_000_c dsack1_int_0_un1_n dsack1_int_0_un0_n LDS_000_c as_000_dma_0_un3_n \ +as_000_dma_0_un1_n size_c_0__n as_000_dma_0_un0_n as_000_int_0_un3_n \ +size_c_1__n as_000_int_0_un1_n as_000_int_0_un0_n a_c_16__n vpa_sync_0_un3_n \ +vpa_sync_0_un1_n a_c_17__n vpa_sync_0_un0_n vma_int_0_un3_n a_c_18__n \ +vma_int_0_un1_n vma_int_0_un0_n a_c_19__n bgack_030_int_0_un3_n \ +bgack_030_int_0_un1_n a_c_20__n bgack_030_int_0_un0_n size_dma_0_0__un3_n \ +a_c_21__n size_dma_0_0__un1_n size_dma_0_0__un0_n a_c_22__n \ +size_dma_0_1__un3_n size_dma_0_1__un1_n a_c_23__n size_dma_0_1__un0_n \ +ipl_030_0_0__un3_n a_c_24__n ipl_030_0_0__un1_n ipl_030_0_0__un0_n a_c_25__n \ +ipl_030_0_1__un3_n ipl_030_0_1__un1_n a_c_26__n ipl_030_0_1__un0_n \ +ipl_030_0_2__un3_n a_c_27__n ipl_030_0_2__un1_n ipl_030_0_2__un0_n a_c_28__n \ +amiga_bus_enable_0_un3_n amiga_bus_enable_0_un1_n a_c_29__n \ +amiga_bus_enable_0_un0_n uds_000_int_0_un3_n a_c_30__n uds_000_int_0_un1_n \ +uds_000_int_0_un0_n a_c_31__n lds_000_int_0_un3_n lds_000_int_0_un1_n \ +AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE \ +A0.OE DSACK_1_.OE DTACK.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE \ +CLK_OUT_PRE_0 +.names cpu_est_ns_e_0_0__n.BLIF cpu_est_0_.D +0 1 .names cpu_estse_0_un1_n.BLIF cpu_estse_0_un0_n.BLIF cpu_est_1_.D 1- 1 -1 1 @@ -310,24 +334,6 @@ AMIGA_BUS_DATA_DIR_m1_0_x2 .names cpu_estse_2_un1_n.BLIF cpu_estse_2_un0_n.BLIF cpu_est_3_reg.D 1- 1 -1 1 -.names cpu_est_ns_e_0_0__n.BLIF cpu_est_0_.D -0 1 -.names CLK_000_D0_i.BLIF N_134_i.BLIF SM_AMIGA_4_.D -11 1 -.names N_135_i.BLIF N_136_i.BLIF SM_AMIGA_3_.D -11 1 -.names sm_amiga_ns_0_5__n.BLIF SM_AMIGA_2_.D -0 1 -.names N_46_0.BLIF SM_AMIGA_1_.D -0 1 -.names sm_amiga_ns_0_7__n.BLIF SM_AMIGA_0_.D -0 1 -.names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D -1- 1 --1 1 -.names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D -1- 1 --1 1 .names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF IPL_030DFFSH_0_reg.D 1- 1 -1 1 @@ -337,18 +343,25 @@ AMIGA_BUS_DATA_DIR_m1_0_x2 .names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF IPL_030DFFSH_2_reg.D 1- 1 -1 1 -.names sm_amiga_ns_0_0__n.BLIF SM_AMIGA_7_.D +.names sm_amiga_ns_e_0_0__n.BLIF SM_AMIGA_7_.D 0 1 -.names N_131_i.BLIF N_132_i.BLIF SM_AMIGA_6_.D +.names sm_amiga_ns_e_0_1__n.BLIF SM_AMIGA_6_.D +0 1 +.names N_160_i.BLIF N_240_i.BLIF SM_AMIGA_5_.D 11 1 -.names inst_CLK_000_D0.BLIF N_133_i.BLIF SM_AMIGA_5_.D +.names N_61.BLIF N_238_i.BLIF SM_AMIGA_4_.D 11 1 +.names N_163_i.BLIF N_236_i.BLIF SM_AMIGA_3_.D +11 1 +.names sm_amiga_ns_e_0_5__n.BLIF SM_AMIGA_2_.D +0 1 +.names N_167_i.BLIF N_233_i.BLIF SM_AMIGA_1_.D +11 1 +.names sm_amiga_ns_e_0_7__n.BLIF SM_AMIGA_0_.D +0 1 .names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D 1- 1 -1 1 -.names dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF inst_DSACK1_INT.D -1- 1 --1 1 .names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF inst_VMA_INTreg.D 1- 1 -1 1 @@ -356,11 +369,13 @@ AMIGA_BUS_DATA_DIR_m1_0_x2 inst_BGACK_030_INTreg.D 1- 1 -1 1 -.names G_103.BLIF CLK_CNT_N_0_.D -0 1 -.names G_109.BLIF CLK_CNT_P_0_.D -0 1 -.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INT.D +.names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D +1- 1 +-1 1 +.names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D +1- 1 +-1 1 +.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D 1- 1 -1 1 .names dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.D @@ -372,14 +387,23 @@ inst_BGACK_030_INTreg.D .names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF BG_000DFFSHreg.D 1- 1 -1 1 +.names dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF inst_DSACK1_INT.D +1- 1 +-1 1 .names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF inst_AS_000_DMA.D 1- 1 -1 1 +.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INT.D +1- 1 +-1 1 .names amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF \ AMIGA_BUS_ENABLEDFFSHreg.D 1- 1 -1 1 -.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INT.D +.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF inst_UDS_000_INT.D +1- 1 +-1 1 +.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INT.D 1- 1 -1 1 .names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF \ @@ -389,562 +413,656 @@ inst_AS_030_000_SYNC.D .names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF inst_DS_000_DMA.D 1- 1 -1 1 -.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D -1- 1 --1 1 -.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF inst_UDS_000_INT.D -1- 1 --1 1 -.names G_109.BLIF G_103.BLIF inst_CLK_OUT_PRE.D +.names CLK_CNT_P_0_.BLIF CLK_CNT_P_0_.D +0 1 +.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n +11 1 +.names N_35.BLIF as_030_000_sync_0_un3_n +0 1 +.names un1_AS_030_000_SYNC_1_sqmuxa_1.BLIF N_35.BLIF as_030_000_sync_0_un1_n +11 1 +.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ +as_030_000_sync_0_un0_n +11 1 +.names A0_DMA_1_sqmuxa.BLIF ds_000_dma_0_un3_n +0 1 +.names inst_DS_000_DMA.BLIF A0_DMA_1_sqmuxa.BLIF ds_000_dma_0_un1_n +11 1 +.names state_machine_ds_000_dma_5_n.BLIF ds_000_dma_0_un3_n.BLIF \ +ds_000_dma_0_un0_n +11 1 +.names N_33.BLIF fpu_cs_int_0_un3_n +0 1 +.names AS_030_c.BLIF N_33.BLIF fpu_cs_int_0_un1_n +11 1 +.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n +11 1 +.names N_225.BLIF dtack_sync_0_un3_n +0 1 +.names N_97_i.BLIF N_225.BLIF dtack_sync_0_un1_n +11 1 +.names inst_DTACK_SYNC.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n +11 1 +.names A0_DMA_1_sqmuxa.BLIF a0_dma_0_un3_n +0 1 +.names inst_A0_DMA.BLIF A0_DMA_1_sqmuxa.BLIF a0_dma_0_un1_n +11 1 +.names state_machine_a0_dma_4_n.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n 11 1 .names vcc_n_n 1 .names gnd_n_n -.names state_machine_un23_clk_000_d0_0_n.BLIF state_machine_un23_clk_000_d0_n -0 1 -.names state_machine_un15_clk_000_d0_0_n.BLIF state_machine_un15_clk_000_d0_n -0 1 -.names un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0.BLIF un1_AMIGA_BUS_ENABLE_0_sqmuxa_2 -0 1 -.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \ -state_machine_un23_clk_000_d0_0_n -11 1 -.names BGACK_000_c.BLIF N_65.BLIF state_machine_un6_bgack_000_0_n -11 1 -.names AS_030_i.BLIF N_224_i.BLIF N_214_0 -11 1 -.names BG_030_c.BLIF BG_030_c_i -0 1 -.names N_227.BLIF N_227_i -0 1 -.names BG_030_c_i.BLIF N_227_i.BLIF state_machine_un10_bg_030_0_n -11 1 -.names AS_030_i.BLIF N_73.BLIF N_215_0 -11 1 -.names AS_030_i.BLIF N_228_i.BLIF N_216_0 -11 1 -.names N_126.BLIF N_126_i -0 1 -.names AS_030_i.BLIF N_126_i.BLIF N_33_0 -11 1 -.names N_127.BLIF N_127_i -0 1 -.names N_127_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i.BLIF N_35_0 -11 1 -.names A0_i.BLIF N_73_i.BLIF state_machine_uds_000_int_5_0_n -11 1 -.names N_130.BLIF N_130_i -0 1 -.names N_73_i.BLIF N_130_i.BLIF state_machine_lds_000_int_5_0_n -11 1 -.names N_132.BLIF N_132_i -0 1 -.names N_131.BLIF N_131_i -0 1 -.names N_133.BLIF N_133_i -0 1 -.names N_134.BLIF N_134_i -0 1 -.names N_137.BLIF N_137_i -0 1 -.names N_138.BLIF N_138_i -0 1 -.names N_137_i.BLIF N_138_i.BLIF sm_amiga_ns_0_5__n -11 1 -.names cpu_est_ns_0_1__n.BLIF cpu_est_ns_1__n -0 1 -.names N_139.BLIF N_139_i -0 1 -.names cpu_est_ns_0_2__n.BLIF cpu_est_ns_2__n -0 1 -.names N_140.BLIF N_140_i -0 1 -.names N_139_i.BLIF N_140_i.BLIF N_46_0 -11 1 -.names N_52_0.BLIF N_52 -0 1 -.names N_142.BLIF N_142_i -0 1 -.names N_59_i.BLIF N_59 -0 1 -.names N_141.BLIF N_141_i -0 1 -.names N_62_i.BLIF N_62 -0 1 -.names N_141_i.BLIF N_142_i.BLIF sm_amiga_ns_0_7__n -11 1 -.names N_65_i.BLIF N_65 -0 1 -.names N_144.BLIF N_144_i -0 1 -.names N_67_i.BLIF N_67 -0 1 -.names N_144_i.BLIF un1_as_000_dma5_i_0__n.BLIF state_machine_ds_000_dma_5_0_n -11 1 -.names N_72_i.BLIF N_72 -0 1 -.names CLK_030_c.BLIF CLK_030_c_i -0 1 -.names N_77_0.BLIF N_77 -0 1 -.names AS_000_c.BLIF AS_000_c_i -0 1 -.names cpu_est_ns_0_0_m2_2__un1_n.BLIF cpu_est_ns_0_0_m2_2__un0_n.BLIF N_88 -1- 1 --1 1 -.names inst_AS_000_INT.BLIF inst_CLK_000_D0.BLIF N_59_i -11 1 -.names BGACK_030_INT_i.BLIF nEXP_SPACE_i.BLIF N_217 -11 1 -.names AS_030_i.BLIF N_223_i.BLIF N_61_0 -11 1 -.names N_219_1.BLIF VPA_i.BLIF N_219 -11 1 -.names inst_BGACK_030_INT_D.BLIF BGACK_030_INT_i.BLIF N_62_i -11 1 -.names N_221_1.BLIF cpu_est_2_.BLIF N_221 -11 1 -.names inst_CLK_000_D1.BLIF CLK_000_D1_i -0 1 -.names N_224_1.BLIF N_224_2.BLIF N_224 -11 1 -.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF N_65_i -11 1 -.names N_62.BLIF N_173.BLIF N_225 -11 1 -.names N_66_i_4.BLIF N_66_i_5.BLIF N_66_i -11 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_D_i.BLIF N_226 -11 1 -.names SM_AMIGA_6_.BLIF nEXP_SPACE_c.BLIF N_67_i -11 1 -.names N_128_1.BLIF UDS_000_c.BLIF N_128 -11 1 -.names N_175.BLIF N_175_i -0 1 -.names N_130_1.BLIF size_i_1__n.BLIF N_130 -11 1 -.names N_151.BLIF N_175_i.BLIF un1_as_000_dma5_i_0__n -11 1 -.names SM_AMIGA_7_.BLIF state_machine_un8_clk_000_d2_i_n.BLIF N_132 -11 1 -.names state_machine_un6_clk_000_d5_n.BLIF state_machine_un6_clk_000_d5_i_n -0 1 -.names CLK_000_D0_i.BLIF N_77.BLIF N_135 -11 1 -.names CLK_000_D0_i.BLIF state_machine_un6_clk_000_d5_i_n.BLIF N_71_i -11 1 -.names sm_amiga_i_3__n.BLIF sm_amiga_i_4__n.BLIF N_136 -11 1 -.names DS_030_c.BLIF DS_030_c_i -0 1 -.names N_138_1.BLIF state_machine_un23_clk_000_d0_n.BLIF N_138 -11 1 -.names DS_030_c_i.BLIF N_57.BLIF N_73_i -11 1 -.names N_72.BLIF cpu_est_2_.BLIF N_143 -11 1 -.names N_156.BLIF N_156_i -0 1 -.names cpu_est_0_.BLIF cpu_est_3_reg.BLIF N_145 -11 1 -.names N_61_0.BLIF N_156_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i -11 1 -.names CLK_000_D0_i.BLIF N_156.BLIF N_146 -11 1 -.names CLK_000_D0_i.BLIF N_67_i.BLIF N_75_0 -11 1 -.names N_65.BLIF cpu_est_0_.BLIF N_147 -11 1 -.names N_176.BLIF N_176_i -0 1 -.names N_65_i.BLIF cpu_est_i_0__n.BLIF N_148 -11 1 -.names N_52_0_1.BLIF N_52_0_2.BLIF N_52_0 -11 1 -.names N_151_1.BLIF BGACK_030_INT_i.BLIF N_151 -11 1 -.names N_173.BLIF N_173_i -0 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_153 -11 1 -.names N_226.BLIF N_226_i -0 1 -.names N_153.BLIF cpu_est_i_3__n.BLIF N_154 -11 1 -.names SM_AMIGA_3_.BLIF state_machine_un23_clk_000_d0_0_n.BLIF N_77_0 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_155 -11 1 -.names cpu_est_3_reg.BLIF cpu_est_i_1__n.BLIF N_72_i -11 1 -.names N_59_i.BLIF SM_AMIGA_0_.BLIF N_173 -11 1 -.names N_147.BLIF N_147_i -0 1 -.names N_148.BLIF N_148_i -0 1 -.names N_147_i.BLIF N_148_i.BLIF cpu_est_ns_e_0_0__n -11 1 -.names inst_CLK_000_D0.BLIF SM_AMIGA_3_.BLIF N_228_1 -11 1 -.names N_146.BLIF N_146_i -0 1 -.names N_237_1.BLIF N_237_2.BLIF N_237 -11 1 -.names sm_amiga_ns_0_1_0__n.BLIF N_146_i.BLIF sm_amiga_ns_0_0__n -11 1 -.names N_247_5.BLIF N_247_6.BLIF N_247 -11 1 -.names N_88.BLIF N_88_i -0 1 -.names N_227_1.BLIF N_227_2.BLIF N_227 -11 1 -.names N_145.BLIF N_145_i -0 1 -.names N_228_1_0.BLIF VPA_c.BLIF N_228 -11 1 -.names N_88_i.BLIF N_145_i.BLIF cpu_est_ns_0_2__n -11 1 -.names N_127_1.BLIF N_127_2.BLIF N_127 -11 1 -.names N_143.BLIF N_143_i -0 1 -.names N_66_i.BLIF N_66 -0 1 -.names N_154.BLIF N_154_i -0 1 -.names LDS_000_c.BLIF UDS_000_c.BLIF N_175 -11 1 -.names N_143_i.BLIF N_154_i.BLIF N_161_i -11 1 -.names LDS_000_i.BLIF UDS_000_i.BLIF N_176 -11 1 -.names N_153.BLIF N_153_i -0 1 -.names N_75_0.BLIF N_75 -0 1 -.names N_155.BLIF N_155_i -0 1 -.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_4 -0 1 -.names cpu_est_ns_0_1_1__n.BLIF N_153_i.BLIF cpu_est_ns_0_1__n -11 1 -.names N_61_0.BLIF N_61 -0 1 -.names N_135.BLIF N_135_i -0 1 -.names SM_AMIGA_6_.BLIF nEXP_SPACE_i.BLIF N_156 -11 1 -.names N_136.BLIF N_136_i -0 1 -.names N_73_i.BLIF N_73 -0 1 -.names state_machine_uds_000_int_5_0_m2_un1_n.BLIF \ -state_machine_uds_000_int_5_0_m2_un0_n.BLIF N_57 -1- 1 --1 1 -.names N_225.BLIF N_225_i -0 1 -.names N_71_i.BLIF N_71 -0 1 -.names N_225_i.BLIF N_226_i.BLIF un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0 -11 1 -.names inst_CLK_000_D5.BLIF CLK_000_D6_i.BLIF state_machine_un6_clk_000_d5_n -11 1 -.names N_219.BLIF N_219_i -0 1 -.names un1_as_000_dma5_i_0__n.BLIF un1_as_000_dma5_0__n -0 1 -.names N_221.BLIF N_221_i -0 1 -.names SM_AMIGA_1_.BLIF state_machine_un6_clk_000_d5_n.BLIF N_223 -11 1 -.names N_219_i.BLIF N_221_i.BLIF state_machine_un15_clk_000_d0_0_n -11 1 -.names state_machine_ds_000_dma_5_0_n.BLIF state_machine_ds_000_dma_5_n -0 1 -.names inst_AS_000_DMA.BLIF RW_i.BLIF N_144 -11 1 -.names BGACK_000_c.BLIF a_i_19__n.BLIF N_66_i_1 -11 1 -.names N_59.BLIF SM_AMIGA_0_.BLIF N_141 -11 1 -.names a_i_16__n.BLIF a_i_18__n.BLIF N_66_i_2 -11 1 -.names N_71_i.BLIF SM_AMIGA_1_.BLIF N_142 -11 1 -.names a_c_17__n.BLIF fc_c_0__n.BLIF N_66_i_3 -11 1 -.names N_71.BLIF SM_AMIGA_1_.BLIF N_139 -11 1 -.names N_66_i_1.BLIF N_66_i_2.BLIF N_66_i_4 -11 1 -.names inst_CLK_000_D0.BLIF SM_AMIGA_2_.BLIF N_140 -11 1 -.names N_66_i_3.BLIF fc_c_1__n.BLIF N_66_i_5 -11 1 -.names CLK_000_D0_i.BLIF SM_AMIGA_2_.BLIF N_137 -11 1 -.names a_c_20__n.BLIF a_c_21__n.BLIF N_237_1 -11 1 -.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_134 -11 1 -.names a_c_22__n.BLIF a_c_23__n.BLIF N_237_2 -11 1 -.names sm_amiga_i_5__n.BLIF sm_amiga_i_6__n.BLIF N_133 -11 1 -.names a_i_24__n.BLIF a_i_25__n.BLIF N_247_1 -11 1 -.names N_75.BLIF sm_amiga_i_7__n.BLIF N_131 -11 1 -.names a_i_26__n.BLIF a_i_27__n.BLIF N_247_2 -11 1 -.names state_machine_lds_000_int_5_0_n.BLIF state_machine_lds_000_int_5_n -0 1 -.names a_i_28__n.BLIF a_i_29__n.BLIF N_247_3 -11 1 -.names state_machine_uds_000_int_5_0_n.BLIF state_machine_uds_000_int_5_n -0 1 -.names a_i_30__n.BLIF a_i_31__n.BLIF N_247_4 -11 1 -.names N_35_0.BLIF N_35 -0 1 -.names N_247_1.BLIF N_247_2.BLIF N_247_5 -11 1 -.names N_33_0.BLIF N_33 -0 1 -.names N_247_3.BLIF N_247_4.BLIF N_247_6 -11 1 -.names CLK_030_c.BLIF N_66_i.BLIF N_126 -11 1 -.names N_62.BLIF N_67.BLIF N_52_0_1 -11 1 -.names N_216_0.BLIF N_216 -0 1 -.names N_173_i.BLIF N_226_i.BLIF N_52_0_2 -11 1 -.names N_215_0.BLIF N_215 -0 1 -.names N_72_i.BLIF N_228_1.BLIF N_224_1 -11 1 -.names state_machine_un10_bg_030_0_n.BLIF state_machine_un10_bg_030_n -0 1 -.names VMA_INT_i.BLIF VPA_i.BLIF N_224_2 +.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF A0_DMA_1_sqmuxa 11 1 -.names N_214_0.BLIF N_214 +.names state_machine_un57_bgack_030_int_0_n.BLIF \ +state_machine_un57_bgack_030_int_n 0 1 -.names AS_030_c.BLIF CLK_000_c.BLIF N_227_1 +.names inst_CLK_000_D5.BLIF CLK_000_D6_i.BLIF \ +state_machine_un81_bgack_030_int_n 11 1 .names state_machine_un6_bgack_000_0_n.BLIF state_machine_un6_bgack_000_n 0 1 -.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF N_227_2 -11 1 -.names state_machine_un8_clk_000_d2_1_n.BLIF CLK_000_D2_i.BLIF \ -state_machine_un8_clk_000_d2_n -11 1 -.names DTACK_i.BLIF N_228_1.BLIF N_228_1_0 -11 1 -.names SIZE_DMA_1_sqmuxa_1.BLIF N_175_i.BLIF SIZE_DMA_1_sqmuxa -11 1 -.names CLK_030_c.BLIF N_66.BLIF N_127_1 -11 1 -.names N_151.BLIF N_176.BLIF SIZE_DMA_0_sqmuxa -11 1 -.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF N_127_2 -11 1 -.names AS_030_i.BLIF sm_amiga_i_5__n.BLIF AS_000_INT_1_sqmuxa -11 1 -.names CLK_030_c_i.BLIF AS_000_c_i.BLIF N_151_1 -11 1 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_249 -11 1 -.names N_176_i.BLIF N_151.BLIF SIZE_DMA_1_sqmuxa_1 -11 1 -.names inst_CLK_000_D6.BLIF CLK_000_D6_i +.names state_machine_un10_bg_030_0_n.BLIF state_machine_un10_bg_030_n 0 1 -.names inst_CLK_000_D3.BLIF AS_030_000_SYNC_i.BLIF \ -state_machine_un8_clk_000_d2_1_n +.names un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1 +0 1 +.names SIZE_DMA_0_sqmuxa_1.BLIF N_71_i.BLIF SIZE_DMA_0_sqmuxa 11 1 -.names N_228.BLIF N_228_i -0 1 -.names N_173_i.BLIF N_132_i.BLIF sm_amiga_ns_0_1_0__n +.names state_machine_a0_dma_4_1_n.BLIF state_machine_a0_dma_4_2_n.BLIF \ +state_machine_a0_dma_4_n 11 1 -.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n +.names un1_AMIGA_BUS_ENABLE_2_sqmuxa_0.BLIF un1_AMIGA_BUS_ENABLE_2_sqmuxa 0 1 -.names N_155_i.BLIF cpu_est_ns_0_0_x2_1_.BLIF cpu_est_ns_0_1_1__n +.names state_machine_lds_000_int_6_0_n.BLIF state_machine_lds_000_int_6_n +0 1 +.names state_machine_uds_000_int_6_0_n.BLIF state_machine_uds_000_int_6_n +0 1 +.names state_machine_ds_000_dma_5_0_n.BLIF state_machine_ds_000_dma_5_n +0 1 +.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_0.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_1 +0 1 +.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c +0 1 +.names cpu_est_ns_0_1_1__n.BLIF cpu_est_ns_0_2_1__n.BLIF cpu_est_ns_0_1__n 11 1 -.names N_224.BLIF N_224_i +.names N_165.BLIF N_165_i 0 1 -.names CLK_000_D0_i.BLIF SM_AMIGA_3_.BLIF N_138_1 +.names N_166.BLIF N_166_i +0 1 +.names N_242.BLIF N_242_i +0 1 +.names N_243.BLIF N_243_i +0 1 +.names SM_AMIGA_6_.BLIF nEXP_SPACE_c.BLIF N_70_0 11 1 -.names N_223.BLIF N_223_i +.names N_94.BLIF N_94_i 0 1 -.names A0_i.BLIF size_c_0__n.BLIF N_130_1 +.names AS_030_c.BLIF N_94_i.BLIF N_222_i 11 1 -.names SIZE_DMA_0_sqmuxa.BLIF SIZE_DMA_0_sqmuxa_i -0 1 -.names LDS_000_i.BLIF N_151.BLIF N_128_1 -11 1 -.names SIZE_DMA_1_sqmuxa.BLIF SIZE_DMA_1_sqmuxa_i -0 1 -.names N_59_i.BLIF N_154.BLIF N_221_1 -11 1 -.names a_c_18__n.BLIF a_i_18__n -0 1 -.names CLK_000_D0_i.BLIF N_155.BLIF N_219_1 -11 1 -.names a_c_16__n.BLIF a_i_16__n -0 1 -.names N_214.BLIF vpa_sync_0_un3_n -0 1 -.names a_c_19__n.BLIF a_i_19__n -0 1 -.names N_224_i.BLIF N_214.BLIF vpa_sync_0_un1_n +.names N_100_i_1.BLIF N_100_i_2.BLIF N_100_i 11 1 .names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i 0 1 -.names inst_VPA_SYNC.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n +.names AMIGA_BUS_ENABLE_1_sqmuxa_1.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_1_i +0 1 +.names AMIGA_BUS_ENABLE_1_sqmuxa_2.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_2_i +0 1 +.names AMIGA_BUS_ENABLE_1_sqmuxa_1_i.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_2_i.BLIF \ +un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_0 +11 1 +.names AMIGA_BUS_ENABLE_0_sqmuxa_2.BLIF AMIGA_BUS_ENABLE_0_sqmuxa_2_i +0 1 +.names AMIGA_BUS_ENABLE_2_sqmuxa.BLIF AMIGA_BUS_ENABLE_2_sqmuxa_i +0 1 +.names AMIGA_BUS_ENABLE_0_sqmuxa_2_i.BLIF AMIGA_BUS_ENABLE_2_sqmuxa_i.BLIF \ +un1_AMIGA_BUS_ENABLE_2_sqmuxa_0 +11 1 +.names BG_030_c.BLIF BG_030_c_i +0 1 +.names state_machine_un8_bg_030_n.BLIF state_machine_un8_bg_030_i_n +0 1 +.names BG_030_c_i.BLIF state_machine_un8_bg_030_i_n.BLIF \ +state_machine_un10_bg_030_0_n +11 1 +.names N_82_i_1.BLIF DS_030_c_i.BLIF N_82_i +11 1 +.names N_100_i.BLIF N_100 +0 1 +.names DS_030_c.BLIF DS_030_c_i +0 1 +.names N_61_i.BLIF SM_AMIGA_4_.BLIF N_80_0 +11 1 +.names N_61_i.BLIF SM_AMIGA_2_.BLIF N_79_0 +11 1 +.names A0_DMA_0_sqmuxa_i_0_0_1.BLIF N_161_i.BLIF A0_DMA_0_sqmuxa_i_0_0 +11 1 +.names inst_AS_000_INT.BLIF N_61_i.BLIF N_77_i +11 1 +.names cpu_est_3_reg.BLIF cpu_est_i_1__n.BLIF N_76_i +11 1 +.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_6_.BLIF N_75_i +11 1 +.names N_162.BLIF N_162_i +0 1 +.names N_63_i.BLIF N_162_i.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1_0 +11 1 +.names cpu_est_ns_0_1__n.BLIF cpu_est_ns_1__n +0 1 +.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_5_.BLIF N_72_i +11 1 +.names cpu_est_ns_0_2__n.BLIF cpu_est_ns_2__n +0 1 +.names CLK_030_c.BLIF CLK_030_c_i +0 1 +.names A0_DMA_0_sqmuxa_i_0_0.BLIF A0_DMA_0_sqmuxa_i_0 +0 1 +.names BGACK_030_INT_i.BLIF CLK_030_c_i.BLIF N_71_i +11 1 +.names N_221_0.BLIF N_221 +0 1 +.names N_69_i_4.BLIF N_69_i_5.BLIF N_69_i +11 1 +.names N_223_0.BLIF N_223 +0 1 +.names inst_CLK_000_D1.BLIF CLK_000_D1_i +0 1 +.names N_224_0.BLIF N_224 +0 1 +.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF N_68_i +11 1 +.names N_225_0.BLIF N_225 +0 1 +.names N_161.BLIF N_161_i +0 1 +.names N_31_0.BLIF N_31 +0 1 +.names AS_030_i.BLIF N_96_i.BLIF N_63_i +11 1 +.names N_33_0.BLIF N_33 +0 1 +.names inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF N_61_i +11 1 +.names N_35_0.BLIF N_35 +0 1 +.names N_156.BLIF N_156_i +0 1 +.names N_37_0.BLIF N_37 +0 1 +.names N_157.BLIF N_157_i +0 1 +.names N_61_i.BLIF N_61 +0 1 +.names N_156_i.BLIF N_157_i.BLIF cpu_est_ns_e_0_0__n +11 1 +.names state_machine_lds_000_int_6_0_m2_un1_n.BLIF \ +state_machine_lds_000_int_6_0_m2_un0_n.BLIF N_62 +1- 1 +-1 1 +.names N_152.BLIF N_152_i +0 1 +.names N_63_i.BLIF N_63 +0 1 +.names N_153.BLIF N_153_i +0 1 +.names N_68_i.BLIF N_68 +0 1 +.names N_154.BLIF N_154_i +0 1 +.names N_69_i.BLIF N_69 +0 1 +.names sm_amiga_ns_e_0_1_0__n.BLIF N_153_i.BLIF sm_amiga_ns_e_0_0__n +11 1 +.names N_72_i.BLIF N_72 +0 1 +.names N_149.BLIF N_149_i +0 1 +.names N_75_i.BLIF N_75 +0 1 +.names N_150.BLIF N_150_i +0 1 +.names N_76_i.BLIF N_76 +0 1 +.names N_151.BLIF N_151_i +0 1 +.names N_77_i.BLIF N_77 +0 1 +.names sm_amiga_ns_e_0_1_1__n.BLIF N_150_i.BLIF sm_amiga_ns_e_0_1__n +11 1 +.names N_79_0.BLIF N_79 +0 1 +.names N_146.BLIF N_146_i +0 1 +.names N_80_0.BLIF N_80 +0 1 +.names N_147.BLIF N_147_i +0 1 +.names N_82_i.BLIF N_82 +0 1 +.names N_148.BLIF N_148_i +0 1 +.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_7_.BLIF N_92 +11 1 +.names cpu_est_ns_0_1_2__n.BLIF N_147_i.BLIF cpu_est_ns_0_2__n +11 1 +.names N_93_1.BLIF VPA_D_i.BLIF N_93 +11 1 +.names N_145.BLIF N_145_i +0 1 +.names sm_amiga_i_0__n.BLIF sm_amiga_i_1__n.BLIF N_94 +11 1 +.names A0_DMA_0_sqmuxa_i_0_0.BLIF N_145_i.BLIF state_machine_ds_000_dma_5_0_n +11 1 +.names N_95_3.BLIF VPA_D_i.BLIF N_95 +11 1 +.names N_143.BLIF N_143_i +0 1 +.names N_96_1.BLIF state_machine_un81_bgack_030_int_n.BLIF N_96 +11 1 +.names N_144.BLIF N_144_i +0 1 +.names N_97_1.BLIF N_97_2.BLIF N_97 +11 1 +.names N_143_i.BLIF N_144_i.BLIF AMIGA_BUS_DATA_DIR_c_0 +11 1 +.names CLK_030_c.BLIF N_69_i.BLIF N_106 +11 1 +.names N_142.BLIF N_142_i +0 1 +.names N_107_1.BLIF N_107_2.BLIF N_107 +11 1 +.names N_246.BLIF N_246_i +0 1 +.names N_125_1.BLIF size_i_1__n.BLIF N_125 +11 1 +.names N_142_i.BLIF N_246_i.BLIF N_176_i +11 1 +.names N_77.BLIF SM_AMIGA_0_.BLIF N_231 +11 1 +.names N_160.BLIF N_160_i +0 1 +.names N_167.BLIF SM_AMIGA_1_.BLIF N_232 +11 1 +.names N_240.BLIF N_240_i +0 1 +.names N_79.BLIF sm_amiga_i_1__n.BLIF N_233 +11 1 +.names N_61.BLIF SM_AMIGA_2_.BLIF N_234 +11 1 +.names N_238.BLIF N_238_i +0 1 +.names N_163.BLIF SM_AMIGA_3_.BLIF N_235 +11 1 +.names N_80.BLIF sm_amiga_i_3__n.BLIF N_236 +11 1 +.names N_163.BLIF N_163_i +0 1 +.names N_72.BLIF sm_amiga_i_4__n.BLIF N_238 +11 1 +.names N_236.BLIF N_236_i +0 1 +.names N_75.BLIF sm_amiga_i_5__n.BLIF N_240 +11 1 +.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF N_242 +11 1 +.names N_234.BLIF N_234_i +0 1 +.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_243 +11 1 +.names N_235.BLIF N_235_i +0 1 +.names N_76.BLIF cpu_est_2_.BLIF N_246 +11 1 +.names N_234_i.BLIF N_235_i.BLIF sm_amiga_ns_e_0_5__n +11 1 +.names N_166.BLIF cpu_est_i_3__n.BLIF N_142 +11 1 +.names N_167.BLIF N_167_i +0 1 +.names inst_BGACK_030_INTreg.BLIF RW_i.BLIF N_143 +11 1 +.names N_233.BLIF N_233_i +0 1 +.names N_144_1.BLIF nEXP_SPACE_i.BLIF N_144 +11 1 +.names inst_AS_000_DMA.BLIF RW_i.BLIF N_145 +11 1 +.names N_231.BLIF N_231_i +0 1 +.names cpu_est_1_.BLIF cpu_est_2_.BLIF N_146 +11 1 +.names N_232.BLIF N_232_i +0 1 +.names cpu_est_0_.BLIF cpu_est_3_reg.BLIF N_147 +11 1 +.names N_231_i.BLIF N_232_i.BLIF sm_amiga_ns_e_0_7__n +11 1 +.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_148 +11 1 +.names A0_i.BLIF N_82_i.BLIF state_machine_uds_000_int_6_0_n +11 1 +.names BGACK_030_INT_i.BLIF SM_AMIGA_6_.BLIF N_149 +11 1 +.names N_125.BLIF N_125_i +0 1 +.names N_100_i.BLIF SM_AMIGA_7_.BLIF N_150 +11 1 +.names N_82_i.BLIF N_125_i.BLIF state_machine_lds_000_int_6_0_n +11 1 +.names N_151_1.BLIF nEXP_SPACE_c.BLIF N_151 +11 1 +.names AS_030_i.BLIF N_82.BLIF N_37_0 +11 1 +.names N_100.BLIF SM_AMIGA_7_.BLIF N_152 +11 1 +.names N_107.BLIF N_107_i +0 1 +.names N_153_1.BLIF nEXP_SPACE_i.BLIF N_153 +11 1 +.names N_107_i.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF N_35_0 +11 1 +.names N_77_i.BLIF SM_AMIGA_0_.BLIF N_154 +11 1 +.names N_106.BLIF N_106_i +0 1 +.names N_155_1.BLIF nEXP_SPACE_i.BLIF N_155 +11 1 +.names AS_030_i.BLIF N_106_i.BLIF N_33_0 +11 1 +.names N_68.BLIF cpu_est_0_.BLIF N_156 +11 1 +.names N_164.BLIF N_164_i +0 1 +.names N_68_i.BLIF cpu_est_i_0__n.BLIF N_157 +11 1 +.names A0_DMA_0_sqmuxa_i_0_0.BLIF N_164_i.BLIF N_31_0 +11 1 +.names inst_BGACK_030_INTreg.BLIF CLK_000_D0_i.BLIF N_160 +11 1 +.names AS_030_i.BLIF N_97_i.BLIF N_225_0 +11 1 +.names LDS_000_c.BLIF UDS_000_c.BLIF N_161 +11 1 +.names AS_030_i.BLIF N_95_i.BLIF N_224_0 +11 1 +.names N_75_i.BLIF nEXP_SPACE_i.BLIF N_162 +11 1 +.names AS_030_i.BLIF N_72.BLIF N_223_0 +11 1 +.names N_160.BLIF state_machine_un57_bgack_030_int_n.BLIF N_163 +11 1 +.names N_92.BLIF N_92_i +0 1 +.names LDS_000_i.BLIF UDS_000_i.BLIF N_164 +11 1 +.names N_93.BLIF N_93_i +0 1 +.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_165 +11 1 +.names N_92_i.BLIF N_93_i.BLIF N_221_0 +11 1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_166 +11 1 +.names BGACK_000_c.BLIF N_68.BLIF state_machine_un6_bgack_000_0_n +11 1 +.names N_160.BLIF state_machine_un81_bgack_030_int_i_n.BLIF N_167 11 1 .names inst_CLK_000_D2.BLIF CLK_000_D2_i 0 1 -.names AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un3_n -0 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i -0 1 -.names inst_AS_000_INT.BLIF AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un1_n +.names BGACK_030_INT_D_i.BLIF BGACK_030_INT_i.BLIF AMIGA_BUS_ENABLE_1_sqmuxa_1 11 1 -.names nEXP_SPACE_c.BLIF nEXP_SPACE_i -0 1 -.names sm_amiga_i_5__n.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n +.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \ +state_machine_un57_bgack_030_int_0_n 11 1 -.names AS_030_c.BLIF AS_030_i -0 1 -.names N_249.BLIF as_000_dma_0_un3_n -0 1 -.names inst_BGACK_030_INT_D.BLIF BGACK_030_INT_D_i -0 1 -.names inst_AS_000_DMA.BLIF N_249.BLIF as_000_dma_0_un1_n +.names inst_BGACK_030_INTreg.BLIF N_222_i.BLIF AMIGA_BUS_ENABLE_2_sqmuxa 11 1 -.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n -0 1 -.names un1_as_000_dma5_0__n.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n +.names a_c_20__n.BLIF a_c_21__n.BLIF N_255_1 11 1 -.names state_machine_un8_clk_000_d2_n.BLIF state_machine_un8_clk_000_d2_i_n -0 1 -.names state_machine_un10_bg_030_n.BLIF bg_000_0_un3_n -0 1 -.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n -0 1 -.names BG_030_c.BLIF state_machine_un10_bg_030_n.BLIF bg_000_0_un1_n +.names state_machine_un8_bg_030_1_n.BLIF state_machine_un8_bg_030_2_n.BLIF \ +state_machine_un8_bg_030_n 11 1 -.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n -0 1 -.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +.names a_c_22__n.BLIF a_c_23__n.BLIF N_255_2 11 1 -.names inst_CLK_000_D0.BLIF CLK_000_D0_i -0 1 -.names N_249.BLIF a0_dma_0_un3_n -0 1 -.names RW_c.BLIF RW_i -0 1 -.names inst_A0_DMA.BLIF N_249.BLIF a0_dma_0_un1_n +.names AMIGA_BUS_ENABLE_0_sqmuxa_2_1.BLIF N_222.BLIF \ +AMIGA_BUS_ENABLE_0_sqmuxa_2 11 1 -.names UDS_000_c.BLIF UDS_000_i -0 1 -.names N_128.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n +.names a_i_24__n.BLIF a_i_25__n.BLIF N_265_1 11 1 -.names LDS_000_c.BLIF LDS_000_i +.names AMIGA_BUS_ENABLE_0_sqmuxa_2.BLIF inst_BGACK_030_INT_D.BLIF \ +AMIGA_BUS_ENABLE_1_sqmuxa_2 +11 1 +.names a_i_26__n.BLIF a_i_27__n.BLIF N_265_2 +11 1 +.names N_70_0.BLIF N_70 0 1 -.names N_216.BLIF dtack_sync_0_un3_n +.names a_i_28__n.BLIF a_i_29__n.BLIF N_265_3 +11 1 +.names N_222_i.BLIF N_222 0 1 -.names DTACK_c.BLIF DTACK_i -0 1 -.names N_228_i.BLIF N_216.BLIF dtack_sync_0_un1_n +.names a_i_30__n.BLIF a_i_31__n.BLIF N_265_4 +11 1 +.names N_255_1.BLIF N_255_2.BLIF N_255 +11 1 +.names N_265_1.BLIF N_265_2.BLIF N_265_5 +11 1 +.names N_265_5.BLIF N_265_6.BLIF N_265 +11 1 +.names N_265_3.BLIF N_265_4.BLIF N_265_6 11 1 .names inst_VMA_INTreg.BLIF VMA_INT_i 0 1 -.names inst_DTACK_SYNC.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n +.names a_c_17__n.BLIF BGACK_000_c.BLIF N_69_i_1 11 1 -.names VPA_c.BLIF VPA_i +.names inst_VPA_D.BLIF VPA_D_i 0 1 -.names N_215.BLIF lds_000_int_0_un3_n -0 1 -.names cpu_est_0_.BLIF cpu_est_i_0__n -0 1 -.names state_machine_lds_000_int_5_n.BLIF N_215.BLIF lds_000_int_0_un1_n +.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_69_i_2 11 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +.names DTACK_c.BLIF DTACK_i 0 1 -.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n +.names a_i_19__n.BLIF a_i_16__n.BLIF N_69_i_3 +11 1 +.names LDS_000_c.BLIF LDS_000_i +0 1 +.names N_69_i_1.BLIF N_69_i_2.BLIF N_69_i_4 +11 1 +.names AS_000_c.BLIF AS_000_i +0 1 +.names N_69_i_3.BLIF a_i_18__n.BLIF N_69_i_5 +11 1 +.names nEXP_SPACE_c.BLIF nEXP_SPACE_i +0 1 +.names AS_000_i.BLIF N_71_i.BLIF A0_DMA_0_sqmuxa_i_0_0_1 +11 1 +.names AS_030_c.BLIF AS_030_i +0 1 +.names N_62.BLIF inst_BGACK_030_INTreg.BLIF N_82_i_1 +11 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +0 1 +.names inst_BGACK_030_INTreg.BLIF N_70.BLIF AMIGA_BUS_ENABLE_0_sqmuxa_2_1 +11 1 +.names inst_BGACK_030_INT_D.BLIF BGACK_030_INT_D_i +0 1 +.names AS_030_000_SYNC_i.BLIF inst_BGACK_030_INTreg.BLIF N_100_i_1 +11 1 +.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n +0 1 +.names CLK_000_D2_i.BLIF inst_CLK_000_D3.BLIF N_100_i_2 11 1 .names cpu_est_3_reg.BLIF cpu_est_i_3__n 0 1 -.names N_215.BLIF uds_000_int_0_un3_n +.names AS_030_c.BLIF CLK_000_c.BLIF state_machine_un8_bg_030_1_n +11 1 +.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n 0 1 +.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF state_machine_un8_bg_030_2_n +11 1 +.names inst_CLK_000_D0.BLIF CLK_000_D0_i +0 1 +.names N_165_i.BLIF N_166_i.BLIF cpu_est_ns_0_1_1__n +11 1 +.names state_machine_un81_bgack_030_int_n.BLIF \ +state_machine_un81_bgack_030_int_i_n +0 1 +.names N_242_i.BLIF N_243_i.BLIF cpu_est_ns_0_2_1__n +11 1 +.names cpu_est_0_.BLIF cpu_est_i_0__n +0 1 +.names AS_000_i.BLIF LDS_000_i.BLIF state_machine_a0_dma_4_1_n +11 1 .names cpu_est_1_.BLIF cpu_est_i_1__n 0 1 -.names state_machine_uds_000_int_5_n.BLIF N_215.BLIF uds_000_int_0_un1_n +.names N_71_i.BLIF UDS_000_c.BLIF state_machine_a0_dma_4_2_n +11 1 +.names UDS_000_c.BLIF UDS_000_i +0 1 +.names CLK_030_c.BLIF N_69.BLIF N_107_1 +11 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_i +0 1 +.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF N_107_2 +11 1 +.names RW_c.BLIF RW_i +0 1 +.names DTACK_i.BLIF N_61_i.BLIF N_97_1 +11 1 +.names cpu_est_2_.BLIF cpu_est_i_2__n +0 1 +.names SM_AMIGA_3_.BLIF inst_VPA_D.BLIF N_97_2 +11 1 +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names N_61_i.BLIF N_76_i.BLIF N_95_1 +11 1 +.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +0 1 +.names SM_AMIGA_3_.BLIF VMA_INT_i.BLIF N_95_2 11 1 .names A0_c.BLIF A0_i 0 1 -.names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n +.names N_95_1.BLIF N_95_2.BLIF N_95_3 11 1 .names size_c_1__n.BLIF size_i_1__n 0 1 -.names N_33.BLIF fpu_cs_int_0_un3_n +.names N_154_i.BLIF N_152_i.BLIF sm_amiga_ns_e_0_1_0__n +11 1 +.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n 0 1 +.names N_151_i.BLIF N_149_i.BLIF sm_amiga_ns_e_0_1_1__n +11 1 .names a_c_30__n.BLIF a_i_30__n 0 1 -.names AS_030_c.BLIF N_33.BLIF fpu_cs_int_0_un1_n +.names N_148_i.BLIF N_146_i.BLIF cpu_est_ns_0_1_2__n 11 1 .names a_c_31__n.BLIF a_i_31__n 0 1 -.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n +.names AS_000_DMA_i.BLIF BGACK_030_INT_i.BLIF N_155_1 11 1 .names a_c_28__n.BLIF a_i_28__n 0 1 -.names N_249.BLIF ds_000_dma_0_un3_n -0 1 +.names N_160.BLIF SM_AMIGA_6_.BLIF N_153_1 +11 1 .names a_c_29__n.BLIF a_i_29__n 0 1 -.names inst_DS_000_DMA.BLIF N_249.BLIF ds_000_dma_0_un1_n +.names CLK_000_D0_i.BLIF SM_AMIGA_6_.BLIF N_151_1 11 1 .names a_c_26__n.BLIF a_i_26__n 0 1 -.names state_machine_ds_000_dma_5_n.BLIF ds_000_dma_0_un3_n.BLIF \ -ds_000_dma_0_un0_n +.names BGACK_030_INT_i.BLIF RW_c.BLIF N_144_1 11 1 .names a_c_27__n.BLIF a_i_27__n 0 1 -.names N_35.BLIF as_030_000_sync_0_un3_n -0 1 +.names A0_i.BLIF size_c_0__n.BLIF N_125_1 +11 1 .names a_c_24__n.BLIF a_i_24__n 0 1 -.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_4.BLIF N_35.BLIF as_030_000_sync_0_un1_n +.names N_164.BLIF AS_000_i.BLIF SIZE_DMA_0_sqmuxa_1 11 1 .names a_c_25__n.BLIF a_i_25__n 0 1 -.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ -as_030_000_sync_0_un0_n +.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_1_.BLIF N_96_1 +11 1 +.names a_c_19__n.BLIF a_i_19__n +0 1 +.names CLK_000_D0_i.BLIF N_165.BLIF N_93_1 +11 1 +.names a_c_16__n.BLIF a_i_16__n +0 1 +.names RW_c.BLIF state_machine_lds_000_int_6_0_m2_un3_n +0 1 +.names a_c_18__n.BLIF a_i_18__n +0 1 +.names SM_AMIGA_5_.BLIF RW_c.BLIF state_machine_lds_000_int_6_0_m2_un1_n 11 1 .names RST_c.BLIF RST_i 0 1 -.names N_249.BLIF size_dma_0_1__un3_n -0 1 -.names SIZE_DMA_1_.BLIF N_249.BLIF size_dma_0_1__un1_n +.names SM_AMIGA_4_.BLIF state_machine_lds_000_int_6_0_m2_un3_n.BLIF \ +state_machine_lds_000_int_6_0_m2_un0_n 11 1 -.names CLK_OSZI_c.BLIF CLK_OSZI_i +.names N_68.BLIF cpu_estse_0_un3_n 0 1 -.names SIZE_DMA_1_sqmuxa_i.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un0_n +.names SIZE_DMA_0_sqmuxa.BLIF SIZE_DMA_0_sqmuxa_i +0 1 +.names cpu_est_1_.BLIF N_68.BLIF cpu_estse_0_un1_n 11 1 -.names N_249.BLIF size_dma_0_0__un3_n +.names N_95.BLIF N_95_i 0 1 +.names cpu_est_ns_1__n.BLIF cpu_estse_0_un3_n.BLIF cpu_estse_0_un0_n +11 1 +.names N_96.BLIF N_96_i +0 1 +.names N_68.BLIF cpu_estse_1_un3_n +0 1 +.names N_97.BLIF N_97_i +0 1 +.names cpu_est_2_.BLIF N_68.BLIF cpu_estse_1_un1_n +11 1 .names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i 0 1 -.names SIZE_DMA_0_.BLIF N_249.BLIF size_dma_0_0__un1_n +.names cpu_est_ns_2__n.BLIF cpu_estse_1_un3_n.BLIF cpu_estse_1_un0_n 11 1 -.names SIZE_DMA_0_sqmuxa_i.BLIF size_dma_0_0__un3_n.BLIF size_dma_0_0__un0_n +.names inst_CLK_000_D6.BLIF CLK_000_D6_i +0 1 +.names N_68.BLIF cpu_estse_2_un3_n +0 1 +.names cpu_est_3_reg.BLIF N_68.BLIF cpu_estse_2_un1_n +11 1 +.names N_176_i.BLIF cpu_estse_2_un3_n.BLIF cpu_estse_2_un0_n +11 1 +.names state_machine_un10_bg_030_n.BLIF bg_000_0_un3_n +0 1 +.names BG_030_c.BLIF state_machine_un10_bg_030_n.BLIF bg_000_0_un1_n +11 1 +.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +11 1 +.names N_63.BLIF dsack1_int_0_un3_n +0 1 +.names N_96_i.BLIF N_63.BLIF dsack1_int_0_un1_n +11 1 +.names inst_DSACK1_INT.BLIF dsack1_int_0_un3_n.BLIF dsack1_int_0_un0_n +11 1 +.names A0_DMA_1_sqmuxa.BLIF as_000_dma_0_un3_n +0 1 +.names inst_AS_000_DMA.BLIF A0_DMA_1_sqmuxa.BLIF as_000_dma_0_un1_n +11 1 +.names A0_DMA_0_sqmuxa_i_0.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n +11 1 +.names N_223.BLIF as_000_int_0_un3_n +0 1 +.names N_72.BLIF N_223.BLIF as_000_int_0_un1_n +11 1 +.names inst_AS_000_INT.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n +11 1 +.names N_224.BLIF vpa_sync_0_un3_n +0 1 +.names N_95_i.BLIF N_224.BLIF vpa_sync_0_un1_n +11 1 +.names inst_VPA_SYNC.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n +11 1 +.names N_221.BLIF vma_int_0_un3_n +0 1 +.names N_92.BLIF N_221.BLIF vma_int_0_un1_n +11 1 +.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n 11 1 .names state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n 0 1 @@ -954,74 +1072,53 @@ bgack_030_int_0_un1_n .names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \ bgack_030_int_0_un0_n 11 1 -.names N_61.BLIF dsack1_int_0_un3_n +.names A0_DMA_1_sqmuxa.BLIF size_dma_0_0__un3_n 0 1 -.names N_223_i.BLIF N_61.BLIF dsack1_int_0_un1_n +.names SIZE_DMA_0_.BLIF A0_DMA_1_sqmuxa.BLIF size_dma_0_0__un1_n 11 1 -.names inst_DSACK1_INT.BLIF dsack1_int_0_un3_n.BLIF dsack1_int_0_un0_n +.names SIZE_DMA_0_sqmuxa_i.BLIF size_dma_0_0__un3_n.BLIF size_dma_0_0__un0_n 11 1 -.names RW_c.BLIF state_machine_uds_000_int_5_0_m2_un3_n +.names A0_DMA_1_sqmuxa.BLIF size_dma_0_1__un3_n 0 1 -.names SM_AMIGA_5_.BLIF RW_c.BLIF state_machine_uds_000_int_5_0_m2_un1_n +.names SIZE_DMA_1_.BLIF A0_DMA_1_sqmuxa.BLIF size_dma_0_1__un1_n 11 1 -.names SM_AMIGA_4_.BLIF state_machine_uds_000_int_5_0_m2_un3_n.BLIF \ -state_machine_uds_000_int_5_0_m2_un0_n +.names N_31.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un0_n 11 1 -.names cpu_est_1_.BLIF cpu_est_ns_0_0_m2_2__un3_n +.names N_68.BLIF ipl_030_0_0__un3_n 0 1 -.names cpu_est_2_.BLIF cpu_est_1_.BLIF cpu_est_ns_0_0_m2_2__un1_n -11 1 -.names cpu_est_i_0__n.BLIF cpu_est_ns_0_0_m2_2__un3_n.BLIF \ -cpu_est_ns_0_0_m2_2__un0_n -11 1 -.names N_52.BLIF amiga_bus_enable_0_un3_n -0 1 -.names un1_AMIGA_BUS_ENABLE_0_sqmuxa_2.BLIF N_52.BLIF amiga_bus_enable_0_un1_n -11 1 -.names AMIGA_BUS_ENABLEDFFSHreg.BLIF amiga_bus_enable_0_un3_n.BLIF \ -amiga_bus_enable_0_un0_n -11 1 -.names state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un3_n -0 1 -.names N_59_i.BLIF state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un1_n -11 1 -.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n -11 1 -.names N_65.BLIF ipl_030_0_0__un3_n -0 1 -.names IPL_030DFFSH_0_reg.BLIF N_65.BLIF ipl_030_0_0__un1_n +.names IPL_030DFFSH_0_reg.BLIF N_68.BLIF ipl_030_0_0__un1_n 11 1 .names ipl_c_0__n.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n 11 1 -.names N_65.BLIF ipl_030_0_1__un3_n +.names N_68.BLIF ipl_030_0_1__un3_n 0 1 -.names IPL_030DFFSH_1_reg.BLIF N_65.BLIF ipl_030_0_1__un1_n +.names IPL_030DFFSH_1_reg.BLIF N_68.BLIF ipl_030_0_1__un1_n 11 1 .names ipl_c_1__n.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n 11 1 -.names N_65.BLIF ipl_030_0_2__un3_n +.names N_68.BLIF ipl_030_0_2__un3_n 0 1 -.names IPL_030DFFSH_2_reg.BLIF N_65.BLIF ipl_030_0_2__un1_n +.names IPL_030DFFSH_2_reg.BLIF N_68.BLIF ipl_030_0_2__un1_n 11 1 .names ipl_c_2__n.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n 11 1 -.names N_65.BLIF cpu_estse_0_un3_n +.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_1.BLIF amiga_bus_enable_0_un3_n 0 1 -.names cpu_est_1_.BLIF N_65.BLIF cpu_estse_0_un1_n +.names AMIGA_BUS_ENABLEDFFSHreg.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_1.BLIF \ +amiga_bus_enable_0_un1_n 11 1 -.names cpu_est_ns_1__n.BLIF cpu_estse_0_un3_n.BLIF cpu_estse_0_un0_n +.names un1_AMIGA_BUS_ENABLE_2_sqmuxa.BLIF amiga_bus_enable_0_un3_n.BLIF \ +amiga_bus_enable_0_un0_n 11 1 -.names N_65.BLIF cpu_estse_1_un3_n +.names N_37.BLIF uds_000_int_0_un3_n 0 1 -.names cpu_est_2_.BLIF N_65.BLIF cpu_estse_1_un1_n +.names state_machine_uds_000_int_6_n.BLIF N_37.BLIF uds_000_int_0_un1_n 11 1 -.names cpu_est_ns_2__n.BLIF cpu_estse_1_un3_n.BLIF cpu_estse_1_un0_n +.names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n 11 1 -.names N_65.BLIF cpu_estse_2_un3_n +.names N_37.BLIF lds_000_int_0_un3_n 0 1 -.names cpu_est_3_reg.BLIF N_65.BLIF cpu_estse_2_un1_n -11 1 -.names N_161_i.BLIF cpu_estse_2_un3_n.BLIF cpu_estse_2_un0_n +.names state_machine_lds_000_int_6_n.BLIF N_37.BLIF lds_000_int_0_un1_n 11 1 .names IPL_030DFFSH_2_reg.BLIF IPL_030_2_ 1 1 @@ -1062,13 +1159,13 @@ amiga_bus_enable_0_un0_n .names AMIGA_BUS_ENABLEDFFSHreg.BLIF AMIGA_BUS_ENABLE 1 1 0 0 -.names AMIGA_BUS_DATA_DIR_m1_0_x2.BLIF AMIGA_BUS_DATA_DIR +.names AMIGA_BUS_DATA_DIR_c.BLIF AMIGA_BUS_DATA_DIR 1 1 0 0 .names vcc_n_n.BLIF AMIGA_BUS_ENABLE_LOW 1 1 0 0 -.names N_237.BLIF CIIN +.names N_255.BLIF CIIN 1 1 0 0 .names IPL_030DFFSH_1_reg.BLIF IPL_030_1_ @@ -1077,6 +1174,12 @@ amiga_bus_enable_0_un0_n .names IPL_030DFFSH_0_reg.BLIF IPL_030_0_ 1 1 0 0 +.names CLK_OSZI_c.BLIF cpu_est_0_.C +1 1 +0 0 +.names RST_i.BLIF cpu_est_0_.AR +1 1 +0 0 .names CLK_OSZI_c.BLIF cpu_est_1_.C 1 1 0 0 @@ -1095,63 +1198,6 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF cpu_est_3_reg.AR 1 1 0 0 -.names CLK_OSZI_c.BLIF cpu_est_0_.C -1 1 -0 0 -.names RST_i.BLIF cpu_est_0_.AR -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C -1 1 -0 0 -.names RST_i.BLIF SM_AMIGA_4_.AR -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C -1 1 -0 0 -.names RST_i.BLIF SM_AMIGA_3_.AR -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C -1 1 -0 0 -.names RST_i.BLIF SM_AMIGA_2_.AR -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C -1 1 -0 0 -.names RST_i.BLIF SM_AMIGA_1_.AR -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C -1 1 -0 0 -.names RST_i.BLIF SM_AMIGA_0_.AR -1 1 -0 0 -.names CLK_CNT_P_0_.BLIF CLK_CNT_P_1_.D -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_CNT_P_1_.C -1 1 -0 0 -.names RST_i.BLIF CLK_CNT_P_1_.AR -1 1 -0 0 -.names CLK_OSZI_c.BLIF SIZE_DMA_0_.C -1 1 -0 0 -.names RST_i.BLIF SIZE_DMA_0_.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF SIZE_DMA_1_.C -1 1 -0 0 -.names RST_i.BLIF SIZE_DMA_1_.AP -1 1 -0 0 .names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C 1 1 0 0 @@ -1188,18 +1234,42 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF SM_AMIGA_5_.AR 1 1 0 0 +.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C +1 1 +0 0 +.names RST_i.BLIF SM_AMIGA_4_.AR +1 1 +0 0 +.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C +1 1 +0 0 +.names RST_i.BLIF SM_AMIGA_3_.AR +1 1 +0 0 +.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C +1 1 +0 0 +.names RST_i.BLIF SM_AMIGA_2_.AR +1 1 +0 0 +.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C +1 1 +0 0 +.names RST_i.BLIF SM_AMIGA_1_.AR +1 1 +0 0 +.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C +1 1 +0 0 +.names RST_i.BLIF SM_AMIGA_0_.AR +1 1 +0 0 .names CLK_OSZI_c.BLIF inst_VPA_SYNC.C 1 1 0 0 .names RST_i.BLIF inst_VPA_SYNC.AP 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_DSACK1_INT.C -1 1 -0 0 -.names RST_i.BLIF inst_DSACK1_INT.AP -1 1 -0 0 .names CLK_OSZI_c.BLIF inst_VMA_INTreg.C 1 1 0 0 @@ -1212,31 +1282,31 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_BGACK_030_INTreg.AP 1 1 0 0 -.names CLK_OSZI_i.BLIF CLK_CNT_N_0_.C +.names CLK_OUT_PRE_0.BLIF inst_CLK_OUT_PRE.D 1 1 0 0 -.names RST_i.BLIF CLK_CNT_N_0_.AR +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C 1 1 0 0 -.names CLK_CNT_N_0_.BLIF CLK_CNT_N_1_.D +.names RST_i.BLIF inst_CLK_OUT_PRE.AR 1 1 0 0 -.names CLK_OSZI_i.BLIF CLK_CNT_N_1_.C +.names CLK_OSZI_c.BLIF SIZE_DMA_0_.C 1 1 0 0 -.names RST_i.BLIF CLK_CNT_N_1_.AP +.names RST_i.BLIF SIZE_DMA_0_.AP 1 1 0 0 -.names CLK_OSZI_c.BLIF CLK_CNT_P_0_.C +.names CLK_OSZI_c.BLIF SIZE_DMA_1_.C 1 1 0 0 -.names RST_i.BLIF CLK_CNT_P_0_.AR +.names RST_i.BLIF SIZE_DMA_1_.AP 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C +.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C 1 1 0 0 -.names RST_i.BLIF inst_LDS_000_INT.AP +.names RST_i.BLIF inst_FPU_CS_INTreg.AP 1 1 0 0 .names CLK_OSZI_c.BLIF inst_DTACK_SYNC.C @@ -1257,22 +1327,40 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF BG_000DFFSHreg.AP 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_DSACK1_INT.C +1 1 +0 0 +.names RST_i.BLIF inst_DSACK1_INT.AP +1 1 +0 0 .names CLK_OSZI_c.BLIF inst_AS_000_DMA.C 1 1 0 0 .names RST_i.BLIF inst_AS_000_DMA.AP 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_AS_000_INT.C +1 1 +0 0 +.names RST_i.BLIF inst_AS_000_INT.AP +1 1 +0 0 .names CLK_OSZI_c.BLIF AMIGA_BUS_ENABLEDFFSHreg.C 1 1 0 0 .names RST_i.BLIF AMIGA_BUS_ENABLEDFFSHreg.AP 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_AS_000_INT.C +.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C 1 1 0 0 -.names RST_i.BLIF inst_AS_000_INT.AP +.names RST_i.BLIF inst_UDS_000_INT.AP +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C +1 1 +0 0 +.names RST_i.BLIF inst_LDS_000_INT.AP 1 1 0 0 .names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C @@ -1287,33 +1375,6 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_DS_000_DMA.AP 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C -1 1 -0 0 -.names RST_i.BLIF inst_FPU_CS_INTreg.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C -1 1 -0 0 -.names RST_i.BLIF inst_UDS_000_INT.AP -1 1 -0 0 -.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C -1 1 -0 0 -.names RST_i.BLIF CLK_OUT_INTreg.AR -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C -1 1 -0 0 -.names RST_i.BLIF inst_CLK_OUT_PRE.AR -1 1 -0 0 .names inst_CLK_000_D4.BLIF inst_CLK_000_D5.D 1 1 0 0 @@ -1341,6 +1402,12 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_CLK_000_D4.AP 1 1 0 0 +.names CLK_OSZI_c.BLIF CLK_CNT_P_0_.C +1 1 +0 0 +.names RST_i.BLIF CLK_CNT_P_0_.AR +1 1 +0 0 .names inst_CLK_000_D1.BLIF inst_CLK_000_D2.D 1 1 0 0 @@ -1359,6 +1426,15 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_CLK_000_D3.AP 1 1 0 0 +.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C +1 1 +0 0 +.names RST_i.BLIF CLK_OUT_INTreg.AR +1 1 +0 0 .names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.D 1 1 0 0 @@ -1377,6 +1453,15 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_CLK_000_D0.AP 1 1 0 0 +.names VPA.BLIF inst_VPA_D.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_VPA_D.C +1 1 +0 0 +.names RST_i.BLIF inst_VPA_D.AP +1 1 +0 0 .names vcc_n_n.BLIF RESETDFFRHreg.D 1 1 0 0 @@ -1425,7 +1510,13 @@ amiga_bus_enable_0_un0_n .names SIZE_DMA_0_.BLIF SIZE_0_ 1 1 0 0 -.names gnd_n_n.BLIF DSACK_0_ +.names vcc_n_n.BLIF DSACK_0_ +1 1 +0 0 +.names A0.PIN.BLIF A0_c +1 1 +0 0 +.names nEXP_SPACE.BLIF nEXP_SPACE_c 1 1 0 0 .names BG_030.BLIF BG_030_c @@ -1458,9 +1549,6 @@ amiga_bus_enable_0_un0_n .names DTACK.PIN.BLIF DTACK_c 1 1 0 0 -.names VPA.BLIF VPA_c -1 1 -0 0 .names RST.BLIF RST_c 1 1 0 0 @@ -1542,19 +1630,13 @@ amiga_bus_enable_0_un0_n .names A_31_.BLIF a_c_31__n 1 1 0 0 -.names A0.PIN.BLIF A0_c -1 1 -0 0 -.names nEXP_SPACE.BLIF nEXP_SPACE_c -1 1 -0 0 -.names N_217.BLIF AS_030.OE +.names N_155.BLIF AS_030.OE 1 1 0 0 .names inst_BGACK_030_INTreg.BLIF AS_000.OE 1 1 0 0 -.names N_217.BLIF DS_030.OE +.names N_155.BLIF DS_030.OE 1 1 0 0 .names inst_BGACK_030_INTreg.BLIF UDS_000.OE @@ -1563,49 +1645,34 @@ amiga_bus_enable_0_un0_n .names inst_BGACK_030_INTreg.BLIF LDS_000.OE 1 1 0 0 -.names N_217.BLIF SIZE_0_.OE +.names N_155.BLIF SIZE_0_.OE 1 1 0 0 -.names N_217.BLIF SIZE_1_.OE +.names N_155.BLIF SIZE_1_.OE 1 1 0 0 -.names N_217.BLIF A0.OE +.names N_155.BLIF A0.OE 1 1 0 0 .names nEXP_SPACE_c.BLIF DSACK_1_.OE 1 1 0 0 -.names N_217.BLIF DTACK.OE +.names N_155.BLIF DTACK.OE 1 1 0 0 .names FPU_CS_INT_i.BLIF BERR.OE 1 1 0 0 -.names gnd_n_n.BLIF DSACK_0_.OE +.names nEXP_SPACE_c.BLIF DSACK_0_.OE 1 1 0 0 .names FPU_CS_INT_i.BLIF AVEC_EXP.OE 1 1 0 0 -.names N_247.BLIF CIIN.OE +.names N_265.BLIF CIIN.OE 1 1 0 0 -.names CLK_CNT_N_0_.BLIF CLK_CNT_N_1_.BLIF G_103 -01 1 -10 1 -11 0 -00 0 -.names CLK_CNT_P_0_.BLIF CLK_CNT_P_1_.BLIF G_109 -01 1 -10 1 -11 0 -00 0 -.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF cpu_est_ns_0_0_x2_1_ -01 1 -10 1 -11 0 -00 0 -.names inst_BGACK_030_INTreg.BLIF RW_c.BLIF AMIGA_BUS_DATA_DIR_m1_0_x2 +.names inst_CLK_OUT_PRE.BLIF CLK_CNT_P_0_.BLIF CLK_OUT_PRE_0 01 1 10 1 11 0 diff --git a/Logic/BUS68030.cmd b/Logic/BUS68030.cmd deleted file mode 100644 index e7c37a0..0000000 --- a/Logic/BUS68030.cmd +++ /dev/null @@ -1,8 +0,0 @@ -STYFILENAME: 68030_tk.sty -PROJECT: BUS68030 -WORKING_PATH: "c:/users/matze/documents/github/68030tk/logic" -MODULE: BUS68030 -VHDL_FILE_LIST: 68030-68000-bus.vhd -OUTPUT_FILE_NAME: BUS68030 -SUFFIX_NAME: edi -PART: M4A5-128/64-10VC diff --git a/Logic/BUS68030.edi b/Logic/BUS68030.edi index 70cf8f7..ef7a8ef 100644 --- a/Logic/BUS68030.edi +++ b/Logic/BUS68030.edi @@ -4,7 +4,7 @@ (keywordMap (keywordLevel 0)) (status (written - (timeStamp 2014 5 24 21 59 9) + (timeStamp 2014 5 25 20 57 47) (author "Synopsys, Inc.") (program "Synplify Pro" (version "G-2012.09LC-SP1 , mapper maplat, Build 621R")) ) @@ -148,30 +148,14 @@ (port CIIN (direction OUTPUT)) ) (contents + (instance (rename cpu_est_0 "cpu_est[0]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) (instance (rename cpu_est_1 "cpu_est[1]") (viewRef prim (cellRef DFFRH (libraryRef mach))) ) (instance (rename cpu_est_2 "cpu_est[2]") (viewRef prim (cellRef DFFRH (libraryRef mach))) ) (instance (rename cpu_est_3 "cpu_est[3]") (viewRef prim (cellRef DFFRH (libraryRef mach))) ) - (instance (rename cpu_est_0 "cpu_est[0]") (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance (rename SM_AMIGA_4 "SM_AMIGA[4]") (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance (rename SM_AMIGA_3 "SM_AMIGA[3]") (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance (rename SM_AMIGA_2 "SM_AMIGA[2]") (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance (rename SM_AMIGA_1 "SM_AMIGA[1]") (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance (rename SM_AMIGA_0 "SM_AMIGA[0]") (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance (rename CLK_CNT_P_1 "CLK_CNT_P[1]") (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance (rename SIZE_DMA_0 "SIZE_DMA[0]") (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance (rename SIZE_DMA_1 "SIZE_DMA[1]") (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) (instance (rename IPL_030DFFSH_0 "IPL_030DFFSH[0]") (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance (rename IPL_030DFFSH_1 "IPL_030DFFSH[1]") (viewRef prim (cellRef DFFSH (libraryRef mach))) @@ -184,21 +168,29 @@ ) (instance (rename SM_AMIGA_5 "SM_AMIGA[5]") (viewRef prim (cellRef DFFRH (libraryRef mach))) ) - (instance VPA_SYNC (viewRef prim (cellRef DFFSH (libraryRef mach))) + (instance (rename SM_AMIGA_4 "SM_AMIGA[4]") (viewRef prim (cellRef DFFRH (libraryRef mach))) ) - (instance DSACK1_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + (instance (rename SM_AMIGA_3 "SM_AMIGA[3]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename SM_AMIGA_2 "SM_AMIGA[2]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename SM_AMIGA_1 "SM_AMIGA[1]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename SM_AMIGA_0 "SM_AMIGA[0]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance VPA_SYNC (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance VMA_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance BGACK_030_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) ) - (instance (rename CLK_CNT_N_0 "CLK_CNT_N[0]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + (instance CLK_OUT_PRE (viewRef prim (cellRef DFFRH (libraryRef mach))) ) - (instance (rename CLK_CNT_N_1 "CLK_CNT_N[1]") (viewRef prim (cellRef DFFSH (libraryRef mach))) + (instance (rename SIZE_DMA_0 "SIZE_DMA[0]") (viewRef prim (cellRef DFFSH (libraryRef mach))) ) - (instance (rename CLK_CNT_P_0 "CLK_CNT_P[0]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + (instance (rename SIZE_DMA_1 "SIZE_DMA[1]") (viewRef prim (cellRef DFFSH (libraryRef mach))) ) - (instance LDS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + (instance FPU_CS_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance DTACK_SYNC (viewRef prim (cellRef DFFSH (libraryRef mach))) ) @@ -206,38 +198,42 @@ ) (instance BG_000DFFSH (viewRef prim (cellRef DFFSH (libraryRef mach))) ) + (instance DSACK1_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) (instance AS_000_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) ) + (instance AS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) (instance AMIGA_BUS_ENABLEDFFSH (viewRef prim (cellRef DFFSH (libraryRef mach))) ) - (instance AS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + (instance UDS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance LDS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance AS_030_000_SYNC (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance DS_000_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) ) - (instance FPU_CS_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance UDS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance CLK_OUT_INT (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance CLK_OUT_PRE (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) (instance CLK_000_D5 (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance CLK_000_D6 (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance CLK_000_D4 (viewRef prim (cellRef DFFSH (libraryRef mach))) ) + (instance (rename CLK_CNT_P_0 "CLK_CNT_P[0]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) (instance CLK_000_D2 (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance CLK_000_D3 (viewRef prim (cellRef DFFSH (libraryRef mach))) ) + (instance CLK_OUT_INT (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) (instance BGACK_030_INT_D (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance CLK_000_D0 (viewRef prim (cellRef DFFSH (libraryRef mach))) ) + (instance VPA_D (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) (instance RESETDFFRH (viewRef prim (cellRef DFFRH (libraryRef mach))) ) (instance CLK_000_D1 (viewRef prim (cellRef DFFSH (libraryRef mach))) @@ -301,45 +297,57 @@ (instance AMIGA_BUS_DATA_DIR (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance AMIGA_BUS_ENABLE_LOW (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance CIIN (viewRef prim (cellRef BUFTH (libraryRef mach))) ) - (instance (rename state_machine_un15_clk_000_d0_0_a2_0_1 "state_machine.un15_clk_000_d0_0_a2_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un15_clk_000_d0_0_a2_0 "state_machine.un15_clk_000_d0_0_a2_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un15_clk_000_d0_0_a2_1 "state_machine.un15_clk_000_d0_0_a2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un15_clk_000_d0_0_a2 "state_machine.un15_clk_000_d0_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SIZE_DMA_0_sqmuxa_0_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SIZE_DMA_1_sqmuxa_0_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SIZE_DMA_1_sqmuxa_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un8_clk_000_d2_1 "state_machine.un8_clk_000_d2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un8_clk_000_d2 "state_machine.un8_clk_000_d2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_0_1_0 "SM_AMIGA_ns_0_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_0_0 "SM_AMIGA_ns_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_1_1 "cpu_est_ns_0_0_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SIZE_DMA_0_sqmuxa_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SIZE_DMA_0_sqmuxa_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance N_110_i_i_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance N_110_i_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VMA_INT_1_sqmuxa_i_a3_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VMA_INT_1_sqmuxa_i_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_7_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_0_0_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_0_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_1_2 "cpu_est_ns_0_0_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_2 "cpu_est_ns_0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un3_dtack_i_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un3_dtack_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_7_0_a3_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_7_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_0_0_0_a3_1_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_0_0_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_0_a3_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_LDS_000_INT_6_0_a3_1 "state_machine.LDS_000_INT_6_0_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_LDS_000_INT_6_0_a3 "state_machine.LDS_000_INT_6_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_est_ns_0_0_1 "cpu_est_ns_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_0_a2_0_1_5 "SM_AMIGA_ns_0_a2_0_1[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_0_a2_0_5 "SM_AMIGA_ns_0_a2_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_LDS_000_INT_5_0_a2_1 "state_machine.LDS_000_INT_5_0_a2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_LDS_000_INT_5_0_a2 "state_machine.LDS_000_INT_5_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_A0_DMA_4_0_a2_1_0 "state_machine.A0_DMA_4_0_a2_1_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_A0_DMA_4_0_a2 "state_machine.A0_DMA_4_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_0_sqmuxa_3_i_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_0_sqmuxa_3_i_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_0_sqmuxa_3_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_1_i_a2_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_1_i_a2_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_1_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un10_bg_030_0_a2_1 "state_machine.un10_bg_030_0_a2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un10_bg_030_0_a2_2 "state_machine.un10_bg_030_0_a2_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un10_bg_030_0_a2 "state_machine.un10_bg_030_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DTACK_SYNC_1_sqmuxa_1_i_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DTACK_SYNC_1_sqmuxa_1_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_i_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_i_a2_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SIZE_DMA_0_sqmuxa_0_a2_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_i_o2_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_i_o2_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_i_o2_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_i_o2_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_A0_DMA_4_0_a3_1 "state_machine.A0_DMA_4_0_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_A0_DMA_4_0_a3_2 "state_machine.A0_DMA_4_0_a3_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_A0_DMA_4_0_a3 "state_machine.A0_DMA_4_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_1_i_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_1_i_a3_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_1_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DTACK_SYNC_1_sqmuxa_1_i_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DTACK_SYNC_1_sqmuxa_1_i_a3_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DTACK_SYNC_1_sqmuxa_1_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_SYNC_1_sqmuxa_1_i_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_SYNC_1_sqmuxa_1_i_a3_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_SYNC_1_sqmuxa_1_i_a3_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_SYNC_1_sqmuxa_1_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_7_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_1_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SIZE_DMA_1_sqmuxa_i_o3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SIZE_DMA_1_sqmuxa_i_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_LDS_000_INT_6_0_o3_1 "state_machine.LDS_000_INT_6_0_o3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_LDS_000_INT_6_0_o3 "state_machine.LDS_000_INT_6_0_o3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_0_sqmuxa_2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_0_sqmuxa_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_7_o2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_7_o2_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_7_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un8_bg_030_1 "state_machine.un8_bg_030_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un8_bg_030_2 "state_machine.un8_bg_030_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un8_bg_030 "state_machine.un8_bg_030") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_1_1 "cpu_est_ns_0_0_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_2_1 "cpu_est_ns_0_0_2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un4_ciin_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un4_ciin_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un4_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) @@ -350,289 +358,220 @@ (instance un8_ciin_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un8_ciin_6 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un8_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_145_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_i_2 "cpu_est_ns_0_0_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_143_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_154_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_153_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_155_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_i_1 "cpu_est_ns_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_135_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_136_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_225_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_219_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_221_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un15_clk_000_d0_0_i "state_machine.un15_clk_000_d0_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_i_o2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_156_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_0_o2_i_1 "SM_AMIGA_ns_i_0_o2_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_176_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_0_sqmuxa_3_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_173_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_226_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_0_o2_i_4 "SM_AMIGA_ns_i_0_o2_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_ns_i_0_o2_i_3 "cpu_est_ns_i_0_o2_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_1_i_o2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_1_i_o2_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_1_i_o2_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_1_i_o2_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_1_i_o2_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance N_107_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_1_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_106_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_as_030_000_sync8_1_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_164_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SIZE_DMA_1_sqmuxa_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DTACK_SYNC_1_sqmuxa_1_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VPA_SYNC_1_sqmuxa_1_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_000_INT_1_sqmuxa_1_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_92_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_93_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VMA_INT_1_sqmuxa_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un6_bgack_000_0_i "state_machine.un6_bgack_000_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_000_D2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un57_bgack_030_int_i "state_machine.un57_bgack_030_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_238_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_163_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_236_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_234_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_235_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SM_AMIGAse_4_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_167_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_233_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_231_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_232_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SM_AMIGAse_6_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_UDS_000_INT_6_0_i "state_machine.UDS_000_INT_6_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_125_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_LDS_000_INT_6_0_i "state_machine.LDS_000_INT_6_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance LDS_000_INT_1_sqmuxa_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_151_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SM_AMIGAse_0_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_146_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_147_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_148_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance cpu_estse_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_146_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_0_i_0 "SM_AMIGA_ns_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_88_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_000_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_92_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DSACK1_INT_1_sqmuxa_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_i_2 "cpu_est_ns_0_0_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_145_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_DS_000_DMA_5_iv_0_i "state_machine.DS_000_DMA_5_iv_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_143_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_144_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_142_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_246_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_160_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_240_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_1_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance CLK_000_D1_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename clk_un3_clk_000_d1_0_o2_i "clk.un3_clk_000_d1_0_o2_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_0_sqmuxa_3_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_175_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename un1_as_000_dma5_0_o2_i_0 "un1_as_000_dma5_0_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un6_clk_000_d5_i "state_machine.un6_clk_000_d5_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_i_o2_i_6 "SM_AMIGA_ns_i_i_o2_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DS_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_UDS_000_INT_5_0_o2_i "state_machine.UDS_000_INT_5_0_o2_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_132_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_131_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_133_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_134_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_137_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_138_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_0_i_5 "SM_AMIGA_ns_0_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_139_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_140_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_i_i_6 "SM_AMIGA_ns_i_i_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_142_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_141_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_0_i_7 "SM_AMIGA_ns_0_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_144_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_DS_000_DMA_5_iv_0_i "state_machine.DS_000_DMA_5_iv_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un23_clk_000_d0_i "state_machine.un23_clk_000_d0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un6_bgack_000_0_i "state_machine.un6_bgack_000_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_1_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_161_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DSACK1_INT_1_sqmuxa_1_i_o3_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SM_AMIGAse_4_0_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_156_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_157_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance cpu_estse_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_152_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_153_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_154_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SM_AMIGAse_7_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_149_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_150_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance BG_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_227_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un10_bg_030_0_i "state_machine.un10_bg_030_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_AS_030_2_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DTACK_SYNC_1_sqmuxa_1_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_126_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_as_030_000_sync8_1_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_127_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_UDS_000_INT_5_0_i "state_machine.UDS_000_INT_5_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_130_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_LDS_000_INT_5_0_i "state_machine.LDS_000_INT_5_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un23_clk_000_d0 "state_machine.un23_clk_000_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename VPA_SYNC_0_r "VPA_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename VPA_SYNC_0_m "VPA_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename VPA_SYNC_0_n "VPA_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename VPA_SYNC_0_p "VPA_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_INT_0_r "AS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_INT_0_m "AS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_INT_0_n "AS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_INT_0_p "AS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_r "AS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_m "AS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_n "AS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_p "AS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename BG_000_0_r "BG_000_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename BG_000_0_m "BG_000_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BG_000_0_n "BG_000_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BG_000_0_p "BG_000_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename A0_DMA_0_r "A0_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A0_DMA_0_m "A0_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename A0_DMA_0_n "A0_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename A0_DMA_0_p "A0_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance N_228_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DTACK_SYNC_0_r "DTACK_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DTACK_SYNC_0_m "DTACK_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DTACK_SYNC_0_n "DTACK_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DTACK_SYNC_0_p "DTACK_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename LDS_000_INT_0_r "LDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename LDS_000_INT_0_m "LDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename LDS_000_INT_0_n "LDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename LDS_000_INT_0_p "LDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename UDS_000_INT_0_r "UDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename UDS_000_INT_0_m "UDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename UDS_000_INT_0_n "UDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename UDS_000_INT_0_p "UDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename FPU_CS_INT_0_r "FPU_CS_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename FPU_CS_INT_0_m "FPU_CS_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename FPU_CS_INT_0_n "FPU_CS_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename FPU_CS_INT_0_p "FPU_CS_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_r "DS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_m "DS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_n "DS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_p "DS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_r "AS_030_000_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_m "AS_030_000_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_n "AS_030_000_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_p "AS_030_000_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance CLK_000_D6_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un6_clk_000_d5 "state_machine.un6_clk_000_d5") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance nEXP_SPACE_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_dtack_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_000_D2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un8_bg_030_i "state_machine.un8_bg_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un10_bg_030_i "state_machine.un10_bg_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_LDS_000_INT_6_0_o3_i "state_machine.LDS_000_INT_6_0_o3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DS_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SM_AMIGAse_3_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SM_AMIGAse_5_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SIZE_DMA_1_sqmuxa_i_o3_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SM_AMIGAse_6_0_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_ns_i_0_o2_i_3 "cpu_est_ns_i_0_o2_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SM_AMIGAse_1_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_162_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_AS_030_000_SYNC_1_sqmuxa_1_0_o3_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_000_INT_1_sqmuxa_1_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_165_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_166_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_242_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_243_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_0_sqmuxa_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_94_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_0_sqmuxa_1_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SM_AMIGAse_7_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance AS_030_000_SYNC_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_19 "A_i[19]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_18 "A_i[18]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_16 "A_i[16]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SIZE_DMA_1_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_1__r "SIZE_DMA_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_1__m "SIZE_DMA_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_1__n "SIZE_DMA_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_1__p "SIZE_DMA_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance SIZE_DMA_0_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_0__r "SIZE_DMA_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_0__m "SIZE_DMA_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_0__n "SIZE_DMA_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_0__p "SIZE_DMA_0_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename BGACK_030_INT_0_r "BGACK_030_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename BGACK_030_INT_0_m "BGACK_030_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BGACK_030_INT_0_n "BGACK_030_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BGACK_030_INT_0_p "BGACK_030_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance N_223_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DSACK1_INT_0_r "DSACK1_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DSACK1_INT_0_m "DSACK1_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DSACK1_INT_0_n "DSACK1_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DSACK1_INT_0_p "DSACK1_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance N_224_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_0_a2_3 "SM_AMIGA_ns_i_0_a2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_0_a2_2 "SM_AMIGA_ns_i_0_a2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un8_clk_000_d2_i "state_machine.un8_clk_000_d2_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_0_a2_0_1 "SM_AMIGA_ns_i_0_a2_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_0_a2_1 "SM_AMIGA_ns_i_0_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_as_030_000_sync8_1_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SIZE_DMA_0_sqmuxa_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance BGACK_030_INT_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_DSACK1_INT_0_sqmuxa_i_o2_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance I_154 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_000_INT_1_sqmuxa_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_1_sqmuxa_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_1_sqmuxa_2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_0_sqmuxa_2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_2_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_AMIGA_BUS_ENABLE_2_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_i_1 "cpu_est_ns_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_2_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un10_bg_030 "state_machine.un10_bg_030") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_AMIGA_BUS_ENABLE_2_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_1_sqmuxa_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_AMIGA_BUS_ENABLE_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance BGACK_030_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SIZE_DMA_0_sqmuxa_0_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename un1_as_000_dma5_0_a2_0_0 "un1_as_000_dma5_0_a2_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_0_sqmuxa_3_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_A0_DMA_4_0_a2_1 "state_machine.A0_DMA_4_0_a2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_0_a2_0_0 "SM_AMIGA_ns_0_a2_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_0_a2_0 "SM_AMIGA_ns_0_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RW_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_DS_000_DMA_5_iv_0_a2 "state_machine.DS_000_DMA_5_iv_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_0_a2_0_7 "SM_AMIGA_ns_0_a2_0[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_0_a2_7 "SM_AMIGA_ns_0_a2[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_i_a2_0_6 "SM_AMIGA_ns_i_i_a2_0[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_i_a2_6 "SM_AMIGA_ns_i_i_a2[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_000_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_0_a2_5 "SM_AMIGA_ns_0_a2[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_0_5 "SM_AMIGA_ns_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_0_3 "SM_AMIGA_ns_i_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_0_2 "SM_AMIGA_ns_i_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_0_1 "SM_AMIGA_ns_i_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_LDS_000_INT_5_0 "state_machine.LDS_000_INT_5_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_UDS_000_INT_5_0 "state_machine.UDS_000_INT_5_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_as_030_000_sync8_1_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DTACK_SYNC_1_sqmuxa_1_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_AS_030_2_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un10_bg_030_0 "state_machine.un10_bg_030_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_1_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un6_bgack_000_0 "state_machine.un6_bgack_000_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance I_155 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_156 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AMIGA_BUS_DATA_DIR_m1_0_x2 "AMIGA_BUS_DATA_DIR.m1_0_x2") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_0_o2_1 "SM_AMIGA_ns_i_0_o2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_UDS_000_INT_5_0_o2 "state_machine.UDS_000_INT_5_0_o2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_i_o2_6 "SM_AMIGA_ns_i_i_o2[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename un1_as_000_dma5_0_o2_0 "un1_as_000_dma5_0_o2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_0_sqmuxa_3_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance I_163 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_0_sqmuxa_1_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_0_sqmuxa_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance nEXP_SPACE_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_162 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_161 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_160 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VPA_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VMA_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename clk_un3_clk_000_d1_0_o2 "clk.un3_clk_000_d1_0_o2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_1_sqmuxa_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_92_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_UDS_000_INT_5_0_m2_r "state_machine.UDS_000_INT_5_0_m2.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_UDS_000_INT_5_0_m2_m "state_machine.UDS_000_INT_5_0_m2.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_UDS_000_INT_5_0_m2_n "state_machine.UDS_000_INT_5_0_m2.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_UDS_000_INT_5_0_m2_p "state_machine.UDS_000_INT_5_0_m2.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename state_machine_DS_000_DMA_5_iv_0 "state_machine.DS_000_DMA_5_iv_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_0_7 "SM_AMIGA_ns_0[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_i_6 "SM_AMIGA_ns_i_i[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_0_4 "SM_AMIGA_ns_i_0[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_ns_i_0_3 "cpu_est_ns_i_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_2 "cpu_est_ns_0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance cpu_estse_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SIZE_DMA_1_sqmuxa_i_o2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_000_INT_1_sqmuxa_1_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_AS_030_000_SYNC_1_sqmuxa_1_0_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_1_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_est_i_3 "cpu_est_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename cpu_est_ns_i_0_o2_3 "cpu_est_ns_i_0_o2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_0_o2_4 "SM_AMIGA_ns_i_0_o2[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_x2_1 "cpu_est_ns_0_0_x2[1]") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance (rename cpu_est_i_0 "cpu_est_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_m2_2__r "cpu_est_ns_0_0_m2_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_m2_2__m "cpu_est_ns_0_0_m2_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_m2_2__n "cpu_est_ns_0_0_m2_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_m2_2__p "cpu_est_ns_0_0_m2_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance VMA_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VPA_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_1_i_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance I_157 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance I_158 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_159 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_0_a2_4 "SM_AMIGA_ns_i_0_a2[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_0_a2_0_4 "SM_AMIGA_ns_i_0_a2_0[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_ns_i_0_a2_3 "cpu_est_ns_i_0_a2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_a2_2 "cpu_est_ns_0_0_a2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance cpu_estse_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance cpu_estse_0_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_6_0_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_5_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SM_AMIGAse_3_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance A0_DMA_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance BGACK_030_INT_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_UDS_000_INT_6_0 "state_machine.UDS_000_INT_6_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_6_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_5_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_4_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_3_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_2_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_1_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_i_0_3 "cpu_est_ns_i_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_DS_000_DMA_5_iv_0 "state_machine.DS_000_DMA_5_iv_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance cpu_estse_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_4_0_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_LDS_000_INT_6_0_m2_r "state_machine.LDS_000_INT_6_0_m2.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_LDS_000_INT_6_0_m2_m "state_machine.LDS_000_INT_6_0_m2.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_LDS_000_INT_6_0_m2_n "state_machine.LDS_000_INT_6_0_m2.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_LDS_000_INT_6_0_m2_p "state_machine.LDS_000_INT_6_0_m2.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance DSACK1_INT_1_sqmuxa_1_i_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance CLK_000_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename cpu_est_ns_0_0_a2_1 "cpu_est_ns_0_0_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_ns_i_0_a2_0_3 "cpu_est_ns_i_0_a2_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_i_1 "cpu_est_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_i_0 "cpu_est_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename cpu_est_ns_0_0_a2_0_1 "cpu_est_ns_0_0_a2_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un15_clk_000_d0_0 "state_machine.un15_clk_000_d0_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un81_bgack_030_int_i "state_machine.un81_bgack_030_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SM_AMIGAse_5_i_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un6_bgack_000_0 "state_machine.un6_bgack_000_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VMA_INT_1_sqmuxa_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_INT_1_sqmuxa_1_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_SYNC_1_sqmuxa_1_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DTACK_SYNC_1_sqmuxa_1_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SIZE_DMA_1_sqmuxa_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_as_030_000_sync8_1_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_1_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance LDS_000_INT_1_sqmuxa_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_LDS_000_INT_6_0 "state_machine.LDS_000_INT_6_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_a3_1_2 "cpu_est_ns_0_0_a3_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_0_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_0_0_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_7_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_7_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_DMA_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance cpu_estse_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance cpu_estse_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_1_i_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SIZE_DMA_1_sqmuxa_i_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_AS_030_000_SYNC_1_sqmuxa_1_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_3_i_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance I_164 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SIZE_DMA_1_sqmuxa_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_i_1 "cpu_est_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SM_AMIGAse_4_0_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SM_AMIGAse_3_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_2_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_1_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_a3_1 "cpu_est_ns_0_0_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_i_2 "cpu_est_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_a3_0_1 "cpu_est_ns_0_0_a3_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_i_0_a3_3 "cpu_est_ns_i_0_a3[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_i_0_a3_0_3 "cpu_est_ns_i_0_a3_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RW_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_DS_000_DMA_5_iv_0_a3 "state_machine.DS_000_DMA_5_iv_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_a3_2 "cpu_est_ns_0_0_a3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_a3_0_2 "cpu_est_ns_0_0_a3_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename A_i_29 "A_i[29]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_30 "A_i[30]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_31 "A_i[31]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_OUT_PRE_0 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance VMA_INT_1_sqmuxa_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_0_sqmuxa_1_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_as_030_000_sync8_1_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance I_165 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_166 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SM_AMIGAse_6_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_6_0_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance SM_AMIGAse_5_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SM_AMIGAse_4_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance RST_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_16 "A_i[16]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_18 "A_i[18]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_19 "A_i[19]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_i_24 "A_i[24]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_i_25 "A_i[25]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_i_26 "A_i[26]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_i_27 "A_i[27]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_i_28 "A_i[28]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_29 "A_i[29]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_30 "A_i[30]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_31 "A_i[31]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance G_103 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance G_109 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance (rename un4_clk_cnt_n_i_1 "un4_clk_cnt_n_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_OSZI_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename un2_clk_cnt_p_i_1 "un2_clk_cnt_p_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance FPU_CS_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename clk_un12_clk_cnt_p "clk.un12_clk_cnt_p") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_0_r "AMIGA_BUS_ENABLE_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_0_m "AMIGA_BUS_ENABLE_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_0_n "AMIGA_BUS_ENABLE_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_0_p "AMIGA_BUS_ENABLE_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename VMA_INT_0_r "VMA_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename VMA_INT_0_m "VMA_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename VMA_INT_0_n "VMA_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename VMA_INT_0_p "VMA_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename IPL_030_0_0__r "IPL_030_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_030_0_0__m "IPL_030_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_0__n "IPL_030_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_0__p "IPL_030_0_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename IPL_030_0_1__r "IPL_030_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_030_0_1__m "IPL_030_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_1__n "IPL_030_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_1__p "IPL_030_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename IPL_030_0_2__r "IPL_030_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_030_0_2__m "IPL_030_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_2__n "IPL_030_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_2__p "IPL_030_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename CLK_CNT_P_i_0 "CLK_CNT_P_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename cpu_estse_0_r "cpu_estse_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename cpu_estse_0_m "cpu_estse_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_estse_0_n "cpu_estse_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) @@ -645,13 +584,110 @@ (instance (rename cpu_estse_2_m "cpu_estse_2.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_estse_2_n "cpu_estse_2.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_estse_2_p "cpu_estse_2.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename BG_000_0_r "BG_000_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename BG_000_0_m "BG_000_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BG_000_0_n "BG_000_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BG_000_0_p "BG_000_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance N_96_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DSACK1_INT_0_r "DSACK1_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DSACK1_INT_0_m "DSACK1_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DSACK1_INT_0_n "DSACK1_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DSACK1_INT_0_p "DSACK1_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_r "AS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_m "AS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_n "AS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_p "AS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename AS_000_INT_0_r "AS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_000_INT_0_m "AS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_INT_0_n "AS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_INT_0_p "AS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance N_95_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename VPA_SYNC_0_r "VPA_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename VPA_SYNC_0_m "VPA_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename VPA_SYNC_0_n "VPA_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename VPA_SYNC_0_p "VPA_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename VMA_INT_0_r "VMA_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename VMA_INT_0_m "VMA_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename VMA_INT_0_n "VMA_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename VMA_INT_0_p "VMA_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename BGACK_030_INT_0_r "BGACK_030_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename BGACK_030_INT_0_m "BGACK_030_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BGACK_030_INT_0_n "BGACK_030_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BGACK_030_INT_0_p "BGACK_030_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance SIZE_DMA_0_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SIZE_DMA_0_0__r "SIZE_DMA_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SIZE_DMA_0_0__m "SIZE_DMA_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SIZE_DMA_0_0__n "SIZE_DMA_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SIZE_DMA_0_0__p "SIZE_DMA_0_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename SIZE_DMA_0_1__r "SIZE_DMA_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SIZE_DMA_0_1__m "SIZE_DMA_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SIZE_DMA_0_1__n "SIZE_DMA_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SIZE_DMA_0_1__p "SIZE_DMA_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename IPL_030_0_0__r "IPL_030_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_030_0_0__m "IPL_030_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_0__n "IPL_030_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_0__p "IPL_030_0_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename IPL_030_0_1__r "IPL_030_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_030_0_1__m "IPL_030_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_1__n "IPL_030_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_1__p "IPL_030_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename IPL_030_0_2__r "IPL_030_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_030_0_2__m "IPL_030_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_2__n "IPL_030_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_2__p "IPL_030_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename state_machine_un57_bgack_030_int "state_machine.un57_bgack_030_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance CLK_000_D6_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un81_bgack_030_int "state_machine.un81_bgack_030_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance FPU_CS_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_0_r "AMIGA_BUS_ENABLE_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_0_m "AMIGA_BUS_ENABLE_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_0_n "AMIGA_BUS_ENABLE_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_0_p "AMIGA_BUS_ENABLE_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename UDS_000_INT_0_r "UDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename UDS_000_INT_0_m "UDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename UDS_000_INT_0_n "UDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename UDS_000_INT_0_p "UDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename LDS_000_INT_0_r "LDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename LDS_000_INT_0_m "LDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename LDS_000_INT_0_n "LDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename LDS_000_INT_0_p "LDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_r "AS_030_000_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_m "AS_030_000_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_n "AS_030_000_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_p "AS_030_000_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_r "DS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_m "DS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_n "DS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_p "DS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename FPU_CS_INT_0_r "FPU_CS_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename FPU_CS_INT_0_m "FPU_CS_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename FPU_CS_INT_0_n "FPU_CS_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename FPU_CS_INT_0_p "FPU_CS_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance N_97_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DTACK_SYNC_0_r "DTACK_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DTACK_SYNC_0_m "DTACK_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DTACK_SYNC_0_n "DTACK_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DTACK_SYNC_0_p "DTACK_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename A0_DMA_0_r "A0_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A0_DMA_0_m "A0_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename A0_DMA_0_n "A0_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename A0_DMA_0_p "A0_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (net BGACK_030_INT (joined (portRef Q (instanceRef BGACK_030_INT)) - (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_m1_0_x2)) - (portRef I0 (instanceRef state_machine_A0_DMA_4_0_a2_1)) - (portRef I0 (instanceRef BGACK_030_INT_i)) - (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0_a2_0)) (portRef I0 (instanceRef BGACK_030_INT_0_n)) + (portRef I0 (instanceRef VMA_INT_1_sqmuxa_i_a3)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_0_a3)) + (portRef I0 (instanceRef SM_AMIGAse_1_i_0_a2)) + (portRef I0 (instanceRef SM_AMIGAse_4_0_0_o2)) + (portRef I0 (instanceRef A0_DMA_1_sqmuxa)) + (portRef I0 (instanceRef SM_AMIGAse_1_i_0_o2)) + (portRef I0 (instanceRef AS_000_INT_1_sqmuxa_1_i_o2)) + (portRef I0 (instanceRef BGACK_030_INT_i)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_2_sqmuxa)) + (portRef I1 (instanceRef SM_AMIGAse_7_o2_1)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_2_1)) + (portRef I1 (instanceRef state_machine_LDS_000_INT_6_0_o3_1)) + (portRef I0 (instanceRef N_110_i_i_a3_1)) (portRef OE (instanceRef AS_000)) (portRef I0 (instanceRef BGACK_030)) (portRef D (instanceRef BGACK_030_INT_D)) @@ -660,8 +696,8 @@ )) (net FPU_CS_INT (joined (portRef Q (instanceRef FPU_CS_INT)) - (portRef I0 (instanceRef FPU_CS_INT_i)) (portRef I0 (instanceRef FPU_CS_INT_0_n)) + (portRef I0 (instanceRef FPU_CS_INT_i)) (portRef I0 (instanceRef FPU_CS)) )) (net VMA_INT (joined @@ -672,33 +708,29 @@ )) (net AS_030_000_SYNC (joined (portRef Q (instanceRef AS_030_000_SYNC)) - (portRef I0 (instanceRef AS_030_000_SYNC_i)) (portRef I0 (instanceRef AS_030_000_SYNC_0_n)) - )) - (net BGACK_030_INT_D (joined - (portRef Q (instanceRef BGACK_030_INT_D)) - (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0_o2)) - (portRef I1 (instanceRef state_machine_A0_DMA_4_0_a2_1)) - (portRef I0 (instanceRef BGACK_030_INT_D_i)) + (portRef I0 (instanceRef AS_030_000_SYNC_i)) )) (net DTACK_SYNC (joined (portRef Q (instanceRef DTACK_SYNC)) (portRef I0 (instanceRef DTACK_SYNC_0_n)) - (portRef I0 (instanceRef state_machine_un23_clk_000_d0)) + (portRef I0 (instanceRef state_machine_un57_bgack_030_int)) )) (net VPA_SYNC (joined (portRef Q (instanceRef VPA_SYNC)) + (portRef I1 (instanceRef state_machine_un57_bgack_030_int)) (portRef I0 (instanceRef VPA_SYNC_0_n)) - (portRef I1 (instanceRef state_machine_un23_clk_000_d0)) + )) + (net VPA_D (joined + (portRef Q (instanceRef VPA_D)) + (portRef I0 (instanceRef VPA_D_i)) + (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa_1_i_a3_2)) )) (net CLK_000_D0 (joined (portRef Q (instanceRef CLK_000_D0)) - (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_1_i_a2_1)) - (portRef I1 (instanceRef N_92_i_0_o2)) - (portRef I0 (instanceRef clk_un3_clk_000_d1_0_o2)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_0_2)) (portRef I0 (instanceRef CLK_000_D0_i)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_i_a2_0_6)) + (portRef I1 (instanceRef SM_AMIGAse_4_0_0_o2)) + (portRef I0 (instanceRef clk_un3_clk_000_d1_0_o2)) (portRef D (instanceRef CLK_000_D1)) )) (net CLK_000_D1 (joined @@ -715,33 +747,91 @@ (portRef Q (instanceRef CLK_000_D6)) (portRef I0 (instanceRef CLK_000_D6_i)) )) - (net (rename SM_AMIGA_5 "SM_AMIGA[5]") (joined - (portRef Q (instanceRef SM_AMIGA_5)) - (portRef I0 (instanceRef state_machine_UDS_000_INT_5_0_m2_m)) - (portRef I0 (instanceRef SM_AMIGA_i_5)) + (net CLK_OUT_PRE (joined + (portRef Q (instanceRef CLK_OUT_PRE)) + (portRef I1 (instanceRef CLK_OUT_PRE_0)) + (portRef D (instanceRef CLK_OUT_INT)) + )) + (net BGACK_030_INT_D (joined + (portRef Q (instanceRef BGACK_030_INT_D)) + (portRef I0 (instanceRef BGACK_030_INT_D_i)) + (portRef I1 (instanceRef A0_DMA_1_sqmuxa)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_1_sqmuxa_2)) )) (net VCC (joined (portRef I0 (instanceRef AMIGA_BUS_ENABLE_LOW)) (portRef I0 (instanceRef AVEC)) + (portRef I0 (instanceRef DSACK_0)) (portRef D (instanceRef RESETDFFRH)) )) (net GND (joined (portRef I0 (instanceRef AVEC_EXP)) (portRef I0 (instanceRef BERR)) - (portRef I0 (instanceRef DSACK_0)) - (portRef OE (instanceRef DSACK_0)) )) - (net AS_000_INT (joined - (portRef Q (instanceRef AS_000_INT)) - (portRef I0 (instanceRef N_92_i_0_o2)) - (portRef I0 (instanceRef AS_000_INT_0_m)) - (portRef I0 (instanceRef AS_000)) + (net (rename CLK_CNT_P_0 "CLK_CNT_P[0]") (joined + (portRef Q (instanceRef CLK_CNT_P_0)) + (portRef I0 (instanceRef CLK_CNT_P_i_0)) + (portRef I0 (instanceRef CLK_OUT_PRE_0)) + )) + (net (rename SM_AMIGA_5 "SM_AMIGA[5]") (joined + (portRef Q (instanceRef SM_AMIGA_5)) + (portRef I0 (instanceRef state_machine_LDS_000_INT_6_0_m2_m)) + (portRef I1 (instanceRef AS_000_INT_1_sqmuxa_1_i_o2)) + (portRef I0 (instanceRef SM_AMIGA_i_5)) + )) + (net (rename SM_AMIGA_7 "SM_AMIGA[7]") (joined + (portRef Q (instanceRef SM_AMIGA_7)) + (portRef I1 (instanceRef VMA_INT_1_sqmuxa_i_a3)) + (portRef I1 (instanceRef SM_AMIGAse_7_0_a3)) + (portRef I1 (instanceRef SM_AMIGAse_0_0_0_a3_0)) + (portRef I0 (instanceRef state_machine_un8_bg_030_2)) + (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_a3_2)) + )) + (net A0_DMA_1_sqmuxa (joined + (portRef O (instanceRef A0_DMA_1_sqmuxa)) + (portRef I1 (instanceRef A0_DMA_0_m)) + (portRef I0 (instanceRef A0_DMA_0_r)) + (portRef I1 (instanceRef DS_000_DMA_0_m)) + (portRef I0 (instanceRef DS_000_DMA_0_r)) + (portRef I1 (instanceRef SIZE_DMA_0_1__m)) + (portRef I0 (instanceRef SIZE_DMA_0_1__r)) + (portRef I1 (instanceRef SIZE_DMA_0_0__m)) + (portRef I0 (instanceRef SIZE_DMA_0_0__r)) + (portRef I1 (instanceRef AS_000_DMA_0_m)) + (portRef I0 (instanceRef AS_000_DMA_0_r)) + )) + (net (rename SM_AMIGA_1 "SM_AMIGA[1]") (joined + (portRef Q (instanceRef SM_AMIGA_1)) + (portRef I0 (instanceRef SM_AMIGA_i_1)) + (portRef I1 (instanceRef SM_AMIGAse_6_0_0_a3_0)) + (portRef I1 (instanceRef N_110_i_i_a3_1)) + )) + (net (rename SM_AMIGA_0 "SM_AMIGA[0]") (joined + (portRef Q (instanceRef SM_AMIGA_0)) + (portRef I1 (instanceRef SM_AMIGAse_6_0_0_a3)) + (portRef I0 (instanceRef SM_AMIGA_i_0)) + (portRef I1 (instanceRef SM_AMIGAse_7_0_a3_1)) )) (net (rename SM_AMIGA_6 "SM_AMIGA[6]") (joined (portRef Q (instanceRef SM_AMIGA_6)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_3_i_o2)) - (portRef I0 (instanceRef SM_AMIGA_ns_0_a2_0_0)) - (portRef I0 (instanceRef SM_AMIGA_i_6)) + (portRef I1 (instanceRef SM_AMIGAse_0_0_0_a3)) + (portRef I1 (instanceRef SM_AMIGAse_1_i_0_o2)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_i_0)) + (portRef I1 (instanceRef SM_AMIGAse_0_0_0_a3_1_1)) + (portRef I1 (instanceRef SM_AMIGAse_7_0_a3_0_1)) + )) + (net AS_000_DMA (joined + (portRef Q (instanceRef AS_000_DMA)) + (portRef I0 (instanceRef AS_000_DMA_0_m)) + (portRef I0 (instanceRef state_machine_DS_000_DMA_5_iv_0_a3)) + (portRef I0 (instanceRef AS_000_DMA_i)) + (portRef I0 (instanceRef AS_030)) + )) + (net AS_000_INT (joined + (portRef Q (instanceRef AS_000_INT)) + (portRef I0 (instanceRef AS_000_INT_0_n)) + (portRef I0 (instanceRef SM_AMIGAse_6_0_0_o2)) + (portRef I0 (instanceRef AS_000)) )) (net UDS_000_INT (joined (portRef Q (instanceRef UDS_000_INT)) @@ -760,41 +850,34 @@ )) (net CLK_000_D3 (joined (portRef Q (instanceRef CLK_000_D3)) - (portRef I0 (instanceRef state_machine_un8_clk_000_d2_1)) + (portRef I1 (instanceRef SM_AMIGAse_7_o2_2)) (portRef D (instanceRef CLK_000_D4)) )) - (net (rename state_machine_un23_clk_000_d0 "state_machine.un23_clk_000_d0") (joined - (portRef O (instanceRef state_machine_un23_clk_000_d0_i)) - (portRef I1 (instanceRef SM_AMIGA_ns_0_a2_0_5)) + (net (rename state_machine_un57_bgack_030_int "state_machine.un57_bgack_030_int") (joined + (portRef O (instanceRef state_machine_un57_bgack_030_int_i)) + (portRef I1 (instanceRef SM_AMIGAse_3_i_0_a2)) + )) + (net (rename state_machine_un81_bgack_030_int "state_machine.un81_bgack_030_int") (joined + (portRef O (instanceRef state_machine_un81_bgack_030_int)) + (portRef I0 (instanceRef state_machine_un81_bgack_030_int_i)) + (portRef I1 (instanceRef N_110_i_i_a3)) )) (net CLK_000_D5 (joined (portRef Q (instanceRef CLK_000_D5)) - (portRef I0 (instanceRef state_machine_un6_clk_000_d5)) + (portRef I0 (instanceRef state_machine_un81_bgack_030_int)) (portRef D (instanceRef CLK_000_D6)) )) (net (rename SM_AMIGA_3 "SM_AMIGA[3]") (joined (portRef Q (instanceRef SM_AMIGA_3)) - (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_1_i_a2_1)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_0_o2_4)) (portRef I0 (instanceRef SM_AMIGA_i_3)) - (portRef I1 (instanceRef SM_AMIGA_ns_0_a2_0_1_5)) + (portRef I1 (instanceRef SM_AMIGAse_4_0_0_a3_0)) + (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_1_i_a3_2)) + (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_1_i_a3_2)) )) - (net (rename SM_AMIGA_0 "SM_AMIGA[0]") (joined - (portRef Q (instanceRef SM_AMIGA_0)) - (portRef I1 (instanceRef SM_AMIGA_ns_0_a2_7)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_3_i_a2)) - )) - (net (rename SM_AMIGA_1 "SM_AMIGA[1]") (joined - (portRef Q (instanceRef SM_AMIGA_1)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_i_a2_6)) - (portRef I1 (instanceRef SM_AMIGA_ns_0_a2_0_7)) - (portRef I0 (instanceRef un1_DSACK1_INT_0_sqmuxa_i_o2_i_a2)) - )) - (net AS_000_DMA (joined - (portRef Q (instanceRef AS_000_DMA)) - (portRef I0 (instanceRef state_machine_DS_000_DMA_5_iv_0_a2)) - (portRef I0 (instanceRef AS_000_DMA_0_m)) - (portRef I0 (instanceRef AS_030)) + (net (rename state_machine_un6_bgack_000 "state_machine.un6_bgack_000") (joined + (portRef O (instanceRef state_machine_un6_bgack_000_0_i)) + (portRef I1 (instanceRef BGACK_030_INT_0_m)) + (portRef I0 (instanceRef BGACK_030_INT_0_r)) )) (net DS_000_DMA (joined (portRef Q (instanceRef DS_000_DMA)) @@ -816,128 +899,119 @@ (portRef I0 (instanceRef A0_DMA_0_m)) (portRef I0 (instanceRef A0)) )) - (net (rename un4_clk_cnt_n_1 "un4_clk_cnt_n[1]") (joined - (portRef O (instanceRef G_103)) - (portRef I1 (instanceRef clk_un12_clk_cnt_p)) - (portRef I0 (instanceRef un4_clk_cnt_n_i_1)) - )) - (net (rename CLK_CNT_N_0 "CLK_CNT_N[0]") (joined - (portRef Q (instanceRef CLK_CNT_N_0)) - (portRef I0 (instanceRef G_103)) - (portRef D (instanceRef CLK_CNT_N_1)) - )) - (net (rename CLK_CNT_N_1 "CLK_CNT_N[1]") (joined - (portRef Q (instanceRef CLK_CNT_N_1)) - (portRef I1 (instanceRef G_103)) - )) - (net (rename un2_clk_cnt_p_1 "un2_clk_cnt_p[1]") (joined - (portRef O (instanceRef G_109)) - (portRef I0 (instanceRef clk_un12_clk_cnt_p)) - (portRef I0 (instanceRef un2_clk_cnt_p_i_1)) - )) - (net (rename CLK_CNT_P_0 "CLK_CNT_P[0]") (joined - (portRef Q (instanceRef CLK_CNT_P_0)) - (portRef I0 (instanceRef G_109)) - (portRef D (instanceRef CLK_CNT_P_1)) - )) - (net (rename CLK_CNT_P_1 "CLK_CNT_P[1]") (joined - (portRef Q (instanceRef CLK_CNT_P_1)) - (portRef I1 (instanceRef G_109)) - )) (net CLK_000_D4 (joined (portRef Q (instanceRef CLK_000_D4)) (portRef D (instanceRef CLK_000_D5)) )) - (net (rename SM_AMIGA_7 "SM_AMIGA[7]") (joined - (portRef Q (instanceRef SM_AMIGA_7)) - (portRef I0 (instanceRef SM_AMIGA_i_7)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_0_a2_0_1)) - (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_a2_2)) - (portRef I0 (instanceRef state_machine_un10_bg_030_0_a2_2)) - )) - (net (rename state_machine_un15_clk_000_d0 "state_machine.un15_clk_000_d0") (joined - (portRef O (instanceRef state_machine_un15_clk_000_d0_0_i)) - (portRef I1 (instanceRef VMA_INT_0_m)) - (portRef I0 (instanceRef VMA_INT_0_r)) - )) (net (rename SM_AMIGA_4 "SM_AMIGA[4]") (joined (portRef Q (instanceRef SM_AMIGA_4)) - (portRef I0 (instanceRef state_machine_UDS_000_INT_5_0_m2_n)) + (portRef I0 (instanceRef state_machine_LDS_000_INT_6_0_m2_n)) + (portRef I1 (instanceRef SM_AMIGAse_3_i_0_o2)) (portRef I0 (instanceRef SM_AMIGA_i_4)) )) - (net un1_AMIGA_BUS_ENABLE_0_sqmuxa_2 (joined - (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_0_sqmuxa_2_0_i)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_m)) - )) - (net CLK_OUT_PRE (joined - (portRef Q (instanceRef CLK_OUT_PRE)) - (portRef D (instanceRef CLK_OUT_INT)) - )) (net (rename SM_AMIGA_2 "SM_AMIGA[2]") (joined (portRef Q (instanceRef SM_AMIGA_2)) - (portRef I1 (instanceRef SM_AMIGA_ns_0_a2_5)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_i_a2_0_6)) + (portRef I1 (instanceRef SM_AMIGAse_4_0_0_a3)) + (portRef I1 (instanceRef SM_AMIGAse_5_i_0_o2)) + )) + (net (rename state_machine_un10_bg_030 "state_machine.un10_bg_030") (joined + (portRef O (instanceRef state_machine_un10_bg_030_i)) + (portRef I1 (instanceRef BG_000_0_m)) + (portRef I0 (instanceRef BG_000_0_r)) + )) + (net un1_AS_030_000_SYNC_1_sqmuxa_1 (joined + (portRef O (instanceRef un1_AS_030_000_SYNC_1_sqmuxa_1_0_o3_i)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_m)) + )) + (net SIZE_DMA_0_sqmuxa (joined + (portRef O (instanceRef SIZE_DMA_0_sqmuxa_0_a3)) + (portRef I0 (instanceRef SIZE_DMA_0_sqmuxa_i)) + )) + (net (rename state_machine_A0_DMA_4 "state_machine.A0_DMA_4") (joined + (portRef O (instanceRef state_machine_A0_DMA_4_0_a3)) + (portRef I0 (instanceRef A0_DMA_0_n)) + )) + (net un1_AMIGA_BUS_ENABLE_2_sqmuxa (joined + (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_2_sqmuxa_i)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_n)) + )) + (net (rename state_machine_LDS_000_INT_6 "state_machine.LDS_000_INT_6") (joined + (portRef O (instanceRef state_machine_LDS_000_INT_6_0_i)) + (portRef I0 (instanceRef LDS_000_INT_0_m)) + )) + (net (rename state_machine_UDS_000_INT_6 "state_machine.UDS_000_INT_6") (joined + (portRef O (instanceRef state_machine_UDS_000_INT_6_0_i)) + (portRef I0 (instanceRef UDS_000_INT_0_m)) + )) + (net (rename state_machine_DS_000_DMA_5 "state_machine.DS_000_DMA_5") (joined + (portRef O (instanceRef state_machine_DS_000_DMA_5_iv_0_i)) + (portRef I0 (instanceRef DS_000_DMA_0_n)) + )) + (net un1_AMIGA_BUS_ENABLE_1_sqmuxa_1 (joined + (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_m)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_r)) )) (net N_1 (joined - (portRef O (instanceRef AS_030_000_SYNC_0_p)) - (portRef D (instanceRef AS_030_000_SYNC)) - )) - (net N_2 (joined - (portRef O (instanceRef DS_000_DMA_0_p)) - (portRef D (instanceRef DS_000_DMA)) - )) - (net N_3 (joined - (portRef O (instanceRef FPU_CS_INT_0_p)) - (portRef D (instanceRef FPU_CS_INT)) - )) - (net N_4 (joined - (portRef O (instanceRef SIZE_DMA_0_0__p)) - (portRef D (instanceRef SIZE_DMA_0)) - )) - (net N_5 (joined - (portRef O (instanceRef SIZE_DMA_0_1__p)) - (portRef D (instanceRef SIZE_DMA_1)) - )) - (net N_6 (joined - (portRef O (instanceRef UDS_000_INT_0_p)) - (portRef D (instanceRef UDS_000_INT)) - )) - (net N_7 (joined - (portRef O (instanceRef LDS_000_INT_0_p)) - (portRef D (instanceRef LDS_000_INT)) - )) - (net N_8 (joined - (portRef O (instanceRef DTACK_SYNC_0_p)) - (portRef D (instanceRef DTACK_SYNC)) - )) - (net N_9 (joined - (portRef O (instanceRef A0_DMA_0_p)) - (portRef D (instanceRef A0_DMA)) - )) - (net N_10 (joined - (portRef O (instanceRef BG_000_0_p)) - (portRef D (instanceRef BG_000DFFSH)) - )) - (net N_11 (joined - (portRef O (instanceRef AS_000_DMA_0_p)) - (portRef D (instanceRef AS_000_DMA)) - )) - (net N_12 (joined (portRef O (instanceRef AMIGA_BUS_ENABLE_0_p)) (portRef D (instanceRef AMIGA_BUS_ENABLEDFFSH)) )) + (net N_2 (joined + (portRef O (instanceRef UDS_000_INT_0_p)) + (portRef D (instanceRef UDS_000_INT)) + )) + (net N_3 (joined + (portRef O (instanceRef LDS_000_INT_0_p)) + (portRef D (instanceRef LDS_000_INT)) + )) + (net N_4 (joined + (portRef O (instanceRef AS_030_000_SYNC_0_p)) + (portRef D (instanceRef AS_030_000_SYNC)) + )) + (net N_5 (joined + (portRef O (instanceRef DS_000_DMA_0_p)) + (portRef D (instanceRef DS_000_DMA)) + )) + (net N_6 (joined + (portRef O (instanceRef FPU_CS_INT_0_p)) + (portRef D (instanceRef FPU_CS_INT)) + )) + (net N_7 (joined + (portRef O (instanceRef SIZE_DMA_0_0__p)) + (portRef D (instanceRef SIZE_DMA_0)) + )) + (net N_8 (joined + (portRef O (instanceRef SIZE_DMA_0_1__p)) + (portRef D (instanceRef SIZE_DMA_1)) + )) + (net N_9 (joined + (portRef O (instanceRef DTACK_SYNC_0_p)) + (portRef D (instanceRef DTACK_SYNC)) + )) + (net N_10 (joined + (portRef O (instanceRef A0_DMA_0_p)) + (portRef D (instanceRef A0_DMA)) + )) + (net N_11 (joined + (portRef O (instanceRef BG_000_0_p)) + (portRef D (instanceRef BG_000DFFSH)) + )) + (net N_12 (joined + (portRef O (instanceRef DSACK1_INT_0_p)) + (portRef D (instanceRef DSACK1_INT)) + )) (net N_13 (joined + (portRef O (instanceRef AS_000_DMA_0_p)) + (portRef D (instanceRef AS_000_DMA)) + )) + (net N_14 (joined (portRef O (instanceRef AS_000_INT_0_p)) (portRef D (instanceRef AS_000_INT)) )) - (net N_14 (joined + (net N_15 (joined (portRef O (instanceRef VPA_SYNC_0_p)) (portRef D (instanceRef VPA_SYNC)) )) - (net N_15 (joined - (portRef O (instanceRef DSACK1_INT_0_p)) - (portRef D (instanceRef DSACK1_INT)) - )) (net N_16 (joined (portRef O (instanceRef VMA_INT_0_p)) (portRef D (instanceRef VMA_INT)) @@ -958,46 +1032,57 @@ (portRef O (instanceRef IPL_030_0_2__p)) (portRef D (instanceRef IPL_030DFFSH_2)) )) - (net (rename SM_AMIGA_ns_0 "SM_AMIGA_ns[0]") (joined - (portRef O (instanceRef SM_AMIGA_ns_0_i_0)) + (net N_21 (joined + (portRef O (instanceRef CLK_OUT_PRE_0)) + (portRef D (instanceRef CLK_OUT_PRE)) + )) + (net (rename SM_AMIGA_ns_e_0 "SM_AMIGA_ns_e[0]") (joined + (portRef O (instanceRef SM_AMIGAse_7_0_i)) (portRef D (instanceRef SM_AMIGA_7)) )) - (net (rename SM_AMIGA_ns_5 "SM_AMIGA_ns[5]") (joined - (portRef O (instanceRef SM_AMIGA_ns_0_i_5)) + (net (rename SM_AMIGA_ns_e_1 "SM_AMIGA_ns_e[1]") (joined + (portRef O (instanceRef SM_AMIGAse_0_0_0_i)) + (portRef D (instanceRef SM_AMIGA_6)) + )) + (net (rename SM_AMIGA_ns_e_5 "SM_AMIGA_ns_e[5]") (joined + (portRef O (instanceRef SM_AMIGAse_4_0_0_i)) (portRef D (instanceRef SM_AMIGA_2)) )) - (net (rename SM_AMIGA_ns_7 "SM_AMIGA_ns[7]") (joined - (portRef O (instanceRef SM_AMIGA_ns_0_i_7)) + (net (rename SM_AMIGA_ns_e_7 "SM_AMIGA_ns_e[7]") (joined + (portRef O (instanceRef SM_AMIGAse_6_0_0_i)) (portRef D (instanceRef SM_AMIGA_0)) )) + (net N_100 (joined + (portRef O (instanceRef SM_AMIGAse_7_o2_i)) + (portRef I0 (instanceRef SM_AMIGAse_7_0_a3)) + )) (net (rename cpu_est_0 "cpu_est[0]") (joined (portRef Q (instanceRef cpu_est_0)) - (portRef I0 (instanceRef cpu_est_ns_0_0_a2_0_1)) - (portRef I1 (instanceRef cpu_estse_0_a2)) - (portRef I0 (instanceRef cpu_est_ns_0_0_a2_2)) + (portRef I0 (instanceRef cpu_est_ns_0_0_a3_0_2)) + (portRef I1 (instanceRef cpu_estse_0_a3)) (portRef I0 (instanceRef cpu_est_i_0)) + (portRef I0 (instanceRef cpu_est_ns_0_0_a2_1)) )) (net (rename cpu_est_1 "cpu_est[1]") (joined (portRef Q (instanceRef cpu_est_1)) (portRef I0 (instanceRef cpu_estse_0_m)) + (portRef I0 (instanceRef cpu_est_ns_0_0_a3_2)) (portRef I0 (instanceRef cpu_est_i_1)) - (portRef I0 (instanceRef cpu_est_ns_0_0_a2_1)) - (portRef I1 (instanceRef cpu_est_ns_0_0_m2_2__m)) - (portRef I0 (instanceRef cpu_est_ns_0_0_m2_2__r)) + (portRef I0 (instanceRef cpu_est_ns_0_0_a2_0_1)) )) (net (rename cpu_est_2 "cpu_est[2]") (joined (portRef Q (instanceRef cpu_est_2)) (portRef I0 (instanceRef cpu_estse_1_m)) - (portRef I1 (instanceRef cpu_est_ns_i_0_a2_3)) - (portRef I0 (instanceRef cpu_est_ns_0_0_m2_2__m)) - (portRef I0 (instanceRef cpu_est_ns_0_0_x2_1)) - (portRef I1 (instanceRef state_machine_un15_clk_000_d0_0_a2_0)) + (portRef I1 (instanceRef cpu_est_ns_0_0_a3_2)) + (portRef I1 (instanceRef cpu_est_ns_i_0_a3_3)) + (portRef I0 (instanceRef cpu_est_i_2)) + (portRef I0 (instanceRef cpu_est_ns_0_0_a3_1)) )) (net (rename cpu_est_3 "cpu_est[3]") (joined (portRef Q (instanceRef cpu_est_3)) (portRef I0 (instanceRef cpu_estse_2_m)) - (portRef I1 (instanceRef cpu_est_ns_0_0_a2_2)) - (portRef I1 (instanceRef cpu_est_ns_0_0_x2_1)) + (portRef I1 (instanceRef cpu_est_ns_0_0_a3_0_2)) + (portRef I1 (instanceRef cpu_est_ns_0_0_a3_1)) (portRef I0 (instanceRef cpu_est_ns_i_0_o2_3)) (portRef I0 (instanceRef cpu_est_i_3)) (portRef I0 (instanceRef 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state_machine_un8_clk_000_d2_i)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_0_a2_0_1)) - )) - (net (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (joined - (portRef O (instanceRef SM_AMIGA_i_6)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_0_a2_2)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_1_sqmuxa_1)) )) (net (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (joined (portRef O (instanceRef SM_AMIGA_i_4)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_0_a2_0_4)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_0_a2_3)) - )) - (net CLK_000_D0_i (joined - (portRef O (instanceRef CLK_000_D0_i)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_0_a2_4)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_i_o2_6)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_0_o2_1)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_0_3)) - (portRef I0 (instanceRef SM_AMIGA_ns_0_a2_5)) - (portRef I0 (instanceRef SM_AMIGA_ns_0_a2_0)) - (portRef I0 (instanceRef SM_AMIGA_ns_0_a2_0_1_5)) - (portRef I0 (instanceRef state_machine_un15_clk_000_d0_0_a2_1)) - )) - (net RW_i (joined - (portRef O (instanceRef RW_i)) - (portRef I1 (instanceRef state_machine_DS_000_DMA_5_iv_0_a2)) - )) - (net UDS_000_i (joined - (portRef O (instanceRef I_155)) - (portRef I1 (instanceRef SIZE_DMA_0_sqmuxa_0_a2_1)) - )) - (net LDS_000_i (joined - (portRef O (instanceRef I_156)) - (portRef I0 (instanceRef SIZE_DMA_0_sqmuxa_0_a2_1)) - (portRef I0 (instanceRef state_machine_A0_DMA_4_0_a2_1_0)) - )) - (net DTACK_i (joined - (portRef O (instanceRef I_157)) - (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_1_i_a2_1)) - )) - (net VMA_INT_i (joined - (portRef O (instanceRef VMA_INT_i)) - (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_1_i_a2_2)) - )) - (net VPA_i (joined - (portRef O (instanceRef VPA_i)) - (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_1_i_a2_2)) - (portRef I1 (instanceRef state_machine_un15_clk_000_d0_0_a2)) - )) - (net (rename cpu_est_i_0 "cpu_est_i[0]") (joined - (portRef O (instanceRef cpu_est_i_0)) - (portRef I1 (instanceRef cpu_est_ns_0_0_a2_1)) - (portRef I1 (instanceRef cpu_estse_0_a2_0)) - (portRef I0 (instanceRef cpu_est_ns_0_0_m2_2__n)) - )) - (net (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (joined - (portRef O (instanceRef SM_AMIGA_i_3)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_0_a2_0_4)) + (portRef I1 (instanceRef SM_AMIGAse_2_i_0_a3)) )) (net (rename cpu_est_i_3 "cpu_est_i[3]") (joined (portRef O (instanceRef cpu_est_i_3)) - (portRef I1 (instanceRef cpu_est_ns_i_0_a2_0_3)) + (portRef I1 (instanceRef cpu_est_ns_i_0_a3_0_3)) + (portRef I1 (instanceRef cpu_est_ns_0_0_a3_0_1)) + )) + (net (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (joined + (portRef O (instanceRef SM_AMIGA_i_5)) + (portRef I1 (instanceRef SM_AMIGAse_1_i_0_a3)) + )) + (net CLK_000_D0_i (joined + (portRef O (instanceRef CLK_000_D0_i)) + (portRef I1 (instanceRef SM_AMIGAse_1_i_0_a2)) + (portRef I0 (instanceRef SM_AMIGAse_0_0_0_a3_1_1)) + (portRef I0 (instanceRef VMA_INT_1_sqmuxa_i_a3_0_1)) + )) + (net (rename state_machine_un81_bgack_030_int_i "state_machine.un81_bgack_030_int_i") (joined + (portRef O (instanceRef state_machine_un81_bgack_030_int_i)) + (portRef I1 (instanceRef SM_AMIGAse_5_i_0_a2)) + )) + (net (rename cpu_est_i_0 "cpu_est_i[0]") (joined + (portRef O (instanceRef cpu_est_i_0)) + (portRef I1 (instanceRef cpu_estse_0_a3_0)) + (portRef I0 (instanceRef cpu_est_ns_0_0_a3_1_2)) + (portRef I1 (instanceRef cpu_est_ns_0_0_a2_0_1)) )) (net (rename cpu_est_i_1 "cpu_est_i[1]") (joined (portRef O (instanceRef cpu_est_i_1)) - (portRef I1 (instanceRef cpu_est_ns_0_0_a2_0_1)) + (portRef I1 (instanceRef cpu_est_ns_0_0_a3_1_2)) + (portRef I1 (instanceRef cpu_est_ns_0_0_a2_1)) (portRef I1 (instanceRef cpu_est_ns_i_0_o2_3)) )) + (net UDS_000_i (joined + (portRef O (instanceRef I_164)) + (portRef I1 (instanceRef SIZE_DMA_1_sqmuxa_i_a2)) + )) + (net AS_000_DMA_i (joined + (portRef O (instanceRef AS_000_DMA_i)) + (portRef I0 (instanceRef un3_dtack_i_a3_1)) + )) + (net RW_i (joined + (portRef O (instanceRef RW_i)) + (portRef I1 (instanceRef state_machine_DS_000_DMA_5_iv_0_a3)) + (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_0_0_a3)) + )) + (net (rename cpu_est_i_2 "cpu_est_i[2]") (joined + (portRef O (instanceRef cpu_est_i_2)) + (portRef I0 (instanceRef cpu_est_ns_0_0_a3_0_1)) + )) + (net (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (joined + (portRef O (instanceRef SM_AMIGA_i_3)) + (portRef I1 (instanceRef SM_AMIGAse_3_i_0_a3)) + )) + (net (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (joined + (portRef O (instanceRef SM_AMIGA_i_1)) + (portRef I1 (instanceRef SM_AMIGAse_5_i_0_a3)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_1_i_a3)) + )) (net A0_i (joined - (portRef O (instanceRef I_158)) - (portRef I0 (instanceRef state_machine_UDS_000_INT_5_0)) - (portRef I0 (instanceRef state_machine_LDS_000_INT_5_0_a2_1)) + (portRef O (instanceRef I_165)) + (portRef I0 (instanceRef state_machine_UDS_000_INT_6_0)) + (portRef I0 (instanceRef state_machine_LDS_000_INT_6_0_a3_1)) )) (net (rename SIZE_i_1 "SIZE_i[1]") (joined - (portRef O (instanceRef I_159)) - (portRef I1 (instanceRef state_machine_LDS_000_INT_5_0_a2)) + (portRef O (instanceRef I_166)) + (portRef I1 (instanceRef state_machine_LDS_000_INT_6_0_a3)) + )) + (net (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (joined + (portRef O (instanceRef SM_AMIGA_i_0)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_1_i_a3)) )) (net (rename A_i_30 "A_i[30]") (joined (portRef O (instanceRef A_i_30)) @@ -1577,6 +1606,18 @@ (portRef O (instanceRef A_i_25)) (portRef I1 (instanceRef un8_ciin_1)) )) + (net (rename A_i_19 "A_i[19]") (joined + (portRef O (instanceRef A_i_19)) + (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_o2_3)) + )) + (net (rename A_i_16 "A_i[16]") (joined + (portRef O (instanceRef A_i_16)) + (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_o2_3)) + )) + (net (rename A_i_18 "A_i[18]") (joined + (portRef O (instanceRef A_i_18)) + (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_o2_5)) + )) (net RST_i (joined (portRef O (instanceRef RST_i)) (portRef S (instanceRef A0_DMA)) @@ -1594,10 +1635,7 @@ (portRef S (instanceRef CLK_000_D4)) (portRef S (instanceRef CLK_000_D5)) (portRef S (instanceRef CLK_000_D6)) - (portRef R (instanceRef CLK_CNT_N_0)) - (portRef S (instanceRef CLK_CNT_N_1)) (portRef R (instanceRef CLK_CNT_P_0)) - (portRef R (instanceRef CLK_CNT_P_1)) (portRef R (instanceRef CLK_OUT_INT)) (portRef R (instanceRef CLK_OUT_PRE)) (portRef S (instanceRef DSACK1_INT)) @@ -1621,35 +1659,51 @@ (portRef S (instanceRef SM_AMIGA_7)) (portRef S (instanceRef UDS_000_INT)) (portRef S (instanceRef VMA_INT)) + (portRef S (instanceRef VPA_D)) (portRef S (instanceRef VPA_SYNC)) (portRef R (instanceRef cpu_est_0)) (portRef R (instanceRef cpu_est_1)) (portRef R (instanceRef cpu_est_2)) (portRef R (instanceRef cpu_est_3)) )) - (net (rename un2_clk_cnt_p_i_1 "un2_clk_cnt_p_i[1]") (joined - (portRef O (instanceRef un2_clk_cnt_p_i_1)) + (net (rename CLK_CNT_P_i_0 "CLK_CNT_P_i[0]") (joined + (portRef O (instanceRef CLK_CNT_P_i_0)) (portRef D (instanceRef CLK_CNT_P_0)) )) - (net CLK_OSZI_i (joined - (portRef O (instanceRef CLK_OSZI_i)) - (portRef CLK (instanceRef CLK_CNT_N_0)) - (portRef CLK (instanceRef CLK_CNT_N_1)) + (net SIZE_DMA_0_sqmuxa_i (joined + (portRef O (instanceRef SIZE_DMA_0_sqmuxa_i)) + (portRef I0 (instanceRef SIZE_DMA_0_0__n)) )) - (net (rename un4_clk_cnt_n_i_1 "un4_clk_cnt_n_i[1]") (joined - (portRef O (instanceRef un4_clk_cnt_n_i_1)) - (portRef D (instanceRef CLK_CNT_N_0)) + (net N_95_i (joined + (portRef O (instanceRef N_95_i)) + (portRef I0 (instanceRef VPA_SYNC_0_m)) + (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_1_i)) + )) + (net N_96_i (joined + (portRef O (instanceRef N_96_i)) + (portRef I0 (instanceRef DSACK1_INT_0_m)) + (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_1_i_o3)) + )) + (net N_97_i (joined + (portRef O (instanceRef N_97_i)) + (portRef I0 (instanceRef DTACK_SYNC_0_m)) + (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa_1_i)) )) (net FPU_CS_INT_i (joined (portRef O (instanceRef FPU_CS_INT_i)) (portRef OE (instanceRef AVEC_EXP)) (portRef OE (instanceRef BERR)) )) + (net CLK_000_D6_i (joined + (portRef O (instanceRef CLK_000_D6_i)) + (portRef I1 (instanceRef state_machine_un81_bgack_030_int)) + )) (net AS_030_c (joined (portRef O (instanceRef AS_030)) - (portRef I0 (instanceRef I_154)) (portRef I0 (instanceRef FPU_CS_INT_0_m)) - (portRef I0 (instanceRef state_machine_un10_bg_030_0_a2_1)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_1_i_0)) + (portRef I0 (instanceRef I_163)) + (portRef I0 (instanceRef state_machine_un8_bg_030_1)) )) (net AS_030 (joined (portRef IO (instanceRef AS_030)) @@ -1657,7 +1711,7 @@ )) (net AS_000_c (joined (portRef O (instanceRef AS_000)) - (portRef I0 (instanceRef AS_000_c_i)) + (portRef I0 (instanceRef I_162)) )) (net AS_000 (joined (portRef IO (instanceRef AS_000)) @@ -1673,9 +1727,9 @@ )) (net UDS_000_c (joined (portRef O (instanceRef UDS_000)) - (portRef I0 (instanceRef I_155)) - (portRef I1 (instanceRef un1_as_000_dma5_0_a2_0_0)) - (portRef I1 (instanceRef state_machine_A0_DMA_4_0_a2)) + (portRef I0 (instanceRef I_164)) + (portRef I1 (instanceRef SIZE_DMA_1_sqmuxa_i_a2_0)) + (portRef I1 (instanceRef state_machine_A0_DMA_4_0_a3_2)) )) (net UDS_000 (joined (portRef IO (instanceRef UDS_000)) @@ -1683,8 +1737,8 @@ )) (net LDS_000_c (joined (portRef O (instanceRef LDS_000)) - (portRef I0 (instanceRef I_156)) - (portRef I0 (instanceRef un1_as_000_dma5_0_a2_0_0)) + (portRef I0 (instanceRef SIZE_DMA_1_sqmuxa_i_a2_0)) + (portRef I0 (instanceRef I_161)) )) (net LDS_000 (joined (portRef IO (instanceRef LDS_000)) @@ -1692,7 +1746,7 @@ )) (net (rename SIZE_c_0 "SIZE_c[0]") (joined (portRef O (instanceRef SIZE_0)) - (portRef I1 (instanceRef state_machine_LDS_000_INT_5_0_a2_1)) + (portRef I1 (instanceRef state_machine_LDS_000_INT_6_0_a3_1)) )) (net (rename SIZE_0 "SIZE[0]") (joined (portRef IO (instanceRef SIZE_0)) @@ -1700,7 +1754,7 @@ )) (net (rename SIZE_c_1 "SIZE_c[1]") (joined (portRef O (instanceRef SIZE_1)) - (portRef I0 (instanceRef I_159)) + (portRef I0 (instanceRef I_166)) )) (net (rename SIZE_1 "SIZE[1]") (joined (portRef (member size 0)) @@ -1716,7 +1770,7 @@ )) (net (rename A_c_17 "A_c[17]") (joined (portRef O (instanceRef A_17)) - (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_o2_3)) + (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_o2_1)) )) (net (rename A_17 "A[17]") (joined (portRef (member a 14)) @@ -1836,7 +1890,7 @@ )) (net A0_c (joined (portRef O (instanceRef A0)) - (portRef I0 (instanceRef I_158)) + (portRef I0 (instanceRef I_165)) )) (net A0 (joined (portRef IO (instanceRef A0)) @@ -1844,10 +1898,12 @@ )) (net nEXP_SPACE_c (joined (portRef O (instanceRef nEXP_SPACE)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_3_i_o2)) (portRef I0 (instanceRef nEXP_SPACE_i)) - (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_a2_2)) - (portRef I1 (instanceRef state_machine_un10_bg_030_0_a2_2)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_i_0)) + (portRef I1 (instanceRef state_machine_un8_bg_030_2)) + (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_a3_2)) + (portRef I1 (instanceRef SM_AMIGAse_0_0_0_a3_1)) + (portRef OE (instanceRef DSACK_0)) (portRef OE (instanceRef DSACK_1)) )) (net nEXP_SPACE (joined @@ -1882,9 +1938,9 @@ )) (net BGACK_000_c (joined (portRef O (instanceRef BGACK_000)) - (portRef I0 (instanceRef state_machine_un6_bgack_000_0)) (portRef I0 (instanceRef BGACK_030_INT_0_m)) - (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_o2_1)) + (portRef I0 (instanceRef state_machine_un6_bgack_000_0)) + (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_o2_1)) )) (net BGACK_000 (joined (portRef BGACK_000) @@ -1892,9 +1948,9 @@ )) (net CLK_030_c (joined (portRef O (instanceRef CLK_030)) - (portRef I0 (instanceRef un1_as_030_000_sync8_1_i_a2)) + (portRef I0 (instanceRef un1_as_030_000_sync8_1_i_a3)) (portRef I0 (instanceRef CLK_030_c_i)) - (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_a2_1)) + (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_a3_1)) )) (net CLK_030 (joined (portRef CLK_030) @@ -1902,7 +1958,7 @@ )) (net CLK_000_c (joined (portRef O (instanceRef CLK_000)) - (portRef I1 (instanceRef state_machine_un10_bg_030_0_a2_1)) + (portRef I1 (instanceRef state_machine_un8_bg_030_1)) (portRef D (instanceRef CLK_000_D0)) )) (net CLK_000 (joined @@ -1911,7 +1967,6 @@ )) (net CLK_OSZI_c (joined (portRef O (instanceRef CLK_OSZI)) - (portRef I0 (instanceRef CLK_OSZI_i)) (portRef CLK (instanceRef A0_DMA)) (portRef CLK (instanceRef AMIGA_BUS_ENABLEDFFSH)) (portRef CLK (instanceRef AS_000_DMA)) @@ -1928,7 +1983,6 @@ (portRef CLK (instanceRef CLK_000_D5)) (portRef CLK (instanceRef CLK_000_D6)) (portRef CLK (instanceRef CLK_CNT_P_0)) - (portRef CLK (instanceRef CLK_CNT_P_1)) (portRef CLK (instanceRef CLK_OUT_INT)) (portRef CLK (instanceRef CLK_OUT_PRE)) (portRef CLK (instanceRef DSACK1_INT)) @@ -1952,6 +2006,7 @@ (portRef CLK (instanceRef SM_AMIGA_7)) (portRef CLK (instanceRef UDS_000_INT)) (portRef CLK (instanceRef VMA_INT)) + (portRef CLK (instanceRef VPA_D)) (portRef CLK (instanceRef VPA_SYNC)) (portRef CLK (instanceRef cpu_est_0)) (portRef CLK (instanceRef cpu_est_1)) @@ -2044,7 +2099,7 @@ )) (net DTACK_c (joined (portRef O (instanceRef DTACK)) - (portRef I0 (instanceRef I_157)) + (portRef I0 (instanceRef I_160)) )) (net DTACK (joined (portRef IO (instanceRef DTACK)) @@ -2064,8 +2119,7 @@ )) (net VPA_c (joined (portRef O (instanceRef VPA)) - (portRef I0 (instanceRef VPA_i)) - (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa_1_i_a2)) + (portRef D (instanceRef VPA_D)) )) (net VPA (joined (portRef VPA) @@ -2093,10 +2147,10 @@ )) (net RW_c (joined (portRef O (instanceRef RW)) - (portRef I1 (instanceRef state_machine_UDS_000_INT_5_0_m2_m)) - (portRef I0 (instanceRef state_machine_UDS_000_INT_5_0_m2_r)) - (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_m1_0_x2)) (portRef I0 (instanceRef RW_i)) + (portRef I1 (instanceRef state_machine_LDS_000_INT_6_0_m2_m)) + (portRef I0 (instanceRef state_machine_LDS_000_INT_6_0_m2_r)) + (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_0_0_a3_0_1)) )) (net RW (joined (portRef RW) @@ -2104,7 +2158,7 @@ )) (net (rename FC_c_0 "FC_c[0]") (joined (portRef O (instanceRef FC_0)) - (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_o2_3)) + (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_o2_2)) )) (net (rename FC_0 "FC[0]") (joined (portRef (member fc 1)) @@ -2112,7 +2166,7 @@ )) (net (rename FC_c_1 "FC_c[1]") (joined (portRef O (instanceRef FC_1)) - (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_o2_5)) + (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_o2_2)) )) (net (rename FC_1 "FC[1]") (joined (portRef (member fc 0)) @@ -2120,13 +2174,17 @@ )) (net AMIGA_BUS_ENABLE_c (joined (portRef Q (instanceRef AMIGA_BUS_ENABLEDFFSH)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_n)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_m)) (portRef I0 (instanceRef AMIGA_BUS_ENABLE)) )) (net AMIGA_BUS_ENABLE (joined (portRef O (instanceRef AMIGA_BUS_ENABLE)) (portRef AMIGA_BUS_ENABLE) )) + (net AMIGA_BUS_DATA_DIR_c (joined + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_0_0_i)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR)) + )) (net AMIGA_BUS_DATA_DIR (joined (portRef O (instanceRef AMIGA_BUS_DATA_DIR)) (portRef AMIGA_BUS_DATA_DIR) @@ -2139,735 +2197,593 @@ (portRef O (instanceRef CIIN)) (portRef CIIN) )) - (net (rename state_machine_un23_clk_000_d0_0 "state_machine.un23_clk_000_d0_0") (joined - (portRef O (instanceRef state_machine_un23_clk_000_d0)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_0_o2_4)) - (portRef I0 (instanceRef state_machine_un23_clk_000_d0_i)) + (net (rename cpu_est_ns_0_1 "cpu_est_ns_0[1]") (joined + (portRef O (instanceRef cpu_est_ns_0_0_1)) + (portRef I0 (instanceRef cpu_est_ns_0_0_i_1)) )) - (net (rename state_machine_un6_bgack_000_0 "state_machine.un6_bgack_000_0") (joined - (portRef O (instanceRef state_machine_un6_bgack_000_0)) - (portRef I0 (instanceRef state_machine_un6_bgack_000_0_i)) + (net N_165_i (joined + (portRef O (instanceRef N_165_i)) + (portRef I0 (instanceRef cpu_est_ns_0_0_1_1)) )) - (net N_214_0 (joined - (portRef O (instanceRef VPA_SYNC_1_sqmuxa_1_i)) - (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_1_i_i)) + (net N_166_i (joined + (portRef O (instanceRef N_166_i)) + (portRef I1 (instanceRef cpu_est_ns_0_0_1_1)) + )) + (net N_242_i (joined + (portRef O (instanceRef N_242_i)) + (portRef I0 (instanceRef cpu_est_ns_0_0_2_1)) + )) + (net N_243_i (joined + (portRef O (instanceRef N_243_i)) + (portRef I1 (instanceRef cpu_est_ns_0_0_2_1)) + )) + (net N_70_0 (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_i_0)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_i_0_i)) + )) + (net N_94_i (joined + (portRef O (instanceRef N_94_i)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_1_i_0)) + )) + (net N_222_i (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_1_i_0)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_2_sqmuxa)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_1_i_0_i)) + )) + (net N_100_i (joined + (portRef O (instanceRef SM_AMIGAse_7_o2)) + (portRef I0 (instanceRef SM_AMIGAse_0_0_0_a3_0)) + (portRef I0 (instanceRef SM_AMIGAse_7_o2_i)) + )) + (net AS_030_000_SYNC_i (joined + (portRef O (instanceRef AS_030_000_SYNC_i)) + (portRef I0 (instanceRef SM_AMIGAse_7_o2_1)) + )) + (net AMIGA_BUS_ENABLE_1_sqmuxa_1_i (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_1_sqmuxa_1_i)) + (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1)) + )) + (net AMIGA_BUS_ENABLE_1_sqmuxa_2_i (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_1_sqmuxa_2_i)) + (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1)) + )) + (net un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_0 (joined + (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1)) + (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i)) + )) + (net AMIGA_BUS_ENABLE_0_sqmuxa_2_i (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_2_i)) + (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_2_sqmuxa)) + )) + (net AMIGA_BUS_ENABLE_2_sqmuxa_i (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_2_sqmuxa_i)) + (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_2_sqmuxa)) + )) + (net un1_AMIGA_BUS_ENABLE_2_sqmuxa_0 (joined + (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_2_sqmuxa)) + (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_2_sqmuxa_i)) )) (net BG_030_c_i (joined (portRef O (instanceRef BG_030_c_i)) - (portRef I0 (instanceRef state_machine_un10_bg_030_0)) + (portRef I0 (instanceRef state_machine_un10_bg_030)) )) - (net N_227_i (joined - (portRef O (instanceRef N_227_i)) - (portRef I1 (instanceRef state_machine_un10_bg_030_0)) + (net (rename state_machine_un8_bg_030_i "state_machine.un8_bg_030_i") (joined + (portRef O (instanceRef state_machine_un8_bg_030_i)) + (portRef I1 (instanceRef state_machine_un10_bg_030)) )) (net (rename state_machine_un10_bg_030_0 "state_machine.un10_bg_030_0") (joined - (portRef O (instanceRef state_machine_un10_bg_030_0)) - (portRef I0 (instanceRef state_machine_un10_bg_030_0_i)) + (portRef O (instanceRef state_machine_un10_bg_030)) + (portRef I0 (instanceRef state_machine_un10_bg_030_i)) )) - (net N_215_0 (joined - (portRef O (instanceRef un1_AS_030_2_i)) - (portRef I0 (instanceRef un1_AS_030_2_i_i)) + (net N_82_i (joined + (portRef O (instanceRef state_machine_LDS_000_INT_6_0_o3)) + (portRef I0 (instanceRef state_machine_LDS_000_INT_6_0)) + (portRef I1 (instanceRef state_machine_UDS_000_INT_6_0)) + (portRef I0 (instanceRef state_machine_LDS_000_INT_6_0_o3_i)) )) - (net N_216_0 (joined - (portRef O (instanceRef DTACK_SYNC_1_sqmuxa_1_i)) - (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_1_i_i)) + (net DS_030_c_i (joined + (portRef O (instanceRef DS_030_c_i)) + (portRef I1 (instanceRef state_machine_LDS_000_INT_6_0_o3)) )) - (net N_126_i (joined - (portRef O (instanceRef N_126_i)) - (portRef I1 (instanceRef un1_as_030_000_sync8_1_i)) + (net N_80_0 (joined + (portRef O (instanceRef SM_AMIGAse_3_i_0_o2)) + (portRef I0 (instanceRef SM_AMIGAse_3_i_0_o2_i)) )) - (net N_33_0 (joined - (portRef O (instanceRef un1_as_030_000_sync8_1_i)) - (portRef I0 (instanceRef un1_as_030_000_sync8_1_i_i)) + (net N_79_0 (joined + (portRef O (instanceRef SM_AMIGAse_5_i_0_o2)) + (portRef I0 (instanceRef SM_AMIGAse_5_i_0_o2_i)) )) - (net N_127_i (joined - (portRef O (instanceRef N_127_i)) - (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_i)) + (net A0_DMA_0_sqmuxa_i_0_0 (joined + (portRef O (instanceRef SIZE_DMA_1_sqmuxa_i_o3)) + (portRef I0 (instanceRef SIZE_DMA_1_sqmuxa_i_0)) + (portRef I0 (instanceRef state_machine_DS_000_DMA_5_iv_0)) + (portRef I0 (instanceRef SIZE_DMA_1_sqmuxa_i_o3_i)) )) - (net N_35_0 (joined - (portRef O (instanceRef AS_030_000_SYNC_1_sqmuxa_i)) - (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_i)) - )) - (net (rename state_machine_UDS_000_INT_5_0 "state_machine.UDS_000_INT_5_0") (joined - (portRef O (instanceRef state_machine_UDS_000_INT_5_0)) - (portRef I0 (instanceRef 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cpu_est_ns_i_0_o2_i_3)) + (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_1_i_a3_1)) )) - (net N_133_i (joined - (portRef O (instanceRef N_133_i)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_0_2)) + (net N_75_i (joined + (portRef O (instanceRef SM_AMIGAse_1_i_0_o2)) + (portRef I0 (instanceRef un1_AS_030_000_SYNC_1_sqmuxa_1_0_a2)) + (portRef I0 (instanceRef SM_AMIGAse_1_i_0_o2_i)) )) - (net N_78_i (joined - (portRef O (instanceRef SM_AMIGA_ns_i_0_2)) - (portRef D (instanceRef SM_AMIGA_5)) + (net N_162_i (joined + (portRef O (instanceRef N_162_i)) + (portRef I1 (instanceRef un1_AS_030_000_SYNC_1_sqmuxa_1_0_o3)) )) - (net N_134_i (joined - (portRef O (instanceRef N_134_i)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_0_3)) + (net un1_AS_030_000_SYNC_1_sqmuxa_1_0 (joined + (portRef O (instanceRef un1_AS_030_000_SYNC_1_sqmuxa_1_0_o3)) + (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i)) + (portRef I0 (instanceRef un1_AS_030_000_SYNC_1_sqmuxa_1_0_o3_i)) )) - (net N_80_i (joined - (portRef O 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(instanceRef un1_AS_030_000_SYNC_1_sqmuxa_1_0_o3)) + (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_1_i_o3_i)) )) - (net N_175_i (joined - (portRef O (instanceRef N_175_i)) - (portRef I1 (instanceRef un1_as_000_dma5_0_o2_0)) - (portRef I1 (instanceRef SIZE_DMA_1_sqmuxa_0_a2)) - )) - (net (rename un1_as_000_dma5_i_0 "un1_as_000_dma5_i[0]") (joined - (portRef O (instanceRef un1_as_000_dma5_0_o2_0)) - (portRef I1 (instanceRef state_machine_DS_000_DMA_5_iv_0)) - (portRef I0 (instanceRef un1_as_000_dma5_0_o2_i_0)) - )) - (net (rename state_machine_un6_clk_000_d5_i "state_machine.un6_clk_000_d5_i") (joined - (portRef O (instanceRef state_machine_un6_clk_000_d5_i)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_i_o2_6)) - )) - (net N_71_i (joined - (portRef O (instanceRef SM_AMIGA_ns_i_i_o2_6)) - (portRef I0 (instanceRef SM_AMIGA_ns_0_a2_0_7)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_i_o2_i_6)) - )) - (net DS_030_c_i (joined - (portRef O (instanceRef DS_030_c_i)) - (portRef I0 (instanceRef state_machine_UDS_000_INT_5_0_o2)) - )) - (net N_73_i (joined - (portRef O (instanceRef state_machine_UDS_000_INT_5_0_o2)) - (portRef I1 (instanceRef state_machine_UDS_000_INT_5_0)) - (portRef I0 (instanceRef state_machine_LDS_000_INT_5_0)) - (portRef I0 (instanceRef state_machine_UDS_000_INT_5_0_o2_i)) + (net N_61_i (joined + (portRef O (instanceRef SM_AMIGAse_4_0_0_o2)) + (portRef I0 (instanceRef SM_AMIGAse_3_i_0_o2)) + (portRef I0 (instanceRef SM_AMIGAse_5_i_0_o2)) + (portRef I1 (instanceRef SM_AMIGAse_6_0_0_o2)) + (portRef I0 (instanceRef SM_AMIGAse_4_0_0_o2_i)) + (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_1_i_a3_1)) + (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa_1_i_a3_1)) )) (net N_156_i (joined (portRef O (instanceRef N_156_i)) - (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_0_o2)) - )) - (net un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_i (joined - (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_4_0_o2)) - (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_i)) - (portRef I0 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(instanceRef VPA_SYNC_1_sqmuxa_1_i_a3_2)) + (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_1_i_a3_3)) )) - (net (rename AS_000_INT_0_un1 "AS_000_INT_0.un1") (joined - (portRef O (instanceRef AS_000_INT_0_m)) - (portRef I0 (instanceRef AS_000_INT_0_p)) + (net N_95_3 (joined + (portRef O (instanceRef VPA_SYNC_1_sqmuxa_1_i_a3_3)) + (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_1_i_a3)) )) - (net (rename AS_000_INT_0_un0 "AS_000_INT_0.un0") (joined - (portRef O (instanceRef AS_000_INT_0_n)) - (portRef I1 (instanceRef AS_000_INT_0_p)) + (net (rename SM_AMIGA_ns_e_0_1_0 "SM_AMIGA_ns_e_0_1[0]") (joined + (portRef O (instanceRef SM_AMIGAse_7_0_1)) + (portRef I0 (instanceRef SM_AMIGAse_7_0)) )) - (net (rename AS_000_DMA_0_un3 "AS_000_DMA_0.un3") (joined - (portRef O (instanceRef AS_000_DMA_0_r)) - (portRef I1 (instanceRef AS_000_DMA_0_n)) + (net (rename SM_AMIGA_ns_e_0_1_1 "SM_AMIGA_ns_e_0_1[1]") (joined + (portRef O (instanceRef SM_AMIGAse_0_0_0_1)) + (portRef I0 (instanceRef SM_AMIGAse_0_0_0)) )) - (net (rename AS_000_DMA_0_un1 "AS_000_DMA_0.un1") (joined - (portRef O (instanceRef AS_000_DMA_0_m)) - (portRef I0 (instanceRef AS_000_DMA_0_p)) + (net (rename cpu_est_ns_0_1_2 "cpu_est_ns_0_1[2]") (joined + (portRef O (instanceRef cpu_est_ns_0_0_1_2)) + (portRef I0 (instanceRef cpu_est_ns_0_0_2)) )) - (net (rename AS_000_DMA_0_un0 "AS_000_DMA_0.un0") (joined - (portRef O (instanceRef AS_000_DMA_0_n)) - (portRef I1 (instanceRef AS_000_DMA_0_p)) + (net N_155_1 (joined + (portRef O (instanceRef un3_dtack_i_a3_1)) + (portRef I0 (instanceRef un3_dtack_i_a3)) )) - (net (rename BG_000_0_un3 "BG_000_0.un3") (joined - (portRef O (instanceRef BG_000_0_r)) - (portRef I1 (instanceRef BG_000_0_n)) + (net N_153_1 (joined + (portRef O (instanceRef SM_AMIGAse_7_0_a3_0_1)) + (portRef I0 (instanceRef SM_AMIGAse_7_0_a3_0)) )) - (net (rename BG_000_0_un1 "BG_000_0.un1") (joined - (portRef O (instanceRef BG_000_0_m)) - (portRef I0 (instanceRef BG_000_0_p)) + (net N_151_1 (joined + (portRef O (instanceRef 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(portRef I1 (instanceRef A0_DMA_0_p)) + (net N_96_1 (joined + (portRef O (instanceRef N_110_i_i_a3_1)) + (portRef I0 (instanceRef N_110_i_i_a3)) )) - (net (rename DTACK_SYNC_0_un3 "DTACK_SYNC_0.un3") (joined - (portRef O (instanceRef DTACK_SYNC_0_r)) - (portRef I1 (instanceRef DTACK_SYNC_0_n)) + (net N_93_1 (joined + (portRef O (instanceRef VMA_INT_1_sqmuxa_i_a3_0_1)) + (portRef I0 (instanceRef VMA_INT_1_sqmuxa_i_a3_0)) )) - (net (rename DTACK_SYNC_0_un1 "DTACK_SYNC_0.un1") (joined - (portRef O (instanceRef DTACK_SYNC_0_m)) - (portRef I0 (instanceRef DTACK_SYNC_0_p)) + (net (rename state_machine_LDS_000_INT_6_0_m2_un3 "state_machine.LDS_000_INT_6_0_m2.un3") (joined + (portRef O (instanceRef state_machine_LDS_000_INT_6_0_m2_r)) + (portRef I1 (instanceRef state_machine_LDS_000_INT_6_0_m2_n)) )) - (net (rename DTACK_SYNC_0_un0 "DTACK_SYNC_0.un0") (joined - (portRef O (instanceRef DTACK_SYNC_0_n)) - (portRef I1 (instanceRef DTACK_SYNC_0_p)) + (net (rename state_machine_LDS_000_INT_6_0_m2_un1 "state_machine.LDS_000_INT_6_0_m2.un1") (joined + (portRef O (instanceRef state_machine_LDS_000_INT_6_0_m2_m)) + (portRef I0 (instanceRef state_machine_LDS_000_INT_6_0_m2_p)) )) - (net (rename LDS_000_INT_0_un3 "LDS_000_INT_0.un3") (joined - (portRef O (instanceRef LDS_000_INT_0_r)) - (portRef I1 (instanceRef LDS_000_INT_0_n)) - )) - (net (rename LDS_000_INT_0_un1 "LDS_000_INT_0.un1") (joined - (portRef O (instanceRef LDS_000_INT_0_m)) - (portRef I0 (instanceRef LDS_000_INT_0_p)) - )) - (net (rename LDS_000_INT_0_un0 "LDS_000_INT_0.un0") (joined - (portRef O (instanceRef LDS_000_INT_0_n)) - (portRef I1 (instanceRef LDS_000_INT_0_p)) - )) - (net (rename UDS_000_INT_0_un3 "UDS_000_INT_0.un3") (joined - (portRef O (instanceRef UDS_000_INT_0_r)) - (portRef I1 (instanceRef UDS_000_INT_0_n)) - )) - (net (rename UDS_000_INT_0_un1 "UDS_000_INT_0.un1") (joined - (portRef O (instanceRef UDS_000_INT_0_m)) - (portRef I0 (instanceRef UDS_000_INT_0_p)) - )) - (net (rename UDS_000_INT_0_un0 "UDS_000_INT_0.un0") (joined - (portRef O (instanceRef UDS_000_INT_0_n)) - (portRef I1 (instanceRef UDS_000_INT_0_p)) - )) - (net (rename FPU_CS_INT_0_un3 "FPU_CS_INT_0.un3") (joined - (portRef O (instanceRef FPU_CS_INT_0_r)) - (portRef I1 (instanceRef FPU_CS_INT_0_n)) - )) - (net (rename FPU_CS_INT_0_un1 "FPU_CS_INT_0.un1") (joined - (portRef O (instanceRef FPU_CS_INT_0_m)) - (portRef I0 (instanceRef FPU_CS_INT_0_p)) - )) - (net (rename FPU_CS_INT_0_un0 "FPU_CS_INT_0.un0") (joined - (portRef O (instanceRef FPU_CS_INT_0_n)) - (portRef I1 (instanceRef FPU_CS_INT_0_p)) - )) - (net (rename DS_000_DMA_0_un3 "DS_000_DMA_0.un3") (joined - (portRef O (instanceRef DS_000_DMA_0_r)) - (portRef I1 (instanceRef DS_000_DMA_0_n)) - )) - (net (rename DS_000_DMA_0_un1 "DS_000_DMA_0.un1") (joined - (portRef O (instanceRef DS_000_DMA_0_m)) - (portRef I0 (instanceRef DS_000_DMA_0_p)) - )) - (net (rename DS_000_DMA_0_un0 "DS_000_DMA_0.un0") (joined - (portRef O (instanceRef DS_000_DMA_0_n)) - (portRef I1 (instanceRef DS_000_DMA_0_p)) - )) - (net (rename AS_030_000_SYNC_0_un3 "AS_030_000_SYNC_0.un3") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_r)) - (portRef I1 (instanceRef AS_030_000_SYNC_0_n)) - )) - (net (rename AS_030_000_SYNC_0_un1 "AS_030_000_SYNC_0.un1") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_m)) - (portRef I0 (instanceRef AS_030_000_SYNC_0_p)) - )) - (net (rename AS_030_000_SYNC_0_un0 "AS_030_000_SYNC_0.un0") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_n)) - (portRef I1 (instanceRef AS_030_000_SYNC_0_p)) - )) - (net (rename SIZE_DMA_0_1__un3 "SIZE_DMA_0_1_.un3") (joined - (portRef O (instanceRef SIZE_DMA_0_1__r)) - (portRef I1 (instanceRef SIZE_DMA_0_1__n)) - )) - (net (rename SIZE_DMA_0_1__un1 "SIZE_DMA_0_1_.un1") (joined - (portRef O (instanceRef SIZE_DMA_0_1__m)) - (portRef I0 (instanceRef SIZE_DMA_0_1__p)) - )) - (net (rename SIZE_DMA_0_1__un0 "SIZE_DMA_0_1_.un0") (joined - (portRef O (instanceRef SIZE_DMA_0_1__n)) - (portRef I1 (instanceRef SIZE_DMA_0_1__p)) - )) - (net (rename SIZE_DMA_0_0__un3 "SIZE_DMA_0_0_.un3") (joined - (portRef O (instanceRef SIZE_DMA_0_0__r)) - (portRef I1 (instanceRef SIZE_DMA_0_0__n)) - )) - (net (rename SIZE_DMA_0_0__un1 "SIZE_DMA_0_0_.un1") (joined - (portRef O (instanceRef SIZE_DMA_0_0__m)) - (portRef I0 (instanceRef SIZE_DMA_0_0__p)) - )) - (net (rename SIZE_DMA_0_0__un0 "SIZE_DMA_0_0_.un0") (joined - (portRef O (instanceRef SIZE_DMA_0_0__n)) - (portRef I1 (instanceRef SIZE_DMA_0_0__p)) - )) - (net (rename BGACK_030_INT_0_un3 "BGACK_030_INT_0.un3") (joined - (portRef O (instanceRef BGACK_030_INT_0_r)) - (portRef I1 (instanceRef BGACK_030_INT_0_n)) - )) - (net (rename BGACK_030_INT_0_un1 "BGACK_030_INT_0.un1") (joined - (portRef O (instanceRef BGACK_030_INT_0_m)) - (portRef I0 (instanceRef BGACK_030_INT_0_p)) - )) - (net (rename BGACK_030_INT_0_un0 "BGACK_030_INT_0.un0") (joined - (portRef O (instanceRef BGACK_030_INT_0_n)) - (portRef I1 (instanceRef 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"state_machine.UDS_000_INT_5_0_m2.un0") (joined - (portRef O (instanceRef state_machine_UDS_000_INT_5_0_m2_n)) - (portRef I1 (instanceRef state_machine_UDS_000_INT_5_0_m2_p)) - )) - (net (rename cpu_est_ns_0_0_m2_2__un3 "cpu_est_ns_0_0_m2_2_.un3") (joined - (portRef O (instanceRef cpu_est_ns_0_0_m2_2__r)) - (portRef I1 (instanceRef cpu_est_ns_0_0_m2_2__n)) - )) - (net (rename cpu_est_ns_0_0_m2_2__un1 "cpu_est_ns_0_0_m2_2_.un1") (joined - (portRef O (instanceRef cpu_est_ns_0_0_m2_2__m)) - (portRef I0 (instanceRef cpu_est_ns_0_0_m2_2__p)) - )) - (net (rename cpu_est_ns_0_0_m2_2__un0 "cpu_est_ns_0_0_m2_2_.un0") (joined - (portRef O (instanceRef cpu_est_ns_0_0_m2_2__n)) - (portRef I1 (instanceRef cpu_est_ns_0_0_m2_2__p)) - )) - (net (rename AMIGA_BUS_ENABLE_0_un3 "AMIGA_BUS_ENABLE_0.un3") (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_0_r)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_n)) - )) - (net (rename AMIGA_BUS_ENABLE_0_un1 "AMIGA_BUS_ENABLE_0.un1") (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_0_m)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_p)) - )) - (net (rename AMIGA_BUS_ENABLE_0_un0 "AMIGA_BUS_ENABLE_0.un0") (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_0_n)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_p)) - )) - (net (rename VMA_INT_0_un3 "VMA_INT_0.un3") (joined - (portRef O (instanceRef VMA_INT_0_r)) - (portRef I1 (instanceRef VMA_INT_0_n)) - )) - (net (rename VMA_INT_0_un1 "VMA_INT_0.un1") (joined - (portRef O (instanceRef VMA_INT_0_m)) - (portRef I0 (instanceRef VMA_INT_0_p)) - )) - (net (rename VMA_INT_0_un0 "VMA_INT_0.un0") (joined - (portRef O (instanceRef VMA_INT_0_n)) - (portRef I1 (instanceRef VMA_INT_0_p)) - )) - (net (rename IPL_030_0_0__un3 "IPL_030_0_0_.un3") (joined - (portRef O (instanceRef IPL_030_0_0__r)) - (portRef I1 (instanceRef IPL_030_0_0__n)) - )) - (net (rename IPL_030_0_0__un1 "IPL_030_0_0_.un1") (joined - (portRef O (instanceRef IPL_030_0_0__m)) - (portRef I0 (instanceRef IPL_030_0_0__p)) - )) - (net (rename IPL_030_0_0__un0 "IPL_030_0_0_.un0") (joined - (portRef O (instanceRef IPL_030_0_0__n)) - (portRef I1 (instanceRef IPL_030_0_0__p)) - )) - (net (rename IPL_030_0_1__un3 "IPL_030_0_1_.un3") (joined - (portRef O (instanceRef IPL_030_0_1__r)) - (portRef I1 (instanceRef IPL_030_0_1__n)) - )) - (net (rename IPL_030_0_1__un1 "IPL_030_0_1_.un1") (joined - (portRef O (instanceRef IPL_030_0_1__m)) - (portRef I0 (instanceRef IPL_030_0_1__p)) - )) - (net (rename IPL_030_0_1__un0 "IPL_030_0_1_.un0") (joined - (portRef O (instanceRef IPL_030_0_1__n)) - (portRef I1 (instanceRef IPL_030_0_1__p)) - )) - (net (rename IPL_030_0_2__un3 "IPL_030_0_2_.un3") (joined - (portRef O (instanceRef IPL_030_0_2__r)) - (portRef I1 (instanceRef IPL_030_0_2__n)) - )) - (net (rename IPL_030_0_2__un1 "IPL_030_0_2_.un1") (joined - (portRef O (instanceRef IPL_030_0_2__m)) - (portRef I0 (instanceRef IPL_030_0_2__p)) - )) - (net (rename IPL_030_0_2__un0 "IPL_030_0_2_.un0") (joined - (portRef O (instanceRef IPL_030_0_2__n)) - (portRef I1 (instanceRef IPL_030_0_2__p)) + (net (rename state_machine_LDS_000_INT_6_0_m2_un0 "state_machine.LDS_000_INT_6_0_m2.un0") (joined + (portRef O (instanceRef state_machine_LDS_000_INT_6_0_m2_n)) + (portRef I1 (instanceRef state_machine_LDS_000_INT_6_0_m2_p)) )) (net (rename cpu_estse_0_un3 "cpu_estse_0.un3") (joined (portRef O (instanceRef cpu_estse_0_r)) @@ -2905,6 +2821,246 @@ (portRef O (instanceRef cpu_estse_2_n)) (portRef I1 (instanceRef cpu_estse_2_p)) )) + (net (rename BG_000_0_un3 "BG_000_0.un3") (joined + (portRef O (instanceRef BG_000_0_r)) + (portRef I1 (instanceRef BG_000_0_n)) + )) + (net (rename BG_000_0_un1 "BG_000_0.un1") (joined + (portRef O (instanceRef BG_000_0_m)) + (portRef I0 (instanceRef BG_000_0_p)) + )) + (net (rename BG_000_0_un0 "BG_000_0.un0") (joined + (portRef O (instanceRef BG_000_0_n)) + (portRef I1 (instanceRef BG_000_0_p)) + )) + (net (rename DSACK1_INT_0_un3 "DSACK1_INT_0.un3") (joined + (portRef O (instanceRef DSACK1_INT_0_r)) + (portRef I1 (instanceRef DSACK1_INT_0_n)) + )) + (net (rename DSACK1_INT_0_un1 "DSACK1_INT_0.un1") (joined + (portRef O (instanceRef DSACK1_INT_0_m)) + (portRef I0 (instanceRef DSACK1_INT_0_p)) + )) + (net (rename DSACK1_INT_0_un0 "DSACK1_INT_0.un0") (joined + (portRef O (instanceRef DSACK1_INT_0_n)) + (portRef I1 (instanceRef DSACK1_INT_0_p)) + )) + (net (rename AS_000_DMA_0_un3 "AS_000_DMA_0.un3") (joined + (portRef O (instanceRef AS_000_DMA_0_r)) + (portRef I1 (instanceRef AS_000_DMA_0_n)) + )) + (net (rename AS_000_DMA_0_un1 "AS_000_DMA_0.un1") (joined + (portRef O (instanceRef AS_000_DMA_0_m)) + (portRef I0 (instanceRef AS_000_DMA_0_p)) + )) + (net (rename AS_000_DMA_0_un0 "AS_000_DMA_0.un0") (joined + (portRef O (instanceRef AS_000_DMA_0_n)) + (portRef I1 (instanceRef AS_000_DMA_0_p)) + )) + (net (rename AS_000_INT_0_un3 "AS_000_INT_0.un3") (joined + (portRef O (instanceRef AS_000_INT_0_r)) + (portRef I1 (instanceRef AS_000_INT_0_n)) + )) + (net (rename AS_000_INT_0_un1 "AS_000_INT_0.un1") (joined + (portRef O (instanceRef AS_000_INT_0_m)) + (portRef I0 (instanceRef AS_000_INT_0_p)) + )) + (net (rename AS_000_INT_0_un0 "AS_000_INT_0.un0") (joined + (portRef O (instanceRef AS_000_INT_0_n)) + (portRef I1 (instanceRef AS_000_INT_0_p)) + )) + (net (rename VPA_SYNC_0_un3 "VPA_SYNC_0.un3") (joined + (portRef O (instanceRef VPA_SYNC_0_r)) + (portRef I1 (instanceRef VPA_SYNC_0_n)) + )) + (net (rename VPA_SYNC_0_un1 "VPA_SYNC_0.un1") (joined + (portRef O (instanceRef VPA_SYNC_0_m)) + (portRef I0 (instanceRef VPA_SYNC_0_p)) + )) + (net (rename VPA_SYNC_0_un0 "VPA_SYNC_0.un0") (joined + (portRef O (instanceRef VPA_SYNC_0_n)) + (portRef I1 (instanceRef VPA_SYNC_0_p)) + )) + (net (rename VMA_INT_0_un3 "VMA_INT_0.un3") (joined + (portRef O (instanceRef VMA_INT_0_r)) + (portRef I1 (instanceRef VMA_INT_0_n)) + )) + (net (rename VMA_INT_0_un1 "VMA_INT_0.un1") (joined + (portRef O (instanceRef VMA_INT_0_m)) + (portRef I0 (instanceRef VMA_INT_0_p)) + )) + (net (rename VMA_INT_0_un0 "VMA_INT_0.un0") (joined + (portRef O (instanceRef VMA_INT_0_n)) + (portRef I1 (instanceRef VMA_INT_0_p)) + )) + (net (rename BGACK_030_INT_0_un3 "BGACK_030_INT_0.un3") (joined + (portRef O (instanceRef BGACK_030_INT_0_r)) + (portRef I1 (instanceRef BGACK_030_INT_0_n)) + )) + (net (rename BGACK_030_INT_0_un1 "BGACK_030_INT_0.un1") (joined + (portRef O (instanceRef BGACK_030_INT_0_m)) + (portRef I0 (instanceRef BGACK_030_INT_0_p)) + )) + (net (rename BGACK_030_INT_0_un0 "BGACK_030_INT_0.un0") (joined + (portRef O (instanceRef BGACK_030_INT_0_n)) + (portRef I1 (instanceRef BGACK_030_INT_0_p)) + )) + (net (rename SIZE_DMA_0_0__un3 "SIZE_DMA_0_0_.un3") (joined + (portRef O (instanceRef SIZE_DMA_0_0__r)) + (portRef I1 (instanceRef SIZE_DMA_0_0__n)) + )) + (net (rename SIZE_DMA_0_0__un1 "SIZE_DMA_0_0_.un1") (joined + (portRef O (instanceRef SIZE_DMA_0_0__m)) + (portRef I0 (instanceRef SIZE_DMA_0_0__p)) + )) + (net (rename SIZE_DMA_0_0__un0 "SIZE_DMA_0_0_.un0") (joined + (portRef O (instanceRef SIZE_DMA_0_0__n)) + (portRef I1 (instanceRef SIZE_DMA_0_0__p)) + )) + (net (rename SIZE_DMA_0_1__un3 "SIZE_DMA_0_1_.un3") (joined + (portRef O (instanceRef SIZE_DMA_0_1__r)) + (portRef I1 (instanceRef SIZE_DMA_0_1__n)) + )) + (net (rename SIZE_DMA_0_1__un1 "SIZE_DMA_0_1_.un1") (joined + (portRef O (instanceRef SIZE_DMA_0_1__m)) + (portRef I0 (instanceRef SIZE_DMA_0_1__p)) + )) + (net (rename SIZE_DMA_0_1__un0 "SIZE_DMA_0_1_.un0") (joined + (portRef O (instanceRef SIZE_DMA_0_1__n)) + (portRef I1 (instanceRef SIZE_DMA_0_1__p)) + )) + (net (rename IPL_030_0_0__un3 "IPL_030_0_0_.un3") (joined + (portRef O (instanceRef IPL_030_0_0__r)) + (portRef I1 (instanceRef IPL_030_0_0__n)) + )) + (net (rename IPL_030_0_0__un1 "IPL_030_0_0_.un1") (joined + (portRef O (instanceRef IPL_030_0_0__m)) + (portRef I0 (instanceRef IPL_030_0_0__p)) + )) + (net (rename IPL_030_0_0__un0 "IPL_030_0_0_.un0") (joined + (portRef O (instanceRef IPL_030_0_0__n)) + (portRef I1 (instanceRef IPL_030_0_0__p)) + )) + (net (rename IPL_030_0_1__un3 "IPL_030_0_1_.un3") (joined + (portRef O (instanceRef IPL_030_0_1__r)) + (portRef I1 (instanceRef IPL_030_0_1__n)) + )) + (net (rename IPL_030_0_1__un1 "IPL_030_0_1_.un1") (joined + (portRef O (instanceRef IPL_030_0_1__m)) + (portRef I0 (instanceRef IPL_030_0_1__p)) + )) + (net (rename IPL_030_0_1__un0 "IPL_030_0_1_.un0") (joined + (portRef O (instanceRef IPL_030_0_1__n)) + (portRef I1 (instanceRef IPL_030_0_1__p)) + )) + (net (rename IPL_030_0_2__un3 "IPL_030_0_2_.un3") (joined + (portRef O (instanceRef IPL_030_0_2__r)) + (portRef I1 (instanceRef IPL_030_0_2__n)) + )) + (net (rename IPL_030_0_2__un1 "IPL_030_0_2_.un1") (joined + (portRef O (instanceRef IPL_030_0_2__m)) + (portRef I0 (instanceRef IPL_030_0_2__p)) + )) + (net (rename IPL_030_0_2__un0 "IPL_030_0_2_.un0") (joined + (portRef O (instanceRef IPL_030_0_2__n)) + (portRef I1 (instanceRef IPL_030_0_2__p)) + )) + (net (rename AMIGA_BUS_ENABLE_0_un3 "AMIGA_BUS_ENABLE_0.un3") (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_0_r)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_n)) + )) + (net (rename AMIGA_BUS_ENABLE_0_un1 "AMIGA_BUS_ENABLE_0.un1") (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_0_m)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_p)) + )) + (net (rename AMIGA_BUS_ENABLE_0_un0 "AMIGA_BUS_ENABLE_0.un0") (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_0_n)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_p)) + )) + (net (rename UDS_000_INT_0_un3 "UDS_000_INT_0.un3") (joined + (portRef O (instanceRef UDS_000_INT_0_r)) + (portRef I1 (instanceRef UDS_000_INT_0_n)) + )) + (net (rename UDS_000_INT_0_un1 "UDS_000_INT_0.un1") (joined + (portRef O (instanceRef UDS_000_INT_0_m)) + (portRef I0 (instanceRef UDS_000_INT_0_p)) + )) + (net (rename UDS_000_INT_0_un0 "UDS_000_INT_0.un0") (joined + (portRef O (instanceRef UDS_000_INT_0_n)) + (portRef I1 (instanceRef UDS_000_INT_0_p)) + )) + (net (rename LDS_000_INT_0_un3 "LDS_000_INT_0.un3") (joined + (portRef O (instanceRef LDS_000_INT_0_r)) + (portRef I1 (instanceRef LDS_000_INT_0_n)) + )) + (net (rename LDS_000_INT_0_un1 "LDS_000_INT_0.un1") (joined + (portRef O (instanceRef LDS_000_INT_0_m)) + (portRef I0 (instanceRef LDS_000_INT_0_p)) + )) + (net (rename LDS_000_INT_0_un0 "LDS_000_INT_0.un0") (joined + (portRef O (instanceRef LDS_000_INT_0_n)) + (portRef I1 (instanceRef LDS_000_INT_0_p)) + )) + (net (rename AS_030_000_SYNC_0_un3 "AS_030_000_SYNC_0.un3") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_r)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_n)) + )) + (net (rename AS_030_000_SYNC_0_un1 "AS_030_000_SYNC_0.un1") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_m)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_p)) + )) + (net (rename AS_030_000_SYNC_0_un0 "AS_030_000_SYNC_0.un0") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_n)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_p)) + )) + (net (rename DS_000_DMA_0_un3 "DS_000_DMA_0.un3") (joined + (portRef O (instanceRef DS_000_DMA_0_r)) + (portRef I1 (instanceRef DS_000_DMA_0_n)) + )) + (net (rename DS_000_DMA_0_un1 "DS_000_DMA_0.un1") (joined + (portRef O (instanceRef DS_000_DMA_0_m)) + (portRef I0 (instanceRef DS_000_DMA_0_p)) + )) + (net (rename DS_000_DMA_0_un0 "DS_000_DMA_0.un0") (joined + (portRef O (instanceRef DS_000_DMA_0_n)) + (portRef I1 (instanceRef DS_000_DMA_0_p)) + )) + (net (rename FPU_CS_INT_0_un3 "FPU_CS_INT_0.un3") (joined + (portRef O (instanceRef FPU_CS_INT_0_r)) + (portRef I1 (instanceRef FPU_CS_INT_0_n)) + )) + (net (rename FPU_CS_INT_0_un1 "FPU_CS_INT_0.un1") (joined + (portRef O (instanceRef FPU_CS_INT_0_m)) + (portRef I0 (instanceRef FPU_CS_INT_0_p)) + )) + (net (rename FPU_CS_INT_0_un0 "FPU_CS_INT_0.un0") (joined + (portRef O (instanceRef FPU_CS_INT_0_n)) + (portRef I1 (instanceRef FPU_CS_INT_0_p)) + )) + (net (rename DTACK_SYNC_0_un3 "DTACK_SYNC_0.un3") (joined + (portRef O (instanceRef DTACK_SYNC_0_r)) + (portRef I1 (instanceRef DTACK_SYNC_0_n)) + )) + (net (rename DTACK_SYNC_0_un1 "DTACK_SYNC_0.un1") (joined + (portRef O (instanceRef DTACK_SYNC_0_m)) + (portRef I0 (instanceRef DTACK_SYNC_0_p)) + )) + (net (rename DTACK_SYNC_0_un0 "DTACK_SYNC_0.un0") (joined + (portRef O (instanceRef DTACK_SYNC_0_n)) + (portRef I1 (instanceRef DTACK_SYNC_0_p)) + )) + (net (rename A0_DMA_0_un3 "A0_DMA_0.un3") (joined + (portRef O (instanceRef A0_DMA_0_r)) + (portRef I1 (instanceRef A0_DMA_0_n)) + )) + (net (rename A0_DMA_0_un1 "A0_DMA_0.un1") (joined + (portRef O (instanceRef A0_DMA_0_m)) + (portRef I0 (instanceRef A0_DMA_0_p)) + )) + (net (rename A0_DMA_0_un0 "A0_DMA_0.un0") (joined + (portRef O (instanceRef A0_DMA_0_n)) + (portRef I1 (instanceRef A0_DMA_0_p)) + )) ) (property orig_inst_of (string "BUS68030")) ) diff --git a/Logic/BUS68030.fse b/Logic/BUS68030.fse index 40a858a..91ab61b 100644 --- a/Logic/BUS68030.fse +++ b/Logic/BUS68030.fse @@ -1,46 +1,46 @@ -fsm_encoding {721922191} onehot +fsm_encoding {722422241} onehot -fsm_state_encoding {721922191} idle_p {00000001} +fsm_state_encoding {722422241} idle_p {00000001} -fsm_state_encoding {721922191} idle_n {00000010} +fsm_state_encoding {722422241} idle_n {00000010} -fsm_state_encoding {721922191} as_set_p {00000100} +fsm_state_encoding {722422241} as_set_p {00000100} -fsm_state_encoding {721922191} as_set_n {00001000} +fsm_state_encoding {722422241} as_set_n {00001000} -fsm_state_encoding {721922191} sample_dtack_p {00010000} +fsm_state_encoding {722422241} sample_dtack_p {00010000} -fsm_state_encoding {721922191} data_fetch_n {00100000} +fsm_state_encoding {722422241} data_fetch_n {00100000} -fsm_state_encoding {721922191} data_fetch_p {01000000} +fsm_state_encoding {722422241} data_fetch_p {01000000} -fsm_state_encoding {721922191} end_cycle_n {10000000} +fsm_state_encoding {722422241} end_cycle_n {10000000} -fsm_registers {721922191} {SM_AMIGA[0]} {SM_AMIGA[1]} {SM_AMIGA[2]} {SM_AMIGA[3]} {SM_AMIGA[4]} {SM_AMIGA[5]} {SM_AMIGA[6]} {SM_AMIGA[7]} +fsm_registers {722422241} {SM_AMIGA[0]} {SM_AMIGA[1]} {SM_AMIGA[2]} {SM_AMIGA[3]} {SM_AMIGA[4]} {SM_AMIGA[5]} {SM_AMIGA[6]} {SM_AMIGA[7]} -fsm_encoding {7115341152} original +fsm_encoding {7117341172} original -fsm_state_encoding {7115341152} e20 {0000} +fsm_state_encoding {7117341172} e20 {0000} -fsm_state_encoding {7115341152} e5 {0010} +fsm_state_encoding {7117341172} e5 {0010} -fsm_state_encoding {7115341152} e6 {0011} +fsm_state_encoding {7117341172} e6 {0011} -fsm_state_encoding {7115341152} e3 {0100} +fsm_state_encoding {7117341172} e3 {0100} -fsm_state_encoding {7115341152} e4 {0101} +fsm_state_encoding {7117341172} e4 {0101} -fsm_state_encoding {7115341152} e1 {0110} +fsm_state_encoding {7117341172} e1 {0110} -fsm_state_encoding {7115341152} e2 {0111} +fsm_state_encoding {7117341172} e2 {0111} -fsm_state_encoding {7115341152} e7 {1010} +fsm_state_encoding {7117341172} e7 {1010} -fsm_state_encoding {7115341152} e8 {1011} +fsm_state_encoding {7117341172} e8 {1011} -fsm_state_encoding {7115341152} e9 {1100} +fsm_state_encoding {7117341172} e9 {1100} -fsm_state_encoding {7115341152} e10 {1111} +fsm_state_encoding {7117341172} e10 {1111} -fsm_registers {7115341152} {cpu_est[3]} {cpu_est[2]} {cpu_est[1]} {cpu_est[0]} +fsm_registers {7117341172} {cpu_est[3]} {cpu_est[2]} {cpu_est[1]} {cpu_est[0]} diff --git a/Logic/BUS68030.prj b/Logic/BUS68030.prj index e8522f8..ed5ed91 100644 --- a/Logic/BUS68030.prj +++ b/Logic/BUS68030.prj @@ -1,6 +1,6 @@ #-- Lattice Semiconductor Corporation Ltd. #-- Synplify OEM project file c:/users/matze/documents/github/68030tk/logic\BUS68030.prj -#-- Written on Sat May 24 21:59:07 2014 +#-- Written on Sun May 25 20:57:45 2014 #device options diff --git a/Logic/BUS68030.srm b/Logic/BUS68030.srm index 1f3259a..1ac0941 100644 --- a/Logic/BUS68030.srm +++ b/Logic/BUS68030.srm @@ -185,254 +185,347 @@ NR#3H_8PED;R4 RNP3ONsEDVHC;R( RNP38lFkVDCHRDC(N; P#R3$VM_lRNb"sIF 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-R:fjjNRlOQERhbeRsRHlO_bkC##0C3_.sm -S=kOb_0C##.C_3dkM -jSQ=nh_6s; -R:fjjNRlOqERhR7.blsHRkOb_0C##.C_3Sl -mb=Ok#_C0_#C.M3k4Q -Sjb=Ok#_C09rd -4SQ=nh_6s; -R:fjjNRlOqERhR7.blsHRkOb_0C##.C_3SM -mb=Ok#_C0_#C.M3kjQ -Sj_=h4_n4HQ -S4b=Ok#_C0_#C.M3kds; -R:fjjNRlOmER)b.RsRHlO_bkC##0C3_.bm -S=kOb_0C#__M#C9rd -jSQ=kOb_0C##.C_34kM -4SQ=kOb_0C##.C_3jkM; - - - +_nS=Qjw_uzBQ1_hja_34kM +4SQ=zwu__B1Q_hajM3kjs; +R:fjjNRlOQERhbeRsRHlh(_g_SH +m_=hgH(_ +jSQ=gh_(s; +R:fjjNRlOQERhbeRsRHl7BaqiY_1hjB_3Ss +ma=7q_Bi1BYh_kj3MSd +Qhj=_6..;R +sfjj:ROlNEhRq7b.RsRHl7BaqiY_1hjB_3Sl +ma=7q_Bi1BYh_kj3MS4 +Qhj=__g(HQ +S4_=h.;.6 +fsRjR:jlENOR7qh.sRbH7lRaiqB_h1YB3_jMm +S=q7aB1i_Y_hBjM3kjQ +Sja=7q_Bi1BYh +4SQ=q7aB1i_Y_hBjM3kds; +R:fjjNRlOmER)b.RsRHl7BaqiY_1hjB_3Sb +m_=hgQ +Sja=7q_Bi1BYh_kj3MS4 +Q74=aiqB_h1YB3_jk;Mj +fsRjR:jlENOReQhRHbsljRq_q7v_sj3 +=Smq7j_vjq_3dkM +jSQ=_qj7_vq4J_#lNkG;R +sfjj:ROlNEhRq7b.RsRHlq7j_vjq_3Sl +mj=q_q7v_kj3MS4 +Qqj=jv_7qQ +S4j=q_q7v_#4_JGlkNs; +R:fjjNRlOqERhR7.blsHR_qj7_vqj +3MSqm=jv_7q3_jk +MjS=Qj#00NCN_lOMEHCq\3jv_7q +_cS=Q4q7j_vjq_3dkM;R +sfjj:ROlNE)Rm.sRbHqlRjv_7q3_jbm +S=4h_jQ +Sjj=q_q7v_kj3MS4 +Qq4=jv_7q3_jk;Mj diff --git a/Logic/BUS68030.srr b/Logic/BUS68030.srr index d807336..d48fad0 100644 --- a/Logic/BUS68030.srr +++ b/Logic/BUS68030.srr @@ -6,7 +6,7 @@ #Implementation: logic $ Start of Compile -#Sat May 24 21:59:07 2014 +#Sun May 25 20:57:46 2014 Synopsys VHDL Compiler, version comp201209rcp1, Build 283R, built Mar 19 2013 @N|Running in 64-bit mode @@ -19,8 +19,13 @@ VHDL syntax check successful! File C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd changed - recompiling @N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral Post processing for work.bus68030.behavioral -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":219:2:219:3|Pruning register CLK_REF(1 downto 0) -@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":219:2:219:3|Trying to extract state machine for register SM_AMIGA +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":99:36:99:38|Pruning register DTACK_DMA +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":224:2:224:3|Pruning register CLK_REF(1 downto 0) +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":118:34:118:36|Pruning register CLK_000_D0a +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":133:2:133:3|Pruning register CLK_CNT_N(1 downto 0) +@W: CL190 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":146:2:146:3|Optimizing register bit CLK_CNT_P(1) to a constant 0 +@W: CL260 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":146:2:146:3|Pruning register bit 1 of CLK_CNT_P(1 downto 0) +@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":224:2:224:3|Trying to extract state machine for register SM_AMIGA Extracted state machine for register SM_AMIGA State machine has 8 reachable states with original encodings of: 000 @@ -31,7 +36,7 @@ State machine has 8 reachable states with original encodings of: 101 110 111 -@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":115:34:115:36|Trying to extract state machine for register cpu_est +@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":117:34:117:36|Trying to extract state machine for register cpu_est Extracted state machine for register cpu_est State machine has 11 reachable states with original encodings of: 0000 @@ -47,7 +52,7 @@ State machine has 11 reachable states with original encodings of: 1111 @END Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Sat May 24 21:59:08 2014 +# Sun May 25 20:57:46 2014 ###########################################################] Map & Optimize Report @@ -56,7 +61,6 @@ Synopsys CPLD Technology Mapper, Version maplat, Build 621R, Built Mar 19 2013 Copyright (C) 1994-2012, Synopsys Inc. This software the associated documentation are confidential and proprietary to Synopsys, Inc. Your use or disclosure of this software subject to the terms and conditions of a written license agreement between you, or your company, and Synopsys, Inc. Product Version G-2012.09LC-SP1 @N: MF248 |Running in 64-bit mode. -@W: MO111 :|Tristate driver DSACK_tri on net DSACK[0] has its enable tied to GND (module BUS68030) Encoding state machine SM_AMIGA[0:7] (view:work.BUS68030(behavioral)) original code -> new code 000 -> 00000001 @@ -84,16 +88,16 @@ original code -> new code Resource Usage Report Simple gate primitives: -DFFRH 17 uses +DFFRH 15 uses DFFSH 30 uses BI_DIR 10 uses IBUF 30 uses BUFTH 4 uses OBUF 15 uses -AND2 170 uses -INV 145 uses -OR2 25 uses -XOR2 4 uses +AND2 191 uses +INV 159 uses +OR2 24 uses +XOR2 1 use @N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis. @@ -103,6 +107,6 @@ Mapper successful! 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z2wJ~VZAH0`pXx#My-$MYHj>_tYsn?FzJuNrAJ=0y@m!ae>S%dn@kn8!IDdE2aOoO%>gu3mh)=`ve21_yX`Wnfvc`Kh~M3?fi z^| new code 000 -> 00000001 @@ -84,16 +88,16 @@ original code -> new code Resource Usage Report Simple gate primitives: -DFFRH 17 uses +DFFRH 15 uses DFFSH 30 uses BI_DIR 10 uses IBUF 30 uses BUFTH 4 uses OBUF 15 uses -AND2 170 uses -INV 145 uses -OR2 25 uses -XOR2 4 uses +AND2 191 uses +INV 159 uses +OR2 24 uses +XOR2 1 use @N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis. @@ -103,6 +107,6 @@ Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 31MB peak: 95MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Sat May 24 21:59:09 2014 +# Sun May 25 20:57:47 2014 ###########################################################] diff --git a/Logic/dm/BUS68030_compiler.xdm b/Logic/dm/BUS68030_compiler.xdm index 6d06262..ca14f9b 100644 --- a/Logic/dm/BUS68030_compiler.xdm +++ b/Logic/dm/BUS68030_compiler.xdm @@ -26,6 +26,7 @@ S7RCVMI="F3s Anz1Ujjd3ELCNFPHs"NDR"D=PDE8"S> SRSqS SRSqSSqS"/ diff --git a/Logic/run_options.txt b/Logic/run_options.txt index 70fdf50..8740b48 100644 --- a/Logic/run_options.txt +++ b/Logic/run_options.txt @@ -1,7 +1,7 @@ #-- Synopsys, Inc. #-- Version G-2012.09LC-SP1 #-- Project file C:\users\matze\documents\github\68030tk\logic\run_options.txt -#-- Written on Sat May 24 21:59:07 2014 +#-- Written on Sun May 25 20:57:46 2014 #project files diff --git a/Logic/synlog/bus68030_fpga_mapper.srr b/Logic/synlog/bus68030_fpga_mapper.srr index 31f9e91..03965eb 100644 --- a/Logic/synlog/bus68030_fpga_mapper.srr +++ b/Logic/synlog/bus68030_fpga_mapper.srr @@ -2,7 +2,6 @@ Synopsys CPLD Technology Mapper, Version maplat, Build 621R, Built Mar 19 2013 Copyright (C) 1994-2012, Synopsys Inc. This software the associated documentation are confidential and proprietary to Synopsys, Inc. Your use or disclosure of this software subject to the terms and conditions of a written license agreement between you, or your company, and Synopsys, Inc. Product Version G-2012.09LC-SP1 @N: MF248 |Running in 64-bit mode. -@W: MO111 :|Tristate driver DSACK_tri on net DSACK[0] has its enable tied to GND (module BUS68030) Encoding state machine SM_AMIGA[0:7] (view:work.BUS68030(behavioral)) original code -> new code 000 -> 00000001 @@ -30,16 +29,16 @@ original code -> new code Resource Usage Report Simple gate primitives: -DFFRH 17 uses +DFFRH 15 uses DFFSH 30 uses BI_DIR 10 uses IBUF 30 uses BUFTH 4 uses OBUF 15 uses -AND2 170 uses -INV 145 uses -OR2 25 uses -XOR2 4 uses +AND2 191 uses +INV 159 uses +OR2 24 uses +XOR2 1 use @N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis. @@ -49,6 +48,6 @@ Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 31MB peak: 95MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Sat May 24 21:59:09 2014 +# Sun May 25 20:57:47 2014 ###########################################################] diff --git a/Logic/synlog/report/BUS68030_compiler_notes.txt b/Logic/synlog/report/BUS68030_compiler_notes.txt index e84b0df..3878fc8 100644 --- a/Logic/synlog/report/BUS68030_compiler_notes.txt +++ b/Logic/synlog/report/BUS68030_compiler_notes.txt @@ -2,6 +2,6 @@ @N: CD720 :"C:\Program Files (x86)\ispLever\synpbase\lib\vhd\std.vhd":123:18:123:21|Setting time resolution to ns @N:"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Top entity is set to BUS68030. @N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral -@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":219:2:219:3|Trying to extract state machine for register SM_AMIGA -@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":115:34:115:36|Trying to extract state machine for register cpu_est +@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":224:2:224:3|Trying to extract state machine for register SM_AMIGA +@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":117:34:117:36|Trying to extract state machine for register cpu_est diff --git a/Logic/synlog/report/BUS68030_compiler_runstatus.xml b/Logic/synlog/report/BUS68030_compiler_runstatus.xml index e6a7f6a..5a44a71 100644 --- a/Logic/synlog/report/BUS68030_compiler_runstatus.xml +++ b/Logic/synlog/report/BUS68030_compiler_runstatus.xml @@ -18,7 +18,7 @@ The file contains the job information from compiler to be displayed as part of t C:\users\matze\documents\github\68030tk\logic\synlog\report\BUS68030_compiler_notes.txt - 1 + 6 C:\users\matze\documents\github\68030tk\logic\synlog\report\BUS68030_compiler_warnings.txt @@ -29,13 +29,13 @@ The file contains the job information from compiler to be displayed as part of t - - 0h:00m:01s + 0h:00m:00s - - 1400961548 + 1401044266 \ No newline at end of file diff --git a/Logic/synlog/report/BUS68030_compiler_warnings.txt b/Logic/synlog/report/BUS68030_compiler_warnings.txt index 6e0c75d..b8ec61e 100644 --- a/Logic/synlog/report/BUS68030_compiler_warnings.txt +++ b/Logic/synlog/report/BUS68030_compiler_warnings.txt @@ -1,2 +1,7 @@ -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":219:2:219:3|Pruning register CLK_REF(1 downto 0) +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":99:36:99:38|Pruning register DTACK_DMA +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":224:2:224:3|Pruning register CLK_REF(1 downto 0) +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":118:34:118:36|Pruning register CLK_000_D0a +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":133:2:133:3|Pruning register CLK_CNT_N(1 downto 0) +@W: CL190 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":146:2:146:3|Optimizing register bit CLK_CNT_P(1) to a constant 0 +@W: CL260 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":146:2:146:3|Pruning register bit 1 of CLK_CNT_P(1 downto 0) diff --git a/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml b/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml index af40ca9..c50c149 100644 --- a/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml +++ b/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml @@ -18,7 +18,7 @@ The file contains the job information from mapper to be displayed as part of the -1 +0 C:\users\matze\documents\github\68030tk\logic\synlog\report\BUS68030_fpga_mapper_warnings.txt @@ -39,7 +39,7 @@ The file contains the job information from mapper to be displayed as part of the 95MB -1400961549 +1401044267 diff --git a/Logic/synlog/report/BUS68030_fpga_mapper_warnings.txt b/Logic/synlog/report/BUS68030_fpga_mapper_warnings.txt index 0580f57..e69de29 100644 --- a/Logic/synlog/report/BUS68030_fpga_mapper_warnings.txt +++ b/Logic/synlog/report/BUS68030_fpga_mapper_warnings.txt @@ -1 +0,0 @@ -@W: MO111 :|Tristate driver DSACK_tri on net DSACK[0] has its enable tied to GND (module BUS68030) diff --git a/Logic/syntmp/run_option.xml b/Logic/syntmp/run_option.xml index 5d078fd..c105249 100644 --- a/Logic/syntmp/run_option.xml +++ b/Logic/syntmp/run_option.xml @@ -3,7 +3,7 @@ Synopsys, Inc. Version G-2012.09LC-SP1 Project file C:\users\matze\documents\github\68030tk\logic\syntmp\run_option.xml - Written on Sat May 24 21:59:07 2014 + Written on Sun May 25 20:57:46 2014 --> diff --git a/Logic/synwork/BUS68030_compiler.fdep b/Logic/synwork/BUS68030_compiler.fdep index 12ded59..88becad 100644 --- a/Logic/synwork/BUS68030_compiler.fdep +++ b/Logic/synwork/BUS68030_compiler.fdep @@ -10,7 +10,7 @@ #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\umr_capim.vhd":1363694328 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\arith.vhd":1363694328 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\unsigned.vhd":1363694328 -#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1400961544 +#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1401044256 0 "C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd" vhdl # Dependency Lists (Uses list) diff --git a/Logic/synwork/BUS68030_compiler.fdeporig b/Logic/synwork/BUS68030_compiler.fdeporig index e635b0d..8a9c50f 100644 --- a/Logic/synwork/BUS68030_compiler.fdeporig +++ b/Logic/synwork/BUS68030_compiler.fdeporig @@ -10,7 +10,7 @@ #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\umr_capim.vhd":1363694328 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\arith.vhd":1363694328 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\unsigned.vhd":1363694328 -#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1400961544 +#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1401044256 0 "C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd" vhdl # Dependency Lists (Uses list) diff --git a/Logic/synwork/BUS68030_compiler.srs b/Logic/synwork/BUS68030_compiler.srs index 9646766bacbe8178db607992f26e3a3487fc768b..23219cda7981cbeec8229161911291a85dda178b 100644 GIT binary patch delta 7821 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