From f63fd90f80a25d97143243ae479cec175d734a2f Mon Sep 17 00:00:00 2001 From: MHeinrichs Date: Sun, 1 Feb 2015 21:42:02 +0100 Subject: [PATCH] DMA Improved for A2000 --- 68030_tk - DMA-Working@50MHz.jed | 1116 +++++ 68030_tk - Workin50MHz.jed | 1114 +++++ Logic/68030-68000-bus.vhd | 31 +- Logic/68030_TK.STY | 2 - Logic/68030_TK.cmi | 4 +- Logic/68030_TK.lci | 6 +- Logic/68030_TK.lct | 6 +- Logic/68030_TK.tcl | 2671 ++++++++++++ Logic/68030_tk - DMA-Working@50MHz.jed | 1155 ++--- Logic/68030_tk.crf | 2 +- Logic/68030_tk.data | 677 +++ Logic/68030_tk.grp | 28 + Logic/68030_tk.ipr | 2 +- Logic/68030_tk.isc | 888 ++++ Logic/68030_tk.lco | 254 ++ Logic/68030_tk.mod | 135 + Logic/68030_tk.plc | 165 + Logic/68030_tk.prd | 1981 +++++++++ Logic/68030_tk.rpt | 1932 +++++++++ Logic/68030_tk.svl | 2 + Logic/68030_tk.tal | 135 + Logic/68030_tk.vco | 267 ++ Logic/68030_tk.vct | 219 + Logic/68030_tk.xrf | 16 + ... => BSDLISCispMACH4A5-12864100PinTQFP.BSM} | 0 Logic/BUS68030.edi | 3737 +++++++++++++++++ Logic/BUS68030.naf | 61 + Logic/BUS68030.prj | 2 +- Logic/M4A5_128_64_XXYC.bsd | 1265 ------ Logic/Programming.xcf | 6 +- Logic/bus68030.srf | 14 +- Logic/m4a5.bsd | 24 - Logic/run_options.txt | 2 +- Logic/syndos.env | 39 + Logic/synlog/bus68030_fpga_mapper.srr | 6 +- .../report/BUS68030_compiler_errors.txt | 2 +- .../synlog/report/BUS68030_compiler_notes.txt | 2 +- .../report/BUS68030_compiler_runstatus.xml | 2 +- .../report/BUS68030_fpga_mapper_notes.txt | 2 +- .../report/BUS68030_fpga_mapper_runstatus.xml | 2 +- Logic/synsvf.svl | 4 + Logic/syntmp/run_option.xml | 2 +- Logic/synwork/BUS68030_compiler.fdep | 2 +- Logic/synwork/BUS68030_compiler.fdeporig | 2 +- Logic/synwork/BUS68030_compiler.srs | Bin 11743 -> 11708 bytes Logic/synwork/BUS68030_compiler.tlg | 4 +- 46 files changed, 16080 insertions(+), 1908 deletions(-) create mode 100644 68030_tk - DMA-Working@50MHz.jed create mode 100644 68030_tk - Workin50MHz.jed create mode 100644 Logic/68030_tk.data create mode 100644 Logic/68030_tk.grp create mode 100644 Logic/68030_tk.isc create mode 100644 Logic/68030_tk.lco create mode 100644 Logic/68030_tk.mod create mode 100644 Logic/68030_tk.plc create mode 100644 Logic/68030_tk.prd create mode 100644 Logic/68030_tk.rpt create mode 100644 Logic/68030_tk.svl create mode 100644 Logic/68030_tk.tal create mode 100644 Logic/68030_tk.vco create mode 100644 Logic/68030_tk.vct create mode 100644 Logic/68030_tk.xrf rename Logic/{M4A5_128_64_XXVC.bsd => BSDLISCispMACH4A5-12864100PinTQFP.BSM} (100%) create mode 100644 Logic/BUS68030.edi create mode 100644 Logic/BUS68030.naf delete mode 100644 Logic/M4A5_128_64_XXYC.bsd delete mode 100644 Logic/m4a5.bsd create mode 100644 Logic/syndos.env create mode 100644 Logic/synsvf.svl diff --git a/68030_tk - DMA-Working@50MHz.jed b/68030_tk - DMA-Working@50MHz.jed new file mode 100644 index 0000000..0ddaa87 --- /dev/null +++ b/68030_tk - DMA-Working@50MHz.jed @@ -0,0 +1,1116 @@ +|--------------------------------------------| +|- ispLEVER Fitter Report File -| +|- Version 1.7.00.05.28.13 -| +|- (c)Copyright, Lattice Semiconductor 2002 -| +|--------------------------------------------| + + +TITLE: +AUTHOR: +PATTERN: +COMPANY: +REVISION: +DATE: Sun Feb 01 21:36:55 2015 + +ABEL mach447a + * +QP100* +QF54096* +G0*F0* +NOTE Part Number : M4A5-128/64-10VC * +NOTE Handling of Preplacements No Change * +NOTE Use placement data from 68030_tk.vct * +NOTE Global clocks routable as PT clocks? N * +NOTE 22V10/MACH1XX/2XX S/R Compatibility? Y * +NOTE SET/RESET treated as DONT_CARE? Y * +NOTE Reduce Unforced Global Clocks? N * +NOTE Iterate between partitioning and place/route? Y * +NOTE Balanced partitioning? Y * +NOTE Reduce Routes Per Placement? N * +NOTE Spread Placement? Y * +NOTE Run Time Upper Bound in 15 minutes 0 * +NOTE Zero Hold Time For Input Registers? Y * +NOTE Table of pin names and numbers* +NOTE PINS A_23_:85 A_22_:84 SIZE_1_:79 A_21_:94 A_20_:93* +NOTE PINS A_31_:4 A_19_:97 A_18_:95 A_17_:59 A_16_:96 IPL_2_:68* +NOTE PINS FC_1_:58 IPL_1_:56 IPL_0_:67 AS_000:42 FC_0_:57* +NOTE PINS UDS_000:32 LDS_000:31 A1:60 nEXP_SPACE:14 BERR:41* +NOTE PINS BG_030:21 BGACK_000:28 CLK_030:64 CLK_000:11 CLK_OSZI:61* +NOTE PINS CLK_DIV_OUT:65 CLK_EXP:10 FPU_CS:78 FPU_SENSE:91* +NOTE PINS DTACK:30 AVEC:92 VPA:36 RST:86 AMIGA_BUS_DATA_DIR:48* +NOTE PINS AMIGA_BUS_ENABLE_LOW:20 AMIGA_BUS_ENABLE_HIGH:34* +NOTE PINS CIIN:47 SIZE_0_:70 A_30_:5 A_29_:6 A_28_:15 A_27_:16* +NOTE PINS A_26_:17 A_25_:18 A_24_:19 IPL_030_2_:9 IPL_030_1_:7* +NOTE PINS IPL_030_0_:8 AS_030:82 RW_000:80 DS_030:98 A0:69* +NOTE PINS BG_000:29 BGACK_030:83 DSACK1:81 E:66 VMA:35 RESET:3* +NOTE PINS RW:71 AMIGA_ADDR_ENABLE:33 * +NOTE Table of node names and numbers* +NOTE NODES RN_SIZE_1_:287 RN_AS_000:203 RN_UDS_000:185 RN_LDS_000:191 * +NOTE NODES RN_BERR:197 RN_SIZE_0_:263 RN_IPL_030_2_:131 * +NOTE NODES RN_IPL_030_1_:143 RN_IPL_030_0_:137 RN_AS_030:281 * +NOTE NODES RN_RW_000:269 RN_DS_030:101 RN_A0:257 RN_BG_000:175 * +NOTE NODES RN_BGACK_030:275 RN_DSACK1:283 RN_E:251 RN_VMA:173 * +NOTE NODES RN_RESET:125 RN_RW:245 RN_AMIGA_ADDR_ENABLE:179 * +NOTE NODES cpu_est_0_:113 cpu_est_1_:161 inst_AS_000_INT:163 * +NOTE NODES inst_AMIGA_BUS_ENABLE_DMA_LOW:128 inst_AS_030_D0:277 * +NOTE NODES inst_nEXP_SPACE_D0reg:155 inst_DS_030_D0:182 * +NOTE NODES inst_AS_030_000_SYNC:239 inst_BGACK_030_INT_D:272 * +NOTE NODES SIZE_DMA_0_:139 SIZE_DMA_1_:289 inst_VPA_D:169 * +NOTE NODES inst_UDS_000_INT:248 inst_LDS_000_INT:133 inst_DTACK_D0:262 * +NOTE NODES inst_CLK_OUT_PRE_50:200 inst_CLK_000_D1:176 inst_CLK_000_D0:260 * +NOTE NODES inst_CLK_000_PE:259 SM_AMIGA_7_:221 SM_AMIGA_5_:233 * +NOTE NODES inst_CLK_OUT_PRE:217 inst_CLK_000_NE:209 CLK_000_N_SYNC_11_:134 * +NOTE NODES CLK_000_P_SYNC_9_:166 cpu_est_2_:253 inst_CLK_000_NE_D0:167 * +NOTE NODES SM_AMIGA_3_:151 SM_AMIGA_0_:241 inst_AMIGA_BUS_ENABLE_DMA_HIGH:110 * +NOTE NODES SM_AMIGA_6_:227 RESET_DLY_0_:187 RESET_DLY_1_:193 * +NOTE NODES RESET_DLY_2_:121 RESET_DLY_3_:115 RESET_DLY_4_:109 * +NOTE NODES RESET_DLY_5_:103 RESET_DLY_6_:119 RESET_DLY_7_:118 * +NOTE NODES CLK_000_P_SYNC_0_:184 CLK_000_P_SYNC_1_:230 CLK_000_P_SYNC_2_:178 * +NOTE NODES CLK_000_P_SYNC_3_:160 CLK_000_P_SYNC_4_:112 CLK_000_P_SYNC_5_:154 * +NOTE NODES CLK_000_P_SYNC_6_:170 CLK_000_P_SYNC_7_:106 CLK_000_P_SYNC_8_:122 * +NOTE NODES CLK_000_N_SYNC_0_:194 CLK_000_N_SYNC_1_:164 CLK_000_N_SYNC_2_:256 * +NOTE NODES CLK_000_N_SYNC_3_:188 CLK_000_N_SYNC_4_:116 CLK_000_N_SYNC_5_:250 * +NOTE NODES CLK_000_N_SYNC_6_:158 CLK_000_N_SYNC_7_:224 CLK_000_N_SYNC_8_:266 * +NOTE NODES CLK_000_N_SYNC_9_:254 CLK_000_N_SYNC_10_:145 * +NOTE NODES inst_CLK_030_H:104 inst_DS_000_ENABLE:223 SM_AMIGA_1_:235 * +NOTE NODES SM_AMIGA_4_:229 SM_AMIGA_2_:157 CLK_OUT_PRE_Dreg:265 * +NOTE NODES un8_ciin:211 state_machine_un15_clk_000_ne_i_n:152 * +NOTE NODES CIIN_0:205 * +NOTE BLOCK 0 * +L000000 + 111111111011110111111111111111111111111111111101111111111111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111011111111111111111110111111111111111111111111111111111 + 111111111111111111111110111101111111111111111111111111111111111110 + 111111101111111111111111111111111111111111111111111111111111111111 + 110101111111111111111111111111111111111111111111011111110111111111 + 111111111111111111111111011011111111110111101111111111011111011111 + 111111111111111101111111111111111111011110111111110111111111111111 + 101111111111111111011111111111011111111111110111111110111111111111* +L000594 + 000000000000000000000000000000000000000000000000000000000000000000* +L000660 111111111111111111111111111111111111111101111111111111111111111111* +L000726 111111111111111111111111111111111111111111111111111101111111111111* +L000792 111111111111111101111111111111111111111111111111111111011111111111* +L000858 111111111011111111111111111111011111111111101111111111111111111111* +L000924 111111110111111111111111110111111111111111100111111111111111111111* +L000990 110111111111111111111110011111110111010111111101111111110111101101* +L001056 111111111111111111111111111111011111111111101011111111111111111111* +L001122 000000000000000000000000000000000000000000000000000000000000000000* +L001188 000000000000000000000000000000000000000000000000000000000000000000* +L001254 000000000000000000000000000000000000000000000000000000000000000000* +L001320 + 111111111111111111111111111111111111111111111111111111111111111111* +L001386 111111111011111110111111111011111111111110111111111110111111111111* +L001452 111111111111111110111111111111111111111110110111111110111111111111* +L001518 111111111011111111111111111011111111111110111111111110101111111111* +L001584 111111111111111111111111111111111111111110110111111110101111111111* +L001650 000000000000000000000000000000000000000000000000000000000000000000* +L001716 111111111111110111111111111111111111111111111111111111111111111111* +L001782 000000000000000000000000000000000000000000000000000000000000000000* +L001848 000000000000000000000000000000000000000000000000000000000000000000* +L001914 000000000000000000000000000000000000000000000000000000000000000000* +L001980 000000000000000000000000000000000000000000000000000000000000000000* +L002046 + 000000000000000000000000000000000000000000000000000000000000000000* +L002112 111111111111111111111111111111111111111111111111111111111111111111* +L002178 000000000000000000000000000000000000000000000000000000000000000000* +L002244 000000000000000000000000000000000000000000000000000000000000000000* +L002310 000000000000000000000000000000000000000000000000000000000000000000* +L002376 000000000000000000000000000000000000000000000000000000000000000000* +L002442 110111111111111111111110011111110111110111111101111111110111101101* +L002508 000000000000000000000000000000000000000000000000000000000000000000* +L002574 000000000000000000000000000000000000000000000000000000000000000000* +L002640 000000000000000000000000000000000000000000000000000000000000000000* +L002706 000000000000000000000000000000000000000000000000000000000000000000* +L002772 + 000000000000000000000000000000000000000000000000000000000000000000* +L002838 111111101111111110111111111111111111111110111111111110111111111111* +L002904 111111101111111111111111111111111111111110111111111110101111111111* +L002970 000000000000000000000000000000000000000000000000000000000000000000* +L003036 000000000000000000000000000000000000000000000000000000000000000000* +L003102 000000000000000000000000000000000000000000000000000000000000000000* +L003168 111111111111011111111111111111111111111111111111111111111111111111* +L003234 000000000000000000000000000000000000000000000000000000000000000000* +L003300 000000000000000000000000000000000000000000000000000000000000000000* +L003366 000000000000000000000000000000000000000000000000000000000000000000* +L003432 000000000000000000000000000000000000000000000000000000000000000000* +L003498 + 000000000000000000000000000000000000000000000000000000000000000000* +L003564 111111111111111111111111111111111111111111111101111111111111101111* +L003630 111111111111111111111111111111111111111111111110111111111111011111* +L003696 000000000000000000000000000000000000000000000000000000000000000000* +L003762 000000000000000000000000000000000000000000000000000000000000000000* +L003828 000000000000000000000000000000000000000000000000000000000000000000* +L003894 110111111111111111111110011111110111111111111101111111110111101101* +L003960 000000000000000000000000000000000000000000000000000000000000000000* +L004026 000000000000000000000000000000000000000000000000000000000000000000* +L004092 000000000000000000000000000000000000000000000000000000000000000000* +L004158 000000000000000000000000000000000000000000000000000000000000000000* +L004224 + 000000000000000000000000000000000000000000000000000000000000000000* +L004290 111101111111111111111111111111111111111111111111111111111111111111* +L004356 000000000000000000000000000000000000000000000000000000000000000000* +L004422 000000000000000000000000000000000000000000000000000000000000000000* +L004488 000000000000000000000000000000000000000000000000000000000000000000* +L004554 000000000000000000000000000000000000000000000000000000000000000000* +L004620 110111111111111111011110011111110111010111111101011111110111101101* +L004686 000000000000000000000000000000000000000000000000000000000000000000* +L004752 000000000000000000000000000000000000000000000000000000000000000000* +L004818 000000000000000000000000000000000000000000000000000000000000000000* +L004884 000000000000000000000000000000000000000000000000000000000000000000* +L004950 + 000000000000000000000000000000000000000000000000000000000000000000* +L005016 110111111111111111011110011111110111010111111101111111110111101101* +L005082 000000000000000000000000000000000000000000000000000000000000000000* +L005148 000000000000000000000000000000000000000000000000000000000000000000* +L005214 000000000000000000000000000000000000000000000000000000000000000000* +L005280 000000000000000000000000000000000000000000000000000000000000000000* +L005346 110111111111111111111110011111110111111111111101111111111111101101* +L005412 000000000000000000000000000000000000000000000000000000000000000000* +L005478 000000000000000000000000000000000000000000000000000000000000000000* +L005544 000000000000000000000000000000000000000000000000000000000000000000* +L005610 000000000000000000000000000000000000000000000000000000000000000000* +L005676 + 111111111111111111111111111110111111111110111111111111111111111111* +L005742 111111111111111111111111111111111111111111111111110111111111111111* +L005808 111111111111111111111111111111111111111111111111111111111111111111* +L005874 111111111111111111111111111111111111111111111111111111111111111111* +L005940 111111111111111111111111111111111111111111111111111111111111111111* +L006006 111111111111111111111111111111111111111111111111111111111111111111* +L006072 111111111111111111111111111111111111111111111111111111111111111111* +L006138 111111111111111111111111111111111111111111111111111111111111111111* +L006204 111111111111111111111111111111111111111111111111111111111111111111* +L006270 111111111111111111111111111111111111111111111111111111111111111111* +L006336 111111111111111111111111111111111111111111111111111111111111111111* +L006402 + 000000000000000000000000000000000000000000000000000000000000000000 + 101111111111111111111111111111111111111111111111111111111111111111* +L006534 0010* +L006538 10100110011000* +L006552 00110101010010* +L006566 10100100010100* +L006580 00100110011111* +L006594 00101011111001* +L006608 00100101010011* +L006622 11100110010000* +L006636 00100110010010* +L006650 10100110010001* +L006664 00100101010011* +L006678 00100110010000* +L006692 00100101010010* +L006706 00100101010000* +L006720 00100101010011* +L006734 00010110010101* +L006748 11100011110011* +NOTE BLOCK 1 * +L006762 + 110111111111111111111111101111111111111111011111111111111111111111 + 111111111111111111111111111110111111111111111111111111111111111111 + 111111101110111111111111111111111101101111111011111111111111110111 + 101111111111111111111011111111111111111111111111111111111111011111 + 111111111111111111111110111111111111111111111111111101111111111111 + 111111111111101111111111110111011111111111111111110111111101111111 + 111111111111110111111111111111111011110111111111111111011111111111 + 111111110111111101111111111111111111111110111111111111110111111111 + 111110111111111111011111111111111111111111111111101111111111111111* +L007356 + 111111111111111111111111111111111111111111111111111111111111111111* +L007422 111111111111110111011111110111011111110111111111110111110101111111* +L007488 111111111111111111111111111111111111111111111111111101111111111111* +L007554 000000000000000000000000000000000000000000000000000000000000000000* +L007620 000000000000000000000000000000000000000000000000000000000000000000* +L007686 000000000000000000000000000000000000000000000000000000000000000000* +L007752 111111111111111111111111011111111111111111111111111111111111111111* +L007818 000000000000000000000000000000000000000000000000000000000000000000* +L007884 000000000000000000000000000000000000000000000000000000000000000000* +L007950 000000000000000000000000000000000000000000000000000000000000000000* +L008016 000000000000000000000000000000000000000000000000000000000000000000* +L008082 + 111111111111111111111111111111111111111111111111111111111111111111* +L008148 111110111111111110111101111111111111111110111111111111111111111111* +L008214 111110111111111111111101111111111111111110111111111111101111111111* +L008280 000000000000000000000000000000000000000000000000000000000000000000* +L008346 000000000000000000000000000000000000000000000000000000000000000000* +L008412 000000000000000000000000000000000000000000000000000000000000000000* +L008478 111111111111111111111111111111111111111111111111111111111111111111* +L008544 111111111111111111111111111111111111111111111111111111111111111111* +L008610 111111111111111111111111111111111111111111111111111111111111111111* +L008676 111111111111111111111111111111111111111111111111111111111111111111* +L008742 111111111111111111111111111111111111111111111111111111111111111111* +L008808 + 111111111111111111111111111111111111111111111111111111111111111111* +L008874 111111111111111111111111111111110111111111110111111111111111111111* +L008940 111111111111111111111111111111111011111111111111111111111111011111* +L009006 000000000000000000000000000000000000000000000000000000000000000000* +L009072 000000000000000000000000000000000000000000000000000000000000000000* +L009138 000000000000000000000000000000000000000000000000000000000000000000* +L009204 111111110111111111111111111111111111111111111111111111111111110111* +L009270 111111111111111111111011111111111111111111111111111111111111110111* +L009336 111111111011101111110111111101111111101111111111111111111111111111* +L009402 000000000000000000000000000000000000000000000000000000000000000000* +L009468 000000000000000000000000000000000000000000000000000000000000000000* +L009534 + 111111111111111111111111111111111111111111111111111111111111111111* +L009600 111111111111111111111111111111111111111111011111111111111111111111* +L009666 111111111111111111111111111111111111111111111111111111111111111111* +L009732 111111111111111111111111111111111111111111111111111111111111111111* +L009798 111111111111111111111111111111111111111111111111111111111111111111* +L009864 111111111111111111111111111111111111111111111111111111111111111111* +L009930 111111111111111111111111111111111111111111111111111111111111111111* +L009996 111111111111111111111111111111111111111111111111111111111111111111* +L010062 111111111111111111111111111111111111111111111111111111111111111111* +L010128 111111111111111111111111111111111111111111111111111111111111111111* +L010194 111111111111111111111111111111111111111111111111111111111111111111* +L010260 + 000000000000000000000000000000000000000000000000000000000000000000* +L010326 011111111111111111111111111111110111111111111111111111111111111111* +L010392 111111111111111111111111111111111001111111111111111111111111111111* +L010458 000000000000000000000000000000000000000000000000000000000000000000* +L010524 000000000000000000000000000000000000000000000000000000000000000000* +L010590 000000000000000000000000000000000000000000000000000000000000000000* +L010656 111110111111111101111111111111111111111110111111111111101111111111* +L010722 111110111111111110111111111111111111111110111111111111011111111111* +L010788 000000000000000000000000000000000000000000000000000000000000000000* +L010854 000000000000000000000000000000000000000000000000000000000000000000* +L010920 000000000000000000000000000000000000000000000000000000000000000000* +L010986 + 000000000000000000000000000000000000000000000000000000000000000000* +L011052 111111111111111111111111111111111111111111111111111111111111111111* +L011118 111111111111111111111111111111111111111111111111111111111111111111* +L011184 111111111111111111111111111111111111111111111111111111111111111111* +L011250 111111111111111111111111111111111111111111111111111111111111111111* +L011316 111111111111111111111111111111111111111111111111111111111111111111* +L011382 111111111111111111111111111111111111111111111111111111111111111111* +L011448 111111111111111111111111111111111111111111111111111111111111111111* +L011514 111111111111111111111111111111111111111111111111111111111111111111* +L011580 111111111111111111111111111111111111111111111111111111111111111111* +L011646 111111111111111111111111111111111111111111111111111111111111111111* +L011712 + 000000000000000000000000000000000000000000000000000000000000000000* +L011778 111111011111111111111111111111110111111111111111111111111111111111* +L011844 110111111111111111111111111111111011111111111111111111111111111111* +L011910 000000000000000000000000000000000000000000000000000000000000000000* +L011976 000000000000000000000000000000000000000000000000000000000000000000* +L012042 000000000000000000000000000000000000000000000000000000000000000000* +L012108 111111111101111111111111111111111111111111111111111111111111111111* +L012174 111111111111111111111111111111111111111111111111111111111111111111* +L012240 111111111111111111111111111111111111111111111111111111111111111111* +L012306 111111111111111111111111111111111111111111111111111111111111111111* +L012372 111111111111111111111111111111111111111111111111111111111111111111* +L012438 + 111111111111111111111111111111111111111111111111111111111111111111* +L012504 111111111111111111111111111111111111111111111111111111111111111111* +L012570 111111111111111111111111111111111111111111111111111111111111111111* +L012636 111111111111111111111111111111111111111111111111111111111111111111* +L012702 111111111111111111111111111111111111111111111111111111111111111111* +L012768 111111111111111111111111111111111111111111111111111111111111111111* +L012834 111111111111111111111111111111111111111111111111111111111111111111* +L012900 111111111111111111111111111111111111111111111111111111111111111111* +L012966 111111111111111111111111111111111111111111111111111111111111111111* +L013032 111111111111111111111111111111111111111111111111111111111111111111* +L013098 111111111111111111111111111111111111111111111111111111111111111111* +L013164 + 111111111111111111111111111111111111111111111111101111111111111111 + 000000000000000000000000000000000000000000000000000000000000000000* +L013296 0010* +L013300 10100110011000* +L013314 00101011111110* +L013328 11100100010101* +L013342 11101011111111* +L013356 10100100010010* +L013370 10100100011110* +L013384 00010110010111* +L013398 11100011111111* +L013412 10100100011000* +L013426 10100100010010* +L013440 11011111110000* +L013454 11110011110011* +L013468 10100100011001* +L013482 00000110010011* +L013496 11011011110100* +L013510 11111111111111* +NOTE BLOCK 2 * +L013524 + 111111111111111111111101111111011111111111111111111111111111111111 + 111111111101111111101111101111111111111111111101111111111111111111 + 111110111111111111111111111110110111111111111111111111111111111111 + 111111110111110111111111111111111111011111101111101111111111111110 + 111111011111111111111111111111111101111111110111111111111111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 110111111111111110111111111111111111111111111111111111111111011111 + 111111111111111111111111110111111111111110111111111111101111111111 + 101111111111111111110111111111111111111111111111111001111111111111* +L014118 + 000000000000000000000000000000000000000000000000000000000000000000* +L014184 111111111111111111111111111111111111101110111111111111111111111111* +L014250 000000000000000000000000000000000000000000000000000000000000000000* +L014316 000000000000000000000000000000000000000000000000000000000000000000* +L014382 000000000000000000000000000000000000000000000000000000000000000000* +L014448 000000000000000000000000000000000000000000000000000000000000000000* +L014514 111111111111111111111111111111111111111111110111110111111111111111* +L014580 111111111111111111111111011101111111111111111111111011111111111111* +L014646 111111111111111111111111011101111111111111111011111111111111111111* +L014712 111111111111111101101101101111111111111111110111110111111111111111* +L014778 111111111111111101101101111110111111111111110111110111111111111111* +L014844 + 000000000000000000000000000000000000000000000000000000000000000000* +L014910 111111111111111111101101111111111111111111111111111111111111111111* +L014976 111111111111111111111110111111111011111111011111111110111111101101* +L015042 000000000000000000000000000000000000000000000000000000000000000000* +L015108 000000000000000000000000000000000000000000000000000000000000000000* +L015174 000000000000000000000000000000000000000000000000000000000000000000* +L015240 110111111111111111111111111111111111111111111111111111111111111111* +L015306 111111111111111101111110111110111011111111010111110110111111101101* +L015372 111111111111111101111110101111111011111111010111110110111111101101* +L015438 000000000000000000000000000000000000000000000000000000000000000000* +L015504 000000000000000000000000000000000000000000000000000000000000000000* +L015570 + 000000000000000000000000000000000000000000000000000000000000000000* +L015636 111111111101111111111111111111111111111111111111111111111111111111* +L015702 000000000000000000000000000000000000000000000000000000000000000000* +L015768 000000000000000000000000000000000000000000000000000000000000000000* +L015834 000000000000000000000000000000000000000000000000000000000000000000* +L015900 000000000000000000000000000000000000000000000000000000000000000000* +L015966 111111111111111101101101111111111111111111110111111111111111111111* +L016032 111111111111111101111110111111111011111111010111111110111111101101* +L016098 111111111111110111111111101111111111111111111111110111111111111111* +L016164 000000000000000000000000000000000000000000000000000000000000000000* +L016230 000000000000000000000000000000000000000000000000000000000000000000* +L016296 + 000000000000000000000000000000000000000000000000000000000000000000* +L016362 111111111111111111111111111111111111111111111111011111111111111111* +L016428 000000000000000000000000000000000000000000000000000000000000000000* +L016494 000000000000000000000000000000000000000000000000000000000000000000* +L016560 000000000000000000000000000000000000000000000000000000000000000000* +L016626 000000000000000000000000000000000000000000000000000000000000000000* +L016692 111111111111111111111111110111111111111111111111111111111111111111* +L016758 000000000000000000000000000000000000000000000000000000000000000000* +L016824 000000000000000000000000000000000000000000000000000000000000000000* +L016890 000000000000000000000000000000000000000000000000000000000000000000* +L016956 000000000000000000000000000000000000000000000000000000000000000000* +L017022 + 000000000000000000000000000000000000000000000000000000000000000000* +L017088 111111111111111111111111111111111011111111011111111111111111011111* +L017154 111111111111111111111111111111111011111111101111111111111111101101* +L017220 111111111111111111111111111111010111111111101111111111111111011101* +L017286 111111111111111111111111111111011111111111011111111111111111011110* +L017352 111111111111111111111111111111101011111111111111111111111111111111* +L017418 111101111111111111111111111111111111111111111111111111111111111111* +L017484 111111111111111111111111111111111111111111111110110111101111111111* +L017550 000000000000000000000000000000000000000000000000000000000000000000* +L017616 000000000000000000000000000000000000000000000000000000000000000000* +L017682 000000000000000000000000000000000000000000000000000000000000000000* +L017748 + 111111111111111111111111111111111111111111111111111111111111111111* +L017814 111111111111111111111111111111111101111111111111111111111111111111* +L017880 000000000000000000000000000000000000000000000000000000000000000000* +L017946 000000000000000000000000000000000000000000000000000000000000000000* +L018012 000000000000000000000000000000000000000000000000000000000000000000* +L018078 000000000000000000000000000000000000000000000000000000000000000000* +L018144 111111011111111111111111111111111111111111111111111111111111111111* +L018210 000000000000000000000000000000000000000000000000000000000000000000* +L018276 000000000000000000000000000000000000000000000000000000000000000000* +L018342 000000000000000000000000000000000000000000000000000000000000000000* +L018408 000000000000000000000000000000000000000000000000000000000000000000* +L018474 + 000000000000000000000000000000000000000000000000000000000000000000* +L018540 111111111111111101111111111111111111111111111111111111111111111111* +L018606 000000000000000000000000000000000000000000000000000000000000000000* +L018672 000000000000000000000000000000000000000000000000000000000000000000* +L018738 000000000000000000000000000000000000000000000000000000000000000000* +L018804 000000000000000000000000000000000000000000000000000000000000000000* +L018870 111111111111111111110111111111111111111111111111111111111111111111* +L018936 000000000000000000000000000000000000000000000000000000000000000000* +L019002 000000000000000000000000000000000000000000000000000000000000000000* +L019068 000000000000000000000000000000000000000000000000000000000000000000* +L019134 000000000000000000000000000000000000000000000000000000000000000000* +L019200 + 000000000000000000000000000000000000000000000000000000000000000000* +L019266 111111110111111111111111111111111111111111111111111111111111111111* +L019332 111111111111111111111111111111111111111111111111111111111111111111* +L019398 111111111111111111111111111111111111111111111111111111111111111111* +L019464 111111111111111111111111111111111111111111111111111111111111111111* +L019530 111111111111111111111111111111111111111111111111111111111111111111* +L019596 111111111111111111111111111111111111111111111111111111111111111111* +L019662 111111111111111111111111111111111111111111111111111111111111111111* +L019728 111111111111111111111111111111111111111111111111111111111111111111* +L019794 111111111111111111111111111111111111111111111111111111111111111111* +L019860 111111111111111111111111111111111111111111111111111111111111111111* +L019926 + 101111111111111111111111111111111111111111111111111111111111111111 + 000000000000000000000000000000000000000000000000000000000000000000* +L020058 0010* +L020062 01100011111000* +L020076 00100110010011* +L020090 11100011110001* +L020104 00000110010011* +L020118 00100100010000* +L020132 10100110010011* +L020146 00100110010001* +L020160 00100110010011* +L020174 11100110010000* +L020188 11100100010010* +L020202 00100110010110* +L020216 00100110011111* +L020230 00100110010001* +L020244 00100100010011* +L020258 00010110010000* +L020272 11101011111110* +NOTE BLOCK 3 * +L020286 + 011011111111111111111111111111111111111111111101111111111111111111 + 111111110111111111111111111111111111111111111011111111101111111111 + 111111111111111111111110101111111111111111111111111111110101111111 + 111110101111011111111111111111111111111111111111111111111111111011 + 111111111101111111111111111111111111111111111111111011111111101111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111110110111111111111011111011111111111111111111111111111 + 111111111111111111110111111011111111111110111111111111111111111111 + 111111111111111111111111111110110101111111101111111101111111111111* +L020880 + 111111111111111111111111111111111111111111111111111111111111111111* +L020946 111110011111111111111111111111111111101111111111111110011101111111* +L021012 101110011111111101111111111111111111011111111111111101111110111111* +L021078 000000000000000000000000000000000000000000000000000000000000000000* +L021144 000000000000000000000000000000000000000000000000000000000000000000* +L021210 000000000000000000000000000000000000000000000000000000000000000000* +L021276 111111111011011111111111110111111111111111110111111111111111111111* +L021342 111111111011111111111111111111111110111111111111111111111111111111* +L021408 000000000000000000000000000000000000000000000000000000000000000000* +L021474 000000000000000000000000000000000000000000000000000000000000000000* +L021540 000000000000000000000000000000000000000000000000000000000000000000* +L021606 + 111111111111111111111111111111111111111111111111111111111111111111* +L021672 111111111111111111111111111111111111111111110111111111111111111111* +L021738 000000000000000000000000000000000000000000000000000000000000000000* +L021804 000000000000000000000000000000000000000000000000000000000000000000* +L021870 000000000000000000000000000000000000000000000000000000000000000000* +L021936 000000000000000000000000000000000000000000000000000000000000000000* +L022002 111111111111111111111101111111111111111111111111111111111111111111* +L022068 000000000000000000000000000000000000000000000000000000000000000000* +L022134 000000000000000000000000000000000000000000000000000000000000000000* +L022200 000000000000000000000000000000000000000000000000000000000000000000* +L022266 000000000000000000000000000000000000000000000000000000000000000000* +L022332 + 111111111111111111111111111111111111111111111111111111111111111111* +L022398 111111111111111111111111111111111111111110111111111111111111111111* +L022464 111011111111011111111111111101110111111111111011110111111111111111* +L022530 111111111111111111111011111101111111111111111111111011111111111111* +L022596 000000000000000000000000000000000000000000000000000000000000000000* +L022662 000000000000000000000000000000000000000000000000000000000000000000* +L022728 111111111111111111111111111111111111111101111111110111111111111111* +L022794 111111111111111111111111111111011111111110111111111111111111111111* +L022860 000000000000000000000000000000000000000000000000000000000000000000* +L022926 000000000000000000000000000000000000000000000000000000000000000000* +L022992 000000000000000000000000000000000000000000000000000000000000000000* +L023058 + 111111111111111111111111111111111111111101111111111111111111111111* +L023124 111111111101111111111111111111111111111111111111111111111111111111* +L023190 000000000000000000000000000000000000000000000000000000000000000000* +L023256 000000000000000000000000000000000000000000000000000000000000000000* +L023322 000000000000000000000000000000000000000000000000000000000000000000* +L023388 000000000000000000000000000000000000000000000000000000000000000000* +L023454 111111111111111111111111111111111011111111110111111111111111111111* +L023520 000000000000000000000000000000000000000000000000000000000000000000* +L023586 000000000000000000000000000000000000000000000000000000000000000000* +L023652 000000000000000000000000000000000000000000000000000000000000000000* +L023718 000000000000000000000000000000000000000000000000000000000000000000* +L023784 + 111111111111111111111111111111111111111101111111111111111111111111* +L023850 111111111110111111111111111111111111111111111111111111111111011011* +L023916 000000000000000000000000000000000000000000000000000000000000000000* +L023982 000000000000000000000000000000000000000000000000000000000000000000* +L024048 000000000000000000000000000000000000000000000000000000000000000000* +L024114 000000000000000000000000000000000000000000000000000000000000000000* +L024180 111110011111111111111111111111111111101111111101111111111101111111* +L024246 000000000000000000000000000000000000000000000000000000000000000000* +L024312 000000000000000000000000000000000000000000000000000000000000000000* +L024378 000000000000000000000000000000000000000000000000000000000000000000* +L024444 000000000000000000000000000000000000000000000000000000000000000000* +L024510 + 000000000000000000000000000000000000000000000000000000000000000000* +L024576 111111111111111111111111011111111111111111111111111111111111111111* +L024642 111111111111111111111111111111111111111111111111111111111111111111* +L024708 111111111111111111111111111111111111111111111111111111111111111111* +L024774 111111111111111111111111111111111111111111111111111111111111111111* +L024840 111111111111111111111111111111111111111111111111111111111111111111* +L024906 111111111111111111111111111111111111111111111111111111111111111111* +L024972 111111111111111111111111111111111111111111111111111111111111111111* +L025038 111111111111111111111111111111111111111111111111111111111111111111* +L025104 111111111111111111111111111111111111111111111111111111111111111111* +L025170 111111111111111111111111111111111111111111111111111111111111111111* +L025236 + 111111111111111111111111111111111111111111111111111111111111111111* +L025302 111111111110111111111111111111111111111111111111111111111011011111* +L025368 111111111111111111111111111111111111111111111111111111111111111111* +L025434 111111111111111111111111111111111111111111111111111111111111111111* +L025500 111111111111111111111111111111111111111111111111111111111111111111* +L025566 111111111111111111111111111111111111111111111111111111111111111111* +L025632 111110011111110111111111111111111111101111111101111111111101111111* +L025698 111111111111111111111111111111111111111111111111111111111111111111* +L025764 111111111111111111111111111111111111111111111111111111111111111111* +L025830 111111111111111111111111111111111111111111111111111111111111111111* +L025896 111111111111111111111111111111111111111111111111111111111111111111* +L025962 + 000000000000000000000000000000000000000000000000000000000000000000* +L026028 111111111111111111111111111111110111111111111011111111111111111111* +L026094 111111111111111111111111111111111111111111111111111111111111111111* +L026160 111111111111111111111111111111111111111111111111111111111111111111* +L026226 111111111111111111111111111111111111111111111111111111111111111111* +L026292 111111111111111111111111111111111111111111111111111111111111111111* +L026358 111111111111111111111111111111111111111111111111111111111111111111* +L026424 111111111111111111111111111111111111111111111111111111111111111111* +L026490 111111111111111111111111111111111111111111111111111111111111111111* +L026556 111111111111111111111111111111111111111111111111111111111111111111* +L026622 111111111111111111111111111111111111111111111111111111111111111111* +L026688 + 000000000000000000000000000000000000000000000000000000000000000000 + 111111111111111111111111111111111111111111101111111111111111111111* +L026820 0010* +L026824 10100111010000* +L026838 11100110011110* +L026852 00100110011100* +L026866 00100110011111* +L026880 11100110010001* +L026894 10101111111111* +L026908 00100110010100* +L026922 00100110010010* +L026936 01100011110010* +L026950 00100101010011* +L026964 00010110010000* +L026978 11101011110010* +L026992 01111111111010* +L027006 00000101011111* +L027020 00010110010001* +L027034 11100011110011* +NOTE BLOCK 4 * +L027048 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111111111111111111111111111110111111101110111111111111111 + 111101111111111111111111111101111110111111010111111111111111111111 + 111011011111011111011111111111111111111111111111111111101111111111 + 111111111111110111111111111111111111111111111111111111111111111111 + 111111110111111111111111011111111111111111111111111111111111111111 + 111111111111111111111101111111111111111111111111101111111011110111 + 101111111101111111111111111011111111111111111111111110111101111110 + 111111111111111101111111111111101011101110111111111111111111111111* +L027642 + 110111110111111101111110101111111101111111111111111111011111111010* +L027708 000000000000000000000000000000000000000000000000000000000000000000* +L027774 000000000000000000000000000000000000000000000000000000000000000000* +L027840 000000000000000000000000000000000000000000000000000000000000000000* +L027906 000000000000000000000000000000000000000000000000000000000000000000* +L027972 000000000000000000000000000000000000000000000000000000000000000000* +L028038 101111111111101111111111111111111011111111111111111111110111111111* +L028104 011111111111111111111111111111111111111111111111111111111011111111* +L028170 000000000000000000000000000000000000000000000000000000000000000000* +L028236 000000000000000000000000000000000000000000000000000000000000000000* +L028302 000000000000000000000000000000000000000000000000000000000000000000* +L028368 + 011111111111111111111111111111111111111111111111111111111111111111* +L028434 111111111111111111111111111111101111111111111111111111111111111111* +L028500 111111111111111111111111111111111111111111111111111111111111111111* +L028566 111111111111111111111111111111111111111111111111111111111111111111* +L028632 111111111111111111111111111111111111111111111111111111111111111111* +L028698 111111111111111111111111111111111111111111111111111111111111111111* +L028764 111111111111111111111111111111111111111111111111111111111111111111* +L028830 111111111111111111111111111111111111111111111111111111111111111111* +L028896 111111111111111111111111111111111111111111111111111111111111111111* +L028962 111111111111111111111111111111111111111111111111111111111111111111* +L029028 111111111111111111111111111111111111111111111111111111111111111111* +L029094 + 000000000000000000000000000000000000000000000000000000000000000000* +L029160 111111111111111111111111111111111111111111111110111111111111111110* +L029226 111111111111111111111111111111111111111111111111111111111111111111* +L029292 111111111111111111111111111111111111111111111111111111111111111111* +L029358 111111111111111111111111111111111111111111111111111111111111111111* +L029424 111111111111111111111111111111111111111111111111111111111111111111* +L029490 111111101101111011101111111010111111011001101011111011111101111111* +L029556 111111111111011111111111111111111111111111111111101111111111111111* +L029622 000000000000000000000000000000000000000000000000000000000000000000* +L029688 000000000000000000000000000000000000000000000000000000000000000000* +L029754 000000000000000000000000000000000000000000000000000000000000000000* +L029820 + 000000000000000000000000000000000000000000000000000000000000000000* +L029886 111111111111111111111111111111111111111111111111111111111111111111* +L029952 111111111111111111111111111111111111111111111111111111111111111111* +L030018 111111111111111111111111111111111111111111111111111111111111111111* +L030084 111111111111111111111111111111111111111111111111111111111111111111* +L030150 111111111111111111111111111111111111111111111111111111111111111111* +L030216 111111111111111111111111111111111111111111111111111111111111111111* +L030282 111111111111111111111111111111111111111111111111111111111111111111* +L030348 111111111111111111111111111111111111111111111111111111111111111111* +L030414 111111111111111111111111111111111111111111111111111111111111111111* +L030480 111111111111111111111111111111111111111111111111111111111111111111* +L030546 + 000000000000000000000000000000000000000000000000000000000000000000* +L030612 111101111111111111111111111111111111111111111111111111111111111111* +L030678 111111111111111111111111111111111111111111111111111111111111111111* +L030744 111111111111111111111111111111111111111111111111111111111111111111* +L030810 111111111111111111111111111111111111111111111111111111111111111111* +L030876 111111111111111111111111111111111111111111111111111111111111111111* +L030942 111111111111111111111111111111111111111111111111111111111111111101* +L031008 111111101111111011101111111110111111111011101011111011111111111111* +L031074 000000000000000000000000000000000000000000000000000000000000000000* +L031140 000000000000000000000000000000000000000000000000000000000000000000* +L031206 000000000000000000000000000000000000000000000000000000000000000000* +L031272 + 000000000000000000000000000000000000000000000000000000000000000000* +L031338 111111111111111111111111111111111111111111111111111111111111111111* +L031404 111111111111111111111111111111111111111111111111111111111111111111* +L031470 111111111111111111111111111111111111111111111111111111111111111111* +L031536 111111111111111111111111111111111111111111111111111111111111111111* +L031602 111111111111111111111111111111111111111111111111111111111111111111* +L031668 111111111111111111111111111111111111111111111111111111111111111111* +L031734 111111111111111111111111111111111111111111111111111111111111111111* +L031800 111111111111111111111111111111111111111111111111111111111111111111* +L031866 111111111111111111111111111111111111111111111111111111111111111111* +L031932 111111111111111111111111111111111111111111111111111111111111111111* +L031998 + 111111111111111111111111111111111111111111111111111101111111111111* +L032064 111111101101111011101111111010111111011001101011111011111101111111* +L032130 111111111111111111111111111111111111111111111111111111111111111111* +L032196 111111111111111111111111111111111111111111111111111111111111111111* +L032262 111111111111111111111111111111111111111111111111111111111111111111* +L032328 111111111111111111111111111111111111111111111111111111111111111111* +L032394 111111111111111111111111111111011111111111111111111111111111111111* +L032460 111111111111111111111111111111111111111111111111111111111111111111* +L032526 111111111111111111111111111111111111111111111111111111111111111111* +L032592 111111111111111111111111111111111111111111111111111111111111111111* +L032658 111111111111111111111111111111111111111111111111111111111111111111* +L032724 + 111111111111111111111111111111111111111111111111111111111111111111* +L032790 111111111111111111111111111111111111111111111111111111111111111111* +L032856 111111111111111111111111111111111111111111111111111111111111111111* +L032922 111111111111111111111111111111111111111111111111111111111111111111* +L032988 111111111111111111111111111111111111111111111111111111111111111111* +L033054 111111111111111111111111111111111111111111111111111111111111111111* +L033120 111111111111111111111111111111111111111111111111111111111111111111* +L033186 111111111111111111111111111111111111111111111111111111111111111111* +L033252 111111111111111111111111111111111111111111111111111111111111111111* +L033318 111111111111111111111111111111111111111111111111111111111111111111* +L033384 111111111111111111111111111111111111111111111111111111111111111111* +L033450 + 000000000000000000000000000000000000000000000000000000000000000000 + 000000000000000000000000000000000000000000000000000000000000000000* +L033582 0010* +L033586 00100011110000* +L033600 10101111110011* +L033614 00010110010100* +L033628 11101111110010* +L033642 01111011111000* +L033656 10100011111111* +L033670 11010111110000* +L033684 11110011111110* +L033698 00110110010001* +L033712 11100111111111* +L033726 11011111110000* +L033740 11110011111111* +L033754 00111011110001* +L033768 00000110011111* +L033782 11010111111100* +L033796 11111111111111* +NOTE BLOCK 5 * +L033810 + 111111111111111111111111111111111111111111111011111111111111111011 + 111111111110111111111010111111111111101111111111111111111111111111 + 111110111111111111011111111110111111111111111111101111111111111111 + 111111111111010111111111111111111111111110111111111111101110111101 + 111111111111111111111111111111101111111111111111111011111111011111 + 111111110111111111111111011111111111111111111111111111111111111111 + 111111111111111101111111111111111001111111111111111101111111111111 + 111111111111111111111111111011111111111111111111111111111111111111 + 101011011111111111111111111111111111111111111111111111111111111111* +L034404 + 000000000000000000000000000000000000000000000000000000000000000000* +L034470 111111111111111111110111111111111111111111110111111111111111111111* +L034536 111110111111101011111111111110111111101111111011111111111110101111* +L034602 111110111111111011111111111110111111101111111011111111111110100111* +L034668 111110101111111011111111111110111111101111111011111111111110101111* +L034734 111110111101111011111111111110111111101111111011111111111110101111* +L034800 111001111111111111111111111111111011111111111111111111111111111111* +L034866 111011111111111111111111111111111011111111111111111111111111011111* +L034932 111011111111111111111111111111111111111111110111111111111111111111* +L034998 111011111111111111111011111111111111111111111111111111111101111111* +L035064 111011111111111111111111111111111011011111111111111111111111111111* +L035130 + 000000000000000000000000000000000000000000000000000000000000000000* +L035196 111111111111111111011111111111111111111111111111111111111111111111* +L035262 111011111111111111111011111101111111111111111111111111111111111111* +L035328 111011111111110111111011111111111111111111111111111111111111111111* +L035394 111011111111111111111111111111111111111111111111111111111111011101* +L035460 000000000000000000000000000000000000000000000000000000000000000000* +L035526 111110111111111111111111111111111111111111111111111111111111011111* +L035592 110111111111111111111111111011011111111111111111111111111111111111* +L035658 111101111111111111111101111111111111111111111111111111111111111111* +L035724 000000000000000000000000000000000000000000000000000000000000000000* +L035790 000000000000000000000000000000000000000000000000000000000000000000* +L035856 + 000000000000000000000000000000000000000000000000000000000000000000* +L035922 111111111111111111111111111111111111111111111111111111111111111111* +L035988 111111111111111111111111111111111111111111111111111111111111111111* +L036054 111111111111111111111111111111111111111111111111111111111111111111* +L036120 111111111111111111111111111111111111111111111111111111111111111111* +L036186 111111111111111111111111111111111111111111111111111111111111111111* +L036252 111111011110011111111111111111111111111111111111110111111111111011* +L036318 110111111111111111111011111111111111111111111111111111111101111111* +L036384 000000000000000000000000000000000000000000000000000000000000000000* +L036450 000000000000000000000000000000000000000000000000000000000000000000* +L036516 000000000000000000000000000000000000000000000000000000000000000000* +L036582 + 000000000000000000000000000000000000000000000000000000000000000000* +L036648 111111111111111101111111111111111111111111111111111111111111111111* +L036714 111101111111111111111111111111110111111111111111111111111111111111* +L036780 110111111111111111111011111101111111111111111111111111111111111111* +L036846 000000000000000000000000000000000000000000000000000000000000000000* +L036912 000000000000000000000000000000000000000000000000000000000000000000* +L036978 111111111111111111111111111111111111111111111111111111111111111111* +L037044 111111111111111111111111111111111111111111111111111111111111111111* +L037110 111111111111111111111111111111111111111111111111111111111111111111* +L037176 111111111111111111111111111111111111111111111111111111111111111111* +L037242 111111111111111111111111111111111111111111111111111111111111111111* +L037308 + 000000000000000000000000000000000000000000000000000000000000000000* +L037374 111111111111111111110111111111111111111111111111111111111101111111* +L037440 110101111111111111111111111111111011111111111111111111111111111111* +L037506 000000000000000000000000000000000000000000000000000000000000000000* +L037572 000000000000000000000000000000000000000000000000000000000000000000* +L037638 000000000000000000000000000000000000000000000000000000000000000000* +L037704 111111111111110111110111111111111111111111111111111111111111111111* +L037770 110111111111111111111111111111111011011111111111111111111111111111* +L037836 000000000000000000000000000000000000000000000000000000000000000000* +L037902 000000000000000000000000000000000000000000000000000000000000000000* +L037968 000000000000000000000000000000000000000000000000000000000000000000* +L038034 + 000000000000000000000000000000000000000000000000000000000000000000* +L038100 111111111111111111111111111111111111111111111111111111111111111111* +L038166 111111111111111111111111111111111111111111111111111111111111111111* +L038232 111111111111111111111111111111111111111111111111111111111111111111* +L038298 111111111111111111111111111111111111111111111111111111111111111111* +L038364 111111111111111111111111111111111111111111111111111111111111111111* +L038430 111111111111111111111111111111111111111111111111111111111111111111* +L038496 111111111111111111111111111111111111111111111111111111111111111111* +L038562 111111111111111111111111111111111111111111111111111111111111111111* +L038628 111111111111111111111111111111111111111111111111111111111111111111* +L038694 111111111111111111111111111111111111111111111111111111111111111111* +L038760 + 000000000000000000000000000000000000000000000000000000000000000000* +L038826 111111111111111111111111110111111111111111111111111111111111111111* +L038892 111111111011111111111111111111111111111111111111111111111111110111* +L038958 111111111111111111111111101111111110111101111111011110011111110111* +L039024 111111111111101111111111111111111111111111111111111111111111110111* +L039090 111111111111111111111111111111111111111111111111111011111111110111* +L039156 111111111111111111111111111111110111011111111011111111111111111111* +L039222 110111111111111111111011111111111111111111110111111111111111111111* +L039288 000000000000000000000000000000000000000000000000000000000000000000* +L039354 000000000000000000000000000000000000000000000000000000000000000000* +L039420 000000000000000000000000000000000000000000000000000000000000000000* +L039486 + 000000000000000000000000000000000000000000000000000000000000000000* +L039552 111011111111111111111111111111111111111111111111111111111111111111* +L039618 000000000000000000000000000000000000000000000000000000000000000000* +L039684 000000000000000000000000000000000000000000000000000000000000000000* +L039750 000000000000000000000000000000000000000000000000000000000000000000* +L039816 000000000000000000000000000000000000000000000000000000000000000000* +L039882 111111111111111111111111111111111111111111111111111111111111111111* +L039948 111111111111111111111111111111111111111111111111111111111111111111* +L040014 111111111111111111111111111111111111111111111111111111111111111111* +L040080 111111111111111111111111111111111111111111111111111111111111111111* +L040146 111111111111111111111111111111111111111111111111111111111111111111* +L040212 + 000000000000000000000000000000000000000000000000000000000000000000 + 101111111111111111111111111111111111111111111111111111111111111111* +L040344 0010* +L040348 10100110011110* +L040362 10110100010010* +L040376 00000110011110* +L040390 11000011110011* +L040404 10110100011111* +L040418 10110100010011* +L040432 00110110011110* +L040446 11101111110011* +L040460 10100100011111* +L040474 10100100010011* +L040488 11011011111110* +L040502 11111111111110* +L040516 10100110011110* +L040530 10100100011111* +L040544 11000011111110* +L040558 11111011111110* +NOTE BLOCK 6 * +L040572 + 111111110111111111111110101101111111111111111111111111111111111111 + 011111111111011111111111111111111111011111111111111111111111111111 + 111111111111110111111111111111101111111111111111111111111111111111 + 111110111111111111101011111111111111111111111111111111111101111010 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111111111111111111011111111111011110111111111111111111111 + 111111011111111111111111111111111111111111111101011111111011111111 + 111111111111111101111111111111110111111110111111111111111111111111 + 111111111111111111111111111111111111111111101111111110111111111111* +L041166 + 111111111111111111111111111111111111111111111111111111111111111111* +L041232 111111111111111110111111111111111111111110111111111110111011111111* +L041298 111111111111111111111111111111111111111110111111101110111011111111* +L041364 000000000000000000000000000000000000000000000000000000000000000000* +L041430 000000000000000000000000000000000000000000000000000000000000000000* +L041496 000000000000000000000000000000000000000000000000000000000000000000* +L041562 111111111111111111111111011111111111111111111111111111111111111111* +L041628 000000000000000000000000000000000000000000000000000000000000000000* +L041694 000000000000000000000000000000000000000000000000000000000000000000* +L041760 000000000000000000000000000000000000000000000000000000000000000000* +L041826 000000000000000000000000000000000000000000000000000000000000000000* +L041892 + 111111111111111111111111111111111111111111111111111111111111111111* +L041958 111111111111111111111111111111110111111111111111111111111111110111* +L042024 111111111111111111111011111111111111111111111111111111111111110111* +L042090 111111111111111111110111111111011011111111111111111111111111111111* +L042156 000000000000000000000000000000000000000000000000000000000000000000* +L042222 000000000000000000000000000000000000000000000000000000000000000000* +L042288 111111111111111111111111111111111111111111110111111111111111111111* +L042354 000000000000000000000000000000000000000000000000000000000000000000* +L042420 000000000000000000000000000000000000000000000000000000000000000000* +L042486 000000000000000000000000000000000000000000000000000000000000000000* +L042552 000000000000000000000000000000000000000000000000000000000000000000* +L042618 + 000000000000000000000000000000000000000000000000000000000000000000* +L042684 111101101111111111111111111111111111111111111111111111111111111111* +L042750 111101111111111011111111111111111111111111111111111111111111111111* +L042816 111111010111110111111111111111111111111111111111111111111111111110* +L042882 111111100111111011111111111111111111111111111111111111111111111110* +L042948 111101111011111111111111111111111111111111111111111111111111111111* +L043014 111111111111110111111111111111111111111111111111111111111111111101* +L043080 111101010111111111111111111111111111111111111111111111111111111111* +L043146 111111100111111011111111111111111111111111111111111111111111111111* +L043212 111111111011111111111111111111111111111111111111111111111111111101* +L043278 000000000000000000000000000000000000000000000000000000000000000000* +L043344 + 000000000000000000000000000000000000000000000000000000000000000000* +L043410 111111111111111111111101111111111111111111111111111111111111111111* +L043476 000000000000000000000000000000000000000000000000000000000000000000* +L043542 000000000000000000000000000000000000000000000000000000000000000000* +L043608 000000000000000000000000000000000000000000000000000000000000000000* +L043674 000000000000000000000000000000000000000000000000000000000000000000* +L043740 111111111111111111111111111111111111011111111111111111111111111111* +L043806 000000000000000000000000000000000000000000000000000000000000000000* +L043872 000000000000000000000000000000000000000000000000000000000000000000* +L043938 000000000000000000000000000000000000000000000000000000000000000000* +L044004 000000000000000000000000000000000000000000000000000000000000000000* +L044070 + 111111111111111111111111111111111111111110111111111111111110111111* +L044136 111111111111111101111111111111111111111110111111101110111111111111* +L044202 000000000000000000000000000000000000000000000000000000000000000000* +L044268 000000000000000000000000000000000000000000000000000000000000000000* +L044334 000000000000000000000000000000000000000000000000000000000000000000* +L044400 000000000000000000000000000000000000000000000000000000000000000000* +L044466 011111111111111111111111111111111111111111111111111111111111111111* +L044532 000000000000000000000000000000000000000000000000000000000000000000* +L044598 000000000000000000000000000000000000000000000000000000000000000000* +L044664 000000000000000000000000000000000000000000000000000000000000000000* +L044730 000000000000000000000000000000000000000000000000000000000000000000* +L044796 + 111111111111111111111111111111111111111110111111111111111110111111* +L044862 111111111111111111111111111101111111111111111111111111111111111111* +L044928 000000000000000000000000000000000000000000000000000000000000000000* +L044994 000000000000000000000000000000000000000000000000000000000000000000* +L045060 000000000000000000000000000000000000000000000000000000000000000000* +L045126 000000000000000000000000000000000000000000000000000000000000000000* +L045192 111111111111111111111111111111111111111111111101111111111111111111* +L045258 000000000000000000000000000000000000000000000000000000000000000000* +L045324 000000000000000000000000000000000000000000000000000000000000000000* +L045390 000000000000000000000000000000000000000000000000000000000000000000* +L045456 000000000000000000000000000000000000000000000000000000000000000000* +L045522 + 111111111111111111111111111111111111111110111111111111111111111111* +L045588 111111111111011111111111111111111111111011111111111111111111111111* +L045654 000000000000000000000000000000000000000000000000000000000000000000* +L045720 000000000000000000000000000000000000000000000000000000000000000000* +L045786 000000000000000000000000000000000000000000000000000000000000000000* +L045852 000000000000000000000000000000000000000000000000000000000000000000* +L045918 111111111111111111111111110111111111111111111111111111111111111111* +L045984 000000000000000000000000000000000000000000000000000000000000000000* +L046050 000000000000000000000000000000000000000000000000000000000000000000* +L046116 000000000000000000000000000000000000000000000000000000000000000000* +L046182 000000000000000000000000000000000000000000000000000000000000000000* +L046248 + 000000000000000000000000000000000000000000000000000000000000000000* +L046314 111111111111111111011111111111111111111111111111111111111111111111* +L046380 111111111111111111111111111111111111111111111111111111111111111111* +L046446 111111111111111111111111111111111111111111111111111111111111111111* +L046512 111111111111111111111111111111111111111111111111111111111111111111* +L046578 111111111111111111111111111111111111111111111111111111111111111111* +L046644 111111111111111111111111111111111111111111111111111111111111111111* +L046710 111111111111111111111111111111111111111111111111111111111111111111* +L046776 111111111111111111111111111111111111111111111111111111111111111111* +L046842 111111111111111111111111111111111111111111111111111111111111111111* +L046908 111111111111111111111111111111111111111111111111111111111111111111* +L046974 + 000000000000000000000000000000000000000000000000000000000000000000 + 111111111111111111111111111111111111111111101111111111111111111111* +L047106 0010* +L047110 11100110011000* +L047124 00101011111110* +L047138 10100110010101* +L047152 00100110011111* +L047166 10100110011000* +L047180 10100110010010* +L047194 00100110010000* +L047208 00100110010011* +L047222 00100110010001* +L047236 00100110010011* +L047250 00100110010100* +L047264 00100110010010* +L047278 00100011110010* +L047292 00100110010011* +L047306 00010110010001* +L047320 11101011111111* +NOTE BLOCK 7 * +L047334 + 111111111111111111101111111111101111111110111111111111110111111111 + 111111111111111111111011111111110111111111111111111011111111111110 + 111110111111111111111111111111111111111111111111101111111110111111 + 111011111111111111111111111101111111111111111111111111101111111111 + 111111111111111111111111111111111111111111111111111111111111111011 + 111111111111111011111111011111111111011111111111111111111111111111 + 011111100110011111111111111111111111111111111111111111111111111111 + 111111111111111101111111111011111111111011111110111111111111111111 + 111111111111111111111101111111111110111111101111111110111111101111* +L047928 + 000000000000000000000000000000000000000000000000000000000000000000* +L047994 111110111111111111111011111011111101111111111111111111111111101011* +L048060 111110111111111111111111111011101101111111111111111111111111101011* +L048126 111101111111111111111111111111111111111111111111111011111111111111* +L048192 000000000000000000000000000000000000000000000000000000000000000000* +L048258 000000000000000000000000000000000000000000000000000000000000000000* +L048324 110111111011101111111110101111111111011011111111011111011111111111* +L048390 000000000000000000000000000000000000000000000000000000000000000000* +L048456 000000000000000000000000000000000000000000000000000000000000000000* +L048522 000000000000000000000000000000000000000000000000000000000000000000* +L048588 000000000000000000000000000000000000000000000000000000000000000000* +L048654 + 000000000000000000000000000000000000000000000000000000000000000000* +L048720 111111111111111111111111111111111111111111111101111111111111111111* +L048786 111111111111111111111111111111111111111111111111111111111111111111* +L048852 111111111111111111111111111111111111111111111111111111111111111111* +L048918 111111111111111111111111111111111111111111111111111111111111111111* +L048984 111111111111111111111111111111111111111111111111111111111111111111* +L049050 111111111111111111111111111111111111111111111111111111111111111111* +L049116 111111111111111111111111111111111111111111111111111111111111111111* +L049182 111111111111111111111111111111111111111111111111111111111111111111* +L049248 111111111111111111111111111111111111111111111111111111111111111111* +L049314 111111111111111111111111111111111111111111111111111111111111111111* +L049380 + 111111111111111111111111111111111111111111111111111111111111111111* +L049446 111111111111111111111111111111111111011111111101111111111111111111* +L049512 111111111111111111110111111111111111011111111111111111111111111111* +L049578 000000000000000000000000000000000000000000000000000000000000000000* +L049644 000000000000000000000000000000000000000000000000000000000000000000* +L049710 000000000000000000000000000000000000000000000000000000000000000000* +L049776 111111111111111111111111111111111111110111111111111111111111111111* +L049842 111111111111111111111111111111111111111111111111111111111111111111* +L049908 111111111111111111111111111111111111111111111111111111111111111111* +L049974 111111111111111111111111111111111111111111111111111111111111111111* +L050040 111111111111111111111111111111111111111111111111111111111111111111* +L050106 + 111111111111111111111111111110111111111111111110111111111111111111* +L050172 111111111111111111111111111111111111111111111111111111111111111111* +L050238 111111111111111111111111111111111111111111111111111111111111111111* +L050304 111111111111111111111111111111111111111111111111111111111111111111* +L050370 111111111111111111111111111111111111111111111111111111111111111111* +L050436 111111111111111111111111111111111111111111111111111111111111111111* +L050502 111111111111111111111111111111111111111111111111111111111111111111* +L050568 111111111111111111111111111111111111111111111111111111111111111111* +L050634 111111111111111111111111111111111111111111111111111111111111111111* +L050700 111111111111111111111111111111111111111111111111111111111111111111* +L050766 111111111111111111111111111111111111111111111111111111111111111111* +L050832 + 111111111111111111111111111101111111111111111111111111111111111111* +L050898 111111111111111111111111111111111111111111111101111111111111111111* +L050964 111111011111111111111111111111111111111110111111111111111111111111* +L051030 111111111111111111111111111111111111111111111111111101111111111111* +L051096 011111111111111101111111111111111111111111111111111111111111111111* +L051162 000000000000000000000000000000000000000000000000000000000000000000* +L051228 111111111111111111111111111111111111111110111111111111111101111101* +L051294 111111111111111111111111111111111111111111111111111111110111111101* +L051360 111111111111111111011111111111111111111111111111111111111101111101* +L051426 111111111110111111111111111011111101111111111111111111111111111111* +L051492 000000000000000000000000000000000000000000000000000000000000000000* +L051558 + 111111111111111111111111111111111111111111111101111111111111111111* +L051624 111111111111111111111111111111111111111111111111111111111111111111* +L051690 111111111111111111111111111111111111111111111111111111111111111111* +L051756 111111111111111111111111111111111111111111111111111111111111111111* +L051822 111111111111111111111111111111111111111111111111111111111111111111* +L051888 111111111111111111111111111111111111111111111111111111111111111111* +L051954 111111111111111111111111111111111111111111111111111111111111111111* +L052020 111111111111111111111111111111111111111111111111111111111111111111* +L052086 111111111111111111111111111111111111111111111111111111111111111111* +L052152 111111111111111111111111111111111111111111111111111111111111111111* +L052218 111111111111111111111111111111111111111111111111111111111111111111* +L052284 + 111111111111111111111111111110111111111111111110111111111111111111* +L052350 111111111111110111111111111111111011111111111111111111111111111111* +L052416 111111111111111111111111111111111111111111111111111111111111111111* +L052482 111111111111111111111111111111111111111111111111111111111111111111* +L052548 111111111111111111111111111111111111111111111111111111111111111111* +L052614 111111111111111111111111111111111111111111111111111111111111111111* +L052680 101111111111111110111111111111111111111111111110111110111111111111* +L052746 111111111111111111111111111111111111111111111111111111111111111111* +L052812 111111111111111111111111111111111111111111111111111111111111111111* +L052878 111111111111111111111111111111111111111111111111111111111111111111* +L052944 111111111111111111111111111111111111111111111111111111111111111111* +L053010 + 111111111111111111111111111111111111111111111111111111111111111111* +L053076 111111111111111111111111111111111111111111111111111111111111111111* +L053142 111111111111111111111111111111111111111111111111111111111111111111* +L053208 111111111111111111111111111111111111111111111111111111111111111111* +L053274 111111111111111111111111111111111111111111111111111111111111111111* +L053340 111111111111111111111111111111111111111111111111111111111111111111* +L053406 111111111111111111111111111111111111111111111111111111111111111111* +L053472 111111111111111111111111111111111111111111111111111111111111111111* +L053538 111111111111111111111111111111111111111111111111111111111111111111* +L053604 111111111111111111111111111111111111111111111111111111111111111111* +L053670 111111111111111111111111111111111111111111111111111111111111111111* +L053736 + 000000000000000000000000000000000000000000000000000000000000000000 + 111111111111111111111111111111111111111111101111111111111111111111* +L053868 0010* +L053872 11100110011100* +L053886 01101011110010* +L053900 00010110010001* +L053914 11101011110011* +L053928 10100110010000* +L053942 00000110011110* +L053956 11011111110101* +L053970 11111011110011* +L053984 10100110011000* +L053998 11100110011110* +L054012 11010011110110* +L054026 11111011110011* +L054040 00111111110000* +L054054 00000110010010* +L054068 11010011111101* +L054082 11111011111111* +E1 +1 +01111100 +1 +01110010 +1 +00000000 +1 +01000011 +1 +01011001 +1 +00000000 +1 +10001110 +1 +10000010 +1 +* +C7442* +U00000000000000000000000000000000* +07B9 diff --git a/68030_tk - Workin50MHz.jed b/68030_tk - Workin50MHz.jed new file mode 100644 index 0000000..a10f94a --- /dev/null +++ b/68030_tk - Workin50MHz.jed @@ -0,0 +1,1114 @@ +|--------------------------------------------| +|- ispLEVER Fitter Report File -| +|- Version 1.7.00.05.28.13 -| +|- (c)Copyright, Lattice Semiconductor 2002 -| +|--------------------------------------------| + + +TITLE: +AUTHOR: +PATTERN: +COMPANY: +REVISION: +DATE: Thu Oct 16 21:59:16 2014 + +ABEL mach447a + * +QP100* +QF54096* +G0*F0* +NOTE Part Number : M4A5-128/64-10VC * +NOTE Handling of Preplacements No Change * +NOTE Use placement data from 68030_tk.vct * +NOTE Global clocks routable as PT clocks? N * +NOTE 22V10/MACH1XX/2XX S/R Compatibility? Y * +NOTE SET/RESET treated as DONT_CARE? Y * +NOTE Reduce Unforced Global Clocks? N * +NOTE Iterate between partitioning and place/route? Y * +NOTE Balanced partitioning? Y * +NOTE Reduce Routes Per Placement? N * +NOTE Spread Placement? Y * +NOTE Run Time Upper Bound in 15 minutes 0 * +NOTE Zero Hold Time For Input Registers? Y * +NOTE Table of pin names and numbers* +NOTE PINS A_30_:5 A_29_:6 SIZE_1_:79 A_28_:15 A_27_:16 A_31_:4* +NOTE PINS A_26_:17 A_25_:18 A_24_:19 A_23_:85 IPL_2_:68 A_22_:84* +NOTE PINS A_21_:94 FC_1_:58 A_20_:93 AS_030:82 A_19_:97 AS_000:42* +NOTE PINS A_18_:95 A_17_:59 A_16_:96 UDS_000:32 LDS_000:31* +NOTE PINS IPL_1_:56 A1:60 IPL_0_:67 nEXP_SPACE:14 FC_0_:57* +NOTE PINS BERR:41 BG_030:21 BGACK_000:28 CLK_030:64 CLK_000:11* +NOTE PINS CLK_OSZI:61 CLK_DIV_OUT:65 CLK_EXP:10 FPU_CS:78* +NOTE PINS FPU_SENSE:91 DTACK:30 AVEC:92 VPA:36 RST:86 AMIGA_BUS_DATA_DIR:48* +NOTE PINS AMIGA_BUS_ENABLE_LOW:20 AMIGA_BUS_ENABLE_HIGH:34* +NOTE PINS CIIN:47 SIZE_0_:70 IPL_030_2_:9 RW_000:80 DS_030:98* +NOTE PINS IPL_030_1_:7 IPL_030_0_:8 A0:69 BG_000:29 BGACK_030:83* +NOTE PINS DSACK1:81 E:66 VMA:35 RESET:3 RW:71 AMIGA_ADDR_ENABLE:33* +NOTE Table of node names and numbers* +NOTE NODES RN_SIZE_1_:271 RN_AS_030:281 RN_AS_000:203 RN_UDS_000:185 * +NOTE NODES RN_LDS_000:191 RN_BERR:197 RN_DTACK:173 RN_SIZE_0_:263 * +NOTE NODES RN_IPL_030_2_:131 RN_RW_000:269 RN_DS_030:101 * +NOTE NODES RN_IPL_030_1_:143 RN_IPL_030_0_:137 RN_A0:257 * +NOTE NODES RN_BG_000:175 RN_BGACK_030:275 RN_DSACK1:287 * +NOTE NODES RN_E:251 RN_VMA:179 RN_RESET:125 RN_RW:245 RN_AMIGA_ADDR_ENABLE:181 * +NOTE NODES cpu_est_0_:182 cpu_est_1_:193 inst_AS_000_INT:121 * +NOTE NODES inst_AMIGA_BUS_ENABLE_DMA_LOW:248 inst_AS_030_D0:209 * +NOTE NODES inst_nEXP_SPACE_D0:133 inst_DS_030_D0:268 inst_AS_030_000_SYNC:161 * +NOTE NODES inst_BGACK_030_INT_D:200 inst_AS_000_DMA:119 * +NOTE NODES SIZE_DMA_0_:104 SIZE_DMA_1_:115 inst_VPA_D:259 * +NOTE NODES inst_UDS_000_INT:151 inst_LDS_000_INT:167 inst_DTACK_D0:152 * +NOTE NODES RESET_DLY_7_:136 inst_CLK_OUT_PRE_50:253 inst_CLK_000_D1:188 * +NOTE NODES inst_CLK_000_D0:157 inst_CLK_000_PE:155 SM_AMIGA_7_:221 * +NOTE NODES SM_AMIGA_5_:227 inst_CLK_OUT_PRE:184 CLK_000_P_SYNC_9_:262 * +NOTE NODES inst_CLK_000_NE:113 CLK_000_N_SYNC_11_:118 cpu_est_2_:176 * +NOTE NODES inst_CLK_000_NE_D0:283 SM_AMIGA_3_:233 SM_AMIGA_0_:289 * +NOTE NODES inst_CLK_030_H:110 inst_AMIGA_BUS_ENABLE_DMA_HIGH:265 * +NOTE NODES SM_AMIGA_6_:223 CLK_000_P_SYNC_0_:178 CLK_000_P_SYNC_1_:112 * +NOTE NODES CLK_000_P_SYNC_2_:256 CLK_000_P_SYNC_3_:106 CLK_000_P_SYNC_4_:284 * +NOTE NODES CLK_000_P_SYNC_5_:250 CLK_000_P_SYNC_6_:230 CLK_000_P_SYNC_7_:266 * +NOTE NODES CLK_000_P_SYNC_8_:260 CLK_000_N_SYNC_0_:194 CLK_000_N_SYNC_1_:122 * +NOTE NODES CLK_000_N_SYNC_2_:169 CLK_000_N_SYNC_3_:254 CLK_000_N_SYNC_4_:217 * +NOTE NODES CLK_000_N_SYNC_5_:130 CLK_000_N_SYNC_6_:163 CLK_000_N_SYNC_7_:116 * +NOTE NODES CLK_000_N_SYNC_8_:211 CLK_000_N_SYNC_9_:278 CLK_000_N_SYNC_10_:272 * +NOTE NODES RESET_DLY_0_:235 RESET_DLY_1_:229 RESET_DLY_2_:146 * +NOTE NODES RESET_DLY_3_:140 RESET_DLY_4_:134 RESET_DLY_5_:128 * +NOTE NODES RESET_DLY_6_:145 inst_DS_000_ENABLE:103 SM_AMIGA_1_:239 * +NOTE NODES un16_ciin:205 SM_AMIGA_4_:109 SM_AMIGA_2_:241 * +NOTE NODES CLK_OUT_PRE_Dreg:139 N_91_i:224 * +NOTE BLOCK 0 * +L000000 + 111111111011111111111111111111111111111111111111111111111111111111 + 111111011111111111111110111111111111111111111111111111111111111111 + 111111111111111111111111101111111111111110111111111111110111111111 + 111111111111011111111011111111111111111111111111111111111111111111 + 111111111111111111111111111111111101111111111111111111111111111111 + 111111111111110111111111111111111111111111111111010111111111111111 + 111111111111111111111111111111011011011111101111111111011111111111 + 111101111111111101111111110111111111111111111110111111111111111111 + 101011111111111111011111111110111111111111111111111110111101111111* +L000594 + 000000000000000000000000000000000000000000000000000000000000000000* +L000660 111111111111111111111111111111111111111111111101111111111111111111* +L000726 111111110111111111111111111111011111111111111111011111111111111111* +L000792 111111111111111111111111111111111111111111111111111101111111111111* +L000858 111111111111111111111111111111111111111111011111011111111111111111* +L000924 111111111011111111111111111111111111111111101111111111111101111111* +L000990 111111111111111111111011111111111111111101111111111111111111111111* +L001056 110111111111111111011111111111111011111111111111111111111111111111* +L001122 111111111111111111110101111111111111111111111111111111111111111111* +L001188 000000000000000000000000000000000000000000000000000000000000000000* +L001254 000000000000000000000000000000000000000000000000000000000000000000* +L001320 + 111111111111111111111111111111111111111111111111111111111111111111* +L001386 111111111111111110111111111111111111111111111110111110101111111111* +L001452 111111111111111111111111111111101111111111101111111111111101111111* +L001518 111111111111111101111111111111111111111111111111111111011111111111* +L001584 000000000000000000000000000000000000000000000000000000000000000000* +L001650 000000000000000000000000000000000000000000000000000000000000000000* +L001716 111111111111111111111111011111111111111111111111111111111111111111* +L001782 000000000000000000000000000000000000000000000000000000000000000000* +L001848 000000000000000000000000000000000000000000000000000000000000000000* +L001914 000000000000000000000000000000000000000000000000000000000000000000* +L001980 000000000000000000000000000000000000000000000000000000000000000000* +L002046 + 000000000000000000000000000000000000000000000000000000000000000000* +L002112 111111111111111111111111111111111111111111111111111111111111111111* +L002178 000000000000000000000000000000000000000000000000000000000000000000* +L002244 000000000000000000000000000000000000000000000000000000000000000000* +L002310 000000000000000000000000000000000000000000000000000000000000000000* +L002376 000000000000000000000000000000000000000000000000000000000000000000* +L002442 111111111111111111110111111111111111011111111111111111111111111111* +L002508 110101111111101111111111111111111111111111111111111111111111111111* +L002574 000000000000000000000000000000000000000000000000000000000000000000* +L002640 000000000000000000000000000000000000000000000000000000000000000000* +L002706 000000000000000000000000000000000000000000000000000000000000000000* +L002772 + 000000000000000000000000000000000000000000000000000000000000000000* +L002838 111111111011111110111111111111111111111111111110101110111111111111* +L002904 111111111111111110111111111111011111111111111110111110111111111111* +L002970 111111111011111111111111111111111111111111111110101110101111111111* +L003036 111111111111111111111111111111011111111111111110111110101111111111* +L003102 000000000000000000000000000000000000000000000000000000000000000000* +L003168 111111111111111111111111110111111111111111111111111111111111111111* +L003234 000000000000000000000000000000000000000000000000000000000000000000* +L003300 000000000000000000000000000000000000000000000000000000000000000000* +L003366 000000000000000000000000000000000000000000000000000000000000000000* +L003432 000000000000000000000000000000000000000000000000000000000000000000* +L003498 + 000000000000000000000000000000000000000000000000000000000000000000* +L003564 111111111111110111111111111111111111111111111111111111111111111111* +L003630 000000000000000000000000000000000000000000000000000000000000000000* +L003696 000000000000000000000000000000000000000000000000000000000000000000* +L003762 000000000000000000000000000000000000000000000000000000000000000000* +L003828 000000000000000000000000000000000000000000000000000000000000000000* +L003894 111111111111111101111111111111111111111111111110111110101111111111* +L003960 111111111111111110111111111111111111111111111110111110011111111111* +L004026 000000000000000000000000000000000000000000000000000000000000000000* +L004092 000000000000000000000000000000000000000000000000000000000000000000* +L004158 000000000000000000000000000000000000000000000000000000000000000000* +L004224 + 000000000000000000000000000000000000000000000000000000000000000000* +L004290 111111011111111111111111111111111111111111111111111111111111111111* +L004356 000000000000000000000000000000000000000000000000000000000000000000* +L004422 000000000000000000000000000000000000000000000000000000000000000000* +L004488 000000000000000000000000000000000000000000000000000000000000000000* +L004554 000000000000000000000000000000000000000000000000000000000000000000* +L004620 111111111111111111111111111101111111111111111111111111111111111111* +L004686 000000000000000000000000000000000000000000000000000000000000000000* +L004752 000000000000000000000000000000000000000000000000000000000000000000* +L004818 000000000000000000000000000000000000000000000000000000000000000000* +L004884 000000000000000000000000000000000000000000000000000000000000000000* +L004950 + 000000000000000000000000000000000000000000000000000000000000000000* +L005016 111111111111111111111111111111111111111111111101111111111111111111* +L005082 111111111111111111111111111111111111111111111111111101111111111111* +L005148 111111111111111101111111111111111111111111111111111111011111111111* +L005214 111111111011111111111111111111111111111111111111011111111111111111* +L005280 000000000000000000000000000000000000000000000000000000000000000000* +L005346 111111111111111111110111111111111111111111111111111111111111111111* +L005412 110111111111111111111111111111111011111111111111111011111111111111* +L005478 000000000000000000000000000000000000000000000000000000000000000000* +L005544 000000000000000000000000000000000000000000000000000000000000000000* +L005610 000000000000000000000000000000000000000000000000000000000000000000* +L005676 + 111111111111111111111111111111111111111111111110101111111011111111* +L005742 111111111111111111111111111111111101111111111111111111111111111111* +L005808 111111111111111111111111111111111111111111111111111111111111111111* +L005874 111111111111111111111111111111111111111111111111111111111111111111* +L005940 111111111111111111111111111111111111111111111111111111111111111111* +L006006 111111111111111111111111111111111111111111111111111111111111111111* +L006072 111111111111111111111111111111111111111111111111111111111111111111* +L006138 111111111111111111111111111111111111111111111111111111111111111111* +L006204 111111111111111111111111111111111111111111111111111111111111111111* +L006270 111111111111111111111111111111111111111111111111111111111111111111* +L006336 111111111111111111111111111111111111111111111111111111111111111111* +L006402 + 000000000000000000000000000000000000000000000000000000000000000000 + 101111111111111111111111111111111111111111111111111111111111111111* +L006534 0010* +L006538 10100110011000* +L006552 10100100010010* +L006566 01000110010100* +L006580 00100110011111* +L006594 00101011111001* +L006608 10100100010011* +L006622 10100100010000* +L006636 00100110010010* +L006650 00100110010001* +L006664 11100110010011* +L006678 00100110010000* +L006692 00100110010010* +L006706 10100110010000* +L006720 11100110010011* +L006734 00010110010101* +L006748 11100011110011* +NOTE BLOCK 1 * +L006762 + 111111111111111111011111111111111111111111111111111101110111111111 + 111111111111011111111111011111011111101111111111111111111111111111 + 111111111111111111111101111110111101111111101011011111111111111111 + 111110111111111111110111111111111011111111111111111111011111111111 + 111111111111111111111111111111111111111111111111111111111101111111 + 110111111111111111111111111011111111111111111111111111111111111111 + 111111111110111101111111111111111111111111111111111111111111011111 + 111111110111111111111111111111111111111111111111111111111111111111 + 101111011111111111111111111111111111111111111111111111111111111111* +L007356 + 111111111111111111111111111111111111111111111111111111111111111111* +L007422 111111111111111111010101011101111111011111111111101111110111111111* +L007488 111111111111111111111111111111111111111111111111111111111101111111* +L007554 000000000000000000000000000000000000000000000000000000000000000000* +L007620 000000000000000000000000000000000000000000000000000000000000000000* +L007686 000000000000000000000000000000000000000000000000000000000000000000* +L007752 111111111111011111111111111111111111111111111111111111111111111111* +L007818 000000000000000000000000000000000000000000000000000000000000000000* +L007884 000000000000000000000000000000000000000000000000000000000000000000* +L007950 000000000000000000000000000000000000000000000000000000000000000000* +L008016 000000000000000000000000000000000000000000000000000000000000000000* +L008082 + 111111111111111111111111111111111111111111111111111111111111111111* +L008148 111111111111111111110111111111111111111111111111111111111111111111* +L008214 110110011001111111011101011101111111011111111111111111111111111111* +L008280 000000000000000000000000000000000000000000000000000000000000000000* +L008346 000000000000000000000000000000000000000000000000000000000000000000* +L008412 000000000000000000000000000000000000000000000000000000000000000000* +L008478 111111111111111111111111110111111111111111111111111111111111111111* +L008544 000000000000000000000000000000000000000000000000000000000000000000* +L008610 000000000000000000000000000000000000000000000000000000000000000000* +L008676 000000000000000000000000000000000000000000000000000000000000000000* +L008742 000000000000000000000000000000000000000000000000000000000000000000* +L008808 + 111111111111111111111111111111111111111111111111111111111111111111* +L008874 111111111111111111111111111111111111111111110111111111111111011111* +L008940 111111111111111111111111111111111111111111111111111111011111101111* +L009006 000000000000000000000000000000000000000000000000000000000000000000* +L009072 000000000000000000000000000000000000000000000000000000000000000000* +L009138 000000000000000000000000000000000000000000000000000000000000000000* +L009204 111111111111111111111111111111011111111111111111111111111111111111* +L009270 000000000000000000000000000000000000000000000000000000000000000000* +L009336 000000000000000000000000000000000000000000000000000000000000000000* +L009402 000000000000000000000000000000000000000000000000000000000000000000* +L009468 000000000000000000000000000000000000000000000000000000000000000000* +L009534 + 111111111111111111111111111111111111111111111111111111111111111111* +L009600 111111111111111111111101111111111111111111111111111111111111111111* +L009666 110110011001111111011111011101111111011111111111111111111111111111* +L009732 000000000000000000000000000000000000000000000000000000000000000000* +L009798 000000000000000000000000000000000000000000000000000000000000000000* +L009864 000000000000000000000000000000000000000000000000000000000000000000* +L009930 111111111111111111111111111111111111111111111111011111111111111111* +L009996 110110011001111111010101011101111111011111111111111111110111111111* +L010062 000000000000000000000000000000000000000000000000000000000000000000* +L010128 000000000000000000000000000000000000000000000000000000000000000000* +L010194 000000000000000000000000000000000000000000000000000000000000000000* +L010260 + 000000000000000000000000000000000000000000000000000000000000000000* +L010326 111111111111111111111111111111110111111111111111111111111111011111* +L010392 111111111111111111111111111111111101111111111111111111111111101111* +L010458 000000000000000000000000000000000000000000000000000000000000000000* +L010524 000000000000000000000000000000000000000000000000000000000000000000* +L010590 000000000000000000000000000000000000000000000000000000000000000000* +L010656 111111111111111101111111111111111111111111111111111111111111111111* +L010722 000000000000000000000000000000000000000000000000000000000000000000* +L010788 000000000000000000000000000000000000000000000000000000000000000000* +L010854 000000000000000000000000000000000000000000000000000000000000000000* +L010920 000000000000000000000000000000000000000000000000000000000000000000* +L010986 + 000000000000000000000000000000000000000000000000000000000000000000* +L011052 111111111111111111111111011111111111111111111111111111111111111111* +L011118 110110011001111111011111111101111111011111111111111111111111111111* +L011184 000000000000000000000000000000000000000000000000000000000000000000* +L011250 000000000000000000000000000000000000000000000000000000000000000000* +L011316 000000000000000000000000000000000000000000000000000000000000000000* +L011382 111111111111111111111111111111111111111111111111111111111111111111* +L011448 111111111111111111111111111111111111111111111111111111111111111111* +L011514 111111111111111111111111111111111111111111111111111111111111111111* +L011580 111111111111111111111111111111111111111111111111111111111111111111* +L011646 111111111111111111111111111111111111111111111111111111111111111111* +L011712 + 000000000000000000000000000000000000000000000000000000000000000000* +L011778 111111111111111111111111111111111111111111011111111111111111011111* +L011844 111111111111111111111111111111111111111111111111111101111111101111* +L011910 000000000000000000000000000000000000000000000000000000000000000000* +L011976 000000000000000000000000000000000000000000000000000000000000000000* +L012042 000000000000000000000000000000000000000000000000000000000000000000* +L012108 111111111111111111111111111111111111111111111111111111110111111111* +L012174 110110011001111111010101011101111111011111111111111111111111111111* +L012240 000000000000000000000000000000000000000000000000000000000000000000* +L012306 000000000000000000000000000000000000000000000000000000000000000000* +L012372 000000000000000000000000000000000000000000000000000000000000000000* +L012438 + 111111111111111111111111111111111111111111111111111111111111111111* +L012504 111111111111111111011111111111111111111111111111111111111111111111* +L012570 110110011001111111111111111101111111011111111111111111111111111111* +L012636 000000000000000000000000000000000000000000000000000000000000000000* +L012702 000000000000000000000000000000000000000000000000000000000000000000* +L012768 000000000000000000000000000000000000000000000000000000000000000000* +L012834 111111111111111111111111111111111111111111111111111111111111111111* +L012900 111111111111111111111111111111111111111111111111111111111111111111* +L012966 111111111111111111111111111111111111111111111111111111111111111111* +L013032 111111111111111111111111111111111111111111111111111111111111111111* +L013098 111111111111111111111111111111111111111111111111111111111111111111* +L013164 + 101111111111111111111111111111111111111111111111111111111111111111 + 000000000000000000000000000000000000000000000000000000000000000000* +L013296 0010* +L013300 10100110011000* +L013314 00101011111110* +L013328 00100110010101* +L013342 00100110011111* +L013356 10100100010010* +L013370 00100100011110* +L013384 00100110010110* +L013398 00100110011111* +L013412 10100100011001* +L013426 00100110010011* +L013440 00100110010000* +L013454 11100011110010* +L013468 10100100011000* +L013482 00100110010011* +L013496 00100110010101* +L013510 11101011111111* +NOTE BLOCK 2 * +L013524 + 111110011111111111111111111111011111111111111111111111111111111111 + 111111111111111111111111111010111111111111111111111111111111111111 + 101111111111110111111111111111111110111111111111111111110111111111 + 111111111101111110111111101111111111111111111111111111111111111011 + 111111111111111111111011111111111111111101110111111011111111111111 + 111111111111011111111111111111111111011111111111111111101111111111 + 111111110111111111011101111111111011111111111111111111111111111111 + 111111111111111111111111111111111111111111111110111111111111111111 + 111011111111111111111111111111111111111111101111111111111111111111* +L014118 + 000000000000000000000000000000000000000000000000000000000000000000* +L014184 111111111111111111111111111111111111111111111110111111111111111011* +L014250 000000000000000000000000000000000000000000000000000000000000000000* +L014316 000000000000000000000000000000000000000000000000000000000000000000* +L014382 000000000000000000000000000000000000000000000000000000000000000000* +L014448 000000000000000000000000000000000000000000000000000000000000000000* +L014514 111101111111111111111111111111111111111111110111111111111111111111* +L014580 111111111111111111111011111111111111111111110111111111111111111111* +L014646 011110111111111111110111111111111111111111111111111111111111111111* +L014712 000000000000000000000000000000000000000000000000000000000000000000* +L014778 000000000000000000000000000000000000000000000000000000000000000000* +L014844 + 000000000000000000000000000000000000000000000000000000000000000000* +L014910 111111111111111111011111111111111111111111111111111111111111111111* +L014976 111111111111111111111111111111111111111111111111111111111111111111* +L015042 111111111111111111111111111111111111111111111111111111111111111111* +L015108 111111111111111111111111111111111111111111111111111111111111111111* +L015174 111111111111111111111111111111111111111111111111111111111111111111* +L015240 111111111111111111111111111111111111111111111111111111111111111111* +L015306 111111111111111111111111111111111111111111111111111111111111111111* +L015372 111111111111111111111111111111111111111111111111111111111111111111* +L015438 111111111111111111111111111111111111111111111111111111111111111111* +L015504 111111111111111111111111111111111111111111111111111111111111111111* +L015570 + 000000000000000000000000000000000000000000000000000000000000000000* +L015636 111111111111111111111111110111111111111111111111111111111111111111* +L015702 111111111111111111111111111111111111111111111111111111111111111111* +L015768 111111111111111111111111111111111111111111111111111111111111111111* +L015834 111111111111111111111111111111111111111111111111111111111111111111* +L015900 111111111111111111111111111111111111111111111111111111111111111111* +L015966 111111011111111111111111111111111111111111111111111111111111111111* +L016032 111111111111111111111111111111111111111111111111111111111111111111* +L016098 111111111111111111111111111111111111111111111111111111111111111111* +L016164 111111111111111111111111111111111111111111111111111111111111111111* +L016230 111111111111111111111111111111111111111111111111111111111111111111* +L016296 + 000000000000000000000000000000000000000000000000000000000000000000* +L016362 111111111111111111111111111111111111111111111111111111111111111111* +L016428 111111111111111111111111111111111111111111111111111111111111111111* +L016494 111111111111111111111111111111111111111111111111111111111111111111* +L016560 111111111111111111111111111111111111111111111111111111111111111111* +L016626 111111111111111111111111111111111111111111111111111111111111111111* +L016692 111111111111111111111111111111111111111111111111111111111111111111* +L016758 111111111111111111111111111111111111111111111111111111111111111111* +L016824 111111111111111111111111111111111111111111111111111111111111111111* +L016890 111111111111111111111111111111111111111111111111111111111111111111* +L016956 111111111111111111111111111111111111111111111111111111111111111111* +L017022 + 000000000000000000000000000000000000000000000000000000000000000000* +L017088 111111111111111111111111111111110111111111111111111111111111111111* +L017154 111111111111110111111111111111111111101111111111111111111111111111* +L017220 111111111011100101111110011111111101111111111111111111111111111111* +L017286 111111111111110111111111111111111111111111111111111111111011111111* +L017352 111111111111110111111111111111111111111111111111111011111111111111* +L017418 111111111101111111111111111111111111111111111111111111111111111111* +L017484 111011111111111111111111111111111111111111111111111111111111111111* +L017550 000000000000000000000000000000000000000000000000000000000000000000* +L017616 000000000000000000000000000000000000000000000000000000000000000000* +L017682 000000000000000000000000000000000000000000000000000000000000000000* +L017748 + 111111111111111111111111111111111111111111111111111111111111111111* +L017814 111111111111111111111111111111111111111111111111111111111111111111* +L017880 111111111111111111111111111111111111111111111111111111111111111111* +L017946 111111111111111111111111111111111111111111111111111111111111111111* +L018012 111111111111111111111111111111111111111111111111111111111111111111* +L018078 111111111111111111111111111111111111111111111111111111111111111111* +L018144 111111111111111111111111111111111111111111111111111111111111111111* +L018210 111111111111111111111111111111111111111111111111111111111111111111* +L018276 111111111111111111111111111111111111111111111111111111111111111111* +L018342 111111111111111111111111111111111111111111111111111111111111111111* +L018408 111111111111111111111111111111111111111111111111111111111111111111* +L018474 + 000000000000000000000000000000000000000000000000000000000000000000* +L018540 111101111111111111111111111111011111111111111111111111111111111111* +L018606 111111111111111111111011111111011111111111111111111111111111111111* +L018672 101110111111111111110111111101111111111111111111111111101111111111* +L018738 000000000000000000000000000000000000000000000000000000000000000000* +L018804 000000000000000000000000000000000000000000000000000000000000000000* +L018870 111111111111111111111111111111111111111101111111111111111111111111* +L018936 111111111111111111111111111111111111111111111111111111111111111111* +L019002 111111111111111111111111111111111111111111111111111111111111111111* +L019068 111111111111111111111111111111111111111111111111111111111111111111* +L019134 111111111111111111111111111111111111111111111111111111111111111111* +L019200 + 000000000000000000000000000000000000000000000000000000000000000000* +L019266 111111111111111111111111111111111111111111111111111111111111111111* +L019332 111111111111111111111111111111111111111111111111111111111111111111* +L019398 111111111111111111111111111111111111111111111111111111111111111111* +L019464 111111111111111111111111111111111111111111111111111111111111111111* +L019530 111111111111111111111111111111111111111111111111111111111111111111* +L019596 111111111111111111111111111111111111111111111111111111111111111111* +L019662 111111111111111111111111111111111111111111111111111111111111111111* +L019728 111111111111111111111111111111111111111111111111111111111111111111* +L019794 111111111111111111111111111111111111111111111111111111111111111111* +L019860 111111111111111111111111111111111111111111111111111111111111111111* +L019926 + 000000000000000000000000000000000000000000000000000000000000000000 + 111111111111111111111111111111111111111111101111111111111111111111* +L020058 0010* +L020062 01100011111000* +L020076 10100110010011* +L020090 00010110010001* +L020104 11101011110011* +L020118 00110110010000* +L020132 00000110010010* +L020146 11011111110001* +L020160 11111011110011* +L020174 10100110010000* +L020188 00110110010010* +L020202 11010011110110* +L020216 11111011111111* +L020230 10100110010000* +L020244 00000110010010* +L020258 11011111110001* +L020272 11110011111111* +NOTE BLOCK 3 * +L020286 + 111111111111111111101111111111111111111111111101111111111111111111 + 111111110111111111111011111111111111111111111111111111111111111111 + 111111111111111111111111111111111111111111111111111111111101110111 + 111111111111011111111110111111011111111111111011111111111111111111 + 110111111101111111111111111111111111111111111111111011111111111111 + 111111111111111111111111111111111111111111011111011111111111011111 + 111111111111111110111111111111111110011111111111111111101111111111 + 111111111111110111111111111101110111111110111111111111111111111111 + 101101101111111111111111011111111111111111111111111111110111111111* +L020880 + 111111111111111111111111111111111111111111111111111111111111111111* +L020946 111111111111111111111111111111111101111111111111111111111111111111* +L021012 000000000000000000000000000000000000000000000000000000000000000000* +L021078 000000000000000000000000000000000000000000000000000000000000000000* +L021144 000000000000000000000000000000000000000000000000000000000000000000* +L021210 000000000000000000000000000000000000000000000000000000000000000000* +L021276 111111111011111101111111111111011111111111111111111111111111110111* +L021342 111110111011111111111111111111111111111111111111111111111111111111* +L021408 000000000000000000000000000000000000000000000000000000000000000000* +L021474 000000000000000000000000000000000000000000000000000000000000000000* +L021540 000000000000000000000000000000000000000000000000000000000000000000* +L021606 + 111111111111111111111111111111111111111111111111111111111111111111* +L021672 111111111111111111111111111111111111111111011111111111110111111111* +L021738 111111111111111111111101111111110111111111111111111111011111111111* +L021804 111111111111111111111111111111111011111111101111111111011111111111* +L021870 111111111111111111111111111111111111111111111111111111100111111111* +L021936 000000000000000000000000000000000000000000000000000000000000000000* +L022002 111111111111111111111111111111011111111111111111111111111111101111* +L022068 000000000000000000000000000000000000000000000000000000000000000000* +L022134 000000000000000000000000000000000000000000000000000000000000000000* +L022200 000000000000000000000000000000000000000000000000000000000000000000* +L022266 000000000000000000000000000000000000000000000000000000000000000000* +L022332 + 111111111111111111111111111111111111111111111111111111111111111111* +L022398 111111111111111111111110111101111111111111111111111111111111111111* +L022464 111111111111111111111101111101111111111111111111111111111111111111* +L022530 111111111111011111111110111110111011111111011111111111110111111111* +L022596 111111111111111111111011111101110111011111101111111111110111111111* +L022662 000000000000000000000000000000000000000000000000000000000000000000* +L022728 111111111111111111111111111111111111111110111111111111111111111111* +L022794 111111011111111111111111111111101111111111111111110111111110010111* +L022860 111111011111111011111111111111111111111111111111111011111111111111* +L022926 000000000000000000000000000000000000000000000000000000000000000000* +L022992 000000000000000000000000000000000000000000000000000000000000000000* +L023058 + 111111111111111111111111111111111111111101111111111111111111111111* +L023124 111111111111111111111111111111111011111111111111111111011111111111* +L023190 111111111111111111111111111111110111111111111111111111101111111111* +L023256 000000000000000000000000000000000000000000000000000000000000000000* +L023322 000000000000000000000000000000000000000000000000000000000000000000* +L023388 000000000000000000000000000000000000000000000000000000000000000000* +L023454 111111111111111111111111111111111111111111110111111111111111111111* +L023520 000000000000000000000000000000000000000000000000000000000000000000* +L023586 000000000000000000000000000000000000000000000000000000000000000000* +L023652 000000000000000000000000000000000000000000000000000000000000000000* +L023718 000000000000000000000000000000000000000000000000000000000000000000* +L023784 + 111111111111111111111111111111111111111101111111111111111111111111* +L023850 111011111110111111111111011111111111111111111111111111111111111111* +L023916 000000000000000000000000000000000000000000000000000000000000000000* +L023982 000000000000000000000000000000000000000000000000000000000000000000* +L024048 000000000000000000000000000000000000000000000000000000000000000000* +L024114 000000000000000000000000000000000000000000000000000000000000000000* +L024180 111111111111111111111111111111111111111101111111110111111111111111* +L024246 111111111111111111011111111111111111111110111111111111111111111111* +L024312 000000000000000000000000000000000000000000000000000000000000000000* +L024378 000000000000000000000000000000000000000000000000000000000000000000* +L024444 000000000000000000000000000000000000000000000000000000000000000000* +L024510 + 111111111111111111111111111111111111111110111111101111111111111011* +L024576 111111111111111111111111111111011111111111111111111111111111111111* +L024642 111111111111111111111111111111111111111111111111111111111111111111* +L024708 111111111111111111111111111111111111111111111111111111111111111111* +L024774 111111111111111111111111111111111111111111111111111111111111111111* +L024840 111111111111111111111111111111111111111111111111111111111111111111* +L024906 111111111111111111111111111111111111111111111111111111111111111111* +L024972 111111111111111111111111111111111111111111111111111111111111111111* +L025038 111111111111111111111111111111111111111111111111111111111111111111* +L025104 111111111111111111111111111111111111111111111111111111111111111111* +L025170 111111111111111111111111111111111111111111111111111111111111111111* +L025236 + 111111111111111111111111111111111111111111111111111111111111111111* +L025302 111111111110111111111111011111111111111111111110111111111111111111* +L025368 111111111111111111111111111111111111111111111111111111111111111111* +L025434 111111111111111111111111111111111111111111111111111111111111111111* +L025500 111111111111111111111111111111111111111111111111111111111111111111* +L025566 111111111111111111111111111111111111111111111111111111111111111111* +L025632 111111111111111111111101111111110111111111101111111111111111111111* +L025698 111111111111111111111110111111111011111111101111111111110111111111* +L025764 111111111111111111111110111111110111111111011111111111010111111111* +L025830 111111111111111111111101111111110111111111111111111111011011111111* +L025896 111111111111111111111111111111111111111111101111111111101111111111* +L025962 + 000000000000000000000000000000000000000000000000000000000000000000* +L026028 111111111111111111111111111111101111111111111111111111111111011111* +L026094 111111111111111111111111111111111111111111111111111111111111111111* +L026160 111111111111111111111111111111111111111111111111111111111111111111* +L026226 111111111111111111111111111111111111111111111111111111111111111111* +L026292 111111111111111111111111111111111111111111111111111111111111111111* +L026358 111111111111111111111111111111111111111111111111111111111111111111* +L026424 111111111111111111111111111111111111111111111111111111111111111111* +L026490 111111111111111111111111111111111111111111111111111111111111111111* +L026556 111111111111111111111111111111111111111111111111111111111111111111* +L026622 111111111111111111111111111111111111111111111111111111111111111111* +L026688 + 000000000000000000000000000000000000000000000000000000000000000000 + 101111111111111111111111111111111111111111111111111111111111111111* +L026820 0010* +L026824 00100011110010* +L026838 11100110011111* +L026852 10100110011111* +L026866 00100110011111* +L026880 00100110011000* +L026894 11100110011110* +L026908 10100110010100* +L026922 00100110010011* +L026936 01100011110011* +L026950 10101011110011* +L026964 00010110010110* +L026978 11101111110010* +L026992 01110011111010* +L027006 11100110011111* +L027020 00010110010001* +L027034 11101011110011* +NOTE BLOCK 4 * +L027048 + 111111111111111111111111111111111111111111111111111111111111111111 + 110111111111111111111111111111111111110111111111111111111111111111 + 111111011101111111111111110111111111111111111110101111110111111111 + 111111111111111111111101111111111101111110111111111111101111111111 + 111111111111110111111111111111111111111111111111111111111111111111 + 111111110111111111111111011111111111111111110111110111111111111111 + 111111111111101111111111111111111011111111111111111101111111110111 + 101111111111111111111111111110011111111111111111111111111101111110 + 111110111111111101101111111111111111101111101111111111111111111111* +L027642 + 111111110111111101111111101111111111111101111111011110011111111010* +L027708 000000000000000000000000000000000000000000000000000000000000000000* +L027774 000000000000000000000000000000000000000000000000000000000000000000* +L027840 000000000000000000000000000000000000000000000000000000000000000000* +L027906 000000000000000000000000000000000000000000000000000000000000000000* +L027972 000000000000000000000000000000000000000000000000000000000000000000* +L028038 101110111111011111111111111111111111111111111111111111111011111111* +L028104 011111111111101111111111111111111111111111111111111111111111111111* +L028170 000000000000000000000000000000000000000000000000000000000000000000* +L028236 000000000000000000000000000000000000000000000000000000000000000000* +L028302 000000000000000000000000000000000000000000000000000000000000000000* +L028368 + 011111111111111111111111111111111111111111111111111111111111111111* +L028434 011111111111111111111111111111111111111111111111111111111111111111* +L028500 111111111111111111111111111111111111111111111111111111111111111111* +L028566 111111111111111111111111111111111111111111111111111111111111111111* +L028632 111111111111111111111111111111111111111111111111111111111111111111* +L028698 111111111111111111111111111111111111111111111111111111111111111111* +L028764 111111111111111111111111111111111111111111111111111111111111111111* +L028830 111111111111111111111111111111111111111111111111111111111111111111* +L028896 111111111111111111111111111111111111111111111111111111111111111111* +L028962 111111111111111111111111111111111111111111111111111111111111111111* +L029028 111111111111111111111111111111111111111111111111111111111111111111* +L029094 + 000000000000000000000000000000000000000000000000000000000000000000* +L029160 111111111111111111111111111111111111111111111111111011111111111110* +L029226 111111111111111111111111111111111111111111111111111111111111111111* +L029292 111111111111111111111111111111111111111111111111111111111111111111* +L029358 111111111111111111111111111111111111111111111111111111111111111111* +L029424 111111111111111111111111111111111111111111111111111111111111111111* +L029490 111011101110111011011110111011011010011011111111111111111101111111* +L029556 111011101110111011111110111011111110111011111111111111110111111111* +L029622 111111111111111111111111111111111111111111111111111111110111111101* +L029688 000000000000000000000000000000000000000000000000000000000000000000* +L029754 000000000000000000000000000000000000000000000000000000000000000000* +L029820 + 000000000000000000000000000000000000000000000000000000000000000000* +L029886 111111111111111111111111111111111111111111111111111111111111111111* +L029952 111111111111111111111111111111111111111111111111111111111111111111* +L030018 111111111111111111111111111111111111111111111111111111111111111111* +L030084 111111111111111111111111111111111111111111111111111111111111111111* +L030150 111111111111111111111111111111111111111111111111111111111111111111* +L030216 111111111111111111111111111111111111111111111111111111111111111111* +L030282 111111111111111111111111111111111111111111111111111111111111111111* +L030348 111111111111111111111111111111111111111111111111111111111111111111* +L030414 111111111111111111111111111111111111111111111111111111111111111111* +L030480 111111111111111111111111111111111111111111111111111111111111111111* +L030546 + 000000000000000000000000000000000000000000000000000000000000000000* +L030612 111111111111111111111111111111111111111111111111111111111111111101* +L030678 111111111111111111111111111111111111111111111111111111111111111111* +L030744 111111111111111111111111111111111111111111111111111111111111111111* +L030810 111111111111111111111111111111111111111111111111111111111111111111* +L030876 111111111111111111111111111111111111111111111111111111111111111111* +L030942 111111111111111111111111111111111111111111110111111111111111111111* +L031008 111111111111111111111111111111111111111111111111111111111111111111* +L031074 111111111111111111111111111111111111111111111111111111111111111111* +L031140 111111111111111111111111111111111111111111111111111111111111111111* +L031206 111111111111111111111111111111111111111111111111111111111111111111* +L031272 + 000000000000000000000000000000000000000000000000000000000000000000* +L031338 111111111111111111111111111111111111111111111111111111111111111111* +L031404 111111111111111111111111111111111111111111111111111111111111111111* +L031470 111111111111111111111111111111111111111111111111111111111111111111* +L031536 111111111111111111111111111111111111111111111111111111111111111111* +L031602 111111111111111111111111111111111111111111111111111111111111111111* +L031668 111111111111111111111111111111111111111111111111111111111111111111* +L031734 111111111111111111111111111111111111111111111111111111111111111111* +L031800 111111111111111111111111111111111111111111111111111111111111111111* +L031866 111111111111111111111111111111111111111111111111111111111111111111* +L031932 111111111111111111111111111111111111111111111111111111111111111111* +L031998 + 111111111111111111111111111110111111111111111111111111111111111111* +L032064 111011101110111011011110111011011010011011111111111111111101111111* +L032130 111111111111111111111111111111111111111111111111111111111111111111* +L032196 111111111111111111111111111111111111111111111111111111111111111111* +L032262 111111111111111111111111111111111111111111111111111111111111111111* +L032328 111111111111111111111111111111111111111111111111111111111111111111* +L032394 111111111111111111111111111111111111111111111101111111111111111111* +L032460 111111111111111111111111111111111111111111111111111111111111111111* +L032526 111111111111111111111111111111111111111111111111111111111111111111* +L032592 111111111111111111111111111111111111111111111111111111111111111111* +L032658 111111111111111111111111111111111111111111111111111111111111111111* +L032724 + 111111111111111111111111111111111111111111111111111111111111111111* +L032790 111111111111111111111111111111111111111111111111111111111111111111* +L032856 111111111111111111111111111111111111111111111111111111111111111111* +L032922 111111111111111111111111111111111111111111111111111111111111111111* +L032988 111111111111111111111111111111111111111111111111111111111111111111* +L033054 111111111111111111111111111111111111111111111111111111111111111111* +L033120 111111111111111111111111111111111111111111111111111111111111111111* +L033186 111111111111111111111111111111111111111111111111111111111111111111* +L033252 111111111111111111111111111111111111111111111111111111111111111111* +L033318 111111111111111111111111111111111111111111111111111111111111111111* +L033384 111111111111111111111111111111111111111111111111111111111111111111* +L033450 + 000000000000000000000000000000000000000000000000000000000000000000 + 111111111111111111111111111111111111111111101111111111111111111111* +L033582 0010* +L033586 00100011110000* +L033600 10101111110011* +L033614 00010110010100* +L033628 11101111110010* +L033642 01111011111000* +L033656 11100011111111* +L033670 11011111110000* +L033684 11111011111110* +L033698 00110110010001* +L033712 00000110011111* +L033726 11011111110000* +L033740 11110011111111* +L033754 00111011110000* +L033768 00000110011110* +L033782 11010111111101* +L033796 11111111111110* +NOTE BLOCK 5 * +L033810 + 111111111111101111111111111111111110111111111111111111111111111111 + 111111111111111111111111101111111111101111111111111111111111111111 + 011111111111111111101111111111110111111111111111111111111111111110 + 111111111110110111111110111101111111111111110111111111111010111111 + 111111111111111111111111111111101111111111111111111011111111111111 + 111111111111111111111111111111111111111001011111111111111111111111 + 111111111111111111111111111111111111111111111111111111101111011111 + 111101110111111111110111111111111111111111111111111111111111111111 + 111011011111111111111111111111111111111111111111101111111111111111* +L034404 + 000000000000000000000000000000000000000000000000000000000000000000* +L034470 111111111111111111111111111101111111110111111111111111111111111111* +L034536 101110111111101111111111111111101110111011111111111111111110111110* +L034602 111110111111101111111111111111100110111011111111111111111110111110* +L034668 111110111111101111111111111111101110111010111111111111111110111110* +L034734 111110111111100111111111111111101110111011111111111111111110111110* +L034800 111011111111111111111111111111111111111111111111111111111101101111* +L034866 111011111111111111111111111111111111110111111111111111111111111111* +L034932 111011111111111111111111111110011111111111111111111111111111111111* +L034998 111011111111111111111111111111111101111111111111111111111111101111* +L035064 111001111111111111111111111110111111111111111111111111111111111111* +L035130 + 000000000000000000000000000000000000000000000000000000000000000000* +L035196 111011111111011111111111111110111111111111111111111111111111111111* +L035262 111011111111111111111111111111111111111111111111111111111011111101* +L035328 000000000000000000000000000000000000000000000000000000000000000000* +L035394 000000000000000000000000000000000000000000000000000000000000000000* +L035460 000000000000000000000000000000000000000000000000000000000000000000* +L035526 011111111111111011111111111111111011111101111111110111111111111111* +L035592 110111111111111111111111111110011111111111111111111111111111111111* +L035658 000000000000000000000000000000000000000000000000000000000000000000* +L035724 000000000000000000000000000000000000000000000000000000000000000000* +L035790 000000000000000000000000000000000000000000000000000000000000000000* +L035856 + 000000000000000000000000000000000000000000000000000000000000000000* +L035922 111111111111111111111111011111111111111111111011111111111111011111* +L035988 111111011011111111111001101111111111111111101111111111111111011111* +L036054 000000000000000000000000000000000000000000000000000000000000000000* +L036120 000000000000000000000000000000000000000000000000000000000000000000* +L036186 000000000000000000000000000000000000000000000000000000000000000000* +L036252 111111111111111111011111111111111111111111111111111111111111111111* +L036318 111111011011111111111110111111111111011111011111111111011111111111* +L036384 000000000000000000000000000000000000000000000000000000000000000000* +L036450 000000000000000000000000000000000000000000000000000000000000000000* +L036516 000000000000000000000000000000000000000000000000000000000000000000* +L036582 + 000000000000000000000000000000000000000000000000000000000000000000* +L036648 111111111101111111111111111111111111111111111111111111111111111111* +L036714 111111111111111111111111111101011111111111111111111111111111111111* +L036780 110111111111111111111111111111111111111111111111111111111101101111* +L036846 000000000000000000000000000000000000000000000000000000000000000000* +L036912 000000000000000000000000000000000000000000000000000000000000000000* +L036978 111111111111111111111111111111111111111111111111111111111111111111* +L037044 111111111111111111111111111111111111111111111111111111111111111111* +L037110 111111111111111111111111111111111111111111111111111111111111111111* +L037176 111111111111111111111111111111111111111111111111111111111111111111* +L037242 111111111111111111111111111111111111111111111111111111111111111111* +L037308 + 000000000000000000000000000000000000000000000000000000000000000000* +L037374 110111111111111111111111111111111111111111111111111111111111111101* +L037440 111001111111111111111111111101111111111111111111111111111111111111* +L037506 111101111111111111111111111101111111111111111111111111111111111110* +L037572 110111111111111111111111011110111111111111111011111111111111011101* +L037638 110110111111111111111111011111111111111111111011111111111111011101* +L037704 111111111111111111111111111111111111011111111111111111111111111111* +L037770 110110011011111111111001101111111111111111101111111111111111011101* +L037836 110111011011111111111001101110111111111111101111111111111111011101* +L037902 000000000000000000000000000000000000000000000000000000000000000000* +L037968 000000000000000000000000000000000000000000000000000000000000000000* +L038034 + 000000000000000000000000000000000000000000000000000000000000000000* +L038100 111111011011111111111110111111111111111111011111111111011111111111* +L038166 000000000000000000000000000000000000000000000000000000000000000000* +L038232 000000000000000000000000000000000000000000000000000000000000000000* +L038298 000000000000000000000000000000000000000000000000000000000000000000* +L038364 000000000000000000000000000000000000000000000000000000000000000000* +L038430 111111111111111111111111111111111111111111111111111111111111111111* +L038496 111111111111111111111111111111111111111111111111111111111111111111* +L038562 111111111111111111111111111111111111111111111111111111111111111111* +L038628 111111111111111111111111111111111111111111111111111111111111111111* +L038694 111111111111111111111111111111111111111111111111111111111111111111* +L038760 + 000000000000000000000000000000000000000000000000000000000000000000* +L038826 111111111111011111111111111101111111111111111111111111111111111111* +L038892 110111111111111111111111111111111101111111111111111111111111101111* +L038958 000000000000000000000000000000000000000000000000000000000000000000* +L039024 000000000000000000000000000000000000000000000000000000000000000000* +L039090 000000000000000000000000000000000000000000000000000000000000000000* +L039156 111111111111111111111111011111111111111111111011111111111111011101* +L039222 111111011011111111111001101111111111111111101111111111111111011101* +L039288 110111111111011111111111111110111111111111111111111111111111111111* +L039354 000000000000000000000000000000000000000000000000000000000000000000* +L039420 000000000000000000000000000000000000000000000000000000000000000000* +L039486 + 000000000000000000000000000000000000000000000000000000000000000000* +L039552 111111111111111111111111111111111111111111111111111111111111111111* +L039618 111111111111111111111111111111111111111111111111111111111111111111* +L039684 111111111111111111111111111111111111111111111111111111111111111111* +L039750 111111111111111111111111111111111111111111111111111111111111111111* +L039816 111111111111111111111111111111111111111111111111111111111111111111* +L039882 111111111111111111111111111111111111111111111111111111111111111111* +L039948 111111111111111111111111111111111111111111111111111111111111111111* +L040014 111111111111111111111111111111111111111111111111111111111111111111* +L040080 111111111111111111111111111111111111111111111111111111111111111111* +L040146 111111111111111111111111111111111111111111111111111111111111111111* +L040212 + 000000000000000000000000000000000000000000000000000000000000000000 + 111111111111111111111111111111111111111111111111101111111111111111* +L040344 0010* +L040348 10100110011110* +L040362 10110100010010* +L040376 10001111111110* +L040390 11001011110011* +L040404 10000100011110* +L040418 00100100010010* +L040432 00000110011111* +L040446 11100011110011* +L040460 00100100011110* +L040474 00110100010010* +L040488 11111111111110* +L040502 11110011111111* +L040516 10100100011111* +L040530 10100100011111* +L040544 11011011111110* +L040558 11111111111111* +NOTE BLOCK 6 * +L040572 + 111111111111111111111011111111111111111110111111111111111111011111 + 111111111110111111111111111111110111111111111111111111111111111111 + 111111111111111111111110111111111111111111111111111111111111110111 + 111110111111111111111111111111111111111111111111111111111111111110 + 111111101111111111111111011111111110111111111111111111111111111111 + 111111111111111111011111111111111111101111111111111111111101111111 + 110111111111101111111111111111111111110111111111011111101111111111 + 101111110111111101111111111111111111111111111111111111111111111111 + 111111111111111111111111110111111111111111100111111110110111111111* +L041166 + 111111111111111111111111111111111111111111111111111111111111111111* +L041232 101111111111111110111111111111111110111110111111111110111111111111* +L041298 101111111111101110111111111111111111111101111111111110111111111111* +L041364 101111111111111111111111111111111110111110111111101110111111111111* +L041430 101111111111101111111111111111111111111101111111101110111111111111* +L041496 000000000000000000000000000000000000000000000000000000000000000000* +L041562 111111111111111111111111111111110111111111111111111111111111111111* +L041628 000000000000000000000000000000000000000000000000000000000000000000* +L041694 000000000000000000000000000000000000000000000000000000000000000000* +L041760 000000000000000000000000000000000000000000000000000000000000000000* +L041826 000000000000000000000000000000000000000000000000000000000000000000* +L041892 + 111111111111111111111111111111111111111111111111111111111111111111* +L041958 101111011111111110111111111111111111111111111111111110111111111111* +L042024 101111011111111111111111111111111111111111111111101110111111111111* +L042090 000000000000000000000000000000000000000000000000000000000000000000* +L042156 000000000000000000000000000000000000000000000000000000000000000000* +L042222 000000000000000000000000000000000000000000000000000000000000000000* +L042288 111111111111111111111111111111111111011111111111111111111111111111* +L042354 000000000000000000000000000000000000000000000000000000000000000000* +L042420 000000000000000000000000000000000000000000000000000000000000000000* +L042486 000000000000000000000000000000000000000000000000000000000000000000* +L042552 000000000000000000000000000000000000000000000000000000000000000000* +L042618 + 000000000000000000000000000000000000000000000000000000000000000000* +L042684 111101110111111111111111111111111111111111111111111111010101111111* +L042750 111101111111111111111111111111111111111111111111111111111111111111* +L042816 111111110111111111111111111111111111111111111111111111011001111111* +L042882 111111111011111111111111111111111111111111111111111111011010111111* +L042948 000000000000000000000000000000000000000000000000000000000000000000* +L043014 111111111111111111111111111111111111111111111111111111111111111110* +L043080 000000000000000000000000000000000000000000000000000000000000000000* +L043146 000000000000000000000000000000000000000000000000000000000000000000* +L043212 000000000000000000000000000000000000000000000000000000000000000000* +L043278 000000000000000000000000000000000000000000000000000000000000000000* +L043344 + 000000000000000000000000000000000000000000000000000000000000000000* +L043410 111111111111111111111111111111111111111111111111111111111111011111* +L043476 000000000000000000000000000000000000000000000000000000000000000000* +L043542 000000000000000000000000000000000000000000000000000000000000000000* +L043608 000000000000000000000000000000000000000000000000000000000000000000* +L043674 000000000000000000000000000000000000000000000000000000000000000000* +L043740 110111111111111111111111111111111111111111111111111111111111111111* +L043806 000000000000000000000000000000000000000000000000000000000000000000* +L043872 000000000000000000000000000000000000000000000000000000000000000000* +L043938 000000000000000000000000000000000000000000000000000000000000000000* +L044004 000000000000000000000000000000000000000000000000000000000000000000* +L044070 + 101111111111111111101111111111111111111111111111111111111111111011* +L044136 101111111111111101111111111111111111111111111111101110111111111111* +L044202 000000000000000000000000000000000000000000000000000000000000000000* +L044268 000000000000000000000000000000000000000000000000000000000000000000* +L044334 000000000000000000000000000000000000000000000000000000000000000000* +L044400 000000000000000000000000000000000000000000000000000000000000000000* +L044466 111111111111111111111111110111111111111111111111111111111111111111* +L044532 000000000000000000000000000000000000000000000000000000000000000000* +L044598 000000000000000000000000000000000000000000000000000000000000000000* +L044664 000000000000000000000000000000000000000000000000000000000000000000* +L044730 000000000000000000000000000000000000000000000000000000000000000000* +L044796 + 101111111111111111101111111111111111111111111111111111111111111011* +L044862 111111111111111111110111111111111111111111111111111111111111111111* +L044928 000000000000000000000000000000000000000000000000000000000000000000* +L044994 000000000000000000000000000000000000000000000000000000000000000000* +L045060 000000000000000000000000000000000000000000000000000000000000000000* +L045126 000000000000000000000000000000000000000000000000000000000000000000* +L045192 111111111101111111111111111111111111111111111111111111111111111111* +L045258 000000000000000000000000000000000000000000000000000000000000000000* +L045324 000000000000000000000000000000000000000000000000000000000000000000* +L045390 000000000000000000000000000000000000000000000000000000000000000000* +L045456 000000000000000000000000000000000000000000000000000000000000000000* +L045522 + 101111111111111111111111111111111111111111111111111111111111111111* +L045588 111111111111111111111111111111111111110111111011111111111111111111* +L045654 000000000000000000000000000000000000000000000000000000000000000000* +L045720 000000000000000000000000000000000000000000000000000000000000000000* +L045786 000000000000000000000000000000000000000000000000000000000000000000* +L045852 000000000000000000000000000000000000000000000000000000000000000000* +L045918 101111101111111110111111111111111111111111111111111110111111111111* +L045984 101111101111111111111111111111111111111111111111101110111111111111* +L046050 000000000000000000000000000000000000000000000000000000000000000000* +L046116 000000000000000000000000000000000000000000000000000000000000000000* +L046182 000000000000000000000000000000000000000000000000000000000000000000* +L046248 + 000000000000000000000000000000000000000000000000000000000000000000* +L046314 111111111111111111111101111111111111111111111111111111111111111111* +L046380 000000000000000000000000000000000000000000000000000000000000000000* +L046446 000000000000000000000000000000000000000000000000000000000000000000* +L046512 000000000000000000000000000000000000000000000000000000000000000000* +L046578 000000000000000000000000000000000000000000000000000000000000000000* +L046644 111111111111111111111111011111111111111111111111111111111111111111* +L046710 000000000000000000000000000000000000000000000000000000000000000000* +L046776 000000000000000000000000000000000000000000000000000000000000000000* +L046842 000000000000000000000000000000000000000000000000000000000000000000* +L046908 000000000000000000000000000000000000000000000000000000000000000000* +L046974 + 000000000000000000000000000000000000000000000000000000000000000000 + 111111111111111111111111111111111111111111101111111111111111111111* +L047106 0010* +L047110 11100110011000* +L047124 00101011111110* +L047138 11100110010101* +L047152 00100110011111* +L047166 00100110011000* +L047180 00100110010010* +L047194 00100110010000* +L047208 00100110010011* +L047222 00100110010001* +L047236 00100110010011* +L047250 00100110010100* +L047264 00100110010010* +L047278 01100011110010* +L047292 11100110010011* +L047306 00100110010001* +L047320 00100110011111* +NOTE BLOCK 7 * +L047334 + 111111111111111111111111111111111111111110111111111111111111111011 + 111111111111111111111111111111110111111111111111111011111111111111 + 111111111111111111111111111111111110111111111111111111110111111111 + 111111111111111111111011101001111111111111111111111111111111111111 + 111111111110111111111111111111111111111111111111111111111111111111 + 111111111111011011111111111111011111011111111111111111111110111111 + 111110010111111111111101111111111111110111111111111111111111101111 + 101111111111111111101111111111111111111111101111111111111111111101 + 111011111111111101111111111111111111111111110110101111111111111111* +L047928 + 000000000000000000000000000000000000000000000000000000000000000000* +L047994 110111111110111111111011111110111111111111111110111111111111101111* +L048060 110111111110111011111011111111111111111111111110111111111111101111* +L048126 111111111111111111110111111111111111111111111111111011111111111111* +L048192 000000000000000000000000000000000000000000000000000000000000000000* +L048258 000000000000000000000000000000000000000000000000000000000000000000* +L048324 111111111111111111111111111111111111111011110111111111111111111111* +L048390 000000000000000000000000000000000000000000000000000000000000000000* +L048456 000000000000000000000000000000000000000000000000000000000000000000* +L048522 000000000000000000000000000000000000000000000000000000000000000000* +L048588 000000000000000000000000000000000000000000000000000000000000000000* +L048654 + 000000000000000000000000000000000000000000000000000000000000000000* +L048720 111111111111111111111111111111111111111111011111111111111111111111* +L048786 111111111111111111111111111111111111111111111111111111111111111111* +L048852 111111111111111111111111111111111111111111111111111111111111111111* +L048918 111111111111111111111111111111111111111111111111111111111111111111* +L048984 111111111111111111111111111111111111111111111111111111111111111111* +L049050 111111111111111111111111111111111111111111111111111111111111111111* +L049116 111111111111111111111111111111111111111111111111111111111111111111* +L049182 111111111111111111111111111111111111111111111111111111111111111111* +L049248 111111111111111111111111111111111111111111111111111111111111111111* +L049314 111111111111111111111111111111111111111111111111111111111111111111* +L049380 + 111111111111111111111111111111111111111111111111111111111111111111* +L049446 011111111111111111111111111111111111011111111111111111111111111111* +L049512 111111111111111111111111111101111111011111111111111111111111111111* +L049578 000000000000000000000000000000000000000000000000000000000000000000* +L049644 000000000000000000000000000000000000000000000000000000000000000000* +L049710 000000000000000000000000000000000000000000000000000000000000000000* +L049776 111111111011101110101110010111111101011111111111111111111111111111* +L049842 111111111111111111111111111111111111111111111111111111111111111111* +L049908 111111111111111111111111111111111111111111111111111111111111111111* +L049974 111111111111111111111111111111111111111111111111111111111111111111* +L050040 111111111111111111111111111111111111111111111111111111111111111111* +L050106 + 101111111111111111111111111111101111111111111111111111111011111111* +L050172 111101111111111111111111111111111111111111111111111111111111111111* +L050238 111111111111111111111111111111111111111111111111111111111111111111* +L050304 111111111111111111111111111111111111111111111111111111111111111111* +L050370 111111111111111111111111111111111111111111111111111111111111111111* +L050436 111111111111111111111111111111111111111111111111111111111111111111* +L050502 111111111111111111111111111111111111111111111111111111111111111111* +L050568 111111111111111111111111111111111111111111111111111111111111111111* +L050634 111111111111111111111111111111111111111111111111111111111111111111* +L050700 111111111111111111111111111111111111111111111111111111111111111111* +L050766 111111111111111111111111111111111111111111111111111111111111111111* +L050832 + 111111111111111111111111111111111111111111111111111111110111111111* +L050898 000000000000000000000000000000000000000000000000000000000000000000* +L050964 111111111111111111111111111111111111111111111111111111111111111111* +L051030 111111111111111111111111111111111111111111111111111111111111111111* +L051096 111111111111111111111111111111111111111111111111111111111111111111* +L051162 111111111111111111111111111111111111111111111111111111111111111111* +L051228 111111011111111111111111111111111111111111111111111111111111111111* +L051294 111111111111111111111111111111111111111111111111111111111111111111* +L051360 111111111111111111111111111111111111111111111111111111111111111111* +L051426 111111111111111111111111111111111111111111111111111111111111111111* +L051492 111111111111111111111111111111111111111111111111111111111111111111* +L051558 + 011111111111111111111111111111111111111111111111111111111111111111* +L051624 111111111111111111111111111111111111111111111111111111111111111101* +L051690 111111111111111111111111111111111111111111111111111111111111111111* +L051756 111111111111111111111111111111111111111111111111111111111111111111* +L051822 111111111111111111111111111111111111111111111111111111111111111111* +L051888 111111111111111111111111111111111111111111111111111111111111111111* +L051954 111111111111111111111111111111111111111111111111111111111111111111* +L052020 111111111111111111111111111111111111111111111111111111111111111111* +L052086 111111111111111111111111111111111111111111111111111111111111111111* +L052152 111111111111111111111111111111111111111111111111111111111111111111* +L052218 111111111111111111111111111111111111111111111111111111111111111111* +L052284 + 101111111111111111111111111111101111111111111111111111111011111111* +L052350 111101111111111111111111111111111111111110111111111111111111110111* +L052416 111111111111111111111111111111111111111111011111111111111111110111* +L052482 111101111111111111111111111111110111111111111111111111111111110111* +L052548 110111111111111111111111111111111111111111111111111111111110101111* +L052614 000000000000000000000000000000000000000000000000000000000000000000* +L052680 111111011111111011111111111111111111111111111111111111111111110111* +L052746 110111111111110111111111111110111111111111111111111111111111111111* +L052812 000000000000000000000000000000000000000000000000000000000000000000* +L052878 000000000000000000000000000000000000000000000000000000000000000000* +L052944 000000000000000000000000000000000000000000000000000000000000000000* +L053010 + 111111111111111111111111111111111111111111111111111111111111111111* +L053076 111111111111111111111111111111111111111111111111111111111111111111* +L053142 111111111111111111111111111111111111111111111111111111111111111111* +L053208 111111111111111111111111111111111111111111111111111111111111111111* +L053274 111111111111111111111111111111111111111111111111111111111111111111* +L053340 111111111111111111111111111111111111111111111111111111111111111111* +L053406 111111111111111111111111111111111111111111111111111111111111111111* +L053472 111111111111111111111111111111111111111111111111111111111111111111* +L053538 111111111111111111111111111111111111111111111111111111111111111111* +L053604 111111111111111111111111111111111111111111111111111111111111111111* +L053670 111111111111111111111111111111111111111111111111111111111111111111* +L053736 + 000000000000000000000000000000000000000000000000000000000000000000 + 111111111111111111111111111111111111111111111111101111111111111111* +L053868 0010* +L053872 11100110011100* +L053886 01101011110010* +L053900 00010110010001* +L053914 11101011110011* +L053928 10100110010000* +L053942 01001011111110* +L053956 00010110010101* +L053970 11101011110011* +L053984 00110011110010* +L053998 00000110010010* +L054012 00010110010111* +L054026 11101011110011* +L054040 11100110011010* +L054054 10100100010010* +L054068 11011111111111* +L054082 11110011111111* +E1 +1 +01111100 +1 +01110010 +1 +00000000 +1 +01000011 +1 +01111001 +1 +00000000 +1 +10001110 +1 +10000010 +1 +* +CC45A* +U00000000000000000000000000000000* +FF68 diff --git a/Logic/68030-68000-bus.vhd b/Logic/68030-68000-bus.vhd index 77bc08b..c5ee2ef 100644 --- a/Logic/68030-68000-bus.vhd +++ b/Logic/68030-68000-bus.vhd @@ -142,13 +142,31 @@ signal CLK_000_NE: STD_LOGIC := '0'; signal CLK_000_NE_D0: STD_LOGIC := '0'; signal DTACK_D0: STD_LOGIC := '1'; signal RESET_DLY: STD_LOGIC_VECTOR ( 7 downto 0 ) := "00000000"; +signal NO_RESET: STD_LOGIC := '0'; begin --pos edge clock - pos_clk: process(CLK_OSZI) + pos_clk: process(CLK_OSZI, NO_RESET) begin - if(rising_edge(CLK_OSZI)) then + if(NO_RESET = '0' ) then + CLK_OUT_PRE_50 <= '0'; + CLK_OUT_PRE_50_D<= '0'; + CLK_OUT_PRE_25 <= '0'; + CLK_OUT_PRE <= '0'; + CLK_OUT_PRE_D <= '0'; + CLK_OUT_NE <= '0'; + CLK_OUT_INT <= '0'; + CLK_000_D0 <= '0'; + CLK_000_D1 <= '0'; + CLK_000_D2 <= '0'; + CLK_000_D3 <= '0'; + CLK_000_D4 <= '0'; + CLK_000_P_SYNC <= "0000000000000"; + CLK_000_N_SYNC <= "0000000000000"; + CLK_000_NE_D0 <= '0'; + cpu_est <= E20; + elsif(rising_edge(CLK_OSZI)) then --clk generation : CLK_OUT_PRE_50 <= not CLK_OUT_PRE_50; @@ -221,6 +239,7 @@ begin --output clock assignment CLK_DIV_OUT <= CLK_OUT_PRE_D; CLK_EXP <= CLK_OUT_PRE_D; + NO_RESET <= '1'; -- i need to delay the board reset by some eclocks, so everything is synced fine afeter a soft reset! reset_delay_machine: process(RST, CLK_OSZI) @@ -228,7 +247,7 @@ begin if(RST = '0' ) then RESET_DLY <= "00000000"; elsif(rising_edge(CLK_OSZI)) then - --reset delay: wait 128 E-Clocks! + --reset delay: wait 512 E-Clocks! if(CLK_000_NE_D0 = '1' and cpu_est = E1) then RESET_DLY <= RESET_DLY +1; end if; @@ -270,7 +289,7 @@ begin CLK_030_H <= '0'; elsif(rising_edge(CLK_OSZI)) then --reset buffer - if(RESET_DLY="01111111")then + if(RESET_DLY="11111111")then RESET <= '1'; end if; @@ -410,8 +429,8 @@ begin SM_AMIGA<=DATA_FETCH_P; end if; when DATA_FETCH_P => --68000:S6: READ: here comes the data on the bus! - if( (CLK_000_N_SYNC( 8)='1' AND not (CLK_030 ='1' and CLK_OUT_PRE_D='0')) OR - (CLK_000_N_SYNC( 9)='1' )) then --go to s7 next 030-clock is not a falling edge: dsack is sampled at the falling edge + if( (CLK_000_N_SYNC( 9)='1' AND not (CLK_030 ='1' and CLK_OUT_PRE_D='0')) OR + (CLK_000_N_SYNC(10)='1' )) then --go to s7 next 030-clock is not a falling edge: dsack is sampled at the falling edge DSACK1_INT <='0'; end if; --if( CLK_000_D3 ='1' AND CLK_000_D4 = '0' ) then --go to s7 next 030-clock is high: dsack is sampled at the falling edge diff --git a/Logic/68030_TK.STY b/Logic/68030_TK.STY index 9ea00d6..1bb8e88 100644 --- a/Logic/68030_TK.STY +++ b/Logic/68030_TK.STY @@ -2,5 +2,3 @@ tool=Synplify [STRATEGY-LIST] Normal=True, 1412327082 -[TOUCHED-REPORT] -Design.tt4File=1421011839 diff --git a/Logic/68030_TK.cmi b/Logic/68030_TK.cmi index 0d01a71..256a514 100644 --- a/Logic/68030_TK.cmi +++ b/Logic/68030_TK.cmi @@ -1,5 +1,5 @@ [WINDOWS] -MAIN_WINDOW_POSITION=0,185,1920,1200 +MAIN_WINDOW_POSITION=2,26,1922,1041 LEFT_PANE_WIDTH=634 CHILD_FRAME_STATE=Maximal CHILD_WINDOW_SIZE=1920,789 @@ -9,7 +9,7 @@ Remember_Setting=1 Open_PV_Opt=2 Open_PV=0 PV_IS_ACTIVE=0 -ACTIVE_SHEET=Pin Attributes +ACTIVE_SHEET=Global Constraints Show_Def_Opt=2 Show_Def_Val=1 Expand_All_Column=0 diff --git a/Logic/68030_TK.lci b/Logic/68030_TK.lci index 3a7379d..0084e15 100644 --- a/Logic/68030_TK.lci +++ b/Logic/68030_TK.lci @@ -12,8 +12,8 @@ EN_PinMacrocell = Yes; [Revision] Parent = m4a5.lci; -DATE = 01/11/2015; -TIME = 22:30:39; +DATE = 02/01/2015; +TIME = 21:17:58; Source_Format = Pure_VHDL; Synthesis = Synplify; @@ -33,7 +33,7 @@ Max_fanin = 32; Set_reset_dont_care = Yes; Balanced_partitioning = Yes; Max_macrocell_percent = 100; -Dt_synthesis = No; +Dt_synthesis = Yes; [Location Assignments] layer = OFF; diff --git a/Logic/68030_TK.lct b/Logic/68030_TK.lct index 3a7379d..0084e15 100644 --- a/Logic/68030_TK.lct +++ b/Logic/68030_TK.lct @@ -12,8 +12,8 @@ EN_PinMacrocell = Yes; [Revision] Parent = m4a5.lci; -DATE = 01/11/2015; -TIME = 22:30:39; +DATE = 02/01/2015; +TIME = 21:17:58; Source_Format = Pure_VHDL; Synthesis = Synplify; @@ -33,7 +33,7 @@ Max_fanin = 32; Set_reset_dont_care = Yes; Balanced_partitioning = Yes; Max_macrocell_percent = 100; -Dt_synthesis = No; +Dt_synthesis = Yes; [Location Assignments] layer = OFF; diff --git a/Logic/68030_TK.tcl b/Logic/68030_TK.tcl index 3cf82d1..d7b6044 100644 --- a/Logic/68030_TK.tcl +++ b/Logic/68030_TK.tcl @@ -284945,3 +284945,2674 @@ if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 6 ########## Tcl recorder end at 01/12/15 22:00:32 ########### + +########## Tcl recorder starts at 01/18/15 22:15:46 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/18/15 22:15:46 ########### + + +########## Tcl recorder starts at 01/18/15 22:15:46 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/18/15 22:15:46 ########### + + +########## Tcl recorder starts at 01/18/15 22:24:18 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/18/15 22:24:18 ########### + + +########## Tcl recorder starts at 01/18/15 22:24:18 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/18/15 22:24:18 ########### + + +########## Tcl recorder starts at 01/18/15 22:35:35 ########## + +# Commands to make the Process: +# Constraint Editor +# - none - +# Application to view the Process: +# Constraint Editor +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -lci \"68030_tk.lct\" -touch \"68030_tk.tt4\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/18/15 22:35:35 ########### + + +########## Tcl recorder starts at 01/18/15 22:36:25 ########## + +# Commands to make the Process: +# Optimization Constraint +# - none - +# Application to view the Process: +# Optimization Constraint +if [catch {open opt_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file opt_cmd.rs2: $rspFile" +} else { + puts $rspFile "-global -lci 68030_tk.lct -touch 68030_tk.imp +" + close $rspFile +} +if [runCmd "\"$cpld_bin/optedit\" @opt_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/18/15 22:36:25 ########### + + +########## Tcl recorder starts at 01/18/15 22:37:42 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/18/15 22:37:42 ########### + + +########## Tcl recorder starts at 01/18/15 22:38:32 ########## + +# Commands to make the Process: +# Optimization Constraint +# - none - +# Application to view the Process: +# Optimization Constraint +if [catch {open opt_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file opt_cmd.rs2: $rspFile" +} else { + puts $rspFile "-global -lci 68030_tk.lct -touch 68030_tk.imp +" + close $rspFile +} +if [runCmd "\"$cpld_bin/optedit\" @opt_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/18/15 22:38:32 ########### + + +########## Tcl recorder starts at 01/18/15 22:44:30 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/18/15 22:44:30 ########### + + +########## Tcl recorder starts at 01/18/15 22:44:31 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/18/15 22:44:31 ########### + + +########## Tcl recorder starts at 01/18/15 22:44:53 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/18/15 22:44:53 ########### + + +########## Tcl recorder starts at 01/18/15 22:44:53 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/18/15 22:44:54 ########### + + +########## Tcl recorder starts at 01/18/15 22:46:36 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/18/15 22:46:36 ########### + + +########## Tcl recorder starts at 01/18/15 22:46:37 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 01/18/15 22:46:37 ########### + + +########## Tcl recorder starts at 02/01/15 20:05:34 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 20:05:34 ########### + + +########## Tcl recorder starts at 02/01/15 20:05:35 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 20:05:35 ########### + + +########## Tcl recorder starts at 02/01/15 20:15:14 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 20:15:14 ########### + + +########## Tcl recorder starts at 02/01/15 20:15:14 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 20:15:14 ########### + + +########## Tcl recorder starts at 02/01/15 21:11:01 ########## + +# Commands to make the Process: +# ISC-1532 File +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2i "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 21:11:01 ########### + + +########## Tcl recorder starts at 02/01/15 21:11:25 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 21:11:25 ########### + + +########## Tcl recorder starts at 02/01/15 21:13:56 ########## + +# Commands to make the Process: +# Stamp Model File +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/timer\" -inp \"68030_tk.tte\" -lci \"68030_tk.lct\" -stamp \"68030_tk.trp\" -exf \"BUS68030.exf\" -lco \"68030_tk.lco\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/stamppar\" -i 68030_tk.trp "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 21:13:56 ########### + + +########## Tcl recorder starts at 02/01/15 21:16:02 ########## + +# Commands to make the Process: +# Optimization Constraint +# - none - +# Application to view the Process: +# Optimization Constraint +if [catch {open opt_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file opt_cmd.rs2: $rspFile" +} else { + puts $rspFile "-global -lci 68030_tk.lct -touch 68030_tk.imp +" + close $rspFile +} +if [runCmd "\"$cpld_bin/optedit\" @opt_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 21:16:02 ########### + + +########## Tcl recorder starts at 02/01/15 21:16:20 ########## + +# Commands to make the Process: +# Constraint Editor +# - none - +# Application to view the Process: +# Constraint Editor +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -lci \"68030_tk.lct\" -touch \"68030_tk.tt4\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 21:16:20 ########### + + +########## Tcl recorder starts at 02/01/15 21:17:54 ########## + +# Commands to make the Process: +# Optimization Constraint +# - none - +# Application to view the Process: +# Optimization Constraint +if [catch {open opt_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file opt_cmd.rs2: $rspFile" +} else { + puts $rspFile "-global -lci 68030_tk.lct -touch 68030_tk.imp +" + close $rspFile +} +if [runCmd "\"$cpld_bin/optedit\" @opt_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 21:17:54 ########### + + +########## Tcl recorder starts at 02/01/15 21:18:05 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 21:18:05 ########### + + +########## Tcl recorder starts at 02/01/15 21:29:45 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 21:29:45 ########### + + +########## Tcl recorder starts at 02/01/15 21:29:45 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 21:29:45 ########### + + +########## Tcl recorder starts at 02/01/15 21:34:44 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 21:34:44 ########### + + +########## Tcl recorder starts at 02/01/15 21:34:44 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 21:34:44 ########### + + +########## Tcl recorder starts at 02/01/15 21:35:48 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 21:35:48 ########### + + +########## Tcl recorder starts at 02/01/15 21:35:48 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 21:35:48 ########### + + +########## Tcl recorder starts at 02/01/15 21:36:43 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 21:36:43 ########### + + +########## Tcl recorder starts at 02/01/15 21:36:43 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 02/01/15 21:36:43 ########### + diff --git a/Logic/68030_tk - DMA-Working@50MHz.jed b/Logic/68030_tk - DMA-Working@50MHz.jed index 189c609..0ddaa87 100644 --- a/Logic/68030_tk - DMA-Working@50MHz.jed +++ b/Logic/68030_tk - DMA-Working@50MHz.jed @@ -10,7 +10,7 @@ AUTHOR: PATTERN: COMPANY: REVISION: -DATE: Mon Jan 12 22:00:44 2015 +DATE: Sun Feb 01 21:36:55 2015 ABEL mach447a * @@ -31,82 +31,83 @@ NOTE Spread Placement? Y * NOTE Run Time Upper Bound in 15 minutes 0 * NOTE Zero Hold Time For Input Registers? Y * NOTE Table of pin names and numbers* -NOTE PINS A_24_:19 A_23_:85 SIZE_1_:79 A_22_:84 A_21_:94* -NOTE PINS A_31_:4 A_20_:93 A_19_:97 A_18_:95 A_17_:59 IPL_2_:68* -NOTE PINS A_16_:96 FC_1_:58 IPL_1_:56 AS_000:42 IPL_0_:67* -NOTE PINS FC_0_:57 UDS_000:32 LDS_000:31 A1:60 nEXP_SPACE:14* -NOTE PINS BERR:41 BG_030:21 BGACK_000:28 CLK_030:64 CLK_000:11* -NOTE PINS CLK_OSZI:61 CLK_DIV_OUT:65 CLK_EXP:10 FPU_CS:78* -NOTE PINS FPU_SENSE:91 DTACK:30 AVEC:92 VPA:36 RST:86 AMIGA_BUS_DATA_DIR:48* +NOTE PINS A_23_:85 A_22_:84 SIZE_1_:79 A_21_:94 A_20_:93* +NOTE PINS A_31_:4 A_19_:97 A_18_:95 A_17_:59 A_16_:96 IPL_2_:68* +NOTE PINS FC_1_:58 IPL_1_:56 IPL_0_:67 AS_000:42 FC_0_:57* +NOTE PINS UDS_000:32 LDS_000:31 A1:60 nEXP_SPACE:14 BERR:41* +NOTE PINS BG_030:21 BGACK_000:28 CLK_030:64 CLK_000:11 CLK_OSZI:61* +NOTE PINS CLK_DIV_OUT:65 CLK_EXP:10 FPU_CS:78 FPU_SENSE:91* +NOTE PINS DTACK:30 AVEC:92 VPA:36 RST:86 AMIGA_BUS_DATA_DIR:48* NOTE PINS AMIGA_BUS_ENABLE_LOW:20 AMIGA_BUS_ENABLE_HIGH:34* NOTE PINS CIIN:47 SIZE_0_:70 A_30_:5 A_29_:6 A_28_:15 A_27_:16* -NOTE PINS A_26_:17 A_25_:18 IPL_030_2_:9 IPL_030_1_:7 IPL_030_0_:8* -NOTE PINS AS_030:82 RW_000:80 DS_030:98 A0:69 BG_000:29 BGACK_030:83* -NOTE PINS DSACK1:81 E:66 VMA:35 RESET:3 RW:71 AMIGA_ADDR_ENABLE:33* +NOTE PINS A_26_:17 A_25_:18 A_24_:19 IPL_030_2_:9 IPL_030_1_:7* +NOTE PINS IPL_030_0_:8 AS_030:82 RW_000:80 DS_030:98 A0:69* +NOTE PINS BG_000:29 BGACK_030:83 DSACK1:81 E:66 VMA:35 RESET:3* +NOTE PINS RW:71 AMIGA_ADDR_ENABLE:33 * NOTE Table of node names and numbers* NOTE NODES RN_SIZE_1_:287 RN_AS_000:203 RN_UDS_000:185 RN_LDS_000:191 * -NOTE NODES RN_BERR:205 RN_SIZE_0_:263 RN_IPL_030_2_:131 * +NOTE NODES RN_BERR:197 RN_SIZE_0_:263 RN_IPL_030_2_:131 * NOTE NODES RN_IPL_030_1_:143 RN_IPL_030_0_:137 RN_AS_030:281 * NOTE NODES RN_RW_000:269 RN_DS_030:101 RN_A0:257 RN_BG_000:175 * -NOTE NODES RN_BGACK_030:275 RN_DSACK1:283 RN_E:254 RN_VMA:173 * +NOTE NODES RN_BGACK_030:275 RN_DSACK1:283 RN_E:251 RN_VMA:173 * NOTE NODES RN_RESET:125 RN_RW:245 RN_AMIGA_ADDR_ENABLE:179 * -NOTE NODES cpu_est_0_:113 cpu_est_1_:187 inst_AS_000_INT:235 * -NOTE NODES inst_AMIGA_BUS_ENABLE_DMA_LOW:106 inst_AS_030_D0:274 * -NOTE NODES inst_nEXP_SPACE_D0reg:133 inst_DS_030_D0:158 * -NOTE NODES inst_AS_030_000_SYNC:155 inst_BGACK_030_INT_D:284 * -NOTE NODES SIZE_DMA_0_:289 SIZE_DMA_1_:110 inst_VPA_D:145 * -NOTE NODES inst_UDS_000_INT:259 inst_LDS_000_INT:253 inst_DTACK_D0:104 * -NOTE NODES RESET_DLY_7_:136 inst_CLK_OUT_PRE_50:196 inst_CLK_000_D1:167 * -NOTE NODES inst_CLK_000_D0:188 inst_CLK_000_PE:119 SM_AMIGA_7_:221 * -NOTE NODES SM_AMIGA_5_:229 inst_CLK_OUT_PRE:190 CLK_000_P_SYNC_9_:206 * -NOTE NODES inst_CLK_000_NE:139 CLK_000_N_SYNC_11_:260 cpu_est_2_:193 * -NOTE NODES inst_CLK_000_NE_D0:176 SM_AMIGA_3_:241 SM_AMIGA_0_:223 * -NOTE NODES inst_AMIGA_BUS_ENABLE_DMA_HIGH:122 SM_AMIGA_6_:161 * -NOTE NODES CLK_000_P_SYNC_0_:184 CLK_000_P_SYNC_1_:248 CLK_000_P_SYNC_2_:124 * -NOTE NODES CLK_000_P_SYNC_3_:152 CLK_000_P_SYNC_4_:178 CLK_000_P_SYNC_5_:169 * -NOTE NODES CLK_000_P_SYNC_6_:130 CLK_000_P_SYNC_7_:194 CLK_000_P_SYNC_8_:163 * -NOTE NODES CLK_000_N_SYNC_0_:242 CLK_000_N_SYNC_1_:146 CLK_000_N_SYNC_2_:200 * -NOTE NODES CLK_000_N_SYNC_3_:265 CLK_000_N_SYNC_4_:118 CLK_000_N_SYNC_5_:236 * -NOTE NODES CLK_000_N_SYNC_6_:112 CLK_000_N_SYNC_7_:157 CLK_000_N_SYNC_8_:140 * -NOTE NODES CLK_000_N_SYNC_9_:278 CLK_000_N_SYNC_10_:272 * -NOTE NODES RESET_DLY_0_:182 RESET_DLY_1_:134 RESET_DLY_2_:121 * -NOTE NODES RESET_DLY_3_:115 RESET_DLY_4_:128 RESET_DLY_5_:109 * -NOTE NODES RESET_DLY_6_:103 inst_CLK_030_H:116 inst_DS_000_ENABLE:227 * -NOTE NODES SM_AMIGA_1_:233 SM_AMIGA_4_:230 SM_AMIGA_2_:224 * -NOTE NODES CLK_OUT_PRE_Dreg:209 un8_ciin:217 state_machine_un15_clk_000_ne_i_n:151 * -NOTE NODES CIIN_0:211 * +NOTE NODES cpu_est_0_:113 cpu_est_1_:161 inst_AS_000_INT:163 * +NOTE NODES inst_AMIGA_BUS_ENABLE_DMA_LOW:128 inst_AS_030_D0:277 * +NOTE NODES inst_nEXP_SPACE_D0reg:155 inst_DS_030_D0:182 * +NOTE NODES inst_AS_030_000_SYNC:239 inst_BGACK_030_INT_D:272 * +NOTE NODES SIZE_DMA_0_:139 SIZE_DMA_1_:289 inst_VPA_D:169 * +NOTE NODES inst_UDS_000_INT:248 inst_LDS_000_INT:133 inst_DTACK_D0:262 * +NOTE NODES inst_CLK_OUT_PRE_50:200 inst_CLK_000_D1:176 inst_CLK_000_D0:260 * +NOTE NODES inst_CLK_000_PE:259 SM_AMIGA_7_:221 SM_AMIGA_5_:233 * +NOTE NODES inst_CLK_OUT_PRE:217 inst_CLK_000_NE:209 CLK_000_N_SYNC_11_:134 * +NOTE NODES CLK_000_P_SYNC_9_:166 cpu_est_2_:253 inst_CLK_000_NE_D0:167 * +NOTE NODES SM_AMIGA_3_:151 SM_AMIGA_0_:241 inst_AMIGA_BUS_ENABLE_DMA_HIGH:110 * +NOTE NODES SM_AMIGA_6_:227 RESET_DLY_0_:187 RESET_DLY_1_:193 * +NOTE NODES RESET_DLY_2_:121 RESET_DLY_3_:115 RESET_DLY_4_:109 * +NOTE NODES RESET_DLY_5_:103 RESET_DLY_6_:119 RESET_DLY_7_:118 * +NOTE NODES CLK_000_P_SYNC_0_:184 CLK_000_P_SYNC_1_:230 CLK_000_P_SYNC_2_:178 * +NOTE NODES CLK_000_P_SYNC_3_:160 CLK_000_P_SYNC_4_:112 CLK_000_P_SYNC_5_:154 * +NOTE NODES CLK_000_P_SYNC_6_:170 CLK_000_P_SYNC_7_:106 CLK_000_P_SYNC_8_:122 * +NOTE NODES CLK_000_N_SYNC_0_:194 CLK_000_N_SYNC_1_:164 CLK_000_N_SYNC_2_:256 * +NOTE NODES CLK_000_N_SYNC_3_:188 CLK_000_N_SYNC_4_:116 CLK_000_N_SYNC_5_:250 * +NOTE NODES CLK_000_N_SYNC_6_:158 CLK_000_N_SYNC_7_:224 CLK_000_N_SYNC_8_:266 * +NOTE NODES CLK_000_N_SYNC_9_:254 CLK_000_N_SYNC_10_:145 * +NOTE NODES inst_CLK_030_H:104 inst_DS_000_ENABLE:223 SM_AMIGA_1_:235 * +NOTE NODES SM_AMIGA_4_:229 SM_AMIGA_2_:157 CLK_OUT_PRE_Dreg:265 * +NOTE NODES un8_ciin:211 state_machine_un15_clk_000_ne_i_n:152 * +NOTE NODES CIIN_0:205 * NOTE BLOCK 0 * L000000 - 111111111011111111111111101111111111111111111111111111111111111111 - 111110111111111111111111111111111111111111111111111111111111111111 - 111111111110111111111101111111111111111111111111111111111111110111 - 111111111111111111110111111111111111111111111110111111111111111111 + 111111111011110111111111111111111111111111111101111111111111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111011111111111111111110111111111111111111111111111111111 + 111111111111111111111110111101111111111111111111111111111111111110 111111101111111111111111111111111111111111111111111111111111111111 - 110111111111111111111111111101111111111111111111110111111111111111 - 111111111111100111011111111011111111111011111111011111111101011111 - 111111111111111101111111111111110111011110111111111111111111111111 - 101111111111111111111111111111011111111111011111111110110111111111* + 110101111111111111111111111111111111111111111111011111110111111111 + 111111111111111111111111011011111111110111101111111111011111011111 + 111111111111111101111111111111111111011110111111110111111111111111 + 101111111111111111011111111111011111111111110111111110111111111111* L000594 000000000000000000000000000000000000000000000000000000000000000000* L000660 111111111111111111111111111111111111111101111111111111111111111111* L000726 111111111111111111111111111111111111111111111111111101111111111111* -L000792 111111111111111101111111111111111111111111111111011111111111111111* -L000858 111111111011101111111111111111011111111111111111111111111111111111* -L000924 111111110111101111111111110101111111111111111111111111111111111111* -L000990 111111111111111111111111111111111111111111011111111111111111111111* -L001056 111111111111101111111111111110011111111111111111111111111111111111* +L000792 111111111111111101111111111111111111111111111111111111011111111111* +L000858 111111111011111111111111111111011111111111101111111111111111111111* +L000924 111111110111111111111111110111111111111111100111111111111111111111* +L000990 110111111111111111111110011111110111010111111101111111110111101101* +L001056 111111111111111111111111111111011111111111101011111111111111111111* L001122 000000000000000000000000000000000000000000000000000000000000000000* L001188 000000000000000000000000000000000000000000000000000000000000000000* L001254 000000000000000000000000000000000000000000000000000000000000000000* L001320 111111111111111111111111111111111111111111111111111111111111111111* -L001386 111111111111111111011111111111111111111111111111111111111111111111* -L001452 110111111110110111110101111111110111011111111111110111110101101111* -L001518 000000000000000000000000000000000000000000000000000000000000000000* -L001584 000000000000000000000000000000000000000000000000000000000000000000* +L001386 111111111011111110111111111011111111111110111111111110111111111111* +L001452 111111111111111110111111111111111111111110110111111110111111111111* +L001518 111111111011111111111111111011111111111110111111111110101111111111* +L001584 111111111111111111111111111111111111111110110111111110101111111111* L001650 000000000000000000000000000000000000000000000000000000000000000000* -L001716 111111011111111110111111111111111111111110111111111110111111111111* -L001782 111111011111111111111111111111111111111110111111101110111111111111* +L001716 111111111111110111111111111111111111111111111111111111111111111111* +L001782 000000000000000000000000000000000000000000000000000000000000000000* L001848 000000000000000000000000000000000000000000000000000000000000000000* L001914 000000000000000000000000000000000000000000000000000000000000000000* L001980 000000000000000000000000000000000000000000000000000000000000000000* @@ -117,165 +118,165 @@ L002178 000000000000000000000000000000000000000000000000000000000000000000* L002244 000000000000000000000000000000000000000000000000000000000000000000* L002310 000000000000000000000000000000000000000000000000000000000000000000* L002376 000000000000000000000000000000000000000000000000000000000000000000* -L002442 111111111111111111111111111111111111011111111111111111111111111111* -L002508 110111111110110111110101111111110111111111111111110111110101101111* +L002442 110111111111111111111110011111110111110111111101111111110111101101* +L002508 000000000000000000000000000000000000000000000000000000000000000000* L002574 000000000000000000000000000000000000000000000000000000000000000000* L002640 000000000000000000000000000000000000000000000000000000000000000000* L002706 000000000000000000000000000000000000000000000000000000000000000000* L002772 000000000000000000000000000000000000000000000000000000000000000000* -L002838 111111111111111110111111111111111111111110111111101110111111111111* -L002904 000000000000000000000000000000000000000000000000000000000000000000* +L002838 111111101111111110111111111111111111111110111111111110111111111111* +L002904 111111101111111111111111111111111111111110111111111110101111111111* L002970 000000000000000000000000000000000000000000000000000000000000000000* L003036 000000000000000000000000000000000000000000000000000000000000000000* L003102 000000000000000000000000000000000000000000000000000000000000000000* -L003168 111101111111111111111111111111111111111111111111111111111111111111* +L003168 111111111111011111111111111111111111111111111111111111111111111111* L003234 000000000000000000000000000000000000000000000000000000000000000000* L003300 000000000000000000000000000000000000000000000000000000000000000000* L003366 000000000000000000000000000000000000000000000000000000000000000000* L003432 000000000000000000000000000000000000000000000000000000000000000000* L003498 000000000000000000000000000000000000000000000000000000000000000000* -L003564 111111111111111111111111111111111111111111111111111111110111101111* -L003630 111111111111111111111111111111111111111111111111111111111011011111* +L003564 111111111111111111111111111111111111111111111101111111111111101111* +L003630 111111111111111111111111111111111111111111111110111111111111011111* L003696 000000000000000000000000000000000000000000000000000000000000000000* L003762 000000000000000000000000000000000000000000000000000000000000000000* L003828 000000000000000000000000000000000000000000000000000000000000000000* -L003894 111111111111111111111111111111111111111111111111111111111101111111* -L003960 110111111110110111111101111111110111111111111111110111110111101111* +L003894 110111111111111111111110011111110111111111111101111111110111101101* +L003960 000000000000000000000000000000000000000000000000000000000000000000* L004026 000000000000000000000000000000000000000000000000000000000000000000* L004092 000000000000000000000000000000000000000000000000000000000000000000* L004158 000000000000000000000000000000000000000000000000000000000000000000* L004224 000000000000000000000000000000000000000000000000000000000000000000* -L004290 111111111011111110111111111011111111111110111111111110111111111111* -L004356 111111111111111110111111111101111111111110111111111110111111111111* -L004422 111111111011111111111111111011111111111110111111101110111111111111* -L004488 111111111111111111111111111101111111111110111111101110111111111111* +L004290 111101111111111111111111111111111111111111111111111111111111111111* +L004356 000000000000000000000000000000000000000000000000000000000000000000* +L004422 000000000000000000000000000000000000000000000000000000000000000000* +L004488 000000000000000000000000000000000000000000000000000000000000000000* L004554 000000000000000000000000000000000000000000000000000000000000000000* -L004620 111111111111111111111111011111111111111111111111111111111111111111* +L004620 110111111111111111011110011111110111010111111101011111110111101101* L004686 000000000000000000000000000000000000000000000000000000000000000000* L004752 000000000000000000000000000000000000000000000000000000000000000000* L004818 000000000000000000000000000000000000000000000000000000000000000000* L004884 000000000000000000000000000000000000000000000000000000000000000000* L004950 000000000000000000000000000000000000000000000000000000000000000000* -L005016 111111111111111111111111111111111111110111111111111111111111111111* +L005016 110111111111111111011110011111110111010111111101111111110111101101* L005082 000000000000000000000000000000000000000000000000000000000000000000* L005148 000000000000000000000000000000000000000000000000000000000000000000* L005214 000000000000000000000000000000000000000000000000000000000000000000* L005280 000000000000000000000000000000000000000000000000000000000000000000* -L005346 111111111111111111111111111111111111111111111111110111111111111111* -L005412 110111111110110111111101111111110111111111111111111111110111101111* +L005346 110111111111111111111110011111110111111111111101111111111111101101* +L005412 000000000000000000000000000000000000000000000000000000000000000000* L005478 000000000000000000000000000000000000000000000000000000000000000000* L005544 000000000000000000000000000000000000000000000000000000000000000000* L005610 000000000000000000000000000000000000000000000000000000000000000000* L005676 - 111111111111111111111111111111111111111110111111111111111111111011* -L005742 111111101111111110111111111111111111111110111111111110111111111111* -L005808 111111101111111111111111111111111111111110111111101110111111111111* -L005874 000000000000000000000000000000000000000000000000000000000000000000* -L005940 000000000000000000000000000000000000000000000000000000000000000000* -L006006 000000000000000000000000000000000000000000000000000000000000000000* -L006072 111111111111111111111111111111111111111111111101111111111111111111* -L006138 000000000000000000000000000000000000000000000000000000000000000000* -L006204 000000000000000000000000000000000000000000000000000000000000000000* -L006270 000000000000000000000000000000000000000000000000000000000000000000* -L006336 000000000000000000000000000000000000000000000000000000000000000000* + 111111111111111111111111111110111111111110111111111111111111111111* +L005742 111111111111111111111111111111111111111111111111110111111111111111* +L005808 111111111111111111111111111111111111111111111111111111111111111111* +L005874 111111111111111111111111111111111111111111111111111111111111111111* +L005940 111111111111111111111111111111111111111111111111111111111111111111* +L006006 111111111111111111111111111111111111111111111111111111111111111111* +L006072 111111111111111111111111111111111111111111111111111111111111111111* +L006138 111111111111111111111111111111111111111111111111111111111111111111* +L006204 111111111111111111111111111111111111111111111111111111111111111111* +L006270 111111111111111111111111111111111111111111111111111111111111111111* +L006336 111111111111111111111111111111111111111111111111111111111111111111* L006402 000000000000000000000000000000000000000000000000000000000000000000 101111111111111111111111111111111111111111111111111111111111111111* L006534 0010* L006538 10100110011000* -L006552 00110100010010* -L006566 00110110010100* -L006580 11100110011111* +L006552 00110101010010* +L006566 10100100010100* +L006580 00100110011111* L006594 00101011111001* -L006608 00100100010011* -L006622 00100110010000* +L006608 00100101010011* +L006622 11100110010000* L006636 00100110010010* L006650 10100110010001* -L006664 00100100010011* -L006678 10100100010000* -L006692 00100110010010* -L006706 00100110010000* -L006720 00100100010011* -L006734 11100110010101* -L006748 00100110010011* +L006664 00100101010011* +L006678 00100110010000* +L006692 00100101010010* +L006706 00100101010000* +L006720 00100101010011* +L006734 00010110010101* +L006748 11100011110011* NOTE BLOCK 1 * L006762 - 111111111111111110111101011111111111111111111111111111111111111111 - 111111111101011111111111111111111111111111111011111111111111111111 - 110101111011111111111111111111111101111111111110111111111111111011 - 101111111111111111110111111111011111111111111111111111011111111111 - 111111111111111111111111111111111111111111111111111101111111111111 - 111111111111111111111111111111111111111111111111110111111101111111 - 111111111111110111111111111111111111010111111111111111111111101111 - 111111111111111111111111111111110111111111111111111111110111111111 - 111111011111111111011111110111111111111111101111111111111111111111* + 110111111111111111111111101111111111111111011111111111111111111111 + 111111111111111111111111111110111111111111111111111111111111111111 + 111111101110111111111111111111111101101111111011111111111111110111 + 101111111111111111111011111111111111111111111111111111111111011111 + 111111111111111111111110111111111111111111111111111101111111111111 + 111111111111101111111111110111011111111111111111110111111101111111 + 111111111111110111111111111111111011110111111111111111011111111111 + 111111110111111101111111111111111111111110111111111111110111111111 + 111110111111111111011111111111111111111111111111101111111111111111* L007356 111111111111111111111111111111111111111111111111111111111111111111* -L007422 111001111111111111010111111111110111110111111111110111110111111111* +L007422 111111111111110111011111110111011111110111111111110111110101111111* L007488 111111111111111111111111111111111111111111111111111101111111111111* L007554 000000000000000000000000000000000000000000000000000000000000000000* L007620 000000000000000000000000000000000000000000000000000000000000000000* L007686 000000000000000000000000000000000000000000000000000000000000000000* -L007752 111111111111111111111111111111111111111111111111111111111111011111* +L007752 111111111111111111111111011111111111111111111111111111111111111111* L007818 000000000000000000000000000000000000000000000000000000000000000000* L007884 000000000000000000000000000000000000000000000000000000000000000000* L007950 000000000000000000000000000000000000000000000000000000000000000000* L008016 000000000000000000000000000000000000000000000000000000000000000000* L008082 111111111111111111111111111111111111111111111111111111111111111111* -L008148 111111111111111111110111111111111111111111111111111111111111111111* -L008214 111101011111110111111111111111110111100111111110110111111101111111* +L008148 111110111111111110111101111111111111111110111111111111111111111111* +L008214 111110111111111111111101111111111111111110111111111111101111111111* L008280 000000000000000000000000000000000000000000000000000000000000000000* L008346 000000000000000000000000000000000000000000000000000000000000000000* L008412 000000000000000000000000000000000000000000000000000000000000000000* -L008478 111111111111111111111101111111111111111111111111111111111111111111* -L008544 000000000000000000000000000000000000000000000000000000000000000000* -L008610 000000000000000000000000000000000000000000000000000000000000000000* -L008676 000000000000000000000000000000000000000000000000000000000000000000* -L008742 000000000000000000000000000000000000000000000000000000000000000000* +L008478 111111111111111111111111111111111111111111111111111111111111111111* +L008544 111111111111111111111111111111111111111111111111111111111111111111* +L008610 111111111111111111111111111111111111111111111111111111111111111111* +L008676 111111111111111111111111111111111111111111111111111111111111111111* +L008742 111111111111111111111111111111111111111111111111111111111111111111* L008808 111111111111111111111111111111111111111111111111111111111111111111* -L008874 111111110111011111111111111111111111111111111111111111111111111111* -L008940 111111111111101111111111111111111111111111111111111111011111111111* +L008874 111111111111111111111111111111110111111111110111111111111111111111* +L008940 111111111111111111111111111111111011111111111111111111111111011111* L009006 000000000000000000000000000000000000000000000000000000000000000000* L009072 000000000000000000000000000000000000000000000000000000000000000000* L009138 000000000000000000000000000000000000000000000000000000000000000000* -L009204 111111111101111111111111111111111111111111111111111111111111111111* -L009270 000000000000000000000000000000000000000000000000000000000000000000* -L009336 000000000000000000000000000000000000000000000000000000000000000000* +L009204 111111110111111111111111111111111111111111111111111111111111110111* +L009270 111111111111111111111011111111111111111111111111111111111111110111* +L009336 111111111011101111110111111101111111101111111111111111111111111111* L009402 000000000000000000000000000000000000000000000000000000000000000000* L009468 000000000000000000000000000000000000000000000000000000000000000000* L009534 111111111111111111111111111111111111111111111111111111111111111111* -L009600 111101111111111111111111111111111111111111111111111111111111111111* -L009666 111111011111110111111111111111110111101111111110111111111101111111* -L009732 000000000000000000000000000000000000000000000000000000000000000000* -L009798 000000000000000000000000000000000000000000000000000000000000000000* -L009864 000000000000000000000000000000000000000000000000000000000000000000* -L009930 110111111111111111111111111111111111111111111111111111111111111111* -L009996 111101011111110111010111111111110111100111111110110111110101111111* -L010062 000000000000000000000000000000000000000000000000000000000000000000* -L010128 000000000000000000000000000000000000000000000000000000000000000000* -L010194 000000000000000000000000000000000000000000000000000000000000000000* +L009600 111111111111111111111111111111111111111111011111111111111111111111* +L009666 111111111111111111111111111111111111111111111111111111111111111111* +L009732 111111111111111111111111111111111111111111111111111111111111111111* +L009798 111111111111111111111111111111111111111111111111111111111111111111* +L009864 111111111111111111111111111111111111111111111111111111111111111111* +L009930 111111111111111111111111111111111111111111111111111111111111111111* +L009996 111111111111111111111111111111111111111111111111111111111111111111* +L010062 111111111111111111111111111111111111111111111111111111111111111111* +L010128 111111111111111111111111111111111111111111111111111111111111111111* +L010194 111111111111111111111111111111111111111111111111111111111111111111* L010260 000000000000000000000000000000000000000000000000000000000000000000* -L010326 011111111111011111111111111111111111111111111111111111111111111111* -L010392 111111111111101111111111111111111101111111111111111111111111111111* +L010326 011111111111111111111111111111110111111111111111111111111111111111* +L010392 111111111111111111111111111111111001111111111111111111111111111111* L010458 000000000000000000000000000000000000000000000000000000000000000000* L010524 000000000000000000000000000000000000000000000000000000000000000000* L010590 000000000000000000000000000000000000000000000000000000000000000000* -L010656 111111111111111111111111111111111111111111110111111111111111111111* -L010722 000000000000000000000000000000000000000000000000000000000000000000* +L010656 111110111111111101111111111111111111111110111111111111101111111111* +L010722 111110111111111110111111111111111111111110111111111111011111111111* L010788 000000000000000000000000000000000000000000000000000000000000000000* L010854 000000000000000000000000000000000000000000000000000000000000000000* L010920 000000000000000000000000000000000000000000000000000000000000000000* L010986 000000000000000000000000000000000000000000000000000000000000000000* -L011052 111111111111111111111111111111011111111111111111111111111111111111* +L011052 111111111111111111111111111111111111111111111111111111111111111111* L011118 111111111111111111111111111111111111111111111111111111111111111111* L011184 111111111111111111111111111111111111111111111111111111111111111111* L011250 111111111111111111111111111111111111111111111111111111111111111111* @@ -287,19 +288,19 @@ L011580 111111111111111111111111111111111111111111111111111111111111111111* L011646 111111111111111111111111111111111111111111111111111111111111111111* L011712 000000000000000000000000000000000000000000000000000000000000000000* -L011778 111111111111011111111111111111111111111111111111111111111111110111* -L011844 111111111111101111111111011111111111111111111111111111111111111111* +L011778 111111011111111111111111111111110111111111111111111111111111111111* +L011844 110111111111111111111111111111111011111111111111111111111111111111* L011910 000000000000000000000000000000000000000000000000000000000000000000* L011976 000000000000000000000000000000000000000000000000000000000000000000* L012042 000000000000000000000000000000000000000000000000000000000000000000* -L012108 111111111111111111111111110111111111111111111111111111111111111111* +L012108 111111111101111111111111111111111111111111111111111111111111111111* L012174 111111111111111111111111111111111111111111111111111111111111111111* L012240 111111111111111111111111111111111111111111111111111111111111111111* L012306 111111111111111111111111111111111111111111111111111111111111111111* L012372 111111111111111111111111111111111111111111111111111111111111111111* L012438 111111111111111111111111111111111111111111111111111111111111111111* -L012504 111111111111111101111111111111111111111111111111111111111111111111* +L012504 111111111111111111111111111111111111111111111111111111111111111111* L012570 111111111111111111111111111111111111111111111111111111111111111111* L012636 111111111111111111111111111111111111111111111111111111111111111111* L012702 111111111111111111111111111111111111111111111111111111111111111111* @@ -310,123 +311,123 @@ L012966 111111111111111111111111111111111111111111111111111111111111111111* L013032 111111111111111111111111111111111111111111111111111111111111111111* L013098 111111111111111111111111111111111111111111111111111111111111111111* L013164 - 111111111111111111111111111111111111111111101111111111111111111111 + 111111111111111111111111111111111111111111111111101111111111111111 000000000000000000000000000000000000000000000000000000000000000000* L013296 0010* L013300 10100110011000* L013314 00101011111110* -L013328 00100110010101* -L013342 00100110011111* +L013328 11100100010101* +L013342 11101011111111* L013356 10100100010010* -L013370 00100100011110* -L013384 00100110010110* -L013398 00100110011111* -L013412 10100100011001* -L013426 00100110010011* -L013440 00010110010000* -L013454 11100011110010* -L013468 10100100011000* -L013482 00000100010011* -L013496 00010110010101* -L013510 11101011111111* +L013370 10100100011110* +L013384 00010110010111* +L013398 11100011111111* +L013412 10100100011000* +L013426 10100100010010* +L013440 11011111110000* +L013454 11110011110011* +L013468 10100100011001* +L013482 00000110010011* +L013496 11011011110100* +L013510 11111111111111* NOTE BLOCK 2 * L013524 - 111111111111111111111111111111011111111111011111111111111111111111 + 111111111111111111111101111111011111111111111111111111111111111111 + 111111111101111111101111101111111111111111111101111111111111111111 + 111110111111111111111111111110110111111111111111111111111111111111 + 111111110111110111111111111111111111011111101111101111111111111110 + 111111011111111111111111111111111101111111110111111111111111111111 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111101111111111111111110111111111111110111111111111110111 - 111111111111111110111111101101111111111111111111111111111111111111 - 111111111101111111110111110111111111111111111111111011111111111111 - 111101110111111111111111111111111111111111111111011111011101111111 - 111111011111110111111111111111111101111111111111111101110111111111 - 111111111111111111011110111111111111111110111111111111111111111101 - 101011111111111111111111111111111111011111110111111111111111111111* + 110111111111111110111111111111111111111111111111111111111111011111 + 111111111111111111111111110111111111111110111111111111101111111111 + 101111111111111111110111111111111111111111111111111001111111111111* L014118 000000000000000000000000000000000000000000000000000000000000000000* -L014184 111111111111111111111111111111111111111110111111111111111111111110* +L014184 111111111111111111111111111111111111101110111111111111111111111111* L014250 000000000000000000000000000000000000000000000000000000000000000000* L014316 000000000000000000000000000000000000000000000000000000000000000000* L014382 000000000000000000000000000000000000000000000000000000000000000000* L014448 000000000000000000000000000000000000000000000000000000000000000000* -L014514 111111111111111111111111111111111111111111011011111111111111111111* -L014580 111111101111111011111111111111111111101111101101111111111101111111* -L014646 000000000000000000000000000000000000000000000000000000000000000000* -L014712 000000000000000000000000000000000000000000000000000000000000000000* -L014778 000000000000000000000000000000000000000000000000000000000000000000* +L014514 111111111111111111111111111111111111111111110111110111111111111111* +L014580 111111111111111111111111011101111111111111111111111011111111111111* +L014646 111111111111111111111111011101111111111111111011111111111111111111* +L014712 111111111111111101101101101111111111111111110111110111111111111111* +L014778 111111111111111101101101111110111111111111110111110111111111111111* L014844 000000000000000000000000000000000000000000000000000000000000000000* -L014910 111111111111111111111111110111111111111111111111111111111111111111* -L014976 111111111111111111111111111111111111111111111111111111111111111111* -L015042 111111111111111111111111111111111111111111111111111111111111111111* -L015108 111111111111111111111111111111111111111111111111111111111111111111* -L015174 111111111111111111111111111111111111111111111111111111111111111111* -L015240 111111111111111111111111111111111111111111111111111111111111111111* -L015306 111111111111111111111111111111111111111111111111111111111111111111* -L015372 111111111111111111111111111111111111111111111111111111111111111111* -L015438 111111111111111111111111111111111111111111111111111111111111111111* -L015504 111111111111111111111111111111111111111111111111111111111111111111* +L014910 111111111111111111101101111111111111111111111111111111111111111111* +L014976 111111111111111111111110111111111011111111011111111110111111101101* +L015042 000000000000000000000000000000000000000000000000000000000000000000* +L015108 000000000000000000000000000000000000000000000000000000000000000000* +L015174 000000000000000000000000000000000000000000000000000000000000000000* +L015240 110111111111111111111111111111111111111111111111111111111111111111* +L015306 111111111111111101111110111110111011111111010111110110111111101101* +L015372 111111111111111101111110101111111011111111010111110110111111101101* +L015438 000000000000000000000000000000000000000000000000000000000000000000* +L015504 000000000000000000000000000000000000000000000000000000000000000000* L015570 000000000000000000000000000000000000000000000000000000000000000000* -L015636 111111111111111111111101111111111111111111111111111111111111111111* -L015702 111111111011111111111111111101111111111111111111111111111111111111* -L015768 111111111111011101111111011101111110111111111111111110101111111111* -L015834 111111111111111111111111111101111111111111111111111111111111111011* -L015900 111111111111111111111111111101111111111111111111111011111111111111* -L015966 111111111111111111111111111111111111111111111111111111110111111111* -L016032 111011111111111111111111111111111111111111111111111111111111111111* -L016098 000000000000000000000000000000000000000000000000000000000000000000* +L015636 111111111101111111111111111111111111111111111111111111111111111111* +L015702 000000000000000000000000000000000000000000000000000000000000000000* +L015768 000000000000000000000000000000000000000000000000000000000000000000* +L015834 000000000000000000000000000000000000000000000000000000000000000000* +L015900 000000000000000000000000000000000000000000000000000000000000000000* +L015966 111111111111111101101101111111111111111111110111111111111111111111* +L016032 111111111111111101111110111111111011111111010111111110111111101101* +L016098 111111111111110111111111101111111111111111111111110111111111111111* L016164 000000000000000000000000000000000000000000000000000000000000000000* L016230 000000000000000000000000000000000000000000000000000000000000000000* L016296 000000000000000000000000000000000000000000000000000000000000000000* -L016362 111111111101111111111111111111111111111111111111111111111111111111* -L016428 111111111111111111111111111111111111111111111111111111111111111111* -L016494 111111111111111111111111111111111111111111111111111111111111111111* -L016560 111111111111111111111111111111111111111111111111111111111111111111* -L016626 111111111111111111111111111111111111111111111111111111111111111111* -L016692 111111111111111111111111111111111111111111111111111111111111111111* -L016758 111111111111111111111111111111111111111111111111111111111111111111* -L016824 111111111111111111111111111111111111111111111111111111111111111111* -L016890 111111111111111111111111111111111111111111111111111111111111111111* -L016956 111111111111111111111111111111111111111111111111111111111111111111* +L016362 111111111111111111111111111111111111111111111111011111111111111111* +L016428 000000000000000000000000000000000000000000000000000000000000000000* +L016494 000000000000000000000000000000000000000000000000000000000000000000* +L016560 000000000000000000000000000000000000000000000000000000000000000000* +L016626 000000000000000000000000000000000000000000000000000000000000000000* +L016692 111111111111111111111111110111111111111111111111111111111111111111* +L016758 000000000000000000000000000000000000000000000000000000000000000000* +L016824 000000000000000000000000000000000000000000000000000000000000000000* +L016890 000000000000000000000000000000000000000000000000000000000000000000* +L016956 000000000000000000000000000000000000000000000000000000000000000000* L017022 000000000000000000000000000000000000000000000000000000000000000000* -L017088 111110111111111111111111111110011111111111111111110111111111110111* -L017154 110111111111111111111111111111110111111111111111101111111111111111* -L017220 000000000000000000000000000000000000000000000000000000000000000000* -L017286 000000000000000000000000000000000000000000000000000000000000000000* -L017352 000000000000000000000000000000000000000000000000000000000000000000* -L017418 111111111111111111110111111111111111111111111111111111111111111111* -L017484 111111111111111111111111111111111111111111111111111111111111111111* -L017550 111111111111111111111111111111111111111111111111111111111111111111* -L017616 111111111111111111111111111111111111111111111111111111111111111111* -L017682 111111111111111111111111111111111111111111111111111111111111111111* +L017088 111111111111111111111111111111111011111111011111111111111111011111* +L017154 111111111111111111111111111111111011111111101111111111111111101101* +L017220 111111111111111111111111111111010111111111101111111111111111011101* +L017286 111111111111111111111111111111011111111111011111111111111111011110* +L017352 111111111111111111111111111111101011111111111111111111111111111111* +L017418 111101111111111111111111111111111111111111111111111111111111111111* +L017484 111111111111111111111111111111111111111111111110110111101111111111* +L017550 000000000000000000000000000000000000000000000000000000000000000000* +L017616 000000000000000000000000000000000000000000000000000000000000000000* +L017682 000000000000000000000000000000000000000000000000000000000000000000* L017748 111111111111111111111111111111111111111111111111111111111111111111* -L017814 111111111111111111111111111111111111111111111111111111111111111111* -L017880 111111111111111111111111111111111111111111111111111111111111111111* -L017946 111111111111111111111111111111111111111111111111111111111111111111* -L018012 111111111111111111111111111111111111111111111111111111111111111111* -L018078 111111111111111111111111111111111111111111111111111111111111111111* -L018144 111111111111111111111111111111111111111111111111111111111111111111* -L018210 111111111111111111111111111111111111111111111111111111111111111111* -L018276 111111111111111111111111111111111111111111111111111111111111111111* -L018342 111111111111111111111111111111111111111111111111111111111111111111* -L018408 111111111111111111111111111111111111111111111111111111111111111111* +L017814 111111111111111111111111111111111101111111111111111111111111111111* +L017880 000000000000000000000000000000000000000000000000000000000000000000* +L017946 000000000000000000000000000000000000000000000000000000000000000000* +L018012 000000000000000000000000000000000000000000000000000000000000000000* +L018078 000000000000000000000000000000000000000000000000000000000000000000* +L018144 111111011111111111111111111111111111111111111111111111111111111111* +L018210 000000000000000000000000000000000000000000000000000000000000000000* +L018276 000000000000000000000000000000000000000000000000000000000000000000* +L018342 000000000000000000000000000000000000000000000000000000000000000000* +L018408 000000000000000000000000000000000000000000000000000000000000000000* L018474 000000000000000000000000000000000000000000000000000000000000000000* -L018540 111101111111111111111111111111111111111111111111111111111111111111* -L018606 111111111111111111111111111111111111111111111111111111111111111111* -L018672 111111111111111111111111111111111111111111111111111111111111111111* -L018738 111111111111111111111111111111111111111111111111111111111111111111* -L018804 111111111111111111111111111111111111111111111111111111111111111111* -L018870 111111111111111111011111111111111111111111111111111111111111111111* -L018936 111111111111111111111111111111111111111111111111111111111111111111* -L019002 111111111111111111111111111111111111111111111111111111111111111111* -L019068 111111111111111111111111111111111111111111111111111111111111111111* -L019134 111111111111111111111111111111111111111111111111111111111111111111* +L018540 111111111111111101111111111111111111111111111111111111111111111111* +L018606 000000000000000000000000000000000000000000000000000000000000000000* +L018672 000000000000000000000000000000000000000000000000000000000000000000* +L018738 000000000000000000000000000000000000000000000000000000000000000000* +L018804 000000000000000000000000000000000000000000000000000000000000000000* +L018870 111111111111111111110111111111111111111111111111111111111111111111* +L018936 000000000000000000000000000000000000000000000000000000000000000000* +L019002 000000000000000000000000000000000000000000000000000000000000000000* +L019068 000000000000000000000000000000000000000000000000000000000000000000* +L019134 000000000000000000000000000000000000000000000000000000000000000000* L019200 000000000000000000000000000000000000000000000000000000000000000000* -L019266 111111111111111111111111111111111111111111111111111111111111111111* +L019266 111111110111111111111111111111111111111111111111111111111111111111* L019332 111111111111111111111111111111111111111111111111111111111111111111* L019398 111111111111111111111111111111111111111111111111111111111111111111* L019464 111111111111111111111111111111111111111111111111111111111111111111* @@ -437,178 +438,178 @@ L019728 111111111111111111111111111111111111111111111111111111111111111111* L019794 111111111111111111111111111111111111111111111111111111111111111111* L019860 111111111111111111111111111111111111111111111111111111111111111111* L019926 - 000000000000000000000000000000000000000000000000000000000000000000 - 101111111111111111111111111111111111111111111111111111111111111111* + 101111111111111111111111111111111111111111111111111111111111111111 + 000000000000000000000000000000000000000000000000000000000000000000* L020058 0010* L020062 01100011111000* -L020076 11101111110011* -L020090 00010110010000* -L020104 11101111110010* -L020118 10100110010000* -L020132 00110110010011* -L020146 00010110010000* -L020160 11101011110010* -L020174 10100100010000* -L020188 00000110010011* -L020202 11010011110111* -L020216 11111011111111* -L020230 00110110010000* -L020244 00000110010010* -L020258 11011111110001* -L020272 11110011111111* +L020076 00100110010011* +L020090 11100011110001* +L020104 00000110010011* +L020118 00100100010000* +L020132 10100110010011* +L020146 00100110010001* +L020160 00100110010011* +L020174 11100110010000* +L020188 11100100010010* +L020202 00100110010110* +L020216 00100110011111* +L020230 00100110010001* +L020244 00100100010011* +L020258 00010110010000* +L020272 11101011111110* NOTE BLOCK 3 * L020286 - 111111111111111111111111111101011111111111111111111111110111111111 - 111111111111011111111111111111111111111111110111111111101111111111 - 011111111110111111111111111111111111111111111111111111111111111111 - 111101111111111111111011110111111111111111111111111111111101111110 - 111111111111111111111111011111111111111101111111111011111111110111 - 110111111111111111011111111111111111101111111111111111111111011111 - 111111011111110111111111111111111111111111111111111111111111111111 - 111111110111111111111110111111111111111111011110111111111111111111 - 111111111111111111111111111111110101111111111111101101111111111111* + 011011111111111111111111111111111111111111111101111111111111111111 + 111111110111111111111111111111111111111111111011111111101111111111 + 111111111111111111111110101111111111111111111111111111110101111111 + 111110101111011111111111111111111111111111111111111111111111111011 + 111111111101111111111111111111111111111111111111111011111111101111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111110110111111111111011111011111111111111111111111111111 + 111111111111111111110111111011111111111110111111111111111111111111 + 111111111111111111111111111110110101111111101111111101111111111111* L020880 111111111111111111111111111111111111111111111111111111111111111111* -L020946 111111111110111111111111111111111111111111111111111101111111111111* -L021012 111111111101111111111111111111111111111111111111111101111111111111* -L021078 110111101110110111011111111111111111111111111111111110111111111111* -L021144 110111011111011011111111111111111111111111111111111101111011111111* +L020946 111110011111111111111111111111111111101111111111111110011101111111* +L021012 101110011111111101111111111111111111011111111111111101111110111111* +L021078 000000000000000000000000000000000000000000000000000000000000000000* +L021144 000000000000000000000000000000000000000000000000000000000000000000* L021210 000000000000000000000000000000000000000000000000000000000000000000* -L021276 011111111111111111111101111111111111111111111011111111111111011111* -L021342 111111111111111111111111111111111110111111111011111111111111111111* +L021276 111111111011011111111111110111111111111111110111111111111111111111* +L021342 111111111011111111111111111111111110111111111111111111111111111111* L021408 000000000000000000000000000000000000000000000000000000000000000000* L021474 000000000000000000000000000000000000000000000000000000000000000000* L021540 000000000000000000000000000000000000000000000000000000000000000000* L021606 111111111111111111111111111111111111111111111111111111111111111111* -L021672 111111111111011111111111111111111111111111111111111111111111111111* +L021672 111111111111111111111111111111111111111111110111111111111111111111* L021738 000000000000000000000000000000000000000000000000000000000000000000* L021804 000000000000000000000000000000000000000000000000000000000000000000* L021870 000000000000000000000000000000000000000000000000000000000000000000* L021936 000000000000000000000000000000000000000000000000000000000000000000* -L022002 111101111111111111111111111111111111111111111111111111111111111111* +L022002 111111111111111111111101111111111111111111111111111111111111111111* L022068 000000000000000000000000000000000000000000000000000000000000000000* L022134 000000000000000000000000000000000000000000000000000000000000000000* L022200 000000000000000000000000000000000000000000000000000000000000000000* L022266 000000000000000000000000000000000000000000000000000000000000000000* L022332 111111111111111111111111111111111111111111111111111111111111111111* -L022398 111111111111111111111111111111111111111111111110111111111111111111* -L022464 011111111111111111111111111111011111011111111111110111111110101111* -L022530 111111111111111111111111111111111111011111101111111011111111111111* +L022398 111111111111111111111111111111111111111110111111111111111111111111* +L022464 111011111111011111111111111101110111111111111011110111111111111111* +L022530 111111111111111111111011111101111111111111111111111011111111111111* L022596 000000000000000000000000000000000000000000000000000000000000000000* L022662 000000000000000000000000000000000000000000000000000000000000000000* -L022728 111111111111111111111111111111111111111111111101110111111111111111* -L022794 111111111111111111111111111111111111111101111110111111111111111111* +L022728 111111111111111111111111111111111111111101111111110111111111111111* +L022794 111111111111111111111111111111011111111110111111111111111111111111* L022860 000000000000000000000000000000000000000000000000000000000000000000* L022926 000000000000000000000000000000000000000000000000000000000000000000* L022992 000000000000000000000000000000000000000000000000000000000000000000* L023058 - 111111111111111111111111111111111111111111111101111111111111111111* -L023124 111111110111111111111111111111111111111111111111111111111111111111* -L023190 110111101110110111111111111111110111111111111111111111111111111111* + 111111111111111111111111111111111111111101111111111111111111111111* +L023124 111111111101111111111111111111111111111111111111111111111111111111* +L023190 000000000000000000000000000000000000000000000000000000000000000000* L023256 000000000000000000000000000000000000000000000000000000000000000000* L023322 000000000000000000000000000000000000000000000000000000000000000000* L023388 000000000000000000000000000000000000000000000000000000000000000000* -L023454 111111111111111111111111111111101111111111111111111111111111011111* +L023454 111111111111111111111111111111111011111111110111111111111111111111* L023520 000000000000000000000000000000000000000000000000000000000000000000* L023586 000000000000000000000000000000000000000000000000000000000000000000* L023652 000000000000000000000000000000000000000000000000000000000000000000* L023718 000000000000000000000000000000000000000000000000000000000000000000* L023784 - 111111111111111111111111111111111111111111111101111111111111111111* -L023850 111111111111111111110111101111111111111111111111111111101111111111* + 111111111111111111111111111111111111111101111111111111111111111111* +L023850 111111111110111111111111111111111111111111111111111111111111011011* L023916 000000000000000000000000000000000000000000000000000000000000000000* L023982 000000000000000000000000000000000000000000000000000000000000000000* L024048 000000000000000000000000000000000000000000000000000000000000000000* L024114 000000000000000000000000000000000000000000000000000000000000000000* -L024180 111111011101111011111111111111111111111111111111111111111111111111* -L024246 110111101110111011111111111111111111111111111111111111111111111111* -L024312 110111011110110111111111111111110111111111111111111111111111111111* -L024378 111011011101111111111111111111110111111111111111111111111111111111* -L024444 111111111111111011111111111111111011111111111111111111111111111111* +L024180 111110011111111111111111111111111111101111111101111111111101111111* +L024246 000000000000000000000000000000000000000000000000000000000000000000* +L024312 000000000000000000000000000000000000000000000000000000000000000000* +L024378 000000000000000000000000000000000000000000000000000000000000000000* +L024444 000000000000000000000000000000000000000000000000000000000000000000* L024510 000000000000000000000000000000000000000000000000000000000000000000* -L024576 111111111111111111111111111101111111111111111111111111111111111111* -L024642 000000000000000000000000000000000000000000000000000000000000000000* -L024708 000000000000000000000000000000000000000000000000000000000000000000* -L024774 000000000000000000000000000000000000000000000000000000000000000000* -L024840 000000000000000000000000000000000000000000000000000000000000000000* -L024906 111111111111111111111111111111111111111111111111111111111111110111* -L024972 000000000000000000000000000000000000000000000000000000000000000000* -L025038 000000000000000000000000000000000000000000000000000000000000000000* -L025104 000000000000000000000000000000000000000000000000000000000000000000* -L025170 000000000000000000000000000000000000000000000000000000000000000000* +L024576 111111111111111111111111011111111111111111111111111111111111111111* +L024642 111111111111111111111111111111111111111111111111111111111111111111* +L024708 111111111111111111111111111111111111111111111111111111111111111111* +L024774 111111111111111111111111111111111111111111111111111111111111111111* +L024840 111111111111111111111111111111111111111111111111111111111111111111* +L024906 111111111111111111111111111111111111111111111111111111111111111111* +L024972 111111111111111111111111111111111111111111111111111111111111111111* +L025038 111111111111111111111111111111111111111111111111111111111111111111* +L025104 111111111111111111111111111111111111111111111111111111111111111111* +L025170 111111111111111111111111111111111111111111111111111111111111111111* L025236 111111111111111111111111111111111111111111111111111111111111111111* -L025302 111111111111111111110111101111111111111111111111111111111111111110* -L025368 000000000000000000000000000000000000000000000000000000000000000000* -L025434 000000000000000000000000000000000000000000000000000000000000000000* -L025500 000000000000000000000000000000000000000000000000000000000000000000* -L025566 000000000000000000000000000000000000000000000000000000000000000000* -L025632 110111111111110111111111111111111111111111111111111111111111111111* -L025698 111111011101111111111111111111110111111111111111111111111111111111* -L025764 111111101111111011111111111111110111111111111111111111111111111111* -L025830 110111111111111111111111111111111011111111111111111111111111111111* -L025896 000000000000000000000000000000000000000000000000000000000000000000* +L025302 111111111110111111111111111111111111111111111111111111111011011111* +L025368 111111111111111111111111111111111111111111111111111111111111111111* +L025434 111111111111111111111111111111111111111111111111111111111111111111* +L025500 111111111111111111111111111111111111111111111111111111111111111111* +L025566 111111111111111111111111111111111111111111111111111111111111111111* +L025632 111110011111110111111111111111111111101111111101111111111101111111* +L025698 111111111111111111111111111111111111111111111111111111111111111111* +L025764 111111111111111111111111111111111111111111111111111111111111111111* +L025830 111111111111111111111111111111111111111111111111111111111111111111* +L025896 111111111111111111111111111111111111111111111111111111111111111111* L025962 000000000000000000000000000000000000000000000000000000000000000000* -L026028 111111111111111111111111110111111111111111111111111111111111111111* -L026094 000000000000000000000000000000000000000000000000000000000000000000* -L026160 000000000000000000000000000000000000000000000000000000000000000000* -L026226 000000000000000000000000000000000000000000000000000000000000000000* -L026292 000000000000000000000000000000000000000000000000000000000000000000* -L026358 111111111111111111111111111111111111111111111111111111111111111011* -L026424 000000000000000000000000000000000000000000000000000000000000000000* -L026490 000000000000000000000000000000000000000000000000000000000000000000* -L026556 000000000000000000000000000000000000000000000000000000000000000000* -L026622 000000000000000000000000000000000000000000000000000000000000000000* +L026028 111111111111111111111111111111110111111111111011111111111111111111* +L026094 111111111111111111111111111111111111111111111111111111111111111111* +L026160 111111111111111111111111111111111111111111111111111111111111111111* +L026226 111111111111111111111111111111111111111111111111111111111111111111* +L026292 111111111111111111111111111111111111111111111111111111111111111111* +L026358 111111111111111111111111111111111111111111111111111111111111111111* +L026424 111111111111111111111111111111111111111111111111111111111111111111* +L026490 111111111111111111111111111111111111111111111111111111111111111111* +L026556 111111111111111111111111111111111111111111111111111111111111111111* +L026622 111111111111111111111111111111111111111111111111111111111111111111* L026688 000000000000000000000000000000000000000000000000000000000000000000 - 111111111111111111111111111111111111111111111111101111111111111111* + 111111111111111111111111111111111111111111101111111111111111111111* L026820 0010* -L026824 00100110010000* +L026824 10100111010000* L026838 11100110011110* L026852 00100110011100* L026866 00100110011111* L026880 11100110010001* L026894 10101111111111* -L026908 00100100010100* +L026908 00100110010100* L026922 00100110010010* L026936 01100011110010* -L026950 11100110010011* -L026964 00100110010000* -L026978 00100110010010* -L026992 01101011111010* -L027006 10100110011111* -L027020 00100110010001* -L027034 00100110010011* +L026950 00100101010011* +L026964 00010110010000* +L026978 11101011110010* +L026992 01111111111010* +L027006 00000101011111* +L027020 00010110010001* +L027034 11100011110011* NOTE BLOCK 4 * L027048 - 111111111111111111111111111111111111111101111111111111111111111111 - 111111111111111111111111111111111111110111111101110111111111111110 - 111111111101111111111111110111111111111111110111101111110111111111 - 111011111111111111111111111111111101111111011111111111101111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111111111111111111111111111110111111101110111111111111111 + 111101111111111111111111111101111110111111010111111111111111111111 + 111011011111011111011111111111111111111111111111111111101111111111 111111111111110111111111111111111111111111111111111111111111111111 - 111110010111111111111111011111111111111111111111111111111111111111 - 111111111111101111111111111110111111111111111111111101111111110111 - 101111111111111111101011111111011111111111111111111111111101111111 - 111111111111111101111110111111111011101111111111111111111111111111* + 111111110111111111111111011111111111111111111111111111111111111111 + 111111111111111111111101111111111111111111111111101111111011110111 + 101111111101111111111111111011111111111111111111111110111101111110 + 111111111111111101111111111111101011101110111111111111111111111111* L027642 - 110111110111111101101111101111111111111111111111011110011111111011* -L027708 111111111111111111111111111111111111111111111111111111111111111111* -L027774 111111111111111111111111111111111111111111111111111111111111111111* -L027840 111111111111111111111111111111111111111111111111111111111111111111* -L027906 111111111111111111111111111111111111111111111111111111111111111111* -L027972 111111111111111111111111111111111111111111111111111111111111111111* -L028038 101111111111011111111111111111111011111111111111111111111011111111* -L028104 011111111111101111111111111111111111111111111111111111111111111111* + 110111110111111101111110101111111101111111111111111111011111111010* +L027708 000000000000000000000000000000000000000000000000000000000000000000* +L027774 000000000000000000000000000000000000000000000000000000000000000000* +L027840 000000000000000000000000000000000000000000000000000000000000000000* +L027906 000000000000000000000000000000000000000000000000000000000000000000* +L027972 000000000000000000000000000000000000000000000000000000000000000000* +L028038 101111111111101111111111111111111011111111111111111111110111111111* +L028104 011111111111111111111111111111111111111111111111111111111011111111* L028170 000000000000000000000000000000000000000000000000000000000000000000* L028236 000000000000000000000000000000000000000000000000000000000000000000* L028302 000000000000000000000000000000000000000000000000000000000000000000* L028368 011111111111111111111111111111111111111111111111111111111111111111* -L028434 111111111111111111111111111111111111111101111111111111111111111111* +L028434 111111111111111111111111111111101111111111111111111111111111111111* L028500 111111111111111111111111111111111111111111111111111111111111111111* L028566 111111111111111111111111111111111111111111111111111111111111111111* L028632 111111111111111111111111111111111111111111111111111111111111111111* @@ -620,19 +621,19 @@ L028962 111111111111111111111111111111111111111111111111111111111111111111* L029028 111111111111111111111111111111111111111111111111111111111111111111* L029094 000000000000000000000000000000000000000000000000000000000000000000* -L029160 111111111111111111101111111111111111111111111111111111111111111110* +L029160 111111111111111111111111111111111111111111111110111111111111111110* L029226 111111111111111111111111111111111111111111111111111111111111111111* L029292 111111111111111111111111111111111111111111111111111111111111111111* L029358 111111111111111111111111111111111111111111111111111111111111111111* L029424 111111111111111111111111111111111111111111111111111111111111111111* -L029490 000000000000000000000000000000000000000000000000000000000000000000* -L029556 111111111111111111111111111111111111111111111111111111111111111111* -L029622 111111111111111111111111111111111111111111111111111111111111111111* -L029688 111111111111111111111111111111111111111111111111111111111111111111* -L029754 111111111111111111111111111111111111111111111111111111111111111111* +L029490 111111101101111011101111111010111111011001101011111011111101111111* +L029556 111111111111011111111111111111111111111111111111101111111111111111* +L029622 000000000000000000000000000000000000000000000000000000000000000000* +L029688 000000000000000000000000000000000000000000000000000000000000000000* +L029754 000000000000000000000000000000000000000000000000000000000000000000* L029820 000000000000000000000000000000000000000000000000000000000000000000* -L029886 111111111111111111111111111111111111111111111101111111111111111111* +L029886 111111111111111111111111111111111111111111111111111111111111111111* L029952 111111111111111111111111111111111111111111111111111111111111111111* L030018 111111111111111111111111111111111111111111111111111111111111111111* L030084 111111111111111111111111111111111111111111111111111111111111111111* @@ -644,13 +645,13 @@ L030414 111111111111111111111111111111111111111111111111111111111111111111* L030480 111111111111111111111111111111111111111111111111111111111111111111* L030546 000000000000000000000000000000000000000000000000000000000000000000* -L030612 111111011111111111111111111111111111111111111111111111111111111111* +L030612 111101111111111111111111111111111111111111111111111111111111111111* L030678 111111111111111111111111111111111111111111111111111111111111111111* L030744 111111111111111111111111111111111111111111111111111111111111111111* L030810 111111111111111111111111111111111111111111111111111111111111111111* L030876 111111111111111111111111111111111111111111111111111111111111111111* -L030942 111111111110111011111001111011011110011011101011111011111101111111* -L031008 111110111111111111111111111111111111111111111111111111110111111111* +L030942 111111111111111111111111111111111111111111111111111111111111111101* +L031008 111111101111111011101111111110111111111011101011111011111111111111* L031074 000000000000000000000000000000000000000000000000000000000000000000* L031140 000000000000000000000000000000000000000000000000000000000000000000* L031206 000000000000000000000000000000000000000000000000000000000000000000* @@ -667,17 +668,17 @@ L031800 111111111111111111111111111111111111111111111111111111111111111111* L031866 111111111111111111111111111111111111111111111111111111111111111111* L031932 111111111111111111111111111111111111111111111111111111111111111111* L031998 - 111111111111111111111111111101111111111111111111111111111111111111* -L032064 111111111110111011111001111011011110011011101011111011111101111111* + 111111111111111111111111111111111111111111111111111101111111111111* +L032064 111111101101111011101111111010111111011001101011111011111101111111* L032130 111111111111111111111111111111111111111111111111111111111111111111* L032196 111111111111111111111111111111111111111111111111111111111111111111* L032262 111111111111111111111111111111111111111111111111111111111111111111* L032328 111111111111111111111111111111111111111111111111111111111111111111* -L032394 111111111111111111011111111111111111111111111111111111111111111111* -L032460 111111111110111011111111111011111110111011101011111011111111111111* -L032526 000000000000000000000000000000000000000000000000000000000000000000* -L032592 000000000000000000000000000000000000000000000000000000000000000000* -L032658 000000000000000000000000000000000000000000000000000000000000000000* +L032394 111111111111111111111111111111011111111111111111111111111111111111* +L032460 111111111111111111111111111111111111111111111111111111111111111111* +L032526 111111111111111111111111111111111111111111111111111111111111111111* +L032592 111111111111111111111111111111111111111111111111111111111111111111* +L032658 111111111111111111111111111111111111111111111111111111111111111111* L032724 111111111111111111111111111111111111111111111111111111111111111111* L032790 111111111111111111111111111111111111111111111111111111111111111111* @@ -694,96 +695,96 @@ L033450 000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000* L033582 0010* -L033586 11100011111010* +L033586 00100011110000* L033600 10101111110011* -L033614 00000110010100* +L033614 00010110010100* L033628 11101111110010* -L033642 01111011111100* -L033656 00000011111111* -L033670 00010110010000* -L033684 11101111111110* +L033642 01111011111000* +L033656 10100011111111* +L033670 11010111110000* +L033684 11110011111110* L033698 00110110010001* -L033712 10101011111111* -L033726 11010111110000* -L033740 11111111111111* -L033754 00110011110001* -L033768 11101011111110* +L033712 11100111111111* +L033726 11011111110000* +L033740 11110011111111* +L033754 00111011110001* +L033768 00000110011111* L033782 11010111111100* -L033796 11111111111110* +L033796 11111111111111* NOTE BLOCK 5 * L033810 - 111111110111101111111111111111111111111111011111111111111111111111 - 111111111111111110111111111111110111101111111111111111111111111111 - 111110111110110111111110111111111111111111111111111111100111111111 - 111111111111111111101111111101111111111111111111111111111110111111 - 111111111111111111111111111111111111111111110111111111111111101111 - 110111111111111111111111110111011111111101111111111111111111111111 - 111111011111111111111111011111111111111111111111111111111111111111 - 111111111111111111111011111111111111111111111111111111111111111111 - 101111111111111111111111111111111110111111111111110101111111111111* + 111111111111111111111111111111111111111111111011111111111111111011 + 111111111110111111111010111111111111101111111111111111111111111111 + 111110111111111111011111111110111111111111111111101111111111111111 + 111111111111010111111111111111111111111110111111111111101110111101 + 111111111111111111111111111111101111111111111111111011111111011111 + 111111110111111111111111011111111111111111111111111111111111111111 + 111111111111111101111111111111111001111111111111111101111111111111 + 111111111111111111111111111011111111111111111111111111111111111111 + 101011011111111111111111111111111111111111111111111111111111111111* L034404 000000000000000000000000000000000000000000000000000000000000000000* -L034470 111111111111111111111111111111011111111111111111111111111111011111* -L034536 111110111111101011101110111111111111111111111111111111101011101111* -L034602 111110111111101011101110111101111111111111111111111111101111101111* -L034668 111110111011101011101110111111111111111111111111111111101111101111* -L034734 111110111111101011101110111111111111111101111111111111101111101111* -L034800 111111111111111111111111111111111010111111111111111111011111111111* -L034866 111111111111011111111111111111111010111111111111111111111111111111* -L034932 111111111111111111111111111111111110111111111111111111111111011111* -L034998 111111111111110111111111111111101110111111111111111111111111111111* -L035064 111101111111111111111111111111111010111111111111111111111111111111* +L034470 111111111111111111110111111111111111111111110111111111111111111111* +L034536 111110111111101011111111111110111111101111111011111111111110101111* +L034602 111110111111111011111111111110111111101111111011111111111110100111* +L034668 111110101111111011111111111110111111101111111011111111111110101111* +L034734 111110111101111011111111111110111111101111111011111111111110101111* +L034800 111001111111111111111111111111111011111111111111111111111111111111* +L034866 111011111111111111111111111111111011111111111111111111111111011111* +L034932 111011111111111111111111111111111111111111110111111111111111111111* +L034998 111011111111111111111011111111111111111111111111111111111101111111* +L035064 111011111111111111111111111111111011011111111111111111111111111111* L035130 000000000000000000000000000000000000000000000000000000000000000000* -L035196 111111111111111111111101111111101110111111111111111111111111111111* -L035262 111111111111111111011111111111101110111111111111111111111111111111* -L035328 111111111111011111111111111111111110111111110111111111111111111111* -L035394 000000000000000000000000000000000000000000000000000000000000000000* +L035196 111111111111111111011111111111111111111111111111111111111111111111* +L035262 111011111111111111111011111101111111111111111111111111111111111111* +L035328 111011111111110111111011111111111111111111111111111111111111111111* +L035394 111011111111111111111111111111111111111111111111111111111111011101* L035460 000000000000000000000000000000000000000000000000000000000000000000* -L035526 111101111111111111111111111111110111111111111111111111111111101111* -L035592 111111111111111111111111111111101101111111111111111111111111011111* -L035658 000000000000000000000000000000000000000000000000000000000000000000* +L035526 111110111111111111111111111111111111111111111111111111111111011111* +L035592 110111111111111111111111111011011111111111111111111111111111111111* +L035658 111101111111111111111101111111111111111111111111111111111111111111* L035724 000000000000000000000000000000000000000000000000000000000000000000* L035790 000000000000000000000000000000000000000000000000000000000000000000* L035856 000000000000000000000000000000000000000000000000000000000000000000* -L035922 111111111111011111111111111111110111111111011111111011111111111111* -L035988 110111101101011111111111101111110111111111101111111110111111111111* -L036054 111111111111111111011111111111101101111111111111111111111111111111* -L036120 000000000000000000000000000000000000000000000000000000000000000000* -L036186 000000000000000000000000000000000000000000000000000000000000000000* -L036252 111111111111011111111111111111111111111111111111111111101111111111* -L036318 111111111111111111111011111111111101111111111111111111111101111111* -L036384 111111111111111101111111111111111111111111111111111111011111111111* +L035922 111111111111111111111111111111111111111111111111111111111111111111* +L035988 111111111111111111111111111111111111111111111111111111111111111111* +L036054 111111111111111111111111111111111111111111111111111111111111111111* +L036120 111111111111111111111111111111111111111111111111111111111111111111* +L036186 111111111111111111111111111111111111111111111111111111111111111111* +L036252 111111011110011111111111111111111111111111111111110111111111111011* +L036318 110111111111111111111011111111111111111111111111111111111101111111* +L036384 000000000000000000000000000000000000000000000000000000000000000000* L036450 000000000000000000000000000000000000000000000000000000000000000000* L036516 000000000000000000000000000000000000000000000000000000000000000000* L036582 000000000000000000000000000000000000000000000000000000000000000000* -L036648 111111111111111111111111111111110111111111111111111111011111111111* -L036714 111111111111111111111101111111101101111111111111111111111111111111* -L036780 000000000000000000000000000000000000000000000000000000000000000000* +L036648 111111111111111101111111111111111111111111111111111111111111111111* +L036714 111101111111111111111111111111110111111111111111111111111111111111* +L036780 110111111111111111111011111101111111111111111111111111111111111111* L036846 000000000000000000000000000000000000000000000000000000000000000000* L036912 000000000000000000000000000000000000000000000000000000000000000000* -L036978 111111111111110111111111111111011111111111111111111111111111111111* -L037044 111111111111111111111111111111111001111111111111111111011111111111* -L037110 000000000000000000000000000000000000000000000000000000000000000000* -L037176 000000000000000000000000000000000000000000000000000000000000000000* -L037242 000000000000000000000000000000000000000000000000000000000000000000* +L036978 111111111111111111111111111111111111111111111111111111111111111111* +L037044 111111111111111111111111111111111111111111111111111111111111111111* +L037110 111111111111111111111111111111111111111111111111111111111111111111* +L037176 111111111111111111111111111111111111111111111111111111111111111111* +L037242 111111111111111111111111111111111111111111111111111111111111111111* L037308 000000000000000000000000000000000000000000000000000000000000000000* -L037374 111111111111111111011111111111011111111111111111111111111111111111* -L037440 111101111111111111111111111111111001111111111111111111111111111111* +L037374 111111111111111111110111111111111111111111111111111111111101111111* +L037440 110101111111111111111111111111111011111111111111111111111111111111* L037506 000000000000000000000000000000000000000000000000000000000000000000* L037572 000000000000000000000000000000000000000000000000000000000000000000* L037638 000000000000000000000000000000000000000000000000000000000000000000* -L037704 111111111111111111111111111111111111111111111111111111011111111111* -L037770 111111111111111111111011111111111101101111111111111111111111111111* +L037704 111111111111110111110111111111111111111111111111111111111111111111* +L037770 110111111111111111111111111111111011011111111111111111111111111111* L037836 000000000000000000000000000000000000000000000000000000000000000000* L037902 000000000000000000000000000000000000000000000000000000000000000000* L037968 000000000000000000000000000000000000000000000000000000000000000000* L038034 000000000000000000000000000000000000000000000000000000000000000000* -L038100 111111111111111111111111110111111111111111111111111111111111111111* +L038100 111111111111111111111111111111111111111111111111111111111111111111* L038166 111111111111111111111111111111111111111111111111111111111111111111* L038232 111111111111111111111111111111111111111111111111111111111111111111* L038298 111111111111111111111111111111111111111111111111111111111111111111* @@ -795,21 +796,21 @@ L038628 111111111111111111111111111111111111111111111111111111111111111111* L038694 111111111111111111111111111111111111111111111111111111111111111111* L038760 000000000000000000000000000000000000000000000000000000000000000000* -L038826 111111111111111111111111111111111111111111111111111111111111111111* -L038892 111111111111111111111111111111111111111111111111111111111111111111* -L038958 111111111111111111111111111111111111111111111111111111111111111111* -L039024 111111111111111111111111111111111111111111111111111111111111111111* -L039090 111111111111111111111111111111111111111111111111111111111111111111* -L039156 111111111111011111111111111111111101111111111111111111111111111111* -L039222 111111111111111111111101111111011110111111111111111111111111111111* -L039288 111111111111101111111101111111011111111111111111111111111111111111* -L039354 111111111111011111111111111111100101111111011111111011111111111111* -L039420 111111111111011111111110111111110101111111011111111011111111111111* +L038826 111111111111111111111111110111111111111111111111111111111111111111* +L038892 111111111011111111111111111111111111111111111111111111111111110111* +L038958 111111111111111111111111101111111110111101111111011110011111110111* +L039024 111111111111101111111111111111111111111111111111111111111111110111* +L039090 111111111111111111111111111111111111111111111111111011111111110111* +L039156 111111111111111111111111111111110111011111111011111111111111111111* +L039222 110111111111111111111011111111111111111111110111111111111111111111* +L039288 000000000000000000000000000000000000000000000000000000000000000000* +L039354 000000000000000000000000000000000000000000000000000000000000000000* +L039420 000000000000000000000000000000000000000000000000000000000000000000* L039486 000000000000000000000000000000000000000000000000000000000000000000* -L039552 111111110111111111111111111111111111111110111111111111111111111111* -L039618 110111101101011111111110101111110101111111101111111110111111111111* -L039684 110111101101011111111111101111100101111111101111111110111111111111* +L039552 111011111111111111111111111111111111111111111111111111111111111111* +L039618 000000000000000000000000000000000000000000000000000000000000000000* +L039684 000000000000000000000000000000000000000000000000000000000000000000* L039750 000000000000000000000000000000000000000000000000000000000000000000* L039816 000000000000000000000000000000000000000000000000000000000000000000* L039882 111111111111111111111111111111111111111111111111111111111111111111* @@ -823,118 +824,118 @@ L040212 L040344 0010* L040348 10100110011110* L040362 10110100010010* -L040376 10000100011110* +L040376 00000110011110* L040390 11000011110011* -L040404 10000100011111* +L040404 10110100011111* L040418 10110100010011* -L040432 10100100011110* -L040446 11001111110011* +L040432 00110110011110* +L040446 11101111110011* L040460 10100100011111* -L040474 11100110010011* -L040488 00010110011110* -L040502 11011011111110* -L040516 11111111111110* -L040530 00100100011111* -L040544 00110110011110* -L040558 11100011111110* +L040474 10100100010011* +L040488 11011011111110* +L040502 11111111111110* +L040516 10100110011110* +L040530 10100100011111* +L040544 11000011111110* +L040558 11111011111110* NOTE BLOCK 6 * L040572 + 111111110111111111111110101101111111111111111111111111111111111111 + 011111111111011111111111111111111111011111111111111111111111111111 + 111111111111110111111111111111101111111111111111111111111111111111 + 111110111111111111101011111111111111111111111111111111111101111010 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111111111101110111111111111111111111111111111111111 - 111111111110111111011111111111101111111111111111111111111101110111 - 111111111111111111111111111111111111111111111011111111111111111111 - 111111111111111111111111111111111111111111111111111111111111111111 - 110111111111101011111111111111111111111111111111111111111111111111 - 111111111111111111110111110111111011011111101111010111111111111111 - 111111111111111101111111111111111111111110111111111111111111111111 - 101110101011111111111111111111111111111111111111111111110111111111* + 111111111111111111111111111011111111111011110111111111111111111111 + 111111011111111111111111111111111111111111111101011111111011111111 + 111111111111111101111111111111110111111110111111111111111111111111 + 111111111111111111111111111111111111111111101111111110111111111111* L041166 111111111111111111111111111111111111111111111111111111111111111111* -L041232 111110111111111110111111111111111111111110101111111111111111111111* -L041298 111110111111111111111111111111111111111110101111101111111111111111* +L041232 111111111111111110111111111111111111111110111111111110111011111111* +L041298 111111111111111111111111111111111111111110111111101110111011111111* L041364 000000000000000000000000000000000000000000000000000000000000000000* L041430 000000000000000000000000000000000000000000000000000000000000000000* L041496 000000000000000000000000000000000000000000000000000000000000000000* -L041562 111111111111111111111111111111110111111111111111111111111111111111* +L041562 111111111111111111111111011111111111111111111111111111111111111111* L041628 000000000000000000000000000000000000000000000000000000000000000000* L041694 000000000000000000000000000000000000000000000000000000000000000000* L041760 000000000000000000000000000000000000000000000000000000000000000000* L041826 000000000000000000000000000000000000000000000000000000000000000000* L041892 111111111111111111111111111111111111111111111111111111111111111111* -L041958 111111111111111111111111110111111111111111111111111111111111111111* -L042024 111111111111111111111111111111111111111111111111111111111111111111* -L042090 111111111111111111111111111111111111111111111111111111111111111111* -L042156 111111111111111111111111111111111111111111111111111111111111111111* -L042222 111111111111111111111111111111111111111111111111111111111111111111* -L042288 111111111111111111111111111111111111111111111111111111111111111111* -L042354 111111111111111111111111111111111111111111111111111111111111111111* -L042420 111111111111111111111111111111111111111111111111111111111111111111* -L042486 111111111111111111111111111111111111111111111111111111111111111111* -L042552 111111111111111111111111111111111111111111111111111111111111111111* +L041958 111111111111111111111111111111110111111111111111111111111111110111* +L042024 111111111111111111111011111111111111111111111111111111111111110111* +L042090 111111111111111111110111111111011011111111111111111111111111111111* +L042156 000000000000000000000000000000000000000000000000000000000000000000* +L042222 000000000000000000000000000000000000000000000000000000000000000000* +L042288 111111111111111111111111111111111111111111110111111111111111111111* +L042354 000000000000000000000000000000000000000000000000000000000000000000* +L042420 000000000000000000000000000000000000000000000000000000000000000000* +L042486 000000000000000000000000000000000000000000000000000000000000000000* +L042552 000000000000000000000000000000000000000000000000000000000000000000* L042618 000000000000000000000000000000000000000000000000000000000000000000* -L042684 111111111111111111111111111111111111111111111111111111111111111111* -L042750 111111111111111111111111111111111111111111111111111111111111111111* -L042816 111111111111111111111111111111111111111111111111111111111111111111* -L042882 111111111111111111111111111111111111111111111111111111111111111111* -L042948 111111111111111111111111111111111111111111111111111111111111111111* -L043014 111111111111111111011111111111111111111111110111111111111111111111* -L043080 111111111111111111111111111111111111111111110111111111111110111111* -L043146 111111111111101111101111111101101111111111111111111111111101111111* -L043212 000000000000000000000000000000000000000000000000000000000000000000* +L042684 111101101111111111111111111111111111111111111111111111111111111111* +L042750 111101111111111011111111111111111111111111111111111111111111111111* +L042816 111111010111110111111111111111111111111111111111111111111111111110* +L042882 111111100111111011111111111111111111111111111111111111111111111110* +L042948 111101111011111111111111111111111111111111111111111111111111111111* +L043014 111111111111110111111111111111111111111111111111111111111111111101* +L043080 111101010111111111111111111111111111111111111111111111111111111111* +L043146 111111100111111011111111111111111111111111111111111111111111111111* +L043212 111111111011111111111111111111111111111111111111111111111111111101* L043278 000000000000000000000000000000000000000000000000000000000000000000* L043344 000000000000000000000000000000000000000000000000000000000000000000* -L043410 110111111101111111111111111111111111011111111111110111110111111111* -L043476 111111111101111111111111111111111111111111111111111111111111111111* -L043542 111011111111111111111111111111111111011111111111110111110111111111* -L043608 111011111111111111111111111111111111101111111111111011110111111111* +L043410 111111111111111111111101111111111111111111111111111111111111111111* +L043476 000000000000000000000000000000000000000000000000000000000000000000* +L043542 000000000000000000000000000000000000000000000000000000000000000000* +L043608 000000000000000000000000000000000000000000000000000000000000000000* L043674 000000000000000000000000000000000000000000000000000000000000000000* -L043740 111111111111111111111111111111111111111111111111111111111111111111* -L043806 111111111111111111111111111111111111111111111111111111111111111111* -L043872 111111111111111111111111111111111111111111111111111111111111111111* -L043938 111111111111111111111111111111111111111111111111111111111111111111* -L044004 111111111111111111111111111111111111111111111111111111111111111111* +L043740 111111111111111111111111111111111111011111111111111111111111111111* +L043806 000000000000000000000000000000000000000000000000000000000000000000* +L043872 000000000000000000000000000000000000000000000000000000000000000000* +L043938 000000000000000000000000000000000000000000000000000000000000000000* +L044004 000000000000000000000000000000000000000000000000000000000000000000* L044070 - 111111111111111111111111111111111111111110111111111111111111111011* -L044136 111110111111111101111111111111111111111110111111101111111111111111* -L044202 111111111111111111111111111111111111111111111111111111111111111111* -L044268 111111111111111111111111111111111111111111111111111111111111111111* -L044334 111111111111111111111111111111111111111111111111111111111111111111* -L044400 111111111111111111111111111111111111111111111111111111111111111111* -L044466 111111111111111111011111011111111111111111111111111111111111111111* -L044532 111111111111111111111111011111111111111111111111111111111110111111* -L044598 111111111111111111101111111111011111111111111111111111111101111111* + 111111111111111111111111111111111111111110111111111111111110111111* +L044136 111111111111111101111111111111111111111110111111101110111111111111* +L044202 000000000000000000000000000000000000000000000000000000000000000000* +L044268 000000000000000000000000000000000000000000000000000000000000000000* +L044334 000000000000000000000000000000000000000000000000000000000000000000* +L044400 000000000000000000000000000000000000000000000000000000000000000000* +L044466 011111111111111111111111111111111111111111111111111111111111111111* +L044532 000000000000000000000000000000000000000000000000000000000000000000* +L044598 000000000000000000000000000000000000000000000000000000000000000000* L044664 000000000000000000000000000000000000000000000000000000000000000000* L044730 000000000000000000000000000000000000000000000000000000000000000000* L044796 - 111111111111111111111111111111111111111110111111111111111111111011* -L044862 111111110111111111111111111111111111111111111111111111111111111111* -L044928 111111111111111111111111111111111111111111111111111111111111111111* -L044994 111111111111111111111111111111111111111111111111111111111111111111* -L045060 111111111111111111111111111111111111111111111111111111111111111111* -L045126 111111111111111111111111111111111111111111111111111111111111111111* -L045192 111111111111111111111111111111111111111111111111111111111111111111* -L045258 111111111111111111111111111111111111111111111111111111111111111111* -L045324 111111111111111111111111111111111111111111111111111111111111111111* -L045390 111111111111111111111111111111111111111111111111111111111111111111* -L045456 111111111111111111111111111111111111111111111111111111111111111111* + 111111111111111111111111111111111111111110111111111111111110111111* +L044862 111111111111111111111111111101111111111111111111111111111111111111* +L044928 000000000000000000000000000000000000000000000000000000000000000000* +L044994 000000000000000000000000000000000000000000000000000000000000000000* +L045060 000000000000000000000000000000000000000000000000000000000000000000* +L045126 000000000000000000000000000000000000000000000000000000000000000000* +L045192 111111111111111111111111111111111111111111111101111111111111111111* +L045258 000000000000000000000000000000000000000000000000000000000000000000* +L045324 000000000000000000000000000000000000000000000000000000000000000000* +L045390 000000000000000000000000000000000000000000000000000000000000000000* +L045456 000000000000000000000000000000000000000000000000000000000000000000* L045522 111111111111111111111111111111111111111110111111111111111111111111* -L045588 111111111111110111111011111111111111111111111111111111111111111111* -L045654 111111111111111111111111111111111111111111111111111111111111111111* -L045720 111111111111111111111111111111111111111111111111111111111111111111* -L045786 111111111111111111111111111111111111111111111111111111111111111111* -L045852 111111111111111111111111111111111111111111111111111111111111111111* -L045918 111111011111111111111111111111111111111111111111111111111111111111* -L045984 111111111111111111111111111111111111111111111111111111111111111111* -L046050 111111111111111111111111111111111111111111111111111111111111111111* -L046116 111111111111111111111111111111111111111111111111111111111111111111* -L046182 111111111111111111111111111111111111111111111111111111111111111111* +L045588 111111111111011111111111111111111111111011111111111111111111111111* +L045654 000000000000000000000000000000000000000000000000000000000000000000* +L045720 000000000000000000000000000000000000000000000000000000000000000000* +L045786 000000000000000000000000000000000000000000000000000000000000000000* +L045852 000000000000000000000000000000000000000000000000000000000000000000* +L045918 111111111111111111111111110111111111111111111111111111111111111111* +L045984 000000000000000000000000000000000000000000000000000000000000000000* +L046050 000000000000000000000000000000000000000000000000000000000000000000* +L046116 000000000000000000000000000000000000000000000000000000000000000000* +L046182 000000000000000000000000000000000000000000000000000000000000000000* L046248 000000000000000000000000000000000000000000000000000000000000000000* -L046314 111111111111111111111111111111111111111111111111111111111111111111* +L046314 111111111111111111011111111111111111111111111111111111111111111111* L046380 111111111111111111111111111111111111111111111111111111111111111111* L046446 111111111111111111111111111111111111111111111111111111111111111111* L046512 111111111111111111111111111111111111111111111111111111111111111111* @@ -946,74 +947,74 @@ L046842 111111111111111111111111111111111111111111111111111111111111111111* L046908 111111111111111111111111111111111111111111111111111111111111111111* L046974 000000000000000000000000000000000000000000000000000000000000000000 - 101111111111111111111111111111111111111111111111111111111111111111* + 111111111111111111111111111111111111111111101111111111111111111111* L047106 0010* L047110 11100110011000* L047124 00101011111110* -L047138 00010110010011* -L047152 11011011111111* -L047166 11110011110000* +L047138 10100110010101* +L047152 00100110011111* +L047166 10100110011000* L047180 10100110010010* -L047194 00100110011001* -L047208 11101011110011* -L047222 00110110010000* -L047236 10100110010011* -L047250 00010110010101* -L047264 11100011110011* -L047278 00111011110010* -L047292 00000110010010* -L047306 11011111110001* -L047320 11110011111111* +L047194 00100110010000* +L047208 00100110010011* +L047222 00100110010001* +L047236 00100110010011* +L047250 00100110010100* +L047264 00100110010010* +L047278 00100011110010* +L047292 00100110010011* +L047306 00010110010001* +L047320 11101011111111* NOTE BLOCK 7 * L047334 - 111111111111111111111111111111111111111111111111111111111011111111 - 111101111111111111111110111111111111111111111111111111111111111111 - 111111111111101111111111111110111111111111111111111111111111110110 - 111111111111111111111111101011111111111111111111111111111111111111 - 111111111111111111111011111111111111111111111111111011111111111111 - 111111110111111011111111111111011111111111111111111111011111111111 - 111111101110111110111111111111111101111111110111011101111111111111 - 111111111111111111101111111111111111101101101110111111111111111111 - 101011111111111111111111111111111011110111111111111111111111101111* + 111111111111111111101111111111101111111110111111111111110111111111 + 111111111111111111111011111111110111111111111111111011111111111110 + 111110111111111111111111111111111111111111111111101111111110111111 + 111011111111111111111111111101111111111111111111111111101111111111 + 111111111111111111111111111111111111111111111111111111111111111011 + 111111111111111011111111011111111111011111111111111111111111111111 + 011111100110011111111111111111111111111111111111111111111111111111 + 111111111111111101111111111011111111111011111110111111111111111111 + 111111111111111111111101111111111110111111101111111110111111101111* L047928 000000000000000000000000000000000000000000000000000000000000000000* -L047994 110111111111111111111111111110101111101111111111111011111111101111* -L048060 110111111111111111111011111110111111101111111111111011111111101111* -L048126 111111111111111111111110111101111111111111111111111111111111111111* +L047994 111110111111111111111011111011111101111111111111111111111111101011* +L048060 111110111111111111111111111011101101111111111111111111111111101011* +L048126 111101111111111111111111111111111111111111111111111011111111111111* L048192 000000000000000000000000000000000000000000000000000000000000000000* L048258 000000000000000000000000000000000000000000000000000000000000000000* -L048324 111111110111011111101111010111111110111011111111111110101111111111* +L048324 110111111011101111111110101111111111011011111111011111011111111111* L048390 000000000000000000000000000000000000000000000000000000000000000000* L048456 000000000000000000000000000000000000000000000000000000000000000000* L048522 000000000000000000000000000000000000000000000000000000000000000000* L048588 000000000000000000000000000000000000000000000000000000000000000000* L048654 000000000000000000000000000000000000000000000000000000000000000000* -L048720 111111111111111111111111111111111111111111011111111111111111111111* -L048786 000000000000000000000000000000000000000000000000000000000000000000* -L048852 000000000000000000000000000000000000000000000000000000000000000000* -L048918 000000000000000000000000000000000000000000000000000000000000000000* -L048984 000000000000000000000000000000000000000000000000000000000000000000* -L049050 111111111111111111011111111111111111111111111111111111111111111111* -L049116 000000000000000000000000000000000000000000000000000000000000000000* -L049182 000000000000000000000000000000000000000000000000000000000000000000* -L049248 000000000000000000000000000000000000000000000000000000000000000000* -L049314 000000000000000000000000000000000000000000000000000000000000000000* +L048720 111111111111111111111111111111111111111111111101111111111111111111* +L048786 111111111111111111111111111111111111111111111111111111111111111111* +L048852 111111111111111111111111111111111111111111111111111111111111111111* +L048918 111111111111111111111111111111111111111111111111111111111111111111* +L048984 111111111111111111111111111111111111111111111111111111111111111111* +L049050 111111111111111111111111111111111111111111111111111111111111111111* +L049116 111111111111111111111111111111111111111111111111111111111111111111* +L049182 111111111111111111111111111111111111111111111111111111111111111111* +L049248 111111111111111111111111111111111111111111111111111111111111111111* +L049314 111111111111111111111111111111111111111111111111111111111111111111* L049380 111111111111111111111111111111111111111111111111111111111111111111* -L049446 111111110111111111111111111111111111111111111101111111111111111111* -L049512 111111110111111111111111111111011111111111111111111111111111111111* +L049446 111111111111111111111111111111111111011111111101111111111111111111* +L049512 111111111111111111110111111111111111011111111111111111111111111111* L049578 000000000000000000000000000000000000000000000000000000000000000000* L049644 000000000000000000000000000000000000000000000000000000000000000000* L049710 000000000000000000000000000000000000000000000000000000000000000000* -L049776 111111111111111111111111111111111111111111111111111111111111111111* +L049776 111111111111111111111111111111111111110111111111111111111111111111* L049842 111111111111111111111111111111111111111111111111111111111111111111* L049908 111111111111111111111111111111111111111111111111111111111111111111* L049974 111111111111111111111111111111111111111111111111111111111111111111* L050040 111111111111111111111111111111111111111111111111111111111111111111* L050106 - 111111111111111111111111111111111111111111111110111111111111111011* -L050172 111101111111111111111111111111111111111111111111111111111111111111* + 111111111111111111111111111110111111111111111110111111111111111111* +L050172 111111111111111111111111111111111111111111111111111111111111111111* L050238 111111111111111111111111111111111111111111111111111111111111111111* L050304 111111111111111111111111111111111111111111111111111111111111111111* L050370 111111111111111111111111111111111111111111111111111111111111111111* @@ -1024,20 +1025,20 @@ L050634 111111111111111111111111111111111111111111111111111111111111111111* L050700 111111111111111111111111111111111111111111111111111111111111111111* L050766 111111111111111111111111111111111111111111111111111111111111111111* L050832 - 111111111111111111111111111111111111111111111111111111111111110111* + 111111111111111111111111111101111111111111111111111111111111111111* L050898 111111111111111111111111111111111111111111111101111111111111111111* -L050964 111111011111111111111111111111111111111111111111111111111011111111* -L051030 111111111111111111111111111111110111111111111111111111111111111111* -L051096 111111111111111111111111111111111111111101111111011111111111111111* +L050964 111111011111111111111111111111111111111110111111111111111111111111* +L051030 111111111111111111111111111111111111111111111111111101111111111111* +L051096 011111111111111101111111111111111111111111111111111111111111111111* L051162 000000000000000000000000000000000000000000000000000000000000000000* -L051228 111101111111111111111111111111111111111111111111111111111011111101* -L051294 111111111111111111111111111111111111111111011111111111111111111101* -L051360 111101111111111101111111111111111111111111111111111111111111111101* -L051426 110111111110111111111111111111111111101111111111111111111111111111* +L051228 111111111111111111111111111111111111111110111111111111111101111101* +L051294 111111111111111111111111111111111111111111111111111111110111111101* +L051360 111111111111111111011111111111111111111111111111111111111101111101* +L051426 111111111110111111111111111011111101111111111111111111111111111111* L051492 000000000000000000000000000000000000000000000000000000000000000000* L051558 111111111111111111111111111111111111111111111101111111111111111111* -L051624 111111111111111111111111111111111111111111111101111111111111111111* +L051624 111111111111111111111111111111111111111111111111111111111111111111* L051690 111111111111111111111111111111111111111111111111111111111111111111* L051756 111111111111111111111111111111111111111111111111111111111111111111* L051822 111111111111111111111111111111111111111111111111111111111111111111* @@ -1048,17 +1049,17 @@ L052086 111111111111111111111111111111111111111111111111111111111111111111* L052152 111111111111111111111111111111111111111111111111111111111111111111* L052218 111111111111111111111111111111111111111111111111111111111111111111* L052284 - 111111111111111111111111111111111111111111111110111111111111111011* -L052350 111111111111111011111111111111111111111111110111111111111111111111* + 111111111111111111111111111110111111111111111110111111111111111111* +L052350 111111111111110111111111111111111011111111111111111111111111111111* L052416 111111111111111111111111111111111111111111111111111111111111111111* L052482 111111111111111111111111111111111111111111111111111111111111111111* L052548 111111111111111111111111111111111111111111111111111111111111111111* L052614 111111111111111111111111111111111111111111111111111111111111111111* -L052680 111111111111111111111111111111111011111101111110101111111111111111* -L052746 111111111111111111111111111111111011111110111110011111111111111111* -L052812 000000000000000000000000000000000000000000000000000000000000000000* -L052878 000000000000000000000000000000000000000000000000000000000000000000* -L052944 000000000000000000000000000000000000000000000000000000000000000000* +L052680 101111111111111110111111111111111111111111111110111110111111111111* +L052746 111111111111111111111111111111111111111111111111111111111111111111* +L052812 111111111111111111111111111111111111111111111111111111111111111111* +L052878 111111111111111111111111111111111111111111111111111111111111111111* +L052944 111111111111111111111111111111111111111111111111111111111111111111* L053010 111111111111111111111111111111111111111111111111111111111111111111* L053076 111111111111111111111111111111111111111111111111111111111111111111* @@ -1073,24 +1074,24 @@ L053604 111111111111111111111111111111111111111111111111111111111111111111* L053670 111111111111111111111111111111111111111111111111111111111111111111* L053736 000000000000000000000000000000000000000000000000000000000000000000 - 101111111111111111111111111111111111111111111111111111111111111111* + 111111111111111111111111111111111111111111101111111111111111111111* L053868 0010* L053872 11100110011100* L053886 01101011110010* -L053900 00100110010001* -L053914 00100110010011* +L053900 00010110010001* +L053914 11101011110011* L053928 10100110010000* -L053942 11100011111110* -L053956 00110110010100* -L053970 11000011110011* -L053984 10100110011001* -L053998 11100110011111* -L054012 00010110010110* -L054026 11101111110011* -L054040 00110011110001* -L054054 10100110010011* -L054068 11011011111100* -L054082 11111111111111* +L053942 00000110011110* +L053956 11011111110101* +L053970 11111011110011* +L053984 10100110011000* +L053998 11100110011110* +L054012 11010011110110* +L054026 11111011110011* +L054040 00111111110000* +L054054 00000110010010* +L054068 11010011111101* +L054082 11111011111111* E1 1 01111100 @@ -1110,6 +1111,6 @@ E1 10000010 1 * -C34AF* +C7442* U00000000000000000000000000000000* -0AF8 +07B9 diff --git a/Logic/68030_tk.crf b/Logic/68030_tk.crf index 46b56b2..f13ff41 100644 --- a/Logic/68030_tk.crf +++ b/Logic/68030_tk.crf @@ -1,7 +1,7 @@ // Signal Name Cross Reference File // ispLEVER Classic 1.7.00.05.28.13 -// Design '68030_tk' created Mon Jan 12 22:00:38 2015 +// Design '68030_tk' created Sun Feb 01 21:36:50 2015 // LEGEND: '>' Functional Block Port Separator diff --git a/Logic/68030_tk.data b/Logic/68030_tk.data new file mode 100644 index 0000000..2929004 --- /dev/null +++ b/Logic/68030_tk.data @@ -0,0 +1,677 @@ +MODELDATA +MODELDATA_VERSION "1.0"; +DESIGN "68030_tk"; +DATE "Sun Feb 01 21:13:56 2015"; +VENDOR "Lattice Semiconductor Corporation"; +PROGRAM "STAMP Model Generator"; + +/* port drive, max transition and max capacitance */ +PORTDATA +A1: MAXTRANS(0.0); +A_16: MAXTRANS(0.0); +A_17: MAXTRANS(0.0); +A_18: MAXTRANS(0.0); +A_19: MAXTRANS(0.0); +A_20: MAXTRANS(0.0); +A_21: MAXTRANS(0.0); +A_22: MAXTRANS(0.0); +A_23: MAXTRANS(0.0); +A_24: MAXTRANS(0.0); +A_25: MAXTRANS(0.0); +A_26: MAXTRANS(0.0); +A_27: MAXTRANS(0.0); +A_28: MAXTRANS(0.0); +A_29: MAXTRANS(0.0); +A_30: MAXTRANS(0.0); +A_31: MAXTRANS(0.0); +BGACK_000: MAXTRANS(0.0); +BG_030: MAXTRANS(0.0); +CLK_000: MAXTRANS(0.0); +CLK_030: MAXTRANS(0.0); +CLK_OSZI: MAXTRANS(0.0); +DTACK: MAXTRANS(0.0); +FC_0: MAXTRANS(0.0); +FC_1: MAXTRANS(0.0); +FPU_SENSE: MAXTRANS(0.0); +IPL_0: MAXTRANS(0.0); +IPL_1: MAXTRANS(0.0); +IPL_2: MAXTRANS(0.0); +RST: MAXTRANS(0.0); +VPA: MAXTRANS(0.0); +nEXP_SPACE: MAXTRANS(0.0); +AMIGA_ADDR_ENABLE: MAXTRANS(0.0); +AMIGA_BUS_DATA_DIR: MAXTRANS(0.0); +AMIGA_BUS_ENABLE_HIGH: MAXTRANS(0.0); +AMIGA_BUS_ENABLE_LOW: MAXTRANS(0.0); +AVEC: MAXTRANS(0.0); +BGACK_030: MAXTRANS(0.0); +BG_000: MAXTRANS(0.0); +CIIN: MAXTRANS(0.0); +CLK_DIV_OUT: MAXTRANS(0.0); +CLK_EXP: MAXTRANS(0.0); +DSACK1: MAXTRANS(0.0); +E: MAXTRANS(0.0); +FPU_CS: MAXTRANS(0.0); +IPL_030_0: MAXTRANS(0.0); +IPL_030_1: MAXTRANS(0.0); +IPL_030_2: MAXTRANS(0.0); +RESET: MAXTRANS(0.0); +VMA: MAXTRANS(0.0); +A0: MAXTRANS(0.0); +AS_000: MAXTRANS(0.0); +AS_030: MAXTRANS(0.0); +BERR: MAXTRANS(0.0); +DS_030: MAXTRANS(0.0); +LDS_000: MAXTRANS(0.0); +RW: MAXTRANS(0.0); +RW_000: MAXTRANS(0.0); +SIZE_0: MAXTRANS(0.0); +SIZE_1: MAXTRANS(0.0); +UDS_000: MAXTRANS(0.0); +ENDPORTDATA + +/* timing arc data */ +TIMINGDATA + +ARCDATA +AS_030_AS_000_delay: +CELL_RISE(scalar) { +VALUES(15.0); +} +CELL_FALL(scalar) { +VALUES(15.0); +} +ENDARCDATA + +ARCDATA +A_20_CIIN_delay: +CELL_RISE(scalar) { +VALUES(15.0); +} +CELL_FALL(scalar) { +VALUES(15.0); +} +ENDARCDATA + +ARCDATA +A_21_CIIN_delay: +CELL_RISE(scalar) { +VALUES(15.0); +} +CELL_FALL(scalar) { +VALUES(15.0); +} +ENDARCDATA + +ARCDATA +A_22_CIIN_delay: +CELL_RISE(scalar) { +VALUES(15.0); +} +CELL_FALL(scalar) { +VALUES(15.0); +} +ENDARCDATA + +ARCDATA +A_23_CIIN_delay: +CELL_RISE(scalar) { +VALUES(15.0); +} +CELL_FALL(scalar) { +VALUES(15.0); +} +ENDARCDATA + +ARCDATA +A_24_CIIN_delay: +CELL_RISE(scalar) { +VALUES(15.0); +} +CELL_FALL(scalar) { +VALUES(15.0); +} +ENDARCDATA + +ARCDATA +A_25_CIIN_delay: +CELL_RISE(scalar) { +VALUES(15.0); +} +CELL_FALL(scalar) { +VALUES(15.0); +} +ENDARCDATA + +ARCDATA +A_26_CIIN_delay: +CELL_RISE(scalar) { +VALUES(15.0); +} +CELL_FALL(scalar) { +VALUES(15.0); +} +ENDARCDATA + +ARCDATA +A_27_CIIN_delay: +CELL_RISE(scalar) { +VALUES(15.0); +} +CELL_FALL(scalar) { +VALUES(15.0); +} +ENDARCDATA + +ARCDATA +A_28_CIIN_delay: +CELL_RISE(scalar) { +VALUES(15.0); +} +CELL_FALL(scalar) { +VALUES(15.0); +} +ENDARCDATA + +ARCDATA +A_29_CIIN_delay: +CELL_RISE(scalar) { +VALUES(15.0); +} +CELL_FALL(scalar) { +VALUES(15.0); +} +ENDARCDATA + +ARCDATA +A_30_CIIN_delay: +CELL_RISE(scalar) { +VALUES(15.0); +} +CELL_FALL(scalar) { +VALUES(15.0); +} +ENDARCDATA + +ARCDATA +A_31_CIIN_delay: +CELL_RISE(scalar) { +VALUES(15.0); +} +CELL_FALL(scalar) { +VALUES(15.0); +} +ENDARCDATA + +ARCDATA +DS_030_LDS_000_delay: +CELL_RISE(scalar) { +VALUES(15.0); +} +CELL_FALL(scalar) { +VALUES(15.0); +} +ENDARCDATA + +ARCDATA +DS_030_UDS_000_delay: +CELL_RISE(scalar) { +VALUES(15.0); +} +CELL_FALL(scalar) { +VALUES(15.0); +} +ENDARCDATA + +ARCDATA +AS_000_AMIGA_BUS_DATA_DIR_delay: +CELL_RISE(scalar) { +VALUES(12.5); +} +CELL_FALL(scalar) { +VALUES(12.5); +} +ENDARCDATA + +ARCDATA +AS_030_FPU_CS_delay: +CELL_RISE(scalar) { +VALUES(12.5); +} +CELL_FALL(scalar) { +VALUES(12.5); +} +ENDARCDATA + +ARCDATA +A_16_FPU_CS_delay: +CELL_RISE(scalar) { +VALUES(12.5); +} +CELL_FALL(scalar) { +VALUES(12.5); +} +ENDARCDATA + +ARCDATA +A_17_FPU_CS_delay: +CELL_RISE(scalar) { +VALUES(12.5); +} +CELL_FALL(scalar) { +VALUES(12.5); +} +ENDARCDATA + +ARCDATA +A_18_FPU_CS_delay: +CELL_RISE(scalar) { +VALUES(12.5); +} +CELL_FALL(scalar) { +VALUES(12.5); +} +ENDARCDATA + +ARCDATA +A_19_FPU_CS_delay: +CELL_RISE(scalar) { +VALUES(12.5); +} +CELL_FALL(scalar) { +VALUES(12.5); +} +ENDARCDATA + +ARCDATA +BGACK_000_FPU_CS_delay: +CELL_RISE(scalar) { +VALUES(12.5); +} +CELL_FALL(scalar) { +VALUES(12.5); +} +ENDARCDATA + +ARCDATA +FC_0_FPU_CS_delay: +CELL_RISE(scalar) { +VALUES(12.5); +} +CELL_FALL(scalar) { +VALUES(12.5); +} +ENDARCDATA + +ARCDATA +FC_1_FPU_CS_delay: +CELL_RISE(scalar) { +VALUES(12.5); +} +CELL_FALL(scalar) { +VALUES(12.5); +} +ENDARCDATA + +ARCDATA +FPU_SENSE_FPU_CS_delay: +CELL_RISE(scalar) { +VALUES(12.5); +} +CELL_FALL(scalar) { +VALUES(12.5); +} +ENDARCDATA + +ARCDATA +RW_000_AMIGA_BUS_DATA_DIR_delay: +CELL_RISE(scalar) { +VALUES(12.5); +} +CELL_FALL(scalar) { +VALUES(12.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_AS_000_delay: +CELL_RISE(scalar) { +VALUES(18.0); +} +CELL_FALL(scalar) { +VALUES(18.0); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_CIIN_delay: +CELL_RISE(scalar) { +VALUES(18.0); +} +CELL_FALL(scalar) { +VALUES(18.0); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_LDS_000_delay: +CELL_RISE(scalar) { +VALUES(18.0); +} +CELL_FALL(scalar) { +VALUES(18.0); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_LDS_000_delay: +CELL_RISE(scalar) { +VALUES(18.0); +} +CELL_FALL(scalar) { +VALUES(18.0); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_SIZE_0_delay: +CELL_RISE(scalar) { +VALUES(18.0); +} +CELL_FALL(scalar) { +VALUES(18.0); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_SIZE_0_delay: +CELL_RISE(scalar) { +VALUES(18.0); +} +CELL_FALL(scalar) { +VALUES(18.0); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_SIZE_1_delay: +CELL_RISE(scalar) { +VALUES(18.0); +} +CELL_FALL(scalar) { +VALUES(18.0); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_SIZE_1_delay: +CELL_RISE(scalar) { +VALUES(18.0); +} +CELL_FALL(scalar) { +VALUES(18.0); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_UDS_000_delay: +CELL_RISE(scalar) { +VALUES(18.0); +} +CELL_FALL(scalar) { +VALUES(18.0); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_UDS_000_delay: +CELL_RISE(scalar) { +VALUES(18.0); +} +CELL_FALL(scalar) { +VALUES(18.0); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_AMIGA_BUS_DATA_DIR_delay: +CELL_RISE(scalar) { +VALUES(15.5); +} +CELL_FALL(scalar) { +VALUES(15.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_AMIGA_BUS_DATA_DIR_delay: +CELL_RISE(scalar) { +VALUES(15.5); +} +CELL_FALL(scalar) { +VALUES(15.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_AMIGA_BUS_ENABLE_HIGH_delay: +CELL_RISE(scalar) { +VALUES(15.5); +} +CELL_FALL(scalar) { +VALUES(15.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_AMIGA_BUS_ENABLE_HIGH_delay: +CELL_RISE(scalar) { +VALUES(15.5); +} +CELL_FALL(scalar) { +VALUES(15.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_AMIGA_BUS_ENABLE_HIGH_delay: +CELL_RISE(scalar) { +VALUES(15.5); +} +CELL_FALL(scalar) { +VALUES(15.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_AMIGA_BUS_ENABLE_LOW_delay: +CELL_RISE(scalar) { +VALUES(15.5); +} +CELL_FALL(scalar) { +VALUES(15.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_AMIGA_BUS_ENABLE_LOW_delay: +CELL_RISE(scalar) { +VALUES(15.5); +} +CELL_FALL(scalar) { +VALUES(15.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_CLK_DIV_OUT_delay: +CELL_RISE(scalar) { +VALUES(15.5); +} +CELL_FALL(scalar) { +VALUES(15.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_CLK_EXP_delay: +CELL_RISE(scalar) { +VALUES(15.5); +} +CELL_FALL(scalar) { +VALUES(15.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_A0_delay: +CELL_RISE(scalar) { +VALUES(8.5); +} +CELL_FALL(scalar) { +VALUES(8.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_AS_030_delay: +CELL_RISE(scalar) { +VALUES(8.5); +} +CELL_FALL(scalar) { +VALUES(8.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_BGACK_030_delay: +CELL_RISE(scalar) { +VALUES(8.5); +} +CELL_FALL(scalar) { +VALUES(8.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_BG_000_delay: +CELL_RISE(scalar) { +VALUES(8.5); +} +CELL_FALL(scalar) { +VALUES(8.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_DSACK1_delay: +CELL_RISE(scalar) { +VALUES(8.5); +} +CELL_FALL(scalar) { +VALUES(8.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_DS_030_delay: +CELL_RISE(scalar) { +VALUES(8.5); +} +CELL_FALL(scalar) { +VALUES(8.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_E_delay: +CELL_RISE(scalar) { +VALUES(8.5); +} +CELL_FALL(scalar) { +VALUES(8.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_IPL_030_0_delay: +CELL_RISE(scalar) { +VALUES(8.5); +} +CELL_FALL(scalar) { +VALUES(8.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_IPL_030_1_delay: +CELL_RISE(scalar) { +VALUES(8.5); +} +CELL_FALL(scalar) { +VALUES(8.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_IPL_030_2_delay: +CELL_RISE(scalar) { +VALUES(8.5); +} +CELL_FALL(scalar) { +VALUES(8.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_RESET_delay: +CELL_RISE(scalar) { +VALUES(8.5); +} +CELL_FALL(scalar) { +VALUES(8.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_RW_delay: +CELL_RISE(scalar) { +VALUES(8.5); +} +CELL_FALL(scalar) { +VALUES(8.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_RW_000_delay: +CELL_RISE(scalar) { +VALUES(8.5); +} +CELL_FALL(scalar) { +VALUES(8.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_VMA_delay: +CELL_RISE(scalar) { +VALUES(8.5); +} +CELL_FALL(scalar) { +VALUES(8.5); +} +ENDARCDATA + +ARCDATA +CLK_OSZI_AMIGA_ADDR_ENABLE_delay: +CELL_RISE(scalar) { +VALUES(6.0); +} +CELL_FALL(scalar) { +VALUES(6.0); +} +ENDARCDATA + +ENDTIMINGDATA +ENDMODELDATA diff --git a/Logic/68030_tk.grp b/Logic/68030_tk.grp new file mode 100644 index 0000000..8b9cf2c --- /dev/null +++ b/Logic/68030_tk.grp @@ -0,0 +1,28 @@ + +GROUP MACH_SEG_A DS_030 RN_DS_030 RESET_DLY_7_ RESET_DLY_6_ RESET_DLY_5_ + RESET_DLY_4_ RESET_DLY_3_ inst_CLK_030_H RESET_DLY_2_ inst_AMIGA_BUS_ENABLE_DMA_HIGH + AVEC cpu_est_0_ CLK_000_P_SYNC_4_ CLK_000_P_SYNC_7_ CLK_000_P_SYNC_8_ + CLK_000_N_SYNC_4_ +GROUP MACH_SEG_B RESET RN_RESET IPL_030_1_ RN_IPL_030_1_ IPL_030_0_ RN_IPL_030_0_ + IPL_030_2_ RN_IPL_030_2_ inst_LDS_000_INT inst_AMIGA_BUS_ENABLE_DMA_LOW + SIZE_DMA_0_ CLK_EXP CLK_000_N_SYNC_11_ CLK_000_N_SYNC_10_ +GROUP MACH_SEG_C SM_AMIGA_3_ SM_AMIGA_2_ inst_AS_000_INT inst_nEXP_SPACE_D0reg + inst_VPA_D AMIGA_BUS_ENABLE_LOW state_machine_un15_clk_000_ne_i_n + cpu_est_1_ CLK_000_P_SYNC_9_ CLK_000_P_SYNC_3_ CLK_000_P_SYNC_5_ + CLK_000_P_SYNC_6_ CLK_000_N_SYNC_1_ CLK_000_N_SYNC_6_ inst_CLK_000_NE_D0 + +GROUP MACH_SEG_D AMIGA_ADDR_ENABLE RN_AMIGA_ADDR_ENABLE VMA RN_VMA BG_000 + RN_BG_000 RESET_DLY_1_ RESET_DLY_0_ inst_DS_030_D0 LDS_000 UDS_000 + AMIGA_BUS_ENABLE_HIGH CLK_000_P_SYNC_0_ CLK_000_N_SYNC_0_ CLK_000_P_SYNC_2_ + CLK_000_N_SYNC_3_ inst_CLK_000_D1 +GROUP MACH_SEG_E CIIN BERR AMIGA_BUS_DATA_DIR AS_000 CIIN_0 un8_ciin inst_CLK_000_NE + inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE +GROUP MACH_SEG_F SM_AMIGA_7_ inst_AS_030_000_SYNC SM_AMIGA_6_ inst_DS_000_ENABLE + SM_AMIGA_0_ SM_AMIGA_1_ SM_AMIGA_4_ SM_AMIGA_5_ CLK_000_P_SYNC_1_ + CLK_000_N_SYNC_7_ +GROUP MACH_SEG_G RW A0 inst_UDS_000_INT inst_DTACK_D0 E RN_E SIZE_0_ CLK_DIV_OUT + cpu_est_2_ inst_CLK_000_D0 inst_CLK_000_PE CLK_000_N_SYNC_2_ CLK_000_N_SYNC_5_ + CLK_000_N_SYNC_8_ CLK_000_N_SYNC_9_ CLK_OUT_PRE_Dreg +GROUP MACH_SEG_H DSACK1 RN_DSACK1 RW_000 RN_RW_000 AS_030 RN_AS_030 BGACK_030 + RN_BGACK_030 SIZE_DMA_1_ inst_AS_030_D0 inst_BGACK_030_INT_D FPU_CS + SIZE_1_ \ No newline at end of file diff --git a/Logic/68030_tk.ipr b/Logic/68030_tk.ipr index e821407..485b2fb 100644 --- a/Logic/68030_tk.ipr +++ b/Logic/68030_tk.ipr @@ -1 +1 @@ -9265=57FG g \ No newline at end of file +00206=4tD5[\\ \ No newline at end of file diff --git a/Logic/68030_tk.isc b/Logic/68030_tk.isc new file mode 100644 index 0000000..3e9fd07 --- /dev/null +++ b/Logic/68030_tk.isc @@ -0,0 +1,888 @@ +-- CREATED BY: Lattice Semiconductor Universal File Writer V2.48 +-- DEVICE NAME: iM4A5-128/64 +-- TOTAL_FUSES = 54096 +-- DATA_CRC = 9F0B9D43 +-- JEDEC_FILENAME = 68030_tk.jed +-- JEDEC_CHECKSUM = 0x3062 +-- +-- |--------------------------------------------| +-- |- ispLEVER Fitter Report File -| +-- |- Version 1.7.00.05.28.13 -| +-- |- (c)Copyright, Lattice Semiconductor 2002 -| +-- |--------------------------------------------| +-- TITLE: +-- AUTHOR: +-- PATTERN: +-- COMPANY: +-- REVISION: +-- DATE: Sun Feb 01 20:15:26 2015 +-- ABEL mach447a +-- +-- NOTE Part Number : M4A5-128/64-10VC +-- NOTE Handling of Preplacements No Change +-- NOTE Use placement data from 68030_tk.vct +-- NOTE Global clocks routable as PT clocks? N +-- NOTE 22V10/MACH1XX/2XX S/R Compatibility? Y +-- NOTE SET/RESET treated as DONT_CARE? Y +-- NOTE Reduce Unforced Global Clocks? N +-- NOTE Iterate between partitioning and place/route? Y +-- NOTE Balanced partitioning? Y +-- NOTE Reduce Routes Per Placement? N +-- NOTE Spread Placement? Y +-- NOTE Run Time Upper Bound in 15 minutes 0 +-- NOTE Zero Hold Time For Input Registers? Y +-- NOTE Table of pin names and numbers +-- NOTE PINS A_23_:85 A_22_:84 SIZE_1_:79 A_21_:94 A_20_:93 +-- NOTE PINS A_31_:4 A_19_:97 A_18_:95 A_17_:59 A_16_:96 IPL_2_:68 +-- NOTE PINS FC_1_:58 IPL_1_:56 IPL_0_:67 AS_000:42 FC_0_:57 +-- NOTE PINS UDS_000:32 LDS_000:31 A1:60 nEXP_SPACE:14 BERR:41 +-- NOTE PINS BG_030:21 BGACK_000:28 CLK_030:64 CLK_000:11 CLK_OSZI:61 +-- NOTE PINS CLK_DIV_OUT:65 CLK_EXP:10 FPU_CS:78 FPU_SENSE:91 +-- NOTE PINS DTACK:30 AVEC:92 VPA:36 RST:86 AMIGA_BUS_DATA_DIR:48 +-- NOTE PINS AMIGA_BUS_ENABLE_LOW:20 AMIGA_BUS_ENABLE_HIGH:34 +-- NOTE PINS CIIN:47 SIZE_0_:70 A_30_:5 A_29_:6 A_28_:15 A_27_:16 +-- NOTE PINS A_26_:17 A_25_:18 A_24_:19 IPL_030_2_:9 IPL_030_1_:7 +-- NOTE PINS IPL_030_0_:8 AS_030:82 RW_000:80 DS_030:98 A0:69 +-- NOTE PINS BG_000:29 BGACK_030:83 DSACK1:81 E:66 VMA:35 RESET:3 +-- NOTE PINS RW:71 AMIGA_ADDR_ENABLE:33 +-- NOTE Table of node names and numbers +-- NOTE NODES RN_SIZE_1_:287 RN_AS_000:203 RN_UDS_000:185 RN_LDS_000:191 +-- NOTE NODES RN_BERR:200 RN_SIZE_0_:263 RN_IPL_030_2_:131 +-- NOTE NODES RN_IPL_030_1_:143 RN_IPL_030_0_:137 RN_AS_030:281 +-- NOTE NODES RN_RW_000:269 RN_DS_030:101 RN_A0:257 RN_BG_000:175 +-- NOTE NODES RN_BGACK_030:275 RN_DSACK1:283 RN_E:251 RN_VMA:173 +-- NOTE NODES RN_RESET:125 RN_RW:245 RN_AMIGA_ADDR_ENABLE:179 +-- NOTE NODES cpu_est_0_:116 cpu_est_1_:187 inst_AS_000_INT:235 +-- NOTE NODES inst_AMIGA_BUS_ENABLE_DMA_LOW:106 inst_AS_030_D0:277 +-- NOTE NODES inst_nEXP_SPACE_D0reg:133 inst_DS_030_D0:158 +-- NOTE NODES inst_AS_030_000_SYNC:155 inst_BGACK_030_INT_D:284 +-- NOTE NODES SIZE_DMA_0_:289 SIZE_DMA_1_:104 inst_VPA_D:139 +-- NOTE NODES inst_UDS_000_INT:259 inst_LDS_000_INT:253 inst_DTACK_D0:121 +-- NOTE NODES inst_CLK_OUT_PRE_50:196 inst_CLK_000_D1:167 inst_CLK_000_D0:188 +-- NOTE NODES inst_CLK_000_PE:113 SM_AMIGA_7_:227 SM_AMIGA_5_:229 +-- NOTE NODES inst_CLK_OUT_PRE:190 inst_CLK_000_NE:199 CLK_000_N_SYNC_11_:278 +-- NOTE NODES CLK_000_P_SYNC_9_:136 cpu_est_2_:193 inst_CLK_000_NE_D0:176 +-- NOTE NODES SM_AMIGA_3_:241 SM_AMIGA_0_:223 inst_AMIGA_BUS_ENABLE_DMA_HIGH:122 +-- NOTE NODES SM_AMIGA_6_:161 RESET_DLY_0_:182 RESET_DLY_1_:128 +-- NOTE NODES RESET_DLY_2_:115 RESET_DLY_3_:109 RESET_DLY_4_:145 +-- NOTE NODES RESET_DLY_5_:103 RESET_DLY_6_:119 RESET_DLY_7_:130 +-- NOTE NODES CLK_000_P_SYNC_0_:184 CLK_000_P_SYNC_1_:254 CLK_000_P_SYNC_2_:248 +-- NOTE NODES CLK_000_P_SYNC_3_:124 CLK_000_P_SYNC_4_:152 CLK_000_P_SYNC_5_:178 +-- NOTE NODES CLK_000_P_SYNC_6_:169 CLK_000_P_SYNC_7_:146 CLK_000_P_SYNC_8_:194 +-- NOTE NODES CLK_000_N_SYNC_0_:242 CLK_000_N_SYNC_1_:163 CLK_000_N_SYNC_2_:140 +-- NOTE NODES CLK_000_N_SYNC_3_:206 CLK_000_N_SYNC_4_:265 CLK_000_N_SYNC_5_:118 +-- NOTE NODES CLK_000_N_SYNC_6_:236 CLK_000_N_SYNC_7_:112 CLK_000_N_SYNC_8_:157 +-- NOTE NODES CLK_000_N_SYNC_9_:134 CLK_000_N_SYNC_10_:272 +-- NOTE NODES inst_CLK_030_H:110 inst_DS_000_ENABLE:233 SM_AMIGA_1_:239 +-- NOTE NODES SM_AMIGA_4_:230 SM_AMIGA_2_:224 CLK_OUT_PRE_Dreg:209 +-- NOTE NODES un8_ciin:217 state_machine_un15_clk_000_ne_i_n:151 +-- NOTE NODES CIIN_0:211 +-- NOTE BLOCK 0 + +IEEE_1532_Data ( + Header ( STD_Version STD_1532_2001 + Creation_Date 20150201.2111 + Creator "Universal File Writer V2.48" + Entity M4A5_128_64, + M4A5_128_64_XXYC, + M4A5_128_64_XXVC + ) + data array ( + repeat +-- ROW_WIDTH = 792 +-- COLUMN_WIDTH = 80 + ( + 82384608C3082F0C218E3F3FEFFD18DFF82304308E31C23FFAFFDFFBFFFC6FFC3FBFF0 + C2EFC109E1842F8611C6584313FFB3FF8FFFFC3FBFF7FEFF810FFF7CEF8DFF8670C63F + DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC3FFFF79FFFFE3FFE09DBF, + 82004608C308200C200A3FAFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + 82FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA116FE7CEF8DFF8670C63F + DF387F3FCFFDFFFFF9FFFFC77BFF8477FDFFC5FFFF7BFFFFE3FFE09DFF, + 82384208C1082F0421863FBBEFFF08DFF82304308E10C23F7EFFDFFBFFFC2FFC3FBFF0 + C2FFC108C1842C8610C6784318FDF3FF8FFFFC3FBFF7FEFFA11BFF7C2305FF8250423F + DF183F7FEFFDFFFFF9FFFFC773FF847EFDFFC7FFFF3BFFFFE3FFE091FF, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC1FBFF0 + C27FC109E1842B8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11FEF7CEE8DFF8670C600 + 1F387F3FEFFDFFFFF9FFFFC71BFF847FFDFFC7FFFF7BFFFFE3FFE09CFF, + 82384608C3082F0C218E3FBFEFFF08DFF82304308E11C22DFEFFDFFBFFFC6FFC3FBFF0 + 42FFC109E0842F8211C678431BFFF3FF8FFFFC3FBFE7FEFFA11FFB7C2F8DFF8670C63F + DF287F7FEFFDFFFFF9FFFFC763FF847FFDFFC7FFFF53FFFFE3FFC09DFB, + 82384208C1082F0421863FBEEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2FBC109E1842F8611C678431BFFB3FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF8670C63F + DF387F7DEFFDFFFFF9FFFFC77BFF847FBDFFC7FFFF7BFFFFE3FFE09DFF, + 8238420881082F0421863F9FEFFF08DFF82304308E10C23BFEFFDFFBFFFC6FFC3FBFF0 + C2DFC109E1842F8611C678431AFBF3FF8FFFFC3F3FF7FEFFA11FBF7CEC89FF8670863F + DE387F6FEFFDFFFFF9FFFFC47BFF847FFDFFC7FFFF7B7FFFE3FFE09DFF, + 8238460843082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC2FFC3FBFF0 + C2FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11FFF7C6B8DFF8670C225 + DF183F7FEFFDFFFFF9FFFFC77BFF847FBDFFC7FFFF7BFFFFE3FFE09DBF, + 82384608C3082F0C218E1B9FEFFF08DFF82304308E10C22DFEFFDFFBFFFC6FFC3FBFF0 + C2EFC109E1842F8611C678431BFFD3FF8FFFFC3FBFF7FEFFA11BBF7CEF8DFF8670C63F + DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3EBFF0 + C2FFC109E1842F8611C6784303FFF3FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF8250C63F + DF387F5FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF737FFFE3FFE09DFE, + 82384608C3082F0C218E3FBFEFFF18DFF82304300E31C23FF6FFDFFBFFFC6FF83FBFF0 + C2F7C109E1842F8611C678431BFEF3FF8FFFFC3FBFF7FEFFA11FF77C238DFF8670C43F + DF205F7FEFFDFFFFF9FFFFC77BFE847FFDFFC7FFFF7BFFFFE3FFE09DFF, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2FFC109E0842F8211C678431BFFF3FF87DFFC2FBFF7FEFFA11FFF7CEF85FF8670463B + 1F387F3FEFFDFFFFF9FFFFC77BFF847FDDFFC7FFFF3BFFFFE3FFE09DBF, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3DBFF0 + C2FFC109E1842F8611C678431BFF73FF8FFFFC3FBFF7FEFFA117FF7C230DFF8660C61F + 5F207F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DDF, + 82384608C3082F0C218E13B7EFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2FDC109E1842F8611C658431BFFF3FF8FFFFC3FBFF7FEFFA10F7F7CED8DFF8670C63F + C1387F7FAFFDFFFFF9FFFFC37BFF847EFDFFC7FFFF7BFFFFE3FFE01DFF, + 82384208C1082F0421863FB7EFFF18DFF82304108E31C23FDEFFDFFBFFFC2FFC3FBFF0 + C2FDC109C1842D8610C678431AFBF3FF8FFFFC3FBFF7FEFFA11FDF7CEF8DFF8670863D + DF387F7EEFFDFF7FF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2FFC1096184260611C6784319FFF3FF87DFFC2FBFF7FEFFA11FFF7CEF8DFF8670C63F + C1387F7FEFFDFFFFF9FFFFC77BFF847EFDFFC7EFFF7BFFFFE3FFE09DDF, + 82384608C3082F0C218E3DAFEFFF18DFF82104308E31C23FEEFFDFFBFFFC6FFC3DBFF0 + C2FFC109A184290611C6784319FDF3FF8FFFFC3FBFF7FEFFA119FF7CEF8DFF8630C63F + DF387F7FEFFDFFFFF9FDFFC77BFF847BFDFFC7FFFF7BFFFFE3FFE09CFF, + 82284608C3082C0C210A3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2FBC10961842E8610C678431AFFF3FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF8670C63F + DF387F7F6FFDFFFFF9FFFFC77BFF845FFDFFC7FFFF7BFFFFE3FFE01DFF, + 82380608C3082F0C218E3FB7EFFF18DFF82304308E11C22BFEFFDEFBFFFC6FFC3FBFF0 + C2BFC101E1842F8611C678431BFFE3FF8BFFFC3FBFF7FEFFA11FFF7CEF8DFF8430443F + 9F387F7FEFFDFFFFF9BFFFC67BFF847FDDFFC7FFFF7BFFFFE3FFE08DFF, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FCFFA11AFF7CEF8DFF8660C63F + C1387F7EEFFDFFFFF8FFFFC37BFF847FFDFFC7FFFF7BFFFFE3FFE091FB, + 82384208C3082F0C21863FBFCFFF18DFF80304308E31C23BFEFFDFFBFFFC4FFC3FBFF0 + C2FFC109E1842F8611C678431BF7F3FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF8670C63E + DE383F7FEFFDFFFFF93FFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC37BFF0 + C2FBC109E1842F8611C638431BFFF3FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF8670C63F + C1385F7BEFFDFFFFF9FFFFC77BFF847FEDFFC7FFFF7BFFFFE3FFE095EF, + 82384608C3082F0C200E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2DFC109A1842B0611C678431B7FF3FF8FFFFC3FBFF7FEFFA11FEF7CEC8DFF8670C237 + DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DBF, + 82084608C3082F0C218E3FBDEFFF08DFF82304308E10C23FDEFFDFFBFFFC6FFC3DBFF0 + C2FFC109E1842C8610C678431ABF73FF87DFFC2FBFF7FEFFA11FFF7CA78DFF8670C63F + C1387F7EEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE01DFF, + 82384208C3082F0C218E2F9FEFFF185FF82304308E31C23FFAFFDFFBFFFC6FFC3DBFF0 + C2FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11FBF7CEF8DFF8670C63F + DF387F6FEFFDFFFFF9FFFFC753FF847DFDFFC7FFFF7BFFFFE3FFE01DFF, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2FBC109E1842F8211C678431BFFD3FF8FFFFC3FBFF7FEFFA11BFF7C2F8DFF8670C63F + DF287F7FEFFDFFFFF9FFFFC73BFF847FFDFFC7FFFF7BFFFFE3FFE09DF7, + 82384608C3082F0C218E37BFEFFF18DFF82304308E21C22FDEFFDFFBFFFC6FFC3F3FF0 + C2FFC109E1842F8611C6784119FFF3FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF0670C63F + DF387F77EFFDFFFFF9FFFF877BFF847DFDFFC7FFFF7BFFFFE3FFE01DFF, + 82384608C3082A0C218E3FB7EFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2BFC109E1842F8611C678431BEFF3FF8FDFFC2FBFF7FEFFA11EFF7CEF8DFF8670C63F + DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DF7, + 8238460843082F0C218E3FBBEFFF18DFF82304308E31C23F7EFFDFFBFFFC6FFC30BFF0 + C2FBC109E1840F8611C678431BFFE3FF8FEFFC3FBFF7FEFFA11FFF7CEF8DFF8670C63F + DF387F77EFFDFFFFF9FFFFC753FF847EFDFFC7FFFF6BFFF7E3FFE09DFF, + 8238420881082F0421863FBFEFFF08DFF82304308E10C23FFEFFDFFBFFFC4FFC3FBFF0 + C2FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11F7F7C2F8DFF8670C63F + DF287F7FEFFDFFFFF9FFFFC73BFF847FFDFFC7FFFF7BFFFFE3FFE09CFF, + 82384408C3082F0C218E3FBBEFFF18DFF82304308E11C22F7EFFDFFBFFFC4FFC3FBFF0 + C2FF4109E1842F8611C658431BFFE3FF8FDFFC2FBFF7FEFFA11EFF7CEF89FF8670C62F + DF187F7FEFFDFFFFF8FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2FFC109E1842F8601C678431BFFF3FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF8670C63F + C1387F7DEFFDFFFFF9FFFFC37BFF847FDDFFC7FFFF7BFFFFE3FFE09DFF, + 82384208C1082F0421863FAFEFFF18DFF82204308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + 82FEC109E1842F86114678431BF7F3FF8FFFFC3FBFF7FEFFA11FFF7CE38DFF8670C63F + DF307F7F6FFDFFFFF9FFFFC77BFF807FFDFFC7FFFF5BFFFFE3FFE09DFF, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FDEFFDFFBFFFC6FFC3FBFF0 + 42FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA115FF7C2F8DFF8670C63F + DF287F7FEFFDFFFFF9FFFFC77BFF847DFDFFC7FFFF7BFFFFE3FFE09DBF, + 82384608C3082F0C218E3FBFEFFF18DFF82300308E31C23FBEFFDFFBFFFC6FFC3FBFF0 + C2DFC109E1842F8611C678431BEFF3FF8FFFFC3FBFF7FEFFA11FEF7CEF85FF8670C63B + DF385F7FEFFDFFFFF9FFFFC37BFF847FFDFFC7FFFF7BFFFFE3FFE09DBF, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3DBFF0 + C2FFC109E1842F8611C678430BFFF3FF87DFFC2FBFF7FEFFA11FFF7CEF8DFF8670C63F + C1387F7FAFFDFFFFF9FFFFC77BFF847FEDFFC7FFFF7BFFFFE3FFE01DFF, + 82384208C1082F0421863FBEEFFF08DFF82304308E11422FDEFFDFFBFFFC6FFC3FBFF0 + C27FC109E1842F8611C618431BFFF3FF8FDFFC2FBFF7FEFFA11FFF7CEF8DFF8670C63F + DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE1FFE09DBF, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + 42FFC109E1842F8611C678431BFDF3FF8FFFFC3FBFF7FEFFA11DFF7CEF8DFF8270C63F + DF387F7F6FFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE099FF, + 82384608C3080F0C218E3FBFEFFF08DFF82304308E11C22EFEFFDFFBFFFC6FFC3FBFF0 + C2FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11FFB7CEF8DFF8670C63F + DF387F7FEFFDEFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFC3FFE09DFF, + 82384608C3082F0C218E3FBFAFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2FFC109E1842F8611C678431BFFF3FF87DFFC2FBFF7FEFFA11FFF7CEF8DFF8670C63F + DF387F7FEFFDFFFFF9FFFFC77BFF847DFDFFC7FFFF7BFFFFE3FFE01D7F, + 82384608C3082F0C218E37BFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC2FBFF0 + C2DFC109E1842F8611C278431BFEF3FF8FDFFC2FBFF7FEFFA11FFF7CEF8DFF8650C63F + DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC5FFFF79FFFFE3FFE09D7F, + 82384608C3082A0C218E3BBFCFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11DFF7CEF8DFF8670C63F + DF387F7EEFFDFFBFF1FCFFC77BFF841BFDFFC3FFFF7BFFFFE3FFE09DFF, + 82384608C3082F0C218E3FBFEFFF189FF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2FFC109E1802F8611C678431BFEF3FF8FFFFC3FBFF7FEFFA11FF77C2F8DFF8670C63F + DF287F77EFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF, + 02384608C3082F0C218E3F9FEFFF18DFF82304308E31C23FECFFDFFBFFFC6FFC3FBFF0 + C27FC009E1842F8611C678431BFFF3FF87DFFC2FBFF7FEFFA11FFF7CEF8DFF8670C63F + DF387F7FEFFDFFFFF9FFFFC77BFF841DF9FFC7FFFF7BFFFFE3FFE09CFF, + 82384608C308250C218E37B7EFFF18DFF82304308A31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2EFC109E1842F8611C678031BFF73FF8FFFFC3FBFF7FEFFA11FF77CEF8DFF8670C61F + DF387F7BEFFDFFFFF9FFFFC77BFF8477FDFFC7EFFF7BFFFFE3FFE09CFF, + 82384608C3082F0C218E1FBFEFFF18DFF82304308E31C23FEEFFDFFBFFFC6FFC3FBFF0 + 42FFC109E1842F8611C678431BFFF3FF87DFFC2FBFF7FEFFA11FFF7CEF8DFF8670C63F + DF387F7FEFFDFF7FF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF, + 80384608C3082F0C218E3FBFEFFF18DFF02304308E31C23FF6FFDFFBFFFC6FFC3FBFF0 + C2FFC109E1842F84118478431BFFF3FF8FFFFC3FBFF7FEFFA11FFF7CCF8DFF8670C63F + DF387F7FAFFDFFFFF9FFFFC77BFF847FFDFFC7FFFC7BBFFFE2FFE09DFF, + 82384608C3082F0C218E3FBEEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C0BFC109E1842F8611C268431BF7F3FF8FFFFC1FBFF7FEFFA11FBF7CEF8DFF8670C63F + D7387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC1F7FF7BFFFBE3FFE09D7F, + 82384608C3002F0C218E3FBF6FFF18DFF82304308E31C23FFEFFDFFBFFF86FFC3FBFF0 + C2FFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11BFF7CEF8DFF8670C63F + DF387F7FEFFDFFFFF9FFFFC77BFF847DFDFFC7FFFF7BFFFFE3FFE01DFF, + 82384608C3082F0C218E3FBFE7FF18DFF82304308E31C23BFEFFDFFBFFFC6FFC3FBFF0 + C2FF0109E1842F8611C678431BEFF3FF8FFFFC3FBFF7FEFFA11FF77CEF8DFF8670C63F + DF387F7FEFFDFFFFF9FDFFC77BFF843FFDFFC7FFFF7BFFFFE3FFE09DFB, + 82384600C3082F0C218E3FBFEFFF08DFF82304308E10C23EFEFFDFFBFFFC6FFC3FBFF0 + C2DFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11FFB7CEF8DFF8670C63F + DF387F77EFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF, + 82384608C3082F0C218E3FBFCFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + 42FFC109E1842F8611C678431BFFF3FF87DFFC2FBFF7FEFFA11FFF7CE38DFF8670C63F + DF307F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE08DFD, + 82384608C3082F0C218E3EBFEFFF18DFF82304308E31C21FBEFFDFFBFFFC6FFC3FBFF0 + C2FFC109E1842F8611C67843192FF3FF8FFFFC3FBFF7FEFFA11F7F7CEF8DFF8670C63F + DF387F3FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7AFFFFE3FFE09DFF, + 82084608C308200C200A3F9FEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2FFC109E1842F8611C678431AFFF3FF8FFFFC3FBFF7FEFFA11BFF7C2F8DFF8670C63F + DF287F7FEFFDFFFFF9FDFFC77BFF8417FDFFC1FFFF7BFFFFE3FFE09CFF, + 82384608C3082F0C218E3DB7EFFF18DFF82304308631C23FDEFFDFFBFFFC6FFC3FBFF0 + C2EFC109E1842F8611C6784313FFF3FF8FFFFC3FBFF7FEFFA11BFF7CEF8DFF8670C63F + DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF, + 82184608C308230C208A3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3DBFF0 + C2FFC109E1842F8611C678431BF7F3FF8FFFFC3FBFF7FEFFA11FEF7CEF8DFF8670C63F + DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF3BFFFFE3FFE0917F, + 82384208C3082F0821863FAFEFFF10DFF82304308E11C22FFAFFDFFBFFFC6FFC3FBFE0 + C2F7C1092184298610C678431BEFF3FF8FFFFC1FBFF7FEFFA11FF77CEF8DFF8670C63F + DF387F7EEFFDFFFFF9FFFFC713FF8477FDFFC7FFFF7BDFFFE3FFE09DFB, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2FFC108E184278611C678431BFFF3FF8FFFFC3FBFF7FEFFA117FF7CEF8DFF8670C63F + DD387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7F7FF7BFFFBE3FFE09DFF, + 82384208C2082F0421863FB7EFFF189FF82204308A31C23FFEFFDFFBFFFC6FFC3FBFF0 + 42EFC109E1842F8611C458431BFFF3FF8FDFFC2FBFF7FEFFA11EFF7CEF8DFF8670C63F + DB387F7DEFFDFFFFF8FFFFC37BFF847FDDFFC7FFFF7BFFFFE3FFE09DFF, + 82384608C3082F0C218E3FBFEFFF185FF82104308631C23BFEFFDFFBFFFC6FFC3FBFF0 + C2FFC109E1842F8611C638431BFF73FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF8670C63F + DF387F7FEFFDFFFFF97FFFC57BFF847FFDFFC7FFFF7BFFFFE3FFE091F7, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C03FFEFFDFF3FFFC6FFC3FBFF0 + C2EFC109E1842F8601C6784313FDF3FF8FFFFC3FBFF7FEFFA01FFF7CEF8DFF8670C63F + CF387F77EFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23EFEFFDFFBFFFC4FFC3FBFF0 + C2FFC109E1842F8611C658431BFFF3FF8FFFFC3FBFF7FEFFA11EFF7CCF8DFF8670C63F + DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE090FF, + 82384608C3082F0C218E3FBF6FFF18DFF82304308E31C23FFEFFDFFBFFFC4FFC3FBFF0 + C2FDC109E1842F8611C678431BFFD3FF8FFFFC3FBFF7FEFFA11F7F7CEF8DFF8670C63F + DF387F7FEFFDFFFFF9FFFFC77BFF847FDDFFC7FFFF43FFFFE3FFE09DFF, + 82304608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3BBFF0 + C2FFC109E1842F8611C6784319FFF3FF8FFFFC3FBFF7FEFFA11BFF7CEF8DFF8670C63F + DF387F7FEFFDFFFFF1FEFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFE, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C2BFC109E1842F8611C678431BFFF3FF8FFFFC3FBFF7FEFFA11FFF7CEF8DFF8670C63F + DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE0FFE01DDF, + 82384608C3082F0C218E3FBFEFFF18DFF82304308E31C23FFEFFDFFBFFFC6FFC3FBFF0 + C0FFC109E0842F8611C678431BFF73FF8FFFFC3FBFF7FCFFA11FFB7CEF8DFF8670C63F + DF387F7FEFFDFFFFF9FFFFC77BFF847FFDFFC7FFFF7BFFFFE3FFE09DFF, + 010000040000100000800800004004010010000040000100000C000030020080080200 + 400000002000008000030000080000300400C01002004008008000040040100300600C + 0180300000C00003004008010020020000180200400C01001004004000, + 010000000000000000800000004000010000000000000000000C000030000080000200 + 60000000100000C000010000080000300400C000020060080000000400001002004000 + 0100100000C0000300000800002002000018000040080100000400C000, + 0300600C0180300600C0180000400C0100300600C01803000008008020020080180200 + 60000180300600C0180300600C00002006008018010020080180000600C0100300200C + 0080300000800802006008018020060000100300400C0100100400C000, + 000000000000000000401000002000008000000000000000000C008030000040100100 + 000000000000000000000000000000300200C008010020040000000200000800000008 + 0100000000C00803002004000010000000180100200000800002000000, + 0000000000000002000000000040000000000000000002000004000020000080000200 + 4000000010000000000200000000002004008010020020080000000000001000000000 + 0100000000400801000000000020040000180000400000000004008000, + 0300600C0180300400C0180000200C0080300600C01801000004018000060040180300 + 4000018020060080180300600C0000300000C008030000080100000200C0180300200C + 0080200000401001006004018010020000100200600C00803002004000, + 0300400C0080200200C00800006008018000060000180300000C0180300400C0180300 + 60000180300600C0100300600C0000300600C0180300600C0180000600001802004004 + 0100100000C0180300600C018030060000180300600C0180300600C000, + 000000000000000200000000004000010000000000000200000C000030000080000200 + 600000001000004000020000000000300600C0100200600C0080000400001000004000 + 0100100000C00803000008000020040000180100400001000004008000, + 000000000000000200000000004000010000000000000200000C000030000080000200 + 600000001000004000020000000000300600C0100200600C0080000400001000004000 + 0100100000C00803000008000020040000180100400001000004008000, + 0300600C0180300600C0180020600C0180300600C0180300040C0180300600C0180300 + 60008180300600C0180300600C0010300600C0180300600C0180020600C0180300600C + 0180300040C0180300600C018030060008180300600C0180300600C001, + 0000000000000002008008000040040000100400801003000008000020000000000000 + 2000000030000000000200600800002004008010020060000000000600C01801002004 + 0080100000800000000000008020060000180000000C00002000004000, + 010000000000000000C000000060000000000600801802000008000030000000000000 + 0000000020000000080200600800003004008010020040040080000600C01801002004 + 0080100000800001000000000030040000180000200800802000004000, + 0200400801002004008010000040080100200600C01002000008010030040080100200 + 40000100300400C0100200400800002004008010020040080100000600C0180300600C + 0180300000801802004008010020040000100200600801002004008000, + 030040000180000600800000006008000030040000180000040C000030040000100000 + 40000180200000800003004000000000020080180000400C0100000400C01000006000 + 018020000080180200000C000030000000100300400001800006000000 + ) + terminate +-- ROW_WIDTH = 792 +-- COLUMN_WIDTH = 1 + ( + 0000010020040080100000400000002004008000000000080000200400801002004008 + 0100000400001000000008010000000080000200400801000000000010020040080100 + 2004008000020000000000200400001000004000000000000000100200 + ) + data_CRC ( + D7C2C15B + ) + ), + data e_fuse ( + initialize +-- ROW_WIDTH = 792 +-- COLUMN_WIDTH = 1 + ( + 0000010020040080100000400000002004008000000000080000200400801002004008 + 0100000400001000000008010000000080000200400801000000000010020040080100 + 2004008000020000000000200400001000004000000000000000100200 + ) + data_CRC ( + 1D981639 + ) + ), + data array_tdo ( + repeat +-- ROW_WIDTH = 792 +-- COLUMN_WIDTH = 80 + ( + FDB907FFC7FFFF9EFFFFC3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1 + F73EFFF081FF7FEFFDFC3FFFF1FFCDFFC8C21A638861F421879083F7430FFDFC3FF63F + FFDFFBFF5FFC438C710C20C41FFB18BFF7FCFC718430F410C310621C41, + FFB907FFC7FFFFDEFFFFA3FFBFEE21FFDEE3FFFF9FFFFFBFF3FCFE1CFBFC630E61FFB1 + F73E7F6885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF410FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7F5FC5004300410C310620041, + FF8907FFC7FFFFDCFFFFE3FFBF7E21FFCEE3FFFF9FFFFFBFF7FEFC18FBFC420A41FFA0 + C43EFFD885FF7FEFFDFC3FFFF1FFCFBF18C21E6308613421831083FF430FFDFC3FF43F + FFDFFBFF7EFC4308710C20C41FFB10FFF7DDFC618420F4108310421C41, + FF3907FFC7FFFFDEFFFFE3FFBFFE21FFD8E3FFFF9FFFFFBFF7FCFE1CF800630E61FFB1 + 773EF7F885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861D421879083FE430FFDF83FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41, + DFB903FFC7FFFFCAFFFFE3FFBFFE21FFC6E3FFFF9FFFFFBFF7FEFE14FBFC630E61FFB1 + F43EDFF885FF7FE7FDFC3FFFF1FFCFFFD8C21E638841F421079083FF420FFDFC3FF63F + FFDFFBFF7FB44388710C20C41FFB10FFF7FDFC718430F410C310621C41, + FFB907FFC7FFFFDEFFFFE3FFBDFE21FFDEE3FFFF9FFFFFBFF7BEFE1CFBFC630E61FFB1 + F73EFFF885FF7FEFFDFC3FFFF1FFCDFFD8C21E638861F421879083DF430FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF77DFC618420F4108310421C41, + FFB907FFC7FFFEDEFFFFE3FFBFFE21FFDE23FFFF9FFFFFBFF7F6FE1C7BFC610E61FF91 + 373EFDF885FF7FEFFCFC3FFFF1FFCFDF58C21E638861F421879083FB430FFDFC3FF63F + FFDFFBFF7FDC4308710C20C41FFB10FFF7F9FC618420F4108110421C41, + FDB907FFC7FFFFDEFFFFE3FFBDFE21FFDEE3FFFF9FFFFFBFF7FEFC18FBA4430E61FFB1 + D63EFFF885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF430FFDFC3FF43F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C210621C41, + FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1 + F73EFDD885FF7FEFFDFC3FFFF1FFCBFFD8C21E638861F421879083F7430FFDFC3FF63F + FFDFFBFF7FB44308710C20C41FFB10FFF7F9D8718430F410C310621C41, + 7FB907FFC7FFFECEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FAFE1CFBFC630A41FFB1 + F73EFFF885FF7FEFFDFC3FFFF1FFCFFFC0C21E638861F421879083FF430FFD7C3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41, + FFB907FFC7FFFFDEFFFFE3FFBFFE217FDEE3FFFF9FFFFFBFF7FEFA04FBFC230E61FFB1 + C43EEFF885FF7FEFFDFC3FFFF1FFCF7FD8C21E638861F421879083EF430FFDFC1FF63F + FFDFFBFF6FFC438C700C20C41FFB18FFF7FDFC718430F410C310621C41, + FDB907FFC7FFFFDCFFFFE3FFBBFE21FFDEE3FFFF9FFFFFBFF7FCFE1CF8DC620E61FFA1 + F73EFFF885FF7FEFFDF43FFBE1FFCFFFD8C21E638841F421079083FF430FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41, + FBB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE04FAF8630661FFB0 + C43EFFE885FF7FEFFDFC3FFFF1FFCEFFD8C21E638861F421879083FF430FFDBC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41, + FFB807FFC7FFFFDEFFFFE3FFBF7E21FFDEC3FFFF9FFFFFBFF5FEFE1C83FC630E61FFB1 + B73EFEF085FF7FEFFDFC3FFFF1FFCFFFD8C21A638861F421879083BF430FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7EDC8718430F410C310621C41, + FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFEFFBFF77EFE1CFBBC610E61FFB1 + F73EFBF885FF7FEFFDFC3FFFF1FFCFDF58C21E630861B421839083BF430FFDFC3FF43F + FFDFFBFF7BFC438C710820C41FFB18FFF7EDFC618420F4108310421C41, + FBB907FFC7FFFFDEFFF7E3FFBF7E21FFDEE3FFFF9FFFFFBFF7FEFE1C83FC630E61FFB1 + F73EFFF885FF7FEFFDF43FFBE1FFCFFF98C21E6388606421869083FF430FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41, + FF3907FFC7FFFFDEFFFFE3FFBFDE21FFDEE3FFBF9FFFFFBFF7FEFE1CFBFC630C61FFB1 + F73EFF9885FF7FEFFDFC3FFFF1FFCFBF98C21E6388609421859083FF430FFDBC3FF63F + FFDFFBFF77FC438C710C20841FFB18FFF7F5BC718430F410C310621C41, + FFB807FFC7FFFFDEFFFFE3FFBFFA21FFDEE3FFFF9FFFFFBFF6FEFE1CFBFC630E61FFB1 + F73EFFF885FF7FEFFDFC3FFFF1FFCFFF58C21E6308617421869083DF430FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC5084303410C310621441, + FFB107FFC7FFFFDEFFFFE3FFBBFE21FFDE63FFFD9FFFFFBFF7FEFE1CF9FC220C21FFB1 + F73EFFF885FF7FEFFDFC3FFFD1FFC7FFD8C21E638861F421878083FD430FFDFC3FF63F + FFDF7BFF7FD44388710C20C41FFB18FFF7EDFC718430F410C310601C41, + DF8907FFC7FFFFDEFFFFE3FFBFFE21FFDEC3FFFF1FFFFFBFF77EFE1C83FC630661FFB1 + F73EFF5885FF3FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF430FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41, + FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFC9FFFFFBFF7FEFC1C7B7C630E61FFB1 + F73EFFF885FF7FEFFDFC3FFFF1FFCFEFD8C21E638861F421879083FF430FFDFC3FF23F + FFDFFBFF7FDC438C710C20C01FFB18FFF3FDFC618430F410C310421C41, + F7A907FFC7FFFFDEFFFFE3FFB7FE21FFDEE3FFFF9FFFFFBFF7DEFA1C83FC630E61FFB1 + F73EFFF885FF7FEFFDFC3FFFF1FFCFFFD8C21C638861F421879083DF430FFDEC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41, + FDB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBEC430E61FFB1 + 373EF7F885FF7FEFFDFC3FFFF1FFCFFED8C21E638860D421859083FB430FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC700430F410C310621C41, + FFB807FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF77EFE1C83FC630E61FFB1 + E53EFFF885FF7FEFFDF43FFBE1FFCEFD58C21E6308613421879083FF430FFDBC3FF63F + FFDFFBFF7BFC4308710C20C41FFB10FFF7BDFC718430F410C310621041, + FFB807FFC7FFFFDEFFFFE3FFBFBE21FFCAE3FFFF9FFFFFBFF7F6FE1CFBFC630E61FFB1 + F73EFDF885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF430FFDBC3FF63F + FFDFFBFF5FFC438C710C20C41FFA18FFF7F9F4718430F410C310421C41, + EFB907FFC7FFFFDEFFFFE3FFBFFE21FFDCE3FFFF9FFFFFBFF7FEFE14FBFC630E61FFB1 + F43EFFD885FF7FEFFDFC3FFFF1FFCBFFD8C21E638841F421879083DF430FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41, + FFB807FFC7FFFFDEFFFFE3FFBFBE21FFDEE1FFFF9FFFFFBFF7EEFE1CFBFC630E60FFB1 + F73EFFF885FF7FEFFDFC3FFFF1FFCFFF98821E638861F421879083FF430FFCFC3FF63F + FFDFFBFF7BF44384710C20C41FFB18FFF7FDEC718430F410C310621C41, + EFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1 + F73EFF7885FF7FEFFDF43FFBF1FFCFF7D8C21E638861F421879083FD430FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7EDFC7184305410C310621C41, + FFB907FFC7EFFFD6FFFFE3FFBF7E21FFCAE3FFFF9FFFFFBFF7EEFE1CFBFC630E61FFB1 + F73EFFF885FF7FEFFDFC3FF7F1FFC7FFD8C21E638861F021879083DF430FFD0C3FF63F + FFDFFBFF7EFC438C710C20C41FFB18FFF7DDFC718430F410C210621C41, + FF3907FFC7FFFFDEFFFFE3FFBFFE21FFDCE3FFFF9FFFFFBFF7FEFE14FBFC630E61FFB1 + F43EFEF885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF430FFDFC3FF23F + FFDFFBFF7FFC4308710C20C41FFB10FFF7FDFC618420F4108110421C41, + FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF1FFFFFBFF7FEFE18FBF4630E61FF91 + F73EFF7885FF7FEFFDF43FFBF1FFC7FFD8C21A638861F421879082FF430FFDFC3FF23F + FFDFFBFF7EF44388710C20C41FFB18FFF7DDFC718430F410C310221C41, + FFB907FFC7FFFFDEFFFFE3FFBBFE21FFDEC3FFFF9FFFFFBFF7BEFE1C83FC630E61FFB1 + F73EFFF885FF7FEFFDFC3FFFF1FFCFFFD8C21E638061F421879083FF430FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41, + FFB907FFC7FFFFDAFFFFE3FFBFFE01FFDEE3FFFF9FFFFFBFF6FEFE0CFBFC630E61FFB1 + C73EFFF885FF7FEFFDFC3FFFF1FFCFEFD8C21E628861F4218790837F410FFDFC3FF63F + FFDFFBFF7FFC438C710C20441FFB18FFF7F5FC618420F4108310421C41, + FDB907FFC7FFFFDEFFFFE3FFBFBE21FFDEE3FFFF9FFFFFBFF7FEFE14FBFC630E61FFB1 + F43EFFA885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF420FFDFC3FF63F + FFDFFBFF7BFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41, + FDB907FFC7FFFFDEFFFFE3FFBFFE21FFDEC3FFFF9FFFFFBFF7FEFA1CFBDC630E61FFA1 + F73EF7F885FF7FEFFDFC3FFFF1FFCFF7D8C21E638861F421879083FB430FFDFC3FF63F + FFDFFBFF7DFC438C710C00C41FFB18FFF7FDFC718430F410C310621C41, + FFB807FFC7FFFFDEFFFFE3FFB7FE21FFDEE3FFFF9FFFFFBFF5FEFE1C83FC630E61FFB1 + F73EFFF885FF7FEFFDF43FFBE1FFCFFFD0C21E638861F421879083FF430FFDBC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41, + FDB907FF87FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1 + F73EFFF885FF7FEFFDF43FFBF1FFCFFFD8C218638861F421879083FE430FFDFC3FF63F + FFDFFBFF7BF44288710C20C41FFB10FFF77DFC618420F4108310421C41, + FF9907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF6FEFE1CFBFC630E41FFB1 + F73EFFB885FF7FEFFDFC3FFFF1FFCFBFD8C21E638861F421879083FF420FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41, + FFB907FFC3FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFF7BFF7FEFE1CFBFC630E61FFB1 + F73EDFF885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF430FFDFC3FF63F + FFDFFBFF7F744388710C20C41FFB10FFF7FDFC718430F010C310621C41, + FEB807FFC7FFFFDEFFFFE3FFBFBE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1 + F73EFFF885FF7FEFFDF43FFBE1FFCFFFD8C21E638861F421879083FF430FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF5FDFC718430F410C310621C41, + FEB907FFC7FFFF9EFFFFA3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630A61FFB1 + F73EFFF885FF7FEFFDF43FFBF1FFCF7FD8C21E438861F421879083FB430FFDF43FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDEC718430F410C310621C41, + FFB907FFC7FFFFDEFFFFC3FFBFD821FFDEE3FF3F8FFDFFBFF77EFE1CFBFC630E61FFB1 + F73EFFB885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF430FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF3FDDC7184305410C310621C41, + FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7EEFE14FBFC630E61FFB1 + F43EEFF885FF7FEFFDFC3FFFF1FFCF7FD8C21E638861F401879083FF430FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FF918FFF7FDFC718430F410C310621C41, + FF3907FFC7FFFFDEFFFFE3FF9FB821FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1 + F73EFFF885FF7FEFFDF43FFBE1FFCFFFD8C21E638861F421879003FE430FFDFC3FF63F + FFDFFBFF37FC438C710C20C41FFB18FFF7F9FC718430F410C310621C40, + FF3907FFC7FFFFDEFFF7E3FFBFEE21FFDEE3FFFF9FFFFFBFF7DEFE1CFBF8630E61FFB1 + F73EEFF885FF7FEFFDFC3FFFF1FFCEFFD8C01E638861F421879083F7430FFDFC3FF63F + FFDFFBFF7FFC438C510C20C41FFB18FFF7EDEC718430A410C310621C41, + FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFEFFBFF7FEFE1CFBFC630E61FFB1 + F73EFFF885FF7FEFFDF43FFBE1FFCFFFD8C21E638861F421879083FF420FFDFC3FF63F + FFDFFBFF77FC438C710C20C41FFB18FFF7FDF8718430F410C310621C41, + FFB907FF47FFFDDE3FFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF5FEFE1CFBFC630E61FFB1 + F33EFFF885FF7FEFFDFC3FFFF1FFCFFFD8C21E218821F421879083FF430FFDFC3FF63F + FFDFFBFF6FFC438C710C20C40FFB18FFF7FDFC718430F410C310621C01, + FEB907FFC7DFFFDEFFEF83FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CEBFC630E61FFB1 + F73EFDF885FF7FEFFDF83FFFF1FFCFEFD8C216438861F421879083FD030FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF77DFC718430F410C310621C41, + FFB807FFC7FFFFDEFFFFE3FFBFBE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1 + F73EFFD885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FF430FFDFC3FF61F + FFDFFBFF7FFC438C710C20C41FFB18FFF6FDFC718430F400C310621C41, + DFB907FFC7FFFFDEFFFFE3FFBFFC21FFDEE3FFBF9FFFFFBFF7FEFE1CFBFC630E61FFB1 + F73EEFF885FF7FEFFDFC3FFFF1FFCFF7D8C21E638861F421879080FF430FFDFC3FF63F + FFDFFBFF7FDC438C710C20C41FFB18FFE7FDFC718430F410C310621C41, + FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7EEFE1CFBFC630E61FFB1 + F73EDFF885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FB430FFDFC3FF63F + FFDFFBFF7F7C4308710C20C41FFB10FFF7FDFC718430F410C300621C41, + BFB107FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE0CFBFC630E61FFB1 + C73EFFF885FF7FEFFDF43FFBE1FFCFFFD8C21E638861F421879083FF420FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF3FDFC718430F410C310621C41, + FFB907FFC7FFFF5EFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FCFE1CFBFC630E61FFB1 + F73EFEF885FF7FEFFDFC3FFFF1FFCFF498C21E638861F421879083FF430FFDFC3FF63F + FFDFFBFF7DF8438C710C20C41FFB18FFF7FD7C718430F410C310621C41, + FF3907FFC7FFFFDEFFFF83FFBFE821FFDEE3FFBF9FFFFFBFF7FEFE14FBFC630E61FFB1 + F43EFFD885FF7FEFFDFC3FFFF1FFCFFF58C21E638861F421879083FF430FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7F9FC5004300410C310621041, + FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1 + F73EFFD885FF7FEFFDFC3FFFF1FFCFFFC8C21E638861F421879083F7430FFDFC3FF63F + FFDFFBFF7BFC438C610C20C41FFB18FFF7EDBC718430F410C310621C41, + FE8907FFC7FFFFDCFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1 + F73EF7F885FF7FEFFDFC3FFFF1FFCFEFD8C21E638861F421879083FF430FFDBC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC510430C410C310621841, + DFB907FFC7FFFBDEFFFFE3FFBFEE21FFC8E3FFFF9FFFFFBFF77EFE1CFBFC630E61FFB1 + F73EEFF885FF7FEFFDF83FFFF1FFCFF7D8C21E6308619421849083EF4307FDFC3FF63F + FFDFFBFF5FF44388710C20C41FFB08FFF7F5FC618410F410C310421C41, + FFB907FFC7DFFFDEFFEFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CBBFC630E61FFB1 + F73EFFE885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861E421871083FF430FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41, + FFB907FFC7FFFFDEFFFFE3FFBBFE21FFDEC3FFFF1FFFFFBFF7BEFE1CDBFC630E61FFB1 + F73EFF7885FF7FEFFDF43FFBF1FFCFFFD8C21A238861F421879083F7420FFDFC3FF63F + FFDFFBFF7FFC438C510C20441FF918FFF7EDFC618420F4104310421C41, + EF8907FFC7FFFFDEFFFFE3FFBFFE21FFDEA3FFFE9FFFFFBFF7FEFE1CFBFC630E61FFB1 + F73EFFF885FF7FEFFDFC3FFFF1FFCEFFD8C21C638861F421879083FF430FFDFC3FF63F + FFDFFBFF7FDC438C610C20841FFA18FFF7FDFC718430F410C310621C41, + FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7EEFE1CF3FC630E61FFB1 + F73EFFF805FF7FEFFDFC3FFFF1FFCFBFC8C21E638061F421879083F7430FFDFC3FF63F + FFCFFBFF7FFC038C710C20C41FFB18FFF7FDFC718430F410C310621C41, + FF0907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1 + F33EFF7885FF7FEFFDFC3FFFF1FFCFFFD8C21A638861F421879083FF430FFDFC3FF23F + FFDFFBFF7F7C438C710C20C41FFB18FFF7FDFC718430F410C310621C41, + FFB907FFC7FFFFC2FFFFE3FFBBFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1 + F73EFEF885FF7FEFFDFC3FFFF1FFCBFFD8C21E638861F421879083BF430FFDFC3FF23F + FFDFFBFF7FFC438C710C20C41FFB18FFF6FDFC718430F410C310621C41, + 7FB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FF7F8FFFFFBFF7FEFE1CFBFC630E61FFB1 + F73EFFD885FF7FEFFDFC3FFFF1FFCFFF98C21E638861F421879083FF430FFDDC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310620C41, + FBB807FF07FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1 + F73EFFF885FF7FEFFDFC3FFFF1FFCFFFD8C21E638861F421879083FD430FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41, + FFB907FFC7FFFFDEFFFFE3FFBFFE21FFDEE3FFFF9FFFFFBFF7FEFE1CFBFC630E61FFB1 + F73EDFF885FF3FEFFDFC3FFFF1FFCEFFD8C21E638861F421079083FF030FFDFC3FF63F + FFDFFBFF7FFC438C710C20C41FFB18FFF7FDFC718430F410C310621C41, + 0002000208000821002004108000400040080100208400021000084108210420840082 + 0002000100010020040082100208400001000084000010000040000000200410001040 + 0840002100008000020000080008200020001000100008000020000080, + 0002100200000801002000108000400040000100008400021000080008000020040080 + 0002000000010420040002100208400001000080000210000800000004200400001000 + 0840002100000000000000000008000020000000100000000000000080, + 0002100208000821002084008000420041080104200410001000084100210400840082 + 1042000108010400801080104200400021042084108210420841080004200410801040 + 0041000100008410821042084008210020001082104208410821042084, + 0000004000010000040080108000000800002004008410021000000008010000001000 + 0040000000200400801002104008400000000000000000000000000000008000820000 + 0841002100000000000000000100000400000082000000000000000000, + 0000100200000000002000108000020040000000008010020000000008000000000080 + 0000000000010400040080100200400000000004000000000800000000200400001000 + 0040002000000400000000000000000020000000004000000000000000, + 0002004008410021042004008000400801082004208000820000004100210400841082 + 1040000008010000841002100008400021042084108010420041080000208410820042 + 0001082000008010821042084100210400001082100208410821042084, + 0002104208410821042084108000420841082104208410821000080008200020041080 + 0042000108210420841082104208400021042084008210420841080004208410821002 + 0841082100008410800042000108010420001002104000410021002084, + 0000100200000800002080108000020040000100008410021000080008000020000080 + 0002000100210420040082104208400000000004000200000800000004200400001000 + 0840002100000400000000000008000020000000004000000000000000, + 0000100200000800002080108000020040000100008410021000080008000020000080 + 0002000100210420040082104208400000000004000200000800000004200400001000 + 0840002100000400000000000008000020000000004000000000000000, + 8002104208410821042084109000420841082104208410821200084108210420841082 + 1042400108210420841082104208480021042084108210420841090004208410821042 + 0841082120008410821042084108210424001082104208410821042084, + 0002000000400021000000108000420041000000000000001000080100200400801082 + 1042000000000420040080100200400001042004000000000840000004000000000000 + 0040000100008400801002080000200020001000104000000000000000, + 0002000000410001040000108000020840000000008000001000080100200400801082 + 1042000100200020040080100208400001042004100000000040000000000000000000 + 0840000100000410801042000000000420000002100000000000000080, + 0000100200400801042004008000020040080100200410801000084108210420841082 + 1042000008010020040080100200400001002004008210020840080000200400801002 + 0840080100000400821042004008010020000080100200400801002004, + 0000004200010800002084008000000840002100000410801000004108000420000082 + 1002000008210020001080104000000000002084000010000041080000200000800002 + 0840002120000010800002084000010420000000104200010800002084 + ) + terminate +-- ROW_WIDTH = 792 +-- COLUMN_WIDTH = 1 + ( + 0040080000000000000002000008000020040000000000400001002004008010020040 + 0800000000008010020040000100000000801000000008000020000080100200400801 + 0020040000100000000001002004000000020000080100200400800000 + ) + data_CRC ( + 9F0B9D43 + ) + ), + data usercode_tdo ( + initialize +-- ROW_WIDTH = 32 +-- COLUMN_WIDTH = 1 + ( + 00000000 + ) + ), + data e_fuse_tdo ( + initialize +-- ROW_WIDTH = 792 +-- COLUMN_WIDTH = 1 + ( + 0040080000000000000002000008000020040000000000400001002004008010020040 + 0800000000008010020040000100000000801000000008000020000080100200400801 + 0020040000100000000001002004000000020000080100200400800000 + ) + data_CRC ( + 97784E45 + ) + ), + data array_mask ( + repeat +-- ROW_WIDTH = 792 +-- COLUMN_WIDTH = 80 + ( + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF + FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF, + 0002104208410821042084108000420841082104208410821000084108210420841082 + 1042000108210420841082104208400021042084108210420841080004208410821042 + 0841082100008410821042084108210420001082104208410821042084, + 0002104208410821042084108000420841082104208410821000084108210420841082 + 1042000108210420841082104208400021042084108210420841080004208410821042 + 0841082100008410821042084108210420001082104208410821042084, + 0002104208410821042084108000420841082104208410821000084108210420841082 + 1042000108210420841082104208400021042084108210420841080004208410821042 + 0841082100008410821042084108210420001082104208410821042084, + 8002104208410821042084109000420841082104208410821200084108210420841082 + 1042400108210420841082104208480021042084108210420841090004208410821042 + 0841082120008410821042084108210424001082104208410821042084, + 0002104208410821042084108000420841082104208410821000084108210420841082 + 1042000108210420841082104208400021042084108210420841080004208410821042 + 0841082100008410821042084108210420001082104208410821042084, + 0002104208410821042084108000420841082104208410821000084108210420841082 + 1042000108210420841082104208400021042084108210420841080004208410821042 + 0841082100008410821042084108210420001082104208410821042084, + 0002104208410821042084108000420841082104208410821000084108210420841082 + 1042000108210420841082104208400021042084108210420841080004208410821042 + 0841082100008410821042084108210420001082104208410821042084, + 8002104208410821042084109000420841082104208410821200084108210420841082 + 1042400108210420841082104208480021042084108210420841090004208410821042 + 0841082120008410821042084108210424001082104208410821042084, + 0002104208410821042084108000420841082104208410821000084108210420841082 + 1042000108210420841082104208400021042084108210420841080004208410821042 + 0841082100008410821042084108210420001082104208410821042084, + 8002104208410821042084109000420841082104208410821200084108210420841082 + 1042400108210420841082104208480021042084108210420841090004208410821042 + 0841082120008410821042084108210424001082104208410821042084, + 0002104208410821042084108000420841082104208410821000084108210420841082 + 1042000108210420841082104208400021042084108210420841080004208410821042 + 0841082100008410821042084108210420001082104208410821042084, + 8002104208410821042084109000420841082104208410821200084108210420841082 + 1042400108210420841082104208480021042084108210420841090004208410821042 + 0841082120008410821042084108210424001082104208410821042084, + 0002104208410821042084108000420841082104208410821000084108210420841082 + 1042000108210420841082104208400021042084108210420841080004208410821042 + 0841082100008410821042084108210420001082104208410821042084, + 0002104208410821042084108000420841082104208410821000084108210420841082 + 1042000108210420841082104208400021042084108210420841080004208410821042 + 0841082120008410821042084108210420001082104208410821042084 + ) + ) +) +51A7 \ No newline at end of file diff --git a/Logic/68030_tk.lco b/Logic/68030_tk.lco new file mode 100644 index 0000000..204698c --- /dev/null +++ b/Logic/68030_tk.lco @@ -0,0 +1,254 @@ +[DEVICE] +Family = M4A5; +PartType = M4A5-128/64; +Package = 100TQFP; +PartNumber = M4A5-128/64-10VC; +Speed = -10; +Operating_condition = COM; +EN_Segment = No; +Pin_MC_1to1 = No; +EN_PinReserve_IO = Yes; +EN_PinReserve_BIDIR = Yes; +Voltage = 5.0; + +[REVISION] +RCS = "$Revision: 1.2 $"; +Parent = m4a5.lci; +SDS_File = m4a5.sds; +Design = 68030_tk.tt4; +DATE = 2/1/15; +TIME = 21:36:55; +Source_Format = Pure_VHDL; +Type = TT2; +Pre_Fit_Time = 1; + +[IGNORE ASSIGNMENTS] +Pin_Assignments = No; +Pin_Keep_Block = No; +Pin_Keep_Segment = No; +Group_Assignments = No; +Macrocell_Assignments = No; +Macrocell_Keep_Block = No; +Macrocell_Keep_Segment = No; +Pin_Reservation = No; +Block_Reservation = No; +Segment_Reservation = No; +Timing_Constraints = No; + +[CLEAR ASSIGNMENTS] +Pin_Assignments = No; +Pin_Keep_Block = No; +Pin_Keep_Segment = No; +Group_Assignments = No; +Macrocell_Assignments = No; +Macrocell_Keep_Block = No; +Macrocell_Keep_Segment = No; +Pin_Reservation = No; +Block_Reservation = No; +Segment_Reservation = No; +Timing_Constraints = No; + +[BACKANNOTATE ASSIGNMENTS] +Pin_Block = No; +Pin_Macrocell_Block = No; +Routing = No; + +[GLOBAL CONSTRAINTS] +Max_PTerm_Split = 16; +Max_PTerm_Collapse = 16; +Max_Pin_Percent = 100; +Max_Macrocell_Percent = 100; +Max_GLB_Input_Percent = 100; +Max_Seg_In_Percent = 100; +Logic_Reduction = Yes; +XOR_Synthesis = Yes; +DT_Synthesis = Yes; +Node_Collapse = Yes; +Run_Time = 0; +Set_Reset_Dont_Care = Yes; +Clock_Optimize = No; +In_Reg_Optimize = Yes; +Balanced_Partitioning = Yes; +Device_max_fanin = 33; +Device_max_pterms = 20; +Usercode = 0; +Usercode_Format = Hex; + +[LOCATION ASSIGNMENTS] +Layer = OFF; +A_23_ = pin,85,-,H,-; +A_22_ = pin,84,-,H,-; +SIZE_1_ = pin,79,-,H,-; +A_21_ = pin,94,-,A,-; +A_20_ = pin,93,-,A,-; +A_31_ = pin,4,-,B,-; +A_19_ = pin,97,-,A,-; +A_18_ = pin,95,-,A,-; +A_17_ = pin,59,-,F,-; +A_16_ = pin,96,-,A,-; +IPL_2_ = pin,68,-,G,-; +FC_1_ = pin,58,-,F,-; +IPL_1_ = pin,56,-,F,-; +IPL_0_ = pin,67,-,G,-; +AS_000 = pin,42,-,E,-; +FC_0_ = pin,57,-,F,-; +UDS_000 = pin,32,-,D,-; +LDS_000 = pin,31,-,D,-; +A1 = pin,60,-,F,-; +nEXP_SPACE = pin,14,-,-,-; +BERR = pin,41,-,E,-; +BG_030 = pin,21,-,C,-; +BGACK_000 = pin,28,-,D,-; +CLK_030 = pin,64,-,-,-; +CLK_000 = pin,11,-,-,-; +CLK_OSZI = pin,61,-,-,-; +CLK_DIV_OUT = pin,65,-,G,-; +CLK_EXP = pin,10,-,B,-; +FPU_CS = pin,78,-,H,-; +FPU_SENSE = pin,91,-,A,-; +DTACK = pin,30,-,D,-; +AVEC = pin,92,-,A,-; +VPA = pin,36,-,-,-; +RST = pin,86,-,-,-; +AMIGA_BUS_DATA_DIR = pin,48,-,E,-; +AMIGA_BUS_ENABLE_LOW = pin,20,-,C,-; +AMIGA_BUS_ENABLE_HIGH = pin,34,-,D,-; +CIIN = pin,47,-,E,-; +SIZE_0_ = pin,70,-,G,-; +A_30_ = pin,5,-,B,-; +A_29_ = pin,6,-,B,-; +A_28_ = pin,15,-,C,-; +A_27_ = pin,16,-,C,-; +A_26_ = pin,17,-,C,-; +A_25_ = pin,18,-,C,-; +A_24_ = pin,19,-,C,-; +IPL_030_2_ = pin,9,-,B,-; +IPL_030_1_ = pin,7,-,B,-; +IPL_030_0_ = pin,8,-,B,-; +AS_030 = pin,82,-,H,-; +RW_000 = pin,80,-,H,-; +DS_030 = pin,98,-,A,-; +A0 = pin,69,-,G,-; +BG_000 = pin,29,-,D,-; +BGACK_030 = pin,83,-,H,-; +DSACK1 = pin,81,-,H,-; +E = pin,66,-,G,-; +VMA = pin,35,-,D,-; +RESET = pin,3,-,B,-; +RW = pin,71,-,G,-; +AMIGA_ADDR_ENABLE = pin,33,-,D,-; +cpu_est_0_ = node,-,-,A,8; +cpu_est_1_ = node,-,-,C,8; +inst_AS_000_INT = node,-,-,C,9; +inst_AMIGA_BUS_ENABLE_DMA_LOW = node,-,-,B,2; +inst_AS_030_D0 = node,-,-,H,5; +inst_nEXP_SPACE_D0reg = node,-,-,C,4; +inst_DS_030_D0 = node,-,-,D,6; +inst_AS_030_000_SYNC = node,-,-,F,12; +inst_BGACK_030_INT_D = node,-,-,H,2; +SIZE_DMA_0_ = node,-,-,B,9; +SIZE_DMA_1_ = node,-,-,H,13; +inst_VPA_D = node,-,-,C,13; +inst_UDS_000_INT = node,-,-,G,2; +inst_LDS_000_INT = node,-,-,B,5; +inst_DTACK_D0 = node,-,-,G,11; +inst_CLK_OUT_PRE_50 = node,-,-,E,2; +inst_CLK_000_D1 = node,-,-,D,2; +inst_CLK_000_D0 = node,-,-,G,10; +inst_CLK_000_PE = node,-,-,G,9; +SM_AMIGA_7_ = node,-,-,F,0; +SM_AMIGA_5_ = node,-,-,F,8; +inst_CLK_OUT_PRE = node,-,-,E,13; +inst_CLK_000_NE = node,-,-,E,8; +CLK_000_N_SYNC_11_ = node,-,-,B,6; +CLK_000_P_SYNC_9_ = node,-,-,C,11; +cpu_est_2_ = node,-,-,G,5; +inst_CLK_000_NE_D0 = node,-,-,C,12; +SM_AMIGA_3_ = node,-,-,C,1; +SM_AMIGA_0_ = node,-,-,F,13; +inst_AMIGA_BUS_ENABLE_DMA_HIGH = node,-,-,A,6; +SM_AMIGA_6_ = node,-,-,F,4; +RESET_DLY_0_ = node,-,-,D,9; +RESET_DLY_1_ = node,-,-,D,13; +RESET_DLY_2_ = node,-,-,A,13; +RESET_DLY_3_ = node,-,-,A,9; +RESET_DLY_4_ = node,-,-,A,5; +RESET_DLY_5_ = node,-,-,A,1; +RESET_DLY_6_ = node,-,-,A,12; +RESET_DLY_7_ = node,-,-,A,11; +CLK_000_P_SYNC_0_ = node,-,-,D,7; +CLK_000_P_SYNC_1_ = node,-,-,F,6; +CLK_000_P_SYNC_2_ = node,-,-,D,3; +CLK_000_P_SYNC_3_ = node,-,-,C,7; +CLK_000_P_SYNC_4_ = node,-,-,A,7; +CLK_000_P_SYNC_5_ = node,-,-,C,3; +CLK_000_P_SYNC_6_ = node,-,-,C,14; +CLK_000_P_SYNC_7_ = node,-,-,A,3; +CLK_000_P_SYNC_8_ = node,-,-,A,14; +CLK_000_N_SYNC_0_ = node,-,-,D,14; +CLK_000_N_SYNC_1_ = node,-,-,C,10; +CLK_000_N_SYNC_2_ = node,-,-,G,7; +CLK_000_N_SYNC_3_ = node,-,-,D,10; +CLK_000_N_SYNC_4_ = node,-,-,A,10; +CLK_000_N_SYNC_5_ = node,-,-,G,3; +CLK_000_N_SYNC_6_ = node,-,-,C,6; +CLK_000_N_SYNC_7_ = node,-,-,F,2; +CLK_000_N_SYNC_8_ = node,-,-,G,14; +CLK_000_N_SYNC_9_ = node,-,-,G,6; +CLK_000_N_SYNC_10_ = node,-,-,B,13; +inst_CLK_030_H = node,-,-,A,2; +inst_DS_000_ENABLE = node,-,-,F,1; +SM_AMIGA_1_ = node,-,-,F,9; +SM_AMIGA_4_ = node,-,-,F,5; +SM_AMIGA_2_ = node,-,-,C,5; +CLK_OUT_PRE_Dreg = node,-,-,G,13; +un8_ciin = node,-,-,E,9; +state_machine_un15_clk_000_ne_i_n = node,-,-,C,2; +CIIN_0 = node,-,-,E,5; + +[GROUP ASSIGNMENTS] +Layer = OFF; + +[RESOURCE RESERVATIONS] +Layer = OFF; + +[SLEWRATE] +Default = SLOW; +FAST = CLK_DIV_OUT,CLK_EXP,FPU_CS,AMIGA_BUS_DATA_DIR,AMIGA_BUS_ENABLE_LOW,AMIGA_ADDR_ENABLE,AMIGA_BUS_ENABLE_HIGH; + +[PULLUP] +Default = Up; + +[NETLIST/DELAY FORMAT] +Delay_File = SDF; +Netlist = VHDL; + +[OSM BYPASS] + +[FITTER REPORT FORMAT] +Fitter_Options = Yes; +Pinout_Diagram = No; +Pinout_Listing = Yes; +Detailed_Block_Segment_Summary = Yes; +Input_Signal_List = Yes; +Output_Signal_List = Yes; +Bidir_Signal_List = Yes; +Node_Signal_List = Yes; +Signal_Fanout_List = Yes; +Block_Segment_Fanin_List = Yes; +Postfit_Eqn = Yes; +Prefit_Eqn = Yes; +Page_Break = Yes; + +[POWER] +Powerlevel = Low,High; +Default = High; +Low = H,G,F,E,D,C,B,A; +Type = GLB; + +[SOURCE CONSTRAINT OPTION] + +[TIMING ANALYZER] +Last_source=; +Last_source_type=Fmax; + diff --git a/Logic/68030_tk.mod b/Logic/68030_tk.mod new file mode 100644 index 0000000..ecb8f2e --- /dev/null +++ b/Logic/68030_tk.mod @@ -0,0 +1,135 @@ +MODEL +MODEL_VERSION "1.0"; +DESIGN "68030_tk"; +DATE "Sun Feb 01 21:13:56 2015"; +VENDOR "Lattice Semiconductor Corporation"; +PROGRAM "STAMP Model Generator"; + +/* port name and type */ +INPUT A1; +INPUT A_16; +INPUT A_17; +INPUT A_18; +INPUT A_19; +INPUT A_20; +INPUT A_21; +INPUT A_22; +INPUT A_23; +INPUT A_24; +INPUT A_25; +INPUT A_26; +INPUT A_27; +INPUT A_28; +INPUT A_29; +INPUT A_30; +INPUT A_31; +INPUT BGACK_000; +INPUT BG_030; +INPUT CLK_000; +INPUT CLK_030; +INPUT CLK_OSZI; +INPUT DTACK; +INPUT FC_0; +INPUT FC_1; +INPUT FPU_SENSE; +INPUT IPL_0; +INPUT IPL_1; +INPUT IPL_2; +INPUT RST; +INPUT VPA; +INPUT nEXP_SPACE; +OUTPUT AMIGA_ADDR_ENABLE; +OUTPUT AMIGA_BUS_DATA_DIR; +OUTPUT AMIGA_BUS_ENABLE_HIGH; +OUTPUT AMIGA_BUS_ENABLE_LOW; +OUTPUT AVEC; +OUTPUT BGACK_030; +OUTPUT BG_000; +OUTPUT CIIN; +OUTPUT CLK_DIV_OUT; +OUTPUT CLK_EXP; +OUTPUT DSACK1; +OUTPUT E; +OUTPUT FPU_CS; +OUTPUT IPL_030_0; +OUTPUT IPL_030_1; +OUTPUT IPL_030_2; +OUTPUT RESET; +OUTPUT VMA; +INOUT A0; +INOUT AS_000; +INOUT AS_030; +INOUT BERR; +INOUT DS_030; +INOUT LDS_000; +INOUT RW; +INOUT RW_000; +INOUT SIZE_0; +INOUT SIZE_1; +INOUT UDS_000; + +/* timing arc definitions */ +AS_030_AS_000_delay: DELAY AS_030 AS_000; +A_20_CIIN_delay: DELAY A_20 CIIN; +A_21_CIIN_delay: DELAY A_21 CIIN; +A_22_CIIN_delay: DELAY A_22 CIIN; +A_23_CIIN_delay: DELAY A_23 CIIN; +A_24_CIIN_delay: DELAY A_24 CIIN; +A_25_CIIN_delay: DELAY A_25 CIIN; +A_26_CIIN_delay: DELAY A_26 CIIN; +A_27_CIIN_delay: DELAY A_27 CIIN; +A_28_CIIN_delay: DELAY A_28 CIIN; +A_29_CIIN_delay: DELAY A_29 CIIN; +A_30_CIIN_delay: DELAY A_30 CIIN; +A_31_CIIN_delay: DELAY A_31 CIIN; +DS_030_LDS_000_delay: DELAY DS_030 LDS_000; +DS_030_UDS_000_delay: DELAY DS_030 UDS_000; +AS_000_AMIGA_BUS_DATA_DIR_delay: DELAY AS_000 AMIGA_BUS_DATA_DIR; +AS_030_FPU_CS_delay: DELAY AS_030 FPU_CS; +A_16_FPU_CS_delay: DELAY A_16 FPU_CS; +A_17_FPU_CS_delay: DELAY A_17 FPU_CS; +A_18_FPU_CS_delay: DELAY A_18 FPU_CS; +A_19_FPU_CS_delay: DELAY A_19 FPU_CS; +BGACK_000_FPU_CS_delay: DELAY BGACK_000 FPU_CS; +FC_0_FPU_CS_delay: DELAY FC_0 FPU_CS; +FC_1_FPU_CS_delay: DELAY FC_1 FPU_CS; +FPU_SENSE_FPU_CS_delay: DELAY FPU_SENSE FPU_CS; +RW_000_AMIGA_BUS_DATA_DIR_delay: DELAY RW_000 AMIGA_BUS_DATA_DIR; +CLK_OSZI_AS_000_delay: DELAY CLK_OSZI AS_000; +CLK_OSZI_CIIN_delay: DELAY CLK_OSZI CIIN; +CLK_OSZI_LDS_000_delay: DELAY CLK_OSZI LDS_000; +CLK_OSZI_LDS_000_delay: DELAY CLK_OSZI LDS_000; +CLK_OSZI_SIZE_0_delay: DELAY CLK_OSZI SIZE_0; +CLK_OSZI_SIZE_0_delay: DELAY CLK_OSZI SIZE_0; +CLK_OSZI_SIZE_1_delay: DELAY CLK_OSZI SIZE_1; +CLK_OSZI_SIZE_1_delay: DELAY CLK_OSZI SIZE_1; +CLK_OSZI_UDS_000_delay: DELAY CLK_OSZI UDS_000; +CLK_OSZI_UDS_000_delay: DELAY CLK_OSZI UDS_000; +CLK_OSZI_AMIGA_BUS_DATA_DIR_delay: DELAY CLK_OSZI AMIGA_BUS_DATA_DIR; +CLK_OSZI_AMIGA_BUS_DATA_DIR_delay: DELAY CLK_OSZI AMIGA_BUS_DATA_DIR; +CLK_OSZI_AMIGA_BUS_ENABLE_HIGH_delay: DELAY CLK_OSZI AMIGA_BUS_ENABLE_HIGH; +CLK_OSZI_AMIGA_BUS_ENABLE_HIGH_delay: DELAY CLK_OSZI AMIGA_BUS_ENABLE_HIGH; +CLK_OSZI_AMIGA_BUS_ENABLE_HIGH_delay: DELAY CLK_OSZI AMIGA_BUS_ENABLE_HIGH; +CLK_OSZI_AMIGA_BUS_ENABLE_LOW_delay: DELAY CLK_OSZI AMIGA_BUS_ENABLE_LOW; +CLK_OSZI_AMIGA_BUS_ENABLE_LOW_delay: DELAY CLK_OSZI AMIGA_BUS_ENABLE_LOW; +CLK_OSZI_CLK_DIV_OUT_delay: DELAY CLK_OSZI CLK_DIV_OUT; +CLK_OSZI_CLK_EXP_delay: DELAY CLK_OSZI CLK_EXP; +CLK_OSZI_A0_delay: DELAY CLK_OSZI A0; +CLK_OSZI_AS_030_delay: DELAY CLK_OSZI AS_030; +CLK_OSZI_BGACK_030_delay: DELAY CLK_OSZI BGACK_030; +CLK_OSZI_BG_000_delay: DELAY CLK_OSZI BG_000; +CLK_OSZI_DSACK1_delay: DELAY CLK_OSZI DSACK1; +CLK_OSZI_DS_030_delay: DELAY CLK_OSZI DS_030; +CLK_OSZI_E_delay: DELAY CLK_OSZI E; +CLK_OSZI_IPL_030_0_delay: DELAY CLK_OSZI IPL_030_0; +CLK_OSZI_IPL_030_1_delay: DELAY CLK_OSZI IPL_030_1; +CLK_OSZI_IPL_030_2_delay: DELAY CLK_OSZI IPL_030_2; +CLK_OSZI_RESET_delay: DELAY CLK_OSZI RESET; +CLK_OSZI_RW_delay: DELAY CLK_OSZI RW; +CLK_OSZI_RW_000_delay: DELAY CLK_OSZI RW_000; +CLK_OSZI_VMA_delay: DELAY CLK_OSZI VMA; +CLK_OSZI_AMIGA_ADDR_ENABLE_delay: DELAY CLK_OSZI AMIGA_ADDR_ENABLE; + +/* timing check arc definitions */ + +ENDMODEL diff --git a/Logic/68030_tk.plc b/Logic/68030_tk.plc new file mode 100644 index 0000000..b638c6b --- /dev/null +++ b/Logic/68030_tk.plc @@ -0,0 +1,165 @@ +|--------------------------------------------| +|- ispLEVER Fitter Report File -| +|- Version 1.7.00.05.28.13 -| +|- (c)Copyright, Lattice Semiconductor 2002 -| +|--------------------------------------------| + + +; Source file 68030_tk.tt4 +; FITTER-generated Placements. +; DEVICE mach447a +; DATE Sun Feb 01 21:36:55 2015 + + +Pin 85 A_23_ +Pin 84 A_22_ +Pin 79 SIZE_1_ Comb ; S6=1 S9=1 Pair 287 +Pin 94 A_21_ +Pin 93 A_20_ +Pin 4 A_31_ +Pin 97 A_19_ +Pin 95 A_18_ +Pin 59 A_17_ +Pin 96 A_16_ +Pin 68 IPL_2_ +Pin 58 FC_1_ +Pin 56 IPL_1_ +Pin 67 IPL_0_ +Pin 42 AS_000 Comb ; S6=1 S9=1 Pair 203 +Pin 57 FC_0_ +Pin 32 UDS_000 Comb ; S6=1 S9=1 Pair 185 +Pin 31 LDS_000 Comb ; S6=1 S9=1 Pair 191 +Pin 60 A1 +Pin 14 nEXP_SPACE +Pin 41 BERR Comb ; S6=1 S9=1 Pair 197 +Pin 21 BG_030 +Pin 28 BGACK_000 +Pin 64 CLK_030 +Pin 11 CLK_000 +Pin 61 CLK_OSZI +Pin 65 CLK_DIV_OUT Comb ; S6=1 S9=1 Pair 247 +Pin 10 CLK_EXP Comb ; S6=1 S9=1 Pair 127 +Pin 78 FPU_CS Comb ; S6=1 S9=1 Pair 271 +Pin 91 FPU_SENSE +Pin 30 DTACK +Pin 92 AVEC Comb ; S6=1 S9=1 Pair 107 +Pin 36 VPA +Pin 86 RST +Pin 48 AMIGA_BUS_DATA_DIR Comb ; S6=1 S9=1 Pair 199 +Pin 20 AMIGA_BUS_ENABLE_LOW Comb ; S6=1 S9=1 Pair 149 +Pin 34 AMIGA_BUS_ENABLE_HIGH Comb ; S6=1 S9=1 Pair 181 +Pin 47 CIIN Comb ; S6=1 S9=1 Pair 215 +Pin 70 SIZE_0_ Comb ; S6=1 S9=1 Pair 263 +Pin 5 A_30_ +Pin 6 A_29_ +Pin 15 A_28_ +Pin 16 A_27_ +Pin 17 A_26_ +Pin 18 A_25_ +Pin 19 A_24_ +Pin 9 IPL_030_2_ Reg ; S6=0 S9=1 Pair 131 +Pin 7 IPL_030_1_ Reg ; S6=0 S9=1 Pair 143 +Pin 8 IPL_030_0_ Reg ; S6=0 S9=1 Pair 137 +Pin 82 AS_030 Reg ; S6=1 S9=1 Pair 281 +Pin 80 RW_000 Reg ; S6=1 S9=1 Pair 269 +Pin 98 DS_030 Reg ; S6=1 S9=1 Pair 101 +Pin 69 A0 Reg ; S6=1 S9=1 Pair 257 +Pin 29 BG_000 Reg ; S6=1 S9=1 Pair 175 +Pin 83 BGACK_030 Reg ; S6=1 S9=1 Pair 275 +Pin 81 DSACK1 Reg ; S6=1 S9=1 Pair 283 +Pin 66 E Reg ; S6=1 S9=1 Pair 251 +Pin 35 VMA Reg ; S6=1 S9=1 Pair 173 +Pin 3 RESET Reg ; S6=1 S9=1 Pair 125 +Pin 71 RW Reg ; S6=1 S9=1 Pair 245 +Pin 33 AMIGA_ADDR_ENABLE Reg ; S6=1 S9=1 Pair 179 +Node 287 RN_SIZE_1_ Comb ; S6=1 S9=1 +Node 203 RN_AS_000 Comb ; S6=1 S9=1 +Node 185 RN_UDS_000 Comb ; S6=1 S9=1 +Node 191 RN_LDS_000 Comb ; S6=1 S9=1 +Node 197 RN_BERR Comb ; S6=1 S9=1 +Node 263 RN_SIZE_0_ Comb ; S6=1 S9=1 +Node 131 RN_IPL_030_2_ Reg ; S6=0 S9=1 +Node 143 RN_IPL_030_1_ Reg ; S6=0 S9=1 +Node 137 RN_IPL_030_0_ Reg ; S6=0 S9=1 +Node 281 RN_AS_030 Reg ; S6=1 S9=1 +Node 269 RN_RW_000 Reg ; S6=1 S9=1 +Node 101 RN_DS_030 Reg ; S6=1 S9=1 +Node 257 RN_A0 Reg ; S6=1 S9=1 +Node 175 RN_BG_000 Reg ; S6=1 S9=1 +Node 275 RN_BGACK_030 Reg ; S6=1 S9=1 +Node 283 RN_DSACK1 Reg ; S6=1 S9=1 +Node 251 RN_E Reg ; S6=1 S9=1 +Node 173 RN_VMA Reg ; S6=1 S9=1 +Node 125 RN_RESET Reg ; S6=1 S9=1 +Node 245 RN_RW Reg ; S6=1 S9=1 +Node 179 RN_AMIGA_ADDR_ENABLE Reg ; S6=1 S9=1 +Node 113 cpu_est_0_ Reg ; S6=1 S9=1 +Node 161 cpu_est_1_ Reg ; S6=1 S9=1 +Node 163 inst_AS_000_INT Reg ; S6=0 S9=1 +Node 128 inst_AMIGA_BUS_ENABLE_DMA_LOW Reg ; S6=0 S9=1 +Node 277 inst_AS_030_D0 Reg ; S6=1 S9=1 +Node 155 inst_nEXP_SPACE_D0reg Reg ; S6=0 S9=1 +Node 182 inst_DS_030_D0 Reg ; S6=1 S9=1 +Node 239 inst_AS_030_000_SYNC Reg ; S6=1 S9=1 +Node 272 inst_BGACK_030_INT_D Reg ; S6=1 S9=1 +Node 139 SIZE_DMA_0_ Reg ; S6=0 S9=1 +Node 289 SIZE_DMA_1_ Reg ; S6=1 S9=1 +Node 169 inst_VPA_D Reg ; S6=0 S9=1 +Node 248 inst_UDS_000_INT Reg ; S6=1 S9=1 +Node 133 inst_LDS_000_INT Reg ; S6=0 S9=1 +Node 262 inst_DTACK_D0 Reg ; S6=1 S9=1 +Node 200 inst_CLK_OUT_PRE_50 Reg ; S6=1 S9=1 +Node 176 inst_CLK_000_D1 Reg ; S6=1 S9=1 +Node 260 inst_CLK_000_D0 Reg ; S6=1 S9=1 +Node 259 inst_CLK_000_PE Reg ; S6=1 S9=1 +Node 221 SM_AMIGA_7_ Reg ; S6=1 S9=1 +Node 233 SM_AMIGA_5_ Reg ; S6=0 S9=1 +Node 217 inst_CLK_OUT_PRE Reg ; S6=1 S9=1 +Node 209 inst_CLK_000_NE Reg ; S6=1 S9=1 +Node 134 CLK_000_N_SYNC_11_ Reg ; S6=1 S9=1 +Node 166 CLK_000_P_SYNC_9_ Reg ; S6=1 S9=1 +Node 253 cpu_est_2_ Reg ; S6=1 S9=1 +Node 167 inst_CLK_000_NE_D0 Reg ; S6=1 S9=1 +Node 151 SM_AMIGA_3_ Reg ; S6=1 S9=1 +Node 241 SM_AMIGA_0_ Reg ; S6=0 S9=1 +Node 110 inst_AMIGA_BUS_ENABLE_DMA_HIGH Reg ; S6=1 S9=1 +Node 227 SM_AMIGA_6_ Reg ; S6=0 S9=1 +Node 187 RESET_DLY_0_ Reg ; S6=0 S9=1 +Node 193 RESET_DLY_1_ Reg ; S6=0 S9=1 +Node 121 RESET_DLY_2_ Reg ; S6=0 S9=1 +Node 115 RESET_DLY_3_ Reg ; S6=0 S9=1 +Node 109 RESET_DLY_4_ Reg ; S6=0 S9=1 +Node 103 RESET_DLY_5_ Reg ; S6=0 S9=1 +Node 119 RESET_DLY_6_ Reg ; S6=0 S9=1 +Node 118 RESET_DLY_7_ Reg ; S6=0 S9=1 +Node 184 CLK_000_P_SYNC_0_ Reg ; S6=1 S9=1 +Node 230 CLK_000_P_SYNC_1_ Reg ; S6=1 S9=1 +Node 178 CLK_000_P_SYNC_2_ Reg ; S6=1 S9=1 +Node 160 CLK_000_P_SYNC_3_ Reg ; S6=1 S9=1 +Node 112 CLK_000_P_SYNC_4_ Reg ; S6=1 S9=1 +Node 154 CLK_000_P_SYNC_5_ Reg ; S6=1 S9=1 +Node 170 CLK_000_P_SYNC_6_ Reg ; S6=1 S9=1 +Node 106 CLK_000_P_SYNC_7_ Reg ; S6=1 S9=1 +Node 122 CLK_000_P_SYNC_8_ Reg ; S6=1 S9=1 +Node 194 CLK_000_N_SYNC_0_ Reg ; S6=1 S9=1 +Node 164 CLK_000_N_SYNC_1_ Reg ; S6=1 S9=1 +Node 256 CLK_000_N_SYNC_2_ Reg ; S6=1 S9=1 +Node 188 CLK_000_N_SYNC_3_ Reg ; S6=1 S9=1 +Node 116 CLK_000_N_SYNC_4_ Reg ; S6=1 S9=1 +Node 250 CLK_000_N_SYNC_5_ Reg ; S6=1 S9=1 +Node 158 CLK_000_N_SYNC_6_ Reg ; S6=1 S9=1 +Node 224 CLK_000_N_SYNC_7_ Reg ; S6=1 S9=1 +Node 266 CLK_000_N_SYNC_8_ Reg ; S6=1 S9=1 +Node 254 CLK_000_N_SYNC_9_ Reg ; S6=1 S9=1 +Node 145 CLK_000_N_SYNC_10_ Reg ; S6=1 S9=1 +Node 104 inst_CLK_030_H Reg ; S6=0 S9=1 +Node 223 inst_DS_000_ENABLE Reg ; S6=0 S9=1 +Node 235 SM_AMIGA_1_ Reg ; S6=0 S9=1 +Node 229 SM_AMIGA_4_ Reg ; S6=0 S9=1 +Node 157 SM_AMIGA_2_ Reg ; S6=1 S9=1 +Node 265 CLK_OUT_PRE_Dreg Reg ; S6=1 S9=1 +Node 211 un8_ciin Comb ; S6=1 S9=1 +Node 152 state_machine_un15_clk_000_ne_i_n Comb ; S6=1 S9=1 +Node 205 CIIN_0 Comb ; S6=1 S9=1 +; Unused Pins & Nodes +; -> None Found. diff --git a/Logic/68030_tk.prd b/Logic/68030_tk.prd new file mode 100644 index 0000000..b5c9652 --- /dev/null +++ b/Logic/68030_tk.prd @@ -0,0 +1,1981 @@ +|--------------------------------------------| +|- ispLEVER Fitter Report File -| +|- Version 1.7.00.05.28.13 -| +|- (c)Copyright, Lattice Semiconductor 2002 -| +|--------------------------------------------| + + +Start: Sun Feb 01 21:36:55 2015 +End : Sun Feb 01 21:36:55 2015 $$$ Elapsed time: 00:00:00 +=========================================================================== +Part [C:/Program Files (x86)/ispLever/ispcpld/dat/mach4a/mach447a] Design [68030_tk.tt4] + +* Place/Route options (keycode = 540674) + = Spread Placement: ON + = No. Routing Attempts/Placement 2 + +* Placement Completion + + +- Block +------- IO Pins Available + | +- Macrocells Available | +-- IO Pins Used + | | +- Signals to Place | | +----- Logic Array Inputs + | | | +- Placed | | | +- Array Inputs Used +_|____|____|____|_______________|____|_____________|___|________________ + 0 | 16 | 15 | 15 => 100% | 8 | 8 => 100% | 33 | 28 => 84% + 1 | 16 | 10 | 10 => 100% | 8 | 8 => 100% | 33 | 31 => 93% + 2 | 16 | 15 | 15 => 100% | 8 | 7 => 87% | 33 | 28 => 84% + 3 | 16 | 14 | 14 => 100% | 8 | 8 => 100% | 33 | 29 => 87% + 4 | 16 | 9 | 9 => 100% | 8 | 4 => 50% | 33 | 31 => 93% + 5 | 16 | 10 | 10 => 100% | 8 | 5 => 62% | 33 | 29 => 87% + 6 | 16 | 15 | 15 => 100% | 8 | 7 => 87% | 33 | 27 => 81% + 7 | 16 | 9 | 9 => 100% | 8 | 8 => 100% | 33 | 32 => 96% +---|----|----|------------|-------|------------|-----|------------------ + | Avg number of array inputs in used blocks : 29.38 => 89% + +* Input/Clock Signal count: 32 -> placed: 32 = 100% + + Resources Available Used +----------------------------------------------------------------- + Input Pins : 2 2 => 100% + I/O Pins : 64 55 => 85% + Clock Only Pins : 0 0 => 0% + Clock/Input Pins : 4 4 => 100% + Logic Blocks : 8 8 => 100% + Macrocells : 128 97 => 75% + PT Clusters : 128 44 => 34% + - Single PT Clusters : 128 58 => 45% + Input Registers : 0 + +* Routing Completion: 100% +* Attempts: Place [ 142] Route [ 0] +=========================================================================== + Signal Fanout Table +=========================================================================== + +- Signal Number + | +- Block Location ('+' for dedicated inputs) + | | +- Sig Type + | | | +- Signal-to-Pin Assignment + | | | | Fanout to Logic Blocks Signal Name +___|__|__|____|____________________________________________________________ + 1| 6| IO| 69|=> .1..|..6.| A0 + 2| 5|INP| 60|=> 01..|....| A1 + 3| 3| IO| 33|=> ....|....| AMIGA_ADDR_ENABLE + |=> Paired w/: RN_AMIGA_ADDR_ENABLE + 4| 4|OUT| 48|=> ....|....| AMIGA_BUS_DATA_DIR + 5| 3|OUT| 34|=> ....|....| AMIGA_BUS_ENABLE_HIGH + 6| 2|OUT| 20|=> ....|....| AMIGA_BUS_ENABLE_LOW + 7| 4| IO| 42|=> 01..|4.67| AS_000 + 8| 7| IO| 82|=> ....|4..7| AS_030 + |=> Paired w/: RN_AS_030 + 9| 0|OUT| 92|=> ....|....| AVEC + 10| 0|INP| 96|=> ....|45.7| A_16_ + 11| 5|INP| 59|=> ....|45.7| A_17_ + 12| 0|INP| 95|=> ....|45.7| A_18_ + 13| 0|INP| 97|=> ....|45.7| A_19_ + 14| 0|INP| 93|=> ....|4...| A_20_ + 15| 0|INP| 94|=> ....|4...| A_21_ + 16| 7|INP| 84|=> ....|4...| A_22_ + 17| 7|INP| 85|=> ....|4...| A_23_ + 18| 2|INP| 19|=> ....|4...| A_24_ + 19| 2|INP| 18|=> ....|4...| A_25_ + 20| 2|INP| 17|=> ....|4...| A_26_ + 21| 2|INP| 16|=> ....|4...| A_27_ + 22| 2|INP| 15|=> ....|4...| A_28_ + 23| 1|INP| 6|=> ....|4...| A_29_ + 24| 1|INP| 5|=> ....|4...| A_30_ + 25| 1|INP| 4|=> ....|4...| A_31_ + 26| 4| IO| 41|=> ..2.|.5.7| BERR + 27| 3|INP| 28|=> ....|45.7| BGACK_000 + 28| 7| IO| 83|=> ....|....| BGACK_030 + |=> Paired w/: RN_BGACK_030 + 29| 3| IO| 29|=> ....|....| BG_000 + |=> Paired w/: RN_BG_000 + 30| 2|INP| 21|=> ...3|....| BG_030 + 31| 4|OUT| 47|=> ....|....| CIIN + 32| 4|NOD| . |=> ....|4...| CIIN_0 + 33| +|INP| 11|=> ....|..6.| CLK_000 + 34| 3|NOD| . |=> ..2.|....| CLK_000_N_SYNC_0_ + 35| 1|NOD| . |=> .1..|...7| CLK_000_N_SYNC_10_ + 36| 1|NOD| . |=> ....|4...| CLK_000_N_SYNC_11_ + 37| 2|NOD| . |=> ....|..6.| CLK_000_N_SYNC_1_ + 38| 6|NOD| . |=> ...3|....| CLK_000_N_SYNC_2_ + 39| 3|NOD| . |=> 0...|....| CLK_000_N_SYNC_3_ + 40| 0|NOD| . |=> ....|..6.| CLK_000_N_SYNC_4_ + 41| 6|NOD| . |=> ..2.|....| CLK_000_N_SYNC_5_ + 42| 2|NOD| . |=> ....|.5..| CLK_000_N_SYNC_6_ + 43| 5|NOD| . |=> ....|..6.| CLK_000_N_SYNC_7_ + 44| 6|NOD| . |=> ....|..6.| CLK_000_N_SYNC_8_ + 45| 6|NOD| . |=> .1..|...7| CLK_000_N_SYNC_9_ + 46| 3|NOD| . |=> ....|.5..| CLK_000_P_SYNC_0_ + 47| 5|NOD| . |=> ...3|....| CLK_000_P_SYNC_1_ + 48| 3|NOD| . |=> ..2.|....| CLK_000_P_SYNC_2_ + 49| 2|NOD| . |=> 0...|....| CLK_000_P_SYNC_3_ + 50| 0|NOD| . |=> ..2.|....| CLK_000_P_SYNC_4_ + 51| 2|NOD| . |=> ..2.|....| CLK_000_P_SYNC_5_ + 52| 2|NOD| . |=> 0...|....| CLK_000_P_SYNC_6_ + 53| 0|NOD| . |=> 0...|....| CLK_000_P_SYNC_7_ + 54| 0|NOD| . |=> ..2.|....| CLK_000_P_SYNC_8_ + 55| 2|NOD| . |=> ....|..6.| CLK_000_P_SYNC_9_ + 56| +|INP| 64|=> 0...|...7| CLK_030 + 57| 6|OUT| 65|=> ....|....| CLK_DIV_OUT + 58| 1|OUT| 10|=> ....|....| CLK_EXP + 59| +|Cin| 61|=> ....|....| CLK_OSZI + 60| 6|NOD| . |=> .1..|..67| CLK_OUT_PRE_Dreg + 61| 7| IO| 81|=> ....|....| DSACK1 + |=> Paired w/: RN_DSACK1 + 62| 0| IO| 98|=> ...3|....| DS_030 + |=> Paired w/: RN_DS_030 + 63| 3|INP| 30|=> ....|..6.| DTACK + 64| 6| IO| 66|=> ....|....| E + |=> Paired w/: RN_E + 65| 5|INP| 57|=> ....|45.7| FC_0_ + 66| 5|INP| 58|=> ....|45.7| FC_1_ + 67| 7|OUT| 78|=> ....|....| FPU_CS + 68| 0|INP| 91|=> ....|4..7| FPU_SENSE + 69| 1| IO| 8|=> ....|....| IPL_030_0_ + |=> Paired w/: RN_IPL_030_0_ + 70| 1| IO| 7|=> ....|....| IPL_030_1_ + |=> Paired w/: RN_IPL_030_1_ + 71| 1| IO| 9|=> ....|....| IPL_030_2_ + |=> Paired w/: RN_IPL_030_2_ + 72| 6|INP| 67|=> .1..|....| IPL_0_ + 73| 5|INP| 56|=> .1..|....| IPL_1_ + 74| 6|INP| 68|=> .1..|....| IPL_2_ + 75| 3| IO| 31|=> 01..|..67| LDS_000 + 76| 1| IO| 3|=> ....|....| RESET + |=> Paired w/: RN_RESET + 77| 3|NOD| . |=> 01.3|....| RESET_DLY_0_ + 78| 3|NOD| . |=> 01..|....| RESET_DLY_1_ + 79| 0|NOD| . |=> 01..|....| RESET_DLY_2_ + 80| 0|NOD| . |=> 01..|....| RESET_DLY_3_ + 81| 0|NOD| . |=> 01..|....| RESET_DLY_4_ + 82| 0|NOD| . |=> 01..|....| RESET_DLY_5_ + 83| 0|NOD| . |=> 01..|....| RESET_DLY_6_ + 84| 0|NOD| . |=> .1..|....| RESET_DLY_7_ + 85| 3|NOD| . |=> ...3|....| RN_AMIGA_ADDR_ENABLE + |=> Paired w/: AMIGA_ADDR_ENABLE + 86| 7|NOD| . |=> 0...|...7| RN_AS_030 + |=> Paired w/: AS_030 + 87| 7|NOD| . |=> 0123|4.67| RN_BGACK_030 + |=> Paired w/: BGACK_030 + 88| 3|NOD| . |=> ...3|....| RN_BG_000 + |=> Paired w/: BG_000 + 89| 7|NOD| . |=> ....|...7| RN_DSACK1 + |=> Paired w/: DSACK1 + 90| 0|NOD| . |=> 0...|....| RN_DS_030 + |=> Paired w/: DS_030 + 91| 6|NOD| . |=> 0.23|..6.| RN_E + |=> Paired w/: E + 92| 1|NOD| . |=> .1..|....| RN_IPL_030_0_ + |=> Paired w/: IPL_030_0_ + 93| 1|NOD| . |=> .1..|....| RN_IPL_030_1_ + |=> Paired w/: IPL_030_1_ + 94| 1|NOD| . |=> .1..|....| RN_IPL_030_2_ + |=> Paired w/: IPL_030_2_ + 95| 1|NOD| . |=> .1..|....| RN_RESET + |=> Paired w/: RESET + 96| 7|NOD| . |=> ....|...7| RN_RW_000 + |=> Paired w/: RW_000 + 97| 3|NOD| . |=> ..23|....| RN_VMA + |=> Paired w/: VMA + 98| +|INP| 86|=> 0123|.567| RST + 99| 6| IO| 71|=> ....|.5.7| RW + 100| 7| IO| 80|=> 0...|4.6.| RW_000 + |=> Paired w/: RN_RW_000 + 101| 6| IO| 70|=> .1..|....| SIZE_0_ + 102| 7| IO| 79|=> .1..|....| SIZE_1_ + 103| 1|NOD| . |=> ....|..67| SIZE_DMA_0_ + 104| 7|NOD| . |=> ....|..67| SIZE_DMA_1_ + 105| 5|NOD| . |=> ....|.5.7| SM_AMIGA_0_ + 106| 5|NOD| . |=> ....|.5.7| SM_AMIGA_1_ + 107| 2|NOD| . |=> ..2.|.5..| SM_AMIGA_2_ + 108| 2|NOD| . |=> ..2.|.5..| SM_AMIGA_3_ + 109| 5|NOD| . |=> ..2.|.5..| SM_AMIGA_4_ + 110| 5|NOD| . |=> ..2.|.5.7| SM_AMIGA_5_ + 111| 5|NOD| . |=> .1..|.56.| SM_AMIGA_6_ + 112| 5|NOD| . |=> ...3|.5.7| SM_AMIGA_7_ + 113| 3| IO| 32|=> 01..|..67| UDS_000 + 114| 3| IO| 35|=> ....|....| VMA + |=> Paired w/: RN_VMA + 115| +|INP| 36|=> ..2.|....| VPA + 116| 0|NOD| . |=> 0.23|..6.| cpu_est_0_ + 117| 2|NOD| . |=> 0.23|..6.| cpu_est_1_ + 118| 6|NOD| . |=> 0.23|..6.| cpu_est_2_ + 119| 0|NOD| . |=> ...3|....| inst_AMIGA_BUS_ENABLE_DMA_HIGH + 120| 1|NOD| . |=> ..2.|....| inst_AMIGA_BUS_ENABLE_DMA_LOW + 121| 2|NOD| . |=> ..2.|4...| inst_AS_000_INT + 122| 5|NOD| . |=> ...3|.5..| inst_AS_030_000_SYNC + 123| 7|NOD| . |=> ..23|45.7| inst_AS_030_D0 + 124| 7|NOD| . |=> ...3|....| inst_BGACK_030_INT_D + 125| 6|NOD| . |=> ...3|.5..| inst_CLK_000_D0 + 126| 3|NOD| . |=> ...3|.5..| inst_CLK_000_D1 + 127| 4|NOD| . |=> .123|.5..| inst_CLK_000_NE + 128| 2|NOD| . |=> 0.23|..6.| inst_CLK_000_NE_D0 + 129| 6|NOD| . |=> ..23|.5.7| inst_CLK_000_PE + 130| 0|NOD| . |=> 0...|....| inst_CLK_030_H + 131| 4|NOD| . |=> ....|..6.| inst_CLK_OUT_PRE + 132| 4|NOD| . |=> ....|4...| inst_CLK_OUT_PRE_50 + 133| 5|NOD| . |=> ...3|.5..| inst_DS_000_ENABLE + 134| 3|NOD| . |=> .1..|..6.| inst_DS_030_D0 + 135| 6|NOD| . |=> ..2.|....| inst_DTACK_D0 + 136| 1|NOD| . |=> .1.3|....| inst_LDS_000_INT + 137| 6|NOD| . |=> ...3|..6.| inst_UDS_000_INT + 138| 2|NOD| . |=> ..23|....| inst_VPA_D + 139| 2|NOD| . |=> 0..3|4567| inst_nEXP_SPACE_D0reg + 140| +|INP| 14|=> ..2.|....| nEXP_SPACE + 141| 2|NOD| . |=> ....|.5..| state_machine_un15_clk_000_ne_i_n + 142| 4|NOD| . |=> ....|4...| un8_ciin +--------------------------------------------------------------------------- +=========================================================================== + < C:/Program Files (x86)/ispLever/ispcpld/dat/mach4a/mach447a Device Pin Assignments > +=========================================================================== + +- Device Pin No + | Pin Type +- Signal Fixed (*) + | | | Signal Name +____|_____|_________|______________________________________________________ + 1 | GND | | | (pwr/test) + 2 | JTAG | | | (pwr/test) + 3 | I_O | 1_07|*| RESET + 4 | I_O | 1_06|*| A_31_ + 5 | I_O | 1_05|*| A_30_ + 6 | I_O | 1_04|*| A_29_ + 7 | I_O | 1_03|*| IPL_030_1_ + 8 | I_O | 1_02|*| IPL_030_0_ + 9 | I_O | 1_01|*| IPL_030_2_ + 10 | I_O | 1_00|*| CLK_EXP + 11 | CkIn | |*| CLK_000 + 12 | Vcc | | | (pwr/test) + 13 | GND | | | (pwr/test) + 14 | CkIn | |*| nEXP_SPACE + 15 | I_O | 2_00|*| A_28_ + 16 | I_O | 2_01|*| A_27_ + 17 | I_O | 2_02|*| A_26_ + 18 | I_O | 2_03|*| A_25_ + 19 | I_O | 2_04|*| A_24_ + 20 | I_O | 2_05|*| AMIGA_BUS_ENABLE_LOW + 21 | I_O | 2_06|*| BG_030 + 22 | I_O | 2_07| | - + 23 | JTAG | | | (pwr/test) + 24 | JTAG | | | (pwr/test) + 25 | GND | | | (pwr/test) + 26 | GND | | | (pwr/test) + 27 | GND | | | (pwr/test) + 28 | I_O | 3_07|*| BGACK_000 + 29 | I_O | 3_06|*| BG_000 + 30 | I_O | 3_05|*| DTACK + 31 | I_O | 3_04|*| LDS_000 + 32 | I_O | 3_03|*| UDS_000 + 33 | I_O | 3_02|*| AMIGA_ADDR_ENABLE + 34 | I_O | 3_01|*| AMIGA_BUS_ENABLE_HIGH + 35 | I_O | 3_00|*| VMA + 36 | Inp | |*| VPA + 37 | Vcc | | | (pwr/test) + 38 | GND | | | (pwr/test) + 39 | GND | | | (pwr/test) + 40 | Vcc | | | (pwr/test) + 41 | I_O | 4_00|*| BERR + 42 | I_O | 4_01|*| AS_000 + 43 | I_O | 4_02| | - + 44 | I_O | 4_03| | - + 45 | I_O | 4_04| | - + 46 | I_O | 4_05| | - + 47 | I_O | 4_06|*| CIIN + 48 | I_O | 4_07|*| AMIGA_BUS_DATA_DIR + 49 | GND | | | (pwr/test) + 50 | GND | | | (pwr/test) + 51 | GND | | | (pwr/test) + 52 | JTAG | | | (pwr/test) + 53 | I_O | 5_07| | - + 54 | I_O | 5_06| | - + 55 | I_O | 5_05| | - + 56 | I_O | 5_04|*| IPL_1_ + 57 | I_O | 5_03|*| FC_0_ + 58 | I_O | 5_02|*| FC_1_ + 59 | I_O | 5_01|*| A_17_ + 60 | I_O | 5_00|*| A1 + 61 | CkIn | |*| CLK_OSZI + 62 | Vcc | | | (pwr/test) + 63 | GND | | | (pwr/test) + 64 | CkIn | |*| CLK_030 + 65 | I_O | 6_00|*| CLK_DIV_OUT + 66 | I_O | 6_01|*| E + 67 | I_O | 6_02|*| IPL_0_ + 68 | I_O | 6_03|*| IPL_2_ + 69 | I_O | 6_04|*| A0 + 70 | I_O | 6_05|*| SIZE_0_ + 71 | I_O | 6_06|*| RW + 72 | I_O | 6_07| | - + 73 | JTAG | | | (pwr/test) + 74 | JTAG | | | (pwr/test) + 75 | GND | | | (pwr/test) + 76 | GND | | | (pwr/test) + 77 | GND | | | (pwr/test) + 78 | I_O | 7_07|*| FPU_CS + 79 | I_O | 7_06|*| SIZE_1_ + 80 | I_O | 7_05|*| RW_000 + 81 | I_O | 7_04|*| DSACK1 + 82 | I_O | 7_03|*| AS_030 + 83 | I_O | 7_02|*| BGACK_030 + 84 | I_O | 7_01|*| A_22_ + 85 | I_O | 7_00|*| A_23_ + 86 | Inp | |*| RST + 87 | Vcc | | | (pwr/test) + 88 | GND | | | (pwr/test) + 89 | GND | | | (pwr/test) + 90 | Vcc | | | (pwr/test) + 91 | I_O | 0_00|*| FPU_SENSE + 92 | I_O | 0_01|*| AVEC + 93 | I_O | 0_02|*| A_20_ + 94 | I_O | 0_03|*| A_21_ + 95 | I_O | 0_04|*| A_18_ + 96 | I_O | 0_05|*| A_16_ + 97 | I_O | 0_06|*| A_19_ + 98 | I_O | 0_07|*| DS_030 + 99 | GND | | | (pwr/test) + 100 | GND | | | (pwr/test) +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 0] > Macrocell (MCell) Cluster Assignments +=========================================================================== + + Macrocell Number + | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size + | Sync/Async-------+ | | | Cluster to Mcell Assignment + | Node Fixed(*)----+ | | | | | +- XOR PT Size + | Sig Type-+ | | | | | | | XOR to Mcell Assignment + | Signal Name | | | | | | | | | +_|_________________|__|__|___|_____|__|______|___|__________|______________ + 0| DS_030| IO| | S | 6 | 4 to [ 0]| 1 XOR to [ 0] as logic PT + 1| RESET_DLY_5_|NOD| | S | 1 | 4 to [ 0]| 1 XOR to [ 1] for 1 PT sig + 2|inst_CLK_030_H|NOD| | S | 4 | 4 to [ 2]| 1 XOR free + 3|CLK_000_P_SYNC_7_|NOD| | S | 1 | 4 free | 1 XOR to [ 3] for 1 PT sig + 4| AVEC|OUT| | S | 1 | 4 free | 1 XOR to [ 4] for 1 PT sig + 5| RESET_DLY_4_|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig + 6|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | S | 2 | 4 to [ 6]| 1 XOR free + 7|CLK_000_P_SYNC_4_|NOD| | S | 1 | 4 free | 1 XOR to [ 7] for 1 PT sig + 8| cpu_est_0_|NOD| | S | 2 | 4 to [ 8]| 1 XOR free + 9| RESET_DLY_3_|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig +10|CLK_000_N_SYNC_4_|NOD| | S | 1 | 4 free | 1 XOR to [10] for 1 PT sig +11| RESET_DLY_7_|NOD| | S | 1 | 4 free | 1 XOR to [11] for 1 PT sig +12| RESET_DLY_6_|NOD| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig +13| RESET_DLY_2_|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig +14|CLK_000_P_SYNC_8_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig +15| | ? | | S | | 4 free | 1 XOR free +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 0] > Maximum PT Capacity +=========================================================================== + + Macrocell Number + | PT Requirements------ Logic XOR+ + | Sync/Async-------+ | | + | Node Fixed(*)----+ | | | + | Sig Type-+ | | | | + | Signal Name | | | | | Maximum PT Capacity +_|_________________|__|__|___|_____|_______________________________________ + 0| DS_030| IO| | S | 6 |=> can support up to [ 9] logic PT(s) + 1| RESET_DLY_5_|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) + 2|inst_CLK_030_H|NOD| | S | 4 |=> can support up to [ 13] logic PT(s) + 3|CLK_000_P_SYNC_7_|NOD| | S | 1 |=> can support up to [ 13] logic PT(s) + 4| AVEC|OUT| | S | 1 |=> can support up to [ 13] logic PT(s) + 5| RESET_DLY_4_|NOD| | S | 1 |=> can support up to [ 13] logic PT(s) + 6|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | S | 2 |=> can support up to [ 13] logic PT(s) + 7|CLK_000_P_SYNC_4_|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) + 8| cpu_est_0_|NOD| | S | 2 |=> can support up to [ 17] logic PT(s) + 9| RESET_DLY_3_|NOD| | S | 1 |=> can support up to [ 13] logic PT(s) +10|CLK_000_N_SYNC_4_|NOD| | S | 1 |=> can support up to [ 17] logic PT(s) +11| RESET_DLY_7_|NOD| | S | 1 |=> can support up to [ 17] logic PT(s) +12| RESET_DLY_6_|NOD| | S | 1 |=> can support up to [ 17] logic PT(s) +13| RESET_DLY_2_|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) +14|CLK_000_P_SYNC_8_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) +15| | ? | | S | |=> can support up to [ 9] logic PT(s) +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 0] > Node-Pin Assignments +=========================================================================== + + Macrocell Number + | Node Fixed(*)------+ + | Sig Type---+ | to | Block [ 0] IO Pin | Device Pin + | Signal Name | | pin | Numbers | Numbers +_|_________________|__|_____|____________________|________________________ + 0| DS_030| IO| | => | 5 6 ( 7) 0 | 96 97 ( 98) 91 + 1| RESET_DLY_5_|NOD| | => | 5 6 7 0 | 96 97 98 91 + 2|inst_CLK_030_H|NOD| | => | 6 7 0 1 | 97 98 91 92 + 3|CLK_000_P_SYNC_7_|NOD| | => | 6 7 0 1 | 97 98 91 92 + 4| AVEC|OUT| | => | 7 0 ( 1) 2 | 98 91 ( 92) 93 + 5| RESET_DLY_4_|NOD| | => | 7 0 1 2 | 98 91 92 93 + 6|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | => | 0 1 2 3 | 91 92 93 94 + 7|CLK_000_P_SYNC_4_|NOD| | => | 0 1 2 3 | 91 92 93 94 + 8| cpu_est_0_|NOD| | => | 1 2 3 4 | 92 93 94 95 + 9| RESET_DLY_3_|NOD| | => | 1 2 3 4 | 92 93 94 95 +10|CLK_000_N_SYNC_4_|NOD| | => | 2 3 4 5 | 93 94 95 96 +11| RESET_DLY_7_|NOD| | => | 2 3 4 5 | 93 94 95 96 +12| RESET_DLY_6_|NOD| | => | 3 4 5 6 | 94 95 96 97 +13| RESET_DLY_2_|NOD| | => | 3 4 5 6 | 94 95 96 97 +14|CLK_000_P_SYNC_8_|NOD| | => | 4 5 6 7 | 95 96 97 98 +15| | | | => | 4 5 6 7 | 95 96 97 98 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 0] > IO-to-Node Pin Mapping +=========================================================================== + +- Block IO Pin + | Device Pin No.--------+ + | Pin Fixed(*)----+ | + | Sig Type--+ | | | + | Signal Name | | | | Node Destinations Via Output Matrix +_|_________________|__|___|_____|___________________________________________ + 0| FPU_SENSE|INP|*| 91| => | 0 1 2 3 4 5 6 7 + 1| AVEC|OUT|*| 92| => | 2 3 ( 4) 5 6 7 8 9 + 2| A_20_|INP|*| 93| => | 4 5 6 7 8 9 10 11 + 3| A_21_|INP|*| 94| => | 6 7 8 9 10 11 12 13 + 4| A_18_|INP|*| 95| => | 8 9 10 11 12 13 14 15 + 5| A_16_|INP|*| 96| => | 10 11 12 13 14 15 0 1 + 6| A_19_|INP|*| 97| => | 12 13 14 15 0 1 2 3 + 7| DS_030| IO|*| 98| => | 14 15 ( 0) 1 2 3 4 5 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 0] > IO/Node and IO/Input Macrocell Pairing Table +=========================================================================== + +- Block IO Pin + | Device Pin No.--------+ + | Pin Fixed(*)----+ | + | Sig Type--+ | | | + | Signal Name | | | | Input Macrocell and Node Pairs +_|_________________|__|___|_____|__________________________________________ + 0| FPU_SENSE|INP|*| 91| => | Input macrocell [ -] + 1| AVEC|OUT|*| 92| => | Input macrocell [ -] + 2| A_20_|INP|*| 93| => | Input macrocell [ -] + 3| A_21_|INP|*| 94| => | Input macrocell [ -] + 4| A_18_|INP|*| 95| => | Input macrocell [ -] + 5| A_16_|INP|*| 96| => | Input macrocell [ -] + 6| A_19_|INP|*| 97| => | Input macrocell [ -] + 7| DS_030| IO|*| 98| => | Input macrocell [ -] + | | | | | | IO paired w/ node [ RN_DS_030] +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 0] > Input Multiplexer (IMX) Assignments +=========================================================================== + +----- IO pin/Input Register, or Macrocell +IMX No. | +---- Block IO Pin or Macrocell Number + | | | ABEL Node/ +-- Signal using the Pin or Macrocell + | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell + | | | | Sig Type | | +- Feedback Required (*) +---|-------|----|---|---|----------|------|-|------------------------------ + 0 [IOpin 0 | 91|INP FPU_SENSE|*|*] + [RegIn 0 |102| -| | ] + [MCell 0 |101|NOD RN_DS_030| |*] paired w/[ DS_030] + [MCell 1 |103|NOD RESET_DLY_5_| |*] + + 1 [IOpin 1 | 92|OUT AVEC|*| ] + [RegIn 1 |105| -| | ] + [MCell 2 |104|NOD inst_CLK_030_H| |*] + [MCell 3 |106|NOD CLK_000_P_SYNC_7_| |*] + + 2 [IOpin 2 | 93|INP A_20_|*|*] + [RegIn 2 |108| -| | ] + [MCell 4 |107|OUT AVEC| | ] + [MCell 5 |109|NOD RESET_DLY_4_| |*] + + 3 [IOpin 3 | 94|INP A_21_|*|*] + [RegIn 3 |111| -| | ] + [MCell 6 |110|NOD inst_AMIGA_BUS_ENABLE_DMA_HIGH| |*] + [MCell 7 |112|NOD CLK_000_P_SYNC_4_| |*] + + 4 [IOpin 4 | 95|INP A_18_|*|*] + [RegIn 4 |114| -| | ] + [MCell 8 |113|NOD cpu_est_0_| |*] + [MCell 9 |115|NOD RESET_DLY_3_| |*] + + 5 [IOpin 5 | 96|INP A_16_|*|*] + [RegIn 5 |117| -| | ] + [MCell 10 |116|NOD CLK_000_N_SYNC_4_| |*] + [MCell 11 |118|NOD RESET_DLY_7_| |*] + + 6 [IOpin 6 | 97|INP A_19_|*|*] + [RegIn 6 |120| -| | ] + [MCell 12 |119|NOD RESET_DLY_6_| |*] + [MCell 13 |121|NOD RESET_DLY_2_| |*] + + 7 [IOpin 7 | 98| IO DS_030|*|*] paired w/[ RN_DS_030] + [RegIn 7 |123| -| | ] + [MCell 14 |122|NOD CLK_000_P_SYNC_8_| |*] + [MCell 15 |124| -| | ] +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 0] > Logic Array Fan-in +=========================================================================== + +- Central Switch Matrix No. + | Src (ABEL Node/Pin#) Signal +--|--|--------------------|--------------------------------------------------- +Mux00| Input Pin ( 86)| RST +Mux01| Mcel 3 13 ( 193)| RESET_DLY_1_ +Mux02| Mcel 3 10 ( 188)| CLK_000_N_SYNC_3_ +Mux03| IOPin 5 0 ( 60)| A1 +Mux04| Input Pin ( 64)| CLK_030 +Mux05| ... | ... +Mux06| Mcel 2 7 ( 160)| CLK_000_P_SYNC_3_ +Mux07| Mcel 2 14 ( 170)| CLK_000_P_SYNC_6_ +Mux08| IOPin 3 3 ( 32)| UDS_000 +Mux09| Mcel 0 1 ( 103)| RESET_DLY_5_ +Mux10| ... | ... +Mux11| Mcel 6 4 ( 251)| RN_E +Mux12| Mcel 3 9 ( 187)| RESET_DLY_0_ +Mux13| Mcel 7 8 ( 281)| RN_AS_030 +Mux14| Mcel 2 4 ( 155)| inst_nEXP_SPACE_D0reg +Mux15| Mcel 0 0 ( 101)| RN_DS_030 +Mux16| Mcel 2 8 ( 161)| cpu_est_1_ +Mux17| ... | ... +Mux18| Mcel 0 5 ( 109)| RESET_DLY_4_ +Mux19| Mcel 0 9 ( 115)| RESET_DLY_3_ +Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux21| IOPin 7 5 ( 80)| RW_000 +Mux22| Mcel 0 2 ( 104)| inst_CLK_030_H +Mux23| Mcel 2 12 ( 167)| inst_CLK_000_NE_D0 +Mux24| Mcel 0 12 ( 119)| RESET_DLY_6_ +Mux25| Mcel 0 3 ( 106)| CLK_000_P_SYNC_7_ +Mux26| IOPin 4 1 ( 42)| AS_000 +Mux27| IOPin 3 4 ( 31)| LDS_000 +Mux28| Mcel 0 13 ( 121)| RESET_DLY_2_ +Mux29| ... | ... +Mux30| Mcel 0 8 ( 113)| cpu_est_0_ +Mux31| ... | ... +Mux32| Mcel 6 5 ( 253)| cpu_est_2_ +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 1] > Macrocell (MCell) Cluster Assignments +=========================================================================== + + Macrocell Number + | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size + | Sync/Async-------+ | | | Cluster to Mcell Assignment + | Node Fixed(*)----+ | | | | | +- XOR PT Size + | Sig Type-+ | | | | | | | XOR to Mcell Assignment + | Signal Name | | | | | | | | | +_|_________________|__|__|___|_____|__|______|___|__________|______________ + 0| RESET| IO| | S | 2 | 4 to [ 0]| 1 XOR free + 1| CLK_EXP|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig + 2|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | S | 2 | 4 to [ 2]| 1 XOR free + 3| | ? | | S | | 4 free | 1 XOR free + 4| IPL_030_2_| IO| | S | 2 | 4 to [ 4]| 1 XOR free + 5|inst_LDS_000_INT|NOD| | S | 3 | 4 to [ 5]| 1 XOR free + 6|CLK_000_N_SYNC_11_|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig + 7| | ? | | S | | 4 free | 1 XOR free + 8| IPL_030_0_| IO| | S | 2 | 4 to [ 8]| 1 XOR free + 9| SIZE_DMA_0_|NOD| | S | 2 | 4 to [ 9]| 1 XOR free +10| | ? | | S | | 4 free | 1 XOR free +11| | ? | | S | | 4 free | 1 XOR free +12| IPL_030_1_| IO| | S | 2 | 4 to [12]| 1 XOR free +13|CLK_000_N_SYNC_10_|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig +14| | ? | | S | | 4 free | 1 XOR free +15| | ? | | S | | 4 free | 1 XOR free +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 1] > Maximum PT Capacity +=========================================================================== + + Macrocell Number + | PT Requirements------ Logic XOR+ + | Sync/Async-------+ | | + | Node Fixed(*)----+ | | | + | Sig Type-+ | | | | + | Signal Name | | | | | Maximum PT Capacity +_|_________________|__|__|___|_____|_______________________________________ + 0| RESET| IO| | S | 2 |=> can support up to [ 9] logic PT(s) + 1| CLK_EXP|OUT| | S | 1 |=> can support up to [ 10] logic PT(s) + 2|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | S | 2 |=> can support up to [ 14] logic PT(s) + 3| | ? | | S | |=> can support up to [ 5] logic PT(s) + 4| IPL_030_2_| IO| | S | 2 |=> can support up to [ 14] logic PT(s) + 5|inst_LDS_000_INT|NOD| | S | 3 |=> can support up to [ 14] logic PT(s) + 6|CLK_000_N_SYNC_11_|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) + 7| | ? | | S | |=> can support up to [ 9] logic PT(s) + 8| IPL_030_0_| IO| | S | 2 |=> can support up to [ 15] logic PT(s) + 9| SIZE_DMA_0_|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) +10| | ? | | S | |=> can support up to [ 10] logic PT(s) +11| | ? | | S | |=> can support up to [ 14] logic PT(s) +12| IPL_030_1_| IO| | S | 2 |=> can support up to [ 19] logic PT(s) +13|CLK_000_N_SYNC_10_|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) +14| | ? | | S | |=> can support up to [ 14] logic PT(s) +15| | ? | | S | |=> can support up to [ 10] logic PT(s) +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 1] > Node-Pin Assignments +=========================================================================== + + Macrocell Number + | Node Fixed(*)------+ + | Sig Type---+ | to | Block [ 1] IO Pin | Device Pin + | Signal Name | | pin | Numbers | Numbers +_|_________________|__|_____|____________________|________________________ + 0| RESET| IO| | => | 5 6 ( 7) 0 | 5 4 ( 3) 10 + 1| CLK_EXP|OUT| | => | 5 6 7 ( 0)| 5 4 3 ( 10) + 2|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | => | 6 7 0 1 | 4 3 10 9 + 3| | | | => | 6 7 0 1 | 4 3 10 9 + 4| IPL_030_2_| IO| | => | 7 0 ( 1) 2 | 3 10 ( 9) 8 + 5|inst_LDS_000_INT|NOD| | => | 7 0 1 2 | 3 10 9 8 + 6|CLK_000_N_SYNC_11_|NOD| | => | 0 1 2 3 | 10 9 8 7 + 7| | | | => | 0 1 2 3 | 10 9 8 7 + 8| IPL_030_0_| IO| | => | 1 ( 2) 3 4 | 9 ( 8) 7 6 + 9| SIZE_DMA_0_|NOD| | => | 1 2 3 4 | 9 8 7 6 +10| | | | => | 2 3 4 5 | 8 7 6 5 +11| | | | => | 2 3 4 5 | 8 7 6 5 +12| IPL_030_1_| IO| | => |( 3) 4 5 6 |( 7) 6 5 4 +13|CLK_000_N_SYNC_10_|NOD| | => | 3 4 5 6 | 7 6 5 4 +14| | | | => | 4 5 6 7 | 6 5 4 3 +15| | | | => | 4 5 6 7 | 6 5 4 3 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 1] > IO-to-Node Pin Mapping +=========================================================================== + +- Block IO Pin + | Device Pin No.--------+ + | Pin Fixed(*)----+ | + | Sig Type--+ | | | + | Signal Name | | | | Node Destinations Via Output Matrix +_|_________________|__|___|_____|___________________________________________ + 0| CLK_EXP|OUT|*| 10| => | 0 ( 1) 2 3 4 5 6 7 + 1| IPL_030_2_| IO|*| 9| => | 2 3 ( 4) 5 6 7 8 9 + 2| IPL_030_0_| IO|*| 8| => | 4 5 6 7 ( 8) 9 10 11 + 3| IPL_030_1_| IO|*| 7| => | 6 7 8 9 10 11 (12) 13 + 4| A_29_|INP|*| 6| => | 8 9 10 11 12 13 14 15 + 5| A_30_|INP|*| 5| => | 10 11 12 13 14 15 0 1 + 6| A_31_|INP|*| 4| => | 12 13 14 15 0 1 2 3 + 7| RESET| IO|*| 3| => | 14 15 ( 0) 1 2 3 4 5 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 1] > IO/Node and IO/Input Macrocell Pairing Table +=========================================================================== + +- Block IO Pin + | Device Pin No.--------+ + | Pin Fixed(*)----+ | + | Sig Type--+ | | | + | Signal Name | | | | Input Macrocell and Node Pairs +_|_________________|__|___|_____|__________________________________________ + 0| CLK_EXP|OUT|*| 10| => | Input macrocell [ -] + 1| IPL_030_2_| IO|*| 9| => | Input macrocell [ -] + | | | | | | IO paired w/ node [ RN_IPL_030_2_] + 2| IPL_030_0_| IO|*| 8| => | Input macrocell [ -] + | | | | | | IO paired w/ node [ RN_IPL_030_0_] + 3| IPL_030_1_| IO|*| 7| => | Input macrocell [ -] + | | | | | | IO paired w/ node [ RN_IPL_030_1_] + 4| A_29_|INP|*| 6| => | Input macrocell [ -] + 5| A_30_|INP|*| 5| => | Input macrocell [ -] + 6| A_31_|INP|*| 4| => | Input macrocell [ -] + 7| RESET| IO|*| 3| => | Input macrocell [ -] + | | | | | | IO paired w/ node [ RN_RESET] +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 1] > Input Multiplexer (IMX) Assignments +=========================================================================== + +----- IO pin/Input Register, or Macrocell +IMX No. | +---- Block IO Pin or Macrocell Number + | | | ABEL Node/ +-- Signal using the Pin or Macrocell + | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell + | | | | Sig Type | | +- Feedback Required (*) +---|-------|----|---|---|----------|------|-|------------------------------ + 0 [IOpin 0 | 10|OUT CLK_EXP|*| ] + [RegIn 0 |126| -| | ] + [MCell 0 |125|NOD RN_RESET| |*] paired w/[ RESET] + [MCell 1 |127|OUT CLK_EXP| | ] + + 1 [IOpin 1 | 9| IO IPL_030_2_|*| ] paired w/[ RN_IPL_030_2_] + [RegIn 1 |129| -| | ] + [MCell 2 |128|NOD inst_AMIGA_BUS_ENABLE_DMA_LOW| |*] + [MCell 3 |130| -| | ] + + 2 [IOpin 2 | 8| IO IPL_030_0_|*| ] paired w/[ RN_IPL_030_0_] + [RegIn 2 |132| -| | ] + [MCell 4 |131|NOD RN_IPL_030_2_| |*] paired w/[ IPL_030_2_] + [MCell 5 |133|NOD inst_LDS_000_INT| |*] + + 3 [IOpin 3 | 7| IO IPL_030_1_|*| ] paired w/[ RN_IPL_030_1_] + [RegIn 3 |135| -| | ] + [MCell 6 |134|NOD CLK_000_N_SYNC_11_| |*] + [MCell 7 |136| -| | ] + + 4 [IOpin 4 | 6|INP A_29_|*|*] + [RegIn 4 |138| -| | ] + [MCell 8 |137|NOD RN_IPL_030_0_| |*] paired w/[ IPL_030_0_] + [MCell 9 |139|NOD SIZE_DMA_0_| |*] + + 5 [IOpin 5 | 5|INP A_30_|*|*] + [RegIn 5 |141| -| | ] + [MCell 10 |140| -| | ] + [MCell 11 |142| -| | ] + + 6 [IOpin 6 | 4|INP A_31_|*|*] + [RegIn 6 |144| -| | ] + [MCell 12 |143|NOD RN_IPL_030_1_| |*] paired w/[ IPL_030_1_] + [MCell 13 |145|NOD CLK_000_N_SYNC_10_| |*] + + 7 [IOpin 7 | 3| IO RESET|*| ] paired w/[ RN_RESET] + [RegIn 7 |147| -| | ] + [MCell 14 |146| -| | ] + [MCell 15 |148| -| | ] +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 1] > Logic Array Fan-in +=========================================================================== + +- Central Switch Matrix No. + | Src (ABEL Node/Pin#) Signal +--|--|--------------------|--------------------------------------------------- +Mux00| IOPin 6 2 ( 67)| IPL_0_ +Mux01| Mcel 1 12 ( 143)| RN_IPL_030_1_ +Mux02| IOPin 4 1 ( 42)| AS_000 +Mux03| IOPin 5 4 ( 56)| IPL_1_ +Mux04| Mcel 3 6 ( 182)| inst_DS_030_D0 +Mux05| Mcel 6 6 ( 254)| CLK_000_N_SYNC_9_ +Mux06| IOPin 7 6 ( 79)| SIZE_1_ +Mux07| Mcel 3 9 ( 187)| RESET_DLY_0_ +Mux08| IOPin 3 3 ( 32)| UDS_000 +Mux09| Mcel 0 1 ( 103)| RESET_DLY_5_ +Mux10| Mcel 5 4 ( 227)| SM_AMIGA_6_ +Mux11| IOPin 5 0 ( 60)| A1 +Mux12| Mcel 6 13 ( 265)| CLK_OUT_PRE_Dreg +Mux13| Mcel 0 11 ( 118)| RESET_DLY_7_ +Mux14| IOPin 6 5 ( 70)| SIZE_0_ +Mux15| Mcel 0 12 ( 119)| RESET_DLY_6_ +Mux16| Mcel 4 8 ( 209)| inst_CLK_000_NE +Mux17| Mcel 1 8 ( 137)| RN_IPL_030_0_ +Mux18| IOPin 6 4 ( 69)| A0 +Mux19| Mcel 0 9 ( 115)| RESET_DLY_3_ +Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux21| Mcel 1 13 ( 145)| CLK_000_N_SYNC_10_ +Mux22| IOPin 6 3 ( 68)| IPL_2_ +Mux23| ... | ... +Mux24| Input Pin ( 86)| RST +Mux25| Mcel 0 13 ( 121)| RESET_DLY_2_ +Mux26| Mcel 1 0 ( 125)| RN_RESET +Mux27| IOPin 3 4 ( 31)| LDS_000 +Mux28| Mcel 0 5 ( 109)| RESET_DLY_4_ +Mux29| Mcel 3 13 ( 193)| RESET_DLY_1_ +Mux30| Mcel 1 4 ( 131)| RN_IPL_030_2_ +Mux31| Mcel 1 5 ( 133)| inst_LDS_000_INT +Mux32| ... | ... +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 2] > Macrocell (MCell) Cluster Assignments +=========================================================================== + + Macrocell Number + | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size + | Sync/Async-------+ | | | Cluster to Mcell Assignment + | Node Fixed(*)----+ | | | | | +- XOR PT Size + | Sig Type-+ | | | | | | | XOR to Mcell Assignment + | Signal Name | | | | | | | | | +_|_________________|__|__|___|_____|__|______|___|__________|______________ + 0|AMIGA_BUS_ENABLE_LOW|OUT| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig + 1| SM_AMIGA_3_|NOD| | S | 6 :+: 1| 4 to [ 1]| 1 XOR to [ 1] + 2|state_machine_un15_clk_000_ne_i_n|NOD| | S | 2 | 4 to [ 2]| 1 XOR free + 3|CLK_000_P_SYNC_5_|NOD| | S | 1 | 4 to [ 1]| 1 XOR to [ 3] for 1 PT sig + 4|inst_nEXP_SPACE_D0reg|NOD| | S | 1 | 4 free | 1 XOR to [ 4] for 1 PT sig + 5| SM_AMIGA_2_|NOD| | S | 3 | 4 to [ 5]| 1 XOR free + 6|CLK_000_N_SYNC_6_|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig + 7|CLK_000_P_SYNC_3_|NOD| | S | 1 | 4 free | 1 XOR to [ 7] for 1 PT sig + 8| cpu_est_1_|NOD| | S | 5 | 4 to [ 8]| 1 XOR to [ 8] as logic PT + 9|inst_AS_000_INT|NOD| | S | 2 | 4 to [ 9]| 1 XOR free +10|CLK_000_N_SYNC_1_|NOD| | S | 1 | 4 free | 1 XOR to [10] for 1 PT sig +11|CLK_000_P_SYNC_9_|NOD| | S | 1 | 4 free | 1 XOR to [11] for 1 PT sig +12|inst_CLK_000_NE_D0|NOD| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig +13| inst_VPA_D|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig +14|CLK_000_P_SYNC_6_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig +15| | ? | | S | | 4 free | 1 XOR free +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 2] > Maximum PT Capacity +=========================================================================== + + Macrocell Number + | PT Requirements------ Logic XOR+ + | Sync/Async-------+ | | + | Node Fixed(*)----+ | | | + | Sig Type-+ | | | | + | Signal Name | | | | | Maximum PT Capacity +_|_________________|__|__|___|_____|_______________________________________ + 0|AMIGA_BUS_ENABLE_LOW|OUT| | S | 1 |=> can support up to [ 5] logic PT(s) + 1| SM_AMIGA_3_|NOD| | S | 6 :+: 1|=> can support up to [ 12] logic PT(s) + 2|state_machine_un15_clk_000_ne_i_n|NOD| | S | 2 |=> can support up to [ 9] logic PT(s) + 3|CLK_000_P_SYNC_5_|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) + 4|inst_nEXP_SPACE_D0reg|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) + 5| SM_AMIGA_2_|NOD| | S | 3 |=> can support up to [ 17] logic PT(s) + 6|CLK_000_N_SYNC_6_|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) + 7|CLK_000_P_SYNC_3_|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) + 8| cpu_est_1_|NOD| | S | 5 |=> can support up to [ 13] logic PT(s) + 9|inst_AS_000_INT|NOD| | S | 2 |=> can support up to [ 13] logic PT(s) +10|CLK_000_N_SYNC_1_|NOD| | S | 1 |=> can support up to [ 13] logic PT(s) +11|CLK_000_P_SYNC_9_|NOD| | S | 1 |=> can support up to [ 17] logic PT(s) +12|inst_CLK_000_NE_D0|NOD| | S | 1 |=> can support up to [ 17] logic PT(s) +13| inst_VPA_D|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) +14|CLK_000_P_SYNC_6_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) +15| | ? | | S | |=> can support up to [ 9] logic PT(s) +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 2] > Node-Pin Assignments +=========================================================================== + + Macrocell Number + | Node Fixed(*)------+ + | Sig Type---+ | to | Block [ 2] IO Pin | Device Pin + | Signal Name | | pin | Numbers | Numbers +_|_________________|__|_____|____________________|________________________ + 0|AMIGA_BUS_ENABLE_LOW|OUT| | => |( 5) 6 7 0 |( 20) 21 22 15 + 1| SM_AMIGA_3_|NOD| | => | 5 6 7 0 | 20 21 22 15 + 2|state_machine_un15_clk_000_ne_i_n|NOD| | => | 6 7 0 1 | 21 22 15 16 + 3|CLK_000_P_SYNC_5_|NOD| | => | 6 7 0 1 | 21 22 15 16 + 4|inst_nEXP_SPACE_D0reg|NOD| | => | 7 0 1 2 | 22 15 16 17 + 5| SM_AMIGA_2_|NOD| | => | 7 0 1 2 | 22 15 16 17 + 6|CLK_000_N_SYNC_6_|NOD| | => | 0 1 2 3 | 15 16 17 18 + 7|CLK_000_P_SYNC_3_|NOD| | => | 0 1 2 3 | 15 16 17 18 + 8| cpu_est_1_|NOD| | => | 1 2 3 4 | 16 17 18 19 + 9|inst_AS_000_INT|NOD| | => | 1 2 3 4 | 16 17 18 19 +10|CLK_000_N_SYNC_1_|NOD| | => | 2 3 4 5 | 17 18 19 20 +11|CLK_000_P_SYNC_9_|NOD| | => | 2 3 4 5 | 17 18 19 20 +12|inst_CLK_000_NE_D0|NOD| | => | 3 4 5 6 | 18 19 20 21 +13| inst_VPA_D|NOD| | => | 3 4 5 6 | 18 19 20 21 +14|CLK_000_P_SYNC_6_|NOD| | => | 4 5 6 7 | 19 20 21 22 +15| | | | => | 4 5 6 7 | 19 20 21 22 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 2] > IO-to-Node Pin Mapping +=========================================================================== + +- Block IO Pin + | Device Pin No.--------+ + | Pin Fixed(*)----+ | + | Sig Type--+ | | | + | Signal Name | | | | Node Destinations Via Output Matrix +_|_________________|__|___|_____|___________________________________________ + 0| A_28_|INP|*| 15| => | 0 1 2 3 4 5 6 7 + 1| A_27_|INP|*| 16| => | 2 3 4 5 6 7 8 9 + 2| A_26_|INP|*| 17| => | 4 5 6 7 8 9 10 11 + 3| A_25_|INP|*| 18| => | 6 7 8 9 10 11 12 13 + 4| A_24_|INP|*| 19| => | 8 9 10 11 12 13 14 15 + 5|AMIGA_BUS_ENABLE_LOW|OUT|*| 20| => | 10 11 12 13 14 15 ( 0) 1 + 6| BG_030|INP|*| 21| => | 12 13 14 15 0 1 2 3 + 7| | | | 22| => | 14 15 0 1 2 3 4 5 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 2] > IO/Node and IO/Input Macrocell Pairing Table +=========================================================================== + +- Block IO Pin + | Device Pin No.--------+ + | Pin Fixed(*)----+ | + | Sig Type--+ | | | + | Signal Name | | | | Input Macrocell and Node Pairs +_|_________________|__|___|_____|__________________________________________ + 0| A_28_|INP|*| 15| => | Input macrocell [ -] + 1| A_27_|INP|*| 16| => | Input macrocell [ -] + 2| A_26_|INP|*| 17| => | Input macrocell [ -] + 3| A_25_|INP|*| 18| => | Input macrocell [ -] + 4| A_24_|INP|*| 19| => | Input macrocell [ -] + 5|AMIGA_BUS_ENABLE_LOW|OUT|*| 20| => | Input macrocell [ -] + 6| BG_030|INP|*| 21| => | Input macrocell [ -] + 7| | | | 22| => | Input macrocell [ -] +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 2] > Input Multiplexer (IMX) Assignments +=========================================================================== + +----- IO pin/Input Register, or Macrocell +IMX No. | +---- Block IO Pin or Macrocell Number + | | | ABEL Node/ +-- Signal using the Pin or Macrocell + | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell + | | | | Sig Type | | +- Feedback Required (*) +---|-------|----|---|---|----------|------|-|------------------------------ + 0 [IOpin 0 | 15|INP A_28_|*|*] + [RegIn 0 |150| -| | ] + [MCell 0 |149|OUT AMIGA_BUS_ENABLE_LOW| | ] + [MCell 1 |151|NOD SM_AMIGA_3_| |*] + + 1 [IOpin 1 | 16|INP A_27_|*|*] + [RegIn 1 |153| -| | ] + [MCell 2 |152|NOD state_machine_un15_clk_000_ne_i_n| |*] + [MCell 3 |154|NOD CLK_000_P_SYNC_5_| |*] + + 2 [IOpin 2 | 17|INP A_26_|*|*] + [RegIn 2 |156| -| | ] + [MCell 4 |155|NOD inst_nEXP_SPACE_D0reg| |*] + [MCell 5 |157|NOD SM_AMIGA_2_| |*] + + 3 [IOpin 3 | 18|INP A_25_|*|*] + [RegIn 3 |159| -| | ] + [MCell 6 |158|NOD CLK_000_N_SYNC_6_| |*] + [MCell 7 |160|NOD CLK_000_P_SYNC_3_| |*] + + 4 [IOpin 4 | 19|INP A_24_|*|*] + [RegIn 4 |162| -| | ] + [MCell 8 |161|NOD cpu_est_1_| |*] + [MCell 9 |163|NOD inst_AS_000_INT| |*] + + 5 [IOpin 5 | 20|OUT AMIGA_BUS_ENABLE_LOW|*| ] + [RegIn 5 |165| -| | ] + [MCell 10 |164|NOD CLK_000_N_SYNC_1_| |*] + [MCell 11 |166|NOD CLK_000_P_SYNC_9_| |*] + + 6 [IOpin 6 | 21|INP BG_030|*|*] + [RegIn 6 |168| -| | ] + [MCell 12 |167|NOD inst_CLK_000_NE_D0| |*] + [MCell 13 |169|NOD inst_VPA_D| |*] + + 7 [IOpin 7 | 22| -| | ] + [RegIn 7 |171| -| | ] + [MCell 14 |170|NOD CLK_000_P_SYNC_6_| |*] + [MCell 15 |172| -| | ] +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 2] > Logic Array Fan-in +=========================================================================== + +- Central Switch Matrix No. + | Src (ABEL Node/Pin#) Signal +--|--|--------------------|--------------------------------------------------- +Mux00| Input Pin ( 86)| RST +Mux01| Mcel 0 7 ( 112)| CLK_000_P_SYNC_4_ +Mux02| Mcel 5 8 ( 233)| SM_AMIGA_5_ +Mux03| Mcel 0 14 ( 122)| CLK_000_P_SYNC_8_ +Mux04| Mcel 2 3 ( 154)| CLK_000_P_SYNC_5_ +Mux05| Input Pin ( 14)| nEXP_SPACE +Mux06| ... | ... +Mux07| Mcel 2 5 ( 157)| SM_AMIGA_2_ +Mux08| Mcel 4 8 ( 209)| inst_CLK_000_NE +Mux09| Mcel 6 11 ( 262)| inst_DTACK_D0 +Mux10| Input Pin ( 36)| VPA +Mux11| Mcel 2 13 ( 169)| inst_VPA_D +Mux12| Mcel 6 9 ( 259)| inst_CLK_000_PE +Mux13| Mcel 3 3 ( 178)| CLK_000_P_SYNC_2_ +Mux14| Mcel 5 5 ( 229)| SM_AMIGA_4_ +Mux15| Mcel 2 12 ( 167)| inst_CLK_000_NE_D0 +Mux16| Mcel 2 8 ( 161)| cpu_est_1_ +Mux17| Mcel 3 14 ( 194)| CLK_000_N_SYNC_0_ +Mux18| Mcel 1 2 ( 128)| inst_AMIGA_BUS_ENABLE_DMA_LOW +Mux19| ... | ... +Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux21| Mcel 6 4 ( 251)| RN_E +Mux22| Mcel 2 1 ( 151)| SM_AMIGA_3_ +Mux23| Mcel 2 9 ( 163)| inst_AS_000_INT +Mux24| Mcel 6 3 ( 250)| CLK_000_N_SYNC_5_ +Mux25| IOPin 4 0 ( 41)| BERR +Mux26| Mcel 3 0 ( 173)| RN_VMA +Mux27| Mcel 7 5 ( 277)| inst_AS_030_D0 +Mux28| ... | ... +Mux29| ... | ... +Mux30| Mcel 0 8 ( 113)| cpu_est_0_ +Mux31| ... | ... +Mux32| Mcel 6 5 ( 253)| cpu_est_2_ +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 3] > Macrocell (MCell) Cluster Assignments +=========================================================================== + + Macrocell Number + | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size + | Sync/Async-------+ | | | Cluster to Mcell Assignment + | Node Fixed(*)----+ | | | | | +- XOR PT Size + | Sig Type-+ | | | | | | | XOR to Mcell Assignment + | Signal Name | | | | | | | | | +_|_________________|__|__|___|_____|__|______|___|__________|______________ + 0| VMA| IO| | S | 2 | 4 to [ 0]| 1 XOR free + 1| BG_000| IO| | S | 2 | 4 to [ 1]| 1 XOR free + 2|inst_CLK_000_D1|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig + 3|CLK_000_P_SYNC_2_|NOD| | S | 1 | 4 free | 1 XOR to [ 3] for 1 PT sig + 4|AMIGA_ADDR_ENABLE| IO| | S | 3 | 4 to [ 4]| 1 XOR free + 5|AMIGA_BUS_ENABLE_HIGH|OUT| | S | 2 | 4 to [ 5]| 1 XOR free + 6|inst_DS_030_D0|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig + 7|CLK_000_P_SYNC_0_|NOD| | S | 1 | 4 free | 1 XOR to [ 7] for 1 PT sig + 8| UDS_000| IO| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig + 9| RESET_DLY_0_|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig +10|CLK_000_N_SYNC_3_|NOD| | S | 1 | 4 free | 1 XOR to [10] for 1 PT sig +11| | ? | | S | | 4 free | 1 XOR free +12| LDS_000| IO| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig +13| RESET_DLY_1_|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig +14|CLK_000_N_SYNC_0_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig +15| | ? | | S | | 4 free | 1 XOR free +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 3] > Maximum PT Capacity +=========================================================================== + + Macrocell Number + | PT Requirements------ Logic XOR+ + | Sync/Async-------+ | | + | Node Fixed(*)----+ | | | + | Sig Type-+ | | | | + | Signal Name | | | | | Maximum PT Capacity +_|_________________|__|__|___|_____|_______________________________________ + 0| VMA| IO| | S | 2 |=> can support up to [ 9] logic PT(s) + 1| BG_000| IO| | S | 2 |=> can support up to [ 13] logic PT(s) + 2|inst_CLK_000_D1|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) + 3|CLK_000_P_SYNC_2_|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) + 4|AMIGA_ADDR_ENABLE| IO| | S | 3 |=> can support up to [ 13] logic PT(s) + 5|AMIGA_BUS_ENABLE_HIGH|OUT| | S | 2 |=> can support up to [ 13] logic PT(s) + 6|inst_DS_030_D0|NOD| | S | 1 |=> can support up to [ 13] logic PT(s) + 7|CLK_000_P_SYNC_0_|NOD| | S | 1 |=> can support up to [ 17] logic PT(s) + 8| UDS_000| IO| | S | 1 |=> can support up to [ 17] logic PT(s) + 9| RESET_DLY_0_|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) +10|CLK_000_N_SYNC_3_|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) +11| | ? | | S | |=> can support up to [ 17] logic PT(s) +12| LDS_000| IO| | S | 1 |=> can support up to [ 18] logic PT(s) +13| RESET_DLY_1_|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) +14|CLK_000_N_SYNC_0_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) +15| | ? | | S | |=> can support up to [ 9] logic PT(s) +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 3] > Node-Pin Assignments +=========================================================================== + + Macrocell Number + | Node Fixed(*)------+ + | Sig Type---+ | to | Block [ 3] IO Pin | Device Pin + | Signal Name | | pin | Numbers | Numbers +_|_________________|__|_____|____________________|________________________ + 0| VMA| IO| | => | 5 6 7 ( 0)| 30 29 28 ( 35) + 1| BG_000| IO| | => | 5 ( 6) 7 0 | 30 ( 29) 28 35 + 2|inst_CLK_000_D1|NOD| | => | 6 7 0 1 | 29 28 35 34 + 3|CLK_000_P_SYNC_2_|NOD| | => | 6 7 0 1 | 29 28 35 34 + 4|AMIGA_ADDR_ENABLE| IO| | => | 7 0 1 ( 2)| 28 35 34 ( 33) + 5|AMIGA_BUS_ENABLE_HIGH|OUT| | => | 7 0 ( 1) 2 | 28 35 ( 34) 33 + 6|inst_DS_030_D0|NOD| | => | 0 1 2 3 | 35 34 33 32 + 7|CLK_000_P_SYNC_0_|NOD| | => | 0 1 2 3 | 35 34 33 32 + 8| UDS_000| IO| | => | 1 2 ( 3) 4 | 34 33 ( 32) 31 + 9| RESET_DLY_0_|NOD| | => | 1 2 3 4 | 34 33 32 31 +10|CLK_000_N_SYNC_3_|NOD| | => | 2 3 4 5 | 33 32 31 30 +11| | | | => | 2 3 4 5 | 33 32 31 30 +12| LDS_000| IO| | => | 3 ( 4) 5 6 | 32 ( 31) 30 29 +13| RESET_DLY_1_|NOD| | => | 3 4 5 6 | 32 31 30 29 +14|CLK_000_N_SYNC_0_|NOD| | => | 4 5 6 7 | 31 30 29 28 +15| | | | => | 4 5 6 7 | 31 30 29 28 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 3] > IO-to-Node Pin Mapping +=========================================================================== + +- Block IO Pin + | Device Pin No.--------+ + | Pin Fixed(*)----+ | + | Sig Type--+ | | | + | Signal Name | | | | Node Destinations Via Output Matrix +_|_________________|__|___|_____|___________________________________________ + 0| VMA| IO|*| 35| => | ( 0) 1 2 3 4 5 6 7 + 1|AMIGA_BUS_ENABLE_HIGH|OUT|*| 34| => | 2 3 4 ( 5) 6 7 8 9 + 2|AMIGA_ADDR_ENABLE| IO|*| 33| => | ( 4) 5 6 7 8 9 10 11 + 3| UDS_000| IO|*| 32| => | 6 7 ( 8) 9 10 11 12 13 + 4| LDS_000| IO|*| 31| => | 8 9 10 11 (12) 13 14 15 + 5| DTACK|INP|*| 30| => | 10 11 12 13 14 15 0 1 + 6| BG_000| IO|*| 29| => | 12 13 14 15 0 ( 1) 2 3 + 7| BGACK_000|INP|*| 28| => | 14 15 0 1 2 3 4 5 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 3] > IO/Node and IO/Input Macrocell Pairing Table +=========================================================================== + +- Block IO Pin + | Device Pin No.--------+ + | Pin Fixed(*)----+ | + | Sig Type--+ | | | + | Signal Name | | | | Input Macrocell and Node Pairs +_|_________________|__|___|_____|__________________________________________ + 0| VMA| IO|*| 35| => | Input macrocell [ -] + | | | | | | IO paired w/ node [ RN_VMA] + 1|AMIGA_BUS_ENABLE_HIGH|OUT|*| 34| => | Input macrocell [ -] + 2|AMIGA_ADDR_ENABLE| IO|*| 33| => | Input macrocell [ -] + | | | | | | IO paired w/ node [RN_AMIGA_ADDR_ENABLE] + 3| UDS_000| IO|*| 32| => | Input macrocell [ -] + 4| LDS_000| IO|*| 31| => | Input macrocell [ -] + 5| DTACK|INP|*| 30| => | Input macrocell [ -] + 6| BG_000| IO|*| 29| => | Input macrocell [ -] + | | | | | | IO paired w/ node [ RN_BG_000] + 7| BGACK_000|INP|*| 28| => | Input macrocell [ -] +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 3] > Input Multiplexer (IMX) Assignments +=========================================================================== + +----- IO pin/Input Register, or Macrocell +IMX No. | +---- Block IO Pin or Macrocell Number + | | | ABEL Node/ +-- Signal using the Pin or Macrocell + | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell + | | | | Sig Type | | +- Feedback Required (*) +---|-------|----|---|---|----------|------|-|------------------------------ + 0 [IOpin 0 | 35| IO VMA|*| ] paired w/[ RN_VMA] + [RegIn 0 |174| -| | ] + [MCell 0 |173|NOD RN_VMA| |*] paired w/[ VMA] + [MCell 1 |175|NOD RN_BG_000| |*] paired w/[ BG_000] + + 1 [IOpin 1 | 34|OUT AMIGA_BUS_ENABLE_HIGH|*| ] + [RegIn 1 |177| -| | ] + [MCell 2 |176|NOD inst_CLK_000_D1| |*] + [MCell 3 |178|NOD CLK_000_P_SYNC_2_| |*] + + 2 [IOpin 2 | 33| IO AMIGA_ADDR_ENABLE|*| ] paired w/[RN_AMIGA_ADDR_ENABLE] + [RegIn 2 |180| -| | ] + [MCell 4 |179|NOD RN_AMIGA_ADDR_ENABLE| |*] paired w/[AMIGA_ADDR_ENABLE] + [MCell 5 |181|OUT AMIGA_BUS_ENABLE_HIGH| | ] + + 3 [IOpin 3 | 32| IO UDS_000|*|*] + [RegIn 3 |183| -| | ] + [MCell 6 |182|NOD inst_DS_030_D0| |*] + [MCell 7 |184|NOD CLK_000_P_SYNC_0_| |*] + + 4 [IOpin 4 | 31| IO LDS_000|*|*] + [RegIn 4 |186| -| | ] + [MCell 8 |185| IO UDS_000| | ] + [MCell 9 |187|NOD RESET_DLY_0_| |*] + + 5 [IOpin 5 | 30|INP DTACK|*|*] + [RegIn 5 |189| -| | ] + [MCell 10 |188|NOD CLK_000_N_SYNC_3_| |*] + [MCell 11 |190| -| | ] + + 6 [IOpin 6 | 29| IO BG_000|*| ] paired w/[ RN_BG_000] + [RegIn 6 |192| -| | ] + [MCell 12 |191| IO LDS_000| | ] + [MCell 13 |193|NOD RESET_DLY_1_| |*] + + 7 [IOpin 7 | 28|INP BGACK_000|*|*] + [RegIn 7 |195| -| | ] + [MCell 14 |194|NOD CLK_000_N_SYNC_0_| |*] + [MCell 15 |196| -| | ] +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 3] > Logic Array Fan-in +=========================================================================== + +- Central Switch Matrix No. + | Src (ABEL Node/Pin#) Signal +--|--|--------------------|--------------------------------------------------- +Mux00| Mcel 2 13 ( 169)| inst_VPA_D +Mux01| Mcel 5 12 ( 239)| inst_AS_030_000_SYNC +Mux02| Mcel 6 4 ( 251)| RN_E +Mux03| Mcel 6 5 ( 253)| cpu_est_2_ +Mux04| IOPin 2 6 ( 21)| BG_030 +Mux05| IOPin 0 7 ( 98)| DS_030 +Mux06| Mcel 2 4 ( 155)| inst_nEXP_SPACE_D0reg +Mux07| Mcel 3 9 ( 187)| RESET_DLY_0_ +Mux08| Mcel 4 8 ( 209)| inst_CLK_000_NE +Mux09| ... | ... +Mux10| Mcel 3 4 ( 179)| RN_AMIGA_ADDR_ENABLE +Mux11| Mcel 5 6 ( 230)| CLK_000_P_SYNC_1_ +Mux12| Mcel 6 7 ( 256)| CLK_000_N_SYNC_2_ +Mux13| Mcel 7 5 ( 277)| inst_AS_030_D0 +Mux14| Mcel 7 2 ( 272)| inst_BGACK_030_INT_D +Mux15| Mcel 0 6 ( 110)| inst_AMIGA_BUS_ENABLE_DMA_HIGH +Mux16| Mcel 3 2 ( 176)| inst_CLK_000_D1 +Mux17| Mcel 3 1 ( 175)| RN_BG_000 +Mux18| Mcel 0 8 ( 113)| cpu_est_0_ +Mux19| ... | ... +Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux21| Input Pin ( 86)| RST +Mux22| Mcel 6 10 ( 260)| inst_CLK_000_D0 +Mux23| Mcel 2 12 ( 167)| inst_CLK_000_NE_D0 +Mux24| ... | ... +Mux25| Mcel 5 0 ( 221)| SM_AMIGA_7_ +Mux26| Mcel 3 0 ( 173)| RN_VMA +Mux27| Mcel 6 9 ( 259)| inst_CLK_000_PE +Mux28| Mcel 1 5 ( 133)| inst_LDS_000_INT +Mux29| Mcel 2 8 ( 161)| cpu_est_1_ +Mux30| Mcel 5 1 ( 223)| inst_DS_000_ENABLE +Mux31| Mcel 6 2 ( 248)| inst_UDS_000_INT +Mux32| ... | ... +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 4] > Macrocell (MCell) Cluster Assignments +=========================================================================== + + Macrocell Number + | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size + | Sync/Async-------+ | | | Cluster to Mcell Assignment + | Node Fixed(*)----+ | | | | | +- XOR PT Size + | Sig Type-+ | | | | | | | XOR to Mcell Assignment + | Signal Name | | | | | | | | | +_|_________________|__|__|___|_____|__|______|___|__________|______________ + 0| BERR| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig + 1|AMIGA_BUS_DATA_DIR|OUT| | S | 2 | 4 to [ 1]| 1 XOR free + 2|inst_CLK_OUT_PRE_50|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig + 3| | ? | | S | | 4 free | 1 XOR free + 4| AS_000| IO| | S | 1 | 4 free | 1 XOR to [ 4] for 1 PT sig + 5| CIIN_0|NOD| | S | 2 | 4 to [ 5]| 1 XOR free + 6| | ? | | S | | 4 free | 1 XOR free + 7| | ? | | S | | 4 free | 1 XOR free + 8|inst_CLK_000_NE|NOD| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig + 9| un8_ciin|NOD| | S | 2 | 4 to [ 9]| 1 XOR free +10| | ? | | S | | 4 free | 1 XOR free +11| | ? | | S | | 4 free | 1 XOR free +12| CIIN|OUT| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig +13|inst_CLK_OUT_PRE|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig +14| | ? | | S | | 4 free | 1 XOR free +15| | ? | | S | | 4 free | 1 XOR free +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 4] > Maximum PT Capacity +=========================================================================== + + Macrocell Number + | PT Requirements------ Logic XOR+ + | Sync/Async-------+ | | + | Node Fixed(*)----+ | | | + | Sig Type-+ | | | | + | Signal Name | | | | | Maximum PT Capacity +_|_________________|__|__|___|_____|_______________________________________ + 0| BERR| IO| | S | 1 |=> can support up to [ 9] logic PT(s) + 1|AMIGA_BUS_DATA_DIR|OUT| | S | 2 |=> can support up to [ 18] logic PT(s) + 2|inst_CLK_OUT_PRE_50|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) + 3| | ? | | S | |=> can support up to [ 13] logic PT(s) + 4| AS_000| IO| | S | 1 |=> can support up to [ 15] logic PT(s) + 5| CIIN_0|NOD| | S | 2 |=> can support up to [ 19] logic PT(s) + 6| | ? | | S | |=> can support up to [ 14] logic PT(s) + 7| | ? | | S | |=> can support up to [ 14] logic PT(s) + 8|inst_CLK_000_NE|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) + 9| un8_ciin|NOD| | S | 2 |=> can support up to [ 19] logic PT(s) +10| | ? | | S | |=> can support up to [ 14] logic PT(s) +11| | ? | | S | |=> can support up to [ 18] logic PT(s) +12| CIIN|OUT| | S | 1 |=> can support up to [ 19] logic PT(s) +13|inst_CLK_OUT_PRE|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) +14| | ? | | S | |=> can support up to [ 14] logic PT(s) +15| | ? | | S | |=> can support up to [ 10] logic PT(s) +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 4] > Node-Pin Assignments +=========================================================================== + + Macrocell Number + | Node Fixed(*)------+ + | Sig Type---+ | to | Block [ 4] IO Pin | Device Pin + | Signal Name | | pin | Numbers | Numbers +_|_________________|__|_____|____________________|________________________ + 0| BERR| IO| | => | 5 6 7 ( 0)| 46 47 48 ( 41) + 1|AMIGA_BUS_DATA_DIR|OUT| | => | 5 6 ( 7) 0 | 46 47 ( 48) 41 + 2|inst_CLK_OUT_PRE_50|NOD| | => | 6 7 0 1 | 47 48 41 42 + 3| | | | => | 6 7 0 1 | 47 48 41 42 + 4| AS_000| IO| | => | 7 0 ( 1) 2 | 48 41 ( 42) 43 + 5| CIIN_0|NOD| | => | 7 0 1 2 | 48 41 42 43 + 6| | | | => | 0 1 2 3 | 41 42 43 44 + 7| | | | => | 0 1 2 3 | 41 42 43 44 + 8|inst_CLK_000_NE|NOD| | => | 1 2 3 4 | 42 43 44 45 + 9| un8_ciin|NOD| | => | 1 2 3 4 | 42 43 44 45 +10| | | | => | 2 3 4 5 | 43 44 45 46 +11| | | | => | 2 3 4 5 | 43 44 45 46 +12| CIIN|OUT| | => | 3 4 5 ( 6)| 44 45 46 ( 47) +13|inst_CLK_OUT_PRE|NOD| | => | 3 4 5 6 | 44 45 46 47 +14| | | | => | 4 5 6 7 | 45 46 47 48 +15| | | | => | 4 5 6 7 | 45 46 47 48 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 4] > IO-to-Node Pin Mapping +=========================================================================== + +- Block IO Pin + | Device Pin No.--------+ + | Pin Fixed(*)----+ | + | Sig Type--+ | | | + | Signal Name | | | | Node Destinations Via Output Matrix +_|_________________|__|___|_____|___________________________________________ + 0| BERR| IO|*| 41| => | ( 0) 1 2 3 4 5 6 7 + 1| AS_000| IO|*| 42| => | 2 3 ( 4) 5 6 7 8 9 + 2| | | | 43| => | 4 5 6 7 8 9 10 11 + 3| | | | 44| => | 6 7 8 9 10 11 12 13 + 4| | | | 45| => | 8 9 10 11 12 13 14 15 + 5| | | | 46| => | 10 11 12 13 14 15 0 1 + 6| CIIN|OUT|*| 47| => | (12) 13 14 15 0 1 2 3 + 7|AMIGA_BUS_DATA_DIR|OUT|*| 48| => | 14 15 0 ( 1) 2 3 4 5 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 4] > IO/Node and IO/Input Macrocell Pairing Table +=========================================================================== + +- Block IO Pin + | Device Pin No.--------+ + | Pin Fixed(*)----+ | + | Sig Type--+ | | | + | Signal Name | | | | Input Macrocell and Node Pairs +_|_________________|__|___|_____|__________________________________________ + 0| BERR| IO|*| 41| => | Input macrocell [ -] + 1| AS_000| IO|*| 42| => | Input macrocell [ -] + 2| | | | 43| => | Input macrocell [ -] + 3| | | | 44| => | Input macrocell [ -] + 4| | | | 45| => | Input macrocell [ -] + 5| | | | 46| => | Input macrocell [ -] + 6| CIIN|OUT|*| 47| => | Input macrocell [ -] + 7|AMIGA_BUS_DATA_DIR|OUT|*| 48| => | Input macrocell [ -] +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 4] > Input Multiplexer (IMX) Assignments +=========================================================================== + +----- IO pin/Input Register, or Macrocell +IMX No. | +---- Block IO Pin or Macrocell Number + | | | ABEL Node/ +-- Signal using the Pin or Macrocell + | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell + | | | | Sig Type | | +- Feedback Required (*) +---|-------|----|---|---|----------|------|-|------------------------------ + 0 [IOpin 0 | 41| IO BERR|*|*] + [RegIn 0 |198| -| | ] + [MCell 0 |197| IO BERR| | ] + [MCell 1 |199|OUT AMIGA_BUS_DATA_DIR| | ] + + 1 [IOpin 1 | 42| IO AS_000|*|*] + [RegIn 1 |201| -| | ] + [MCell 2 |200|NOD inst_CLK_OUT_PRE_50| |*] + [MCell 3 |202| -| | ] + + 2 [IOpin 2 | 43| -| | ] + [RegIn 2 |204| -| | ] + [MCell 4 |203| IO AS_000| | ] + [MCell 5 |205|NOD CIIN_0| |*] + + 3 [IOpin 3 | 44| -| | ] + [RegIn 3 |207| -| | ] + [MCell 6 |206| -| | ] + [MCell 7 |208| -| | ] + + 4 [IOpin 4 | 45| -| | ] + [RegIn 4 |210| -| | ] + [MCell 8 |209|NOD inst_CLK_000_NE| |*] + [MCell 9 |211|NOD un8_ciin| |*] + + 5 [IOpin 5 | 46| -| | ] + [RegIn 5 |213| -| | ] + [MCell 10 |212| -| | ] + [MCell 11 |214| -| | ] + + 6 [IOpin 6 | 47|OUT CIIN|*| ] + [RegIn 6 |216| -| | ] + [MCell 12 |215|OUT CIIN| | ] + [MCell 13 |217|NOD inst_CLK_OUT_PRE| |*] + + 7 [IOpin 7 | 48|OUT AMIGA_BUS_DATA_DIR|*| ] + [RegIn 7 |219| -| | ] + [MCell 14 |218| -| | ] + [MCell 15 |220| -| | ] +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 4] > Logic Array Fan-in +=========================================================================== + +- Central Switch Matrix No. + | Src (ABEL Node/Pin#) Signal +--|--|--------------------|--------------------------------------------------- +Mux00| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux01| IOPin 5 2 ( 58)| FC_1_ +Mux02| Mcel 1 6 ( 134)| CLK_000_N_SYNC_11_ +Mux03| IOPin 2 1 ( 16)| A_27_ +Mux04| IOPin 3 7 ( 28)| BGACK_000 +Mux05| IOPin 0 3 ( 94)| A_21_ +Mux06| Mcel 2 4 ( 155)| inst_nEXP_SPACE_D0reg +Mux07| IOPin 2 0 ( 15)| A_28_ +Mux08| IOPin 0 0 ( 91)| FPU_SENSE +Mux09| IOPin 2 2 ( 17)| A_26_ +Mux10| ... | ... +Mux11| IOPin 0 5 ( 96)| A_16_ +Mux12| IOPin 0 6 ( 97)| A_19_ +Mux13| Mcel 7 5 ( 277)| inst_AS_030_D0 +Mux14| IOPin 2 4 ( 19)| A_24_ +Mux15| Mcel 4 2 ( 200)| inst_CLK_OUT_PRE_50 +Mux16| IOPin 4 1 ( 42)| AS_000 +Mux17| IOPin 5 3 ( 57)| FC_0_ +Mux18| IOPin 7 0 ( 85)| A_23_ +Mux19| IOPin 1 5 ( 5)| A_30_ +Mux20| IOPin 7 1 ( 84)| A_22_ +Mux21| IOPin 1 4 ( 6)| A_29_ +Mux22| IOPin 2 3 ( 18)| A_25_ +Mux23| Mcel 2 9 ( 163)| inst_AS_000_INT +Mux24| Mcel 4 9 ( 211)| un8_ciin +Mux25| IOPin 1 6 ( 4)| A_31_ +Mux26| Mcel 4 5 ( 205)| CIIN_0 +Mux27| IOPin 5 1 ( 59)| A_17_ +Mux28| IOPin 7 5 ( 80)| RW_000 +Mux29| IOPin 0 2 ( 93)| A_20_ +Mux30| ... | ... +Mux31| IOPin 0 4 ( 95)| A_18_ +Mux32| IOPin 7 3 ( 82)| AS_030 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 5] > Macrocell (MCell) Cluster Assignments +=========================================================================== + + Macrocell Number + | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size + | Sync/Async-------+ | | | Cluster to Mcell Assignment + | Node Fixed(*)----+ | | | | | +- XOR PT Size + | Sig Type-+ | | | | | | | XOR to Mcell Assignment + | Signal Name | | | | | | | | | +_|_________________|__|__|___|_____|__|______|___|__________|______________ + 0| SM_AMIGA_7_|NOD| | S |13 | 4 to [ 0]| 1 XOR to [ 0] as logic PT + 1|inst_DS_000_ENABLE|NOD| | S | 3 | 4 to [ 0]| 1 XOR free + 2|CLK_000_N_SYNC_7_|NOD| | S | 1 | 4 to [ 0]| 1 XOR to [ 2] for 1 PT sig + 3| | ? | | S | | 4 to [ 1]| 1 XOR free + 4| SM_AMIGA_6_|NOD| | S | 2 | 4 free | 1 XOR free + 5| SM_AMIGA_4_|NOD| | S | 2 | 4 to [ 4]| 1 XOR free + 6|CLK_000_P_SYNC_1_|NOD| | S | 1 | 4 to [ 5]| 1 XOR to [ 6] for 1 PT sig + 7| | ? | | S | | 4 free | 1 XOR free + 8| SM_AMIGA_5_|NOD| | S | 2 | 4 to [ 8]| 1 XOR free + 9| SM_AMIGA_1_|NOD| | S | 2 | 4 to [ 9]| 1 XOR free +10| | ? | | S | | 4 free | 1 XOR free +11| | ? | | S | | 4 free | 1 XOR free +12|inst_AS_030_000_SYNC|NOD| | S | 6 | 4 to [12]| 1 XOR to [12] as logic PT +13| SM_AMIGA_0_|NOD| | S | 2 | 4 to [13]| 1 XOR free +14| | ? | | S | | 4 to [12]| 1 XOR free +15| | ? | | S | | 4 free | 1 XOR free +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 5] > Maximum PT Capacity +=========================================================================== + + Macrocell Number + | PT Requirements------ Logic XOR+ + | Sync/Async-------+ | | + | Node Fixed(*)----+ | | | + | Sig Type-+ | | | | + | Signal Name | | | | | Maximum PT Capacity +_|_________________|__|__|___|_____|_______________________________________ + 0| SM_AMIGA_7_|NOD| | S |13 |=> can support up to [ 14] logic PT(s) + 1|inst_DS_000_ENABLE|NOD| | S | 3 |=> can support up to [ 5] logic PT(s) + 2|CLK_000_N_SYNC_7_|NOD| | S | 1 |=> can support up to [ 6] logic PT(s) + 3| | ? | | S | |=> can support up to [ 6] logic PT(s) + 4| SM_AMIGA_6_|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) + 5| SM_AMIGA_4_|NOD| | S | 2 |=> can support up to [ 14] logic PT(s) + 6|CLK_000_P_SYNC_1_|NOD| | S | 1 |=> can support up to [ 6] logic PT(s) + 7| | ? | | S | |=> can support up to [ 5] logic PT(s) + 8| SM_AMIGA_5_|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) + 9| SM_AMIGA_1_|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) +10| | ? | | S | |=> can support up to [ 10] logic PT(s) +11| | ? | | S | |=> can support up to [ 10] logic PT(s) +12|inst_AS_030_000_SYNC|NOD| | S | 6 |=> can support up to [ 15] logic PT(s) +13| SM_AMIGA_0_|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) +14| | ? | | S | |=> can support up to [ 6] logic PT(s) +15| | ? | | S | |=> can support up to [ 5] logic PT(s) +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 5] > Node-Pin Assignments +=========================================================================== + + Macrocell Number + | Node Fixed(*)------+ + | Sig Type---+ | to | Block [ 5] IO Pin | Device Pin + | Signal Name | | pin | Numbers | Numbers +_|_________________|__|_____|____________________|________________________ + 0| SM_AMIGA_7_|NOD| | => | 5 6 7 0 | 55 54 53 60 + 1|inst_DS_000_ENABLE|NOD| | => | 5 6 7 0 | 55 54 53 60 + 2|CLK_000_N_SYNC_7_|NOD| | => | 6 7 0 1 | 54 53 60 59 + 3| | | | => | 6 7 0 1 | 54 53 60 59 + 4| SM_AMIGA_6_|NOD| | => | 7 0 1 2 | 53 60 59 58 + 5| SM_AMIGA_4_|NOD| | => | 7 0 1 2 | 53 60 59 58 + 6|CLK_000_P_SYNC_1_|NOD| | => | 0 1 2 3 | 60 59 58 57 + 7| | | | => | 0 1 2 3 | 60 59 58 57 + 8| SM_AMIGA_5_|NOD| | => | 1 2 3 4 | 59 58 57 56 + 9| SM_AMIGA_1_|NOD| | => | 1 2 3 4 | 59 58 57 56 +10| | | | => | 2 3 4 5 | 58 57 56 55 +11| | | | => | 2 3 4 5 | 58 57 56 55 +12|inst_AS_030_000_SYNC|NOD| | => | 3 4 5 6 | 57 56 55 54 +13| SM_AMIGA_0_|NOD| | => | 3 4 5 6 | 57 56 55 54 +14| | | | => | 4 5 6 7 | 56 55 54 53 +15| | | | => | 4 5 6 7 | 56 55 54 53 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 5] > IO-to-Node Pin Mapping +=========================================================================== + +- Block IO Pin + | Device Pin No.--------+ + | Pin Fixed(*)----+ | + | Sig Type--+ | | | + | Signal Name | | | | Node Destinations Via Output Matrix +_|_________________|__|___|_____|___________________________________________ + 0| A1|INP|*| 60| => | 0 1 2 3 4 5 6 7 + 1| A_17_|INP|*| 59| => | 2 3 4 5 6 7 8 9 + 2| FC_1_|INP|*| 58| => | 4 5 6 7 8 9 10 11 + 3| FC_0_|INP|*| 57| => | 6 7 8 9 10 11 12 13 + 4| IPL_1_|INP|*| 56| => | 8 9 10 11 12 13 14 15 + 5| | | | 55| => | 10 11 12 13 14 15 0 1 + 6| | | | 54| => | 12 13 14 15 0 1 2 3 + 7| | | | 53| => | 14 15 0 1 2 3 4 5 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 5] > IO/Node and IO/Input Macrocell Pairing Table +=========================================================================== + +- Block IO Pin + | Device Pin No.--------+ + | Pin Fixed(*)----+ | + | Sig Type--+ | | | + | Signal Name | | | | Input Macrocell and Node Pairs +_|_________________|__|___|_____|__________________________________________ + 0| A1|INP|*| 60| => | Input macrocell [ -] + 1| A_17_|INP|*| 59| => | Input macrocell [ -] + 2| FC_1_|INP|*| 58| => | Input macrocell [ -] + 3| FC_0_|INP|*| 57| => | Input macrocell [ -] + 4| IPL_1_|INP|*| 56| => | Input macrocell [ -] + 5| | | | 55| => | Input macrocell [ -] + 6| | | | 54| => | Input macrocell [ -] + 7| | | | 53| => | Input macrocell [ -] +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 5] > Input Multiplexer (IMX) Assignments +=========================================================================== + +----- IO pin/Input Register, or Macrocell +IMX No. | +---- Block IO Pin or Macrocell Number + | | | ABEL Node/ +-- Signal using the Pin or Macrocell + | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell + | | | | Sig Type | | +- Feedback Required (*) +---|-------|----|---|---|----------|------|-|------------------------------ + 0 [IOpin 0 | 60|INP A1|*|*] + [RegIn 0 |222| -| | ] + [MCell 0 |221|NOD SM_AMIGA_7_| |*] + [MCell 1 |223|NOD inst_DS_000_ENABLE| |*] + + 1 [IOpin 1 | 59|INP A_17_|*|*] + [RegIn 1 |225| -| | ] + [MCell 2 |224|NOD CLK_000_N_SYNC_7_| |*] + [MCell 3 |226| -| | ] + + 2 [IOpin 2 | 58|INP FC_1_|*|*] + [RegIn 2 |228| -| | ] + [MCell 4 |227|NOD SM_AMIGA_6_| |*] + [MCell 5 |229|NOD SM_AMIGA_4_| |*] + + 3 [IOpin 3 | 57|INP FC_0_|*|*] + [RegIn 3 |231| -| | ] + [MCell 6 |230|NOD CLK_000_P_SYNC_1_| |*] + [MCell 7 |232| -| | ] + + 4 [IOpin 4 | 56|INP IPL_1_|*|*] + [RegIn 4 |234| -| | ] + [MCell 8 |233|NOD SM_AMIGA_5_| |*] + [MCell 9 |235|NOD SM_AMIGA_1_| |*] + + 5 [IOpin 5 | 55| -| | ] + [RegIn 5 |237| -| | ] + [MCell 10 |236| -| | ] + [MCell 11 |238| -| | ] + + 6 [IOpin 6 | 54| -| | ] + [RegIn 6 |240| -| | ] + [MCell 12 |239|NOD inst_AS_030_000_SYNC| |*] + [MCell 13 |241|NOD SM_AMIGA_0_| |*] + + 7 [IOpin 7 | 53| -| | ] + [RegIn 7 |243| -| | ] + [MCell 14 |242| -| | ] + [MCell 15 |244| -| | ] +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 5] > Logic Array Fan-in +=========================================================================== + +- Central Switch Matrix No. + | Src (ABEL Node/Pin#) Signal +--|--|--------------------|--------------------------------------------------- +Mux00| Input Pin ( 86)| RST +Mux01| IOPin 4 0 ( 41)| BERR +Mux02| Mcel 5 8 ( 233)| SM_AMIGA_5_ +Mux03| Mcel 3 2 ( 176)| inst_CLK_000_D1 +Mux04| IOPin 3 7 ( 28)| BGACK_000 +Mux05| Mcel 6 10 ( 260)| inst_CLK_000_D0 +Mux06| Mcel 2 4 ( 155)| inst_nEXP_SPACE_D0reg +Mux07| Mcel 2 5 ( 157)| SM_AMIGA_2_ +Mux08| Mcel 3 7 ( 184)| CLK_000_P_SYNC_0_ +Mux09| Mcel 2 6 ( 158)| CLK_000_N_SYNC_6_ +Mux10| Mcel 6 9 ( 259)| inst_CLK_000_PE +Mux11| IOPin 6 6 ( 71)| RW +Mux12| IOPin 0 6 ( 97)| A_19_ +Mux13| Mcel 7 5 ( 277)| inst_AS_030_D0 +Mux14| Mcel 5 5 ( 229)| SM_AMIGA_4_ +Mux15| Mcel 5 1 ( 223)| inst_DS_000_ENABLE +Mux16| Mcel 4 8 ( 209)| inst_CLK_000_NE +Mux17| IOPin 0 4 ( 95)| A_18_ +Mux18| Mcel 5 9 ( 235)| SM_AMIGA_1_ +Mux19| ... | ... +Mux20| IOPin 5 2 ( 58)| FC_1_ +Mux21| ... | ... +Mux22| Mcel 5 13 ( 241)| SM_AMIGA_0_ +Mux23| ... | ... +Mux24| IOPin 5 3 ( 57)| FC_0_ +Mux25| Mcel 5 0 ( 221)| SM_AMIGA_7_ +Mux26| IOPin 0 5 ( 96)| A_16_ +Mux27| IOPin 5 1 ( 59)| A_17_ +Mux28| ... | ... +Mux29| Mcel 5 4 ( 227)| SM_AMIGA_6_ +Mux30| Mcel 2 1 ( 151)| SM_AMIGA_3_ +Mux31| Mcel 5 12 ( 239)| inst_AS_030_000_SYNC +Mux32| Mcel 2 2 ( 152)| state_machine_un15_clk_000_ne_i_n +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 6] > Macrocell (MCell) Cluster Assignments +=========================================================================== + + Macrocell Number + | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size + | Sync/Async-------+ | | | Cluster to Mcell Assignment + | Node Fixed(*)----+ | | | | | +- XOR PT Size + | Sig Type-+ | | | | | | | XOR to Mcell Assignment + | Signal Name | | | | | | | | | +_|_________________|__|__|___|_____|__|______|___|__________|______________ + 0| RW| IO| | S | 2 | 4 to [ 0]| 1 XOR free + 1| CLK_DIV_OUT|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig + 2|inst_UDS_000_INT|NOD| | S | 3 | 4 to [ 2]| 1 XOR free + 3|CLK_000_N_SYNC_5_|NOD| | S | 1 | 4 free | 1 XOR to [ 3] for 1 PT sig + 4| E| IO| | S | 5 | 4 to [ 4]| 1 XOR to [ 4] as logic PT + 5| cpu_est_2_|NOD| | S | 4 | 4 to [ 5]| 1 XOR free + 6|CLK_000_N_SYNC_9_|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig + 7|CLK_000_N_SYNC_2_|NOD| | S | 1 | 4 free | 1 XOR to [ 7] for 1 PT sig + 8| A0| IO| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig + 9|inst_CLK_000_PE|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig +10|inst_CLK_000_D0|NOD| | S | 1 | 4 free | 1 XOR to [10] for 1 PT sig +11| inst_DTACK_D0|NOD| | S | 1 | 4 free | 1 XOR to [11] for 1 PT sig +12| SIZE_0_| IO| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig +13|CLK_OUT_PRE_Dreg|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig +14|CLK_000_N_SYNC_8_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig +15| | ? | | S | | 4 free | 1 XOR free +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 6] > Maximum PT Capacity +=========================================================================== + + Macrocell Number + | PT Requirements------ Logic XOR+ + | Sync/Async-------+ | | + | Node Fixed(*)----+ | | | + | Sig Type-+ | | | | + | Signal Name | | | | | Maximum PT Capacity +_|_________________|__|__|___|_____|_______________________________________ + 0| RW| IO| | S | 2 |=> can support up to [ 9] logic PT(s) + 1| CLK_DIV_OUT|OUT| | S | 1 |=> can support up to [ 9] logic PT(s) + 2|inst_UDS_000_INT|NOD| | S | 3 |=> can support up to [ 13] logic PT(s) + 3|CLK_000_N_SYNC_5_|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) + 4| E| IO| | S | 5 |=> can support up to [ 13] logic PT(s) + 5| cpu_est_2_|NOD| | S | 4 |=> can support up to [ 13] logic PT(s) + 6|CLK_000_N_SYNC_9_|NOD| | S | 1 |=> can support up to [ 13] logic PT(s) + 7|CLK_000_N_SYNC_2_|NOD| | S | 1 |=> can support up to [ 17] logic PT(s) + 8| A0| IO| | S | 1 |=> can support up to [ 17] logic PT(s) + 9|inst_CLK_000_PE|NOD| | S | 1 |=> can support up to [ 17] logic PT(s) +10|inst_CLK_000_D0|NOD| | S | 1 |=> can support up to [ 17] logic PT(s) +11| inst_DTACK_D0|NOD| | S | 1 |=> can support up to [ 17] logic PT(s) +12| SIZE_0_| IO| | S | 1 |=> can support up to [ 17] logic PT(s) +13|CLK_OUT_PRE_Dreg|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) +14|CLK_000_N_SYNC_8_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) +15| | ? | | S | |=> can support up to [ 9] logic PT(s) +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 6] > Node-Pin Assignments +=========================================================================== + + Macrocell Number + | Node Fixed(*)------+ + | Sig Type---+ | to | Block [ 6] IO Pin | Device Pin + | Signal Name | | pin | Numbers | Numbers +_|_________________|__|_____|____________________|________________________ + 0| RW| IO| | => | 5 ( 6) 7 0 | 70 ( 71) 72 65 + 1| CLK_DIV_OUT|OUT| | => | 5 6 7 ( 0)| 70 71 72 ( 65) + 2|inst_UDS_000_INT|NOD| | => | 6 7 0 1 | 71 72 65 66 + 3|CLK_000_N_SYNC_5_|NOD| | => | 6 7 0 1 | 71 72 65 66 + 4| E| IO| | => | 7 0 ( 1) 2 | 72 65 ( 66) 67 + 5| cpu_est_2_|NOD| | => | 7 0 1 2 | 72 65 66 67 + 6|CLK_000_N_SYNC_9_|NOD| | => | 0 1 2 3 | 65 66 67 68 + 7|CLK_000_N_SYNC_2_|NOD| | => | 0 1 2 3 | 65 66 67 68 + 8| A0| IO| | => | 1 2 3 ( 4)| 66 67 68 ( 69) + 9|inst_CLK_000_PE|NOD| | => | 1 2 3 4 | 66 67 68 69 +10|inst_CLK_000_D0|NOD| | => | 2 3 4 5 | 67 68 69 70 +11| inst_DTACK_D0|NOD| | => | 2 3 4 5 | 67 68 69 70 +12| SIZE_0_| IO| | => | 3 4 ( 5) 6 | 68 69 ( 70) 71 +13|CLK_OUT_PRE_Dreg|NOD| | => | 3 4 5 6 | 68 69 70 71 +14|CLK_000_N_SYNC_8_|NOD| | => | 4 5 6 7 | 69 70 71 72 +15| | | | => | 4 5 6 7 | 69 70 71 72 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 6] > IO-to-Node Pin Mapping +=========================================================================== + +- Block IO Pin + | Device Pin No.--------+ + | Pin Fixed(*)----+ | + | Sig Type--+ | | | + | Signal Name | | | | Node Destinations Via Output Matrix +_|_________________|__|___|_____|___________________________________________ + 0| CLK_DIV_OUT|OUT|*| 65| => | 0 ( 1) 2 3 4 5 6 7 + 1| E| IO|*| 66| => | 2 3 ( 4) 5 6 7 8 9 + 2| IPL_0_|INP|*| 67| => | 4 5 6 7 8 9 10 11 + 3| IPL_2_|INP|*| 68| => | 6 7 8 9 10 11 12 13 + 4| A0| IO|*| 69| => | ( 8) 9 10 11 12 13 14 15 + 5| SIZE_0_| IO|*| 70| => | 10 11 (12) 13 14 15 0 1 + 6| RW| IO|*| 71| => | 12 13 14 15 ( 0) 1 2 3 + 7| | | | 72| => | 14 15 0 1 2 3 4 5 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 6] > IO/Node and IO/Input Macrocell Pairing Table +=========================================================================== + +- Block IO Pin + | Device Pin No.--------+ + | Pin Fixed(*)----+ | + | Sig Type--+ | | | + | Signal Name | | | | Input Macrocell and Node Pairs +_|_________________|__|___|_____|__________________________________________ + 0| CLK_DIV_OUT|OUT|*| 65| => | Input macrocell [ -] + 1| E| IO|*| 66| => | Input macrocell [ -] + | | | | | | IO paired w/ node [ RN_E] + 2| IPL_0_|INP|*| 67| => | Input macrocell [ -] + 3| IPL_2_|INP|*| 68| => | Input macrocell [ -] + 4| A0| IO|*| 69| => | Input macrocell [ -] + 5| SIZE_0_| IO|*| 70| => | Input macrocell [ -] + 6| RW| IO|*| 71| => | Input macrocell [ -] + 7| | | | 72| => | Input macrocell [ -] +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 6] > Input Multiplexer (IMX) Assignments +=========================================================================== + +----- IO pin/Input Register, or Macrocell +IMX No. | +---- Block IO Pin or Macrocell Number + | | | ABEL Node/ +-- Signal using the Pin or Macrocell + | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell + | | | | Sig Type | | +- Feedback Required (*) +---|-------|----|---|---|----------|------|-|------------------------------ + 0 [IOpin 0 | 65|OUT CLK_DIV_OUT|*| ] + [RegIn 0 |246| -| | ] + [MCell 0 |245| IO RW| | ] + [MCell 1 |247|OUT CLK_DIV_OUT| | ] + + 1 [IOpin 1 | 66| IO E|*| ] paired w/[ RN_E] + [RegIn 1 |249| -| | ] + [MCell 2 |248|NOD inst_UDS_000_INT| |*] + [MCell 3 |250|NOD CLK_000_N_SYNC_5_| |*] + + 2 [IOpin 2 | 67|INP IPL_0_|*|*] + [RegIn 2 |252| -| | ] + [MCell 4 |251|NOD RN_E| |*] paired w/[ E] + [MCell 5 |253|NOD cpu_est_2_| |*] + + 3 [IOpin 3 | 68|INP IPL_2_|*|*] + [RegIn 3 |255| -| | ] + [MCell 6 |254|NOD CLK_000_N_SYNC_9_| |*] + [MCell 7 |256|NOD CLK_000_N_SYNC_2_| |*] + + 4 [IOpin 4 | 69| IO A0|*|*] + [RegIn 4 |258| -| | ] + [MCell 8 |257| IO A0| | ] + [MCell 9 |259|NOD inst_CLK_000_PE| |*] + + 5 [IOpin 5 | 70| IO SIZE_0_|*|*] + [RegIn 5 |261| -| | ] + [MCell 10 |260|NOD inst_CLK_000_D0| |*] + [MCell 11 |262|NOD inst_DTACK_D0| |*] + + 6 [IOpin 6 | 71| IO RW|*|*] + [RegIn 6 |264| -| | ] + [MCell 12 |263| IO SIZE_0_| | ] + [MCell 13 |265|NOD CLK_OUT_PRE_Dreg| |*] + + 7 [IOpin 7 | 72| -| | ] + [RegIn 7 |267| -| | ] + [MCell 14 |266|NOD CLK_000_N_SYNC_8_| |*] + [MCell 15 |268| -| | ] +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 6] > Logic Array Fan-in +=========================================================================== + +- Central Switch Matrix No. + | Src (ABEL Node/Pin#) Signal +--|--|--------------------|--------------------------------------------------- +Mux00| Mcel 2 11 ( 166)| CLK_000_P_SYNC_9_ +Mux01| ... | ... +Mux02| Mcel 6 4 ( 251)| RN_E +Mux03| Mcel 0 8 ( 113)| cpu_est_0_ +Mux04| Mcel 2 12 ( 167)| inst_CLK_000_NE_D0 +Mux05| ... | ... +Mux06| Mcel 1 9 ( 139)| SIZE_DMA_0_ +Mux07| Mcel 2 8 ( 161)| cpu_est_1_ +Mux08| IOPin 3 3 ( 32)| UDS_000 +Mux09| Mcel 5 2 ( 224)| CLK_000_N_SYNC_7_ +Mux10| Mcel 5 4 ( 227)| SM_AMIGA_6_ +Mux11| Mcel 6 14 ( 266)| CLK_000_N_SYNC_8_ +Mux12| Mcel 6 13 ( 265)| CLK_OUT_PRE_Dreg +Mux13| Mcel 4 13 ( 217)| inst_CLK_OUT_PRE +Mux14| Input Pin ( 11)| CLK_000 +Mux15| IOPin 6 4 ( 69)| A0 +Mux16| Mcel 3 6 ( 182)| inst_DS_030_D0 +Mux17| ... | ... +Mux18| Mcel 2 10 ( 164)| CLK_000_N_SYNC_1_ +Mux19| Mcel 7 13 ( 289)| SIZE_DMA_1_ +Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux21| Input Pin ( 86)| RST +Mux22| Mcel 0 10 ( 116)| CLK_000_N_SYNC_4_ +Mux23| IOPin 3 5 ( 30)| DTACK +Mux24| IOPin 3 4 ( 31)| LDS_000 +Mux25| ... | ... +Mux26| IOPin 4 1 ( 42)| AS_000 +Mux27| ... | ... +Mux28| IOPin 7 5 ( 80)| RW_000 +Mux29| Mcel 2 4 ( 155)| inst_nEXP_SPACE_D0reg +Mux30| ... | ... +Mux31| Mcel 6 2 ( 248)| inst_UDS_000_INT +Mux32| Mcel 6 5 ( 253)| cpu_est_2_ +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 7] > Macrocell (MCell) Cluster Assignments +=========================================================================== + + Macrocell Number + | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size + | Sync/Async-------+ | | | Cluster to Mcell Assignment + | Node Fixed(*)----+ | | | | | +- XOR PT Size + | Sig Type-+ | | | | | | | XOR to Mcell Assignment + | Signal Name | | | | | | | | | +_|_________________|__|__|___|_____|__|______|___|__________|______________ + 0| RW_000| IO| | S | 3 | 4 to [ 0]| 1 XOR free + 1| FPU_CS|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig + 2|inst_BGACK_030_INT_D|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig + 3| | ? | | S | | 4 free | 1 XOR free + 4| BGACK_030| IO| | S | 2 | 4 to [ 4]| 1 XOR free + 5|inst_AS_030_D0|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig + 6| | ? | | S | | 4 free | 1 XOR free + 7| | ? | | S | | 4 free | 1 XOR free + 8| AS_030| IO| | S | 4 | 4 to [ 8]| 1 XOR free + 9| DSACK1| IO| | S | 4 | 4 to [ 9]| 1 XOR free +10| | ? | | S | | 4 free | 1 XOR free +11| | ? | | S | | 4 free | 1 XOR free +12| SIZE_1_| IO| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig +13| SIZE_DMA_1_|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig +14| | ? | | S | | 4 free | 1 XOR free +15| | ? | | S | | 4 free | 1 XOR free +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 7] > Maximum PT Capacity +=========================================================================== + + Macrocell Number + | PT Requirements------ Logic XOR+ + | Sync/Async-------+ | | + | Node Fixed(*)----+ | | | + | Sig Type-+ | | | | + | Signal Name | | | | | Maximum PT Capacity +_|_________________|__|__|___|_____|_______________________________________ + 0| RW_000| IO| | S | 3 |=> can support up to [ 13] logic PT(s) + 1| FPU_CS|OUT| | S | 1 |=> can support up to [ 14] logic PT(s) + 2|inst_BGACK_030_INT_D|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) + 3| | ? | | S | |=> can support up to [ 13] logic PT(s) + 4| BGACK_030| IO| | S | 2 |=> can support up to [ 19] logic PT(s) + 5|inst_AS_030_D0|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) + 6| | ? | | S | |=> can support up to [ 14] logic PT(s) + 7| | ? | | S | |=> can support up to [ 10] logic PT(s) + 8| AS_030| IO| | S | 4 |=> can support up to [ 15] logic PT(s) + 9| DSACK1| IO| | S | 4 |=> can support up to [ 15] logic PT(s) +10| | ? | | S | |=> can support up to [ 14] logic PT(s) +11| | ? | | S | |=> can support up to [ 18] logic PT(s) +12| SIZE_1_| IO| | S | 1 |=> can support up to [ 19] logic PT(s) +13| SIZE_DMA_1_|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) +14| | ? | | S | |=> can support up to [ 14] logic PT(s) +15| | ? | | S | |=> can support up to [ 10] logic PT(s) +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 7] > Node-Pin Assignments +=========================================================================== + + Macrocell Number + | Node Fixed(*)------+ + | Sig Type---+ | to | Block [ 7] IO Pin | Device Pin + | Signal Name | | pin | Numbers | Numbers +_|_________________|__|_____|____________________|________________________ + 0| RW_000| IO| | => |( 5) 6 7 0 |( 80) 79 78 85 + 1| FPU_CS|OUT| | => | 5 6 ( 7) 0 | 80 79 ( 78) 85 + 2|inst_BGACK_030_INT_D|NOD| | => | 6 7 0 1 | 79 78 85 84 + 3| | | | => | 6 7 0 1 | 79 78 85 84 + 4| BGACK_030| IO| | => | 7 0 1 ( 2)| 78 85 84 ( 83) + 5|inst_AS_030_D0|NOD| | => | 7 0 1 2 | 78 85 84 83 + 6| | | | => | 0 1 2 3 | 85 84 83 82 + 7| | | | => | 0 1 2 3 | 85 84 83 82 + 8| AS_030| IO| | => | 1 2 ( 3) 4 | 84 83 ( 82) 81 + 9| DSACK1| IO| | => | 1 2 3 ( 4)| 84 83 82 ( 81) +10| | | | => | 2 3 4 5 | 83 82 81 80 +11| | | | => | 2 3 4 5 | 83 82 81 80 +12| SIZE_1_| IO| | => | 3 4 5 ( 6)| 82 81 80 ( 79) +13| SIZE_DMA_1_|NOD| | => | 3 4 5 6 | 82 81 80 79 +14| | | | => | 4 5 6 7 | 81 80 79 78 +15| | | | => | 4 5 6 7 | 81 80 79 78 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 7] > IO-to-Node Pin Mapping +=========================================================================== + +- Block IO Pin + | Device Pin No.--------+ + | Pin Fixed(*)----+ | + | Sig Type--+ | | | + | Signal Name | | | | Node Destinations Via Output Matrix +_|_________________|__|___|_____|___________________________________________ + 0| A_23_|INP|*| 85| => | 0 1 2 3 4 5 6 7 + 1| A_22_|INP|*| 84| => | 2 3 4 5 6 7 8 9 + 2| BGACK_030| IO|*| 83| => | ( 4) 5 6 7 8 9 10 11 + 3| AS_030| IO|*| 82| => | 6 7 ( 8) 9 10 11 12 13 + 4| DSACK1| IO|*| 81| => | 8 ( 9) 10 11 12 13 14 15 + 5| RW_000| IO|*| 80| => | 10 11 12 13 14 15 ( 0) 1 + 6| SIZE_1_| IO|*| 79| => | (12) 13 14 15 0 1 2 3 + 7| FPU_CS|OUT|*| 78| => | 14 15 0 ( 1) 2 3 4 5 +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 7] > IO/Node and IO/Input Macrocell Pairing Table +=========================================================================== + +- Block IO Pin + | Device Pin No.--------+ + | Pin Fixed(*)----+ | + | Sig Type--+ | | | + | Signal Name | | | | Input Macrocell and Node Pairs +_|_________________|__|___|_____|__________________________________________ + 0| A_23_|INP|*| 85| => | Input macrocell [ -] + 1| A_22_|INP|*| 84| => | Input macrocell [ -] + 2| BGACK_030| IO|*| 83| => | Input macrocell [ -] + | | | | | | IO paired w/ node [ RN_BGACK_030] + 3| AS_030| IO|*| 82| => | Input macrocell [ -] + | | | | | | IO paired w/ node [ RN_AS_030] + 4| DSACK1| IO|*| 81| => | Input macrocell [ -] + | | | | | | IO paired w/ node [ RN_DSACK1] + 5| RW_000| IO|*| 80| => | Input macrocell [ -] + | | | | | | IO paired w/ node [ RN_RW_000] + 6| SIZE_1_| IO|*| 79| => | Input macrocell [ -] + 7| FPU_CS|OUT|*| 78| => | Input macrocell [ -] +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 7] > Input Multiplexer (IMX) Assignments +=========================================================================== + +----- IO pin/Input Register, or Macrocell +IMX No. | +---- Block IO Pin or Macrocell Number + | | | ABEL Node/ +-- Signal using the Pin or Macrocell + | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell + | | | | Sig Type | | +- Feedback Required (*) +---|-------|----|---|---|----------|------|-|------------------------------ + 0 [IOpin 0 | 85|INP A_23_|*|*] + [RegIn 0 |270| -| | ] + [MCell 0 |269|NOD RN_RW_000| |*] paired w/[ RW_000] + [MCell 1 |271|OUT FPU_CS| | ] + + 1 [IOpin 1 | 84|INP A_22_|*|*] + [RegIn 1 |273| -| | ] + [MCell 2 |272|NOD inst_BGACK_030_INT_D| |*] + [MCell 3 |274| -| | ] + + 2 [IOpin 2 | 83| IO BGACK_030|*| ] paired w/[ RN_BGACK_030] + [RegIn 2 |276| -| | ] + [MCell 4 |275|NOD RN_BGACK_030| |*] paired w/[ BGACK_030] + [MCell 5 |277|NOD inst_AS_030_D0| |*] + + 3 [IOpin 3 | 82| IO AS_030|*|*] paired w/[ RN_AS_030] + [RegIn 3 |279| -| | ] + [MCell 6 |278| -| | ] + [MCell 7 |280| -| | ] + + 4 [IOpin 4 | 81| IO DSACK1|*| ] paired w/[ RN_DSACK1] + [RegIn 4 |282| -| | ] + [MCell 8 |281|NOD RN_AS_030| |*] paired w/[ AS_030] + [MCell 9 |283|NOD RN_DSACK1| |*] paired w/[ DSACK1] + + 5 [IOpin 5 | 80| IO RW_000|*|*] paired w/[ RN_RW_000] + [RegIn 5 |285| -| | ] + [MCell 10 |284| -| | ] + [MCell 11 |286| -| | ] + + 6 [IOpin 6 | 79| IO SIZE_1_|*|*] + [RegIn 6 |288| -| | ] + [MCell 12 |287| IO SIZE_1_| | ] + [MCell 13 |289|NOD SIZE_DMA_1_| |*] + + 7 [IOpin 7 | 78|OUT FPU_CS|*| ] + [RegIn 7 |291| -| | ] + [MCell 14 |290| -| | ] + [MCell 15 |292| -| | ] +--------------------------------------------------------------------------- +=========================================================================== + < Block [ 7] > Logic Array Fan-in +=========================================================================== + +- Central Switch Matrix No. + | Src (ABEL Node/Pin#) Signal +--|--|--------------------|--------------------------------------------------- +Mux00| IOPin 3 4 ( 31)| LDS_000 +Mux01| IOPin 5 2 ( 58)| FC_1_ +Mux02| Mcel 5 8 ( 233)| SM_AMIGA_5_ +Mux03| Mcel 7 8 ( 281)| RN_AS_030 +Mux04| IOPin 0 4 ( 95)| A_18_ +Mux05| Mcel 7 9 ( 283)| RN_DSACK1 +Mux06| IOPin 0 5 ( 96)| A_16_ +Mux07| Mcel 7 13 ( 289)| SIZE_DMA_1_ +Mux08| IOPin 3 3 ( 32)| UDS_000 +Mux09| Mcel 6 13 ( 265)| CLK_OUT_PRE_Dreg +Mux10| Mcel 6 9 ( 259)| inst_CLK_000_PE +Mux11| IOPin 0 0 ( 91)| FPU_SENSE +Mux12| IOPin 0 6 ( 97)| A_19_ +Mux13| Mcel 7 5 ( 277)| inst_AS_030_D0 +Mux14| Mcel 2 4 ( 155)| inst_nEXP_SPACE_D0reg +Mux15| Mcel 5 13 ( 241)| SM_AMIGA_0_ +Mux16| Mcel 1 9 ( 139)| SIZE_DMA_0_ +Mux17| IOPin 4 0 ( 41)| BERR +Mux18| IOPin 3 7 ( 28)| BGACK_000 +Mux19| IOPin 7 3 ( 82)| AS_030 +Mux20| Input Pin ( 64)| CLK_030 +Mux21| Input Pin ( 86)| RST +Mux22| ... | ... +Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux24| IOPin 5 3 ( 57)| FC_0_ +Mux25| IOPin 6 6 ( 71)| RW +Mux26| IOPin 4 1 ( 42)| AS_000 +Mux27| IOPin 5 1 ( 59)| A_17_ +Mux28| Mcel 1 13 ( 145)| CLK_000_N_SYNC_10_ +Mux29| Mcel 6 6 ( 254)| CLK_000_N_SYNC_9_ +Mux30| Mcel 7 0 ( 269)| RN_RW_000 +Mux31| Mcel 5 0 ( 221)| SM_AMIGA_7_ +Mux32| Mcel 5 9 ( 235)| SM_AMIGA_1_ +--------------------------------------------------------------------------- \ No newline at end of file diff --git a/Logic/68030_tk.rpt b/Logic/68030_tk.rpt new file mode 100644 index 0000000..c7210a9 --- /dev/null +++ b/Logic/68030_tk.rpt @@ -0,0 +1,1932 @@ +|--------------------------------------------| +|- ispLEVER Fitter Report File -| +|- Version 1.7.00.05.28.13 -| +|- (c)Copyright, Lattice Semiconductor 2002 -| +|--------------------------------------------| + + + + +Project_Summary +~~~~~~~~~~~~~~~ + +Project Name : 68030_tk +Project Path : C:\Users\Matze\Documents\GitHub\68030tk\Logic +Project Fitted on : Sun Feb 01 21:36:55 2015 + +Device : M4A5-128/64 +Package : 100TQFP +Speed : -10 +Partnumber : M4A5-128/64-10VC +Source Format : Pure_VHDL + + +// Project '68030_tk' was Fitted Successfully! // + + +Compilation_Times +~~~~~~~~~~~~~~~~~ +Reading/DRC 0 sec +Partition 0 sec +Place 0 sec +Route 0 sec +Jedec/Report generation 0 sec + -------- +Fitter 00:00:00 + + +Design_Summary +~~~~~~~~~~~~~~ + Total Input Pins : 32 + Total Output Pins : 18 + Total Bidir I/O Pins : 11 + Total Flip-Flops : 80 + Total Product Terms : 179 + Total Reserved Pins : 0 + Total Reserved Blocks : 0 + + +Device_Resource_Summary +~~~~~~~~~~~~~~~~~~~~~~~ + Total + Available Used Available Utilization +Dedicated Pins + Input-Only Pins 2 2 0 --> 100% + Clock/Input Pins 4 4 0 --> 100% +I/O Pins 64 55 9 --> 85% +Logic Macrocells 128 97 31 --> 75% + Input Registers 64 0 64 --> 0% + Unusable Macrocells .. 0 .. + +CSM Outputs/Total Block Inputs 264 235 29 --> 89% +Logical Product Terms 640 180 460 --> 28% +Product Term Clusters 128 44 84 --> 34% + + +Blocks_Resource_Summary +~~~~~~~~~~~~~~~~~~~~~~~ + # of PT + I/O Inp Macrocells Macrocells logic clusters + Fanin Pins Reg Used Unusable available PTs available Pwr +--------------------------------------------------------------------------------- +Maximum 33 8 8 -- -- 16 80 16 - +--------------------------------------------------------------------------------- +Block A 28 8 0 15 0 1 25 11 Lo +Block B 31 8 0 10 0 6 18 9 Lo +Block C 28 7 0 15 0 1 29 10 Lo +Block D 29 8 0 14 0 2 19 12 Lo +Block E 31 4 0 9 0 7 12 13 Lo +Block F 29 5 0 10 0 6 34 5 Lo +Block G 27 7 0 15 0 1 25 12 Lo +Block H 32 8 0 9 0 7 18 12 Lo +--------------------------------------------------------------------------------- + + Four rightmost columns above reflect last status of the placement process. + Pwr (Power) : Hi = High + Lo = Low. + + +Optimizer_and_Fitter_Options +~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +Pin Assignment : Yes +Group Assignment : No +Pin Reservation : No (1) +Block Reservation : No + +@Ignore_Project_Constraints : + Pin Assignments : No + Keep Block Assignment -- + Keep Segment Assignment -- + Group Assignments : No + Macrocell Assignment : No + Keep Block Assignment -- + Keep Segment Assignment -- + +@Backannotate_Project_Constraints + Pin Assignments : No + Pin And Block Assignments : No + Pin, Macrocell and Block : No + +@Timing_Constraints : No + +@Global_Project_Optimization : + Balanced Partitioning : Yes + Spread Placement : Yes + + Note : + Pack Design : + Balanced Partitioning = No + Spread Placement = No + Spread Design : + Balanced Partitioning = Yes + Spread Placement = Yes + +@Logic_Synthesis : + Logic Reduction : Yes + Node Collapsing : Yes + D/T Synthesis : Yes + Clock Optimization : No + Input Register Optimization : Yes + XOR Synthesis : Yes + Max. P-Term for Collapsing : 16 + Max. P-Term for Splitting : 16 + Max. Equation Fanin : 32 + Keep Xor : Yes + +@Utilization_options + Max. % of macrocells used : 100 + Max. % of block inputs used : 100 + Max. % of segment lines used : --- + Max. % of macrocells used : --- + + +@Import_Source_Constraint_Option No + +@Zero_Hold_Time Yes + +@Pull_up Yes + +@User_Signature #H0 + +@Output_Slew_Rate Default = Slow(2) + +@Power Default = High(2) + + +Device Options: + 1 : Reserved unused I/Os can be independently driven to Low or High, and does not + follow the drive level set for the Global Configure Unused I/O Option. + 2 : For user-specified constraints on individual signals, refer to the Output, + Bidir and Burried Signal Lists. + + + + +Pinout_Listing +~~~~~~~~~~~~~~ + | Pin |Blk |Assigned| +Pin No| Type |Pad |Pin | Signal name +--------------------------------------------------------------- + 1 | GND | | | + 2 | JTAG | | | + 3 | I_O | B7 | * |RESET +4 | I_O | B6 | * |A_31_ +5 | I_O | B5 | * |A_30_ +6 | I_O | B4 | * |A_29_ +7 | I_O | B3 | * |IPL_030_1_ +8 | I_O | B2 | * |IPL_030_0_ +9 | I_O | B1 | * |IPL_030_2_ +10 | I_O | B0 | * |CLK_EXP +11 | CkIn | | * |CLK_000 +12 | Vcc | | | +13 | GND | | | +14 | CkIn | | * |nEXP_SPACE +15 | I_O | C0 | * |A_28_ +16 | I_O | C1 | * |A_27_ +17 | I_O | C2 | * |A_26_ +18 | I_O | C3 | * |A_25_ +19 | I_O | C4 | * |A_24_ +20 | I_O | C5 | * |AMIGA_BUS_ENABLE_LOW +21 | I_O | C6 | * |BG_030 +22 | I_O | C7 | | +23 | JTAG | | | +24 | JTAG | | | +25 | GND | | | +26 | GND | | | +27 | GND | | | +28 | I_O | D7 | * |BGACK_000 +29 | I_O | D6 | * |BG_000 +30 | I_O | D5 | * |DTACK +31 | I_O | D4 | * |LDS_000 +32 | I_O | D3 | * |UDS_000 +33 | I_O | D2 | * |AMIGA_ADDR_ENABLE +34 | I_O | D1 | * |AMIGA_BUS_ENABLE_HIGH +35 | I_O | D0 | * |VMA +36 | Inp | | * |VPA +37 | Vcc | | | +38 | GND | | | +39 | GND | | | +40 | Vcc | | | +41 | I_O | E0 | * |BERR +42 | I_O | E1 | * |AS_000 +43 | I_O | E2 | | +44 | I_O | E3 | | +45 | I_O | E4 | | +46 | I_O | E5 | | +47 | I_O | E6 | * |CIIN +48 | I_O | E7 | * |AMIGA_BUS_DATA_DIR +49 | GND | | | +50 | GND | | | +51 | GND | | | +52 | JTAG | | | +53 | I_O | F7 | | +54 | I_O | F6 | | +55 | I_O | F5 | | +56 | I_O | F4 | * |IPL_1_ +57 | I_O | F3 | * |FC_0_ +58 | I_O | F2 | * |FC_1_ +59 | I_O | F1 | * |A_17_ +60 | I_O | F0 | * |A1 +61 | CkIn | | * |CLK_OSZI +62 | Vcc | | | +63 | GND | | | +64 | CkIn | | * |CLK_030 +65 | I_O | G0 | * |CLK_DIV_OUT +66 | I_O | G1 | * |E +67 | I_O | G2 | * |IPL_0_ +68 | I_O | G3 | * |IPL_2_ +69 | I_O | G4 | * |A0 +70 | I_O | G5 | * |SIZE_0_ +71 | I_O | G6 | * |RW +72 | I_O | G7 | | +73 | JTAG | | | +74 | JTAG | | | +75 | GND | | | +76 | GND | | | +77 | GND | | | +78 | I_O | H7 | * |FPU_CS +79 | I_O | H6 | * |SIZE_1_ +80 | I_O | H5 | * |RW_000 +81 | I_O | H4 | * |DSACK1 +82 | I_O | H3 | * |AS_030 +83 | I_O | H2 | * |BGACK_030 +84 | I_O | H1 | * |A_22_ +85 | I_O | H0 | * |A_23_ +86 | Inp | | * |RST +87 | Vcc | | | +88 | GND | | | +89 | GND | | | +90 | Vcc | | | +91 | I_O | A0 | * |FPU_SENSE +92 | I_O | A1 | * |AVEC +93 | I_O | A2 | * |A_20_ +94 | I_O | A3 | * |A_21_ +95 | I_O | A4 | * |A_18_ +96 | I_O | A5 | * |A_16_ +97 | I_O | A6 | * |A_19_ +98 | I_O | A7 | * |DS_030 +99 | GND | | | +100 | GND | | | + +--------------------------------------------------------------------------- + + Blk Pad : This notation refers to the Block I/O pad number in the device. + Assigned Pin : user or dedicated input assignment (E.g. Clock pins). + Pin Type : + CkIn : Dedicated input or clock pin + CLK : Dedicated clock pin + INP : Dedicated input pin + JTAG : JTAG Control and test pin + NC : No connected + + + +Input_Signal_List +~~~~~~~~~~~~~~~~~ + P R + Pin r e O Input +Pin Blk PTs Type e s E Fanout Pwr Slew Signal +---------------------------------------------------------------------- + 60 F . I/O AB------ Low Slow A1 + 96 A . I/O ----EF-H Low Slow A_16_ + 59 F . I/O ----EF-H Low Slow A_17_ + 95 A . I/O ----EF-H Low Slow A_18_ + 97 A . I/O ----EF-H Low Slow A_19_ + 93 A . I/O ----E--- Low Slow A_20_ + 94 A . I/O ----E--- Low Slow A_21_ + 84 H . I/O ----E--- Low Slow A_22_ + 85 H . I/O ----E--- Low Slow A_23_ + 19 C . I/O ----E--- Low Slow A_24_ + 18 C . I/O ----E--- Low Slow A_25_ + 17 C . I/O ----E--- Low Slow A_26_ + 16 C . I/O ----E--- Low Slow A_27_ + 15 C . I/O ----E--- Low Slow A_28_ + 6 B . I/O ----E--- Low Slow A_29_ + 5 B . I/O ----E--- Low Slow A_30_ + 4 B . I/O ----E--- Low Slow A_31_ + 28 D . I/O ----EF-H Low Slow BGACK_000 + 21 C . I/O ---D---- Low Slow BG_030 + 30 D . I/O ------G- Low Slow DTACK + 57 F . I/O ----EF-H Low Slow FC_0_ + 58 F . I/O ----EF-H Low Slow FC_1_ + 91 A . I/O ----E--H Low Slow FPU_SENSE + 67 G . I/O -B------ Low Slow IPL_0_ + 56 F . I/O -B------ Low Slow IPL_1_ + 68 G . I/O -B------ Low Slow IPL_2_ + 11 . . Ck/I ------G- - Slow CLK_000 + 14 . . Ck/I --C----- - Slow nEXP_SPACE + 36 . . Ded --C----- - Slow VPA + 61 . . Ck/I ABCDEFGH - Slow CLK_OSZI + 64 . . Ck/I A------H - Slow CLK_030 + 86 . . Ded ABCD-FGH - Slow RST +---------------------------------------------------------------------- + + Power : Hi = High + MH = Medium High + ML = Medium Low + Lo = Low + + + +Output_Signal_List +~~~~~~~~~~~~~~~~~~ + P R + Pin r e O Output +Pin Blk PTs Type e s E Fanout Pwr Slew Signal +---------------------------------------------------------------------- + 33 D 3 DFF * -------- Low Fast AMIGA_ADDR_ENABLE + 48 E 2 COM -------- Low Fast AMIGA_BUS_DATA_DIR + 34 D 2 COM -------- Low Fast AMIGA_BUS_ENABLE_HIGH + 20 C 1 COM -------- Low Fast AMIGA_BUS_ENABLE_LOW + 92 A 1 COM -------- Low Slow AVEC + 83 H 2 DFF * -------- Low Slow BGACK_030 + 29 D 2 DFF * -------- Low Slow BG_000 + 47 E 1 COM -------- Low Slow CIIN + 65 G 1 COM -------- Low Fast CLK_DIV_OUT + 10 B 1 COM -------- Low Fast CLK_EXP + 81 H 4 DFF * -------- Low Slow DSACK1 + 66 G 5 DFF -------- Low Slow E + 78 H 1 COM -------- Low Fast FPU_CS + 8 B 2 DFF * -------- Low Slow IPL_030_0_ + 7 B 2 DFF * -------- Low Slow IPL_030_1_ + 9 B 2 DFF * -------- Low Slow IPL_030_2_ + 3 B 2 DFF * -------- Low Slow RESET + 35 D 2 TFF * -------- Low Slow VMA +---------------------------------------------------------------------- + + Power : Hi = High + MH = Medium High + ML = Medium Low + Lo = Low + + + +Bidir_Signal_List +~~~~~~~~~~~~~~~~~ + P R + Pin r e O Bidir +Pin Blk PTs Type e s E Fanout Pwr Slew Signal +---------------------------------------------------------------------- + 69 G 1 DFF * -B----G- Low Slow A0 + 42 E 1 COM AB--E-GH Low Slow AS_000 + 82 H 4 DFF * ----E--H Low Slow AS_030 + 41 E 1 COM --C--F-H Low Slow BERR + 98 A 6 DFF * ---D---- Low Slow DS_030 + 31 D 1 COM AB----GH Low Slow LDS_000 + 71 G 2 DFF * -----F-H Low Slow RW + 80 H 3 DFF * A---E-G- Low Slow RW_000 + 70 G 1 COM -B------ Low Slow SIZE_0_ + 79 H 1 COM -B------ Low Slow SIZE_1_ + 32 D 1 COM AB----GH Low Slow UDS_000 +---------------------------------------------------------------------- + + Power : Hi = High + MH = Medium High + ML = Medium Low + Lo = Low + + + +Buried_Signal_List +~~~~~~~~~~~~~~~~~~ + P R + Pin r e O Node +#Mc Blk PTs Type e s E Fanout Pwr Slew Signal +---------------------------------------------------------------------- + E5 E 2 COM ----E--- Low Slow CIIN_0 + D14 D 1 DFF --C----- Low Slow CLK_000_N_SYNC_0_ + B13 B 1 DFF -B-----H Low Slow CLK_000_N_SYNC_10_ + B6 B 1 DFF ----E--- Low Slow CLK_000_N_SYNC_11_ + C10 C 1 DFF ------G- Low Slow CLK_000_N_SYNC_1_ + G7 G 1 DFF ---D---- Low Slow CLK_000_N_SYNC_2_ + D10 D 1 DFF A------- Low Slow CLK_000_N_SYNC_3_ + A10 A 1 DFF ------G- Low Slow CLK_000_N_SYNC_4_ + G3 G 1 DFF --C----- Low Slow CLK_000_N_SYNC_5_ + C6 C 1 DFF -----F-- Low Slow CLK_000_N_SYNC_6_ + F2 F 1 DFF ------G- Low Slow CLK_000_N_SYNC_7_ + G14 G 1 DFF ------G- Low Slow CLK_000_N_SYNC_8_ + G6 G 1 DFF -B-----H Low Slow CLK_000_N_SYNC_9_ + D7 D 1 DFF -----F-- Low Slow CLK_000_P_SYNC_0_ + F6 F 1 DFF ---D---- Low Slow CLK_000_P_SYNC_1_ + D3 D 1 DFF --C----- Low Slow CLK_000_P_SYNC_2_ + C7 C 1 DFF A------- Low Slow CLK_000_P_SYNC_3_ + A7 A 1 DFF --C----- Low Slow CLK_000_P_SYNC_4_ + C3 C 1 DFF --C----- Low Slow CLK_000_P_SYNC_5_ + C14 C 1 DFF A------- Low Slow CLK_000_P_SYNC_6_ + A3 A 1 DFF A------- Low Slow CLK_000_P_SYNC_7_ + A14 A 1 DFF --C----- Low Slow CLK_000_P_SYNC_8_ + C11 C 1 DFF ------G- Low Slow CLK_000_P_SYNC_9_ + G13 G 1 DFF -B----GH Low Slow CLK_OUT_PRE_Dreg + D9 D 1 TFF * AB-D---- Low Slow RESET_DLY_0_ + D13 D 1 TFF * AB------ Low Slow RESET_DLY_1_ + A13 A 1 TFF * AB------ Low Slow RESET_DLY_2_ + A9 A 1 TFF * AB------ Low Slow RESET_DLY_3_ + A5 A 1 TFF * AB------ Low Slow RESET_DLY_4_ + A1 A 1 TFF * AB------ Low Slow RESET_DLY_5_ + A12 A 1 TFF * AB------ Low Slow RESET_DLY_6_ + A11 A 1 TFF * -B------ Low Slow RESET_DLY_7_ + D4 D 3 DFF * ---D---- Low - RN_AMIGA_ADDR_ENABLE --> AMIGA_ADDR_ENABLE + H8 H 4 DFF * A------H Low - RN_AS_030 --> AS_030 + H4 H 2 DFF * ABCDE-GH Low - RN_BGACK_030 --> BGACK_030 + D1 D 2 DFF * ---D---- Low - RN_BG_000 --> BG_000 + H9 H 4 DFF * -------H Low - RN_DSACK1 --> DSACK1 + A0 A 6 DFF * A------- Low - RN_DS_030 --> DS_030 + G4 G 5 DFF A-CD--G- Low - RN_E --> E + B8 B 2 DFF * -B------ Low - RN_IPL_030_0_ --> IPL_030_0_ + B12 B 2 DFF * -B------ Low - RN_IPL_030_1_ --> IPL_030_1_ + B4 B 2 DFF * -B------ Low - RN_IPL_030_2_ --> IPL_030_2_ + B0 B 2 DFF * -B------ Low - RN_RESET --> RESET + H0 H 3 DFF * -------H Low - RN_RW_000 --> RW_000 + D0 D 2 TFF * --CD---- Low - RN_VMA --> VMA + B9 B 2 DFF * ------GH Low Slow SIZE_DMA_0_ + H13 H 1 DFF * ------GH Low Slow SIZE_DMA_1_ + F13 F 2 DFF * -----F-H Low Slow SM_AMIGA_0_ + F9 F 2 DFF * -----F-H Low Slow SM_AMIGA_1_ + C5 C 3 DFF * --C--F-- Low Slow SM_AMIGA_2_ + C1 C 6 DFF * --C--F-- Low Slow SM_AMIGA_3_ + F5 F 2 DFF * --C--F-- Low Slow SM_AMIGA_4_ + F8 F 2 DFF * --C--F-H Low Slow SM_AMIGA_5_ + F4 F 2 DFF * -B---FG- Low Slow SM_AMIGA_6_ + F0 F 13 DFF * ---D-F-H Low Slow SM_AMIGA_7_ + A8 A 2 DFF A-CD--G- Low Slow cpu_est_0_ + C8 C 5 DFF A-CD--G- Low Slow cpu_est_1_ + G5 G 4 DFF A-CD--G- Low Slow cpu_est_2_ + A6 A 2 DFF * ---D---- Low Slow inst_AMIGA_BUS_ENABLE_DMA_HIGH + B2 B 2 DFF * --C----- Low Slow inst_AMIGA_BUS_ENABLE_DMA_LOW + C9 C 2 DFF * --C-E--- Low Slow inst_AS_000_INT + F12 F 6 DFF * ---D-F-- Low Slow inst_AS_030_000_SYNC + H5 H 1 DFF * --CDEF-H Low Slow inst_AS_030_D0 + H2 H 1 DFF * ---D---- Low Slow inst_BGACK_030_INT_D + G10 G 1 DFF ---D-F-- Low Slow inst_CLK_000_D0 + D2 D 1 DFF ---D-F-- Low Slow inst_CLK_000_D1 + E8 E 1 DFF -BCD-F-- Low Slow inst_CLK_000_NE + C12 C 1 DFF A-CD--G- Low Slow inst_CLK_000_NE_D0 + G9 G 1 DFF --CD-F-H Low Slow inst_CLK_000_PE + A2 A 4 DFF * A------- Low Slow inst_CLK_030_H + E13 E 1 DFF ------G- Low Slow inst_CLK_OUT_PRE + E2 E 1 DFF ----E--- Low Slow inst_CLK_OUT_PRE_50 + F1 F 3 DFF * ---D-F-- Low Slow inst_DS_000_ENABLE + D6 D 1 DFF * -B----G- Low Slow inst_DS_030_D0 + G11 G 1 DFF * --C----- Low Slow inst_DTACK_D0 + B5 B 3 DFF * -B-D---- Low Slow inst_LDS_000_INT + G2 G 3 DFF * ---D--G- Low Slow inst_UDS_000_INT + C13 C 1 DFF * --CD---- Low Slow inst_VPA_D + C4 C 1 DFF * A--DEFGH Low Slow inst_nEXP_SPACE_D0reg + C2 C 2 COM -----F-- Low Slow state_machine_un15_clk_000_ne_i_n + E9 E 2 COM ----E--- Low Slow un8_ciin +---------------------------------------------------------------------- + + Power : Hi = High + MH = Medium High + ML = Medium Low + Lo = Low + + + + +Signals_Fanout_List +~~~~~~~~~~~~~~~~~~~ +Signal Source : Fanout List +----------------------------------------------------------------------------- + A_23_{ I}: CIIN{ E} CIIN_0{ E} + A_22_{ I}: CIIN{ E} CIIN_0{ E} + SIZE_1_{ I}:inst_LDS_000_INT{ B} + A_21_{ B}: CIIN{ E} CIIN_0{ E} + A_20_{ B}: CIIN{ E} CIIN_0{ E} + A_31_{ C}: CIIN{ E} un8_ciin{ E} CIIN_0{ E} + A_19_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} + A_18_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} + A_17_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} + A_16_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} + IPL_2_{ H}: IPL_030_2_{ B} + FC_1_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} + IPL_1_{ G}: IPL_030_1_{ B} + IPL_0_{ H}: IPL_030_0_{ B} + AS_000{ F}:AMIGA_BUS_DATA_DIR{ E} AS_030{ H} DS_030{ A} + : A0{ G} RW{ G}inst_AMIGA_BUS_ENABLE_DMA_LOW{ B} + : SIZE_DMA_0_{ B} SIZE_DMA_1_{ H}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ A} + : inst_CLK_030_H{ A} + FC_0_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} + UDS_000{ E}: AS_030{ H} DS_030{ A} A0{ G} + : RW{ G}inst_AMIGA_BUS_ENABLE_DMA_LOW{ B} SIZE_DMA_0_{ B} + : SIZE_DMA_1_{ H}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ A} inst_CLK_030_H{ A} + LDS_000{ E}: AS_030{ H} DS_030{ A} A0{ G} + : RW{ G}inst_AMIGA_BUS_ENABLE_DMA_LOW{ B} SIZE_DMA_0_{ B} + : SIZE_DMA_1_{ H}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ A} inst_CLK_030_H{ A} + A1{ G}:inst_AMIGA_BUS_ENABLE_DMA_LOW{ B}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ A} + nEXP_SPACE{. }:inst_nEXP_SPACE_D0reg{ C} + BERR{ F}: RW_000{ H} DSACK1{ H}inst_AS_000_INT{ C} + :inst_AS_030_000_SYNC{ F} SM_AMIGA_7_{ F} SM_AMIGA_5_{ F} + : SM_AMIGA_3_{ C} SM_AMIGA_0_{ F} SM_AMIGA_6_{ F} + :inst_DS_000_ENABLE{ F} SM_AMIGA_1_{ F} SM_AMIGA_4_{ F} + : SM_AMIGA_2_{ C} + BG_030{ D}: BG_000{ D} + BGACK_000{ E}: BERR{ E} FPU_CS{ H} BGACK_030{ H} + :inst_AS_030_000_SYNC{ F} + CLK_030{. }: AS_030{ H} DS_030{ A} DSACK1{ H} + : inst_CLK_030_H{ A} + CLK_000{. }:inst_CLK_000_D0{ G} + FPU_SENSE{ B}: BERR{ E} FPU_CS{ H} + DTACK{ E}: inst_DTACK_D0{ G} + VPA{. }: inst_VPA_D{ C} + RST{. }: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} + : AS_030{ H} RW_000{ H} DS_030{ A} + : A0{ G} BG_000{ D} BGACK_030{ H} + : DSACK1{ H} VMA{ D} RESET{ B} + : RW{ G}AMIGA_ADDR_ENABLE{ D}inst_AS_000_INT{ C} + :inst_AMIGA_BUS_ENABLE_DMA_LOW{ B} inst_AS_030_D0{ H}inst_nEXP_SPACE_D0reg{ C} + : inst_DS_030_D0{ D}inst_AS_030_000_SYNC{ F}inst_BGACK_030_INT_D{ H} + : SIZE_DMA_0_{ B} SIZE_DMA_1_{ H} inst_VPA_D{ C} + :inst_UDS_000_INT{ G}inst_LDS_000_INT{ B} inst_DTACK_D0{ G} + : SM_AMIGA_7_{ F} SM_AMIGA_5_{ F} SM_AMIGA_3_{ C} + : SM_AMIGA_0_{ F}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ A} SM_AMIGA_6_{ F} + : RESET_DLY_0_{ D} RESET_DLY_1_{ D} RESET_DLY_2_{ A} + : RESET_DLY_3_{ A} RESET_DLY_4_{ A} RESET_DLY_5_{ A} + : RESET_DLY_6_{ A} RESET_DLY_7_{ A} inst_CLK_030_H{ A} + :inst_DS_000_ENABLE{ F} SM_AMIGA_1_{ F} SM_AMIGA_4_{ F} + : SM_AMIGA_2_{ C} + SIZE_0_{ H}:inst_LDS_000_INT{ B} + A_30_{ C}: CIIN{ E} un8_ciin{ E} CIIN_0{ E} + A_29_{ C}: CIIN{ E} un8_ciin{ E} CIIN_0{ E} + A_28_{ D}: CIIN{ E} un8_ciin{ E} CIIN_0{ E} + A_27_{ D}: CIIN{ E} un8_ciin{ E} CIIN_0{ E} + A_26_{ D}: CIIN{ E} un8_ciin{ E} CIIN_0{ E} + A_25_{ D}: CIIN{ E} un8_ciin{ E} CIIN_0{ E} + A_24_{ D}: CIIN{ E} un8_ciin{ E} CIIN_0{ E} +RN_IPL_030_2_{ C}: IPL_030_2_{ B} +RN_IPL_030_1_{ C}: IPL_030_1_{ B} +RN_IPL_030_0_{ C}: IPL_030_0_{ B} + AS_030{ I}: AS_000{ E} BERR{ E} FPU_CS{ H} + : inst_AS_030_D0{ H} un8_ciin{ E} + RN_AS_030{ I}: AS_030{ H} DS_030{ A} inst_CLK_030_H{ A} + RW_000{ I}:AMIGA_BUS_DATA_DIR{ E} DS_030{ A} RW{ G} + RN_RW_000{ I}: RW_000{ H} + DS_030{ B}: UDS_000{ D} LDS_000{ D} inst_DS_030_D0{ D} + RN_DS_030{ B}: DS_030{ A} + A0{ H}:inst_UDS_000_INT{ G}inst_LDS_000_INT{ B} + RN_BG_000{ E}: BG_000{ D} +RN_BGACK_030{ I}: SIZE_1_{ H} AS_000{ E} UDS_000{ D} + : LDS_000{ D}AMIGA_BUS_DATA_DIR{ E}AMIGA_BUS_ENABLE_LOW{ C} + :AMIGA_BUS_ENABLE_HIGH{ D} SIZE_0_{ G} AS_030{ H} + : RW_000{ H} DS_030{ A} A0{ G} + : BGACK_030{ H} RW{ G}AMIGA_ADDR_ENABLE{ D} + :inst_AMIGA_BUS_ENABLE_DMA_LOW{ B}inst_BGACK_030_INT_D{ H} SIZE_DMA_0_{ B} + : SIZE_DMA_1_{ H}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ A} inst_CLK_030_H{ A} + RN_DSACK1{ I}: DSACK1{ H} + RN_E{ H}: E{ G} VMA{ D} cpu_est_1_{ C} + : cpu_est_2_{ G} SM_AMIGA_3_{ C} RESET_DLY_0_{ D} + : RESET_DLY_1_{ D} RESET_DLY_2_{ A} RESET_DLY_3_{ A} + : RESET_DLY_4_{ A} RESET_DLY_5_{ A} RESET_DLY_6_{ A} + : RESET_DLY_7_{ A} SM_AMIGA_2_{ C}state_machine_un15_clk_000_ne_i_n{ C} + RN_VMA{ E}: VMA{ D} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} + :state_machine_un15_clk_000_ne_i_n{ C} + RN_RESET{ C}: RESET{ B} + RW{ H}: RW_000{ H}inst_DS_000_ENABLE{ F} +RN_AMIGA_ADDR_ENABLE{ E}:AMIGA_ADDR_ENABLE{ D} + cpu_est_0_{ B}: E{ G} VMA{ D} cpu_est_0_{ A} + : cpu_est_1_{ C} cpu_est_2_{ G} SM_AMIGA_3_{ C} + : RESET_DLY_0_{ D} RESET_DLY_1_{ D} RESET_DLY_2_{ A} + : RESET_DLY_3_{ A} RESET_DLY_4_{ A} RESET_DLY_5_{ A} + : RESET_DLY_6_{ A} RESET_DLY_7_{ A} SM_AMIGA_2_{ C} + :state_machine_un15_clk_000_ne_i_n{ C} + cpu_est_1_{ D}: E{ G} VMA{ D} cpu_est_1_{ C} + : cpu_est_2_{ G} SM_AMIGA_3_{ C} RESET_DLY_0_{ D} + : RESET_DLY_1_{ D} RESET_DLY_2_{ A} RESET_DLY_3_{ A} + : RESET_DLY_4_{ A} RESET_DLY_5_{ A} RESET_DLY_6_{ A} + : RESET_DLY_7_{ A} SM_AMIGA_2_{ C}state_machine_un15_clk_000_ne_i_n{ C} +inst_AS_000_INT{ D}: AS_000{ E}inst_AS_000_INT{ C} +inst_AMIGA_BUS_ENABLE_DMA_LOW{ C}:AMIGA_BUS_ENABLE_LOW{ C} +inst_AS_030_D0{ I}: CIIN{ E} RW_000{ H} BG_000{ D} + : DSACK1{ H}inst_AS_000_INT{ C}inst_AS_030_000_SYNC{ F} + :inst_DS_000_ENABLE{ F} CIIN_0{ E} +inst_nEXP_SPACE_D0reg{ D}: SIZE_1_{ H}AMIGA_BUS_DATA_DIR{ E} SIZE_0_{ G} + : AS_030{ H} DS_030{ A} A0{ G} + : BG_000{ D} DSACK1{ H}AMIGA_ADDR_ENABLE{ D} + :inst_AS_030_000_SYNC{ F} SM_AMIGA_7_{ F} SM_AMIGA_6_{ F} + : CIIN_0{ E} +inst_DS_030_D0{ E}:inst_UDS_000_INT{ G}inst_LDS_000_INT{ B} +inst_AS_030_000_SYNC{ G}:AMIGA_ADDR_ENABLE{ D}inst_AS_030_000_SYNC{ F} SM_AMIGA_7_{ F} + : SM_AMIGA_6_{ F} +inst_BGACK_030_INT_D{ I}:AMIGA_ADDR_ENABLE{ D} +SIZE_DMA_0_{ C}: SIZE_1_{ H} SIZE_0_{ G} +SIZE_DMA_1_{ I}: SIZE_1_{ H} SIZE_0_{ G} + inst_VPA_D{ D}: VMA{ D} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} + :state_machine_un15_clk_000_ne_i_n{ C} +inst_UDS_000_INT{ H}: UDS_000{ D}inst_UDS_000_INT{ G} +inst_LDS_000_INT{ C}: LDS_000{ D}inst_LDS_000_INT{ B} +inst_DTACK_D0{ H}: SM_AMIGA_3_{ C} SM_AMIGA_2_{ C}state_machine_un15_clk_000_ne_i_n{ C} +inst_CLK_OUT_PRE_50{ F}:inst_CLK_OUT_PRE_50{ E}inst_CLK_OUT_PRE{ E} +inst_CLK_000_D1{ E}:AMIGA_ADDR_ENABLE{ D} SM_AMIGA_7_{ F} SM_AMIGA_6_{ F} + :CLK_000_P_SYNC_0_{ D}CLK_000_N_SYNC_0_{ D} +inst_CLK_000_D0{ H}: BG_000{ D}AMIGA_ADDR_ENABLE{ D}inst_CLK_000_D1{ D} + : SM_AMIGA_7_{ F} SM_AMIGA_6_{ F}CLK_000_P_SYNC_0_{ D} + :CLK_000_N_SYNC_0_{ D} +inst_CLK_000_PE{ H}: RW_000{ H} BGACK_030{ H} VMA{ D} + : SM_AMIGA_7_{ F} SM_AMIGA_5_{ F} SM_AMIGA_3_{ C} + : SM_AMIGA_0_{ F} SM_AMIGA_6_{ F} SM_AMIGA_1_{ F} + : SM_AMIGA_4_{ F} SM_AMIGA_2_{ C} +SM_AMIGA_7_{ G}:AMIGA_BUS_ENABLE_HIGH{ D} RW_000{ H}AMIGA_ADDR_ENABLE{ D} + :inst_AS_030_000_SYNC{ F} SM_AMIGA_6_{ F} +SM_AMIGA_5_{ G}: RW_000{ H}inst_AS_000_INT{ C} SM_AMIGA_7_{ F} + : SM_AMIGA_5_{ F}inst_DS_000_ENABLE{ F} SM_AMIGA_4_{ F} +inst_CLK_OUT_PRE{ F}:CLK_OUT_PRE_Dreg{ G} +inst_CLK_000_NE{ F}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} + : VMA{ D} SM_AMIGA_7_{ F} SM_AMIGA_5_{ F} + :inst_CLK_000_NE_D0{ C} SM_AMIGA_3_{ C} SM_AMIGA_0_{ F} + : SM_AMIGA_1_{ F} SM_AMIGA_4_{ F} SM_AMIGA_2_{ C} +CLK_000_N_SYNC_11_{ C}:inst_CLK_000_NE{ E} +CLK_000_P_SYNC_9_{ D}:inst_CLK_000_PE{ G} + cpu_est_2_{ H}: E{ G} VMA{ D} cpu_est_1_{ C} + : cpu_est_2_{ G} SM_AMIGA_3_{ C} RESET_DLY_0_{ D} + : RESET_DLY_1_{ D} RESET_DLY_2_{ A} RESET_DLY_3_{ A} + : RESET_DLY_4_{ A} RESET_DLY_5_{ A} RESET_DLY_6_{ A} + : RESET_DLY_7_{ A} SM_AMIGA_2_{ C}state_machine_un15_clk_000_ne_i_n{ C} +inst_CLK_000_NE_D0{ D}: E{ G} cpu_est_0_{ A} cpu_est_1_{ C} + : cpu_est_2_{ G} RESET_DLY_0_{ D} RESET_DLY_1_{ D} + : RESET_DLY_2_{ A} RESET_DLY_3_{ A} RESET_DLY_4_{ A} + : RESET_DLY_5_{ A} RESET_DLY_6_{ A} RESET_DLY_7_{ A} +SM_AMIGA_3_{ D}: SM_AMIGA_7_{ F} SM_AMIGA_3_{ C}inst_DS_000_ENABLE{ F} + : SM_AMIGA_2_{ C} +SM_AMIGA_0_{ G}: RW_000{ H} SM_AMIGA_7_{ F} SM_AMIGA_0_{ F} +inst_AMIGA_BUS_ENABLE_DMA_HIGH{ B}:AMIGA_BUS_ENABLE_HIGH{ D} +SM_AMIGA_6_{ G}:inst_UDS_000_INT{ G}inst_LDS_000_INT{ B} SM_AMIGA_7_{ F} + : SM_AMIGA_5_{ F} SM_AMIGA_6_{ F} +RESET_DLY_0_{ E}: RESET{ B} RESET_DLY_1_{ D} RESET_DLY_2_{ A} + : RESET_DLY_3_{ A} RESET_DLY_4_{ A} RESET_DLY_5_{ A} + : RESET_DLY_6_{ A} RESET_DLY_7_{ A} +RESET_DLY_1_{ E}: RESET{ B} RESET_DLY_2_{ A} RESET_DLY_3_{ A} + : RESET_DLY_4_{ A} RESET_DLY_5_{ A} RESET_DLY_6_{ A} + : RESET_DLY_7_{ A} +RESET_DLY_2_{ B}: RESET{ B} RESET_DLY_3_{ A} RESET_DLY_4_{ A} + : RESET_DLY_5_{ A} RESET_DLY_6_{ A} RESET_DLY_7_{ A} +RESET_DLY_3_{ B}: RESET{ B} RESET_DLY_4_{ A} RESET_DLY_5_{ A} + : RESET_DLY_6_{ A} RESET_DLY_7_{ A} +RESET_DLY_4_{ B}: RESET{ B} RESET_DLY_5_{ A} RESET_DLY_6_{ A} + : RESET_DLY_7_{ A} +RESET_DLY_5_{ B}: RESET{ B} RESET_DLY_6_{ A} RESET_DLY_7_{ A} +RESET_DLY_6_{ B}: RESET{ B} RESET_DLY_7_{ A} +RESET_DLY_7_{ B}: RESET{ B} +CLK_000_P_SYNC_0_{ E}:CLK_000_P_SYNC_1_{ F} +CLK_000_P_SYNC_1_{ G}:CLK_000_P_SYNC_2_{ D} +CLK_000_P_SYNC_2_{ E}:CLK_000_P_SYNC_3_{ C} +CLK_000_P_SYNC_3_{ D}:CLK_000_P_SYNC_4_{ A} +CLK_000_P_SYNC_4_{ B}:CLK_000_P_SYNC_5_{ C} +CLK_000_P_SYNC_5_{ D}:CLK_000_P_SYNC_6_{ C} +CLK_000_P_SYNC_6_{ D}:CLK_000_P_SYNC_7_{ A} +CLK_000_P_SYNC_7_{ B}:CLK_000_P_SYNC_8_{ A} +CLK_000_P_SYNC_8_{ B}:CLK_000_P_SYNC_9_{ C} +CLK_000_N_SYNC_0_{ E}:CLK_000_N_SYNC_1_{ C} +CLK_000_N_SYNC_1_{ D}:CLK_000_N_SYNC_2_{ G} +CLK_000_N_SYNC_2_{ H}:CLK_000_N_SYNC_3_{ D} +CLK_000_N_SYNC_3_{ E}:CLK_000_N_SYNC_4_{ A} +CLK_000_N_SYNC_4_{ B}:CLK_000_N_SYNC_5_{ G} +CLK_000_N_SYNC_5_{ H}:CLK_000_N_SYNC_6_{ C} +CLK_000_N_SYNC_6_{ D}:CLK_000_N_SYNC_7_{ F} +CLK_000_N_SYNC_7_{ G}:CLK_000_N_SYNC_8_{ G} +CLK_000_N_SYNC_8_{ H}:CLK_000_N_SYNC_9_{ G} +CLK_000_N_SYNC_9_{ H}: DSACK1{ H}CLK_000_N_SYNC_10_{ B} +CLK_000_N_SYNC_10_{ C}: DSACK1{ H}CLK_000_N_SYNC_11_{ B} +inst_CLK_030_H{ B}: DS_030{ A} inst_CLK_030_H{ A} +inst_DS_000_ENABLE{ G}: UDS_000{ D} LDS_000{ D}inst_DS_000_ENABLE{ F} +SM_AMIGA_1_{ G}: DSACK1{ H} SM_AMIGA_7_{ F} SM_AMIGA_0_{ F} + : SM_AMIGA_1_{ F} +SM_AMIGA_4_{ G}: SM_AMIGA_7_{ F} SM_AMIGA_3_{ C} SM_AMIGA_4_{ F} +SM_AMIGA_2_{ D}: SM_AMIGA_7_{ F} SM_AMIGA_1_{ F} SM_AMIGA_2_{ C} +CLK_OUT_PRE_Dreg{ H}: CLK_DIV_OUT{ G} CLK_EXP{ B} DSACK1{ H} + un8_ciin{ F}: CIIN_0{ E} +state_machine_un15_clk_000_ne_i_n{ D}: SM_AMIGA_7_{ F} + CIIN_0{ F}: CIIN{ E} +----------------------------------------------------------------------------- + + {.} : Indicates block location of signal + + +Set_Reset_Summary +~~~~~~~~~~~~~~~~~ + +Block A +block level set pt : !RST +block level reset pt : +Equations : +| | |Block|Block| Signal +| Reg |Mode |Set |Reset| Name ++-----+-----+-----+-----+------------------------ +| * | S | BS | BR | DS_030 +| | | | | AVEC +| * | S | BR | BR | cpu_est_0_ +| * | S | BR | BS | RESET_DLY_6_ +| * | S | BR | BS | RESET_DLY_5_ +| * | S | BR | BS | RESET_DLY_4_ +| * | S | BR | BS | RESET_DLY_3_ +| * | S | BR | BS | RESET_DLY_2_ +| * | S | BS | BR | RN_DS_030 +| * | S | BR | BS | inst_CLK_030_H +| * | S | BS | BR | inst_AMIGA_BUS_ENABLE_DMA_HIGH +| * | S | BR | BR | CLK_000_N_SYNC_4_ +| * | S | BR | BR | CLK_000_P_SYNC_8_ +| * | S | BR | BR | CLK_000_P_SYNC_7_ +| * | S | BR | BR | CLK_000_P_SYNC_4_ +| * | S | BR | BS | RESET_DLY_7_ +| | | | | A_19_ +| | | | | A_16_ +| | | | | A_18_ +| | | | | FPU_SENSE +| | | | | A_21_ +| | | | | A_20_ + + +Block B +block level set pt : +block level reset pt : !RST +Equations : +| | |Block|Block| Signal +| Reg |Mode |Set |Reset| Name ++-----+-----+-----+-----+------------------------ +| * | S | BR | BS | IPL_030_2_ +| * | S | BR | BS | IPL_030_0_ +| * | S | BR | BS | IPL_030_1_ +| * | S | BS | BR | RESET +| | | | | CLK_EXP +| * | S | BR | BS | inst_LDS_000_INT +| * | S | BR | BS | SIZE_DMA_0_ +| * | S | BS | BS | CLK_000_N_SYNC_10_ +| * | S | BS | BR | RN_RESET +| * | S | BR | BS | RN_IPL_030_0_ +| * | S | BR | BS | RN_IPL_030_1_ +| * | S | BR | BS | RN_IPL_030_2_ +| * | S | BR | BS | inst_AMIGA_BUS_ENABLE_DMA_LOW +| * | S | BS | BS | CLK_000_N_SYNC_11_ +| | | | | A_29_ +| | | | | A_30_ +| | | | | A_31_ + + +Block C +block level set pt : +block level reset pt : !RST +Equations : +| | |Block|Block| Signal +| Reg |Mode |Set |Reset| Name ++-----+-----+-----+-----+------------------------ +| | | | | AMIGA_BUS_ENABLE_LOW +| * | S | BR | BS | inst_nEXP_SPACE_D0reg +| * | S | BS | BS | cpu_est_1_ +| * | S | BS | BS | inst_CLK_000_NE_D0 +| * | S | BS | BR | SM_AMIGA_3_ +| * | S | BS | BR | SM_AMIGA_2_ +| * | S | BR | BS | inst_AS_000_INT +| * | S | BR | BS | inst_VPA_D +| | | | | state_machine_un15_clk_000_ne_i_n +| * | S | BS | BS | CLK_000_N_SYNC_6_ +| * | S | BS | BS | CLK_000_N_SYNC_1_ +| * | S | BS | BS | CLK_000_P_SYNC_6_ +| * | S | BS | BS | CLK_000_P_SYNC_5_ +| * | S | BS | BS | CLK_000_P_SYNC_3_ +| * | S | BS | BS | CLK_000_P_SYNC_9_ +| | | | | BG_030 +| | | | | A_24_ +| | | | | A_25_ +| | | | | A_26_ +| | | | | A_27_ +| | | | | A_28_ + + +Block D +block level set pt : !RST +block level reset pt : +Equations : +| | |Block|Block| Signal +| Reg |Mode |Set |Reset| Name ++-----+-----+-----+-----+------------------------ +| | | | | UDS_000 +| | | | | LDS_000 +| * | S | BS | BR | AMIGA_ADDR_ENABLE +| * | S | BS | BR | VMA +| | | | | AMIGA_BUS_ENABLE_HIGH +| * | S | BS | BR | BG_000 +| * | S | BR | BS | RESET_DLY_0_ +| * | S | BS | BR | RN_VMA +| * | S | BR | BS | RESET_DLY_1_ +| * | S | BR | BR | inst_CLK_000_D1 +| * | S | BS | BR | inst_DS_030_D0 +| * | S | BS | BR | RN_AMIGA_ADDR_ENABLE +| * | S | BS | BR | RN_BG_000 +| * | S | BR | BR | CLK_000_N_SYNC_3_ +| * | S | BR | BR | CLK_000_N_SYNC_0_ +| * | S | BR | BR | CLK_000_P_SYNC_2_ +| * | S | BR | BR | CLK_000_P_SYNC_0_ +| | | | | BGACK_000 +| | | | | DTACK + + +Block E +block level set pt : +block level reset pt : +Equations : +| | |Block|Block| Signal +| Reg |Mode |Set |Reset| Name ++-----+-----+-----+-----+------------------------ +| | | | | AS_000 +| | | | | BERR +| | | | | AMIGA_BUS_DATA_DIR +| | | | | CIIN +| * | S | BS | BR | inst_CLK_000_NE +| | | | | CIIN_0 +| | | | | un8_ciin +| * | S | BS | BR | inst_CLK_OUT_PRE +| * | S | BS | BR | inst_CLK_OUT_PRE_50 + + +Block F +block level set pt : !RST +block level reset pt : +Equations : +| | |Block|Block| Signal +| Reg |Mode |Set |Reset| Name ++-----+-----+-----+-----+------------------------ +| * | S | BS | BR | SM_AMIGA_7_ +| * | S | BR | BS | SM_AMIGA_6_ +| * | S | BR | BS | SM_AMIGA_5_ +| * | S | BS | BR | inst_AS_030_000_SYNC +| * | S | BR | BS | inst_DS_000_ENABLE +| * | S | BR | BS | SM_AMIGA_4_ +| * | S | BR | BS | SM_AMIGA_1_ +| * | S | BR | BS | SM_AMIGA_0_ +| * | S | BR | BR | CLK_000_N_SYNC_7_ +| * | S | BR | BR | CLK_000_P_SYNC_1_ +| | | | | A_17_ +| | | | | FC_1_ +| | | | | FC_0_ +| | | | | A1 +| | | | | IPL_1_ + + +Block G +block level set pt : !RST +block level reset pt : +Equations : +| | |Block|Block| Signal +| Reg |Mode |Set |Reset| Name ++-----+-----+-----+-----+------------------------ +| * | S | BS | BR | RW +| * | S | BS | BR | A0 +| | | | | SIZE_0_ +| * | S | BR | BR | E +| | | | | CLK_DIV_OUT +| * | S | BR | BR | RN_E +| * | S | BR | BR | cpu_est_2_ +| * | S | BR | BR | inst_CLK_000_PE +| * | S | BR | BR | CLK_OUT_PRE_Dreg +| * | S | BS | BR | inst_UDS_000_INT +| * | S | BR | BR | CLK_000_N_SYNC_9_ +| * | S | BR | BR | inst_CLK_000_D0 +| * | S | BR | BR | CLK_000_N_SYNC_8_ +| * | S | BR | BR | CLK_000_N_SYNC_5_ +| * | S | BR | BR | CLK_000_N_SYNC_2_ +| * | S | BS | BR | inst_DTACK_D0 +| | | | | IPL_2_ +| | | | | IPL_0_ + + +Block H +block level set pt : !RST +block level reset pt : +Equations : +| | |Block|Block| Signal +| Reg |Mode |Set |Reset| Name ++-----+-----+-----+-----+------------------------ +| * | S | BS | BR | RW_000 +| * | S | BS | BR | AS_030 +| | | | | SIZE_1_ +| * | S | BS | BR | DSACK1 +| * | S | BS | BR | BGACK_030 +| | | | | FPU_CS +| * | S | BS | BR | RN_BGACK_030 +| * | S | BS | BR | inst_AS_030_D0 +| * | S | BS | BR | RN_AS_030 +| * | S | BS | BR | SIZE_DMA_1_ +| * | S | BS | BR | RN_DSACK1 +| * | S | BS | BR | RN_RW_000 +| * | S | BS | BR | inst_BGACK_030_INT_D +| | | | | A_23_ +| | | | | A_22_ + + + (S) means the macrocell is configured in synchronous mode + i.e. it uses the block-level set and reset pt. + (A) means the macrocell is configured in asynchronous mode + i.e. it can have its independant set or reset pt. + (BS) means the block-level set pt is selected. + (BR) means the block-level reset pt is selected. + + + + +BLOCK_A_LOGIC_ARRAY_FANIN +~~~~~~~~~~~~~~~~~~~~~~~~~ +CSM Signal Source CSM Signal Source +------------------------------------ ------------------------------------ +mx A0 RST pin 86 mx A17 ... ... +mx A1 RESET_DLY_1_ mcell D13 mx A18 RESET_DLY_4_ mcell A5 +mx A2CLK_000_N_SYNC_3_ mcell D10 mx A19 RESET_DLY_3_ mcell A9 +mx A3 A1 pin 60 mx A20 RN_BGACK_030 mcell H4 +mx A4 CLK_030 pin 64 mx A21 RW_000 pin 80 +mx A5 ... ... mx A22 inst_CLK_030_H mcell A2 +mx A6CLK_000_P_SYNC_3_ mcell C7 mx A23inst_CLK_000_NE_D0 mcell C12 +mx A7CLK_000_P_SYNC_6_ mcell C14 mx A24 RESET_DLY_6_ mcell A12 +mx A8 UDS_000 pin 32 mx A25CLK_000_P_SYNC_7_ mcell A3 +mx A9 RESET_DLY_5_ mcell A1 mx A26 AS_000 pin 42 +mx A10 ... ... mx A27 LDS_000 pin 31 +mx A11 RN_E mcell G4 mx A28 RESET_DLY_2_ mcell A13 +mx A12 RESET_DLY_0_ mcell D9 mx A29 ... ... +mx A13 RN_AS_030 mcell H8 mx A30 cpu_est_0_ mcell A8 +mx A14inst_nEXP_SPACE_D0reg mcell C4 mx A31 ... ... +mx A15 RN_DS_030 mcell A0 mx A32 cpu_est_2_ mcell G5 +mx A16 cpu_est_1_ mcell C8 +---------------------------------------------------------------------------- + + +BLOCK_B_LOGIC_ARRAY_FANIN +~~~~~~~~~~~~~~~~~~~~~~~~~ +CSM Signal Source CSM Signal Source +------------------------------------ ------------------------------------ +mx B0 IPL_0_ pin 67 mx B17 RN_IPL_030_0_ mcell B8 +mx B1 RN_IPL_030_1_ mcell B12 mx B18 A0 pin 69 +mx B2 AS_000 pin 42 mx B19 RESET_DLY_3_ mcell A9 +mx B3 IPL_1_ pin 56 mx B20 RN_BGACK_030 mcell H4 +mx B4 inst_DS_030_D0 mcell D6 mx B21CLK_000_N_SYNC_10_ mcell B13 +mx B5CLK_000_N_SYNC_9_ mcell G6 mx B22 IPL_2_ pin 68 +mx B6 SIZE_1_ pin 79 mx B23 ... ... +mx B7 RESET_DLY_0_ mcell D9 mx B24 RST pin 86 +mx B8 UDS_000 pin 32 mx B25 RESET_DLY_2_ mcell A13 +mx B9 RESET_DLY_5_ mcell A1 mx B26 RN_RESET mcell B0 +mx B10 SM_AMIGA_6_ mcell F4 mx B27 LDS_000 pin 31 +mx B11 A1 pin 60 mx B28 RESET_DLY_4_ mcell A5 +mx B12CLK_OUT_PRE_Dreg mcell G13 mx B29 RESET_DLY_1_ mcell D13 +mx B13 RESET_DLY_7_ mcell A11 mx B30 RN_IPL_030_2_ mcell B4 +mx B14 SIZE_0_ pin 70 mx B31inst_LDS_000_INT mcell B5 +mx B15 RESET_DLY_6_ mcell A12 mx B32 ... ... +mx B16 inst_CLK_000_NE mcell E8 +---------------------------------------------------------------------------- + + +BLOCK_C_LOGIC_ARRAY_FANIN +~~~~~~~~~~~~~~~~~~~~~~~~~ +CSM Signal Source CSM Signal Source +------------------------------------ ------------------------------------ +mx C0 RST pin 86 mx C17CLK_000_N_SYNC_0_ mcell D14 +mx C1CLK_000_P_SYNC_4_ mcell A7 mx C18inst_AMIGA_BUS_ENABLE_DMA_LOW mcell B2 +mx C2 SM_AMIGA_5_ mcell F8 mx C19 ... ... +mx C3CLK_000_P_SYNC_8_ mcell A14 mx C20 RN_BGACK_030 mcell H4 +mx C4CLK_000_P_SYNC_5_ mcell C3 mx C21 RN_E mcell G4 +mx C5 nEXP_SPACE pin 14 mx C22 SM_AMIGA_3_ mcell C1 +mx C6 ... ... mx C23 inst_AS_000_INT mcell C9 +mx C7 SM_AMIGA_2_ mcell C5 mx C24CLK_000_N_SYNC_5_ mcell G3 +mx C8 inst_CLK_000_NE mcell E8 mx C25 BERR pin 41 +mx C9 inst_DTACK_D0 mcell G11 mx C26 RN_VMA mcell D0 +mx C10 VPA pin 36 mx C27 inst_AS_030_D0 mcell H5 +mx C11 inst_VPA_D mcell C13 mx C28 ... ... +mx C12 inst_CLK_000_PE mcell G9 mx C29 ... ... +mx C13CLK_000_P_SYNC_2_ mcell D3 mx C30 cpu_est_0_ mcell A8 +mx C14 SM_AMIGA_4_ mcell F5 mx C31 ... ... +mx C15inst_CLK_000_NE_D0 mcell C12 mx C32 cpu_est_2_ mcell G5 +mx C16 cpu_est_1_ mcell C8 +---------------------------------------------------------------------------- + + +BLOCK_D_LOGIC_ARRAY_FANIN +~~~~~~~~~~~~~~~~~~~~~~~~~ +CSM Signal Source CSM Signal Source +------------------------------------ ------------------------------------ +mx D0 inst_VPA_D mcell C13 mx D17 RN_BG_000 mcell D1 +mx D1inst_AS_030_000_SYNC mcell F12 mx D18 cpu_est_0_ mcell A8 +mx D2 RN_E mcell G4 mx D19 ... ... +mx D3 cpu_est_2_ mcell G5 mx D20 RN_BGACK_030 mcell H4 +mx D4 BG_030 pin 21 mx D21 RST pin 86 +mx D5 DS_030 pin 98 mx D22 inst_CLK_000_D0 mcell G10 +mx D6inst_nEXP_SPACE_D0reg mcell C4 mx D23inst_CLK_000_NE_D0 mcell C12 +mx D7 RESET_DLY_0_ mcell D9 mx D24 ... ... +mx D8 inst_CLK_000_NE mcell E8 mx D25 SM_AMIGA_7_ mcell F0 +mx D9 ... ... mx D26 RN_VMA mcell D0 +mx D10RN_AMIGA_ADDR_ENABLE mcell D4 mx D27 inst_CLK_000_PE mcell G9 +mx D11CLK_000_P_SYNC_1_ mcell F6 mx D28inst_LDS_000_INT mcell B5 +mx D12CLK_000_N_SYNC_2_ mcell G7 mx D29 cpu_est_1_ mcell C8 +mx D13 inst_AS_030_D0 mcell H5 mx D30inst_DS_000_ENABLE mcell F1 +mx D14inst_BGACK_030_INT_D mcell H2 mx D31inst_UDS_000_INT mcell G2 +mx D15inst_AMIGA_BUS_ENABLE_DMA_HIGH mcell A6 mx D32 ... ... +mx D16 inst_CLK_000_D1 mcell D2 +---------------------------------------------------------------------------- + + +BLOCK_E_LOGIC_ARRAY_FANIN +~~~~~~~~~~~~~~~~~~~~~~~~~ +CSM Signal Source CSM Signal Source +------------------------------------ ------------------------------------ +mx E0 RN_BGACK_030 mcell H4 mx E17 FC_0_ pin 57 +mx E1 FC_1_ pin 58 mx E18 A_23_ pin 85 +mx E2CLK_000_N_SYNC_11_ mcell B6 mx E19 A_30_ pin 5 +mx E3 A_27_ pin 16 mx E20 A_22_ pin 84 +mx E4 BGACK_000 pin 28 mx E21 A_29_ pin 6 +mx E5 A_21_ pin 94 mx E22 A_25_ pin 18 +mx E6inst_nEXP_SPACE_D0reg mcell C4 mx E23 inst_AS_000_INT mcell C9 +mx E7 A_28_ pin 15 mx E24 un8_ciin mcell E9 +mx E8 FPU_SENSE pin 91 mx E25 A_31_ pin 4 +mx E9 A_26_ pin 17 mx E26 CIIN_0 mcell E5 +mx E10 ... ... mx E27 A_17_ pin 59 +mx E11 A_16_ pin 96 mx E28 RW_000 pin 80 +mx E12 A_19_ pin 97 mx E29 A_20_ pin 93 +mx E13 inst_AS_030_D0 mcell H5 mx E30 ... ... +mx E14 A_24_ pin 19 mx E31 A_18_ pin 95 +mx E15inst_CLK_OUT_PRE_50 mcell E2 mx E32 AS_030 pin 82 +mx E16 AS_000 pin 42 +---------------------------------------------------------------------------- + + +BLOCK_F_LOGIC_ARRAY_FANIN +~~~~~~~~~~~~~~~~~~~~~~~~~ +CSM Signal Source CSM Signal Source +------------------------------------ ------------------------------------ +mx F0 RST pin 86 mx F17 A_18_ pin 95 +mx F1 BERR pin 41 mx F18 SM_AMIGA_1_ mcell F9 +mx F2 SM_AMIGA_5_ mcell F8 mx F19 ... ... +mx F3 inst_CLK_000_D1 mcell D2 mx F20 FC_1_ pin 58 +mx F4 BGACK_000 pin 28 mx F21 ... ... +mx F5 inst_CLK_000_D0 mcell G10 mx F22 SM_AMIGA_0_ mcell F13 +mx F6inst_nEXP_SPACE_D0reg mcell C4 mx F23 ... ... +mx F7 SM_AMIGA_2_ mcell C5 mx F24 FC_0_ pin 57 +mx F8CLK_000_P_SYNC_0_ mcell D7 mx F25 SM_AMIGA_7_ mcell F0 +mx F9CLK_000_N_SYNC_6_ mcell C6 mx F26 A_16_ pin 96 +mx F10 inst_CLK_000_PE mcell G9 mx F27 A_17_ pin 59 +mx F11 RW pin 71 mx F28 ... ... +mx F12 A_19_ pin 97 mx F29 SM_AMIGA_6_ mcell F4 +mx F13 inst_AS_030_D0 mcell H5 mx F30 SM_AMIGA_3_ mcell C1 +mx F14 SM_AMIGA_4_ mcell F5 mx F31inst_AS_030_000_SYNC mcell F12 +mx F15inst_DS_000_ENABLE mcell F1 mx F32state_machine_un15_clk_000_ne_i_n mcell C2 +mx F16 inst_CLK_000_NE mcell E8 +---------------------------------------------------------------------------- + + +BLOCK_G_LOGIC_ARRAY_FANIN +~~~~~~~~~~~~~~~~~~~~~~~~~ +CSM Signal Source CSM Signal Source +------------------------------------ ------------------------------------ +mx G0CLK_000_P_SYNC_9_ mcell C11 mx G17 ... ... +mx G1 ... ... mx G18CLK_000_N_SYNC_1_ mcell C10 +mx G2 RN_E mcell G4 mx G19 SIZE_DMA_1_ mcell H13 +mx G3 cpu_est_0_ mcell A8 mx G20 RN_BGACK_030 mcell H4 +mx G4inst_CLK_000_NE_D0 mcell C12 mx G21 RST pin 86 +mx G5 ... ... mx G22CLK_000_N_SYNC_4_ mcell A10 +mx G6 SIZE_DMA_0_ mcell B9 mx G23 DTACK pin 30 +mx G7 cpu_est_1_ mcell C8 mx G24 LDS_000 pin 31 +mx G8 UDS_000 pin 32 mx G25 ... ... +mx G9CLK_000_N_SYNC_7_ mcell F2 mx G26 AS_000 pin 42 +mx G10 SM_AMIGA_6_ mcell F4 mx G27 ... ... +mx G11CLK_000_N_SYNC_8_ mcell G14 mx G28 RW_000 pin 80 +mx G12CLK_OUT_PRE_Dreg mcell G13 mx G29inst_nEXP_SPACE_D0reg mcell C4 +mx G13inst_CLK_OUT_PRE mcell E13 mx G30 ... ... +mx G14 CLK_000 pin 11 mx G31inst_UDS_000_INT mcell G2 +mx G15 A0 pin 69 mx G32 cpu_est_2_ mcell G5 +mx G16 inst_DS_030_D0 mcell D6 +---------------------------------------------------------------------------- + + +BLOCK_H_LOGIC_ARRAY_FANIN +~~~~~~~~~~~~~~~~~~~~~~~~~ +CSM Signal Source CSM Signal Source +------------------------------------ ------------------------------------ +mx H0 LDS_000 pin 31 mx H17 BERR pin 41 +mx H1 FC_1_ pin 58 mx H18 BGACK_000 pin 28 +mx H2 SM_AMIGA_5_ mcell F8 mx H19 AS_030 pin 82 +mx H3 RN_AS_030 mcell H8 mx H20 CLK_030 pin 64 +mx H4 A_18_ pin 95 mx H21 RST pin 86 +mx H5 RN_DSACK1 mcell H9 mx H22 ... ... +mx H6 A_16_ pin 96 mx H23 RN_BGACK_030 mcell H4 +mx H7 SIZE_DMA_1_ mcell H13 mx H24 FC_0_ pin 57 +mx H8 UDS_000 pin 32 mx H25 RW pin 71 +mx H9CLK_OUT_PRE_Dreg mcell G13 mx H26 AS_000 pin 42 +mx H10 inst_CLK_000_PE mcell G9 mx H27 A_17_ pin 59 +mx H11 FPU_SENSE pin 91 mx H28CLK_000_N_SYNC_10_ mcell B13 +mx H12 A_19_ pin 97 mx H29CLK_000_N_SYNC_9_ mcell G6 +mx H13 inst_AS_030_D0 mcell H5 mx H30 RN_RW_000 mcell H0 +mx H14inst_nEXP_SPACE_D0reg mcell C4 mx H31 SM_AMIGA_7_ mcell F0 +mx H15 SM_AMIGA_0_ mcell F13 mx H32 SM_AMIGA_1_ mcell F9 +mx H16 SIZE_DMA_0_ mcell B9 +---------------------------------------------------------------------------- + + CSM indicates the mux inputs from the Central Switch Matrix. + Source indicates where the signal comes from (pin or macrocell). + + + + +PostFit_Equations +~~~~~~~~~~~~~~~~~ + + + P-Terms Fan-in Fan-out Type Name (attributes) +--------- ------ ------- ---- ----------------- + 1 2 1 Pin SIZE_1_ + 1 2 1 Pin SIZE_1_.OE + 1 2 1 Pin AS_000- + 1 1 1 Pin AS_000.OE + 1 3 1 Pin UDS_000- + 1 1 1 Pin UDS_000.OE + 1 3 1 Pin LDS_000- + 1 1 1 Pin LDS_000.OE + 0 0 1 Pin BERR + 1 9 1 Pin BERR.OE + 1 1 1 Pin CLK_DIV_OUT + 1 1 1 Pin CLK_EXP + 1 9 1 Pin FPU_CS- + 1 0 1 Pin AVEC + 2 4 1 Pin AMIGA_BUS_DATA_DIR + 1 2 1 Pin AMIGA_BUS_ENABLE_LOW- + 2 3 1 Pin AMIGA_BUS_ENABLE_HIGH + 1 13 1 Pin CIIN + 1 1 1 Pin CIIN.OE + 1 2 1 Pin SIZE_0_ + 1 2 1 Pin SIZE_0_.OE + 2 3 1 Pin IPL_030_2_.D + 1 1 1 Pin IPL_030_2_.AP + 1 1 1 Pin IPL_030_2_.C + 2 3 1 Pin IPL_030_1_.D + 1 1 1 Pin IPL_030_1_.AP + 1 1 1 Pin IPL_030_1_.C + 2 3 1 Pin IPL_030_0_.D + 1 1 1 Pin IPL_030_0_.AP + 1 1 1 Pin IPL_030_0_.C + 1 2 1 Pin AS_030.OE + 4 6 1 Pin AS_030.D + 1 1 1 Pin AS_030.AP + 1 1 1 Pin AS_030.C + 1 1 1 Pin RW_000.OE + 3 8 1 Pin RW_000.D- + 1 1 1 Pin RW_000.AP + 1 1 1 Pin RW_000.C + 1 2 1 Pin DS_030.OE + 6 9 1 Pin DS_030.D + 1 1 1 Pin DS_030.AP + 1 1 1 Pin DS_030.C + 1 2 1 Pin A0.OE + 1 4 1 Pin A0.D + 1 1 1 Pin A0.AP + 1 1 1 Pin A0.C + 2 5 1 Pin BG_000.D- + 1 1 1 Pin BG_000.AP + 1 1 1 Pin BG_000.C + 2 3 1 Pin BGACK_030.D + 1 1 1 Pin BGACK_030.AP + 1 1 1 Pin BGACK_030.C + 1 1 1 Pin DSACK1.OE + 4 8 1 Pin DSACK1.D- + 1 1 1 Pin DSACK1.AP + 1 1 1 Pin DSACK1.C + 5 5 1 Pin E.D + 1 1 1 Pin E.C + 1 1 1 Pin VMA.AP + 2 8 1 Pin VMA.T + 1 1 1 Pin VMA.C + 1 1 1 Pin RESET.AR + 2 9 1 Pin RESET.D + 1 1 1 Pin RESET.C + 1 1 1 Pin RW.OE + 2 5 1 Pin RW.D- + 1 1 1 Pin RW.AP + 1 1 1 Pin RW.C + 3 8 1 Pin AMIGA_ADDR_ENABLE.D- + 1 1 1 Pin AMIGA_ADDR_ENABLE.AP + 1 1 1 Pin AMIGA_ADDR_ENABLE.C + 2 2 1 Node cpu_est_0_.D + 1 1 1 Node cpu_est_0_.C + 5 5 1 Node cpu_est_1_.D- + 1 1 1 Node cpu_est_1_.C + 2 4 1 Node inst_AS_000_INT.D- + 1 1 1 Node inst_AS_000_INT.AP + 1 1 1 Node inst_AS_000_INT.C + 2 5 1 Node inst_AMIGA_BUS_ENABLE_DMA_LOW.D- + 1 1 1 Node inst_AMIGA_BUS_ENABLE_DMA_LOW.AP + 1 1 1 Node inst_AMIGA_BUS_ENABLE_DMA_LOW.C + 1 1 1 Node inst_AS_030_D0.D + 1 1 1 Node inst_AS_030_D0.AP + 1 1 1 Node inst_AS_030_D0.C + 1 1 1 Node inst_nEXP_SPACE_D0reg.D + 1 1 1 Node inst_nEXP_SPACE_D0reg.AP + 1 1 1 Node inst_nEXP_SPACE_D0reg.C + 1 1 1 Node inst_DS_030_D0.D + 1 1 1 Node inst_DS_030_D0.AP + 1 1 1 Node inst_DS_030_D0.C + 6 12 1 Node inst_AS_030_000_SYNC.D + 1 1 1 Node inst_AS_030_000_SYNC.AP + 1 1 1 Node inst_AS_030_000_SYNC.C + 1 1 1 Node inst_BGACK_030_INT_D.D + 1 1 1 Node inst_BGACK_030_INT_D.AP + 1 1 1 Node inst_BGACK_030_INT_D.C + 2 4 1 Node SIZE_DMA_0_.D + 1 1 1 Node SIZE_DMA_0_.AP + 1 1 1 Node SIZE_DMA_0_.C + 1 4 1 Node SIZE_DMA_1_.D + 1 1 1 Node SIZE_DMA_1_.AP + 1 1 1 Node SIZE_DMA_1_.C + 1 1 1 Node inst_VPA_D.D + 1 1 1 Node inst_VPA_D.AP + 1 1 1 Node inst_VPA_D.C + 3 4 1 Node inst_UDS_000_INT.D + 1 1 1 Node inst_UDS_000_INT.AP + 1 1 1 Node inst_UDS_000_INT.C + 3 6 1 Node inst_LDS_000_INT.D + 1 1 1 Node inst_LDS_000_INT.AP + 1 1 1 Node inst_LDS_000_INT.C + 1 1 1 Node inst_DTACK_D0.D + 1 1 1 Node inst_DTACK_D0.AP + 1 1 1 Node inst_DTACK_D0.C + 1 1 1 Node inst_CLK_OUT_PRE_50.D + 1 1 1 Node inst_CLK_OUT_PRE_50.C + 1 1 1 Node inst_CLK_000_D1.D + 1 1 1 Node inst_CLK_000_D1.C + 1 1 1 Node inst_CLK_000_D0.D + 1 1 1 Node inst_CLK_000_D0.C + 1 1 1 Node inst_CLK_000_PE.D + 1 1 1 Node inst_CLK_000_PE.C + 13 15 1 Node SM_AMIGA_7_.D + 1 1 1 Node SM_AMIGA_7_.AP + 1 1 1 Node SM_AMIGA_7_.C + 1 1 1 Node SM_AMIGA_5_.AR + 2 5 1 Node SM_AMIGA_5_.D + 1 1 1 Node SM_AMIGA_5_.C + 1 1 1 Node inst_CLK_OUT_PRE.D + 1 1 1 Node inst_CLK_OUT_PRE.C + 1 1 1 Node inst_CLK_000_NE.D + 1 1 1 Node inst_CLK_000_NE.C + 1 1 1 Node CLK_000_N_SYNC_11_.D + 1 1 1 Node CLK_000_N_SYNC_11_.C + 1 1 1 Node CLK_000_P_SYNC_9_.D + 1 1 1 Node CLK_000_P_SYNC_9_.C + 4 5 1 Node cpu_est_2_.D + 1 1 1 Node cpu_est_2_.C + 1 1 1 Node inst_CLK_000_NE_D0.D + 1 1 1 Node inst_CLK_000_NE_D0.C + 6 12 1 NodeX1 SM_AMIGA_3_.D.X1 + 1 2 1 NodeX2 SM_AMIGA_3_.D.X2 + 1 1 1 Node SM_AMIGA_3_.AR + 1 1 1 Node SM_AMIGA_3_.C + 1 1 1 Node SM_AMIGA_0_.AR + 2 5 1 Node SM_AMIGA_0_.D + 1 1 1 Node SM_AMIGA_0_.C + 2 5 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- + 1 1 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.AP + 1 1 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.C + 1 1 1 Node SM_AMIGA_6_.AR + 2 8 1 Node SM_AMIGA_6_.D + 1 1 1 Node SM_AMIGA_6_.C + 1 1 1 Node RESET_DLY_0_.AR + 1 5 1 Node RESET_DLY_0_.T + 1 1 1 Node RESET_DLY_0_.C + 1 1 1 Node RESET_DLY_1_.AR + 1 6 1 Node RESET_DLY_1_.T + 1 1 1 Node RESET_DLY_1_.C + 1 1 1 Node RESET_DLY_2_.AR + 1 7 1 Node RESET_DLY_2_.T + 1 1 1 Node RESET_DLY_2_.C + 1 1 1 Node RESET_DLY_3_.AR + 1 8 1 Node RESET_DLY_3_.T + 1 1 1 Node RESET_DLY_3_.C + 1 1 1 Node RESET_DLY_4_.AR + 1 9 1 Node RESET_DLY_4_.T + 1 1 1 Node RESET_DLY_4_.C + 1 1 1 Node RESET_DLY_5_.AR + 1 10 1 Node RESET_DLY_5_.T + 1 1 1 Node RESET_DLY_5_.C + 1 1 1 Node RESET_DLY_6_.AR + 1 11 1 Node RESET_DLY_6_.T + 1 1 1 Node RESET_DLY_6_.C + 1 1 1 Node RESET_DLY_7_.AR + 1 12 1 Node RESET_DLY_7_.T + 1 1 1 Node RESET_DLY_7_.C + 1 2 1 Node CLK_000_P_SYNC_0_.D + 1 1 1 Node CLK_000_P_SYNC_0_.C + 1 1 1 Node CLK_000_P_SYNC_1_.D + 1 1 1 Node CLK_000_P_SYNC_1_.C + 1 1 1 Node CLK_000_P_SYNC_2_.D + 1 1 1 Node CLK_000_P_SYNC_2_.C + 1 1 1 Node CLK_000_P_SYNC_3_.D + 1 1 1 Node CLK_000_P_SYNC_3_.C + 1 1 1 Node CLK_000_P_SYNC_4_.D + 1 1 1 Node CLK_000_P_SYNC_4_.C + 1 1 1 Node CLK_000_P_SYNC_5_.D + 1 1 1 Node CLK_000_P_SYNC_5_.C + 1 1 1 Node CLK_000_P_SYNC_6_.D + 1 1 1 Node CLK_000_P_SYNC_6_.C + 1 1 1 Node CLK_000_P_SYNC_7_.D + 1 1 1 Node CLK_000_P_SYNC_7_.C + 1 1 1 Node CLK_000_P_SYNC_8_.D + 1 1 1 Node CLK_000_P_SYNC_8_.C + 1 2 1 Node CLK_000_N_SYNC_0_.D + 1 1 1 Node CLK_000_N_SYNC_0_.C + 1 1 1 Node CLK_000_N_SYNC_1_.D + 1 1 1 Node CLK_000_N_SYNC_1_.C + 1 1 1 Node CLK_000_N_SYNC_2_.D + 1 1 1 Node CLK_000_N_SYNC_2_.C + 1 1 1 Node CLK_000_N_SYNC_3_.D + 1 1 1 Node CLK_000_N_SYNC_3_.C + 1 1 1 Node CLK_000_N_SYNC_4_.D + 1 1 1 Node CLK_000_N_SYNC_4_.C + 1 1 1 Node CLK_000_N_SYNC_5_.D + 1 1 1 Node CLK_000_N_SYNC_5_.C + 1 1 1 Node CLK_000_N_SYNC_6_.D + 1 1 1 Node CLK_000_N_SYNC_6_.C + 1 1 1 Node CLK_000_N_SYNC_7_.D + 1 1 1 Node CLK_000_N_SYNC_7_.C + 1 1 1 Node CLK_000_N_SYNC_8_.D + 1 1 1 Node CLK_000_N_SYNC_8_.C + 1 1 1 Node CLK_000_N_SYNC_9_.D + 1 1 1 Node CLK_000_N_SYNC_9_.C + 1 1 1 Node CLK_000_N_SYNC_10_.D + 1 1 1 Node CLK_000_N_SYNC_10_.C + 1 1 1 Node inst_CLK_030_H.AR + 4 7 1 Node inst_CLK_030_H.D + 1 1 1 Node inst_CLK_030_H.C + 1 1 1 Node inst_DS_000_ENABLE.AR + 3 6 1 Node inst_DS_000_ENABLE.D + 1 1 1 Node inst_DS_000_ENABLE.C + 1 1 1 Node SM_AMIGA_1_.AR + 2 5 1 Node SM_AMIGA_1_.D + 1 1 1 Node SM_AMIGA_1_.C + 1 1 1 Node SM_AMIGA_4_.AR + 2 5 1 Node SM_AMIGA_4_.D + 1 1 1 Node SM_AMIGA_4_.C + 1 1 1 Node SM_AMIGA_2_.AR + 3 12 1 Node SM_AMIGA_2_.D + 1 1 1 Node SM_AMIGA_2_.C + 1 1 1 Node CLK_OUT_PRE_Dreg.D + 1 1 1 Node CLK_OUT_PRE_Dreg.C + 2 9 1 Node un8_ciin- + 2 7 1 Node state_machine_un15_clk_000_ne_i_n- + 2 15 1 Node CIIN_0 +========= + 318 P-Term Total: 318 + Total Pins: 61 + Total Nodes: 68 + Average P-Term/Output: 1 + + +Equations: + +SIZE_1_ = (!SIZE_DMA_0_.Q & SIZE_DMA_1_.Q); + +SIZE_1_.OE = (!BGACK_030.Q & !inst_nEXP_SPACE_D0reg.Q); + +!AS_000 = (!inst_AS_000_INT.Q & !AS_030.PIN); + +AS_000.OE = (BGACK_030.Q); + +!UDS_000 = (!inst_UDS_000_INT.Q & inst_DS_000_ENABLE.Q & !DS_030.PIN); + +UDS_000.OE = (BGACK_030.Q); + +!LDS_000 = (!inst_LDS_000_INT.Q & inst_DS_000_ENABLE.Q & !DS_030.PIN); + +LDS_000.OE = (BGACK_030.Q); + +BERR = (0); + +BERR.OE = (FC_1_ & BGACK_000 & FPU_SENSE & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & !AS_030.PIN); + +CLK_DIV_OUT = (CLK_OUT_PRE_Dreg.Q); + +CLK_EXP = (CLK_OUT_PRE_Dreg.Q); + +!FPU_CS = (FC_1_ & BGACK_000 & !FPU_SENSE & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & !AS_030.PIN); + +AVEC = (1); + +AMIGA_BUS_DATA_DIR = (BGACK_030.Q & !RW_000.PIN + # !BGACK_030.Q & !inst_nEXP_SPACE_D0reg.Q & !AS_000.PIN & RW_000.PIN); + +!AMIGA_BUS_ENABLE_LOW = (!BGACK_030.Q & !inst_AMIGA_BUS_ENABLE_DMA_LOW.Q); + +AMIGA_BUS_ENABLE_HIGH = (BGACK_030.Q & SM_AMIGA_7_.Q + # !BGACK_030.Q & inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q); + +CIIN = (!A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_ & A_23_ & A_22_ & A_21_ & A_20_ & !inst_AS_030_D0.Q); + +CIIN.OE = (CIIN_0); + +SIZE_0_ = (SIZE_DMA_0_.Q & !SIZE_DMA_1_.Q); + +SIZE_0_.OE = (!BGACK_030.Q & !inst_nEXP_SPACE_D0reg.Q); + +IPL_030_2_.D = (IPL_2_ & inst_CLK_000_NE.Q + # !inst_CLK_000_NE.Q & IPL_030_2_.Q); + +IPL_030_2_.AP = (!RST); + +IPL_030_2_.C = (CLK_OSZI); + +IPL_030_1_.D = (IPL_1_ & inst_CLK_000_NE.Q + # !inst_CLK_000_NE.Q & IPL_030_1_.Q); + +IPL_030_1_.AP = (!RST); + +IPL_030_1_.C = (CLK_OSZI); + +IPL_030_0_.D = (IPL_0_ & inst_CLK_000_NE.Q + # !inst_CLK_000_NE.Q & IPL_030_0_.Q); + +IPL_030_0_.AP = (!RST); + +IPL_030_0_.C = (CLK_OSZI); + +AS_030.OE = (!BGACK_030.Q & !inst_nEXP_SPACE_D0reg.Q); + +AS_030.D = (BGACK_030.Q + # AS_000.PIN + # !CLK_030 & AS_030.Q + # UDS_000.PIN & LDS_000.PIN); + +AS_030.AP = (!RST); + +AS_030.C = (CLK_OSZI); + +RW_000.OE = (BGACK_030.Q); + +!RW_000.D = (SM_AMIGA_5_.Q & !RW.PIN + # !inst_AS_030_D0.Q & !inst_CLK_000_PE.Q & !SM_AMIGA_7_.Q & !SM_AMIGA_5_.Q & !RW_000.Q & BERR.PIN + # !inst_AS_030_D0.Q & !SM_AMIGA_7_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_0_.Q & !RW_000.Q & BERR.PIN); + +RW_000.AP = (!RST); + +RW_000.C = (CLK_OSZI); + +DS_030.OE = (!BGACK_030.Q & !inst_nEXP_SPACE_D0reg.Q); + +DS_030.D = (BGACK_030.Q + # AS_000.PIN + # UDS_000.PIN & LDS_000.PIN + # !CLK_030 & DS_030.Q & !RW_000.PIN + # DS_030.Q & !inst_CLK_030_H.Q & !RW_000.PIN + # CLK_030 & AS_030.Q & inst_CLK_030_H.Q & !RW_000.PIN); + +DS_030.AP = (!RST); + +DS_030.C = (CLK_OSZI); + +A0.OE = (!BGACK_030.Q & !inst_nEXP_SPACE_D0reg.Q); + +A0.D = (!BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN); + +A0.AP = (!RST); + +A0.C = (CLK_OSZI); + +!BG_000.D = (!BG_030 & !BG_000.Q + # !BG_030 & inst_AS_030_D0.Q & inst_nEXP_SPACE_D0reg.Q & inst_CLK_000_D0.Q); + +BG_000.AP = (!RST); + +BG_000.C = (CLK_OSZI); + +BGACK_030.D = (BGACK_000 & BGACK_030.Q + # BGACK_000 & inst_CLK_000_PE.Q); + +BGACK_030.AP = (!RST); + +BGACK_030.C = (CLK_OSZI); + +DSACK1.OE = (inst_nEXP_SPACE_D0reg.Q); + +!DSACK1.D = (CLK_000_N_SYNC_10_.Q & SM_AMIGA_1_.Q + # !CLK_030 & CLK_000_N_SYNC_9_.Q & SM_AMIGA_1_.Q + # CLK_000_N_SYNC_9_.Q & SM_AMIGA_1_.Q & CLK_OUT_PRE_Dreg.Q + # !inst_AS_030_D0.Q & !DSACK1.Q & BERR.PIN); + +DSACK1.AP = (!RST); + +DSACK1.C = (CLK_OSZI); + +E.D = (E.Q & !cpu_est_0_.Q + # E.Q & !cpu_est_1_.Q + # E.Q & !inst_CLK_000_NE_D0.Q + # cpu_est_0_.Q & cpu_est_1_.Q & !cpu_est_2_.Q & inst_CLK_000_NE_D0.Q + # !cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & inst_CLK_000_NE_D0.Q); + +E.C = (CLK_OSZI); + +VMA.AP = (!RST); + +VMA.T = (!E.Q & !VMA.Q & !cpu_est_0_.Q & cpu_est_1_.Q & inst_CLK_000_PE.Q & cpu_est_2_.Q + # !E.Q & VMA.Q & cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & inst_CLK_000_NE.Q & cpu_est_2_.Q); + +VMA.C = (CLK_OSZI); + +RESET.AR = (!RST); + +RESET.D = (RESET.Q + # RESET_DLY_0_.Q & RESET_DLY_1_.Q & RESET_DLY_2_.Q & RESET_DLY_3_.Q & RESET_DLY_4_.Q & RESET_DLY_5_.Q & RESET_DLY_6_.Q & RESET_DLY_7_.Q); + +RESET.C = (CLK_OSZI); + +RW.OE = (!BGACK_030.Q); + +!RW.D = (!BGACK_030.Q & !AS_000.PIN & !RW_000.PIN & !UDS_000.PIN + # !BGACK_030.Q & !AS_000.PIN & !RW_000.PIN & !LDS_000.PIN); + +RW.AP = (!RST); + +RW.C = (CLK_OSZI); + +!AMIGA_ADDR_ENABLE.D = (!BGACK_030.Q + # !AMIGA_ADDR_ENABLE.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_7_.Q + # inst_nEXP_SPACE_D0reg.Q & !inst_AS_030_000_SYNC.Q & inst_BGACK_030_INT_D.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D0.Q & SM_AMIGA_7_.Q); + +AMIGA_ADDR_ENABLE.AP = (!RST); + +AMIGA_ADDR_ENABLE.C = (CLK_OSZI); + +cpu_est_0_.D = (!cpu_est_0_.Q & inst_CLK_000_NE_D0.Q + # cpu_est_0_.Q & !inst_CLK_000_NE_D0.Q); + +cpu_est_0_.C = (CLK_OSZI); + +!cpu_est_1_.D = (!cpu_est_1_.Q & !inst_CLK_000_NE_D0.Q + # E.Q & cpu_est_0_.Q & !cpu_est_1_.Q + # !E.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & cpu_est_2_.Q + # E.Q & cpu_est_0_.Q & !cpu_est_2_.Q & inst_CLK_000_NE_D0.Q + # !E.Q & cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & inst_CLK_000_NE_D0.Q); + +cpu_est_1_.C = (CLK_OSZI); + +!inst_AS_000_INT.D = (SM_AMIGA_5_.Q + # !inst_AS_000_INT.Q & !inst_AS_030_D0.Q & BERR.PIN); + +inst_AS_000_INT.AP = (!RST); + +inst_AS_000_INT.C = (CLK_OSZI); + +!inst_AMIGA_BUS_ENABLE_DMA_LOW.D = (A1 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN + # A1 & !BGACK_030.Q & !AS_000.PIN & !LDS_000.PIN); + +inst_AMIGA_BUS_ENABLE_DMA_LOW.AP = (!RST); + +inst_AMIGA_BUS_ENABLE_DMA_LOW.C = (CLK_OSZI); + +inst_AS_030_D0.D = (AS_030.PIN); + +inst_AS_030_D0.AP = (!RST); + +inst_AS_030_D0.C = (CLK_OSZI); + +inst_nEXP_SPACE_D0reg.D = (nEXP_SPACE); + +inst_nEXP_SPACE_D0reg.AP = (!RST); + +inst_nEXP_SPACE_D0reg.C = (CLK_OSZI); + +inst_DS_030_D0.D = (DS_030.PIN); + +inst_DS_030_D0.AP = (!RST); + +inst_DS_030_D0.C = (CLK_OSZI); + +inst_AS_030_000_SYNC.D = (inst_AS_030_D0.Q + # !BERR.PIN + # !BGACK_000 & inst_AS_030_000_SYNC.Q + # !inst_nEXP_SPACE_D0reg.Q & inst_AS_030_000_SYNC.Q + # inst_AS_030_000_SYNC.Q & !SM_AMIGA_7_.Q + # FC_1_ & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & inst_AS_030_000_SYNC.Q); + +inst_AS_030_000_SYNC.AP = (!RST); + +inst_AS_030_000_SYNC.C = (CLK_OSZI); + +inst_BGACK_030_INT_D.D = (BGACK_030.Q); + +inst_BGACK_030_INT_D.AP = (!RST); + +inst_BGACK_030_INT_D.C = (CLK_OSZI); + +SIZE_DMA_0_.D = (!BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & LDS_000.PIN + # !BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN); + +SIZE_DMA_0_.AP = (!RST); + +SIZE_DMA_0_.C = (CLK_OSZI); + +SIZE_DMA_1_.D = (!BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & !LDS_000.PIN); + +SIZE_DMA_1_.AP = (!RST); + +SIZE_DMA_1_.C = (CLK_OSZI); + +inst_VPA_D.D = (VPA); + +inst_VPA_D.AP = (!RST); + +inst_VPA_D.C = (CLK_OSZI); + +inst_UDS_000_INT.D = (inst_DS_030_D0.Q & inst_UDS_000_INT.Q + # inst_UDS_000_INT.Q & !SM_AMIGA_6_.Q + # !inst_DS_030_D0.Q & SM_AMIGA_6_.Q & A0.PIN); + +inst_UDS_000_INT.AP = (!RST); + +inst_UDS_000_INT.C = (CLK_OSZI); + +inst_LDS_000_INT.D = (inst_DS_030_D0.Q & inst_LDS_000_INT.Q + # inst_LDS_000_INT.Q & !SM_AMIGA_6_.Q + # !inst_DS_030_D0.Q & SM_AMIGA_6_.Q & SIZE_0_.PIN & !SIZE_1_.PIN & !A0.PIN); + +inst_LDS_000_INT.AP = (!RST); + +inst_LDS_000_INT.C = (CLK_OSZI); + +inst_DTACK_D0.D = (DTACK); + +inst_DTACK_D0.AP = (!RST); + +inst_DTACK_D0.C = (CLK_OSZI); + +inst_CLK_OUT_PRE_50.D = (!inst_CLK_OUT_PRE_50.Q); + +inst_CLK_OUT_PRE_50.C = (CLK_OSZI); + +inst_CLK_000_D1.D = (inst_CLK_000_D0.Q); + +inst_CLK_000_D1.C = (CLK_OSZI); + +inst_CLK_000_D0.D = (CLK_000); + +inst_CLK_000_D0.C = (CLK_OSZI); + +inst_CLK_000_PE.D = (CLK_000_P_SYNC_9_.Q); + +inst_CLK_000_PE.C = (CLK_OSZI); + +SM_AMIGA_7_.D = (inst_CLK_000_PE.Q & SM_AMIGA_0_.Q + # SM_AMIGA_0_.Q & !BERR.PIN + # SM_AMIGA_5_.Q & !inst_CLK_000_NE.Q & !BERR.PIN + # !inst_CLK_000_NE.Q & SM_AMIGA_3_.Q & !BERR.PIN + # !inst_CLK_000_PE.Q & SM_AMIGA_6_.Q & !BERR.PIN + # !inst_CLK_000_NE.Q & SM_AMIGA_1_.Q & !BERR.PIN + # !inst_CLK_000_PE.Q & SM_AMIGA_4_.Q & !BERR.PIN + # !inst_CLK_000_PE.Q & SM_AMIGA_2_.Q & !BERR.PIN + # SM_AMIGA_3_.Q & state_machine_un15_clk_000_ne_i_n & !BERR.PIN + # !inst_nEXP_SPACE_D0reg.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q + # inst_AS_030_000_SYNC.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q + # !inst_CLK_000_D1.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q + # inst_CLK_000_D0.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q); + +SM_AMIGA_7_.AP = (!RST); + +SM_AMIGA_7_.C = (CLK_OSZI); + +SM_AMIGA_5_.AR = (!RST); + +SM_AMIGA_5_.D = (inst_CLK_000_PE.Q & SM_AMIGA_6_.Q + # SM_AMIGA_5_.Q & !inst_CLK_000_NE.Q & BERR.PIN); + +SM_AMIGA_5_.C = (CLK_OSZI); + +inst_CLK_OUT_PRE.D = (inst_CLK_OUT_PRE_50.Q); + +inst_CLK_OUT_PRE.C = (CLK_OSZI); + +inst_CLK_000_NE.D = (CLK_000_N_SYNC_11_.Q); + +inst_CLK_000_NE.C = (CLK_OSZI); + +CLK_000_N_SYNC_11_.D = (CLK_000_N_SYNC_10_.Q); + +CLK_000_N_SYNC_11_.C = (CLK_OSZI); + +CLK_000_P_SYNC_9_.D = (CLK_000_P_SYNC_8_.Q); + +CLK_000_P_SYNC_9_.C = (CLK_OSZI); + +cpu_est_2_.D = (cpu_est_1_.Q & cpu_est_2_.Q + # cpu_est_2_.Q & !inst_CLK_000_NE_D0.Q + # E.Q & cpu_est_0_.Q & inst_CLK_000_NE_D0.Q + # !cpu_est_0_.Q & !cpu_est_1_.Q & inst_CLK_000_NE_D0.Q); + +cpu_est_2_.C = (CLK_OSZI); + +inst_CLK_000_NE_D0.D = (inst_CLK_000_NE.Q); + +inst_CLK_000_NE_D0.C = (CLK_OSZI); + +SM_AMIGA_3_.D.X1 = (inst_CLK_000_PE.Q & !SM_AMIGA_3_.Q & SM_AMIGA_4_.Q + # inst_CLK_000_PE.Q & SM_AMIGA_4_.Q & !BERR.PIN + # inst_VPA_D.Q & !inst_DTACK_D0.Q & !inst_CLK_000_PE.Q & inst_CLK_000_NE.Q & SM_AMIGA_3_.Q & BERR.PIN + # inst_VPA_D.Q & !inst_DTACK_D0.Q & inst_CLK_000_NE.Q & SM_AMIGA_3_.Q & !SM_AMIGA_4_.Q & BERR.PIN + # E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & !inst_CLK_000_PE.Q & inst_CLK_000_NE.Q & cpu_est_2_.Q & SM_AMIGA_3_.Q & BERR.PIN + # E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & inst_CLK_000_NE.Q & cpu_est_2_.Q & SM_AMIGA_3_.Q & !SM_AMIGA_4_.Q & BERR.PIN); + +SM_AMIGA_3_.D.X2 = (SM_AMIGA_3_.Q & BERR.PIN); + +SM_AMIGA_3_.AR = (!RST); + +SM_AMIGA_3_.C = (CLK_OSZI); + +SM_AMIGA_0_.AR = (!RST); + +SM_AMIGA_0_.D = (inst_CLK_000_NE.Q & !SM_AMIGA_0_.Q & SM_AMIGA_1_.Q + # !inst_CLK_000_PE.Q & SM_AMIGA_0_.Q & BERR.PIN); + +SM_AMIGA_0_.C = (CLK_OSZI); + +!inst_AMIGA_BUS_ENABLE_DMA_HIGH.D = (!A1 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN + # !A1 & !BGACK_030.Q & !AS_000.PIN & !LDS_000.PIN); + +inst_AMIGA_BUS_ENABLE_DMA_HIGH.AP = (!RST); + +inst_AMIGA_BUS_ENABLE_DMA_HIGH.C = (CLK_OSZI); + +SM_AMIGA_6_.AR = (!RST); + +SM_AMIGA_6_.D = (!inst_CLK_000_PE.Q & SM_AMIGA_6_.Q & BERR.PIN + # inst_nEXP_SPACE_D0reg.Q & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D0.Q & SM_AMIGA_7_.Q); + +SM_AMIGA_6_.C = (CLK_OSZI); + +RESET_DLY_0_.AR = (!RST); + +RESET_DLY_0_.T = (!E.Q & !cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & inst_CLK_000_NE_D0.Q); + +RESET_DLY_0_.C = (CLK_OSZI); + +RESET_DLY_1_.AR = (!RST); + +RESET_DLY_1_.T = (!E.Q & !cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & inst_CLK_000_NE_D0.Q & RESET_DLY_0_.Q); + +RESET_DLY_1_.C = (CLK_OSZI); + +RESET_DLY_2_.AR = (!RST); + +RESET_DLY_2_.T = (!E.Q & !cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & inst_CLK_000_NE_D0.Q & RESET_DLY_0_.Q & RESET_DLY_1_.Q); + +RESET_DLY_2_.C = (CLK_OSZI); + +RESET_DLY_3_.AR = (!RST); + +RESET_DLY_3_.T = (!E.Q & !cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & inst_CLK_000_NE_D0.Q & RESET_DLY_0_.Q & RESET_DLY_1_.Q & RESET_DLY_2_.Q); + +RESET_DLY_3_.C = (CLK_OSZI); + +RESET_DLY_4_.AR = (!RST); + +RESET_DLY_4_.T = (!E.Q & !cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & inst_CLK_000_NE_D0.Q & RESET_DLY_0_.Q & RESET_DLY_1_.Q & RESET_DLY_2_.Q & RESET_DLY_3_.Q); + +RESET_DLY_4_.C = (CLK_OSZI); + +RESET_DLY_5_.AR = (!RST); + +RESET_DLY_5_.T = (!E.Q & !cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & inst_CLK_000_NE_D0.Q & RESET_DLY_0_.Q & RESET_DLY_1_.Q & RESET_DLY_2_.Q & RESET_DLY_3_.Q & RESET_DLY_4_.Q); + +RESET_DLY_5_.C = (CLK_OSZI); + +RESET_DLY_6_.AR = (!RST); + +RESET_DLY_6_.T = (!E.Q & !cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & inst_CLK_000_NE_D0.Q & RESET_DLY_0_.Q & RESET_DLY_1_.Q & RESET_DLY_2_.Q & RESET_DLY_3_.Q & RESET_DLY_4_.Q & RESET_DLY_5_.Q); + +RESET_DLY_6_.C = (CLK_OSZI); + +RESET_DLY_7_.AR = (!RST); + +RESET_DLY_7_.T = (!E.Q & !cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & inst_CLK_000_NE_D0.Q & RESET_DLY_0_.Q & RESET_DLY_1_.Q & RESET_DLY_2_.Q & RESET_DLY_3_.Q & RESET_DLY_4_.Q & RESET_DLY_5_.Q & RESET_DLY_6_.Q); + +RESET_DLY_7_.C = (CLK_OSZI); + +CLK_000_P_SYNC_0_.D = (!inst_CLK_000_D1.Q & inst_CLK_000_D0.Q); + +CLK_000_P_SYNC_0_.C = (CLK_OSZI); + +CLK_000_P_SYNC_1_.D = (CLK_000_P_SYNC_0_.Q); + +CLK_000_P_SYNC_1_.C = (CLK_OSZI); + +CLK_000_P_SYNC_2_.D = (CLK_000_P_SYNC_1_.Q); + +CLK_000_P_SYNC_2_.C = (CLK_OSZI); + +CLK_000_P_SYNC_3_.D = (CLK_000_P_SYNC_2_.Q); + +CLK_000_P_SYNC_3_.C = (CLK_OSZI); + +CLK_000_P_SYNC_4_.D = (CLK_000_P_SYNC_3_.Q); + +CLK_000_P_SYNC_4_.C = (CLK_OSZI); + +CLK_000_P_SYNC_5_.D = (CLK_000_P_SYNC_4_.Q); + +CLK_000_P_SYNC_5_.C = (CLK_OSZI); + +CLK_000_P_SYNC_6_.D = (CLK_000_P_SYNC_5_.Q); + +CLK_000_P_SYNC_6_.C = (CLK_OSZI); + +CLK_000_P_SYNC_7_.D = (CLK_000_P_SYNC_6_.Q); + +CLK_000_P_SYNC_7_.C = (CLK_OSZI); + +CLK_000_P_SYNC_8_.D = (CLK_000_P_SYNC_7_.Q); + +CLK_000_P_SYNC_8_.C = (CLK_OSZI); + +CLK_000_N_SYNC_0_.D = (inst_CLK_000_D1.Q & !inst_CLK_000_D0.Q); + +CLK_000_N_SYNC_0_.C = (CLK_OSZI); + +CLK_000_N_SYNC_1_.D = (CLK_000_N_SYNC_0_.Q); + +CLK_000_N_SYNC_1_.C = (CLK_OSZI); + +CLK_000_N_SYNC_2_.D = (CLK_000_N_SYNC_1_.Q); + +CLK_000_N_SYNC_2_.C = (CLK_OSZI); + +CLK_000_N_SYNC_3_.D = (CLK_000_N_SYNC_2_.Q); + +CLK_000_N_SYNC_3_.C = (CLK_OSZI); + +CLK_000_N_SYNC_4_.D = (CLK_000_N_SYNC_3_.Q); + +CLK_000_N_SYNC_4_.C = (CLK_OSZI); + +CLK_000_N_SYNC_5_.D = (CLK_000_N_SYNC_4_.Q); + +CLK_000_N_SYNC_5_.C = (CLK_OSZI); + +CLK_000_N_SYNC_6_.D = (CLK_000_N_SYNC_5_.Q); + +CLK_000_N_SYNC_6_.C = (CLK_OSZI); + +CLK_000_N_SYNC_7_.D = (CLK_000_N_SYNC_6_.Q); + +CLK_000_N_SYNC_7_.C = (CLK_OSZI); + +CLK_000_N_SYNC_8_.D = (CLK_000_N_SYNC_7_.Q); + +CLK_000_N_SYNC_8_.C = (CLK_OSZI); + +CLK_000_N_SYNC_9_.D = (CLK_000_N_SYNC_8_.Q); + +CLK_000_N_SYNC_9_.C = (CLK_OSZI); + +CLK_000_N_SYNC_10_.D = (CLK_000_N_SYNC_9_.Q); + +CLK_000_N_SYNC_10_.C = (CLK_OSZI); + +inst_CLK_030_H.AR = (!RST); + +inst_CLK_030_H.D = (!BGACK_030.Q & inst_CLK_030_H.Q & !AS_000.PIN & !UDS_000.PIN + # !BGACK_030.Q & inst_CLK_030_H.Q & !AS_000.PIN & !LDS_000.PIN + # !CLK_030 & !BGACK_030.Q & !AS_030.Q & !AS_000.PIN & !UDS_000.PIN + # !CLK_030 & !BGACK_030.Q & !AS_030.Q & !AS_000.PIN & !LDS_000.PIN); + +inst_CLK_030_H.C = (CLK_OSZI); + +inst_DS_000_ENABLE.AR = (!RST); + +inst_DS_000_ENABLE.D = (!SM_AMIGA_5_.Q & SM_AMIGA_3_.Q + # SM_AMIGA_5_.Q & RW.PIN + # !inst_AS_030_D0.Q & inst_DS_000_ENABLE.Q & BERR.PIN); + +inst_DS_000_ENABLE.C = (CLK_OSZI); + +SM_AMIGA_1_.AR = (!RST); + +SM_AMIGA_1_.D = (inst_CLK_000_PE.Q & SM_AMIGA_2_.Q + # !inst_CLK_000_NE.Q & SM_AMIGA_1_.Q & BERR.PIN); + +SM_AMIGA_1_.C = (CLK_OSZI); + +SM_AMIGA_4_.AR = (!RST); + +SM_AMIGA_4_.D = (SM_AMIGA_5_.Q & inst_CLK_000_NE.Q + # !inst_CLK_000_PE.Q & SM_AMIGA_4_.Q & BERR.PIN); + +SM_AMIGA_4_.C = (CLK_OSZI); + +SM_AMIGA_2_.AR = (!RST); + +SM_AMIGA_2_.D = (!inst_CLK_000_PE.Q & SM_AMIGA_2_.Q & BERR.PIN + # inst_VPA_D.Q & !inst_DTACK_D0.Q & inst_CLK_000_NE.Q & SM_AMIGA_3_.Q + # E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & inst_CLK_000_NE.Q & cpu_est_2_.Q & SM_AMIGA_3_.Q); + +SM_AMIGA_2_.C = (CLK_OSZI); + +CLK_OUT_PRE_Dreg.D = (inst_CLK_OUT_PRE.Q); + +CLK_OUT_PRE_Dreg.C = (CLK_OSZI); + +!un8_ciin = (AS_030.PIN + # !A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_); + +!state_machine_un15_clk_000_ne_i_n = (inst_VPA_D.Q & !inst_DTACK_D0.Q + # E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & cpu_est_2_.Q); + +CIIN_0 = (inst_nEXP_SPACE_D0reg.Q & !un8_ciin + # !A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_ & A_23_ & A_22_ & A_21_ & A_20_ & !inst_AS_030_D0.Q); + + +Reverse-Polarity Equations: + diff --git a/Logic/68030_tk.svl b/Logic/68030_tk.svl new file mode 100644 index 0000000..579ba2b --- /dev/null +++ b/Logic/68030_tk.svl @@ -0,0 +1,2 @@ +Part Number: M4A5-128/64-10VC +Need not generate svf file according to the constraints, exit diff --git a/Logic/68030_tk.tal b/Logic/68030_tk.tal new file mode 100644 index 0000000..a233578 --- /dev/null +++ b/Logic/68030_tk.tal @@ -0,0 +1,135 @@ + + +Design Name = 68030_tk.tt4 +~~~~~~~~~~~~~~~~~~~~~~~~~~ + + +******************* +* TIMING ANALYSIS * +******************* + +Timing Analysis KEY: +One unit of delay time is equivalent to one pass + through the Central Switch Matrix. +.. Delay ( in this column ) not applicable to the indicated signal. +TSU, Set-Up Time ( 0 for input-paired signals ), + represents the number of switch matrix passes between + an input pin and a register setup before clock. + TSU is reported on the register. +TCO, Clocked Output-to-Pin Time ( 0 for output-paired signals ), + represents the number of switch matrix passes between + a clocked register and an output pin. + TCO is reported on the register. +TPD, Propagation Delay Time ( calculated only for combinatorial eqns.), + represents the number of switch matrix passes between + an input pin and an output pin. + TPD is reported on the output pin. +TCR, Clocked Output-to-Register Time, + represents the number of switch matrix passes between + a clocked register and the register it drives ( before clock ). + TCR is reported on the driving register. + + TSU TCO TPD TCR + #passes #passes #passes #passes +SIGNAL NAME min max min max min max min max +AMIGA_BUS_DATA_DIR .. .. .. .. 1 2 .. .. + AS_030 1 2 0 0 .. .. 1 1 + RN_AS_030 1 2 0 0 .. .. 1 1 + DS_030 1 2 0 0 .. .. 1 1 + RN_DS_030 1 2 0 0 .. .. 1 1 + A0 1 2 0 0 .. .. .. .. + E .. .. 0 0 .. .. 1 2 + RN_E .. .. 0 0 .. .. 1 2 + VMA .. .. 0 0 .. .. 1 2 + RN_VMA .. .. 0 0 .. .. 1 2 + RW 1 2 0 0 .. .. .. .. + cpu_est_0_ .. .. .. .. .. .. 1 2 + cpu_est_1_ .. .. .. .. .. .. 1 2 + inst_AS_000_INT 1 1 1 2 .. .. 2 2 +inst_AMIGA_BUS_ENABLE_DMA_LOW 1 2 1 1 .. .. .. .. + SIZE_DMA_0_ 1 2 1 1 .. .. 2 2 + SIZE_DMA_1_ 1 2 1 1 .. .. 2 2 + inst_VPA_D 1 1 .. .. .. .. 1 2 +inst_UDS_000_INT 1 1 1 1 .. .. 2 2 +inst_LDS_000_INT 1 1 1 1 .. .. 2 2 + inst_DTACK_D0 1 1 .. .. .. .. 1 2 + cpu_est_2_ .. .. .. .. .. .. 1 2 +inst_AMIGA_BUS_ENABLE_DMA_HIGH 1 2 1 1 .. .. .. .. + inst_CLK_030_H 1 2 .. .. .. .. 1 1 +inst_DS_000_ENABLE 1 1 1 1 .. .. 2 2 + CIIN_0 .. .. .. .. 1 2 .. .. + AS_000 .. .. .. .. 1 1 .. .. + UDS_000 .. .. .. .. 1 1 .. .. + LDS_000 .. .. .. .. 1 1 .. .. + FPU_CS .. .. .. .. 1 1 .. .. + CIIN .. .. .. .. 1 1 .. .. + IPL_030_2_ 1 1 0 0 .. .. 1 1 + RN_IPL_030_2_ 1 1 0 0 .. .. 1 1 + IPL_030_1_ 1 1 0 0 .. .. 1 1 + RN_IPL_030_1_ 1 1 0 0 .. .. 1 1 + IPL_030_0_ 1 1 0 0 .. .. 1 1 + RN_IPL_030_0_ 1 1 0 0 .. .. 1 1 + RW_000 1 1 0 0 .. .. 1 1 + RN_RW_000 1 1 0 0 .. .. 1 1 + BG_000 1 1 0 0 .. .. 1 1 + RN_BG_000 1 1 0 0 .. .. 1 1 + BGACK_030 1 1 0 1 .. .. 1 1 + RN_BGACK_030 1 1 0 1 .. .. 1 1 + DSACK1 1 1 0 0 .. .. 1 1 + RN_DSACK1 1 1 0 0 .. .. 1 1 + RESET .. .. 0 0 .. .. 1 1 + RN_RESET .. .. 0 0 .. .. 1 1 +AMIGA_ADDR_ENABLE .. .. 0 0 .. .. 1 1 +RN_AMIGA_ADDR_ENABLE .. .. 0 0 .. .. 1 1 + inst_AS_030_D0 1 1 1 1 .. .. 1 1 +inst_nEXP_SPACE_D0reg 1 1 1 1 .. .. 1 1 + inst_DS_030_D0 1 1 .. .. .. .. 1 1 +inst_AS_030_000_SYNC 1 1 .. .. .. .. 1 1 +inst_BGACK_030_INT_D .. .. .. .. .. .. 1 1 +inst_CLK_OUT_PRE_50 .. .. .. .. .. .. 1 1 + inst_CLK_000_D1 .. .. .. .. .. .. 1 1 + inst_CLK_000_D0 1 1 .. .. .. .. 1 1 + inst_CLK_000_PE .. .. .. .. .. .. 1 1 + SM_AMIGA_7_ 1 1 1 1 .. .. 1 1 + SM_AMIGA_5_ 1 1 .. .. .. .. 1 1 +inst_CLK_OUT_PRE .. .. .. .. .. .. 1 1 + inst_CLK_000_NE .. .. .. .. .. .. 1 1 +CLK_000_N_SYNC_11_ .. .. .. .. .. .. 1 1 +CLK_000_P_SYNC_9_ .. .. .. .. .. .. 1 1 +inst_CLK_000_NE_D0 .. .. .. .. .. .. 1 1 + SM_AMIGA_3_ 1 1 .. .. .. .. 1 1 + SM_AMIGA_0_ 1 1 .. .. .. .. 1 1 + SM_AMIGA_6_ 1 1 .. .. .. .. 1 1 + RESET_DLY_0_ .. .. .. .. .. .. 1 1 + RESET_DLY_1_ .. .. .. .. .. .. 1 1 + RESET_DLY_2_ .. .. .. .. .. .. 1 1 + RESET_DLY_3_ .. .. .. .. .. .. 1 1 + RESET_DLY_4_ .. .. .. .. .. .. 1 1 + RESET_DLY_5_ .. .. .. .. .. .. 1 1 + RESET_DLY_6_ .. .. .. .. .. .. 1 1 + RESET_DLY_7_ .. .. .. .. .. .. 1 1 +CLK_000_P_SYNC_0_ .. .. .. .. .. .. 1 1 +CLK_000_P_SYNC_1_ .. .. .. .. .. .. 1 1 +CLK_000_P_SYNC_2_ .. .. .. .. .. .. 1 1 +CLK_000_P_SYNC_3_ .. .. .. .. .. .. 1 1 +CLK_000_P_SYNC_4_ .. .. .. .. .. .. 1 1 +CLK_000_P_SYNC_5_ .. .. .. .. .. .. 1 1 +CLK_000_P_SYNC_6_ .. .. .. .. .. .. 1 1 +CLK_000_P_SYNC_7_ .. .. .. .. .. .. 1 1 +CLK_000_P_SYNC_8_ .. .. .. .. .. .. 1 1 +CLK_000_N_SYNC_0_ .. .. .. .. .. .. 1 1 +CLK_000_N_SYNC_1_ .. .. .. .. .. .. 1 1 +CLK_000_N_SYNC_2_ .. .. .. .. .. .. 1 1 +CLK_000_N_SYNC_3_ .. .. .. .. .. .. 1 1 +CLK_000_N_SYNC_4_ .. .. .. .. .. .. 1 1 +CLK_000_N_SYNC_5_ .. .. .. .. .. .. 1 1 +CLK_000_N_SYNC_6_ .. .. .. .. .. .. 1 1 +CLK_000_N_SYNC_7_ .. .. .. .. .. .. 1 1 +CLK_000_N_SYNC_8_ .. .. .. .. .. .. 1 1 +CLK_000_N_SYNC_9_ .. .. .. .. .. .. 1 1 +CLK_000_N_SYNC_10_ .. .. .. .. .. .. 1 1 + SM_AMIGA_1_ 1 1 .. .. .. .. 1 1 + SM_AMIGA_4_ 1 1 .. .. .. .. 1 1 + SM_AMIGA_2_ 1 1 .. .. .. .. 1 1 +CLK_OUT_PRE_Dreg .. .. 1 1 .. .. 1 1 + un8_ciin .. .. .. .. 1 1 .. .. \ No newline at end of file diff --git a/Logic/68030_tk.vco b/Logic/68030_tk.vco new file mode 100644 index 0000000..bbdf94c --- /dev/null +++ b/Logic/68030_tk.vco @@ -0,0 +1,267 @@ +[DEVICE] + +Family = M4A5; +PartType = M4A5-128/64; +Package = 100TQFP; +PartNumber = M4A5-128/64-10VC; +Speed = -10; +Operating_condition = COM; +EN_Segment = NO; +Pin_MC_1to1 = NO; +Voltage = 5.0; + +[REVISION] + +RCS = "$Revision: 1.2 $"; +Parent = m4a5.lci; +SDS_file = m4a5.sds; +Design = 68030_tk.tt4; +Rev = 0.01; +DATE = 2/1/15; +TIME = 21:36:55; +Type = TT2; +Pre_Fit_Time = 1; +Source_Format = Pure_VHDL; + +[IGNORE ASSIGNMENTS] + +Pin_Assignments = NO; +Pin_Keep_Block = NO; +Pin_Keep_Segment = NO; +Group_Assignments = NO; +Macrocell_Assignments = NO; +Macrocell_Keep_Block = NO; +Macrocell_Keep_Segment = NO; +Pin_Reservation = NO; +Timing_Constraints = NO; +Block_Reservation = NO; +Segment_Reservation = NO; +Ignore_Source_Location = NO; +Ignore_Source_Optimization = NO; +Ignore_Source_Timing = NO; + +[CLEAR ASSIGNMENTS] + +Pin_Assignments = NO; +Pin_Keep_Block = NO; +Pin_Keep_Segment = NO; +Group_Assignments = NO; +Macrocell_Assignments = NO; +Macrocell_Keep_Block = NO; +Macrocell_Keep_Segment = NO; +Pin_Reservation = NO; +Timing_Constraints = NO; +Block_Reservation = NO; +Segment_Reservation = NO; +Ignore_Source_Location = NO; +Ignore_Source_Optimization = NO; +Ignore_Source_Timing = NO; + +[BACKANNOTATE NETLIST] + +Netlist = VHDL; +Delay_File = SDF; +Generic_VCC = ; +Generic_GND = ; + +[BACKANNOTATE ASSIGNMENTS] + +Pin_Assignment = NO; +Pin_Block = NO; +Pin_Macrocell_Block = NO; +Routing = NO; + +[GLOBAL PROJECT OPTIMIZATION] + +Balanced_Partitioning = YES; +Spread_Placement = YES; +Max_Pin_Percent = 100; +Max_Macrocell_Percent = 100; +Max_Inter_Seg_Percent = 100; +Max_Seg_In_Percent = 100; +Max_Blk_In_Percent = 100; + +[FITTER REPORT FORMAT] + +Fitter_Options = YES; +Pinout_Diagram = NO; +Pinout_Listing = YES; +Detailed_Block_Segment_Summary = YES; +Input_Signal_List = YES; +Output_Signal_List = YES; +Bidir_Signal_List = YES; +Node_Signal_List = YES; +Signal_Fanout_List = YES; +Block_Segment_Fanin_List = YES; +Prefit_Eqn = YES; +Postfit_Eqn = YES; +Page_Break = YES; + +[OPTIMIZATION OPTIONS] + +Logic_Reduction = YES; +Max_PTerm_Split = 16; +Max_PTerm_Collapse = 16; +XOR_Synthesis = YES; +Node_Collapse = Yes; +DT_Synthesis = Yes; + +[FITTER GLOBAL OPTIONS] + +Run_Time = 0; +Set_Reset_Dont_Care = YES; +In_Reg_Optimize = YES; +Clock_Optimize = NO; +Conf_Unused_IOs = OUT_LOW; + +[POWER] +Powerlevel = Low, High; +Default = High; +Low = 8, H, G, F, E, D, C, B, A; +Type = GLB; + +[HARDWARE DEVICE OPTIONS] +Zero_Hold_Time = Yes; +Signature_Word = 0; +Pull_up = Yes; +Out_Slew_Rate = SLOW, FAST, 7, CLK_DIV_OUT, CLK_EXP, FPU_CS, AMIGA_BUS_DATA_DIR, AMIGA_BUS_ENABLE_LOW, + AMIGA_ADDR_ENABLE, AMIGA_BUS_ENABLE_HIGH; +Device_max_fanin = 33; +Device_max_pterms = 20; +Usercode_Format = Hex; + +[PIN RESERVATIONS] +layer = OFF; + +[LOCATION ASSIGNMENT] + +Layer = OFF; +A_23_ = INPUT,85, H,-; +A_22_ = INPUT,84, H,-; +SIZE_1_ = BIDIR,79, H,-; +A_21_ = INPUT,94, A,-; +A_20_ = INPUT,93, A,-; +A_31_ = INPUT,4, B,-; +A_19_ = INPUT,97, A,-; +A_18_ = INPUT,95, A,-; +A_17_ = INPUT,59, F,-; +A_16_ = INPUT,96, A,-; +IPL_2_ = INPUT,68, G,-; +FC_1_ = INPUT,58, F,-; +IPL_1_ = INPUT,56, F,-; +IPL_0_ = INPUT,67, G,-; +AS_000 = BIDIR,42, E,-; +FC_0_ = INPUT,57, F,-; +UDS_000 = BIDIR,32, D,-; +LDS_000 = BIDIR,31, D,-; +A1 = INPUT,60, F,-; +nEXP_SPACE = INPUT,14,-,-; +BERR = BIDIR,41, E,-; +BG_030 = INPUT,21, C,-; +BGACK_000 = INPUT,28, D,-; +CLK_030 = INPUT,64,-,-; +CLK_000 = INPUT,11,-,-; +CLK_OSZI = INPUT,61,-,-; +CLK_DIV_OUT = OUTPUT,65, G,-; +CLK_EXP = OUTPUT,10, B,-; +FPU_CS = OUTPUT,78, H,-; +FPU_SENSE = INPUT,91, A,-; +DTACK = INPUT,30, D,-; +AVEC = OUTPUT,92, A,-; +VPA = INPUT,36,-,-; +RST = INPUT,86,-,-; +AMIGA_BUS_DATA_DIR = OUTPUT,48, E,-; +AMIGA_BUS_ENABLE_LOW = OUTPUT,20, C,-; +AMIGA_BUS_ENABLE_HIGH = OUTPUT,34, D,-; +CIIN = OUTPUT,47, E,-; +SIZE_0_ = BIDIR,70, G,-; +A_30_ = INPUT,5, B,-; +A_29_ = INPUT,6, B,-; +A_28_ = INPUT,15, C,-; +A_27_ = INPUT,16, C,-; +A_26_ = INPUT,17, C,-; +A_25_ = INPUT,18, C,-; +A_24_ = INPUT,19, C,-; +IPL_030_2_ = OUTPUT,9, B,-; +IPL_030_1_ = OUTPUT,7, B,-; +IPL_030_0_ = OUTPUT,8, B,-; +AS_030 = BIDIR,82, H,-; +RW_000 = BIDIR,80, H,-; +DS_030 = BIDIR,98, A,-; +A0 = BIDIR,69, G,-; +BG_000 = OUTPUT,29, D,-; +BGACK_030 = OUTPUT,83, H,-; +DSACK1 = OUTPUT,81, H,-; +E = OUTPUT,66, G,-; +VMA = OUTPUT,35, D,-; +RESET = OUTPUT,3, B,-; +RW = BIDIR,71, G,-; +AMIGA_ADDR_ENABLE = OUTPUT,33, D,-; +cpu_est_0_ = NODE,8, A,-; +cpu_est_1_ = NODE,8, C,-; +inst_AS_000_INT = NODE,9, C,-; +inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,2, B,-; +inst_AS_030_D0 = NODE,5, H,-; +inst_nEXP_SPACE_D0reg = NODE,4, C,-; +inst_DS_030_D0 = NODE,6, D,-; +inst_AS_030_000_SYNC = NODE,12, F,-; +inst_BGACK_030_INT_D = NODE,2, H,-; +SIZE_DMA_0_ = NODE,9, B,-; +SIZE_DMA_1_ = NODE,13, H,-; +inst_VPA_D = NODE,13, C,-; +inst_UDS_000_INT = NODE,2, G,-; +inst_LDS_000_INT = NODE,5, B,-; +inst_DTACK_D0 = NODE,11, G,-; +inst_CLK_OUT_PRE_50 = NODE,2, E,-; +inst_CLK_000_D1 = NODE,2, D,-; +inst_CLK_000_D0 = NODE,10, G,-; +inst_CLK_000_PE = NODE,9, G,-; +SM_AMIGA_7_ = NODE,0, F,-; +SM_AMIGA_5_ = NODE,8, F,-; +inst_CLK_OUT_PRE = NODE,13, E,-; +inst_CLK_000_NE = NODE,8, E,-; +CLK_000_N_SYNC_11_ = NODE,6, B,-; +CLK_000_P_SYNC_9_ = NODE,11, C,-; +cpu_est_2_ = NODE,5, G,-; +inst_CLK_000_NE_D0 = NODE,12, C,-; +SM_AMIGA_3_ = NODE,1, C,-; +SM_AMIGA_0_ = NODE,13, F,-; +inst_AMIGA_BUS_ENABLE_DMA_HIGH = NODE,6, A,-; +SM_AMIGA_6_ = NODE,4, F,-; +RESET_DLY_0_ = NODE,9, D,-; +RESET_DLY_1_ = NODE,13, D,-; +RESET_DLY_2_ = NODE,13, A,-; +RESET_DLY_3_ = NODE,9, A,-; +RESET_DLY_4_ = NODE,5, A,-; +RESET_DLY_5_ = NODE,1, A,-; +RESET_DLY_6_ = NODE,12, A,-; +RESET_DLY_7_ = NODE,11, A,-; +CLK_000_P_SYNC_0_ = NODE,7, D,-; +CLK_000_P_SYNC_1_ = NODE,6, F,-; +CLK_000_P_SYNC_2_ = NODE,3, D,-; +CLK_000_P_SYNC_3_ = NODE,7, C,-; +CLK_000_P_SYNC_4_ = NODE,7, A,-; +CLK_000_P_SYNC_5_ = NODE,3, C,-; +CLK_000_P_SYNC_6_ = NODE,14, C,-; +CLK_000_P_SYNC_7_ = NODE,3, A,-; +CLK_000_P_SYNC_8_ = NODE,14, A,-; +CLK_000_N_SYNC_0_ = NODE,14, D,-; +CLK_000_N_SYNC_1_ = NODE,10, C,-; +CLK_000_N_SYNC_2_ = NODE,7, G,-; +CLK_000_N_SYNC_3_ = NODE,10, D,-; +CLK_000_N_SYNC_4_ = NODE,10, A,-; +CLK_000_N_SYNC_5_ = NODE,3, G,-; +CLK_000_N_SYNC_6_ = NODE,6, C,-; +CLK_000_N_SYNC_7_ = NODE,2, F,-; +CLK_000_N_SYNC_8_ = NODE,14, G,-; +CLK_000_N_SYNC_9_ = NODE,6, G,-; +CLK_000_N_SYNC_10_ = NODE,13, B,-; +inst_CLK_030_H = NODE,2, A,-; +inst_DS_000_ENABLE = NODE,1, F,-; +SM_AMIGA_1_ = NODE,9, F,-; +SM_AMIGA_4_ = NODE,5, F,-; +SM_AMIGA_2_ = NODE,5, C,-; +CLK_OUT_PRE_Dreg = NODE,13, G,-; +un8_ciin = NODE,9, E,-; +state_machine_un15_clk_000_ne_i_n = NODE,2, C,-; +CIIN_0 = NODE,5, E,-; diff --git a/Logic/68030_tk.vct b/Logic/68030_tk.vct new file mode 100644 index 0000000..3244579 --- /dev/null +++ b/Logic/68030_tk.vct @@ -0,0 +1,219 @@ +[DEVICE] +Family = M4A5; +PartType = M4A5-128/64; +Package = 100TQFP; +PartNumber = M4A5-128/64-10VC; +Speed = -10; +Operating_condition = COM; +EN_Segment = No; +Pin_MC_1to1 = No; +EN_PinReserve_IO = Yes; +EN_PinReserve_BIDIR = Yes; +Voltage = 5.0; + +[REVISION] +RCS = "$Revision: 1.2 $"; +Parent = m4a5.lci; +SDS_File = m4a5.sds; +DATE = 02/01/2015; +TIME = 21:17:58; +Source_Format = Pure_VHDL; +Type = TT2; +Pre_Fit_Time = 1; + +[IGNORE ASSIGNMENTS] +Pin_Assignments = No; +Pin_Keep_Block = No; +Pin_Keep_Segment = No; +Group_Assignments = No; +Macrocell_Assignments = No; +Macrocell_Keep_Block = No; +Macrocell_Keep_Segment = No; +Pin_Reservation = No; +Block_Reservation = No; +Segment_Reservation = No; +Timing_Constraints = No; + +[CLEAR ASSIGNMENTS] +Pin_Assignments = No; +Pin_Keep_Block = No; +Pin_Keep_Segment = No; +Group_Assignments = No; +Macrocell_Assignments = No; +Macrocell_Keep_Block = No; +Macrocell_Keep_Segment = No; +Pin_Reservation = No; +Block_Reservation = No; +Segment_Reservation = No; +Timing_Constraints = No; + +[BACKANNOTATE ASSIGNMENTS] +Pin_Block = No; +Pin_Macrocell_Block = No; +Routing = No; + +[GLOBAL PROJECT OPTIMIZATION] +Balanced_Partitioning = Yes; +Spread_Placement = Yes; +Max_Pin_Percent = 100; +Max_Macrocell_Percent = 100; +Max_Blk_In_Percent = 100; + +[OPTIMIZATION OPTIONS] +Logic_Reduction = Yes; +Max_PTerm_Split = 16; +Max_PTerm_Collapse = 16; +XOR_Synthesis = Yes; +EN_XOR_Synthesis = Yes; +XOR_Gate = Yes; +Node_Collapse = Yes; +Keep_XOR = Yes; +DT_Synthesis = Yes; +Clock_PTerm = Min; +Reset_PTerm = On; +Preset_PTerm = On; +Clock_Enable_PTerm = On; +Output_Enable_PTerm = On; +EN_DT_Synthesis = Yes; +Cluster_PTerm = 5; +FF_inv = No; +EN_Use_CE = No; +Use_CE = No; +Use_Internal_COM_FB = Yes; +EN_use_Internal_COM_FB = Yes; +Set_Reset_Swap = No; +EN_Set_Reset_Swap = No; +Density = No; +DeMorgan = Yes; +T_FF = Yes; +Max_Symbols = 32; + +[FITTER GLOBAL OPTIONS] +Run_Time = 0; +Set_Reset_Dont_Care = Yes; +EN_Set_Reset_Dont_Care = Yes; +In_Reg_Optimize = Yes; +EN_In_Reg_Optimize = No; +Clock_Optimize = No; +Global_Clock_As_Pterm = No; +Show_Iterations = No; +Routing_Attempts = 2; +Conf_Unused_IOs = Out_Low; + +[HARDWARE DEVICE OPTIONS] +Zero_Hold_Time = Yes; +Signature_Word = 0; +Pull_up = Yes; +Out_Slew_Rate = SLOW,FAST,7,CLK_DIV_OUT,CLK_EXP,FPU_CS,AMIGA_BUS_DATA_DIR,AMIGA_BUS_ENABLE_LOW,AMIGA_ADDR_ENABLE,AMIGA_BUS_ENABLE_HIGH; +Device_max_fanin = 33; +Device_max_pterms = 20; +Usercode_Format = Hex; + +[PIN RESERVATIONS] +Layer = OFF; + +[LOCATION ASSIGNMENT] +Layer = OFF; +AS_030 = input,82,H,-; +A_16_ = input,96,A,-; +A_17_ = input,59,F,-; +A_18_ = input,95,A,-; +A_19_ = input,97,A,-; +BGACK_000 = input,28,D,-; +BG_030 = input,21,C,-; +CLK_000 = input,11,-,-; +CLK_030 = input,64,-,-; +CLK_OSZI = input,61,-,-; +FC_0_ = input,57,F,-; +FC_1_ = input,58,F,-; +IPL_0_ = input,67,G,-; +IPL_1_ = input,56,F,-; +IPL_2_ = input,68,G,-; +RST = input,86,-,-; +RW = input,71,G,-; +SIZE_1_ = input,79,H,-; +SIZE_0_ = input,70,G,-; +VPA = input,36,-,-; +AVEC = input,92,A,-; +BGACK_030 = input,83,H,-; +BG_000 = input,29,D,-; +CLK_DIV_OUT = input,65,G,-; +CLK_EXP = input,10,B,-; +E = input,66,G,-; +FPU_CS = input,78,H,-; +IPL_030_0_ = input,8,B,-; +IPL_030_1_ = input,7,B,-; +IPL_030_2_ = input,9,B,-; +LDS_000 = input,31,D,-; +UDS_000 = input,32,D,-; +VMA = input,35,D,-; +DTACK = input,30,D,-; +RESET = input,3,B,-; +AMIGA_BUS_DATA_DIR = input,48,E,-; +AMIGA_BUS_ENABLE_LOW = input,20,C,-; +CIIN = input,47,E,-; +A_20_ = input,93,A,-; +A_21_ = input,94,A,-; +A_22_ = input,84,H,-; +A_24_ = input,19,C,-; +A_25_ = input,18,C,-; +A_26_ = input,17,C,-; +A_27_ = input,16,C,-; +A_28_ = input,15,C,-; +A_29_ = input,6,B,-; +A_30_ = input,5,B,-; +A_31_ = input,4,B,-; +DS_030 = input,98,A,-; +BERR = input,41,E,-; +nEXP_SPACE = input,14,-,-; +A0 = input,69,G,-; +DSACK1 = input,81,H,-; +RW_000 = input,80,H,-; +AS_000 = input,42,E,-; +AMIGA_ADDR_ENABLE = input,33,D,-; +AMIGA_BUS_ENABLE_HIGH = input,34,D,-; +A_23_ = input,85,H,-; +FPU_SENSE = input,91,A,-; +A1 = input,60,F,-; + +[GROUP ASSIGNMENT] +Layer = OFF; + +[SPACE RESERVATIONS] +Layer = OFF; + +[BACKANNOTATE NETLIST] +Delay_File = SDF; +Netlist = VHDL; +VCC_GND = Cell; + +[FITTER REPORT FORMAT] +Fitter_Options = Yes; +Pinout_Diagram = No; +Pinout_Listing = Yes; +Detailed_Block_Segment_Summary = Yes; +Input_Signal_List = Yes; +Output_Signal_List = Yes; +Bidir_Signal_List = Yes; +Node_Signal_List = Yes; +Signal_Fanout_List = Yes; +Block_Segment_Fanin_List = Yes; +Postfit_Eqn = Yes; +Page_Break = Yes; + +[POWER] +Powerlevel = Low,High; +Default = High; +Low = 8,H,G,F,E,D,C,B,A; +Type = GLB; + +[SOURCE CONSTRAINT OPTION] +Import_source_constraint = Yes; +Disable_warning_message = No; + +[TIMING ANALYZER] +Last_source=; +Last_source_type=Fmax; + +[INPUT REGISTERS] + diff --git a/Logic/68030_tk.xrf b/Logic/68030_tk.xrf new file mode 100644 index 0000000..ccde5f2 --- /dev/null +++ b/Logic/68030_tk.xrf @@ -0,0 +1,16 @@ +Signal Name Cross Reference File + +ispLEVER Classic 1.7.00.05.28.13 + +Design '68030_tk' created Sun Feb 01 21:36:50 2015 + + + LEGEND: '>' Functional Block Port Separator + '/' Hierarchy Path Separator + '@' Automatically Generated Node + + +Short Name Hierarchical Name +---------- ----------------- + + *** Shortened names not required for this design. *** diff --git a/Logic/M4A5_128_64_XXVC.bsd b/Logic/BSDLISCispMACH4A5-12864100PinTQFP.BSM similarity index 100% rename from Logic/M4A5_128_64_XXVC.bsd rename to Logic/BSDLISCispMACH4A5-12864100PinTQFP.BSM diff --git a/Logic/BUS68030.edi b/Logic/BUS68030.edi new file mode 100644 index 0000000..0547797 --- /dev/null +++ b/Logic/BUS68030.edi @@ -0,0 +1,3737 @@ +(edif BUS68030 + (edifVersion 2 0 0) + (edifLevel 0) + (keywordMap (keywordLevel 0)) + (status + (written + (timeStamp 2015 2 1 21 36 45) + (author "Synopsys, Inc.") + (program "Synplify Pro" (version "G-2012.09LC-SP1 , mapper maplat, Build 621R")) + ) + ) + (external mach + (edifLevel 0) + (technology (numberDefinition )) + (cell AND2 (cellType GENERIC) + (view prim (viewType NETLIST) + (interface + (port O (direction OUTPUT)) + (port I0 (direction INPUT)) + (port I1 (direction INPUT)) + ) + ) + ) + (cell BI_DIR (cellType GENERIC) + (view prim (viewType NETLIST) + (interface + (port O (direction OUTPUT)) + (port I0 (direction INPUT)) + (port IO (direction INOUT)) + (port OE (direction INPUT)) + ) + ) + ) + (cell BUFTH (cellType GENERIC) + (view prim (viewType NETLIST) + (interface + (port O (direction OUTPUT)) + (port I0 (direction INPUT)) + (port OE (direction INPUT)) + ) + ) + ) + (cell DFF (cellType GENERIC) + (view prim (viewType NETLIST) + (interface + (port Q (direction OUTPUT)) + (port D (direction INPUT)) + (port CLK (direction INPUT)) + ) + ) + ) + (cell DFFRH (cellType GENERIC) + (view prim (viewType NETLIST) + (interface + (port Q (direction OUTPUT)) + (port D (direction INPUT)) + (port CLK (direction INPUT)) + (port R (direction INPUT)) + ) + ) + ) + (cell DFFSH (cellType GENERIC) + (view prim (viewType NETLIST) + (interface + (port Q (direction OUTPUT)) + (port D (direction INPUT)) + (port CLK (direction INPUT)) + (port S (direction INPUT)) + ) + ) + ) + (cell IBUF (cellType GENERIC) + (view prim (viewType NETLIST) + (interface + (port O (direction OUTPUT)) + (port I0 (direction INPUT)) + ) + ) + ) + (cell INV (cellType GENERIC) + (view prim (viewType NETLIST) + (interface + (port O (direction OUTPUT)) + (port I0 (direction INPUT)) + ) + ) + ) + (cell OBUF (cellType GENERIC) + (view prim (viewType NETLIST) + (interface + (port O (direction OUTPUT)) + (port I0 (direction INPUT)) + ) + ) + ) + (cell OR2 (cellType GENERIC) + (view prim (viewType NETLIST) + (interface + (port O (direction OUTPUT)) + (port I0 (direction INPUT)) + (port I1 (direction INPUT)) + ) + ) + ) + (cell XOR2 (cellType GENERIC) + (view prim (viewType NETLIST) + (interface + (port O (direction OUTPUT)) + (port I0 (direction INPUT)) + (port I1 (direction INPUT)) + ) + ) + ) + ) + (library work + (edifLevel 0) + (technology (numberDefinition )) + (cell BUS68030 (cellType GENERIC) + (view behavioral (viewType NETLIST) + (interface + (port (array (rename size "SIZE(1:0)") 2) (direction INOUT)) + (port (array (rename a "A(31:16)") 16) (direction INPUT)) + (port (array (rename ipl_030 "IPL_030(2:0)") 3) (direction OUTPUT)) + (port (array (rename ipl "IPL(2:0)") 3) (direction INPUT)) + (port (array (rename fc "FC(1:0)") 2) (direction INPUT)) + (port AS_030 (direction INOUT)) + (port AS_000 (direction INOUT)) + (port RW_000 (direction INOUT)) + (port DS_030 (direction INOUT)) + (port UDS_000 (direction INOUT)) + (port LDS_000 (direction INOUT)) + (port A0 (direction INOUT)) + (port A1 (direction INPUT)) + (port nEXP_SPACE (direction INPUT)) + (port BERR (direction INOUT)) + (port BG_030 (direction INPUT)) + (port BG_000 (direction OUTPUT)) + (port BGACK_030 (direction OUTPUT)) + (port BGACK_000 (direction INPUT)) + (port CLK_030 (direction INPUT)) + (port CLK_000 (direction INPUT)) + (port CLK_OSZI (direction INPUT)) + (port CLK_DIV_OUT (direction OUTPUT)) + (port CLK_EXP (direction OUTPUT)) + (port FPU_CS (direction OUTPUT)) + (port FPU_SENSE (direction INPUT)) + (port DSACK1 (direction OUTPUT)) + (port DTACK (direction INPUT)) + (port AVEC (direction OUTPUT)) + (port E (direction OUTPUT)) + (port VPA (direction INPUT)) + (port VMA (direction OUTPUT)) + (port RST (direction INPUT)) + (port RESET (direction OUTPUT)) + (port RW (direction INOUT)) + (port AMIGA_ADDR_ENABLE (direction OUTPUT)) + (port AMIGA_BUS_DATA_DIR (direction OUTPUT)) + (port AMIGA_BUS_ENABLE_LOW (direction OUTPUT)) + (port AMIGA_BUS_ENABLE_HIGH (direction OUTPUT)) + (port CIIN (direction OUTPUT)) + ) + (contents + (instance (rename IPL_030DFFSH_2 "IPL_030DFFSH[2]") (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance (rename SM_AMIGA_7 "SM_AMIGA[7]") (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance (rename SM_AMIGA_6 "SM_AMIGA[6]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename SM_AMIGA_5 "SM_AMIGA[5]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename SM_AMIGA_4 "SM_AMIGA[4]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename SM_AMIGA_3 "SM_AMIGA[3]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename SM_AMIGA_2 "SM_AMIGA[2]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename SM_AMIGA_1 "SM_AMIGA[1]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename SM_AMIGA_0 "SM_AMIGA[0]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename RESET_DLY_5 "RESET_DLY[5]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename RESET_DLY_6 "RESET_DLY[6]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename RESET_DLY_7 "RESET_DLY[7]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename SIZE_DMA_0 "SIZE_DMA[0]") (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance (rename SIZE_DMA_1 "SIZE_DMA[1]") (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance (rename cpu_est_0 "cpu_est[0]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename cpu_est_1 "cpu_est[1]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename cpu_est_2 "cpu_est[2]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename cpu_est_3 "cpu_est[3]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename IPL_030DFFSH_0 "IPL_030DFFSH[0]") (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance (rename IPL_030DFFSH_1 "IPL_030DFFSH[1]") (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance (rename CLK_000_N_SYNC_2 "CLK_000_N_SYNC[2]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_N_SYNC_3 "CLK_000_N_SYNC[3]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_N_SYNC_4 "CLK_000_N_SYNC[4]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_N_SYNC_5 "CLK_000_N_SYNC[5]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_N_SYNC_6 "CLK_000_N_SYNC[6]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_N_SYNC_7 "CLK_000_N_SYNC[7]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_N_SYNC_8 "CLK_000_N_SYNC[8]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_N_SYNC_9 "CLK_000_N_SYNC[9]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_N_SYNC_10 "CLK_000_N_SYNC[10]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_N_SYNC_11 "CLK_000_N_SYNC[11]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename RESET_DLY_0 "RESET_DLY[0]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename RESET_DLY_1 "RESET_DLY[1]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename RESET_DLY_2 "RESET_DLY[2]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename RESET_DLY_3 "RESET_DLY[3]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename RESET_DLY_4 "RESET_DLY[4]") (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance (rename CLK_000_P_SYNC_0 "CLK_000_P_SYNC[0]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_P_SYNC_1 "CLK_000_P_SYNC[1]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_P_SYNC_2 "CLK_000_P_SYNC[2]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_P_SYNC_3 "CLK_000_P_SYNC[3]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_P_SYNC_4 "CLK_000_P_SYNC[4]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_P_SYNC_5 "CLK_000_P_SYNC[5]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_P_SYNC_6 "CLK_000_P_SYNC[6]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_P_SYNC_7 "CLK_000_P_SYNC[7]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_P_SYNC_8 "CLK_000_P_SYNC[8]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_P_SYNC_9 "CLK_000_P_SYNC[9]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_N_SYNC_0 "CLK_000_N_SYNC[0]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_N_SYNC_1 "CLK_000_N_SYNC[1]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance LDS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance VMA_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance UDS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance RESETDFFRH (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance BG_000DFFSH (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance BGACK_030_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance AS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance DS_000_ENABLE (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance DSACK1_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance AS_000_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance CLK_030_H (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) + (instance AS_030_000_SYNC (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance AMIGA_BUS_ENABLE_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance A0_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance AMIGA_BUS_ENABLE_DMA_HIGH (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance AMIGA_BUS_ENABLE_DMA_LOW (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance RW_000_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance DS_000_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance RW_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance DS_030_D0 (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance AS_030_D0 (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance CLK_000_PE (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance nEXP_SPACE_D0 (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance DTACK_D0 (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance BGACK_030_INT_D (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance CLK_OUT_PRE_50 (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance VPA_D (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance CLK_OUT_PRE_D (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance CLK_000_D1 (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance CLK_000_NE_D0 (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance CLK_OUT_PRE (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance CLK_000_D0 (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance CLK_000_NE (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance AS_030 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) + (instance AS_000 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) + (instance RW_000 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) + (instance DS_030 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) + (instance UDS_000 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) + (instance LDS_000 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) + (instance (rename SIZE_0 "SIZE[0]") (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) + (instance (rename SIZE_1 "SIZE[1]") (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) + (instance (rename A_16 "A[16]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename A_17 "A[17]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename A_18 "A[18]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename A_19 "A[19]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename A_20 "A[20]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename A_21 "A[21]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename A_22 "A[22]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename A_23 "A[23]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename A_24 "A[24]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename A_25 "A[25]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename A_26 "A[26]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename A_27 "A[27]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename A_28 "A[28]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename A_29 "A[29]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename A_30 "A[30]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename A_31 "A[31]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance A0 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) + (instance A1 (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance nEXP_SPACE (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance BERR (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) + (instance BG_030 (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance BG_000 (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance BGACK_030 (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance BGACK_000 (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance CLK_030 (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance CLK_000 (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance CLK_OSZI (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance CLK_DIV_OUT (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance CLK_EXP (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance FPU_CS (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance FPU_SENSE (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename IPL_030_0 "IPL_030[0]") (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance (rename IPL_030_1 "IPL_030[1]") (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance (rename IPL_030_2 "IPL_030[2]") (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance (rename IPL_0 "IPL[0]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename IPL_1 "IPL[1]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename IPL_2 "IPL[2]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance DSACK1 (viewRef prim (cellRef BUFTH (libraryRef mach))) ) + (instance DTACK (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance AVEC (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance E (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance VPA (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance VMA (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance RST (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance RESET (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance RW (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) + (instance (rename FC_0 "FC[0]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance (rename FC_1 "FC[1]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance AMIGA_ADDR_ENABLE (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_LOW (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_HIGH (viewRef prim (cellRef OBUF (libraryRef mach))) ) + (instance CIIN (viewRef prim (cellRef BUFTH (libraryRef mach))) ) + (instance (rename state_machine_un10_clk_000_d0 "state_machine.un10_clk_000_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_a3_0_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un19_fpu_cs_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un19_fpu_cs_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un19_fpu_cs_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un19_fpu_cs_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un19_fpu_cs_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un19_fpu_cs (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RW_000_INT_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RW_000_INT_1_sqmuxa_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RW_000_INT_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_INT_1_sqmuxa_1_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_INT_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_ciin_10 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_ciin_11 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un12_ciin_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un12_ciin_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un12_ciin_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un12_ciin_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un12_ciin_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un12_ciin_6 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un12_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un6_bg_030_1 "state_machine.un6_bg_030_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un6_bg_030 "state_machine.un6_bg_030") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un4_clk_000_ne_d0_1_0 "pos_clk.un4_clk_000_ne_d0_1_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un4_clk_000_ne_d0 "pos_clk.un4_clk_000_ne_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un10_clk_000_d0_1 "state_machine.un10_clk_000_d0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un15_reset_dly_2 "state_machine.un15_reset_dly_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un15_reset_dly_3 "state_machine.un15_reset_dly_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un15_reset_dly_4 "state_machine.un15_reset_dly_4") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un15_reset_dly_5 "state_machine.un15_reset_dly_5") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un15_reset_dly_6 "state_machine.un15_reset_dly_6") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un15_reset_dly "state_machine.un15_reset_dly") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_ciin_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_ciin_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_ciin_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_ciin_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_ciin_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_ciin_6 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_ciin_7 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_ciin_8 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_ciin_9 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_1_0 "SM_AMIGA_ns_a3_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_3_1_0 "SM_AMIGA_ns_a3_3_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_3_2_0 "SM_AMIGA_ns_a3_3_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_3_3_0 "SM_AMIGA_ns_a3_3_3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_3_0 "SM_AMIGA_ns_a3_3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un9_clk_000_ne_1 "state_machine.un9_clk_000_ne_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un9_clk_000_ne_2 "state_machine.un9_clk_000_ne_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un9_clk_000_ne_3 "state_machine.un9_clk_000_ne_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un9_clk_000_ne_4 "state_machine.un9_clk_000_ne_4") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un9_clk_000_ne "state_machine.un9_clk_000_ne") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un19_clk_000_ne_1 "state_machine.un19_clk_000_ne_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un19_clk_000_ne_2 "state_machine.un19_clk_000_ne_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un19_clk_000_ne_3 "state_machine.un19_clk_000_ne_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un19_clk_000_ne "state_machine.un19_clk_000_ne") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un15_reset_dly_1 "state_machine.un15_reset_dly_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_i_a4_0_2 "pos_clk.cpu_est_12_i_a4_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un33_as_030_d0_1 "state_machine.un33_as_030_d0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un33_as_030_d0_2 "state_machine.un33_as_030_d0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un33_as_030_d0 "state_machine.un33_as_030_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un26_as_030_d0_1 "state_machine.un26_as_030_d0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un26_as_030_d0_2 "state_machine.un26_as_030_d0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un26_as_030_d0_3_0 "state_machine.un26_as_030_d0_3_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un26_as_030_d0 "state_machine.un26_as_030_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_1_4 "SM_AMIGA_ns_a3_1[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_4 "SM_AMIGA_ns_a3[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_1_0_0 "SM_AMIGA_ns_a3_1_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_0 "SM_AMIGA_ns_a3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_0_1_0 "SM_AMIGA_ns_a3_0_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_0_0 "SM_AMIGA_ns_a3_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_1_1_0 "SM_AMIGA_ns_a3_1_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_2_0 "SM_AMIGA_ns_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_3_0 "SM_AMIGA_ns_3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_0 "SM_AMIGA_ns[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_o3_2_1_0 "SM_AMIGA_ns_o3_2_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_o3_2_0 "SM_AMIGA_ns_o3_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un11_ds_030_d0_1 "state_machine.un11_ds_030_d0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un11_ds_030_d0 "state_machine.un11_ds_030_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_1_1 "pos_clk.cpu_est_12_0_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_2_1 "pos_clk.cpu_est_12_0_2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_1 "pos_clk.cpu_est_12_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_1_3 "pos_clk.cpu_est_12_0_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_3 "pos_clk.cpu_est_12_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_i_a4_1_2 "pos_clk.cpu_est_12_i_a4_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_i_a4_2 "pos_clk.cpu_est_12_i_a4[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_i_a4_0_1_2 "pos_clk.cpu_est_12_i_a4_0_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_i_3 "pos_clk.cpu_est_12_0_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_139_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_140_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_136_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_i_1 "pos_clk.cpu_est_12_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_134_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_133_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_135_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_o4_i_3 "pos_clk.cpu_est_12_0_o4_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_o4_i_1 "pos_clk.cpu_est_12_0_o4_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_137_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_138_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance A0_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SIZE_c_i_1 "SIZE_c_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_1_0 "SM_AMIGA_ns_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un15_reset_dly_i "state_machine.un15_reset_dly_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RESET_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un8_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un14_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un8_clk_000_pe_i "state_machine.un8_clk_000_pe_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un9_clk_000_ne_i "state_machine.un9_clk_000_ne_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un10_clk_000_pe_i "state_machine.un10_clk_000_pe_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un13_clk_000_ne_i "state_machine.un13_clk_000_ne_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un19_clk_000_ne_i "state_machine.un19_clk_000_ne_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un15_clk_000_ne_i_0 "state_machine.un15_clk_000_ne_i_0") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance BG_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un6_bg_030_i "state_machine.un6_bg_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un8_bg_030_i "state_machine.un8_bg_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un4_bgack_000_i "state_machine.un4_bgack_000_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_141_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_o3_2_i_0 "SM_AMIGA_ns_o3_2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_101_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_98_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_99_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_97_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_100_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o3_i_7 "SM_AMIGA_ns_i_o3_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_o3_0_i_0 "SM_AMIGA_ns_o3_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_114_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_108_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_109_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_4 "SM_AMIGA_ns_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_0 "SM_AMIGA_ns_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RESET_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_5 "SM_AMIGA_ns_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_113_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_112_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_6 "SM_AMIGA_ns_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_o3_i_0 "SM_AMIGA_ns_o3_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_o3_1_i_0 "SM_AMIGA_ns_o3_1_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un10_bgack_030_int_i "state_machine.un10_bgack_030_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_AMIGA_BUS_ENABLE_DMA_LOW_2_i "state_machine.AMIGA_BUS_ENABLE_DMA_LOW_2_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_AMIGA_BUS_ENABLE_DMA_HIGH_2_i "state_machine.AMIGA_BUS_ENABLE_DMA_HIGH_2_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_118_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_117_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_DS_000_DMA_3_f1_i "state_machine.DS_000_DMA_3_f1_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_INT_1_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_bgack_030_int_d_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_95_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_SM_AMIGA_7_i_0 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_102_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_103_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_1 "SM_AMIGA_ns_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_105_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_104_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_2 "SM_AMIGA_ns_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_107_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_106_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_3 "SM_AMIGA_ns_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_111_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_110_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un12_clk_000_n_sync_i "state_machine.un12_clk_000_n_sync_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename CLK_000_N_SYNC_i_10 "CLK_000_N_SYNC_i[10]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un17_clk_000_n_sync_i "state_machine.un17_clk_000_n_sync_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un3_bgack_030_int_d_i "state_machine.un3_bgack_030_int_d_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un26_as_030_d0_3 "state_machine.un26_as_030_d0_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_INT_0_r "AMIGA_BUS_ENABLE_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_INT_0_m "AMIGA_BUS_ENABLE_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_INT_0_n "AMIGA_BUS_ENABLE_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_INT_0_p "AMIGA_BUS_ENABLE_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance DSACK1_INT_0_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DSACK1_INT_0_r "DSACK1_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DSACK1_INT_0_m "DSACK1_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DSACK1_INT_0_n "DSACK1_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DSACK1_INT_0_p "DSACK1_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_000_INT_0_r "AS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_000_INT_0_m "AS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_INT_0_n "AS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_INT_0_p "AS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance DS_000_ENABLE_1_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename RW_000_INT_0_r "RW_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename RW_000_INT_0_m "RW_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RW_000_INT_0_n "RW_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RW_000_INT_0_p "RW_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance un1_amiga_bus_enable_low_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un21_fpu_cs_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un10_clk_000_d0_i "state_machine.un10_clk_000_d0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_INT_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance BGACK_030_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance BGACK_030_INT_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un3_bgack_030_int_d "state_machine.un3_bgack_030_int_d") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__r "un1_AMIGA_BUS_ENABLE_DMA_HIGH_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__m "un1_AMIGA_BUS_ENABLE_DMA_HIGH_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__n "un1_AMIGA_BUS_ENABLE_DMA_HIGH_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__p "un1_AMIGA_BUS_ENABLE_DMA_HIGH_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance DSACK1_INT_0_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un17_clk_000_n_sync "state_machine.un17_clk_000_n_sync") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un14_clk_000_n_sync_i "state_machine.un14_clk_000_n_sync_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un12_clk_000_n_sync "state_machine.un12_clk_000_n_sync") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance CLK_EXP_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un14_clk_000_n_sync "state_machine.un14_clk_000_n_sync") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename A_i_19 "A_i[19]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_18 "A_i[18]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_SM_AMIGA_7 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance I_189 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DS_000_ENABLE_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename A_i_16 "A_i[16]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_96_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_SM_AMIGA_6_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_INT_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un22_berr (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance FPU_SENSE_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un21_fpu_cs (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_bgack_030_int_d (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_188 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un2_as_000 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_6 "SM_AMIGA_ns[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_5 "SM_AMIGA_ns[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_3 "SM_AMIGA_ns[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_2 "SM_AMIGA_ns[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_1 "SM_AMIGA_ns[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_6 "SM_AMIGA_ns_a3[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_0_5 "SM_AMIGA_ns_a3_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_0_3 "SM_AMIGA_ns_a3_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_3 "SM_AMIGA_ns_a3[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_2 "SM_AMIGA_ns_a3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_0_1 "SM_AMIGA_ns_a3_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_1 "SM_AMIGA_ns_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_2_0 "SM_AMIGA_ns_a3_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_SM_AMIGA_5_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un10_bgack_030_int "state_machine.un10_bgack_030_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_DMA_LOW_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_amiga_bus_enable_low (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_DMA_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un15_bgack_030_int "state_machine.un15_bgack_030_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename CLK_030_H_0_r "CLK_030_H_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename CLK_030_H_0_m "CLK_030_H_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename CLK_030_H_0_n "CLK_030_H_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename CLK_030_H_0_p "CLK_030_H_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename state_machine_un8_bgack_030_int_i "state_machine.un8_bgack_030_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_r "AS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_m "AS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_n "AS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_p "AS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_r "DS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_m "DS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_n "DS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_p "DS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_0_2 "SM_AMIGA_ns_a3_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_0_6 "SM_AMIGA_ns_a3_0[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_o3_1_0 "SM_AMIGA_ns_o3_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance I_190 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_o3_0 "SM_AMIGA_ns_o3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_SIZE_DMA_5_1 "state_machine.SIZE_DMA_5[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un29_bgack_030_int_i "state_machine.un29_bgack_030_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_SIZE_DMA_5_0 "state_machine.SIZE_DMA_5[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_AMIGA_BUS_ENABLE_DMA_HIGH_2 "state_machine.AMIGA_BUS_ENABLE_DMA_HIGH_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance A1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_AMIGA_BUS_ENABLE_DMA_LOW_2 "state_machine.AMIGA_BUS_ENABLE_DMA_LOW_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_A0_DMA_2 "state_machine.A0_DMA_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_DMA_0_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un15_bgack_030_int_i "state_machine.un15_bgack_030_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_030_H_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_DMA_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un29_bgack_030_int "state_machine.un29_bgack_030_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance I_191 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_192 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_i_3 "cpu_est_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_030_000_SYNC_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un22_bgack_030_int_1 "state_machine.un22_bgack_030_int_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un8_bgack_030_int "state_machine.un8_bgack_030_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance nEXP_SPACE_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_194 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_a3_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un22_bgack_030_int_1_i "state_machine.un22_bgack_030_int_1_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DS_000_DMA_2_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_DMA_2_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_DMA_0_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_DS_000_DMA_3_f0 "state_machine.DS_000_DMA_3_f0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_DS_000_DMA_3_f1 "state_machine.DS_000_DMA_3_f1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance I_193 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_29 "A_i[29]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_30 "A_i[30]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_31 "A_i[31]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance G_97 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance G_99 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance G_101 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance G_103 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance G_105 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance G_107 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance G_109 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance G_111 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance (rename cpu_est_i_1 "cpu_est_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_a4_1_1_3 "pos_clk.cpu_est_12_0_a4_1_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un4_clk_000_ne_d0_1 "pos_clk.un4_clk_000_ne_d0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_i_0 "cpu_est_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_o3_0_0 "SM_AMIGA_ns_o3_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o3_7 "SM_AMIGA_ns_i_o3[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_0_1_2 "SM_AMIGA_ns_a3_0_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance CLK_000_PE_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_000_NE_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VMA_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VPA_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_030_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_24 "A_i[24]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_25 "A_i[25]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_26 "A_i[26]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_27 "A_i[27]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_28 "A_i[28]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename reset_delay_machine_un24_clk_000_ne_d0 "reset_delay_machine.un24_clk_000_ne_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un8_clk_000_pe "state_machine.un8_clk_000_pe") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un15_clk_000_ne "state_machine.un15_clk_000_ne") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un10_clk_000_pe "state_machine.un10_clk_000_pe") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un12_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un8_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un14_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un16_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RESET_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_0_4 "SM_AMIGA_ns_a3_0[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a3_5 "SM_AMIGA_ns_a3[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a3_7 "SM_AMIGA_ns_i_a3[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_4 "SM_AMIGA_ns[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_7 "SM_AMIGA_ns_i[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_ENABLE_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_AS_030_D0_2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un33_as_030_d0_i "state_machine.un33_as_030_d0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_AS_030_D0_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un26_as_030_d0_i "state_machine.un26_as_030_d0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_as_030 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance CLK_000_D1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_CLK_000_P_SYNC_3_0 "pos_clk.CLK_000_P_SYNC_3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance CLK_000_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_CLK_000_N_SYNC_2_0 "pos_clk.CLK_000_N_SYNC_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_030_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un3_ds_030_d0 "state_machine.un3_ds_030_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DTACK_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un13_clk_000_ne "state_machine.un13_clk_000_ne") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un8_bg_030 "state_machine.un8_bg_030") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un6_size (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_a4_1 "pos_clk.cpu_est_12_0_a4[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_a4_0_1 "pos_clk.cpu_est_12_0_a4_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_a4_1_1 "pos_clk.cpu_est_12_0_a4_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_a4_2_1 "pos_clk.cpu_est_12_0_a4_2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_a4_3 "pos_clk.cpu_est_12_0_a4[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_a4_0_3 "pos_clk.cpu_est_12_0_a4_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_i_2 "pos_clk.cpu_est_12_i[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_o4_1 "pos_clk.cpu_est_12_0_o4[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_o4_3 "pos_clk.cpu_est_12_0_o4[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un4_clk_000_ne_d0_1_i "pos_clk.un4_clk_000_ne_d0_1_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_i_2 "cpu_est_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_cpu_est_12_0_a4_1_3 "pos_clk.cpu_est_12_0_a4_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_0 "cpu_est_0[0]") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance (rename state_machine_un4_bgack_000 "state_machine.un4_bgack_000") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_100 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_102 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_104 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_106 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_108 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_110 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance UDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un4_uds_000 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance I_196 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un4_lds_000_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance LDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un4_lds_000 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SIZE_DMA_i_0 "SIZE_DMA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un4_size (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SIZE_DMA_i_1 "SIZE_DMA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_OUT_PRE_50_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RST_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance G_98 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_DMA_2_sqmuxa_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_0_2__r "cpu_est_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_0_2__m "cpu_est_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_2__n "cpu_est_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_2__p "cpu_est_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename cpu_est_0_3__r "cpu_est_0_3_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_0_3__m "cpu_est_0_3_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_3__n "cpu_est_0_3_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_3__p "cpu_est_0_3_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename IPL_030_0_0__r "IPL_030_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_030_0_0__m "IPL_030_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_0__n "IPL_030_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_0__p "IPL_030_0_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename IPL_030_0_1__r "IPL_030_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_030_0_1__m "IPL_030_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_1__n "IPL_030_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_1__p "IPL_030_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename IPL_030_0_2__r "IPL_030_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_030_0_2__m "IPL_030_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_2__n "IPL_030_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_2__p "IPL_030_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance un2_as_000_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un4_uds_000_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un4_lds_000_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un16_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DS_000_ENABLE_0_r "DS_000_ENABLE_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DS_000_ENABLE_0_m "DS_000_ENABLE_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_ENABLE_0_n "DS_000_ENABLE_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_ENABLE_0_p "DS_000_ENABLE_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance un1_AS_030_D0_2_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_r "AS_030_000_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_m "AS_030_000_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_n "AS_030_000_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_p "AS_030_000_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename LDS_000_INT_0_r "LDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename LDS_000_INT_0_m "LDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename LDS_000_INT_0_n "LDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename LDS_000_INT_0_p "LDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename VMA_INT_0_r "VMA_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename VMA_INT_0_m "VMA_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename VMA_INT_0_n "VMA_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename VMA_INT_0_p "VMA_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename UDS_000_INT_0_r "UDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename UDS_000_INT_0_m "UDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename UDS_000_INT_0_n "UDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename UDS_000_INT_0_p "UDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename BG_000_0_r "BG_000_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename BG_000_0_m "BG_000_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BG_000_0_n "BG_000_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BG_000_0_p "BG_000_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename BGACK_030_INT_0_r "BGACK_030_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename BGACK_030_INT_0_m "BGACK_030_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BGACK_030_INT_0_n "BGACK_030_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BGACK_030_INT_0_p "BGACK_030_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename cpu_est_0_1__r "cpu_est_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_0_1__m "cpu_est_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_1__n "cpu_est_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_1__p "cpu_est_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (net BGACK_030_INT (joined + (portRef Q (instanceRef BGACK_030_INT)) + (portRef I0 (instanceRef BGACK_030_INT_0_n)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_a3)) + (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__m)) + (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__r)) + (portRef I0 (instanceRef state_machine_un3_bgack_030_int_d)) + (portRef I0 (instanceRef BGACK_030_INT_i)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_INT_1_sqmuxa)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_INT_1_sqmuxa_1_1)) + (portRef OE (instanceRef AS_000)) + (portRef I0 (instanceRef BGACK_030)) + (portRef D (instanceRef BGACK_030_INT_D)) + (portRef OE (instanceRef LDS_000)) + (portRef OE (instanceRef RW_000)) + (portRef OE (instanceRef UDS_000)) + )) + (net VCC (joined + (portRef I0 (instanceRef AVEC)) + )) + (net (rename cpu_est_3 "cpu_est[3]") (joined + (portRef Q (instanceRef cpu_est_3)) + (portRef I0 (instanceRef cpu_est_0_3__n)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_0_a4_3)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_a4_2_1)) + (portRef I0 (instanceRef cpu_est_i_3)) + (portRef I0 (instanceRef state_machine_un19_clk_000_ne_1)) + (portRef I0 (instanceRef E)) + )) + (net VMA_INT (joined + (portRef Q (instanceRef VMA_INT)) + (portRef I0 (instanceRef VMA_INT_0_n)) + (portRef I0 (instanceRef VMA_INT_i)) + (portRef I0 (instanceRef VMA)) + )) + (net AMIGA_BUS_ENABLE_INT (joined + (portRef Q (instanceRef AMIGA_BUS_ENABLE_INT)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_INT_0_m)) + (portRef I0 (instanceRef AMIGA_ADDR_ENABLE)) + )) + (net (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_0 "un1_AMIGA_BUS_ENABLE_DMA_HIGH[0]") (joined + (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__p)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_HIGH)) + )) + (net (rename cpu_est_0 "cpu_est[0]") (joined + (portRef Q (instanceRef cpu_est_0)) + (portRef I1 (instanceRef cpu_est_0_0)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_o4_3)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_0_a4_1_1)) + (portRef I0 (instanceRef cpu_est_i_0)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_i_a4_1_2)) + (portRef I0 (instanceRef state_machine_un9_clk_000_ne_3)) + )) + (net (rename cpu_est_1 "cpu_est[1]") (joined + (portRef Q (instanceRef cpu_est_1)) + (portRef I0 (instanceRef cpu_est_0_1__n)) + (portRef I0 (instanceRef VMA_INT_0_m)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_0_o4_3)) + (portRef I0 (instanceRef pos_clk_un4_clk_000_ne_d0_1)) + (portRef I0 (instanceRef cpu_est_i_1)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_i_a4_0_1_2)) + )) + (net AS_000_INT (joined + (portRef Q (instanceRef AS_000_INT)) + (portRef I0 (instanceRef AS_000_INT_i)) + (portRef I0 (instanceRef AS_000_INT_0_m)) + )) + (net AMIGA_BUS_ENABLE_DMA_LOW (joined + (portRef Q (instanceRef AMIGA_BUS_ENABLE_DMA_LOW)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_i)) + )) + (net AS_030_D0 (joined + (portRef Q (instanceRef AS_030_D0)) + (portRef I0 (instanceRef AS_030_D0_i)) + (portRef I1 (instanceRef state_machine_un6_bg_030_1)) + )) + (net nEXP_SPACE_D0 (joined + (portRef Q (instanceRef nEXP_SPACE_D0)) + (portRef I0 (instanceRef un14_ciin)) + (portRef I0 (instanceRef nEXP_SPACE_D0_i)) + (portRef I0 (instanceRef state_machine_un33_as_030_d0_2)) + (portRef I0 (instanceRef state_machine_un6_bg_030_1)) + (portRef I1 (instanceRef state_machine_un10_clk_000_d0)) + (portRef OE (instanceRef DSACK1)) + )) + (net DS_030_D0 (joined + (portRef Q (instanceRef DS_030_D0)) + (portRef I0 (instanceRef DS_030_D0_i)) + )) + (net AS_030_000_SYNC (joined + (portRef Q (instanceRef AS_030_000_SYNC)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_m)) + (portRef I0 (instanceRef AS_030_000_SYNC_i)) + )) + (net BGACK_030_INT_D (joined + (portRef Q (instanceRef BGACK_030_INT_D)) + (portRef I0 (instanceRef BGACK_030_INT_D_i)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_INT_1_sqmuxa_1_1)) + )) + (net AS_000_DMA (joined + (portRef Q (instanceRef AS_000_DMA)) + (portRef I0 (instanceRef AS_000_DMA_0_m)) + (portRef I0 (instanceRef AS_000_DMA_i)) + (portRef I0 (instanceRef AS_030)) + )) + (net (rename SIZE_DMA_0 "SIZE_DMA[0]") (joined + (portRef Q (instanceRef SIZE_DMA_0)) + (portRef I0 (instanceRef SIZE_DMA_i_0)) + (portRef I0 (instanceRef un6_size)) + )) + (net (rename SIZE_DMA_1 "SIZE_DMA[1]") (joined + (portRef Q (instanceRef SIZE_DMA_1)) + (portRef I0 (instanceRef SIZE_DMA_i_1)) + (portRef I0 (instanceRef un4_size)) + )) + (net VPA_D (joined + (portRef Q (instanceRef VPA_D)) + (portRef I1 (instanceRef state_machine_un13_clk_000_ne)) + (portRef I0 (instanceRef VPA_D_i)) + )) + (net UDS_000_INT (joined + (portRef Q (instanceRef UDS_000_INT)) + (portRef I0 (instanceRef UDS_000_INT_0_n)) + (portRef I0 (instanceRef UDS_000_INT_i)) + )) + (net LDS_000_INT (joined + (portRef Q (instanceRef LDS_000_INT)) + (portRef I0 (instanceRef LDS_000_INT_0_n)) + (portRef I0 (instanceRef LDS_000_INT_i)) + )) + (net DTACK_D0 (joined + (portRef Q (instanceRef DTACK_D0)) + (portRef I0 (instanceRef DTACK_D0_i)) + )) + (net CLK_OUT_PRE_50 (joined + (portRef Q (instanceRef CLK_OUT_PRE_50)) + (portRef I0 (instanceRef CLK_OUT_PRE_50_i)) + (portRef D (instanceRef CLK_OUT_PRE)) + )) + (net CLK_000_D1 (joined + (portRef Q (instanceRef CLK_000_D1)) + (portRef I1 (instanceRef pos_clk_CLK_000_N_SYNC_2_0)) + (portRef I0 (instanceRef CLK_000_D1_i)) + )) + (net CLK_000_D0 (joined + (portRef Q (instanceRef CLK_000_D0)) + (portRef I0 (instanceRef CLK_000_D0_i)) + (portRef I0 (instanceRef pos_clk_CLK_000_P_SYNC_3_0)) + (portRef I1 (instanceRef state_machine_un6_bg_030)) + (portRef D (instanceRef CLK_000_D1)) + )) + (net CLK_000_PE (joined + (portRef Q (instanceRef CLK_000_PE)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_0_4)) + (portRef I0 (instanceRef state_machine_un8_clk_000_pe)) + (portRef I0 (instanceRef CLK_000_PE_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_2)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_6)) + (portRef I0 (instanceRef un1_SM_AMIGA_6_i_a3)) + )) + (net (rename SM_AMIGA_7 "SM_AMIGA[7]") (joined + (portRef Q (instanceRef SM_AMIGA_7)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_1)) + (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__m)) + (portRef I0 (instanceRef SM_AMIGA_i_7)) + (portRef I1 (instanceRef state_machine_un33_as_030_d0_1)) + )) + (net (rename SM_AMIGA_5 "SM_AMIGA[5]") (joined + (portRef Q (instanceRef SM_AMIGA_5)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_2)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_3)) + (portRef I1 (instanceRef DS_000_ENABLE_1_sqmuxa)) + (portRef I0 (instanceRef SM_AMIGA_i_5)) + )) + (net GND (joined + (portRef I0 (instanceRef BERR)) + )) + (net CLK_OUT_PRE (joined + (portRef Q (instanceRef CLK_OUT_PRE)) + (portRef D (instanceRef CLK_OUT_PRE_D)) + )) + (net CLK_000_NE (joined + (portRef Q (instanceRef CLK_000_NE)) + (portRef I1 (instanceRef IPL_030_0_2__m)) + (portRef I0 (instanceRef IPL_030_0_2__r)) + (portRef I1 (instanceRef IPL_030_0_1__m)) + (portRef I0 (instanceRef IPL_030_0_1__r)) + (portRef I1 (instanceRef IPL_030_0_0__m)) + (portRef I0 (instanceRef IPL_030_0_0__r)) + (portRef I0 (instanceRef CLK_000_NE_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_o3_7)) + (portRef I0 (instanceRef SM_AMIGA_ns_o3_0_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_3)) + (portRef I0 (instanceRef state_machine_un9_clk_000_ne_2)) + (portRef D (instanceRef CLK_000_NE_D0)) + )) + (net (rename CLK_000_N_SYNC_11 "CLK_000_N_SYNC[11]") (joined + (portRef Q (instanceRef CLK_000_N_SYNC_11)) + (portRef D (instanceRef CLK_000_NE)) + )) + (net (rename CLK_000_P_SYNC_9 "CLK_000_P_SYNC[9]") (joined + (portRef Q (instanceRef CLK_000_P_SYNC_9)) + (portRef D (instanceRef CLK_000_PE)) + )) + (net (rename cpu_est_2 "cpu_est[2]") (joined + (portRef Q (instanceRef cpu_est_2)) + (portRef I0 (instanceRef cpu_est_0_2__n)) + (portRef I0 (instanceRef cpu_est_i_2)) + (portRef I1 (instanceRef pos_clk_un4_clk_000_ne_d0_1)) + (portRef I1 (instanceRef state_machine_un19_clk_000_ne)) + (portRef I1 (instanceRef state_machine_un9_clk_000_ne_3)) + )) + (net CLK_000_NE_D0 (joined + (portRef Q (instanceRef CLK_000_NE_D0)) + (portRef I1 (instanceRef cpu_est_0_1__m)) + (portRef I0 (instanceRef cpu_est_0_1__r)) + (portRef I1 (instanceRef cpu_est_0_3__m)) + (portRef I0 (instanceRef cpu_est_0_3__r)) + (portRef I1 (instanceRef cpu_est_0_2__m)) + (portRef I0 (instanceRef cpu_est_0_2__r)) + (portRef I0 (instanceRef cpu_est_0_0)) + (portRef I0 (instanceRef reset_delay_machine_un24_clk_000_ne_d0)) + )) + (net (rename SM_AMIGA_3 "SM_AMIGA[3]") (joined + (portRef Q (instanceRef SM_AMIGA_3)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_5)) + (portRef I0 (instanceRef SM_AMIGA_i_3)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_4)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_1_0)) + )) + (net (rename SM_AMIGA_0 "SM_AMIGA[0]") (joined + (portRef Q (instanceRef SM_AMIGA_0)) + (portRef I0 (instanceRef SM_AMIGA_i_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_2_0)) + (portRef I1 (instanceRef un1_SM_AMIGA_6_i_a3)) + )) + (net AMIGA_BUS_ENABLE_DMA_HIGH (joined + (portRef Q (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH)) + (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__n)) + )) + (net RW_000_INT (joined + (portRef Q (instanceRef RW_000_INT)) + (portRef I0 (instanceRef RW_000_INT_0_m)) + (portRef I0 (instanceRef RW_000)) + )) + (net DSACK1_INT (joined + (portRef Q (instanceRef DSACK1_INT)) + (portRef I0 (instanceRef DSACK1_INT_0_m)) + (portRef I0 (instanceRef DSACK1)) + )) + (net (rename pos_clk_CLK_000_P_SYNC_3_0 "pos_clk.CLK_000_P_SYNC_3[0]") (joined + (portRef O (instanceRef pos_clk_CLK_000_P_SYNC_3_0)) + (portRef D (instanceRef CLK_000_P_SYNC_0)) + )) + (net (rename pos_clk_CLK_000_N_SYNC_2_0 "pos_clk.CLK_000_N_SYNC_2[0]") (joined + (portRef O (instanceRef pos_clk_CLK_000_N_SYNC_2_0)) + (portRef I0 (instanceRef state_machine_un10_clk_000_d0_1)) + (portRef D (instanceRef CLK_000_N_SYNC_0)) + )) + (net (rename state_machine_un4_bgack_000 "state_machine.un4_bgack_000") (joined + (portRef O (instanceRef state_machine_un4_bgack_000_i)) + (portRef I1 (instanceRef BGACK_030_INT_0_m)) + (portRef I0 (instanceRef BGACK_030_INT_0_r)) + )) + (net (rename state_machine_un3_ds_030_d0 "state_machine.un3_ds_030_d0") (joined + (portRef O (instanceRef state_machine_un3_ds_030_d0)) + (portRef I1 (instanceRef UDS_000_INT_0_m)) + (portRef I0 (instanceRef UDS_000_INT_0_r)) + (portRef I1 (instanceRef LDS_000_INT_0_m)) + (portRef I0 (instanceRef LDS_000_INT_0_r)) + )) + (net (rename SM_AMIGA_6 "SM_AMIGA[6]") (joined + (portRef Q (instanceRef SM_AMIGA_6)) + (portRef I1 (instanceRef state_machine_un3_ds_030_d0)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_1)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_2)) + (portRef I0 (instanceRef SM_AMIGA_i_6)) + )) + (net un1_amiga_bus_enable_low (joined + (portRef O (instanceRef un1_amiga_bus_enable_low)) + (portRef I0 (instanceRef un1_amiga_bus_enable_low_i)) + )) + (net un4_size (joined + (portRef O (instanceRef un4_size)) + (portRef I0 (instanceRef SIZE_1)) + )) + (net un6_size (joined + (portRef O (instanceRef un6_size)) + (portRef I0 (instanceRef SIZE_0)) + )) + (net RW_000_DMA (joined + (portRef Q (instanceRef RW_000_DMA)) + (portRef I0 (instanceRef RW)) + )) + (net (rename RESET_DLY_0 "RESET_DLY[0]") (joined + (portRef Q (instanceRef RESET_DLY_0)) + (portRef I0 (instanceRef G_98)) + (portRef I0 (instanceRef G_97)) + (portRef I0 (instanceRef state_machine_un15_reset_dly_1)) + )) + (net (rename RESET_DLY_1 "RESET_DLY[1]") (joined + (portRef Q (instanceRef RESET_DLY_1)) + (portRef I1 (instanceRef G_100)) + (portRef I1 (instanceRef G_99)) + (portRef I1 (instanceRef state_machine_un15_reset_dly_1)) + )) + (net (rename RESET_DLY_2 "RESET_DLY[2]") (joined + (portRef Q (instanceRef RESET_DLY_2)) + (portRef I1 (instanceRef G_102)) + (portRef I1 (instanceRef G_101)) + (portRef I0 (instanceRef state_machine_un15_reset_dly_2)) + )) + (net (rename RESET_DLY_3 "RESET_DLY[3]") (joined + (portRef Q (instanceRef RESET_DLY_3)) + (portRef I1 (instanceRef G_104)) + (portRef I1 (instanceRef G_103)) + (portRef I1 (instanceRef state_machine_un15_reset_dly_2)) + )) + (net (rename RESET_DLY_4 "RESET_DLY[4]") (joined + (portRef Q (instanceRef RESET_DLY_4)) + (portRef I1 (instanceRef G_106)) + (portRef I1 (instanceRef G_105)) + (portRef I0 (instanceRef state_machine_un15_reset_dly_3)) + )) + (net (rename RESET_DLY_5 "RESET_DLY[5]") (joined + (portRef Q (instanceRef RESET_DLY_5)) + (portRef I1 (instanceRef G_108)) + (portRef I1 (instanceRef G_107)) + (portRef I1 (instanceRef state_machine_un15_reset_dly_3)) + )) + (net (rename RESET_DLY_6 "RESET_DLY[6]") (joined + (portRef Q (instanceRef RESET_DLY_6)) + (portRef I1 (instanceRef G_110)) + (portRef I1 (instanceRef G_109)) + (portRef I0 (instanceRef state_machine_un15_reset_dly_4)) + )) + (net (rename RESET_DLY_7 "RESET_DLY[7]") (joined + (portRef Q (instanceRef RESET_DLY_7)) + (portRef I1 (instanceRef G_111)) + (portRef I1 (instanceRef state_machine_un15_reset_dly_4)) + )) + (net (rename state_machine_un8_bg_030 "state_machine.un8_bg_030") (joined + (portRef O (instanceRef state_machine_un8_bg_030_i)) + (portRef I1 (instanceRef BG_000_0_m)) + (portRef I0 (instanceRef BG_000_0_r)) + )) + (net (rename CLK_000_P_SYNC_0 "CLK_000_P_SYNC[0]") (joined + (portRef Q (instanceRef CLK_000_P_SYNC_0)) + (portRef D (instanceRef CLK_000_P_SYNC_1)) + )) + (net (rename CLK_000_P_SYNC_1 "CLK_000_P_SYNC[1]") (joined + (portRef Q (instanceRef CLK_000_P_SYNC_1)) + (portRef D (instanceRef CLK_000_P_SYNC_2)) + )) + (net (rename CLK_000_P_SYNC_2 "CLK_000_P_SYNC[2]") (joined + (portRef Q (instanceRef CLK_000_P_SYNC_2)) + (portRef D (instanceRef CLK_000_P_SYNC_3)) + )) + (net (rename CLK_000_P_SYNC_3 "CLK_000_P_SYNC[3]") (joined + (portRef Q (instanceRef CLK_000_P_SYNC_3)) + (portRef D (instanceRef CLK_000_P_SYNC_4)) + )) + (net (rename CLK_000_P_SYNC_4 "CLK_000_P_SYNC[4]") (joined + (portRef Q (instanceRef CLK_000_P_SYNC_4)) + (portRef D (instanceRef CLK_000_P_SYNC_5)) + )) + (net (rename CLK_000_P_SYNC_5 "CLK_000_P_SYNC[5]") (joined + (portRef Q (instanceRef CLK_000_P_SYNC_5)) + (portRef D (instanceRef CLK_000_P_SYNC_6)) + )) + (net (rename CLK_000_P_SYNC_6 "CLK_000_P_SYNC[6]") (joined + (portRef Q (instanceRef CLK_000_P_SYNC_6)) + (portRef D (instanceRef CLK_000_P_SYNC_7)) + )) + (net (rename CLK_000_P_SYNC_7 "CLK_000_P_SYNC[7]") (joined + (portRef Q (instanceRef CLK_000_P_SYNC_7)) + (portRef D (instanceRef CLK_000_P_SYNC_8)) + )) + (net (rename CLK_000_P_SYNC_8 "CLK_000_P_SYNC[8]") (joined + (portRef Q (instanceRef CLK_000_P_SYNC_8)) + (portRef D (instanceRef CLK_000_P_SYNC_9)) + )) + (net (rename CLK_000_N_SYNC_0 "CLK_000_N_SYNC[0]") (joined + (portRef Q (instanceRef CLK_000_N_SYNC_0)) + (portRef D (instanceRef CLK_000_N_SYNC_1)) + )) + (net (rename CLK_000_N_SYNC_1 "CLK_000_N_SYNC[1]") (joined + (portRef Q (instanceRef CLK_000_N_SYNC_1)) + (portRef D (instanceRef CLK_000_N_SYNC_2)) + )) + (net (rename CLK_000_N_SYNC_2 "CLK_000_N_SYNC[2]") (joined + (portRef Q (instanceRef CLK_000_N_SYNC_2)) + (portRef D (instanceRef CLK_000_N_SYNC_3)) + )) + (net (rename CLK_000_N_SYNC_3 "CLK_000_N_SYNC[3]") (joined + (portRef Q (instanceRef CLK_000_N_SYNC_3)) + (portRef D (instanceRef CLK_000_N_SYNC_4)) + )) + (net (rename CLK_000_N_SYNC_4 "CLK_000_N_SYNC[4]") (joined + (portRef Q (instanceRef CLK_000_N_SYNC_4)) + (portRef D (instanceRef CLK_000_N_SYNC_5)) + )) + (net (rename CLK_000_N_SYNC_5 "CLK_000_N_SYNC[5]") (joined + (portRef Q (instanceRef CLK_000_N_SYNC_5)) + (portRef D (instanceRef CLK_000_N_SYNC_6)) + )) + (net (rename CLK_000_N_SYNC_6 "CLK_000_N_SYNC[6]") (joined + (portRef Q (instanceRef CLK_000_N_SYNC_6)) + (portRef D (instanceRef CLK_000_N_SYNC_7)) + )) + (net (rename CLK_000_N_SYNC_7 "CLK_000_N_SYNC[7]") (joined + (portRef Q (instanceRef CLK_000_N_SYNC_7)) + (portRef D (instanceRef CLK_000_N_SYNC_8)) + )) + (net (rename CLK_000_N_SYNC_8 "CLK_000_N_SYNC[8]") (joined + (portRef Q (instanceRef CLK_000_N_SYNC_8)) + (portRef D (instanceRef CLK_000_N_SYNC_9)) + )) + (net (rename CLK_000_N_SYNC_9 "CLK_000_N_SYNC[9]") (joined + (portRef Q (instanceRef CLK_000_N_SYNC_9)) + (portRef I0 (instanceRef state_machine_un12_clk_000_n_sync)) + (portRef D (instanceRef CLK_000_N_SYNC_10)) + )) + (net (rename CLK_000_N_SYNC_10 "CLK_000_N_SYNC[10]") (joined + (portRef Q (instanceRef CLK_000_N_SYNC_10)) + (portRef I0 (instanceRef CLK_000_N_SYNC_i_10)) + (portRef D (instanceRef CLK_000_N_SYNC_11)) + )) + (net un5_ciin (joined + (portRef O (instanceRef un5_ciin)) + (portRef I0 (instanceRef un5_ciin_i)) + (portRef I0 (instanceRef CIIN)) + )) + (net DS_000_DMA (joined + (portRef Q (instanceRef DS_000_DMA)) + (portRef I0 (instanceRef DS_000_DMA_0_m)) + (portRef I0 (instanceRef DS_030)) + )) + (net A0_DMA (joined + (portRef Q (instanceRef A0_DMA)) + (portRef I0 (instanceRef A0)) + )) + (net CLK_030_H (joined + (portRef Q (instanceRef CLK_030_H)) + (portRef I0 (instanceRef state_machine_un22_bgack_030_int_1)) + (portRef I0 (instanceRef CLK_030_H_0_m)) + )) + (net (rename reset_delay_machine_un24_clk_000_ne_d0 "reset_delay_machine.un24_clk_000_ne_d0") (joined + (portRef O (instanceRef reset_delay_machine_un24_clk_000_ne_d0)) + (portRef I1 (instanceRef G_98)) + (portRef I1 (instanceRef G_97)) + )) + (net (rename state_machine_un10_clk_000_pe "state_machine.un10_clk_000_pe") (joined + (portRef O (instanceRef state_machine_un10_clk_000_pe_i)) + (portRef I1 (instanceRef VMA_INT_0_m)) + (portRef I0 (instanceRef VMA_INT_0_r)) + )) + (net un1_SM_AMIGA_7 (joined + (portRef O (instanceRef un1_SM_AMIGA_7_i_0)) + (portRef I1 (instanceRef DS_000_ENABLE_1_sqmuxa_1)) + )) + (net un2_as_000 (joined + (portRef O (instanceRef un2_as_000)) + (portRef I0 (instanceRef un2_as_000_i)) + )) + (net un4_uds_000 (joined + (portRef O (instanceRef un4_uds_000)) + (portRef I0 (instanceRef un4_uds_000_i)) + )) + (net DS_000_ENABLE (joined + (portRef Q (instanceRef DS_000_ENABLE)) + (portRef I0 (instanceRef DS_000_ENABLE_0_m)) + (portRef I0 (instanceRef un4_lds_000_1)) + )) + (net un4_lds_000 (joined + (portRef O (instanceRef un4_lds_000)) + (portRef I0 (instanceRef un4_lds_000_i)) + )) + (net (rename SM_AMIGA_1 "SM_AMIGA[1]") (joined + (portRef Q (instanceRef SM_AMIGA_1)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_o3_7)) + (portRef I0 (instanceRef SM_AMIGA_i_1)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_6)) + (portRef I0 (instanceRef DSACK1_INT_0_sqmuxa)) + )) + (net un21_fpu_cs (joined + (portRef O (instanceRef un21_fpu_cs)) + (portRef I0 (instanceRef un21_fpu_cs_i)) + )) + (net un22_berr (joined + (portRef O (instanceRef un22_berr)) + (portRef OE (instanceRef BERR)) + )) + (net un16_ciin (joined + (portRef O (instanceRef un16_ciin)) + (portRef I0 (instanceRef un16_ciin_i)) + )) + (net (rename reset_delay_machine_RESET_DLY_3_0 "reset_delay_machine.RESET_DLY_3[0]") (joined + (portRef O (instanceRef G_97)) + (portRef D (instanceRef RESET_DLY_0)) + )) + (net (rename reset_delay_machine_RESET_DLY_3_1 "reset_delay_machine.RESET_DLY_3[1]") (joined + (portRef O (instanceRef G_99)) + (portRef D (instanceRef RESET_DLY_1)) + )) + (net (rename reset_delay_machine_RESET_DLY_3_2 "reset_delay_machine.RESET_DLY_3[2]") (joined + (portRef O (instanceRef G_101)) + (portRef D (instanceRef RESET_DLY_2)) + )) + (net (rename reset_delay_machine_RESET_DLY_3_3 "reset_delay_machine.RESET_DLY_3[3]") (joined + (portRef O (instanceRef G_103)) + (portRef D (instanceRef RESET_DLY_3)) + )) + (net (rename reset_delay_machine_RESET_DLY_3_4 "reset_delay_machine.RESET_DLY_3[4]") (joined + (portRef O (instanceRef G_105)) + (portRef D (instanceRef RESET_DLY_4)) + )) + (net (rename reset_delay_machine_RESET_DLY_3_5 "reset_delay_machine.RESET_DLY_3[5]") (joined + (portRef O (instanceRef G_107)) + (portRef D (instanceRef RESET_DLY_5)) + )) + (net (rename reset_delay_machine_RESET_DLY_3_6 "reset_delay_machine.RESET_DLY_3[6]") (joined + (portRef O (instanceRef G_109)) + (portRef D (instanceRef RESET_DLY_6)) + )) + (net (rename reset_delay_machine_RESET_DLY_3_7 "reset_delay_machine.RESET_DLY_3[7]") (joined + (portRef O (instanceRef G_111)) + (portRef D (instanceRef RESET_DLY_7)) + )) + (net (rename SM_AMIGA_4 "SM_AMIGA[4]") (joined + (portRef Q (instanceRef SM_AMIGA_4)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_4)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_3)) + (portRef I0 (instanceRef SM_AMIGA_i_4)) + )) + (net (rename SM_AMIGA_2 "SM_AMIGA[2]") (joined + (portRef Q (instanceRef SM_AMIGA_2)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_5)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_6)) + (portRef I0 (instanceRef SM_AMIGA_i_2)) + )) + (net un1_AS_030_D0_2 (joined + (portRef O (instanceRef un1_AS_030_D0_2)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_m)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_r)) + )) + (net (rename state_machine_AMIGA_BUS_ENABLE_DMA_LOW_2 "state_machine.AMIGA_BUS_ENABLE_DMA_LOW_2") (joined + (portRef O (instanceRef state_machine_AMIGA_BUS_ENABLE_DMA_LOW_2_i)) + (portRef D (instanceRef AMIGA_BUS_ENABLE_DMA_LOW)) + )) + (net (rename state_machine_A0_DMA_2 "state_machine.A0_DMA_2") (joined + (portRef O (instanceRef state_machine_A0_DMA_2)) + (portRef D (instanceRef A0_DMA)) + )) + (net (rename state_machine_SIZE_DMA_5_0 "state_machine.SIZE_DMA_5[0]") (joined + (portRef O (instanceRef state_machine_SIZE_DMA_5_0)) + (portRef D (instanceRef SIZE_DMA_0)) + )) + (net (rename state_machine_SIZE_DMA_5_1 "state_machine.SIZE_DMA_5[1]") (joined + (portRef O (instanceRef state_machine_SIZE_DMA_5_1)) + (portRef D (instanceRef SIZE_DMA_1)) + )) + (net (rename state_machine_AMIGA_BUS_ENABLE_DMA_HIGH_2 "state_machine.AMIGA_BUS_ENABLE_DMA_HIGH_2") (joined + (portRef O (instanceRef state_machine_AMIGA_BUS_ENABLE_DMA_HIGH_2_i)) + (portRef D (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH)) + )) + (net DS_000_ENABLE_1_sqmuxa_1 (joined + (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa_1)) + (portRef I1 (instanceRef DS_000_ENABLE_0_m)) + (portRef I0 (instanceRef DS_000_ENABLE_0_r)) + )) + (net N_1 (joined + (portRef O (instanceRef DS_000_DMA_0_p)) + (portRef D (instanceRef DS_000_DMA)) + )) + (net N_2 (joined + (portRef O (instanceRef RW_000_INT_0_p)) + (portRef D (instanceRef RW_000_INT)) + )) + (net N_3 (joined + (portRef O (instanceRef AS_000_INT_0_p)) + (portRef D (instanceRef AS_000_INT)) + )) + (net N_4 (joined + (portRef O (instanceRef DS_000_ENABLE_0_p)) + (portRef D (instanceRef DS_000_ENABLE)) + )) + (net N_5 (joined + (portRef O (instanceRef DSACK1_INT_0_p)) + (portRef D (instanceRef DSACK1_INT)) + )) + (net N_6 (joined + (portRef O (instanceRef AS_000_DMA_0_p)) + (portRef D (instanceRef AS_000_DMA)) + )) + (net N_7 (joined + (portRef O (instanceRef CLK_030_H_0_p)) + (portRef D (instanceRef CLK_030_H)) + )) + (net N_8 (joined + (portRef O (instanceRef AS_030_000_SYNC_0_p)) + (portRef D (instanceRef AS_030_000_SYNC)) + )) + (net N_9 (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_INT_0_p)) + (portRef D (instanceRef AMIGA_BUS_ENABLE_INT)) + )) + (net N_10 (joined + (portRef O (instanceRef LDS_000_INT_0_p)) + (portRef D (instanceRef LDS_000_INT)) + )) + (net N_11 (joined + (portRef O (instanceRef VMA_INT_0_p)) + (portRef D (instanceRef VMA_INT)) + )) + (net N_12 (joined + (portRef O (instanceRef UDS_000_INT_0_p)) + (portRef D (instanceRef UDS_000_INT)) + )) + (net N_13 (joined + (portRef O (instanceRef RESET_0_i)) + (portRef D (instanceRef RESETDFFRH)) + )) + (net N_14 (joined + (portRef O (instanceRef BG_000_0_p)) + (portRef D (instanceRef BG_000DFFSH)) + )) + (net N_15 (joined + (portRef O (instanceRef BGACK_030_INT_0_p)) + (portRef D (instanceRef BGACK_030_INT)) + )) + (net N_16 (joined + (portRef O (instanceRef cpu_est_0_0)) + (portRef D (instanceRef cpu_est_0)) + )) + (net N_17 (joined + (portRef O (instanceRef cpu_est_0_1__p)) + (portRef D (instanceRef cpu_est_1)) + )) + (net N_18 (joined + (portRef O (instanceRef cpu_est_0_2__p)) + (portRef D (instanceRef cpu_est_2)) + )) + (net N_19 (joined + (portRef O (instanceRef cpu_est_0_3__p)) + (portRef D (instanceRef cpu_est_3)) + )) + (net N_20 (joined + (portRef O (instanceRef IPL_030_0_0__p)) + (portRef D (instanceRef IPL_030DFFSH_0)) + )) + (net N_21 (joined + (portRef O (instanceRef IPL_030_0_1__p)) + (portRef D (instanceRef IPL_030DFFSH_1)) + )) + (net N_22 (joined + (portRef O (instanceRef IPL_030_0_2__p)) + (portRef D (instanceRef IPL_030DFFSH_2)) + )) + (net (rename SM_AMIGA_ns_0 "SM_AMIGA_ns[0]") (joined + (portRef O (instanceRef SM_AMIGA_ns_i_0)) + (portRef D (instanceRef SM_AMIGA_7)) + )) + (net (rename SM_AMIGA_ns_1 "SM_AMIGA_ns[1]") (joined + (portRef O (instanceRef SM_AMIGA_ns_i_1)) + (portRef D (instanceRef SM_AMIGA_6)) + )) + (net (rename SM_AMIGA_ns_2 "SM_AMIGA_ns[2]") (joined + (portRef O (instanceRef SM_AMIGA_ns_i_2)) + (portRef D (instanceRef SM_AMIGA_5)) + )) + (net (rename SM_AMIGA_ns_3 "SM_AMIGA_ns[3]") (joined + (portRef O (instanceRef SM_AMIGA_ns_i_3)) + (portRef D (instanceRef SM_AMIGA_4)) + )) + (net (rename SM_AMIGA_ns_4 "SM_AMIGA_ns[4]") (joined + (portRef O (instanceRef SM_AMIGA_ns_i_4)) + (portRef D (instanceRef SM_AMIGA_3)) + )) + (net (rename SM_AMIGA_ns_5 "SM_AMIGA_ns[5]") (joined + (portRef O (instanceRef SM_AMIGA_ns_i_5)) + (portRef D (instanceRef SM_AMIGA_2)) + )) + (net (rename SM_AMIGA_ns_6 "SM_AMIGA_ns[6]") (joined + (portRef O (instanceRef SM_AMIGA_ns_i_6)) + (portRef D (instanceRef SM_AMIGA_1)) + )) + (net (rename pos_clk_cpu_est_12_1 "pos_clk.cpu_est_12[1]") (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_i_1)) + (portRef I0 (instanceRef cpu_est_0_1__m)) + )) + (net (rename pos_clk_cpu_est_12_3 "pos_clk.cpu_est_12[3]") (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_i_3)) + (portRef I0 (instanceRef cpu_est_0_3__m)) + )) + (net N_144 (joined + (portRef O (instanceRef G_98)) + (portRef I0 (instanceRef G_100)) + (portRef I0 (instanceRef G_99)) + )) + (net N_147 (joined + (portRef O (instanceRef G_100)) + (portRef I0 (instanceRef G_102)) + (portRef I0 (instanceRef G_101)) + )) + (net N_149 (joined + (portRef O (instanceRef G_102)) + (portRef I0 (instanceRef G_104)) + (portRef I0 (instanceRef G_103)) + )) + (net N_151 (joined + (portRef O (instanceRef G_104)) + (portRef I0 (instanceRef G_106)) + (portRef I0 (instanceRef G_105)) + )) + (net N_153 (joined + (portRef O (instanceRef G_106)) + (portRef I0 (instanceRef G_108)) + (portRef I0 (instanceRef G_107)) + )) + (net N_155 (joined + (portRef O (instanceRef G_108)) + (portRef I0 (instanceRef G_110)) + (portRef I0 (instanceRef G_109)) + )) + (net N_157 (joined + (portRef O (instanceRef G_110)) + (portRef I0 (instanceRef G_111)) + )) + (net un4_uds_000_1 (joined + (portRef O (instanceRef un4_lds_000_1)) + (portRef I1 (instanceRef un4_lds_000)) + (portRef I1 (instanceRef un4_uds_000)) + )) + (net DS_000_DMA_2_sqmuxa_1 (joined + (portRef O (instanceRef DS_000_DMA_2_sqmuxa_1)) + (portRef I0 (instanceRef DS_000_DMA_2_sqmuxa_1_i)) + (portRef I0 (instanceRef DS_000_DMA_2_sqmuxa)) + )) + (net N_133 (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_a4_1)) + (portRef I0 (instanceRef N_133_i)) + )) + (net N_131 (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_o4_i_1)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_a4_1)) + )) + (net N_134 (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_a4_0_1)) + (portRef I0 (instanceRef N_134_i)) + )) + (net N_135 (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_a4_1_1)) + (portRef I0 (instanceRef N_135_i)) + )) + (net N_136 (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_a4_2_1)) + (portRef I0 (instanceRef N_136_i)) + )) + (net (rename pos_clk_un4_clk_000_ne_d0_1 "pos_clk.un4_clk_000_ne_d0_1") (joined + (portRef O (instanceRef pos_clk_un4_clk_000_ne_d0_1)) + (portRef I0 (instanceRef pos_clk_un4_clk_000_ne_d0_1_i)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_0_a4_2_1)) + (portRef I0 (instanceRef pos_clk_un4_clk_000_ne_d0_1_0)) + )) + (net N_139 (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_a4_3)) + (portRef I0 (instanceRef N_139_i)) + )) + (net N_132 (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_o4_i_3)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_a4_3)) + )) + (net N_140 (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_a4_0_3)) + (portRef I0 (instanceRef N_140_i)) + )) + (net N_137 (joined + (portRef O (instanceRef pos_clk_cpu_est_12_i_a4_2)) + (portRef I0 (instanceRef N_137_i)) + )) + (net N_138 (joined + (portRef O (instanceRef pos_clk_cpu_est_12_i_a4_0_2)) + (portRef I0 (instanceRef N_138_i)) + )) + (net N_141 (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_a4_1_3)) + (portRef I0 (instanceRef N_141_i)) + )) + (net N_141_1 (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_a4_1_1_3)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_a4_1_3)) + (portRef I1 (instanceRef state_machine_un19_clk_000_ne_1)) + )) + (net un1_AS_030_D0_2_1 (joined + (portRef O (instanceRef un1_AS_030_D0_2_1)) + (portRef I0 (instanceRef un1_AS_030_D0_2_1_i)) + (portRef I1 (instanceRef un1_AS_030_D0_2)) + (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa_1)) + (portRef I1 (instanceRef AS_000_INT_1_sqmuxa)) + (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa)) + (portRef I1 (instanceRef RW_000_INT_1_sqmuxa_2)) + )) + (net (rename state_machine_un33_as_030_d0 "state_machine.un33_as_030_d0") (joined + (portRef O (instanceRef state_machine_un33_as_030_d0)) + (portRef I0 (instanceRef state_machine_un33_as_030_d0_i)) + )) + (net (rename state_machine_un26_as_030_d0 "state_machine.un26_as_030_d0") (joined + (portRef O (instanceRef state_machine_un26_as_030_d0)) + (portRef I0 (instanceRef state_machine_un26_as_030_d0_i)) + )) + (net (rename state_machine_un13_clk_000_ne "state_machine.un13_clk_000_ne") (joined + (portRef O (instanceRef state_machine_un13_clk_000_ne)) + (portRef I0 (instanceRef state_machine_un13_clk_000_ne_i)) + )) + (net (rename state_machine_un6_bg_030 "state_machine.un6_bg_030") (joined + (portRef O (instanceRef state_machine_un6_bg_030)) + (portRef I0 (instanceRef state_machine_un6_bg_030_i)) + )) + (net (rename pos_clk_un4_clk_000_ne_d0 "pos_clk.un4_clk_000_ne_d0") (joined + (portRef O (instanceRef pos_clk_un4_clk_000_ne_d0)) + (portRef I1 (instanceRef state_machine_un8_clk_000_pe)) + (portRef I1 (instanceRef reset_delay_machine_un24_clk_000_ne_d0)) + )) + (net (rename state_machine_un8_clk_000_pe "state_machine.un8_clk_000_pe") (joined + (portRef O (instanceRef state_machine_un8_clk_000_pe)) + (portRef I0 (instanceRef state_machine_un8_clk_000_pe_i)) + )) + (net (rename state_machine_un15_clk_000_ne "state_machine.un15_clk_000_ne") (joined + (portRef O (instanceRef state_machine_un15_clk_000_ne_i_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_o3_0_0)) + )) + (net (rename state_machine_un19_clk_000_ne "state_machine.un19_clk_000_ne") (joined + (portRef O (instanceRef state_machine_un19_clk_000_ne)) + (portRef I0 (instanceRef state_machine_un19_clk_000_ne_i)) + )) + (net (rename state_machine_un9_clk_000_ne "state_machine.un9_clk_000_ne") (joined + (portRef O (instanceRef state_machine_un9_clk_000_ne)) + (portRef I0 (instanceRef state_machine_un9_clk_000_ne_i)) + )) + (net un12_ciin (joined + (portRef O (instanceRef un12_ciin)) + (portRef I0 (instanceRef un12_ciin_i)) + )) + (net un8_ciin (joined + (portRef O (instanceRef un8_ciin)) + (portRef I0 (instanceRef un8_ciin_i)) + )) + (net un14_ciin (joined + (portRef O (instanceRef un14_ciin_i)) + (portRef I1 (instanceRef un16_ciin)) + )) + (net (rename state_machine_un15_reset_dly "state_machine.un15_reset_dly") (joined + (portRef O (instanceRef state_machine_un15_reset_dly)) + (portRef I0 (instanceRef state_machine_un15_reset_dly_i)) + )) + (net N_100 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_2_0)) + (portRef I0 (instanceRef N_100_i)) + )) + (net (rename state_machine_un10_clk_000_d0 "state_machine.un10_clk_000_d0") (joined + (portRef O (instanceRef state_machine_un10_clk_000_d0)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_1)) + (portRef I0 (instanceRef state_machine_un10_clk_000_d0_i)) + )) + (net N_109 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_0_4)) + (portRef I0 (instanceRef N_109_i)) + )) + (net N_90 (joined + (portRef O (instanceRef SM_AMIGA_ns_o3_0_i_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_1_1_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_1_4)) + )) + (net N_110 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_5)) + (portRef I0 (instanceRef N_110_i)) + )) + (net N_114 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_a3_7)) + (portRef I0 (instanceRef N_114_i)) + )) + (net N_94 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_o3_i_7)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_a3_7)) + )) + (net N_108 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_4)) + (portRef I0 (instanceRef N_108_i)) + )) + (net N_91 (joined + (portRef O (instanceRef SM_AMIGA_ns_o3_1_i_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_0_1_0)) + )) + (net N_97 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_0)) + (portRef I0 (instanceRef N_97_i)) + )) + (net N_98 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_0_0)) + (portRef I0 (instanceRef N_98_i)) + )) + (net N_99 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_1_0)) + (portRef I0 (instanceRef N_99_i)) + )) + (net N_101 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_3_0)) + (portRef I0 (instanceRef N_101_i)) + )) + (net N_93 (joined + (portRef O (instanceRef SM_AMIGA_ns_o3_2_i_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_1_0_0)) + )) + (net N_113_1 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_0_1_2)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_0_6)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_0_2)) + )) + (net un19_fpu_cs_4 (joined + (portRef O (instanceRef state_machine_un26_as_030_d0_3)) + (portRef I1 (instanceRef state_machine_un26_as_030_d0)) + (portRef I1 (instanceRef un19_fpu_cs_5)) + )) + (net (rename state_machine_un22_bgack_030_int_1 "state_machine.un22_bgack_030_int_1") (joined + (portRef O (instanceRef state_machine_un22_bgack_030_int_1)) + (portRef I0 (instanceRef state_machine_un22_bgack_030_int_1_i)) + )) + (net (rename state_machine_un8_bgack_030_int "state_machine.un8_bgack_030_int") (joined + (portRef O (instanceRef state_machine_un8_bgack_030_int)) + (portRef I1 (instanceRef state_machine_DS_000_DMA_3_f1)) + (portRef I1 (instanceRef DS_000_DMA_2_sqmuxa_1)) + (portRef I1 (instanceRef AS_000_DMA_1_sqmuxa)) + (portRef I0 (instanceRef CLK_030_H_1_sqmuxa)) + (portRef I1 (instanceRef DS_000_DMA_0_sqmuxa)) + (portRef I1 (instanceRef state_machine_A0_DMA_2)) + (portRef I1 (instanceRef state_machine_AMIGA_BUS_ENABLE_DMA_LOW_2)) + (portRef I1 (instanceRef state_machine_AMIGA_BUS_ENABLE_DMA_HIGH_2)) + (portRef I0 (instanceRef state_machine_SIZE_DMA_5_0)) + (portRef I0 (instanceRef state_machine_SIZE_DMA_5_1)) + (portRef I0 (instanceRef state_machine_un8_bgack_030_int_i)) + (portRef I0 (instanceRef CLK_030_H_0_n)) + )) + (net N_118_1 (joined + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_0_a3_0_1)) + (portRef I0 (instanceRef state_machine_un8_bgack_030_int)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_a3_0_1_0)) + )) + (net (rename state_machine_un10_bgack_030_int "state_machine.un10_bgack_030_int") (joined + (portRef O (instanceRef state_machine_un10_bgack_030_int_i)) + (portRef I1 (instanceRef state_machine_un8_bgack_030_int)) + )) + (net N_118 (joined + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_0_a3_0)) + (portRef I0 (instanceRef N_118_i)) + )) + (net DS_000_DMA_2_sqmuxa (joined + (portRef O (instanceRef DS_000_DMA_2_sqmuxa)) + (portRef I1 (instanceRef DS_000_DMA_0_m)) + (portRef I0 (instanceRef DS_000_DMA_0_r)) + )) + (net (rename state_machine_DS_000_DMA_3 "state_machine.DS_000_DMA_3") (joined + (portRef O (instanceRef state_machine_DS_000_DMA_3_f0)) + (portRef I0 (instanceRef DS_000_DMA_0_n)) + )) + (net DS_000_DMA_0_sqmuxa (joined + (portRef O (instanceRef DS_000_DMA_0_sqmuxa)) + (portRef I0 (instanceRef DS_000_DMA_0_sqmuxa_i)) + )) + (net (rename state_machine_DS_000_DMA_3_f1 "state_machine.DS_000_DMA_3_f1") (joined + (portRef O (instanceRef state_machine_DS_000_DMA_3_f1_i)) + (portRef I1 (instanceRef state_machine_DS_000_DMA_3_f0)) + )) + (net N_117 (joined + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_0_a3)) + (portRef I0 (instanceRef N_117_i)) + )) + (net (rename state_machine_un29_bgack_030_int "state_machine.un29_bgack_030_int") (joined + (portRef O (instanceRef state_machine_un29_bgack_030_int)) + (portRef I0 (instanceRef state_machine_un29_bgack_030_int_i)) + (portRef I1 (instanceRef state_machine_SIZE_DMA_5_1)) + )) + (net CLK_030_H_1_sqmuxa (joined + (portRef O (instanceRef CLK_030_H_1_sqmuxa)) + (portRef I1 (instanceRef CLK_030_H_0_m)) + (portRef I0 (instanceRef CLK_030_H_0_r)) + )) + (net (rename state_machine_un15_bgack_030_int "state_machine.un15_bgack_030_int") (joined + (portRef O (instanceRef state_machine_un15_bgack_030_int)) + (portRef I0 (instanceRef state_machine_un15_bgack_030_int_i)) + )) + (net AS_000_DMA_1_sqmuxa (joined + (portRef O (instanceRef AS_000_DMA_1_sqmuxa)) + (portRef I1 (instanceRef AS_000_DMA_0_m)) + (portRef I0 (instanceRef AS_000_DMA_0_r)) + )) + (net N_105 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_0_2)) + (portRef I0 (instanceRef N_105_i)) + )) + (net N_113 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_0_6)) + (portRef I0 (instanceRef N_113_i)) + )) + (net N_89 (joined + (portRef O (instanceRef SM_AMIGA_ns_o3_i_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_2_0)) + )) + (net N_112 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_6)) + (portRef I0 (instanceRef N_112_i)) + )) + (net N_111 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_0_5)) + (portRef I0 (instanceRef N_111_i)) + )) + (net N_106 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_3)) + (portRef I0 (instanceRef N_106_i)) + )) + (net N_107 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_0_3)) + (portRef I0 (instanceRef N_107_i)) + )) + (net N_104 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_2)) + (portRef I0 (instanceRef N_104_i)) + )) + (net N_102 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_1)) + (portRef I0 (instanceRef N_102_i)) + )) + (net N_103 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_0_1)) + (portRef I0 (instanceRef N_103_i)) + )) + (net N_95 (joined + (portRef O (instanceRef un1_SM_AMIGA_5_0_a3)) + (portRef I0 (instanceRef N_95_i)) + )) + (net DS_000_ENABLE_1_sqmuxa (joined + (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa)) + (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa_i)) + )) + (net un19_fpu_cs (joined + (portRef O (instanceRef un19_fpu_cs)) + (portRef I1 (instanceRef un21_fpu_cs)) + (portRef I1 (instanceRef un22_berr)) + )) + (net RW_000_INT_1_sqmuxa (joined + (portRef O (instanceRef RW_000_INT_1_sqmuxa)) + (portRef I1 (instanceRef RW_000_INT_0_m)) + (portRef I0 (instanceRef RW_000_INT_0_r)) + )) + (net N_96 (joined + (portRef O (instanceRef un1_SM_AMIGA_6_i_a3)) + (portRef I0 (instanceRef N_96_i)) + )) + (net DSACK1_INT_1_sqmuxa (joined + (portRef O (instanceRef DSACK1_INT_1_sqmuxa)) + (portRef I1 (instanceRef DSACK1_INT_0_m)) + (portRef I0 (instanceRef DSACK1_INT_0_r)) + )) + (net DSACK1_INT_0_sqmuxa (joined + (portRef O (instanceRef DSACK1_INT_0_sqmuxa)) + (portRef I0 (instanceRef DSACK1_INT_0_sqmuxa_i)) + )) + (net AS_000_INT_1_sqmuxa (joined + (portRef O (instanceRef AS_000_INT_1_sqmuxa)) + (portRef I1 (instanceRef AS_000_INT_0_m)) + (portRef I0 (instanceRef AS_000_INT_0_r)) + )) + (net un1_bgack_030_int_d (joined + (portRef O (instanceRef un1_bgack_030_int_d_i)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_INT_0_n)) + )) + (net AMIGA_BUS_ENABLE_INT_1_sqmuxa (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_INT_1_sqmuxa)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_INT_1_sqmuxa_i)) + )) + (net (rename state_machine_un3_bgack_030_int_d "state_machine.un3_bgack_030_int_d") (joined + (portRef O (instanceRef state_machine_un3_bgack_030_int_d)) + (portRef I0 (instanceRef state_machine_un3_bgack_030_int_d_i)) + )) + (net AMIGA_BUS_ENABLE_INT_1_sqmuxa_1 (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_INT_1_sqmuxa_1)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_INT_0_m)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_INT_0_r)) + )) + (net (rename state_machine_un17_clk_000_n_sync "state_machine.un17_clk_000_n_sync") (joined + (portRef O (instanceRef state_machine_un17_clk_000_n_sync_i)) + (portRef I1 (instanceRef DSACK1_INT_0_sqmuxa)) + )) + (net (rename state_machine_un12_clk_000_n_sync "state_machine.un12_clk_000_n_sync") (joined + (portRef O (instanceRef state_machine_un12_clk_000_n_sync)) + (portRef I0 (instanceRef state_machine_un12_clk_000_n_sync_i)) + )) + (net (rename state_machine_un14_clk_000_n_sync "state_machine.un14_clk_000_n_sync") (joined + (portRef O (instanceRef state_machine_un14_clk_000_n_sync)) + (portRef I0 (instanceRef state_machine_un14_clk_000_n_sync_i)) + )) + (net un1_amiga_bus_enable_low_i (joined + (portRef O (instanceRef un1_amiga_bus_enable_low_i)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_LOW)) + )) + (net un21_fpu_cs_i (joined + (portRef O (instanceRef un21_fpu_cs_i)) + (portRef I0 (instanceRef FPU_CS)) + )) + (net DS_000_ENABLE_1_sqmuxa_i (joined + (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa_i)) + (portRef I0 (instanceRef un1_SM_AMIGA_7)) + (portRef I0 (instanceRef RW_000_INT_0_n)) + )) + (net (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (joined + (portRef O (instanceRef SM_AMIGA_i_5)) + (portRef I1 (instanceRef SM_AMIGA_ns_o3_1_0)) + (portRef I1 (instanceRef un1_SM_AMIGA_5_0_a3)) + (portRef I0 (instanceRef AS_000_INT_1_sqmuxa)) + (portRef I0 (instanceRef AS_000_INT_0_n)) + (portRef I1 (instanceRef RW_000_INT_1_sqmuxa_1)) + )) + (net DSACK1_INT_0_sqmuxa_i (joined + (portRef O (instanceRef DSACK1_INT_0_sqmuxa_i)) + (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa)) + (portRef I0 (instanceRef DSACK1_INT_0_n)) + )) + (net (rename A_i_19 "A_i[19]") (joined + (portRef O (instanceRef A_i_19)) + (portRef I1 (instanceRef state_machine_un26_as_030_d0_3)) + )) + (net (rename A_i_18 "A_i[18]") (joined + (portRef O (instanceRef A_i_18)) + (portRef I0 (instanceRef state_machine_un26_as_030_d0_3)) + )) + (net CLK_EXP_i (joined + (portRef O (instanceRef CLK_EXP_i)) + (portRef I1 (instanceRef state_machine_un14_clk_000_n_sync)) + )) + (net (rename state_machine_un14_clk_000_n_sync_i "state_machine.un14_clk_000_n_sync_i") (joined + (portRef O (instanceRef state_machine_un14_clk_000_n_sync_i)) + (portRef I1 (instanceRef state_machine_un12_clk_000_n_sync)) + )) + (net BGACK_030_INT_D_i (joined + (portRef O (instanceRef BGACK_030_INT_D_i)) + (portRef I1 (instanceRef state_machine_un3_bgack_030_int_d)) + )) + (net BGACK_030_INT_i (joined + (portRef O (instanceRef BGACK_030_INT_i)) + (portRef I0 (instanceRef un1_as_030)) + (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_0_a3_0_1)) + (portRef I1 (instanceRef un1_amiga_bus_enable_low)) + (portRef OE (instanceRef RW)) + )) + (net (rename state_machine_un10_clk_000_d0_i "state_machine.un10_clk_000_d0_i") (joined + (portRef O (instanceRef state_machine_un10_clk_000_d0_i)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_INT_1_sqmuxa)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_3_0)) + )) + (net (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (joined + (portRef O (instanceRef SM_AMIGA_i_7)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_INT_1_sqmuxa_1)) + (portRef I0 (instanceRef RW_000_INT_1_sqmuxa_2)) + )) + (net AS_000_INT_i (joined + (portRef O (instanceRef AS_000_INT_i)) + (portRef I0 (instanceRef un2_as_000)) + )) + (net AS_030_i (joined + (portRef O (instanceRef I_188)) + (portRef I0 (instanceRef un8_ciin)) + (portRef I1 (instanceRef un2_as_000)) + (portRef I0 (instanceRef un19_fpu_cs_1)) + )) + (net FPU_SENSE_i (joined + (portRef O (instanceRef FPU_SENSE_i)) + (portRef I0 (instanceRef un21_fpu_cs)) + )) + (net N_96_i (joined + (portRef O (instanceRef N_96_i)) + (portRef I0 (instanceRef RW_000_INT_1_sqmuxa_1)) + )) + (net (rename A_i_16 "A_i[16]") (joined + (portRef O (instanceRef A_i_16)) + (portRef I1 (instanceRef state_machine_un26_as_030_d0_1)) + (portRef I0 (instanceRef un19_fpu_cs_2)) + )) + (net RW_i (joined + (portRef O (instanceRef I_189)) + (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa)) + )) + (net (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (joined + (portRef O (instanceRef SM_AMIGA_i_3)) + (portRef I0 (instanceRef un1_SM_AMIGA_5_0_a3)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_3_2_0)) + )) + (net BERR_i (joined + (portRef O (instanceRef I_190)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_1_1_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_1_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_1_0_0)) + )) + (net (rename state_machine_un8_bgack_030_int_i "state_machine.un8_bgack_030_int_i") (joined + (portRef O (instanceRef state_machine_un8_bgack_030_int_i)) + (portRef I0 (instanceRef AS_000_DMA_0_n)) + )) + (net AS_000_DMA_i (joined + (portRef O (instanceRef AS_000_DMA_i)) + (portRef I0 (instanceRef state_machine_DS_000_DMA_3_f1)) + (portRef I0 (instanceRef state_machine_un15_bgack_030_int)) + )) + (net CLK_030_i (joined + (portRef O (instanceRef CLK_030_i)) + (portRef I0 (instanceRef AS_000_DMA_1_sqmuxa)) + (portRef I1 (instanceRef state_machine_un15_bgack_030_int)) + )) + (net AMIGA_BUS_ENABLE_DMA_LOW_i (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_i)) + (portRef I0 (instanceRef un1_amiga_bus_enable_low)) + )) + (net UDS_000_i (joined + (portRef O (instanceRef I_191)) + (portRef I1 (instanceRef state_machine_un29_bgack_030_int)) + )) + (net LDS_000_i (joined + (portRef O (instanceRef I_192)) + (portRef I0 (instanceRef state_machine_un29_bgack_030_int)) + )) + (net (rename state_machine_un15_bgack_030_int_i "state_machine.un15_bgack_030_int_i") (joined + (portRef O (instanceRef state_machine_un15_bgack_030_int_i)) + (portRef I1 (instanceRef CLK_030_H_1_sqmuxa)) + )) + (net A1_i (joined + (portRef O (instanceRef A1_i)) + (portRef I0 (instanceRef state_machine_AMIGA_BUS_ENABLE_DMA_HIGH_2)) + )) + (net (rename state_machine_un29_bgack_030_int_i "state_machine.un29_bgack_030_int_i") (joined + (portRef O (instanceRef state_machine_un29_bgack_030_int_i)) + (portRef I1 (instanceRef state_machine_SIZE_DMA_5_0)) + )) + (net RW_000_i (joined + (portRef O (instanceRef I_193)) + (portRef I0 (instanceRef DS_000_DMA_2_sqmuxa_1)) + (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_0_a3)) + )) + (net DS_000_DMA_0_sqmuxa_i (joined + (portRef O (instanceRef DS_000_DMA_0_sqmuxa_i)) + (portRef I0 (instanceRef state_machine_DS_000_DMA_3_f0)) + )) + (net (rename state_machine_un22_bgack_030_int_1_i "state_machine.un22_bgack_030_int_1_i") (joined + (portRef O (instanceRef state_machine_un22_bgack_030_int_1_i)) + (portRef I1 (instanceRef DS_000_DMA_2_sqmuxa)) + )) + (net AS_000_i (joined + (portRef O (instanceRef I_194)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_a3_0_1)) + )) + (net nEXP_SPACE_D0_i (joined + (portRef O (instanceRef nEXP_SPACE_D0_i)) + (portRef I1 (instanceRef un1_as_030)) + (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_0_a3_0)) + )) + (net AS_030_000_SYNC_i (joined + (portRef O (instanceRef AS_030_000_SYNC_i)) + (portRef I1 (instanceRef state_machine_un10_clk_000_d0_1)) + )) + (net (rename cpu_est_i_0 "cpu_est_i[0]") (joined + (portRef O (instanceRef cpu_est_i_0)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_0_a4_1)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_a4_1_1_3)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_i_a4_0_1_2)) + (portRef I1 (instanceRef pos_clk_un4_clk_000_ne_d0_1_0)) + )) + (net (rename cpu_est_i_3 "cpu_est_i[3]") (joined + (portRef O (instanceRef cpu_est_i_3)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_0_o4_1)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_0_a4_0_1)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_i_a4_1_2)) + (portRef I1 (instanceRef state_machine_un9_clk_000_ne_1)) + (portRef I1 (instanceRef pos_clk_un4_clk_000_ne_d0)) + )) + (net (rename cpu_est_i_1 "cpu_est_i[1]") (joined + (portRef O (instanceRef cpu_est_i_1)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_o4_1)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_0_a4_1_1_3)) + (portRef I0 (instanceRef state_machine_un9_clk_000_ne_1)) + )) + (net (rename A_i_30 "A_i[30]") (joined + (portRef O (instanceRef A_i_30)) + (portRef I0 (instanceRef un12_ciin_4)) + (portRef I1 (instanceRef un5_ciin_11)) + )) + (net (rename A_i_31 "A_i[31]") (joined + (portRef O (instanceRef A_i_31)) + (portRef I0 (instanceRef un5_ciin_5)) + (portRef I1 (instanceRef un12_ciin_4)) + )) + (net (rename A_i_28 "A_i[28]") (joined + (portRef O (instanceRef A_i_28)) + (portRef I0 (instanceRef un5_ciin_6)) + (portRef I0 (instanceRef un12_ciin_3)) + )) + (net (rename A_i_29 "A_i[29]") (joined + (portRef O (instanceRef A_i_29)) + (portRef I1 (instanceRef un5_ciin_6)) + (portRef I1 (instanceRef un12_ciin_3)) + )) + (net (rename A_i_26 "A_i[26]") (joined + (portRef O (instanceRef A_i_26)) + (portRef I1 (instanceRef un5_ciin_4)) + (portRef I0 (instanceRef un12_ciin_2)) + )) + (net (rename A_i_27 "A_i[27]") (joined + (portRef O (instanceRef A_i_27)) + (portRef I1 (instanceRef un5_ciin_5)) + (portRef I1 (instanceRef un12_ciin_2)) + )) + (net (rename A_i_24 "A_i[24]") (joined + (portRef O (instanceRef A_i_24)) + (portRef I1 (instanceRef un5_ciin_3)) + (portRef I0 (instanceRef un12_ciin_1)) + )) + (net (rename A_i_25 "A_i[25]") (joined + (portRef O (instanceRef A_i_25)) + (portRef I0 (instanceRef un5_ciin_4)) + (portRef I1 (instanceRef un12_ciin_1)) + )) + (net AS_030_D0_i (joined + (portRef O (instanceRef AS_030_D0_i)) + (portRef I0 (instanceRef un1_AS_030_D0_2_1)) + (portRef I0 (instanceRef un5_ciin_1)) + )) + (net VMA_INT_i (joined + (portRef O (instanceRef VMA_INT_i)) + (portRef I0 (instanceRef state_machine_un19_clk_000_ne_2)) + )) + (net VPA_D_i (joined + (portRef O (instanceRef VPA_D_i)) + (portRef I1 (instanceRef state_machine_un19_clk_000_ne_2)) + (portRef I1 (instanceRef state_machine_un9_clk_000_ne_2)) + )) + (net (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (joined + (portRef O (instanceRef SM_AMIGA_i_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a3_7)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_3_2_0)) + )) + (net CLK_000_NE_i (joined + (portRef O (instanceRef CLK_000_NE_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_1_2)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_0)) + )) + (net CLK_000_PE_i (joined + (portRef O (instanceRef CLK_000_PE_i)) + (portRef I1 (instanceRef state_machine_un4_bgack_000)) + (portRef I1 (instanceRef SM_AMIGA_ns_o3_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_0)) + )) + (net (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (joined + (portRef O (instanceRef SM_AMIGA_i_1)) + (portRef I0 (instanceRef SM_AMIGA_ns_o3_1_0)) + )) + (net un5_ciin_i (joined + (portRef O (instanceRef un5_ciin_i)) + (portRef I0 (instanceRef un16_ciin)) + )) + (net un12_ciin_i (joined + (portRef O (instanceRef un12_ciin_i)) + (portRef I1 (instanceRef un8_ciin)) + )) + (net DTACK_D0_i (joined + (portRef O (instanceRef DTACK_D0_i)) + (portRef I0 (instanceRef state_machine_un13_clk_000_ne)) + )) + (net DS_030_D0_i (joined + (portRef O (instanceRef DS_030_D0_i)) + (portRef I0 (instanceRef state_machine_un3_ds_030_d0)) + )) + (net CLK_000_D0_i (joined + (portRef O (instanceRef CLK_000_D0_i)) + (portRef I0 (instanceRef pos_clk_CLK_000_N_SYNC_2_0)) + )) + (net CLK_000_D1_i (joined + (portRef O (instanceRef CLK_000_D1_i)) + (portRef I1 (instanceRef pos_clk_CLK_000_P_SYNC_3_0)) + )) + (net (rename state_machine_un26_as_030_d0_i "state_machine.un26_as_030_d0_i") (joined + (portRef O (instanceRef state_machine_un26_as_030_d0_i)) + (portRef I1 (instanceRef state_machine_un33_as_030_d0_2)) + )) + (net (rename state_machine_un33_as_030_d0_i "state_machine.un33_as_030_d0_i") (joined + (portRef O (instanceRef state_machine_un33_as_030_d0_i)) + (portRef I0 (instanceRef un1_AS_030_D0_2)) + )) + (net (rename cpu_est_i_2 "cpu_est_i[2]") (joined + (portRef O (instanceRef cpu_est_i_2)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_0_a4_1_3)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_0_a4_0_3)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_a4_0_1)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_i_a4_0_2)) + )) + (net (rename pos_clk_un4_clk_000_ne_d0_1_i "pos_clk.un4_clk_000_ne_d0_1_i") (joined + (portRef O (instanceRef pos_clk_un4_clk_000_ne_d0_1_i)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_i_a4_2)) + )) + (net (rename SIZE_DMA_i_1 "SIZE_DMA_i[1]") (joined + (portRef O (instanceRef SIZE_DMA_i_1)) + (portRef I1 (instanceRef un6_size)) + )) + (net (rename SIZE_DMA_i_0 "SIZE_DMA_i[0]") (joined + (portRef O (instanceRef SIZE_DMA_i_0)) + (portRef I1 (instanceRef un4_size)) + )) + (net LDS_000_INT_i (joined + (portRef O (instanceRef LDS_000_INT_i)) + (portRef I0 (instanceRef un4_lds_000)) + )) + (net DS_030_i (joined + (portRef O (instanceRef I_196)) + (portRef I1 (instanceRef un4_lds_000_1)) + )) + (net UDS_000_INT_i (joined + (portRef O (instanceRef UDS_000_INT_i)) + (portRef I0 (instanceRef un4_uds_000)) + )) + (net RST_i (joined + (portRef O (instanceRef RST_i)) + (portRef S (instanceRef A0_DMA)) + (portRef S (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH)) + (portRef S (instanceRef AMIGA_BUS_ENABLE_DMA_LOW)) + (portRef S (instanceRef AMIGA_BUS_ENABLE_INT)) + (portRef S (instanceRef AS_000_DMA)) + (portRef S (instanceRef AS_000_INT)) + (portRef S (instanceRef AS_030_000_SYNC)) + (portRef S (instanceRef AS_030_D0)) + (portRef S (instanceRef BGACK_030_INT)) + (portRef S (instanceRef BGACK_030_INT_D)) + (portRef S (instanceRef BG_000DFFSH)) + (portRef R (instanceRef CLK_030_H)) + (portRef S (instanceRef DSACK1_INT)) + (portRef S (instanceRef DS_000_DMA)) + (portRef R (instanceRef DS_000_ENABLE)) + (portRef S (instanceRef DS_030_D0)) + (portRef S (instanceRef DTACK_D0)) + (portRef S (instanceRef IPL_030DFFSH_0)) + (portRef S (instanceRef IPL_030DFFSH_1)) + (portRef S (instanceRef IPL_030DFFSH_2)) + (portRef S (instanceRef LDS_000_INT)) + (portRef R (instanceRef RESETDFFRH)) + (portRef R (instanceRef RESET_DLY_0)) + (portRef R (instanceRef RESET_DLY_1)) + (portRef R (instanceRef RESET_DLY_2)) + (portRef R (instanceRef RESET_DLY_3)) + (portRef R (instanceRef RESET_DLY_4)) + (portRef R (instanceRef RESET_DLY_5)) + (portRef R (instanceRef RESET_DLY_6)) + (portRef R (instanceRef RESET_DLY_7)) + (portRef S (instanceRef RW_000_DMA)) + (portRef S (instanceRef RW_000_INT)) + (portRef S (instanceRef SIZE_DMA_0)) + (portRef S (instanceRef SIZE_DMA_1)) + (portRef R (instanceRef SM_AMIGA_0)) + (portRef R (instanceRef SM_AMIGA_1)) + (portRef R (instanceRef SM_AMIGA_2)) + (portRef R (instanceRef SM_AMIGA_3)) + (portRef R (instanceRef SM_AMIGA_4)) + (portRef R (instanceRef SM_AMIGA_5)) + (portRef R (instanceRef SM_AMIGA_6)) + (portRef S (instanceRef SM_AMIGA_7)) + (portRef S (instanceRef UDS_000_INT)) + (portRef S (instanceRef VMA_INT)) + (portRef S (instanceRef VPA_D)) + (portRef S (instanceRef nEXP_SPACE_D0)) + )) + (net CLK_OUT_PRE_50_i (joined + (portRef O (instanceRef CLK_OUT_PRE_50_i)) + (portRef D (instanceRef CLK_OUT_PRE_50)) + )) + (net DS_000_DMA_2_sqmuxa_1_i (joined + (portRef O (instanceRef DS_000_DMA_2_sqmuxa_1_i)) + (portRef D (instanceRef RW_000_DMA)) + )) + (net un1_AS_030_D0_2_1_i (joined + (portRef O (instanceRef un1_AS_030_D0_2_1_i)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_n)) + )) + (net un16_ciin_i (joined + (portRef O (instanceRef un16_ciin_i)) + (portRef OE (instanceRef CIIN)) + )) + (net un4_lds_000_i (joined + (portRef O (instanceRef un4_lds_000_i)) + (portRef I0 (instanceRef LDS_000)) + )) + (net un4_uds_000_i (joined + (portRef O (instanceRef un4_uds_000_i)) + (portRef I0 (instanceRef UDS_000)) + )) + (net un2_as_000_i (joined + (portRef O (instanceRef un2_as_000_i)) + (portRef I0 (instanceRef AS_000)) + )) + (net AS_030_c (joined + (portRef O (instanceRef AS_030)) + (portRef I0 (instanceRef I_188)) + (portRef D (instanceRef AS_030_D0)) + )) + (net AS_030 (joined + (portRef IO (instanceRef AS_030)) + (portRef AS_030) + )) + (net AS_000_c (joined + (portRef O (instanceRef AS_000)) + (portRef I0 (instanceRef I_194)) + )) + (net AS_000 (joined + (portRef IO (instanceRef AS_000)) + (portRef AS_000) + )) + (net RW_000_c (joined + (portRef O (instanceRef RW_000)) + (portRef I0 (instanceRef I_193)) + (portRef I0 (instanceRef DS_000_DMA_0_sqmuxa)) + (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_0_a3_0_1_0)) + )) + (net RW_000 (joined + (portRef IO (instanceRef RW_000)) + (portRef RW_000) + )) + (net DS_030_c (joined + (portRef O (instanceRef DS_030)) + (portRef I0 (instanceRef I_196)) + (portRef D (instanceRef DS_030_D0)) + )) + (net DS_030 (joined + (portRef IO (instanceRef DS_030)) + (portRef DS_030) + )) + (net UDS_000_c (joined + (portRef O (instanceRef UDS_000)) + (portRef I0 (instanceRef I_191)) + (portRef I0 (instanceRef state_machine_A0_DMA_2)) + (portRef I1 (instanceRef state_machine_un10_bgack_030_int)) + )) + (net UDS_000 (joined + (portRef IO (instanceRef UDS_000)) + (portRef UDS_000) + )) + (net LDS_000_c (joined + (portRef O (instanceRef LDS_000)) + (portRef I0 (instanceRef I_192)) + (portRef I0 (instanceRef state_machine_un10_bgack_030_int)) + )) + (net LDS_000 (joined + (portRef IO (instanceRef LDS_000)) + (portRef LDS_000) + )) + (net (rename SIZE_c_0 "SIZE_c[0]") (joined + (portRef O (instanceRef SIZE_0)) + (portRef I1 (instanceRef state_machine_un11_ds_030_d0)) + )) + (net (rename SIZE_0 "SIZE[0]") (joined + (portRef IO (instanceRef SIZE_0)) + (portRef (member size 1)) + )) + (net (rename SIZE_c_1 "SIZE_c[1]") (joined + (portRef O (instanceRef SIZE_1)) + (portRef I0 (instanceRef SIZE_c_i_1)) + )) + (net (rename SIZE_1 "SIZE[1]") (joined + (portRef (member size 0)) + (portRef IO (instanceRef SIZE_1)) + )) + (net (rename A_c_16 "A_c[16]") (joined + (portRef O (instanceRef A_16)) + (portRef I0 (instanceRef A_i_16)) + )) + (net (rename A_16 "A[16]") (joined + (portRef (member a 15)) + (portRef I0 (instanceRef A_16)) + )) + (net (rename A_c_17 "A_c[17]") (joined + (portRef O (instanceRef A_17)) + (portRef I0 (instanceRef state_machine_un26_as_030_d0_1)) + (portRef I1 (instanceRef un19_fpu_cs_1)) + )) + (net (rename A_17 "A[17]") (joined + (portRef (member a 14)) + (portRef I0 (instanceRef A_17)) + )) + (net (rename A_c_18 "A_c[18]") (joined + (portRef O (instanceRef A_18)) + (portRef I0 (instanceRef A_i_18)) + )) + (net (rename A_18 "A[18]") (joined + (portRef (member a 13)) + (portRef I0 (instanceRef A_18)) + )) + (net (rename A_c_19 "A_c[19]") (joined + (portRef O (instanceRef A_19)) + (portRef I0 (instanceRef A_i_19)) + )) + (net (rename A_19 "A[19]") (joined + (portRef (member a 12)) + (portRef I0 (instanceRef A_19)) + )) + (net (rename A_c_20 "A_c[20]") (joined + (portRef O (instanceRef A_20)) + (portRef I1 (instanceRef un5_ciin_1)) + )) + (net (rename A_20 "A[20]") (joined + (portRef (member a 11)) + (portRef I0 (instanceRef A_20)) + )) + (net (rename A_c_21 "A_c[21]") (joined + (portRef O (instanceRef A_21)) + (portRef I0 (instanceRef un5_ciin_2)) + )) + (net (rename A_21 "A[21]") (joined + (portRef (member a 10)) + (portRef I0 (instanceRef A_21)) + )) + (net (rename A_c_22 "A_c[22]") (joined + (portRef O (instanceRef A_22)) + (portRef I1 (instanceRef un5_ciin_2)) + )) + (net (rename A_22 "A[22]") (joined + (portRef (member a 9)) + (portRef I0 (instanceRef A_22)) + )) + (net (rename A_c_23 "A_c[23]") (joined + (portRef O (instanceRef A_23)) + (portRef I0 (instanceRef un5_ciin_3)) + )) + (net (rename A_23 "A[23]") (joined + (portRef (member a 8)) + (portRef I0 (instanceRef A_23)) + )) + (net (rename A_c_24 "A_c[24]") (joined + (portRef O (instanceRef A_24)) + (portRef I0 (instanceRef A_i_24)) + )) + (net (rename A_24 "A[24]") (joined + (portRef (member a 7)) + (portRef I0 (instanceRef A_24)) + )) + (net (rename A_c_25 "A_c[25]") (joined + (portRef O (instanceRef A_25)) + (portRef I0 (instanceRef A_i_25)) + )) + (net (rename A_25 "A[25]") (joined + (portRef (member a 6)) + (portRef I0 (instanceRef A_25)) + )) + (net (rename A_c_26 "A_c[26]") (joined + (portRef O (instanceRef A_26)) + (portRef I0 (instanceRef A_i_26)) + )) + (net (rename A_26 "A[26]") (joined + (portRef (member a 5)) + (portRef I0 (instanceRef A_26)) + )) + (net (rename A_c_27 "A_c[27]") (joined + (portRef O (instanceRef A_27)) + (portRef I0 (instanceRef A_i_27)) + )) + (net (rename A_27 "A[27]") (joined + (portRef (member a 4)) + (portRef I0 (instanceRef A_27)) + )) + (net (rename A_c_28 "A_c[28]") (joined + (portRef O (instanceRef A_28)) + (portRef I0 (instanceRef A_i_28)) + )) + (net (rename A_28 "A[28]") (joined + (portRef (member a 3)) + (portRef I0 (instanceRef A_28)) + )) + (net (rename A_c_29 "A_c[29]") (joined + (portRef O (instanceRef A_29)) + (portRef I0 (instanceRef A_i_29)) + )) + (net (rename A_29 "A[29]") (joined + (portRef (member a 2)) + (portRef I0 (instanceRef A_29)) + )) + (net (rename A_c_30 "A_c[30]") (joined + (portRef O (instanceRef A_30)) + (portRef I0 (instanceRef A_i_30)) + )) + (net (rename A_30 "A[30]") (joined + (portRef (member a 1)) + (portRef I0 (instanceRef A_30)) + )) + (net (rename A_c_31 "A_c[31]") (joined + (portRef O (instanceRef A_31)) + (portRef I0 (instanceRef A_i_31)) + )) + (net (rename A_31 "A[31]") (joined + (portRef (member a 0)) + (portRef I0 (instanceRef A_31)) + )) + (net A0_c (joined + (portRef O (instanceRef A0)) + (portRef I0 (instanceRef UDS_000_INT_0_m)) + (portRef I0 (instanceRef A0_c_i)) + )) + (net A0 (joined + (portRef IO (instanceRef A0)) + (portRef A0) + )) + (net A1_c (joined + (portRef O (instanceRef A1)) + (portRef I0 (instanceRef state_machine_AMIGA_BUS_ENABLE_DMA_LOW_2)) + (portRef I0 (instanceRef A1_i)) + )) + (net A1 (joined + (portRef A1) + (portRef I0 (instanceRef A1)) + )) + (net nEXP_SPACE_c (joined + (portRef O (instanceRef nEXP_SPACE)) + (portRef D (instanceRef nEXP_SPACE_D0)) + )) + (net nEXP_SPACE (joined + (portRef nEXP_SPACE) + (portRef I0 (instanceRef nEXP_SPACE)) + )) + (net BERR_c (joined + (portRef O (instanceRef BERR)) + (portRef I1 (instanceRef un1_AS_030_D0_2_1)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_0_1_2)) + (portRef I0 (instanceRef SM_AMIGA_ns_o3_0)) + (portRef I0 (instanceRef I_190)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_1_4)) + )) + (net BERR (joined + (portRef IO (instanceRef BERR)) + (portRef BERR) + )) + (net BG_030_c (joined + (portRef O (instanceRef BG_030)) + (portRef I0 (instanceRef BG_000_0_m)) + (portRef I0 (instanceRef BG_030_c_i)) + )) + (net BG_030 (joined + (portRef BG_030) + (portRef I0 (instanceRef BG_030)) + )) + (net BG_000_c (joined + (portRef Q (instanceRef BG_000DFFSH)) + (portRef I0 (instanceRef BG_000_0_n)) + (portRef I0 (instanceRef BG_000)) + )) + (net BG_000 (joined + (portRef O (instanceRef BG_000)) + (portRef BG_000) + )) + (net BGACK_030 (joined + (portRef O (instanceRef BGACK_030)) + (portRef BGACK_030) + )) + (net BGACK_000_c (joined + (portRef O (instanceRef BGACK_000)) + (portRef I0 (instanceRef BGACK_030_INT_0_m)) + (portRef I0 (instanceRef state_machine_un4_bgack_000)) + (portRef I0 (instanceRef state_machine_un33_as_030_d0_1)) + (portRef I1 (instanceRef un19_fpu_cs_2)) + )) + (net BGACK_000 (joined + (portRef BGACK_000) + (portRef I0 (instanceRef BGACK_000)) + )) + (net CLK_030_c (joined + (portRef O (instanceRef CLK_030)) + (portRef I1 (instanceRef state_machine_un22_bgack_030_int_1)) + (portRef I0 (instanceRef CLK_030_i)) + (portRef I0 (instanceRef state_machine_un14_clk_000_n_sync)) + )) + (net CLK_030 (joined + (portRef CLK_030) + (portRef I0 (instanceRef CLK_030)) + )) + (net CLK_000_c (joined + (portRef O (instanceRef CLK_000)) + (portRef D (instanceRef CLK_000_D0)) + )) + (net CLK_000 (joined + (portRef CLK_000) + (portRef I0 (instanceRef CLK_000)) + )) + (net CLK_OSZI_c (joined + (portRef O (instanceRef CLK_OSZI)) + (portRef CLK (instanceRef A0_DMA)) + (portRef CLK (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH)) + (portRef CLK (instanceRef AMIGA_BUS_ENABLE_DMA_LOW)) + (portRef CLK (instanceRef AMIGA_BUS_ENABLE_INT)) + (portRef CLK (instanceRef AS_000_DMA)) + (portRef CLK (instanceRef AS_000_INT)) + (portRef CLK (instanceRef AS_030_000_SYNC)) + (portRef CLK (instanceRef AS_030_D0)) + (portRef CLK (instanceRef BGACK_030_INT)) + (portRef CLK (instanceRef BGACK_030_INT_D)) + (portRef CLK (instanceRef BG_000DFFSH)) + (portRef CLK (instanceRef CLK_000_D0)) + (portRef CLK (instanceRef CLK_000_D1)) + (portRef CLK (instanceRef CLK_000_NE)) + (portRef CLK (instanceRef CLK_000_NE_D0)) + (portRef CLK (instanceRef CLK_000_N_SYNC_0)) + (portRef CLK (instanceRef CLK_000_N_SYNC_1)) + (portRef CLK (instanceRef CLK_000_N_SYNC_2)) + (portRef CLK (instanceRef CLK_000_N_SYNC_3)) + (portRef CLK (instanceRef CLK_000_N_SYNC_4)) + (portRef CLK (instanceRef CLK_000_N_SYNC_5)) + (portRef CLK (instanceRef CLK_000_N_SYNC_6)) + (portRef CLK (instanceRef CLK_000_N_SYNC_7)) + (portRef CLK (instanceRef CLK_000_N_SYNC_8)) + (portRef CLK (instanceRef CLK_000_N_SYNC_9)) + (portRef CLK (instanceRef CLK_000_N_SYNC_10)) + (portRef CLK (instanceRef CLK_000_N_SYNC_11)) + (portRef CLK (instanceRef CLK_000_PE)) + (portRef CLK (instanceRef CLK_000_P_SYNC_0)) + (portRef CLK (instanceRef CLK_000_P_SYNC_1)) + (portRef CLK (instanceRef CLK_000_P_SYNC_2)) + (portRef CLK (instanceRef CLK_000_P_SYNC_3)) + (portRef CLK (instanceRef CLK_000_P_SYNC_4)) + (portRef CLK (instanceRef CLK_000_P_SYNC_5)) + (portRef CLK (instanceRef CLK_000_P_SYNC_6)) + (portRef CLK (instanceRef CLK_000_P_SYNC_7)) + (portRef CLK (instanceRef CLK_000_P_SYNC_8)) + (portRef CLK (instanceRef CLK_000_P_SYNC_9)) + (portRef CLK (instanceRef CLK_030_H)) + (portRef CLK (instanceRef CLK_OUT_PRE)) + (portRef CLK (instanceRef CLK_OUT_PRE_50)) + (portRef CLK (instanceRef CLK_OUT_PRE_D)) + (portRef CLK (instanceRef DSACK1_INT)) + (portRef CLK (instanceRef DS_000_DMA)) + (portRef CLK (instanceRef DS_000_ENABLE)) + (portRef CLK (instanceRef DS_030_D0)) + (portRef CLK (instanceRef DTACK_D0)) + (portRef CLK (instanceRef IPL_030DFFSH_0)) + (portRef CLK (instanceRef IPL_030DFFSH_1)) + (portRef CLK (instanceRef IPL_030DFFSH_2)) + (portRef CLK (instanceRef LDS_000_INT)) + (portRef CLK (instanceRef RESETDFFRH)) + (portRef CLK (instanceRef RESET_DLY_0)) + (portRef CLK (instanceRef RESET_DLY_1)) + (portRef CLK (instanceRef RESET_DLY_2)) + (portRef CLK (instanceRef RESET_DLY_3)) + (portRef CLK (instanceRef RESET_DLY_4)) + (portRef CLK (instanceRef RESET_DLY_5)) + (portRef CLK (instanceRef RESET_DLY_6)) + (portRef CLK (instanceRef RESET_DLY_7)) + (portRef CLK (instanceRef RW_000_DMA)) + (portRef CLK (instanceRef RW_000_INT)) + (portRef CLK (instanceRef SIZE_DMA_0)) + (portRef CLK (instanceRef SIZE_DMA_1)) + (portRef CLK (instanceRef SM_AMIGA_0)) + (portRef CLK (instanceRef SM_AMIGA_1)) + (portRef CLK (instanceRef SM_AMIGA_2)) + (portRef CLK (instanceRef SM_AMIGA_3)) + (portRef CLK (instanceRef SM_AMIGA_4)) + (portRef CLK (instanceRef SM_AMIGA_5)) + (portRef CLK (instanceRef SM_AMIGA_6)) + (portRef CLK (instanceRef SM_AMIGA_7)) + (portRef CLK (instanceRef UDS_000_INT)) + (portRef CLK (instanceRef VMA_INT)) + (portRef CLK (instanceRef VPA_D)) + (portRef CLK (instanceRef cpu_est_0)) + (portRef CLK (instanceRef cpu_est_1)) + (portRef CLK (instanceRef cpu_est_2)) + (portRef CLK (instanceRef cpu_est_3)) + (portRef CLK (instanceRef nEXP_SPACE_D0)) + )) + (net CLK_OSZI (joined + (portRef CLK_OSZI) + (portRef I0 (instanceRef CLK_OSZI)) + )) + (net CLK_DIV_OUT (joined + (portRef O (instanceRef CLK_DIV_OUT)) + (portRef CLK_DIV_OUT) + )) + (net CLK_EXP_c (joined + (portRef Q (instanceRef CLK_OUT_PRE_D)) + (portRef I0 (instanceRef CLK_EXP_i)) + (portRef I0 (instanceRef CLK_DIV_OUT)) + (portRef I0 (instanceRef CLK_EXP)) + )) + (net CLK_EXP (joined + (portRef O (instanceRef CLK_EXP)) + (portRef CLK_EXP) + )) + (net FPU_CS (joined + (portRef O (instanceRef FPU_CS)) + (portRef FPU_CS) + )) + (net FPU_SENSE_c (joined + (portRef O (instanceRef FPU_SENSE)) + (portRef I0 (instanceRef FPU_SENSE_i)) + (portRef I0 (instanceRef un22_berr)) + )) + (net FPU_SENSE (joined + (portRef FPU_SENSE) + (portRef I0 (instanceRef FPU_SENSE)) + )) + (net (rename IPL_030_c_0 "IPL_030_c[0]") (joined + (portRef Q (instanceRef IPL_030DFFSH_0)) + (portRef I0 (instanceRef IPL_030_0_0__n)) + (portRef I0 (instanceRef IPL_030_0)) + )) + (net (rename IPL_030_0 "IPL_030[0]") (joined + (portRef O (instanceRef IPL_030_0)) + (portRef (member ipl_030 2)) + )) + (net (rename IPL_030_c_1 "IPL_030_c[1]") (joined + (portRef Q (instanceRef IPL_030DFFSH_1)) + (portRef I0 (instanceRef IPL_030_0_1__n)) + (portRef I0 (instanceRef IPL_030_1)) + )) + (net (rename IPL_030_1 "IPL_030[1]") (joined + (portRef O (instanceRef IPL_030_1)) + (portRef (member ipl_030 1)) + )) + (net (rename IPL_030_c_2 "IPL_030_c[2]") (joined + (portRef Q (instanceRef IPL_030DFFSH_2)) + (portRef I0 (instanceRef IPL_030_0_2__n)) + (portRef I0 (instanceRef IPL_030_2)) + )) + (net (rename IPL_030_2 "IPL_030[2]") (joined + (portRef O (instanceRef IPL_030_2)) + (portRef (member ipl_030 0)) + )) + (net (rename IPL_c_0 "IPL_c[0]") (joined + (portRef O (instanceRef IPL_0)) + (portRef I0 (instanceRef IPL_030_0_0__m)) + )) + (net (rename IPL_0 "IPL[0]") (joined + (portRef (member ipl 2)) + (portRef I0 (instanceRef IPL_0)) + )) + (net (rename IPL_c_1 "IPL_c[1]") (joined + (portRef O (instanceRef IPL_1)) + (portRef I0 (instanceRef IPL_030_0_1__m)) + )) + (net (rename IPL_1 "IPL[1]") (joined + (portRef (member ipl 1)) + (portRef I0 (instanceRef IPL_1)) + )) + (net (rename IPL_c_2 "IPL_c[2]") (joined + (portRef O (instanceRef IPL_2)) + (portRef I0 (instanceRef IPL_030_0_2__m)) + )) + (net (rename IPL_2 "IPL[2]") (joined + (portRef (member ipl 0)) + (portRef I0 (instanceRef IPL_2)) + )) + (net DSACK1 (joined + (portRef O (instanceRef DSACK1)) + (portRef DSACK1) + )) + (net DTACK_c (joined + (portRef O (instanceRef DTACK)) + (portRef D (instanceRef DTACK_D0)) + )) + (net DTACK (joined + (portRef DTACK) + (portRef I0 (instanceRef DTACK)) + )) + (net AVEC (joined + (portRef O (instanceRef AVEC)) + (portRef AVEC) + )) + (net E (joined + (portRef O (instanceRef E)) + (portRef E) + )) + (net VPA_c (joined + (portRef O (instanceRef VPA)) + (portRef D (instanceRef VPA_D)) + )) + (net VPA (joined + (portRef VPA) + (portRef I0 (instanceRef VPA)) + )) + (net VMA (joined + (portRef O (instanceRef VMA)) + (portRef VMA) + )) + (net RST_c (joined + (portRef O (instanceRef RST)) + (portRef I0 (instanceRef RST_i)) + )) + (net RST (joined + (portRef RST) + (portRef I0 (instanceRef RST)) + )) + (net RESET_c (joined + (portRef Q (instanceRef RESETDFFRH)) + (portRef I0 (instanceRef RESET_c_i)) + (portRef I0 (instanceRef RESET)) + )) + (net RESET (joined + (portRef O (instanceRef RESET)) + (portRef RESET) + )) + (net RW_c (joined + (portRef O (instanceRef RW)) + (portRef I0 (instanceRef I_189)) + )) + (net RW (joined + (portRef IO (instanceRef RW)) + (portRef RW) + )) + (net (rename FC_c_0 "FC_c[0]") (joined + (portRef O (instanceRef FC_0)) + (portRef I0 (instanceRef state_machine_un26_as_030_d0_2)) + (portRef I0 (instanceRef un19_fpu_cs_3)) + )) + (net (rename FC_0 "FC[0]") (joined + (portRef (member fc 1)) + (portRef I0 (instanceRef FC_0)) + )) + (net (rename FC_c_1 "FC_c[1]") (joined + (portRef O (instanceRef FC_1)) + (portRef I1 (instanceRef state_machine_un26_as_030_d0_2)) + (portRef I1 (instanceRef un19_fpu_cs_3)) + )) + (net (rename FC_1 "FC[1]") (joined + (portRef (member fc 0)) + (portRef I0 (instanceRef FC_1)) + )) + (net AMIGA_ADDR_ENABLE (joined + (portRef O (instanceRef AMIGA_ADDR_ENABLE)) + (portRef AMIGA_ADDR_ENABLE) + )) + (net AMIGA_BUS_DATA_DIR_c (joined + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_0_i)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR)) + )) + (net AMIGA_BUS_DATA_DIR (joined + (portRef O (instanceRef AMIGA_BUS_DATA_DIR)) + (portRef AMIGA_BUS_DATA_DIR) + )) + (net AMIGA_BUS_ENABLE_LOW (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_LOW)) + (portRef AMIGA_BUS_ENABLE_LOW) + )) + (net AMIGA_BUS_ENABLE_HIGH (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_HIGH)) + (portRef AMIGA_BUS_ENABLE_HIGH) + )) + (net CIIN (joined + (portRef O (instanceRef CIIN)) + (portRef CIIN) + )) + (net (rename state_machine_un12_clk_000_n_sync_i "state_machine.un12_clk_000_n_sync_i") (joined + (portRef O (instanceRef state_machine_un12_clk_000_n_sync_i)) + (portRef I1 (instanceRef state_machine_un17_clk_000_n_sync)) + )) + (net (rename CLK_000_N_SYNC_i_10 "CLK_000_N_SYNC_i[10]") (joined + (portRef O (instanceRef CLK_000_N_SYNC_i_10)) + (portRef I0 (instanceRef state_machine_un17_clk_000_n_sync)) + )) + (net (rename state_machine_un17_clk_000_n_sync_0 "state_machine.un17_clk_000_n_sync_0") (joined + (portRef O (instanceRef state_machine_un17_clk_000_n_sync)) + (portRef I0 (instanceRef state_machine_un17_clk_000_n_sync_i)) + )) + (net (rename state_machine_un3_bgack_030_int_d_i "state_machine.un3_bgack_030_int_d_i") (joined + (portRef O (instanceRef state_machine_un3_bgack_030_int_d_i)) + (portRef I1 (instanceRef un1_bgack_030_int_d)) + )) + (net AMIGA_BUS_ENABLE_INT_1_sqmuxa_i (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_INT_1_sqmuxa_i)) + (portRef I0 (instanceRef un1_bgack_030_int_d)) + )) + (net un1_bgack_030_int_d_0 (joined + (portRef O (instanceRef un1_bgack_030_int_d)) + (portRef I0 (instanceRef un1_bgack_030_int_d_i)) + )) + (net N_95_i (joined + (portRef O (instanceRef N_95_i)) + (portRef I1 (instanceRef un1_SM_AMIGA_7)) + )) + (net un1_SM_AMIGA_7_i (joined + (portRef O (instanceRef un1_SM_AMIGA_7)) + (portRef I0 (instanceRef DS_000_ENABLE_0_n)) + (portRef I0 (instanceRef un1_SM_AMIGA_7_i_0)) + )) + (net N_102_i (joined + (portRef O (instanceRef N_102_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_1)) + )) + (net N_103_i (joined + (portRef O (instanceRef N_103_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_1)) + )) + (net (rename SM_AMIGA_ns_0_1 "SM_AMIGA_ns_0[1]") (joined + (portRef O (instanceRef SM_AMIGA_ns_1)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_1)) + )) + (net N_105_i (joined + (portRef O (instanceRef N_105_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_2)) + )) + (net N_104_i (joined + (portRef O (instanceRef N_104_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_2)) + )) + (net (rename SM_AMIGA_ns_0_2 "SM_AMIGA_ns_0[2]") (joined + (portRef O (instanceRef SM_AMIGA_ns_2)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_2)) + )) + (net N_107_i (joined + (portRef O (instanceRef N_107_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_3)) + )) + (net N_106_i (joined + (portRef O (instanceRef N_106_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_3)) + )) + (net (rename SM_AMIGA_ns_0_3 "SM_AMIGA_ns_0[3]") (joined + (portRef O (instanceRef SM_AMIGA_ns_3)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_3)) + )) + (net N_111_i (joined + (portRef O (instanceRef N_111_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_5)) + )) + (net N_110_i (joined + (portRef O (instanceRef N_110_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_5)) + )) + (net (rename SM_AMIGA_ns_0_5 "SM_AMIGA_ns_0[5]") (joined + (portRef O (instanceRef SM_AMIGA_ns_5)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_5)) + )) + (net N_113_i (joined + (portRef O (instanceRef N_113_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_6)) + )) + (net N_112_i (joined + (portRef O (instanceRef N_112_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_6)) + )) + (net (rename SM_AMIGA_ns_0_6 "SM_AMIGA_ns_0[6]") (joined + (portRef O (instanceRef SM_AMIGA_ns_6)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_6)) + )) + (net N_89_i (joined + (portRef O (instanceRef SM_AMIGA_ns_o3_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_0_1)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_0_3)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_0_5)) + (portRef I0 (instanceRef SM_AMIGA_ns_o3_i_0)) + )) + (net N_91_i (joined + (portRef O (instanceRef SM_AMIGA_ns_o3_1_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_o3_1_i_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_3_1_0)) + )) + (net (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (joined + (portRef O (instanceRef SM_AMIGA_i_2)) + (portRef I0 (instanceRef SM_AMIGA_ns_o3_2_1_0)) + )) + (net (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (joined + (portRef O (instanceRef SM_AMIGA_i_4)) + (portRef I1 (instanceRef SM_AMIGA_ns_o3_2_1_0)) + )) + (net (rename state_machine_un10_bgack_030_int_0 "state_machine.un10_bgack_030_int_0") (joined + (portRef O (instanceRef state_machine_un10_bgack_030_int)) + (portRef I0 (instanceRef state_machine_un10_bgack_030_int_i)) + )) + (net (rename state_machine_AMIGA_BUS_ENABLE_DMA_LOW_2_0 "state_machine.AMIGA_BUS_ENABLE_DMA_LOW_2_0") (joined + (portRef O (instanceRef state_machine_AMIGA_BUS_ENABLE_DMA_LOW_2)) + (portRef I0 (instanceRef state_machine_AMIGA_BUS_ENABLE_DMA_LOW_2_i)) + )) + (net (rename state_machine_AMIGA_BUS_ENABLE_DMA_HIGH_2_0 "state_machine.AMIGA_BUS_ENABLE_DMA_HIGH_2_0") (joined + (portRef O (instanceRef state_machine_AMIGA_BUS_ENABLE_DMA_HIGH_2)) + (portRef I0 (instanceRef state_machine_AMIGA_BUS_ENABLE_DMA_HIGH_2_i)) + )) + (net N_118_i (joined + (portRef O (instanceRef N_118_i)) + (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_0)) + )) + (net N_117_i (joined + (portRef O (instanceRef N_117_i)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0)) + )) + (net AMIGA_BUS_DATA_DIR_c_0 (joined + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_0)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_i)) + )) + (net (rename state_machine_DS_000_DMA_3_f1_0 "state_machine.DS_000_DMA_3_f1_0") (joined + (portRef O (instanceRef state_machine_DS_000_DMA_3_f1)) + (portRef I0 (instanceRef state_machine_DS_000_DMA_3_f1_i)) + )) + (net (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (joined + (portRef O (instanceRef SM_AMIGA_i_6)) + (portRef I1 (instanceRef SM_AMIGA_ns_o3_2_0)) + )) + (net N_93_i (joined + (portRef O (instanceRef SM_AMIGA_ns_o3_2_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_o3_2_i_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_3_1_0)) + )) + (net N_101_i (joined + (portRef O (instanceRef N_101_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_2_0)) + )) + (net N_98_i (joined + (portRef O (instanceRef N_98_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_1_0)) + )) + (net N_99_i (joined + (portRef O (instanceRef N_99_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_1_0)) + )) + (net N_97_i (joined + (portRef O (instanceRef N_97_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_2_0)) + )) + (net N_100_i (joined + (portRef O (instanceRef N_100_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_7)) + (portRef I1 (instanceRef SM_AMIGA_ns_0)) + )) + (net N_94_0 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_o3_7)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_o3_i_7)) + )) + (net N_90_i (joined + (portRef O (instanceRef SM_AMIGA_ns_o3_0_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_5)) + (portRef I0 (instanceRef SM_AMIGA_ns_o3_0_i_0)) + )) + (net N_114_i (joined + (portRef O (instanceRef N_114_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_7)) + )) + (net N_88_i (joined + (portRef O (instanceRef SM_AMIGA_ns_i_7)) + (portRef D (instanceRef SM_AMIGA_0)) + )) + (net N_108_i (joined + (portRef O (instanceRef N_108_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_4)) + )) + (net N_109_i (joined + (portRef O (instanceRef N_109_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_4)) + )) + (net (rename SM_AMIGA_ns_0_4 "SM_AMIGA_ns_0[4]") (joined + (portRef O (instanceRef SM_AMIGA_ns_4)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_4)) + )) + (net (rename SM_AMIGA_ns_0_0 "SM_AMIGA_ns_0[0]") (joined + (portRef O (instanceRef SM_AMIGA_ns_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_0)) + )) + (net RESET_c_i (joined + (portRef O (instanceRef RESET_c_i)) + (portRef I0 (instanceRef RESET_0)) + )) + (net (rename state_machine_un15_reset_dly_i "state_machine.un15_reset_dly_i") (joined + (portRef O (instanceRef state_machine_un15_reset_dly_i)) + (portRef I1 (instanceRef RESET_0)) + )) + (net N_13_0 (joined + (portRef O (instanceRef RESET_0)) + (portRef I0 (instanceRef RESET_0_i)) + )) + (net un8_ciin_i (joined + (portRef O (instanceRef un8_ciin_i)) + (portRef I1 (instanceRef un14_ciin)) + )) + (net un14_ciin_0 (joined + (portRef O (instanceRef un14_ciin)) + (portRef I0 (instanceRef un14_ciin_i)) + )) + (net (rename state_machine_un8_clk_000_pe_i "state_machine.un8_clk_000_pe_i") (joined + (portRef O (instanceRef state_machine_un8_clk_000_pe_i)) + (portRef I0 (instanceRef state_machine_un10_clk_000_pe)) + )) + (net (rename state_machine_un9_clk_000_ne_i "state_machine.un9_clk_000_ne_i") (joined + (portRef O (instanceRef state_machine_un9_clk_000_ne_i)) + (portRef I1 (instanceRef state_machine_un10_clk_000_pe)) + )) + (net (rename state_machine_un10_clk_000_pe_0 "state_machine.un10_clk_000_pe_0") (joined + (portRef O (instanceRef state_machine_un10_clk_000_pe)) + (portRef I0 (instanceRef state_machine_un10_clk_000_pe_i)) + )) + (net (rename state_machine_un13_clk_000_ne_i "state_machine.un13_clk_000_ne_i") (joined + (portRef O (instanceRef state_machine_un13_clk_000_ne_i)) + (portRef I0 (instanceRef state_machine_un15_clk_000_ne)) + )) + (net (rename state_machine_un19_clk_000_ne_i "state_machine.un19_clk_000_ne_i") (joined + (portRef O (instanceRef state_machine_un19_clk_000_ne_i)) + (portRef I1 (instanceRef state_machine_un15_clk_000_ne)) + )) + (net (rename state_machine_un15_clk_000_ne_i "state_machine.un15_clk_000_ne_i") (joined + (portRef O (instanceRef state_machine_un15_clk_000_ne)) + (portRef I0 (instanceRef state_machine_un15_clk_000_ne_i_0)) + )) + (net BG_030_c_i (joined + (portRef O (instanceRef BG_030_c_i)) + (portRef I0 (instanceRef state_machine_un8_bg_030)) + )) + (net (rename state_machine_un6_bg_030_i "state_machine.un6_bg_030_i") (joined + (portRef O (instanceRef state_machine_un6_bg_030_i)) + (portRef I1 (instanceRef state_machine_un8_bg_030)) + )) + (net (rename state_machine_un8_bg_030_0 "state_machine.un8_bg_030_0") (joined + (portRef O (instanceRef state_machine_un8_bg_030)) + (portRef I0 (instanceRef state_machine_un8_bg_030_i)) + )) + (net un1_as_030_i (joined + (portRef O (instanceRef un1_as_030)) + (portRef OE (instanceRef A0)) + (portRef OE (instanceRef AS_030)) + (portRef OE (instanceRef DS_030)) + (portRef OE (instanceRef SIZE_0)) + (portRef OE (instanceRef SIZE_1)) + )) + (net (rename state_machine_un4_bgack_000_0 "state_machine.un4_bgack_000_0") (joined + (portRef O (instanceRef state_machine_un4_bgack_000)) + (portRef I0 (instanceRef state_machine_un4_bgack_000_i)) + )) + (net N_141_i (joined + (portRef O (instanceRef N_141_i)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_1_3)) + )) + (net (rename pos_clk_cpu_est_12_0_3 "pos_clk.cpu_est_12_0[3]") (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_3)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_i_3)) + )) + (net N_139_i (joined + (portRef O (instanceRef N_139_i)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_0_1_3)) + )) + (net N_140_i (joined + (portRef O (instanceRef N_140_i)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_0_3)) + )) + (net N_136_i (joined + (portRef O (instanceRef N_136_i)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_0_2_1)) + )) + (net (rename pos_clk_cpu_est_12_0_1 "pos_clk.cpu_est_12_0[1]") (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_1)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_i_1)) + )) + (net N_134_i (joined + (portRef O (instanceRef N_134_i)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_0_1_1)) + )) + (net N_133_i (joined + (portRef O (instanceRef N_133_i)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_1_1)) + )) + (net N_135_i (joined + (portRef O (instanceRef N_135_i)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_2_1)) + )) + (net N_132_i (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_o4_3)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_a4_0_3)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_o4_i_3)) + )) + (net N_131_i (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_o4_1)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_a4_1_1)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_o4_i_1)) + )) + (net N_137_i (joined + (portRef O (instanceRef N_137_i)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_i_2)) + )) + (net N_138_i (joined + (portRef O (instanceRef N_138_i)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_i_2)) + )) + (net N_128_i (joined + (portRef O (instanceRef pos_clk_cpu_est_12_i_2)) + (portRef I0 (instanceRef cpu_est_0_2__m)) + )) + (net (rename state_machine_un11_ds_030_d0_i "state_machine.un11_ds_030_d0_i") (joined + (portRef O (instanceRef state_machine_un11_ds_030_d0)) + (portRef I0 (instanceRef LDS_000_INT_0_m)) + )) + (net A0_c_i (joined + (portRef O (instanceRef A0_c_i)) + (portRef I1 (instanceRef state_machine_un11_ds_030_d0_1)) + )) + (net (rename SIZE_c_i_1 "SIZE_c_i[1]") (joined + (portRef O (instanceRef SIZE_c_i_1)) + (portRef I0 (instanceRef state_machine_un11_ds_030_d0_1)) + )) + (net (rename SM_AMIGA_ns_0_1_0 "SM_AMIGA_ns_0_1[0]") (joined + (portRef O (instanceRef SM_AMIGA_ns_1_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_3_0)) + )) + (net (rename SM_AMIGA_ns_0_2_0 "SM_AMIGA_ns_0_2[0]") (joined + (portRef O (instanceRef SM_AMIGA_ns_2_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_3_0)) + )) + (net (rename SM_AMIGA_ns_0_3_0 "SM_AMIGA_ns_0_3[0]") (joined + (portRef O (instanceRef SM_AMIGA_ns_3_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_0)) + )) + (net N_93_i_1 (joined + (portRef O (instanceRef SM_AMIGA_ns_o3_2_1_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_o3_2_0)) + )) + (net (rename state_machine_un11_ds_030_d0_i_1 "state_machine.un11_ds_030_d0_i_1") (joined + (portRef O (instanceRef state_machine_un11_ds_030_d0_1)) + (portRef I0 (instanceRef state_machine_un11_ds_030_d0)) + )) + (net (rename pos_clk_cpu_est_12_0_1_1 "pos_clk.cpu_est_12_0_1[1]") (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_1_1)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_1)) + )) + (net (rename pos_clk_cpu_est_12_0_2_1 "pos_clk.cpu_est_12_0_2[1]") (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_2_1)) + (portRef I1 (instanceRef pos_clk_cpu_est_12_0_1)) + )) + (net (rename pos_clk_cpu_est_12_0_1_3 "pos_clk.cpu_est_12_0_1[3]") (joined + (portRef O (instanceRef pos_clk_cpu_est_12_0_1_3)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_0_3)) + )) + (net N_137_1 (joined + (portRef O (instanceRef pos_clk_cpu_est_12_i_a4_1_2)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_i_a4_2)) + )) + (net N_138_1 (joined + (portRef O (instanceRef pos_clk_cpu_est_12_i_a4_0_1_2)) + (portRef I0 (instanceRef pos_clk_cpu_est_12_i_a4_0_2)) + )) + (net (rename state_machine_un33_as_030_d0_1 "state_machine.un33_as_030_d0_1") (joined + (portRef O (instanceRef state_machine_un33_as_030_d0_1)) + (portRef I0 (instanceRef state_machine_un33_as_030_d0)) + )) + (net (rename state_machine_un33_as_030_d0_2 "state_machine.un33_as_030_d0_2") (joined + (portRef O (instanceRef state_machine_un33_as_030_d0_2)) + (portRef I1 (instanceRef state_machine_un33_as_030_d0)) + )) + (net (rename state_machine_un26_as_030_d0_1 "state_machine.un26_as_030_d0_1") (joined + (portRef O (instanceRef state_machine_un26_as_030_d0_1)) + (portRef I0 (instanceRef state_machine_un26_as_030_d0_3_0)) + )) + (net (rename state_machine_un26_as_030_d0_2 "state_machine.un26_as_030_d0_2") (joined + (portRef O (instanceRef state_machine_un26_as_030_d0_2)) + (portRef I1 (instanceRef state_machine_un26_as_030_d0_3_0)) + )) + (net (rename state_machine_un26_as_030_d0_3 "state_machine.un26_as_030_d0_3") (joined + (portRef O (instanceRef state_machine_un26_as_030_d0_3_0)) + (portRef I0 (instanceRef state_machine_un26_as_030_d0)) + )) + (net N_108_1 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_1_4)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_4)) + )) + (net N_97_1 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_1_0_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_0)) + )) + (net N_98_1 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_0_1_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_0_0)) + )) + (net N_99_1 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_1_1_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_1_0)) + )) + (net N_101_1 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_3_1_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_3_3_0)) + )) + (net N_101_2 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_3_2_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_a3_3_3_0)) + )) + (net N_101_3 (joined + (portRef O (instanceRef SM_AMIGA_ns_a3_3_3_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_a3_3_0)) + )) + (net (rename state_machine_un9_clk_000_ne_1 "state_machine.un9_clk_000_ne_1") (joined + (portRef O (instanceRef state_machine_un9_clk_000_ne_1)) + (portRef I0 (instanceRef state_machine_un9_clk_000_ne_4)) + )) + (net (rename state_machine_un9_clk_000_ne_2 "state_machine.un9_clk_000_ne_2") (joined + (portRef O (instanceRef state_machine_un9_clk_000_ne_2)) + (portRef I1 (instanceRef state_machine_un9_clk_000_ne_4)) + )) + (net (rename state_machine_un9_clk_000_ne_3 "state_machine.un9_clk_000_ne_3") (joined + (portRef O (instanceRef state_machine_un9_clk_000_ne_3)) + (portRef I1 (instanceRef state_machine_un9_clk_000_ne)) + )) + (net (rename state_machine_un9_clk_000_ne_4 "state_machine.un9_clk_000_ne_4") (joined + (portRef O (instanceRef state_machine_un9_clk_000_ne_4)) + (portRef I0 (instanceRef state_machine_un9_clk_000_ne)) + )) + (net (rename state_machine_un19_clk_000_ne_1 "state_machine.un19_clk_000_ne_1") (joined + (portRef O (instanceRef state_machine_un19_clk_000_ne_1)) + (portRef I0 (instanceRef state_machine_un19_clk_000_ne_3)) + )) + (net (rename state_machine_un19_clk_000_ne_2 "state_machine.un19_clk_000_ne_2") (joined + (portRef O (instanceRef state_machine_un19_clk_000_ne_2)) + (portRef I1 (instanceRef state_machine_un19_clk_000_ne_3)) + )) + (net (rename state_machine_un19_clk_000_ne_3 "state_machine.un19_clk_000_ne_3") (joined + (portRef O (instanceRef state_machine_un19_clk_000_ne_3)) + (portRef I0 (instanceRef state_machine_un19_clk_000_ne)) + )) + (net (rename state_machine_un15_reset_dly_1 "state_machine.un15_reset_dly_1") (joined + (portRef O (instanceRef state_machine_un15_reset_dly_1)) + (portRef I0 (instanceRef state_machine_un15_reset_dly_5)) + )) + (net (rename state_machine_un15_reset_dly_2 "state_machine.un15_reset_dly_2") (joined + (portRef O (instanceRef state_machine_un15_reset_dly_2)) + (portRef I1 (instanceRef state_machine_un15_reset_dly_5)) + )) + (net (rename state_machine_un15_reset_dly_3 "state_machine.un15_reset_dly_3") (joined + (portRef O (instanceRef state_machine_un15_reset_dly_3)) + (portRef I0 (instanceRef state_machine_un15_reset_dly_6)) + )) + (net (rename state_machine_un15_reset_dly_4 "state_machine.un15_reset_dly_4") (joined + (portRef O (instanceRef state_machine_un15_reset_dly_4)) + (portRef I1 (instanceRef state_machine_un15_reset_dly_6)) + )) + (net (rename state_machine_un15_reset_dly_5 "state_machine.un15_reset_dly_5") (joined + (portRef O (instanceRef state_machine_un15_reset_dly_5)) + (portRef I0 (instanceRef state_machine_un15_reset_dly)) + )) + (net (rename state_machine_un15_reset_dly_6 "state_machine.un15_reset_dly_6") (joined + (portRef O (instanceRef state_machine_un15_reset_dly_6)) + (portRef I1 (instanceRef state_machine_un15_reset_dly)) + )) + (net un5_ciin_1 (joined + (portRef O (instanceRef un5_ciin_1)) + (portRef I0 (instanceRef un5_ciin_7)) + )) + (net un5_ciin_2 (joined + (portRef O (instanceRef un5_ciin_2)) + (portRef I1 (instanceRef un5_ciin_7)) + )) + (net un5_ciin_3 (joined + (portRef O (instanceRef un5_ciin_3)) + (portRef I0 (instanceRef un5_ciin_8)) + )) + (net un5_ciin_4 (joined + (portRef O (instanceRef un5_ciin_4)) + (portRef I1 (instanceRef un5_ciin_8)) + )) + (net un5_ciin_5 (joined + (portRef O (instanceRef un5_ciin_5)) + (portRef I0 (instanceRef un5_ciin_9)) + )) + (net un5_ciin_6 (joined + (portRef O (instanceRef un5_ciin_6)) + (portRef I1 (instanceRef un5_ciin_9)) + )) + (net un5_ciin_7 (joined + (portRef O (instanceRef un5_ciin_7)) + (portRef I0 (instanceRef un5_ciin_10)) + )) + (net un5_ciin_8 (joined + (portRef O (instanceRef un5_ciin_8)) + (portRef I1 (instanceRef un5_ciin_10)) + )) + (net un5_ciin_9 (joined + (portRef O (instanceRef un5_ciin_9)) + (portRef I0 (instanceRef un5_ciin_11)) + )) + (net un5_ciin_10 (joined + (portRef O (instanceRef un5_ciin_10)) + (portRef I0 (instanceRef un5_ciin)) + )) + (net un5_ciin_11 (joined + (portRef O (instanceRef un5_ciin_11)) + (portRef I1 (instanceRef un5_ciin)) + )) + (net un12_ciin_1 (joined + (portRef O (instanceRef un12_ciin_1)) + (portRef I0 (instanceRef un12_ciin_5)) + )) + (net un12_ciin_2 (joined + (portRef O (instanceRef un12_ciin_2)) + (portRef I1 (instanceRef un12_ciin_5)) + )) + (net un12_ciin_3 (joined + (portRef O (instanceRef un12_ciin_3)) + (portRef I0 (instanceRef un12_ciin_6)) + )) + (net un12_ciin_4 (joined + (portRef O (instanceRef un12_ciin_4)) + (portRef I1 (instanceRef un12_ciin_6)) + )) + (net un12_ciin_5 (joined + (portRef O (instanceRef un12_ciin_5)) + (portRef I0 (instanceRef un12_ciin)) + )) + (net un12_ciin_6 (joined + (portRef O (instanceRef un12_ciin_6)) + (portRef I1 (instanceRef un12_ciin)) + )) + (net (rename state_machine_un6_bg_030_1 "state_machine.un6_bg_030_1") (joined + (portRef O (instanceRef state_machine_un6_bg_030_1)) + (portRef I0 (instanceRef state_machine_un6_bg_030)) + )) + (net (rename pos_clk_un4_clk_000_ne_d0_1_0 "pos_clk.un4_clk_000_ne_d0_1_0") (joined + (portRef O (instanceRef pos_clk_un4_clk_000_ne_d0_1_0)) + (portRef I0 (instanceRef pos_clk_un4_clk_000_ne_d0)) + )) + (net (rename state_machine_un10_clk_000_d0_1 "state_machine.un10_clk_000_d0_1") (joined + (portRef O (instanceRef state_machine_un10_clk_000_d0_1)) + (portRef I0 (instanceRef state_machine_un10_clk_000_d0)) + )) + (net N_118_1_0 (joined + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_0_a3_0_1_0)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_a3_0)) + )) + (net un19_fpu_cs_1 (joined + (portRef O (instanceRef un19_fpu_cs_1)) + (portRef I0 (instanceRef un19_fpu_cs_4)) + )) + (net un19_fpu_cs_2 (joined + (portRef O (instanceRef un19_fpu_cs_2)) + (portRef I1 (instanceRef un19_fpu_cs_4)) + )) + (net un19_fpu_cs_3 (joined + (portRef O (instanceRef un19_fpu_cs_3)) + (portRef I0 (instanceRef un19_fpu_cs_5)) + )) + (net un19_fpu_cs_4_0 (joined + (portRef O (instanceRef un19_fpu_cs_4)) + (portRef I0 (instanceRef un19_fpu_cs)) + )) + (net un19_fpu_cs_5 (joined + (portRef O (instanceRef un19_fpu_cs_5)) + (portRef I1 (instanceRef un19_fpu_cs)) + )) + (net RW_000_INT_1_sqmuxa_1 (joined + (portRef O (instanceRef RW_000_INT_1_sqmuxa_1)) + (portRef I0 (instanceRef RW_000_INT_1_sqmuxa)) + )) + (net RW_000_INT_1_sqmuxa_2 (joined + (portRef O (instanceRef RW_000_INT_1_sqmuxa_2)) + (portRef I1 (instanceRef RW_000_INT_1_sqmuxa)) + )) + (net AMIGA_BUS_ENABLE_INT_1_sqmuxa_1_1 (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_INT_1_sqmuxa_1_1)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_INT_1_sqmuxa_1)) + )) + (net (rename AMIGA_BUS_ENABLE_INT_0_un3 "AMIGA_BUS_ENABLE_INT_0.un3") (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_INT_0_r)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_INT_0_n)) + )) + (net (rename AMIGA_BUS_ENABLE_INT_0_un1 "AMIGA_BUS_ENABLE_INT_0.un1") (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_INT_0_m)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_INT_0_p)) + )) + (net (rename AMIGA_BUS_ENABLE_INT_0_un0 "AMIGA_BUS_ENABLE_INT_0.un0") (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_INT_0_n)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_INT_0_p)) + )) + (net (rename DSACK1_INT_0_un3 "DSACK1_INT_0.un3") (joined + (portRef O (instanceRef DSACK1_INT_0_r)) + (portRef I1 (instanceRef DSACK1_INT_0_n)) + )) + (net (rename DSACK1_INT_0_un1 "DSACK1_INT_0.un1") (joined + (portRef O (instanceRef DSACK1_INT_0_m)) + (portRef I0 (instanceRef DSACK1_INT_0_p)) + )) + (net (rename DSACK1_INT_0_un0 "DSACK1_INT_0.un0") (joined + (portRef O (instanceRef DSACK1_INT_0_n)) + (portRef I1 (instanceRef DSACK1_INT_0_p)) + )) + (net (rename AS_000_INT_0_un3 "AS_000_INT_0.un3") (joined + (portRef O (instanceRef AS_000_INT_0_r)) + (portRef I1 (instanceRef AS_000_INT_0_n)) + )) + (net (rename AS_000_INT_0_un1 "AS_000_INT_0.un1") (joined + (portRef O (instanceRef AS_000_INT_0_m)) + (portRef I0 (instanceRef AS_000_INT_0_p)) + )) + (net (rename AS_000_INT_0_un0 "AS_000_INT_0.un0") (joined + (portRef O (instanceRef AS_000_INT_0_n)) + (portRef I1 (instanceRef AS_000_INT_0_p)) + )) + (net (rename RW_000_INT_0_un3 "RW_000_INT_0.un3") (joined + (portRef O (instanceRef RW_000_INT_0_r)) + (portRef I1 (instanceRef RW_000_INT_0_n)) + )) + (net (rename RW_000_INT_0_un1 "RW_000_INT_0.un1") (joined + (portRef O (instanceRef RW_000_INT_0_m)) + (portRef I0 (instanceRef RW_000_INT_0_p)) + )) + (net (rename RW_000_INT_0_un0 "RW_000_INT_0.un0") (joined + (portRef O (instanceRef RW_000_INT_0_n)) + (portRef I1 (instanceRef RW_000_INT_0_p)) + )) + (net (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__un3 "un1_AMIGA_BUS_ENABLE_DMA_HIGH_0_.un3") (joined + (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__r)) + (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__n)) + )) + (net (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__un1 "un1_AMIGA_BUS_ENABLE_DMA_HIGH_0_.un1") (joined + (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__m)) + (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__p)) + )) + (net (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__un0 "un1_AMIGA_BUS_ENABLE_DMA_HIGH_0_.un0") (joined + (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__n)) + (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_0__p)) + )) + (net (rename CLK_030_H_0_un3 "CLK_030_H_0.un3") (joined + (portRef O (instanceRef CLK_030_H_0_r)) + (portRef I1 (instanceRef CLK_030_H_0_n)) + )) + (net (rename CLK_030_H_0_un1 "CLK_030_H_0.un1") (joined + (portRef O (instanceRef CLK_030_H_0_m)) + (portRef I0 (instanceRef CLK_030_H_0_p)) + )) + (net (rename CLK_030_H_0_un0 "CLK_030_H_0.un0") (joined + (portRef O (instanceRef CLK_030_H_0_n)) + (portRef I1 (instanceRef CLK_030_H_0_p)) + )) + (net (rename AS_000_DMA_0_un3 "AS_000_DMA_0.un3") (joined + (portRef O (instanceRef AS_000_DMA_0_r)) + (portRef I1 (instanceRef AS_000_DMA_0_n)) + )) + (net (rename AS_000_DMA_0_un1 "AS_000_DMA_0.un1") (joined + (portRef O (instanceRef AS_000_DMA_0_m)) + (portRef I0 (instanceRef AS_000_DMA_0_p)) + )) + (net (rename AS_000_DMA_0_un0 "AS_000_DMA_0.un0") (joined + (portRef O (instanceRef AS_000_DMA_0_n)) + (portRef I1 (instanceRef AS_000_DMA_0_p)) + )) + (net (rename DS_000_DMA_0_un3 "DS_000_DMA_0.un3") (joined + (portRef O (instanceRef DS_000_DMA_0_r)) + (portRef I1 (instanceRef DS_000_DMA_0_n)) + )) + (net (rename DS_000_DMA_0_un1 "DS_000_DMA_0.un1") (joined + (portRef O (instanceRef DS_000_DMA_0_m)) + (portRef I0 (instanceRef DS_000_DMA_0_p)) + )) + (net (rename DS_000_DMA_0_un0 "DS_000_DMA_0.un0") (joined + (portRef O (instanceRef DS_000_DMA_0_n)) + (portRef I1 (instanceRef DS_000_DMA_0_p)) + )) + (net (rename cpu_est_0_2__un3 "cpu_est_0_2_.un3") (joined + (portRef O (instanceRef cpu_est_0_2__r)) + (portRef I1 (instanceRef cpu_est_0_2__n)) + )) + (net (rename cpu_est_0_2__un1 "cpu_est_0_2_.un1") (joined + (portRef O (instanceRef cpu_est_0_2__m)) + (portRef I0 (instanceRef cpu_est_0_2__p)) + )) + (net (rename cpu_est_0_2__un0 "cpu_est_0_2_.un0") (joined + (portRef O (instanceRef cpu_est_0_2__n)) + (portRef I1 (instanceRef cpu_est_0_2__p)) + )) + (net (rename cpu_est_0_3__un3 "cpu_est_0_3_.un3") (joined + (portRef O (instanceRef cpu_est_0_3__r)) + (portRef I1 (instanceRef cpu_est_0_3__n)) + )) + (net (rename cpu_est_0_3__un1 "cpu_est_0_3_.un1") (joined + (portRef O (instanceRef cpu_est_0_3__m)) + (portRef I0 (instanceRef cpu_est_0_3__p)) + )) + (net (rename cpu_est_0_3__un0 "cpu_est_0_3_.un0") (joined + (portRef O (instanceRef cpu_est_0_3__n)) + (portRef I1 (instanceRef cpu_est_0_3__p)) + )) + (net (rename IPL_030_0_0__un3 "IPL_030_0_0_.un3") (joined + (portRef O (instanceRef IPL_030_0_0__r)) + (portRef I1 (instanceRef IPL_030_0_0__n)) + )) + (net (rename IPL_030_0_0__un1 "IPL_030_0_0_.un1") (joined + (portRef O (instanceRef IPL_030_0_0__m)) + (portRef I0 (instanceRef IPL_030_0_0__p)) + )) + (net (rename IPL_030_0_0__un0 "IPL_030_0_0_.un0") (joined + (portRef O (instanceRef IPL_030_0_0__n)) + (portRef I1 (instanceRef IPL_030_0_0__p)) + )) + (net (rename IPL_030_0_1__un3 "IPL_030_0_1_.un3") (joined + (portRef O (instanceRef IPL_030_0_1__r)) + (portRef I1 (instanceRef IPL_030_0_1__n)) + )) + (net (rename IPL_030_0_1__un1 "IPL_030_0_1_.un1") (joined + (portRef O (instanceRef IPL_030_0_1__m)) + (portRef I0 (instanceRef IPL_030_0_1__p)) + )) + (net (rename IPL_030_0_1__un0 "IPL_030_0_1_.un0") (joined + (portRef O (instanceRef IPL_030_0_1__n)) + (portRef I1 (instanceRef IPL_030_0_1__p)) + )) + (net (rename IPL_030_0_2__un3 "IPL_030_0_2_.un3") (joined + (portRef O (instanceRef IPL_030_0_2__r)) + (portRef I1 (instanceRef IPL_030_0_2__n)) + )) + (net (rename IPL_030_0_2__un1 "IPL_030_0_2_.un1") (joined + (portRef O (instanceRef IPL_030_0_2__m)) + (portRef I0 (instanceRef IPL_030_0_2__p)) + )) + (net (rename IPL_030_0_2__un0 "IPL_030_0_2_.un0") (joined + (portRef O (instanceRef IPL_030_0_2__n)) + (portRef I1 (instanceRef IPL_030_0_2__p)) + )) + (net (rename DS_000_ENABLE_0_un3 "DS_000_ENABLE_0.un3") (joined + (portRef O (instanceRef DS_000_ENABLE_0_r)) + (portRef I1 (instanceRef DS_000_ENABLE_0_n)) + )) + (net (rename DS_000_ENABLE_0_un1 "DS_000_ENABLE_0.un1") (joined + (portRef O (instanceRef DS_000_ENABLE_0_m)) + (portRef I0 (instanceRef DS_000_ENABLE_0_p)) + )) + (net (rename DS_000_ENABLE_0_un0 "DS_000_ENABLE_0.un0") (joined + (portRef O (instanceRef DS_000_ENABLE_0_n)) + (portRef I1 (instanceRef DS_000_ENABLE_0_p)) + )) + (net (rename AS_030_000_SYNC_0_un3 "AS_030_000_SYNC_0.un3") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_r)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_n)) + )) + (net (rename AS_030_000_SYNC_0_un1 "AS_030_000_SYNC_0.un1") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_m)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_p)) + )) + (net (rename AS_030_000_SYNC_0_un0 "AS_030_000_SYNC_0.un0") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_n)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_p)) + )) + (net (rename LDS_000_INT_0_un3 "LDS_000_INT_0.un3") (joined + (portRef O (instanceRef LDS_000_INT_0_r)) + (portRef I1 (instanceRef LDS_000_INT_0_n)) + )) + (net (rename LDS_000_INT_0_un1 "LDS_000_INT_0.un1") (joined + (portRef O (instanceRef LDS_000_INT_0_m)) + (portRef I0 (instanceRef LDS_000_INT_0_p)) + )) + (net (rename LDS_000_INT_0_un0 "LDS_000_INT_0.un0") (joined + (portRef O (instanceRef LDS_000_INT_0_n)) + (portRef I1 (instanceRef LDS_000_INT_0_p)) + )) + (net (rename VMA_INT_0_un3 "VMA_INT_0.un3") (joined + (portRef O (instanceRef VMA_INT_0_r)) + (portRef I1 (instanceRef VMA_INT_0_n)) + )) + (net (rename VMA_INT_0_un1 "VMA_INT_0.un1") (joined + (portRef O (instanceRef VMA_INT_0_m)) + (portRef I0 (instanceRef VMA_INT_0_p)) + )) + (net (rename VMA_INT_0_un0 "VMA_INT_0.un0") (joined + (portRef O (instanceRef VMA_INT_0_n)) + (portRef I1 (instanceRef VMA_INT_0_p)) + )) + (net (rename UDS_000_INT_0_un3 "UDS_000_INT_0.un3") (joined + (portRef O (instanceRef UDS_000_INT_0_r)) + (portRef I1 (instanceRef UDS_000_INT_0_n)) + )) + (net (rename UDS_000_INT_0_un1 "UDS_000_INT_0.un1") (joined + (portRef O (instanceRef UDS_000_INT_0_m)) + (portRef I0 (instanceRef UDS_000_INT_0_p)) + )) + (net (rename UDS_000_INT_0_un0 "UDS_000_INT_0.un0") (joined + (portRef O (instanceRef UDS_000_INT_0_n)) + (portRef I1 (instanceRef UDS_000_INT_0_p)) + )) + (net (rename BG_000_0_un3 "BG_000_0.un3") (joined + (portRef O (instanceRef BG_000_0_r)) + (portRef I1 (instanceRef BG_000_0_n)) + )) + (net (rename BG_000_0_un1 "BG_000_0.un1") (joined + (portRef O (instanceRef BG_000_0_m)) + (portRef I0 (instanceRef BG_000_0_p)) + )) + (net (rename BG_000_0_un0 "BG_000_0.un0") (joined + (portRef O (instanceRef BG_000_0_n)) + (portRef I1 (instanceRef BG_000_0_p)) + )) + (net (rename BGACK_030_INT_0_un3 "BGACK_030_INT_0.un3") (joined + (portRef O (instanceRef BGACK_030_INT_0_r)) + (portRef I1 (instanceRef BGACK_030_INT_0_n)) + )) + (net (rename BGACK_030_INT_0_un1 "BGACK_030_INT_0.un1") (joined + (portRef O (instanceRef BGACK_030_INT_0_m)) + (portRef I0 (instanceRef BGACK_030_INT_0_p)) + )) + (net (rename BGACK_030_INT_0_un0 "BGACK_030_INT_0.un0") (joined + (portRef O (instanceRef BGACK_030_INT_0_n)) + (portRef I1 (instanceRef BGACK_030_INT_0_p)) + )) + (net (rename cpu_est_0_1__un3 "cpu_est_0_1_.un3") (joined + (portRef O (instanceRef cpu_est_0_1__r)) + (portRef I1 (instanceRef cpu_est_0_1__n)) + )) + (net (rename cpu_est_0_1__un1 "cpu_est_0_1_.un1") (joined + (portRef O (instanceRef cpu_est_0_1__m)) + (portRef I0 (instanceRef cpu_est_0_1__p)) + )) + (net (rename cpu_est_0_1__un0 "cpu_est_0_1_.un0") (joined + (portRef O (instanceRef cpu_est_0_1__n)) + (portRef I1 (instanceRef cpu_est_0_1__p)) + )) + ) + (property orig_inst_of (string "BUS68030")) + ) + ) + ) + (design BUS68030 (cellRef BUS68030 (libraryRef work))) +) diff --git a/Logic/BUS68030.naf b/Logic/BUS68030.naf new file mode 100644 index 0000000..dc824e3 --- /dev/null +++ b/Logic/BUS68030.naf @@ -0,0 +1,61 @@ +AS_030 b +AS_000 b +RW_000 b +DS_030 b +UDS_000 b +LDS_000 b +SIZE[1] b +SIZE[0] b +A[31] i +A[30] i +A[29] i +A[28] i +A[27] i +A[26] i +A[25] i +A[24] i +A[23] i +A[22] i +A[21] i +A[20] i +A[19] i +A[18] i +A[17] i +A[16] i +A0 b +A1 i +nEXP_SPACE i +BERR b +BG_030 i +BG_000 o +BGACK_030 o +BGACK_000 i +CLK_030 i +CLK_000 i +CLK_OSZI i +CLK_DIV_OUT o +CLK_EXP o +FPU_CS o +FPU_SENSE i +IPL_030[2] o +IPL_030[1] o +IPL_030[0] o +IPL[2] i +IPL[1] i +IPL[0] i +DSACK1 b +DTACK b +AVEC o +E o +VPA i +VMA o +RST i +RESET o +RW b +FC[1] i +FC[0] i +AMIGA_ADDR_ENABLE o +AMIGA_BUS_DATA_DIR o +AMIGA_BUS_ENABLE_LOW o +AMIGA_BUS_ENABLE_HIGH o +CIIN o diff --git a/Logic/BUS68030.prj b/Logic/BUS68030.prj index 16894da..3f01e97 100644 --- a/Logic/BUS68030.prj +++ b/Logic/BUS68030.prj @@ -1,6 +1,6 @@ #-- Lattice Semiconductor Corporation Ltd. #-- Synplify OEM project file c:/users/matze/documents/github/68030tk/logic\BUS68030.prj -#-- Written on Mon Jan 12 22:00:32 2015 +#-- Written on Sun Feb 01 21:36:43 2015 #device options diff --git a/Logic/M4A5_128_64_XXYC.bsd b/Logic/M4A5_128_64_XXYC.bsd deleted file mode 100644 index 4c3f37e..0000000 --- a/Logic/M4A5_128_64_XXYC.bsd +++ /dev/null @@ -1,1265 +0,0 @@ --- ******************************************************************** --- * M4A5-128/64 100 Pin PQFP 5.0V BSDL Model * --- * * --- * File Version: V2.00 * --- * File Date: Dec. 10, 2001 * --- * * --- * Standard Test Access Port and Boundary-Scan Architecture * --- * VHDL Description File * --- * * --- * This BSDL can be used for Boundary-Scan Test as well as * --- * ISC 1532 Programming support. * --- * * --- * This BSDL file is created according to: * --- * - IEEE 1532 2001 spec. * --- * - IEEE 1149.1 1994 spec. * --- * * --- * This BSDL file has been syntax checked with: * --- * - Lattice BSDL Syntax Checker * --- * - Agilent BSDL Syntax Checker * --- * * --- * Copyright 2000, 2001 Lattice Semiconductor Corporation * --- * 5555 NE Moore Ct., Hillsboro, OR 97124 * --- * All rights reserved. No part of this program or publication * --- * may be reproduced, transmitted, transcribed, stored in a * --- * retrieval system, or translated into any language or * --- * computer language, in any form or by any means without this * --- * notice appearing within. * --- ******************************************************************** --- * * --- * IMPORTANT * --- * * --- * The following is a BSDL file that tests all of the I/O pins * --- * as bidirectional pins. The functionality of the BSCAN register * --- * for this device is independent of the pattern programmed * --- * into the device. An additional programming step is not * --- * required to configure the I/O pins prior to BSCAN test. * --- * * --- * This file contains additional information that may cause a BSDL * --- * parser to reject or error if your parser does not contain the * --- * 1532 library. BSDL files without ISC extensions are available * --- * on the Lattice website at www.latticesemi.com. * --- * * --- * For Further assistance, please contact Tech Support at * --- * 1-800-LATTICE or techsupport@latticesemi.com. * --- ******************************************************************** --- * Revision History * --- * * --- * Rev 2.00: 12/10/2001 * --- * - Changed entity name from iM4A5_128_64_XXYC to * --- * M4A5_128_64_XXYC. Edit file column length to 72 characters * --- * max. Updated Header. * --- * Rev 1.10: 10/23/2001 * --- * - Changed ISC_READ in flow_verify and flow_read * --- * from WAIT TCK 1 to WAIT TCK 3, 2.0E-3. * --- * Rev 1.9: 10/03/2001 * --- * - Changed USERCODE TDO array to USERCODE. * --- * Rev 1.8: 08/30/2001 * --- * - Updated entity name. * --- * Rev 1.7: 07/10/2001 * --- * - Added IEEE 1532 Extension. * --- * Rev 1.6: 06/07/2001 * --- * - Add Lattice phone number and email address. * --- * Rev 1.5: 12/23/1998 * --- * - Modified entity name for M4A5-128/64 100-pin PQFP. * --- * Rev 1.4: 10/08/1998 * --- * - Moved some instructions from private to public. * --- * Rev 1.3: 09/04/1998 * --- * - Updated entity to descriptive, 14-char string. * --- ******************************************************************** --- --- Entity format: iMabc_ddd_eee_XXff --- a = family (1, 2, 4, 5) --- b = A for "A" type parts --- c = Vcc level: 5, 3, 2, or 1 for 5.0, 3.3, 2.5, or 1.8 VDC --- ddd = number of macrocells, such as 064 --- eee = number of I/O pins, such as 032 --- ff = package: JC, YC, VC, or AC for PLCC, PQFP, TQFP, or BGA --- -entity M4A5_128_64_XXYC is - - generic(PHYSICAL_PIN_MAP : string := "PQFP_100pin"); - - port ( - DED_IN : in bit_vector(0 to 5); -- Clocks/Inputs - IO : inout bit_vector(0 to 63); -- I/O pins - - TCK, TMS, TDI, TRST: in bit; -- JTAG inputs - TDO : out bit; -- JTAG outputs - ENABLEB : linkage bit; -- Program Enable pin - - VCC : linkage bit_vector(0 to 7); - GND : linkage bit_vector(0 to 15) - ); - - use STD_1149_1_1994.all; -- Standard 'use' statement - use STD_1532_2001.all; -- BSDL Extension for ISC devices - - attribute COMPONENT_CONFORMANCE of M4A5_128_64_XXYC : entity is - "STD_1149_1_1993"; - - attribute PIN_MAP of M4A5_128_64_XXYC : entity is PHYSICAL_PIN_MAP; - - constant PQFP_100pin : PIN_MAP_STRING := - "DED_IN:(13,18,54,63,68,4), "& -- Dedicated Clock/Input Pins - "IO:(93,94,95,96,97,98,99,100, "& -- I/O A - " 5, 6, 7, 8, 9, 10, 11, 12, "& -- I/O B REV - " 19, 20, 21, 22, 23, 24, 25, 26, "& -- I/O C - " 31, 32, 33, 34, 35, 36, 37, 38, "& -- I/O D REV - " 43, 44, 45, 46, 47, 48, 49, 50, "& -- I/O E - " 55, 56, 57, 58, 59, 60, 61, 62, "& -- I/O F REV - " 69, 70, 71, 72, 73, 74, 75, 76, "& -- I/O G - " 81, 82, 83, 84, 85, 86, 87, 88), "& -- I/O H REV - "ENABLEB:53, "& - "TDI:3, TMS:27, TCK:28, TRST:77, TDO:78, "& -- JTAG - - "VCC:(14,15,39,42,64,65,89,92), "& -- POWER - "GND:(1,2,16,17,29,30,40,41, "& -- GROUND PINS - "51,52,66,67,79,80,90,91)"; -- END OF PIN DEFINITION - - attribute TAP_SCAN_IN of TDI : signal is true; - attribute TAP_SCAN_MODE of TMS : signal is true; - attribute TAP_SCAN_OUT of TDO : signal is true; - attribute TAP_SCAN_RESET of TRST : signal is true; - attribute TAP_SCAN_CLOCK of TCK: signal is (20.0e6, BOTH); - --- Instruction register definitions - attribute INSTRUCTION_LENGTH of M4A5_128_64_XXYC : entity is 6; - attribute INSTRUCTION_OPCODE of M4A5_128_64_XXYC : entity is - "BYPASS (111111), "& - "EXTEST (000000), "& - "SAMPLE (000010), "& - "IDCODE (000001), "& - "USERCODE (010000), "& - "HIGHZ (010001), "& --- ISC Instructions - "ISC_ADDRESS_SHIFT (000011), "& - "ISC_DATA_SHIFT (000100), "& - "ISC_ERASE (000101), "& - "ISC_PROGRAM (000110), "& - "ISC_READ (000111), "& - "ISC_PROGRAM_SECURITY (001000), "& - "ISC_ENABLE (001111), "& - "ISC_DISABLE (111111), "& - "ISC_NOOP (111111), "& - --- Private Instructions - "PRIV009 (001001), "& - "PRIVATE (110011,110100,110000,110010,100101,101110, "& - "100111,101101,001100,001101,001110)"; - -attribute INSTRUCTION_CAPTURE of M4A5_128_64_XXYC : - entity is "000001"; -attribute INSTRUCTION_PRIVATE of M4A5_128_64_XXYC : - entity is "PRIVATE"; - - attribute IDCODE_REGISTER of M4A5_128_64_XXYC : entity is - "0010"& -- version number (2) - "0111010101101010"& -- part identification (756A) - "00010101011"& -- company code (157) - "1"; -- mandatory 1 - - attribute USERCODE_REGISTER of M4A5_128_64_XXYC : entity is - "11111111111111111111111111111111"; - - attribute REGISTER_ACCESS of M4A5_128_64_XXYC : entity is - "BYPASS (BYPASS, HIGHZ, PRIV009), "& - "ISC_DEFAULT[1] (ISC_PROGRAM, ISC_DISABLE, ISC_NOOP, "& - "ISC_ERASE, ISC_PROGRAM_SECURITY), "& - "BOUNDARY (EXTEST, SAMPLE), "& - "ISC_ADDRESS[80] (ISC_ADDRESS_SHIFT), "& - "ISC_DATA[792] (ISC_DATA_SHIFT), "& - "ISC_RDATA[792] (ISC_READ), "& - "DEVICE_ID (USERCODE, IDCODE), "& - "ISC_CONFIG[5] (ISC_ENABLE)"; - --- ************************************************************** --- * BOUNDARY SCAN CELL REGISTER DESCRIPTION --- * THE FIRST CELL (0) IS THE CELL CLOSEST TO TDO --- ************************************************************** - attribute BOUNDARY_LENGTH of M4A5_128_64_XXYC : entity is 198; - attribute BOUNDARY_REGISTER of M4A5_128_64_XXYC : entity is - - -- 1. The order of the I/O cell is OE - OUTPUT - INPUT - -- 2. The output is disabled when a 0 is shifted into the OE cell. - -- 3. The pictoral representation of the Boundary scan - -- register is found in AMD document no. 93-009-6105-JT-01. - -- - - " 197 (BC_1, IO(0), INPUT, X), "& - " 196 (BC_1, IO(0), OUTPUT3, X, 195, 0, Z), "& - " 195 (BC_1, *, CONTROL, 0), "& - " 194 (BC_1, IO(1), INPUT, X), "& - " 193 (BC_1, IO(1), OUTPUT3, X, 192, 0, Z), "& - " 192 (BC_1, *, CONTROL, 0), "& - " 191 (BC_1, IO(2), INPUT, X), "& - " 190 (BC_1, IO(2), OUTPUT3, X, 189, 0, Z), "& - " 189 (BC_1, *, CONTROL, 0), "& - " 188 (BC_1, IO(3), INPUT, X), "& - " 187 (BC_1, IO(3), OUTPUT3, X, 186, 0, Z), "& - " 186 (BC_1, *, CONTROL, 0), "& - " 185 (BC_1, IO(4), INPUT, X), "& - " 184 (BC_1, IO(4), OUTPUT3, X, 183, 0, Z), "& - " 183 (BC_1, *, CONTROL, 0), "& - " 182 (BC_1, IO(5), INPUT, X), "& - " 181 (BC_1, IO(5), OUTPUT3, X, 180, 0, Z), "& - " 180 (BC_1, *, CONTROL, 0), "& - " 179 (BC_1, IO(6), INPUT, X), "& - " 178 (BC_1, IO(6), OUTPUT3, X, 177, 0, Z), "& - " 177 (BC_1, *, CONTROL, 0), "& - " 176 (BC_1, IO(7), INPUT, X), "& - " 175 (BC_1, IO(7), OUTPUT3, X, 174, 0, Z), "& - " 174 (BC_1, *, CONTROL, 0), "& - - " 173 (BC_1, IO(15), INPUT, X), "& - " 172 (BC_1, IO(15), OUTPUT3, X, 171, 0, Z), "& - " 171 (BC_1, *, CONTROL, 0), "& - " 170 (BC_1, IO(14), INPUT, X), "& - " 169 (BC_1, IO(14), OUTPUT3, X, 168, 0, Z), "& - " 168 (BC_1, *, CONTROL, 0), "& - " 167 (BC_1, IO(13), INPUT, X), "& - " 166 (BC_1, IO(13), OUTPUT3, X, 165, 0, Z), "& - " 165 (BC_1, *, CONTROL, 0), "& - " 164 (BC_1, IO(12), INPUT, X), "& - " 163 (BC_1, IO(12), OUTPUT3, X, 162, 0, Z), "& - " 162 (BC_1, *, CONTROL, 0), "& - " 161 (BC_1, IO(11), INPUT, X), "& - " 160 (BC_1, IO(11), OUTPUT3, X, 159, 0, Z), "& - " 159 (BC_1, *, CONTROL, 0), "& - " 158 (BC_1, IO(10), INPUT, X), "& - " 157 (BC_1, IO(10), OUTPUT3, X, 156, 0, Z), "& - " 156 (BC_1, *, CONTROL, 0), "& - " 155 (BC_1, IO(9), INPUT, X)," & - " 154 (BC_1, IO(9), OUTPUT3, X, 153, 0, Z), "& - " 153 (BC_1, *, CONTROL, 0), "& - " 152 (BC_1, IO(8), INPUT, X)," & - " 151 (BC_1, IO(8), OUTPUT3, X, 150, 0, Z), "& - " 150 (BC_1, *, CONTROL, 0), "& - - " 149 (BC_1, DED_IN(0), INPUT, X), "& - " 148 (BC_1, DED_IN(1), INPUT, X), "& - - " 147 (BC_1, IO(16), INPUT, X), "& - " 146 (BC_1, IO(16), OUTPUT3, X, 145, 0, Z), "& - " 145 (BC_1, *, CONTROL, 0), "& - " 144 (BC_1, IO(17), INPUT, X), "& - " 143 (BC_1, IO(17), OUTPUT3, X, 142, 0, Z), "& - " 142 (BC_1, *, CONTROL, 0), "& - " 141 (BC_1, IO(18), INPUT, X), "& - " 140 (BC_1, IO(18), OUTPUT3, X, 139, 0, Z), "& - " 139 (BC_1, *, CONTROL, 0), "& - " 138 (BC_1, IO(19), INPUT, X), "& - " 137 (BC_1, IO(19), OUTPUT3, X, 136, 0, Z), "& - " 136 (BC_1, *, CONTROL, 0), "& - " 135 (BC_1, IO(20), INPUT, X), "& - " 134 (BC_1, IO(20), OUTPUT3, X, 133, 0, Z), "& - " 133 (BC_1, *, CONTROL, 0), "& - " 132 (BC_1, IO(21), INPUT, X), "& - " 131 (BC_1, IO(21), OUTPUT3, X, 130, 0, Z), "& - " 130 (BC_1, *, CONTROL, 0), "& - " 129 (BC_1, IO(22), INPUT, X), "& - " 128 (BC_1, IO(22), OUTPUT3, X, 127, 0, Z), "& - " 127 (BC_1, *, CONTROL, 0), "& - " 126 (BC_1, IO(23), INPUT, X), "& - " 125 (BC_1, IO(23), OUTPUT3, X, 124, 0, Z), "& - " 124 (BC_1, *, CONTROL, 0), "& - - " 123 (BC_1, IO(31), INPUT, X), "& - " 122 (BC_1, IO(31), OUTPUT3, X, 121, 0, Z), "& - " 121 (BC_1, *, CONTROL, 0), "& - " 120 (BC_1, IO(30), INPUT, X), "& - " 119 (BC_1, IO(30), OUTPUT3, X, 118, 0, Z), "& - " 118 (BC_1, *, CONTROL, 0), "& - " 117 (BC_1, IO(29), INPUT, X), "& - " 116 (BC_1, IO(29), OUTPUT3, X, 115, 0, Z), "& - " 115 (BC_1, *, CONTROL, 0), "& - " 114 (BC_1, IO(28), INPUT, X), "& - " 113 (BC_1, IO(28), OUTPUT3, X, 112, 0, Z), "& - " 112 (BC_1, *, CONTROL, 0), "& - " 111 (BC_1, IO(27), INPUT, X), "& - " 110 (BC_1, IO(27), OUTPUT3, X, 109, 0, Z), "& - " 109 (BC_1, *, CONTROL, 0), "& - " 108 (BC_1, IO(26), INPUT, X), "& - " 107 (BC_1, IO(26), OUTPUT3, X, 106, 0, Z), "& - " 106 (BC_1, *, CONTROL, 0), "& - " 105 (BC_1, IO(25), INPUT, X), "& - " 104 (BC_1, IO(25), OUTPUT3, X, 103, 0, Z), "& - " 103 (BC_1, *, CONTROL, 0), "& - " 102 (BC_1, IO(24), INPUT, X), "& - " 101 (BC_1, IO(24), OUTPUT3, X, 100, 0, Z), "& - " 100 (BC_1, *, CONTROL, 0), "& - - " 99 (BC_1, DED_IN(2), INPUT, X), "& - - " 98 (BC_1, IO(32), INPUT, X), "& - " 97 (BC_1, IO(32), OUTPUT3, X, 96, 0, Z), "& - " 96 (BC_1, *, CONTROL, 0), "& - " 95 (BC_1, IO(33), INPUT, X), "& - " 94 (BC_1, IO(33), OUTPUT3, X, 93, 0, Z), "& - " 93 (BC_1, *, CONTROL, 0), "& - " 92 (BC_1, IO(34), INPUT, X), "& - " 91 (BC_1, IO(34), OUTPUT3, X, 90, 0, Z), "& - " 90 (BC_1, *, CONTROL, 0), "& - " 89 (BC_1, IO(35), INPUT, X), "& - " 88 (BC_1, IO(35), OUTPUT3, X, 87, 0, Z), "& - " 87 (BC_1, *, CONTROL, 0), "& - " 86 (BC_1, IO(36), INPUT, X), "& - " 85 (BC_1, IO(36), OUTPUT3, X, 84, 0, Z), "& - " 84 (BC_1, *, CONTROL, 0), "& - " 83 (BC_1, IO(37), INPUT, X), "& - " 82 (BC_1, IO(37), OUTPUT3, X, 81, 0, Z), "& - " 81 (BC_1, *, CONTROL, 0), "& - " 80 (BC_1, IO(38), INPUT, X), "& - " 79 (BC_1, IO(38), OUTPUT3, X, 78, 0, Z), "& - " 78 (BC_1, *, CONTROL, 0), "& - " 77 (BC_1, IO(39), INPUT, X), "& - " 76 (BC_1, IO(39), OUTPUT3, X, 75, 0, Z), "& - " 75 (BC_1, *, CONTROL, 0), "& - - " 74 (BC_1, IO(47), INPUT, X), "& - " 73 (BC_1, IO(47), OUTPUT3, X, 72, 0, Z), "& - " 72 (BC_1, *, CONTROL, 0), "& - " 71 (BC_1, IO(46), INPUT, X), "& - " 70 (BC_1, IO(46), OUTPUT3, X, 69, 0, Z), "& - " 69 (BC_1, *, CONTROL, 0), "& - " 68 (BC_1, IO(45), INPUT, X), "& - " 67 (BC_1, IO(45), OUTPUT3, X, 66, 0, Z), "& - " 66 (BC_1, *, CONTROL, 0), "& - " 65 (BC_1, IO(44), INPUT, X), "& - " 64 (BC_1, IO(44), OUTPUT3, X, 63, 0, Z), "& - " 63 (BC_1, *, CONTROL, 0), "& - " 62 (BC_1, IO(43), INPUT, X), "& - " 61 (BC_1, IO(43), OUTPUT3, X, 60, 0, Z), "& - " 60 (BC_1, *, CONTROL, 0), "& - " 59 (BC_1, IO(42), INPUT, X), "& - " 58 (BC_1, IO(42), OUTPUT3, X, 57, 0, Z), "& - " 57 (BC_1, *, CONTROL, 0), "& - " 56 (BC_1, IO(41), INPUT, X), "& - " 55 (BC_1, IO(41), OUTPUT3, X, 54, 0, Z), "& - " 54 (BC_1, *, CONTROL, 0), "& - " 53 (BC_1, IO(40), INPUT, X), "& - " 52 (BC_1, IO(40), OUTPUT3, X, 51, 0, Z), "& - " 51 (BC_1, *, CONTROL, 0), "& - - " 50 (BC_1, DED_IN(3), INPUT, X), "& - " 49 (BC_1, DED_IN(4), INPUT, X), "& - - " 48 (BC_1, IO(48), INPUT, X), "& - " 47 (BC_1, IO(48), OUTPUT3, X, 46, 0, Z), "& - " 46 (BC_1, *, CONTROL, 0), "& - " 45 (BC_1, IO(49), INPUT, X), "& - " 44 (BC_1, IO(49), OUTPUT3, X, 43, 0, Z), "& - " 43 (BC_1, *, CONTROL, 0), "& - " 42 (BC_1, IO(50), INPUT, X), "& - " 41 (BC_1, IO(50), OUTPUT3, X, 40, 0, Z), "& - " 40 (BC_1, *, CONTROL, 0), "& - " 39 (BC_1, IO(51), INPUT, X), "& - " 38 (BC_1, IO(51), OUTPUT3, X, 37, 0, Z), "& - " 37 (BC_1, *, CONTROL, 0), "& - " 36 (BC_1, IO(52), INPUT, X), "& - " 35 (BC_1, IO(52), OUTPUT3, X, 34, 0, Z), "& - " 34 (BC_1, *, CONTROL, 0), "& - " 33 (BC_1, IO(53), INPUT, X), "& - " 32 (BC_1, IO(53), OUTPUT3, X, 31, 0, Z), "& - " 31 (BC_1, *, CONTROL, 0), "& - " 30 (BC_1, IO(54), INPUT, X), "& - " 29 (BC_1, IO(54), OUTPUT3, X, 28, 0, Z), "& - " 28 (BC_1, *, CONTROL, 0), "& - " 27 (BC_1, IO(55), INPUT, X), "& - " 26 (BC_1, IO(55), OUTPUT3, X, 25, 0, Z), "& - " 25 (BC_1, *, CONTROL, 0), "& - - " 24 (BC_1, IO(63), INPUT, X), "& - " 23 (BC_1, IO(63), OUTPUT3, X, 22, 0, Z), "& - " 22 (BC_1, *, CONTROL, 0), "& - " 21 (BC_1, IO(62), INPUT, X), "& - " 20 (BC_1, IO(62), OUTPUT3, X, 19, 0, Z), "& - " 19 (BC_1, *, CONTROL, 0), "& - " 18 (BC_1, IO(61), INPUT, X), "& - " 17 (BC_1, IO(61), OUTPUT3, X, 16, 0, Z), "& - " 16 (BC_1, *, CONTROL, 0), "& - " 15 (BC_1, IO(60), INPUT, X), "& - " 14 (BC_1, IO(60), OUTPUT3, X, 13, 0, Z), "& - " 13 (BC_1, *, CONTROL, 0), "& - " 12 (BC_1, IO(59), INPUT, X), "& - " 11 (BC_1, IO(59), OUTPUT3, X, 10, 0, Z), "& - " 10 (BC_1, *, CONTROL, 0), "& - " 9 (BC_1, IO(58), INPUT, X), "& - " 8 (BC_1, IO(58), OUTPUT3, X, 7, 0, Z), "& - " 7 (BC_1, *, CONTROL, 0), "& - " 6 (BC_1, IO(57), INPUT, X), "& - " 5 (BC_1, IO(57), OUTPUT3, X, 4, 0, Z), "& - " 4 (BC_1, *, CONTROL, 0), "& - " 3 (BC_1, IO(56), INPUT, X), "& - " 2 (BC_1, IO(56), OUTPUT3, X, 1, 0, Z), "& - " 1 (BC_1, *, CONTROL, 0), "& - - " 0 (BC_1, DED_IN(5), INPUT, X)"; - --- ****************************************************************** --- * IEEE 1532 EXTENSION INFORMATION * --- ****************************************************************** - -attribute ISC_PIN_BEHAVIOR of M4A5_128_64_XXYC : entity is - "CLAMP"; -- clamp behavior - -attribute ISC_STATUS of M4A5_128_64_XXYC : entity is - "NOT IMPLEMENTED"; - -attribute ISC_BLANK_USERCODE of M4A5_128_64_XXYC : entity is - "11111111111111111111111111111111"; - -attribute ISC_FLOW of M4A5_128_64_XXYC : entity is - "flow_verify(idcode) "& - "initialize "& - "(IDCODE WAIT TCK 3, 2.0E-3 32:2756A157*0FFFFFFF), "& - - "flow_enable "& - "initialize "& - "(ISC_ENABLE 5:8 WAIT TCK 3), "& - - "flow_bypass "& - "initialize "& - "(BYPASS WAIT TCK 1), "& - - "flow_erase "& - "initialize "& - "(ISC_ERASE WAIT TCK 3, 100.0e-3), "& - - "flow_erase_program "& - "initialize "& - "(ISC_ADDRESS_SHIFT 80:0 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:0 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 100.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr=80000000000000000000 WAIT TCK 1)"& - "repeat 66 "& - "(ISC_DATA_SHIFT 792:FFF7FEFFDFFBFF7FEFFDFFBFFFFEFFDFFBFF7FEFF"& - "DFFBFF7FFFFDFFBFF7FEFFDFFBFF7FEFFFFFBFF7FEFFDFFBFF7FEFFDFFFFF"& - "7FEFFDFFBFF7FEFFDFFBFFFFEFFDFFBFF7FEFFDFFBFF7FFFFDFFBFF7FEFFD"& - "FFBFF7FEFFFFFBFF7FEFFDFFBFF7FEFFDFF WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "terminate "& - "(ISC_DATA_SHIFT 792:$epgm1=0300600C0180300600C0180000600C0180"& - "300600C0180300000C0180300600C018030060000180300600C0180300600"& - "C0000300600C0180300600C0180000600C0180300600C0180300000C01803"& - "00600C018030060000180300600C0180300600C000 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$epgm2=0300600C0180300600C0180020600C0180"& - "300600C0180300040C0180300600C018030060008180300600C0180300600"& - "C0010300600C0180300600C0180020600C0180300600C0180300040C01803"& - "00600C018030060008180300600C0180300600C001 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$epgm2 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$epgm2 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$epgm2 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_ENABLE 5:9 WAIT TCK 3) "& - "(ISC_DATA_SHIFT 792:80080100200400801002004010010020040080100"& - "2004008020020040080100200400801004004008010020040080100200800"& - "8010020040080100200401001002004008010020040080200200400801002"& - "00400801004004008010020040080100200 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ENABLE 5:8 WAIT TCK 3), "& - - "flow_preload "& - "initialize "& - "(SAMPLE 198:0 WAIT TCK 1), "& - - "flow_program_init "& - "initialize "& - "(ISC_ADDRESS_SHIFT 80:0 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:0 WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 100.0e-3), "& - - "flow_program(array) "& - "initialize "& - "(ISC_ADDRESS_SHIFT 80:$addr=80000000000000000000 WAIT TCK 1)"& - "repeat 80 "& - "(ISC_DATA_SHIFT 792:? WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "terminate "& - "(ISC_ADDRESS_SHIFT 80:0 WAIT TCK 1) "& - "(ISC_ENABLE 5:9 WAIT TCK 3) "& - "(ISC_DATA_SHIFT 792:? WAIT TCK 1) "& - "(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "& - "(ISC_ENABLE 5:8 WAIT TCK 3), "& - - "flow_read_init "& - "initialize "& - "(ISC_ADDRESS_SHIFT 80:0 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:0 WAIT TCK 1), "& - - "flow_verify(array_tdo) "& - "initialize "& - "(ISC_ADDRESS_SHIFT 80:$addr=80000000000000000000 WAIT TCK 1)"& - "repeat 1 "& - "(ISC_DATA_SHIFT 792:$adsel=80000000000000000000000000000000"& - "0000000000000000000000000000000000000000000000000000000000000"& - "0000000000000000000000000000000000000000000000000000000000000"& - "00000000000000000000000000000000000000000000 WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:?:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1=000210420841082104"& - "20841080004208410821042084108210000841082104208410821042000"& - "10821042084108210420840002104208410821042084108000420841082"& - "10420841082100008410821042084108210420001082104208410821042"& - "084:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em2=80021042084108210420"& - "8410900042084108210420841082120008410821042084108210424001082"& - "1042084108210420848002104208410821042084109000420841082104208"& - "41082120008410821042084108210424001082104208410821042084:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em2:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em2:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em2:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"& - "terminate "& - "(ISC_ADDRESS_SHIFT 80:0 WAIT TCK 1) "& - "(ISC_ENABLE 5:9 WAIT TCK 3) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:?*0040080100200400801002002"& - "0080100200400801002004004010020040080100200400800802004008010"& - "0200400801001004008010020040080100200200801002004008010020040"& - "060100200400801002004008008020040080100200400801001:CRC) "& - "(ISC_ENABLE 5:8 WAIT TCK 3), "& - - "flow_verify(usercode) "& - "initialize "& - "(USERCODE WAIT TCK 3, 2.0E-3 32:?), "& - - "flow_read(array_tdo) Unprocessed "& - "initialize "& - "(ISC_ADDRESS_SHIFT 80:$addr=80000000000000000000 WAIT TCK 1)"& - "repeat 1 "& - "(ISC_DATA_SHIFT 792:$adsel=80000000000000000000000000000000"& - "0000000000000000000000000000000000000000000000000000000000000"& - "0000000000000000000000000000000000000000000000000000000000000"& - "00000000000000000000000000000000000000000000 WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, "& - "2.0E-3 792:!:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1=00021042084108210420"& - "8410800042084108210420841082100008410821042084108210420001082"& - "1042084108210420840002104208410821042084108000420841082104208"& - "41082100008410821042084108210420001082104208410821042084:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em2=800210420841082104208"& - "41090004208410821042084108212000841082104208410821042400108210"& - "42084108210420848002104208410821042084109000420841082104208410"& - "82120008410821042084108210424001082104208410821042084:CRC) "& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em2:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em2:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em2:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"& - "(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"& - "terminate "& - "(ISC_ADDRESS_SHIFT 80:0 WAIT TCK 1) "& - "(ISC_ENABLE 5:9 WAIT TCK 3) "& - "(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "& - "(ISC_READ WAIT TCK 3, 2.0E-3 792:*!0040080100200400801002002"& - "0080100200400801002004004010020040080100200400800802004008010"& - "0200400801001004008010020040080100200200801002004008010020040"& - "060100200400801002004008008020040080100200400801001:CRC) "& - "(ISC_ENABLE 5:8 WAIT TCK 3), "& - - "flow_read(usercode) Unprocessed "& - "initialize "& - "(USERCODE WAIT TCK 3, 2.0E-3 32:!), "& - - "flow_program_done "& - "initialize "& - "(ISC_NOOP WAIT TCK 1), "& - - "flow_program_security "& - "initialize "& - "(ISC_PROGRAM_SECURITY WAIT TCK 3, 50.0e-3), "& - - "flow_disable "& - "initialize "& - "(ISC_ENABLE 5:C WAIT TCK 3) "& - "(ISC_DISABLE WAIT TCK 3)"; - -attribute ISC_PROCEDURE of M4A5_128_64_XXYC : entity is - "proc_verify(idcode) = (flow_verify(idcode)), "& - "proc_enable = (flow_enable), "& - "proc_disable = (flow_disable), "& - "proc_program_init = (flow_program_init), "& - "proc_program(array) = (flow_program(array)), "& - "proc_read_init = (flow_read_init), "& - "proc_verify(array) = (flow_verify(array_tdo)), "& - "proc_verify(usercode) = (flow_verify(usercode)), "& - "proc_erase = (flow_erase), "& - "proc_erase_program = (flow_erase_program), "& - "proc_read(array) = (flow_read(array_tdo)), "& - "proc_read(usercode) = (flow_read(usercode)), "& - "proc_error_exit = (flow_disable), "& - "proc_preload = (flow_preload), "& - "proc_program_done = (flow_program_done), "& - "proc_program_security = (flow_program_security)"; - -attribute ISC_ACTION of M4A5_128_64_XXYC : entity is - "erase = ( proc_verify(idcode) recommended, "& - "proc_preload recommended, "& - "proc_enable, "& - "proc_erase, "& - "proc_erase_program, "& - "proc_disable), "& - "program = ( proc_verify(idcode) recommended, "& - "proc_preload recommended, "& - "proc_enable, "& - "proc_erase, "& - "proc_program_init, "& - "proc_program(array), "& - "proc_read_init, "& - "proc_verify(array) proprietary, "& - "proc_program_security optional, "& - "proc_program_done, "& - "proc_disable, "& - "proc_verify(usercode)), "& - "verify = ( proc_verify(idcode) recommended, "& - "proc_preload recommended, "& - "proc_enable, "& - "proc_read_init, "& - "proc_verify(array) proprietary, "& - "proc_disable, "& - "proc_verify(usercode)), "& - "read = ( proc_verify(idcode) recommended, "& - "proc_preload recommended, "& - "proc_enable, "& - "proc_read_init, "& - "proc_read(array) proprietary, "& - "proc_read(usercode), "& - "proc_disable), "& - "verify_idcode = ( proc_verify(idcode)), "& - "secure = ( proc_verify(idcode) recommended, "& - "proc_preload recommended, "& - "proc_enable, "& - "proc_program_security, "& - "proc_disable)"; - -end M4A5_128_64_XXYC; - diff --git a/Logic/Programming.xcf b/Logic/Programming.xcf index 1ef82a3..9fe385d 100644 --- a/Logic/Programming.xcf +++ b/Logic/Programming.xcf @@ -19,15 +19,14 @@ 0 C:\Users\Matze\Documents\GitHub\68030tk\Logic\68030_tk.jed - 01/12/15 22:00:44 - 0x34AF + 02/01/15 21:36:01 + 0x7298 Erase,Program,Verify