@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":129:32:129:34|Pruning register CLK_REF(1 downto 0)  
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":127:34:127:36|Pruning register CLK_000_D6  
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":126:34:126:36|Pruning register CLK_000_D5  
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":125:34:125:36|Pruning register CLK_000_D4  
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":124:34:124:36|Pruning register CLK_000_D3  
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":117:38:117:40|Pruning register CLK_OUT_PRE_33  
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":149:2:149:3|Pruning register CLK_CNT_P(1 downto 0)  
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":136:2:136:3|Pruning register CLK_CNT_N(1 downto 0)