ispLEVER Classic 1.7.00.05.28.13 Linked Equations File Copyright(C), 1992-2013, Lattice Semiconductor Corp. All Rights Reserved. Design bus68030 created Sun Jun 22 21:24:20 2014 P-Terms Fan-in Fan-out Type Name (attributes) --------- ------ ------- ---- ----------------- 1 2 1 Pin UDS_000- 1 1 1 Pin UDS_000.OE 1 2 1 Pin LDS_000- 1 1 1 Pin LDS_000.OE 1 1 1 Pin CLK_DIV_OUT.AR 1 1 1 Pin CLK_DIV_OUT.D 1 1 1 Pin CLK_DIV_OUT.C 1 8 1 Pin FPU_CS- 1 1 1 Pin DTACK 1 3 1 Pin DTACK.OE 1 0 1 Pin AVEC 2 4 1 Pin AMIGA_BUS_DATA_DIR 1 13 1 Pin CIIN 1 1 1 Pin CIIN.OE 1 3 1 Pin SIZE_1_.OE 2 4 1 Pin SIZE_1_.D- 1 1 1 Pin SIZE_1_.AP 1 1 1 Pin SIZE_1_.C 2 3 1 Pin IPL_030_2_.D 1 1 1 Pin IPL_030_2_.AP 1 1 1 Pin IPL_030_2_.C 1 3 1 Pin AS_030.OE 4 6 1 Pin AS_030.D 1 1 1 Pin AS_030.AP 1 1 1 Pin AS_030.C 1 1 1 Pin AS_000.OE 2 5 1 Pin AS_000.D- 1 1 1 Pin AS_000.AP 1 1 1 Pin AS_000.C 1 1 1 Pin RW_000.OE 3 5 1 Pin RW_000.D- 1 1 1 Pin RW_000.AP 1 1 1 Pin RW_000.C 1 3 1 Pin SIZE_0_.OE 1 4 1 Pin SIZE_0_.D- 1 1 1 Pin SIZE_0_.AP 1 1 1 Pin SIZE_0_.C 1 3 1 Pin DS_030.OE 7 9 1 Pin DS_030.D 1 1 1 Pin DS_030.AP 1 1 1 Pin DS_030.C 1 3 1 Pin A0.OE 1 4 1 Pin A0.D 1 1 1 Pin A0.AP 1 1 1 Pin A0.C 2 5 1 Pin BG_000.D- 1 1 1 Pin BG_000.AP 1 1 1 Pin BG_000.C 2 3 1 Pin BGACK_030.D 1 1 1 Pin BGACK_030.AP 1 1 1 Pin BGACK_030.C 1 1 1 Pin CLK_EXP.AR 1 1 1 Pin CLK_EXP.D 1 1 1 Pin CLK_EXP.C 2 3 1 Pin IPL_030_1_.D 1 1 1 Pin IPL_030_1_.AP 1 1 1 Pin IPL_030_1_.C 1 1 1 Pin DSACK1.OE 2 5 1 Pin DSACK1.D- 1 1 1 Pin DSACK1.AP 1 1 1 Pin DSACK1.C 2 3 1 Pin IPL_030_0_.D 1 1 1 Pin IPL_030_0_.AP 1 1 1 Pin IPL_030_0_.C 1 1 1 Pin AVEC_EXP.AR 1 1 1 Pin AVEC_EXP.D 1 1 1 Pin AVEC_EXP.C 1 1 1 Pin E.AR 4 5 1 Pin E.D- 1 1 1 Pin E.C 2 7 1 PinX1 VMA.D.X1 1 5 1 PinX2 VMA.D.X2 1 1 1 Pin VMA.AP 1 1 1 Pin VMA.C 1 1 1 Pin RESET.AR 1 0 1 Pin RESET.D 1 1 1 Pin RESET.C 1 1 1 Pin RW.OE 4 7 1 Pin RW.D- 1 1 1 Pin RW.AP 1 1 1 Pin RW.C 6 12 1 Pin AMIGA_BUS_ENABLE.D- 1 1 1 Pin AMIGA_BUS_ENABLE.AP 1 1 1 Pin AMIGA_BUS_ENABLE.C 1 1 1 Pin AMIGA_BUS_ENABLE_LOW.AR 1 1 1 Pin AMIGA_BUS_ENABLE_LOW.D 1 1 1 Pin AMIGA_BUS_ENABLE_LOW.C 6 13 1 Node inst_AS_030_000_SYNC.D 1 1 1 Node inst_AS_030_000_SYNC.AP 1 1 1 Node inst_AS_030_000_SYNC.C 1 1 1 Node inst_BGACK_030_INT_D.D 1 1 1 Node inst_BGACK_030_INT_D.AP 1 1 1 Node inst_BGACK_030_INT_D.C 1 1 1 Node inst_VPA_D.D 1 1 1 Node inst_VPA_D.AP 1 1 1 Node inst_VPA_D.C 1 1 1 Node inst_CLK_OUT_PRE_50_D.AR 1 1 1 Node inst_CLK_OUT_PRE_50_D.D 1 1 1 Node inst_CLK_OUT_PRE_50_D.C 1 1 1 Node CLK_CNT_N_0_.AR 2 2 1 Node CLK_CNT_N_0_.D 1 1 1 Node CLK_CNT_N_0_.C 1 1 1 Node inst_CLK_OUT_PRE_50.AR 1 1 1 Node inst_CLK_OUT_PRE_50.D 1 1 1 Node inst_CLK_OUT_PRE_50.C 1 1 1 Node inst_CLK_OUT_PRE_25.AR 3 3 1 Node inst_CLK_OUT_PRE_25.D 1 1 1 Node inst_CLK_OUT_PRE_25.C 1 1 1 Node inst_CLK_000_D1.D 1 1 1 Node inst_CLK_000_D1.AP 1 1 1 Node inst_CLK_000_D1.C 1 1 1 Node inst_CLK_000_D2.D 1 1 1 Node inst_CLK_000_D2.AP 1 1 1 Node inst_CLK_000_D2.C 1 1 1 Node inst_CLK_000_D3.D 1 1 1 Node inst_CLK_000_D3.AP 1 1 1 Node inst_CLK_000_D3.C 1 1 1 Node inst_CLK_000_D0.D 1 1 1 Node inst_CLK_000_D0.AP 1 1 1 Node inst_CLK_000_D0.C 1 1 1 Node inst_CLK_000_NE.AR 1 1 1 Node inst_CLK_000_NE.D 1 1 1 Node inst_CLK_000_NE.C 1 1 1 Node inst_CLK_OUT_PRE_D.AR 1 1 1 Node inst_CLK_OUT_PRE_D.D 1 1 1 Node inst_CLK_OUT_PRE_D.C 1 1 1 Node inst_CLK_OUT_PRE.AR 1 1 1 Node inst_CLK_OUT_PRE.D 1 1 1 Node inst_CLK_OUT_PRE.C 1 1 1 Node CLK_000_P_SYNC_9_.AR 1 1 1 Node CLK_000_P_SYNC_9_.D 1 1 1 Node CLK_000_P_SYNC_9_.C 1 1 1 Node CLK_000_N_SYNC_11_.AR 1 1 1 Node CLK_000_N_SYNC_11_.D 1 1 1 Node CLK_000_N_SYNC_11_.C 13 17 1 Node SM_AMIGA_7_.D 1 1 1 Node SM_AMIGA_7_.AP 1 1 1 Node SM_AMIGA_7_.C 1 1 1 Node SM_AMIGA_6_.AR 2 8 1 Node SM_AMIGA_6_.D 1 1 1 Node SM_AMIGA_6_.C 1 1 1 Node SM_AMIGA_1_.AR 2 5 1 Node SM_AMIGA_1_.D 1 1 1 Node SM_AMIGA_1_.C 1 1 1 Node SM_AMIGA_0_.AR 2 5 1 Node SM_AMIGA_0_.D 1 1 1 Node SM_AMIGA_0_.C 1 1 1 Node SM_AMIGA_4_.AR 2 5 1 Node SM_AMIGA_4_.D 1 1 1 Node SM_AMIGA_4_.C 1 1 1 Node CLK_000_N_SYNC_6_.AR 1 1 1 Node CLK_000_N_SYNC_6_.D 1 1 1 Node CLK_000_N_SYNC_6_.C 5 8 1 Node inst_CLK_030_H.D 1 1 1 Node inst_CLK_030_H.C 1 1 1 Node CLK_CNT_P_1_.AR 1 1 1 Node CLK_CNT_P_1_.D 1 1 1 Node CLK_CNT_P_1_.C 1 1 1 Node CLK_CNT_N_1_.D 1 1 1 Node CLK_CNT_N_1_.AP 1 1 1 Node CLK_CNT_N_1_.C 1 1 1 Node CLK_CNT_P_0_.AR 2 2 1 Node CLK_CNT_P_0_.D 1 1 1 Node CLK_CNT_P_0_.C 2 5 1 Node inst_LDS_000_INT.D 1 1 1 Node inst_LDS_000_INT.AP 1 1 1 Node inst_LDS_000_INT.C 1 1 1 Node inst_DS_000_ENABLE.AR 3 7 1 Node inst_DS_000_ENABLE.D 1 1 1 Node inst_DS_000_ENABLE.C 2 3 1 Node inst_UDS_000_INT.D 1 1 1 Node inst_UDS_000_INT.AP 1 1 1 Node inst_UDS_000_INT.C 1 1 1 Node CLK_000_P_SYNC_0_.AR 1 4 1 Node CLK_000_P_SYNC_0_.D 1 1 1 Node CLK_000_P_SYNC_0_.C 1 1 1 Node CLK_000_P_SYNC_1_.AR 1 1 1 Node CLK_000_P_SYNC_1_.D 1 1 1 Node CLK_000_P_SYNC_1_.C 1 1 1 Node CLK_000_P_SYNC_2_.AR 1 1 1 Node CLK_000_P_SYNC_2_.D 1 1 1 Node CLK_000_P_SYNC_2_.C 1 1 1 Node CLK_000_P_SYNC_3_.AR 1 1 1 Node CLK_000_P_SYNC_3_.D 1 1 1 Node CLK_000_P_SYNC_3_.C 1 1 1 Node CLK_000_P_SYNC_4_.AR 1 1 1 Node CLK_000_P_SYNC_4_.D 1 1 1 Node CLK_000_P_SYNC_4_.C 1 1 1 Node CLK_000_P_SYNC_5_.AR 1 1 1 Node CLK_000_P_SYNC_5_.D 1 1 1 Node CLK_000_P_SYNC_5_.C 1 1 1 Node CLK_000_P_SYNC_6_.AR 1 1 1 Node CLK_000_P_SYNC_6_.D 1 1 1 Node CLK_000_P_SYNC_6_.C 1 1 1 Node CLK_000_P_SYNC_7_.AR 1 1 1 Node CLK_000_P_SYNC_7_.D 1 1 1 Node CLK_000_P_SYNC_7_.C 1 1 1 Node CLK_000_P_SYNC_8_.AR 1 1 1 Node CLK_000_P_SYNC_8_.D 1 1 1 Node CLK_000_P_SYNC_8_.C 1 1 1 Node CLK_000_N_SYNC_0_.AR 1 4 1 Node CLK_000_N_SYNC_0_.D 1 1 1 Node CLK_000_N_SYNC_0_.C 1 1 1 Node CLK_000_N_SYNC_1_.AR 1 1 1 Node CLK_000_N_SYNC_1_.D 1 1 1 Node CLK_000_N_SYNC_1_.C 1 1 1 Node CLK_000_N_SYNC_2_.AR 1 1 1 Node CLK_000_N_SYNC_2_.D 1 1 1 Node CLK_000_N_SYNC_2_.C 1 1 1 Node CLK_000_N_SYNC_3_.AR 1 1 1 Node CLK_000_N_SYNC_3_.D 1 1 1 Node CLK_000_N_SYNC_3_.C 1 1 1 Node CLK_000_N_SYNC_4_.AR 1 1 1 Node CLK_000_N_SYNC_4_.D 1 1 1 Node CLK_000_N_SYNC_4_.C 1 1 1 Node CLK_000_N_SYNC_5_.AR 1 1 1 Node CLK_000_N_SYNC_5_.D 1 1 1 Node CLK_000_N_SYNC_5_.C 1 1 1 Node CLK_000_N_SYNC_7_.AR 1 1 1 Node CLK_000_N_SYNC_7_.D 1 1 1 Node CLK_000_N_SYNC_7_.C 1 1 1 Node CLK_000_N_SYNC_8_.AR 1 1 1 Node CLK_000_N_SYNC_8_.D 1 1 1 Node CLK_000_N_SYNC_8_.C 1 1 1 Node CLK_000_N_SYNC_9_.AR 1 1 1 Node CLK_000_N_SYNC_9_.D 1 1 1 Node CLK_000_N_SYNC_9_.C 1 1 1 Node CLK_000_N_SYNC_10_.AR 1 1 1 Node CLK_000_N_SYNC_10_.D 1 1 1 Node CLK_000_N_SYNC_10_.C 1 1 1 Node SM_AMIGA_5_.AR 2 5 1 Node SM_AMIGA_5_.D 1 1 1 Node SM_AMIGA_5_.C 1 1 1 Node SM_AMIGA_3_.AR 6 10 1 Node SM_AMIGA_3_.D 1 1 1 Node SM_AMIGA_3_.C 1 1 1 Node SM_AMIGA_2_.AR 3 10 1 Node SM_AMIGA_2_.D 1 1 1 Node SM_AMIGA_2_.C 3 14 1 Node un16_ciin- 1 1 1 Node cpu_est_0_.AR 2 2 1 Node cpu_est_0_.D 1 1 1 Node cpu_est_0_.C 1 1 1 Node cpu_est_1_.AR 5 5 1 Node cpu_est_1_.D 1 1 1 Node cpu_est_1_.C 1 1 1 Node cpu_est_2_.AR 4 5 1 Node cpu_est_2_.D 1 1 1 Node cpu_est_2_.C 2 4 1 Node AMIGA_BUS_ENABLE_LOW_0 4 11 1 Node SM_AMIGA_7__0 ========= 338 P-Term Total: 338 Total Pins: 59 Total Nodes: 57 Average P-Term/Output: 2 Equations: !UDS_000 = (inst_DS_000_ENABLE.Q & !inst_UDS_000_INT.Q); UDS_000.OE = (BGACK_030.Q); !LDS_000 = (!inst_LDS_000_INT.Q & inst_DS_000_ENABLE.Q); LDS_000.OE = (BGACK_030.Q); CLK_DIV_OUT.AR = (!RST); CLK_DIV_OUT.D = (inst_CLK_OUT_PRE_D.Q); CLK_DIV_OUT.C = (CLK_OSZI); !FPU_CS = (FC_1_ & BGACK_000 & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & !AS_030.PIN); DTACK = (DSACK1.PIN); DTACK.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); AVEC = (1); AMIGA_BUS_DATA_DIR = (BGACK_030.Q & !RW.PIN # !nEXP_SPACE & !BGACK_030.Q & !AS_000.PIN & RW.PIN); CIIN = (!A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_ & A_23_ & A_22_ & A_21_ & A_20_ & !AS_030.PIN); CIIN.OE = (!un16_ciin); SIZE_1_.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); !SIZE_1_.D = (!BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & LDS_000.PIN # !BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN); SIZE_1_.AP = (!RST); SIZE_1_.C = (CLK_OSZI); IPL_030_2_.D = (IPL_2_ & AVEC_EXP.Q # !AVEC_EXP.Q & IPL_030_2_.Q); IPL_030_2_.AP = (!RST); IPL_030_2_.C = (CLK_OSZI); AS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); AS_030.D = (BGACK_030.Q # AS_000.PIN # !CLK_030 & AS_030.Q # UDS_000.PIN & LDS_000.PIN); AS_030.AP = (!RST); AS_030.C = (CLK_OSZI); AS_000.OE = (BGACK_030.Q); !AS_000.D = (AVEC_EXP.Q & SM_AMIGA_6_.Q # BERR & !AS_000.Q & !AS_030.PIN); AS_000.AP = (!RST); AS_000.C = (CLK_OSZI); RW_000.OE = (BGACK_030.Q); !RW_000.D = (!AVEC_EXP.Q & !SM_AMIGA_7_.Q & !RW_000.Q # !SM_AMIGA_7_.Q & !SM_AMIGA_6_.Q & !RW_000.Q # AVEC_EXP.Q & !SM_AMIGA_7_.Q & SM_AMIGA_6_.Q & !RW.PIN); RW_000.AP = (!RST); RW_000.C = (CLK_OSZI); SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); !SIZE_0_.D = (!BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & !LDS_000.PIN); SIZE_0_.AP = (!RST); SIZE_0_.C = (CLK_OSZI); DS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); DS_030.D = (BGACK_030.Q # AS_000.PIN # AS_030.Q & RW_000.PIN # UDS_000.PIN & LDS_000.PIN # CLK_030 & AS_030.Q & inst_CLK_030_H.Q # !CLK_030 & DS_030.Q & !RW_000.PIN # !inst_CLK_030_H.Q & DS_030.Q & !RW_000.PIN); DS_030.AP = (!RST); DS_030.C = (CLK_OSZI); A0.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); A0.D = (!BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN); A0.AP = (!RST); A0.C = (CLK_OSZI); !BG_000.D = (!BG_030 & !BG_000.Q # nEXP_SPACE & !BG_030 & CLK_000 & AS_030.PIN); BG_000.AP = (!RST); BG_000.C = (CLK_OSZI); BGACK_030.D = (BGACK_000 & BGACK_030.Q # BGACK_000 & AVEC_EXP.Q); BGACK_030.AP = (!RST); BGACK_030.C = (CLK_OSZI); CLK_EXP.AR = (!RST); CLK_EXP.D = (inst_CLK_OUT_PRE_D.Q); CLK_EXP.C = (CLK_OSZI); IPL_030_1_.D = (IPL_1_ & AVEC_EXP.Q # !AVEC_EXP.Q & IPL_030_1_.Q); IPL_030_1_.AP = (!RST); IPL_030_1_.C = (CLK_OSZI); DSACK1.OE = (nEXP_SPACE); !DSACK1.D = (SM_AMIGA_1_.Q & CLK_000_N_SYNC_6_.Q # BERR & !DSACK1.Q & !AS_030.PIN); DSACK1.AP = (!RST); DSACK1.C = (CLK_OSZI); IPL_030_0_.D = (IPL_0_ & AVEC_EXP.Q # !AVEC_EXP.Q & IPL_030_0_.Q); IPL_030_0_.AP = (!RST); IPL_030_0_.C = (CLK_OSZI); AVEC_EXP.AR = (!RST); AVEC_EXP.D = (CLK_000_P_SYNC_9_.Q); AVEC_EXP.C = (CLK_OSZI); E.AR = (!RST); !E.D = (!AVEC_EXP.Q & !E.Q # cpu_est_2_.Q & !E.Q # AVEC_EXP.Q & cpu_est_1_.Q & cpu_est_2_.Q # !cpu_est_0_.Q & cpu_est_1_.Q & !E.Q); E.C = (CLK_OSZI); VMA.D.X1 = (VMA.Q # AVEC_EXP.Q & !VMA.Q & AS_000.Q & !cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & !E.Q); VMA.D.X2 = (VMA.Q & !inst_VPA_D.Q & inst_CLK_000_NE.Q & cpu_est_0_.Q & !cpu_est_1_.Q); VMA.AP = (!RST); VMA.C = (CLK_OSZI); RESET.AR = (!RST); RESET.D = (1); RESET.C = (CLK_OSZI); RW.OE = (!BGACK_030.Q); !RW.D = (!CLK_030 & !BGACK_030.Q & !RW.Q & !AS_000.PIN & !UDS_000.PIN # CLK_030 & !BGACK_030.Q & !AS_000.PIN & !RW_000.PIN & !UDS_000.PIN # !CLK_030 & !BGACK_030.Q & !RW.Q & !AS_000.PIN & !LDS_000.PIN # CLK_030 & !BGACK_030.Q & !AS_000.PIN & !RW_000.PIN & !LDS_000.PIN); RW.AP = (!RST); RW.C = (CLK_OSZI); !AMIGA_BUS_ENABLE.D = (!BGACK_030.Q # !AMIGA_BUS_ENABLE.Q & inst_BGACK_030_INT_D.Q & SM_AMIGA_1_.Q & !AS_030.PIN # !AMIGA_BUS_ENABLE.Q & inst_BGACK_030_INT_D.Q & SM_AMIGA_0_.Q & !AS_030.PIN # !AMIGA_BUS_ENABLE.Q & inst_BGACK_030_INT_D.Q & !inst_CLK_000_NE.Q & !SM_AMIGA_7_.Q & !SM_AMIGA_0_.Q # !AMIGA_BUS_ENABLE.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_7_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q # nEXP_SPACE & !inst_AS_030_000_SYNC.Q & inst_BGACK_030_INT_D.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D0.Q & SM_AMIGA_7_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q); AMIGA_BUS_ENABLE.AP = (!RST); AMIGA_BUS_ENABLE.C = (CLK_OSZI); AMIGA_BUS_ENABLE_LOW.AR = (!RST); AMIGA_BUS_ENABLE_LOW.D = (!AMIGA_BUS_ENABLE_LOW.Q); AMIGA_BUS_ENABLE_LOW.C = (AMIGA_BUS_ENABLE_LOW_0); inst_AS_030_000_SYNC.D = (!BERR # AS_030.PIN # !nEXP_SPACE & inst_AS_030_000_SYNC.Q # !BGACK_030.Q & inst_AS_030_000_SYNC.Q # inst_AS_030_000_SYNC.Q & !SM_AMIGA_7_.Q # FC_1_ & BGACK_000 & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & inst_AS_030_000_SYNC.Q); inst_AS_030_000_SYNC.AP = (!RST); inst_AS_030_000_SYNC.C = (CLK_OSZI); inst_BGACK_030_INT_D.D = (BGACK_030.Q); inst_BGACK_030_INT_D.AP = (!RST); inst_BGACK_030_INT_D.C = (CLK_OSZI); inst_VPA_D.D = (VPA); inst_VPA_D.AP = (!RST); inst_VPA_D.C = (CLK_OSZI); inst_CLK_OUT_PRE_50_D.AR = (!RST); inst_CLK_OUT_PRE_50_D.D = (inst_CLK_OUT_PRE_50.Q); inst_CLK_OUT_PRE_50_D.C = (CLK_OSZI); CLK_CNT_N_0_.AR = (!RST); CLK_CNT_N_0_.D = (CLK_CNT_N_0_.Q & CLK_CNT_N_1_.Q # !CLK_CNT_N_0_.Q & !CLK_CNT_N_1_.Q); CLK_CNT_N_0_.C = (!CLK_OSZI); inst_CLK_OUT_PRE_50.AR = (!RST); inst_CLK_OUT_PRE_50.D = (!inst_CLK_OUT_PRE_50.Q); inst_CLK_OUT_PRE_50.C = (CLK_OSZI); inst_CLK_OUT_PRE_25.AR = (!RST); inst_CLK_OUT_PRE_25.D = (inst_CLK_OUT_PRE_50_D.Q & inst_CLK_OUT_PRE_25.Q # !inst_CLK_OUT_PRE_50.Q & inst_CLK_OUT_PRE_25.Q # !inst_CLK_OUT_PRE_50_D.Q & inst_CLK_OUT_PRE_50.Q & !inst_CLK_OUT_PRE_25.Q); inst_CLK_OUT_PRE_25.C = (CLK_OSZI); inst_CLK_000_D1.D = (inst_CLK_000_D0.Q); inst_CLK_000_D1.AP = (!RST); inst_CLK_000_D1.C = (CLK_OSZI); inst_CLK_000_D2.D = (inst_CLK_000_D1.Q); inst_CLK_000_D2.AP = (!RST); inst_CLK_000_D2.C = (CLK_OSZI); inst_CLK_000_D3.D = (inst_CLK_000_D2.Q); inst_CLK_000_D3.AP = (!RST); inst_CLK_000_D3.C = (CLK_OSZI); inst_CLK_000_D0.D = (CLK_000); inst_CLK_000_D0.AP = (!RST); inst_CLK_000_D0.C = (CLK_OSZI); inst_CLK_000_NE.AR = (!RST); inst_CLK_000_NE.D = (CLK_000_N_SYNC_11_.Q); inst_CLK_000_NE.C = (CLK_OSZI); inst_CLK_OUT_PRE_D.AR = (!RST); inst_CLK_OUT_PRE_D.D = (inst_CLK_OUT_PRE.Q); inst_CLK_OUT_PRE_D.C = (CLK_OSZI); inst_CLK_OUT_PRE.AR = (!RST); inst_CLK_OUT_PRE.D = (inst_CLK_OUT_PRE_25.Q); inst_CLK_OUT_PRE.C = (CLK_OSZI); CLK_000_P_SYNC_9_.AR = (!RST); CLK_000_P_SYNC_9_.D = (CLK_000_P_SYNC_8_.Q); CLK_000_P_SYNC_9_.C = (CLK_OSZI); CLK_000_N_SYNC_11_.AR = (!RST); CLK_000_N_SYNC_11_.D = (CLK_000_N_SYNC_10_.Q); CLK_000_N_SYNC_11_.C = (CLK_OSZI); SM_AMIGA_7_.D = (SM_AMIGA_7__0 # !BERR & SM_AMIGA_0_.Q # !BERR & !AVEC_EXP.Q & SM_AMIGA_6_.Q # !BERR & !inst_CLK_000_NE.Q & SM_AMIGA_1_.Q # !BERR & !AVEC_EXP.Q & SM_AMIGA_4_.Q # !BERR & !inst_CLK_000_NE.Q & SM_AMIGA_5_.Q # !BERR & !inst_CLK_000_NE.Q & SM_AMIGA_3_.Q # !BERR & !AVEC_EXP.Q & SM_AMIGA_2_.Q # !BERR & !VPA & VMA.Q & SM_AMIGA_3_.Q # !BERR & !VPA & SM_AMIGA_3_.Q & cpu_est_1_.Q # !BERR & !VPA & SM_AMIGA_3_.Q & !E.Q # !BERR & VPA & SM_AMIGA_3_.Q & DTACK.PIN # !nEXP_SPACE & !SM_AMIGA_6_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q); SM_AMIGA_7_.AP = (!RST); SM_AMIGA_7_.C = (CLK_OSZI); SM_AMIGA_6_.AR = (!RST); SM_AMIGA_6_.D = (BERR & !AVEC_EXP.Q & SM_AMIGA_6_.Q # nEXP_SPACE & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D0.Q & SM_AMIGA_7_.Q); SM_AMIGA_6_.C = (CLK_OSZI); SM_AMIGA_1_.AR = (!RST); SM_AMIGA_1_.D = (AVEC_EXP.Q & SM_AMIGA_2_.Q # BERR & !inst_CLK_000_NE.Q & SM_AMIGA_1_.Q); SM_AMIGA_1_.C = (CLK_OSZI); SM_AMIGA_0_.AR = (!RST); SM_AMIGA_0_.D = (BERR & !AVEC_EXP.Q & SM_AMIGA_0_.Q # inst_CLK_000_NE.Q & SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q); SM_AMIGA_0_.C = (CLK_OSZI); SM_AMIGA_4_.AR = (!RST); SM_AMIGA_4_.D = (inst_CLK_000_NE.Q & SM_AMIGA_5_.Q # BERR & !AVEC_EXP.Q & SM_AMIGA_4_.Q); SM_AMIGA_4_.C = (CLK_OSZI); CLK_000_N_SYNC_6_.AR = (!RST); CLK_000_N_SYNC_6_.D = (CLK_000_N_SYNC_5_.Q); CLK_000_N_SYNC_6_.C = (CLK_OSZI); inst_CLK_030_H.D = (!RST & inst_CLK_030_H.Q # !BGACK_030.Q & inst_CLK_030_H.Q & !AS_000.PIN & !UDS_000.PIN # !BGACK_030.Q & inst_CLK_030_H.Q & !AS_000.PIN & !LDS_000.PIN # !CLK_030 & RST & !BGACK_030.Q & !AS_030.Q & !AS_000.PIN & !UDS_000.PIN # !CLK_030 & RST & !BGACK_030.Q & !AS_030.Q & !AS_000.PIN & !LDS_000.PIN); inst_CLK_030_H.C = (CLK_OSZI); CLK_CNT_P_1_.AR = (!RST); CLK_CNT_P_1_.D = (CLK_CNT_P_0_.Q); CLK_CNT_P_1_.C = (CLK_OSZI); CLK_CNT_N_1_.D = (CLK_CNT_N_0_.Q); CLK_CNT_N_1_.AP = (!RST); CLK_CNT_N_1_.C = (!CLK_OSZI); CLK_CNT_P_0_.AR = (!RST); CLK_CNT_P_0_.D = (CLK_CNT_P_1_.Q & CLK_CNT_P_0_.Q # !CLK_CNT_P_1_.Q & !CLK_CNT_P_0_.Q); CLK_CNT_P_0_.C = (CLK_OSZI); inst_LDS_000_INT.D = (inst_LDS_000_INT.Q & DS_030.PIN # !DS_030.PIN & SIZE_0_.PIN & !SIZE_1_.PIN & !A0.PIN); inst_LDS_000_INT.AP = (!RST); inst_LDS_000_INT.C = (CLK_OSZI); inst_DS_000_ENABLE.AR = (!RST); inst_DS_000_ENABLE.D = (AVEC_EXP.Q & SM_AMIGA_4_.Q # BERR & inst_DS_000_ENABLE.Q & !AS_030.PIN # AVEC_EXP.Q & SM_AMIGA_6_.Q & RW.PIN); inst_DS_000_ENABLE.C = (CLK_OSZI); inst_UDS_000_INT.D = (inst_UDS_000_INT.Q & DS_030.PIN # !DS_030.PIN & A0.PIN); inst_UDS_000_INT.AP = (!RST); inst_UDS_000_INT.C = (CLK_OSZI); CLK_000_P_SYNC_0_.AR = (!RST); CLK_000_P_SYNC_0_.D = (!inst_CLK_000_D1.Q & !inst_CLK_000_D2.Q & !inst_CLK_000_D3.Q & inst_CLK_000_D0.Q); CLK_000_P_SYNC_0_.C = (CLK_OSZI); CLK_000_P_SYNC_1_.AR = (!RST); CLK_000_P_SYNC_1_.D = (CLK_000_P_SYNC_0_.Q); CLK_000_P_SYNC_1_.C = (CLK_OSZI); CLK_000_P_SYNC_2_.AR = (!RST); CLK_000_P_SYNC_2_.D = (CLK_000_P_SYNC_1_.Q); CLK_000_P_SYNC_2_.C = (CLK_OSZI); CLK_000_P_SYNC_3_.AR = (!RST); CLK_000_P_SYNC_3_.D = (CLK_000_P_SYNC_2_.Q); CLK_000_P_SYNC_3_.C = (CLK_OSZI); CLK_000_P_SYNC_4_.AR = (!RST); CLK_000_P_SYNC_4_.D = (CLK_000_P_SYNC_3_.Q); CLK_000_P_SYNC_4_.C = (CLK_OSZI); CLK_000_P_SYNC_5_.AR = (!RST); CLK_000_P_SYNC_5_.D = (CLK_000_P_SYNC_4_.Q); CLK_000_P_SYNC_5_.C = (CLK_OSZI); CLK_000_P_SYNC_6_.AR = (!RST); CLK_000_P_SYNC_6_.D = (CLK_000_P_SYNC_5_.Q); CLK_000_P_SYNC_6_.C = (CLK_OSZI); CLK_000_P_SYNC_7_.AR = (!RST); CLK_000_P_SYNC_7_.D = (CLK_000_P_SYNC_6_.Q); CLK_000_P_SYNC_7_.C = (CLK_OSZI); CLK_000_P_SYNC_8_.AR = (!RST); CLK_000_P_SYNC_8_.D = (CLK_000_P_SYNC_7_.Q); CLK_000_P_SYNC_8_.C = (CLK_OSZI); CLK_000_N_SYNC_0_.AR = (!RST); CLK_000_N_SYNC_0_.D = (inst_CLK_000_D1.Q & inst_CLK_000_D2.Q & inst_CLK_000_D3.Q & !inst_CLK_000_D0.Q); CLK_000_N_SYNC_0_.C = (CLK_OSZI); CLK_000_N_SYNC_1_.AR = (!RST); CLK_000_N_SYNC_1_.D = (CLK_000_N_SYNC_0_.Q); CLK_000_N_SYNC_1_.C = (CLK_OSZI); CLK_000_N_SYNC_2_.AR = (!RST); CLK_000_N_SYNC_2_.D = (CLK_000_N_SYNC_1_.Q); CLK_000_N_SYNC_2_.C = (CLK_OSZI); CLK_000_N_SYNC_3_.AR = (!RST); CLK_000_N_SYNC_3_.D = (CLK_000_N_SYNC_2_.Q); CLK_000_N_SYNC_3_.C = (CLK_OSZI); CLK_000_N_SYNC_4_.AR = (!RST); CLK_000_N_SYNC_4_.D = (CLK_000_N_SYNC_3_.Q); CLK_000_N_SYNC_4_.C = (CLK_OSZI); CLK_000_N_SYNC_5_.AR = (!RST); CLK_000_N_SYNC_5_.D = (CLK_000_N_SYNC_4_.Q); CLK_000_N_SYNC_5_.C = (CLK_OSZI); CLK_000_N_SYNC_7_.AR = (!RST); CLK_000_N_SYNC_7_.D = (CLK_000_N_SYNC_6_.Q); CLK_000_N_SYNC_7_.C = (CLK_OSZI); CLK_000_N_SYNC_8_.AR = (!RST); CLK_000_N_SYNC_8_.D = (CLK_000_N_SYNC_7_.Q); CLK_000_N_SYNC_8_.C = (CLK_OSZI); CLK_000_N_SYNC_9_.AR = (!RST); CLK_000_N_SYNC_9_.D = (CLK_000_N_SYNC_8_.Q); CLK_000_N_SYNC_9_.C = (CLK_OSZI); CLK_000_N_SYNC_10_.AR = (!RST); CLK_000_N_SYNC_10_.D = (CLK_000_N_SYNC_9_.Q); CLK_000_N_SYNC_10_.C = (CLK_OSZI); SM_AMIGA_5_.AR = (!RST); SM_AMIGA_5_.D = (AVEC_EXP.Q & SM_AMIGA_6_.Q # BERR & !inst_CLK_000_NE.Q & SM_AMIGA_5_.Q); SM_AMIGA_5_.C = (CLK_OSZI); SM_AMIGA_3_.AR = (!RST); SM_AMIGA_3_.D = (AVEC_EXP.Q & SM_AMIGA_4_.Q # BERR & !inst_CLK_000_NE.Q & SM_AMIGA_3_.Q # BERR & !VPA & VMA.Q & SM_AMIGA_3_.Q # BERR & !VPA & SM_AMIGA_3_.Q & cpu_est_1_.Q # BERR & !VPA & SM_AMIGA_3_.Q & !E.Q # BERR & VPA & SM_AMIGA_3_.Q & DTACK.PIN); SM_AMIGA_3_.C = (CLK_OSZI); SM_AMIGA_2_.AR = (!RST); SM_AMIGA_2_.D = (BERR & !AVEC_EXP.Q & SM_AMIGA_2_.Q # VPA & inst_CLK_000_NE.Q & SM_AMIGA_3_.Q & !DTACK.PIN # !VPA & !VMA.Q & inst_CLK_000_NE.Q & SM_AMIGA_3_.Q & !cpu_est_1_.Q & E.Q); SM_AMIGA_2_.C = (CLK_OSZI); !un16_ciin = (nEXP_SPACE & AS_030.PIN # !A_31_ & nEXP_SPACE & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_ # !A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_ & A_23_ & A_22_ & A_21_ & A_20_ & !AS_030.PIN); cpu_est_0_.AR = (!RST); cpu_est_0_.D = (!AVEC_EXP.Q & cpu_est_0_.Q # AVEC_EXP.Q & !cpu_est_0_.Q); cpu_est_0_.C = (CLK_OSZI); cpu_est_1_.AR = (!RST); cpu_est_1_.D = (!AVEC_EXP.Q & cpu_est_1_.Q # !cpu_est_0_.Q & cpu_est_1_.Q # AVEC_EXP.Q & cpu_est_0_.Q & !cpu_est_1_.Q # AVEC_EXP.Q & cpu_est_2_.Q & E.Q # AVEC_EXP.Q & !cpu_est_2_.Q & !E.Q); cpu_est_1_.C = (CLK_OSZI); cpu_est_2_.AR = (!RST); cpu_est_2_.D = (!AVEC_EXP.Q & cpu_est_2_.Q # cpu_est_1_.Q & cpu_est_2_.Q # AVEC_EXP.Q & !cpu_est_0_.Q & !cpu_est_1_.Q # AVEC_EXP.Q & cpu_est_0_.Q & E.Q); cpu_est_2_.C = (CLK_OSZI); AMIGA_BUS_ENABLE_LOW_0 = (CLK_CNT_P_1_.Q & CLK_CNT_N_1_.Q # !CLK_CNT_N_0_.Q & CLK_CNT_P_0_.Q); SM_AMIGA_7__0 = (AVEC_EXP.Q & SM_AMIGA_0_.Q # inst_AS_030_000_SYNC.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q # !inst_CLK_000_D1.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q # inst_CLK_000_D0.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q); Reverse-Polarity Equations: