ispLEVER Classic 1.8.00.04.29.14 Linked Equations File Copyright(C), 1992-2014, Lattice Semiconductor Corp. All Rights Reserved. Design bus68030 created Wed May 13 22:59:21 2015 P-Terms Fan-in Fan-out Type Name (attributes) --------- ------ ------- ---- ----------------- 1 2 1 Pin SIZE_1_ 1 2 1 Pin SIZE_1_.OE 1 2 1 Pin AS_030- 1 3 1 Pin AS_030.OE 1 2 1 Pin AS_000- 1 2 1 Pin AS_000.OE 1 2 1 Pin DS_030- 1 3 1 Pin DS_030.OE 1 3 1 Pin UDS_000- 1 2 1 Pin UDS_000.OE 1 3 1 Pin LDS_000- 1 2 1 Pin LDS_000.OE 0 0 1 Pin BERR 1 9 1 Pin BERR.OE 0 0 1 Pin CLK_DIV_OUT 0 0 1 Pin CLK_DIV_OUT.OE 1 1 1 Pin CLK_EXP 1 9 1 Pin FPU_CS- 1 0 1 Pin AVEC 0 0 1 Pin AMIGA_ADDR_ENABLE 2 4 1 Pin AMIGA_BUS_DATA_DIR 1 2 1 Pin AMIGA_BUS_ENABLE_LOW- 2 3 1 Pin AMIGA_BUS_ENABLE_HIGH 1 13 1 Pin CIIN 1 1 1 Pin CIIN.OE 1 2 1 Pin SIZE_0_ 1 2 1 Pin SIZE_0_.OE 10 8 1 Pin IPL_030_2_.D- 1 1 1 Pin IPL_030_2_.C 1 2 1 Pin RW_000.OE 3 7 1 Pin RW_000.D- 1 1 1 Pin RW_000.C 1 3 1 Pin A0.OE 3 5 1 Pin A0.D 1 1 1 Pin A0.C 2 6 1 Pin BG_000.D- 1 1 1 Pin BG_000.C 2 4 1 Pin BGACK_030.D- 1 1 1 Pin BGACK_030.C 10 8 1 Pin IPL_030_1_.D- 1 1 1 Pin IPL_030_1_.C 10 8 1 Pin IPL_030_0_.D- 1 1 1 Pin IPL_030_0_.C 1 1 1 Pin DSACK1.OE 4 9 1 Pin DSACK1.D- 1 1 1 Pin DSACK1.C 5 5 1 Pin E.D 1 1 1 Pin E.C 3 9 1 Pin VMA.T 1 1 1 Pin VMA.C 2 11 1 Pin RESET.D 1 1 1 Pin RESET.C 1 2 1 Pin RW.OE 2 5 1 Pin RW.D- 1 1 1 Pin RW.C 2 2 1 Node cpu_est_0_.D 1 1 1 Node cpu_est_0_.C 5 5 1 Node cpu_est_1_.D- 1 1 1 Node cpu_est_1_.C 2 5 1 Node inst_AS_000_INT.D- 1 1 1 Node inst_AS_000_INT.C 3 6 1 Node SM_AMIGA_5_.D 1 1 1 Node SM_AMIGA_5_.C 2 5 1 Node inst_AMIGA_BUS_ENABLE_DMA_LOW.D- 1 1 1 Node inst_AMIGA_BUS_ENABLE_DMA_LOW.C 1 2 1 Node inst_AS_030_D0.D- 1 1 1 Node inst_AS_030_D0.C 1 2 1 Node inst_nEXP_SPACE_D0reg.D- 1 1 1 Node inst_nEXP_SPACE_D0reg.C 1 2 1 Node inst_DS_030_D0.D- 1 1 1 Node inst_DS_030_D0.C 7 14 1 Node inst_AS_030_000_SYNC.D- 1 1 1 Node inst_AS_030_000_SYNC.C 1 2 1 Node inst_BGACK_030_INT_D.D- 1 1 1 Node inst_BGACK_030_INT_D.C 7 9 1 Node inst_AS_000_DMA.D 1 1 1 Node inst_AS_000_DMA.C 9 12 1 Node inst_DS_000_DMA.D 1 1 1 Node inst_DS_000_DMA.C 2 5 1 Node CYCLE_DMA_0_.D 1 1 1 Node CYCLE_DMA_0_.C 3 6 1 Node CYCLE_DMA_1_.D 1 1 1 Node CYCLE_DMA_1_.C 3 6 1 Node SIZE_DMA_0_.D- 1 1 1 Node SIZE_DMA_0_.C 3 6 1 Node SIZE_DMA_1_.D 1 1 1 Node SIZE_DMA_1_.C 1 2 1 Node inst_VPA_D.D- 1 1 1 Node inst_VPA_D.C 3 5 1 Node inst_UDS_000_INT.D- 1 1 1 Node inst_UDS_000_INT.C 4 7 1 Node inst_LDS_000_INT.D 1 1 1 Node inst_LDS_000_INT.C 1 1 1 Node inst_CLK_OUT_PRE_D.D 1 1 1 Node inst_CLK_OUT_PRE_D.C 1 2 1 Node inst_DTACK_D0.D- 1 1 1 Node inst_DTACK_D0.C 1 1 1 Node inst_CLK_OUT_PRE_50.D 1 1 1 Node inst_CLK_OUT_PRE_50.C 1 1 1 Node inst_CLK_000_D1.D 1 1 1 Node inst_CLK_000_D1.C 1 1 1 Node inst_CLK_000_D0.D 1 1 1 Node inst_CLK_000_D0.C 1 1 1 Node inst_CLK_000_PE.D 1 1 1 Node inst_CLK_000_PE.C 1 1 1 Node CLK_000_P_SYNC_9_.D 1 1 1 Node CLK_000_P_SYNC_9_.C 1 1 1 Node inst_CLK_000_NE.D 1 1 1 Node inst_CLK_000_NE.C 4 11 1 Node N_96_i- 1 1 1 Node CLK_000_N_SYNC_11_.D 1 1 1 Node CLK_000_N_SYNC_11_.C 4 5 1 Node cpu_est_2_.D 1 1 1 Node cpu_est_2_.C 1 2 1 Node IPL_D0_0_.D- 1 1 1 Node IPL_D0_0_.C 1 2 1 Node IPL_D0_1_.D- 1 1 1 Node IPL_D0_1_.C 1 2 1 Node IPL_D0_2_.D- 1 1 1 Node IPL_D0_2_.C 5 13 1 Node SM_AMIGA_3_.T 1 1 1 Node SM_AMIGA_3_.C 1 1 1 Node inst_CLK_000_NE_D0.D 1 1 1 Node inst_CLK_000_NE_D0.C 2 6 1 Node SM_AMIGA_0_.D 1 1 1 Node SM_AMIGA_0_.C 2 5 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- 1 1 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.C 3 9 1 Node SM_AMIGA_6_.D 1 1 1 Node SM_AMIGA_6_.C 3 10 1 Node RST_DLY_0_.D 1 1 1 Node RST_DLY_0_.C 4 10 1 Node RST_DLY_1_.D 1 1 1 Node RST_DLY_1_.C 5 10 1 Node RST_DLY_2_.D 1 1 1 Node RST_DLY_2_.C 6 10 1 Node RST_DLY_3_.D 1 1 1 Node RST_DLY_3_.C 2 7 1 NodeX1 RST_DLY_4_.T.X1 1 10 1 NodeX2 RST_DLY_4_.T.X2 1 1 1 Node RST_DLY_4_.C 4 10 1 Node RST_DLY_5_.T 1 1 1 Node RST_DLY_5_.C 3 10 1 Node RST_DLY_6_.T 1 1 1 Node RST_DLY_6_.C 2 10 1 Node RST_DLY_7_.D 1 1 1 Node RST_DLY_7_.C 1 2 1 Node CLK_000_P_SYNC_0_.D 1 1 1 Node CLK_000_P_SYNC_0_.C 1 1 1 Node CLK_000_P_SYNC_1_.D 1 1 1 Node CLK_000_P_SYNC_1_.C 1 1 1 Node CLK_000_P_SYNC_2_.D 1 1 1 Node CLK_000_P_SYNC_2_.C 1 1 1 Node CLK_000_P_SYNC_3_.D 1 1 1 Node CLK_000_P_SYNC_3_.C 1 1 1 Node CLK_000_P_SYNC_4_.D 1 1 1 Node CLK_000_P_SYNC_4_.C 1 1 1 Node CLK_000_P_SYNC_5_.D 1 1 1 Node CLK_000_P_SYNC_5_.C 1 1 1 Node CLK_000_P_SYNC_6_.D 1 1 1 Node CLK_000_P_SYNC_6_.C 1 1 1 Node CLK_000_P_SYNC_7_.D 1 1 1 Node CLK_000_P_SYNC_7_.C 1 1 1 Node CLK_000_P_SYNC_8_.D 1 1 1 Node CLK_000_P_SYNC_8_.C 1 2 1 Node CLK_000_N_SYNC_0_.D 1 1 1 Node CLK_000_N_SYNC_0_.C 1 1 1 Node CLK_000_N_SYNC_1_.D 1 1 1 Node CLK_000_N_SYNC_1_.C 1 1 1 Node CLK_000_N_SYNC_2_.D 1 1 1 Node CLK_000_N_SYNC_2_.C 1 1 1 Node CLK_000_N_SYNC_3_.D 1 1 1 Node CLK_000_N_SYNC_3_.C 1 1 1 Node CLK_000_N_SYNC_4_.D 1 1 1 Node CLK_000_N_SYNC_4_.C 1 1 1 Node CLK_000_N_SYNC_5_.D 1 1 1 Node CLK_000_N_SYNC_5_.C 1 1 1 Node CLK_000_N_SYNC_6_.D 1 1 1 Node CLK_000_N_SYNC_6_.C 1 1 1 Node CLK_000_N_SYNC_7_.D 1 1 1 Node CLK_000_N_SYNC_7_.C 1 1 1 Node CLK_000_N_SYNC_8_.D 1 1 1 Node CLK_000_N_SYNC_8_.C 1 1 1 Node CLK_000_N_SYNC_9_.D 1 1 1 Node CLK_000_N_SYNC_9_.C 1 1 1 Node CLK_000_N_SYNC_10_.D 1 1 1 Node CLK_000_N_SYNC_10_.C 8 10 1 Node inst_CLK_030_H.D 1 1 1 Node inst_CLK_030_H.C 3 6 1 Node SM_AMIGA_1_.D 1 1 1 Node SM_AMIGA_1_.C 3 6 1 Node SM_AMIGA_4_.D 1 1 1 Node SM_AMIGA_4_.C 4 13 1 Node SM_AMIGA_2_.D 1 1 1 Node SM_AMIGA_2_.C 3 7 1 Node inst_DS_000_ENABLE.D 1 1 1 Node inst_DS_000_ENABLE.C 14 20 1 Node SM_AMIGA_i_7_.D 1 1 1 Node SM_AMIGA_i_7_.C 2 14 1 Node CIIN_0 ========= 348 P-Term Total: 348 Total Pins: 61 Total Nodes: 73 Average P-Term/Output: 2 Equations: SIZE_1_ = (!SIZE_DMA_0_.Q & SIZE_DMA_1_.Q); SIZE_1_.OE = (!BGACK_030.Q & !inst_nEXP_SPACE_D0reg.Q); !AS_030 = (!inst_AS_000_DMA.Q & !AS_000.PIN); AS_030.OE = (!BGACK_030.Q & RESET.Q & !inst_nEXP_SPACE_D0reg.Q); !AS_000 = (!inst_AS_000_INT.Q & !AS_030.PIN); AS_000.OE = (BGACK_030.Q & RESET.Q); !DS_030 = (!inst_DS_000_DMA.Q & !AS_000.PIN); DS_030.OE = (!BGACK_030.Q & RESET.Q & !inst_nEXP_SPACE_D0reg.Q); !UDS_000 = (!inst_UDS_000_INT.Q & inst_DS_000_ENABLE.Q & !DS_030.PIN); UDS_000.OE = (BGACK_030.Q & RESET.Q); !LDS_000 = (!inst_LDS_000_INT.Q & inst_DS_000_ENABLE.Q & !DS_030.PIN); LDS_000.OE = (BGACK_030.Q & RESET.Q); BERR = (0); BERR.OE = (FC_1_ & BGACK_000 & FPU_SENSE & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & !AS_030.PIN); CLK_DIV_OUT = (0); CLK_DIV_OUT.OE = (0); CLK_EXP = (CLK_030); !FPU_CS = (FC_1_ & BGACK_000 & !FPU_SENSE & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & !AS_030.PIN); AVEC = (1); AMIGA_ADDR_ENABLE = (0); AMIGA_BUS_DATA_DIR = (BGACK_030.Q & !RW_000.PIN # !BGACK_030.Q & !inst_nEXP_SPACE_D0reg.Q & !AS_000.PIN & RW_000.PIN); !AMIGA_BUS_ENABLE_LOW = (!BGACK_030.Q & !inst_AMIGA_BUS_ENABLE_DMA_LOW.Q); AMIGA_BUS_ENABLE_HIGH = (!BGACK_030.Q & inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q # BGACK_030.Q & !SM_AMIGA_i_7_.Q); CIIN = (!A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_ & A_23_ & A_22_ & A_21_ & A_20_ & !inst_AS_030_D0.Q); CIIN.OE = (CIIN_0); SIZE_0_ = (SIZE_DMA_0_.Q & !SIZE_DMA_1_.Q); SIZE_0_.OE = (!BGACK_030.Q & !inst_nEXP_SPACE_D0reg.Q); !IPL_030_2_.D = (!IPL_2_ & RST & !IPL_030_2_.Q # RST & !IPL_D0_2_.Q & !IPL_030_2_.Q # RST & !IPL_0_ & IPL_D0_0_.Q & !IPL_030_2_.Q # RST & IPL_0_ & !IPL_D0_0_.Q & !IPL_030_2_.Q # RST & !IPL_1_ & IPL_D0_1_.Q & !IPL_030_2_.Q # RST & IPL_1_ & !IPL_D0_1_.Q & !IPL_030_2_.Q # !IPL_2_ & RST & IPL_1_ & IPL_0_ & IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q # !IPL_2_ & RST & IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q # !IPL_2_ & RST & !IPL_1_ & IPL_0_ & IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q); IPL_030_2_.C = (CLK_OSZI); RW_000.OE = (BGACK_030.Q & RESET.Q); !RW_000.D = (RST & SM_AMIGA_5_.Q & !RW.PIN # RST & !SM_AMIGA_5_.Q & !inst_CLK_000_PE.Q & !RW_000.Q & SM_AMIGA_i_7_.Q # RST & !SM_AMIGA_5_.Q & !SM_AMIGA_0_.Q & !RW_000.Q & SM_AMIGA_i_7_.Q); RW_000.C = (CLK_OSZI); A0.OE = (!BGACK_030.Q & RESET.Q & !inst_nEXP_SPACE_D0reg.Q); A0.D = (!RST # !BGACK_030.Q & UDS_000.PIN # BGACK_030.Q & inst_BGACK_030_INT_D.Q & A0.Q); A0.C = (CLK_OSZI); !BG_000.D = (!BG_030 & RST & !BG_000.Q # !BG_030 & RST & inst_AS_030_D0.Q & inst_nEXP_SPACE_D0reg.Q & inst_CLK_000_D0.Q); BG_000.C = (CLK_OSZI); !BGACK_030.D = (!BGACK_000 & RST # RST & !BGACK_030.Q & !inst_CLK_000_PE.Q); BGACK_030.C = (CLK_OSZI); !IPL_030_1_.D = (RST & !IPL_1_ & !IPL_030_1_.Q # RST & !IPL_D0_1_.Q & !IPL_030_1_.Q # RST & !IPL_0_ & IPL_D0_0_.Q & !IPL_030_1_.Q # RST & IPL_0_ & !IPL_D0_0_.Q & !IPL_030_1_.Q # !IPL_2_ & RST & IPL_D0_2_.Q & !IPL_030_1_.Q # IPL_2_ & RST & !IPL_D0_2_.Q & !IPL_030_1_.Q # IPL_2_ & RST & !IPL_1_ & IPL_0_ & IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q # IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q # !IPL_2_ & RST & !IPL_1_ & IPL_0_ & IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q); IPL_030_1_.C = (CLK_OSZI); !IPL_030_0_.D = (RST & !IPL_0_ & !IPL_030_0_.Q # RST & !IPL_D0_0_.Q & !IPL_030_0_.Q # RST & !IPL_1_ & IPL_D0_1_.Q & !IPL_030_0_.Q # RST & IPL_1_ & !IPL_D0_1_.Q & !IPL_030_0_.Q # !IPL_2_ & RST & IPL_D0_2_.Q & !IPL_030_0_.Q # IPL_2_ & RST & !IPL_D0_2_.Q & !IPL_030_0_.Q # IPL_2_ & RST & IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & IPL_D0_1_.Q & IPL_D0_2_.Q # IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q # !IPL_2_ & RST & IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q); IPL_030_0_.C = (CLK_OSZI); DSACK1.OE = (inst_nEXP_SPACE_D0reg.Q); !DSACK1.D = (RST & CLK_000_N_SYNC_10_.Q & SM_AMIGA_1_.Q # !CLK_030 & RST & CLK_000_N_SYNC_9_.Q & SM_AMIGA_1_.Q # RST & inst_CLK_OUT_PRE_D.Q & CLK_000_N_SYNC_9_.Q & SM_AMIGA_1_.Q # RST & !inst_AS_030_D0.Q & !DSACK1.Q & BERR.PIN); DSACK1.C = (CLK_OSZI); E.D = (E.Q & !cpu_est_0_.Q # E.Q & !cpu_est_1_.Q # E.Q & !inst_CLK_000_NE_D0.Q # cpu_est_0_.Q & cpu_est_1_.Q & !cpu_est_2_.Q & inst_CLK_000_NE_D0.Q # !cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & inst_CLK_000_NE_D0.Q); E.C = (CLK_OSZI); VMA.T = (!RST & !VMA.Q # !E.Q & !VMA.Q & !cpu_est_0_.Q & cpu_est_1_.Q & inst_CLK_000_PE.Q & cpu_est_2_.Q # RST & !E.Q & VMA.Q & cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & inst_CLK_000_NE.Q & cpu_est_2_.Q); VMA.C = (CLK_OSZI); RESET.D = (RST & RESET.Q # RST & inst_CLK_000_NE.Q & RST_DLY_0_.Q & RST_DLY_1_.Q & RST_DLY_2_.Q & RST_DLY_3_.Q & RST_DLY_4_.Q & RST_DLY_5_.Q & RST_DLY_6_.Q & RST_DLY_7_.Q); RESET.C = (CLK_OSZI); RW.OE = (!BGACK_030.Q & RESET.Q); !RW.D = (RST & !BGACK_030.Q & !RW_000.PIN # RST & BGACK_030.Q & inst_BGACK_030_INT_D.Q & !RW.Q); RW.C = (CLK_OSZI); cpu_est_0_.D = (!cpu_est_0_.Q & inst_CLK_000_NE_D0.Q # cpu_est_0_.Q & !inst_CLK_000_NE_D0.Q); cpu_est_0_.C = (CLK_OSZI); !cpu_est_1_.D = (!cpu_est_1_.Q & !inst_CLK_000_NE_D0.Q # E.Q & cpu_est_0_.Q & !cpu_est_1_.Q # !E.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & cpu_est_2_.Q # E.Q & cpu_est_0_.Q & !cpu_est_2_.Q & inst_CLK_000_NE_D0.Q # !E.Q & cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & inst_CLK_000_NE_D0.Q); cpu_est_1_.C = (CLK_OSZI); !inst_AS_000_INT.D = (RST & SM_AMIGA_5_.Q # RST & !inst_AS_000_INT.Q & !inst_AS_030_D0.Q & BERR.PIN); inst_AS_000_INT.C = (CLK_OSZI); SM_AMIGA_5_.D = (RST & !SM_AMIGA_5_.Q & inst_CLK_000_PE.Q & SM_AMIGA_6_.Q # RST & SM_AMIGA_5_.Q & !inst_CLK_000_NE.Q & BERR.PIN # RST & SM_AMIGA_5_.Q & SM_AMIGA_6_.Q & BERR.PIN); SM_AMIGA_5_.C = (CLK_OSZI); !inst_AMIGA_BUS_ENABLE_DMA_LOW.D = (A1 & RST & !BGACK_030.Q # RST & BGACK_030.Q & !inst_AMIGA_BUS_ENABLE_DMA_LOW.Q & inst_BGACK_030_INT_D.Q); inst_AMIGA_BUS_ENABLE_DMA_LOW.C = (CLK_OSZI); !inst_AS_030_D0.D = (RST & !AS_030.PIN); inst_AS_030_D0.C = (CLK_OSZI); !inst_nEXP_SPACE_D0reg.D = (!nEXP_SPACE & RST); inst_nEXP_SPACE_D0reg.C = (CLK_OSZI); !inst_DS_030_D0.D = (RST & !DS_030.PIN); inst_DS_030_D0.C = (CLK_OSZI); !inst_AS_030_000_SYNC.D = (RST & !inst_AS_030_D0.Q & !inst_AS_030_000_SYNC.Q & BERR.PIN # !FC_1_ & RST & BGACK_030.Q & !inst_AS_030_D0.Q & inst_nEXP_SPACE_D0reg.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & BERR.PIN # RST & A_19_ & BGACK_030.Q & !inst_AS_030_D0.Q & inst_nEXP_SPACE_D0reg.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & BERR.PIN # RST & A_18_ & BGACK_030.Q & !inst_AS_030_D0.Q & inst_nEXP_SPACE_D0reg.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & BERR.PIN # RST & !A_17_ & BGACK_030.Q & !inst_AS_030_D0.Q & inst_nEXP_SPACE_D0reg.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & BERR.PIN # RST & A_16_ & BGACK_030.Q & !inst_AS_030_D0.Q & inst_nEXP_SPACE_D0reg.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & BERR.PIN # RST & !FC_0_ & BGACK_030.Q & !inst_AS_030_D0.Q & inst_nEXP_SPACE_D0reg.Q & inst_BGACK_030_INT_D.Q & !SM_AMIGA_i_7_.Q & BERR.PIN); inst_AS_030_000_SYNC.C = (CLK_OSZI); !inst_BGACK_030_INT_D.D = (RST & !BGACK_030.Q); inst_BGACK_030_INT_D.C = (CLK_OSZI); inst_AS_000_DMA.D = (!RST # BGACK_030.Q # AS_000.PIN # !CLK_030 & inst_AS_000_DMA.Q # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q # !CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q # UDS_000.PIN & LDS_000.PIN); inst_AS_000_DMA.C = (CLK_OSZI); inst_DS_000_DMA.D = (!RST # BGACK_030.Q # AS_000.PIN # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q # !CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q # UDS_000.PIN & LDS_000.PIN # !CLK_030 & inst_DS_000_DMA.Q & !RW_000.PIN # inst_DS_000_DMA.Q & !inst_CLK_030_H.Q & !RW_000.PIN # CLK_030 & inst_AS_000_DMA.Q & inst_CLK_030_H.Q & !RW_000.PIN); inst_DS_000_DMA.C = (CLK_OSZI); CYCLE_DMA_0_.D = (RST & !BGACK_030.Q & !CYCLE_DMA_0_.Q & inst_CLK_000_PE.Q & !AS_000.PIN # RST & !BGACK_030.Q & CYCLE_DMA_0_.Q & !inst_CLK_000_PE.Q & !AS_000.PIN); CYCLE_DMA_0_.C = (CLK_OSZI); CYCLE_DMA_1_.D = (RST & !BGACK_030.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !AS_000.PIN # RST & !BGACK_030.Q & CYCLE_DMA_1_.Q & !inst_CLK_000_PE.Q & !AS_000.PIN # RST & !BGACK_030.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & inst_CLK_000_PE.Q & !AS_000.PIN); CYCLE_DMA_1_.C = (CLK_OSZI); !SIZE_DMA_0_.D = (RST & BGACK_030.Q & !inst_BGACK_030_INT_D.Q # RST & BGACK_030.Q & !SIZE_DMA_0_.Q # RST & !BGACK_030.Q & !UDS_000.PIN & !LDS_000.PIN); SIZE_DMA_0_.C = (CLK_OSZI); SIZE_DMA_1_.D = (!RST # BGACK_030.Q & inst_BGACK_030_INT_D.Q & SIZE_DMA_1_.Q # !BGACK_030.Q & !UDS_000.PIN & !LDS_000.PIN); SIZE_DMA_1_.C = (CLK_OSZI); !inst_VPA_D.D = (!VPA & RST); inst_VPA_D.C = (CLK_OSZI); !inst_UDS_000_INT.D = (RST & inst_DS_030_D0.Q & !inst_UDS_000_INT.Q # RST & !inst_UDS_000_INT.Q & !SM_AMIGA_6_.Q # RST & !inst_DS_030_D0.Q & SM_AMIGA_6_.Q & !A0.PIN); inst_UDS_000_INT.C = (CLK_OSZI); inst_LDS_000_INT.D = (!RST # inst_DS_030_D0.Q & inst_LDS_000_INT.Q # inst_LDS_000_INT.Q & !SM_AMIGA_6_.Q # !inst_DS_030_D0.Q & SM_AMIGA_6_.Q & SIZE_0_.PIN & !SIZE_1_.PIN & !A0.PIN); inst_LDS_000_INT.C = (CLK_OSZI); inst_CLK_OUT_PRE_D.D = (inst_CLK_OUT_PRE_50.Q); inst_CLK_OUT_PRE_D.C = (CLK_OSZI); !inst_DTACK_D0.D = (!DTACK & RST); inst_DTACK_D0.C = (CLK_OSZI); inst_CLK_OUT_PRE_50.D = (!inst_CLK_OUT_PRE_50.Q); inst_CLK_OUT_PRE_50.C = (CLK_OSZI); inst_CLK_000_D1.D = (inst_CLK_000_D0.Q); inst_CLK_000_D1.C = (CLK_OSZI); inst_CLK_000_D0.D = (CLK_000); inst_CLK_000_D0.C = (CLK_OSZI); inst_CLK_000_PE.D = (CLK_000_P_SYNC_9_.Q); inst_CLK_000_PE.C = (CLK_OSZI); CLK_000_P_SYNC_9_.D = (CLK_000_P_SYNC_8_.Q); CLK_000_P_SYNC_9_.C = (CLK_OSZI); inst_CLK_000_NE.D = (CLK_000_N_SYNC_11_.Q); inst_CLK_000_NE.C = (CLK_OSZI); !N_96_i = (!SM_AMIGA_5_.Q & !inst_nEXP_SPACE_D0reg.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q # !SM_AMIGA_5_.Q & inst_AS_030_000_SYNC.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q # !SM_AMIGA_5_.Q & !inst_CLK_000_D1.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q # !SM_AMIGA_5_.Q & inst_CLK_000_D0.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q); CLK_000_N_SYNC_11_.D = (CLK_000_N_SYNC_10_.Q); CLK_000_N_SYNC_11_.C = (CLK_OSZI); cpu_est_2_.D = (cpu_est_1_.Q & cpu_est_2_.Q # cpu_est_2_.Q & !inst_CLK_000_NE_D0.Q # E.Q & cpu_est_0_.Q & inst_CLK_000_NE_D0.Q # !cpu_est_0_.Q & !cpu_est_1_.Q & inst_CLK_000_NE_D0.Q); cpu_est_2_.C = (CLK_OSZI); !IPL_D0_0_.D = (RST & !IPL_0_); IPL_D0_0_.C = (CLK_OSZI); !IPL_D0_1_.D = (RST & !IPL_1_); IPL_D0_1_.C = (CLK_OSZI); !IPL_D0_2_.D = (!IPL_2_ & RST); IPL_D0_2_.C = (CLK_OSZI); SM_AMIGA_3_.T = (!RST & SM_AMIGA_3_.Q # SM_AMIGA_3_.Q & !BERR.PIN # RST & inst_CLK_000_PE.Q & !SM_AMIGA_3_.Q & SM_AMIGA_4_.Q # inst_VPA_D.Q & !inst_DTACK_D0.Q & SM_AMIGA_3_.Q & inst_CLK_000_NE_D0.Q & !SM_AMIGA_4_.Q # E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & cpu_est_2_.Q & SM_AMIGA_3_.Q & inst_CLK_000_NE_D0.Q & !SM_AMIGA_4_.Q); SM_AMIGA_3_.C = (CLK_OSZI); inst_CLK_000_NE_D0.D = (inst_CLK_000_NE.Q); inst_CLK_000_NE_D0.C = (CLK_OSZI); SM_AMIGA_0_.D = (RST & inst_CLK_000_NE.Q & !SM_AMIGA_0_.Q & SM_AMIGA_1_.Q # RST & !inst_CLK_000_PE.Q & SM_AMIGA_0_.Q & BERR.PIN); SM_AMIGA_0_.C = (CLK_OSZI); !inst_AMIGA_BUS_ENABLE_DMA_HIGH.D = (!A1 & RST & !BGACK_030.Q # RST & BGACK_030.Q & inst_BGACK_030_INT_D.Q & !inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q); inst_AMIGA_BUS_ENABLE_DMA_HIGH.C = (CLK_OSZI); SM_AMIGA_6_.D = (RST & SM_AMIGA_6_.Q & !SM_AMIGA_i_7_.Q # RST & !inst_CLK_000_PE.Q & SM_AMIGA_6_.Q & BERR.PIN # RST & inst_nEXP_SPACE_D0reg.Q & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D0.Q & !SM_AMIGA_i_7_.Q); SM_AMIGA_6_.C = (CLK_OSZI); RST_DLY_0_.D = (RST & !inst_CLK_000_NE.Q & RST_DLY_0_.Q # RST & inst_CLK_000_NE.Q & !RST_DLY_0_.Q # RST & RST_DLY_0_.Q & RST_DLY_1_.Q & RST_DLY_2_.Q & RST_DLY_3_.Q & RST_DLY_4_.Q & RST_DLY_5_.Q & RST_DLY_6_.Q & RST_DLY_7_.Q); RST_DLY_0_.C = (CLK_OSZI); RST_DLY_1_.D = (RST & !inst_CLK_000_NE.Q & RST_DLY_1_.Q # RST & !RST_DLY_0_.Q & RST_DLY_1_.Q # RST & inst_CLK_000_NE.Q & RST_DLY_0_.Q & !RST_DLY_1_.Q # RST & RST_DLY_1_.Q & RST_DLY_2_.Q & RST_DLY_3_.Q & RST_DLY_4_.Q & RST_DLY_5_.Q & RST_DLY_6_.Q & RST_DLY_7_.Q); RST_DLY_1_.C = (CLK_OSZI); RST_DLY_2_.D = (RST & !inst_CLK_000_NE.Q & RST_DLY_2_.Q # RST & !RST_DLY_0_.Q & RST_DLY_2_.Q # RST & !RST_DLY_1_.Q & RST_DLY_2_.Q # RST & inst_CLK_000_NE.Q & RST_DLY_0_.Q & RST_DLY_1_.Q & !RST_DLY_2_.Q # RST & RST_DLY_2_.Q & RST_DLY_3_.Q & RST_DLY_4_.Q & RST_DLY_5_.Q & RST_DLY_6_.Q & RST_DLY_7_.Q); RST_DLY_2_.C = (CLK_OSZI); RST_DLY_3_.D = (RST & !inst_CLK_000_NE.Q & RST_DLY_3_.Q # RST & !RST_DLY_0_.Q & RST_DLY_3_.Q # RST & !RST_DLY_1_.Q & RST_DLY_3_.Q # RST & !RST_DLY_2_.Q & RST_DLY_3_.Q # RST & inst_CLK_000_NE.Q & RST_DLY_0_.Q & RST_DLY_1_.Q & RST_DLY_2_.Q & !RST_DLY_3_.Q # RST & RST_DLY_3_.Q & RST_DLY_4_.Q & RST_DLY_5_.Q & RST_DLY_6_.Q & RST_DLY_7_.Q); RST_DLY_3_.C = (CLK_OSZI); RST_DLY_4_.T.X1 = (!RST & RST_DLY_4_.Q # RST & inst_CLK_000_NE.Q & RST_DLY_0_.Q & RST_DLY_1_.Q & RST_DLY_2_.Q & RST_DLY_3_.Q); RST_DLY_4_.T.X2 = (RST & inst_CLK_000_NE.Q & RST_DLY_0_.Q & RST_DLY_1_.Q & RST_DLY_2_.Q & RST_DLY_3_.Q & RST_DLY_4_.Q & RST_DLY_5_.Q & RST_DLY_6_.Q & RST_DLY_7_.Q); RST_DLY_4_.C = (CLK_OSZI); RST_DLY_5_.T = (!RST & RST_DLY_5_.Q # RST & inst_CLK_000_NE.Q & RST_DLY_0_.Q & RST_DLY_1_.Q & RST_DLY_2_.Q & RST_DLY_3_.Q & RST_DLY_4_.Q & !RST_DLY_5_.Q # inst_CLK_000_NE.Q & RST_DLY_0_.Q & RST_DLY_1_.Q & RST_DLY_2_.Q & RST_DLY_3_.Q & RST_DLY_4_.Q & RST_DLY_5_.Q & !RST_DLY_6_.Q # inst_CLK_000_NE.Q & RST_DLY_0_.Q & RST_DLY_1_.Q & RST_DLY_2_.Q & RST_DLY_3_.Q & RST_DLY_4_.Q & RST_DLY_5_.Q & !RST_DLY_7_.Q); RST_DLY_5_.C = (CLK_OSZI); RST_DLY_6_.T = (!RST & RST_DLY_6_.Q # RST & inst_CLK_000_NE.Q & RST_DLY_0_.Q & RST_DLY_1_.Q & RST_DLY_2_.Q & RST_DLY_3_.Q & RST_DLY_4_.Q & RST_DLY_5_.Q & !RST_DLY_6_.Q # inst_CLK_000_NE.Q & RST_DLY_0_.Q & RST_DLY_1_.Q & RST_DLY_2_.Q & RST_DLY_3_.Q & RST_DLY_4_.Q & RST_DLY_5_.Q & RST_DLY_6_.Q & !RST_DLY_7_.Q); RST_DLY_6_.C = (CLK_OSZI); RST_DLY_7_.D = (RST & RST_DLY_7_.Q # RST & inst_CLK_000_NE.Q & RST_DLY_0_.Q & RST_DLY_1_.Q & RST_DLY_2_.Q & RST_DLY_3_.Q & RST_DLY_4_.Q & RST_DLY_5_.Q & RST_DLY_6_.Q); RST_DLY_7_.C = (CLK_OSZI); CLK_000_P_SYNC_0_.D = (!inst_CLK_000_D1.Q & inst_CLK_000_D0.Q); CLK_000_P_SYNC_0_.C = (CLK_OSZI); CLK_000_P_SYNC_1_.D = (CLK_000_P_SYNC_0_.Q); CLK_000_P_SYNC_1_.C = (CLK_OSZI); CLK_000_P_SYNC_2_.D = (CLK_000_P_SYNC_1_.Q); CLK_000_P_SYNC_2_.C = (CLK_OSZI); CLK_000_P_SYNC_3_.D = (CLK_000_P_SYNC_2_.Q); CLK_000_P_SYNC_3_.C = (CLK_OSZI); CLK_000_P_SYNC_4_.D = (CLK_000_P_SYNC_3_.Q); CLK_000_P_SYNC_4_.C = (CLK_OSZI); CLK_000_P_SYNC_5_.D = (CLK_000_P_SYNC_4_.Q); CLK_000_P_SYNC_5_.C = (CLK_OSZI); CLK_000_P_SYNC_6_.D = (CLK_000_P_SYNC_5_.Q); CLK_000_P_SYNC_6_.C = (CLK_OSZI); CLK_000_P_SYNC_7_.D = (CLK_000_P_SYNC_6_.Q); CLK_000_P_SYNC_7_.C = (CLK_OSZI); CLK_000_P_SYNC_8_.D = (CLK_000_P_SYNC_7_.Q); CLK_000_P_SYNC_8_.C = (CLK_OSZI); CLK_000_N_SYNC_0_.D = (inst_CLK_000_D1.Q & !inst_CLK_000_D0.Q); CLK_000_N_SYNC_0_.C = (CLK_OSZI); CLK_000_N_SYNC_1_.D = (CLK_000_N_SYNC_0_.Q); CLK_000_N_SYNC_1_.C = (CLK_OSZI); CLK_000_N_SYNC_2_.D = (CLK_000_N_SYNC_1_.Q); CLK_000_N_SYNC_2_.C = (CLK_OSZI); CLK_000_N_SYNC_3_.D = (CLK_000_N_SYNC_2_.Q); CLK_000_N_SYNC_3_.C = (CLK_OSZI); CLK_000_N_SYNC_4_.D = (CLK_000_N_SYNC_3_.Q); CLK_000_N_SYNC_4_.C = (CLK_OSZI); CLK_000_N_SYNC_5_.D = (CLK_000_N_SYNC_4_.Q); CLK_000_N_SYNC_5_.C = (CLK_OSZI); CLK_000_N_SYNC_6_.D = (CLK_000_N_SYNC_5_.Q); CLK_000_N_SYNC_6_.C = (CLK_OSZI); CLK_000_N_SYNC_7_.D = (CLK_000_N_SYNC_6_.Q); CLK_000_N_SYNC_7_.C = (CLK_OSZI); CLK_000_N_SYNC_8_.D = (CLK_000_N_SYNC_7_.Q); CLK_000_N_SYNC_8_.C = (CLK_OSZI); CLK_000_N_SYNC_9_.D = (CLK_000_N_SYNC_8_.Q); CLK_000_N_SYNC_9_.C = (CLK_OSZI); CLK_000_N_SYNC_10_.D = (CLK_000_N_SYNC_9_.Q); CLK_000_N_SYNC_10_.C = (CLK_OSZI); inst_CLK_030_H.D = (RST & !BGACK_030.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & inst_CLK_030_H.Q & !AS_000.PIN & !UDS_000.PIN # RST & !BGACK_030.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & inst_CLK_030_H.Q & !AS_000.PIN & !UDS_000.PIN # RST & !BGACK_030.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & inst_CLK_030_H.Q & !AS_000.PIN & !LDS_000.PIN # RST & !BGACK_030.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & inst_CLK_030_H.Q & !AS_000.PIN & !LDS_000.PIN # !CLK_030 & RST & !BGACK_030.Q & !inst_AS_000_DMA.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !AS_000.PIN & !UDS_000.PIN # !CLK_030 & RST & !BGACK_030.Q & !inst_AS_000_DMA.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & !AS_000.PIN & !UDS_000.PIN # !CLK_030 & RST & !BGACK_030.Q & !inst_AS_000_DMA.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !AS_000.PIN & !LDS_000.PIN # !CLK_030 & RST & !BGACK_030.Q & !inst_AS_000_DMA.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & !AS_000.PIN & !LDS_000.PIN); inst_CLK_030_H.C = (CLK_OSZI); SM_AMIGA_1_.D = (RST & inst_CLK_000_PE.Q & !SM_AMIGA_1_.Q & SM_AMIGA_2_.Q # RST & !inst_CLK_000_NE.Q & SM_AMIGA_1_.Q & BERR.PIN # RST & SM_AMIGA_1_.Q & SM_AMIGA_2_.Q & BERR.PIN); SM_AMIGA_1_.C = (CLK_OSZI); SM_AMIGA_4_.D = (RST & SM_AMIGA_5_.Q & inst_CLK_000_NE.Q # RST & SM_AMIGA_5_.Q & SM_AMIGA_4_.Q # RST & !inst_CLK_000_PE.Q & SM_AMIGA_4_.Q & BERR.PIN); SM_AMIGA_4_.C = (CLK_OSZI); SM_AMIGA_2_.D = (RST & SM_AMIGA_3_.Q & SM_AMIGA_2_.Q # RST & !inst_CLK_000_PE.Q & SM_AMIGA_2_.Q & BERR.PIN # RST & inst_VPA_D.Q & !inst_DTACK_D0.Q & SM_AMIGA_3_.Q & inst_CLK_000_NE_D0.Q # RST & E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & cpu_est_2_.Q & SM_AMIGA_3_.Q & inst_CLK_000_NE_D0.Q); SM_AMIGA_2_.C = (CLK_OSZI); inst_DS_000_ENABLE.D = (RST & !SM_AMIGA_5_.Q & SM_AMIGA_3_.Q # RST & SM_AMIGA_5_.Q & RW.PIN # RST & !inst_AS_030_D0.Q & inst_DS_000_ENABLE.Q & BERR.PIN); inst_DS_000_ENABLE.C = (CLK_OSZI); SM_AMIGA_i_7_.D = (RST & !inst_CLK_000_PE.Q & N_96_i & BERR.PIN # RST & N_96_i & !SM_AMIGA_0_.Q & BERR.PIN # RST & inst_CLK_000_PE.Q & inst_CLK_000_NE.Q & N_96_i & !SM_AMIGA_3_.Q & !SM_AMIGA_0_.Q # RST & !SM_AMIGA_5_.Q & inst_CLK_000_PE.Q & N_96_i & !SM_AMIGA_3_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_1_.Q # RST & inst_VPA_D.Q & !inst_DTACK_D0.Q & inst_CLK_000_PE.Q & inst_CLK_000_NE.Q & N_96_i & inst_CLK_000_NE_D0.Q & !SM_AMIGA_0_.Q # RST & inst_CLK_000_NE.Q & N_96_i & !SM_AMIGA_3_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q # RST & !SM_AMIGA_5_.Q & inst_VPA_D.Q & !inst_DTACK_D0.Q & inst_CLK_000_PE.Q & N_96_i & inst_CLK_000_NE_D0.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_1_.Q # RST & !SM_AMIGA_5_.Q & N_96_i & !SM_AMIGA_3_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q # RST & inst_VPA_D.Q & !inst_DTACK_D0.Q & inst_CLK_000_NE.Q & N_96_i & inst_CLK_000_NE_D0.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q # RST & !SM_AMIGA_5_.Q & inst_VPA_D.Q & !inst_DTACK_D0.Q & N_96_i & inst_CLK_000_NE_D0.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q # RST & E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & inst_CLK_000_PE.Q & inst_CLK_000_NE.Q & N_96_i & cpu_est_2_.Q & inst_CLK_000_NE_D0.Q & !SM_AMIGA_0_.Q # RST & E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !SM_AMIGA_5_.Q & !inst_VPA_D.Q & inst_CLK_000_PE.Q & N_96_i & cpu_est_2_.Q & inst_CLK_000_NE_D0.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_1_.Q # RST & E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & inst_CLK_000_NE.Q & N_96_i & cpu_est_2_.Q & inst_CLK_000_NE_D0.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q # RST & E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !SM_AMIGA_5_.Q & !inst_VPA_D.Q & N_96_i & cpu_est_2_.Q & inst_CLK_000_NE_D0.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q); SM_AMIGA_i_7_.C = (CLK_OSZI); CIIN_0 = (inst_nEXP_SPACE_D0reg.Q # !A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_ & A_23_ & A_22_ & A_21_ & A_20_ & !inst_AS_030_D0.Q); Reverse-Polarity Equations: