Macintosh-HW
/
68030tk
mirror of https://github.com/kr239/68030tk.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
68030tk/Logic/BSDLISCispMACH4A5-12864100P...

1269 lines
61 KiB
Plaintext
Raw Permalink Blame History

-- ********************************************************************
-- * M4A5-128/64 100 Pin TQFP 5.0V BSDL Model *
-- * *
-- * File Version: V2.00 *
-- * File Date: Dec. 10, 2001 *
-- * *
-- * Standard Test Access Port and Boundary-Scan Architecture *
-- * VHDL Description File *
-- * *
-- * This BSDL can be used for Boundary-Scan Test as well as *
-- * ISC 1532 Programming support. *
-- * *
-- * This BSDL file is created according to: *
-- * - IEEE 1532 2001 spec. *
-- * - IEEE 1149.1 1994 spec. *
-- * *
-- * This BSDL file has been syntax checked with: *
-- * - Lattice BSDL Syntax Checker *
-- * - Agilent BSDL Syntax Checker *
-- * *
-- * Copyright 2000, 2001 Lattice Semiconductor Corporation *
-- * 5555 NE Moore Ct., Hillsboro, OR 97124 *
-- * All rights reserved. No part of this program or publication *
-- * may be reproduced, transmitted, transcribed, stored in a *
-- * retrieval system, or translated into any language or *
-- * computer language, in any form or by any means without this *
-- * notice appearing within. *
-- ********************************************************************
-- * *
-- * IMPORTANT *
-- * *
-- * The following is a BSDL file that tests all of the I/O pins *
-- * as bidirectional pins. The functionality of the BSCAN register *
-- * for this device is independent of the pattern programmed *
-- * into the device. An additional programming step is not *
-- * required to configure the I/O pins prior to BSCAN test. *
-- * *
-- * This file contains additional information that may cause a BSDL *
-- * parser to reject or error if your parser does not contain the *
-- * 1532 library. BSDL files without ISC extensions are available *
-- * on the Lattice website at www.latticesemi.com. *
-- * *
-- * For Further assistance, please contact Tech Support at *
-- * 1-800-LATTICE or techsupport@latticesemi.com. *
-- ********************************************************************
-- * Revision History *
-- * *
-- * Rev 2.00: 12/10/2001 *
-- * - Changed entity name from iM4A5_128_64_XXVC to *
-- * M4A5_128_64_XXVC. Edit file column length to 72 characters *
-- * max. Updated Header. *
-- * Rev 1.11: 10/23/2001 *
-- * - Changed ISC_READ in flow_verify and flow_read *
-- * from WAIT TCK 1 to WAIT TCK 3, 2.0E-3. *
-- * Rev 1.1: 10/03/2001 *
-- * - Changed USERCODE TDO array to USERCODE. *
-- * Rev 1.9: 08/30/2001 *
-- * - Updated entity name. *
-- * Rev 1.8: 07/10/2001 *
-- * - Added IEEE 1532 Extension. *
-- * Rev 1.7: 06/07/2001 *
-- * - Add Lattice phone number and email address. *
-- * Rev 1.6: 12/23/1998 *
-- * - Modified entity name for M4A5-128/64 100-pin PQFP. *
-- * Rev 1.5: 10/08/1998 *
-- * - Moved some instructions from private to public. *
-- * Rev 1.4: 09/04/1998 *
-- * - Updated entity to descriptive, 14-char string. *
-- * Rev 1.3: 01/08/1998 *
-- * - MACH4-128/64 TQFP *
-- ********************************************************************
--
-- Entity format: iMabc_ddd_eee_XXff
-- a = family (1, 2, 4, 5)
-- b = A for "A" type parts
-- c = Vcc level: 5, 3, 2, or 1 for 5.0, 3.3, 2.5, or 1.8 VDC
-- ddd = number of macrocells, such as 064
-- eee = number of I/O pins, such as 032
-- ff = package: JC, YC, VC, or AC for PLCC, PQFP, TQFP, or BGA
--
entity M4A5_128_64_XXVC is
generic(PHYSICAL_PIN_MAP : string := "TQFP_100pin");
port (
DED_IN : in bit_vector(0 to 5); -- Clocks/Inputs
IO : inout bit_vector(0 to 63); -- I/O pins
TCK, TMS, TDI, TRST: in bit; -- JTAG inputs
TDO : out bit; -- JTAG outputs
ENABLEB : linkage bit; -- Program Enable pin
VCC : linkage bit_vector(0 to 5);
GND : linkage bit_vector(0 to 17)
);
use STD_1149_1_1994.all; -- Standard 'use' statement
use STD_1532_2001.all; -- BSDL Extension for ISC devices
attribute COMPONENT_CONFORMANCE of M4A5_128_64_XXVC : entity is
"STD_1149_1_1993";
attribute PIN_MAP of M4A5_128_64_XXVC : entity is PHYSICAL_PIN_MAP;
constant TQFP_100pin : PIN_MAP_STRING :=
"DED_IN:(11,14,36,61,64,86), "& -- Dedicated Clk/Inp Pins
"IO:(91, 92, 93, 94, 95, 96, 97, 98, "& -- I/O A
" 3, 4, 5, 6, 7, 8, 9, 10, "& -- I/O B REV
" 15, 16, 17, 18, 19, 20, 21, 22, "& -- I/O C
" 28, 29, 30, 31, 32, 33, 34, 35, "& -- I/O D REV
" 41, 42, 43, 44, 45, 46, 47, 48, "& -- I/O E
" 53, 54, 55, 56, 57, 58, 59, 60, "& -- I/O F REV
" 65, 66, 67, 68, 69, 70, 71, 72, "& -- I/O G
" 78, 79, 80, 81, 82, 83, 84, 85), "& -- I/O H REV
"ENABLEB:52, "&
"TDI:2, TMS:23, TCK:24, TRST:73, TDO:74, "& -- JTAG
"VCC:( 12,37,40,62,87,90), "& -- POWER
"GND:( 1,13,25,26,27,38,39,49, "& -- GROUND PINS
"50,51,63,75,76,77,88,89, "&
"99,100)"; -- END OF PIN DEFINITION
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_RESET of TRST : signal is true;
attribute TAP_SCAN_CLOCK of TCK: signal is (20.0e6, BOTH);
-- Instruction register definitions
attribute INSTRUCTION_LENGTH of M4A5_128_64_XXVC : entity is 6;
attribute INSTRUCTION_OPCODE of M4A5_128_64_XXVC : entity is
"BYPASS (111111), "&
"EXTEST (000000), "&
"SAMPLE (000010), "&
"IDCODE (000001), "&
"USERCODE (010000), "&
"HIGHZ (010001), "&
-- ISC Instructions
"ISC_ADDRESS_SHIFT (000011), "&
"ISC_DATA_SHIFT (000100), "&
"ISC_ERASE (000101), "&
"ISC_PROGRAM (000110), "&
"ISC_READ (000111), "&
"ISC_PROGRAM_SECURITY (001000), "&
"ISC_ENABLE (001111), "&
"ISC_DISABLE (111111), "&
"ISC_NOOP (111111), "&
-- Private Instructions
"PRIV009 (001001), "&
"PRIVATE (110011,110100,110000,110010,100101,101110, "&
"100111,101101,001100,001101,001110)";
attribute INSTRUCTION_CAPTURE of M4A5_128_64_XXVC :
entity is "000001";
attribute INSTRUCTION_PRIVATE of M4A5_128_64_XXVC :
entity is "PRIVATE";
attribute IDCODE_REGISTER of M4A5_128_64_XXVC : entity is
"0010"& -- version number (2)
"0111010101101010"& -- part identification (756A)
"00010101011"& -- company code (157)
"1"; -- mandatory 1
attribute USERCODE_REGISTER of M4A5_128_64_XXVC : entity is
"11111111111111111111111111111111";
attribute REGISTER_ACCESS of M4A5_128_64_XXVC : entity is
"BYPASS (BYPASS, HIGHZ, PRIV009), "&
"ISC_DEFAULT[1] (ISC_PROGRAM, ISC_DISABLE, ISC_NOOP, "&
"ISC_ERASE, ISC_PROGRAM_SECURITY), "&
"BOUNDARY (EXTEST, SAMPLE), "&
"ISC_ADDRESS[80] (ISC_ADDRESS_SHIFT), "&
"ISC_DATA[792] (ISC_DATA_SHIFT), "&
"ISC_RDATA[792] (ISC_READ), "&
"DEVICE_ID (USERCODE, IDCODE), "&
"ISC_CONFIG[5] (ISC_ENABLE)";
-- **************************************************************
-- * BOUNDARY SCAN CELL REGISTER DESCRIPTION *
-- * THE FIRST CELL (0) IS THE CELL CLOSEST TO TDO *
-- **************************************************************
attribute BOUNDARY_LENGTH of M4A5_128_64_XXVC : entity is 198;
attribute BOUNDARY_REGISTER of M4A5_128_64_XXVC : entity is
-- 1. The order of the I/O cell is OE - OUTPUT - INPUT
-- 2. The output is disabled when a 0 is shifted into the OE cell.
-- 3. The pictoral representation of the Boundary scan
-- register is found in AMD document no. 93-009-6105-JT-01.
--
" 197 (BC_1, IO(0), INPUT, X), "&
" 196 (BC_1, IO(0), OUTPUT3, X, 195, 0, Z), "&
" 195 (BC_1, *, CONTROL, 0), "&
" 194 (BC_1, IO(1), INPUT, X), "&
" 193 (BC_1, IO(1), OUTPUT3, X, 192, 0, Z), "&
" 192 (BC_1, *, CONTROL, 0), "&
" 191 (BC_1, IO(2), INPUT, X), "&
" 190 (BC_1, IO(2), OUTPUT3, X, 189, 0, Z), "&
" 189 (BC_1, *, CONTROL, 0), "&
" 188 (BC_1, IO(3), INPUT, X), "&
" 187 (BC_1, IO(3), OUTPUT3, X, 186, 0, Z), "&
" 186 (BC_1, *, CONTROL, 0), "&
" 185 (BC_1, IO(4), INPUT, X), "&
" 184 (BC_1, IO(4), OUTPUT3, X, 183, 0, Z), "&
" 183 (BC_1, *, CONTROL, 0), "&
" 182 (BC_1, IO(5), INPUT, X), "&
" 181 (BC_1, IO(5), OUTPUT3, X, 180, 0, Z), "&
" 180 (BC_1, *, CONTROL, 0), "&
" 179 (BC_1, IO(6), INPUT, X), "&
" 178 (BC_1, IO(6), OUTPUT3, X, 177, 0, Z), "&
" 177 (BC_1, *, CONTROL, 0), "&
" 176 (BC_1, IO(7), INPUT, X), "&
" 175 (BC_1, IO(7), OUTPUT3, X, 174, 0, Z), "&
" 174 (BC_1, *, CONTROL, 0), "&
" 173 (BC_1, IO(15), INPUT, X), "&
" 172 (BC_1, IO(15), OUTPUT3, X, 171, 0, Z), "&
" 171 (BC_1, *, CONTROL, 0), "&
" 170 (BC_1, IO(14), INPUT, X), "&
" 169 (BC_1, IO(14), OUTPUT3, X, 168, 0, Z), "&
" 168 (BC_1, *, CONTROL, 0), "&
" 167 (BC_1, IO(13), INPUT, X), "&
" 166 (BC_1, IO(13), OUTPUT3, X, 165, 0, Z), "&
" 165 (BC_1, *, CONTROL, 0), "&
" 164 (BC_1, IO(12), INPUT, X), "&
" 163 (BC_1, IO(12), OUTPUT3, X, 162, 0, Z), "&
" 162 (BC_1, *, CONTROL, 0), "&
" 161 (BC_1, IO(11), INPUT, X), "&
" 160 (BC_1, IO(11), OUTPUT3, X, 159, 0, Z), "&
" 159 (BC_1, *, CONTROL, 0), "&
" 158 (BC_1, IO(10), INPUT, X), "&
" 157 (BC_1, IO(10), OUTPUT3, X, 156, 0, Z), "&
" 156 (BC_1, *, CONTROL, 0), "&
" 155 (BC_1, IO(9), INPUT, X)," &
" 154 (BC_1, IO(9), OUTPUT3, X, 153, 0, Z), "&
" 153 (BC_1, *, CONTROL, 0), "&
" 152 (BC_1, IO(8), INPUT, X)," &
" 151 (BC_1, IO(8), OUTPUT3, X, 150, 0, Z), "&
" 150 (BC_1, *, CONTROL, 0), "&
" 149 (BC_1, DED_IN(0), INPUT, X), "&
" 148 (BC_1, DED_IN(1), INPUT, X), "&
" 147 (BC_1, IO(16), INPUT, X), "&
" 146 (BC_1, IO(16), OUTPUT3, X, 145, 0, Z), "&
" 145 (BC_1, *, CONTROL, 0), "&
" 144 (BC_1, IO(17), INPUT, X), "&
" 143 (BC_1, IO(17), OUTPUT3, X, 142, 0, Z), "&
" 142 (BC_1, *, CONTROL, 0), "&
" 141 (BC_1, IO(18), INPUT, X), "&
" 140 (BC_1, IO(18), OUTPUT3, X, 139, 0, Z), "&
" 139 (BC_1, *, CONTROL, 0), "&
" 138 (BC_1, IO(19), INPUT, X), "&
" 137 (BC_1, IO(19), OUTPUT3, X, 136, 0, Z), "&
" 136 (BC_1, *, CONTROL, 0), "&
" 135 (BC_1, IO(20), INPUT, X), "&
" 134 (BC_1, IO(20), OUTPUT3, X, 133, 0, Z), "&
" 133 (BC_1, *, CONTROL, 0), "&
" 132 (BC_1, IO(21), INPUT, X), "&
" 131 (BC_1, IO(21), OUTPUT3, X, 130, 0, Z), "&
" 130 (BC_1, *, CONTROL, 0), "&
" 129 (BC_1, IO(22), INPUT, X), "&
" 128 (BC_1, IO(22), OUTPUT3, X, 127, 0, Z), "&
" 127 (BC_1, *, CONTROL, 0), "&
" 126 (BC_1, IO(23), INPUT, X), "&
" 125 (BC_1, IO(23), OUTPUT3, X, 124, 0, Z), "&
" 124 (BC_1, *, CONTROL, 0), "&
" 123 (BC_1, IO(31), INPUT, X), "&
" 122 (BC_1, IO(31), OUTPUT3, X, 121, 0, Z), "&
" 121 (BC_1, *, CONTROL, 0), "&
" 120 (BC_1, IO(30), INPUT, X), "&
" 119 (BC_1, IO(30), OUTPUT3, X, 118, 0, Z), "&
" 118 (BC_1, *, CONTROL, 0), "&
" 117 (BC_1, IO(29), INPUT, X), "&
" 116 (BC_1, IO(29), OUTPUT3, X, 115, 0, Z), "&
" 115 (BC_1, *, CONTROL, 0), "&
" 114 (BC_1, IO(28), INPUT, X), "&
" 113 (BC_1, IO(28), OUTPUT3, X, 112, 0, Z), "&
" 112 (BC_1, *, CONTROL, 0), "&
" 111 (BC_1, IO(27), INPUT, X), "&
" 110 (BC_1, IO(27), OUTPUT3, X, 109, 0, Z), "&
" 109 (BC_1, *, CONTROL, 0), "&
" 108 (BC_1, IO(26), INPUT, X), "&
" 107 (BC_1, IO(26), OUTPUT3, X, 106, 0, Z), "&
" 106 (BC_1, *, CONTROL, 0), "&
" 105 (BC_1, IO(25), INPUT, X), "&
" 104 (BC_1, IO(25), OUTPUT3, X, 103, 0, Z), "&
" 103 (BC_1, *, CONTROL, 0), "&
" 102 (BC_1, IO(24), INPUT, X), "&
" 101 (BC_1, IO(24), OUTPUT3, X, 100, 0, Z), "&
" 100 (BC_1, *, CONTROL, 0), "&
" 99 (BC_1, DED_IN(2), INPUT, X), "&
" 98 (BC_1, IO(32), INPUT, X), "&
" 97 (BC_1, IO(32), OUTPUT3, X, 96, 0, Z), "&
" 96 (BC_1, *, CONTROL, 0), "&
" 95 (BC_1, IO(33), INPUT, X), "&
" 94 (BC_1, IO(33), OUTPUT3, X, 93, 0, Z), "&
" 93 (BC_1, *, CONTROL, 0), "&
" 92 (BC_1, IO(34), INPUT, X), "&
" 91 (BC_1, IO(34), OUTPUT3, X, 90, 0, Z), "&
" 90 (BC_1, *, CONTROL, 0), "&
" 89 (BC_1, IO(35), INPUT, X), "&
" 88 (BC_1, IO(35), OUTPUT3, X, 87, 0, Z), "&
" 87 (BC_1, *, CONTROL, 0), "&
" 86 (BC_1, IO(36), INPUT, X), "&
" 85 (BC_1, IO(36), OUTPUT3, X, 84, 0, Z), "&
" 84 (BC_1, *, CONTROL, 0), "&
" 83 (BC_1, IO(37), INPUT, X), "&
" 82 (BC_1, IO(37), OUTPUT3, X, 81, 0, Z), "&
" 81 (BC_1, *, CONTROL, 0), "&
" 80 (BC_1, IO(38), INPUT, X), "&
" 79 (BC_1, IO(38), OUTPUT3, X, 78, 0, Z), "&
" 78 (BC_1, *, CONTROL, 0), "&
" 77 (BC_1, IO(39), INPUT, X), "&
" 76 (BC_1, IO(39), OUTPUT3, X, 75, 0, Z), "&
" 75 (BC_1, *, CONTROL, 0), "&
" 74 (BC_1, IO(47), INPUT, X), "&
" 73 (BC_1, IO(47), OUTPUT3, X, 72, 0, Z), "&
" 72 (BC_1, *, CONTROL, 0), "&
" 71 (BC_1, IO(46), INPUT, X), "&
" 70 (BC_1, IO(46), OUTPUT3, X, 69, 0, Z), "&
" 69 (BC_1, *, CONTROL, 0), "&
" 68 (BC_1, IO(45), INPUT, X), "&
" 67 (BC_1, IO(45), OUTPUT3, X, 66, 0, Z), "&
" 66 (BC_1, *, CONTROL, 0), "&
" 65 (BC_1, IO(44), INPUT, X), "&
" 64 (BC_1, IO(44), OUTPUT3, X, 63, 0, Z), "&
" 63 (BC_1, *, CONTROL, 0), "&
" 62 (BC_1, IO(43), INPUT, X), "&
" 61 (BC_1, IO(43), OUTPUT3, X, 60, 0, Z), "&
" 60 (BC_1, *, CONTROL, 0), "&
" 59 (BC_1, IO(42), INPUT, X), "&
" 58 (BC_1, IO(42), OUTPUT3, X, 57, 0, Z), "&
" 57 (BC_1, *, CONTROL, 0), "&
" 56 (BC_1, IO(41), INPUT, X), "&
" 55 (BC_1, IO(41), OUTPUT3, X, 54, 0, Z), "&
" 54 (BC_1, *, CONTROL, 0), "&
" 53 (BC_1, IO(40), INPUT, X), "&
" 52 (BC_1, IO(40), OUTPUT3, X, 51, 0, Z), "&
" 51 (BC_1, *, CONTROL, 0), "&
" 50 (BC_1, DED_IN(3), INPUT, X), "&
" 49 (BC_1, DED_IN(4), INPUT, X), "&
" 48 (BC_1, IO(48), INPUT, X), "&
" 47 (BC_1, IO(48), OUTPUT3, X, 46, 0, Z), "&
" 46 (BC_1, *, CONTROL, 0), "&
" 45 (BC_1, IO(49), INPUT, X), "&
" 44 (BC_1, IO(49), OUTPUT3, X, 43, 0, Z), "&
" 43 (BC_1, *, CONTROL, 0), "&
" 42 (BC_1, IO(50), INPUT, X), "&
" 41 (BC_1, IO(50), OUTPUT3, X, 40, 0, Z), "&
" 40 (BC_1, *, CONTROL, 0), "&
" 39 (BC_1, IO(51), INPUT, X), "&
" 38 (BC_1, IO(51), OUTPUT3, X, 37, 0, Z), "&
" 37 (BC_1, *, CONTROL, 0), "&
" 36 (BC_1, IO(52), INPUT, X), "&
" 35 (BC_1, IO(52), OUTPUT3, X, 34, 0, Z), "&
" 34 (BC_1, *, CONTROL, 0), "&
" 33 (BC_1, IO(53), INPUT, X), "&
" 32 (BC_1, IO(53), OUTPUT3, X, 31, 0, Z), "&
" 31 (BC_1, *, CONTROL, 0), "&
" 30 (BC_1, IO(54), INPUT, X), "&
" 29 (BC_1, IO(54), OUTPUT3, X, 28, 0, Z), "&
" 28 (BC_1, *, CONTROL, 0), "&
" 27 (BC_1, IO(55), INPUT, X), "&
" 26 (BC_1, IO(55), OUTPUT3, X, 25, 0, Z), "&
" 25 (BC_1, *, CONTROL, 0), "&
" 24 (BC_1, IO(63), INPUT, X), "&
" 23 (BC_1, IO(63), OUTPUT3, X, 22, 0, Z), "&
" 22 (BC_1, *, CONTROL, 0), "&
" 21 (BC_1, IO(62), INPUT, X), "&
" 20 (BC_1, IO(62), OUTPUT3, X, 19, 0, Z), "&
" 19 (BC_1, *, CONTROL, 0), "&
" 18 (BC_1, IO(61), INPUT, X), "&
" 17 (BC_1, IO(61), OUTPUT3, X, 16, 0, Z), "&
" 16 (BC_1, *, CONTROL, 0), "&
" 15 (BC_1, IO(60), INPUT, X), "&
" 14 (BC_1, IO(60), OUTPUT3, X, 13, 0, Z), "&
" 13 (BC_1, *, CONTROL, 0), "&
" 12 (BC_1, IO(59), INPUT, X), "&
" 11 (BC_1, IO(59), OUTPUT3, X, 10, 0, Z), "&
" 10 (BC_1, *, CONTROL, 0), "&
" 9 (BC_1, IO(58), INPUT, X), "&
" 8 (BC_1, IO(58), OUTPUT3, X, 7, 0, Z), "&
" 7 (BC_1, *, CONTROL, 0), "&
" 6 (BC_1, IO(57), INPUT, X), "&
" 5 (BC_1, IO(57), OUTPUT3, X, 4, 0, Z), "&
" 4 (BC_1, *, CONTROL, 0), "&
" 3 (BC_1, IO(56), INPUT, X), "&
" 2 (BC_1, IO(56), OUTPUT3, X, 1, 0, Z), "&
" 1 (BC_1, *, CONTROL, 0), "&
" 0 (BC_1, DED_IN(5), INPUT, X)";
-- ******************************************************************
-- * IEEE 1532 EXTENSION INFORMATION *
-- ******************************************************************
attribute ISC_PIN_BEHAVIOR of M4A5_128_64_XXVC : entity is
"CLAMP"; -- clamp behavior
attribute ISC_STATUS of M4A5_128_64_XXVC : entity is
"NOT IMPLEMENTED";
attribute ISC_BLANK_USERCODE of M4A5_128_64_XXVC : entity is
"11111111111111111111111111111111";
attribute ISC_FLOW of M4A5_128_64_XXVC : entity is
"flow_verify(idcode) "&
"initialize "&
"(IDCODE WAIT TCK 3, 2.0E-3 32:2756A157*0FFFFFFF), "&
"flow_enable "&
"initialize "&
"(ISC_ENABLE 5:8 WAIT TCK 3), "&
"flow_bypass "&
"initialize "&
"(BYPASS WAIT TCK 1), "&
"flow_erase "&
"initialize "&
"(ISC_ERASE WAIT TCK 3, 100.0e-3), "&
"flow_erase_program "&
"initialize "&
"(ISC_ADDRESS_SHIFT 80:0 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:0 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 100.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr=80000000000000000000 WAIT TCK 1)"&
"repeat 66 "&
"(ISC_DATA_SHIFT 792:FFF7FEFFDFFBFF7FEFFDFFBFFFFEFFDFFBFF7FEFF"&
"DFFBFF7FFFFDFFBFF7FEFFDFFBFF7FEFFFFFBFF7FEFFDFFBFF7FEFFDFFFFF"&
"7FEFFDFFBFF7FEFFDFFBFFFFEFFDFFBFF7FEFFDFFBFF7FFFFDFFBFF7FEFFD"&
"FFBFF7FEFFFFFBFF7FEFFDFFBFF7FEFFDFF WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"terminate "&
"(ISC_DATA_SHIFT 792:$epgm1=0300600C0180300600C0180000600C0180"&
"300600C0180300000C0180300600C018030060000180300600C0180300600"&
"C0000300600C0180300600C0180000600C0180300600C0180300000C01803"&
"00600C018030060000180300600C0180300600C000 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$epgm2=0300600C0180300600C0180020600C0180"&
"300600C0180300040C0180300600C018030060008180300600C0180300600"&
"C0010300600C0180300600C0180020600C0180300600C0180300040C01803"&
"00600C018030060008180300600C0180300600C001 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$epgm2 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$epgm2 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$epgm2 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$epgm1 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_ENABLE 5:9 WAIT TCK 3) "&
"(ISC_DATA_SHIFT 792:80080100200400801002004010010020040080100"&
"2004008020020040080100200400801004004008010020040080100200800"&
"8010020040080100200401001002004008010020040080200200400801002"&
"00400801004004008010020040080100200 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ENABLE 5:8 WAIT TCK 3), "&
"flow_preload "&
"initialize "&
"(SAMPLE 198:0 WAIT TCK 1), "&
"flow_program_init "&
"initialize "&
"(ISC_ADDRESS_SHIFT 80:0 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:0 WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 100.0e-3), "&
"flow_program(array) "&
"initialize "&
"(ISC_ADDRESS_SHIFT 80:$addr=80000000000000000000 WAIT TCK 1)"&
"repeat 80 "&
"(ISC_DATA_SHIFT 792:? WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"terminate "&
"(ISC_ADDRESS_SHIFT 80:0 WAIT TCK 1) "&
"(ISC_ENABLE 5:9 WAIT TCK 3) "&
"(ISC_DATA_SHIFT 792:? WAIT TCK 1) "&
"(ISC_PROGRAM WAIT TCK 3, 50.0e-3) "&
"(ISC_ENABLE 5:8 WAIT TCK 3), "&
"flow_read_init "&
"initialize "&
"(ISC_ADDRESS_SHIFT 80:0 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:0 WAIT TCK 1), "&
"flow_verify(array_tdo) "&
"initialize "&
"(ISC_ADDRESS_SHIFT 80:$addr=80000000000000000000 WAIT TCK 1)"&
"repeat 1 "&
"(ISC_DATA_SHIFT 792:$adsel=80000000000000000000000000000000"&
"0000000000000000000000000000000000000000000000000000000000000"&
"0000000000000000000000000000000000000000000000000000000000000"&
"00000000000000000000000000000000000000000000 WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:?:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1=000210420841082104"&
"20841080004208410821042084108210000841082104208410821042000"&
"10821042084108210420840002104208410821042084108000420841082"&
"10420841082100008410821042084108210420001082104208410821042"&
"084:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em2=80021042084108210420"&
"8410900042084108210420841082120008410821042084108210424001082"&
"1042084108210420848002104208410821042084109000420841082104208"&
"41082120008410821042084108210424001082104208410821042084:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em2:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em2:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em2:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:?*$em1:CRC)"&
"terminate "&
"(ISC_ADDRESS_SHIFT 80:0 WAIT TCK 1) "&
"(ISC_ENABLE 5:9 WAIT TCK 3) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:?*0040080100200400801002002"&
"0080100200400801002004004010020040080100200400800802004008010"&
"0200400801001004008010020040080100200200801002004008010020040"&
"060100200400801002004008008020040080100200400801001:CRC) "&
"(ISC_ENABLE 5:8 WAIT TCK 3), "&
"flow_verify(usercode) "&
"initialize "&
"(USERCODE WAIT TCK 3, 2.0E-3 32:?), "&
"flow_read(array_tdo) Unprocessed "&
"initialize "&
"(ISC_ADDRESS_SHIFT 80:$addr=80000000000000000000 WAIT TCK 1)"&
"repeat 1 "&
"(ISC_DATA_SHIFT 792:$adsel=80000000000000000000000000000000"&
"0000000000000000000000000000000000000000000000000000000000000"&
"0000000000000000000000000000000000000000000000000000000000000"&
"00000000000000000000000000000000000000000000 WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, "&
"2.0E-3 792:!:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1=00021042084108210420"&
"8410800042084108210420841082100008410821042084108210420001082"&
"1042084108210420840002104208410821042084108000420841082104208"&
"41082100008410821042084108210420001082104208410821042084:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em2=800210420841082104208"&
"41090004208410821042084108212000841082104208410821042400108210"&
"42084108210420848002104208410821042084109000420841082104208410"&
"82120008410821042084108210424001082104208410821042084:CRC) "&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em2:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em2:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em2:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"&
"(ISC_ADDRESS_SHIFT 80:$addr>>1 WAIT TCK 1) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:*!$em1:CRC)"&
"terminate "&
"(ISC_ADDRESS_SHIFT 80:0 WAIT TCK 1) "&
"(ISC_ENABLE 5:9 WAIT TCK 3) "&
"(ISC_DATA_SHIFT 792:$adsel WAIT TCK 1) "&
"(ISC_READ WAIT TCK 3, 2.0E-3 792:*!0040080100200400801002002"&
"0080100200400801002004004010020040080100200400800802004008010"&
"0200400801001004008010020040080100200200801002004008010020040"&
"060100200400801002004008008020040080100200400801001:CRC) "&
"(ISC_ENABLE 5:8 WAIT TCK 3), "&
"flow_read(usercode) Unprocessed "&
"initialize "&
"(USERCODE WAIT TCK 3, 2.0E-3 32:!), "&
"flow_program_done "&
"initialize "&
"(ISC_NOOP WAIT TCK 1), "&
"flow_program_security "&
"initialize "&
"(ISC_PROGRAM_SECURITY WAIT TCK 3, 50.0e-3), "&
"flow_disable "&
"initialize "&
"(ISC_ENABLE 5:C WAIT TCK 3) "&
"(ISC_DISABLE WAIT TCK 3)";
attribute ISC_PROCEDURE of M4A5_128_64_XXVC : entity is
"proc_verify(idcode) = (flow_verify(idcode)), "&
"proc_enable = (flow_enable), "&
"proc_disable = (flow_disable), "&
"proc_program_init = (flow_program_init), "&
"proc_program(array) = (flow_program(array)), "&
"proc_read_init = (flow_read_init), "&
"proc_verify(array) = (flow_verify(array_tdo)), "&
"proc_verify(usercode) = (flow_verify(usercode)), "&
"proc_erase = (flow_erase), "&
"proc_erase_program = (flow_erase_program), "&
"proc_read(array) = (flow_read(array_tdo)), "&
"proc_read(usercode) = (flow_read(usercode)), "&
"proc_error_exit = (flow_disable), "&
"proc_preload = (flow_preload), "&
"proc_program_done = (flow_program_done), "&
"proc_program_security = (flow_program_security)";
attribute ISC_ACTION of M4A5_128_64_XXVC : entity is
"erase = ( proc_verify(idcode) recommended, "&
"proc_preload recommended, "&
"proc_enable, "&
"proc_erase, "&
"proc_erase_program, "&
"proc_disable), "&
"program = ( proc_verify(idcode) recommended, "&
"proc_preload recommended, "&
"proc_enable, "&
"proc_erase, "&
"proc_program_init, "&
"proc_program(array), "&
"proc_read_init, "&
"proc_verify(array) proprietary, "&
"proc_program_security optional, "&
"proc_program_done, "&
"proc_disable, "&
"proc_verify(usercode)), "&
"verify = ( proc_verify(idcode) recommended, "&
"proc_preload recommended, "&
"proc_enable, "&
"proc_read_init, "&
"proc_verify(array) proprietary, "&
"proc_disable, "&
"proc_verify(usercode)), "&
"read = ( proc_verify(idcode) recommended, "&
"proc_preload recommended, "&
"proc_enable, "&
"proc_read_init, "&
"proc_read(array) proprietary, "&
"proc_read(usercode), "&
"proc_disable), "&
"verify_idcode = ( proc_verify(idcode)), "&
"secure = ( proc_verify(idcode) recommended, "&
"proc_preload recommended, "&
"proc_enable, "&
"proc_program_security, "&
"proc_disable)";
end M4A5_128_64_XXVC;
Reference in New Issue View Git Blame Copy Permalink