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68030tk/Logic/68030_tk.out

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127 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 350 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 358 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
8 IPL_030_2_ 0 1 0 8 -1 10 0 21
7 IPL_030_0_ 0 1 0 7 -1 10 0 21
6 IPL_030_1_ 0 1 0 6 -1 10 0 21
82 BGACK_030 0 7 0 82 -1 4 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
68 A_0_ 5 353 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
28 BG_000 0 3 0 28 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
352 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 4 0 21
316 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
311 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
295 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 -1 2 3 6 -1 -1 4 0 21
317 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
312 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 -1 2 4 7 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 1 1 21
347 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 13 1 21
355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
303 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21
302 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21
300 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 7 0 21
333 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 5 0 21
356 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
332 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
357 RN_VMA 3 34 3 1 3 34 -1 3 0 21
353 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
351 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
343 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
336 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
335 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
334 inst_BGACK_000_SAMPLE 3 -1 -1 1 7 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
358 RN_RW 3 70 6 1 6 70 -1 2 0 21
348 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
341 inst_BG_000_PRE 3 -1 -1 1 3 -1 -1 2 0 21
331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 1 3 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
330 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
321 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
320 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21
319 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21
314 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
313 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
342 inst_CLK_030_H 3 -1 -1 0 -1 -1 8 0 21
346 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
345 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 1 21
338 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
344 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
337 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
340 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
339 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
329 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
328 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
327 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
326 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
325 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
324 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
323 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
322 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
318 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
315 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 4 0 4 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
59 A_1_ 1 -1 -1 0 59 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
20 BG_030 1 -1 -1 0 20 -1
10 CLK_000 1 -1 -1 0 10 -1
157 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 2 4 6 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
79 RW_000 5 380 7 3 1 4 6 79 -1 3 0 21
70 RW 5 388 6 2 6 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 383 6 1 2 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 382 7 0 82 -1 3 0 21
34 VMA 5 387 3 0 34 -1 3 0 21
28 BG_000 5 381 3 0 28 -1 3 0 21
8 IPL_030_2_ 5 379 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 385 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 384 1 0 6 -1 3 0 21
80 DSACK1 5 386 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
382 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
339 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21
340 CLK_000_D_0_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21
335 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21
316 inst_AS_030_D0 3 -1 7 5 0 2 4 5 7 -1 -1 1 0 21
364 SM_AMIGA_6_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21
377 SM_AMIGA_i_7_ 3 -1 2 3 0 5 7 -1 -1 3 0 21
373 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
367 SM_AMIGA_4_ 3 -1 2 3 2 5 6 -1 -1 3 0 21
363 inst_BGACK_000_SAMPLE 3 -1 7 3 0 2 7 -1 -1 3 0 21
313 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 0 21
312 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 3 0 21
310 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21
317 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 2 0 21
351 N_175_i_0_i_i 3 -1 7 3 5 6 7 -1 -1 1 0 21
344 IPL_D0_0_ 3 -1 5 3 0 1 3 -1 -1 1 0 21
318 inst_BGACK_030_INT_D 3 -1 7 3 0 1 6 -1 -1 1 0 21
387 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
376 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21
374 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21
370 RST_DLY_2_ 3 -1 0 2 0 3 -1 -1 3 0 21
366 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21
361 inst_BGACK_030_INT_PRE 3 -1 0 2 0 2 -1 -1 3 0 21
332 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
328 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
326 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
311 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21
375 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 2 0 21
371 inst_BG_000_PRE 3 -1 2 2 2 3 -1 -1 2 0 21
365 N_249_i 3 -1 2 2 1 3 -1 -1 2 0 21
360 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 2 0 21
359 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21
331 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
321 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 2 0 21
319 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 2 0 21
315 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
314 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
308 N_194_i 3 -1 5 2 0 2 -1 -1 2 0 21
347 CLK_000_D_2_ 3 -1 7 2 4 5 -1 -1 1 0 21
346 IPL_D0_2_ 3 -1 2 2 1 2 -1 -1 1 0 21
345 IPL_D0_1_ 3 -1 6 2 1 3 -1 -1 1 0 21
337 CLK_000_D_11_ 3 -1 3 2 1 3 -1 -1 1 0 21
336 CLK_000_D_10_ 3 -1 7 2 1 3 -1 -1 1 0 21
333 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21
385 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
384 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
383 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
381 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
380 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
379 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
369 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21
342 N_154_0 3 -1 6 1 5 -1 -1 3 0 21
334 N_159_0 3 -1 1 1 7 -1 -1 3 0 21
324 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21
323 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 3 0 21
309 N_190_i 3 -1 5 1 2 -1 -1 3 0 21
300 cpu_est_2_2__n 3 -1 3 1 3 -1 -1 3 0 21
293 N_258 3 -1 0 1 0 -1 -1 3 0 21
388 RN_RW 3 70 6 1 6 70 -1 2 0 21
386 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
378 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
372 inst_CLK_030_H 3 -1 1 1 1 -1 -1 2 0 21
368 RST_DLY_0_ 3 -1 0 1 0 -1 -1 2 0 21
362 N_247_i 3 -1 0 1 1 -1 -1 2 0 21
343 bgack_030_int_pre_0_un1_n 3 -1 0 1 0 -1 -1 2 0 21
327 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 6 1 1 -1 -1 2 0 21
322 ds_000_dma_0_un1_n 3 -1 1 1 6 -1 -1 2 0 21
320 ds_000_dma_0_un3_n 3 -1 1 1 6 -1 -1 2 0 21
307 N_192_i 3 -1 5 1 2 -1 -1 2 0 21
306 vma_int_0_un3_n 3 -1 5 1 3 -1 -1 2 0 21
305 N_195_i 3 -1 7 1 2 -1 -1 2 0 21
303 cpu_est_2_1__n 3 -1 5 1 6 -1 -1 2 0 21
302 N_200_i 3 -1 3 1 0 -1 -1 2 0 21
301 ipl_030_0_2__un1_n 3 -1 1 1 1 -1 -1 2 0 21
299 N_294 3 -1 5 1 3 -1 -1 2 0 21
298 ipl_030_0_1__un1_n 3 -1 3 1 1 -1 -1 2 0 21
296 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
295 N_179_0 3 -1 5 1 2 -1 -1 2 0 21
358 CLK_000_D_12_ 3 -1 3 1 1 -1 -1 1 0 21
357 CLK_000_D_9_ 3 -1 0 1 7 -1 -1 1 0 21
356 CLK_000_D_8_ 3 -1 4 1 0 -1 -1 1 0 21
355 CLK_000_D_7_ 3 -1 5 1 4 -1 -1 1 0 21
354 CLK_000_D_6_ 3 -1 3 1 5 -1 -1 1 0 21
353 CLK_000_D_5_ 3 -1 5 1 3 -1 -1 1 0 21
352 bgack_030_int_0_un1_n 3 -1 2 1 7 -1 -1 1 0 21
350 CLK_000_D_4_ 3 -1 0 1 5 -1 -1 1 0 21
349 N_257_i 3 -1 6 1 6 -1 -1 1 0 21
348 CLK_000_D_3_ 3 -1 4 1 0 -1 -1 1 0 21
341 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
338 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21
330 inst_VPA_D 3 -1 3 1 5 -1 -1 1 0 21
329 N_147_i 3 -1 4 1 0 -1 -1 1 0 21
325 pos_clk_un3_as_030_d0_0_n 3 -1 7 1 5 -1 -1 1 0 21
304 N_196_i 3 -1 5 1 2 -1 -1 1 0 21
297 N_204_i 3 -1 0 1 0 -1 -1 1 0 21
294 N_267 3 -1 0 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 4 5 6 7 13 -1
66 IPL_0_ 1 -1 -1 4 0 1 3 5 66 -1
27 BGACK_000 1 -1 -1 4 0 2 4 7 27 -1
55 IPL_1_ 1 -1 -1 3 1 3 6 55 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 2 67 -1
59 A_1_ 1 -1 -1 2 1 6 59 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
63 CLK_030 1 -1 -1 1 1 63 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 3 29 -1
20 BG_030 1 -1 -1 1 2 20 -1
10 CLK_000 1 -1 -1 1 4 10 -1
157 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 2 4 6 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
79 RW_000 5 380 7 3 1 4 6 79 -1 3 0 21
70 RW 5 388 6 2 6 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 383 6 1 2 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 382 7 0 82 -1 3 0 21
34 VMA 5 387 3 0 34 -1 3 0 21
28 BG_000 5 381 3 0 28 -1 3 0 21
8 IPL_030_2_ 5 379 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 385 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 384 1 0 6 -1 3 0 21
80 DSACK1 5 386 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
382 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
339 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21
340 CLK_000_D_0_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21
335 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21
316 inst_AS_030_D0 3 -1 7 5 0 2 4 5 7 -1 -1 1 0 21
364 SM_AMIGA_6_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21
377 SM_AMIGA_i_7_ 3 -1 2 3 0 5 7 -1 -1 3 0 21
373 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
367 SM_AMIGA_4_ 3 -1 2 3 2 5 6 -1 -1 3 0 21
363 inst_BGACK_000_SAMPLE 3 -1 7 3 0 2 7 -1 -1 3 0 21
313 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 0 21
312 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 3 0 21
310 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21
317 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 2 0 21
351 N_175_i_0_i_i 3 -1 7 3 5 6 7 -1 -1 1 0 21
344 IPL_D0_0_ 3 -1 5 3 0 1 3 -1 -1 1 0 21
318 inst_BGACK_030_INT_D 3 -1 7 3 0 1 6 -1 -1 1 0 21
387 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
376 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21
374 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21
370 RST_DLY_2_ 3 -1 0 2 0 3 -1 -1 3 0 21
366 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21
361 inst_BGACK_030_INT_PRE 3 -1 0 2 0 2 -1 -1 3 0 21
332 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
328 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
326 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
311 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21
375 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 2 0 21
371 inst_BG_000_PRE 3 -1 2 2 2 3 -1 -1 2 0 21
365 N_249_i 3 -1 2 2 1 3 -1 -1 2 0 21
360 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 2 0 21
359 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21
331 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
321 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 2 0 21
319 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 2 0 21
315 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
314 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
308 N_194_i 3 -1 5 2 0 2 -1 -1 2 0 21
347 CLK_000_D_2_ 3 -1 7 2 4 5 -1 -1 1 0 21
346 IPL_D0_2_ 3 -1 2 2 1 2 -1 -1 1 0 21
345 IPL_D0_1_ 3 -1 6 2 1 3 -1 -1 1 0 21
337 CLK_000_D_11_ 3 -1 3 2 1 3 -1 -1 1 0 21
336 CLK_000_D_10_ 3 -1 7 2 1 3 -1 -1 1 0 21
333 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21
385 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
384 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
383 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
381 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
380 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
379 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
369 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21
342 N_154_0 3 -1 6 1 5 -1 -1 3 0 21
334 N_159_0 3 -1 1 1 7 -1 -1 3 0 21
324 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21
323 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 3 0 21
309 N_190_i 3 -1 5 1 2 -1 -1 3 0 21
300 cpu_est_2_2__n 3 -1 3 1 3 -1 -1 3 0 21
293 N_258 3 -1 0 1 0 -1 -1 3 0 21
388 RN_RW 3 70 6 1 6 70 -1 2 0 21
386 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
378 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
372 inst_CLK_030_H 3 -1 1 1 1 -1 -1 2 0 21
368 RST_DLY_0_ 3 -1 0 1 0 -1 -1 2 0 21
362 N_247_i 3 -1 0 1 1 -1 -1 2 0 21
343 bgack_030_int_pre_0_un1_n 3 -1 0 1 0 -1 -1 2 0 21
327 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 6 1 1 -1 -1 2 0 21
322 ds_000_dma_0_un1_n 3 -1 1 1 6 -1 -1 2 0 21
320 ds_000_dma_0_un3_n 3 -1 1 1 6 -1 -1 2 0 21
307 N_192_i 3 -1 5 1 2 -1 -1 2 0 21
306 vma_int_0_un3_n 3 -1 5 1 3 -1 -1 2 0 21
305 N_195_i 3 -1 7 1 2 -1 -1 2 0 21
303 cpu_est_2_1__n 3 -1 5 1 6 -1 -1 2 0 21
302 N_200_i 3 -1 3 1 0 -1 -1 2 0 21
301 ipl_030_0_2__un1_n 3 -1 1 1 1 -1 -1 2 0 21
299 N_294 3 -1 5 1 3 -1 -1 2 0 21
298 ipl_030_0_1__un1_n 3 -1 3 1 1 -1 -1 2 0 21
296 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
295 N_179_0 3 -1 5 1 2 -1 -1 2 0 21
358 CLK_000_D_12_ 3 -1 3 1 1 -1 -1 1 0 21
357 CLK_000_D_9_ 3 -1 0 1 7 -1 -1 1 0 21
356 CLK_000_D_8_ 3 -1 4 1 0 -1 -1 1 0 21
355 CLK_000_D_7_ 3 -1 5 1 4 -1 -1 1 0 21
354 CLK_000_D_6_ 3 -1 3 1 5 -1 -1 1 0 21
353 CLK_000_D_5_ 3 -1 5 1 3 -1 -1 1 0 21
352 bgack_030_int_0_un1_n 3 -1 2 1 7 -1 -1 1 0 21
350 CLK_000_D_4_ 3 -1 0 1 5 -1 -1 1 0 21
349 N_257_i 3 -1 6 1 6 -1 -1 1 0 21
348 CLK_000_D_3_ 3 -1 4 1 0 -1 -1 1 0 21
341 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
338 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21
330 inst_VPA_D 3 -1 3 1 5 -1 -1 1 0 21
329 N_147_i 3 -1 4 1 0 -1 -1 1 0 21
325 pos_clk_un3_as_030_d0_0_n 3 -1 7 1 5 -1 -1 1 0 21
304 N_196_i 3 -1 5 1 2 -1 -1 1 0 21
297 N_204_i 3 -1 0 1 0 -1 -1 1 0 21
294 N_267 3 -1 0 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 4 5 6 7 13 -1
66 IPL_0_ 1 -1 -1 4 0 1 3 5 66 -1
27 BGACK_000 1 -1 -1 4 0 2 4 7 27 -1
55 IPL_1_ 1 -1 -1 3 1 3 6 55 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 2 67 -1
59 A_1_ 1 -1 -1 2 1 6 59 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
63 CLK_030 1 -1 -1 1 1 63 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 3 29 -1
20 BG_030 1 -1 -1 1 2 20 -1
10 CLK_000 1 -1 -1 1 4 10 -1
144 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 367 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 375 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
8 IPL_030_2_ 0 1 0 8 -1 4 0 21
6 IPL_030_1_ 0 1 0 6 -1 4 0 21
82 BGACK_030 0 7 0 82 -1 3 0 21
68 A_0_ 5 370 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
28 BG_000 0 3 0 28 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
7 IPL_030_0_ 0 1 0 7 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
369 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21
330 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
325 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
331 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
326 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
311 inst_AS_030_D0 3 -1 -1 2 4 7 -1 -1 1 0 21
373 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
371 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
367 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
364 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 4 0 21
348 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
315 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
308 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21
307 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
305 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21
299 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
298 ipl_030_0_1__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
297 ipl_030_0_0__un1_n 3 -1 -1 1 1 -1 -1 4 0 21
296 ipl_030_0_0__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
374 RN_VMA 3 34 3 1 3 34 -1 3 0 21
370 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
368 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
360 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
353 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
352 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
351 inst_BGACK_000_SAMPLE 3 -1 -1 1 7 -1 -1 3 0 21
324 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
320 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
318 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
306 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
375 RN_RW 3 70 6 1 6 70 -1 2 0 21
372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
365 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
358 inst_BG_000_PRE 3 -1 -1 1 3 -1 -1 2 0 21
350 N_247_i 3 -1 -1 1 1 -1 -1 2 0 21
323 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
314 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21
309 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
346 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
340 bgack_030_int_0_un1_n 3 -1 -1 1 7 -1 -1 1 0 21
336 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
335 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21
328 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
327 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
322 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
313 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
301 vma_int_0_un1_n 3 -1 -1 1 3 -1 -1 1 0 21
363 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
362 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
355 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
349 inst_BGACK_030_INT_PRE 3 -1 -1 0 -1 -1 4 0 21
319 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 -1 0 -1 -1 4 0 21
317 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
304 N_190_i 3 -1 -1 0 -1 -1 4 0 21
361 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
356 RST_DLY_1_ 3 -1 -1 0 -1 -1 3 0 21
354 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
316 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
294 N_258 3 -1 -1 0 -1 -1 3 0 21
359 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
357 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
332 bgack_030_int_pre_0_un3_n 3 -1 -1 0 -1 -1 2 0 21
312 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21
310 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
303 N_194_i 3 -1 -1 0 -1 -1 2 0 21
302 N_192_i 3 -1 -1 0 -1 -1 2 0 21
295 N_365_i 3 -1 -1 0 -1 -1 2 0 21
345 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
344 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
343 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
342 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
341 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
339 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
338 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
337 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
334 IPL_D0_0_ 3 -1 -1 0 -1 -1 1 0 21
333 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
329 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
321 N_147_i 3 -1 -1 0 -1 -1 1 0 21
300 N_196_i 3 -1 -1 0 -1 -1 1 0 21
293 N_163_i 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 4 0 4 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
63 CLK_030 1 -1 -1 1 7 63 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
66 IPL_0_ 1 -1 -1 0 66 -1
59 A_1_ 1 -1 -1 0 59 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
20 BG_030 1 -1 -1 0 20 -1
10 CLK_000 1 -1 -1 0 10 -1
144 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 367 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 375 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
8 IPL_030_2_ 0 1 0 8 -1 4 0 21
6 IPL_030_1_ 0 1 0 6 -1 4 0 21
82 BGACK_030 0 7 0 82 -1 3 0 21
68 A_0_ 5 370 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
28 BG_000 0 3 0 28 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
7 IPL_030_0_ 0 1 0 7 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
369 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21
330 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
325 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
331 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
326 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
311 inst_AS_030_D0 3 -1 -1 2 4 7 -1 -1 1 0 21
373 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
371 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
367 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
364 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 4 0 21
348 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
315 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
308 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21
307 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
305 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21
299 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
298 ipl_030_0_1__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
297 ipl_030_0_0__un1_n 3 -1 -1 1 1 -1 -1 4 0 21
296 ipl_030_0_0__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
374 RN_VMA 3 34 3 1 3 34 -1 3 0 21
370 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
368 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
360 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
353 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
352 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
351 inst_BGACK_000_SAMPLE 3 -1 -1 1 7 -1 -1 3 0 21
324 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
320 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
318 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
306 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
375 RN_RW 3 70 6 1 6 70 -1 2 0 21
372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
365 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
358 inst_BG_000_PRE 3 -1 -1 1 3 -1 -1 2 0 21
350 N_247_i 3 -1 -1 1 1 -1 -1 2 0 21
323 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
314 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21
309 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
301 vma_int_0_un1_n 3 -1 -1 1 3 -1 -1 2 0 21
346 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
340 bgack_030_int_0_un1_n 3 -1 -1 1 7 -1 -1 1 0 21
336 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
335 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21
328 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
327 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
322 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
313 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
293 N_163_i 3 -1 -1 1 3 -1 -1 1 0 21
362 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
357 RST_DLY_2_ 3 -1 -1 0 -1 -1 4 0 21
349 inst_BGACK_030_INT_PRE 3 -1 -1 0 -1 -1 4 0 21
319 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 -1 0 -1 -1 4 0 21
317 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
304 N_190_i 3 -1 -1 0 -1 -1 4 0 21
363 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
361 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
356 RST_DLY_1_ 3 -1 -1 0 -1 -1 3 0 21
354 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
316 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
294 N_258 3 -1 -1 0 -1 -1 3 0 21
359 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
355 RST_DLY_0_ 3 -1 -1 0 -1 -1 2 0 21
347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
332 bgack_030_int_pre_0_un3_n 3 -1 -1 0 -1 -1 2 0 21
312 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21
310 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
302 N_192_i 3 -1 -1 0 -1 -1 2 0 21
295 N_365_i 3 -1 -1 0 -1 -1 2 0 21
345 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
344 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
343 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
342 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
341 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
339 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
338 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
337 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
334 IPL_D0_0_ 3 -1 -1 0 -1 -1 1 0 21
333 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
329 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
321 N_147_i 3 -1 -1 0 -1 -1 1 0 21
303 N_194_i 3 -1 -1 0 -1 -1 1 0 21
300 N_196_i 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 4 0 4 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
63 CLK_030 1 -1 -1 1 7 63 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
66 IPL_0_ 1 -1 -1 0 66 -1
59 A_1_ 1 -1 -1 0 59 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
20 BG_030 1 -1 -1 0 20 -1
10 CLK_000 1 -1 -1 0 10 -1
129 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 352 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 360 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
82 BGACK_030 0 7 0 82 -1 4 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
68 A_0_ 5 355 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
28 BG_000 0 3 0 28 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
8 IPL_030_2_ 0 1 0 8 -1 2 0 21
7 IPL_030_0_ 0 1 0 7 -1 2 0 21
6 IPL_030_1_ 0 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
354 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 4 0 21
317 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
312 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
318 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
313 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 -1 2 4 7 -1 -1 1 0 21
349 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 13 1 21
333 pos_clk_ipl_n 3 -1 -1 1 1 -1 -1 6 0 21
335 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 5 0 21
358 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
352 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
334 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
303 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
295 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21
359 RN_VMA 3 34 3 1 3 34 -1 3 0 21
355 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
353 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
345 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
338 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
337 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
336 inst_BGACK_000_SAMPLE 3 -1 -1 1 7 -1 -1 3 0 21
311 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
360 RN_RW 3 70 6 1 6 70 -1 2 0 21
357 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
356 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
351 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
350 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
343 inst_BG_000_PRE 3 -1 -1 1 3 -1 -1 2 0 21
310 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
302 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
331 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
315 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
314 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
309 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21
300 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
348 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
347 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 1 21
340 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
307 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 -1 0 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
346 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
339 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
344 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
342 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
341 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21
332 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
330 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
329 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
328 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
327 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
326 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
325 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
324 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
323 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
322 IPL_D0_2_ 3 -1 -1 0 -1 -1 1 0 21
321 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21
320 IPL_D0_0_ 3 -1 -1 0 -1 -1 1 0 21
319 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
316 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 4 0 4 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
59 A_1_ 1 -1 -1 0 59 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
20 BG_030 1 -1 -1 0 20 -1
10 CLK_000 1 -1 -1 0 10 -1
129 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 352 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 360 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
82 BGACK_030 0 7 0 82 -1 4 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
68 A_0_ 5 355 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
28 BG_000 0 3 0 28 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
8 IPL_030_2_ 0 1 0 8 -1 2 0 21
7 IPL_030_0_ 0 1 0 7 -1 2 0 21
6 IPL_030_1_ 0 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
354 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 4 0 21
317 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
312 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
318 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
313 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 -1 2 4 7 -1 -1 1 0 21
349 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 13 1 21
333 pos_clk_ipl_n 3 -1 -1 1 1 -1 -1 6 0 21
335 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 5 0 21
358 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
352 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
334 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
303 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
295 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21
359 RN_VMA 3 34 3 1 3 34 -1 3 0 21
355 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
353 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
345 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
338 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
337 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
336 inst_BGACK_000_SAMPLE 3 -1 -1 1 7 -1 -1 3 0 21
311 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
360 RN_RW 3 70 6 1 6 70 -1 2 0 21
357 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
356 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
351 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
350 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
343 inst_BG_000_PRE 3 -1 -1 1 3 -1 -1 2 0 21
310 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
302 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
331 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
315 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
314 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
309 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21
300 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
348 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
347 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 1 21
340 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
307 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 -1 0 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
346 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
339 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
344 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
342 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
341 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21
332 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
330 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
329 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
328 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
327 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
326 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
325 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
324 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
323 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
322 IPL_D0_2_ 3 -1 -1 0 -1 -1 1 0 21
321 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21
320 IPL_D0_0_ 3 -1 -1 0 -1 -1 1 0 21
319 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
316 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 4 0 4 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
59 A_1_ 1 -1 -1 0 59 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
20 BG_030 1 -1 -1 0 20 -1
10 CLK_000 1 -1 -1 0 10 -1
157 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 2 4 6 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
79 RW_000 5 380 7 3 1 4 6 79 -1 3 0 21
70 RW 5 388 6 2 6 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 383 6 1 2 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 382 7 0 82 -1 3 0 21
34 VMA 5 387 3 0 34 -1 3 0 21
28 BG_000 5 381 3 0 28 -1 3 0 21
8 IPL_030_2_ 5 379 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 385 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 384 1 0 6 -1 3 0 21
80 DSACK1 5 386 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
382 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
339 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21
340 CLK_000_D_0_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21
335 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21
316 inst_AS_030_D0 3 -1 7 5 0 2 4 5 7 -1 -1 1 0 21
364 SM_AMIGA_6_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21
377 SM_AMIGA_i_7_ 3 -1 2 3 0 5 7 -1 -1 3 0 21
373 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
367 SM_AMIGA_4_ 3 -1 2 3 2 5 6 -1 -1 3 0 21
363 inst_BGACK_000_SAMPLE 3 -1 7 3 0 2 7 -1 -1 3 0 21
313 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 0 21
312 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 3 0 21
310 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21
317 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 2 0 21
351 N_175_i_0_i_i 3 -1 7 3 5 6 7 -1 -1 1 0 21
344 IPL_D0_0_ 3 -1 5 3 0 1 3 -1 -1 1 0 21
318 inst_BGACK_030_INT_D 3 -1 7 3 0 1 6 -1 -1 1 0 21
387 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
376 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21
374 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21
370 RST_DLY_2_ 3 -1 0 2 0 3 -1 -1 3 0 21
366 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21
361 inst_BGACK_030_INT_PRE 3 -1 0 2 0 2 -1 -1 3 0 21
332 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
328 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
326 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
311 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21
375 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 2 0 21
371 inst_BG_000_PRE 3 -1 2 2 2 3 -1 -1 2 0 21
365 N_249_i 3 -1 2 2 1 3 -1 -1 2 0 21
360 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 2 0 21
359 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21
331 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
321 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 2 0 21
319 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 2 0 21
315 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
314 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
308 N_194_i 3 -1 5 2 0 2 -1 -1 2 0 21
347 CLK_000_D_2_ 3 -1 7 2 4 5 -1 -1 1 0 21
346 IPL_D0_2_ 3 -1 2 2 1 2 -1 -1 1 0 21
345 IPL_D0_1_ 3 -1 6 2 1 3 -1 -1 1 0 21
337 CLK_000_D_11_ 3 -1 3 2 1 3 -1 -1 1 0 21
336 CLK_000_D_10_ 3 -1 7 2 1 3 -1 -1 1 0 21
333 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21
385 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
384 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
383 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
381 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
380 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
379 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
369 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21
342 N_154_0 3 -1 6 1 5 -1 -1 3 0 21
334 N_159_0 3 -1 1 1 7 -1 -1 3 0 21
324 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21
323 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 3 0 21
309 N_190_i 3 -1 5 1 2 -1 -1 3 0 21
300 cpu_est_2_2__n 3 -1 3 1 3 -1 -1 3 0 21
293 N_258 3 -1 0 1 0 -1 -1 3 0 21
388 RN_RW 3 70 6 1 6 70 -1 2 0 21
386 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
378 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
372 inst_CLK_030_H 3 -1 1 1 1 -1 -1 2 0 21
368 RST_DLY_0_ 3 -1 0 1 0 -1 -1 2 0 21
362 N_247_i 3 -1 0 1 1 -1 -1 2 0 21
343 bgack_030_int_pre_0_un1_n 3 -1 0 1 0 -1 -1 2 0 21
327 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 6 1 1 -1 -1 2 0 21
322 ds_000_dma_0_un1_n 3 -1 1 1 6 -1 -1 2 0 21
320 ds_000_dma_0_un3_n 3 -1 1 1 6 -1 -1 2 0 21
307 N_192_i 3 -1 5 1 2 -1 -1 2 0 21
306 vma_int_0_un3_n 3 -1 5 1 3 -1 -1 2 0 21
305 N_195_i 3 -1 7 1 2 -1 -1 2 0 21
303 cpu_est_2_1__n 3 -1 5 1 6 -1 -1 2 0 21
302 N_200_i 3 -1 3 1 0 -1 -1 2 0 21
301 ipl_030_0_2__un1_n 3 -1 1 1 1 -1 -1 2 0 21
299 N_294 3 -1 5 1 3 -1 -1 2 0 21
298 ipl_030_0_1__un1_n 3 -1 3 1 1 -1 -1 2 0 21
296 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
295 N_179_0 3 -1 5 1 2 -1 -1 2 0 21
358 CLK_000_D_12_ 3 -1 3 1 1 -1 -1 1 0 21
357 CLK_000_D_9_ 3 -1 0 1 7 -1 -1 1 0 21
356 CLK_000_D_8_ 3 -1 4 1 0 -1 -1 1 0 21
355 CLK_000_D_7_ 3 -1 5 1 4 -1 -1 1 0 21
354 CLK_000_D_6_ 3 -1 3 1 5 -1 -1 1 0 21
353 CLK_000_D_5_ 3 -1 5 1 3 -1 -1 1 0 21
352 bgack_030_int_0_un1_n 3 -1 2 1 7 -1 -1 1 0 21
350 CLK_000_D_4_ 3 -1 0 1 5 -1 -1 1 0 21
349 N_257_i 3 -1 6 1 6 -1 -1 1 0 21
348 CLK_000_D_3_ 3 -1 4 1 0 -1 -1 1 0 21
341 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
338 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21
330 inst_VPA_D 3 -1 3 1 5 -1 -1 1 0 21
329 N_147_i 3 -1 4 1 0 -1 -1 1 0 21
325 pos_clk_un3_as_030_d0_0_n 3 -1 7 1 5 -1 -1 1 0 21
304 N_196_i 3 -1 5 1 2 -1 -1 1 0 21
297 N_204_i 3 -1 0 1 0 -1 -1 1 0 21
294 N_267 3 -1 0 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 4 5 6 7 13 -1
66 IPL_0_ 1 -1 -1 4 0 1 3 5 66 -1
27 BGACK_000 1 -1 -1 4 0 2 4 7 27 -1
55 IPL_1_ 1 -1 -1 3 1 3 6 55 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 2 67 -1
59 A_1_ 1 -1 -1 2 1 6 59 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
63 CLK_030 1 -1 -1 1 1 63 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 3 29 -1
20 BG_030 1 -1 -1 1 2 20 -1
10 CLK_000 1 -1 -1 1 4 10 -1
149 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21
40 BERR 5 -1 4 6 0 1 2 3 5 7 40 -1 1 0 21
79 RW_000 5 372 7 2 4 6 79 -1 3 0 21
70 RW 5 380 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21
68 A_0_ 5 373 6 1 2 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 377 7 0 82 -1 3 0 21
34 VMA 5 379 3 0 34 -1 3 0 21
28 BG_000 5 376 3 0 28 -1 3 0 21
80 DSACK1 5 378 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
8 IPL_030_2_ 5 371 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 375 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 374 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
377 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
326 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21
349 SM_AMIGA_6_ 3 -1 0 5 0 1 2 5 7 -1 -1 3 0 21
327 CLK_000_D_0_ 3 -1 6 5 0 1 3 5 7 -1 -1 1 0 21
318 CLK_000_D_1_ 3 -1 7 5 0 1 3 5 7 -1 -1 1 0 21
361 SM_AMIGA_1_ 3 -1 1 4 0 1 5 6 -1 -1 3 0 21
303 inst_AS_030_D0 3 -1 7 4 0 2 4 7 -1 -1 1 0 21
367 SM_AMIGA_i_7_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
362 SM_AMIGA_5_ 3 -1 5 3 0 1 5 -1 -1 3 0 21
350 SM_AMIGA_0_ 3 -1 5 3 1 5 7 -1 -1 3 0 21
297 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
304 inst_AS_030_000_SYNC 3 -1 0 3 0 1 3 -1 -1 2 0 21
300 pos_clk_bg_000_pre5_i_n 3 -1 7 3 2 5 7 -1 -1 1 0 21
364 SM_AMIGA_2_ 3 -1 5 2 1 5 -1 -1 3 0 21
358 inst_BG_000_PRE 3 -1 2 2 2 3 -1 -1 3 0 21
353 RST_DLY_0_ 3 -1 3 2 0 3 -1 -1 3 0 21
351 SM_AMIGA_4_ 3 -1 5 2 1 5 -1 -1 3 0 21
347 inst_BGACK_000_SAMPLE 3 -1 7 2 5 7 -1 -1 3 0 21
314 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
311 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
310 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
308 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21
307 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 3 0 21
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
298 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21
296 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21
363 SM_AMIGA_3_ 3 -1 5 2 1 3 -1 -1 2 0 21
357 RST_DLY_2_ 3 -1 0 2 0 3 -1 -1 2 0 21
355 RST_DLY_1_ 3 -1 0 2 0 3 -1 -1 2 0 21
345 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21
343 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21
313 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
306 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21
302 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21
301 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21
348 N_156_i 3 -1 7 2 3 6 -1 -1 1 0 21
332 CLK_000_D_2_ 3 -1 7 2 0 1 -1 -1 1 0 21
322 CLK_000_D_11_ 3 -1 2 2 4 6 -1 -1 1 0 21
320 CLK_000_D_10_ 3 -1 6 2 2 6 -1 -1 1 0 21
316 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21
305 inst_BGACK_030_INT_D 3 -1 7 2 0 6 -1 -1 1 0 21
379 RN_VMA 3 34 3 1 3 34 -1 3 0 21
376 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
373 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
372 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
369 S0__clk_un23_bgack_030_int_i_0_0 3 -1 2 1 6 -1 -1 3 0 21
368 N_105 3 -1 5 1 2 -1 -1 3 0 21
359 N_102_i 3 -1 6 1 7 -1 -1 3 0 21
346 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
309 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21
293 N_231_i 3 -1 3 1 5 -1 -1 3 0 21
380 RN_RW 3 70 6 1 6 70 -1 2 0 21
378 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
375 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
374 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
371 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
370 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
366 N_323_0 3 -1 6 1 6 -1 -1 2 0 21
360 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21
356 N_251_i 3 -1 1 1 5 -1 -1 2 0 21
354 N_252_i 3 -1 6 1 3 -1 -1 2 0 21
352 N_249_i 3 -1 2 1 5 -1 -1 2 0 21
344 pos_clk_ipl_n 3 -1 5 1 1 -1 -1 2 0 21
334 N_210_i 3 -1 3 1 0 -1 -1 2 0 21
321 N_218_i 3 -1 7 1 5 -1 -1 2 0 21
319 N_217_i 3 -1 3 1 5 -1 -1 2 0 21
317 N_216_i 3 -1 0 1 5 -1 -1 2 0 21
315 N_215_i 3 -1 5 1 5 -1 -1 2 0 21
294 vma_int_0_un3_n 3 -1 3 1 3 -1 -1 2 0 21
365 N_174_i 3 -1 7 1 0 -1 -1 1 0 21
342 CLK_000_D_12_ 3 -1 4 1 6 -1 -1 1 0 21
341 CLK_000_D_9_ 3 -1 4 1 6 -1 -1 1 0 21
340 CLK_000_D_8_ 3 -1 5 1 4 -1 -1 1 0 21
339 N_278_i 3 -1 3 1 3 -1 -1 1 0 21
338 CLK_000_D_7_ 3 -1 1 1 5 -1 -1 1 0 21
337 CLK_000_D_6_ 3 -1 0 1 1 -1 -1 1 0 21
336 CLK_000_D_5_ 3 -1 1 1 0 -1 -1 1 0 21
335 CLK_000_D_4_ 3 -1 1 1 1 -1 -1 1 0 21
333 CLK_000_D_3_ 3 -1 0 1 1 -1 -1 1 0 21
331 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21
330 IPL_D0_1_ 3 -1 5 1 5 -1 -1 1 0 21
329 IPL_D0_0_ 3 -1 2 1 2 -1 -1 1 0 21
328 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
325 N_219_i 3 -1 1 1 5 -1 -1 1 0 21
324 inst_DTACK_D0 3 -1 2 1 3 -1 -1 1 0 21
323 N_272_i 3 -1 1 1 5 -1 -1 1 0 21
312 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21
295 N_265_i 3 -1 5 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 6 0 1 2 4 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
66 IPL_0_ 1 -1 -1 2 1 2 66 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 1 5 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
63 CLK_030 1 -1 -1 1 6 63 -1
59 A_1_ 1 -1 -1 1 0 59 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 2 29 -1
20 BG_030 1 -1 -1 1 2 20 -1
10 CLK_000 1 -1 -1 1 6 10 -1
152 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21
79 RW_000 5 378 7 3 3 4 6 79 -1 3 0 21
40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21
68 A_0_ 5 375 6 2 2 3 68 -1 3 0 21
70 RW 5 383 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 380 7 0 82 -1 3 0 21
28 BG_000 5 379 3 0 28 -1 3 0 21
8 IPL_030_2_ 5 374 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 377 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 376 1 0 6 -1 3 0 21
80 DSACK1 5 381 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
34 VMA 5 382 3 0 34 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
380 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
334 inst_RESET_OUT 3 -1 2 7 0 1 2 3 4 6 7 -1 -1 2 0 21
336 CLK_000_D_0_ 3 -1 6 6 0 2 3 5 6 7 -1 -1 1 0 21
329 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21
356 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21
310 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21
299 pos_clk_bg_0005_i_n 3 -1 7 4 0 3 5 7 -1 -1 1 0 21
368 SM_AMIGA_i_7_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
360 RST_DLY_1_ 3 -1 0 3 0 2 3 -1 -1 3 0 21
311 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 2 0 21
305 cpu_est_2_ 3 -1 5 3 0 5 6 -1 -1 2 0 21
363 SM_AMIGA_1_ 3 -1 5 2 1 5 -1 -1 3 0 21
359 RST_DLY_0_ 3 -1 2 2 2 3 -1 -1 3 0 21
357 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21
355 inst_BGACK_000_SAMPLE 3 -1 7 2 6 7 -1 -1 3 0 21
324 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
319 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
318 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
315 CYCLE_DMA_0_ 3 -1 6 2 0 6 -1 -1 3 0 21
303 cpu_est_1_ 3 -1 0 2 0 6 -1 -1 3 0 21
301 cpu_est_3_ 3 -1 0 2 0 6 -1 -1 3 0 21
365 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 2 0 21
361 RST_DLY_2_ 3 -1 2 2 0 2 -1 -1 2 0 21
353 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21
352 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
314 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 2 0 21
313 inst_AS_000_DMA 3 -1 3 2 3 7 -1 -1 2 0 21
306 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
367 N_176_i 3 -1 3 2 0 2 -1 -1 1 0 21
331 CLK_000_D_11_ 3 -1 5 2 0 1 -1 -1 1 0 21
330 CLK_000_D_10_ 3 -1 4 2 1 5 -1 -1 1 0 21
327 inst_CLK_OUT_PRE_D 3 -1 7 2 1 6 -1 -1 1 0 21
312 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21
379 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
378 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
377 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
376 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
375 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
374 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
366 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
364 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21
358 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
354 inst_BGACK_030_INT_PRE 3 -1 6 1 6 -1 -1 3 0 21
332 un1_SM_AMIGA_1_i 3 -1 5 1 2 -1 -1 3 0 21
323 N_208_i 3 -1 5 1 5 -1 -1 3 0 21
317 cpu_est_0_2__un0_n 3 -1 0 1 5 -1 -1 3 0 21
316 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
302 cpu_est_0_ 3 -1 0 1 0 -1 -1 3 0 21
298 DSACK1_INT_0_sqmuxa_i 3 -1 1 1 7 -1 -1 3 0 21
295 N_22 3 -1 0 1 3 -1 -1 3 0 21
383 RN_RW 3 70 6 1 6 70 -1 2 0 21
381 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
373 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
370 G_117 3 -1 1 1 1 -1 -1 2 0 21
369 G_116 3 -1 1 1 1 -1 -1 2 0 21
362 inst_CLK_030_H 3 -1 3 1 3 -1 -1 2 0 21
335 pos_clk_un23_bgack_030_int_i_0_0_n 3 -1 0 1 3 -1 -1 2 0 21
328 N_209_i 3 -1 5 1 5 -1 -1 2 0 21
322 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21
320 N_193_i 3 -1 7 1 5 -1 -1 2 0 21
309 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
308 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
307 N_181_i 3 -1 0 1 5 -1 -1 2 0 21
304 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
300 ipl_030_0_2__un1_n 3 -1 1 1 1 -1 -1 2 0 21
297 ds_000_dma_0_un1_n 3 -1 3 1 1 -1 -1 2 0 21
296 ds_000_dma_0_un3_n 3 -1 3 1 1 -1 -1 2 0 21
294 N_198_i 3 -1 0 1 5 -1 -1 2 0 21
382 RN_VMA 3 34 3 1 0 34 -1 1 0 21
372 N_304_i 3 -1 3 1 0 -1 -1 1 0 21
371 N_70 3 -1 2 1 0 -1 -1 1 0 21
351 CLK_000_D_12_ 3 -1 0 1 1 -1 -1 1 0 21
350 CLK_000_D_9_ 3 -1 6 1 4 -1 -1 1 0 21
349 CLK_000_D_8_ 3 -1 0 1 6 -1 -1 1 0 21
348 CLK_000_D_7_ 3 -1 3 1 0 -1 -1 1 0 21
347 CLK_000_D_6_ 3 -1 4 1 3 -1 -1 1 0 21
346 CLK_000_D_5_ 3 -1 4 1 4 -1 -1 1 0 21
345 CLK_000_D_4_ 3 -1 5 1 4 -1 -1 1 0 21
344 CLK_000_D_3_ 3 -1 5 1 5 -1 -1 1 0 21
343 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21
342 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21
341 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21
340 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21
339 N_287_i 3 -1 0 1 0 -1 -1 1 0 21
338 inst_CLK_OUT_PRE_50 3 -1 7 1 7 -1 -1 1 0 21
337 N_90_i 3 -1 6 1 0 -1 -1 1 0 21
333 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21
326 N_210_i 3 -1 5 1 5 -1 -1 1 0 21
325 pos_clk_un28_as_030_d0_i_n 3 -1 4 1 2 -1 -1 1 0 21
321 inst_VPA_D 3 -1 3 1 0 -1 -1 1 0 21
293 bgack_030_int_0_un1_n 3 -1 6 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
27 BGACK_000 1 -1 -1 3 4 6 7 27 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 3 67 -1
66 IPL_0_ 1 -1 -1 2 1 6 66 -1
63 CLK_030 1 -1 -1 2 1 3 63 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 2 59 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 6 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 6 10 -1
150 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21
79 RW_000 5 376 7 3 0 4 6 79 -1 3 0 21
81 AS_030 5 -1 7 3 3 4 7 81 -1 1 0 21
40 BERR 5 -1 4 3 1 5 7 40 -1 1 0 21
70 RW 5 381 6 2 5 7 70 -1 2 0 21
68 A_0_ 5 373 6 1 3 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 378 7 0 82 -1 3 0 21
34 VMA 5 380 3 0 34 -1 3 0 21
80 DSACK1 5 379 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 377 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 372 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 375 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 374 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
378 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
327 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
329 CLK_000_D_0_ 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21
322 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21
304 inst_AS_030_D0 3 -1 3 5 1 3 4 5 7 -1 -1 1 0 21
364 SM_AMIGA_i_7_ 3 -1 5 3 1 5 7 -1 -1 3 0 21
351 SM_AMIGA_0_ 3 -1 5 3 1 5 7 -1 -1 3 0 21
350 SM_AMIGA_6_ 3 -1 5 3 3 5 7 -1 -1 3 0 21
298 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 3 0 21
305 inst_AS_030_000_SYNC 3 -1 1 3 1 3 5 -1 -1 2 0 21
301 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 2 0 21
300 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 2 0 21
321 inst_CLK_OUT_PRE_D 3 -1 4 3 1 2 6 -1 -1 1 0 21
307 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21
296 N_151_i 3 -1 1 3 2 5 7 -1 -1 1 0 21
380 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21
360 SM_AMIGA_5_ 3 -1 5 2 1 5 -1 -1 3 0 21
359 SM_AMIGA_1_ 3 -1 5 2 2 5 -1 -1 3 0 21
349 inst_BGACK_000_SAMPLE 3 -1 7 2 2 7 -1 -1 3 0 21
316 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
315 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
299 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21
361 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 2 0 21
347 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 2 0 21
344 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21
309 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 2 0 21
302 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
334 CLK_000_D_2_ 3 -1 7 2 4 5 -1 -1 1 0 21
324 CLK_000_D_11_ 3 -1 0 2 2 5 -1 -1 1 0 21
323 CLK_000_D_10_ 3 -1 2 2 0 2 -1 -1 1 0 21
318 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21
376 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
373 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
367 N_156_0 3 -1 6 1 6 -1 -1 3 0 21
362 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
354 RST_DLY_1_ 3 -1 6 1 6 -1 -1 3 0 21
352 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
348 inst_BGACK_030_INT_PRE 3 -1 2 1 2 -1 -1 3 0 21
345 N_159_0 3 -1 5 1 1 -1 -1 3 0 21
341 N_100_i 3 -1 2 1 7 -1 -1 3 0 21
320 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21
313 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21
312 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21
308 N_207_i 3 -1 5 1 5 -1 -1 3 0 21
293 cpu_est_0_2__un0_n 3 -1 0 1 0 -1 -1 3 0 21
381 RN_RW 3 70 6 1 6 70 -1 2 0 21
379 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
377 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
375 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
374 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
372 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
366 N_210 3 -1 0 1 5 -1 -1 2 0 21
365 N_171_0 3 -1 2 1 0 -1 -1 2 0 21
363 N_231_i 3 -1 3 1 3 -1 -1 2 0 21
358 N_247_i 3 -1 2 1 6 -1 -1 2 0 21
357 inst_CLK_030_H 3 -1 0 1 0 -1 -1 2 0 21
356 N_245_i 3 -1 1 1 6 -1 -1 2 0 21
355 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21
353 RST_DLY_0_ 3 -1 6 1 6 -1 -1 2 0 21
346 pos_clk_ipl_n 3 -1 6 1 1 -1 -1 2 0 21
328 ds_000_dma_0_un1_n 3 -1 0 1 0 -1 -1 2 0 21
326 ds_000_dma_0_un3_n 3 -1 0 1 0 -1 -1 2 0 21
319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21
311 N_209_i 3 -1 5 1 5 -1 -1 2 0 21
310 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 2 0 21
306 N_187_0 3 -1 0 1 5 -1 -1 2 0 21
303 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
295 cpu_est_0_1__un0_n 3 -1 3 1 0 -1 -1 2 0 21
370 N_382 3 -1 7 1 1 -1 -1 1 0 21
369 N_275 3 -1 6 1 2 -1 -1 1 0 21
368 N_274 3 -1 7 1 5 -1 -1 1 0 21
343 CLK_000_D_12_ 3 -1 5 1 2 -1 -1 1 0 21
342 CLK_000_D_9_ 3 -1 5 1 2 -1 -1 1 0 21
340 CLK_000_D_8_ 3 -1 2 1 5 -1 -1 1 0 21
339 CLK_000_D_7_ 3 -1 1 1 2 -1 -1 1 0 21
338 CLK_000_D_6_ 3 -1 5 1 1 -1 -1 1 0 21
337 CLK_000_D_5_ 3 -1 0 1 5 -1 -1 1 0 21
336 CLK_000_D_4_ 3 -1 3 1 0 -1 -1 1 0 21
335 CLK_000_D_3_ 3 -1 4 1 3 -1 -1 1 0 21
333 IPL_D0_2_ 3 -1 3 1 2 -1 -1 1 0 21
332 IPL_D0_1_ 3 -1 1 1 6 -1 -1 1 0 21
331 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
330 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
325 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21
317 N_200_i 3 -1 6 1 6 -1 -1 1 0 21
314 N_212_i 3 -1 5 1 5 -1 -1 1 0 21
297 bgack_030_int_0_un1_n 3 -1 2 1 7 -1 -1 1 0 21
294 N_252_i 3 -1 3 1 3 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
67 IPL_2_ 1 -1 -1 3 1 2 3 67 -1
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
63 CLK_030 1 -1 -1 2 0 2 63 -1
59 A_1_ 1 -1 -1 2 1 2 59 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 1 6 55 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
35 VPA 1 -1 -1 1 0 35 -1
29 DTACK 1 -1 -1 1 6 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 4 10 -1
153 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 5 0 2 3 5 7 40 -1 1 0 21
41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21
79 RW_000 5 378 7 3 0 4 6 79 -1 3 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 376 6 1 3 68 -1 3 0 21
70 RW 5 384 6 1 7 70 -1 2 0 21
78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 381 7 0 82 -1 3 0 21
28 BG_000 5 380 3 0 28 -1 3 0 21
80 DSACK1 5 382 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
34 VMA 5 383 3 0 34 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
8 IPL_030_2_ 5 375 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 379 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 377 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
381 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
337 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21
338 CLK_000_D_0_ 3 -1 2 6 0 1 2 3 5 7 -1 -1 1 0 21
333 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21
317 inst_AS_030_D0 3 -1 7 5 0 3 4 5 7 -1 -1 1 0 21
362 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21
369 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
314 cpu_est_2_ 3 -1 1 3 1 5 6 -1 -1 3 0 21
313 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21
311 cpu_est_0_ 3 -1 0 3 0 5 6 -1 -1 3 0 21
310 cpu_est_3_ 3 -1 1 3 1 5 6 -1 -1 3 0 21
348 N_121_i 3 -1 7 3 2 3 7 -1 -1 1 0 21
319 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 1 0 21
373 SM_AMIGA_i_7_ 3 -1 2 2 5 7 -1 -1 3 0 21
372 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 3 0 21
370 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21
365 RST_DLY_0_ 3 -1 1 2 1 3 -1 -1 3 0 21
364 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21
363 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21
358 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
327 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
326 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
324 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 3 0 21
323 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21
383 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
371 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 2 0 21
368 inst_CLK_030_H 3 -1 0 2 0 6 -1 -1 2 0 21
366 RST_DLY_1_ 3 -1 1 2 1 3 -1 -1 2 0 21
355 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
325 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 0 2 0 6 -1 -1 2 0 21
322 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 2 0 21
321 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 2 0 21
316 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
315 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21
304 N_229_i 3 -1 5 2 2 5 -1 -1 2 0 21
344 CLK_000_D_2_ 3 -1 7 2 2 5 -1 -1 1 0 21
335 CLK_000_D_11_ 3 -1 4 2 4 6 -1 -1 1 0 21
334 CLK_000_D_10_ 3 -1 5 2 4 6 -1 -1 1 0 21
332 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21
320 inst_BGACK_030_INT_D 3 -1 7 2 5 6 -1 -1 1 0 21
380 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
378 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
376 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
361 inst_BGACK_000_SAMPLE 3 -1 2 1 2 -1 -1 3 0 21
331 N_137_0 3 -1 6 1 7 -1 -1 3 0 21
330 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21
308 N_240_i 3 -1 2 1 2 -1 -1 3 0 21
298 cpu_est_2_2__n 3 -1 6 1 1 -1 -1 3 0 21
384 RN_RW 3 70 6 1 6 70 -1 2 0 21
382 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
379 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
377 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
375 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
374 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
367 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21
360 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 2 0 21
359 N_249_i 3 -1 1 1 1 -1 -1 2 0 21
357 N_247_i 3 -1 1 1 1 -1 -1 2 0 21
356 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21
339 N_342_i 3 -1 7 1 5 -1 -1 2 0 21
329 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21
318 as_030_000_sync_0_un1_n 3 -1 0 1 0 -1 -1 2 0 21
309 un1_bgack_030_int7_2 3 -1 2 1 7 -1 -1 2 0 21
307 ds_000_dma_0_un1_n 3 -1 0 1 6 -1 -1 2 0 21
306 N_242_i 3 -1 2 1 2 -1 -1 2 0 21
305 ds_000_dma_0_un3_n 3 -1 6 1 6 -1 -1 2 0 21
303 N_225_i 3 -1 7 1 2 -1 -1 2 0 21
301 N_351 3 -1 7 1 1 -1 -1 2 0 21
300 pos_clk_un26_clk_000_pe_n 3 -1 5 1 3 -1 -1 2 0 21
299 cpu_est_2_1__n 3 -1 5 1 3 -1 -1 2 0 21
297 N_252 3 -1 5 1 1 -1 -1 2 0 21
296 N_250 3 -1 5 1 1 -1 -1 2 0 21
295 N_216_i 3 -1 3 1 1 -1 -1 2 0 21
294 N_157_0 3 -1 5 1 2 -1 -1 2 0 21
354 CLK_000_D_12_ 3 -1 4 1 6 -1 -1 1 0 21
353 CLK_000_D_9_ 3 -1 3 1 5 -1 -1 1 0 21
352 CLK_000_D_8_ 3 -1 6 1 3 -1 -1 1 0 21
351 CLK_000_D_7_ 3 -1 0 1 6 -1 -1 1 0 21
350 CLK_000_D_6_ 3 -1 1 1 0 -1 -1 1 0 21
349 CLK_000_D_5_ 3 -1 0 1 1 -1 -1 1 0 21
347 CLK_000_D_4_ 3 -1 5 1 0 -1 -1 1 0 21
346 N_275_i 3 -1 6 1 0 -1 -1 1 0 21
345 CLK_000_D_3_ 3 -1 2 1 5 -1 -1 1 0 21
343 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21
342 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21
341 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21
340 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21
336 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21
328 inst_VPA_D 3 -1 0 1 5 -1 -1 1 0 21
312 N_156_0 3 -1 5 1 0 -1 -1 1 0 21
302 N_243_i 3 -1 5 1 2 -1 -1 1 0 21
293 N_317 3 -1 3 1 1 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1
57 FC_1_ 1 -1 -1 3 0 4 7 57 -1
56 FC_0_ 1 -1 -1 3 0 4 7 56 -1
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 5 67 -1
66 IPL_0_ 1 -1 -1 2 0 1 66 -1
63 CLK_030 1 -1 -1 2 0 6 63 -1
55 IPL_1_ 1 -1 -1 2 1 3 55 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 6 59 -1
35 VPA 1 -1 -1 1 0 35 -1
29 DTACK 1 -1 -1 1 6 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 2 10 -1
152 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 6 0 2 3 4 6 7 41 -1 1 0 21
40 BERR 5 -1 4 5 0 2 3 5 7 40 -1 1 0 21
79 RW_000 5 378 7 3 2 4 6 79 -1 3 0 21
70 RW 5 383 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 374 6 1 3 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 380 7 0 82 -1 3 0 21
28 BG_000 5 379 3 0 28 -1 3 0 21
80 DSACK1 5 381 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
8 IPL_030_2_ 5 375 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 377 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 376 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
34 VMA 5 382 3 0 34 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
380 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
331 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21
332 CLK_000_D_0_ 3 -1 3 6 0 2 3 4 5 6 -1 -1 1 0 21
326 CLK_000_D_1_ 3 -1 4 6 0 2 3 4 5 6 -1 -1 1 0 21
367 N_117_i 3 -1 4 4 3 5 6 7 -1 -1 1 0 21
308 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21
368 SM_AMIGA_i_7_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
355 SM_AMIGA_6_ 3 -1 5 3 3 5 7 -1 -1 3 0 21
313 inst_BGACK_000_SAMPLE 3 -1 3 3 2 3 7 -1 -1 3 0 21
310 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 2 0 21
371 S0__clk_un26_bgack_030_int_i_0_0 3 -1 6 2 2 3 -1 -1 3 0 21
366 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 3 0 21
362 SM_AMIGA_1_ 3 -1 5 2 1 5 -1 -1 3 0 21
356 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21
320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
319 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
304 cpu_est_2_ 3 -1 0 2 0 6 -1 -1 3 0 21
303 cpu_est_1_ 3 -1 6 2 0 6 -1 -1 3 0 21
302 cpu_est_0_ 3 -1 6 2 0 6 -1 -1 3 0 21
301 cpu_est_3_ 3 -1 0 2 0 6 -1 -1 3 0 21
370 N_220 3 -1 0 2 2 5 -1 -1 2 0 21
364 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 2 0 21
349 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
315 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 2 0 21
314 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 2 0 21
305 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21
345 N_116_i 3 -1 4 2 0 6 -1 -1 1 0 21
338 CLK_000_D_2_ 3 -1 4 2 5 6 -1 -1 1 0 21
327 CLK_000_D_10_ 3 -1 1 2 1 5 -1 -1 1 0 21
325 inst_CLK_OUT_PRE_D 3 -1 7 2 1 6 -1 -1 1 0 21
321 inst_VPA_D 3 -1 6 2 0 6 -1 -1 1 0 21
311 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21
379 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
378 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
374 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
369 N_215 3 -1 5 1 3 -1 -1 3 0 21
363 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21
358 RST_DLY_0_ 3 -1 0 1 0 -1 -1 3 0 21
357 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
353 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
324 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21
323 N_22_i 3 -1 0 1 3 -1 -1 3 0 21
318 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21
317 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 3 0 21
306 N_230_i 3 -1 5 1 5 -1 -1 3 0 21
297 as_000_int_0_un3_n 3 -1 3 1 1 -1 -1 3 0 21
296 N_165_i 3 -1 1 1 7 -1 -1 3 0 21
293 N_222 3 -1 0 1 5 -1 -1 3 0 21
383 RN_RW 3 70 6 1 6 70 -1 2 0 21
381 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
377 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
376 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
375 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
373 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
361 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21
360 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21
359 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 0 21
354 N_175_i 3 -1 0 1 0 -1 -1 2 0 21
352 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 2 0 21
351 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21
350 N_248_i 3 -1 0 1 1 -1 -1 2 0 21
348 N_247_i 3 -1 3 1 1 -1 -1 2 0 21
336 N_256_i 3 -1 0 1 0 -1 -1 2 0 21
322 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21
309 N_232_i 3 -1 5 1 5 -1 -1 2 0 21
307 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
300 un1_bgack_030_int7_2 3 -1 2 1 7 -1 -1 2 0 21
299 as_000_int_0_un1_n 3 -1 3 1 1 -1 -1 2 0 21
295 ds_000_dma_0_un1_n 3 -1 2 1 2 -1 -1 2 0 21
294 ds_000_dma_0_un3_n 3 -1 2 1 2 -1 -1 2 0 21
382 RN_VMA 3 34 3 1 0 34 -1 1 0 21
372 N_263 3 -1 7 1 5 -1 -1 1 0 21
365 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 3 1 2 -1 -1 1 0 21
347 CLK_000_D_12_ 3 -1 1 1 1 -1 -1 1 0 21
346 CLK_000_D_9_ 3 -1 5 1 1 -1 -1 1 0 21
344 CLK_000_D_8_ 3 -1 0 1 5 -1 -1 1 0 21
343 CLK_000_D_7_ 3 -1 1 1 0 -1 -1 1 0 21
342 CLK_000_D_6_ 3 -1 5 1 1 -1 -1 1 0 21
341 CLK_000_D_5_ 3 -1 1 1 5 -1 -1 1 0 21
340 CLK_000_D_4_ 3 -1 5 1 1 -1 -1 1 0 21
339 CLK_000_D_3_ 3 -1 6 1 5 -1 -1 1 0 21
337 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21
335 IPL_D0_1_ 3 -1 5 1 0 -1 -1 1 0 21
334 IPL_D0_0_ 3 -1 3 1 3 -1 -1 1 0 21
333 inst_CLK_OUT_PRE_50 3 -1 7 1 7 -1 -1 1 0 21
330 inst_DTACK_D0 3 -1 1 1 0 -1 -1 1 0 21
329 N_253_i 3 -1 6 1 0 -1 -1 1 0 21
328 CLK_000_D_11_ 3 -1 5 1 1 -1 -1 1 0 21
316 N_273_i 3 -1 0 1 0 -1 -1 1 0 21
312 N_334_i 3 -1 5 1 5 -1 -1 1 0 21
298 N_135_i 3 -1 4 1 2 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
55 IPL_1_ 1 -1 -1 3 0 1 5 55 -1
27 BGACK_000 1 -1 -1 3 3 4 7 27 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 6 67 -1
66 IPL_0_ 1 -1 -1 2 1 3 66 -1
63 CLK_030 1 -1 -1 2 1 2 63 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 6 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 3 10 -1
150 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
79 RW_000 5 376 7 3 2 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 372 6 1 3 68 -1 3 0 21
70 RW 5 381 6 1 7 70 -1 2 0 21
78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 378 7 0 82 -1 3 0 21
28 BG_000 5 377 3 0 28 -1 3 0 21
8 IPL_030_2_ 5 375 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 374 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 373 1 0 6 -1 3 0 21
80 DSACK1 5 379 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
34 VMA 5 380 3 0 34 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
378 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
330 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21
331 CLK_000_D_0_ 3 -1 5 5 0 3 5 6 7 -1 -1 1 0 21
326 CLK_000_D_1_ 3 -1 7 5 0 3 5 6 7 -1 -1 1 0 21
310 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21
349 SM_AMIGA_6_ 3 -1 5 4 0 3 5 7 -1 -1 3 0 21
360 N_120_i 3 -1 7 4 0 3 5 7 -1 -1 1 0 21
362 SM_AMIGA_i_7_ 3 -1 0 3 2 5 7 -1 -1 3 0 21
356 SM_AMIGA_1_ 3 -1 5 3 0 2 5 -1 -1 3 0 21
307 cpu_est_2_ 3 -1 1 3 1 5 6 -1 -1 3 0 21
311 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 2 0 21
325 inst_CLK_OUT_PRE_D 3 -1 4 3 1 2 6 -1 -1 1 0 21
293 N_119_i 3 -1 7 3 1 5 6 -1 -1 1 0 21
358 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 3 0 21
357 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 3 0 21
350 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21
348 inst_BGACK_030_INT_PRE 3 -1 0 2 0 7 -1 -1 3 0 21
347 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
319 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
315 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 3 0 21
306 cpu_est_1_ 3 -1 6 2 5 6 -1 -1 3 0 21
304 cpu_est_0_ 3 -1 6 2 5 6 -1 -1 3 0 21
303 cpu_est_3_ 3 -1 6 2 5 6 -1 -1 3 0 21
346 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
314 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 2 0 21
308 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
305 N_149_i 3 -1 6 2 0 5 -1 -1 2 0 21
337 CLK_000_D_2_ 3 -1 7 2 1 5 -1 -1 1 0 21
328 CLK_000_D_11_ 3 -1 0 2 2 5 -1 -1 1 0 21
327 CLK_000_D_10_ 3 -1 6 2 0 2 -1 -1 1 0 21
321 inst_VPA_D 3 -1 0 2 5 6 -1 -1 1 0 21
313 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21
377 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
376 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
375 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
374 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
373 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
372 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
368 N_234 3 -1 5 1 0 -1 -1 3 0 21
359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
353 RST_DLY_1_ 3 -1 3 1 3 -1 -1 3 0 21
351 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
324 N_270_i 3 -1 3 1 3 -1 -1 3 0 21
323 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21
318 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
316 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21
299 N_168_i 3 -1 2 1 7 -1 -1 3 0 21
296 bgack_030_int_0_un1_n 3 -1 0 1 7 -1 -1 3 0 21
295 N_22 3 -1 6 1 3 -1 -1 3 0 21
381 RN_RW 3 70 6 1 6 70 -1 2 0 21
379 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
365 N_276_0 3 -1 2 1 2 -1 -1 2 0 21
364 G_117 3 -1 1 1 1 -1 -1 2 0 21
363 G_116 3 -1 1 1 1 -1 -1 2 0 21
355 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21
354 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21
352 RST_DLY_0_ 3 -1 3 1 3 -1 -1 2 0 21
333 N_220_i 3 -1 7 1 0 -1 -1 2 0 21
322 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21
312 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21
309 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
302 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
301 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
300 pos_clk_un26_bgack_030_int_i_0_i_n 3 -1 0 1 2 -1 -1 2 0 21
297 N_271_i 3 -1 7 1 5 -1 -1 2 0 21
380 RN_VMA 3 34 3 1 6 34 -1 1 0 21
370 N_241 3 -1 5 1 6 -1 -1 1 0 21
369 N_237 3 -1 5 1 0 -1 -1 1 0 21
367 N_292 3 -1 7 1 0 -1 -1 1 0 21
366 N_267 3 -1 7 1 0 -1 -1 1 0 21
361 N_138_i 3 -1 6 1 2 -1 -1 1 0 21
345 CLK_000_D_12_ 3 -1 5 1 2 -1 -1 1 0 21
344 CLK_000_D_9_ 3 -1 4 1 6 -1 -1 1 0 21
343 CLK_000_D_8_ 3 -1 0 1 4 -1 -1 1 0 21
342 CLK_000_D_7_ 3 -1 1 1 0 -1 -1 1 0 21
341 CLK_000_D_6_ 3 -1 5 1 1 -1 -1 1 0 21
340 CLK_000_D_5_ 3 -1 2 1 5 -1 -1 1 0 21
339 CLK_000_D_4_ 3 -1 3 1 2 -1 -1 1 0 21
338 CLK_000_D_3_ 3 -1 1 1 3 -1 -1 1 0 21
336 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21
335 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21
334 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21
332 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
329 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
317 N_178_i 3 -1 3 1 3 -1 -1 1 0 21
298 N_132_i 3 -1 6 1 1 -1 -1 1 0 21
294 N_268_i 3 -1 6 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 3 4 6 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 4 6 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 4 6 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 4 6 7 58 -1
57 FC_1_ 1 -1 -1 3 4 6 7 57 -1
56 FC_0_ 1 -1 -1 3 4 6 7 56 -1
27 BGACK_000 1 -1 -1 3 0 4 7 27 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 3 67 -1
66 IPL_0_ 1 -1 -1 2 1 2 66 -1
55 IPL_1_ 1 -1 -1 2 0 1 55 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
63 CLK_030 1 -1 -1 1 2 63 -1
59 A_1_ 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 0 35 -1
29 DTACK 1 -1 -1 1 0 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 5 10 -1
151 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 7 0 1 2 3 5 6 7 40 -1 1 0 21
79 RW_000 5 377 7 3 2 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 382 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 373 6 1 3 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 379 7 0 82 -1 3 0 21
34 VMA 5 381 3 0 34 -1 3 0 21
28 BG_000 5 378 3 0 28 -1 3 0 21
8 IPL_030_2_ 5 376 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 375 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 374 1 0 6 -1 3 0 21
80 DSACK1 5 380 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
332 inst_RESET_OUT 3 -1 5 8 0 1 2 3 4 5 6 7 -1 -1 2 0 21
379 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
333 CLK_000_D_0_ 3 -1 1 5 0 3 5 6 7 -1 -1 1 0 21
328 CLK_000_D_1_ 3 -1 0 5 0 3 5 6 7 -1 -1 1 0 21
311 inst_AS_030_D0 3 -1 7 5 1 2 3 4 6 -1 -1 1 0 21
365 SM_AMIGA_i_7_ 3 -1 5 4 1 2 5 7 -1 -1 3 0 21
353 SM_AMIGA_6_ 3 -1 5 4 0 3 5 7 -1 -1 3 0 21
361 SM_AMIGA_5_ 3 -1 0 3 0 2 5 -1 -1 3 0 21
354 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
312 inst_AS_030_000_SYNC 3 -1 1 3 1 3 5 -1 -1 3 0 21
307 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
306 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 21
305 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
308 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 2 0 21
313 inst_BGACK_030_INT_D 3 -1 4 3 1 2 6 -1 -1 1 0 21
295 N_145_i 3 -1 7 3 0 3 7 -1 -1 1 0 21
363 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21
360 SM_AMIGA_1_ 3 -1 5 2 2 5 -1 -1 3 0 21
355 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21
322 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
321 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
315 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 3 0 21
348 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21
347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
314 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 2 0 21
309 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21
335 IPL_D0_0_ 3 -1 0 2 0 1 -1 -1 1 0 21
330 CLK_000_D_11_ 3 -1 7 2 2 3 -1 -1 1 0 21
329 CLK_000_D_10_ 3 -1 6 2 2 7 -1 -1 1 0 21
327 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21
325 N_144_i 3 -1 3 2 5 6 -1 -1 1 0 21
381 RN_VMA 3 34 3 1 0 34 -1 3 0 21
378 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
377 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
376 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
375 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
374 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
373 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
366 N_204 3 -1 0 1 5 -1 -1 3 0 21
362 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 3 0 21
356 RST_DLY_0_ 3 -1 5 1 5 -1 -1 3 0 21
350 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
326 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21
320 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
319 dsack1_int_0_un1_n 3 -1 2 1 7 -1 -1 3 0 21
318 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21
317 dsack1_int_0_un3_n 3 -1 2 1 7 -1 -1 3 0 21
299 N_153_0 3 -1 5 1 2 -1 -1 3 0 21
297 cpu_est_0_2__un0_n 3 -1 0 1 6 -1 -1 3 0 21
294 vma_int_0_un0_n 3 -1 0 1 3 -1 -1 3 0 21
382 RN_RW 3 70 6 1 6 70 -1 2 0 21
380 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
372 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
371 un1_bgack_030_int7_2_0 3 -1 7 1 7 -1 -1 2 0 21
367 N_208 3 -1 7 1 5 -1 -1 2 0 21
364 N_318_0 3 -1 2 1 2 -1 -1 2 0 21
359 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21
358 RST_DLY_2_ 3 -1 5 1 5 -1 -1 2 0 21
357 RST_DLY_1_ 3 -1 5 1 5 -1 -1 2 0 21
352 N_218_i 3 -1 5 1 5 -1 -1 2 0 21
351 N_246_i 3 -1 1 1 1 -1 -1 2 0 21
349 N_245_i 3 -1 0 1 1 -1 -1 2 0 21
324 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21
316 N_171_i 3 -1 0 1 5 -1 -1 2 0 21
310 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
304 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21
303 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
302 pos_clk_un26_bgack_030_int_i_1_i_n 3 -1 0 1 2 -1 -1 2 0 21
300 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
370 N_345 3 -1 7 1 5 -1 -1 1 0 21
369 N_305 3 -1 7 1 5 -1 -1 1 0 21
368 N_209 3 -1 5 1 5 -1 -1 1 0 21
346 CLK_000_D_12_ 3 -1 3 1 2 -1 -1 1 0 21
345 CLK_000_D_9_ 3 -1 3 1 6 -1 -1 1 0 21
344 CLK_000_D_8_ 3 -1 5 1 3 -1 -1 1 0 21
343 CLK_000_D_7_ 3 -1 1 1 5 -1 -1 1 0 21
342 CLK_000_D_6_ 3 -1 0 1 1 -1 -1 1 0 21
341 CLK_000_D_5_ 3 -1 3 1 0 -1 -1 1 0 21
340 CLK_000_D_4_ 3 -1 2 1 3 -1 -1 1 0 21
339 CLK_000_D_3_ 3 -1 5 1 2 -1 -1 1 0 21
338 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21
337 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21
336 IPL_D0_1_ 3 -1 4 1 1 -1 -1 1 0 21
334 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21
331 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21
323 inst_VPA_D 3 -1 6 1 0 -1 -1 1 0 21
301 pos_clk_un3_as_030_d0_i_n 3 -1 6 1 2 -1 -1 1 0 21
298 N_152_0 3 -1 1 1 2 -1 -1 1 0 21
296 N_340_i 3 -1 6 1 0 -1 -1 1 0 21
293 N_225 3 -1 6 1 1 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 4 6 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 4 6 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 4 6 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 4 6 7 58 -1
57 FC_1_ 1 -1 -1 3 4 6 7 57 -1
56 FC_0_ 1 -1 -1 3 4 6 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 3 67 -1
66 IPL_0_ 1 -1 -1 2 0 1 66 -1
63 CLK_030 1 -1 -1 2 1 2 63 -1
55 IPL_1_ 1 -1 -1 2 1 4 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 6 35 -1
29 DTACK 1 -1 -1 1 6 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 1 10 -1
151 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 7 0 1 2 3 5 6 7 40 -1 1 0 21
79 RW_000 5 377 7 3 2 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 382 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 373 6 1 3 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 379 7 0 82 -1 3 0 21
34 VMA 5 381 3 0 34 -1 3 0 21
28 BG_000 5 378 3 0 28 -1 3 0 21
8 IPL_030_2_ 5 376 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 375 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 374 1 0 6 -1 3 0 21
80 DSACK1 5 380 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
332 inst_RESET_OUT 3 -1 5 8 0 1 2 3 4 5 6 7 -1 -1 2 0 21
379 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
333 CLK_000_D_0_ 3 -1 1 5 0 3 5 6 7 -1 -1 1 0 21
328 CLK_000_D_1_ 3 -1 0 5 0 3 5 6 7 -1 -1 1 0 21
311 inst_AS_030_D0 3 -1 7 5 1 2 3 4 6 -1 -1 1 0 21
365 SM_AMIGA_i_7_ 3 -1 5 4 1 2 5 7 -1 -1 3 0 21
353 SM_AMIGA_6_ 3 -1 5 4 0 3 5 7 -1 -1 3 0 21
361 SM_AMIGA_5_ 3 -1 0 3 0 2 5 -1 -1 3 0 21
354 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
312 inst_AS_030_000_SYNC 3 -1 1 3 1 3 5 -1 -1 3 0 21
307 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
306 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 21
305 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
308 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 2 0 21
313 inst_BGACK_030_INT_D 3 -1 4 3 1 2 6 -1 -1 1 0 21
295 N_145_i 3 -1 7 3 0 3 7 -1 -1 1 0 21
363 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21
360 SM_AMIGA_1_ 3 -1 5 2 2 5 -1 -1 3 0 21
355 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21
322 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
321 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
315 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 3 0 21
348 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21
347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
314 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 2 0 21
309 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21
335 IPL_D0_0_ 3 -1 0 2 0 1 -1 -1 1 0 21
330 CLK_000_D_11_ 3 -1 7 2 2 3 -1 -1 1 0 21
329 CLK_000_D_10_ 3 -1 6 2 2 7 -1 -1 1 0 21
327 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21
325 N_144_i 3 -1 3 2 5 6 -1 -1 1 0 21
381 RN_VMA 3 34 3 1 0 34 -1 3 0 21
378 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
377 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
376 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
375 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
374 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
373 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
366 N_204 3 -1 0 1 5 -1 -1 3 0 21
362 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 3 0 21
356 RST_DLY_0_ 3 -1 5 1 5 -1 -1 3 0 21
350 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
326 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21
320 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
319 dsack1_int_0_un1_n 3 -1 2 1 7 -1 -1 3 0 21
318 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21
317 dsack1_int_0_un3_n 3 -1 2 1 7 -1 -1 3 0 21
299 N_153_0 3 -1 5 1 2 -1 -1 3 0 21
297 cpu_est_0_2__un0_n 3 -1 0 1 6 -1 -1 3 0 21
294 vma_int_0_un0_n 3 -1 0 1 3 -1 -1 3 0 21
382 RN_RW 3 70 6 1 6 70 -1 2 0 21
380 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
372 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
371 un1_bgack_030_int7_2_0 3 -1 7 1 7 -1 -1 2 0 21
367 N_208 3 -1 7 1 5 -1 -1 2 0 21
364 N_318_0 3 -1 2 1 2 -1 -1 2 0 21
359 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21
358 RST_DLY_2_ 3 -1 5 1 5 -1 -1 2 0 21
357 RST_DLY_1_ 3 -1 5 1 5 -1 -1 2 0 21
352 N_218_i 3 -1 5 1 5 -1 -1 2 0 21
351 N_246_i 3 -1 1 1 1 -1 -1 2 0 21
349 N_245_i 3 -1 0 1 1 -1 -1 2 0 21
324 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21
316 N_171_i 3 -1 0 1 5 -1 -1 2 0 21
310 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
304 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21
303 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
302 pos_clk_un26_bgack_030_int_i_1_i_n 3 -1 0 1 2 -1 -1 2 0 21
300 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
370 N_345 3 -1 7 1 5 -1 -1 1 0 21
369 N_305 3 -1 7 1 5 -1 -1 1 0 21
368 N_209 3 -1 5 1 5 -1 -1 1 0 21
346 CLK_000_D_12_ 3 -1 3 1 2 -1 -1 1 0 21
345 CLK_000_D_9_ 3 -1 3 1 6 -1 -1 1 0 21
344 CLK_000_D_8_ 3 -1 5 1 3 -1 -1 1 0 21
343 CLK_000_D_7_ 3 -1 1 1 5 -1 -1 1 0 21
342 CLK_000_D_6_ 3 -1 0 1 1 -1 -1 1 0 21
341 CLK_000_D_5_ 3 -1 3 1 0 -1 -1 1 0 21
340 CLK_000_D_4_ 3 -1 2 1 3 -1 -1 1 0 21
339 CLK_000_D_3_ 3 -1 5 1 2 -1 -1 1 0 21
338 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21
337 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21
336 IPL_D0_1_ 3 -1 4 1 1 -1 -1 1 0 21
334 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21
331 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21
323 inst_VPA_D 3 -1 6 1 0 -1 -1 1 0 21
301 pos_clk_un3_as_030_d0_i_n 3 -1 6 1 2 -1 -1 1 0 21
298 N_152_0 3 -1 1 1 2 -1 -1 1 0 21
296 N_340_i 3 -1 6 1 0 -1 -1 1 0 21
293 N_225 3 -1 6 1 1 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 4 6 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 4 6 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 4 6 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 4 6 7 58 -1
57 FC_1_ 1 -1 -1 3 4 6 7 57 -1
56 FC_0_ 1 -1 -1 3 4 6 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 3 67 -1
66 IPL_0_ 1 -1 -1 2 0 1 66 -1
63 CLK_030 1 -1 -1 2 1 2 63 -1
55 IPL_1_ 1 -1 -1 2 1 4 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 6 35 -1
29 DTACK 1 -1 -1 1 6 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 1 10 -1
145 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 4 5 6 40 -1 1 0 21
79 RW_000 5 371 7 3 2 4 6 79 -1 4 0 21
68 A_0_ 5 367 6 2 1 2 68 -1 3 0 21
70 RW 5 376 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
28 BG_000 5 372 3 0 28 -1 4 0 21
8 IPL_030_2_ 5 370 1 0 8 -1 4 0 21
7 IPL_030_0_ 5 369 1 0 7 -1 4 0 21
34 VMA 5 375 3 0 34 -1 3 0 21
80 DSACK1 5 374 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
6 IPL_030_1_ 5 368 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
82 BGACK_030 5 373 7 0 82 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
328 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21
373 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 1 0 21
329 CLK_000_D_0_ 3 -1 3 6 0 1 2 3 5 7 -1 -1 1 0 21
324 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21
347 SM_AMIGA_6_ 3 -1 0 5 0 1 2 5 7 -1 -1 3 0 21
358 SM_AMIGA_i_7_ 3 -1 0 4 0 5 6 7 -1 -1 4 0 21
307 inst_AS_030_D0 3 -1 4 4 3 4 5 6 -1 -1 1 0 21
304 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
303 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
301 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
348 SM_AMIGA_0_ 3 -1 0 3 0 5 7 -1 -1 3 0 21
308 inst_AS_030_000_SYNC 3 -1 6 3 0 3 6 -1 -1 3 0 21
357 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 4 0 21
356 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 4 0 21
351 RST_DLY_1_ 3 -1 5 2 1 5 -1 -1 4 0 21
350 RST_DLY_0_ 3 -1 5 2 1 5 -1 -1 4 0 21
344 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 4 0 21
312 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 4 0 21
375 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
355 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 3 0 21
354 SM_AMIGA_1_ 3 -1 0 2 0 6 -1 -1 3 0 21
349 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21
322 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21
318 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
317 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
314 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21
302 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21
352 RST_DLY_2_ 3 -1 1 2 1 5 -1 -1 2 0 21
343 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
320 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
311 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 2 0 21
305 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
334 CLK_000_D_2_ 3 -1 7 2 0 6 -1 -1 1 0 21
333 IPL_D0_2_ 3 -1 6 2 1 3 -1 -1 1 0 21
331 IPL_D0_0_ 3 -1 6 2 1 3 -1 -1 1 0 21
323 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21
319 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21
309 inst_BGACK_030_INT_D 3 -1 4 2 2 6 -1 -1 1 0 21
372 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
371 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
370 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
369 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
345 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 4 0 21
316 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21
315 dsack1_int_0_un1_n 3 -1 6 1 7 -1 -1 4 0 21
313 dsack1_int_0_un3_n 3 -1 6 1 7 -1 -1 4 0 21
300 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 4 0 21
299 ipl_030_0_1__un1_n 3 -1 3 1 1 -1 -1 4 0 21
298 ipl_030_0_1__un3_n 3 -1 1 1 1 -1 -1 4 0 21
297 pos_clk_un26_bgack_030_int_i_1_i_n 3 -1 2 1 2 -1 -1 4 0 21
296 ipl_030_0_0__un3_n 3 -1 1 1 1 -1 -1 4 0 21
295 N_11 3 -1 7 1 7 -1 -1 4 0 21
367 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
294 vma_int_0_un0_n 3 -1 3 1 3 -1 -1 3 0 21
376 RN_RW 3 70 6 1 6 70 -1 2 0 21
374 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
368 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
366 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
360 N_208 3 -1 0 1 0 -1 -1 2 0 21
359 N_207 3 -1 5 1 0 -1 -1 2 0 21
353 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21
346 N_246_i 3 -1 3 1 1 -1 -1 2 0 21
306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
365 N_345 3 -1 5 1 0 -1 -1 1 0 21
364 N_344 3 -1 7 1 0 -1 -1 1 0 21
363 N_309 3 -1 5 1 0 -1 -1 1 0 21
362 N_305 3 -1 4 1 0 -1 -1 1 0 21
361 N_209 3 -1 0 1 0 -1 -1 1 0 21
342 CLK_000_D_12_ 3 -1 6 1 6 -1 -1 1 0 21
341 CLK_000_D_9_ 3 -1 2 1 2 -1 -1 1 0 21
340 CLK_000_D_8_ 3 -1 1 1 2 -1 -1 1 0 21
339 CLK_000_D_7_ 3 -1 1 1 1 -1 -1 1 0 21
338 CLK_000_D_6_ 3 -1 5 1 1 -1 -1 1 0 21
337 CLK_000_D_5_ 3 -1 7 1 5 -1 -1 1 0 21
336 CLK_000_D_4_ 3 -1 3 1 7 -1 -1 1 0 21
335 CLK_000_D_3_ 3 -1 6 1 3 -1 -1 1 0 21
332 IPL_D0_1_ 3 -1 3 1 3 -1 -1 1 0 21
330 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21
327 inst_DTACK_D0 3 -1 5 1 5 -1 -1 1 0 21
326 CLK_000_D_11_ 3 -1 6 1 6 -1 -1 1 0 21
325 CLK_000_D_10_ 3 -1 2 1 6 -1 -1 1 0 21
321 N_144_i 3 -1 7 1 5 -1 -1 1 0 21
310 N_346_i 3 -1 3 1 5 -1 -1 1 0 21
293 N_225 3 -1 4 1 6 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
67 IPL_2_ 1 -1 -1 3 1 3 6 67 -1
66 IPL_0_ 1 -1 -1 3 1 3 6 66 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
63 CLK_030 1 -1 -1 2 2 6 63 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 2 59 -1
55 IPL_1_ 1 -1 -1 1 3 55 -1
35 VPA 1 -1 -1 1 6 35 -1
29 DTACK 1 -1 -1 1 5 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 3 10 -1
125 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 351 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 356 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
8 IPL_030_2_ 0 1 0 8 -1 10 0 21
7 IPL_030_0_ 0 1 0 7 -1 10 0 21
6 IPL_030_1_ 0 1 0 6 -1 10 0 21
82 BGACK_030 0 7 0 82 -1 5 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
28 BG_000 0 3 0 28 -1 4 0 21
68 A_0_ 5 347 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
353 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 5 0 21
316 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
311 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
295 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 -1 2 3 6 -1 -1 4 0 21
317 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
312 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 1 1 21
345 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 13 1 21
350 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
348 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
303 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21
302 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21
300 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 7 0 21
354 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
352 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
351 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
333 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21
332 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
355 RN_VMA 3 34 3 1 3 34 -1 3 0 21
347 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
341 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
335 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
334 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
356 RN_RW 3 70 6 1 6 70 -1 2 0 21
346 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 1 3 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
330 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
321 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
320 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21
319 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21
314 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
313 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
340 inst_CLK_030_H 3 -1 -1 0 -1 -1 8 0 21
344 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
343 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 1 21
337 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
342 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
336 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
339 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
338 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
329 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
328 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
327 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
326 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
325 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
324 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
323 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
322 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
318 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
315 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
125 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 351 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 356 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
8 IPL_030_2_ 0 1 0 8 -1 10 0 21
7 IPL_030_0_ 0 1 0 7 -1 10 0 21
6 IPL_030_1_ 0 1 0 6 -1 10 0 21
82 BGACK_030 0 7 0 82 -1 5 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
28 BG_000 0 3 0 28 -1 4 0 21
68 A_0_ 5 347 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
353 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 5 0 21
316 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
311 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
295 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 -1 2 3 6 -1 -1 4 0 21
317 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
312 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 1 1 21
345 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 13 1 21
350 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
348 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
303 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21
302 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21
300 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 7 0 21
354 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
352 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
351 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
333 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21
332 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
355 RN_VMA 3 34 3 1 3 34 -1 3 0 21
347 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
341 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
335 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
334 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
356 RN_RW 3 70 6 1 6 70 -1 2 0 21
346 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 1 3 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
330 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
321 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
320 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21
319 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21
314 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
313 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
340 inst_CLK_030_H 3 -1 -1 0 -1 -1 8 0 21
344 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
343 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 1 21
337 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
342 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
336 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
339 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
338 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
329 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
328 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
327 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
326 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
325 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
324 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
323 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
322 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
318 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
315 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
129 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 355 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 360 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
8 IPL_030_2_ 0 1 0 8 -1 10 0 21
7 IPL_030_0_ 0 1 0 7 -1 10 0 21
6 IPL_030_1_ 0 1 0 6 -1 10 0 21
82 BGACK_030 0 7 0 82 -1 5 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
28 BG_000 0 3 0 28 -1 4 0 21
68 A_0_ 5 351 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
357 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 5 0 21
318 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
313 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
319 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
314 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
354 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
347 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 10 0 21
303 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21
302 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21
358 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
356 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
355 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
335 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21
334 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
295 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21
359 RN_VMA 3 34 3 1 3 34 -1 3 0 21
351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
343 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
337 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
336 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
312 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
360 RN_RW 3 70 6 1 6 70 -1 2 0 21
350 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
310 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
332 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
323 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
322 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21
321 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21
316 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
315 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
309 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21
342 inst_CLK_030_H 3 -1 -1 0 -1 -1 8 0 21
300 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
346 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
345 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 1 21
339 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
306 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
344 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
338 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
305 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
341 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
340 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21
333 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
304 N_171_i 3 -1 -1 0 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
349 N_344 3 -1 -1 0 -1 -1 1 0 21
348 N_209 3 -1 -1 0 -1 -1 1 0 21
331 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
330 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
329 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
328 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
327 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
326 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
325 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
324 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
320 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
317 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
311 N_144_i 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
132 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 358 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 363 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
82 BGACK_030 0 7 0 82 -1 5 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
28 BG_000 0 3 0 28 -1 4 0 21
68 A_0_ 5 354 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
8 IPL_030_2_ 0 1 0 8 -1 2 0 21
7 IPL_030_0_ 0 1 0 7 -1 2 0 21
6 IPL_030_1_ 0 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
360 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 5 0 21
320 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
315 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
301 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
321 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
316 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
350 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 7 0 21
304 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21
336 pos_clk_ipl_n 3 -1 -1 1 1 -1 -1 6 0 21
361 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
359 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
358 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
338 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21
337 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
305 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
297 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
295 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21
362 RN_VMA 3 34 3 1 3 34 -1 3 0 21
354 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
346 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
340 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
339 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
314 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
310 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
309 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
296 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
363 RN_RW 3 70 6 1 6 70 -1 2 0 21
357 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
353 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
312 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
299 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
334 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
318 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
317 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
311 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
303 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
298 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21
302 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
349 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
348 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
342 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
308 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
294 pos_clk_un26_bgack_030_int_i_1_i_n 3 -1 -1 0 -1 -1 4 0 21
347 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
341 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
307 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
351 N_208 3 -1 -1 0 -1 -1 2 0 21
345 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
344 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
343 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21
335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
306 N_171_i 3 -1 -1 0 -1 -1 2 0 21
300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
352 N_209 3 -1 -1 0 -1 -1 1 0 21
333 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
332 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
331 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
330 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
329 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
328 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
327 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
326 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
325 IPL_D0_2_ 3 -1 -1 0 -1 -1 1 0 21
324 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21
323 IPL_D0_0_ 3 -1 -1 0 -1 -1 1 0 21
322 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
319 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
313 N_144_i 3 -1 -1 0 -1 -1 1 0 21
293 N_145_i 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
132 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 358 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 363 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
82 BGACK_030 0 7 0 82 -1 5 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
28 BG_000 0 3 0 28 -1 4 0 21
68 A_0_ 5 354 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
8 IPL_030_2_ 0 1 0 8 -1 2 0 21
7 IPL_030_0_ 0 1 0 7 -1 2 0 21
6 IPL_030_1_ 0 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
360 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 5 0 21
320 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
315 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
301 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
321 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
316 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
350 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 7 0 21
304 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21
336 pos_clk_ipl_n 3 -1 -1 1 1 -1 -1 6 0 21
361 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
359 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
358 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
338 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21
337 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
305 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
297 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
295 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21
362 RN_VMA 3 34 3 1 3 34 -1 3 0 21
354 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
346 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
340 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
339 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
314 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
310 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
309 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
296 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
363 RN_RW 3 70 6 1 6 70 -1 2 0 21
357 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
353 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
312 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
299 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
334 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
318 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
317 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
311 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
303 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
298 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21
302 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
349 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
348 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
342 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
308 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
294 pos_clk_un26_bgack_030_int_i_1_i_n 3 -1 -1 0 -1 -1 4 0 21
347 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
341 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
307 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
351 N_208 3 -1 -1 0 -1 -1 2 0 21
345 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
344 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
343 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21
335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
306 N_171_i 3 -1 -1 0 -1 -1 2 0 21
300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
352 N_209 3 -1 -1 0 -1 -1 1 0 21
333 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
332 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
331 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
330 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
329 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
328 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
327 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
326 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
325 IPL_D0_2_ 3 -1 -1 0 -1 -1 1 0 21
324 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21
323 IPL_D0_0_ 3 -1 -1 0 -1 -1 1 0 21
322 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
319 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
313 N_144_i 3 -1 -1 0 -1 -1 1 0 21
293 N_145_i 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
135 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 361 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 366 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
82 BGACK_030 0 7 0 82 -1 5 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
28 BG_000 0 3 0 28 -1 4 0 21
68 A_0_ 5 357 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
8 IPL_030_2_ 0 1 0 8 -1 2 0 21
7 IPL_030_0_ 0 1 0 7 -1 2 0 21
6 IPL_030_1_ 0 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
363 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 5 0 21
320 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
315 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
302 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
321 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
316 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
350 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 6 0 21
336 pos_clk_ipl_n 3 -1 -1 1 1 -1 -1 6 0 21
364 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
362 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
361 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
338 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21
337 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
306 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
298 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
296 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21
357 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
346 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
340 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
339 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
314 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
311 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
310 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
297 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
294 vma_int_0_un0_n 3 -1 -1 1 3 -1 -1 3 0 21
366 RN_RW 3 70 6 1 6 70 -1 2 0 21
360 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
359 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
358 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
356 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
313 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
305 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21
300 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
334 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
318 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
317 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
304 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
299 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21
349 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
348 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
342 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
309 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
295 pos_clk_un26_bgack_030_int_i_1_i_n 3 -1 -1 0 -1 -1 4 0 21
365 RN_VMA 3 34 3 0 34 -1 3 0 21
347 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
341 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
308 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
303 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 3 0 21
351 N_208 3 -1 -1 0 -1 -1 2 0 21
345 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
344 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
343 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21
335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
307 N_171_i 3 -1 -1 0 -1 -1 2 0 21
301 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
355 N_345 3 -1 -1 0 -1 -1 1 0 21
354 N_344 3 -1 -1 0 -1 -1 1 0 21
353 N_305 3 -1 -1 0 -1 -1 1 0 21
352 N_209 3 -1 -1 0 -1 -1 1 0 21
333 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
332 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
331 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
330 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
329 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
328 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
327 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
326 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
325 IPL_D0_2_ 3 -1 -1 0 -1 -1 1 0 21
324 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21
323 IPL_D0_0_ 3 -1 -1 0 -1 -1 1 0 21
322 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
319 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
312 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21
293 N_225 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
141 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21
79 RW_000 5 367 7 3 1 4 6 79 -1 4 0 21
40 BERR 5 -1 4 3 0 2 5 40 -1 1 0 21
68 A_0_ 5 363 6 2 2 6 68 -1 3 0 21
70 RW 5 372 6 2 2 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 369 7 0 82 -1 5 0 21
7 IPL_030_0_ 5 365 1 0 7 -1 5 0 21
6 IPL_030_1_ 5 364 1 0 6 -1 5 0 21
28 BG_000 5 368 3 0 28 -1 4 0 21
8 IPL_030_2_ 5 366 1 0 8 -1 4 0 21
34 VMA 5 371 3 0 34 -1 3 0 21
80 DSACK1 5 370 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
369 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 5 0 21
325 inst_RESET_OUT 3 -1 2 7 0 1 2 3 4 6 7 -1 -1 2 0 21
321 CLK_000_D_1_ 3 -1 7 7 0 2 3 4 5 6 7 -1 -1 1 0 21
326 CLK_000_D_0_ 3 -1 0 6 0 2 3 5 6 7 -1 -1 1 0 21
344 SM_AMIGA_6_ 3 -1 0 4 0 2 6 7 -1 -1 3 0 21
305 inst_AS_030_D0 3 -1 4 4 2 3 4 5 -1 -1 1 0 21
355 SM_AMIGA_i_7_ 3 -1 0 3 0 2 7 -1 -1 5 0 21
301 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
299 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
351 SM_AMIGA_1_ 3 -1 0 3 0 2 5 -1 -1 3 0 21
346 SM_AMIGA_4_ 3 -1 0 3 0 2 5 -1 -1 3 0 21
345 SM_AMIGA_0_ 3 -1 2 3 0 2 7 -1 -1 3 0 21
306 inst_AS_030_000_SYNC 3 -1 2 3 0 2 3 -1 -1 3 0 21
300 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
320 inst_CLK_OUT_PRE_D 3 -1 7 3 1 5 6 -1 -1 1 0 21
307 inst_BGACK_030_INT_D 3 -1 4 3 1 2 6 -1 -1 1 0 21
302 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 1 1 21
353 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 5 0 21
354 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 4 0 21
341 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 4 0 21
310 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 4 0 21
352 SM_AMIGA_5_ 3 -1 0 2 0 2 -1 -1 3 0 21
319 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
316 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
315 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
343 N_246_i 3 -1 3 2 1 3 -1 -1 2 0 21
340 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
318 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21
309 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 2 0 21
304 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21
303 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
331 CLK_000_D_2_ 3 -1 4 2 0 1 -1 -1 1 0 21
330 IPL_D0_2_ 3 -1 5 2 1 3 -1 -1 1 0 21
328 IPL_D0_0_ 3 -1 1 2 1 3 -1 -1 1 0 21
323 CLK_000_D_11_ 3 -1 5 2 3 5 -1 -1 1 0 21
365 RN_IPL_030_0_ 3 7 1 1 1 7 -1 5 0 21
364 RN_IPL_030_1_ 3 6 1 1 1 6 -1 5 0 21
368 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
367 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
347 RST_DLY_0_ 3 -1 2 1 2 -1 -1 4 0 21
342 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 4 0 21
314 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 4 0 21
313 dsack1_int_0_un1_n 3 -1 5 1 7 -1 -1 4 0 21
311 dsack1_int_0_un3_n 3 -1 5 1 7 -1 -1 4 0 21
298 ipl_030_0_2__un3_n 3 -1 3 1 1 -1 -1 4 0 21
297 ipl_030_0_1__un1_n 3 -1 3 1 1 -1 -1 4 0 21
296 pos_clk_un26_bgack_030_int_i_1_i_n 3 -1 6 1 1 -1 -1 4 0 21
295 ipl_030_0_0__un1_n 3 -1 3 1 1 -1 -1 4 0 21
371 RN_VMA 3 34 3 1 5 34 -1 3 0 21
363 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
312 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 3 0 21
294 vma_int_0_un0_n 3 -1 5 1 3 -1 -1 3 0 21
372 RN_RW 3 70 6 1 6 70 -1 2 0 21
370 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
362 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
357 N_208 3 -1 2 1 0 -1 -1 2 0 21
356 N_207 3 -1 5 1 0 -1 -1 2 0 21
350 inst_CLK_030_H 3 -1 1 1 1 -1 -1 2 0 21
349 RST_DLY_2_ 3 -1 2 1 2 -1 -1 2 0 21
348 RST_DLY_1_ 3 -1 2 1 2 -1 -1 2 1 21
361 N_345 3 -1 7 1 0 -1 -1 1 0 21
360 N_344 3 -1 0 1 0 -1 -1 1 0 21
359 N_305 3 -1 0 1 0 -1 -1 1 0 21
358 N_209 3 -1 0 1 0 -1 -1 1 0 21
339 CLK_000_D_12_ 3 -1 3 1 5 -1 -1 1 0 21
338 CLK_000_D_9_ 3 -1 6 1 6 -1 -1 1 0 21
337 CLK_000_D_8_ 3 -1 3 1 6 -1 -1 1 0 21
336 CLK_000_D_7_ 3 -1 7 1 3 -1 -1 1 0 21
335 CLK_000_D_6_ 3 -1 3 1 7 -1 -1 1 0 21
334 CLK_000_D_5_ 3 -1 0 1 3 -1 -1 1 0 21
333 CLK_000_D_4_ 3 -1 1 1 0 -1 -1 1 0 21
332 CLK_000_D_3_ 3 -1 1 1 1 -1 -1 1 0 21
329 IPL_D0_1_ 3 -1 3 1 3 -1 -1 1 0 21
327 inst_CLK_OUT_PRE_50 3 -1 7 1 7 -1 -1 1 0 21
324 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21
322 CLK_000_D_10_ 3 -1 6 1 5 -1 -1 1 0 21
317 inst_VPA_D 3 -1 1 1 5 -1 -1 1 0 21
308 N_346_i 3 -1 5 1 5 -1 -1 1 0 21
293 N_225 3 -1 5 1 2 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1
67 IPL_2_ 1 -1 -1 3 1 3 5 67 -1
58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
66 IPL_0_ 1 -1 -1 2 1 3 66 -1
63 CLK_030 1 -1 -1 2 1 5 63 -1
59 A_1_ 1 -1 -1 2 1 6 59 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
55 IPL_1_ 1 -1 -1 1 3 55 -1
35 VPA 1 -1 -1 1 1 35 -1
29 DTACK 1 -1 -1 1 0 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 0 10 -1
139 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 365 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 370 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
82 BGACK_030 0 7 0 82 -1 5 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
28 BG_000 0 3 0 28 -1 4 0 21
68 A_0_ 5 362 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
8 IPL_030_2_ 0 1 0 8 -1 2 0 21
7 IPL_030_0_ 0 1 0 7 -1 2 0 21
6 IPL_030_1_ 0 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
367 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 5 0 21
322 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
316 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
304 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
323 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
318 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
357 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 5 0 21
308 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 5 0 21
368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
366 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
365 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
356 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21
342 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
341 pos_clk_ipl_n 3 -1 -1 1 1 -1 -1 4 0 21
298 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
295 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21
369 RN_VMA 3 34 3 1 3 34 -1 3 0 21
362 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
352 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
345 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
344 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
315 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
312 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
311 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
297 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
370 RN_RW 3 70 6 1 6 70 -1 2 0 21
364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
361 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
360 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
317 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21
314 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
307 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21
301 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
339 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
320 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
319 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
306 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
299 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21
354 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 5 0 21
296 as_030_000_sync_0_un3_n 3 -1 -1 0 -1 -1 5 0 21
359 N_87 3 -1 -1 0 -1 -1 4 0 21
358 sm_amiga_nss_i_0_4_0__n 3 -1 -1 0 -1 -1 4 0 21
355 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
351 inst_CLK_030_H 3 -1 -1 0 -1 -1 4 0 21
348 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
334 N_297_0 3 -1 -1 0 -1 -1 4 0 21
310 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
302 as_000_dma_0_un1_n 3 -1 -1 0 -1 -1 4 0 21
300 as_000_dma_0_un3_n 3 -1 -1 0 -1 -1 4 0 21
353 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
347 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
309 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
350 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
349 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21
346 N_245_i 3 -1 -1 0 -1 -1 2 0 21
343 N_317_i 3 -1 -1 0 -1 -1 2 0 21
340 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
305 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21
303 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
338 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
337 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
336 N_310_i 3 -1 -1 0 -1 -1 1 0 21
335 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
333 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
332 N_309_i 3 -1 -1 0 -1 -1 1 0 21
331 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
330 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
329 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
328 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
327 IPL_D0_2_ 3 -1 -1 0 -1 -1 1 0 21
326 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21
325 IPL_D0_0_ 3 -1 -1 0 -1 -1 1 0 21
324 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
321 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
313 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21
294 N_291_i 3 -1 -1 0 -1 -1 1 0 21
293 N_92 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
137 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 363 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 368 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
7 IPL_030_0_ 0 1 0 7 -1 5 0 21
6 IPL_030_1_ 0 1 0 6 -1 5 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
28 BG_000 0 3 0 28 -1 4 0 21
8 IPL_030_2_ 0 1 0 8 -1 4 0 21
82 BGACK_030 0 7 0 82 -1 3 0 21
68 A_0_ 5 359 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
365 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21
325 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
320 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
306 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
326 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
321 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
361 RN_IPL_030_0_ 3 7 1 1 1 7 -1 5 0 21
360 RN_IPL_030_1_ 3 6 1 1 1 6 -1 5 0 21
357 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 5 0 21
366 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
364 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
363 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
356 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21
342 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
312 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
301 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
299 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21
296 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
295 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21
293 ipl_030_0_0__un1_n 3 -1 -1 1 1 -1 -1 4 0 21
367 RN_VMA 3 34 3 1 3 34 -1 3 0 21
359 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
351 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
345 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
344 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
319 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
316 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
315 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
300 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
368 RN_RW 3 70 6 1 6 70 -1 2 0 21
358 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
343 N_246_i 3 -1 -1 1 1 -1 -1 2 0 21
318 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
311 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21
303 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
297 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21
340 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
331 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
329 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21
323 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
322 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
309 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
302 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21
353 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 5 0 21
355 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
354 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 -1 0 -1 -1 4 0 21
347 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
314 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
304 N_80_i 3 -1 -1 0 -1 -1 4 0 21
352 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
346 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
313 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
350 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
349 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
348 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21
341 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
308 N_325_i 3 -1 -1 0 -1 -1 2 0 21
307 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21
305 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
294 N_191_i 3 -1 -1 0 -1 -1 2 0 21
339 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
338 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
337 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
336 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
335 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
334 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
333 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
332 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
330 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21
328 N_297_i 3 -1 -1 0 -1 -1 1 0 21
327 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
324 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
317 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21
310 N_326_i 3 -1 -1 0 -1 -1 1 0 21
298 pos_clk_un28_as_030_d0_i_n 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
55 IPL_1_ 1 -1 -1 0 55 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
139 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 365 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 370 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
28 BG_000 0 3 0 28 -1 4 0 21
8 IPL_030_2_ 0 1 0 8 -1 4 0 21
7 IPL_030_0_ 0 1 0 7 -1 4 0 21
82 BGACK_030 0 7 0 82 -1 3 0 21
68 A_0_ 5 361 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
6 IPL_030_1_ 0 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
367 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21
326 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
321 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
307 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
327 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
322 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
366 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
365 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
364 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
363 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
358 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 4 0 21
357 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21
343 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
313 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
303 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21
302 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
300 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21
297 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
296 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21
295 ipl_030_0_1__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
293 ipl_030_0_0__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
369 RN_VMA 3 34 3 1 3 34 -1 3 0 21
361 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
352 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
346 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
345 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
320 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
317 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
316 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
301 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
370 RN_RW 3 70 6 1 6 70 -1 2 0 21
362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
360 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
344 N_246_i 3 -1 -1 1 1 -1 -1 2 0 21
319 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
312 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21
304 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
298 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21
341 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
332 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
330 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21
324 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
323 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
310 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
356 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
355 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 -1 0 -1 -1 4 0 21
354 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
349 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21
348 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
315 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
305 N_80_i 3 -1 -1 0 -1 -1 4 0 21
353 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
347 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
314 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
351 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
350 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
309 N_325_i 3 -1 -1 0 -1 -1 2 0 21
308 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21
306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
294 N_191_i 3 -1 -1 0 -1 -1 2 0 21
359 N_310_i 3 -1 -1 0 -1 -1 1 0 21
340 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
339 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
338 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
337 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
336 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
335 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
334 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
333 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
331 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21
329 N_297_i 3 -1 -1 0 -1 -1 1 0 21
328 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
325 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
318 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21
311 N_326_i 3 -1 -1 0 -1 -1 1 0 21
299 pos_clk_un28_as_030_d0_i_n 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
55 IPL_1_ 1 -1 -1 0 55 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
139 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 365 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 370 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
28 BG_000 0 3 0 28 -1 4 0 21
8 IPL_030_2_ 0 1 0 8 -1 4 0 21
7 IPL_030_0_ 0 1 0 7 -1 4 0 21
82 BGACK_030 0 7 0 82 -1 3 0 21
68 A_0_ 5 361 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
6 IPL_030_1_ 0 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
367 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21
326 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
321 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
307 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
327 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
322 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
366 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
365 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
364 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
363 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
358 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 4 0 21
357 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21
343 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
313 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
303 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21
297 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
296 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21
295 ipl_030_0_1__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
293 ipl_030_0_0__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
369 RN_VMA 3 34 3 1 3 34 -1 3 0 21
361 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
345 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
320 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
317 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
316 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
302 cpu_est_1_ 3 -1 -1 1 3 -1 -1 3 0 21
300 cpu_est_3_ 3 -1 -1 1 3 -1 -1 3 0 21
370 RN_RW 3 70 6 1 6 70 -1 2 0 21
362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
360 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
352 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 2 0 21
346 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 2 0 21
344 N_246_i 3 -1 -1 1 1 -1 -1 2 0 21
319 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
312 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21
304 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
301 cpu_est_0_ 3 -1 -1 1 3 -1 -1 2 0 21
298 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21
341 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
332 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
330 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21
324 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
323 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
310 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
355 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 -1 0 -1 -1 4 0 21
354 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
349 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21
315 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
305 N_80_i 3 -1 -1 0 -1 -1 4 0 21
356 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
348 RST_DLY_0_ 3 -1 -1 0 -1 -1 3 0 21
347 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
314 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
353 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 2 0 21
351 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
350 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
309 N_325_i 3 -1 -1 0 -1 -1 2 0 21
308 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21
306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
294 N_191_i 3 -1 -1 0 -1 -1 2 0 21
359 N_310_i 3 -1 -1 0 -1 -1 1 0 21
340 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
339 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
338 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
337 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
336 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
335 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
334 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
333 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
331 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21
329 N_297_i 3 -1 -1 0 -1 -1 1 0 21
328 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
325 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
318 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21
311 N_326_i 3 -1 -1 0 -1 -1 1 0 21
299 pos_clk_un28_as_030_d0_i_n 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
55 IPL_1_ 1 -1 -1 0 55 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
147 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
79 RW_000 5 373 7 3 0 4 6 79 -1 3 0 21
68 A_0_ 5 369 6 2 1 2 68 -1 3 0 21
70 RW 5 378 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
80 DSACK1 5 376 7 0 80 -1 3 0 21
34 VMA 5 377 3 0 34 -1 3 0 21
28 BG_000 5 374 3 0 28 -1 3 0 21
8 IPL_030_2_ 5 372 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 371 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 370 1 0 6 -1 3 0 21
82 BGACK_030 5 375 7 0 82 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
375 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 2 0 21
329 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21
367 N_310_i 3 -1 3 5 0 1 3 5 6 -1 -1 1 0 21
362 pos_clk_bgack_030_int_pre5_i_n 3 -1 3 5 0 3 5 6 7 -1 -1 1 0 21
309 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21
349 SM_AMIGA_6_ 3 -1 5 4 1 2 5 7 -1 -1 2 0 21
364 SM_AMIGA_i_7_ 3 -1 0 3 2 5 7 -1 -1 3 0 21
356 SM_AMIGA_1_ 3 -1 5 3 0 5 7 -1 -1 2 0 21
310 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 2 0 21
324 inst_CLK_OUT_PRE_D 3 -1 7 3 1 2 6 -1 -1 1 0 21
352 RST_DLY_0_ 3 -1 3 2 1 3 -1 -1 3 0 21
323 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
319 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
303 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 3 0 21
301 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21
357 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 2 0 21
353 RST_DLY_1_ 3 -1 1 2 1 3 -1 -1 2 0 21
351 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 2 0 21
350 SM_AMIGA_0_ 3 -1 0 2 5 7 -1 -1 2 0 21
347 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 2 0 21
345 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
322 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
317 CYCLE_DMA_0_ 3 -1 0 2 0 6 -1 -1 2 0 21
314 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 2 0 21
311 N_325_i 3 -1 5 2 0 5 -1 -1 2 0 21
305 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
304 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 2 0 21
302 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 2 0 21
336 CLK_000_D_2_ 3 -1 5 2 4 5 -1 -1 1 0 21
327 CLK_000_D_11_ 3 -1 2 2 2 7 -1 -1 1 0 21
325 CLK_000_D_1_ 3 -1 3 2 3 5 -1 -1 1 0 21
321 inst_VPA_D 3 -1 6 2 1 3 -1 -1 1 0 21
312 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21
377 RN_VMA 3 34 3 1 3 34 -1 3 0 21
376 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
374 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
373 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
372 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
369 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
366 cpu_est_0_2__un0_n 3 -1 3 1 6 -1 -1 3 0 21
365 S0__clk_un22_bgack_030_int_i_0_i 3 -1 6 1 0 -1 -1 3 0 21
360 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
318 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21
315 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 3 0 21
308 N_324_i 3 -1 5 1 0 -1 -1 3 0 21
306 N_80_i 3 -1 5 1 0 -1 -1 3 0 21
294 N_314 3 -1 5 1 5 -1 -1 3 0 21
378 RN_RW 3 70 6 1 6 70 -1 2 0 21
368 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
361 N_303_0 3 -1 0 1 0 -1 -1 2 0 21
359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 2 0 21
358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 2 0 21
355 inst_CLK_030_H 3 -1 0 1 0 -1 -1 2 0 21
354 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21
348 N_246_i 3 -1 1 1 1 -1 -1 2 0 21
346 N_245_i 3 -1 2 1 1 -1 -1 2 0 21
316 N_112_i 3 -1 3 1 1 -1 -1 2 0 21
307 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
299 N_341_i 3 -1 2 1 7 -1 -1 2 0 21
298 vma_int_0_un3_n 3 -1 3 1 3 -1 -1 2 0 21
297 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21
296 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
293 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
363 N_319_i 3 -1 1 1 5 -1 -1 1 0 21
344 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21
343 CLK_000_D_9_ 3 -1 4 1 0 -1 -1 1 0 21
342 CLK_000_D_8_ 3 -1 0 1 4 -1 -1 1 0 21
341 CLK_000_D_7_ 3 -1 5 1 0 -1 -1 1 0 21
340 CLK_000_D_6_ 3 -1 2 1 5 -1 -1 1 0 21
339 CLK_000_D_5_ 3 -1 5 1 2 -1 -1 1 0 21
338 CLK_000_D_4_ 3 -1 6 1 5 -1 -1 1 0 21
337 CLK_000_D_3_ 3 -1 4 1 6 -1 -1 1 0 21
335 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21
334 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21
333 IPL_D0_0_ 3 -1 2 1 2 -1 -1 1 0 21
332 N_297_i 3 -1 3 1 5 -1 -1 1 0 21
331 inst_CLK_OUT_PRE_50 3 -1 7 1 7 -1 -1 1 0 21
330 CLK_000_D_0_ 3 -1 5 1 3 -1 -1 1 0 21
328 inst_DTACK_D0 3 -1 2 1 1 -1 -1 1 0 21
326 CLK_000_D_10_ 3 -1 0 1 2 -1 -1 1 0 21
313 N_326_i 3 -1 5 1 0 -1 -1 1 0 21
300 pos_clk_un28_as_030_d0_i_n 3 -1 7 1 2 -1 -1 1 0 21
295 N_191_i 3 -1 7 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 6 67 -1
66 IPL_0_ 1 -1 -1 2 1 2 66 -1
63 CLK_030 1 -1 -1 2 0 2 63 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 2 59 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
35 VPA 1 -1 -1 1 6 35 -1
29 DTACK 1 -1 -1 1 2 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 5 10 -1
147 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 1 5 7 40 -1 1 0 21
79 RW_000 5 373 7 3 4 5 6 79 -1 3 0 21
70 RW 5 378 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21
68 A_0_ 5 369 6 1 5 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 375 7 0 82 -1 3 0 21
80 DSACK1 5 376 7 0 80 -1 3 0 21
34 VMA 5 377 3 0 34 -1 3 0 21
28 BG_000 5 374 3 0 28 -1 3 0 21
8 IPL_030_2_ 5 372 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 371 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 370 1 0 6 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
375 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
329 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
330 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21
325 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21
309 inst_AS_030_D0 3 -1 7 5 0 1 3 4 7 -1 -1 1 0 21
356 SM_AMIGA_1_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21
349 SM_AMIGA_6_ 3 -1 0 4 0 1 5 7 -1 -1 3 0 21
362 pos_clk_bgack_030_int_pre5_i_n 3 -1 7 4 2 3 5 7 -1 -1 1 0 21
357 SM_AMIGA_5_ 3 -1 0 3 0 2 5 -1 -1 3 0 21
350 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
302 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
314 inst_AS_000_DMA 3 -1 6 3 5 6 7 -1 -1 2 0 21
327 CLK_000_D_11_ 3 -1 4 3 0 1 7 -1 -1 1 0 21
312 inst_BGACK_030_INT_D 3 -1 5 3 0 2 6 -1 -1 1 0 21
365 S0__clk_un22_bgack_030_int_i_0_i 3 -1 2 2 5 6 -1 -1 3 0 21
364 SM_AMIGA_i_7_ 3 -1 2 2 0 7 -1 -1 3 0 21
359 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21
352 RST_DLY_0_ 3 -1 2 2 2 6 -1 -1 3 0 21
351 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21
323 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21
320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
319 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
317 CYCLE_DMA_0_ 3 -1 6 2 2 6 -1 -1 3 0 21
315 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 3 0 21
303 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21
301 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
358 SM_AMIGA_3_ 3 -1 0 2 0 3 -1 -1 2 0 21
354 RST_DLY_2_ 3 -1 2 2 2 6 -1 -1 2 0 21
353 RST_DLY_1_ 3 -1 2 2 2 6 -1 -1 2 0 21
347 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 2 0 21
345 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
322 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
311 N_325_i 3 -1 3 2 0 2 -1 -1 2 0 21
310 inst_AS_030_000_SYNC 3 -1 0 2 0 3 -1 -1 2 0 21
305 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21
304 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 2 0 21
367 N_310_i 3 -1 7 2 2 3 -1 -1 1 0 21
336 CLK_000_D_2_ 3 -1 7 2 0 5 -1 -1 1 0 21
331 inst_CLK_OUT_PRE_50 3 -1 0 2 0 5 -1 -1 1 0 21
326 CLK_000_D_10_ 3 -1 5 2 1 4 -1 -1 1 0 21
324 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21
321 inst_VPA_D 3 -1 0 2 3 6 -1 -1 1 0 21
377 RN_VMA 3 34 3 1 3 34 -1 3 0 21
376 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
374 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
373 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
372 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
369 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
366 cpu_est_0_2__un0_n 3 -1 3 1 3 -1 -1 3 0 21
360 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
318 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21
308 N_324_i 3 -1 0 1 2 -1 -1 3 0 21
306 N_80_i 3 -1 5 1 2 -1 -1 3 0 21
294 N_314 3 -1 5 1 0 -1 -1 3 0 21
378 RN_RW 3 70 6 1 6 70 -1 2 0 21
368 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
361 N_303_0 3 -1 6 1 5 -1 -1 2 0 21
355 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21
348 N_246_i 3 -1 1 1 1 -1 -1 2 0 21
346 N_245_i 3 -1 1 1 1 -1 -1 2 0 21
316 N_112_i 3 -1 6 1 2 -1 -1 2 0 21
307 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
299 N_341_i 3 -1 1 1 7 -1 -1 2 0 21
298 vma_int_0_un3_n 3 -1 6 1 3 -1 -1 2 0 21
297 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21
296 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
295 N_191_i 3 -1 7 1 2 -1 -1 2 0 21
293 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
363 N_319_i 3 -1 3 1 0 -1 -1 1 0 21
344 CLK_000_D_12_ 3 -1 0 1 7 -1 -1 1 0 21
343 CLK_000_D_9_ 3 -1 2 1 5 -1 -1 1 0 21
342 CLK_000_D_8_ 3 -1 5 1 2 -1 -1 1 0 21
341 CLK_000_D_7_ 3 -1 2 1 5 -1 -1 1 0 21
340 CLK_000_D_6_ 3 -1 3 1 2 -1 -1 1 0 21
339 CLK_000_D_5_ 3 -1 5 1 3 -1 -1 1 0 21
338 CLK_000_D_4_ 3 -1 6 1 5 -1 -1 1 0 21
337 CLK_000_D_3_ 3 -1 5 1 6 -1 -1 1 0 21
335 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21
334 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21
333 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21
332 N_297_i 3 -1 3 1 0 -1 -1 1 0 21
328 inst_DTACK_D0 3 -1 1 1 3 -1 -1 1 0 21
313 N_326_i 3 -1 0 1 2 -1 -1 1 0 21
300 pos_clk_un28_as_030_d0_i_n 3 -1 7 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 5 67 -1
66 IPL_0_ 1 -1 -1 2 1 3 66 -1
63 CLK_030 1 -1 -1 2 1 6 63 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 1 6 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 0 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 3 10 -1
150 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 4 0 4 5 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 2 5 6 40 -1 1 0 21
79 RW_000 5 375 7 3 0 4 6 79 -1 3 0 21
70 RW 5 380 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 5 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 5 6 30 -1 1 0 21
68 A_0_ 5 381 6 1 3 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 377 7 0 82 -1 3 0 21
34 VMA 5 379 3 0 34 -1 3 0 21
80 DSACK1 5 378 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 376 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 374 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 373 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 372 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
377 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
331 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
332 CLK_000_D_0_ 3 -1 5 6 0 2 3 5 6 7 -1 -1 1 0 21
327 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21
312 inst_AS_030_D0 3 -1 7 6 0 2 3 4 5 6 -1 -1 1 0 21
351 SM_AMIGA_6_ 3 -1 0 5 0 2 3 5 7 -1 -1 3 0 21
366 SM_AMIGA_i_7_ 3 -1 2 3 0 2 7 -1 -1 3 0 21
358 SM_AMIGA_1_ 3 -1 5 3 2 5 6 -1 -1 3 0 21
352 SM_AMIGA_0_ 3 -1 6 3 2 6 7 -1 -1 3 0 21
308 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
314 inst_AS_030_000_SYNC 3 -1 0 3 0 2 3 -1 -1 2 0 21
324 N_106_i 3 -1 7 3 1 3 6 -1 -1 1 0 21
315 inst_BGACK_030_INT_D 3 -1 7 3 0 1 6 -1 -1 1 0 21
361 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 3 0 21
359 SM_AMIGA_5_ 3 -1 0 2 0 2 -1 -1 3 0 21
354 RST_DLY_0_ 3 -1 6 2 1 6 -1 -1 3 0 21
353 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21
321 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
320 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
306 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21
302 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
360 SM_AMIGA_3_ 3 -1 2 2 2 3 -1 -1 2 0 21
356 RST_DLY_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
355 RST_DLY_1_ 3 -1 1 2 1 6 -1 -1 2 0 21
350 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21
348 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21
316 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 2 0 21
311 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21
309 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
337 CLK_000_D_2_ 3 -1 7 2 0 2 -1 -1 1 0 21
333 inst_CLK_OUT_PRE_50 3 -1 2 2 0 2 -1 -1 1 0 21
329 CLK_000_D_11_ 3 -1 1 2 1 6 -1 -1 1 0 21
326 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21
293 N_89_i 3 -1 7 2 5 7 -1 -1 1 0 21
381 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
379 RN_VMA 3 34 3 1 3 34 -1 3 0 21
375 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
369 S0__clk_un22_bgack_030_int_i_0_i 3 -1 5 1 0 -1 -1 3 0 21
367 N_280_i_1 3 -1 1 1 1 -1 -1 3 0 21
365 N_143_0 3 -1 5 1 2 -1 -1 3 0 21
363 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
325 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21
319 CYCLE_DMA_1_ 3 -1 5 1 5 -1 -1 3 0 21
318 CYCLE_DMA_0_ 3 -1 5 1 5 -1 -1 3 0 21
305 N_244_i 3 -1 5 1 2 -1 -1 3 0 21
304 cpu_est_0_ 3 -1 3 1 3 -1 -1 3 0 21
298 as_000_int_0_un3_n 3 -1 5 1 5 -1 -1 3 0 21
297 N_3 3 -1 0 1 5 -1 -1 3 0 21
295 dsack1_int_0_un1_n 3 -1 6 1 7 -1 -1 3 0 21
294 dsack1_int_0_un3_n 3 -1 6 1 7 -1 -1 3 0 21
380 RN_RW 3 70 6 1 6 70 -1 2 0 21
378 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
376 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
374 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
373 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
372 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
370 ds_000_dma_0_un1_n 3 -1 0 1 0 -1 -1 2 0 21
368 N_232 3 -1 3 1 2 -1 -1 2 0 21
357 inst_CLK_030_H 3 -1 0 1 0 -1 -1 2 0 21
349 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21
345 N_246_i 3 -1 5 1 1 -1 -1 2 0 21
343 N_245_i 3 -1 5 1 1 -1 -1 2 0 21
323 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21
313 N_337_i 3 -1 1 1 6 -1 -1 2 0 21
310 N_178_0 3 -1 3 1 2 -1 -1 2 0 21
303 N_322_i 3 -1 2 1 2 -1 -1 2 0 21
301 N_323_i 3 -1 6 1 2 -1 -1 2 0 21
299 as_000_int_0_un1_n 3 -1 5 1 5 -1 -1 2 0 21
364 N_155_i 3 -1 7 1 0 -1 -1 1 0 21
362 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 0 1 0 -1 -1 1 0 21
347 CLK_000_D_12_ 3 -1 6 1 6 -1 -1 1 0 21
346 CLK_000_D_9_ 3 -1 2 1 5 -1 -1 1 0 21
344 CLK_000_D_8_ 3 -1 4 1 2 -1 -1 1 0 21
342 CLK_000_D_7_ 3 -1 0 1 4 -1 -1 1 0 21
341 CLK_000_D_6_ 3 -1 1 1 0 -1 -1 1 0 21
340 CLK_000_D_5_ 3 -1 2 1 1 -1 -1 1 0 21
339 CLK_000_D_4_ 3 -1 5 1 2 -1 -1 1 0 21
338 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21
336 IPL_D0_2_ 3 -1 7 1 1 -1 -1 1 0 21
335 IPL_D0_1_ 3 -1 0 1 5 -1 -1 1 0 21
334 IPL_D0_0_ 3 -1 5 1 5 -1 -1 1 0 21
330 inst_DTACK_D0 3 -1 6 1 3 -1 -1 1 0 21
328 CLK_000_D_10_ 3 -1 5 1 1 -1 -1 1 0 21
322 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21
317 inst_DS_000_DMA 3 -1 5 1 0 -1 -1 1 0 21
307 vma_int_0_un1_n 3 -1 3 1 3 -1 -1 1 0 21
300 N_248_i 3 -1 2 1 2 -1 -1 1 0 21
296 N_149_i 3 -1 3 1 1 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
55 IPL_1_ 1 -1 -1 3 0 1 5 55 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 7 67 -1
66 IPL_0_ 1 -1 -1 2 1 5 66 -1
63 CLK_030 1 -1 -1 2 0 1 63 -1
59 A_1_ 1 -1 -1 2 0 1 59 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 6 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 5 10 -1
147 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 1 5 7 40 -1 1 0 21
79 RW_000 5 373 7 3 4 5 6 79 -1 3 0 21
70 RW 5 378 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21
68 A_0_ 5 369 6 1 5 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 375 7 0 82 -1 3 0 21
80 DSACK1 5 376 7 0 80 -1 3 0 21
34 VMA 5 377 3 0 34 -1 3 0 21
28 BG_000 5 374 3 0 28 -1 3 0 21
8 IPL_030_2_ 5 372 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 371 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 370 1 0 6 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
375 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
329 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
330 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21
325 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21
309 inst_AS_030_D0 3 -1 7 5 0 1 3 4 7 -1 -1 1 0 21
356 SM_AMIGA_1_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21
349 SM_AMIGA_6_ 3 -1 0 4 0 1 5 7 -1 -1 3 0 21
362 pos_clk_bgack_030_int_pre5_i_n 3 -1 7 4 2 3 5 7 -1 -1 1 0 21
357 SM_AMIGA_5_ 3 -1 0 3 0 2 5 -1 -1 3 0 21
350 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
302 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
314 inst_AS_000_DMA 3 -1 6 3 5 6 7 -1 -1 2 0 21
327 CLK_000_D_11_ 3 -1 4 3 0 1 7 -1 -1 1 0 21
312 inst_BGACK_030_INT_D 3 -1 5 3 0 2 6 -1 -1 1 0 21
365 S0__clk_un22_bgack_030_int_i_0_i 3 -1 2 2 5 6 -1 -1 3 0 21
364 SM_AMIGA_i_7_ 3 -1 2 2 0 7 -1 -1 3 0 21
359 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21
352 RST_DLY_0_ 3 -1 2 2 2 6 -1 -1 3 0 21
351 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21
323 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21
320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
319 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
317 CYCLE_DMA_0_ 3 -1 6 2 2 6 -1 -1 3 0 21
315 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 3 0 21
303 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21
301 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
358 SM_AMIGA_3_ 3 -1 0 2 0 3 -1 -1 2 0 21
354 RST_DLY_2_ 3 -1 2 2 2 6 -1 -1 2 0 21
353 RST_DLY_1_ 3 -1 2 2 2 6 -1 -1 2 0 21
347 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 2 0 21
345 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
322 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
311 N_325_i 3 -1 3 2 0 2 -1 -1 2 0 21
310 inst_AS_030_000_SYNC 3 -1 0 2 0 3 -1 -1 2 0 21
305 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21
304 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 2 0 21
367 N_310_i 3 -1 7 2 2 3 -1 -1 1 0 21
336 CLK_000_D_2_ 3 -1 7 2 0 5 -1 -1 1 0 21
331 inst_CLK_OUT_PRE_50 3 -1 0 2 0 5 -1 -1 1 0 21
326 CLK_000_D_10_ 3 -1 5 2 1 4 -1 -1 1 0 21
324 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21
321 inst_VPA_D 3 -1 0 2 3 6 -1 -1 1 0 21
377 RN_VMA 3 34 3 1 3 34 -1 3 0 21
376 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
374 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
373 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
372 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
369 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
366 cpu_est_0_2__un0_n 3 -1 3 1 3 -1 -1 3 0 21
360 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
318 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21
308 N_324_i 3 -1 0 1 2 -1 -1 3 0 21
306 N_80_i 3 -1 5 1 2 -1 -1 3 0 21
294 N_314 3 -1 5 1 0 -1 -1 3 0 21
378 RN_RW 3 70 6 1 6 70 -1 2 0 21
368 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
361 N_303_0 3 -1 6 1 5 -1 -1 2 0 21
355 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21
348 N_246_i 3 -1 1 1 1 -1 -1 2 0 21
346 N_245_i 3 -1 1 1 1 -1 -1 2 0 21
316 N_112_i 3 -1 6 1 2 -1 -1 2 0 21
307 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
299 N_341_i 3 -1 1 1 7 -1 -1 2 0 21
298 vma_int_0_un3_n 3 -1 6 1 3 -1 -1 2 0 21
297 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21
296 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
295 N_191_i 3 -1 7 1 2 -1 -1 2 0 21
293 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
363 N_319_i 3 -1 3 1 0 -1 -1 1 0 21
344 CLK_000_D_12_ 3 -1 0 1 7 -1 -1 1 0 21
343 CLK_000_D_9_ 3 -1 2 1 5 -1 -1 1 0 21
342 CLK_000_D_8_ 3 -1 5 1 2 -1 -1 1 0 21
341 CLK_000_D_7_ 3 -1 2 1 5 -1 -1 1 0 21
340 CLK_000_D_6_ 3 -1 3 1 2 -1 -1 1 0 21
339 CLK_000_D_5_ 3 -1 5 1 3 -1 -1 1 0 21
338 CLK_000_D_4_ 3 -1 6 1 5 -1 -1 1 0 21
337 CLK_000_D_3_ 3 -1 5 1 6 -1 -1 1 0 21
335 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21
334 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21
333 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21
332 N_297_i 3 -1 3 1 0 -1 -1 1 0 21
328 inst_DTACK_D0 3 -1 1 1 3 -1 -1 1 0 21
313 N_326_i 3 -1 0 1 2 -1 -1 1 0 21
300 pos_clk_un28_as_030_d0_i_n 3 -1 7 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 5 67 -1
66 IPL_0_ 1 -1 -1 2 1 3 66 -1
63 CLK_030 1 -1 -1 2 1 6 63 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 1 6 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 0 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 3 10 -1
145 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 4 0 3 4 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
79 RW_000 5 368 7 3 1 4 6 79 -1 3 0 21
81 AS_030 5 -1 7 3 4 5 7 81 -1 1 0 21
31 UDS_000 5 -1 3 3 0 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 1 30 -1 1 0 21
68 A_0_ 5 374 6 1 2 68 -1 3 0 21
70 RW 5 373 6 1 7 70 -1 2 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 370 7 0 82 -1 3 0 21
80 DSACK1 5 371 7 0 80 -1 3 0 21
34 VMA 5 372 3 0 34 -1 3 0 21
28 BG_000 5 369 3 0 28 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
8 IPL_030_2_ 5 367 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 376 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 375 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
370 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
326 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
327 CLK_000_D_0_ 3 -1 5 5 2 3 5 6 7 -1 -1 1 0 21
322 CLK_000_D_1_ 3 -1 7 5 2 3 5 6 7 -1 -1 1 0 21
307 inst_AS_030_D0 3 -1 5 5 0 3 4 5 7 -1 -1 1 0 21
296 N_162_i 3 -1 7 4 0 3 5 7 -1 -1 1 0 21
358 SM_AMIGA_i_7_ 3 -1 2 3 0 5 7 -1 -1 3 0 21
353 SM_AMIGA_3_ 3 -1 2 3 2 3 5 -1 -1 3 0 21
351 SM_AMIGA_1_ 3 -1 2 3 2 5 7 -1 -1 3 0 21
344 SM_AMIGA_6_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
316 SIZE_DMA_1_ 3 -1 0 3 0 6 7 -1 -1 3 0 21
315 SIZE_DMA_0_ 3 -1 0 3 0 6 7 -1 -1 3 0 21
311 inst_AS_000_DMA 3 -1 0 3 0 1 7 -1 -1 2 0 21
308 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 2 0 21
321 inst_CLK_OUT_PRE_D 3 -1 1 3 0 1 6 -1 -1 1 0 21
354 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 3 0 21
352 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 3 0 21
346 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21
345 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21
343 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
320 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
313 CYCLE_DMA_0_ 3 -1 3 2 0 3 -1 -1 3 0 21
304 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
303 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 3 0 21
302 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
301 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21
341 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21
319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21
305 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
300 pos_clk_un24_bgack_030_int_i_0_i_n 3 -1 0 2 0 1 -1 -1 2 0 21
355 N_161_i 3 -1 7 2 2 6 -1 -1 1 0 21
332 CLK_000_D_2_ 3 -1 7 2 3 5 -1 -1 1 0 21
324 CLK_000_D_11_ 3 -1 1 2 2 7 -1 -1 1 0 21
323 CLK_000_D_10_ 3 -1 2 2 1 7 -1 -1 1 0 21
312 inst_DS_000_DMA 3 -1 0 2 0 1 -1 -1 1 0 21
310 inst_BGACK_030_INT_D 3 -1 7 2 0 6 -1 -1 1 0 21
374 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
372 RN_VMA 3 34 3 1 3 34 -1 3 0 21
371 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
369 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
368 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
364 sm_amiga_nss_i_0_5_0__n 3 -1 5 1 2 -1 -1 3 0 21
363 sm_amiga_nss_i_0_1_0__n 3 -1 2 1 2 -1 -1 3 0 21
347 RST_DLY_0_ 3 -1 6 1 6 -1 -1 3 0 21
314 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
376 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
375 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
373 RN_RW 3 70 6 1 6 70 -1 2 0 21
367 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
366 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
360 G_117 3 -1 5 1 6 -1 -1 2 0 21
359 G_116 3 -1 1 1 6 -1 -1 2 0 21
357 N_189_i 3 -1 3 1 2 -1 -1 2 0 21
350 inst_CLK_030_H 3 -1 1 1 1 -1 -1 2 0 21
349 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21
348 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 0 21
342 pos_clk_ipl_n 3 -1 6 1 1 -1 -1 2 0 21
317 N_218_i 3 -1 3 1 2 -1 -1 2 0 21
309 N_225_i 3 -1 6 1 6 -1 -1 2 0 21
299 N_310_i 3 -1 7 1 5 -1 -1 2 0 21
294 ds_000_dma_0_un0_n 3 -1 1 1 0 -1 -1 2 0 21
293 ds_000_dma_0_un1_n 3 -1 1 1 0 -1 -1 2 0 21
365 N_393 3 -1 4 1 0 -1 -1 1 0 21
362 N_332 3 -1 7 1 2 -1 -1 1 0 21
361 N_376 3 -1 7 1 2 -1 -1 1 0 21
356 N_175_i 3 -1 3 1 6 -1 -1 1 0 21
340 CLK_000_D_12_ 3 -1 2 1 7 -1 -1 1 0 21
339 CLK_000_D_9_ 3 -1 5 1 2 -1 -1 1 0 21
338 CLK_000_D_8_ 3 -1 3 1 5 -1 -1 1 0 21
337 CLK_000_D_7_ 3 -1 5 1 3 -1 -1 1 0 21
336 CLK_000_D_6_ 3 -1 5 1 5 -1 -1 1 0 21
335 CLK_000_D_5_ 3 -1 6 1 5 -1 -1 1 0 21
334 CLK_000_D_4_ 3 -1 5 1 6 -1 -1 1 0 21
333 CLK_000_D_3_ 3 -1 3 1 5 -1 -1 1 0 21
331 IPL_D0_2_ 3 -1 6 1 6 -1 -1 1 0 21
330 IPL_D0_1_ 3 -1 4 1 5 -1 -1 1 0 21
329 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21
328 inst_CLK_OUT_PRE_50 3 -1 1 1 1 -1 -1 1 0 21
325 inst_DTACK_D0 3 -1 0 1 3 -1 -1 1 0 21
318 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21
298 N_169_0 3 -1 0 1 7 -1 -1 1 0 21
297 N_307_i 3 -1 1 1 0 -1 -1 1 0 21
295 N_264_i 3 -1 3 1 3 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
55 IPL_1_ 1 -1 -1 3 1 4 5 55 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 6 67 -1
66 IPL_0_ 1 -1 -1 2 1 2 66 -1
63 CLK_030 1 -1 -1 2 0 1 63 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 0 59 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 0 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 5 10 -1
149 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
79 RW_000 5 375 7 3 3 4 6 79 -1 3 0 21
68 A_0_ 5 371 6 2 1 3 68 -1 3 0 21
70 RW 5 380 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 377 7 0 82 -1 3 0 21
28 BG_000 5 376 3 0 28 -1 3 0 21
80 DSACK1 5 378 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
34 VMA 5 379 3 0 34 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
8 IPL_030_2_ 5 374 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 373 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 372 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
377 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
332 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21
353 SM_AMIGA_6_ 3 -1 5 5 0 1 3 5 7 -1 -1 3 0 21
333 CLK_000_D_0_ 3 -1 5 5 0 2 3 5 7 -1 -1 1 0 21
327 CLK_000_D_1_ 3 -1 7 5 0 2 3 5 7 -1 -1 1 0 21
310 inst_AS_030_D0 3 -1 7 5 0 2 4 6 7 -1 -1 1 0 21
366 SM_AMIGA_i_7_ 3 -1 5 4 0 2 5 7 -1 -1 3 0 21
328 N_313_i 3 -1 7 4 1 5 6 7 -1 -1 1 0 21
354 SM_AMIGA_0_ 3 -1 7 3 2 5 7 -1 -1 3 0 21
306 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
313 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 2 0 21
314 inst_BGACK_030_INT_D 3 -1 7 3 0 2 6 -1 -1 1 0 21
362 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 3 0 21
361 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
359 inst_BG_000_PRE 3 -1 6 2 3 6 -1 -1 3 0 21
355 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21
324 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21
321 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
319 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
317 CYCLE_DMA_0_ 3 -1 2 2 1 2 -1 -1 3 0 21
307 cpu_est_2_ 3 -1 0 2 0 6 -1 -1 3 0 21
304 cpu_est_0_ 3 -1 0 2 0 6 -1 -1 3 0 21
303 cpu_est_3_ 3 -1 0 2 0 6 -1 -1 3 0 21
379 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
363 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 2 0 21
352 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21
350 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
316 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 2 0 21
315 inst_AS_000_DMA 3 -1 3 2 3 7 -1 -1 2 0 21
308 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21
368 N_121_i 3 -1 7 2 0 3 -1 -1 1 0 21
329 CLK_000_D_10_ 3 -1 2 2 4 6 -1 -1 1 0 21
325 inst_CLK_OUT_PRE_D 3 -1 6 2 1 6 -1 -1 1 0 21
376 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
375 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
371 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
367 N_302_i_1 3 -1 3 1 3 -1 -1 3 0 21
365 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
364 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
356 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21
341 N_244_i 3 -1 0 1 5 -1 -1 3 0 21
320 N_131_0 3 -1 5 1 2 -1 -1 3 0 21
318 CYCLE_DMA_1_ 3 -1 1 1 1 -1 -1 3 0 21
312 N_138_0 3 -1 6 1 7 -1 -1 3 0 21
293 cpu_est_2_2__n 3 -1 6 1 0 -1 -1 3 0 21
380 RN_RW 3 70 6 1 6 70 -1 2 0 21
378 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
374 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
373 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
372 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
370 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
360 inst_CLK_030_H 3 -1 3 1 3 -1 -1 2 0 21
358 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21
357 RST_DLY_1_ 3 -1 3 1 3 -1 -1 2 0 21
351 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21
349 N_248_i 3 -1 1 1 1 -1 -1 2 0 21
347 N_247_i 3 -1 1 1 1 -1 -1 2 0 21
323 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21
309 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
305 pos_clk_un22_bgack_030_int_i_0_0_n 3 -1 1 1 3 -1 -1 2 0 21
302 N_252_i 3 -1 5 1 5 -1 -1 2 0 21
301 N_253_i 3 -1 5 1 5 -1 -1 2 0 21
300 ds_000_dma_0_un1_n 3 -1 3 1 2 -1 -1 2 0 21
299 N_242_i 3 -1 0 1 5 -1 -1 2 0 21
298 ds_000_dma_0_un3_n 3 -1 3 1 2 -1 -1 2 0 21
296 pos_clk_un24_clk_000_pe_n 3 -1 0 1 3 -1 -1 2 0 21
295 N_238_i 3 -1 7 1 5 -1 -1 2 0 21
369 N_270 3 -1 0 1 0 -1 -1 1 0 21
348 CLK_000_D_12_ 3 -1 6 1 6 -1 -1 1 0 21
346 CLK_000_D_9_ 3 -1 6 1 2 -1 -1 1 0 21
345 CLK_000_D_8_ 3 -1 5 1 6 -1 -1 1 0 21
344 CLK_000_D_7_ 3 -1 2 1 5 -1 -1 1 0 21
343 CLK_000_D_6_ 3 -1 6 1 2 -1 -1 1 0 21
342 CLK_000_D_5_ 3 -1 2 1 6 -1 -1 1 0 21
340 CLK_000_D_4_ 3 -1 0 1 2 -1 -1 1 0 21
339 CLK_000_D_3_ 3 -1 5 1 0 -1 -1 1 0 21
338 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21
337 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21
336 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21
335 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
334 inst_CLK_OUT_PRE_50 3 -1 6 1 6 -1 -1 1 0 21
331 inst_DTACK_D0 3 -1 5 1 0 -1 -1 1 0 21
330 CLK_000_D_11_ 3 -1 4 1 6 -1 -1 1 0 21
326 N_262_i 3 -1 6 1 1 -1 -1 1 0 21
322 inst_VPA_D 3 -1 2 1 0 -1 -1 1 0 21
311 N_372_i_0 3 -1 7 1 0 -1 -1 1 0 21
297 N_265_i 3 -1 5 1 5 -1 -1 1 0 21
294 N_254_i 3 -1 5 1 5 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 4 5 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 0 1 67 -1
63 CLK_030 1 -1 -1 2 3 6 63 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A_1_ 1 -1 -1 1 2 59 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
35 VPA 1 -1 -1 1 2 35 -1
29 DTACK 1 -1 -1 1 5 29 -1
20 BG_030 1 -1 -1 1 6 20 -1
10 CLK_000 1 -1 -1 1 5 10 -1
147 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 1 5 7 40 -1 1 0 21
79 RW_000 5 373 7 3 4 5 6 79 -1 3 0 21
70 RW 5 378 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21
68 A_0_ 5 369 6 1 5 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 375 7 0 82 -1 3 0 21
80 DSACK1 5 376 7 0 80 -1 3 0 21
34 VMA 5 377 3 0 34 -1 3 0 21
28 BG_000 5 374 3 0 28 -1 3 0 21
8 IPL_030_2_ 5 372 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 371 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 370 1 0 6 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
375 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
329 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
330 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21
325 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21
309 inst_AS_030_D0 3 -1 7 5 0 1 3 4 7 -1 -1 1 0 21
356 SM_AMIGA_1_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21
349 SM_AMIGA_6_ 3 -1 0 4 0 1 5 7 -1 -1 3 0 21
362 pos_clk_bgack_030_int_pre5_i_n 3 -1 7 4 2 3 5 7 -1 -1 1 0 21
357 SM_AMIGA_5_ 3 -1 0 3 0 2 5 -1 -1 3 0 21
350 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
302 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
314 inst_AS_000_DMA 3 -1 6 3 5 6 7 -1 -1 2 0 21
327 CLK_000_D_11_ 3 -1 4 3 0 1 7 -1 -1 1 0 21
312 inst_BGACK_030_INT_D 3 -1 5 3 0 2 6 -1 -1 1 0 21
365 S0__clk_un22_bgack_030_int_i_0_i 3 -1 2 2 5 6 -1 -1 3 0 21
364 SM_AMIGA_i_7_ 3 -1 2 2 0 7 -1 -1 3 0 21
359 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21
352 RST_DLY_0_ 3 -1 2 2 2 6 -1 -1 3 0 21
351 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21
323 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21
320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
319 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
317 CYCLE_DMA_0_ 3 -1 6 2 2 6 -1 -1 3 0 21
315 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 3 0 21
303 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21
301 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
358 SM_AMIGA_3_ 3 -1 0 2 0 3 -1 -1 2 0 21
354 RST_DLY_2_ 3 -1 2 2 2 6 -1 -1 2 0 21
353 RST_DLY_1_ 3 -1 2 2 2 6 -1 -1 2 0 21
347 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 2 0 21
345 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
322 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
311 N_325_i 3 -1 3 2 0 2 -1 -1 2 0 21
310 inst_AS_030_000_SYNC 3 -1 0 2 0 3 -1 -1 2 0 21
305 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21
304 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 2 0 21
367 N_310_i 3 -1 7 2 2 3 -1 -1 1 0 21
336 CLK_000_D_2_ 3 -1 7 2 0 5 -1 -1 1 0 21
331 inst_CLK_OUT_PRE_50 3 -1 0 2 0 5 -1 -1 1 0 21
326 CLK_000_D_10_ 3 -1 5 2 1 4 -1 -1 1 0 21
324 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21
321 inst_VPA_D 3 -1 0 2 3 6 -1 -1 1 0 21
377 RN_VMA 3 34 3 1 3 34 -1 3 0 21
376 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
374 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
373 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
372 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
369 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
366 cpu_est_0_2__un0_n 3 -1 3 1 3 -1 -1 3 0 21
360 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
318 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21
308 N_324_i 3 -1 0 1 2 -1 -1 3 0 21
306 N_80_i 3 -1 5 1 2 -1 -1 3 0 21
294 N_314 3 -1 5 1 0 -1 -1 3 0 21
378 RN_RW 3 70 6 1 6 70 -1 2 0 21
368 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
361 N_303_0 3 -1 6 1 5 -1 -1 2 0 21
355 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21
348 N_246_i 3 -1 1 1 1 -1 -1 2 0 21
346 N_245_i 3 -1 1 1 1 -1 -1 2 0 21
316 N_112_i 3 -1 6 1 2 -1 -1 2 0 21
307 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
299 N_341_i 3 -1 1 1 7 -1 -1 2 0 21
298 vma_int_0_un3_n 3 -1 6 1 3 -1 -1 2 0 21
297 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21
296 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
295 N_191_i 3 -1 7 1 2 -1 -1 2 0 21
293 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
363 N_319_i 3 -1 3 1 0 -1 -1 1 0 21
344 CLK_000_D_12_ 3 -1 0 1 7 -1 -1 1 0 21
343 CLK_000_D_9_ 3 -1 2 1 5 -1 -1 1 0 21
342 CLK_000_D_8_ 3 -1 5 1 2 -1 -1 1 0 21
341 CLK_000_D_7_ 3 -1 2 1 5 -1 -1 1 0 21
340 CLK_000_D_6_ 3 -1 3 1 2 -1 -1 1 0 21
339 CLK_000_D_5_ 3 -1 5 1 3 -1 -1 1 0 21
338 CLK_000_D_4_ 3 -1 6 1 5 -1 -1 1 0 21
337 CLK_000_D_3_ 3 -1 5 1 6 -1 -1 1 0 21
335 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21
334 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21
333 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21
332 N_297_i 3 -1 3 1 0 -1 -1 1 0 21
328 inst_DTACK_D0 3 -1 1 1 3 -1 -1 1 0 21
313 N_326_i 3 -1 0 1 2 -1 -1 1 0 21
300 pos_clk_un28_as_030_d0_i_n 3 -1 7 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 5 67 -1
66 IPL_0_ 1 -1 -1 2 1 3 66 -1
63 CLK_030 1 -1 -1 2 1 6 63 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 1 6 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 0 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 3 10 -1
137 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 363 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 368 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
7 IPL_030_0_ 0 1 0 7 -1 5 0 21
6 IPL_030_1_ 0 1 0 6 -1 5 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
28 BG_000 0 3 0 28 -1 4 0 21
8 IPL_030_2_ 0 1 0 8 -1 4 0 21
82 BGACK_030 0 7 0 82 -1 3 0 21
68 A_0_ 5 359 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
365 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21
325 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
320 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
306 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
326 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
321 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
361 RN_IPL_030_0_ 3 7 1 1 1 7 -1 5 0 21
360 RN_IPL_030_1_ 3 6 1 1 1 6 -1 5 0 21
357 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 5 0 21
366 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
364 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
363 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
356 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21
342 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
312 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
301 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
299 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21
296 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
295 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21
293 ipl_030_0_0__un1_n 3 -1 -1 1 1 -1 -1 4 0 21
367 RN_VMA 3 34 3 1 3 34 -1 3 0 21
359 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
351 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
345 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
344 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
319 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
316 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
315 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
300 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
368 RN_RW 3 70 6 1 6 70 -1 2 0 21
358 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
343 N_246_i 3 -1 -1 1 1 -1 -1 2 0 21
318 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
311 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21
303 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
297 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21
340 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
331 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
329 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21
323 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
322 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
309 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
302 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21
353 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 5 0 21
355 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
354 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 -1 0 -1 -1 4 0 21
347 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
314 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
304 N_80_i 3 -1 -1 0 -1 -1 4 0 21
352 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
346 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
313 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
350 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
349 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
348 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21
341 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
308 N_325_i 3 -1 -1 0 -1 -1 2 0 21
307 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21
305 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
294 N_191_i 3 -1 -1 0 -1 -1 2 0 21
339 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
338 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
337 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
336 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
335 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
334 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
333 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
332 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
330 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21
328 N_297_i 3 -1 -1 0 -1 -1 1 0 21
327 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
324 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
317 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21
310 N_326_i 3 -1 -1 0 -1 -1 1 0 21
298 pos_clk_un28_as_030_d0_i_n 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
55 IPL_1_ 1 -1 -1 0 55 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
137 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 363 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 368 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
7 IPL_030_0_ 0 1 0 7 -1 5 0 21
6 IPL_030_1_ 0 1 0 6 -1 5 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
28 BG_000 0 3 0 28 -1 4 0 21
8 IPL_030_2_ 0 1 0 8 -1 4 0 21
82 BGACK_030 0 7 0 82 -1 3 0 21
68 A_0_ 5 359 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
365 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21
325 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
320 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
306 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
326 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
321 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
361 RN_IPL_030_0_ 3 7 1 1 1 7 -1 5 0 21
360 RN_IPL_030_1_ 3 6 1 1 1 6 -1 5 0 21
357 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 5 0 21
366 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
364 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
363 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
356 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21
342 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
312 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
301 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
299 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21
296 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
295 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21
293 ipl_030_0_0__un1_n 3 -1 -1 1 1 -1 -1 4 0 21
367 RN_VMA 3 34 3 1 3 34 -1 3 0 21
359 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
351 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
345 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
344 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
319 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
316 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
315 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
300 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
368 RN_RW 3 70 6 1 6 70 -1 2 0 21
358 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
343 N_246_i 3 -1 -1 1 1 -1 -1 2 0 21
318 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
311 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21
303 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
297 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21
340 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
331 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
329 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21
323 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
322 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
309 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
302 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21
353 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 5 0 21
355 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
354 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 -1 0 -1 -1 4 0 21
347 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
314 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
304 N_80_i 3 -1 -1 0 -1 -1 4 0 21
352 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
346 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
313 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
350 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
349 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
348 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21
341 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
308 N_325_i 3 -1 -1 0 -1 -1 2 0 21
307 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21
305 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
294 N_191_i 3 -1 -1 0 -1 -1 2 0 21
339 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
338 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
337 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
336 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
335 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
334 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
333 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
332 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
330 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21
328 N_297_i 3 -1 -1 0 -1 -1 1 0 21
327 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
324 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
317 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21
310 N_326_i 3 -1 -1 0 -1 -1 1 0 21
298 pos_clk_un28_as_030_d0_i_n 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
55 IPL_1_ 1 -1 -1 0 55 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
139 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 365 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 370 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
28 BG_000 0 3 0 28 -1 4 0 21
8 IPL_030_2_ 0 1 0 8 -1 4 0 21
7 IPL_030_0_ 0 1 0 7 -1 4 0 21
82 BGACK_030 0 7 0 82 -1 3 0 21
68 A_0_ 5 361 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
6 IPL_030_1_ 0 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
367 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21
326 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
321 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
307 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
327 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
322 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
366 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
365 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
364 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
363 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
358 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 4 0 21
357 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21
343 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
313 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
303 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21
302 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
300 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21
297 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
296 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21
295 ipl_030_0_1__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
293 ipl_030_0_0__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
369 RN_VMA 3 34 3 1 3 34 -1 3 0 21
361 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
352 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
346 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
345 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
320 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
317 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
316 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
301 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
370 RN_RW 3 70 6 1 6 70 -1 2 0 21
362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
360 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
344 N_246_i 3 -1 -1 1 1 -1 -1 2 0 21
319 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
312 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21
304 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
298 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21
341 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
332 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
330 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21
324 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
323 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
310 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
356 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
355 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 -1 0 -1 -1 4 0 21
354 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
349 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21
348 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
315 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
305 N_80_i 3 -1 -1 0 -1 -1 4 0 21
353 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
347 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
314 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
351 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
350 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
309 N_325_i 3 -1 -1 0 -1 -1 2 0 21
308 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21
306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
294 N_191_i 3 -1 -1 0 -1 -1 2 0 21
359 N_310_i 3 -1 -1 0 -1 -1 1 0 21
340 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
339 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
338 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
337 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
336 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
335 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
334 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
333 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
331 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21
329 N_297_i 3 -1 -1 0 -1 -1 1 0 21
328 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
325 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
318 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21
311 N_326_i 3 -1 -1 0 -1 -1 1 0 21
299 pos_clk_un28_as_030_d0_i_n 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
55 IPL_1_ 1 -1 -1 0 55 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
139 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 365 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 370 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
28 BG_000 0 3 0 28 -1 4 0 21
8 IPL_030_2_ 0 1 0 8 -1 4 0 21
7 IPL_030_0_ 0 1 0 7 -1 4 0 21
82 BGACK_030 0 7 0 82 -1 3 0 21
68 A_0_ 5 361 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
6 IPL_030_1_ 0 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
367 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21
326 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
321 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
307 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
327 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
322 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
366 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
365 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
364 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
363 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
358 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 4 0 21
357 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21
343 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
313 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
303 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21
302 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
300 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21
297 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
296 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21
295 ipl_030_0_1__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
293 ipl_030_0_0__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
369 RN_VMA 3 34 3 1 3 34 -1 3 0 21
361 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
352 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
346 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
345 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
320 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
317 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
316 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
301 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
370 RN_RW 3 70 6 1 6 70 -1 2 0 21
362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
360 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
344 N_246_i 3 -1 -1 1 1 -1 -1 2 0 21
319 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
312 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21
304 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
298 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21
341 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
332 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
330 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21
324 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
323 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
310 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
356 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
355 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 -1 0 -1 -1 4 0 21
354 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
349 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21
348 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
315 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
305 N_80_i 3 -1 -1 0 -1 -1 4 0 21
353 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
347 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
314 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
351 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
350 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
309 N_325_i 3 -1 -1 0 -1 -1 2 0 21
308 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21
306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
294 N_191_i 3 -1 -1 0 -1 -1 2 0 21
359 N_310_i 3 -1 -1 0 -1 -1 1 0 21
340 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
339 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
338 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
337 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
336 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
335 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
334 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
333 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
331 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21
329 N_297_i 3 -1 -1 0 -1 -1 1 0 21
328 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
325 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
318 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21
311 N_326_i 3 -1 -1 0 -1 -1 1 0 21
299 pos_clk_un28_as_030_d0_i_n 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
55 IPL_1_ 1 -1 -1 0 55 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
139 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 365 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 370 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
28 BG_000 0 3 0 28 -1 4 0 21
8 IPL_030_2_ 0 1 0 8 -1 4 0 21
7 IPL_030_0_ 0 1 0 7 -1 4 0 21
82 BGACK_030 0 7 0 82 -1 3 0 21
68 A_0_ 5 361 6 0 68 -1 3 0 21
34 VMA 0 3 0 34 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
6 IPL_030_1_ 0 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
367 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21
326 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
321 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
307 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
327 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
322 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
366 RN_BG_000 3 28 3 1 3 28 -1 4 0 21
365 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
364 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
363 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
358 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 4 0 21
357 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21
343 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
313 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
303 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21
302 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
300 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21
297 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
296 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21
295 ipl_030_0_1__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
293 ipl_030_0_0__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
369 RN_VMA 3 34 3 1 3 34 -1 3 0 21
361 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
352 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
346 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
345 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
320 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
317 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
316 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
301 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
370 RN_RW 3 70 6 1 6 70 -1 2 0 21
362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
360 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
344 N_246_i 3 -1 -1 1 1 -1 -1 2 0 21
319 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
312 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21
304 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
298 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21
341 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21
332 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
330 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21
324 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21
323 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
310 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
356 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
355 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 -1 0 -1 -1 4 0 21
354 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
349 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21
348 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
315 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
305 N_80_i 3 -1 -1 0 -1 -1 4 0 21
353 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
347 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
314 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
351 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
350 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
309 N_325_i 3 -1 -1 0 -1 -1 2 0 21
308 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21
306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
294 N_191_i 3 -1 -1 0 -1 -1 2 0 21
359 N_310_i 3 -1 -1 0 -1 -1 1 0 21
340 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21
339 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21
338 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
337 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
336 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
335 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
334 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
333 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
331 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21
329 N_297_i 3 -1 -1 0 -1 -1 1 0 21
328 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
325 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
318 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21
311 N_326_i 3 -1 -1 0 -1 -1 1 0 21
299 pos_clk_un28_as_030_d0_i_n 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
55 IPL_1_ 1 -1 -1 0 55 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
147 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 1 5 7 40 -1 1 0 21
79 RW_000 5 373 7 3 4 5 6 79 -1 3 0 21
70 RW 5 378 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21
68 A_0_ 5 369 6 1 5 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 375 7 0 82 -1 3 0 21
80 DSACK1 5 376 7 0 80 -1 3 0 21
34 VMA 5 377 3 0 34 -1 3 0 21
28 BG_000 5 374 3 0 28 -1 3 0 21
8 IPL_030_2_ 5 372 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 371 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 370 1 0 6 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
375 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
329 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
330 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21
325 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21
309 inst_AS_030_D0 3 -1 7 5 0 1 3 4 7 -1 -1 1 0 21
356 SM_AMIGA_1_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21
349 SM_AMIGA_6_ 3 -1 0 4 0 1 5 7 -1 -1 3 0 21
362 pos_clk_bgack_030_int_pre5_i_n 3 -1 7 4 2 3 5 7 -1 -1 1 0 21
357 SM_AMIGA_5_ 3 -1 0 3 0 2 5 -1 -1 3 0 21
350 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
302 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
314 inst_AS_000_DMA 3 -1 6 3 5 6 7 -1 -1 2 0 21
327 CLK_000_D_11_ 3 -1 4 3 0 1 7 -1 -1 1 0 21
312 inst_BGACK_030_INT_D 3 -1 5 3 0 2 6 -1 -1 1 0 21
365 S0__clk_un22_bgack_030_int_i_0_i 3 -1 2 2 5 6 -1 -1 3 0 21
364 SM_AMIGA_i_7_ 3 -1 2 2 0 7 -1 -1 3 0 21
359 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21
352 RST_DLY_0_ 3 -1 2 2 2 6 -1 -1 3 0 21
351 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21
323 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21
320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
319 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
317 CYCLE_DMA_0_ 3 -1 6 2 2 6 -1 -1 3 0 21
315 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 3 0 21
303 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21
301 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
358 SM_AMIGA_3_ 3 -1 0 2 0 3 -1 -1 2 0 21
354 RST_DLY_2_ 3 -1 2 2 2 6 -1 -1 2 0 21
353 RST_DLY_1_ 3 -1 2 2 2 6 -1 -1 2 0 21
347 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 2 0 21
345 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
322 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
311 N_325_i 3 -1 3 2 0 2 -1 -1 2 0 21
310 inst_AS_030_000_SYNC 3 -1 0 2 0 3 -1 -1 2 0 21
305 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21
304 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 2 0 21
367 N_310_i 3 -1 7 2 2 3 -1 -1 1 0 21
336 CLK_000_D_2_ 3 -1 7 2 0 5 -1 -1 1 0 21
331 inst_CLK_OUT_PRE_50 3 -1 0 2 0 5 -1 -1 1 0 21
326 CLK_000_D_10_ 3 -1 5 2 1 4 -1 -1 1 0 21
324 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21
321 inst_VPA_D 3 -1 0 2 3 6 -1 -1 1 0 21
377 RN_VMA 3 34 3 1 3 34 -1 3 0 21
376 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
374 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
373 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
372 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
369 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
366 cpu_est_0_2__un0_n 3 -1 3 1 3 -1 -1 3 0 21
360 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
318 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21
308 N_324_i 3 -1 0 1 2 -1 -1 3 0 21
306 N_80_i 3 -1 5 1 2 -1 -1 3 0 21
294 N_314 3 -1 5 1 0 -1 -1 3 0 21
378 RN_RW 3 70 6 1 6 70 -1 2 0 21
368 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
361 N_303_0 3 -1 6 1 5 -1 -1 2 0 21
355 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21
348 N_246_i 3 -1 1 1 1 -1 -1 2 0 21
346 N_245_i 3 -1 1 1 1 -1 -1 2 0 21
316 N_112_i 3 -1 6 1 2 -1 -1 2 0 21
307 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
299 N_341_i 3 -1 1 1 7 -1 -1 2 0 21
298 vma_int_0_un3_n 3 -1 6 1 3 -1 -1 2 0 21
297 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21
296 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
295 N_191_i 3 -1 7 1 2 -1 -1 2 0 21
293 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
363 N_319_i 3 -1 3 1 0 -1 -1 1 0 21
344 CLK_000_D_12_ 3 -1 0 1 7 -1 -1 1 0 21
343 CLK_000_D_9_ 3 -1 2 1 5 -1 -1 1 0 21
342 CLK_000_D_8_ 3 -1 5 1 2 -1 -1 1 0 21
341 CLK_000_D_7_ 3 -1 2 1 5 -1 -1 1 0 21
340 CLK_000_D_6_ 3 -1 3 1 2 -1 -1 1 0 21
339 CLK_000_D_5_ 3 -1 5 1 3 -1 -1 1 0 21
338 CLK_000_D_4_ 3 -1 6 1 5 -1 -1 1 0 21
337 CLK_000_D_3_ 3 -1 5 1 6 -1 -1 1 0 21
335 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21
334 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21
333 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21
332 N_297_i 3 -1 3 1 0 -1 -1 1 0 21
328 inst_DTACK_D0 3 -1 1 1 3 -1 -1 1 0 21
313 N_326_i 3 -1 0 1 2 -1 -1 1 0 21
300 pos_clk_un28_as_030_d0_i_n 3 -1 7 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 5 67 -1
66 IPL_0_ 1 -1 -1 2 1 3 66 -1
63 CLK_030 1 -1 -1 2 1 6 63 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 1 6 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 0 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 3 10 -1
148 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 4 5 6 7 41 -1 1 0 21
79 RW_000 5 374 7 3 2 4 6 79 -1 3 0 21
40 BERR 5 -1 4 3 0 5 7 40 -1 1 0 21
70 RW 5 379 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 370 6 1 1 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 376 7 0 82 -1 3 0 21
34 VMA 5 378 3 0 34 -1 3 0 21
28 BG_000 5 375 3 0 28 -1 3 0 21
8 IPL_030_2_ 5 373 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 372 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 371 1 0 6 -1 3 0 21
80 DSACK1 5 377 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
376 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
329 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21
330 CLK_000_D_0_ 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21
324 CLK_000_D_1_ 3 -1 7 5 0 2 3 5 7 -1 -1 1 0 21
353 SM_AMIGA_1_ 3 -1 0 4 0 2 5 6 -1 -1 3 0 21
307 inst_AS_030_D0 3 -1 4 4 3 4 5 7 -1 -1 1 0 21
354 SM_AMIGA_5_ 3 -1 5 3 0 2 5 -1 -1 3 0 21
347 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
346 SM_AMIGA_6_ 3 -1 5 3 1 5 7 -1 -1 3 0 21
304 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
301 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 3 0 21
300 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
355 SM_AMIGA_3_ 3 -1 2 3 0 2 5 -1 -1 2 0 21
310 inst_BGACK_030_INT_D 3 -1 4 3 3 5 6 -1 -1 1 0 21
295 pos_clk_bgack_030_int_pre5_i_n 3 -1 7 3 3 5 7 -1 -1 1 0 21
378 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21
359 SM_AMIGA_i_7_ 3 -1 2 2 5 7 -1 -1 3 0 21
356 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21
349 RST_DLY_0_ 3 -1 0 2 0 2 -1 -1 3 0 21
348 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21
345 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
321 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21
317 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
315 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
303 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21
364 N_238 3 -1 0 2 2 5 -1 -1 2 0 21
350 RST_DLY_1_ 3 -1 2 2 0 2 -1 -1 2 0 21
332 inst_CLK_OUT_PRE_25 3 -1 0 2 0 3 -1 -1 2 0 21
320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
312 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 2 0 21
311 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 2 0 21
308 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 2 0 21
306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
305 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
363 N_107_i 3 -1 7 2 0 3 -1 -1 1 0 21
337 CLK_000_D_2_ 3 -1 7 2 4 5 -1 -1 1 0 21
326 CLK_000_D_9_ 3 -1 2 2 5 6 -1 -1 1 0 21
325 CLK_000_D_8_ 3 -1 5 2 2 6 -1 -1 1 0 21
323 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21
318 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21
375 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
374 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
373 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
371 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
370 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
357 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
334 N_240_i 3 -1 0 1 2 -1 -1 3 0 21
316 N_322_i 3 -1 5 1 2 -1 -1 3 0 21
314 CYCLE_DMA_1_ 3 -1 5 1 5 -1 -1 3 0 21
313 CYCLE_DMA_0_ 3 -1 5 1 5 -1 -1 3 0 21
298 N_215_i 3 -1 6 1 7 -1 -1 3 0 21
379 RN_RW 3 70 6 1 6 70 -1 2 0 21
377 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
369 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
367 S0__clk_un22_bgack_030_int_i_0_i 3 -1 5 1 6 -1 -1 2 0 21
361 G_117 3 -1 1 1 1 -1 -1 2 0 21
360 G_116 3 -1 1 1 1 -1 -1 2 0 21
358 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 6 1 2 -1 -1 2 0 21
352 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21
351 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21
344 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21
327 N_226_i 3 -1 0 1 2 -1 -1 2 0 21
319 N_251_i 3 -1 0 1 2 -1 -1 2 0 21
302 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
299 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
297 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21
296 N_336_i 3 -1 5 1 5 -1 -1 2 0 21
294 ds_000_dma_0_un1_n 3 -1 2 1 1 -1 -1 2 0 21
293 ds_000_dma_0_un3_n 3 -1 2 1 1 -1 -1 2 0 21
368 N_342 3 -1 3 1 0 -1 -1 1 0 21
366 N_361 3 -1 4 1 5 -1 -1 1 0 21
365 N_332 3 -1 7 1 2 -1 -1 1 0 21
362 N_154_i 3 -1 3 1 0 -1 -1 1 0 21
343 CLK_000_D_10_ 3 -1 5 1 6 -1 -1 1 0 21
342 CLK_000_D_7_ 3 -1 0 1 5 -1 -1 1 0 21
341 CLK_000_D_6_ 3 -1 6 1 0 -1 -1 1 0 21
340 CLK_000_D_5_ 3 -1 2 1 6 -1 -1 1 0 21
339 CLK_000_D_4_ 3 -1 3 1 2 -1 -1 1 0 21
338 CLK_000_D_3_ 3 -1 4 1 3 -1 -1 1 0 21
336 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21
335 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21
333 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21
331 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21
328 inst_DTACK_D0 3 -1 3 1 0 -1 -1 1 0 21
322 N_253_i 3 -1 5 1 2 -1 -1 1 0 21
309 vma_int_0_un1_n 3 -1 3 1 3 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 2 67 -1
66 IPL_0_ 1 -1 -1 2 1 6 66 -1
63 CLK_030 1 -1 -1 2 2 6 63 -1
59 A_1_ 1 -1 -1 2 3 6 59 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 1 6 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
35 VPA 1 -1 -1 1 0 35 -1
29 DTACK 1 -1 -1 1 3 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 3 10 -1
150 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 4 5 6 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
79 RW_000 5 376 7 2 4 6 79 -1 3 0 21
70 RW 5 381 6 2 6 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 372 6 1 1 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 378 7 0 82 -1 3 0 21
80 DSACK1 5 379 7 0 80 -1 3 0 21
34 VMA 5 380 3 0 34 -1 3 0 21
28 BG_000 5 377 3 0 28 -1 3 0 21
8 IPL_030_2_ 5 375 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 374 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 373 1 0 6 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
378 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
331 inst_RESET_OUT 3 -1 2 7 0 1 2 3 4 6 7 -1 -1 2 0 21
332 CLK_000_D_0_ 3 -1 5 6 0 2 3 5 6 7 -1 -1 1 0 21
326 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21
349 SM_AMIGA_6_ 3 -1 2 5 1 2 5 6 7 -1 -1 3 0 21
350 SM_AMIGA_0_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21
308 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21
296 pos_clk_bgack_030_int_pre5_i_n 3 -1 7 4 0 3 5 7 -1 -1 1 0 21
356 SM_AMIGA_1_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
351 SM_AMIGA_4_ 3 -1 2 3 0 2 5 -1 -1 3 0 21
305 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 3 0 21
302 cpu_est_0_ 3 -1 5 3 0 3 5 -1 -1 3 0 21
301 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 3 0 21
300 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
309 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 2 0 21
380 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21
362 SM_AMIGA_i_7_ 3 -1 5 2 2 7 -1 -1 3 0 21
357 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 3 0 21
352 RST_DLY_0_ 3 -1 3 2 2 3 -1 -1 3 0 21
348 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
322 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21
317 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
316 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
314 CYCLE_DMA_0_ 3 -1 5 2 0 5 -1 -1 3 0 21
358 SM_AMIGA_3_ 3 -1 0 2 0 5 -1 -1 2 0 21
354 RST_DLY_2_ 3 -1 3 2 2 3 -1 -1 2 0 21
353 RST_DLY_1_ 3 -1 2 2 2 3 -1 -1 2 0 21
347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
311 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21
306 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
365 N_107_i 3 -1 7 2 0 3 -1 -1 1 0 21
339 CLK_000_D_2_ 3 -1 0 2 2 5 -1 -1 1 0 21
336 IPL_D0_1_ 3 -1 1 2 0 1 -1 -1 1 0 21
335 IPL_D0_0_ 3 -1 3 2 1 3 -1 -1 1 0 21
328 CLK_000_D_10_ 3 -1 4 2 1 7 -1 -1 1 0 21
327 CLK_000_D_9_ 3 -1 1 2 1 4 -1 -1 1 0 21
324 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21
318 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21
310 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21
379 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
377 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
376 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
375 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
374 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
373 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
372 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
360 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
337 N_240_i 3 -1 0 1 0 -1 -1 3 0 21
315 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
381 RN_RW 3 70 6 1 6 70 -1 2 0 21
371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
369 N_258 3 -1 3 1 0 -1 -1 2 0 21
368 S0__clk_un22_bgack_030_int_i_0_i 3 -1 0 1 6 -1 -1 2 0 21
366 N_238 3 -1 0 1 5 -1 -1 2 0 21
364 G_117 3 -1 0 1 1 -1 -1 2 0 21
363 G_116 3 -1 3 1 1 -1 -1 2 0 21
361 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 6 1 6 -1 -1 2 0 21
355 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21
334 inst_CLK_OUT_PRE_25 3 -1 4 1 4 -1 -1 2 0 21
330 N_226_i 3 -1 3 1 2 -1 -1 2 0 21
321 N_251_i 3 -1 5 1 5 -1 -1 2 0 21
319 N_249_i 3 -1 5 1 5 -1 -1 2 0 21
313 vma_int_0_un3_n 3 -1 0 1 3 -1 -1 2 0 21
312 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 2 0 21
307 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
304 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
303 N_338_i 3 -1 1 1 7 -1 -1 2 0 21
299 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
298 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21
297 N_336_i 3 -1 6 1 2 -1 -1 2 0 21
295 ds_000_dma_0_un1_n 3 -1 6 1 0 -1 -1 2 0 21
294 ds_000_dma_0_un3_n 3 -1 6 1 0 -1 -1 2 0 21
293 N_252_i 3 -1 2 1 5 -1 -1 2 0 21
370 N_342 3 -1 3 1 0 -1 -1 1 0 21
367 N_361 3 -1 7 1 2 -1 -1 1 0 21
346 CLK_000_D_11_ 3 -1 7 1 7 -1 -1 1 0 21
345 CLK_000_D_8_ 3 -1 3 1 1 -1 -1 1 0 21
344 CLK_000_D_7_ 3 -1 5 1 3 -1 -1 1 0 21
343 CLK_000_D_6_ 3 -1 5 1 5 -1 -1 1 0 21
342 CLK_000_D_5_ 3 -1 6 1 5 -1 -1 1 0 21
341 CLK_000_D_4_ 3 -1 5 1 6 -1 -1 1 0 21
340 CLK_000_D_3_ 3 -1 5 1 5 -1 -1 1 0 21
338 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21
333 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
329 inst_DTACK_D0 3 -1 5 1 0 -1 -1 1 0 21
325 N_253_i 3 -1 5 1 5 -1 -1 1 0 21
323 N_337_i 3 -1 5 1 5 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 0 1 67 -1
66 IPL_0_ 1 -1 -1 2 1 3 66 -1
63 CLK_030 1 -1 -1 2 1 6 63 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 0 1 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 6 35 -1
29 DTACK 1 -1 -1 1 5 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 5 10 -1
147 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 1 4 6 7 41 -1 1 0 21
79 RW_000 5 371 7 3 4 5 6 79 -1 3 0 21
81 AS_030 5 -1 7 3 2 4 7 81 -1 1 0 21
40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21
68 A_0_ 5 377 6 2 0 5 68 -1 3 0 21
70 RW 5 376 6 2 5 7 70 -1 2 0 21
31 UDS_000 5 -1 3 2 3 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 3 6 30 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 373 7 0 82 -1 3 0 21
80 DSACK1 5 374 7 0 80 -1 3 0 21
34 VMA 5 375 3 0 34 -1 3 0 21
8 IPL_030_2_ 5 370 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 369 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 378 1 0 6 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 372 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
373 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
329 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21
330 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21
325 CLK_000_D_1_ 3 -1 1 5 0 2 3 5 7 -1 -1 1 0 21
344 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21
310 inst_AS_030_D0 3 -1 2 4 2 3 4 7 -1 -1 1 0 21
351 SM_AMIGA_1_ 3 -1 2 3 2 5 7 -1 -1 3 0 21
319 SIZE_DMA_0_ 3 -1 3 3 3 6 7 -1 -1 3 0 21
356 N_89_i 3 -1 7 3 1 2 7 -1 -1 1 0 21
314 inst_BGACK_030_INT_D 3 -1 7 3 2 3 6 -1 -1 1 0 21
358 SM_AMIGA_i_7_ 3 -1 5 2 2 7 -1 -1 3 0 21
354 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 3 0 21
353 SM_AMIGA_3_ 3 -1 5 2 2 5 -1 -1 3 0 21
352 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 3 0 21
346 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21
345 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21
323 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21
320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
317 CYCLE_DMA_0_ 3 -1 0 2 0 1 -1 -1 3 0 21
306 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21
302 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
301 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
360 G_118 3 -1 1 2 0 1 -1 -1 2 0 21
343 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21
332 inst_CLK_OUT_PRE_25 3 -1 0 2 0 4 -1 -1 2 0 21
322 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
316 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 2 0 21
315 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 2 0 21
312 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 2 0 21
309 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
307 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
367 N_106_i 3 -1 7 2 3 5 -1 -1 1 0 21
336 CLK_000_D_2_ 3 -1 7 2 2 6 -1 -1 1 0 21
334 IPL_D0_1_ 3 -1 0 2 0 1 -1 -1 1 0 21
333 IPL_D0_0_ 3 -1 0 2 0 1 -1 -1 1 0 21
331 inst_CLK_OUT_PRE_50 3 -1 6 2 0 6 -1 -1 1 0 21
327 CLK_000_D_8_ 3 -1 5 2 6 7 -1 -1 1 0 21
326 CLK_000_D_7_ 3 -1 6 2 5 6 -1 -1 1 0 21
324 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21
378 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
377 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
375 RN_VMA 3 34 3 1 3 34 -1 3 0 21
374 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
371 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
370 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
369 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
364 N_241 3 -1 2 1 5 -1 -1 3 0 21
362 N_280_i_1 3 -1 0 1 0 -1 -1 3 0 21
357 N_143_0 3 -1 5 1 2 -1 -1 3 0 21
355 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
348 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21
318 CYCLE_DMA_1_ 3 -1 1 1 1 -1 -1 3 0 21
305 N_137_0 3 -1 0 1 0 -1 -1 3 0 21
304 cpu_est_0_ 3 -1 3 1 3 -1 -1 3 0 21
376 RN_RW 3 70 6 1 6 70 -1 2 0 21
372 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
368 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
366 K0_lk_un22_bgack_030_int_i_0_o2_ 3 -1 1 1 6 -1 -1 2 0 21
359 G_116 3 -1 1 1 1 -1 -1 2 0 21
350 inst_CLK_030_H 3 -1 5 1 5 -1 -1 2 0 21
349 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21
347 RST_DLY_0_ 3 -1 0 1 0 -1 -1 2 0 21
342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21
313 ipl_030_0_0__un1_n 3 -1 0 1 1 -1 -1 2 0 21
311 N_245_i 3 -1 7 1 5 -1 -1 2 0 21
308 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
303 ipl_030_0_2__un1_n 3 -1 1 1 1 -1 -1 2 0 21
300 ds_000_dma_0_un1_n 3 -1 5 1 1 -1 -1 2 0 21
299 ds_000_dma_0_un3_n 3 -1 5 1 1 -1 -1 2 0 21
298 N_166_i 3 -1 3 1 5 -1 -1 2 0 21
297 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 6 1 5 -1 -1 2 0 21
295 N_338_i 3 -1 6 1 7 -1 -1 2 0 21
365 N_322 3 -1 2 1 5 -1 -1 1 0 21
363 N_341 3 -1 5 1 5 -1 -1 1 0 21
361 N_302 3 -1 7 1 5 -1 -1 1 0 21
341 CLK_000_D_9_ 3 -1 7 1 7 -1 -1 1 0 21
340 CLK_000_D_6_ 3 -1 4 1 6 -1 -1 1 0 21
339 CLK_000_D_5_ 3 -1 6 1 4 -1 -1 1 0 21
338 CLK_000_D_4_ 3 -1 6 1 6 -1 -1 1 0 21
337 CLK_000_D_3_ 3 -1 6 1 6 -1 -1 1 0 21
335 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21
328 inst_DTACK_D0 3 -1 3 1 3 -1 -1 1 0 21
321 inst_VPA_D 3 -1 0 1 3 -1 -1 1 0 21
296 vma_int_0_un1_n 3 -1 3 1 3 -1 -1 1 0 21
294 N_155_i 3 -1 2 1 2 -1 -1 1 0 21
293 N_149_i 3 -1 3 1 3 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 6 67 -1
66 IPL_0_ 1 -1 -1 2 0 1 66 -1
63 CLK_030 1 -1 -1 2 5 6 63 -1
59 A_1_ 1 -1 -1 2 3 6 59 -1
55 IPL_1_ 1 -1 -1 2 0 1 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
35 VPA 1 -1 -1 1 0 35 -1
29 DTACK 1 -1 -1 1 3 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 6 10 -1
147 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 1 4 6 7 41 -1 1 0 21
79 RW_000 5 371 7 3 4 5 6 79 -1 3 0 21
81 AS_030 5 -1 7 3 2 4 7 81 -1 1 0 21
40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21
68 A_0_ 5 377 6 2 0 5 68 -1 3 0 21
70 RW 5 376 6 2 5 7 70 -1 2 0 21
31 UDS_000 5 -1 3 2 3 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 3 6 30 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 373 7 0 82 -1 3 0 21
80 DSACK1 5 374 7 0 80 -1 3 0 21
34 VMA 5 375 3 0 34 -1 3 0 21
8 IPL_030_2_ 5 370 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 369 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 378 1 0 6 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 372 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
373 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
329 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21
330 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21
325 CLK_000_D_1_ 3 -1 1 5 0 2 3 5 7 -1 -1 1 0 21
344 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21
310 inst_AS_030_D0 3 -1 2 4 2 3 4 7 -1 -1 1 0 21
351 SM_AMIGA_1_ 3 -1 2 3 2 5 7 -1 -1 3 0 21
319 SIZE_DMA_0_ 3 -1 3 3 3 6 7 -1 -1 3 0 21
356 N_89_i 3 -1 7 3 1 2 7 -1 -1 1 0 21
314 inst_BGACK_030_INT_D 3 -1 7 3 2 3 6 -1 -1 1 0 21
358 SM_AMIGA_i_7_ 3 -1 5 2 2 7 -1 -1 3 0 21
354 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 3 0 21
353 SM_AMIGA_3_ 3 -1 5 2 2 5 -1 -1 3 0 21
352 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 3 0 21
346 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21
345 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21
323 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21
320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
317 CYCLE_DMA_0_ 3 -1 0 2 0 1 -1 -1 3 0 21
306 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21
302 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
301 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
360 G_118 3 -1 1 2 0 1 -1 -1 2 0 21
343 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21
332 inst_CLK_OUT_PRE_25 3 -1 0 2 0 4 -1 -1 2 0 21
322 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
316 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 2 0 21
315 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 2 0 21
312 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 2 0 21
309 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
307 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
367 N_106_i 3 -1 7 2 3 5 -1 -1 1 0 21
336 CLK_000_D_2_ 3 -1 7 2 2 6 -1 -1 1 0 21
334 IPL_D0_1_ 3 -1 0 2 0 1 -1 -1 1 0 21
333 IPL_D0_0_ 3 -1 0 2 0 1 -1 -1 1 0 21
331 inst_CLK_OUT_PRE_50 3 -1 6 2 0 6 -1 -1 1 0 21
327 CLK_000_D_8_ 3 -1 5 2 6 7 -1 -1 1 0 21
326 CLK_000_D_7_ 3 -1 6 2 5 6 -1 -1 1 0 21
324 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21
378 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
377 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
375 RN_VMA 3 34 3 1 3 34 -1 3 0 21
374 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
371 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
370 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
369 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
364 N_241 3 -1 2 1 5 -1 -1 3 0 21
362 N_280_i_1 3 -1 0 1 0 -1 -1 3 0 21
357 N_143_0 3 -1 5 1 2 -1 -1 3 0 21
355 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
348 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21
318 CYCLE_DMA_1_ 3 -1 1 1 1 -1 -1 3 0 21
305 N_137_0 3 -1 0 1 0 -1 -1 3 0 21
304 cpu_est_0_ 3 -1 3 1 3 -1 -1 3 0 21
376 RN_RW 3 70 6 1 6 70 -1 2 0 21
372 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
368 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
366 K0_lk_un22_bgack_030_int_i_0_o2_ 3 -1 1 1 6 -1 -1 2 0 21
359 G_116 3 -1 1 1 1 -1 -1 2 0 21
350 inst_CLK_030_H 3 -1 5 1 5 -1 -1 2 0 21
349 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21
347 RST_DLY_0_ 3 -1 0 1 0 -1 -1 2 0 21
342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21
313 ipl_030_0_0__un1_n 3 -1 0 1 1 -1 -1 2 0 21
311 N_245_i 3 -1 7 1 5 -1 -1 2 0 21
308 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
303 ipl_030_0_2__un1_n 3 -1 1 1 1 -1 -1 2 0 21
300 ds_000_dma_0_un1_n 3 -1 5 1 1 -1 -1 2 0 21
299 ds_000_dma_0_un3_n 3 -1 5 1 1 -1 -1 2 0 21
298 N_166_i 3 -1 3 1 5 -1 -1 2 0 21
297 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 6 1 5 -1 -1 2 0 21
295 N_338_i 3 -1 6 1 7 -1 -1 2 0 21
365 N_322 3 -1 2 1 5 -1 -1 1 0 21
363 N_341 3 -1 5 1 5 -1 -1 1 0 21
361 N_302 3 -1 7 1 5 -1 -1 1 0 21
341 CLK_000_D_9_ 3 -1 7 1 7 -1 -1 1 0 21
340 CLK_000_D_6_ 3 -1 4 1 6 -1 -1 1 0 21
339 CLK_000_D_5_ 3 -1 6 1 4 -1 -1 1 0 21
338 CLK_000_D_4_ 3 -1 6 1 6 -1 -1 1 0 21
337 CLK_000_D_3_ 3 -1 6 1 6 -1 -1 1 0 21
335 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21
328 inst_DTACK_D0 3 -1 3 1 3 -1 -1 1 0 21
321 inst_VPA_D 3 -1 0 1 3 -1 -1 1 0 21
296 vma_int_0_un1_n 3 -1 3 1 3 -1 -1 1 0 21
294 N_155_i 3 -1 2 1 2 -1 -1 1 0 21
293 N_149_i 3 -1 3 1 3 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 6 67 -1
66 IPL_0_ 1 -1 -1 2 0 1 66 -1
63 CLK_030 1 -1 -1 2 5 6 63 -1
59 A_1_ 1 -1 -1 2 3 6 59 -1
55 IPL_1_ 1 -1 -1 2 0 1 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
35 VPA 1 -1 -1 1 0 35 -1
29 DTACK 1 -1 -1 1 3 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 6 10 -1
148 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 6 0 1 2 5 6 7 40 -1 1 0 21
79 RW_000 5 373 7 4 3 4 5 6 79 -1 3 0 21
41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21
81 AS_030 5 -1 7 3 0 4 7 81 -1 1 0 21
68 A_0_ 5 379 6 2 1 6 68 -1 3 0 21
70 RW 5 378 6 2 5 7 70 -1 2 0 21
78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 375 7 0 82 -1 3 0 21
80 DSACK1 5 376 7 0 80 -1 3 0 21
34 VMA 5 377 3 0 34 -1 3 0 21
8 IPL_030_2_ 5 372 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 371 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 370 1 0 6 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 374 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
375 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
330 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21
346 SM_AMIGA_6_ 3 -1 5 6 0 1 2 5 6 7 -1 -1 3 0 21
331 CLK_000_D_0_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21
326 CLK_000_D_1_ 3 -1 6 5 0 2 3 5 7 -1 -1 1 0 21
311 inst_AS_030_D0 3 -1 0 5 0 2 3 4 7 -1 -1 1 0 21
360 SM_AMIGA_i_7_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
347 SM_AMIGA_0_ 3 -1 7 3 0 5 7 -1 -1 3 0 21
312 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 2 0 21
368 N_106_i 3 -1 3 3 3 5 6 -1 -1 1 0 21
358 N_89_i 3 -1 7 3 1 2 7 -1 -1 1 0 21
314 inst_BGACK_030_INT_D 3 -1 5 3 0 3 6 -1 -1 1 0 21
356 SM_AMIGA_2_ 3 -1 5 2 1 5 -1 -1 3 0 21
354 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 3 0 21
353 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
348 SM_AMIGA_4_ 3 -1 5 2 1 5 -1 -1 3 0 21
324 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21
321 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
320 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
306 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 3 0 21
305 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
303 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
302 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
352 inst_CLK_030_H 3 -1 5 2 3 5 -1 -1 2 0 21
345 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 2 0 21
323 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21
317 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 2 0 21
316 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 2 0 21
309 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21
308 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
297 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 2 2 3 5 -1 -1 2 0 21
337 CLK_000_D_2_ 3 -1 7 2 5 6 -1 -1 1 0 21
332 inst_CLK_OUT_PRE_50 3 -1 6 2 2 6 -1 -1 1 0 21
328 CLK_000_D_9_ 3 -1 0 2 6 7 -1 -1 1 0 21
327 CLK_000_D_8_ 3 -1 0 2 0 6 -1 -1 1 0 21
325 inst_CLK_OUT_PRE_D 3 -1 2 2 1 6 -1 -1 1 0 21
379 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
377 RN_VMA 3 34 3 1 3 34 -1 3 0 21
376 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
373 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
372 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
366 N_241 3 -1 1 1 5 -1 -1 3 0 21
364 N_280_i_1 3 -1 0 1 0 -1 -1 3 0 21
359 N_143_0 3 -1 5 1 0 -1 -1 3 0 21
357 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
355 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 3 0 21
350 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21
319 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21
318 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21
307 N_137_0 3 -1 0 1 0 -1 -1 3 0 21
378 RN_RW 3 70 6 1 6 70 -1 2 0 21
374 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
369 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
362 G_117 3 -1 1 1 1 -1 -1 2 0 21
361 G_116 3 -1 1 1 1 -1 -1 2 0 21
351 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21
349 RST_DLY_0_ 3 -1 0 1 0 -1 -1 2 0 21
344 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21
333 inst_CLK_OUT_PRE_25 3 -1 2 1 2 -1 -1 2 0 21
315 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
313 N_245_i 3 -1 7 1 5 -1 -1 2 0 21
310 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
304 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21
301 ds_000_dma_0_un1_n 3 -1 5 1 2 -1 -1 2 0 21
300 ds_000_dma_0_un3_n 3 -1 3 1 2 -1 -1 2 0 21
299 N_166_i 3 -1 3 1 5 -1 -1 2 0 21
296 N_338_i 3 -1 6 1 7 -1 -1 2 0 21
367 N_322 3 -1 5 1 5 -1 -1 1 0 21
365 N_341 3 -1 7 1 5 -1 -1 1 0 21
363 N_302 3 -1 6 1 5 -1 -1 1 0 21
343 CLK_000_D_10_ 3 -1 7 1 7 -1 -1 1 0 21
342 CLK_000_D_7_ 3 -1 2 1 0 -1 -1 1 0 21
341 CLK_000_D_6_ 3 -1 6 1 2 -1 -1 1 0 21
340 CLK_000_D_5_ 3 -1 2 1 6 -1 -1 1 0 21
339 CLK_000_D_4_ 3 -1 3 1 2 -1 -1 1 0 21
338 CLK_000_D_3_ 3 -1 6 1 3 -1 -1 1 0 21
336 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21
335 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21
334 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21
329 inst_DTACK_D0 3 -1 5 1 3 -1 -1 1 0 21
322 inst_VPA_D 3 -1 1 1 3 -1 -1 1 0 21
298 vma_int_0_un1_n 3 -1 3 1 3 -1 -1 1 0 21
295 N_155_i 3 -1 7 1 0 -1 -1 1 0 21
294 N_149_i 3 -1 3 1 3 -1 -1 1 0 21
293 N_303_i 3 -1 6 1 2 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
63 CLK_030 1 -1 -1 3 3 5 6 63 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 2 67 -1
66 IPL_0_ 1 -1 -1 2 1 5 66 -1
59 A_1_ 1 -1 -1 2 0 3 59 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 1 5 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
35 VPA 1 -1 -1 1 1 35 -1
29 DTACK 1 -1 -1 1 5 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 4 10 -1
150 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 2 4 5 7 41 -1 1 0 21
40 BERR 5 -1 4 5 0 2 3 5 7 40 -1 1 0 21
79 RW_000 5 375 7 3 2 4 6 79 -1 3 0 21
68 A_0_ 5 381 6 2 1 2 68 -1 3 0 21
70 RW 5 380 6 2 0 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 5 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 5 6 30 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 374 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 373 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 372 1 0 6 -1 3 0 21
80 DSACK1 5 378 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
34 VMA 5 379 3 0 34 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 376 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
82 BGACK_030 5 377 7 0 82 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
328 inst_RESET_OUT 3 -1 5 8 0 1 2 3 4 5 6 7 -1 -1 2 0 21
377 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 1 0 21
329 CLK_000_D_0_ 3 -1 2 6 0 2 3 5 6 7 -1 -1 1 0 21
324 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21
351 SM_AMIGA_6_ 3 -1 0 5 0 1 2 3 7 -1 -1 3 0 21
354 SM_AMIGA_4_ 3 -1 3 4 0 2 3 6 -1 -1 3 0 21
311 inst_BGACK_030_INT_D 3 -1 3 4 0 2 3 6 -1 -1 1 0 21
308 inst_AS_030_D0 3 -1 4 4 0 3 4 7 -1 -1 1 0 21
364 SM_AMIGA_i_7_ 3 -1 0 3 0 3 7 -1 -1 3 0 21
352 SM_AMIGA_0_ 3 -1 0 3 0 3 7 -1 -1 3 0 21
304 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 3 0 21
303 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 21
367 N_110_i 3 -1 0 3 0 5 6 -1 -1 1 0 21
360 N_111_i 3 -1 7 3 2 5 7 -1 -1 1 0 21
366 S0__clk_un23_bgack_030_int_i_1_0 3 -1 5 2 2 7 -1 -1 3 0 21
363 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 3 0 21
361 SM_AMIGA_5_ 3 -1 3 2 0 3 -1 -1 3 0 21
359 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 3 0 21
321 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
317 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
316 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
302 cpu_est_3_ 3 -1 6 2 5 6 -1 -1 3 0 21
301 cpu_est_2_ 3 -1 6 2 5 6 -1 -1 3 0 21
379 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
362 SM_AMIGA_3_ 3 -1 6 2 0 5 -1 -1 2 0 21
339 N_186_i 3 -1 5 2 0 2 -1 -1 2 0 21
320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
313 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 2 0 21
312 inst_AS_000_DMA 3 -1 7 2 2 7 -1 -1 2 0 21
310 inst_AS_030_000_SYNC 3 -1 0 2 0 3 -1 -1 2 0 21
305 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21
330 inst_CLK_OUT_PRE_50 3 -1 3 2 2 3 -1 -1 1 0 21
326 CLK_000_D_8_ 3 -1 6 2 1 5 -1 -1 1 0 21
325 CLK_000_D_7_ 3 -1 3 2 1 6 -1 -1 1 0 21
323 inst_CLK_OUT_PRE_D 3 -1 2 2 1 6 -1 -1 1 0 21
319 inst_VPA_D 3 -1 5 2 5 6 -1 -1 1 0 21
381 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
375 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
374 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
373 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
372 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
365 N_213 3 -1 5 1 6 -1 -1 3 0 21
355 RST_DLY_0_ 3 -1 5 1 5 -1 -1 3 0 21
350 inst_BGACK_030_INT_PRE 3 -1 5 1 5 -1 -1 3 0 21
349 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 3 0 21
342 N_223_i 3 -1 2 1 0 -1 -1 3 0 21
315 CYCLE_DMA_1_ 3 -1 5 1 5 -1 -1 3 0 21
314 CYCLE_DMA_0_ 3 -1 5 1 5 -1 -1 3 0 21
307 N_163_i 3 -1 0 1 0 -1 -1 3 0 21
300 N_158_i 3 -1 1 1 7 -1 -1 3 0 21
295 N_11_i 3 -1 5 1 7 -1 -1 3 0 21
380 RN_RW 3 70 6 1 6 70 -1 2 0 21
378 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
376 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
368 N_166 3 -1 5 1 5 -1 -1 2 0 21
358 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21
357 RST_DLY_2_ 3 -1 5 1 5 -1 -1 2 0 21
356 RST_DLY_1_ 3 -1 5 1 5 -1 -1 2 0 21
348 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21
346 N_245_i 3 -1 1 1 1 -1 -1 2 0 21
344 N_244_i 3 -1 1 1 1 -1 -1 2 0 21
335 N_174_i 3 -1 7 1 0 -1 -1 2 0 21
331 inst_CLK_OUT_PRE_25 3 -1 2 1 2 -1 -1 2 0 21
318 N_273_i 3 -1 0 1 3 -1 -1 2 0 21
306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
299 ds_000_dma_0_un1_n 3 -1 2 1 6 -1 -1 2 0 21
298 ds_000_dma_0_un3_n 3 -1 2 1 6 -1 -1 2 0 21
297 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21
296 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
294 pos_clk_un9_clk_000_pe_n 3 -1 6 1 3 -1 -1 2 0 21
293 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
370 N_291 3 -1 5 1 5 -1 -1 1 0 21
369 N_123_i 3 -1 3 1 6 -1 -1 1 0 21
353 pos_clk_un23_bgack_030_int_i_1_0_n 3 -1 7 1 2 -1 -1 1 0 21
347 CLK_000_D_9_ 3 -1 5 1 1 -1 -1 1 0 21
345 CLK_000_D_6_ 3 -1 6 1 3 -1 -1 1 0 21
343 CLK_000_D_5_ 3 -1 4 1 6 -1 -1 1 0 21
341 CLK_000_D_4_ 3 -1 6 1 4 -1 -1 1 0 21
340 CLK_000_D_3_ 3 -1 0 1 6 -1 -1 1 0 21
338 CLK_000_D_2_ 3 -1 5 1 0 -1 -1 1 0 21
337 N_277_i 3 -1 0 1 0 -1 -1 1 0 21
336 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21
334 IPL_D0_1_ 3 -1 4 1 1 -1 -1 1 0 21
333 N_226_i 3 -1 0 1 0 -1 -1 1 0 21
332 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21
327 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21
322 N_129_i 3 -1 4 1 0 -1 -1 1 0 21
309 N_296_0 3 -1 0 1 3 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
63 CLK_030 1 -1 -1 3 1 2 7 63 -1
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
66 IPL_0_ 1 -1 -1 2 0 1 66 -1
59 A_1_ 1 -1 -1 2 2 3 59 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 1 4 55 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
35 VPA 1 -1 -1 1 5 35 -1
29 DTACK 1 -1 -1 1 3 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 2 10 -1
144 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 4 5 6 7 41 -1 1 0 21
40 BERR 5 -1 4 5 0 2 5 6 7 40 -1 1 0 21
79 RW_000 5 370 7 3 2 4 6 79 -1 3 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 366 6 1 2 68 -1 3 0 21
70 RW 5 375 6 1 7 70 -1 2 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 372 7 0 82 -1 3 0 21
34 VMA 5 374 3 0 34 -1 3 0 21
8 IPL_030_2_ 5 369 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 368 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 367 1 0 6 -1 3 0 21
80 DSACK1 5 373 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 371 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
372 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
328 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21
329 CLK_000_D_0_ 3 -1 5 6 0 2 3 5 6 7 -1 -1 1 0 21
323 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21
307 inst_AS_030_D0 3 -1 4 5 2 3 4 5 7 -1 -1 1 0 21
352 SM_AMIGA_1_ 3 -1 0 4 0 1 5 6 -1 -1 3 0 21
346 SM_AMIGA_0_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21
345 SM_AMIGA_6_ 3 -1 5 4 0 2 5 7 -1 -1 3 0 21
310 inst_BGACK_030_INT_D 3 -1 4 4 1 3 5 6 -1 -1 1 0 21
358 SM_AMIGA_i_7_ 3 -1 0 3 2 5 7 -1 -1 3 0 21
353 SM_AMIGA_5_ 3 -1 5 3 0 2 5 -1 -1 3 0 21
347 SM_AMIGA_4_ 3 -1 2 3 0 2 5 -1 -1 3 0 21
356 N_322_i 3 -1 7 3 0 5 7 -1 -1 1 0 21
332 N_321_i 3 -1 7 3 0 3 6 -1 -1 1 0 21
355 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21
343 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
321 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
317 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
316 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
315 CYCLE_DMA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21
314 CYCLE_DMA_0_ 3 -1 0 2 0 5 -1 -1 3 0 21
303 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21
302 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
301 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
300 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
354 SM_AMIGA_3_ 3 -1 5 2 3 5 -1 -1 2 0 21
331 inst_CLK_OUT_PRE_25 3 -1 6 2 3 6 -1 -1 2 0 21
319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
311 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 2 0 21
309 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 2 0 21
305 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21
304 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
336 CLK_000_D_2_ 3 -1 7 2 5 7 -1 -1 1 0 21
330 inst_CLK_OUT_PRE_50 3 -1 7 2 6 7 -1 -1 1 0 21
326 CLK_000_D_7_ 3 -1 0 2 1 3 -1 -1 1 0 21
324 CLK_000_D_6_ 3 -1 4 2 0 1 -1 -1 1 0 21
322 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21
374 RN_VMA 3 34 3 1 3 34 -1 3 0 21
370 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
369 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
368 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
367 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
366 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
364 N_98 3 -1 0 1 0 -1 -1 3 0 21
363 sm_amiga_nss_i_0_5_0__n 3 -1 5 1 0 -1 -1 3 0 21
348 RST_DLY_0_ 3 -1 0 1 0 -1 -1 3 0 21
344 inst_BGACK_030_INT_PRE 3 -1 6 1 6 -1 -1 3 0 21
296 N_91_i 3 -1 1 1 7 -1 -1 3 0 21
375 RN_RW 3 70 6 1 6 70 -1 2 0 21
373 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
371 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
365 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
362 N_101 3 -1 3 1 0 -1 -1 2 0 21
361 S0__clk_un23_bgack_030_int_i_0_i 3 -1 0 1 6 -1 -1 2 0 21
360 G_117 3 -1 1 1 1 -1 -1 2 0 21
359 G_116 3 -1 1 1 1 -1 -1 2 0 21
357 pos_clk_un23_bgack_030_int_i_0_i_n 3 -1 6 1 2 -1 -1 2 0 21
351 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21
350 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21
349 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 0 21
342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21
341 N_118_i 3 -1 0 1 0 -1 -1 2 0 21
313 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 2 0 21
308 ds_000_dma_0_un1_n 3 -1 2 1 0 -1 -1 2 0 21
306 ds_000_dma_0_un3_n 3 -1 2 1 0 -1 -1 2 0 21
299 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21
298 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
297 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
295 N_130_i 3 -1 7 1 2 -1 -1 2 0 21
293 N_334 3 -1 3 1 5 -1 -1 2 0 21
340 CLK_000_D_8_ 3 -1 3 1 1 -1 -1 1 0 21
339 CLK_000_D_5_ 3 -1 2 1 4 -1 -1 1 0 21
338 CLK_000_D_4_ 3 -1 5 1 2 -1 -1 1 0 21
337 CLK_000_D_3_ 3 -1 7 1 5 -1 -1 1 0 21
335 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21
334 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21
333 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21
327 inst_DTACK_D0 3 -1 5 1 3 -1 -1 1 0 21
325 pos_clk_un28_as_030_d0_i_n 3 -1 4 1 5 -1 -1 1 0 21
320 N_308_i 3 -1 6 1 3 -1 -1 1 0 21
318 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21
312 N_312_i 3 -1 3 1 6 -1 -1 1 0 21
294 bgack_030_int_0_un1_n 3 -1 6 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
27 BGACK_000 1 -1 -1 3 4 6 7 27 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 2 67 -1
66 IPL_0_ 1 -1 -1 2 1 6 66 -1
63 CLK_030 1 -1 -1 2 1 2 63 -1
59 A_1_ 1 -1 -1 2 1 3 59 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 5 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 5 10 -1
124 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 350 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 355 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
8 IPL_030_2_ 0 1 0 8 -1 10 0 21
7 IPL_030_0_ 0 1 0 7 -1 10 0 21
6 IPL_030_1_ 0 1 0 6 -1 10 0 21
34 VMA 0 3 0 34 -1 7 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
82 BGACK_030 0 7 0 82 -1 3 1 21
68 A_0_ 5 346 6 0 68 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 0 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
352 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 1 21
316 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
311 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
296 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
294 cpu_est_3_ 3 -1 -1 2 3 6 -1 -1 4 0 21
317 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
312 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21
293 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 1 1 21
344 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 13 1 21
349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
303 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21
354 RN_VMA 3 34 3 1 3 34 -1 7 0 21
302 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21
300 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 7 0 21
353 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
331 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
346 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
340 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
334 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
333 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
332 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
295 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
355 RN_RW 3 70 6 1 6 70 -1 2 0 21
351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
345 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
330 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 1 3 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
329 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
322 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
321 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21
320 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21
314 CLK_000_D_9_ 3 -1 -1 1 7 -1 -1 1 0 21
313 CLK_000_D_8_ 3 -1 -1 1 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
339 inst_CLK_030_H 3 -1 -1 0 -1 -1 6 1 21
343 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
342 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 1 21
336 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
341 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
337 RST_DLY_1_ 3 -1 -1 0 -1 -1 3 1 21
335 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
338 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
319 inst_CLK_OUT_PRE_25 3 -1 -1 0 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
328 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
327 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
326 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
325 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
324 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
323 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
318 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
315 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
136 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 362 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 367 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
7 IPL_030_0_ 0 1 0 7 -1 5 0 21
6 IPL_030_1_ 0 1 0 6 -1 5 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
8 IPL_030_2_ 0 1 0 8 -1 4 0 21
82 BGACK_030 0 7 0 82 -1 3 1 21
68 A_0_ 5 358 6 0 68 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
34 VMA 0 3 0 34 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
28 BG_000 0 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
364 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 1 21
321 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
316 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
304 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
322 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
360 RN_IPL_030_0_ 3 7 1 1 1 7 -1 5 0 21
359 RN_IPL_030_1_ 3 6 1 1 1 6 -1 5 0 21
355 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 5 0 21
365 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
362 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
361 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
341 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
308 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
301 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
296 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
295 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21
293 ipl_030_0_0__un1_n 3 -1 -1 1 1 -1 -1 4 0 21
358 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
351 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
344 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
343 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
342 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 3 0 21
315 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
312 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
311 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
367 RN_RW 3 70 6 1 6 70 -1 2 0 21
366 RN_VMA 3 34 3 1 3 34 -1 2 0 21
363 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
357 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
338 N_245_i 3 -1 -1 1 1 -1 -1 2 0 21
314 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
307 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21
302 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
294 pos_clk_un9_clk_000_pe_n 3 -1 -1 1 3 -1 -1 2 0 21
339 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
328 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
325 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21
319 CLK_000_D_9_ 3 -1 -1 1 7 -1 -1 1 0 21
318 CLK_000_D_8_ 3 -1 -1 1 7 -1 -1 1 0 21
317 CLK_000_D_1_ 3 -1 -1 1 7 -1 -1 1 0 21
306 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
300 N_162_i 3 -1 -1 0 -1 -1 5 0 21
354 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
347 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
345 pos_clk_un23_bgack_030_int_i_1_0_n 3 -1 -1 0 -1 -1 4 0 21
335 N_223_i 3 -1 -1 0 -1 -1 4 0 21
310 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
298 cpu_est_3_ 3 -1 -1 0 -1 -1 4 0 21
356 N_213 3 -1 -1 0 -1 -1 3 1 21
352 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
348 RST_DLY_1_ 3 -1 -1 0 -1 -1 3 1 21
346 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
309 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
299 cpu_est_0_ 3 -1 -1 0 -1 -1 3 0 21
353 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 2 0 21
350 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
349 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
340 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
332 N_186_i 3 -1 -1 0 -1 -1 2 0 21
329 N_174_i 3 -1 -1 0 -1 -1 2 0 21
324 inst_CLK_OUT_PRE_25 3 -1 -1 0 -1 -1 2 0 21
305 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21
303 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
337 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
336 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
334 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
333 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
331 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
330 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
327 N_226_i 3 -1 -1 0 -1 -1 1 0 21
326 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21
323 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
320 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
313 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21
297 cpu_est_2_ 3 -1 -1 0 -1 -1 1 1 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
55 IPL_1_ 1 -1 -1 0 55 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
144 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 370 7 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
70 RW 5 375 6 1 7 70 -1 2 0 21
40 BERR 5 -1 4 1 7 40 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21
80 DSACK1 0 7 0 80 -1 4 0 21
8 IPL_030_2_ 0 1 0 8 -1 4 0 21
7 IPL_030_0_ 0 1 0 7 -1 4 0 21
68 A_0_ 5 366 6 0 68 -1 3 0 21
65 E 0 -1 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
34 VMA 0 3 0 34 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21
28 BG_000 0 3 0 28 -1 2 0 21
6 IPL_030_1_ 0 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 -1 0 91 -1 1 0 21
82 BGACK_030 0 7 0 82 -1 1 0 21
78 SIZE_1_ 0 -1 0 78 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
69 SIZE_0_ 0 6 0 69 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21
30 LDS_000 0 3 0 30 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 -1 0 2 -1 1 0 21
327 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21
372 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 1 0 21
321 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21
307 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21
328 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21
373 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
370 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
369 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
368 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
362 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 4 0 21
348 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21
313 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21
304 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
299 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
298 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21
297 N_11_i 3 -1 -1 1 7 -1 -1 4 0 21
296 ipl_030_0_1__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
294 ipl_030_0_0__un3_n 3 -1 -1 1 1 -1 -1 4 0 21
366 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
358 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
351 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21
350 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21
320 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21
317 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21
316 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21
375 RN_RW 3 70 6 1 6 70 -1 2 0 21
374 RN_VMA 3 34 3 1 3 34 -1 2 0 21
371 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
367 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
365 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21
345 N_245_i 3 -1 -1 1 1 -1 -1 2 0 21
319 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21
312 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21
305 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21
295 pos_clk_un9_clk_000_pe_n 3 -1 -1 1 3 -1 -1 2 0 21
346 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21
334 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21
331 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21
325 CLK_000_D_9_ 3 -1 -1 1 7 -1 -1 1 0 21
324 CLK_000_D_8_ 3 -1 -1 1 7 -1 -1 1 0 21
323 CLK_000_D_1_ 3 -1 -1 1 7 -1 -1 1 0 21
311 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21
363 N_213 3 -1 -1 0 -1 -1 4 0 21
361 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
355 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21
354 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21
352 pos_clk_un23_bgack_030_int_i_1_0_n 3 -1 -1 0 -1 -1 4 0 21
342 N_223_i 3 -1 -1 0 -1 -1 4 0 21
315 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21
302 cpu_est_3_ 3 -1 -1 0 -1 -1 4 0 21
359 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21
353 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21
349 inst_BGACK_030_INT_PRE 3 -1 -1 0 -1 -1 3 0 21
314 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21
308 N_163_i 3 -1 -1 0 -1 -1 3 0 21
303 cpu_est_0_ 3 -1 -1 0 -1 -1 3 0 21
301 cpu_est_2_ 3 -1 -1 0 -1 -1 3 0 21
293 cpu_est_2_2__n 3 -1 -1 0 -1 -1 3 0 21
360 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 2 0 21
357 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21
356 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21
347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21
339 N_186_i 3 -1 -1 0 -1 -1 2 0 21
335 N_174_i 3 -1 -1 0 -1 -1 2 0 21
330 inst_CLK_OUT_PRE_25 3 -1 -1 0 -1 -1 2 0 21
309 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21
306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21
300 N_315 3 -1 -1 0 -1 -1 2 0 21
364 N_291 3 -1 -1 0 -1 -1 1 0 21
344 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21
343 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21
341 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21
340 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21
338 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21
337 N_277_i 3 -1 -1 0 -1 -1 1 0 21
336 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21
333 N_226_i 3 -1 -1 0 -1 -1 1 0 21
332 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21
329 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
326 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
322 N_129_i 3 -1 -1 0 -1 -1 1 0 21
318 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21
310 N_296_0 3 -1 -1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
85 RST 1 -1 -1 4 1 3 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 7 63 -1
20 BG_030 1 -1 -1 1 3 20 -1
59 A_1_ 1 -1 -1 0 59 -1
55 IPL_1_ 1 -1 -1 0 55 -1
35 VPA 1 -1 -1 0 35 -1
29 DTACK 1 -1 -1 0 29 -1
10 CLK_000 1 -1 -1 0 10 -1
152 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21
40 BERR 5 -1 4 5 0 1 3 5 7 40 -1 1 0 21
79 RW_000 5 378 7 4 2 4 5 6 79 -1 3 0 21
70 RW 5 383 6 2 0 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 374 6 1 3 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 377 1 0 8 -1 3 0 21
7 IPL_030_0_ 5 376 1 0 7 -1 3 0 21
6 IPL_030_1_ 5 375 1 0 6 -1 3 0 21
80 DSACK1 5 381 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
34 VMA 5 382 3 0 34 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 379 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
82 BGACK_030 5 380 7 0 82 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
380 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 1 0 21
328 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
329 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21
324 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21
360 SM_AMIGA_1_ 3 -1 0 4 0 1 2 3 -1 -1 3 0 21
304 cpu_est_1_ 3 -1 5 4 0 3 5 6 -1 -1 3 0 21
307 inst_AS_030_D0 3 -1 7 4 0 3 4 7 -1 -1 1 0 21
364 SM_AMIGA_2_ 3 -1 1 3 0 1 3 -1 -1 3 0 21
362 SM_AMIGA_5_ 3 -1 0 3 0 1 3 -1 -1 3 0 21
355 SM_AMIGA_4_ 3 -1 3 3 0 2 3 -1 -1 3 0 21
353 SM_AMIGA_0_ 3 -1 3 3 0 3 7 -1 -1 3 0 21
352 SM_AMIGA_6_ 3 -1 0 3 0 3 7 -1 -1 3 0 21
312 inst_AS_000_DMA 3 -1 2 3 2 5 7 -1 -1 2 0 21
361 N_111_i 3 -1 3 3 3 6 7 -1 -1 1 0 21
322 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21
311 inst_BGACK_030_INT_D 3 -1 4 3 0 2 6 -1 -1 1 0 21
370 N_116_0 3 -1 6 2 5 6 -1 -1 3 0 21
368 S0__clk_un23_bgack_030_int_i_1_0 3 -1 6 2 0 2 -1 -1 3 0 21
365 SM_AMIGA_i_7_ 3 -1 1 2 0 7 -1 -1 3 0 21
357 RST_DLY_1_ 3 -1 5 2 5 6 -1 -1 3 0 21
350 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21
317 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
316 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
314 CYCLE_DMA_0_ 3 -1 5 2 5 6 -1 -1 3 0 21
303 cpu_est_0_ 3 -1 0 2 0 5 -1 -1 3 0 21
302 cpu_est_3_ 3 -1 5 2 5 6 -1 -1 3 0 21
300 cpu_est_2_ 3 -1 5 2 5 6 -1 -1 3 0 21
382 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
363 SM_AMIGA_3_ 3 -1 2 2 0 5 -1 -1 2 0 21
359 inst_CLK_030_H 3 -1 2 2 2 5 -1 -1 2 0 21
356 RST_DLY_0_ 3 -1 6 2 5 6 -1 -1 2 0 21
349 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
331 inst_CLK_OUT_PRE_25 3 -1 2 2 2 5 -1 -1 2 0 21
313 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 2 0 21
309 inst_AS_030_000_SYNC 3 -1 0 2 0 3 -1 -1 2 0 21
305 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21
369 N_110_i 3 -1 6 2 1 5 -1 -1 1 0 21
337 CLK_000_D_2_ 3 -1 1 2 0 2 -1 -1 1 0 21
333 IPL_D0_1_ 3 -1 4 2 1 4 -1 -1 1 0 21
330 inst_CLK_OUT_PRE_50 3 -1 7 2 2 7 -1 -1 1 0 21
326 CLK_000_D_9_ 3 -1 0 2 2 3 -1 -1 1 0 21
325 CLK_000_D_8_ 3 -1 5 2 0 2 -1 -1 1 0 21
378 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
377 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
376 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
375 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
374 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
367 N_213 3 -1 5 1 2 -1 -1 3 0 21
366 N_100_i_1 3 -1 6 1 6 -1 -1 3 0 21
351 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
343 N_223_i 3 -1 3 1 1 -1 -1 3 0 21
321 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21
315 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21
308 N_163_i 3 -1 0 1 3 -1 -1 3 0 21
301 N_158_i 3 -1 2 1 7 -1 -1 3 0 21
295 N_11_i 3 -1 7 1 7 -1 -1 3 0 21
383 RN_RW 3 70 6 1 6 70 -1 2 0 21
381 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
379 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
373 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
358 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21
347 N_245_i 3 -1 4 1 1 -1 -1 2 0 21
345 N_244_i 3 -1 1 1 1 -1 -1 2 0 21
340 N_186_i 3 -1 5 1 1 -1 -1 2 0 21
336 N_174_i 3 -1 7 1 1 -1 -1 2 0 21
320 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21
319 N_273_i 3 -1 7 1 0 -1 -1 2 0 21
306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
299 ds_000_dma_0_un1_n 3 -1 5 1 6 -1 -1 2 0 21
298 ds_000_dma_0_un3_n 3 -1 2 1 6 -1 -1 2 0 21
297 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21
296 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21
294 pos_clk_un9_clk_000_pe_n 3 -1 5 1 3 -1 -1 2 0 21
293 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21
372 N_291 3 -1 5 1 5 -1 -1 1 0 21
371 N_123_i 3 -1 0 1 5 -1 -1 1 0 21
354 pos_clk_un23_bgack_030_int_i_1_0_n 3 -1 0 1 5 -1 -1 1 0 21
348 CLK_000_D_10_ 3 -1 3 1 2 -1 -1 1 0 21
346 CLK_000_D_7_ 3 -1 2 1 5 -1 -1 1 0 21
344 CLK_000_D_6_ 3 -1 5 1 2 -1 -1 1 0 21
342 CLK_000_D_5_ 3 -1 0 1 5 -1 -1 1 0 21
341 CLK_000_D_4_ 3 -1 5 1 0 -1 -1 1 0 21
339 CLK_000_D_3_ 3 -1 2 1 5 -1 -1 1 0 21
338 N_277_i 3 -1 0 1 1 -1 -1 1 0 21
335 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21
334 N_226_i 3 -1 0 1 1 -1 -1 1 0 21
332 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21
327 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21
323 N_129_i 3 -1 4 1 0 -1 -1 1 0 21
318 inst_VPA_D 3 -1 5 1 5 -1 -1 1 0 21
310 N_296_0 3 -1 3 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
66 IPL_0_ 1 -1 -1 2 1 5 66 -1
63 CLK_030 1 -1 -1 2 2 5 63 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 1 4 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
59 A_1_ 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 5 35 -1
29 DTACK 1 -1 -1 1 0 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 3 10 -1
149 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 1 4 6 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 1 2 7 40 -1 1 0 21
79 RW_000 5 375 7 2 4 6 79 -1 3 0 21
68 A_0_ 5 371 6 2 2 5 68 -1 3 0 21
70 RW 5 380 6 2 0 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 377 7 0 82 -1 3 0 21
80 DSACK1 5 378 7 0 80 -1 3 0 21
34 VMA 5 379 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 376 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 374 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 373 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 372 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
324 inst_RESET_OUT 3 -1 5 8 0 1 2 3 4 5 6 7 -1 -1 2 0 21
377 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
326 CLK_000_D_0_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21
319 CLK_000_D_1_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21
349 SM_AMIGA_6_ 3 -1 2 5 0 1 2 5 7 -1 -1 3 0 21
305 inst_AS_030_D0 3 -1 7 5 1 2 3 4 7 -1 -1 1 0 21
351 SM_AMIGA_4_ 3 -1 0 3 0 1 2 -1 -1 3 0 21
350 SM_AMIGA_0_ 3 -1 7 3 0 2 7 -1 -1 3 0 21
302 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
300 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
299 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 0 21
358 SM_AMIGA_3_ 3 -1 2 3 0 2 5 -1 -1 2 0 21
306 inst_AS_030_000_SYNC 3 -1 2 3 0 2 3 -1 -1 2 0 21
331 N_69_i 3 -1 7 3 0 3 5 -1 -1 1 0 21
322 CLK_000_D_11_ 3 -1 2 3 4 6 7 -1 -1 1 0 21
379 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
366 S0__clk_un23_bgack_030_int_i_0_0 3 -1 6 2 4 6 -1 -1 3 0 21
361 SM_AMIGA_i_7_ 3 -1 0 2 2 7 -1 -1 3 0 21
359 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 3 0 21
357 SM_AMIGA_5_ 3 -1 0 2 0 2 -1 -1 3 0 21
356 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
352 RST_DLY_0_ 3 -1 5 2 0 5 -1 -1 3 0 21
317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21
314 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
312 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
311 CYCLE_DMA_1_ 3 -1 1 2 1 6 -1 -1 3 0 21
310 CYCLE_DMA_0_ 3 -1 6 2 1 6 -1 -1 3 0 21
301 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21
354 RST_DLY_2_ 3 -1 5 2 0 5 -1 -1 2 0 21
353 RST_DLY_1_ 3 -1 5 2 0 5 -1 -1 2 0 21
347 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21
345 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
328 inst_CLK_OUT_PRE_25 3 -1 6 2 4 6 -1 -1 2 0 21
316 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
309 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 2 0 21
308 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21
303 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21
364 N_67_i 3 -1 7 2 1 7 -1 -1 1 0 21
333 CLK_000_D_2_ 3 -1 7 2 0 2 -1 -1 1 0 21
327 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21
320 CLK_000_D_10_ 3 -1 4 2 2 6 -1 -1 1 0 21
318 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21
315 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21
307 inst_BGACK_030_INT_D 3 -1 3 2 2 6 -1 -1 1 0 21
378 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
375 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
371 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
369 N_104 3 -1 1 1 0 -1 -1 3 0 21
368 N_103 3 -1 0 1 0 -1 -1 3 0 21
348 inst_BGACK_030_INT_PRE 3 -1 1 1 1 -1 -1 3 0 21
295 N_330_0 3 -1 0 1 2 -1 -1 3 0 21
380 RN_RW 3 70 6 1 6 70 -1 2 0 21
376 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
374 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
373 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
372 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
370 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
367 N_106 3 -1 0 1 0 -1 -1 2 0 21
365 N_107 3 -1 5 1 0 -1 -1 2 0 21
363 G_117 3 -1 0 1 5 -1 -1 2 0 21
362 G_116 3 -1 1 1 5 -1 -1 2 0 21
355 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21
346 pos_clk_ipl_n 3 -1 5 1 1 -1 -1 2 0 21
339 N_123_i 3 -1 0 1 5 -1 -1 2 0 21
313 N_309_i 3 -1 3 1 3 -1 -1 2 0 21
304 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
298 ds_000_dma_0_un1_n 3 -1 6 1 5 -1 -1 2 0 21
297 ds_000_dma_0_un3_n 3 -1 6 1 5 -1 -1 2 0 21
296 N_133_i 3 -1 6 1 7 -1 -1 2 0 21
360 pos_clk_un23_bgack_030_int_i_0_0_n 3 -1 4 1 6 -1 -1 1 0 21
344 CLK_000_D_12_ 3 -1 4 1 7 -1 -1 1 0 21
343 CLK_000_D_9_ 3 -1 3 1 4 -1 -1 1 0 21
342 N_315_i 3 -1 3 1 2 -1 -1 1 0 21
341 CLK_000_D_8_ 3 -1 3 1 3 -1 -1 1 0 21
340 CLK_000_D_7_ 3 -1 1 1 3 -1 -1 1 0 21
338 CLK_000_D_6_ 3 -1 5 1 1 -1 -1 1 0 21
337 N_82_i 3 -1 5 1 2 -1 -1 1 0 21
336 CLK_000_D_5_ 3 -1 3 1 5 -1 -1 1 0 21
335 CLK_000_D_4_ 3 -1 5 1 3 -1 -1 1 0 21
334 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21
332 IPL_D0_2_ 3 -1 2 1 5 -1 -1 1 0 21
330 IPL_D0_1_ 3 -1 0 1 0 -1 -1 1 0 21
329 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21
325 pos_clk_un28_as_030_d0_i_n 3 -1 7 1 2 -1 -1 1 0 21
323 inst_DTACK_D0 3 -1 5 1 5 -1 -1 1 0 21
321 N_316_i 3 -1 5 1 3 -1 -1 1 0 21
294 N_108 3 -1 0 1 0 -1 -1 1 0 21
293 bgack_030_int_0_un1_n 3 -1 1 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
67 IPL_2_ 1 -1 -1 3 1 2 5 67 -1
27 BGACK_000 1 -1 -1 3 1 4 7 27 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
66 IPL_0_ 1 -1 -1 2 1 2 66 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 0 1 55 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
63 CLK_030 1 -1 -1 1 6 63 -1
59 A_1_ 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 5 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 1 10 -1
150 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 2 4 6 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
79 RW_000 5 376 7 2 4 6 79 -1 3 0 21
70 RW 5 381 6 2 2 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 372 6 1 1 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 378 7 0 82 -1 3 0 21
80 DSACK1 5 379 7 0 80 -1 3 0 21
34 VMA 5 380 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 377 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 374 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 375 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 373 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
378 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
325 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21
351 SM_AMIGA_6_ 3 -1 0 5 0 1 2 5 7 -1 -1 3 0 21
326 CLK_000_D_0_ 3 -1 1 5 0 2 3 5 7 -1 -1 1 0 21
320 CLK_000_D_1_ 3 -1 7 5 0 2 3 5 7 -1 -1 1 0 21
306 inst_AS_030_D0 3 -1 7 5 0 3 4 5 7 -1 -1 1 0 21
358 SM_AMIGA_1_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
353 SM_AMIGA_4_ 3 -1 2 3 0 2 5 -1 -1 3 0 21
352 SM_AMIGA_0_ 3 -1 7 3 0 5 7 -1 -1 3 0 21
311 CYCLE_DMA_0_ 3 -1 0 3 0 2 6 -1 -1 3 0 21
302 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
360 SM_AMIGA_3_ 3 -1 2 3 0 2 3 -1 -1 2 0 21
366 N_67_i 3 -1 7 3 2 5 7 -1 -1 1 0 21
308 inst_BGACK_030_INT_D 3 -1 7 3 0 1 6 -1 -1 1 0 21
363 SM_AMIGA_i_7_ 3 -1 5 2 0 7 -1 -1 3 0 21
361 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21
359 SM_AMIGA_5_ 3 -1 0 2 0 2 -1 -1 3 0 21
354 RST_DLY_0_ 3 -1 3 2 3 5 -1 -1 3 0 21
318 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21
314 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
313 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
312 CYCLE_DMA_1_ 3 -1 2 2 2 6 -1 -1 3 0 21
303 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21
301 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
300 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
356 RST_DLY_2_ 3 -1 5 2 3 5 -1 -1 2 0 21
355 RST_DLY_1_ 3 -1 5 2 3 5 -1 -1 2 0 21
349 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 2 0 21
347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21
329 inst_CLK_OUT_PRE_25 3 -1 2 2 2 4 -1 -1 2 0 21
317 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
310 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 2 0 21
309 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21
307 inst_AS_030_000_SYNC 3 -1 0 2 0 3 -1 -1 2 0 21
305 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21
304 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
334 CLK_000_D_2_ 3 -1 7 2 0 1 -1 -1 1 0 21
322 CLK_000_D_12_ 3 -1 4 2 6 7 -1 -1 1 0 21
321 CLK_000_D_11_ 3 -1 4 2 4 6 -1 -1 1 0 21
319 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21
380 RN_VMA 3 34 3 1 3 34 -1 3 0 21
379 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
376 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
372 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
370 N_103 3 -1 0 1 5 -1 -1 3 0 21
369 sm_amiga_nss_i_0_4_0__n 3 -1 5 1 5 -1 -1 3 0 21
368 S0__clk_un23_bgack_030_int_i_0_0 3 -1 6 1 6 -1 -1 3 0 21
350 inst_BGACK_030_INT_PRE 3 -1 2 1 2 -1 -1 3 0 21
296 N_330_0 3 -1 2 1 0 -1 -1 3 0 21
381 RN_RW 3 70 6 1 6 70 -1 2 0 21
377 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
375 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
374 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
373 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
367 N_107 3 -1 3 1 5 -1 -1 2 0 21
365 G_117 3 -1 5 1 1 -1 -1 2 0 21
364 G_116 3 -1 2 1 1 -1 -1 2 0 21
357 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21
348 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21
341 N_123_i 3 -1 3 1 5 -1 -1 2 0 21
315 N_309_i 3 -1 6 1 3 -1 -1 2 0 21
299 ds_000_dma_0_un1_n 3 -1 6 1 2 -1 -1 2 0 21
298 ds_000_dma_0_un3_n 3 -1 6 1 2 -1 -1 2 0 21
297 N_133_i 3 -1 6 1 7 -1 -1 2 0 21
362 pos_clk_un23_bgack_030_int_i_0_0_n 3 -1 6 1 6 -1 -1 1 0 21
346 CLK_000_D_13_ 3 -1 7 1 7 -1 -1 1 0 21
345 CLK_000_D_10_ 3 -1 5 1 4 -1 -1 1 0 21
344 N_315_i 3 -1 3 1 2 -1 -1 1 0 21
343 CLK_000_D_9_ 3 -1 5 1 5 -1 -1 1 0 21
342 CLK_000_D_8_ 3 -1 5 1 5 -1 -1 1 0 21
340 CLK_000_D_7_ 3 -1 0 1 5 -1 -1 1 0 21
339 N_82_i 3 -1 3 1 2 -1 -1 1 0 21
338 CLK_000_D_6_ 3 -1 1 1 0 -1 -1 1 0 21
337 CLK_000_D_5_ 3 -1 5 1 1 -1 -1 1 0 21
336 CLK_000_D_4_ 3 -1 4 1 5 -1 -1 1 0 21
335 CLK_000_D_3_ 3 -1 1 1 4 -1 -1 1 0 21
333 N_69_i 3 -1 5 1 3 -1 -1 1 0 21
332 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21
331 IPL_D0_1_ 3 -1 5 1 5 -1 -1 1 0 21
330 IPL_D0_0_ 3 -1 0 1 2 -1 -1 1 0 21
328 inst_CLK_OUT_PRE_50 3 -1 2 1 2 -1 -1 1 0 21
327 pos_clk_un28_as_030_d0_i_n 3 -1 7 1 0 -1 -1 1 0 21
324 inst_DTACK_D0 3 -1 6 1 3 -1 -1 1 0 21
323 N_316_i 3 -1 3 1 3 -1 -1 1 0 21
316 inst_VPA_D 3 -1 5 1 3 -1 -1 1 0 21
295 N_332_i 3 -1 0 1 5 -1 -1 1 0 21
294 N_108 3 -1 0 1 5 -1 -1 1 0 21
293 bgack_030_int_0_un1_n 3 -1 2 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
66 IPL_0_ 1 -1 -1 3 0 1 2 66 -1
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 0 1 67 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 1 5 55 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
63 CLK_030 1 -1 -1 1 6 63 -1
59 A_1_ 1 -1 -1 1 1 59 -1
35 VPA 1 -1 -1 1 5 35 -1
29 DTACK 1 -1 -1 1 6 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 1 10 -1
152 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21
40 BERR 5 -1 4 3 2 3 5 40 -1 1 0 21
79 RW_000 5 378 7 2 4 6 79 -1 3 0 21
70 RW 5 383 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 374 6 1 3 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 380 7 0 82 -1 3 0 21
80 DSACK1 5 381 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 379 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 377 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 376 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 375 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
34 VMA 5 382 3 0 34 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
380 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
330 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21
331 CLK_000_D_0_ 3 -1 1 5 0 2 3 5 7 -1 -1 1 0 21
353 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21
326 CLK_000_D_1_ 3 -1 7 4 0 2 5 7 -1 -1 1 0 21
360 SM_AMIGA_1_ 3 -1 5 3 0 3 5 -1 -1 3 0 21
310 inst_AS_000_DMA 3 -1 1 3 1 6 7 -1 -1 2 0 21
307 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 2 0 21
372 N_142_i 3 -1 7 3 2 5 7 -1 -1 1 0 21
309 inst_BGACK_030_INT_D 3 -1 4 3 1 2 6 -1 -1 1 0 21
306 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21
367 SM_AMIGA_i_7_ 3 -1 5 2 2 5 -1 -1 3 0 21
361 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 3 0 21
354 SM_AMIGA_0_ 3 -1 5 2 2 5 -1 -1 3 0 21
319 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
317 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
311 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 3 0 21
303 cpu_est_1_ 3 -1 6 2 0 6 -1 -1 3 0 21
302 cpu_est_0_ 3 -1 0 2 0 6 -1 -1 3 0 21
301 cpu_est_3_ 3 -1 6 2 0 6 -1 -1 3 0 21
300 cpu_est_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
365 pos_clk_un23_bgack_030_int_i_0_i_n 3 -1 2 2 1 6 -1 -1 2 0 21
362 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 2 0 21
347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21
305 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21
304 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
332 inst_CLK_OUT_PRE_50 3 -1 5 2 3 5 -1 -1 1 0 21
328 CLK_000_D_10_ 3 -1 7 2 1 3 -1 -1 1 0 21
327 CLK_000_D_9_ 3 -1 2 2 1 7 -1 -1 1 0 21
325 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21
321 N_143_i 3 -1 7 2 0 6 -1 -1 1 0 21
378 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
374 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
368 N_337 3 -1 5 1 3 -1 -1 3 0 21
364 N_162_0 3 -1 1 1 3 -1 -1 3 0 21
363 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
357 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21
356 RST_DLY_0_ 3 -1 0 1 0 -1 -1 3 0 21
355 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
352 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
335 N_22_i 3 -1 0 1 3 -1 -1 3 0 21
324 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21
314 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21
312 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21
383 RN_RW 3 70 6 1 6 70 -1 2 0 21
381 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
379 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
377 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
376 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
375 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
373 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
371 N_276_0_1 3 -1 6 1 6 -1 -1 2 0 21
369 N_200 3 -1 0 1 5 -1 -1 2 0 21
359 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21
358 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21
351 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 2 0 21
350 N_246_i 3 -1 1 1 1 -1 -1 2 0 21
349 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21
348 N_244_i 3 -1 2 1 1 -1 -1 2 0 21
333 inst_CLK_OUT_PRE_25 3 -1 3 1 3 -1 -1 2 0 21
323 N_241_i 3 -1 6 1 6 -1 -1 2 0 21
322 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21
318 dsack1_int_0_un1_n 3 -1 3 1 7 -1 -1 2 0 21
316 dsack1_int_0_un3_n 3 -1 3 1 7 -1 -1 2 0 21
313 N_182_0 3 -1 0 1 5 -1 -1 2 0 21
299 pos_clk_un6_bgack_000_0_n 3 -1 7 1 7 -1 -1 2 0 21
296 N_201_i 3 -1 2 1 5 -1 -1 2 0 21
295 N_199_i 3 -1 0 1 5 -1 -1 2 0 21
294 N_198_i 3 -1 5 1 5 -1 -1 2 0 21
293 N_178_0 3 -1 5 1 7 -1 -1 2 0 21
382 RN_VMA 3 34 3 1 0 34 -1 1 0 21
370 N_263 3 -1 6 1 2 -1 -1 1 0 21
366 N_161_i 3 -1 4 1 2 -1 -1 1 0 21
346 CLK_000_D_11_ 3 -1 3 1 1 -1 -1 1 0 21
345 CLK_000_D_8_ 3 -1 6 1 2 -1 -1 1 0 21
344 CLK_000_D_7_ 3 -1 2 1 6 -1 -1 1 0 21
343 CLK_000_D_6_ 3 -1 0 1 2 -1 -1 1 0 21
342 CLK_000_D_5_ 3 -1 5 1 0 -1 -1 1 0 21
341 CLK_000_D_4_ 3 -1 2 1 5 -1 -1 1 0 21
340 CLK_000_D_3_ 3 -1 5 1 2 -1 -1 1 0 21
339 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21
338 N_237_i 3 -1 0 1 0 -1 -1 1 0 21
337 IPL_D0_2_ 3 -1 4 1 1 -1 -1 1 0 21
336 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21
334 IPL_D0_0_ 3 -1 1 1 2 -1 -1 1 0 21
329 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21
320 inst_VPA_D 3 -1 3 1 0 -1 -1 1 0 21
315 N_156_i 3 -1 0 1 0 -1 -1 1 0 21
308 N_214_i 3 -1 0 1 0 -1 -1 1 0 21
298 N_202_i 3 -1 5 1 5 -1 -1 1 0 21
297 N_266_i 3 -1 5 1 5 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 4 67 -1
66 IPL_0_ 1 -1 -1 2 1 2 66 -1
63 CLK_030 1 -1 -1 2 1 6 63 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 1 3 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 1 59 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 0 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 1 10 -1
150 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 374 7 2 4 6 79 -1 3 0 21
68 A_0_ 5 380 6 2 0 1 68 -1 3 0 21
70 RW 5 379 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 376 7 0 82 -1 3 0 21
34 VMA 5 378 3 0 34 -1 3 0 21
80 DSACK1 5 377 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 375 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 373 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 372 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 381 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
376 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
330 inst_RESET_OUT 3 -1 2 7 0 1 2 3 4 6 7 -1 -1 2 0 21
332 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 4 5 7 -1 -1 1 0 21
331 CLK_000_D_1_ 3 -1 4 7 0 1 2 3 4 5 7 -1 -1 1 0 21
352 SM_AMIGA_6_ 3 -1 1 5 0 1 2 5 7 -1 -1 3 0 21
310 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21
366 SM_AMIGA_i_7_ 3 -1 5 3 1 2 7 -1 -1 3 0 21
362 SM_AMIGA_2_ 3 -1 5 3 0 1 5 -1 -1 3 0 21
359 SM_AMIGA_1_ 3 -1 0 3 0 5 7 -1 -1 3 0 21
353 SM_AMIGA_0_ 3 -1 7 3 1 2 7 -1 -1 3 0 21
305 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 3 0 21
311 inst_AS_030_000_SYNC 3 -1 2 3 1 2 3 -1 -1 2 0 21
365 N_375_i 3 -1 5 3 2 3 5 -1 -1 1 0 21
325 N_376_i 3 -1 4 3 0 5 7 -1 -1 1 0 21
324 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21
361 SM_AMIGA_3_ 3 -1 5 2 1 5 -1 -1 3 0 21
360 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21
354 SM_AMIGA_4_ 3 -1 5 2 1 5 -1 -1 3 0 21
351 inst_BGACK_030_INT_PRE 3 -1 0 2 0 7 -1 -1 3 0 21
322 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21
318 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
317 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
303 cpu_est_0_ 3 -1 0 2 0 3 -1 -1 3 0 21
301 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
350 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21
348 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
314 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 2 0 21
313 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21
309 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
308 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
327 CLK_000_D_11_ 3 -1 2 2 2 3 -1 -1 1 0 21
312 inst_BGACK_030_INT_D 3 -1 5 2 2 6 -1 -1 1 0 21
380 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
378 RN_VMA 3 34 3 1 3 34 -1 3 0 21
374 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
355 RST_DLY_0_ 3 -1 2 1 2 -1 -1 3 0 21
316 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
315 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21
306 N_154_0 3 -1 2 1 7 -1 -1 3 0 21
295 N_192_i 3 -1 5 1 5 -1 -1 3 0 21
293 N_146_0 3 -1 5 1 2 -1 -1 3 0 21
381 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
379 RN_RW 3 70 6 1 6 70 -1 2 0 21
377 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
375 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
373 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
370 N_186 3 -1 2 1 2 -1 -1 2 0 21
368 G_117 3 -1 0 1 1 -1 -1 2 0 21
367 G_116 3 -1 5 1 1 -1 -1 2 0 21
363 N_164_i 3 -1 3 1 5 -1 -1 2 0 21
358 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21
357 RST_DLY_2_ 3 -1 2 1 2 -1 -1 2 0 21
356 RST_DLY_1_ 3 -1 2 1 2 -1 -1 2 0 21
349 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21
335 inst_CLK_OUT_PRE_25 3 -1 5 1 5 -1 -1 2 0 21
321 pos_clk_un23_bgack_030_int_i_0_0_n 3 -1 0 1 6 -1 -1 2 0 21
304 ds_000_dma_0_un1_n 3 -1 6 1 6 -1 -1 2 0 21
302 ds_000_dma_0_un3_n 3 -1 6 1 6 -1 -1 2 0 21
296 N_191_i 3 -1 5 1 5 -1 -1 2 0 21
294 N_255_i 3 -1 7 1 5 -1 -1 2 0 21
369 N_258 3 -1 0 1 5 -1 -1 1 0 21
364 N_149_i 3 -1 0 1 3 -1 -1 1 0 21
347 CLK_000_D_12_ 3 -1 3 1 2 -1 -1 1 0 21
346 CLK_000_D_9_ 3 -1 5 1 0 -1 -1 1 0 21
345 CLK_000_D_8_ 3 -1 6 1 5 -1 -1 1 0 21
344 CLK_000_D_7_ 3 -1 0 1 6 -1 -1 1 0 21
343 CLK_000_D_6_ 3 -1 1 1 0 -1 -1 1 0 21
342 CLK_000_D_5_ 3 -1 0 1 1 -1 -1 1 0 21
341 CLK_000_D_4_ 3 -1 3 1 0 -1 -1 1 0 21
340 CLK_000_D_3_ 3 -1 4 1 3 -1 -1 1 0 21
339 CLK_000_D_2_ 3 -1 4 1 4 -1 -1 1 0 21
338 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21
337 IPL_D0_1_ 3 -1 1 1 0 -1 -1 1 0 21
336 IPL_D0_0_ 3 -1 5 1 5 -1 -1 1 0 21
334 inst_CLK_OUT_PRE_50 3 -1 5 1 5 -1 -1 1 0 21
333 N_133_i 3 -1 4 1 2 -1 -1 1 0 21
329 inst_DTACK_D0 3 -1 1 1 3 -1 -1 1 0 21
328 N_275_i 3 -1 4 1 7 -1 -1 1 0 21
326 CLK_000_D_10_ 3 -1 0 1 2 -1 -1 1 0 21
323 N_249_i 3 -1 6 1 0 -1 -1 1 0 21
319 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21
300 N_194_i 3 -1 1 1 5 -1 -1 1 0 21
299 vma_int_0_un1_n 3 -1 3 1 3 -1 -1 1 0 21
298 N_253_i 3 -1 1 1 5 -1 -1 1 0 21
297 N_267_i 3 -1 0 1 5 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
27 BGACK_000 1 -1 -1 3 0 4 7 27 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 3 67 -1
66 IPL_0_ 1 -1 -1 2 1 5 66 -1
63 CLK_030 1 -1 -1 2 2 6 63 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 0 1 55 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 6 59 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 3 10 -1
139 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21
40 BERR 5 -1 4 5 0 2 3 5 7 40 -1 1 0 21
79 RW_000 5 362 7 3 1 4 6 79 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 1 6 30 -1 1 0 21
68 A_0_ 5 367 6 1 5 68 -1 3 0 21
70 RW 5 368 6 1 0 70 -1 2 0 21
78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 364 7 0 82 -1 3 0 21
80 DSACK1 5 365 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 363 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 361 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 370 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 369 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
34 VMA 5 366 3 0 34 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
364 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
319 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21
321 CLK_000_D_0_ 3 -1 5 5 0 2 3 5 7 -1 -1 1 0 21
320 CLK_000_D_1_ 3 -1 7 5 0 2 3 5 7 -1 -1 1 0 21
326 N_112_i 3 -1 7 4 0 2 3 6 -1 -1 1 0 21
343 SM_AMIGA_3_ 3 -1 0 3 0 2 5 -1 -1 3 0 21
334 SM_AMIGA_1_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
333 SM_AMIGA_6_ 3 -1 3 3 0 3 5 -1 -1 3 0 21
300 cpu_est_0_ 3 -1 7 3 2 6 7 -1 -1 3 0 21
306 inst_BGACK_030_INT_D 3 -1 4 3 3 5 6 -1 -1 1 0 21
304 inst_AS_030_D0 3 -1 7 3 3 4 7 -1 -1 1 0 21
347 SM_AMIGA_i_7_ 3 -1 0 2 0 3 -1 -1 3 0 21
344 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21
342 SM_AMIGA_5_ 3 -1 0 2 0 2 -1 -1 3 0 21
337 SM_AMIGA_4_ 3 -1 2 2 0 2 -1 -1 3 0 21
336 SM_AMIGA_0_ 3 -1 0 2 0 5 -1 -1 3 0 21
332 inst_BGACK_030_INT_PRE 3 -1 2 2 2 7 -1 -1 3 0 21
317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21
313 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
312 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
310 CYCLE_DMA_0_ 3 -1 2 2 1 2 -1 -1 3 0 21
309 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 3 0 21
305 inst_AS_030_000_SYNC 3 -1 3 2 0 3 -1 -1 3 0 21
301 cpu_est_1_ 3 -1 6 2 2 6 -1 -1 3 0 21
298 cpu_est_3_ 3 -1 2 2 2 6 -1 -1 3 0 21
297 cpu_est_2_ 3 -1 6 2 2 6 -1 -1 3 0 21
335 N_138_i 3 -1 2 2 0 5 -1 -1 2 0 21
329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21
323 inst_CLK_OUT_PRE_25 3 -1 5 2 0 5 -1 -1 2 0 21
316 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
307 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 2 0 21
303 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21
302 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21
324 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21
322 inst_CLK_OUT_PRE_50 3 -1 2 2 2 5 -1 -1 1 0 21
367 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
356 N_169 3 -1 0 1 3 -1 -1 3 0 21
350 N_299_i_1 3 -1 3 1 3 -1 -1 3 0 21
345 sm_amiga_nss_i_7__n 3 -1 5 1 0 -1 -1 3 0 21
338 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21
311 CYCLE_DMA_1_ 3 -1 1 1 1 -1 -1 3 0 21
299 N_22_i 3 -1 2 1 3 -1 -1 3 0 21
296 rw_000_int_0_un1_n 3 -1 0 1 7 -1 -1 3 0 21
295 rw_000_int_0_un3_n 3 -1 0 1 7 -1 -1 3 0 21
370 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
369 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
368 RN_RW 3 70 6 1 6 70 -1 2 0 21
365 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
363 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
362 RN_RW_000 3 79 7 1 7 79 -1 2 0 21
361 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
360 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
359 pos_clk_un23_bgack_030_int_i_1_i_n 3 -1 1 1 1 -1 -1 2 0 21
357 pos_clk_un23_bgack_030_int_i_0_x2 3 -1 1 1 1 -1 -1 2 0 21
352 N_231 3 -1 0 1 0 -1 -1 2 0 21
351 N_215 3 -1 2 1 0 -1 -1 2 0 21
349 G_119 3 -1 6 1 1 -1 -1 2 0 21
348 G_118 3 -1 2 1 1 -1 -1 2 0 21
346 N_109_0 3 -1 1 1 1 -1 -1 2 0 21
341 inst_CLK_030_H 3 -1 1 1 1 -1 -1 2 0 21
340 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21
339 RST_DLY_1_ 3 -1 3 1 3 -1 -1 2 0 21
331 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 2 0 21
330 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21
315 N_241_i 3 -1 6 1 6 -1 -1 2 0 21
293 pos_clk_un6_bgack_000_0_n 3 -1 7 1 7 -1 -1 2 0 21
366 RN_VMA 3 34 3 1 2 34 -1 1 0 21
358 N_113_i 3 -1 7 1 1 -1 -1 1 0 21
355 N_294 3 -1 3 1 0 -1 -1 1 0 21
354 N_274 3 -1 7 1 0 -1 -1 1 0 21
353 N_234 3 -1 0 1 0 -1 -1 1 0 21
328 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21
327 IPL_D0_1_ 3 -1 5 1 6 -1 -1 1 0 21
325 IPL_D0_0_ 3 -1 6 1 2 -1 -1 1 0 21
318 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21
314 inst_VPA_D 3 -1 6 1 2 -1 -1 1 0 21
308 N_238_i 3 -1 2 1 2 -1 -1 1 0 21
294 N_167_i 3 -1 7 1 3 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
66 IPL_0_ 1 -1 -1 3 1 2 6 66 -1
55 IPL_1_ 1 -1 -1 3 1 5 6 55 -1
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 0 1 67 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
63 CLK_030 1 -1 -1 1 1 63 -1
59 A_1_ 1 -1 -1 1 5 59 -1
35 VPA 1 -1 -1 1 6 35 -1
29 DTACK 1 -1 -1 1 6 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 5 10 -1
151 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 6 0 1 2 3 5 7 40 -1 1 0 21
41 AS_000 5 -1 4 5 0 1 4 6 7 41 -1 1 0 21
79 RW_000 5 375 7 2 4 6 79 -1 3 0 21
70 RW 5 380 6 2 1 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
68 A_0_ 5 381 6 1 3 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 377 7 0 82 -1 3 0 21
80 DSACK1 5 378 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 376 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 374 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 373 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 382 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
34 VMA 5 379 3 0 34 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
377 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
327 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
329 CLK_000_D_0_ 3 -1 2 7 0 1 2 3 4 5 6 -1 -1 1 0 21
328 CLK_000_D_1_ 3 -1 4 7 0 1 2 3 4 5 6 -1 -1 1 0 21
310 inst_AS_030_D0 3 -1 7 5 1 2 3 4 7 -1 -1 1 0 21
351 SM_AMIGA_6_ 3 -1 3 4 0 1 3 7 -1 -1 3 0 21
364 SM_AMIGA_i_7_ 3 -1 5 3 2 3 7 -1 -1 3 0 21
353 SM_AMIGA_4_ 3 -1 2 3 0 1 2 -1 -1 3 0 21
352 SM_AMIGA_0_ 3 -1 0 3 0 2 7 -1 -1 3 0 21
361 SM_AMIGA_3_ 3 -1 2 3 0 2 5 -1 -1 2 0 21
369 S0__clk_un23_bgack_030_int_i_0_0 3 -1 0 2 0 6 -1 -1 3 0 21
362 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21
359 SM_AMIGA_5_ 3 -1 3 2 2 3 -1 -1 3 0 21
358 SM_AMIGA_1_ 3 -1 0 2 0 5 -1 -1 3 0 21
354 RST_DLY_0_ 3 -1 6 2 2 6 -1 -1 3 0 21
350 inst_BGACK_030_INT_PRE 3 -1 1 2 1 7 -1 -1 3 0 21
318 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
317 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
306 cpu_est_2_ 3 -1 5 2 5 6 -1 -1 3 0 21
305 cpu_est_1_ 3 -1 5 2 5 6 -1 -1 3 0 21
303 cpu_est_3_ 3 -1 5 2 5 6 -1 -1 3 0 21
355 RST_DLY_1_ 3 -1 2 2 2 6 -1 -1 2 0 21
349 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21
331 inst_CLK_OUT_PRE_25 3 -1 1 2 1 3 -1 -1 2 0 21
314 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 2 0 21
313 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21
311 inst_AS_030_000_SYNC 3 -1 3 2 0 3 -1 -1 2 0 21
308 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 3 2 2 3 -1 -1 2 0 21
307 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21
330 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
325 CLK_000_D_11_ 3 -1 3 2 0 6 -1 -1 1 0 21
324 CLK_000_D_10_ 3 -1 2 2 0 3 -1 -1 1 0 21
322 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21
312 inst_BGACK_030_INT_D 3 -1 7 2 3 6 -1 -1 1 0 21
309 N_127_i 3 -1 4 2 0 7 -1 -1 1 0 21
299 N_126_i 3 -1 4 2 5 6 -1 -1 1 0 21
381 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
375 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
367 N_95 3 -1 0 1 7 -1 -1 3 0 21
363 N_136_0 3 -1 1 1 2 -1 -1 3 0 21
333 N_22_i 3 -1 5 1 3 -1 -1 3 0 21
321 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21
316 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
315 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21
304 cpu_est_0_ 3 -1 5 1 5 -1 -1 3 0 21
298 N_180 3 -1 0 1 5 -1 -1 3 0 21
382 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
380 RN_RW 3 70 6 1 6 70 -1 2 0 21
378 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
376 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
374 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
373 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
372 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
371 N_187 3 -1 6 1 2 -1 -1 2 0 21
370 N_409_1 3 -1 6 1 0 -1 -1 2 0 21
368 N_181 3 -1 5 1 5 -1 -1 2 0 21
366 G_117 3 -1 1 1 1 -1 -1 2 0 21
365 G_116 3 -1 2 1 1 -1 -1 2 0 21
357 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21
356 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21
348 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21
347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21
323 pos_clk_un6_bgack_000_0_n 3 -1 4 1 7 -1 -1 2 0 21
320 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21
302 N_211_i 3 -1 5 1 5 -1 -1 2 0 21
301 N_408 3 -1 2 1 5 -1 -1 2 0 21
297 N_179 3 -1 3 1 5 -1 -1 2 0 21
296 ds_000_dma_0_un1_n 3 -1 6 1 2 -1 -1 2 0 21
295 ds_000_dma_0_un3_n 3 -1 6 1 2 -1 -1 2 0 21
294 N_163_0 3 -1 5 1 2 -1 -1 2 0 21
379 RN_VMA 3 34 3 1 5 34 -1 1 0 21
360 pos_clk_un23_bgack_030_int_i_0_0_n 3 -1 0 1 6 -1 -1 1 0 21
346 CLK_000_D_12_ 3 -1 0 1 0 -1 -1 1 0 21
345 CLK_000_D_9_ 3 -1 0 1 2 -1 -1 1 0 21
344 CLK_000_D_8_ 3 -1 5 1 0 -1 -1 1 0 21
343 CLK_000_D_7_ 3 -1 5 1 5 -1 -1 1 0 21
342 CLK_000_D_6_ 3 -1 5 1 5 -1 -1 1 0 21
341 CLK_000_D_5_ 3 -1 2 1 5 -1 -1 1 0 21
340 CLK_000_D_4_ 3 -1 0 1 2 -1 -1 1 0 21
339 N_208_i 3 -1 5 1 5 -1 -1 1 0 21
338 CLK_000_D_3_ 3 -1 5 1 0 -1 -1 1 0 21
337 N_130_i 3 -1 7 1 3 -1 -1 1 0 21
336 CLK_000_D_2_ 3 -1 4 1 5 -1 -1 1 0 21
335 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21
334 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21
332 IPL_D0_0_ 3 -1 1 1 2 -1 -1 1 0 21
326 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21
319 inst_VPA_D 3 -1 7 1 5 -1 -1 1 0 21
300 N_245 3 -1 0 1 5 -1 -1 1 0 21
293 N_182 3 -1 0 1 5 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
27 BGACK_000 1 -1 -1 3 1 4 7 27 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 5 67 -1
66 IPL_0_ 1 -1 -1 2 1 2 66 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 0 1 55 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
63 CLK_030 1 -1 -1 1 6 63 -1
59 A_1_ 1 -1 -1 1 3 59 -1
35 VPA 1 -1 -1 1 7 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 2 10 -1
150 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
79 RW_000 5 374 7 2 4 6 79 -1 3 0 21
68 A_0_ 5 380 6 2 0 1 68 -1 3 0 21
70 RW 5 379 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 376 7 0 82 -1 3 0 21
34 VMA 5 378 3 0 34 -1 3 0 21
80 DSACK1 5 377 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 375 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 373 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 372 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 381 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
376 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
330 inst_RESET_OUT 3 -1 2 7 0 1 2 3 4 6 7 -1 -1 2 0 21
332 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 4 5 7 -1 -1 1 0 21
331 CLK_000_D_1_ 3 -1 4 7 0 1 2 3 4 5 7 -1 -1 1 0 21
352 SM_AMIGA_6_ 3 -1 1 5 0 1 2 5 7 -1 -1 3 0 21
310 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21
366 SM_AMIGA_i_7_ 3 -1 5 3 1 2 7 -1 -1 3 0 21
362 SM_AMIGA_2_ 3 -1 5 3 0 1 5 -1 -1 3 0 21
359 SM_AMIGA_1_ 3 -1 0 3 0 5 7 -1 -1 3 0 21
353 SM_AMIGA_0_ 3 -1 7 3 1 2 7 -1 -1 3 0 21
305 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 3 0 21
311 inst_AS_030_000_SYNC 3 -1 2 3 1 2 3 -1 -1 2 0 21
365 N_375_i 3 -1 5 3 2 3 5 -1 -1 1 0 21
325 N_376_i 3 -1 4 3 0 5 7 -1 -1 1 0 21
324 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21
361 SM_AMIGA_3_ 3 -1 5 2 1 5 -1 -1 3 0 21
360 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21
354 SM_AMIGA_4_ 3 -1 5 2 1 5 -1 -1 3 0 21
351 inst_BGACK_030_INT_PRE 3 -1 0 2 0 7 -1 -1 3 0 21
322 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21
318 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
317 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
303 cpu_est_0_ 3 -1 0 2 0 3 -1 -1 3 0 21
301 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
350 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21
348 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
314 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 2 0 21
313 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21
309 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
308 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
327 CLK_000_D_11_ 3 -1 2 2 2 3 -1 -1 1 0 21
312 inst_BGACK_030_INT_D 3 -1 5 2 2 6 -1 -1 1 0 21
380 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
378 RN_VMA 3 34 3 1 3 34 -1 3 0 21
374 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
355 RST_DLY_0_ 3 -1 2 1 2 -1 -1 3 0 21
316 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
315 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21
306 N_154_0 3 -1 2 1 7 -1 -1 3 0 21
295 N_192_i 3 -1 5 1 5 -1 -1 3 0 21
293 N_146_0 3 -1 5 1 2 -1 -1 3 0 21
381 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
379 RN_RW 3 70 6 1 6 70 -1 2 0 21
377 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
375 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
373 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
370 N_186 3 -1 2 1 2 -1 -1 2 0 21
368 G_117 3 -1 0 1 1 -1 -1 2 0 21
367 G_116 3 -1 5 1 1 -1 -1 2 0 21
363 N_164_i 3 -1 3 1 5 -1 -1 2 0 21
358 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21
357 RST_DLY_2_ 3 -1 2 1 2 -1 -1 2 0 21
356 RST_DLY_1_ 3 -1 2 1 2 -1 -1 2 0 21
349 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21
335 inst_CLK_OUT_PRE_25 3 -1 5 1 5 -1 -1 2 0 21
321 pos_clk_un23_bgack_030_int_i_0_0_n 3 -1 0 1 6 -1 -1 2 0 21
304 ds_000_dma_0_un1_n 3 -1 6 1 6 -1 -1 2 0 21
302 ds_000_dma_0_un3_n 3 -1 6 1 6 -1 -1 2 0 21
296 N_191_i 3 -1 5 1 5 -1 -1 2 0 21
294 N_255_i 3 -1 7 1 5 -1 -1 2 0 21
369 N_258 3 -1 0 1 5 -1 -1 1 0 21
364 N_149_i 3 -1 0 1 3 -1 -1 1 0 21
347 CLK_000_D_12_ 3 -1 3 1 2 -1 -1 1 0 21
346 CLK_000_D_9_ 3 -1 5 1 0 -1 -1 1 0 21
345 CLK_000_D_8_ 3 -1 6 1 5 -1 -1 1 0 21
344 CLK_000_D_7_ 3 -1 0 1 6 -1 -1 1 0 21
343 CLK_000_D_6_ 3 -1 1 1 0 -1 -1 1 0 21
342 CLK_000_D_5_ 3 -1 0 1 1 -1 -1 1 0 21
341 CLK_000_D_4_ 3 -1 3 1 0 -1 -1 1 0 21
340 CLK_000_D_3_ 3 -1 4 1 3 -1 -1 1 0 21
339 CLK_000_D_2_ 3 -1 4 1 4 -1 -1 1 0 21
338 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21
337 IPL_D0_1_ 3 -1 1 1 0 -1 -1 1 0 21
336 IPL_D0_0_ 3 -1 5 1 5 -1 -1 1 0 21
334 inst_CLK_OUT_PRE_50 3 -1 5 1 5 -1 -1 1 0 21
333 N_133_i 3 -1 4 1 2 -1 -1 1 0 21
329 inst_DTACK_D0 3 -1 1 1 3 -1 -1 1 0 21
328 N_275_i 3 -1 4 1 7 -1 -1 1 0 21
326 CLK_000_D_10_ 3 -1 0 1 2 -1 -1 1 0 21
323 N_249_i 3 -1 6 1 0 -1 -1 1 0 21
319 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21
300 N_194_i 3 -1 1 1 5 -1 -1 1 0 21
299 vma_int_0_un1_n 3 -1 3 1 3 -1 -1 1 0 21
298 N_253_i 3 -1 1 1 5 -1 -1 1 0 21
297 N_267_i 3 -1 0 1 5 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
27 BGACK_000 1 -1 -1 3 0 4 7 27 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 3 67 -1
66 IPL_0_ 1 -1 -1 2 1 5 66 -1
63 CLK_030 1 -1 -1 2 2 6 63 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
55 IPL_1_ 1 -1 -1 2 0 1 55 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 6 59 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 3 10 -1
149 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 5 0 1 2 4 5 40 -1 1 0 21
41 AS_000 5 -1 4 4 0 4 5 7 41 -1 1 0 21
79 RW_000 5 372 7 2 4 6 79 -1 3 0 21
70 RW 5 377 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 378 6 1 1 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
34 VMA 5 376 3 0 34 -1 3 0 21
80 DSACK1 5 375 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 373 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 371 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 380 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 379 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
82 BGACK_030 5 374 7 0 82 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
374 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 1 0 21
322 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21
324 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21
323 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21
362 SM_AMIGA_3_ 3 -1 0 4 0 1 2 3 -1 -1 3 0 21
351 SM_AMIGA_6_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21
306 inst_AS_030_D0 3 -1 7 4 0 2 3 4 -1 -1 1 0 21
298 N_124_i 3 -1 3 4 0 1 2 6 -1 -1 1 0 21
363 SM_AMIGA_2_ 3 -1 0 3 0 2 5 -1 -1 3 0 21
353 SM_AMIGA_4_ 3 -1 5 3 0 2 5 -1 -1 3 0 21
352 SM_AMIGA_0_ 3 -1 0 3 0 2 7 -1 -1 3 0 21
303 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 0 21
300 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
364 SM_AMIGA_i_7_ 3 -1 5 2 2 7 -1 -1 3 0 21
361 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21
359 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21
355 RST_DLY_0_ 3 -1 1 2 0 1 -1 -1 3 0 21
319 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21
315 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
314 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
310 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 3 0 21
307 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 3 0 21
301 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 3 0 21
299 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21
357 RST_DLY_2_ 3 -1 0 2 0 1 -1 -1 2 0 21
356 RST_DLY_1_ 3 -1 0 2 0 1 -1 -1 2 0 21
348 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21
346 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
318 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
309 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21
304 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
368 N_125_i 3 -1 7 2 5 7 -1 -1 1 0 21
327 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21
320 CLK_000_D_11_ 3 -1 5 2 0 5 -1 -1 1 0 21
308 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21
378 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
376 RN_VMA 3 34 3 1 3 34 -1 3 0 21
372 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
369 N_132_0 3 -1 5 1 2 -1 -1 3 0 21
354 sm_amiga_nss_i_7__n 3 -1 0 1 5 -1 -1 3 0 21
349 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
313 CYCLE_DMA_1_ 3 -1 5 1 5 -1 -1 3 0 21
312 CYCLE_DMA_0_ 3 -1 5 1 5 -1 -1 3 0 21
297 N_11 3 -1 7 1 7 -1 -1 3 0 21
294 dsack1_int_0_un1_n 3 -1 0 1 7 -1 -1 3 0 21
293 dsack1_int_0_un3_n 3 -1 0 1 7 -1 -1 3 0 21
380 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
379 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
377 RN_RW 3 70 6 1 6 70 -1 2 0 21
375 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
373 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
371 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
370 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
366 G_117 3 -1 0 1 6 -1 -1 2 0 21
365 G_116 3 -1 0 1 6 -1 -1 2 0 21
360 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21
358 N_291_0 3 -1 6 1 6 -1 -1 2 0 21
350 pos_clk_un23_bgack_030_int_i_0_i_n 3 -1 5 1 6 -1 -1 2 0 21
347 pos_clk_ipl_n 3 -1 6 1 1 -1 -1 2 0 21
337 N_243_i 3 -1 5 1 5 -1 -1 2 0 21
335 N_231_i 3 -1 3 1 5 -1 -1 2 0 21
326 inst_CLK_OUT_PRE_25 3 -1 5 1 5 -1 -1 2 0 21
316 N_220_i 3 -1 1 1 0 -1 -1 2 0 21
311 N_150_i 3 -1 3 1 0 -1 -1 2 0 21
305 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
367 N_337 3 -1 6 1 5 -1 -1 1 0 21
345 CLK_000_D_12_ 3 -1 5 1 0 -1 -1 1 0 21
344 CLK_000_D_10_ 3 -1 2 1 5 -1 -1 1 0 21
343 CLK_000_D_9_ 3 -1 3 1 2 -1 -1 1 0 21
342 CLK_000_D_8_ 3 -1 3 1 3 -1 -1 1 0 21
341 CLK_000_D_7_ 3 -1 4 1 3 -1 -1 1 0 21
340 CLK_000_D_6_ 3 -1 3 1 4 -1 -1 1 0 21
339 CLK_000_D_5_ 3 -1 1 1 3 -1 -1 1 0 21
338 CLK_000_D_4_ 3 -1 5 1 1 -1 -1 1 0 21
336 CLK_000_D_3_ 3 -1 1 1 5 -1 -1 1 0 21
334 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21
333 N_350_i 3 -1 5 1 5 -1 -1 1 0 21
332 IPL_D0_2_ 3 -1 7 1 6 -1 -1 1 0 21
331 N_304_i 3 -1 1 1 5 -1 -1 1 0 21
330 IPL_D0_1_ 3 -1 3 1 0 -1 -1 1 0 21
329 N_245_i 3 -1 2 1 5 -1 -1 1 0 21
328 IPL_D0_0_ 3 -1 0 1 0 -1 -1 1 0 21
325 inst_CLK_OUT_PRE_50 3 -1 5 1 5 -1 -1 1 0 21
321 inst_DTACK_D0 3 -1 0 1 3 -1 -1 1 0 21
317 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21
302 N_136_i 3 -1 3 1 2 -1 -1 1 0 21
296 N_266_i 3 -1 3 1 3 -1 -1 1 0 21
295 N_227 3 -1 4 1 2 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
67 IPL_2_ 1 -1 -1 3 1 6 7 67 -1
55 IPL_1_ 1 -1 -1 3 0 1 3 55 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
66 IPL_0_ 1 -1 -1 2 0 1 66 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
63 CLK_030 1 -1 -1 1 6 63 -1
59 A_1_ 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 0 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 6 10 -1
149 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 5 0 1 2 4 5 40 -1 1 0 21
41 AS_000 5 -1 4 4 0 4 5 7 41 -1 1 0 21
79 RW_000 5 372 7 2 4 6 79 -1 3 0 21
70 RW 5 377 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 378 6 1 1 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
34 VMA 5 376 3 0 34 -1 3 0 21
80 DSACK1 5 375 7 0 80 -1 2 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 373 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 371 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 380 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 379 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
82 BGACK_030 5 374 7 0 82 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
374 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 1 0 21
322 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21
324 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21
323 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21
362 SM_AMIGA_3_ 3 -1 0 4 0 1 2 3 -1 -1 3 0 21
351 SM_AMIGA_6_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21
306 inst_AS_030_D0 3 -1 7 4 0 2 3 4 -1 -1 1 0 21
298 N_124_i 3 -1 3 4 0 1 2 6 -1 -1 1 0 21
363 SM_AMIGA_2_ 3 -1 0 3 0 2 5 -1 -1 3 0 21
353 SM_AMIGA_4_ 3 -1 5 3 0 2 5 -1 -1 3 0 21
352 SM_AMIGA_0_ 3 -1 0 3 0 2 7 -1 -1 3 0 21
303 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 0 21
300 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
364 SM_AMIGA_i_7_ 3 -1 5 2 2 7 -1 -1 3 0 21
361 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21
359 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21
355 RST_DLY_0_ 3 -1 1 2 0 1 -1 -1 3 0 21
319 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21
315 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
314 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
310 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 3 0 21
307 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 3 0 21
301 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 3 0 21
299 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21
357 RST_DLY_2_ 3 -1 0 2 0 1 -1 -1 2 0 21
356 RST_DLY_1_ 3 -1 0 2 0 1 -1 -1 2 0 21
348 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21
346 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
318 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
309 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21
304 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
368 N_125_i 3 -1 7 2 5 7 -1 -1 1 0 21
327 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21
320 CLK_000_D_11_ 3 -1 5 2 0 5 -1 -1 1 0 21
308 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21
378 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
376 RN_VMA 3 34 3 1 3 34 -1 3 0 21
372 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
369 N_132_0 3 -1 5 1 2 -1 -1 3 0 21
354 sm_amiga_nss_i_7__n 3 -1 0 1 5 -1 -1 3 0 21
349 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21
313 CYCLE_DMA_1_ 3 -1 5 1 5 -1 -1 3 0 21
312 CYCLE_DMA_0_ 3 -1 5 1 5 -1 -1 3 0 21
297 N_11 3 -1 7 1 7 -1 -1 3 0 21
294 dsack1_int_0_un1_n 3 -1 0 1 7 -1 -1 3 0 21
293 dsack1_int_0_un3_n 3 -1 0 1 7 -1 -1 3 0 21
380 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
379 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
377 RN_RW 3 70 6 1 6 70 -1 2 0 21
375 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
373 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
371 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
370 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
366 G_117 3 -1 0 1 6 -1 -1 2 0 21
365 G_116 3 -1 0 1 6 -1 -1 2 0 21
360 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21
358 N_291_0 3 -1 6 1 6 -1 -1 2 0 21
350 pos_clk_un23_bgack_030_int_i_0_i_n 3 -1 5 1 6 -1 -1 2 0 21
347 pos_clk_ipl_n 3 -1 6 1 1 -1 -1 2 0 21
337 N_243_i 3 -1 5 1 5 -1 -1 2 0 21
335 N_231_i 3 -1 3 1 5 -1 -1 2 0 21
326 inst_CLK_OUT_PRE_25 3 -1 5 1 5 -1 -1 2 0 21
316 N_220_i 3 -1 1 1 0 -1 -1 2 0 21
311 N_150_i 3 -1 3 1 0 -1 -1 2 0 21
305 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
367 N_337 3 -1 6 1 5 -1 -1 1 0 21
345 CLK_000_D_12_ 3 -1 5 1 0 -1 -1 1 0 21
344 CLK_000_D_10_ 3 -1 2 1 5 -1 -1 1 0 21
343 CLK_000_D_9_ 3 -1 3 1 2 -1 -1 1 0 21
342 CLK_000_D_8_ 3 -1 3 1 3 -1 -1 1 0 21
341 CLK_000_D_7_ 3 -1 4 1 3 -1 -1 1 0 21
340 CLK_000_D_6_ 3 -1 3 1 4 -1 -1 1 0 21
339 CLK_000_D_5_ 3 -1 1 1 3 -1 -1 1 0 21
338 CLK_000_D_4_ 3 -1 5 1 1 -1 -1 1 0 21
336 CLK_000_D_3_ 3 -1 1 1 5 -1 -1 1 0 21
334 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21
333 N_350_i 3 -1 5 1 5 -1 -1 1 0 21
332 IPL_D0_2_ 3 -1 7 1 6 -1 -1 1 0 21
331 N_304_i 3 -1 1 1 5 -1 -1 1 0 21
330 IPL_D0_1_ 3 -1 3 1 0 -1 -1 1 0 21
329 N_245_i 3 -1 2 1 5 -1 -1 1 0 21
328 IPL_D0_0_ 3 -1 0 1 0 -1 -1 1 0 21
325 inst_CLK_OUT_PRE_50 3 -1 5 1 5 -1 -1 1 0 21
321 inst_DTACK_D0 3 -1 0 1 3 -1 -1 1 0 21
317 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21
302 N_136_i 3 -1 3 1 2 -1 -1 1 0 21
296 N_266_i 3 -1 3 1 3 -1 -1 1 0 21
295 N_227 3 -1 4 1 2 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
67 IPL_2_ 1 -1 -1 3 1 6 7 67 -1
55 IPL_1_ 1 -1 -1 3 0 1 3 55 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
66 IPL_0_ 1 -1 -1 2 0 1 66 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
63 CLK_030 1 -1 -1 1 6 63 -1
59 A_1_ 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 0 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 6 10 -1
144 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 1 4 6 7 41 -1 1 0 21
40 BERR 5 -1 4 4 2 5 6 7 40 -1 1 0 21
79 RW_000 5 367 7 3 0 4 6 79 -1 3 0 21
68 A_0_ 5 373 6 2 0 3 68 -1 3 0 21
70 RW 5 372 6 2 2 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
82 BGACK_030 5 369 7 0 82 -1 3 0 21
80 DSACK1 5 370 7 0 80 -1 3 0 21
34 VMA 5 371 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 368 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 366 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 375 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 374 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
369 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
318 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21
320 CLK_000_D_0_ 3 -1 0 5 1 2 3 5 7 -1 -1 1 0 21
319 CLK_000_D_1_ 3 -1 7 5 1 2 3 5 7 -1 -1 1 0 21
340 SM_AMIGA_6_ 3 -1 2 4 0 2 3 7 -1 -1 3 0 21
303 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21
352 SM_AMIGA_3_ 3 -1 5 3 2 3 5 -1 -1 3 0 21
300 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
299 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 3 0 21
350 N_150_i 3 -1 7 3 2 6 7 -1 -1 1 0 21
305 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21
355 SM_AMIGA_i_7_ 3 -1 5 2 2 7 -1 -1 3 0 21
353 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 3 0 21
351 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21
348 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
343 RST_DLY_0_ 3 -1 5 2 1 5 -1 -1 3 0 21
342 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21
341 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21
315 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21
312 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
311 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
309 CYCLE_DMA_0_ 3 -1 1 2 1 6 -1 -1 3 0 21
298 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 3 0 21
297 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
346 RST_DLY_2_ 3 -1 5 2 1 5 -1 -1 2 0 21
345 RST_DLY_1_ 3 -1 1 2 1 5 -1 -1 2 0 21
339 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21
337 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21
306 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 2 0 21
304 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 2 0 21
302 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21
301 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
294 N_178_i 3 -1 3 2 2 5 -1 -1 2 0 21
323 inst_CLK_OUT_PRE_D 3 -1 1 2 1 6 -1 -1 1 0 21
321 inst_CLK_OUT_PRE_50 3 -1 4 2 1 4 -1 -1 1 0 21
296 N_149_i 3 -1 7 2 3 5 -1 -1 1 0 21
373 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
371 RN_VMA 3 34 3 1 3 34 -1 3 0 21
370 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
367 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
364 sm_amiga_nss_0_7__n 3 -1 7 1 5 -1 -1 3 0 21
363 N_209 3 -1 2 1 5 -1 -1 3 0 21
358 S0__clk_un21_bgack_030_int_i_0_i 3 -1 6 1 0 -1 -1 3 0 21
347 N_157_0 3 -1 2 1 2 -1 -1 3 0 21
310 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21
307 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 3 0 21
375 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
374 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
372 RN_RW 3 70 6 1 6 70 -1 2 0 21
368 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
365 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
361 pos_clk_ipl_1_n 3 -1 0 1 0 -1 -1 2 0 21
357 N_210 3 -1 3 1 5 -1 -1 2 0 21
356 G_116 3 -1 6 1 0 -1 -1 2 0 21
354 N_309_0 3 -1 0 1 0 -1 -1 2 0 21
349 inst_CLK_030_H 3 -1 0 1 0 -1 -1 2 0 21
338 pos_clk_ipl_n 3 -1 0 1 1 -1 -1 2 0 21
322 inst_CLK_OUT_PRE_25 3 -1 1 1 1 -1 -1 2 0 21
314 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21
293 N_204_i 3 -1 5 1 1 -1 -1 2 0 21
362 N_211 3 -1 2 1 5 -1 -1 1 0 21
360 N_266 3 -1 5 1 5 -1 -1 1 0 21
359 N_259 3 -1 6 1 5 -1 -1 1 0 21
344 N_167_i 3 -1 4 1 2 -1 -1 1 0 21
336 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21
335 CLK_000_D_10_ 3 -1 5 1 6 -1 -1 1 0 21
334 CLK_000_D_9_ 3 -1 4 1 5 -1 -1 1 0 21
333 CLK_000_D_8_ 3 -1 0 1 4 -1 -1 1 0 21
332 CLK_000_D_7_ 3 -1 0 1 0 -1 -1 1 0 21
331 CLK_000_D_6_ 3 -1 6 1 0 -1 -1 1 0 21
330 CLK_000_D_5_ 3 -1 5 1 6 -1 -1 1 0 21
329 CLK_000_D_4_ 3 -1 3 1 5 -1 -1 1 0 21
328 CLK_000_D_3_ 3 -1 5 1 3 -1 -1 1 0 21
327 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21
326 IPL_D0_2_ 3 -1 1 1 0 -1 -1 1 0 21
325 IPL_D0_1_ 3 -1 5 1 0 -1 -1 1 0 21
324 IPL_D0_0_ 3 -1 6 1 6 -1 -1 1 0 21
317 inst_DTACK_D0 3 -1 6 1 3 -1 -1 1 0 21
316 CLK_000_D_11_ 3 -1 6 1 7 -1 -1 1 0 21
313 inst_VPA_D 3 -1 5 1 3 -1 -1 1 0 21
308 N_236_i 3 -1 3 1 3 -1 -1 1 0 21
295 N_160_i 3 -1 2 1 5 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
55 IPL_1_ 1 -1 -1 3 0 1 5 55 -1
96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 0 1 67 -1
66 IPL_0_ 1 -1 -1 2 1 6 66 -1
58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
63 CLK_030 1 -1 -1 1 0 63 -1
59 A_1_ 1 -1 -1 1 1 59 -1
35 VPA 1 -1 -1 1 5 35 -1
29 DTACK 1 -1 -1 1 6 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 0 10 -1
138 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 1 5 7 40 -1 1 0 21
79 RW_000 5 361 7 3 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 3 3 4 7 81 -1 1 0 21
68 A_0_ 5 367 6 2 0 2 68 -1 3 0 21
70 RW 5 366 6 2 5 7 70 -1 2 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
34 VMA 5 365 3 0 34 -1 4 0 21
6 IPL_030_1_ 5 368 1 0 6 -1 4 0 21
82 BGACK_030 5 363 7 0 82 -1 3 0 21
80 DSACK1 5 364 7 0 80 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 362 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 360 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 369 1 0 7 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
363 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
317 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21
319 CLK_000_D_0_ 3 -1 2 5 0 3 5 6 7 -1 -1 1 0 21
318 CLK_000_D_1_ 3 -1 6 5 0 3 5 6 7 -1 -1 1 0 21
302 inst_AS_030_D0 3 -1 3 5 1 3 4 5 7 -1 -1 1 0 21
340 SM_AMIGA_6_ 3 -1 5 4 0 2 5 7 -1 -1 3 0 21
352 SM_AMIGA_i_7_ 3 -1 0 3 1 5 7 -1 -1 4 0 21
299 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
298 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
296 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
297 cpu_est_0_ 3 -1 0 3 0 3 5 -1 -1 3 0 21
303 inst_AS_030_000_SYNC 3 -1 5 3 1 3 5 -1 -1 1 0 21
365 RN_VMA 3 34 3 2 3 5 34 -1 4 0 21
351 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 4 0 21
350 SM_AMIGA_3_ 3 -1 0 2 0 5 -1 -1 4 0 21
339 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 4 0 21
307 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 4 0 21
349 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 3 0 21
347 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
342 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21
341 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21
314 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
311 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
310 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
337 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
313 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
305 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 2 0 21
300 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
322 inst_CLK_OUT_PRE_D 3 -1 1 2 1 6 -1 -1 1 0 21
320 inst_CLK_OUT_PRE_50 3 -1 2 2 1 2 -1 -1 1 0 21
304 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21
368 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
361 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
357 N_209 3 -1 0 1 0 -1 -1 4 0 21
355 pos_clk_ipl_1_n 3 -1 2 1 1 -1 -1 4 0 21
345 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21
344 RST_DLY_0_ 3 -1 3 1 3 -1 -1 4 0 21
343 pos_clk_un21_bgack_030_int_i_0_i_n 3 -1 6 1 2 -1 -1 4 0 21
309 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 4 0 21
293 as_030_000_sync_0_un0_n 3 -1 1 1 5 -1 -1 4 0 21
367 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
364 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
358 sm_amiga_nss_0_7__n 3 -1 7 1 0 -1 -1 3 0 21
308 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 3 0 21
369 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
366 RN_RW 3 70 6 1 6 70 -1 2 0 21
362 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
360 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
359 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
348 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21
346 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21
338 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21
321 inst_CLK_OUT_PRE_25 3 -1 1 1 1 -1 -1 2 0 21
301 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
294 N_178_i 3 -1 5 1 0 -1 -1 2 0 21
356 N_211 3 -1 5 1 0 -1 -1 1 0 21
354 N_266 3 -1 7 1 0 -1 -1 1 0 21
353 N_259 3 -1 0 1 0 -1 -1 1 0 21
336 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21
335 CLK_000_D_10_ 3 -1 3 1 2 -1 -1 1 0 21
334 N_190_i 3 -1 6 1 1 -1 -1 1 0 21
333 CLK_000_D_9_ 3 -1 3 1 3 -1 -1 1 0 21
332 CLK_000_D_8_ 3 -1 3 1 3 -1 -1 1 0 21
331 CLK_000_D_7_ 3 -1 0 1 3 -1 -1 1 0 21
330 CLK_000_D_6_ 3 -1 6 1 0 -1 -1 1 0 21
329 CLK_000_D_5_ 3 -1 6 1 6 -1 -1 1 0 21
328 CLK_000_D_4_ 3 -1 6 1 6 -1 -1 1 0 21
327 CLK_000_D_3_ 3 -1 1 1 6 -1 -1 1 0 21
326 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21
325 IPL_D0_2_ 3 -1 1 1 2 -1 -1 1 0 21
324 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21
323 IPL_D0_0_ 3 -1 1 1 2 -1 -1 1 0 21
316 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21
315 CLK_000_D_11_ 3 -1 2 1 7 -1 -1 1 0 21
312 inst_VPA_D 3 -1 5 1 5 -1 -1 1 0 21
306 N_237_i 3 -1 5 1 3 -1 -1 1 0 21
295 N_149_i 3 -1 7 1 3 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 3 1 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 1 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 1 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 1 4 7 58 -1
57 FC_1_ 1 -1 -1 3 1 4 7 57 -1
56 FC_0_ 1 -1 -1 3 1 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 2 67 -1
66 IPL_0_ 1 -1 -1 2 1 2 66 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
63 CLK_030 1 -1 -1 1 2 63 -1
59 A_1_ 1 -1 -1 1 2 59 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
35 VPA 1 -1 -1 1 5 35 -1
29 DTACK 1 -1 -1 1 6 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 2 10 -1
130 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 4 5 6 7 41 -1 1 0 21
40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21
79 RW_000 5 353 7 3 4 5 6 79 -1 4 0 21
68 A_0_ 5 359 6 2 1 2 68 -1 3 0 21
70 RW 5 358 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 5 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 5 6 30 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
34 VMA 5 357 3 0 34 -1 7 0 21
82 BGACK_030 5 355 7 0 82 -1 3 0 21
80 DSACK1 5 356 7 0 80 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 354 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 352 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 361 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 360 1 0 6 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
355 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
314 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21
316 CLK_000_D_0_ 3 -1 3 6 0 1 3 5 6 7 -1 -1 1 0 21
315 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21
336 SM_AMIGA_6_ 3 -1 0 5 0 1 2 5 7 -1 -1 3 0 21
300 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21
348 SM_AMIGA_i_7_ 3 -1 0 4 0 2 5 7 -1 -1 8 0 21
301 inst_AS_030_000_SYNC 3 -1 2 3 0 2 3 -1 -1 7 0 21
296 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
294 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
345 SM_AMIGA_5_ 3 -1 1 3 0 1 5 -1 -1 3 0 21
337 SM_AMIGA_0_ 3 -1 7 3 0 5 7 -1 -1 3 0 21
295 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
297 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21
357 RN_VMA 3 34 3 2 0 3 34 -1 7 0 21
303 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21
347 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 4 0 21
335 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 4 0 21
306 CYCLE_DMA_1_ 3 -1 6 2 5 6 -1 -1 4 0 21
304 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 4 0 21
343 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
338 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21
311 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
305 CYCLE_DMA_0_ 3 -1 6 2 5 6 -1 -1 3 0 21
333 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
318 inst_CLK_OUT_PRE_25 3 -1 1 2 1 2 -1 -1 2 0 21
310 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
298 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
319 inst_CLK_OUT_PRE_D 3 -1 2 2 1 6 -1 -1 1 0 21
317 inst_CLK_OUT_PRE_50 3 -1 6 2 1 6 -1 -1 1 0 21
309 inst_VPA_D 3 -1 1 2 0 3 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21
344 inst_CLK_030_H 3 -1 5 1 5 -1 -1 6 1 21
334 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 6 0 21
346 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21
353 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
350 N_209 3 -1 5 1 0 -1 -1 4 0 21
340 RST_DLY_0_ 3 -1 3 1 3 -1 -1 4 0 21
339 pos_clk_un21_bgack_030_int_i_0_i_n 3 -1 6 1 5 -1 -1 4 0 21
359 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
356 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
341 RST_DLY_1_ 3 -1 3 1 3 -1 -1 3 1 21
361 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
360 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
358 RN_RW 3 70 6 1 6 70 -1 2 0 21
354 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
352 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
351 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
342 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21
299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
349 N_211 3 -1 0 1 0 -1 -1 1 0 21
332 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21
331 CLK_000_D_10_ 3 -1 2 1 5 -1 -1 1 0 21
330 CLK_000_D_9_ 3 -1 1 1 2 -1 -1 1 0 21
329 CLK_000_D_8_ 3 -1 2 1 1 -1 -1 1 0 21
328 CLK_000_D_7_ 3 -1 2 1 2 -1 -1 1 0 21
327 CLK_000_D_6_ 3 -1 3 1 2 -1 -1 1 0 21
326 CLK_000_D_5_ 3 -1 3 1 3 -1 -1 1 0 21
325 CLK_000_D_4_ 3 -1 2 1 3 -1 -1 1 0 21
324 CLK_000_D_3_ 3 -1 2 1 2 -1 -1 1 0 21
323 CLK_000_D_2_ 3 -1 1 1 2 -1 -1 1 0 21
322 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21
321 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21
320 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21
312 CLK_000_D_11_ 3 -1 5 1 7 -1 -1 1 0 21
293 N_269_i 3 -1 0 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 3 67 -1
59 A_1_ 1 -1 -1 2 2 6 59 -1
55 IPL_1_ 1 -1 -1 2 1 2 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 5 63 -1
35 VPA 1 -1 -1 1 1 35 -1
29 DTACK 1 -1 -1 1 6 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 3 10 -1
125 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 5 0 2 5 6 7 40 -1 1 0 21
79 RW_000 5 348 7 3 0 4 6 79 -1 4 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
31 UDS_000 5 -1 3 3 0 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 3 0 1 6 30 -1 1 0 21
70 RW 5 353 6 2 2 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 354 6 1 2 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 347 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 356 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 355 1 0 6 -1 10 0 21
34 VMA 5 352 3 0 34 -1 7 0 21
82 BGACK_030 5 350 7 0 82 -1 3 0 21
80 DSACK1 5 351 7 0 80 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 349 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
350 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
313 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
315 CLK_000_D_0_ 3 -1 3 7 0 2 3 4 5 6 7 -1 -1 1 0 21
314 CLK_000_D_1_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 4 6 0 2 3 4 5 7 -1 -1 1 0 21
345 SM_AMIGA_i_7_ 3 -1 5 4 0 2 6 7 -1 -1 13 1 21
300 inst_AS_030_000_SYNC 3 -1 0 4 0 3 5 6 -1 -1 7 0 21
334 SM_AMIGA_6_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
335 SM_AMIGA_0_ 3 -1 7 3 2 5 7 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 1 3 1 6 7 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 3 0 21
301 inst_BGACK_030_INT_D 3 -1 4 3 0 1 6 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 1 1 21
352 RN_VMA 3 34 3 2 3 5 34 -1 7 0 21
302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
333 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 4 0 21
342 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21
340 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
336 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 7 2 0 7 -1 -1 3 0 21
332 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21
317 inst_CLK_OUT_PRE_25 3 -1 2 2 2 3 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
318 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21
311 CLK_000_D_11_ 3 -1 3 2 4 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21
356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
341 inst_CLK_030_H 3 -1 0 1 0 -1 -1 6 1 21
348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
344 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
343 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21
337 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21
354 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
351 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
338 RST_DLY_1_ 3 -1 6 1 6 -1 -1 3 1 21
353 RN_RW 3 70 6 1 6 70 -1 2 0 21
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
346 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
339 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21
331 CLK_000_D_12_ 3 -1 4 1 7 -1 -1 1 0 21
330 CLK_000_D_10_ 3 -1 3 1 3 -1 -1 1 0 21
329 CLK_000_D_9_ 3 -1 5 1 3 -1 -1 1 0 21
328 CLK_000_D_8_ 3 -1 1 1 5 -1 -1 1 0 21
327 CLK_000_D_7_ 3 -1 0 1 1 -1 -1 1 0 21
326 CLK_000_D_6_ 3 -1 7 1 0 -1 -1 1 0 21
325 CLK_000_D_5_ 3 -1 3 1 7 -1 -1 1 0 21
324 CLK_000_D_4_ 3 -1 5 1 3 -1 -1 1 0 21
323 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21
322 CLK_000_D_2_ 3 -1 5 1 0 -1 -1 1 0 21
321 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21
320 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21
319 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
316 inst_CLK_OUT_PRE_50 3 -1 2 1 2 -1 -1 1 0 21
312 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1
57 FC_1_ 1 -1 -1 3 0 4 7 57 -1
56 FC_0_ 1 -1 -1 3 0 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 2 67 -1
55 IPL_1_ 1 -1 -1 2 1 2 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 0 63 -1
59 A_1_ 1 -1 -1 1 1 59 -1
35 VPA 1 -1 -1 1 5 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 3 10 -1
125 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 5 0 2 5 6 7 40 -1 1 0 21
79 RW_000 5 348 7 3 0 4 6 79 -1 4 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
31 UDS_000 5 -1 3 3 0 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 3 0 1 6 30 -1 1 0 21
70 RW 5 353 6 2 2 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 354 6 1 2 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 347 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 356 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 355 1 0 6 -1 10 0 21
82 BGACK_030 5 350 7 0 82 -1 3 0 21
80 DSACK1 5 351 7 0 80 -1 3 0 21
34 VMA 5 352 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 349 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
350 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
313 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
315 CLK_000_D_0_ 3 -1 3 7 0 2 3 4 5 6 7 -1 -1 1 0 21
314 CLK_000_D_1_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 4 6 0 2 3 4 5 7 -1 -1 1 0 21
345 SM_AMIGA_i_7_ 3 -1 5 4 0 2 6 7 -1 -1 13 1 21
300 inst_AS_030_000_SYNC 3 -1 0 4 0 3 5 6 -1 -1 7 0 21
334 SM_AMIGA_6_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
335 SM_AMIGA_0_ 3 -1 7 3 2 5 7 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 1 3 1 6 7 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 3 0 21
301 inst_BGACK_030_INT_D 3 -1 4 3 0 1 6 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 1 1 21
302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
333 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 4 0 21
352 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
342 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21
340 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
336 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 7 2 0 7 -1 -1 3 0 21
332 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21
317 inst_CLK_OUT_PRE_25 3 -1 2 2 2 3 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
318 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21
311 CLK_000_D_11_ 3 -1 3 2 4 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21
356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
341 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
344 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
343 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21
337 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21
354 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
351 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
353 RN_RW 3 70 6 1 6 70 -1 2 0 21
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
346 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
339 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21
338 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21
331 CLK_000_D_12_ 3 -1 4 1 7 -1 -1 1 0 21
330 CLK_000_D_10_ 3 -1 3 1 3 -1 -1 1 0 21
329 CLK_000_D_9_ 3 -1 5 1 3 -1 -1 1 0 21
328 CLK_000_D_8_ 3 -1 1 1 5 -1 -1 1 0 21
327 CLK_000_D_7_ 3 -1 0 1 1 -1 -1 1 0 21
326 CLK_000_D_6_ 3 -1 7 1 0 -1 -1 1 0 21
325 CLK_000_D_5_ 3 -1 3 1 7 -1 -1 1 0 21
324 CLK_000_D_4_ 3 -1 5 1 3 -1 -1 1 0 21
323 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21
322 CLK_000_D_2_ 3 -1 5 1 0 -1 -1 1 0 21
321 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21
320 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21
319 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
316 inst_CLK_OUT_PRE_50 3 -1 2 1 2 -1 -1 1 0 21
312 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1
57 FC_1_ 1 -1 -1 3 0 4 7 57 -1
56 FC_0_ 1 -1 -1 3 0 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 2 67 -1
55 IPL_1_ 1 -1 -1 2 1 2 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 0 63 -1
59 A_1_ 1 -1 -1 1 1 59 -1
35 VPA 1 -1 -1 1 5 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 3 10 -1
125 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 5 0 2 5 6 7 40 -1 1 0 21
79 RW_000 5 348 7 3 0 4 6 79 -1 4 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
31 UDS_000 5 -1 3 3 0 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 3 0 1 6 30 -1 1 0 21
70 RW 5 353 6 2 2 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 354 6 1 2 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 347 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 356 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 355 1 0 6 -1 10 0 21
82 BGACK_030 5 350 7 0 82 -1 3 0 21
80 DSACK1 5 351 7 0 80 -1 3 0 21
34 VMA 5 352 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 349 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
350 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
313 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
315 CLK_000_D_0_ 3 -1 3 7 0 2 3 4 5 6 7 -1 -1 1 0 21
314 CLK_000_D_1_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 4 6 0 2 3 4 5 7 -1 -1 1 0 21
345 SM_AMIGA_i_7_ 3 -1 5 4 0 2 6 7 -1 -1 13 1 21
300 inst_AS_030_000_SYNC 3 -1 0 4 0 3 5 6 -1 -1 7 0 21
334 SM_AMIGA_6_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
335 SM_AMIGA_0_ 3 -1 7 3 2 5 7 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 1 3 1 6 7 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 3 0 21
301 inst_BGACK_030_INT_D 3 -1 4 3 0 1 6 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 1 1 21
302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
333 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 4 0 21
352 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
342 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21
340 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
336 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 7 2 0 7 -1 -1 3 0 21
332 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21
317 inst_CLK_OUT_PRE_25 3 -1 2 2 2 3 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
318 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21
311 CLK_000_D_11_ 3 -1 3 2 4 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21
356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
341 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
344 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
343 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21
337 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21
354 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
351 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21
353 RN_RW 3 70 6 1 6 70 -1 2 0 21
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
346 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
339 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21
338 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21
331 CLK_000_D_12_ 3 -1 4 1 7 -1 -1 1 0 21
330 CLK_000_D_10_ 3 -1 3 1 3 -1 -1 1 0 21
329 CLK_000_D_9_ 3 -1 5 1 3 -1 -1 1 0 21
328 CLK_000_D_8_ 3 -1 1 1 5 -1 -1 1 0 21
327 CLK_000_D_7_ 3 -1 0 1 1 -1 -1 1 0 21
326 CLK_000_D_6_ 3 -1 7 1 0 -1 -1 1 0 21
325 CLK_000_D_5_ 3 -1 3 1 7 -1 -1 1 0 21
324 CLK_000_D_4_ 3 -1 5 1 3 -1 -1 1 0 21
323 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21
322 CLK_000_D_2_ 3 -1 5 1 0 -1 -1 1 0 21
321 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21
320 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21
319 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
316 inst_CLK_OUT_PRE_50 3 -1 2 1 2 -1 -1 1 0 21
312 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1
57 FC_1_ 1 -1 -1 3 0 4 7 57 -1
56 FC_0_ 1 -1 -1 3 0 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 2 67 -1
55 IPL_1_ 1 -1 -1 2 1 2 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
63 CLK_030 1 -1 -1 1 0 63 -1
59 A_1_ 1 -1 -1 1 1 59 -1
35 VPA 1 -1 -1 1 5 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 3 10 -1
125 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
79 RW_000 5 348 7 3 0 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 3 4 6 7 81 -1 1 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
68 A_0_ 5 354 6 2 1 2 68 -1 3 0 21
70 RW 5 353 6 2 2 7 70 -1 2 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 347 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 356 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 355 1 0 6 -1 10 0 21
80 DSACK1 5 351 7 0 80 -1 5 0 21
82 BGACK_030 5 350 7 0 82 -1 3 0 21
34 VMA 5 352 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 349 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
350 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
315 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21
317 CLK_000_D_0_ 3 -1 4 5 0 2 3 5 7 -1 -1 1 0 21
316 CLK_000_D_1_ 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 6 5 0 2 3 4 7 -1 -1 1 0 21
345 SM_AMIGA_i_7_ 3 -1 5 4 0 2 5 7 -1 -1 13 1 21
334 SM_AMIGA_6_ 3 -1 5 4 1 2 5 7 -1 -1 3 0 21
300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
335 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 2 3 2 3 5 -1 -1 3 0 21
311 inst_CLK_OUT_PRE_D 3 -1 2 3 1 6 7 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21
302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
333 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 4 0 21
352 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
342 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21
341 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
336 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
332 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
319 inst_CLK_OUT_PRE_25 3 -1 6 2 2 6 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
318 inst_CLK_OUT_PRE_50 3 -1 4 2 4 6 -1 -1 1 0 21
313 CLK_000_D_11_ 3 -1 7 2 4 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 7 2 0 6 -1 -1 1 0 21
356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
340 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
351 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21
348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
344 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
343 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21
337 RST_DLY_0_ 3 -1 3 1 3 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21
354 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21
353 RN_RW 3 70 6 1 6 70 -1 2 0 21
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
346 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
339 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21
338 RST_DLY_1_ 3 -1 3 1 3 -1 -1 2 1 21
331 CLK_000_D_12_ 3 -1 4 1 7 -1 -1 1 0 21
330 CLK_000_D_9_ 3 -1 6 1 1 -1 -1 1 0 21
329 CLK_000_D_8_ 3 -1 6 1 6 -1 -1 1 0 21
328 CLK_000_D_7_ 3 -1 5 1 6 -1 -1 1 0 21
327 CLK_000_D_6_ 3 -1 2 1 5 -1 -1 1 0 21
326 CLK_000_D_5_ 3 -1 1 1 2 -1 -1 1 0 21
325 CLK_000_D_4_ 3 -1 2 1 1 -1 -1 1 0 21
324 CLK_000_D_3_ 3 -1 4 1 2 -1 -1 1 0 21
323 CLK_000_D_2_ 3 -1 7 1 4 -1 -1 1 0 21
322 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21
321 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21
320 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
314 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21
312 CLK_000_D_10_ 3 -1 1 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1
57 FC_1_ 1 -1 -1 3 0 4 7 57 -1
56 FC_0_ 1 -1 -1 3 0 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 0 1 67 -1
63 CLK_030 1 -1 -1 2 0 7 63 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A_1_ 1 -1 -1 1 6 59 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
35 VPA 1 -1 -1 1 5 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 4 10 -1
124 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 3 4 6 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
79 RW_000 5 347 7 2 4 6 79 -1 4 0 21
70 RW 5 352 6 2 0 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
68 A_0_ 5 353 6 1 0 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 346 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 355 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 354 1 0 6 -1 10 0 21
80 DSACK1 5 350 7 0 80 -1 5 0 21
82 BGACK_030 5 349 7 0 82 -1 3 0 21
34 VMA 5 351 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 348 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
349 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
315 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21
317 CLK_000_D_0_ 3 -1 3 6 0 2 3 5 6 7 -1 -1 1 0 21
316 CLK_000_D_1_ 3 -1 6 6 0 2 3 5 6 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 7 5 0 2 3 4 7 -1 -1 1 0 21
333 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21
344 SM_AMIGA_i_7_ 3 -1 5 3 0 2 7 -1 -1 13 1 21
300 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 7 0 21
295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
334 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 21
311 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 1 1 21
303 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 9 0 21
302 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 7 0 21
336 RST_DLY_0_ 3 -1 5 2 0 5 -1 -1 4 0 21
332 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
351 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
341 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 3 0 21
340 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
335 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
338 RST_DLY_2_ 3 -1 0 2 0 5 -1 -1 2 0 21
337 RST_DLY_1_ 3 -1 5 2 0 5 -1 -1 2 1 21
331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21
313 CLK_000_D_11_ 3 -1 3 2 6 7 -1 -1 1 0 21
312 CLK_000_D_10_ 3 -1 4 2 3 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21
355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
339 inst_CLK_030_H 3 -1 6 1 6 -1 -1 8 0 21
350 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21
347 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
343 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
342 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21
353 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
352 RN_RW 3 70 6 1 6 70 -1 2 0 21
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
345 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
330 CLK_000_D_12_ 3 -1 6 1 7 -1 -1 1 0 21
329 CLK_000_D_9_ 3 -1 2 1 4 -1 -1 1 0 21
328 CLK_000_D_8_ 3 -1 2 1 2 -1 -1 1 0 21
327 CLK_000_D_7_ 3 -1 2 1 2 -1 -1 1 0 21
326 CLK_000_D_6_ 3 -1 2 1 2 -1 -1 1 0 21
325 CLK_000_D_5_ 3 -1 1 1 2 -1 -1 1 0 21
324 CLK_000_D_4_ 3 -1 5 1 1 -1 -1 1 0 21
323 CLK_000_D_3_ 3 -1 4 1 5 -1 -1 1 0 21
322 CLK_000_D_2_ 3 -1 7 1 4 -1 -1 1 0 21
321 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21
320 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21
319 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21
318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
314 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
66 IPL_0_ 1 -1 -1 2 1 5 66 -1
63 CLK_030 1 -1 -1 2 6 7 63 -1
55 IPL_1_ 1 -1 -1 2 1 2 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
59 A_1_ 1 -1 -1 1 1 59 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 3 10 -1
125 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
79 RW_000 5 348 7 3 0 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 3 4 6 7 81 -1 1 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
68 A_0_ 5 354 6 2 1 2 68 -1 3 0 21
70 RW 5 353 6 2 2 7 70 -1 2 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 347 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 356 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 355 1 0 6 -1 10 0 21
80 DSACK1 5 351 7 0 80 -1 5 0 21
82 BGACK_030 5 350 7 0 82 -1 3 0 21
34 VMA 5 352 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 349 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
350 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
315 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21
317 CLK_000_D_0_ 3 -1 4 5 0 2 3 5 7 -1 -1 1 0 21
316 CLK_000_D_1_ 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 6 5 0 2 3 4 7 -1 -1 1 0 21
345 SM_AMIGA_i_7_ 3 -1 5 4 0 2 5 7 -1 -1 13 1 21
334 SM_AMIGA_6_ 3 -1 5 4 1 2 5 7 -1 -1 3 0 21
300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
335 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 2 3 2 3 5 -1 -1 3 0 21
311 inst_CLK_OUT_PRE_D 3 -1 2 3 1 6 7 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21
302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
333 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 4 0 21
352 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
342 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21
341 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
336 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
332 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
319 inst_CLK_OUT_PRE_25 3 -1 6 2 2 6 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
318 inst_CLK_OUT_PRE_50 3 -1 4 2 4 6 -1 -1 1 0 21
313 CLK_000_D_11_ 3 -1 7 2 4 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 7 2 0 6 -1 -1 1 0 21
356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
340 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
351 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21
348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
344 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
343 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21
337 RST_DLY_0_ 3 -1 3 1 3 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21
354 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21
353 RN_RW 3 70 6 1 6 70 -1 2 0 21
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
346 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
339 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21
338 RST_DLY_1_ 3 -1 3 1 3 -1 -1 2 1 21
331 CLK_000_D_12_ 3 -1 4 1 7 -1 -1 1 0 21
330 CLK_000_D_9_ 3 -1 6 1 1 -1 -1 1 0 21
329 CLK_000_D_8_ 3 -1 6 1 6 -1 -1 1 0 21
328 CLK_000_D_7_ 3 -1 5 1 6 -1 -1 1 0 21
327 CLK_000_D_6_ 3 -1 2 1 5 -1 -1 1 0 21
326 CLK_000_D_5_ 3 -1 1 1 2 -1 -1 1 0 21
325 CLK_000_D_4_ 3 -1 2 1 1 -1 -1 1 0 21
324 CLK_000_D_3_ 3 -1 4 1 2 -1 -1 1 0 21
323 CLK_000_D_2_ 3 -1 7 1 4 -1 -1 1 0 21
322 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21
321 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21
320 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
314 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21
312 CLK_000_D_10_ 3 -1 1 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1
57 FC_1_ 1 -1 -1 3 0 4 7 57 -1
56 FC_0_ 1 -1 -1 3 0 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 0 1 67 -1
63 CLK_030 1 -1 -1 2 0 7 63 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A_1_ 1 -1 -1 1 6 59 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
35 VPA 1 -1 -1 1 5 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 4 10 -1
126 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21
79 RW_000 5 349 7 3 2 4 6 79 -1 4 0 21
40 BERR 5 -1 4 3 0 5 7 40 -1 1 0 21
70 RW 5 354 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21
68 A_0_ 5 355 6 1 2 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 348 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 357 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 356 1 0 6 -1 10 0 21
80 DSACK1 5 352 7 0 80 -1 5 0 21
82 BGACK_030 5 351 7 0 82 -1 3 0 21
34 VMA 5 353 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 350 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
351 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
315 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
316 CLK_000_D_1_ 3 -1 7 6 0 3 4 5 6 7 -1 -1 1 0 21
317 CLK_000_D_0_ 3 -1 1 5 0 3 5 6 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 4 5 0 3 4 5 7 -1 -1 1 0 21
335 SM_AMIGA_6_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21
301 inst_BGACK_030_INT_D 3 -1 4 4 0 1 2 6 -1 -1 1 0 21
346 SM_AMIGA_i_7_ 3 -1 5 3 0 5 7 -1 -1 13 1 21
300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
306 SIZE_DMA_0_ 3 -1 2 3 2 6 7 -1 -1 3 0 21
311 inst_CLK_OUT_PRE_D 3 -1 3 3 1 6 7 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 1 1 21
303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21
302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21
334 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 0 2 0 2 -1 -1 4 0 21
353 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
343 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 3 0 21
342 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
336 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21
333 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
319 inst_CLK_OUT_PRE_25 3 -1 1 2 1 3 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
318 inst_CLK_OUT_PRE_50 3 -1 4 2 1 4 -1 -1 1 0 21
308 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21
357 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
356 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
348 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
341 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21
352 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21
349 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
345 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
344 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21
338 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21
355 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
337 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
354 RN_RW 3 70 6 1 6 70 -1 2 0 21
350 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
347 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
340 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21
339 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21
332 CLK_000_D_13_ 3 -1 7 1 7 -1 -1 1 0 21
331 CLK_000_D_10_ 3 -1 6 1 0 -1 -1 1 0 21
330 CLK_000_D_9_ 3 -1 1 1 6 -1 -1 1 0 21
329 CLK_000_D_8_ 3 -1 3 1 1 -1 -1 1 0 21
328 CLK_000_D_7_ 3 -1 2 1 3 -1 -1 1 0 21
327 CLK_000_D_6_ 3 -1 1 1 2 -1 -1 1 0 21
326 CLK_000_D_5_ 3 -1 1 1 1 -1 -1 1 0 21
325 CLK_000_D_4_ 3 -1 2 1 1 -1 -1 1 0 21
324 CLK_000_D_3_ 3 -1 6 1 2 -1 -1 1 0 21
323 CLK_000_D_2_ 3 -1 4 1 6 -1 -1 1 0 21
322 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21
321 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21
320 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21
314 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21
313 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21
312 CLK_000_D_11_ 3 -1 0 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1
57 FC_1_ 1 -1 -1 3 0 4 7 57 -1
56 FC_0_ 1 -1 -1 3 0 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 3 67 -1
66 IPL_0_ 1 -1 -1 2 1 3 66 -1
63 CLK_030 1 -1 -1 2 2 7 63 -1
59 A_1_ 1 -1 -1 2 1 6 59 -1
55 IPL_1_ 1 -1 -1 2 1 5 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 0 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 1 10 -1
124 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21
79 RW_000 5 347 7 3 1 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 3 0 4 7 81 -1 1 0 21
40 BERR 5 -1 4 3 0 5 7 40 -1 1 0 21
31 UDS_000 5 -1 3 3 1 2 6 31 -1 1 0 21
70 RW 5 352 6 2 5 7 70 -1 2 0 21
30 LDS_000 5 -1 3 2 1 2 30 -1 1 0 21
68 A_0_ 5 353 6 1 2 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 346 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 355 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 354 1 0 6 -1 10 0 21
80 DSACK1 5 350 7 0 80 -1 5 0 21
82 BGACK_030 5 349 7 0 82 -1 3 0 21
34 VMA 5 351 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 348 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
349 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
315 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
317 CLK_000_D_0_ 3 -1 2 6 0 2 3 5 6 7 -1 -1 1 0 21
316 CLK_000_D_1_ 3 -1 5 6 0 2 3 5 6 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 0 5 0 3 4 5 7 -1 -1 1 0 21
333 SM_AMIGA_6_ 3 -1 5 4 0 2 5 7 -1 -1 3 0 21
301 inst_BGACK_030_INT_D 3 -1 4 4 0 1 2 6 -1 -1 1 0 21
344 SM_AMIGA_i_7_ 3 -1 5 3 0 5 7 -1 -1 13 1 21
300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21
295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
307 SIZE_DMA_1_ 3 -1 2 3 2 6 7 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 1 3 1 6 7 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 0 3 0 1 2 -1 -1 3 0 21
311 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21
303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21
302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21
332 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 2 2 1 2 -1 -1 4 0 21
351 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
341 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 3 0 21
340 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
335 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21
334 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21
331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
319 inst_CLK_OUT_PRE_25 3 -1 3 2 3 4 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21
308 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21
355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
339 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21
350 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21
347 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
343 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
342 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21
336 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21
353 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
352 RN_RW 3 70 6 1 6 70 -1 2 0 21
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
345 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
338 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21
337 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21
330 CLK_000_D_11_ 3 -1 7 1 7 -1 -1 1 0 21
329 CLK_000_D_8_ 3 -1 4 1 0 -1 -1 1 0 21
328 CLK_000_D_7_ 3 -1 6 1 4 -1 -1 1 0 21
327 CLK_000_D_6_ 3 -1 1 1 6 -1 -1 1 0 21
326 CLK_000_D_5_ 3 -1 6 1 1 -1 -1 1 0 21
325 CLK_000_D_4_ 3 -1 5 1 6 -1 -1 1 0 21
324 CLK_000_D_3_ 3 -1 4 1 5 -1 -1 1 0 21
323 CLK_000_D_2_ 3 -1 3 1 4 -1 -1 1 0 21
322 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21
321 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21
320 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21
318 inst_CLK_OUT_PRE_50 3 -1 3 1 3 -1 -1 1 0 21
314 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21
313 CLK_000_D_10_ 3 -1 7 1 7 -1 -1 1 0 21
312 CLK_000_D_9_ 3 -1 0 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1
57 FC_1_ 1 -1 -1 3 0 4 7 57 -1
56 FC_0_ 1 -1 -1 3 0 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 3 67 -1
66 IPL_0_ 1 -1 -1 2 1 2 66 -1
63 CLK_030 1 -1 -1 2 1 7 63 -1
59 A_1_ 1 -1 -1 2 2 6 59 -1
55 IPL_1_ 1 -1 -1 2 1 2 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
35 VPA 1 -1 -1 1 6 35 -1
29 DTACK 1 -1 -1 1 3 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 2 10 -1
123 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
79 RW_000 5 346 7 3 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 3 4 5 7 81 -1 1 0 21
70 RW 5 351 6 2 0 7 70 -1 2 0 21
31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21
68 A_0_ 5 352 6 1 3 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 345 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 354 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 353 1 0 6 -1 10 0 21
80 DSACK1 5 349 7 0 80 -1 5 0 21
82 BGACK_030 5 348 7 0 82 -1 3 0 21
34 VMA 5 350 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 347 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
348 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
315 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21
317 CLK_000_D_0_ 3 -1 0 6 0 1 2 3 5 7 -1 -1 1 0 21
316 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21
332 SM_AMIGA_6_ 3 -1 0 5 0 2 3 5 7 -1 -1 3 0 21
299 inst_AS_030_D0 3 -1 5 5 0 2 3 4 7 -1 -1 1 0 21
300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
333 SM_AMIGA_0_ 3 -1 7 3 0 5 7 -1 -1 3 0 21
311 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21
343 SM_AMIGA_i_7_ 3 -1 5 2 0 7 -1 -1 13 1 21
303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21
302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21
335 RST_DLY_0_ 3 -1 2 2 1 2 -1 -1 4 0 21
331 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 4 0 21
350 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
340 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 3 0 21
339 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
334 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 1 2 1 2 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21
337 RST_DLY_2_ 3 -1 2 2 1 2 -1 -1 2 0 21
336 RST_DLY_1_ 3 -1 1 2 1 2 -1 -1 2 1 21
330 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
313 CLK_000_D_9_ 3 -1 5 2 4 7 -1 -1 1 0 21
312 CLK_000_D_8_ 3 -1 0 2 5 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 5 2 0 6 -1 -1 1 0 21
354 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
353 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
345 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
338 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21
349 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21
346 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
342 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
341 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21
305 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21
352 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
310 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21
351 RN_RW 3 70 6 1 6 70 -1 2 0 21
347 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
319 inst_CLK_OUT_PRE_25 3 -1 4 1 4 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21
329 CLK_000_D_10_ 3 -1 4 1 7 -1 -1 1 0 21
328 CLK_000_D_7_ 3 -1 6 1 0 -1 -1 1 0 21
327 CLK_000_D_6_ 3 -1 5 1 6 -1 -1 1 0 21
326 CLK_000_D_5_ 3 -1 6 1 5 -1 -1 1 0 21
325 CLK_000_D_4_ 3 -1 3 1 6 -1 -1 1 0 21
324 CLK_000_D_3_ 3 -1 6 1 3 -1 -1 1 0 21
323 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21
322 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21
321 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21
320 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21
318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
314 inst_DTACK_D0 3 -1 5 1 5 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1
57 FC_1_ 1 -1 -1 3 0 4 7 57 -1
56 FC_0_ 1 -1 -1 3 0 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
66 IPL_0_ 1 -1 -1 2 1 5 66 -1
63 CLK_030 1 -1 -1 2 2 7 63 -1
55 IPL_1_ 1 -1 -1 2 1 6 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
59 A_1_ 1 -1 -1 1 6 59 -1
35 VPA 1 -1 -1 1 1 35 -1
29 DTACK 1 -1 -1 1 5 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 0 10 -1
121 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 5 1 2 3 5 7 40 -1 1 0 21
41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21
79 RW_000 5 344 7 3 0 4 6 79 -1 4 0 21
68 A_0_ 5 350 6 2 0 1 68 -1 3 0 21
70 RW 5 349 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 343 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 352 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 351 1 0 6 -1 10 0 21
80 DSACK1 5 347 7 0 80 -1 5 0 21
82 BGACK_030 5 346 7 0 82 -1 3 0 21
34 VMA 5 348 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 345 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
317 CLK_000_D_0_ 3 -1 4 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21
316 CLK_000_D_1_ 3 -1 4 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21
346 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
315 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
299 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21
330 SM_AMIGA_6_ 3 -1 5 4 0 1 5 7 -1 -1 3 0 21
341 SM_AMIGA_i_7_ 3 -1 5 3 2 5 7 -1 -1 13 1 21
300 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 7 0 21
295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
337 SM_AMIGA_1_ 3 -1 3 3 3 5 7 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 0 3 0 6 7 -1 -1 3 0 21
311 inst_CLK_OUT_PRE_D 3 -1 2 3 1 6 7 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 4 3 0 2 6 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21
302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
340 SM_AMIGA_2_ 3 -1 5 2 3 5 -1 -1 4 0 21
329 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 4 0 21
348 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
338 SM_AMIGA_5_ 3 -1 1 2 1 5 -1 -1 3 0 21
331 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 2 2 0 2 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21
328 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21
319 inst_CLK_OUT_PRE_25 3 -1 1 2 1 2 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
318 inst_CLK_OUT_PRE_50 3 -1 2 2 1 2 -1 -1 1 0 21
312 CLK_000_D_6_ 3 -1 3 2 5 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21
352 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
351 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
336 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
347 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21
344 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
339 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21
333 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21
350 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
332 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
349 RN_RW 3 70 6 1 6 70 -1 2 0 21
345 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
342 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
335 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21
334 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
327 CLK_000_D_8_ 3 -1 7 1 7 -1 -1 1 0 21
326 CLK_000_D_5_ 3 -1 3 1 3 -1 -1 1 0 21
325 CLK_000_D_4_ 3 -1 2 1 3 -1 -1 1 0 21
324 CLK_000_D_3_ 3 -1 2 1 2 -1 -1 1 0 21
323 CLK_000_D_2_ 3 -1 4 1 2 -1 -1 1 0 21
322 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21
321 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21
320 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21
314 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21
313 CLK_000_D_7_ 3 -1 5 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 6 67 -1
66 IPL_0_ 1 -1 -1 2 1 5 66 -1
63 CLK_030 1 -1 -1 2 0 7 63 -1
59 A_1_ 1 -1 -1 2 0 2 59 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
35 VPA 1 -1 -1 1 1 35 -1
29 DTACK 1 -1 -1 1 6 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 4 10 -1
117 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 5 0 1 5 6 7 40 -1 1 0 21
41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21
79 RW_000 5 340 7 3 2 4 6 79 -1 4 0 21
68 A_0_ 5 346 6 2 1 2 68 -1 3 0 21
70 RW 5 345 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 339 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 348 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 347 1 0 6 -1 10 0 21
80 DSACK1 5 343 7 0 80 -1 5 0 21
82 BGACK_030 5 342 7 0 82 -1 3 0 21
34 VMA 5 344 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 341 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
316 CLK_000_D_1_ 3 -1 7 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21
342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
315 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21
317 CLK_000_D_0_ 3 -1 0 7 0 1 2 3 5 6 7 -1 -1 1 0 21
326 SM_AMIGA_6_ 3 -1 1 5 0 1 2 5 7 -1 -1 3 0 21
299 inst_AS_030_D0 3 -1 4 5 0 3 4 5 7 -1 -1 1 0 21
337 SM_AMIGA_i_7_ 3 -1 5 4 0 1 5 7 -1 -1 13 1 21
300 inst_AS_030_000_SYNC 3 -1 0 4 0 1 3 5 -1 -1 7 0 21
295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
333 SM_AMIGA_1_ 3 -1 5 3 5 6 7 -1 -1 3 0 21
327 SM_AMIGA_0_ 3 -1 6 3 5 6 7 -1 -1 3 0 21
311 inst_CLK_OUT_PRE_D 3 -1 1 3 1 6 7 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21
303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21
302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21
325 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 4 0 21
344 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
334 SM_AMIGA_5_ 3 -1 1 2 1 5 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21
324 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
319 inst_CLK_OUT_PRE_25 3 -1 4 2 1 4 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21
313 CLK_000_D_3_ 3 -1 7 2 3 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 7 2 0 6 -1 -1 1 0 21
348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
332 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21
343 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21
340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
336 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
335 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21
329 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21
346 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
328 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21
345 RN_RW 3 70 6 1 6 70 -1 2 0 21
341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
338 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
331 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21
330 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21
323 CLK_000_D_4_ 3 -1 3 1 7 -1 -1 1 0 21
322 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21
321 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21
320 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21
318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
314 inst_DTACK_D0 3 -1 5 1 5 -1 -1 1 0 21
312 CLK_000_D_2_ 3 -1 4 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1
57 FC_1_ 1 -1 -1 3 0 4 7 57 -1
56 FC_0_ 1 -1 -1 3 0 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 3 67 -1
66 IPL_0_ 1 -1 -1 2 1 3 66 -1
63 CLK_030 1 -1 -1 2 2 7 63 -1
55 IPL_1_ 1 -1 -1 2 1 3 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 6 59 -1
35 VPA 1 -1 -1 1 6 35 -1
29 DTACK 1 -1 -1 1 5 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 0 10 -1
117 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
81 AS_030 5 -1 7 4 0 4 5 7 81 -1 1 0 21
41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 3 5 7 40 -1 1 0 21
79 RW_000 5 340 7 3 2 4 6 79 -1 4 0 21
31 UDS_000 5 -1 3 3 1 2 6 31 -1 1 0 21
30 LDS_000 5 -1 3 3 1 2 6 30 -1 1 0 21
68 A_0_ 5 346 6 2 2 5 68 -1 3 0 21
70 RW 5 345 6 2 5 7 70 -1 2 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 339 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 348 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 347 1 0 6 -1 10 0 21
80 DSACK1 5 343 7 0 80 -1 5 0 21
82 BGACK_030 5 342 7 0 82 -1 3 0 21
34 VMA 5 344 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 341 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
315 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
317 CLK_000_D_0_ 3 -1 0 6 0 2 3 5 6 7 -1 -1 1 0 21
316 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21
326 SM_AMIGA_6_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21
337 SM_AMIGA_i_7_ 3 -1 5 3 0 5 7 -1 -1 13 1 21
300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
307 SIZE_DMA_1_ 3 -1 1 3 1 6 7 -1 -1 3 0 21
311 inst_CLK_OUT_PRE_D 3 -1 1 3 1 6 7 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 4 3 0 1 6 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 4 3 0 3 4 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21
303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21
302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21
335 SM_AMIGA_3_ 3 -1 3 2 3 5 -1 -1 4 1 21
325 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 4 0 21
344 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
334 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 3 0 21
333 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
328 SM_AMIGA_4_ 3 -1 5 2 3 5 -1 -1 3 0 21
327 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21
324 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21
318 inst_CLK_OUT_PRE_50 3 -1 3 2 1 3 -1 -1 1 0 21
314 inst_DTACK_D0 3 -1 4 2 3 5 -1 -1 1 0 21
308 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21
348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
332 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21
343 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21
340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
336 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
329 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21
346 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21
345 RN_RW 3 70 6 1 6 70 -1 2 0 21
341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
338 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
331 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21
330 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21
319 inst_CLK_OUT_PRE_25 3 -1 1 1 1 -1 -1 2 0 21
323 CLK_000_D_4_ 3 -1 7 1 7 -1 -1 1 0 21
322 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21
321 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21
320 IPL_D0_0_ 3 -1 4 1 1 -1 -1 1 0 21
313 CLK_000_D_3_ 3 -1 7 1 7 -1 -1 1 0 21
312 CLK_000_D_2_ 3 -1 5 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1
57 FC_1_ 1 -1 -1 3 0 4 7 57 -1
56 FC_0_ 1 -1 -1 3 0 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 0 1 67 -1
66 IPL_0_ 1 -1 -1 2 1 4 66 -1
63 CLK_030 1 -1 -1 2 2 7 63 -1
59 A_1_ 1 -1 -1 2 1 6 59 -1
55 IPL_1_ 1 -1 -1 2 0 1 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 4 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 0 10 -1
117 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 1 5 7 40 -1 1 0 21
79 RW_000 5 340 7 3 2 4 6 79 -1 4 0 21
68 A_0_ 5 346 6 2 2 6 68 -1 3 0 21
70 RW 5 345 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 339 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 348 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 347 1 0 6 -1 10 0 21
80 DSACK1 5 343 7 0 80 -1 5 0 21
82 BGACK_030 5 342 7 0 82 -1 3 0 21
34 VMA 5 344 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 341 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
315 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21
316 CLK_000_D_1_ 3 -1 7 6 0 1 3 4 5 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 4 6 0 1 3 4 5 7 -1 -1 1 0 21
326 SM_AMIGA_6_ 3 -1 1 5 1 2 5 6 7 -1 -1 3 0 21
317 CLK_000_D_0_ 3 -1 1 5 0 1 3 5 7 -1 -1 1 0 21
300 inst_AS_030_000_SYNC 3 -1 0 4 0 1 3 5 -1 -1 7 0 21
337 SM_AMIGA_i_7_ 3 -1 5 3 0 1 7 -1 -1 13 1 21
295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
311 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 6 3 0 2 6 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 1 1 21
303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21
302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21
305 CYCLE_DMA_1_ 3 -1 0 2 0 2 -1 -1 4 0 21
344 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
333 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
328 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21
325 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21
324 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
319 inst_CLK_OUT_PRE_25 3 -1 6 2 4 6 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21
318 inst_CLK_OUT_PRE_50 3 -1 2 2 2 6 -1 -1 1 0 21
312 CLK_000_D_2_ 3 -1 4 2 1 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21
348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
332 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21
343 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21
340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
336 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
335 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21
329 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21
346 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
334 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21
327 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
345 RN_RW 3 70 6 1 6 70 -1 2 0 21
341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
338 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
331 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21
330 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
323 CLK_000_D_4_ 3 -1 7 1 7 -1 -1 1 0 21
322 IPL_D0_2_ 3 -1 4 1 1 -1 -1 1 0 21
321 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21
320 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21
314 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21
313 CLK_000_D_3_ 3 -1 1 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1
57 FC_1_ 1 -1 -1 3 0 4 7 57 -1
56 FC_0_ 1 -1 -1 3 0 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 4 67 -1
66 IPL_0_ 1 -1 -1 2 1 3 66 -1
63 CLK_030 1 -1 -1 2 2 7 63 -1
59 A_1_ 1 -1 -1 2 2 6 59 -1
55 IPL_1_ 1 -1 -1 2 1 3 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 3 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 1 10 -1
116 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21
79 RW_000 5 339 7 3 2 4 6 79 -1 4 0 21
40 BERR 5 -1 4 3 0 5 7 40 -1 1 0 21
70 RW 5 345 6 2 0 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21
68 A_0_ 5 344 6 1 1 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 338 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21
80 DSACK1 5 342 7 0 80 -1 5 0 21
82 BGACK_030 5 341 7 0 82 -1 3 0 21
34 VMA 5 343 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 340 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
341 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
315 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21
316 CLK_000_D_1_ 3 -1 7 7 0 2 3 4 5 6 7 -1 -1 1 0 21
317 CLK_000_D_0_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21
325 SM_AMIGA_6_ 3 -1 0 4 0 1 5 7 -1 -1 3 0 21
299 inst_AS_030_D0 3 -1 7 4 0 3 4 7 -1 -1 1 0 21
300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21
295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
311 inst_CLK_OUT_PRE_D 3 -1 5 3 1 6 7 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21
336 SM_AMIGA_i_7_ 3 -1 5 2 0 7 -1 -1 13 1 21
303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21
302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21
328 RST_DLY_0_ 3 -1 6 2 3 6 -1 -1 4 0 21
343 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
333 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 3 0 21
332 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
327 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21
326 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21
324 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21
330 RST_DLY_2_ 3 -1 6 2 3 6 -1 -1 2 0 21
329 RST_DLY_1_ 3 -1 6 2 3 6 -1 -1 2 1 21
323 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21
313 CLK_000_D_3_ 3 -1 7 2 5 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 4 2 0 6 -1 -1 1 0 21
347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
331 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21
342 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21
339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
335 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
334 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21
305 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21
344 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21
345 RN_RW 3 70 6 1 6 70 -1 2 0 21
340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
337 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
322 CLK_000_D_4_ 3 -1 5 1 7 -1 -1 1 0 21
321 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21
320 IPL_D0_1_ 3 -1 4 1 1 -1 -1 1 0 21
319 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21
318 inst_CLK_OUT_PRE_50 3 -1 5 1 5 -1 -1 1 0 21
314 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21
312 CLK_000_D_2_ 3 -1 4 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1
57 FC_1_ 1 -1 -1 3 0 4 7 57 -1
56 FC_0_ 1 -1 -1 3 0 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 0 1 67 -1
66 IPL_0_ 1 -1 -1 2 1 3 66 -1
63 CLK_030 1 -1 -1 2 2 7 63 -1
55 IPL_1_ 1 -1 -1 2 1 4 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
59 A_1_ 1 -1 -1 1 6 59 -1
35 VPA 1 -1 -1 1 5 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 4 10 -1
117 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 1 5 7 40 -1 1 0 21
79 RW_000 5 340 7 3 2 4 6 79 -1 4 0 21
68 A_0_ 5 346 6 2 2 6 68 -1 3 0 21
70 RW 5 345 6 2 5 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 339 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 348 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 347 1 0 6 -1 10 0 21
80 DSACK1 5 343 7 0 80 -1 5 0 21
82 BGACK_030 5 342 7 0 82 -1 3 0 21
34 VMA 5 344 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 341 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21
315 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21
316 CLK_000_D_1_ 3 -1 7 6 0 1 3 4 5 7 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 4 6 0 1 3 4 5 7 -1 -1 1 0 21
326 SM_AMIGA_6_ 3 -1 1 5 1 2 5 6 7 -1 -1 3 0 21
317 CLK_000_D_0_ 3 -1 1 5 0 1 3 5 7 -1 -1 1 0 21
300 inst_AS_030_000_SYNC 3 -1 0 4 0 1 3 5 -1 -1 7 0 21
337 SM_AMIGA_i_7_ 3 -1 5 3 0 1 7 -1 -1 13 1 21
295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
311 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 6 3 0 2 6 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 1 1 21
303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21
302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21
305 CYCLE_DMA_1_ 3 -1 0 2 0 2 -1 -1 4 0 21
344 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
333 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
328 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21
325 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21
324 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
319 inst_CLK_OUT_PRE_25 3 -1 6 2 4 6 -1 -1 2 0 21
309 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21
318 inst_CLK_OUT_PRE_50 3 -1 2 2 2 6 -1 -1 1 0 21
312 CLK_000_D_2_ 3 -1 4 2 1 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21
348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
332 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21
343 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21
340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
336 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
335 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21
329 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21
346 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
334 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21
327 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
345 RN_RW 3 70 6 1 6 70 -1 2 0 21
341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
338 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
331 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21
330 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
323 CLK_000_D_4_ 3 -1 7 1 7 -1 -1 1 0 21
322 IPL_D0_2_ 3 -1 4 1 1 -1 -1 1 0 21
321 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21
320 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21
314 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21
313 CLK_000_D_3_ 3 -1 1 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1
57 FC_1_ 1 -1 -1 3 0 4 7 57 -1
56 FC_0_ 1 -1 -1 3 0 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 4 67 -1
66 IPL_0_ 1 -1 -1 2 1 3 66 -1
63 CLK_030 1 -1 -1 2 2 7 63 -1
59 A_1_ 1 -1 -1 2 2 6 59 -1
55 IPL_1_ 1 -1 -1 2 1 3 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 3 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 1 10 -1
123 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21
79 RW_000 5 346 7 3 2 4 6 79 -1 4 0 21
81 AS_030 5 -1 7 3 3 4 7 81 -1 1 0 21
40 BERR 5 -1 4 3 0 5 7 40 -1 1 0 21
68 A_0_ 5 352 6 2 1 3 68 -1 3 0 21
70 RW 5 351 6 2 5 7 70 -1 2 0 21
31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
8 IPL_030_2_ 5 345 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 354 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 353 1 0 6 -1 10 0 21
80 DSACK1 5 349 7 0 80 -1 5 0 21
82 BGACK_030 5 348 7 0 82 -1 3 0 21
34 VMA 5 350 3 0 34 -1 3 0 21
65 E 0 6 0 65 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 347 3 0 28 -1 2 0 21
97 DS_030 0 0 0 97 -1 1 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 0 1 0 2 -1 1 0 21
348 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
315 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21
317 CLK_000_D_0_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21
316 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21
332 SM_AMIGA_6_ 3 -1 0 5 0 1 3 5 7 -1 -1 3 0 21
299 inst_AS_030_D0 3 -1 3 5 0 3 4 5 7 -1 -1 1 0 21
300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
311 inst_CLK_OUT_PRE_D 3 -1 1 3 1 6 7 -1 -1 1 0 21
301 inst_BGACK_030_INT_D 3 -1 5 3 0 2 6 -1 -1 1 0 21
296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21
343 SM_AMIGA_i_7_ 3 -1 5 2 0 7 -1 -1 13 1 21
303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21
302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21
350 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
339 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
334 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21
331 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
310 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21
307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21
330 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
319 inst_CLK_OUT_PRE_25 3 -1 0 2 0 1 -1 -1 2 0 21
297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21
313 CLK_000_D_9_ 3 -1 7 2 5 7 -1 -1 1 0 21
308 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21
354 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
353 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
345 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
338 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21
349 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21
346 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
342 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
341 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21
335 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21
305 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21
352 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21
340 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21
333 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
304 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21
351 RN_RW 3 70 6 1 6 70 -1 2 0 21
347 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
337 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21
336 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21
309 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
329 CLK_000_D_10_ 3 -1 5 1 7 -1 -1 1 0 21
328 CLK_000_D_7_ 3 -1 4 1 4 -1 -1 1 0 21
327 CLK_000_D_6_ 3 -1 1 1 4 -1 -1 1 0 21
326 CLK_000_D_5_ 3 -1 1 1 1 -1 -1 1 0 21
325 CLK_000_D_4_ 3 -1 3 1 1 -1 -1 1 0 21
324 CLK_000_D_3_ 3 -1 4 1 3 -1 -1 1 0 21
323 CLK_000_D_2_ 3 -1 7 1 4 -1 -1 1 0 21
322 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21
321 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21
320 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21
318 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21
314 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21
312 CLK_000_D_8_ 3 -1 4 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1
95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1
94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1
58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1
57 FC_1_ 1 -1 -1 3 0 4 7 57 -1
56 FC_0_ 1 -1 -1 3 0 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 6 67 -1
66 IPL_0_ 1 -1 -1 2 0 1 66 -1
63 CLK_030 1 -1 -1 2 2 7 63 -1
59 A_1_ 1 -1 -1 2 2 6 59 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
35 VPA 1 -1 -1 1 0 35 -1
29 DTACK 1 -1 -1 1 2 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
10 CLK_000 1 -1 -1 1 4 10 -1
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