mirror of https://github.com/kr239/68030tk.git
24 lines
1.8 KiB
Plaintext
24 lines
1.8 KiB
Plaintext
@N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral
|
|
@N: CD233 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":70:10:70:11|Using sequential encoding for type sm_e
|
|
@N: CD233 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":87:14:87:15|Using sequential encoding for type sm_68000
|
|
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":128:7:128:17|Signal clk_out_pre is undriven
|
|
Post processing for work.bus68030.behavioral
|
|
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register DS_030_D0_3
|
|
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register nEXP_SPACE_D0_3
|
|
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register BGACK_030_INT_PRE_2
|
|
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":130:34:130:36|Pruning register CLK_OUT_EXP_INT_2
|
|
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":154:2:154:3|Pruning register CLK_030_D0_2
|
|
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:38:131:40|Trying to extract state machine for register SM_AMIGA
|
|
Extracted state machine for register SM_AMIGA
|
|
State machine has 8 reachable states with original encodings of:
|
|
000
|
|
001
|
|
010
|
|
011
|
|
100
|
|
101
|
|
110
|
|
111
|
|
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:38:131:40|Trying to extract state machine for register cpu_est
|
|
@W: CL246 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":24:1:24:8|Input port bits 15 to 2 of a_decode(23 downto 2) are unused
|