68030tk/Logic/synlog/report
2014-06-07 23:13:48 +02:00
..
BUS68030_compiler_errors.txt New PCB and start for RW-Signal-Optimization 2014-06-01 22:50:01 +02:00
BUS68030_compiler_notes.txt New PCB and start for RW-Signal-Optimization 2014-06-01 22:50:01 +02:00
BUS68030_compiler_runstatus.xml RW-Fixed 2014-06-07 23:13:48 +02:00
BUS68030_compiler_warnings.txt RW-Fixed 2014-06-07 23:13:48 +02:00
BUS68030_fpga_mapper_errors.txt
BUS68030_fpga_mapper_notes.txt
BUS68030_fpga_mapper_runstatus.xml RW-Fixed 2014-06-07 23:13:48 +02:00
BUS68030_fpga_mapper_warnings.txt DMA-(potentially) working version but only 25Mhz 2014-05-25 21:00:40 +02:00