68030tk/Logic/68030_tk.grp

30 lines
1.9 KiB
Plaintext

GROUP MACH_SEG_A inst_DS_000_DMA inst_CLK_030_H inst_AS_000_DMA inst_LDS_000_INT
CYCLE_DMA_1_ CYCLE_DMA_0_ inst_VPA_D CLK_000_P_SYNC_10_ CLK_000_P_SYNC_1_
CLK_000_P_SYNC_4_ CLK_000_P_SYNC_8_ CLK_000_N_SYNC_2_ CLK_000_N_SYNC_4_
CLK_000_N_SYNC_5_ DS_030 AVEC
GROUP MACH_SEG_B IPL_030_1_ RN_IPL_030_1_ IPL_030_0_ RN_IPL_030_0_ IPL_030_2_
RN_IPL_030_2_ CLK_EXP inst_AMIGA_BUS_ENABLE_DMA_LOW inst_UDS_000_INT
cpu_est_0_ IPL_D0_2_ CLK_000_D_6_ CLK_000_D_8_ CLK_000_N_SYNC_6_
CLK_000_N_SYNC_8_ AHIGH_31_ AHIGH_30_ AHIGH_29_ RESET
GROUP MACH_SEG_C inst_AS_030_000_SYNC SM_AMIGA_6_ inst_AMIGA_BUS_ENABLE_DMA_HIGH
inst_DTACK_D0 CLK_000_D_4_ CLK_000_P_SYNC_3_ CLK_000_P_SYNC_9_ CLK_000_N_SYNC_10_
CLK_000_N_SYNC_11_ CLK_000_D_1_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_
AHIGH_24_ AMIGA_BUS_ENABLE_LOW
GROUP MACH_SEG_D VMA RN_VMA BG_000 RN_BG_000 inst_RESET_OUT RST_DLY_0_
RST_DLY_1_ RST_DLY_2_ CLK_000_N_SYNC_0_ CLK_000_P_SYNC_0_ IPL_D0_0_
CLK_000_D_9_ CLK_000_N_SYNC_12_ CLK_000_P_SYNC_7_ AMIGA_BUS_ENABLE_HIGH
LDS_000 UDS_000 AMIGA_ADDR_ENABLE
GROUP MACH_SEG_E CLK_000_D_5_ inst_CLK_OUT_PRE_D inst_CLK_OUT_PRE_50 CLK_000_N_SYNC_1_
inst_CLK_000_NE_D0 CIIN BERR AMIGA_BUS_DATA_DIR AS_000 CIIN_0
GROUP MACH_SEG_F SM_AMIGA_i_7_ SM_AMIGA_2_ SM_AMIGA_3_ inst_DS_000_ENABLE
SM_AMIGA_1_ SM_AMIGA_0_ SM_AMIGA_4_ SM_AMIGA_5_ cpu_est_3_ cpu_est_2_
cpu_est_1_ IPL_D0_1_ CLK_000_P_SYNC_2_ CLK_000_N_SYNC_3_ CLK_000_N_SYNC_9_
N_226
GROUP MACH_SEG_G A_0_ RN_A_0_ RW RN_RW CLK_DIV_OUT SIZE_DMA_0_ SIZE_DMA_1_
inst_AS_000_INT CLK_000_D_10_ CLK_000_D_3_ CLK_000_D_7_ CLK_000_P_SYNC_5_
CLK_000_P_SYNC_6_ CLK_000_N_SYNC_7_ CLK_000_D_0_ CLK_000_D_2_ SIZE_0_
E
GROUP MACH_SEG_H DSACK1 RN_DSACK1 RW_000 RN_RW_000 BGACK_030 RN_BGACK_030
inst_AS_030_D0 inst_BGACK_030_INT_D CLK_000_D_11_ CLK_000_D_12_ FPU_CS
AS_030 SIZE_1_