mirror of https://github.com/kr239/68030tk.git
99352 lines
6.9 MiB
99352 lines
6.9 MiB
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67 "number of signals after reading design file"
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"sig sig sig pair blk fan PT xor sync"
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"num name type sig num out pin node cnt PT type"
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"--- ---- ---- ---- --- --- --- ---- --- --- ----"
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82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
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80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
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32 AS_000 5 301 3 1 3 32 -1 1 0 21
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29 DTACK 5 -1 3 1 7 29 -1 1 0 21
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65 E 5 304 6 0 65 -1 4 0 21
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30 LDS_000 5 303 3 0 30 -1 4 0 21
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79 DSACK_0_ 5 306 7 0 79 -1 3 0 21
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31 UDS_000 5 302 3 0 31 -1 3 0 21
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34 VMA 5 305 3 0 34 -1 2 1 20
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91 AVEC 0 0 0 91 -1 1 0 21
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77 FPU_CS 0 7 0 77 -1 1 0 21
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64 CLK_DIV_OUT 5 307 6 0 64 -1 1 0 21
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47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
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41 BERR 0 4 0 41 -1 1 0 21
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33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
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28 BG_000 0 3 0 28 -1 1 0 20
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19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
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9 CLK_EXP 0 1 0 9 -1 1 0 21
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8 IPL_030_2_ 0 1 0 8 -1 1 0 21
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7 IPL_030_0_ 0 1 0 7 -1 1 0 21
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6 IPL_030_1_ 0 1 0 6 -1 1 0 21
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2 RESET 0 1 0 2 -1 1 0 21
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304 RN_E 3 65 6 4 2 3 6 7 65 -1 4 0 21
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294 cpu_est_1_ 3 -1 6 4 2 3 6 7 -1 -1 4 0 21
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298 cpu_est_2_ 3 -1 2 4 2 3 6 7 -1 -1 3 0 21
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293 cpu_est_0_ 3 -1 2 4 2 3 6 7 -1 -1 1 0 21
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300 AS_000_0 3 -1 5 3 0 3 7 -1 -1 1 0 21
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305 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
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307 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 1 0 21
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295 inst_AS_000_INT_D 3 -1 0 2 0 3 -1 -1 1 0 21
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303 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
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306 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
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302 RN_UDS_000 3 31 3 1 3 31 -1 3 0 21
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301 RN_AS_000 3 32 3 1 0 32 -1 1 0 21
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299 inst_AS_030_delay 3 -1 5 1 5 -1 -1 1 0 21
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297 inst_AS_030_AMIGA_ENABLE 3 -1 5 1 3 -1 -1 1 0 21
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296 inst_AS_000_INT_DD 3 -1 0 1 7 -1 -1 1 0 21
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10 CLK_000 9 -1 1 7 10 -1
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63 CLK_030 9 -1 0 63 -1
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60 CLK_OSZI 9 -1 0 60 -1
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13 CPU_SPACE 1 -1 -1 4 0 3 5 7 13 -1
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40 VPA 1 -1 -1 3 0 3 7 40 -1
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96 A_19_ 1 -1 -1 2 4 7 96 -1
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95 A_16_ 1 -1 -1 2 4 7 95 -1
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94 A_18_ 1 -1 -1 2 4 7 94 -1
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85 RST 1 -1 -1 2 1 5 85 -1
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81 AS_030 1 -1 -1 2 3 5 81 -1
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58 A_17_ 1 -1 -1 2 4 7 58 -1
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57 FC_1_ 1 -1 -1 2 4 7 57 -1
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56 FC_0_ 1 -1 -1 2 4 7 56 -1
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27 BGACK_000 1 -1 -1 2 4 7 27 -1
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78 SIZE_1_ 1 -1 -1 1 3 78 -1
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70 RW 1 -1 -1 1 3 70 -1
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69 SIZE_0_ 1 -1 -1 1 3 69 -1
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68 A_0_ 1 -1 -1 1 3 68 -1
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67 IPL_2_ 1 -1 -1 1 1 67 -1
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66 IPL_0_ 1 -1 -1 1 1 66 -1
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55 IPL_1_ 1 -1 -1 1 1 55 -1
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20 BG_030 1 -1 -1 1 3 20 -1
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18 A_24_ 1 -1 -1 1 5 18 -1
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17 A_25_ 1 -1 -1 1 5 17 -1
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16 A_26_ 1 -1 -1 1 5 16 -1
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15 A_27_ 1 -1 -1 1 5 15 -1
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14 A_28_ 1 -1 -1 1 5 14 -1
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5 A_29_ 1 -1 -1 1 5 5 -1
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4 A_30_ 1 -1 -1 1 5 4 -1
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3 A_31_ 1 -1 -1 1 5 3 -1
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67 "number of signals after reading design file"
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"sig sig sig pair blk fan PT xor sync"
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"num name type sig num out pin node cnt PT type"
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"--- ---- ---- ---- --- --- --- ---- --- --- ----"
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82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
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80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
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32 AS_000 5 301 3 1 3 32 -1 1 0 21
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29 DTACK 5 -1 3 1 7 29 -1 1 0 21
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65 E 5 304 6 0 65 -1 4 0 21
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30 LDS_000 5 303 3 0 30 -1 4 0 21
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79 DSACK_0_ 5 306 7 0 79 -1 3 0 21
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31 UDS_000 5 302 3 0 31 -1 3 0 21
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34 VMA 5 305 3 0 34 -1 2 1 20
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91 AVEC 0 0 0 91 -1 1 0 21
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77 FPU_CS 0 7 0 77 -1 1 0 21
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64 CLK_DIV_OUT 5 307 6 0 64 -1 1 0 21
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47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
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41 BERR 0 4 0 41 -1 1 0 21
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33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
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28 BG_000 0 3 0 28 -1 1 0 20
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19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
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9 CLK_EXP 0 1 0 9 -1 1 0 21
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8 IPL_030_2_ 0 1 0 8 -1 1 0 21
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7 IPL_030_0_ 0 1 0 7 -1 1 0 21
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6 IPL_030_1_ 0 1 0 6 -1 1 0 21
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2 RESET 0 1 0 2 -1 1 0 21
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304 RN_E 3 65 6 4 2 3 6 7 65 -1 4 0 21
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294 cpu_est_1_ 3 -1 6 4 2 3 6 7 -1 -1 4 0 21
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298 cpu_est_2_ 3 -1 2 4 2 3 6 7 -1 -1 3 0 21
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293 cpu_est_0_ 3 -1 2 4 2 3 6 7 -1 -1 1 0 21
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300 AS_000_0 3 -1 5 3 0 3 7 -1 -1 1 0 21
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305 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
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307 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 1 0 21
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295 inst_AS_000_INT_D 3 -1 0 2 0 3 -1 -1 1 0 21
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303 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
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306 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
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302 RN_UDS_000 3 31 3 1 3 31 -1 3 0 21
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301 RN_AS_000 3 32 3 1 0 32 -1 1 0 21
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299 inst_AS_030_delay 3 -1 5 1 5 -1 -1 1 0 21
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297 inst_AS_030_AMIGA_ENABLE 3 -1 5 1 3 -1 -1 1 1 21
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296 inst_AS_000_INT_DD 3 -1 0 1 7 -1 -1 1 0 21
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10 CLK_000 9 -1 1 7 10 -1
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63 CLK_030 9 -1 0 63 -1
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60 CLK_OSZI 9 -1 0 60 -1
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13 CPU_SPACE 1 -1 -1 4 0 3 5 7 13 -1
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96 A_19_ 1 -1 -1 3 4 5 7 96 -1
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95 A_16_ 1 -1 -1 3 4 5 7 95 -1
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94 A_18_ 1 -1 -1 3 4 5 7 94 -1
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58 A_17_ 1 -1 -1 3 4 5 7 58 -1
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57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
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56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
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40 VPA 1 -1 -1 3 0 3 7 40 -1
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27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
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85 RST 1 -1 -1 2 1 5 85 -1
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81 AS_030 1 -1 -1 2 3 5 81 -1
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78 SIZE_1_ 1 -1 -1 1 3 78 -1
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70 RW 1 -1 -1 1 3 70 -1
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69 SIZE_0_ 1 -1 -1 1 3 69 -1
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68 A_0_ 1 -1 -1 1 3 68 -1
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67 IPL_2_ 1 -1 -1 1 1 67 -1
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66 IPL_0_ 1 -1 -1 1 1 66 -1
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55 IPL_1_ 1 -1 -1 1 1 55 -1
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20 BG_030 1 -1 -1 1 3 20 -1
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18 A_24_ 1 -1 -1 1 5 18 -1
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17 A_25_ 1 -1 -1 1 5 17 -1
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16 A_26_ 1 -1 -1 1 5 16 -1
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15 A_27_ 1 -1 -1 1 5 15 -1
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14 A_28_ 1 -1 -1 1 5 14 -1
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5 A_29_ 1 -1 -1 1 5 5 -1
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4 A_30_ 1 -1 -1 1 5 4 -1
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3 A_31_ 1 -1 -1 1 5 3 -1
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69 "number of signals after reading design file"
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"sig sig sig pair blk fan PT xor sync"
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"num name type sig num out pin node cnt PT type"
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"--- ---- ---- ---- --- --- --- ---- --- --- ----"
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82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
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80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
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32 AS_000 5 303 3 1 3 32 -1 1 0 21
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29 DTACK 5 -1 3 1 7 29 -1 1 0 21
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65 E 5 306 6 0 65 -1 4 0 21
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30 LDS_000 5 305 3 0 30 -1 4 0 21
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79 DSACK_0_ 5 308 7 0 79 -1 3 0 21
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64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
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31 UDS_000 5 304 3 0 31 -1 3 0 21
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34 VMA 5 307 3 0 34 -1 2 1 20
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91 AVEC 0 0 0 91 -1 1 0 21
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77 FPU_CS 0 7 0 77 -1 1 0 21
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47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
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41 BERR 0 4 0 41 -1 1 0 21
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33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
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28 BG_000 0 3 0 28 -1 1 0 20
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19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
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9 CLK_EXP 0 1 0 9 -1 1 0 21
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8 IPL_030_2_ 0 1 0 8 -1 1 0 21
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7 IPL_030_0_ 0 1 0 7 -1 1 0 21
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6 IPL_030_1_ 0 1 0 6 -1 1 0 21
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2 RESET 0 1 0 2 -1 1 0 21
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293 cpu_est_0_ 3 -1 5 5 0 3 5 6 7 -1 -1 1 0 20
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306 RN_E 3 65 6 4 0 3 6 7 65 -1 4 0 21
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294 cpu_est_1_ 3 -1 0 4 0 3 6 7 -1 -1 4 0 21
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300 cpu_est_2_ 3 -1 0 4 0 3 6 7 -1 -1 3 0 21
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302 AS_000_0 3 -1 2 3 3 5 7 -1 -1 1 0 21
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309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
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307 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
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298 CLK_CNT_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
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295 inst_AS_000_INT_D 3 -1 5 2 3 5 -1 -1 1 0 20
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305 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
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308 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
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304 RN_UDS_000 3 31 3 1 3 31 -1 3 0 21
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299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
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303 RN_AS_000 3 32 3 1 5 32 -1 1 0 21
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301 inst_AS_030_delay 3 -1 5 1 2 -1 -1 1 0 21
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297 inst_AS_030_AMIGA_ENABLE 3 -1 2 1 3 -1 -1 1 1 21
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296 inst_AS_000_INT_DD 3 -1 5 1 7 -1 -1 1 0 20
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10 CLK_000 9 -1 1 7 10 -1
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63 CLK_030 9 -1 0 63 -1
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60 CLK_OSZI 9 -1 0 60 -1
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13 CPU_SPACE 1 -1 -1 4 0 2 3 7 13 -1
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96 A_19_ 1 -1 -1 3 2 4 7 96 -1
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95 A_16_ 1 -1 -1 3 2 4 7 95 -1
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94 A_18_ 1 -1 -1 3 2 4 7 94 -1
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85 RST 1 -1 -1 3 1 2 5 85 -1
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81 AS_030 1 -1 -1 3 2 3 5 81 -1
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58 A_17_ 1 -1 -1 3 2 4 7 58 -1
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57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
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56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
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40 VPA 1 -1 -1 3 0 3 7 40 -1
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27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
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78 SIZE_1_ 1 -1 -1 1 3 78 -1
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70 RW 1 -1 -1 1 3 70 -1
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69 SIZE_0_ 1 -1 -1 1 3 69 -1
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68 A_0_ 1 -1 -1 1 3 68 -1
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67 IPL_2_ 1 -1 -1 1 1 67 -1
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66 IPL_0_ 1 -1 -1 1 1 66 -1
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55 IPL_1_ 1 -1 -1 1 1 55 -1
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20 BG_030 1 -1 -1 1 3 20 -1
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18 A_24_ 1 -1 -1 1 2 18 -1
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17 A_25_ 1 -1 -1 1 2 17 -1
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16 A_26_ 1 -1 -1 1 2 16 -1
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15 A_27_ 1 -1 -1 1 2 15 -1
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14 A_28_ 1 -1 -1 1 2 14 -1
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5 A_29_ 1 -1 -1 1 2 5 -1
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4 A_30_ 1 -1 -1 1 2 4 -1
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3 A_31_ 1 -1 -1 1 2 3 -1
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69 "number of signals after reading design file"
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"sig sig sig pair blk fan PT xor sync"
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"num name type sig num out pin node cnt PT type"
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"--- ---- ---- ---- --- --- --- ---- --- --- ----"
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82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
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80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
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32 AS_000 5 304 3 1 3 32 -1 1 0 21
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29 DTACK 5 -1 3 1 7 29 -1 1 0 21
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65 E 5 307 6 0 65 -1 4 0 21
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30 LDS_000 5 306 3 0 30 -1 4 0 21
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79 DSACK_0_ 5 309 7 0 79 -1 3 0 21
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64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
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31 UDS_000 5 305 3 0 31 -1 3 0 21
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34 VMA 5 308 3 0 34 -1 2 1 20
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293 BERR 0 5 0 -1 -1 1 0 21
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91 AVEC 0 0 0 91 -1 1 0 21
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77 FPU_CS 0 7 0 77 -1 1 0 21
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47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
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33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
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28 BG_000 0 3 0 28 -1 1 0 20
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19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
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9 CLK_EXP 0 1 0 9 -1 1 0 21
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8 IPL_030_2_ 0 1 0 8 -1 1 0 21
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7 IPL_030_0_ 0 1 0 7 -1 1 0 21
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6 IPL_030_1_ 0 1 0 6 -1 1 0 21
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2 RESET 0 1 0 2 -1 1 0 21
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294 cpu_est_0_ 3 -1 0 6 0 2 3 4 6 7 -1 -1 1 0 21
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307 RN_E 3 65 6 5 2 3 4 6 7 65 -1 4 0 21
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295 cpu_est_1_ 3 -1 4 5 2 3 4 6 7 -1 -1 4 0 21
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301 cpu_est_2_ 3 -1 2 5 2 3 4 6 7 -1 -1 3 0 21
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303 AS_000_0 3 -1 5 4 0 3 4 7 -1 -1 1 0 21
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310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
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308 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
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300 CLK_CNT_1_ 3 -1 2 2 2 6 -1 -1 2 0 21
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299 CLK_CNT_0_ 3 -1 6 2 2 6 -1 -1 1 0 21
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296 inst_AS_000_INT_D 3 -1 0 2 3 4 -1 -1 1 0 20
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306 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
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309 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
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305 RN_UDS_000 3 31 3 1 3 31 -1 3 0 21
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304 RN_AS_000 3 32 3 1 0 32 -1 1 0 21
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302 inst_AS_030_delay 3 -1 5 1 5 -1 -1 1 0 21
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298 inst_AS_030_AMIGA_ENABLE 3 -1 5 1 3 -1 -1 1 1 21
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297 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 20
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10 CLK_000 9 -1 1 7 10 -1
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63 CLK_030 9 -1 0 63 -1
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60 CLK_OSZI 9 -1 0 60 -1
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13 CPU_SPACE 1 -1 -1 4 0 3 5 7 13 -1
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40 VPA 1 -1 -1 3 0 3 7 40 -1
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96 A_19_ 1 -1 -1 2 5 7 96 -1
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95 A_16_ 1 -1 -1 2 5 7 95 -1
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94 A_18_ 1 -1 -1 2 5 7 94 -1
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85 RST 1 -1 -1 2 1 5 85 -1
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81 AS_030 1 -1 -1 2 3 5 81 -1
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58 A_17_ 1 -1 -1 2 5 7 58 -1
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57 FC_1_ 1 -1 -1 2 5 7 57 -1
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56 FC_0_ 1 -1 -1 2 5 7 56 -1
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27 BGACK_000 1 -1 -1 2 5 7 27 -1
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78 SIZE_1_ 1 -1 -1 1 3 78 -1
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70 RW 1 -1 -1 1 3 70 -1
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69 SIZE_0_ 1 -1 -1 1 3 69 -1
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68 A_0_ 1 -1 -1 1 3 68 -1
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67 IPL_2_ 1 -1 -1 1 1 67 -1
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66 IPL_0_ 1 -1 -1 1 1 66 -1
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55 IPL_1_ 1 -1 -1 1 1 55 -1
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20 BG_030 1 -1 -1 1 3 20 -1
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18 A_24_ 1 -1 -1 1 5 18 -1
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17 A_25_ 1 -1 -1 1 5 17 -1
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16 A_26_ 1 -1 -1 1 5 16 -1
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15 A_27_ 1 -1 -1 1 5 15 -1
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14 A_28_ 1 -1 -1 1 5 14 -1
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5 A_29_ 1 -1 -1 1 5 5 -1
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4 A_30_ 1 -1 -1 1 5 4 -1
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3 A_31_ 1 -1 -1 1 5 3 -1
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69 "number of signals after reading design file"
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"sig sig sig pair blk fan PT xor sync"
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"num name type sig num out pin node cnt PT type"
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"--- ---- ---- ---- --- --- --- ---- --- --- ----"
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82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
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80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
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32 AS_000 5 304 3 1 3 32 -1 1 0 21
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29 DTACK 5 -1 3 1 7 29 -1 1 0 21
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65 E 5 307 6 0 65 -1 4 0 21
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30 LDS_000 5 306 3 0 30 -1 4 0 21
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79 DSACK_0_ 5 309 7 0 79 -1 3 0 21
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64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
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31 UDS_000 5 305 3 0 31 -1 3 0 21
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34 VMA 5 308 3 0 34 -1 2 1 20
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293 BERR 0 5 0 -1 -1 1 0 21
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91 AVEC 0 0 0 91 -1 1 0 21
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77 FPU_CS 0 7 0 77 -1 1 0 21
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47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
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33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
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28 BG_000 0 3 0 28 -1 1 0 20
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19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
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9 CLK_EXP 0 1 0 9 -1 1 0 21
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8 IPL_030_2_ 0 1 0 8 -1 1 0 21
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7 IPL_030_0_ 0 1 0 7 -1 1 0 21
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6 IPL_030_1_ 0 1 0 6 -1 1 0 21
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2 RESET 0 1 0 2 -1 1 0 21
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294 cpu_est_0_ 3 -1 0 6 0 2 3 4 6 7 -1 -1 1 0 21
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307 RN_E 3 65 6 5 2 3 4 6 7 65 -1 4 0 21
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295 cpu_est_1_ 3 -1 4 5 2 3 4 6 7 -1 -1 4 0 21
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301 cpu_est_2_ 3 -1 2 5 2 3 4 6 7 -1 -1 3 0 21
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303 AS_000_0 3 -1 5 4 0 3 4 7 -1 -1 1 0 21
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310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
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308 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
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300 CLK_CNT_1_ 3 -1 2 2 2 6 -1 -1 2 0 21
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299 CLK_CNT_0_ 3 -1 6 2 2 6 -1 -1 1 0 21
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296 inst_AS_000_INT_D 3 -1 0 2 3 4 -1 -1 1 0 20
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306 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
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309 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
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305 RN_UDS_000 3 31 3 1 3 31 -1 3 0 21
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304 RN_AS_000 3 32 3 1 0 32 -1 1 0 21
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302 inst_AS_030_delay 3 -1 5 1 5 -1 -1 1 0 21
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298 inst_AS_030_AMIGA_ENABLE 3 -1 5 1 3 -1 -1 1 1 21
|
|
297 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 20
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 CPU_SPACE 1 -1 -1 4 0 3 5 7 13 -1
|
|
40 VPA 1 -1 -1 3 0 3 7 40 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
85 RST 1 -1 -1 2 1 5 85 -1
|
|
81 AS_030 1 -1 -1 2 3 5 81 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
70 RW 1 -1 -1 1 3 70 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 5 18 -1
|
|
17 A_25_ 1 -1 -1 1 5 17 -1
|
|
16 A_26_ 1 -1 -1 1 5 16 -1
|
|
15 A_27_ 1 -1 -1 1 5 15 -1
|
|
14 A_28_ 1 -1 -1 1 5 14 -1
|
|
5 A_29_ 1 -1 -1 1 5 5 -1
|
|
4 A_30_ 1 -1 -1 1 5 4 -1
|
|
3 A_31_ 1 -1 -1 1 5 3 -1
|
|
68 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
|
|
32 AS_000 5 303 3 1 3 32 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
65 E 5 306 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 305 3 0 30 -1 4 0 21
|
|
79 DSACK_0_ 5 308 7 0 79 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 3 0 21
|
|
34 VMA 5 307 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 2 5 2 3 4 6 7 -1 -1 1 0 21
|
|
306 RN_E 3 65 6 4 3 4 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 4 4 3 4 6 7 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 4 4 3 4 6 7 -1 -1 3 0 21
|
|
302 AS_000_0 3 -1 5 3 0 3 7 -1 -1 1 0 21
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
307 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
298 CLK_CNT_0_ 3 -1 2 2 2 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 0 2 0 3 -1 -1 1 0 21
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
308 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 3 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
303 RN_AS_000 3 32 3 1 0 32 -1 1 0 21
|
|
301 inst_AS_030_delay 3 -1 5 1 5 -1 -1 1 0 21
|
|
297 inst_AS_030_AMIGA_ENABLE 3 -1 5 1 3 -1 -1 1 1 21
|
|
296 inst_AS_000_INT_DD 3 -1 0 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 CPU_SPACE 1 -1 -1 4 0 3 5 7 13 -1
|
|
40 VPA 1 -1 -1 3 0 3 7 40 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
85 RST 1 -1 -1 2 1 5 85 -1
|
|
81 AS_030 1 -1 -1 2 3 5 81 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
70 RW 1 -1 -1 1 3 70 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 5 18 -1
|
|
17 A_25_ 1 -1 -1 1 5 17 -1
|
|
16 A_26_ 1 -1 -1 1 5 16 -1
|
|
15 A_27_ 1 -1 -1 1 5 15 -1
|
|
14 A_28_ 1 -1 -1 1 5 14 -1
|
|
5 A_29_ 1 -1 -1 1 5 5 -1
|
|
4 A_30_ 1 -1 -1 1 5 4 -1
|
|
3 A_31_ 1 -1 -1 1 5 3 -1
|
|
68 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
|
|
32 AS_000 5 303 3 1 3 32 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
65 E 5 306 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 305 3 0 30 -1 4 0 21
|
|
79 DSACK_0_ 5 308 7 0 79 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 3 0 21
|
|
34 VMA 5 307 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 0 5 0 3 4 6 7 -1 -1 1 0 21
|
|
306 RN_E 3 65 6 4 3 4 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 4 4 3 4 6 7 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 4 4 3 4 6 7 -1 -1 3 0 21
|
|
302 as_amiga_un2_rst_n 3 -1 5 3 2 3 7 -1 -1 1 0 21
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
307 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
299 CLK_CNT_1_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
298 CLK_CNT_0_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 2 2 2 3 -1 -1 1 0 21
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
308 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 3 0 21
|
|
303 RN_AS_000 3 32 3 1 2 32 -1 1 0 21
|
|
301 inst_AS_030_delay 3 -1 5 1 5 -1 -1 1 0 21
|
|
297 inst_AS_030_AMIGA_ENABLE 3 -1 5 1 3 -1 -1 1 1 21
|
|
296 inst_AS_000_INT_DD 3 -1 2 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
85 RST 1 -1 -1 2 1 5 85 -1
|
|
81 AS_030 1 -1 -1 2 3 5 81 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
70 RW 1 -1 -1 1 3 70 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 5 18 -1
|
|
17 A_25_ 1 -1 -1 1 5 17 -1
|
|
16 A_26_ 1 -1 -1 1 5 16 -1
|
|
15 A_27_ 1 -1 -1 1 5 15 -1
|
|
14 A_28_ 1 -1 -1 1 5 14 -1
|
|
5 A_29_ 1 -1 -1 1 5 5 -1
|
|
4 A_30_ 1 -1 -1 1 5 4 -1
|
|
3 A_31_ 1 -1 -1 1 5 3 -1
|
|
68 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
|
|
32 AS_000 5 303 3 1 3 32 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
65 E 5 306 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 305 3 0 30 -1 4 0 21
|
|
79 DSACK_0_ 5 308 7 0 79 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 3 0 21
|
|
34 VMA 5 307 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 0 5 0 3 4 6 7 -1 -1 1 0 21
|
|
306 RN_E 3 65 6 4 3 4 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 4 4 3 4 6 7 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 4 4 3 4 6 7 -1 -1 3 0 21
|
|
302 as_amiga_un2_rst_n 3 -1 5 3 2 3 7 -1 -1 1 0 21
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
307 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
299 CLK_CNT_1_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
298 CLK_CNT_0_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 2 2 2 3 -1 -1 1 0 21
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
308 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 3 0 21
|
|
303 RN_AS_000 3 32 3 1 2 32 -1 1 0 21
|
|
301 inst_AS_030_delay 3 -1 5 1 5 -1 -1 1 0 21
|
|
297 inst_AS_030_AMIGA_ENABLE 3 -1 5 1 3 -1 -1 1 1 21
|
|
296 inst_AS_000_INT_DD 3 -1 2 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
85 RST 1 -1 -1 2 1 5 85 -1
|
|
81 AS_030 1 -1 -1 2 3 5 81 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
70 RW 1 -1 -1 1 3 70 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 5 18 -1
|
|
17 A_25_ 1 -1 -1 1 5 17 -1
|
|
16 A_26_ 1 -1 -1 1 5 16 -1
|
|
15 A_27_ 1 -1 -1 1 5 15 -1
|
|
14 A_28_ 1 -1 -1 1 5 14 -1
|
|
5 A_29_ 1 -1 -1 1 5 5 -1
|
|
4 A_30_ 1 -1 -1 1 5 4 -1
|
|
3 A_31_ 1 -1 -1 1 5 3 -1
|
|
68 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
|
|
32 AS_000 5 303 3 1 3 32 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
65 E 5 306 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 4 0 21
|
|
30 LDS_000 5 305 3 0 30 -1 4 0 21
|
|
79 DSACK_0_ 5 308 7 0 79 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
|
|
34 VMA 5 307 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 0 5 0 3 4 6 7 -1 -1 1 0 21
|
|
306 RN_E 3 65 6 4 3 4 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 4 4 3 4 6 7 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 4 4 3 4 6 7 -1 -1 3 0 21
|
|
301 as_amiga_un2_rst_n 3 -1 5 3 2 3 7 -1 -1 1 0 21
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
307 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
298 CLK_CNT_1_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
303 RN_AS_000 3 32 3 2 2 3 32 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 2 2 2 3 -1 -1 1 0 21
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
308 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
|
|
302 inst_AS_030_AMIGA_ENABLE 3 -1 5 1 3 -1 -1 1 1 21
|
|
300 inst_AS_030_delay 3 -1 5 1 5 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 2 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
85 RST 1 -1 -1 2 1 5 85 -1
|
|
81 AS_030 1 -1 -1 2 3 5 81 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
70 RW 1 -1 -1 1 3 70 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 5 18 -1
|
|
17 A_25_ 1 -1 -1 1 5 17 -1
|
|
16 A_26_ 1 -1 -1 1 5 16 -1
|
|
15 A_27_ 1 -1 -1 1 5 15 -1
|
|
14 A_28_ 1 -1 -1 1 5 14 -1
|
|
5 A_29_ 1 -1 -1 1 5 5 -1
|
|
4 A_30_ 1 -1 -1 1 5 4 -1
|
|
3 A_31_ 1 -1 -1 1 5 3 -1
|
|
69 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
|
|
32 AS_000 5 304 3 1 3 32 -1 1 0 20
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 306 3 0 30 -1 6 0 20
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 4 0 20
|
|
79 DSACK_0_ 5 309 7 0 79 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 5 6 0 3 4 5 6 7 -1 -1 1 0 20
|
|
307 RN_E 3 65 6 5 0 3 4 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 0 5 0 3 4 6 7 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 4 5 0 3 4 6 7 -1 -1 3 0 21
|
|
303 AS_000_0 3 -1 5 4 3 4 5 7 -1 -1 1 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
308 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
304 RN_AS_000 3 32 3 2 3 5 32 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 5 2 3 4 -1 -1 1 0 20
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 6 0 20
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
309 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
302 inst_AS_030_ne 3 -1 5 1 2 -1 -1 1 0 21
|
|
301 inst_AS_030_AMIGA_ENABLE 3 -1 2 1 3 -1 -1 1 1 21
|
|
300 inst_AS_030_delay 3 -1 2 1 5 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 20
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 3 1 2 5 85 -1
|
|
81 AS_030 1 -1 -1 3 2 3 5 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
70 RW 1 -1 -1 1 3 70 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 2 18 -1
|
|
17 A_25_ 1 -1 -1 1 2 17 -1
|
|
16 A_26_ 1 -1 -1 1 2 16 -1
|
|
15 A_27_ 1 -1 -1 1 2 15 -1
|
|
14 A_28_ 1 -1 -1 1 2 14 -1
|
|
5 A_29_ 1 -1 -1 1 2 5 -1
|
|
4 A_30_ 1 -1 -1 1 2 4 -1
|
|
3 A_31_ 1 -1 -1 1 2 3 -1
|
|
69 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 306 3 0 30 -1 6 0 20
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 4 0 20
|
|
79 DSACK_0_ 5 309 7 0 79 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 304 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 5 6 0 3 4 5 6 7 -1 -1 1 0 20
|
|
307 RN_E 3 65 6 5 0 3 4 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 0 5 0 3 4 6 7 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 4 5 0 3 4 6 7 -1 -1 3 0 21
|
|
303 AS_000_0 3 -1 5 4 3 4 5 7 -1 -1 1 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
308 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
304 RN_AS_000 3 32 3 2 3 5 32 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 5 2 3 4 -1 -1 1 0 20
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 6 0 20
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
309 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
302 inst_AS_030_ne 3 -1 5 1 2 -1 -1 1 0 21
|
|
301 inst_AS_030_AMIGA_ENABLE 3 -1 2 1 3 -1 -1 1 1 21
|
|
300 inst_AS_030_delay 3 -1 2 1 5 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 20
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 3 1 2 5 85 -1
|
|
81 AS_030 1 -1 -1 3 2 3 5 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
70 RW 1 -1 -1 1 3 70 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 2 18 -1
|
|
17 A_25_ 1 -1 -1 1 2 17 -1
|
|
16 A_26_ 1 -1 -1 1 2 16 -1
|
|
15 A_27_ 1 -1 -1 1 2 15 -1
|
|
14 A_28_ 1 -1 -1 1 2 14 -1
|
|
5 A_29_ 1 -1 -1 1 2 5 -1
|
|
4 A_30_ 1 -1 -1 1 2 4 -1
|
|
3 A_31_ 1 -1 -1 1 2 3 -1
|
|
69 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 306 3 0 30 -1 6 0 20
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 4 0 20
|
|
79 DSACK_0_ 5 309 7 0 79 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 304 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 5 6 0 3 4 5 6 7 -1 -1 1 0 20
|
|
307 RN_E 3 65 6 5 0 3 4 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 0 5 0 3 4 6 7 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 4 5 0 3 4 6 7 -1 -1 3 0 21
|
|
301 as_amiga_un2_rst_n 3 -1 5 4 3 4 5 7 -1 -1 1 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
308 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
304 RN_AS_000 3 32 3 2 3 5 32 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 5 2 3 4 -1 -1 1 0 20
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 6 0 20
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
309 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
303 inst_AS_030_ne 3 -1 5 1 2 -1 -1 1 0 21
|
|
302 inst_AS_030_AMIGA_ENABLE 3 -1 2 1 3 -1 -1 1 1 21
|
|
300 inst_AS_030_delay 3 -1 2 1 5 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 20
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 3 1 2 5 85 -1
|
|
81 AS_030 1 -1 -1 3 2 3 5 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
70 RW 1 -1 -1 1 3 70 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 2 18 -1
|
|
17 A_25_ 1 -1 -1 1 2 17 -1
|
|
16 A_26_ 1 -1 -1 1 2 16 -1
|
|
15 A_27_ 1 -1 -1 1 2 15 -1
|
|
14 A_28_ 1 -1 -1 1 2 14 -1
|
|
5 A_29_ 1 -1 -1 1 2 5 -1
|
|
4 A_30_ 1 -1 -1 1 2 4 -1
|
|
3 A_31_ 1 -1 -1 1 2 3 -1
|
|
69 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 306 3 0 30 -1 6 0 20
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 4 0 20
|
|
79 DSACK_0_ 5 309 7 0 79 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 304 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 5 6 2 3 4 5 6 7 -1 -1 1 0 20
|
|
307 RN_E 3 65 6 5 2 3 4 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 2 5 2 3 4 6 7 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 4 5 2 3 4 6 7 -1 -1 3 0 21
|
|
301 as_amiga_un2_rst_n 3 -1 5 4 3 4 5 7 -1 -1 1 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
308 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
298 CLK_CNT_1_ 3 -1 2 2 2 6 -1 -1 2 0 21
|
|
304 RN_AS_000 3 32 3 2 3 4 32 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 2 2 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 4 2 3 5 -1 -1 1 0 20
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 6 0 20
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
309 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
|
|
303 inst_AS_030_ne 3 -1 5 1 0 -1 -1 1 0 21
|
|
302 inst_AS_030_AMIGA_ENABLE 3 -1 0 1 3 -1 -1 1 1 21
|
|
300 inst_AS_030_delay 3 -1 0 1 5 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 5 1 7 -1 -1 1 0 20
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 5 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 0 18 -1
|
|
17 A_25_ 1 -1 -1 1 0 17 -1
|
|
16 A_26_ 1 -1 -1 1 0 16 -1
|
|
15 A_27_ 1 -1 -1 1 0 15 -1
|
|
14 A_28_ 1 -1 -1 1 0 14 -1
|
|
5 A_29_ 1 -1 -1 1 0 5 -1
|
|
4 A_30_ 1 -1 -1 1 0 4 -1
|
|
3 A_31_ 1 -1 -1 1 0 3 -1
|
|
69 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 306 3 0 30 -1 6 0 20
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 4 0 20
|
|
79 DSACK_0_ 5 309 7 0 79 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 304 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 5 6 2 3 4 5 6 7 -1 -1 1 0 20
|
|
307 RN_E 3 65 6 5 2 3 4 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 2 5 2 3 4 6 7 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 4 5 2 3 4 6 7 -1 -1 3 0 21
|
|
301 as_amiga_un2_rst_n 3 -1 5 3 3 4 5 -1 -1 1 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
308 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
298 CLK_CNT_1_ 3 -1 2 2 2 6 -1 -1 2 0 21
|
|
304 RN_AS_000 3 32 3 2 3 4 32 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 2 2 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 4 2 3 5 -1 -1 1 0 20
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 6 0 20
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
309 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
|
|
303 inst_AS_030_ne 3 -1 5 1 0 -1 -1 1 0 21
|
|
302 inst_AS_030_AMIGA_ENABLE 3 -1 0 1 3 -1 -1 1 1 21
|
|
300 inst_AS_030_delay 3 -1 0 1 5 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 5 1 7 -1 -1 1 0 20
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 0 18 -1
|
|
17 A_25_ 1 -1 -1 1 0 17 -1
|
|
16 A_26_ 1 -1 -1 1 0 16 -1
|
|
15 A_27_ 1 -1 -1 1 0 15 -1
|
|
14 A_28_ 1 -1 -1 1 0 14 -1
|
|
5 A_29_ 1 -1 -1 1 0 5 -1
|
|
4 A_30_ 1 -1 -1 1 0 4 -1
|
|
3 A_31_ 1 -1 -1 1 0 3 -1
|
|
68 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 305 3 0 30 -1 6 0 20
|
|
65 E 5 306 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 4 0 20
|
|
79 DSACK_0_ 5 308 7 0 79 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
|
|
34 VMA 5 307 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 303 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
306 RN_E 3 65 6 4 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 3 5 6 7 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 5 4 3 5 6 7 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 5 4 3 5 6 7 -1 -1 1 0 21
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
307 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
298 CLK_CNT_1_ 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
303 RN_AS_000 3 32 3 2 0 3 32 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 2 5 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 0 2 3 4 -1 -1 1 0 21
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 6 0 20
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
308 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
|
|
302 inst_AS_030_ne 3 -1 0 1 2 -1 -1 1 0 21
|
|
301 inst_AS_030_AMIGA_ENABLE 3 -1 2 1 3 -1 -1 1 1 21
|
|
300 inst_AS_030_delay 3 -1 4 1 0 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 4 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 2 18 -1
|
|
17 A_25_ 1 -1 -1 1 2 17 -1
|
|
16 A_26_ 1 -1 -1 1 2 16 -1
|
|
15 A_27_ 1 -1 -1 1 2 15 -1
|
|
14 A_28_ 1 -1 -1 1 2 14 -1
|
|
5 A_29_ 1 -1 -1 1 2 5 -1
|
|
4 A_30_ 1 -1 -1 1 2 4 -1
|
|
3 A_31_ 1 -1 -1 1 2 3 -1
|
|
67 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 304 3 0 30 -1 6 0 20
|
|
65 E 5 305 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 303 3 0 31 -1 4 0 20
|
|
79 DSACK_0_ 5 307 7 0 79 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 308 6 0 64 -1 3 0 21
|
|
34 VMA 5 306 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 302 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
305 RN_E 3 65 6 4 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 3 5 6 7 -1 -1 4 0 20
|
|
299 cpu_est_2_ 3 -1 5 4 3 5 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 5 4 3 5 6 7 -1 -1 1 0 20
|
|
308 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
306 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
298 CLK_CNT_1_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
302 RN_AS_000 3 32 3 2 3 4 32 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 4 2 3 4 -1 -1 1 0 21
|
|
304 RN_LDS_000 3 30 3 1 3 30 -1 6 0 20
|
|
303 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
307 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
|
|
301 inst_AS_030_AMIGA_ENABLE 3 -1 2 1 3 -1 -1 1 1 21
|
|
300 inst_AS_030_delay 3 -1 5 1 2 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 2 3 4 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 2 18 -1
|
|
17 A_25_ 1 -1 -1 1 2 17 -1
|
|
16 A_26_ 1 -1 -1 1 2 16 -1
|
|
15 A_27_ 1 -1 -1 1 2 15 -1
|
|
14 A_28_ 1 -1 -1 1 2 14 -1
|
|
5 A_29_ 1 -1 -1 1 2 5 -1
|
|
4 A_30_ 1 -1 -1 1 2 4 -1
|
|
3 A_31_ 1 -1 -1 1 2 3 -1
|
|
67 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 304 3 0 30 -1 6 0 20
|
|
65 E 5 305 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 303 3 0 31 -1 4 0 20
|
|
79 DSACK_0_ 5 307 7 0 79 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 308 6 0 64 -1 3 0 21
|
|
34 VMA 5 306 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 302 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
305 RN_E 3 65 6 4 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 3 5 6 7 -1 -1 4 0 20
|
|
299 cpu_est_2_ 3 -1 5 4 3 5 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 5 4 3 5 6 7 -1 -1 1 0 20
|
|
308 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
306 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
298 CLK_CNT_1_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
302 RN_AS_000 3 32 3 2 3 4 32 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 4 2 3 4 -1 -1 1 0 21
|
|
304 RN_LDS_000 3 30 3 1 3 30 -1 6 0 20
|
|
303 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
307 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
|
|
301 inst_AS_030_AMIGA_ENABLE 3 -1 2 1 3 -1 -1 1 1 21
|
|
300 inst_AS_030_delay 3 -1 5 1 2 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 2 3 4 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 2 18 -1
|
|
17 A_25_ 1 -1 -1 1 2 17 -1
|
|
16 A_26_ 1 -1 -1 1 2 16 -1
|
|
15 A_27_ 1 -1 -1 1 2 15 -1
|
|
14 A_28_ 1 -1 -1 1 2 14 -1
|
|
5 A_29_ 1 -1 -1 1 2 5 -1
|
|
4 A_30_ 1 -1 -1 1 2 4 -1
|
|
3 A_31_ 1 -1 -1 1 2 3 -1
|
|
67 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 304 3 0 30 -1 6 0 20
|
|
65 E 5 305 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 303 3 0 31 -1 4 0 20
|
|
79 DSACK_0_ 5 307 7 0 79 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 308 6 0 64 -1 3 0 21
|
|
34 VMA 5 306 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 302 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
305 RN_E 3 65 6 4 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 3 5 6 7 -1 -1 4 0 20
|
|
299 cpu_est_2_ 3 -1 5 4 3 5 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 5 4 3 5 6 7 -1 -1 1 0 20
|
|
308 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
306 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
298 CLK_CNT_1_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
302 RN_AS_000 3 32 3 2 3 4 32 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 4 2 3 4 -1 -1 1 0 21
|
|
304 RN_LDS_000 3 30 3 1 3 30 -1 6 0 20
|
|
303 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
307 RN_DSACK_0_ 3 79 7 1 7 79 -1 3 0 21
|
|
301 inst_AS_030_AMIGA_ENABLE 3 -1 2 1 3 -1 -1 1 1 21
|
|
300 inst_AS_030_delay 3 -1 5 1 2 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 2 3 4 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 2 18 -1
|
|
17 A_25_ 1 -1 -1 1 2 17 -1
|
|
16 A_26_ 1 -1 -1 1 2 16 -1
|
|
15 A_27_ 1 -1 -1 1 2 15 -1
|
|
14 A_28_ 1 -1 -1 1 2 14 -1
|
|
5 A_29_ 1 -1 -1 1 2 5 -1
|
|
4 A_30_ 1 -1 -1 1 2 4 -1
|
|
3 A_31_ 1 -1 -1 1 2 3 -1
|
|
67 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 302 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 305 3 0 30 -1 6 0 20
|
|
65 E 5 306 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 308 6 0 64 -1 3 0 21
|
|
34 VMA 5 307 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 303 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
306 RN_E 3 65 6 4 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 3 5 6 7 -1 -1 4 0 20
|
|
299 cpu_est_2_ 3 -1 5 4 3 5 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 5 4 3 5 6 7 -1 -1 1 0 20
|
|
308 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
307 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
298 CLK_CNT_1_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
303 RN_AS_000 3 32 3 2 3 4 32 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 4 2 3 4 -1 -1 1 0 21
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 6 0 20
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
302 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
301 inst_AS_030_AMIGA_ENABLE 3 -1 2 1 3 -1 -1 1 1 21
|
|
300 inst_AS_030_delay 3 -1 5 1 2 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 2 3 4 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 2 18 -1
|
|
17 A_25_ 1 -1 -1 1 2 17 -1
|
|
16 A_26_ 1 -1 -1 1 2 16 -1
|
|
15 A_27_ 1 -1 -1 1 2 15 -1
|
|
14 A_28_ 1 -1 -1 1 2 14 -1
|
|
5 A_29_ 1 -1 -1 1 2 5 -1
|
|
4 A_30_ 1 -1 -1 1 2 4 -1
|
|
3 A_31_ 1 -1 -1 1 2 3 -1
|
|
67 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 302 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 305 3 0 30 -1 6 0 20
|
|
65 E 5 306 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 308 6 0 64 -1 3 0 21
|
|
34 VMA 5 307 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 303 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
306 RN_E 3 65 6 4 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 3 5 6 7 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 4 3 5 6 7 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 5 4 3 5 6 7 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 4 3 4 5 6 -1 -1 1 0 21
|
|
308 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
307 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
298 CLK_CNT_1_ 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
303 RN_AS_000 3 32 3 2 3 4 32 -1 1 0 20
|
|
300 inst_AS_030_delay 3 -1 0 2 0 2 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 4 2 0 3 -1 -1 1 0 20
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 6 0 20
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
302 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
301 inst_AS_030_AMIGA_ENABLE 3 -1 2 1 3 -1 -1 1 1 21
|
|
296 inst_AS_000_INT_DD 3 -1 0 1 7 -1 -1 1 0 20
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 4 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 2 18 -1
|
|
17 A_25_ 1 -1 -1 1 2 17 -1
|
|
16 A_26_ 1 -1 -1 1 2 16 -1
|
|
15 A_27_ 1 -1 -1 1 2 15 -1
|
|
14 A_28_ 1 -1 -1 1 2 14 -1
|
|
5 A_29_ 1 -1 -1 1 2 5 -1
|
|
4 A_30_ 1 -1 -1 1 2 4 -1
|
|
3 A_31_ 1 -1 -1 1 2 3 -1
|
|
66 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 301 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 304 3 0 30 -1 6 0 20
|
|
65 E 5 305 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 303 3 0 31 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 307 6 0 64 -1 2 0 21
|
|
34 VMA 5 306 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 302 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
305 RN_E 3 65 6 5 3 4 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 5 3 4 5 6 7 -1 -1 4 0 20
|
|
298 cpu_est_2_ 3 -1 4 5 3 4 5 6 7 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 5 3 4 5 6 7 -1 -1 1 0 21
|
|
307 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
306 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
302 RN_AS_000 3 32 3 2 0 3 32 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 0 2 0 3 -1 -1 1 0 21
|
|
304 RN_LDS_000 3 30 3 1 3 30 -1 6 0 20
|
|
303 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
301 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
300 inst_AS_030_AMIGA_ENABLE 3 -1 2 1 3 -1 -1 1 1 21
|
|
299 inst_AS_030_delay 3 -1 5 1 2 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 0 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 2 18 -1
|
|
17 A_25_ 1 -1 -1 1 2 17 -1
|
|
16 A_26_ 1 -1 -1 1 2 16 -1
|
|
15 A_27_ 1 -1 -1 1 2 15 -1
|
|
14 A_28_ 1 -1 -1 1 2 14 -1
|
|
5 A_29_ 1 -1 -1 1 2 5 -1
|
|
4 A_30_ 1 -1 -1 1 2 4 -1
|
|
3 A_31_ 1 -1 -1 1 2 3 -1
|
|
67 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 302 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 305 3 0 30 -1 6 0 20
|
|
65 E 5 306 6 0 65 -1 5 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 308 6 0 64 -1 3 0 21
|
|
34 VMA 5 307 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 303 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 4 5 0 3 4 6 7 -1 -1 2 0 20
|
|
306 RN_E 3 65 6 4 0 3 6 7 65 -1 5 0 21
|
|
294 cpu_est_1_ 3 -1 0 4 0 3 6 7 -1 -1 5 0 21
|
|
299 cpu_est_2_ 3 -1 0 4 0 3 6 7 -1 -1 4 0 21
|
|
308 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
307 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
298 CLK_CNT_1_ 3 -1 2 2 2 6 -1 -1 2 0 21
|
|
303 RN_AS_000 3 32 3 2 3 4 32 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 2 2 2 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 4 2 3 5 -1 -1 1 0 21
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 6 0 20
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
302 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
301 inst_AS_030_AMIGA_ENABLE 3 -1 5 1 3 -1 -1 1 1 21
|
|
300 inst_AS_030_delay 3 -1 5 1 5 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 5 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 6 0 3 4 5 6 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 5 18 -1
|
|
17 A_25_ 1 -1 -1 1 5 17 -1
|
|
16 A_26_ 1 -1 -1 1 5 16 -1
|
|
15 A_27_ 1 -1 -1 1 5 15 -1
|
|
14 A_28_ 1 -1 -1 1 5 14 -1
|
|
5 A_29_ 1 -1 -1 1 5 5 -1
|
|
4 A_30_ 1 -1 -1 1 5 4 -1
|
|
3 A_31_ 1 -1 -1 1 5 3 -1
|
|
67 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 302 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 305 3 0 30 -1 6 0 20
|
|
65 E 5 306 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 308 6 0 64 -1 3 0 21
|
|
34 VMA 5 307 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 303 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
306 RN_E 3 65 6 4 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 3 5 6 7 -1 -1 4 0 20
|
|
299 cpu_est_2_ 3 -1 5 4 3 5 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 5 4 3 5 6 7 -1 -1 1 0 20
|
|
308 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
307 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
298 CLK_CNT_1_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
303 RN_AS_000 3 32 3 2 3 4 32 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 4 2 3 4 -1 -1 1 0 21
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 6 0 20
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
302 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
301 inst_AS_030_AMIGA_ENABLE 3 -1 2 1 3 -1 -1 1 1 21
|
|
300 inst_AS_030_delay 3 -1 5 1 2 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 2 3 4 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 2 18 -1
|
|
17 A_25_ 1 -1 -1 1 2 17 -1
|
|
16 A_26_ 1 -1 -1 1 2 16 -1
|
|
15 A_27_ 1 -1 -1 1 2 15 -1
|
|
14 A_28_ 1 -1 -1 1 2 14 -1
|
|
5 A_29_ 1 -1 -1 1 2 5 -1
|
|
4 A_30_ 1 -1 -1 1 2 4 -1
|
|
3 A_31_ 1 -1 -1 1 2 3 -1
|
|
67 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 302 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
65 E 5 306 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 4 0 20
|
|
30 LDS_000 5 305 3 0 30 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 308 6 0 64 -1 3 0 21
|
|
34 VMA 5 307 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 303 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
306 RN_E 3 65 6 4 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 3 5 6 7 -1 -1 4 0 20
|
|
300 cpu_est_2_ 3 -1 5 4 3 5 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 5 4 3 5 6 7 -1 -1 1 0 20
|
|
308 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
307 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
299 CLK_CNT_1_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
303 RN_AS_000 3 32 3 2 3 4 32 -1 1 0 20
|
|
298 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 4 2 3 4 -1 -1 1 0 21
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 4 0 20
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
302 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
301 inst_AS_030_AMIGA_ENABLE 3 -1 2 1 3 -1 -1 1 1 21
|
|
297 inst_AS_030_delay 3 -1 5 1 2 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 2 3 4 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 2 18 -1
|
|
17 A_25_ 1 -1 -1 1 2 17 -1
|
|
16 A_26_ 1 -1 -1 1 2 16 -1
|
|
15 A_27_ 1 -1 -1 1 2 15 -1
|
|
14 A_28_ 1 -1 -1 1 2 14 -1
|
|
5 A_29_ 1 -1 -1 1 2 5 -1
|
|
4 A_30_ 1 -1 -1 1 2 4 -1
|
|
3 A_31_ 1 -1 -1 1 2 3 -1
|
|
67 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 302 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
65 E 5 306 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 4 0 20
|
|
30 LDS_000 5 305 3 0 30 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 308 6 0 64 -1 3 0 21
|
|
34 VMA 5 307 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 303 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 4 5 0 3 4 6 7 -1 -1 1 0 21
|
|
306 RN_E 3 65 6 4 0 3 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 4 0 3 6 7 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 0 4 0 3 6 7 -1 -1 3 0 21
|
|
298 CLK_CNT_0_ 3 -1 0 3 0 4 6 -1 -1 1 0 21
|
|
308 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
307 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
299 CLK_CNT_1_ 3 -1 4 2 4 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYC 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
303 RN_AS_000 3 32 3 2 3 5 32 -1 1 0 20
|
|
301 inst_AS_030_AMIGA_ENABLE 3 -1 2 2 3 5 -1 -1 1 1 21
|
|
295 inst_AS_000_INT_D 3 -1 5 2 3 5 -1 -1 1 0 21
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 4 0 20
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
302 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 5 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 2 18 -1
|
|
17 A_25_ 1 -1 -1 1 2 17 -1
|
|
16 A_26_ 1 -1 -1 1 2 16 -1
|
|
15 A_27_ 1 -1 -1 1 2 15 -1
|
|
14 A_28_ 1 -1 -1 1 2 14 -1
|
|
5 A_29_ 1 -1 -1 1 2 5 -1
|
|
4 A_30_ 1 -1 -1 1 2 4 -1
|
|
3 A_31_ 1 -1 -1 1 2 3 -1
|
|
67 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 302 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
65 E 5 306 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 4 0 20
|
|
30 LDS_000 5 305 3 0 30 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 308 6 0 64 -1 3 0 21
|
|
34 VMA 5 307 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 303 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 4 5 0 3 4 6 7 -1 -1 1 0 21
|
|
306 RN_E 3 65 6 4 0 3 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 4 0 3 6 7 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 0 4 0 3 6 7 -1 -1 3 0 21
|
|
298 CLK_CNT_0_ 3 -1 0 3 0 4 6 -1 -1 1 0 21
|
|
308 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
307 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
299 CLK_CNT_1_ 3 -1 4 2 4 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYC 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
303 RN_AS_000 3 32 3 2 3 5 32 -1 1 0 20
|
|
301 inst_AS_030_AMIGA_ENABLE 3 -1 2 2 3 5 -1 -1 1 1 21
|
|
295 inst_AS_000_INT_D 3 -1 5 2 3 5 -1 -1 1 0 21
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 4 0 20
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
302 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 5 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
40 VPA 1 -1 -1 2 3 7 40 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 2 18 -1
|
|
17 A_25_ 1 -1 -1 1 2 17 -1
|
|
16 A_26_ 1 -1 -1 1 2 16 -1
|
|
15 A_27_ 1 -1 -1 1 2 15 -1
|
|
14 A_28_ 1 -1 -1 1 2 14 -1
|
|
5 A_29_ 1 -1 -1 1 2 5 -1
|
|
4 A_30_ 1 -1 -1 1 2 4 -1
|
|
3 A_31_ 1 -1 -1 1 2 3 -1
|
|
68 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 303 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 4 0 20
|
|
30 LDS_000 5 306 3 0 30 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 304 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 4 5 2 3 4 6 7 -1 -1 1 0 21
|
|
307 RN_E 3 65 6 4 2 3 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 2 4 2 3 6 7 -1 -1 4 0 21
|
|
301 cpu_est_2_ 3 -1 6 4 2 3 6 7 -1 -1 3 0 21
|
|
299 CLK_CNT_0_ 3 -1 4 3 2 4 6 -1 -1 1 0 21
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
308 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
300 CLK_CNT_1_ 3 -1 2 2 2 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYC 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
304 RN_AS_000 3 32 3 2 0 3 32 -1 1 0 20
|
|
302 inst_AS_030_AMIGA_ENABLE 3 -1 0 2 3 5 -1 -1 1 1 21
|
|
298 inst_VPA_SYNC 3 -1 5 2 3 7 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 0 2 3 5 -1 -1 1 0 21
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 4 0 20
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
303 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 5 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 5 40 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 0 18 -1
|
|
17 A_25_ 1 -1 -1 1 0 17 -1
|
|
16 A_26_ 1 -1 -1 1 0 16 -1
|
|
15 A_27_ 1 -1 -1 1 0 15 -1
|
|
14 A_28_ 1 -1 -1 1 0 14 -1
|
|
5 A_29_ 1 -1 -1 1 0 5 -1
|
|
4 A_30_ 1 -1 -1 1 0 4 -1
|
|
3 A_31_ 1 -1 -1 1 0 3 -1
|
|
68 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 303 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 4 0 20
|
|
30 LDS_000 5 306 3 0 30 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 304 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 4 5 2 3 4 6 7 -1 -1 1 0 21
|
|
307 RN_E 3 65 6 4 2 3 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 2 4 2 3 6 7 -1 -1 4 0 21
|
|
301 cpu_est_2_ 3 -1 6 4 2 3 6 7 -1 -1 3 0 21
|
|
299 CLK_CNT_0_ 3 -1 4 3 2 4 6 -1 -1 1 0 21
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
308 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
300 CLK_CNT_1_ 3 -1 2 2 2 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYC 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
304 RN_AS_000 3 32 3 2 0 3 32 -1 1 0 20
|
|
302 inst_AS_030_AMIGA_ENABLE 3 -1 0 2 3 5 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 5 2 3 7 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 0 2 3 5 -1 -1 1 0 21
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 4 0 20
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
303 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 5 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 5 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 0 18 -1
|
|
17 A_25_ 1 -1 -1 1 0 17 -1
|
|
16 A_26_ 1 -1 -1 1 0 16 -1
|
|
15 A_27_ 1 -1 -1 1 0 15 -1
|
|
14 A_28_ 1 -1 -1 1 0 14 -1
|
|
5 A_29_ 1 -1 -1 1 0 5 -1
|
|
4 A_30_ 1 -1 -1 1 0 4 -1
|
|
3 A_31_ 1 -1 -1 1 0 3 -1
|
|
60 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 303 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 4 0 20
|
|
30 LDS_000 5 306 3 0 30 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 304 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
307 RN_E 3 65 6 4 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 3 5 6 7 -1 -1 4 0 21
|
|
301 cpu_est_2_ 3 -1 5 4 3 5 6 7 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 5 4 3 5 6 7 -1 -1 1 0 21
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
308 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
300 CLK_CNT_1_ 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYC 3 -1 2 2 2 7 -1 -1 2 0 21
|
|
304 RN_AS_000 3 32 3 2 3 4 32 -1 1 0 20
|
|
302 inst_AS_030_AMIGA_ENABLE 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
299 CLK_CNT_0_ 3 -1 6 2 5 6 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 4 2 3 7 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 4 2 0 3 -1 -1 1 0 21
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 4 0 20
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
303 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 0 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 4 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 4 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
60 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 303 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 4 0 20
|
|
30 LDS_000 5 306 3 0 30 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 304 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
307 RN_E 3 65 6 4 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 3 5 6 7 -1 -1 4 0 21
|
|
301 cpu_est_2_ 3 -1 5 4 3 5 6 7 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 5 4 3 5 6 7 -1 -1 1 0 21
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
308 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
300 CLK_CNT_1_ 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYC 3 -1 2 2 2 7 -1 -1 2 0 21
|
|
304 RN_AS_000 3 32 3 2 3 4 32 -1 1 0 20
|
|
302 inst_AS_030_AMIGA_ENABLE 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
299 CLK_CNT_0_ 3 -1 6 2 5 6 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 4 2 3 7 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 4 2 0 3 -1 -1 1 0 21
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 4 0 20
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
303 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 0 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 4 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 4 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
60 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 303 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 4 0 20
|
|
30 LDS_000 5 306 3 0 30 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 304 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
307 RN_E 3 65 6 4 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 3 5 6 7 -1 -1 4 0 21
|
|
301 cpu_est_2_ 3 -1 5 4 3 5 6 7 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 5 4 3 5 6 7 -1 -1 1 0 21
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
308 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
300 CLK_CNT_1_ 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYC 3 -1 2 2 2 7 -1 -1 2 0 21
|
|
304 RN_AS_000 3 32 3 2 3 4 32 -1 1 0 20
|
|
302 inst_AS_030_AMIGA_ENABLE 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
299 CLK_CNT_0_ 3 -1 6 2 5 6 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 4 2 3 7 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 4 2 0 3 -1 -1 1 0 21
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 4 0 20
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
303 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 0 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 4 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 4 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
61 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 4 0 20
|
|
30 LDS_000 5 307 3 0 30 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 305 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 5 2 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 2 5 2 3 5 6 7 -1 -1 4 0 21
|
|
302 cpu_est_2_ 3 -1 5 5 2 3 5 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 5 5 2 3 5 6 7 -1 -1 1 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
309 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
297 inst_DTACK_SYC 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
305 RN_AS_000 3 32 3 2 0 3 32 -1 1 0 20
|
|
303 inst_AS_030_AMIGA_ENABLE 3 -1 4 2 0 3 -1 -1 1 0 21
|
|
300 CLK_CNT_0_ 3 -1 2 2 2 6 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 5 2 3 7 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 0 2 3 4 -1 -1 1 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 4 0 20
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
299 inst_AS_030_delay 3 -1 5 1 4 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 0 3 4 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 4 7 13 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 5 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
61 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 4 0 20
|
|
30 LDS_000 5 307 3 0 30 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 305 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 5 2 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 2 5 2 3 5 6 7 -1 -1 4 0 21
|
|
302 cpu_est_2_ 3 -1 5 5 2 3 5 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 5 5 2 3 5 6 7 -1 -1 1 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
309 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
297 inst_DTACK_SYC 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
305 RN_AS_000 3 32 3 2 0 3 32 -1 1 0 20
|
|
303 inst_AS_030_AMIGA_ENABLE 3 -1 4 2 0 3 -1 -1 1 0 21
|
|
300 CLK_CNT_0_ 3 -1 2 2 2 6 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 5 2 3 7 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 0 2 3 4 -1 -1 1 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 4 0 20
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
299 inst_AS_030_delay 3 -1 5 1 4 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 0 3 4 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 4 7 13 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 5 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
61 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 4 0 20
|
|
30 LDS_000 5 307 3 0 30 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 305 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 5 2 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 2 5 2 3 5 6 7 -1 -1 4 0 21
|
|
302 cpu_est_2_ 3 -1 5 5 2 3 5 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 5 5 2 3 5 6 7 -1 -1 1 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
309 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
297 inst_DTACK_SYC 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
305 RN_AS_000 3 32 3 2 0 3 32 -1 1 0 20
|
|
303 inst_AS_030_AMIGA_ENABLE 3 -1 4 2 0 3 -1 -1 1 0 21
|
|
300 CLK_CNT_0_ 3 -1 2 2 2 6 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 5 2 3 7 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 0 2 3 4 -1 -1 1 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 4 0 20
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
299 inst_AS_030_delay 3 -1 5 1 4 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 0 3 4 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 4 7 13 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 5 7 40 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
61 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 4 0 20
|
|
30 LDS_000 5 307 3 0 30 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 305 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 5 2 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 2 5 2 3 5 6 7 -1 -1 4 0 21
|
|
302 cpu_est_2_ 3 -1 5 5 2 3 5 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 5 5 2 3 5 6 7 -1 -1 1 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
309 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
297 inst_DTACK_SYC 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
305 RN_AS_000 3 32 3 2 0 3 32 -1 1 0 20
|
|
303 inst_AS_030_AMIGA_ENABLE 3 -1 4 2 0 3 -1 -1 1 0 21
|
|
300 CLK_CNT_0_ 3 -1 2 2 2 6 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 5 2 3 7 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 0 2 3 4 -1 -1 1 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 4 0 20
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
299 inst_AS_030_delay 3 -1 5 1 4 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 0 3 4 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 4 7 13 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 5 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
62 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 4 0 20
|
|
30 LDS_000 5 307 3 0 30 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 305 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 4 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 3 5 6 7 -1 -1 4 0 20
|
|
302 cpu_est_2_ 3 -1 6 4 3 5 6 7 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 5 4 3 5 6 7 -1 -1 1 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
309 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
301 CLK_CNT_1_ 3 -1 2 2 2 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYC 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
305 RN_AS_000 3 32 3 2 2 3 32 -1 1 0 20
|
|
303 inst_AS_030_AMIGA_ENABLE 3 -1 4 2 0 3 -1 -1 1 0 21
|
|
300 CLK_CNT_0_ 3 -1 2 2 2 6 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 0 2 3 7 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 2 2 3 4 -1 -1 1 0 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 4 0 20
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
299 inst_AS_030_delay 3 -1 5 1 4 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 4 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 6 0 2 3 4 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 4 7 13 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 0 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
62 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 4 29 -1 1 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 4 0 20
|
|
30 LDS_000 5 307 3 0 30 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 305 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 4 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 3 5 6 7 -1 -1 4 0 21
|
|
302 cpu_est_2_ 3 -1 5 4 3 5 6 7 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 5 4 3 5 6 7 -1 -1 1 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
309 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
305 RN_AS_000 3 32 3 2 0 3 32 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 5 2 5 6 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 2 2 3 7 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 4 0 20
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
303 inst_AS_030_AMIGA_ENABLE 3 -1 0 1 3 -1 -1 1 0 21
|
|
299 inst_AS_030_delay 3 -1 4 1 0 -1 -1 1 0 21
|
|
297 inst_DTACK_SYC 3 -1 4 1 7 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 2 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 4 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
62 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 4 29 -1 1 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 4 0 20
|
|
30 LDS_000 5 307 3 0 30 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 305 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 4 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 3 5 6 7 -1 -1 4 0 21
|
|
302 cpu_est_2_ 3 -1 5 4 3 5 6 7 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 5 4 3 5 6 7 -1 -1 1 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
309 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
305 RN_AS_000 3 32 3 2 0 3 32 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 5 2 5 6 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 2 2 3 7 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 4 0 20
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
303 inst_AS_030_AMIGA_ENABLE 3 -1 0 1 3 -1 -1 1 0 21
|
|
299 inst_AS_030_delay 3 -1 4 1 0 -1 -1 1 0 21
|
|
297 inst_DTACK_SYC 3 -1 4 1 7 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 2 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 4 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
63 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 4 29 -1 1 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 4 0 20
|
|
30 LDS_000 5 308 3 0 30 -1 4 0 20
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 306 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
309 RN_E 3 65 6 4 3 5 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 3 5 6 7 -1 -1 4 0 21
|
|
302 cpu_est_2_ 3 -1 5 4 3 5 6 7 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 5 4 3 5 6 7 -1 -1 1 0 21
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
310 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
301 CLK_CNT_1_ 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
306 RN_AS_000 3 32 3 2 0 3 32 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 2 5 6 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 2 2 3 7 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 4 0 20
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 4 0 20
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
304 inst_AS_030_AMIGA_ENABLE 3 -1 0 1 3 -1 -1 1 0 21
|
|
303 inst_DTACK_SYNC_N 3 -1 4 1 2 -1 -1 1 0 21
|
|
299 inst_AS_030_delay 3 -1 4 1 0 -1 -1 1 0 21
|
|
297 inst_DTACK_SYNC_P 3 -1 2 1 7 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_DD 3 -1 2 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 4 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
63 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
32 AS_000 5 306 3 1 3 32 -1 2 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 5 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 5 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
302 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
296 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 5 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
304 inst_AS_030_AMIGA_ENABLE 3 -1 7 1 3 -1 -1 1 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_AS_030_delay 3 -1 3 1 7 -1 -1 1 0 21
|
|
297 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
64 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
32 AS_000 5 307 3 1 6 32 -1 2 0 21
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 1 0 21
|
|
30 LDS_000 5 309 3 0 30 -1 6 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 308 3 0 31 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
34 VMA 5 311 3 0 34 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
295 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
296 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
307 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
310 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
302 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
311 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
298 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
309 RN_LDS_000 3 30 3 1 3 30 -1 6 0 21
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
305 inst_AS_030_AMIGA_ENABLE 3 -1 7 1 3 -1 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
303 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_AS_030_delay 3 -1 3 1 7 -1 -1 1 0 21
|
|
297 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
60 CLK_OSZI 9 -1 2 6 7 60 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
64 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
32 AS_000 5 307 3 1 6 32 -1 2 0 21
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 1 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 308 3 0 31 -1 4 0 21
|
|
30 LDS_000 5 309 3 0 30 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
34 VMA 5 311 3 0 34 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
295 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
296 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
310 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
302 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
311 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
307 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
309 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
305 inst_AS_030_AMIGA_ENABLE 3 -1 7 1 3 -1 -1 1 0 21
|
|
303 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_AS_030_delay 3 -1 3 1 7 -1 -1 1 0 21
|
|
297 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
60 CLK_OSZI 9 -1 2 6 7 60 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
64 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
32 AS_000 5 307 3 1 6 32 -1 2 0 21
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 1 0 21
|
|
30 LDS_000 5 309 3 0 30 -1 6 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 308 3 0 31 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
34 VMA 5 311 3 0 34 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
295 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
296 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
310 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
302 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
311 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
307 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
309 RN_LDS_000 3 30 3 1 3 30 -1 6 0 21
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
305 inst_AS_030_AMIGA_ENABLE 3 -1 7 1 3 -1 -1 1 0 21
|
|
303 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_AS_030_delay 3 -1 3 1 7 -1 -1 1 0 21
|
|
297 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
60 CLK_OSZI 9 -1 2 6 7 60 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
63 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
32 AS_000 5 306 3 1 6 32 -1 2 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 1 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 5 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 5 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
301 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 SM_AMIGA_0_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
296 SM_AMIGA_1_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 5 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
300 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
304 inst_AS_030_AMIGA_ENABLE 3 -1 3 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
299 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
297 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
62 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 1 0 21
|
|
32 AS_000 5 305 3 1 6 32 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 8 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
301 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 SM_AMIGA_0_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
296 SM_AMIGA_1_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
300 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
302 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
299 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
297 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
62 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 9 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
299 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
62 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 9 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
299 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
62 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 9 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
299 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
61 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 303 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 9 0 21
|
|
30 LDS_000 5 306 3 0 30 -1 9 0 21
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 21
|
|
32 AS_000 5 304 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
307 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
301 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
299 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
300 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
308 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
304 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
303 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
60 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 0 5 29 -1 1 0 21
|
|
80 DSACK_1_ 5 302 7 1 3 80 -1 1 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 9 0 20
|
|
30 LDS_000 5 305 3 0 30 -1 9 0 20
|
|
65 E 5 306 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 308 6 0 64 -1 3 0 21
|
|
34 VMA 5 307 3 0 34 -1 2 1 20
|
|
32 AS_000 5 303 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
306 RN_E 3 65 6 5 0 3 4 5 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 4 5 0 3 4 5 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 5 5 0 3 4 5 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 5 5 0 3 4 5 6 -1 -1 1 0 20
|
|
300 SM_AMIGA_0_ 3 -1 5 3 0 3 5 -1 -1 4 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 3 0 3 5 -1 -1 3 0 21
|
|
307 RN_VMA 3 34 3 3 0 3 5 34 -1 2 1 20
|
|
295 inst_VPA_SYNC 3 -1 2 3 0 3 5 -1 -1 1 0 20
|
|
298 inst_DTACK_INT 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
308 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
303 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 20
|
|
296 CLK_CNT_0_ 3 -1 2 2 2 6 -1 -1 1 0 21
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 9 0 20
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 9 0 20
|
|
297 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
302 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
81 AS_030 1 -1 -1 3 2 3 7 81 -1
|
|
40 VPA 1 -1 -1 3 0 2 5 40 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
62 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 9 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 9 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
299 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
62 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 8 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
299 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
62 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 8 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
297 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
61 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 0 2 29 -1 1 0 21
|
|
80 DSACK_1_ 5 303 7 1 3 80 -1 1 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 5 0 20
|
|
30 LDS_000 5 306 3 0 30 -1 5 0 20
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 2 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 304 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
307 RN_E 3 65 6 4 0 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 4 0 2 3 6 -1 -1 4 0 21
|
|
298 cpu_est_2_ 3 -1 2 4 0 2 3 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 2 4 0 2 3 6 -1 -1 1 0 21
|
|
301 SM_AMIGA_0_ 3 -1 2 3 0 2 3 -1 -1 4 0 20
|
|
302 SM_AMIGA_1_ 3 -1 0 3 0 2 3 -1 -1 3 0 21
|
|
308 RN_VMA 3 34 3 3 0 2 3 34 -1 2 1 20
|
|
304 RN_AS_000 3 32 3 3 2 3 4 32 -1 1 0 20
|
|
296 inst_VPA_SYNC 3 -1 5 3 0 2 3 -1 -1 1 0 20
|
|
297 inst_DTACK_INT 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
300 CLK_CNT_1_ 3 -1 5 2 5 6 -1 -1 1 0 21
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 5 0 20
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 5 0 20
|
|
299 CLK_CNT_0_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
303 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 4 3 4 5 7 81 -1
|
|
85 RST 1 -1 -1 3 0 1 2 85 -1
|
|
40 VPA 1 -1 -1 3 0 2 5 40 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
60 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 0 5 29 -1 1 0 21
|
|
80 DSACK_1_ 5 302 7 1 3 80 -1 1 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 5 0 20
|
|
30 LDS_000 5 305 3 0 30 -1 5 0 20
|
|
65 E 5 306 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 308 6 0 64 -1 2 0 21
|
|
34 VMA 5 307 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 5 303 3 0 32 -1 1 0 20
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
306 RN_E 3 65 6 4 0 3 5 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 20
|
|
297 cpu_est_2_ 3 -1 6 4 0 3 5 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 5 4 0 3 5 6 -1 -1 1 0 20
|
|
300 SM_AMIGA_0_ 3 -1 0 3 0 3 5 -1 -1 4 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 3 0 3 5 -1 -1 3 0 21
|
|
307 RN_VMA 3 34 3 3 0 3 5 34 -1 2 1 20
|
|
295 inst_VPA_SYNC 3 -1 4 3 0 3 5 -1 -1 1 0 21
|
|
296 inst_DTACK_INT 3 -1 5 2 5 7 -1 -1 4 0 21
|
|
308 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
303 RN_AS_000 3 32 3 2 0 3 32 -1 1 0 20
|
|
299 CLK_CNT_1_ 3 -1 2 2 2 6 -1 -1 1 0 21
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 5 0 20
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 5 0 20
|
|
298 CLK_CNT_0_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
302 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
81 AS_030 1 -1 -1 3 3 4 7 81 -1
|
|
40 VPA 1 -1 -1 3 0 4 5 40 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
62 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 9 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
32 AS_000 0 3 0 32 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
298 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
304 SM_AMIGA_1_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
300 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
295 inst_AS_000_INT 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
296 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 2 6 7 60 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
62 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 9 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
297 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
62 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 9 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
297 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
62 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 9 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
297 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 1 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
63 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
297 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
306 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 1 7 -1 -1 2 0 21
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
63 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
297 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
306 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 1 7 -1 -1 2 0 21
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 9 0 21
|
|
65 E 5 321 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 323 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 322 3 0 34 -1 2 1 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
315 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
316 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
321 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
308 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
306 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
323 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
322 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
309 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
305 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
318 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 inst_AS_AMIGA_ENABLE 3 -1 7 1 7 -1 -1 2 0 21
|
|
314 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
310 inst_CLK_000_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
307 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
304 A_27_ 1 -1 -1 1 4 -1 -1
|
|
303 A_28_ 1 -1 -1 1 4 -1 -1
|
|
302 A_29_ 1 -1 -1 1 4 -1 -1
|
|
301 A_30_ 1 -1 -1 1 4 -1 -1
|
|
300 A_20_ 1 -1 -1 1 4 -1 -1
|
|
299 A_21_ 1 -1 -1 1 4 -1 -1
|
|
298 A_22_ 1 -1 -1 1 4 -1 -1
|
|
297 A_31_ 1 -1 -1 1 4 -1 -1
|
|
296 A_23_ 1 -1 -1 1 4 -1 -1
|
|
295 A_24_ 1 -1 -1 1 4 -1 -1
|
|
294 A_25_ 1 -1 -1 1 4 -1 -1
|
|
293 A_26_ 1 -1 -1 1 4 -1 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
297 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
306 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 1 7 -1 -1 2 0 21
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
297 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
306 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 1 7 -1 -1 2 0 21
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
297 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
306 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 1 7 -1 -1 2 0 21
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
297 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
306 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 7 1 7 -1 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
306 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
297 inst_VPA_SYNC 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
306 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
297 inst_VPA_SYNC 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
40 VPA 1 -1 -1 2 3 6 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 2 6 7 60 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 2 6 7 60 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
82 BGACK_030 5 -1 7 2 3 7 82 -1 2 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 2 6 7 60 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 311 3 0 34 -1 2 1 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
310 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
311 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
306 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 311 3 0 34 -1 2 1 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
310 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
311 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
306 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 311 3 0 34 -1 2 1 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
310 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
311 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
306 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 3 7 29 -1 1 0 21
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 309 3 0 31 -1 5 0 21
|
|
65 E 5 312 6 0 65 -1 4 0 21
|
|
32 AS_000 5 308 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 4 1 21
|
|
64 CLK_DIV_OUT 5 314 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 313 3 0 34 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 311 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
312 RN_E 3 65 6 3 3 6 7 65 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
310 RN_LDS_000 3 30 3 2 3 6 30 -1 4 1 21
|
|
314 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
313 RN_VMA 3 34 3 2 3 7 34 -1 2 1 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
298 inst_CLK_000_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
297 inst_VPA_SYNC 3 -1 3 2 3 7 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
306 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
305 UDS_000_0 3 -1 3 1 3 -1 -1 8 1 21
|
|
309 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
308 RN_AS_000 3 32 3 1 3 32 -1 4 0 21
|
|
296 inst_DTACK_INT 3 -1 7 1 7 -1 -1 4 0 20
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
10 CLK_000 9 -1 2 3 6 10 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
85 RST 1 -1 -1 3 1 3 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 3 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 308 3 0 31 -1 13 1 21
|
|
30 LDS_000 5 309 3 0 30 -1 5 1 21
|
|
65 E 5 311 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 3 0 21
|
|
32 AS_000 5 307 3 0 32 -1 3 1 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 312 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 310 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
309 RN_LDS_000 3 30 3 2 3 7 30 -1 5 1 21
|
|
311 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
312 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
298 inst_CLK_000_D 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 3 2 3 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 13 1 21
|
|
305 LDS_000_0 3 -1 7 1 3 -1 -1 7 1 21
|
|
307 RN_AS_000 3 32 3 1 3 32 -1 3 1 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 7 1 7 -1 -1 3 0 21
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 7 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 7 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 7 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 308 3 0 31 -1 13 1 21
|
|
30 LDS_000 5 309 3 0 30 -1 5 1 21
|
|
65 E 5 311 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 3 0 21
|
|
32 AS_000 5 307 3 0 32 -1 3 1 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 312 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 310 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
309 RN_LDS_000 3 30 3 2 3 7 30 -1 5 1 21
|
|
311 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
312 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
298 inst_CLK_000_D 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 3 2 3 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 13 1 21
|
|
305 LDS_000_0 3 -1 7 1 3 -1 -1 7 1 21
|
|
307 RN_AS_000 3 32 3 1 3 32 -1 3 1 21
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 7 1 7 -1 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 7 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 7 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 7 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 308 3 0 31 -1 13 1 21
|
|
30 LDS_000 5 309 3 0 30 -1 5 1 21
|
|
65 E 5 311 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 3 0 21
|
|
32 AS_000 5 307 3 0 32 -1 3 1 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 312 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 310 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
309 RN_LDS_000 3 30 3 2 3 7 30 -1 5 1 21
|
|
311 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
312 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
298 inst_CLK_000_D 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 3 2 3 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 13 1 21
|
|
305 LDS_000_0 3 -1 7 1 3 -1 -1 7 1 21
|
|
307 RN_AS_000 3 32 3 1 3 32 -1 3 1 21
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 7 1 7 -1 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 2 3 6 29 159
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 7 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 7 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 7 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 308 3 0 31 -1 13 1 21
|
|
30 LDS_000 5 309 3 0 30 -1 5 1 21
|
|
65 E 5 311 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 3 0 21
|
|
32 AS_000 5 307 3 0 32 -1 3 1 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 312 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 310 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
309 RN_LDS_000 3 30 3 2 3 7 30 -1 5 1 21
|
|
311 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
296 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
312 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
298 inst_CLK_000_D 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 3 2 3 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 13 1 21
|
|
305 LDS_000_0 3 -1 7 1 3 -1 -1 7 1 21
|
|
307 RN_AS_000 3 32 3 1 3 32 -1 3 1 21
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 7 1 7 -1 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 2 3 6 29 159
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 7 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 7 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 7 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 308 3 0 31 -1 8 0 21
|
|
30 LDS_000 5 309 3 0 30 -1 8 0 21
|
|
65 E 5 311 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 3 0 21
|
|
32 AS_000 5 307 3 0 32 -1 3 1 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 312 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 310 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
304 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
305 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
311 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
297 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
312 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
309 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
307 RN_AS_000 3 32 3 1 3 32 -1 3 1 21
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
303 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
294 N_40_i 3 -1 3 1 3 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 2 3 6 29 159
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
10 CLK_000 9 -1 2 3 6 10 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 308 3 0 31 -1 8 0 21
|
|
30 LDS_000 5 309 3 0 30 -1 8 0 21
|
|
65 E 5 311 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 3 0 21
|
|
32 AS_000 5 307 3 0 32 -1 3 1 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 312 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 310 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_DTACK_INT 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
311 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
307 RN_AS_000 3 32 3 2 3 6 32 -1 3 1 21
|
|
305 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
312 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 3 2 3 7 -1 -1 2 0 20
|
|
298 inst_VPA_SYNC 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
309 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
303 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
294 N_40_i 3 -1 3 1 3 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 303 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 306 3 0 30 -1 14 0 20
|
|
31 UDS_000 5 305 3 0 31 -1 13 0 20
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 20
|
|
32 AS_000 5 304 3 0 32 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 307 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 4 0 3 5 6 65 -1 4 0 21
|
|
301 SM_AMIGA_0_ 3 -1 0 4 0 2 3 5 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 4 0 3 5 6 -1 -1 4 0 21
|
|
302 SM_AMIGA_1_ 3 -1 0 4 0 2 3 5 -1 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 5 4 0 3 5 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 5 4 0 3 5 6 -1 -1 1 0 20
|
|
295 inst_DTACK_INT 3 -1 5 3 2 5 7 -1 -1 4 0 21
|
|
309 RN_VMA 3 34 3 3 0 3 5 34 -1 2 1 20
|
|
297 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 2 3 0 3 5 -1 -1 1 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 RN_AS_000 3 32 3 2 0 3 32 -1 2 1 20
|
|
299 CLK_CNT_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 14 0 20
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 13 0 20
|
|
303 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
300 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
307 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 2 0 5 29 159
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
81 AS_030 1 -1 -1 3 2 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
74 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 0 5 29 -1 1 0 21
|
|
80 DSACK_1_ 5 303 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 306 3 0 30 -1 14 0 20
|
|
31 UDS_000 5 305 3 0 31 -1 13 0 20
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 20
|
|
32 AS_000 5 304 3 0 32 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 307 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_E 3 65 6 4 0 3 5 6 65 -1 4 0 21
|
|
301 SM_AMIGA_0_ 3 -1 0 4 0 2 3 5 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 4 0 3 5 6 -1 -1 4 0 21
|
|
302 SM_AMIGA_1_ 3 -1 0 4 0 2 3 5 -1 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 5 4 0 3 5 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 5 4 0 3 5 6 -1 -1 1 0 20
|
|
295 inst_DTACK_INT 3 -1 5 3 2 5 7 -1 -1 4 0 21
|
|
309 RN_VMA 3 34 3 3 0 3 5 34 -1 2 1 20
|
|
297 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 2 3 0 3 5 -1 -1 1 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 RN_AS_000 3 32 3 2 0 3 32 -1 2 1 20
|
|
299 CLK_CNT_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 14 0 20
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 13 0 20
|
|
303 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
300 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
307 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
81 AS_030 1 -1 -1 3 2 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 14 0 20
|
|
31 UDS_000 5 307 3 0 31 -1 13 0 20
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 311 3 0 34 -1 2 1 20
|
|
32 AS_000 5 306 3 0 32 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
310 RN_E 3 65 6 4 0 3 5 6 65 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 0 4 0 3 5 6 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 5 4 0 3 5 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 6 4 0 3 5 6 -1 -1 1 0 21
|
|
297 inst_DTACK_INT 3 -1 0 3 0 2 7 -1 -1 4 0 21
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 3 0 21
|
|
311 RN_VMA 3 34 3 3 0 3 5 34 -1 2 1 20
|
|
296 SM_AMIGA_LAST_1_ 3 -1 6 3 2 6 7 -1 -1 2 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 6 3 2 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 2 3 0 3 5 -1 -1 1 0 21
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
306 RN_AS_000 3 32 3 2 3 5 32 -1 2 1 20
|
|
302 CLK_CNT_1_ 3 -1 4 2 4 6 -1 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 14 0 20
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 13 0 20
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 2 0 5 29 159
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
81 AS_030 1 -1 -1 4 2 3 6 7 81 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
79 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 309 3 0 31 -1 8 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 8 0 21
|
|
32 AS_000 5 308 3 0 32 -1 5 0 21
|
|
65 E 5 312 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 314 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 313 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 311 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 RN_AS_000 3 32 3 2 3 6 32 -1 5 0 21
|
|
312 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
305 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
297 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
314 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
306 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
302 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
313 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
296 SM_AMIGA_LAST_1_ 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
310 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
309 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
301 N_35_i 3 -1 3 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
80 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 308 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 311 3 0 30 -1 9 1 21
|
|
65 E 5 313 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 315 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 314 3 0 34 -1 2 1 20
|
|
32 AS_000 5 309 3 0 32 -1 2 1 21
|
|
31 UDS_000 5 310 3 0 31 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 312 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
313 RN_E 3 65 6 3 3 6 7 65 -1 4 0 21
|
|
306 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 3 3 6 7 -1 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
302 cpu_est_2_ 3 -1 3 3 3 6 7 -1 -1 3 0 21
|
|
314 RN_VMA 3 34 3 3 3 6 7 34 -1 2 1 20
|
|
298 inst_VPA_SYNC 3 -1 6 3 3 6 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 1 0 21
|
|
297 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
315 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
309 RN_AS_000 3 32 3 2 3 6 32 -1 2 1 21
|
|
305 un1_UDS_000_INT_3_0 3 -1 3 1 3 -1 -1 12 1 21
|
|
311 RN_LDS_000 3 30 3 1 3 30 -1 9 1 21
|
|
300 N_30_0 3 -1 3 1 3 -1 -1 3 0 21
|
|
310 RN_UDS_000 3 31 3 1 3 31 -1 2 0 21
|
|
308 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
312 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
301 inst_CLK_000_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 2 6 7 29 159
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 3 1 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 14 0 20
|
|
31 UDS_000 5 307 3 0 31 -1 13 0 20
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 311 3 0 34 -1 2 1 20
|
|
32 AS_000 5 306 3 0 32 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
310 RN_E 3 65 6 4 0 3 5 6 65 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 0 4 0 3 5 6 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 5 4 0 3 5 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 6 4 0 3 5 6 -1 -1 1 0 21
|
|
297 inst_DTACK_INT 3 -1 0 3 0 2 7 -1 -1 4 0 21
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 3 0 21
|
|
311 RN_VMA 3 34 3 3 0 3 5 34 -1 2 1 20
|
|
296 SM_AMIGA_LAST_1_ 3 -1 6 3 2 6 7 -1 -1 2 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 6 3 2 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 2 3 0 3 5 -1 -1 1 0 21
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
306 RN_AS_000 3 32 3 2 3 5 32 -1 2 1 20
|
|
302 CLK_CNT_1_ 3 -1 4 2 4 6 -1 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 14 0 20
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 13 0 20
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 2 0 5 29 159
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
81 AS_030 1 -1 -1 4 2 3 6 7 81 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 14 0 20
|
|
31 UDS_000 5 307 3 0 31 -1 13 0 20
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 311 3 0 34 -1 2 1 20
|
|
32 AS_000 5 306 3 0 32 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
310 RN_E 3 65 6 4 0 3 5 6 65 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 0 4 0 3 5 6 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 5 4 0 3 5 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 6 4 0 3 5 6 -1 -1 1 0 21
|
|
297 inst_DTACK_INT 3 -1 0 3 0 2 7 -1 -1 4 0 21
|
|
311 RN_VMA 3 34 3 3 0 3 5 34 -1 2 1 20
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 2 3 0 3 5 -1 -1 1 0 21
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
306 RN_AS_000 3 32 3 2 3 5 32 -1 2 1 20
|
|
302 CLK_CNT_1_ 3 -1 4 2 4 6 -1 -1 2 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 6 2 2 6 -1 -1 2 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 6 2 2 6 -1 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 14 0 20
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 13 0 20
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 2 0 5 29 159
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
81 AS_030 1 -1 -1 4 2 3 6 7 81 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 308 3 0 31 -1 13 1 21
|
|
30 LDS_000 5 309 3 0 30 -1 5 1 21
|
|
65 E 5 311 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 312 3 0 34 -1 2 1 20
|
|
32 AS_000 5 307 3 0 32 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 310 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
309 RN_LDS_000 3 30 3 2 3 6 30 -1 5 1 21
|
|
311 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
297 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
312 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
307 RN_AS_000 3 32 3 2 3 6 32 -1 2 1 21
|
|
298 inst_VPA_SYNC 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 13 1 21
|
|
305 LDS_000_0 3 -1 6 1 3 -1 -1 7 1 21
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
310 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 2 3 6 29 159
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
10 CLK_000 9 -1 2 3 6 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
79 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 309 3 0 31 -1 8 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 8 0 21
|
|
65 E 5 312 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 314 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 313 3 0 34 -1 2 1 20
|
|
32 AS_000 5 308 3 0 32 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 311 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
312 RN_E 3 65 6 3 3 6 7 65 -1 4 0 21
|
|
305 SM_AMIGA_0_ 3 -1 7 3 3 6 7 -1 -1 4 0 20
|
|
295 cpu_est_1_ 3 -1 3 3 3 6 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
302 cpu_est_2_ 3 -1 3 3 3 6 7 -1 -1 3 0 21
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
294 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 1 0 21
|
|
298 inst_DTACK_INT 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
314 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
313 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
308 RN_AS_000 3 32 3 2 3 7 32 -1 2 1 21
|
|
301 inst_CLK_000_D 3 -1 3 2 3 7 -1 -1 1 0 21
|
|
299 inst_VPA_SYNC 3 -1 3 2 3 7 -1 -1 1 0 20
|
|
310 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
309 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
297 SM_AMIGA_LAST_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
296 SM_AMIGA_LAST_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
293 N_40_i 3 -1 7 1 3 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 7 29 159
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 7 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 3 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 14 0 20
|
|
31 UDS_000 5 307 3 0 31 -1 13 0 20
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 311 3 0 34 -1 2 1 20
|
|
32 AS_000 5 306 3 0 32 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
310 RN_E 3 65 6 4 0 3 5 6 65 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 0 4 0 3 5 6 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 5 4 0 3 5 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 6 4 0 3 5 6 -1 -1 1 0 21
|
|
297 inst_DTACK_INT 3 -1 0 3 0 2 7 -1 -1 4 0 21
|
|
311 RN_VMA 3 34 3 3 0 3 5 34 -1 2 1 20
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 2 3 0 3 5 -1 -1 1 0 21
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
306 RN_AS_000 3 32 3 2 3 5 32 -1 2 1 20
|
|
302 CLK_CNT_1_ 3 -1 4 2 4 6 -1 -1 2 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 6 2 2 6 -1 -1 2 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 6 2 2 6 -1 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 14 0 20
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 13 0 20
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 2 0 5 29 159
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
81 AS_030 1 -1 -1 4 2 3 6 7 81 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
80 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 308 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 310 3 0 31 -1 8 0 21
|
|
30 LDS_000 5 311 3 0 30 -1 8 0 21
|
|
65 E 5 313 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 315 6 0 64 -1 3 0 21
|
|
32 AS_000 5 309 3 0 32 -1 3 1 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 314 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 312 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
306 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
313 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
298 inst_DTACK_INT 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
315 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
314 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
311 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
310 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
309 RN_AS_000 3 32 3 1 3 32 -1 3 1 21
|
|
308 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
305 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
312 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
300 N_37_i 3 -1 3 1 3 -1 -1 1 0 21
|
|
297 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 2 3 6 29 159
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
80 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 308 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 310 3 0 31 -1 10 0 21
|
|
65 E 5 313 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 311 3 0 30 -1 4 1 21
|
|
64 CLK_DIV_OUT 5 315 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 314 3 0 34 -1 2 1 21
|
|
32 AS_000 5 309 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 312 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
313 RN_E 3 65 6 3 3 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
301 cpu_est_2_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
304 inst_AS_AMIGA_ENABLE 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
293 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
311 RN_LDS_000 3 30 3 2 3 6 30 -1 4 1 21
|
|
305 SM_AMIGA_0_ 3 -1 3 2 3 7 -1 -1 4 0 20
|
|
298 inst_DTACK_INT 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
315 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
306 SM_AMIGA_1_ 3 -1 3 2 3 7 -1 -1 3 0 20
|
|
314 RN_VMA 3 34 3 2 3 7 34 -1 2 1 21
|
|
300 inst_CLK_000_D 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 2 3 7 -1 -1 1 0 20
|
|
297 inst_AS_000_INT_D 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
310 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
307 LDS_000_0 3 -1 6 1 3 -1 -1 8 1 21
|
|
309 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
308 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
303 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 2 3 7 29 159
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
10 CLK_000 9 -1 2 3 6 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 3 1 3 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 2 3 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 2 3 6 69 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 10 0 20
|
|
31 UDS_000 5 307 3 0 31 -1 8 0 20
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 311 3 0 34 -1 2 1 20
|
|
32 AS_000 5 306 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
310 RN_E 3 65 6 4 0 3 5 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 20
|
|
299 cpu_est_2_ 3 -1 0 4 0 3 5 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 6 4 0 3 5 6 -1 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 5 3 0 3 5 -1 -1 4 0 21
|
|
297 inst_DTACK_INT 3 -1 0 3 0 2 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_1_ 3 -1 0 3 0 3 5 -1 -1 3 0 21
|
|
311 RN_VMA 3 34 3 3 0 3 5 34 -1 2 1 20
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 2 3 0 3 5 -1 -1 1 0 21
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
306 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 20
|
|
300 CLK_CNT_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 5 2 2 3 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 5 2 2 3 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 10 0 20
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 8 0 20
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 2 0 5 29 159
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
81 AS_030 1 -1 -1 3 2 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
79 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 7 0 20
|
|
65 E 5 312 6 0 65 -1 4 0 21
|
|
32 AS_000 5 308 3 0 32 -1 4 0 20
|
|
31 UDS_000 5 309 3 0 31 -1 4 1 20
|
|
64 CLK_DIV_OUT 5 314 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 313 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 311 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 4 5 0 3 4 5 6 -1 -1 1 0 21
|
|
312 RN_E 3 65 6 4 0 3 5 6 65 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 0 4 0 2 3 4 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 21
|
|
305 SM_AMIGA_1_ 3 -1 0 4 0 2 3 5 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 5 4 0 3 5 6 -1 -1 3 0 21
|
|
308 RN_AS_000 3 32 3 3 0 2 3 32 -1 4 0 20
|
|
297 inst_DTACK_INT 3 -1 0 3 0 2 7 -1 -1 4 0 21
|
|
303 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
309 RN_UDS_000 3 31 3 2 2 3 31 -1 4 1 20
|
|
314 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
313 RN_VMA 3 34 3 2 0 3 34 -1 2 1 20
|
|
298 inst_VPA_SYNC 3 -1 5 2 0 3 -1 -1 1 0 20
|
|
296 SM_AMIGA_LAST_1_ 3 -1 5 2 2 3 -1 -1 1 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 4 2 2 3 -1 -1 1 0 21
|
|
306 UDS_000_0 3 -1 2 1 3 -1 -1 10 0 21
|
|
310 RN_LDS_000 3 30 3 1 3 30 -1 7 0 20
|
|
302 un1_as_000_int2_0 3 -1 2 1 3 -1 -1 7 1 21
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 0 29 159
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
70 RW 1 -1 -1 3 2 3 4 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 0 1 85 -1
|
|
68 A_0_ 1 -1 -1 2 2 3 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 5 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
80 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 308 7 1 3 80 -1 2 0 21
|
|
32 AS_000 5 309 3 0 32 -1 5 0 20
|
|
31 UDS_000 5 310 3 0 31 -1 5 0 20
|
|
30 LDS_000 5 311 3 0 30 -1 5 0 20
|
|
65 E 5 313 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 315 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 314 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 312 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 4 5 0 3 4 5 6 -1 -1 1 0 21
|
|
313 RN_E 3 65 6 4 0 3 5 6 65 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 0 4 0 3 4 5 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 0 4 0 3 5 6 -1 -1 4 0 20
|
|
300 cpu_est_2_ 3 -1 6 4 0 3 5 6 -1 -1 3 0 21
|
|
309 RN_AS_000 3 32 3 3 0 2 3 32 -1 5 0 20
|
|
297 inst_DTACK_INT 3 -1 0 3 0 2 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_1_ 3 -1 5 3 0 3 5 -1 -1 3 0 20
|
|
314 RN_VMA 3 34 3 3 0 3 5 34 -1 2 1 20
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 3 0 3 5 -1 -1 1 0 20
|
|
311 RN_LDS_000 3 30 3 2 2 3 30 -1 5 0 20
|
|
310 RN_UDS_000 3 31 3 2 2 3 31 -1 5 0 20
|
|
315 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
302 CLK_CNT_1_ 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
305 N_35 3 -1 2 2 2 3 -1 -1 1 0 21
|
|
301 CLK_CNT_0_ 3 -1 5 2 5 6 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 5 2 2 3 -1 -1 1 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 4 2 2 3 -1 -1 1 0 21
|
|
307 LDS_000_0 3 -1 2 1 3 -1 -1 10 0 21
|
|
306 UDS_000_0 3 -1 2 1 3 -1 -1 10 0 21
|
|
308 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 2 0 5 29 159
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
81 AS_030 1 -1 -1 4 2 3 6 7 81 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
70 RW 1 -1 -1 3 2 3 4 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 2 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 2 69 -1
|
|
68 A_0_ 1 -1 -1 1 2 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 20
|
|
31 UDS_000 5 307 3 0 31 -1 7 1 20
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 311 3 0 34 -1 2 1 20
|
|
32 AS_000 5 306 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
310 RN_E 3 65 6 4 0 3 5 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 0 4 0 3 5 6 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 0 4 0 3 5 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 5 4 0 3 5 6 -1 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 5 3 0 3 5 -1 -1 4 0 21
|
|
297 inst_DTACK_INT 3 -1 0 3 0 2 7 -1 -1 4 0 21
|
|
311 RN_VMA 3 34 3 3 0 3 5 34 -1 2 1 20
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 2 3 0 3 5 -1 -1 1 0 21
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
306 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 20
|
|
300 CLK_CNT_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 6 2 2 3 -1 -1 1 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 5 2 2 3 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 20
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 7 1 20
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 2 0 5 29 159
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
81 AS_030 1 -1 -1 3 2 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 20
|
|
31 UDS_000 5 307 3 0 31 -1 8 1 20
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 311 3 0 34 -1 2 1 20
|
|
32 AS_000 5 306 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
310 RN_E 3 65 6 4 0 3 5 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 0 4 0 3 5 6 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 0 4 0 3 5 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 5 4 0 3 5 6 -1 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 5 3 0 3 5 -1 -1 4 0 21
|
|
297 inst_DTACK_INT 3 -1 0 3 0 2 7 -1 -1 4 0 21
|
|
311 RN_VMA 3 34 3 3 0 3 5 34 -1 2 1 20
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 2 3 0 3 5 -1 -1 1 0 21
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
306 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 20
|
|
300 CLK_CNT_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 20
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 8 1 20
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
296 SM_AMIGA_LAST_1_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 5 1 2 -1 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 2 0 5 29 159
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
81 AS_030 1 -1 -1 3 2 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 309 3 0 30 -1 13 0 20
|
|
31 UDS_000 5 308 3 0 31 -1 8 1 20
|
|
65 E 5 311 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 312 3 0 34 -1 2 1 20
|
|
32 AS_000 5 307 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 310 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
311 RN_E 3 65 6 4 0 3 5 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 20
|
|
300 cpu_est_2_ 3 -1 5 4 0 3 5 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 6 4 0 3 5 6 -1 -1 1 0 21
|
|
304 SM_AMIGA_0_ 3 -1 0 3 0 3 5 -1 -1 4 0 21
|
|
297 inst_DTACK_INT 3 -1 5 3 2 5 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_1_ 3 -1 5 3 0 3 5 -1 -1 3 0 21
|
|
312 RN_VMA 3 34 3 3 0 3 5 34 -1 2 1 20
|
|
303 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 2 3 0 3 5 -1 -1 1 0 21
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
307 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 20
|
|
301 CLK_CNT_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
298 inst_DTACK_SYNC_D 3 -1 4 2 0 5 -1 -1 1 0 21
|
|
309 RN_LDS_000 3 30 3 1 3 30 -1 13 0 20
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 8 1 20
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
296 SM_AMIGA_LAST_1_ 3 -1 0 1 2 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 0 1 2 -1 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 1 4 29 159
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
81 AS_030 1 -1 -1 3 2 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
79 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 13 0 20
|
|
31 UDS_000 5 309 3 0 31 -1 8 1 20
|
|
65 E 5 312 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 314 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 313 3 0 34 -1 2 1 20
|
|
32 AS_000 5 308 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 311 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 4 5 0 3 4 5 6 -1 -1 1 0 21
|
|
312 RN_E 3 65 6 4 0 3 5 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 20
|
|
301 cpu_est_2_ 3 -1 5 4 0 3 5 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_0_ 3 -1 5 3 0 3 5 -1 -1 4 0 21
|
|
297 inst_DTACK_INT 3 -1 0 3 0 2 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_1_ 3 -1 0 3 0 3 5 -1 -1 3 0 21
|
|
313 RN_VMA 3 34 3 3 0 3 5 34 -1 2 1 20
|
|
304 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 2 3 0 3 5 -1 -1 1 0 21
|
|
314 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
308 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 20
|
|
298 inst_DTACK_SYNC_DD 3 -1 4 2 0 5 -1 -1 1 0 21
|
|
310 RN_LDS_000 3 30 3 1 3 30 -1 13 0 20
|
|
309 RN_UDS_000 3 31 3 1 3 31 -1 8 1 20
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
303 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_DTACK_SYNC_D 3 -1 6 1 4 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 0 1 2 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 5 1 2 -1 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
81 AS_030 1 -1 -1 3 2 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
79 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 13 0 20
|
|
31 UDS_000 5 309 3 0 31 -1 8 1 20
|
|
65 E 5 313 6 0 65 -1 4 0 21
|
|
9 CLK_EXP 5 312 1 0 9 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 314 3 0 34 -1 2 1 20
|
|
32 AS_000 5 308 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 311 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
313 RN_E 3 65 6 4 0 3 5 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 20
|
|
306 SM_AMIGA_1_ 3 -1 0 4 0 3 4 5 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 5 4 0 3 5 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 5 4 0 3 5 6 -1 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 0 3 0 3 5 -1 -1 4 0 21
|
|
297 inst_DTACK_INT 3 -1 5 3 2 5 7 -1 -1 4 0 21
|
|
314 RN_VMA 3 34 3 3 0 3 5 34 -1 2 1 20
|
|
304 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 2 3 0 3 5 -1 -1 1 0 21
|
|
308 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 20
|
|
303 CLK_CNT_1_ 3 -1 4 2 1 4 -1 -1 2 0 21
|
|
302 CLK_CNT_0_ 3 -1 4 2 1 4 -1 -1 1 0 21
|
|
298 inst_DTACK_SYNC_DD 3 -1 6 2 0 5 -1 -1 1 0 21
|
|
310 RN_LDS_000 3 30 3 1 3 30 -1 13 0 20
|
|
309 RN_UDS_000 3 31 3 1 3 31 -1 8 1 20
|
|
312 RN_CLK_EXP 3 9 1 1 1 9 -1 3 0 21
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
311 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_DTACK_SYNC_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 0 1 2 -1 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
10 CLK_000 9 -1 1 6 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 3 0 1 5 85 -1
|
|
81 AS_030 1 -1 -1 3 2 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 13 0 20
|
|
31 UDS_000 5 309 3 0 31 -1 8 1 20
|
|
65 E 5 313 6 0 65 -1 4 0 21
|
|
9 CLK_EXP 5 312 1 0 9 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 308 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 311 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
306 SM_AMIGA_1_ 3 -1 5 5 0 2 3 5 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_0_ 3 -1 0 4 0 3 5 6 -1 -1 4 0 21
|
|
299 inst_VMA_INT 3 -1 5 4 0 3 5 6 -1 -1 2 1 20
|
|
313 RN_E 3 65 6 3 0 5 6 65 -1 4 0 21
|
|
297 inst_DTACK_INT 3 -1 6 3 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 0 5 6 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 5 3 0 5 6 -1 -1 3 0 21
|
|
308 RN_AS_000 3 32 3 3 0 3 5 32 -1 2 0 20
|
|
304 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 2 3 0 5 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 0 3 0 5 6 -1 -1 1 0 20
|
|
303 CLK_CNT_1_ 3 -1 4 2 1 4 -1 -1 2 0 21
|
|
302 CLK_CNT_0_ 3 -1 4 2 1 4 -1 -1 1 0 21
|
|
310 RN_LDS_000 3 30 3 1 3 30 -1 13 0 20
|
|
309 RN_UDS_000 3 31 3 1 3 31 -1 8 1 20
|
|
312 RN_CLK_EXP 3 9 1 1 1 9 -1 3 0 21
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
311 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 2 1 2 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 0 1 2 -1 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 3 0 5 6 29 159
|
|
10 CLK_000 9 -1 1 6 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 4 0 1 5 6 85 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 13 0 20
|
|
31 UDS_000 5 309 3 0 31 -1 8 1 20
|
|
65 E 5 312 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 308 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 311 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
312 RN_E 3 65 6 4 0 2 5 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 2 4 0 2 5 6 -1 -1 4 0 20
|
|
300 cpu_est_2_ 3 -1 5 4 0 2 5 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 0 4 0 2 5 6 -1 -1 1 0 21
|
|
305 SM_AMIGA_0_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
297 inst_DTACK_INT 3 -1 5 3 2 5 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_1_ 3 -1 5 3 2 3 5 -1 -1 3 0 21
|
|
308 RN_AS_000 3 32 3 3 0 3 5 32 -1 2 0 20
|
|
304 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
299 inst_VMA_INT 3 -1 0 3 0 3 5 -1 -1 2 1 20
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
303 CLK_CNT_1_ 3 -1 4 2 4 6 -1 -1 2 0 21
|
|
302 CLK_CNT_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 2 0 5 -1 -1 1 0 20
|
|
310 RN_LDS_000 3 30 3 1 3 30 -1 13 0 20
|
|
309 RN_UDS_000 3 31 3 1 3 31 -1 8 1 20
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
311 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 0 1 3 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 2 1 2 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 5 29 159
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 5 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 309 3 0 30 -1 13 0 20
|
|
31 UDS_000 5 308 3 0 31 -1 8 1 20
|
|
65 E 5 311 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 307 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 310 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
298 inst_VMA_INT 3 -1 0 4 0 3 5 6 -1 -1 2 1 21
|
|
311 RN_E 3 65 6 3 0 5 6 65 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 5 3 2 3 5 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 3 0 5 6 -1 -1 4 0 20
|
|
299 cpu_est_2_ 3 -1 0 3 0 5 6 -1 -1 3 0 20
|
|
307 RN_AS_000 3 32 3 3 0 3 5 32 -1 2 0 20
|
|
303 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
293 cpu_est_0_ 3 -1 6 3 0 5 6 -1 -1 1 0 21
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
305 SM_AMIGA_1_ 3 -1 5 2 3 5 -1 -1 3 0 21
|
|
302 CLK_CNT_1_ 3 -1 4 2 4 6 -1 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
297 inst_VPA_SYNC 3 -1 2 2 0 5 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 5 2 2 7 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 2 2 2 7 -1 -1 1 0 20
|
|
309 RN_LDS_000 3 30 3 1 3 30 -1 13 0 20
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 8 1 20
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 5 29 159
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
81 AS_030 1 -1 -1 4 0 2 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 5 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 309 3 0 30 -1 10 0 20
|
|
31 UDS_000 5 308 3 0 31 -1 8 0 20
|
|
65 E 5 311 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 307 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 310 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
304 SM_AMIGA_0_ 3 -1 5 4 2 3 5 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_1_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21
|
|
298 inst_VMA_INT 3 -1 0 4 0 3 5 6 -1 -1 2 1 21
|
|
311 RN_E 3 65 6 3 0 5 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 3 0 5 6 -1 -1 4 0 20
|
|
303 inst_AS_AMIGA_ENABLE 3 -1 2 3 2 3 7 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 0 3 0 5 6 -1 -1 3 0 20
|
|
307 RN_AS_000 3 32 3 3 0 3 5 32 -1 2 0 20
|
|
293 cpu_est_0_ 3 -1 6 3 0 5 6 -1 -1 1 0 21
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
302 CLK_CNT_1_ 3 -1 4 2 4 6 -1 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
297 inst_VPA_SYNC 3 -1 2 2 0 5 -1 -1 1 0 21
|
|
309 RN_LDS_000 3 30 3 1 3 30 -1 10 0 20
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 8 0 20
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 2 1 2 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 5 1 2 -1 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 1 5 29 159
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
81 AS_030 1 -1 -1 4 0 2 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 5 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 309 3 0 31 -1 8 0 21
|
|
65 E 5 312 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 308 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 311 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
305 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
306 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
308 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
299 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
310 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
309 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
312 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
303 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
297 inst_AS_000_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
80 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 309 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 311 3 0 31 -1 10 0 21
|
|
65 E 5 314 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 312 3 0 30 -1 4 1 21
|
|
64 CLK_DIV_OUT 5 315 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 310 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 313 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
306 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
315 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
305 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
310 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
299 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
311 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
308 LDS_000_0 3 -1 3 1 3 -1 -1 8 1 21
|
|
314 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
312 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
309 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
313 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
297 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 3 3 6 7 63 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 309 3 0 31 -1 9 0 21
|
|
65 E 5 312 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 308 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 311 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
305 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
306 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
308 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
299 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
310 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
309 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
312 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
303 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
297 inst_AS_000_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 309 3 0 31 -1 9 0 21
|
|
65 E 5 312 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 308 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 311 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
305 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
306 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
308 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
299 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
310 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
309 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
312 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
304 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
297 inst_AS_000_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
80 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 309 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 311 3 0 31 -1 10 0 21
|
|
65 E 5 314 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 312 3 0 30 -1 4 1 21
|
|
64 CLK_DIV_OUT 5 315 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 310 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 313 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
306 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
303 inst_AS_AMIGA_ENABLE 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
315 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
310 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
299 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
305 CLK_CNT_1_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
296 SM_AMIGA_LAST_1_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
311 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
308 LDS_000_0 3 -1 3 1 3 -1 -1 8 1 21
|
|
314 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
312 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
309 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
313 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
297 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 309 3 0 31 -1 9 0 21
|
|
65 E 5 312 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 308 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 311 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
305 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
306 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
299 inst_VMA_INT 3 -1 6 3 3 6 7 -1 -1 2 1 20
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
308 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
296 SM_AMIGA_LAST_1_ 3 -1 3 2 3 7 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 7 2 3 7 -1 -1 1 0 20
|
|
310 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
309 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
312 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
304 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
301 inst_VMA_INT_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
297 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
80 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 309 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 311 3 0 31 -1 10 0 21
|
|
65 E 5 314 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 312 3 0 30 -1 4 1 21
|
|
64 CLK_DIV_OUT 5 315 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 310 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 313 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
306 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
303 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
315 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
310 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
299 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
293 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
311 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
308 LDS_000_0 3 -1 3 1 3 -1 -1 8 1 21
|
|
314 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
312 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
309 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
313 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
305 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
297 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
296 SM_AMIGA_LAST_1_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 3 1 7 -1 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
10 CLK_000 9 -1 2 3 6 10 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
81 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 310 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 312 3 0 31 -1 10 0 21
|
|
65 E 5 315 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 313 3 0 30 -1 4 1 21
|
|
64 CLK_DIV_OUT 5 316 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 311 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 314 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
307 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
299 inst_VMA_INT 3 -1 6 3 3 6 7 -1 -1 2 1 20
|
|
304 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
316 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
311 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
312 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
309 LDS_000_0 3 -1 3 1 3 -1 -1 8 1 21
|
|
315 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
313 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
310 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
305 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
303 as_amiga_un2_as_030_n 3 -1 7 1 3 -1 -1 2 0 21
|
|
314 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
306 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
297 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
296 SM_AMIGA_LAST_1_ 3 -1 3 1 7 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
10 CLK_000 9 -1 2 3 6 10 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
80 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 309 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 312 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 311 3 0 31 -1 9 1 21
|
|
65 E 5 314 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 315 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 310 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 313 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 inst_AS_AMIGA_ENABLE 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
315 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
310 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
299 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
312 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
311 RN_UDS_000 3 31 3 1 3 31 -1 9 1 21
|
|
314 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
309 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
313 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
308 as_amiga_un10_as_030_4_n 3 -1 6 1 3 -1 -1 1 0 21
|
|
305 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
297 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
296 SM_AMIGA_LAST_1_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
60 CLK_OSZI 9 -1 2 6 7 60 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
80 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 309 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 312 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 311 3 0 31 -1 9 1 21
|
|
65 E 5 314 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 315 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 310 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 313 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
306 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
310 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
315 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
298 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
312 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
311 RN_UDS_000 3 31 3 1 3 31 -1 9 1 21
|
|
314 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
309 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
313 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
308 as_amiga_un10_as_030_4_n 3 -1 3 1 3 -1 -1 1 0 21
|
|
305 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 SM_AMIGA_LAST_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
299 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
297 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
296 inst_AS_000_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
60 CLK_OSZI 9 -1 2 6 7 60 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 309 3 0 31 -1 10 0 21
|
|
65 E 5 312 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 4 1 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 308 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 311 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
304 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
305 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
308 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
309 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
306 LDS_000_0 3 -1 3 1 3 -1 -1 8 1 21
|
|
312 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
310 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
303 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
296 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
310 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
310 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 10 0 20
|
|
31 UDS_000 5 306 3 0 31 -1 8 0 20
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 305 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 5 4 0 3 5 7 -1 -1 4 0 21
|
|
303 SM_AMIGA_1_ 3 -1 5 4 0 3 5 7 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 2 4 2 3 5 6 -1 -1 2 1 20
|
|
293 cpu_est_0_ 3 -1 4 4 2 4 5 6 -1 -1 1 0 21
|
|
309 RN_E 3 65 6 3 2 5 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 5 3 2 5 6 -1 -1 4 0 20
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 0 3 0 3 7 -1 -1 3 0 21
|
|
297 cpu_est_2_ 3 -1 2 3 2 5 6 -1 -1 3 0 21
|
|
305 RN_AS_000 3 32 3 3 2 3 5 32 -1 2 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 2 2 6 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 0 2 2 5 -1 -1 1 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 10 0 20
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 8 0 20
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
301 CLK_CNT_1_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
298 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 5 29 159
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 9 -1 0 10 -1
|
|
81 AS_030 1 -1 -1 4 0 2 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 5 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
40 VPA 1 -1 -1 2 0 5 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 8 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
309 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 303 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 306 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 9 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
32 AS_000 5 304 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 307 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
301 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
302 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
297 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
304 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
298 inst_AS_AMIGA_ENABLE 3 -1 3 1 3 -1 -1 3 0 21
|
|
303 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
307 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 303 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 306 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 9 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
32 AS_000 5 304 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 307 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
301 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
302 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
298 inst_AS_AMIGA_ENABLE 3 -1 3 2 3 7 -1 -1 3 0 21
|
|
297 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
304 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
303 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
307 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
40 VPA 1 -1 -1 2 6 7 40 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
310 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 303 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 306 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 9 0 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
32 AS_000 5 304 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 307 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
301 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
302 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
298 inst_AS_AMIGA_ENABLE 3 -1 3 2 3 7 -1 -1 3 0 21
|
|
297 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
304 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
299 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
300 CLK_CNT_1_ 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
303 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
307 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
310 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
310 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
298 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
310 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
295 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
296 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
74 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 302 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 305 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 9 0 21
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 20
|
|
32 AS_000 5 303 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 306 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
301 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
307 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
297 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
308 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
303 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
302 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
306 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 2 3 6 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 7 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 7 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
32 AS_000 5 306 3 0 32 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 311 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
310 RN_E 3 65 6 3 3 6 7 65 -1 4 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 3 3 3 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
295 cpu_est_2_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
311 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
300 SM_AMIGA_LAST_1_ 3 -1 3 2 3 7 -1 -1 1 0 20
|
|
299 SM_AMIGA_LAST_0_ 3 -1 7 2 3 7 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 7 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
304 as_amiga_un8_as_030_n 3 -1 6 1 3 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 2 3 6 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
10 CLK_000 9 -1 2 3 6 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 6 7 29 -1 1 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 3 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 20
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
309 RN_E 3 65 6 3 3 6 7 65 -1 4 0 21
|
|
300 SM_AMIGA_0_ 3 -1 7 3 3 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
301 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 3 3 3 6 7 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 3 3 6 7 -1 -1 3 0 21
|
|
310 RN_VMA 3 34 3 3 3 6 7 34 -1 2 1 20
|
|
293 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
307 RN_LDS_000 3 30 3 2 3 6 30 -1 3 0 21
|
|
305 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
296 inst_AS_000_INT_D 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
303 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
302 UDS_000_0 3 -1 3 1 3 -1 -1 8 1 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 3 3 6 7 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 6 7 40 162
|
|
10 CLK_000 9 -1 2 3 6 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 3 1 6 7 85 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
97 DS_030 1 -1 -1 2 3 7 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 6 81 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 6 7 29 -1 1 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 3 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 20
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
309 RN_E 3 65 6 3 3 6 7 65 -1 4 0 21
|
|
300 SM_AMIGA_0_ 3 -1 7 3 3 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
301 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 3 3 3 6 7 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 3 3 6 7 -1 -1 3 0 21
|
|
310 RN_VMA 3 34 3 3 3 6 7 34 -1 2 1 20
|
|
293 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
307 RN_LDS_000 3 30 3 2 3 6 30 -1 3 0 21
|
|
305 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
296 inst_AS_000_INT_D 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
303 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
302 UDS_000_0 3 -1 3 1 3 -1 -1 8 1 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 3 3 6 7 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 6 7 40 162
|
|
10 CLK_000 9 -1 2 3 6 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 3 1 6 7 85 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
97 DS_030 1 -1 -1 2 3 7 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 6 81 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 302 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 305 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 8 1 21
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 20
|
|
32 AS_000 5 303 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 306 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
301 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
307 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
308 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
303 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 8 1 21
|
|
302 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
306 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 2 3 6 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
97 DS_030 1 -1 -1 2 3 7 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
81 AS_030 1 -1 -1 1 3 81 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 8 1 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 311 3 0 34 -1 2 1 20
|
|
32 AS_000 5 306 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
310 RN_E 3 65 6 3 3 6 7 65 -1 4 0 21
|
|
302 SM_AMIGA_0_ 3 -1 7 3 3 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
303 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
306 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 20
|
|
293 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
308 RN_LDS_000 3 30 3 2 3 6 30 -1 3 0 21
|
|
311 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
300 SM_AMIGA_LAST_1_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
299 SM_AMIGA_LAST_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
296 inst_AS_000_INT_D 3 -1 6 2 3 6 -1 -1 1 0 20
|
|
304 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 8 1 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 2 3 7 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 7 40 162
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
10 CLK_000 9 -1 2 3 6 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
97 DS_030 1 -1 -1 2 3 7 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 7 85 -1
|
|
81 AS_030 1 -1 -1 2 3 6 81 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 8 1 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 311 3 0 34 -1 2 1 20
|
|
32 AS_000 5 306 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
310 RN_E 3 65 6 3 3 6 7 65 -1 4 0 21
|
|
302 SM_AMIGA_0_ 3 -1 7 3 3 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
295 cpu_est_2_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
306 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 20
|
|
300 SM_AMIGA_LAST_1_ 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
299 SM_AMIGA_LAST_0_ 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
308 RN_LDS_000 3 30 3 2 3 6 30 -1 3 0 21
|
|
311 RN_VMA 3 34 3 2 3 7 34 -1 2 1 20
|
|
296 inst_AS_000_INT_D 3 -1 6 2 3 6 -1 -1 1 0 20
|
|
304 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 8 1 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 2 3 7 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 7 40 162
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
10 CLK_000 9 -1 2 3 6 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
97 DS_030 1 -1 -1 3 3 6 7 97 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 7 85 -1
|
|
81 AS_030 1 -1 -1 2 3 6 81 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 302 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 305 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 10 0 21
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 20
|
|
32 AS_000 5 303 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 306 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
301 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
307 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
308 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
303 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
302 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
306 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 2 3 6 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
97 DS_030 1 -1 -1 2 3 7 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
81 AS_030 1 -1 -1 1 3 81 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 302 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 305 3 0 30 -1 8 0 21
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 20
|
|
32 AS_000 5 303 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 306 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
301 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
307 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
308 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
303 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
302 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
306 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 2 3 6 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
81 AS_030 1 -1 -1 1 3 81 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 8 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 20
|
|
32 AS_000 5 305 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 1 0 21
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 20
|
|
298 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
301 SM_AMIGA_LAST_1_ 3 -1 3 1 7 -1 -1 1 0 20
|
|
297 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
296 SM_AMIGA_LAST_0_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 2 3 6 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 6 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 8 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 20
|
|
32 AS_000 5 305 3 0 32 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
305 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 20
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
301 SM_AMIGA_LAST_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
297 inst_AS_000_INT_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
296 SM_AMIGA_LAST_0_ 3 -1 3 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 2 3 6 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
97 DS_030 1 -1 -1 2 3 7 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 10 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
32 AS_000 5 305 3 0 32 -1 3 0 20
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
305 RN_AS_000 3 32 3 3 3 6 7 32 -1 3 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
301 SM_AMIGA_LAST_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
297 inst_AS_000_INT_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
296 SM_AMIGA_LAST_0_ 3 -1 3 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 2 3 6 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
97 DS_030 1 -1 -1 2 3 7 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 6 1 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
32 AS_000 5 305 3 0 32 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
305 RN_AS_000 3 32 3 3 3 6 7 32 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 6 1 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
301 SM_AMIGA_LAST_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
297 inst_AS_000_INT_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
296 SM_AMIGA_LAST_0_ 3 -1 3 1 7 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 2 3 6 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
97 DS_030 1 -1 -1 2 3 7 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 303 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 306 3 0 30 -1 7 1 21
|
|
31 UDS_000 5 305 3 0 31 -1 6 1 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
32 AS_000 5 304 3 0 32 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 307 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
301 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
302 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 RN_AS_000 3 32 3 2 3 6 32 -1 3 0 21
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 7 1 21
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 6 1 21
|
|
303 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
307 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 SM_AMIGA_LAST_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_0_ 3 -1 3 1 7 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 2 3 6 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
97 DS_030 1 -1 -1 2 3 7 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
81 AS_030 1 -1 -1 1 3 81 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 302 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 9 0 21
|
|
30 LDS_000 5 305 3 0 30 -1 8 1 21
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
|
|
32 AS_000 5 303 3 0 32 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 306 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
301 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
307 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
303 RN_AS_000 3 32 3 2 3 6 32 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
308 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
297 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 8 1 21
|
|
302 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
306 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
299 SM_AMIGA_LAST_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
296 SM_AMIGA_LAST_0_ 3 -1 3 1 7 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 2 3 6 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 6 7 60 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 302 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 304 3 0 31 -1 9 0 21
|
|
30 LDS_000 5 305 3 0 30 -1 8 1 21
|
|
65 E 5 307 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 309 6 0 64 -1 3 0 21
|
|
32 AS_000 5 303 3 0 32 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 308 3 0 34 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 306 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
301 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
307 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
309 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
303 RN_AS_000 3 32 3 2 3 6 32 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
308 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
297 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
304 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
305 RN_LDS_000 3 30 3 1 3 30 -1 8 1 21
|
|
302 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
306 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
299 SM_AMIGA_LAST_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
296 SM_AMIGA_LAST_0_ 3 -1 3 1 7 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 2 3 6 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 6 7 60 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 303 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 9 0 21
|
|
30 LDS_000 5 306 3 0 30 -1 8 1 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
32 AS_000 5 304 3 0 32 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 307 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
301 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
302 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 RN_AS_000 3 32 3 2 3 6 32 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
298 CLK_CNT_1_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
297 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 8 1 21
|
|
303 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
307 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
299 SM_AMIGA_LAST_1_ 3 -1 3 1 7 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 2 3 6 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
10 CLK_000 9 -1 2 3 6 10 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 303 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 305 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 306 3 0 30 -1 7 1 21
|
|
65 E 5 308 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
32 AS_000 5 304 3 0 32 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 309 3 0 34 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 307 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
301 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
302 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
308 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
304 RN_AS_000 3 32 3 2 3 6 32 -1 3 0 21
|
|
299 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
309 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
305 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
306 RN_LDS_000 3 30 3 1 3 30 -1 7 1 21
|
|
303 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
307 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 SM_AMIGA_LAST_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_0_ 3 -1 3 1 7 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 2 3 6 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
78 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 309 3 0 31 -1 9 0 21
|
|
65 E 5 312 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 308 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 311 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
305 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
306 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
308 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
298 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
310 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
309 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
312 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
304 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 SM_AMIGA_LAST_1_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
296 inst_AS_000_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
295 SM_AMIGA_LAST_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 309 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 308 3 0 31 -1 9 0 21
|
|
65 E 5 311 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 307 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 310 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
304 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
305 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
307 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
298 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
309 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
311 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
303 SM_AMIGA_LAST_1_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
296 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
86 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 10 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 3 0 21
|
|
32 AS_000 5 317 3 0 32 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 3 0 21
|
|
65 E 5 321 6 0 65 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 4 5 0 1 2 4 6 -1 -1 2 0 21
|
|
293 cpu_est_0_ 3 -1 4 4 2 4 5 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 2 4 0 2 3 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 0 3 3 5 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 2 5 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 5 3 0 2 5 -1 -1 3 0 21
|
|
298 inst_VMA_INT 3 -1 2 3 2 3 5 -1 -1 3 0 21
|
|
296 cpu_est_3_ 3 -1 6 3 2 5 6 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 3 2 5 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_4_ 3 -1 5 3 0 3 5 -1 -1 2 0 21
|
|
306 SM_AMIGA_0_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 5 3 0 3 5 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 8 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
317 RN_AS_000 3 32 3 2 2 3 32 -1 3 0 21
|
|
312 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
301 inst_BGACK_030_INTreg 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
299 inst_CLK_030_D 3 -1 4 2 4 7 -1 -1 2 0 21
|
|
303 CLK_CNT_1_ 3 -1 7 2 0 6 -1 -1 1 0 21
|
|
297 inst_VPA_SYNC 3 -1 0 2 2 5 -1 -1 1 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_E 3 65 6 1 6 65 -1 2 0 21
|
|
302 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 7 0 1 2 3 4 5 6 10 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 5 0 3 4 5 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 4 0 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 0 40 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
86 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 10 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 3 0 21
|
|
32 AS_000 5 317 3 0 32 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 3 0 21
|
|
65 E 5 321 6 0 65 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 4 5 0 1 2 4 6 -1 -1 2 0 21
|
|
293 cpu_est_0_ 3 -1 4 4 2 4 5 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 2 4 0 2 3 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 0 3 3 5 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 2 5 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 5 3 0 2 5 -1 -1 3 0 21
|
|
298 inst_VMA_INT 3 -1 2 3 2 3 5 -1 -1 3 0 21
|
|
296 cpu_est_3_ 3 -1 6 3 2 5 6 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 3 2 5 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_4_ 3 -1 5 3 0 3 5 -1 -1 2 0 21
|
|
306 SM_AMIGA_0_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 5 3 0 3 5 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 8 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
317 RN_AS_000 3 32 3 2 2 3 32 -1 3 0 21
|
|
312 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
301 inst_BGACK_030_INTreg 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
299 inst_CLK_030_D 3 -1 4 2 4 7 -1 -1 2 0 21
|
|
303 CLK_CNT_1_ 3 -1 7 2 0 6 -1 -1 1 0 21
|
|
297 inst_VPA_SYNC 3 -1 0 2 2 5 -1 -1 1 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_E 3 65 6 1 6 65 -1 2 0 21
|
|
302 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 7 0 1 2 3 4 5 6 10 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 5 0 3 4 5 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 4 0 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 0 40 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
86 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 10 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 3 0 21
|
|
32 AS_000 5 317 3 0 32 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
65 E 5 321 6 0 65 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 4 5 0 1 2 4 6 -1 -1 2 0 21
|
|
293 cpu_est_0_ 3 -1 4 4 2 4 5 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 2 4 0 2 3 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 0 3 3 5 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 2 5 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 5 3 0 2 5 -1 -1 3 0 21
|
|
298 inst_VMA_INT 3 -1 2 3 2 3 5 -1 -1 3 0 21
|
|
296 cpu_est_3_ 3 -1 6 3 2 5 6 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 3 2 5 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_4_ 3 -1 5 3 0 3 5 -1 -1 2 0 21
|
|
306 SM_AMIGA_0_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 5 3 0 3 5 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 8 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
317 RN_AS_000 3 32 3 2 2 3 32 -1 3 0 21
|
|
312 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
301 inst_BGACK_030_INTreg 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
299 inst_CLK_030_D 3 -1 4 2 4 7 -1 -1 2 0 21
|
|
303 CLK_CNT_1_ 3 -1 7 2 0 6 -1 -1 1 0 21
|
|
297 inst_VPA_SYNC 3 -1 0 2 2 5 -1 -1 1 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
321 RN_E 3 65 6 1 6 65 -1 2 0 21
|
|
302 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 7 0 1 2 3 4 5 6 10 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 5 0 3 4 5 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 4 0 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 0 40 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
86 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 10 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 4 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 4 0 21
|
|
32 AS_000 5 317 3 0 32 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
65 E 5 321 6 0 65 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 4 5 0 1 2 4 6 -1 -1 2 0 21
|
|
293 cpu_est_0_ 3 -1 4 4 2 4 5 6 -1 -1 4 0 21
|
|
308 SM_AMIGA_1_ 3 -1 2 4 0 2 3 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 0 3 3 5 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 2 5 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 5 3 0 2 5 -1 -1 3 0 21
|
|
298 inst_VMA_INT 3 -1 2 3 2 3 5 -1 -1 3 0 21
|
|
296 cpu_est_3_ 3 -1 6 3 2 5 6 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 3 2 5 6 -1 -1 3 0 21
|
|
309 SM_AMIGA_4_ 3 -1 5 3 0 3 5 -1 -1 2 0 21
|
|
307 SM_AMIGA_0_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 5 3 0 3 5 -1 -1 2 0 21
|
|
303 CLK_CNT_0_ 3 -1 7 3 0 6 7 -1 -1 1 0 21
|
|
310 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 8 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 4 0 21
|
|
317 RN_AS_000 3 32 3 2 2 3 32 -1 3 0 21
|
|
312 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 2 0 21
|
|
304 CLK_CNT_1_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
301 inst_BGACK_030_INTreg 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
299 inst_CLK_030_D 3 -1 4 2 4 7 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 0 2 2 5 -1 -1 1 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
321 RN_E 3 65 6 1 6 65 -1 2 0 21
|
|
302 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 7 0 1 2 3 4 5 6 10 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 5 0 3 4 5 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 4 0 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 0 40 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
85 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 10 0 21
|
|
8 IPL_030_2_ 5 312 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 314 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 313 1 0 6 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 3 0 21
|
|
32 AS_000 5 316 3 0 32 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
65 E 5 320 6 0 65 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 6 5 0 1 2 4 6 -1 -1 2 0 21
|
|
294 cpu_est_1_ 3 -1 4 4 0 4 5 6 -1 -1 4 0 21
|
|
293 cpu_est_0_ 3 -1 4 4 0 4 5 6 -1 -1 4 0 21
|
|
296 cpu_est_3_ 3 -1 4 4 0 4 5 6 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 4 0 4 5 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_7_ 3 -1 2 3 3 5 7 -1 -1 4 0 21
|
|
310 SM_AMIGA_3_ 3 -1 5 3 0 2 5 -1 -1 3 0 21
|
|
298 inst_VMA_INT 3 -1 0 3 0 3 5 -1 -1 3 0 21
|
|
308 SM_AMIGA_4_ 3 -1 5 3 2 3 5 -1 -1 2 0 21
|
|
307 SM_AMIGA_1_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_0_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 5 3 2 3 5 -1 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 8 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
316 RN_AS_000 3 32 3 2 0 3 32 -1 3 0 21
|
|
311 SM_AMIGA_2_ 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
301 inst_BGACK_030_INTreg 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
299 inst_CLK_030_D 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
303 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
297 inst_VPA_SYNC 3 -1 0 2 0 5 -1 -1 1 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
314 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
313 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
312 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
320 RN_E 3 65 6 1 6 65 -1 2 0 21
|
|
302 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 7 0 1 2 3 4 5 6 10 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 5 2 3 5 6 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 4 2 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 0 40 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
84 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 10 0 21
|
|
8 IPL_030_2_ 5 311 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 4 0 21
|
|
32 AS_000 5 315 3 0 32 -1 3 0 21
|
|
28 BG_000 5 318 3 0 28 -1 3 0 21
|
|
65 E 5 319 6 0 65 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 320 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 4 5 0 1 2 4 6 -1 -1 2 0 21
|
|
294 cpu_est_1_ 3 -1 6 4 2 4 5 6 -1 -1 4 0 21
|
|
293 cpu_est_0_ 3 -1 6 4 2 4 5 6 -1 -1 4 0 21
|
|
296 cpu_est_3_ 3 -1 4 4 2 4 5 6 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 4 4 2 4 5 6 -1 -1 3 0 21
|
|
306 SM_AMIGA_1_ 3 -1 2 4 0 2 3 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 4 0 21
|
|
298 inst_VMA_INT 3 -1 2 3 2 3 5 -1 -1 3 0 21
|
|
307 SM_AMIGA_4_ 3 -1 5 3 0 3 5 -1 -1 2 0 21
|
|
305 SM_AMIGA_0_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 0 3 0 3 5 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 8 0 21
|
|
315 RN_AS_000 3 32 3 2 2 3 32 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 3 0 21
|
|
320 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
301 inst_BGACK_030_INTreg 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
299 inst_CLK_030_D 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 2 2 2 5 -1 -1 1 0 21
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
311 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
318 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
319 RN_E 3 65 6 1 6 65 -1 2 0 21
|
|
302 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 7 0 1 2 3 4 5 6 10 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 5 0 3 5 6 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 4 0 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 2 40 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
310 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
310 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 8 1 21
|
|
31 UDS_000 5 306 3 0 31 -1 6 1 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
32 AS_000 5 305 3 0 32 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 8 1 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 6 1 21
|
|
309 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 7 1 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
32 AS_000 5 305 3 0 32 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 7 1 21
|
|
309 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 5 0 21
|
|
30 LDS_000 5 309 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 308 3 0 31 -1 7 1 21
|
|
65 E 5 311 6 0 65 -1 4 0 21
|
|
32 AS_000 5 307 3 0 32 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 310 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
304 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
305 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
307 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
293 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
309 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 7 1 21
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
311 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
303 SM_AMIGA_LAST_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
302 SM_AMIGA_LAST_0_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 309 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 308 3 0 31 -1 7 1 21
|
|
65 E 5 311 6 0 65 -1 4 0 21
|
|
32 AS_000 5 307 3 0 32 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 310 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
304 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
305 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
307 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
293 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
309 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 7 1 21
|
|
311 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
303 SM_AMIGA_LAST_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 309 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 308 3 0 31 -1 7 1 21
|
|
65 E 5 311 6 0 65 -1 4 0 21
|
|
32 AS_000 5 307 3 0 32 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 310 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
304 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
305 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
307 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
293 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
309 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 7 1 21
|
|
311 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
303 SM_AMIGA_LAST_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 306 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 309 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 308 3 0 31 -1 7 1 21
|
|
65 E 5 311 6 0 65 -1 4 0 21
|
|
32 AS_000 5 307 3 0 32 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 312 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 310 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
304 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
305 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
307 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
312 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
293 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
309 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
308 RN_UDS_000 3 31 3 1 3 31 -1 7 1 21
|
|
311 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
306 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
303 SM_AMIGA_LAST_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_1_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 7 1 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
32 AS_000 5 305 3 0 32 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 7 1 21
|
|
309 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
71 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 2 5 29 -1 1 0 21
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 3 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 10 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 4 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 4 0 21
|
|
32 AS_000 5 306 3 0 32 -1 3 0 21
|
|
28 BG_000 5 309 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
299 SM_AMIGA_1_ 3 -1 5 5 0 3 5 6 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_4_ 3 -1 5 4 2 3 5 6 -1 -1 3 0 21
|
|
296 SM_AMIGA_6_ 3 -1 0 4 0 3 5 6 -1 -1 3 0 21
|
|
298 SM_AMIGA_0_ 3 -1 0 4 0 3 6 7 -1 -1 2 0 21
|
|
297 SM_AMIGA_7_ 3 -1 5 4 0 3 6 7 -1 -1 1 0 21
|
|
294 CLK_CNT_1_ 3 -1 4 3 2 4 6 -1 -1 2 0 21
|
|
293 CLK_CNT_0_ 3 -1 2 3 2 4 6 -1 -1 1 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 4 0 21
|
|
308 RN_LDS_000 3 30 3 2 3 6 30 -1 4 0 21
|
|
302 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 2 0 21
|
|
295 inst_BGACK_030_INTreg 3 -1 2 2 2 3 -1 -1 1 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
304 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
309 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
306 RN_AS_000 3 32 3 1 3 32 -1 3 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
303 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 5 0 2 3 5 6 10 -1
|
|
81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 4 0 3 6 7 13 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 3 6 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
40 VPA 1 -1 -1 2 2 5 40 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
85 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 10 0 21
|
|
64 CLK_DIV_OUT 5 320 6 0 64 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
8 IPL_030_2_ 5 312 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 315 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 313 1 0 6 -1 4 0 21
|
|
32 AS_000 5 316 3 0 32 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
299 inst_CLK_000_D 3 -1 4 5 0 1 2 4 6 -1 -1 1 0 21
|
|
307 SM_AMIGA_4_ 3 -1 0 4 0 2 3 5 -1 -1 4 0 21
|
|
305 SM_AMIGA_1_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 5 3 2 3 5 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 4 3 0 4 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_5_ 3 -1 5 3 0 2 5 -1 -1 2 0 21
|
|
306 SM_AMIGA_0_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 7 3 2 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 2 3 3 5 7 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 2 3 2 6 7 -1 -1 1 0 21
|
|
320 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 4 0 21
|
|
318 RN_LDS_000 3 30 3 2 3 5 30 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 0 6 -1 -1 4 0 21
|
|
316 RN_AS_000 3 32 3 2 0 3 32 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 0 2 0 2 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 2 0 6 -1 -1 3 1 21
|
|
296 inst_VMA_INT 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
295 cpu_est_3_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
300 inst_BGACK_030_INTreg 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
311 LDS_000_0 3 -1 5 1 3 -1 -1 10 0 21
|
|
315 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
313 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
312 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
302 inst_VMA_INT_D 3 -1 0 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 7 0 1 2 3 4 5 6 10 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 5 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 5 68 -1
|
|
63 CLK_030 1 -1 -1 2 3 5 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 5 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 5 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
85 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 10 0 21
|
|
64 CLK_DIV_OUT 5 320 6 0 64 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 4 0 21
|
|
32 AS_000 5 316 3 0 32 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
296 inst_VMA_INT 3 -1 2 4 0 2 3 5 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 4 4 0 2 4 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_1_ 3 -1 0 4 0 3 5 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 4 4 1 2 4 6 -1 -1 1 0 21
|
|
308 SM_AMIGA_4_ 3 -1 0 3 0 3 5 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 0 2 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_6_ 3 -1 5 3 0 3 5 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 3 0 2 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 3 0 2 6 -1 -1 3 0 21
|
|
306 SM_AMIGA_0_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 0 3 3 5 7 -1 -1 1 0 21
|
|
320 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 4 0 21
|
|
318 RN_LDS_000 3 30 3 2 3 5 30 -1 4 0 21
|
|
316 RN_AS_000 3 32 3 2 2 3 32 -1 3 0 21
|
|
310 SM_AMIGA_3_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 2 0 21
|
|
307 SM_AMIGA_2_ 3 -1 7 2 0 7 -1 -1 2 0 21
|
|
300 inst_BGACK_030_INTreg 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 2 2 2 6 -1 -1 2 0 21
|
|
297 CLK_CNT_0_ 3 -1 2 2 2 6 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
311 LDS_000_0 3 -1 5 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
302 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 2 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 8 0 1 2 3 4 5 6 7 10 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 5 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 5 68 -1
|
|
63 CLK_030 1 -1 -1 2 3 5 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 5 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 5 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 10 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 4 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 4 0 21
|
|
32 AS_000 5 318 3 0 32 -1 3 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 315 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 314 1 0 6 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
310 SM_AMIGA_4_ 3 -1 0 4 0 2 3 5 -1 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
303 inst_RISING_CLK_AMIGA 3 -1 6 4 1 2 4 6 -1 -1 1 0 21
|
|
312 SM_AMIGA_3_ 3 -1 0 3 0 2 7 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 5 3 2 3 5 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 0 3 0 2 3 -1 -1 3 0 21
|
|
295 cpu_est_3_ 3 -1 4 3 0 4 6 -1 -1 3 1 21
|
|
311 SM_AMIGA_5_ 3 -1 5 3 0 2 5 -1 -1 2 0 21
|
|
309 SM_AMIGA_2_ 3 -1 7 3 2 5 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 0 3 0 2 6 -1 -1 2 0 21
|
|
293 cpu_est_0_ 3 -1 6 3 0 4 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 2 3 3 5 7 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 2 3 0 2 6 -1 -1 1 0 21
|
|
294 cpu_est_1_ 3 -1 4 2 0 4 -1 -1 5 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 4 0 21
|
|
320 RN_LDS_000 3 30 3 2 3 5 30 -1 4 0 21
|
|
301 cpu_est_2_ 3 -1 4 2 0 4 -1 -1 4 0 21
|
|
318 RN_AS_000 3 32 3 2 0 3 32 -1 3 0 21
|
|
300 inst_BGACK_030_INTreg 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
313 LDS_000_0 3 -1 5 1 3 -1 -1 10 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
315 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
314 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
304 inst_FALLING_CLK_AMIGA 3 -1 6 1 0 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 2 1 3 -1 -1 1 0 21
|
|
299 inst_CLK_000_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 6 0 2 3 5 6 7 10 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 5 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 5 68 -1
|
|
63 CLK_030 1 -1 -1 2 3 5 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 5 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 5 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
85 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 10 0 21
|
|
64 CLK_DIV_OUT 5 320 6 0 64 -1 4 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 4 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 312 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 4 0 21
|
|
32 AS_000 5 315 3 0 32 -1 3 0 21
|
|
28 BG_000 5 318 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
299 inst_CLK_000_D 3 -1 4 5 0 1 4 5 6 -1 -1 1 0 21
|
|
308 SM_AMIGA_4_ 3 -1 5 4 0 2 3 5 -1 -1 4 0 21
|
|
293 cpu_est_0_ 3 -1 4 4 0 4 5 6 -1 -1 3 0 21
|
|
306 SM_AMIGA_0_ 3 -1 0 4 0 2 3 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 0 4 0 2 3 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 2 4 0 2 3 7 -1 -1 1 0 21
|
|
296 inst_VMA_INT 3 -1 0 3 0 3 5 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 0 5 6 -1 -1 4 0 21
|
|
310 SM_AMIGA_3_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 3 0 5 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_2_ 3 -1 7 3 0 2 7 -1 -1 2 0 21
|
|
320 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 4 0 21
|
|
317 RN_LDS_000 3 30 3 2 2 3 30 -1 4 0 21
|
|
315 RN_AS_000 3 32 3 2 0 3 32 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
309 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
300 inst_BGACK_030_INTreg 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 CLK_CNT_0_ 3 -1 5 2 5 6 -1 -1 1 0 21
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
311 LDS_000_0 3 -1 2 1 3 -1 -1 10 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
312 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
318 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
302 inst_VMA_INT_D 3 -1 0 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 8 0 1 2 3 4 5 6 7 10 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 2 3 7 81 -1
|
|
70 RW 1 -1 -1 3 2 3 4 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 2 3 68 -1
|
|
63 CLK_030 1 -1 -1 2 2 3 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 2 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 2 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 10 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 4 0 21
|
|
32 AS_000 5 316 3 0 32 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
21 AVEC_EXP 5 320 2 0 21 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
305 SM_AMIGA_1_ 3 -1 5 5 0 2 3 5 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 5 4 0 2 3 5 -1 -1 4 0 21
|
|
293 cpu_est_0_ 3 -1 4 4 0 4 5 6 -1 -1 3 0 21
|
|
306 SM_AMIGA_0_ 3 -1 0 4 0 2 3 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 5 4 0 2 3 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D 3 -1 4 4 0 1 4 6 -1 -1 1 0 21
|
|
296 inst_VMA_INT 3 -1 0 3 0 3 5 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 0 5 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 3 0 5 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 4 0 21
|
|
318 RN_LDS_000 3 30 3 2 2 3 30 -1 4 0 21
|
|
316 RN_AS_000 3 32 3 2 0 3 32 -1 3 0 21
|
|
310 SM_AMIGA_3_ 3 -1 5 2 5 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_2_ 3 -1 7 2 5 7 -1 -1 2 0 21
|
|
300 inst_BGACK_030_INTreg 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 2 2 2 6 -1 -1 2 0 21
|
|
297 CLK_CNT_0_ 3 -1 2 2 2 6 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
311 LDS_000_0 3 -1 2 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_AVEC_EXP 3 21 2 1 2 21 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
302 inst_VMA_INT_D 3 -1 0 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 8 0 1 2 3 4 5 6 7 10 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 4 2 3 5 7 13 -1
|
|
70 RW 1 -1 -1 3 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 2 3 5 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 2 3 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 2 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 2 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
81 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 3 1 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 309 3 0 31 -1 5 1 21
|
|
64 CLK_DIV_OUT 5 315 6 0 64 -1 3 0 21
|
|
32 AS_000 5 308 3 0 32 -1 3 1 21
|
|
21 AVEC_EXP 5 312 2 0 21 -1 3 0 21
|
|
8 IPL_030_2_ 5 306 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 314 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 313 1 0 6 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
28 BG_000 5 311 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
296 SM_AMIGA_0_ 3 -1 5 5 0 2 3 5 7 -1 -1 5 0 21
|
|
297 SM_AMIGA_1_ 3 -1 5 5 0 2 3 5 7 -1 -1 4 0 21
|
|
298 SM_AMIGA_2_ 3 -1 5 5 0 2 3 5 7 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 2 4 0 2 5 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 4 0 2 5 6 -1 -1 3 0 21
|
|
302 inst_CLK_000_D 3 -1 5 4 0 1 2 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT 3 -1 0 3 0 3 5 -1 -1 5 1 21
|
|
294 cpu_est_1_ 3 -1 2 3 0 2 5 -1 -1 4 0 21
|
|
304 cpu_est_2_ 3 -1 0 3 0 2 5 -1 -1 3 1 21
|
|
315 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
308 RN_AS_000 3 32 3 2 0 3 32 -1 3 1 21
|
|
303 inst_BGACK_030_INTreg 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 4 2 4 6 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
310 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
309 RN_UDS_000 3 31 3 1 3 31 -1 5 1 21
|
|
314 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
313 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
312 RN_AVEC_EXP 3 21 2 1 2 21 -1 3 0 21
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 1 21
|
|
306 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
311 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
305 inst_VMA_INT_D 3 -1 0 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 7 0 1 2 3 5 6 7 10 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 5 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 6 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
86 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 10 0 21
|
|
64 CLK_DIV_OUT 5 320 6 0 64 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 4 0 21
|
|
32 AS_000 5 316 3 0 32 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
305 SM_AMIGA_1_ 3 -1 5 5 0 2 3 5 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 4 5 0 1 4 6 7 -1 -1 1 0 21
|
|
308 SM_AMIGA_4_ 3 -1 5 4 0 2 3 5 -1 -1 4 0 21
|
|
293 cpu_est_0_ 3 -1 4 4 0 4 5 6 -1 -1 3 0 21
|
|
306 SM_AMIGA_0_ 3 -1 2 4 0 2 3 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 5 4 0 2 3 7 -1 -1 1 0 21
|
|
296 inst_VMA_INT 3 -1 0 3 0 3 5 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 0 5 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 3 0 5 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 21
|
|
320 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 4 0 21
|
|
318 RN_LDS_000 3 30 3 2 2 3 30 -1 4 0 21
|
|
316 RN_AS_000 3 32 3 2 0 3 32 -1 3 0 21
|
|
309 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
307 SM_AMIGA_2_ 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
300 inst_BGACK_030_INTreg 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
311 LDS_000_0 3 -1 2 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
310 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
302 inst_VMA_INT_D 3 -1 0 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 8 0 1 2 3 4 5 6 7 10 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 2 3 7 81 -1
|
|
70 RW 1 -1 -1 3 2 3 4 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 2 3 68 -1
|
|
63 CLK_030 1 -1 -1 2 2 3 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 2 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 2 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 10 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 4 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 4 0 21
|
|
32 AS_000 5 318 3 0 32 -1 3 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 315 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 314 1 0 6 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 inst_RISING_CLK_AMIGA 3 -1 6 5 0 1 2 4 6 -1 -1 1 0 21
|
|
309 SM_AMIGA_4_ 3 -1 0 4 0 2 3 5 -1 -1 4 0 21
|
|
295 cpu_est_3_ 3 -1 4 4 0 4 5 6 -1 -1 3 1 21
|
|
307 SM_AMIGA_0_ 3 -1 7 4 2 3 5 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
293 cpu_est_0_ 3 -1 6 4 0 4 5 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 5 4 2 3 5 7 -1 -1 1 0 21
|
|
296 inst_VMA_INT 3 -1 5 3 0 3 5 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 4 3 0 4 5 -1 -1 5 0 21
|
|
301 cpu_est_2_ 3 -1 4 3 0 4 5 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 2 3 0 2 5 -1 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 4 0 21
|
|
320 RN_LDS_000 3 30 3 2 2 3 30 -1 4 0 21
|
|
318 RN_AS_000 3 32 3 2 3 5 32 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 0 2 0 5 -1 -1 3 0 21
|
|
308 SM_AMIGA_2_ 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
300 inst_BGACK_030_INTreg 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
313 LDS_000_0 3 -1 2 1 3 -1 -1 10 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
315 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
314 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
310 inst_FALLING_CLK_AMIGA 3 -1 6 1 5 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
299 inst_CLK_000_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 6 0 2 3 5 6 7 10 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
70 RW 1 -1 -1 3 2 3 4 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 2 3 68 -1
|
|
63 CLK_030 1 -1 -1 2 2 3 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 2 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 2 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 10 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 4 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 4 0 21
|
|
32 AS_000 5 318 3 0 32 -1 3 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 314 1 0 6 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
307 SM_AMIGA_0_ 3 -1 5 6 0 1 2 3 5 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 0 6 0 1 2 3 5 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 2 5 0 1 2 3 5 -1 -1 4 0 21
|
|
295 cpu_est_3_ 3 -1 4 4 2 4 5 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 4 2 4 5 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 2 4 0 3 5 7 -1 -1 1 0 21
|
|
303 inst_RISING_CLK_AMIGA 3 -1 6 4 1 4 6 7 -1 -1 1 0 21
|
|
296 inst_VMA_INT 3 -1 5 3 2 3 5 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 4 3 2 4 5 -1 -1 5 0 21
|
|
301 cpu_est_2_ 3 -1 4 3 2 4 5 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 0 3 0 2 3 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 0 3 0 1 2 -1 -1 2 0 21
|
|
308 SM_AMIGA_2_ 3 -1 2 3 0 2 7 -1 -1 2 0 21
|
|
320 RN_LDS_000 3 30 3 2 0 3 30 -1 4 0 21
|
|
318 RN_AS_000 3 32 3 2 3 5 32 -1 3 0 21
|
|
300 inst_BGACK_030_INTreg 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 CLK_CNT_0_ 3 -1 5 2 5 6 -1 -1 1 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
313 LDS_000_0 3 -1 0 1 3 -1 -1 10 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 4 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
310 inst_FALLING_CLK_AMIGA 3 -1 6 1 5 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
299 inst_CLK_000_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 2 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 6 0 2 3 5 6 7 10 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 0 3 68 -1
|
|
63 CLK_030 1 -1 -1 2 0 3 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 0 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 0 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
85 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 9 0 21
|
|
64 CLK_DIV_OUT 5 319 6 0 64 -1 4 0 21
|
|
8 IPL_030_2_ 5 311 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 4 0 21
|
|
32 AS_000 5 315 3 0 32 -1 3 0 21
|
|
28 BG_000 5 318 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 SM_AMIGA_4_ 3 -1 0 5 0 1 2 3 5 -1 -1 4 0 21
|
|
306 SM_AMIGA_0_ 3 -1 0 5 0 1 2 3 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 7 5 0 1 3 5 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 4 5 0 1 2 5 6 -1 -1 1 0 21
|
|
303 SM_AMIGA_6_ 3 -1 7 4 2 3 5 7 -1 -1 3 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 0 2 6 -1 -1 4 0 21
|
|
301 cpu_est_2_ 3 -1 2 3 0 2 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 2 3 0 2 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 3 0 2 6 -1 -1 3 0 21
|
|
309 SM_AMIGA_5_ 3 -1 5 3 0 1 5 -1 -1 2 0 21
|
|
307 SM_AMIGA_2_ 3 -1 5 3 2 5 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 5 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_VMA_INT 3 -1 0 2 0 3 -1 -1 6 0 21
|
|
315 RN_AS_000 3 32 3 2 0 3 32 -1 3 0 21
|
|
310 SM_AMIGA_3_ 3 -1 0 2 0 5 -1 -1 3 0 21
|
|
300 inst_BGACK_030_INTreg 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 CLK_CNT_0_ 3 -1 5 2 5 6 -1 -1 1 0 21
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
319 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 4 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
311 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
318 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
302 inst_VMA_INT_D 3 -1 0 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 8 0 1 2 3 4 5 6 7 10 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
86 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 10 0 21
|
|
64 CLK_DIV_OUT 5 320 6 0 64 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 4 0 21
|
|
32 AS_000 5 316 3 0 32 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
299 inst_CLK_000_D 3 -1 4 6 0 1 2 4 5 6 -1 -1 1 0 21
|
|
305 SM_AMIGA_1_ 3 -1 7 5 0 2 3 5 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 5 4 0 2 3 5 -1 -1 4 0 21
|
|
306 SM_AMIGA_0_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 0 4 2 3 5 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_6_ 3 -1 2 3 0 2 3 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 4 3 4 5 6 -1 -1 3 0 21
|
|
309 SM_AMIGA_5_ 3 -1 2 3 0 2 5 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 5 2 3 5 -1 -1 6 0 21
|
|
318 RN_LDS_000 3 30 3 2 2 3 30 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 5 6 -1 -1 4 0 21
|
|
316 RN_AS_000 3 32 3 2 3 5 32 -1 3 0 21
|
|
310 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 2 5 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 2 5 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_2_ 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
300 inst_BGACK_030_INTreg 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
311 LDS_000_0 3 -1 2 1 3 -1 -1 10 0 21
|
|
320 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 4 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
302 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 8 0 1 2 3 4 5 6 7 10 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
70 RW 1 -1 -1 3 2 3 4 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 2 3 68 -1
|
|
63 CLK_030 1 -1 -1 2 2 3 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 2 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 2 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 0 5 29 -1 1 0 21
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 4 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 10 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 4 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 4 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 315 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 314 1 0 6 -1 4 0 21
|
|
32 AS_000 5 317 3 0 32 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
299 inst_CLK_000_D 3 -1 4 5 0 1 4 5 6 -1 -1 1 0 21
|
|
309 SM_AMIGA_4_ 3 -1 0 4 0 2 3 5 -1 -1 4 0 21
|
|
293 cpu_est_0_ 3 -1 4 4 0 4 5 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_0_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 2 4 2 3 5 7 -1 -1 1 0 21
|
|
296 inst_VMA_INT 3 -1 5 3 0 3 5 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 0 5 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 6 3 0 5 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_2_ 3 -1 7 3 2 5 7 -1 -1 2 0 21
|
|
319 RN_LDS_000 3 30 3 2 2 3 30 -1 4 0 21
|
|
317 RN_AS_000 3 32 3 2 3 5 32 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
310 SM_AMIGA_5_ 3 -1 2 2 0 2 -1 -1 2 0 21
|
|
301 inst_BGACK_030_INTreg 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
300 inst_CLK_030_D 3 -1 4 2 1 2 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
312 LDS_000_0 3 -1 2 1 3 -1 -1 10 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 4 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
315 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
314 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
303 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 8 0 1 2 3 4 5 6 7 10 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 4 1 2 3 4 63 -1
|
|
70 RW 1 -1 -1 3 2 3 4 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 2 3 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 2 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 2 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
86 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 320 6 0 64 -1 3 0 21
|
|
32 AS_000 5 316 3 0 32 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 SM_AMIGA_4_ 3 -1 2 4 0 2 3 5 -1 -1 4 0 21
|
|
293 cpu_est_0_ 3 -1 4 4 0 2 4 6 -1 -1 3 0 21
|
|
306 SM_AMIGA_0_ 3 -1 0 4 0 3 5 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 7 4 0 3 5 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 5 4 0 3 5 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D 3 -1 4 4 0 1 4 6 -1 -1 1 0 21
|
|
296 inst_VMA_INT 3 -1 0 3 0 2 3 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 0 2 6 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 6 3 0 2 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 3 0 2 6 -1 -1 3 0 21
|
|
318 RN_LDS_000 3 30 3 2 3 5 30 -1 4 0 21
|
|
316 RN_AS_000 3 32 3 2 0 3 32 -1 3 0 21
|
|
310 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 5 2 3 5 -1 -1 3 0 21
|
|
309 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 2 0 21
|
|
307 SM_AMIGA_2_ 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
299 inst_BGACK_030_INTreg 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
302 CLK_CNT_0_ 3 -1 2 2 2 6 -1 -1 1 0 21
|
|
298 inst_CLK_030_D 3 -1 4 2 1 2 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
311 LDS_000_0 3 -1 5 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
320 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 3 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
301 inst_VMA_INT_D 3 -1 0 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 2 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 8 0 1 2 3 4 5 6 7 10 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 5 1 2 3 4 5 63 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 5 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 5 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 5 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 5 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
86 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 313 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
8 IPL_030_2_ 5 312 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 315 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 314 1 0 6 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 320 6 0 64 -1 3 0 21
|
|
32 AS_000 5 316 3 0 32 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 SM_AMIGA_4_ 3 -1 0 5 0 3 5 6 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_7_ 3 -1 5 5 0 3 5 6 7 -1 -1 3 0 21
|
|
306 SM_AMIGA_0_ 3 -1 0 5 0 3 5 6 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 5 5 0 3 5 6 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 0 4 0 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_3_ 3 -1 2 4 0 2 5 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 4 0 2 5 6 -1 -1 3 0 21
|
|
297 inst_CLK_000_D 3 -1 4 4 1 2 5 6 -1 -1 1 0 21
|
|
296 inst_VMA_INT 3 -1 5 3 0 3 5 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 2 3 0 2 5 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 2 3 0 2 5 -1 -1 3 1 21
|
|
318 RN_LDS_000 3 30 3 2 3 6 30 -1 4 0 21
|
|
316 RN_AS_000 3 32 3 2 3 5 32 -1 3 0 21
|
|
310 SM_AMIGA_3_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_5_ 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_2_ 3 -1 7 2 5 7 -1 -1 2 0 21
|
|
299 inst_BGACK_030_INTreg 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
302 CLK_CNT_0_ 3 -1 5 2 5 6 -1 -1 1 0 21
|
|
298 inst_CLK_030_D 3 -1 4 2 1 2 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
311 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
313 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
315 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
314 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
312 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
320 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 3 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
301 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 8 0 1 2 3 4 5 6 7 10 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 6 0 1 2 3 4 6 63 -1
|
|
81 AS_030 1 -1 -1 5 0 3 5 6 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 4 0 3 6 7 13 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 0 5 29 -1 1 0 21
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 9 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 4 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 4 0 21
|
|
32 AS_000 5 317 3 0 32 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
309 SM_AMIGA_4_ 3 -1 5 5 0 2 3 5 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_7_ 3 -1 5 5 0 2 3 5 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_0_ 3 -1 7 5 0 2 3 5 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 5 5 0 2 3 5 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 4 0 21
|
|
293 cpu_est_0_ 3 -1 1 4 0 1 5 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 0 3 0 3 5 -1 -1 6 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 4 3 1 2 6 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 0 5 6 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 0 3 0 5 7 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 3 0 5 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 21
|
|
298 inst_CLK_000_D 3 -1 2 3 0 1 6 -1 -1 1 0 21
|
|
319 RN_LDS_000 3 30 3 2 2 3 30 -1 4 0 21
|
|
317 RN_AS_000 3 32 3 2 0 3 32 -1 3 0 21
|
|
312 SM_AMIGA_5_ 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_2_ 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
299 inst_BGACK_030_INTreg 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
314 LDS_000_0 3 -1 2 1 3 -1 -1 10 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
311 CLK_CNT_1_ 3 -1 4 1 4 -1 -1 4 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
310 CLK_CNT_0_ 3 -1 4 1 4 -1 -1 3 0 21
|
|
303 CLK_REF_1_ 3 -1 0 1 4 -1 -1 1 0 20
|
|
302 CLK_REF_0_ 3 -1 2 1 4 -1 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 0 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 7 0 1 2 3 5 6 7 10 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 5 7 85 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 4 1 2 3 5 63 -1
|
|
13 CPU_SPACE 1 -1 -1 4 2 3 5 7 13 -1
|
|
70 RW 1 -1 -1 3 2 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 2 3 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 2 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 2 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 0 5 29 -1 1 0 21
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 9 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 4 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 4 0 21
|
|
32 AS_000 5 317 3 0 32 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
309 SM_AMIGA_4_ 3 -1 5 5 0 2 3 5 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_7_ 3 -1 5 5 0 2 3 5 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_0_ 3 -1 7 5 0 2 3 5 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 5 5 0 2 3 5 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 4 0 21
|
|
293 cpu_est_0_ 3 -1 1 4 0 1 5 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 0 3 0 3 5 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 0 5 6 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 0 3 0 5 7 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 3 0 5 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 21
|
|
298 inst_CLK_000_D 3 -1 2 3 0 1 6 -1 -1 1 0 21
|
|
320 RN_LDS_000 3 30 3 2 2 3 30 -1 4 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 4 2 2 6 -1 -1 4 0 21
|
|
317 RN_AS_000 3 32 3 2 0 3 32 -1 3 0 21
|
|
312 SM_AMIGA_5_ 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_2_ 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
299 inst_BGACK_030_INTreg 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
314 LDS_000_0 3 -1 2 1 3 -1 -1 10 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
311 CLK_CNT_1_ 3 -1 4 1 4 -1 -1 4 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
310 CLK_CNT_0_ 3 -1 4 1 4 -1 -1 3 0 21
|
|
303 CLK_REF_1_ 3 -1 0 1 4 -1 -1 1 0 20
|
|
302 CLK_REF_0_ 3 -1 2 1 4 -1 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 0 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 7 0 1 2 3 5 6 7 10 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 5 7 85 -1
|
|
81 AS_030 1 -1 -1 5 0 2 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 4 1 2 3 5 63 -1
|
|
13 CPU_SPACE 1 -1 -1 4 2 3 5 7 13 -1
|
|
70 RW 1 -1 -1 3 2 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 2 3 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 2 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 2 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
84 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 14 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 10 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 4 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 4 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 4 0 21
|
|
32 AS_000 5 315 3 0 32 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
307 SM_AMIGA_4_ 3 -1 0 5 0 2 3 5 7 -1 -1 4 0 21
|
|
310 SM_AMIGA_6_ 3 -1 0 4 0 2 3 7 -1 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 5 4 0 3 5 7 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 1 4 0 1 5 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_0_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 5 3 0 3 5 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 0 5 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 3 0 5 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 21
|
|
306 SM_AMIGA_2_ 3 -1 7 3 2 5 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 4 3 1 5 6 -1 -1 1 0 21
|
|
315 RN_AS_000 3 32 3 2 3 5 32 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 14 0 21
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21
|
|
309 CLK_CNT_1_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 2 1 6 -1 -1 4 0 21
|
|
308 CLK_CNT_0_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
302 CLK_REF_1_ 3 -1 4 1 2 -1 -1 1 0 20
|
|
301 CLK_REF_0_ 3 -1 4 1 2 -1 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 7 0 1 3 4 5 6 7 10 -1
|
|
85 RST 1 -1 -1 6 0 1 3 4 5 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 0 1 3 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
84 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 14 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 10 0 21
|
|
32 AS_000 5 315 3 0 32 -1 3 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
307 SM_AMIGA_4_ 3 -1 0 5 0 2 3 5 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_0_ 3 -1 0 5 0 2 3 5 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 2 4 0 2 5 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 2 4 0 2 5 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 4 0 2 5 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 2 4 0 2 5 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 0 4 0 3 5 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 5 3 0 3 5 -1 -1 6 0 21
|
|
303 SM_AMIGA_7_ 3 -1 5 3 3 5 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 5 3 0 5 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_2_ 3 -1 7 3 0 2 7 -1 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 2 3 5 32 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
297 inst_CLK_000_D 3 -1 1 2 2 6 -1 -1 1 0 21
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 14 0 21
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
309 CLK_CNT_1_ 3 -1 4 1 4 -1 -1 4 0 21
|
|
298 inst_CLK_OUT_PRE 3 -1 4 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
308 CLK_CNT_0_ 3 -1 4 1 4 -1 -1 3 0 21
|
|
302 CLK_REF_1_ 3 -1 6 1 4 -1 -1 1 0 20
|
|
301 CLK_REF_0_ 3 -1 6 1 4 -1 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 7 0 1 2 3 5 6 7 10 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 1 3 5 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
85 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 0 5 29 -1 1 0 21
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 9 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 14 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 10 0 21
|
|
32 AS_000 5 316 3 0 32 -1 3 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 SM_AMIGA_4_ 3 -1 0 5 0 2 3 5 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_0_ 3 -1 7 5 0 2 3 5 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_6_ 3 -1 0 4 0 2 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_7_ 3 -1 0 4 0 3 5 7 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 2 4 0 2 5 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 5 3 0 3 5 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 0 5 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 3 0 5 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_2_ 3 -1 5 3 2 5 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 4 3 1 2 6 -1 -1 1 0 21
|
|
310 CLK_CNT_1_ 3 -1 2 2 2 6 -1 -1 4 0 21
|
|
316 RN_AS_000 3 32 3 2 3 5 32 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 5 2 5 7 -1 -1 3 0 21
|
|
309 CLK_CNT_0_ 3 -1 6 2 2 6 -1 -1 3 0 21
|
|
312 SM_AMIGA_5_ 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
302 CLK_REF_1_ 3 -1 4 2 2 6 -1 -1 1 0 20
|
|
301 CLK_REF_0_ 3 -1 4 2 2 6 -1 -1 1 0 20
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 14 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 2 1 6 -1 -1 4 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
303 inst_RISING_CLK_AMIGA 3 -1 1 1 1 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 8 0 1 2 3 4 5 6 7 10 -1
|
|
85 RST 1 -1 -1 6 0 1 3 4 5 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 0 1 3 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
83 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 313 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 316 3 0 30 -1 14 0 21
|
|
31 UDS_000 5 315 3 0 31 -1 10 0 21
|
|
32 AS_000 5 314 3 0 32 -1 3 0 21
|
|
8 IPL_030_2_ 5 312 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
306 SM_AMIGA_4_ 3 -1 5 5 0 2 3 5 7 -1 -1 4 0 21
|
|
307 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 4 0 2 5 6 -1 -1 4 0 21
|
|
302 SM_AMIGA_7_ 3 -1 7 4 0 3 5 7 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 2 4 0 2 5 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 4 0 2 5 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 2 4 0 2 5 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_0_ 3 -1 0 4 0 2 3 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 0 3 0 3 5 -1 -1 6 0 21
|
|
311 SM_AMIGA_3_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
|
|
305 SM_AMIGA_2_ 3 -1 0 3 0 2 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
314 RN_AS_000 3 32 3 2 0 3 32 -1 3 0 21
|
|
310 SM_AMIGA_5_ 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 4 2 4 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 6 2 2 6 -1 -1 1 0 21
|
|
316 RN_LDS_000 3 30 3 1 3 30 -1 14 0 21
|
|
315 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
313 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
312 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
308 CLK_CNT_0_ 3 -1 4 1 4 -1 -1 2 0 21
|
|
309 CLK_CNT_1_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
301 inst_RISING_CLK_AMIGA 3 -1 2 1 1 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 6 0 2 3 5 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 5 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 1 3 5 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
82 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 312 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 315 3 0 30 -1 14 0 21
|
|
31 UDS_000 5 314 3 0 31 -1 10 0 21
|
|
32 AS_000 5 313 3 0 32 -1 3 0 21
|
|
8 IPL_030_2_ 5 311 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
307 SM_AMIGA_4_ 3 -1 0 5 0 2 3 5 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_0_ 3 -1 0 5 0 2 3 5 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 4 0 21
|
|
295 cpu_est_3_ 3 -1 2 4 0 2 5 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 4 0 2 5 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 0 4 0 3 5 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 5 3 0 3 5 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 2 3 0 2 5 -1 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 5 3 3 5 7 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 2 3 0 2 5 -1 -1 3 1 21
|
|
309 SM_AMIGA_5_ 3 -1 5 3 0 5 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_2_ 3 -1 7 3 0 2 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 4 3 2 4 6 -1 -1 1 0 21
|
|
313 RN_AS_000 3 32 3 2 3 5 32 -1 3 0 21
|
|
310 SM_AMIGA_3_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
315 RN_LDS_000 3 30 3 1 3 30 -1 14 0 21
|
|
314 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
312 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
311 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 6 1 6 -1 -1 2 0 21
|
|
302 inst_RISING_CLK_AMIGA 3 -1 4 1 1 -1 -1 1 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 7 0 2 3 4 5 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 5 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 1 3 5 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
82 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 312 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 315 3 0 30 -1 14 0 21
|
|
31 UDS_000 5 314 3 0 31 -1 10 0 21
|
|
32 AS_000 5 313 3 0 32 -1 3 0 21
|
|
8 IPL_030_2_ 5 311 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
307 SM_AMIGA_4_ 3 -1 0 5 0 2 3 5 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_0_ 3 -1 0 5 0 2 3 5 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 4 0 21
|
|
295 cpu_est_3_ 3 -1 2 4 0 2 5 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 4 0 2 5 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 0 4 0 3 5 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 5 3 0 3 5 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 2 3 0 2 5 -1 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 5 3 3 5 7 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 2 3 0 2 5 -1 -1 3 1 21
|
|
309 SM_AMIGA_5_ 3 -1 5 3 0 5 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_2_ 3 -1 7 3 0 2 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 4 3 2 4 6 -1 -1 1 0 21
|
|
313 RN_AS_000 3 32 3 2 3 5 32 -1 3 0 21
|
|
310 SM_AMIGA_3_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
315 RN_LDS_000 3 30 3 1 3 30 -1 14 0 21
|
|
314 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
312 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
311 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 6 1 6 -1 -1 2 0 21
|
|
302 inst_RISING_CLK_AMIGA 3 -1 4 1 1 -1 -1 1 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 7 0 2 3 4 5 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 5 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 1 3 5 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
82 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 312 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 315 3 0 30 -1 14 0 21
|
|
31 UDS_000 5 314 3 0 31 -1 10 0 21
|
|
32 AS_000 5 313 3 0 32 -1 3 0 21
|
|
8 IPL_030_2_ 5 311 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
307 SM_AMIGA_4_ 3 -1 0 5 0 2 3 5 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_0_ 3 -1 0 5 0 2 3 5 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 4 0 21
|
|
295 cpu_est_3_ 3 -1 2 4 0 2 5 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 4 0 2 5 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 0 4 0 3 5 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 5 3 0 3 5 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 2 3 0 2 5 -1 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 5 3 3 5 7 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 2 3 0 2 5 -1 -1 3 1 21
|
|
309 SM_AMIGA_5_ 3 -1 5 3 0 5 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_2_ 3 -1 7 3 0 2 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 4 3 2 4 6 -1 -1 1 0 21
|
|
313 RN_AS_000 3 32 3 2 3 5 32 -1 3 0 21
|
|
310 SM_AMIGA_3_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
315 RN_LDS_000 3 30 3 1 3 30 -1 14 0 21
|
|
314 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
312 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
311 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 6 1 6 -1 -1 2 0 21
|
|
302 inst_RISING_CLK_AMIGA 3 -1 4 1 1 -1 -1 1 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 7 0 2 3 4 5 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 5 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 1 3 5 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
89 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 4 0 21
|
|
32 AS_000 5 318 3 0 32 -1 3 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
310 SM_AMIGA_4_ 3 -1 0 5 0 2 3 5 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_7_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_2_ 3 -1 0 4 0 2 5 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_1_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 5 3 0 3 5 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 0 5 6 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 6 3 0 5 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 3 0 5 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_5_ 3 -1 5 3 0 5 7 -1 -1 2 0 21
|
|
320 RN_LDS_000 3 30 3 2 2 3 30 -1 4 0 21
|
|
312 CLK_CNT_1_ 3 -1 2 2 1 2 -1 -1 4 0 21
|
|
318 RN_AS_000 3 32 3 2 3 5 32 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
311 CLK_CNT_0_ 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
299 inst_BGACK_030_INTreg 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 4 2 0 1 -1 -1 1 0 21
|
|
303 CLK_REF_1_ 3 -1 7 2 1 2 -1 -1 1 0 20
|
|
302 CLK_REF_0_ 3 -1 4 2 1 2 -1 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
315 LDS_000_0 3 -1 2 1 3 -1 -1 10 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 1 1 6 -1 -1 4 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
301 inst_VMA_INT_D 3 -1 0 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
10 CLK_000 1 -1 -1 7 0 2 3 4 5 6 7 10 -1
|
|
85 RST 1 -1 -1 6 0 1 3 4 5 7 85 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 4 1 2 3 5 63 -1
|
|
13 CPU_SPACE 1 -1 -1 4 2 3 5 7 13 -1
|
|
70 RW 1 -1 -1 3 2 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 2 3 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 2 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 2 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
89 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 0 1 29 -1 1 0 21
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 9 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 4 0 21
|
|
32 AS_000 5 318 3 0 32 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
310 SM_AMIGA_4_ 3 -1 0 5 0 1 2 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 7 4 0 2 3 7 -1 -1 4 0 21
|
|
295 cpu_est_3_ 3 -1 3 4 0 1 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 7 4 0 1 3 7 -1 -1 3 0 20
|
|
307 SM_AMIGA_0_ 3 -1 3 4 0 2 3 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 0 3 0 1 3 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 3 3 0 1 3 -1 -1 4 0 20
|
|
305 SM_AMIGA_7_ 3 -1 3 3 0 3 7 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 3 3 0 1 3 -1 -1 3 1 20
|
|
306 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
320 RN_LDS_000 3 30 3 2 0 3 30 -1 4 0 21
|
|
312 CLK_CNT_1_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
297 inst_CLK_OUT_PRE 3 -1 7 2 1 6 -1 -1 4 0 20
|
|
318 RN_AS_000 3 32 3 2 0 3 32 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
311 CLK_CNT_0_ 3 -1 7 2 1 7 -1 -1 3 0 20
|
|
313 SM_AMIGA_5_ 3 -1 7 2 0 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
299 inst_BGACK_030_INTreg 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
303 CLK_REF_1_ 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
302 CLK_REF_0_ 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 3 2 3 7 -1 -1 1 0 20
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
315 LDS_000_0 3 -1 0 1 3 -1 -1 10 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
309 inst_RISING_CLK_AMIGA 3 -1 7 1 1 -1 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 1 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 7 60 -1
|
|
85 RST 1 -1 -1 4 0 1 3 7 85 -1
|
|
10 CLK_000 1 -1 -1 4 0 1 3 7 10 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 0 3 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 1 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 0 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 0 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
89 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 0 1 29 -1 1 0 21
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 9 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 4 0 21
|
|
32 AS_000 5 318 3 0 32 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
310 SM_AMIGA_4_ 3 -1 0 5 0 1 2 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 7 4 0 2 3 7 -1 -1 4 0 21
|
|
295 cpu_est_3_ 3 -1 3 4 0 1 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 7 4 0 1 3 7 -1 -1 3 0 20
|
|
307 SM_AMIGA_0_ 3 -1 3 4 0 2 3 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 0 3 0 1 3 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 3 3 0 1 3 -1 -1 4 0 20
|
|
305 SM_AMIGA_7_ 3 -1 3 3 0 3 7 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 3 3 0 1 3 -1 -1 3 1 20
|
|
306 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
320 RN_LDS_000 3 30 3 2 0 3 30 -1 4 0 21
|
|
312 CLK_CNT_1_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
297 inst_CLK_OUT_PRE 3 -1 7 2 1 6 -1 -1 4 0 20
|
|
318 RN_AS_000 3 32 3 2 0 3 32 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
311 CLK_CNT_0_ 3 -1 7 2 1 7 -1 -1 3 0 20
|
|
313 SM_AMIGA_5_ 3 -1 7 2 0 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
299 inst_BGACK_030_INTreg 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
303 CLK_REF_1_ 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
302 CLK_REF_0_ 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 3 2 3 7 -1 -1 1 0 20
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
315 LDS_000_0 3 -1 0 1 3 -1 -1 10 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
309 inst_RISING_CLK_AMIGA 3 -1 7 1 1 -1 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 1 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 7 60 -1
|
|
85 RST 1 -1 -1 4 0 1 3 7 85 -1
|
|
10 CLK_000 1 -1 -1 4 0 1 3 7 10 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 0 3 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 1 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 0 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 0 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 4 0 21
|
|
32 AS_000 5 318 3 0 32 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 7 4 2 3 6 7 -1 -1 4 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 4 2 3 6 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_0_ 3 -1 3 4 2 3 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
295 cpu_est_3_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 3 2 3 7 -1 -1 6 0 21
|
|
321 RN_LDS_000 3 30 3 2 3 6 30 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 7 -1 -1 4 0 20
|
|
300 cpu_est_2_ 3 -1 3 2 3 7 -1 -1 3 1 20
|
|
297 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 7 -1 -1 3 0 20
|
|
311 CLK_CNT_1_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
310 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 2 0 20
|
|
307 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
299 inst_BGACK_030_INTreg 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
302 CLK_REF_0_ 3 -1 7 2 1 6 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
314 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_AS_000 3 32 3 1 3 32 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 1 1 -1 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 3 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 3 1 3 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
63 CLK_030 1 -1 -1 3 3 6 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 1 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 7 1 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
32 AS_000 5 305 3 0 32 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 7 1 21
|
|
309 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 7 1 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
32 AS_000 5 305 3 0 32 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 7 1 21
|
|
309 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 7 1 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
32 AS_000 5 305 3 0 32 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 7 1 21
|
|
309 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 7 1 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
32 AS_000 5 305 3 0 32 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 7 1 21
|
|
309 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 7 1 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
32 AS_000 5 305 3 0 32 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 7 1 21
|
|
309 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 7 1 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
32 AS_000 5 305 3 0 32 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 4 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 7 1 21
|
|
309 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 7 1 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
32 AS_000 5 305 3 0 32 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 20
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 7 1 21
|
|
309 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 9 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 5 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
32 AS_000 5 305 3 0 32 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 3 0 21
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 20
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
309 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 2 3 7 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
74 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 4 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 6 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
32 AS_000 5 305 3 0 32 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 0 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 21
|
|
301 inst_SM_AMIGA_ENABLE 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 21
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 3 2 3 6 -1 -1 2 1 20
|
|
295 inst_VPA_SYNC 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
305 RN_AS_000 3 32 3 1 3 32 -1 3 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
74 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 4 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 6 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
32 AS_000 5 305 3 0 32 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 0 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 4 0 21
|
|
301 inst_SM_AMIGA_ENABLE 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 3 0 21
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 3 2 3 6 -1 -1 2 1 20
|
|
295 inst_VPA_SYNC 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
305 RN_AS_000 3 32 3 1 3 32 -1 3 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
74 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 4 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 6 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
32 AS_000 5 305 3 0 32 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 5 0 21
|
|
301 inst_SM_AMIGA_ENABLE 3 -1 6 3 3 6 7 -1 -1 5 0 20
|
|
303 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 4 0 21
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 3 2 3 6 -1 -1 2 1 20
|
|
295 inst_VPA_SYNC 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
305 RN_AS_000 3 32 3 1 3 32 -1 3 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
74 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 4 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 6 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 3 0 21
|
|
32 AS_000 5 305 3 0 32 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 3 3 3 6 7 -1 -1 5 0 21
|
|
301 inst_SM_AMIGA_ENABLE 3 -1 6 3 3 6 7 -1 -1 5 0 20
|
|
303 SM_AMIGA_1_ 3 -1 3 3 3 6 7 -1 -1 4 0 21
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 3 2 3 6 -1 -1 2 1 20
|
|
295 inst_VPA_SYNC 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
305 RN_AS_000 3 32 3 1 3 32 -1 3 0 21
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 6 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
32 AS_000 5 306 3 0 32 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 inst_SM_AMIGA_ENABLE 3 -1 6 3 3 6 7 -1 -1 6 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 5 0 20
|
|
304 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
310 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 7 2 6 7 -1 -1 3 0 20
|
|
298 CLK_CNT_1_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
299 inst_CLK_000_D 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
295 inst_VPA_SYNC 3 -1 3 1 6 -1 -1 1 0 20
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
60 CLK_OSZI 9 -1 2 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 3 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
74 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 6 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
32 AS_000 5 305 3 0 32 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
301 inst_SM_AMIGA_ENABLE 3 -1 6 3 3 6 7 -1 -1 6 0 20
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 5 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
309 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 7 2 6 7 -1 -1 3 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
297 inst_CLK_000_D 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
299 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
295 inst_VPA_SYNC 3 -1 3 1 6 -1 -1 1 0 20
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 3 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
74 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 6 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
32 AS_000 5 305 3 0 32 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
301 inst_SM_AMIGA_ENABLE 3 -1 6 3 3 6 7 -1 -1 7 0 20
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 5 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
309 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 7 2 6 7 -1 -1 3 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
297 inst_CLK_000_D 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
299 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
295 inst_VPA_SYNC 3 -1 3 1 6 -1 -1 1 0 20
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 3 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
74 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 6 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
32 AS_000 5 305 3 0 32 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
301 inst_SM_AMIGA_ENABLE 3 -1 6 3 3 6 7 -1 -1 7 0 20
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 5 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
299 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
297 inst_CLK_000_D 3 -1 3 1 6 -1 -1 1 0 20
|
|
295 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 20
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
60 CLK_OSZI 9 -1 1 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 4 0 21
|
|
32 AS_000 5 319 3 0 32 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 1 5 1 2 3 6 7 -1 -1 4 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 4 2 3 6 7 -1 -1 4 0 21
|
|
293 cpu_est_0_ 3 -1 7 4 1 3 6 7 -1 -1 3 0 20
|
|
306 SM_AMIGA_0_ 3 -1 3 4 2 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 3 1 3 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 3 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 3 2 1 3 -1 -1 6 0 21
|
|
321 RN_LDS_000 3 30 3 2 3 6 30 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
312 SM_AMIGA_5_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
307 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
299 inst_BGACK_030_INTreg 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
302 CLK_REF_0_ 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
314 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
301 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 1 3 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 3 1 3 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
63 CLK_030 1 -1 -1 3 3 6 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
53 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
28 BG_000 5 314 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 6 0 20
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
311 SM_AMIGA_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
299 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 3 1 20
|
|
295 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
312 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
304 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
314 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
296 inst_AS_000_INT 3 -1 6 1 6 -1 -1 3 0 20
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
308 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
307 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 3 1 1 -1 -1 1 0 20
|
|
301 CLK_REF_0_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 3 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
85 RST 1 -1 -1 3 1 3 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 6 81 -1
|
|
63 CLK_030 1 -1 -1 2 3 6 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 6 13 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
29 DTACK 1 -1 -1 1 3 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 4 0 21
|
|
32 AS_000 5 319 3 0 32 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 1 5 1 2 3 6 7 -1 -1 4 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 4 2 3 6 7 -1 -1 4 0 21
|
|
293 cpu_est_0_ 3 -1 7 4 1 3 6 7 -1 -1 3 0 20
|
|
306 SM_AMIGA_0_ 3 -1 3 4 2 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 3 1 3 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 3 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 3 2 1 3 -1 -1 6 0 21
|
|
321 RN_LDS_000 3 30 3 2 3 6 30 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
312 SM_AMIGA_5_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
307 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
299 inst_BGACK_030_INTreg 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
302 CLK_REF_0_ 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
314 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
301 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 1 3 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 3 1 3 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
63 CLK_030 1 -1 -1 3 3 6 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
81 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 308 7 1 3 80 -1 3 1 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
30 LDS_000 5 311 3 0 30 -1 13 0 21
|
|
21 AVEC_EXP 5 313 2 0 21 -1 6 0 21
|
|
31 UDS_000 5 310 3 0 31 -1 5 1 21
|
|
32 AS_000 5 309 3 0 32 -1 3 1 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
28 BG_000 5 312 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 307 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 315 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 314 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
299 inst_CLK_000_D 3 -1 4 5 0 2 3 5 7 -1 -1 1 0 21
|
|
313 RN_AVEC_EXP 3 21 2 4 2 3 5 7 21 -1 6 0 21
|
|
296 SM_AMIGA_1_ 3 -1 2 4 2 3 5 7 -1 -1 4 0 21
|
|
297 SM_AMIGA_2_ 3 -1 2 4 2 3 5 7 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 5 4 0 2 5 6 -1 -1 3 0 21
|
|
298 inst_VMA_INT 3 -1 5 3 2 3 5 -1 -1 10 0 21
|
|
294 cpu_est_1_ 3 -1 5 3 0 2 5 -1 -1 4 0 21
|
|
302 cpu_est_2_ 3 -1 0 3 0 2 5 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 0 3 0 2 5 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 1 6 -1 -1 2 0 21
|
|
309 RN_AS_000 3 32 3 2 3 5 32 -1 3 1 21
|
|
305 CLK_CNT_0_ 3 -1 6 2 4 6 -1 -1 2 0 21
|
|
301 inst_BGACK_030_INTreg 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
306 CLK_CNT_1_ 3 -1 4 2 0 6 -1 -1 1 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 0 2 1 6 -1 -1 1 0 21
|
|
311 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
310 RN_UDS_000 3 31 3 1 3 31 -1 5 1 21
|
|
308 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 1 21
|
|
315 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
314 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
312 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
307 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
303 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 2 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 3 0 4 5 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 2 3 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 6 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
81 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 308 7 1 3 80 -1 3 1 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
30 LDS_000 5 311 3 0 30 -1 13 0 21
|
|
21 AVEC_EXP 5 313 2 0 21 -1 6 0 21
|
|
31 UDS_000 5 310 3 0 31 -1 5 1 21
|
|
32 AS_000 5 309 3 0 32 -1 3 1 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
28 BG_000 5 312 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 307 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 315 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 314 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
299 inst_CLK_000_D 3 -1 4 5 0 2 3 5 7 -1 -1 1 0 21
|
|
313 RN_AVEC_EXP 3 21 2 4 2 3 5 7 21 -1 6 0 21
|
|
296 SM_AMIGA_1_ 3 -1 2 4 2 3 5 7 -1 -1 4 0 21
|
|
297 SM_AMIGA_2_ 3 -1 2 4 2 3 5 7 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 5 4 0 2 5 6 -1 -1 3 0 21
|
|
298 inst_VMA_INT 3 -1 5 3 2 3 5 -1 -1 10 0 21
|
|
294 cpu_est_1_ 3 -1 5 3 0 2 5 -1 -1 4 0 21
|
|
302 cpu_est_2_ 3 -1 0 3 0 2 5 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 0 3 0 2 5 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 1 6 -1 -1 2 0 21
|
|
309 RN_AS_000 3 32 3 2 3 5 32 -1 3 1 21
|
|
305 CLK_CNT_0_ 3 -1 6 2 4 6 -1 -1 2 0 21
|
|
301 inst_BGACK_030_INTreg 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
306 CLK_CNT_1_ 3 -1 4 2 0 6 -1 -1 1 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 0 2 1 6 -1 -1 1 0 21
|
|
311 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
310 RN_UDS_000 3 31 3 1 3 31 -1 5 1 21
|
|
308 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 1 21
|
|
315 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
314 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
312 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
307 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
303 inst_VMA_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 2 5 40 162
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 3 0 4 5 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 2 3 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 6 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
85 RST 1 -1 -1 1 1 85 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
310 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
310 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 9 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
309 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
310 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 4 0 21
|
|
32 AS_000 5 318 3 0 32 -1 3 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
308 SM_AMIGA_4_ 3 -1 7 4 0 2 3 7 -1 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 4 0 2 3 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_0_ 3 -1 3 4 0 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 3 0 3 7 -1 -1 3 0 21
|
|
295 cpu_est_3_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
304 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 0 3 0 1 6 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 7 2 3 7 -1 -1 6 0 21
|
|
320 RN_LDS_000 3 30 3 2 0 3 30 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 7 -1 -1 4 0 20
|
|
318 RN_AS_000 3 32 3 2 3 7 32 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 7 2 3 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 7 2 3 7 -1 -1 3 0 20
|
|
311 SM_AMIGA_5_ 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
299 inst_BGACK_030_INTreg 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 7 2 3 7 -1 -1 1 0 20
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
313 LDS_000_0 3 -1 0 1 3 -1 -1 10 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
310 CLK_CNT_1_ 3 -1 3 1 0 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 1 1 -1 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 7 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 3 7 60 -1
|
|
85 RST 1 -1 -1 3 1 3 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 3 0 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 0 3 68 -1
|
|
63 CLK_030 1 -1 -1 2 0 3 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 1 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 0 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 0 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 4 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 6 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
32 AS_000 5 305 3 0 32 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 4 0 3 6 7 -1 -1 5 0 20
|
|
301 inst_SM_AMIGA_ENABLE 3 -1 3 4 0 3 6 7 -1 -1 5 0 21
|
|
303 SM_AMIGA_1_ 3 -1 0 4 0 3 6 7 -1 -1 4 0 21
|
|
297 inst_CLK_000_D 3 -1 6 4 0 3 6 7 -1 -1 1 0 21
|
|
309 RN_E 3 65 6 3 0 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
298 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
296 inst_VMA_INT 3 -1 3 3 0 3 6 -1 -1 2 1 20
|
|
295 inst_VPA_SYNC 3 -1 6 3 0 3 6 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
305 RN_AS_000 3 32 3 1 3 32 -1 3 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
81 AS_030 1 -1 7 2 3 6 81 -1
|
|
70 RW 1 -1 6 1 4 70 -1
|
|
288 inst_AS_030_D 8 81 7 3 3 6 7 81 189
|
|
258 inst_DTACK_D 8 29 3 3 0 3 6 29 159
|
|
283 inst_RW_D 8 70 6 1 3 70 184
|
|
63 CLK_030 9 -1 3 0 3 6 63 -1
|
|
10 CLK_000 9 -1 1 6 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 7 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 4 0 3 6 7 -1 -1 5 0 20
|
|
303 SM_AMIGA_1_ 3 -1 0 4 0 3 6 7 -1 -1 4 0 21
|
|
301 inst_SM_AMIGA_ENABLE 3 -1 3 3 0 3 6 -1 -1 5 0 21
|
|
309 RN_E 3 65 6 3 0 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
298 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
296 inst_VMA_INT 3 -1 3 3 0 3 6 -1 -1 2 1 20
|
|
297 inst_CLK_000_D 3 -1 6 3 0 3 6 -1 -1 1 0 21
|
|
295 inst_VPA_SYNC 3 -1 6 3 0 3 6 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
305 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
81 AS_030 1 -1 7 2 3 6 81 -1
|
|
70 RW 1 -1 6 1 4 70 -1
|
|
288 inst_AS_030_D 8 81 7 3 3 6 7 81 189
|
|
258 inst_DTACK_D 8 29 3 3 0 3 6 29 159
|
|
283 inst_RW_D 8 70 6 1 3 70 184
|
|
63 CLK_030 9 -1 3 0 3 6 63 -1
|
|
10 CLK_000 9 -1 1 6 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 3 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 7 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
296 inst_VMA_INT 3 -1 0 4 0 3 6 7 -1 -1 2 1 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 5 0 20
|
|
301 inst_SM_AMIGA_ENABLE 3 -1 6 3 3 6 7 -1 -1 5 0 20
|
|
309 RN_E 3 65 6 3 0 6 7 65 -1 4 0 21
|
|
303 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 7 3 0 6 7 -1 -1 4 0 20
|
|
298 cpu_est_2_ 3 -1 7 3 0 6 7 -1 -1 3 0 20
|
|
297 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
295 inst_VPA_SYNC 3 -1 3 3 0 6 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 7 3 0 6 7 -1 -1 1 0 20
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
305 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
81 AS_030 1 -1 7 2 0 3 81 -1
|
|
70 RW 1 -1 6 1 4 70 -1
|
|
288 inst_AS_030_D 8 81 7 3 3 6 7 81 189
|
|
258 inst_DTACK_D 8 29 3 2 6 7 29 159
|
|
283 inst_RW_D 8 70 6 1 3 70 184
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
10 CLK_000 9 -1 1 6 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 3 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 4 0 21
|
|
32 AS_000 5 319 3 0 32 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
296 inst_VMA_INT 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
308 SM_AMIGA_4_ 3 -1 1 4 1 2 3 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 4 2 3 6 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_0_ 3 -1 3 4 2 3 6 7 -1 -1 2 0 21
|
|
294 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 3 1 3 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 3 3 1 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
321 RN_LDS_000 3 30 3 2 3 6 30 -1 4 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
299 inst_BGACK_030_INTreg 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
314 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 1 1 1 -1 -1 3 1 20
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 CLK_REF_0_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 4 1 3 6 7 10 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
63 CLK_030 1 -1 -1 3 3 6 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 4 0 21
|
|
32 AS_000 5 318 3 0 32 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 7 4 2 3 6 7 -1 -1 4 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 4 2 3 6 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_0_ 3 -1 3 4 2 3 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
295 cpu_est_3_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 3 2 3 7 -1 -1 6 0 21
|
|
321 RN_LDS_000 3 30 3 2 3 6 30 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 7 -1 -1 4 0 20
|
|
300 cpu_est_2_ 3 -1 3 2 3 7 -1 -1 3 1 20
|
|
297 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 7 -1 -1 3 0 20
|
|
311 CLK_CNT_1_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
310 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 2 0 20
|
|
307 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
299 inst_BGACK_030_INTreg 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
302 CLK_REF_0_ 3 -1 7 2 1 6 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
314 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_AS_000 3 32 3 1 3 32 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 1 1 -1 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 3 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 3 1 3 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
63 CLK_030 1 -1 -1 3 3 6 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 1 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 10 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 4 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 4 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 4 0 21
|
|
32 AS_000 5 317 3 0 32 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 20
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 2 0 20
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
309 SM_AMIGA_4_ 3 -1 1 5 1 2 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_6_ 3 -1 3 4 2 3 6 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_0_ 3 -1 3 4 2 3 6 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 6 3 1 3 6 -1 -1 6 0 20
|
|
311 CLK_CNT_1_ 3 -1 7 3 1 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 20
|
|
310 CLK_CNT_0_ 3 -1 7 3 1 6 7 -1 -1 3 0 20
|
|
304 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 3 3 1 3 6 -1 -1 3 1 20
|
|
295 cpu_est_3_ 3 -1 3 3 1 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
302 CLK_REF_1_ 3 -1 3 3 1 6 7 -1 -1 1 0 20
|
|
301 CLK_REF_0_ 3 -1 7 3 1 6 7 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 2 3 6 30 -1 4 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 1 2 1 7 -1 -1 3 0 20
|
|
312 SM_AMIGA_5_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
298 inst_BGACK_030_INTreg 3 -1 1 2 1 3 -1 -1 2 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
314 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 20
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 20
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 20
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 1 1 -1 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
297 inst_CLK_000_D 3 -1 7 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 4 1 3 6 7 10 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
63 CLK_030 1 -1 -1 3 3 6 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 1 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
310 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
79 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 309 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 312 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 311 3 0 31 -1 9 0 21
|
|
65 E 5 314 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 315 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 310 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 313 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 0 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
307 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
315 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
310 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
304 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
300 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
312 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
311 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
314 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
309 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
305 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
313 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
306 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 SM_AMIGA_LAST_1_ 3 -1 3 1 0 -1 -1 1 0 20
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
298 inst_DTACK_SYNC_D 3 -1 6 1 7 -1 -1 1 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 1 6 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
63 CLK_030 9 -1 4 0 3 6 7 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
79 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 309 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 312 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 311 3 0 31 -1 9 0 21
|
|
65 E 5 314 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 315 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 310 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 313 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 0 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
307 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
315 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
310 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
304 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
300 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
312 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
311 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
314 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
309 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
305 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
313 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
306 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 SM_AMIGA_LAST_1_ 3 -1 3 1 0 -1 -1 1 0 20
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
298 inst_DTACK_SYNC_D 3 -1 6 1 7 -1 -1 1 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 1 6 -1 -1 1 0 21
|
|
296 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
63 CLK_030 9 -1 3 3 6 7 63 -1
|
|
60 CLK_OSZI 9 -1 1 0 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
79 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 309 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 312 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 311 3 0 31 -1 9 0 21
|
|
65 E 5 314 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 315 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 310 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 313 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 0 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
304 inst_AS_AMIGA_ENABLE 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
307 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
315 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
310 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
300 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
297 inst_DTACK_SYNC 3 -1 7 2 6 7 -1 -1 2 0 21
|
|
298 inst_DTACK_SYNC_D 3 -1 6 2 6 7 -1 -1 1 0 20
|
|
312 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
311 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
314 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
309 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
305 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
313 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
306 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 SM_AMIGA_LAST_1_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
296 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
295 SM_AMIGA_LAST_0_ 3 -1 3 1 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
63 CLK_030 9 -1 2 3 6 63 -1
|
|
60 CLK_OSZI 9 -1 2 6 7 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 309 3 0 31 -1 9 0 21
|
|
65 E 5 312 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 308 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 311 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 0 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
305 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
306 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
308 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
299 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
310 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
309 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
312 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
311 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
304 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
297 inst_DTACK_SYNC_D 3 -1 6 1 7 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
63 CLK_030 9 -1 3 3 6 7 63 -1
|
|
10 CLK_000 9 -1 2 3 6 10 -1
|
|
60 CLK_OSZI 9 -1 1 6 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
77 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 307 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 310 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 309 3 0 31 -1 9 0 21
|
|
65 E 5 312 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 313 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 308 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 311 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
305 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
306 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
313 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
308 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
302 inst_AS_AMIGA_ENABLE 3 -1 3 2 3 7 -1 -1 2 0 20
|
|
301 inst_DTACK_SYNC 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
298 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
296 inst_DTACK_SYNC_D 3 -1 6 2 3 7 -1 -1 1 0 20
|
|
310 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
309 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
312 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
307 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
304 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 20
|
|
297 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 2 6 7 60 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 305 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 308 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 307 3 0 31 -1 9 0 21
|
|
65 E 5 310 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 306 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 309 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
306 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
308 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
307 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
310 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
305 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
302 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 9 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
309 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 7 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 9 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 305 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
309 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
75 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 2 0 21
|
|
32 AS_000 5 305 3 1 7 32 -1 2 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 9 0 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 310 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 20
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
29 DTACK 5 -1 3 0 29 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 20
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
301 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
310 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 1 20
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
309 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 1 0 20
|
|
295 inst_AS_000_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
258 inst_DTACK_SYNC 8 29 3 1 6 29 159
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
63 CLK_030 9 -1 1 3 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 6 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
40 VPA 1 -1 -1 1 6 40 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
32 AS_000 5 316 3 0 32 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 1 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
308 SM_AMIGA_4_ 3 -1 6 5 1 2 3 6 7 -1 -1 4 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 4 1 2 3 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_0_ 3 -1 3 4 1 2 3 7 -1 -1 2 0 21
|
|
296 inst_VMA_INT 3 -1 3 3 3 6 7 -1 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 20
|
|
303 SM_AMIGA_7_ 3 -1 3 3 1 3 7 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 1 20
|
|
295 cpu_est_3_ 3 -1 3 3 1 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 3 0 20
|
|
304 SM_AMIGA_1_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D 3 -1 3 3 1 3 7 -1 -1 1 0 20
|
|
318 RN_LDS_000 3 30 3 2 1 3 30 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
322 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 1 21
|
|
311 SM_AMIGA_5_ 3 -1 7 2 6 7 -1 -1 2 0 21
|
|
310 CLK_CNT_1_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
309 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
306 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
298 inst_BGACK_030_INTreg 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
301 CLK_REF_0_ 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
313 LDS_000_0 3 -1 1 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_AS_000 3 32 3 1 3 32 -1 3 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 3 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 4 1 3 6 7 10 -1
|
|
81 AS_030 1 -1 -1 3 1 3 7 81 -1
|
|
70 RW 1 -1 -1 3 1 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 1 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 1 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 1 3 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 1 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 1 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 10 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 4 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 4 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 4 0 21
|
|
32 AS_000 5 319 3 0 32 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 20
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 20
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 4 1 2 3 6 -1 -1 4 0 20
|
|
303 SM_AMIGA_6_ 3 -1 7 4 2 3 6 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_0_ 3 -1 3 4 2 3 6 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_VMA_INT 3 -1 6 3 1 3 6 -1 -1 6 0 20
|
|
310 CLK_CNT_1_ 3 -1 7 3 1 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 20
|
|
309 CLK_CNT_0_ 3 -1 7 3 1 6 7 -1 -1 3 0 20
|
|
304 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 3 3 1 3 6 -1 -1 3 1 20
|
|
295 cpu_est_3_ 3 -1 3 3 1 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
302 CLK_REF_1_ 3 -1 7 3 1 6 7 -1 -1 1 0 20
|
|
301 CLK_REF_0_ 3 -1 3 3 1 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 2 3 6 30 -1 4 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 2 1 7 -1 -1 3 0 20
|
|
313 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
298 inst_BGACK_030_INTreg 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
314 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 20
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 20
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 20
|
|
300 inst_VMA_INT_D 3 -1 1 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
63 CLK_030 1 -1 -1 3 3 6 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
86 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 313 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
31 UDS_000 5 315 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 316 3 0 30 -1 4 0 21
|
|
32 AS_000 5 314 3 0 32 -1 3 0 21
|
|
28 BG_000 5 317 3 0 28 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 320 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 312 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
307 SM_AMIGA_4_ 3 -1 7 4 2 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_0_ 3 -1 7 4 2 3 6 7 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 3 2 3 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 3 0 21
|
|
295 cpu_est_3_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
304 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
296 inst_VMA_INT 3 -1 7 2 3 7 -1 -1 6 0 21
|
|
316 RN_LDS_000 3 30 3 2 3 6 30 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 7 -1 -1 4 0 20
|
|
314 RN_AS_000 3 32 3 2 3 7 32 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 3 2 3 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 7 -1 -1 3 0 20
|
|
320 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
298 inst_BGACK_030_INTreg 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
315 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
311 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
317 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
312 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 3 1 1 -1 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 7 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 7 60 -1
|
|
85 RST 1 -1 -1 3 1 3 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
63 CLK_030 1 -1 -1 2 3 6 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
27 BGACK_000 1 -1 -1 2 1 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
84 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 311 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 314 3 0 30 -1 14 0 21
|
|
31 UDS_000 5 313 3 0 31 -1 10 0 21
|
|
32 AS_000 5 312 3 0 32 -1 3 0 21
|
|
28 BG_000 5 315 3 0 28 -1 3 0 21
|
|
64 CLK_DIV_OUT 5 318 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 310 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 0 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 3 4 2 3 6 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_4_ 3 -1 6 3 2 3 6 -1 -1 4 0 20
|
|
301 SM_AMIGA_6_ 3 -1 3 3 2 3 7 -1 -1 4 0 21
|
|
302 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 6 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
312 RN_AS_000 3 32 3 2 3 6 32 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
298 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
295 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
318 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
309 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 7 2 6 7 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
314 RN_LDS_000 3 30 3 1 3 30 -1 14 0 21
|
|
313 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
315 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
311 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
310 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 6 1 1 -1 -1 1 0 21
|
|
299 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
86 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 312 7 1 3 80 -1 3 0 21
|
|
31 UDS_000 5 314 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 315 3 0 30 -1 4 0 21
|
|
32 AS_000 5 313 3 0 32 -1 3 0 21
|
|
28 BG_000 5 316 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 317 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 320 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 311 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 4 2 3 6 7 -1 -1 4 0 21
|
|
301 SM_AMIGA_6_ 3 -1 3 3 2 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 7 3 2 3 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
296 inst_VMA_INT 3 -1 3 2 3 6 -1 -1 6 0 21
|
|
315 RN_LDS_000 3 30 3 2 3 7 30 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
308 SM_AMIGA_3_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 2 3 7 -1 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
295 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
320 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
317 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
309 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
305 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
314 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
310 LDS_000_0 3 -1 7 1 3 -1 -1 10 0 21
|
|
316 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 RN_AS_000 3 32 3 1 3 32 -1 3 0 21
|
|
312 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
311 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
299 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 3 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
68 A_0_ 1 -1 -1 2 3 7 68 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 7 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 7 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 3 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 5 1 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 312 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 314 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 313 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
307 SM_AMIGA_4_ 3 -1 6 5 1 2 3 6 7 -1 -1 4 0 20
|
|
305 SM_AMIGA_0_ 3 -1 7 4 1 2 3 7 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 3 2 3 7 -1 -1 4 0 21
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_5_ 3 -1 7 3 1 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 3 2 3 6 -1 -1 6 0 21
|
|
318 RN_LDS_000 3 30 3 2 3 7 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
310 SM_AMIGA_3_ 3 -1 3 2 3 7 -1 -1 3 0 21
|
|
303 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
295 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 7 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 1 21
|
|
316 RN_AS_000 3 32 3 1 3 32 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
313 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
312 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 3 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
68 A_0_ 1 -1 -1 2 3 7 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 7 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 7 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 5 1 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 312 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 314 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 313 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
307 SM_AMIGA_4_ 3 -1 1 5 1 2 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_0_ 3 -1 7 5 1 2 3 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 7 4 1 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 6 3 1 3 6 -1 -1 6 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 3 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 7 3 1 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 7 3 1 6 7 -1 -1 3 1 20
|
|
295 cpu_est_3_ 3 -1 1 3 1 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 7 3 1 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_5_ 3 -1 3 3 1 3 7 -1 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
310 SM_AMIGA_3_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 1 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
313 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
312 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 1 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_2_ 3 -1 3 3 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 1 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 6 0 20
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
310 SM_AMIGA_3_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 2 2 3 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 1 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_VMA_INT 3 -1 6 3 1 3 6 -1 -1 6 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
318 RN_LDS_000 3 30 3 2 1 3 30 -1 4 1 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 3 2 2 3 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 1 1 3 -1 -1 10 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 1 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 1 3 4 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 1 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 1 3 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 1 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 1 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
308 SM_AMIGA_3_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 1 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 6 0 20
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 2 3 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 3 2 2 3 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 1 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_2_ 3 -1 3 3 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 1 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 6 0 20
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
310 SM_AMIGA_3_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 2 2 3 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
10 CLK_000 1 -1 -1 3 1 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_2_ 3 -1 3 3 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 1 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 6 0 20
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
310 SM_AMIGA_3_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 2 2 3 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
10 CLK_000 1 -1 -1 3 1 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_3_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_2_ 3 -1 3 3 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 3 1 3 6 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 6 0 20
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 2 3 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
10 CLK_000 1 -1 -1 3 1 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_3_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_2_ 3 -1 3 3 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 3 1 3 6 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 6 0 20
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 2 3 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
10 CLK_000 1 -1 -1 3 1 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_3_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_2_ 3 -1 3 3 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 3 1 3 6 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 6 0 20
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 2 3 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
10 CLK_000 1 -1 -1 3 1 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_3_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 1 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 6 0 20
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 2 3 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 3 2 2 3 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
10 CLK_000 1 -1 -1 3 1 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_3_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_2_ 3 -1 3 3 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 3 1 3 6 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 6 0 20
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 2 3 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
10 CLK_000 1 -1 -1 3 1 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 6 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 312 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 314 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 313 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
307 SM_AMIGA_3_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_2_ 3 -1 3 3 2 3 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 6 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 6 0 20
|
|
318 RN_LDS_000 3 30 3 2 1 3 30 -1 4 1 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 1 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
313 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
312 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
70 RW 1 -1 -1 4 1 3 4 7 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 1 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 1 3 68 -1
|
|
63 CLK_030 1 -1 -1 2 1 3 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 1 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 1 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 6 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 6 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 312 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 315 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 313 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
306 SM_AMIGA_4_ 3 -1 6 5 1 2 3 6 7 -1 -1 4 0 20
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 6 4 1 2 3 6 -1 -1 3 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
308 SM_AMIGA_3_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 6 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 6 0 20
|
|
318 RN_LDS_000 3 30 3 2 1 3 30 -1 4 1 21
|
|
293 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 3 2 2 3 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 1 1 3 -1 -1 10 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 6 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
315 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
313 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
312 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
70 RW 1 -1 -1 4 1 3 4 7 70 -1
|
|
13 CPU_SPACE 1 -1 -1 4 1 3 6 7 13 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 1 3 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 1 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 1 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 6 0 21
|
|
29 DTACK 5 -1 3 1 3 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 6 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 312 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 314 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 313 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 5 1 2 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 6 3 2 3 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_2_ 3 -1 7 3 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
318 RN_LDS_000 3 30 3 2 3 6 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
310 SM_AMIGA_3_ 3 -1 3 2 3 7 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
316 RN_AS_000 3 32 3 1 3 32 -1 6 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 6 0 21
|
|
297 inst_VMA_INT 3 -1 3 1 3 -1 -1 6 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
313 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
312 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 3 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 3 4 6 7 70 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_3_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_2_ 3 -1 3 3 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 3 1 3 6 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 6 0 20
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 2 3 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
10 CLK_000 1 -1 -1 3 1 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_3_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_2_ 3 -1 3 3 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 3 1 3 6 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 6 0 20
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 2 3 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
10 CLK_000 1 -1 -1 3 1 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_3_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_2_ 3 -1 3 3 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 7 3 1 3 6 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 6 0 20
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 2 3 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
10 CLK_000 1 -1 -1 3 1 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
306 SM_AMIGA_4_ 3 -1 1 5 1 2 3 6 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
293 cpu_est_0_ 3 -1 3 4 1 3 6 7 -1 -1 3 0 20
|
|
298 inst_CLK_000_D 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 7 3 1 3 7 -1 -1 5 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 1 6 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_3_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 3 2 3 6 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 3 1 6 7 -1 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_2_ 3 -1 3 3 2 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 1 0 20
|
|
316 RN_AS_000 3 32 3 2 3 7 32 -1 4 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
296 inst_AS_030_INT 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
305 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 1 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
306 SM_AMIGA_4_ 3 -1 1 5 1 2 3 6 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
293 cpu_est_0_ 3 -1 3 4 1 3 6 7 -1 -1 3 0 20
|
|
298 inst_CLK_000_D 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 7 3 1 3 7 -1 -1 5 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 1 6 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_3_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 3 2 3 6 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 3 1 6 7 -1 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_2_ 3 -1 3 3 2 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 1 0 20
|
|
316 RN_AS_000 3 32 3 2 3 7 32 -1 4 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
296 inst_AS_030_INT 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
305 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 1 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
306 SM_AMIGA_4_ 3 -1 1 5 1 2 3 6 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
293 cpu_est_0_ 3 -1 3 4 1 3 6 7 -1 -1 3 0 20
|
|
298 inst_CLK_000_D 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 7 3 1 3 7 -1 -1 5 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 1 6 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_3_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 3 2 3 6 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 3 1 6 7 -1 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_2_ 3 -1 3 3 2 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 1 0 20
|
|
316 RN_AS_000 3 32 3 2 3 7 32 -1 4 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
296 inst_AS_030_INT 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
305 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 1 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 1 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_1_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_VMA_INT 3 -1 6 3 1 3 6 -1 -1 6 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
318 RN_LDS_000 3 30 3 2 1 3 30 -1 4 1 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 4 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 3 2 2 3 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 1 1 3 -1 -1 10 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 1 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
70 RW 1 -1 -1 4 1 3 4 7 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 1 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 1 3 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 1 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 1 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 12 0 21
|
|
32 AS_000 5 316 3 0 32 -1 4 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
306 SM_AMIGA_4_ 3 -1 1 5 1 2 3 6 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 3 5 1 2 3 6 7 -1 -1 2 0 21
|
|
293 cpu_est_0_ 3 -1 3 4 1 3 6 7 -1 -1 3 0 20
|
|
298 inst_CLK_000_D 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 7 3 1 3 7 -1 -1 5 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 1 6 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_3_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 3 2 3 6 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 3 1 6 7 -1 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_2_ 3 -1 3 3 2 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 1 0 20
|
|
316 RN_AS_000 3 32 3 2 3 7 32 -1 4 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
296 inst_AS_030_INT 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
305 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 12 0 21
|
|
311 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 1 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 312 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 315 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 314 3 0 31 -1 4 0 21
|
|
28 BG_000 5 316 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 317 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 318 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 313 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 311 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
306 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 SM_AMIGA_0_ 3 -1 1 3 1 2 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
308 SM_AMIGA_3_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
303 SM_AMIGA_6_ 3 -1 3 2 2 3 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
317 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
313 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_2_ 3 -1 3 2 2 3 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
315 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
314 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
316 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
312 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
311 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 1 0 21
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
301 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 1 3 6 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 3 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 4 1 2 3 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 3 2 3 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 SM_AMIGA_0_ 3 -1 1 3 1 2 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
308 SM_AMIGA_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_2_ 3 -1 6 2 2 6 -1 -1 2 0 20
|
|
305 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
311 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
297 inst_VMA_INT 3 -1 3 1 3 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 3 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 3 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 4 1 2 3 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 3 2 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
309 SM_AMIGA_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 6 2 2 6 -1 -1 2 0 20
|
|
305 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
307 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
297 inst_VMA_INT 3 -1 3 1 3 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 3 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 4 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 323 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
308 SM_AMIGA_4_ 3 -1 6 5 0 1 2 3 6 -1 -1 4 0 20
|
|
298 inst_CLK_000_D 3 -1 3 4 0 1 3 6 -1 -1 1 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 0 6 -1 -1 4 0 21
|
|
310 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 6 2 0 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
312 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
311 SM_AMIGA_2_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
299 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
323 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
304 inst_CLK_000_DDD 3 -1 6 1 1 -1 -1 1 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 6 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
91 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 4 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
308 SM_AMIGA_4_ 3 -1 6 5 1 2 3 5 6 -1 -1 4 0 20
|
|
298 inst_CLK_000_D 3 -1 3 4 1 3 5 6 -1 -1 1 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 5 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 6 2 5 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 2 5 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 2 5 6 -1 -1 3 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 21
|
|
313 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
299 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
309 inst_CLK_000_DDDD 3 -1 6 1 1 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
304 inst_CLK_000_DDD 3 -1 0 1 6 -1 -1 1 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 1 0 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 5 6 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
85 RST 1 -1 -1 5 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 5 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 0 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 4 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 325 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
308 SM_AMIGA_4_ 3 -1 0 6 0 1 2 3 5 6 -1 -1 4 0 21
|
|
298 inst_CLK_000_D 3 -1 3 5 0 1 3 5 6 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 4 0 3 5 6 -1 -1 4 0 21
|
|
301 cpu_est_2_ 3 -1 6 4 0 3 5 6 -1 -1 3 1 21
|
|
297 inst_VMA_INT 3 -1 5 4 0 3 5 6 -1 -1 3 0 21
|
|
295 cpu_est_3_ 3 -1 3 4 0 3 5 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 3 4 0 3 5 6 -1 -1 3 0 20
|
|
299 SM_AMIGA_1_ 3 -1 6 4 0 1 6 7 -1 -1 2 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 0 2 3 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 3 0 2 6 -1 -1 2 0 20
|
|
311 SM_AMIGA_5_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 3 0 20
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
325 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 inst_CLK_000_DDDDD 3 -1 1 1 6 -1 -1 1 0 20
|
|
309 inst_CLK_000_DDDD 3 -1 1 1 1 -1 -1 1 0 20
|
|
306 SM_AMIGA_7_ 3 -1 0 1 3 -1 -1 1 0 21
|
|
304 inst_CLK_000_DDD 3 -1 1 1 1 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 6 1 1 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 5 6 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 5 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 3 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 4 1 2 3 6 -1 -1 4 0 21
|
|
298 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 3 2 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
309 SM_AMIGA_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 6 2 2 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
307 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
297 inst_VMA_INT 3 -1 3 1 3 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 3 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 4 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 323 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 314 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
307 SM_AMIGA_4_ 3 -1 6 5 0 1 2 3 6 -1 -1 4 0 20
|
|
298 inst_CLK_000_D 3 -1 3 4 0 1 3 6 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 0 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 6 2 0 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
313 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
308 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
309 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
323 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
314 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
299 inst_CLK_000_DDD 3 -1 6 1 7 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 6 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
91 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 4 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
308 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 3 1 2 6 -1 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
298 inst_CLK_000_D 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
310 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
304 inst_CLK_000_DDD 3 -1 0 1 1 -1 -1 1 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 1 0 -1 -1 1 0 20
|
|
299 inst_CLK_000_DDDD 3 -1 1 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 5 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 3 5 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 5 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 4 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 325 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
308 SM_AMIGA_4_ 3 -1 6 5 1 2 3 5 6 -1 -1 4 0 20
|
|
298 inst_CLK_000_D 3 -1 3 5 0 1 3 5 6 -1 -1 1 0 20
|
|
314 SM_AMIGA_2_ 3 -1 0 4 0 1 2 5 -1 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 3 4 1 3 5 6 -1 -1 2 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 2 3 5 -1 -1 3 0 21
|
|
309 SM_AMIGA_1_ 3 -1 1 3 1 5 7 -1 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
315 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
311 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 inst_CLK_000_DDDD 3 -1 6 1 1 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 5 1 3 -1 -1 1 0 21
|
|
304 inst_CLK_000_DDD 3 -1 0 1 6 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 1 0 -1 -1 1 0 20
|
|
299 inst_CLK_000_DDDDD 3 -1 1 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 1 3 6 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 4 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 325 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 3 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 5 1 2 3 5 6 -1 -1 4 0 20
|
|
314 SM_AMIGA_2_ 3 -1 0 4 0 1 2 5 -1 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 3 4 1 3 5 6 -1 -1 2 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 3 2 3 5 -1 -1 3 0 21
|
|
300 SM_AMIGA_1_ 3 -1 1 3 1 5 7 -1 -1 2 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
315 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
310 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
311 inst_CLK_000_DDDD 3 -1 6 1 1 -1 -1 1 0 21
|
|
307 SM_AMIGA_7_ 3 -1 5 1 3 -1 -1 1 0 21
|
|
305 inst_CLK_000_DDD 3 -1 0 1 6 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
301 inst_CLK_000_DD 3 -1 3 1 0 -1 -1 1 0 20
|
|
299 inst_CLK_000_DDDDD 3 -1 1 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 1 3 6 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 3 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 4 1 2 3 6 -1 -1 4 0 21
|
|
298 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 3 2 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
309 SM_AMIGA_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 6 2 2 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
307 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
297 inst_VMA_INT 3 -1 3 1 3 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 3 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
298 inst_CLK_000_D 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
311 SM_AMIGA_0_ 3 -1 6 3 1 2 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 2 2 3 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 7 2 6 7 -1 -1 3 1 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
295 cpu_est_3_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 6 2 2 6 -1 -1 2 0 20
|
|
296 inst_AS_030_INT 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
307 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
13 CPU_SPACE 1 -1 -1 3 1 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
89 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 3 29 -1 1 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 4 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 3 1 2 3 -1 -1 4 0 21
|
|
300 SM_AMIGA_6_ 3 -1 3 3 2 3 6 -1 -1 4 0 21
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
312 SM_AMIGA_0_ 3 -1 6 3 1 2 6 -1 -1 2 0 20
|
|
307 SM_AMIGA_1_ 3 -1 7 3 1 6 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
310 SM_AMIGA_3_ 3 -1 3 2 3 7 -1 -1 3 0 21
|
|
304 inst_AS_000_START 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
297 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
295 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 SM_AMIGA_2_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
305 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
308 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
298 inst_VMA_INT 3 -1 3 1 3 -1 -1 3 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 3 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
89 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
298 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
311 SM_AMIGA_0_ 3 -1 3 3 1 2 3 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 1 3 1 2 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 3 3 1 3 7 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 2 3 -1 -1 4 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
307 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
303 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 inst_AS_000_START 3 -1 3 1 3 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 1 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
89 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 3 29 -1 1 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 3 1 2 3 -1 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 7 3 2 3 7 -1 -1 4 0 21
|
|
295 cpu_est_3_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
311 SM_AMIGA_0_ 3 -1 7 3 1 2 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 3 3 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
298 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 7 2 3 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 7 2 3 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 7 2 3 7 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
312 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
309 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
305 inst_AS_000_START 3 -1 7 1 7 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 3 1 3 -1 -1 3 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 3 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
89 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 3 29 -1 1 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 3 1 2 3 -1 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 7 3 2 3 7 -1 -1 4 0 21
|
|
295 cpu_est_3_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
311 SM_AMIGA_0_ 3 -1 7 3 1 2 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 3 3 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
298 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 7 2 3 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 7 2 3 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 7 2 3 7 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
312 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
309 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
305 inst_AS_000_START 3 -1 7 1 7 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 3 1 3 -1 -1 3 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 3 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
89 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 3 29 -1 1 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 3 1 2 3 -1 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 7 3 2 3 7 -1 -1 4 0 21
|
|
295 cpu_est_3_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
311 SM_AMIGA_0_ 3 -1 7 3 1 2 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 3 3 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
298 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 7 2 3 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 7 2 3 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 7 2 3 7 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
312 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
309 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
305 inst_AS_000_START 3 -1 7 1 7 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 3 1 3 -1 -1 3 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 3 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
89 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 3 29 -1 1 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 3 1 2 3 -1 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 7 3 2 3 7 -1 -1 4 0 21
|
|
295 cpu_est_3_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
311 SM_AMIGA_0_ 3 -1 7 3 1 2 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 3 3 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
298 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 7 2 3 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 7 2 3 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 7 2 3 7 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
312 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
309 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
305 inst_AS_000_START 3 -1 7 1 7 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 3 1 3 -1 -1 3 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 3 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
89 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 3 29 -1 1 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 3 1 2 3 -1 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 7 3 2 3 7 -1 -1 4 0 21
|
|
295 cpu_est_3_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
311 SM_AMIGA_0_ 3 -1 7 3 1 2 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 3 3 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
298 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 7 2 3 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 7 2 3 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 7 2 3 7 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
312 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
309 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
305 inst_AS_000_START 3 -1 7 1 7 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 3 1 3 -1 -1 3 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 3 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
302 SM_AMIGA_6_ 3 -1 1 4 1 2 3 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_2_ 3 -1 1 3 1 2 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
306 SM_AMIGA_1_ 3 -1 1 3 1 6 7 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
295 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
303 SM_AMIGA_7_ 3 -1 6 2 1 3 -1 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
307 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
13 CPU_SPACE 1 -1 -1 4 1 3 6 7 13 -1
|
|
10 CLK_000 1 -1 -1 4 1 3 6 7 10 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 3 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 4 1 2 3 6 -1 -1 4 0 21
|
|
298 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 3 2 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
309 SM_AMIGA_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 6 2 2 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
307 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
297 inst_VMA_INT 3 -1 3 1 3 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 3 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 3 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
307 SM_AMIGA_4_ 3 -1 3 4 1 2 3 6 -1 -1 4 0 21
|
|
298 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 3 2 3 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 7 3 1 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_2_ 3 -1 6 3 2 6 7 -1 -1 2 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
309 SM_AMIGA_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
311 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
297 inst_VMA_INT 3 -1 3 1 3 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 3 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
88 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 3 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 13 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 313 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 312 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
65 E 0 6 0 65 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 4 1 2 3 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 3 2 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
309 SM_AMIGA_3_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
295 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 6 2 2 6 -1 -1 2 0 20
|
|
305 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
307 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
297 inst_VMA_INT 3 -1 3 1 3 -1 -1 3 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
312 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
301 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 3 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 13 0 21
|
|
65 E 5 323 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
299 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
301 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
308 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 1 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 13 0 21
|
|
65 E 5 323 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
307 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 4 1 2 3 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 7 4 1 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
313 SM_AMIGA_2_ 3 -1 6 3 1 2 6 -1 -1 2 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
300 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
308 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
299 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
309 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
305 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 2 1 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 13 0 21
|
|
65 E 5 323 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
299 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
301 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
308 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 1 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 13 0 21
|
|
65 E 5 323 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 SM_AMIGA_2_ 3 -1 1 3 1 2 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
301 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
304 CLK_CNT_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
323 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
308 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 2 1 6 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 13 0 21
|
|
65 E 5 327 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 4 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 326 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 5 0 1 2 3 6 -1 -1 4 0 20
|
|
298 inst_CLK_000_D 3 -1 3 4 0 1 3 6 -1 -1 1 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 1 3 1 2 7 -1 -1 2 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
316 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
311 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
312 cpu_est_d_2_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
305 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
327 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
313 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
304 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 1 1 -1 -1 1 0 20
|
|
299 inst_CLK_000_DDD 3 -1 1 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 6 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 13 0 21
|
|
65 E 5 327 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 4 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 326 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 5 0 1 2 3 6 -1 -1 4 0 20
|
|
298 inst_CLK_000_D 3 -1 3 4 0 1 3 6 -1 -1 1 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
312 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
315 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
314 SM_AMIGA_2_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
311 cpu_est_d_2_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
305 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
327 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
304 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 1 1 -1 -1 1 0 20
|
|
299 inst_CLK_000_DDD 3 -1 1 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 6 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 13 0 21
|
|
65 E 5 324 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 4 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 323 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 315 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
308 SM_AMIGA_4_ 3 -1 6 5 1 2 3 6 7 -1 -1 4 0 20
|
|
311 SM_AMIGA_5_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 2 3 7 -1 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 3 3 1 3 6 -1 -1 3 0 20
|
|
299 SM_AMIGA_2_ 3 -1 6 3 2 6 7 -1 -1 2 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
301 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
310 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
309 cpu_est_d_2_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
306 SM_AMIGA_7_ 3 -1 7 1 3 -1 -1 1 0 21
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 1 1 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 0 5 29 -1 1 0 21
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 4 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 13 0 21
|
|
65 E 5 328 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 4 0 21
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
310 SM_AMIGA_4_ 3 -1 0 6 0 1 2 3 5 6 -1 -1 4 0 21
|
|
298 inst_CLK_000_D 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
297 inst_VMA_INT 3 -1 6 4 0 3 5 6 -1 -1 3 0 20
|
|
307 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 1 3 1 2 7 -1 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
311 cpu_est_d_2_ 3 -1 6 3 0 5 6 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 3 0 5 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 5 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 3 0 5 6 -1 -1 1 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
314 SM_AMIGA_3_ 3 -1 5 2 1 5 -1 -1 3 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
317 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
309 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
328 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
312 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
306 inst_CLK_000_DDD 3 -1 1 1 7 -1 -1 1 0 20
|
|
305 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
304 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 1 1 -1 -1 1 0 20
|
|
299 inst_CLK_000_DDDD 3 -1 7 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 5 6 40 162
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
10 CLK_000 9 -1 1 6 10 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 13 0 21
|
|
65 E 5 324 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 4 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 323 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 315 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
307 SM_AMIGA_4_ 3 -1 6 5 1 2 3 6 7 -1 -1 4 0 20
|
|
310 SM_AMIGA_5_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 3 2 3 7 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 3 3 1 3 6 -1 -1 3 0 20
|
|
309 SM_AMIGA_2_ 3 -1 6 3 2 6 7 -1 -1 2 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
300 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
312 SM_AMIGA_1_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
299 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
305 SM_AMIGA_7_ 3 -1 7 1 3 -1 -1 1 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 1 1 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 13 0 21
|
|
65 E 5 323 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 SM_AMIGA_2_ 3 -1 1 3 1 2 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
301 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
304 CLK_CNT_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
323 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
308 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 2 1 6 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 13 0 21
|
|
65 E 5 323 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
299 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
301 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
308 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 1 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 13 0 21
|
|
65 E 5 323 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
307 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 4 1 2 3 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 7 4 1 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
313 SM_AMIGA_2_ 3 -1 6 3 1 2 6 -1 -1 2 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
300 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
308 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
299 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
309 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
305 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 2 1 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 13 0 21
|
|
65 E 5 323 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
299 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
301 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
308 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 1 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 13 0 21
|
|
65 E 5 323 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 SM_AMIGA_2_ 3 -1 1 3 1 2 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
301 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
304 CLK_CNT_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
323 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
308 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 2 1 6 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 13 0 21
|
|
65 E 5 326 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 4 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 325 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
312 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 SM_AMIGA_2_ 3 -1 1 3 1 2 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
315 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
305 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 2 1 6 -1 -1 1 0 20
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
326 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
311 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
304 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 13 0 21
|
|
65 E 5 323 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 SM_AMIGA_2_ 3 -1 1 3 1 2 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
301 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
304 CLK_CNT_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
323 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
308 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 2 1 6 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 13 0 21
|
|
65 E 5 323 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
307 SM_AMIGA_4_ 3 -1 6 5 1 2 3 6 7 -1 -1 4 0 20
|
|
311 SM_AMIGA_5_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 3 2 3 7 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 3 3 1 3 6 -1 -1 3 0 20
|
|
312 SM_AMIGA_2_ 3 -1 6 3 2 6 7 -1 -1 2 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
300 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
308 SM_AMIGA_3_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
299 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
309 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
305 SM_AMIGA_7_ 3 -1 7 1 3 -1 -1 1 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 1 1 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 13 0 21
|
|
65 E 5 323 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 SM_AMIGA_2_ 3 -1 1 3 1 2 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
301 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
304 CLK_CNT_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
323 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
308 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 2 1 6 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 13 0 21
|
|
65 E 5 327 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 4 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 326 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 5 0 1 2 3 6 -1 -1 4 0 20
|
|
298 inst_CLK_000_D 3 -1 3 4 0 1 3 6 -1 -1 1 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 1 3 1 2 7 -1 -1 2 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
316 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 1 2 0 6 -1 -1 1 0 20
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
327 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
311 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
305 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
304 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 1 1 -1 -1 1 0 20
|
|
299 inst_CLK_000_DDD 3 -1 1 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 6 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 13 0 21
|
|
65 E 5 323 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 4 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 2 3 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 SM_AMIGA_0_ 3 -1 1 3 1 2 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
301 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
308 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 1 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 6 0 21
|
|
65 E 5 325 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 4 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 323 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 4 0 20
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
325 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
301 cpu_est_1_ 3 -1 1 2 1 6 -1 -1 4 0 20
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
324 RN_FPU_CS 3 77 7 2 2 3 77 -1 1 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
315 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
307 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
306 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
10 CLK_000 9 -1 1 1 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 6 0 21
|
|
65 E 5 325 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 4 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 323 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 4 0 20
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
325 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
301 cpu_est_1_ 3 -1 1 2 1 6 -1 -1 4 0 20
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
324 RN_FPU_CS 3 77 7 2 2 3 77 -1 1 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
315 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
307 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
306 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
10 CLK_000 9 -1 1 1 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 6 0 21
|
|
65 E 5 326 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 4 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
297 inst_VMA_INT 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
301 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
299 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
316 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
326 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
307 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
325 RN_FPU_CS 3 77 7 1 3 77 -1 1 0 21
|
|
315 AVEC_EXP_0 3 -1 3 1 2 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
303 inst_VMA_INT_D 3 -1 1 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
10 CLK_000 9 -1 1 1 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 6 0 21
|
|
65 E 5 326 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 4 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
297 inst_VMA_INT 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
301 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
299 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
309 cpu_est_d_2_ 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
316 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
326 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
296 inst_AS_030_INT 3 -1 3 1 3 -1 -1 2 0 21
|
|
325 RN_FPU_CS 3 77 7 1 3 77 -1 1 0 21
|
|
315 AVEC_EXP_0 3 -1 3 1 2 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
303 inst_VMA_INT_D 3 -1 1 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
10 CLK_000 9 -1 1 1 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 3 63 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
65 E 5 327 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 4 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 325 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 20
|
|
311 SM_AMIGA_5_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 7 -1 -1 3 0 21
|
|
296 inst_AS_030_INT 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
302 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
326 RN_FPU_CS 3 77 7 2 6 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
299 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
301 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
307 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 7 1 3 -1 -1 3 1 21
|
|
325 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
315 AVEC_EXP_0 3 -1 6 1 2 -1 -1 1 0 21
|
|
310 cpu_est_d_2_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
306 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 9 0 21
|
|
65 E 5 330 6 0 65 -1 4 0 21
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
296 inst_AS_030_INT 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_5_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 1 3 1 3 6 -1 -1 1 0 20
|
|
330 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
301 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
302 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
299 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
306 SM_AMIGA_7_ 3 -1 6 2 1 3 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
318 N_32 3 -1 3 1 3 -1 -1 4 1 21
|
|
313 CLK_WATCH_3_ 3 -1 1 1 1 -1 -1 4 0 20
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
312 CLK_WATCH_2_ 3 -1 1 1 1 -1 -1 3 0 20
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
328 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
311 CLK_WATCH_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 AVEC_EXP_0 3 -1 7 1 2 -1 -1 1 0 21
|
|
310 CLK_WATCH_0_ 3 -1 1 1 1 -1 -1 1 0 20
|
|
309 cpu_est_d_2_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
303 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 1 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 9 0 21
|
|
65 E 5 329 6 0 65 -1 4 0 21
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
308 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 4 0 20
|
|
314 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
329 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
313 CLK_WATCH_3_ 3 -1 7 2 1 7 -1 -1 4 0 20
|
|
300 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_INT 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
312 CLK_WATCH_2_ 3 -1 7 2 1 7 -1 -1 3 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
317 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
311 CLK_WATCH_1_ 3 -1 7 2 1 7 -1 -1 2 0 20
|
|
306 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
310 CLK_WATCH_0_ 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
299 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
328 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
318 N_63_i 3 -1 3 1 3 -1 -1 2 0 21
|
|
319 AVEC_EXP_0 3 -1 7 1 2 -1 -1 1 0 21
|
|
309 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
305 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 2 3 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 325 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 326 3 0 30 -1 9 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
28 BG_000 5 327 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 329 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 324 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 322 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 333 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
310 SM_AMIGA_4_ 3 -1 6 3 0 3 6 -1 -1 4 0 20
|
|
319 SM_AMIGA_1_ 3 -1 1 3 0 1 7 -1 -1 2 0 21
|
|
318 SM_AMIGA_2_ 3 -1 6 3 0 1 6 -1 -1 2 0 20
|
|
316 SM_AMIGA_5_ 3 -1 3 3 0 3 6 -1 -1 2 0 21
|
|
331 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_INT 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
317 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 3 0 20
|
|
307 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
330 RN_FPU_CS 3 77 7 2 1 7 77 -1 2 0 21
|
|
328 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
309 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
306 inst_CLK_000_DDD 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
315 CLK_WATCH_3_ 3 -1 1 1 1 -1 -1 4 0 20
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 CLK_WATCH_2_ 3 -1 1 1 1 -1 -1 3 0 20
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
329 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
320 N_62_i 3 -1 3 1 3 -1 -1 2 0 21
|
|
313 CLK_WATCH_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
321 AVEC_EXP_0 3 -1 1 1 2 -1 -1 1 0 21
|
|
312 CLK_WATCH_0_ 3 -1 1 1 1 -1 -1 1 0 20
|
|
311 cpu_est_d_2_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
308 SM_AMIGA_7_ 3 -1 0 1 3 -1 -1 1 0 21
|
|
305 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
304 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 6 1 1 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 2 1 3 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 11 0 21
|
|
65 E 5 328 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 4 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 326 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 4 0 1 3 6 -1 -1 4 0 20
|
|
298 inst_CLK_000_D 3 -1 3 4 0 1 3 6 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
312 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
315 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
311 cpu_est_d_2_ 3 -1 1 2 0 6 -1 -1 1 0 20
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
305 inst_CLK_000_DDD 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 1 2 0 6 -1 -1 1 0 20
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
328 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
301 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
326 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
314 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
299 inst_CLK_000_DD 3 -1 3 1 1 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 6 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
10 CLK_000 9 -1 2 1 3 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 5 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 4 0 21
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
310 SM_AMIGA_4_ 3 -1 6 5 0 1 3 5 6 -1 -1 4 0 20
|
|
298 inst_CLK_000_D 3 -1 3 5 0 1 3 5 6 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 0 4 0 3 5 6 -1 -1 3 0 21
|
|
312 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
311 cpu_est_d_2_ 3 -1 6 3 0 5 6 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 3 0 5 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 5 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 6 3 0 5 6 -1 -1 1 0 21
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_3_ 3 -1 5 2 1 5 -1 -1 3 0 21
|
|
307 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
313 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
309 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
329 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
315 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
306 inst_CLK_000_DDD 3 -1 1 1 1 -1 -1 1 0 20
|
|
305 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
304 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 1 1 -1 -1 1 0 20
|
|
299 inst_CLK_000_DDDD 3 -1 1 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 5 6 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
10 CLK_000 9 -1 2 1 3 10 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 11 0 21
|
|
65 E 5 328 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 4 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 326 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 4 0 1 3 6 -1 -1 4 0 20
|
|
298 inst_CLK_000_D 3 -1 3 4 0 1 3 6 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
328 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
312 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 2 0 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 1 2 0 6 -1 -1 1 0 20
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
316 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
314 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
305 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
304 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
299 inst_CLK_000_DDD 3 -1 6 1 7 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 6 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
10 CLK_000 9 -1 2 1 3 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 4 0 21
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 323 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
310 SM_AMIGA_4_ 3 -1 6 4 0 1 3 6 -1 -1 4 0 20
|
|
298 inst_CLK_000_D 3 -1 1 4 0 1 3 6 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
312 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
307 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
313 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
311 cpu_est_d_2_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
309 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
305 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 3 2 0 6 -1 -1 1 0 20
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
329 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
315 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
306 inst_CLK_000_DDD 3 -1 1 1 6 -1 -1 1 0 20
|
|
304 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 1 1 -1 -1 1 0 20
|
|
299 inst_CLK_000_DDDD 3 -1 6 1 7 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 6 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 1 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 11 0 21
|
|
65 E 5 330 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 3 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 1 4 0 1 3 6 -1 -1 1 0 20
|
|
311 SM_AMIGA_4_ 3 -1 6 3 0 3 6 -1 -1 4 0 20
|
|
315 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
313 SM_AMIGA_5_ 3 -1 3 3 0 3 6 -1 -1 2 0 21
|
|
303 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
330 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
304 cpu_est_1_ 3 -1 1 2 1 6 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
329 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
317 SM_AMIGA_1_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
318 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 1 3 -1 -1 1 0 21
|
|
307 inst_CLK_000_DDD 3 -1 1 1 1 -1 -1 1 0 20
|
|
306 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_DD 3 -1 3 1 1 -1 -1 1 0 20
|
|
301 inst_CLK_000_DDDD 3 -1 1 1 7 -1 -1 1 0 20
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 1 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 11 0 21
|
|
65 E 5 330 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 3 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
311 SM_AMIGA_4_ 3 -1 6 5 0 1 3 6 7 -1 -1 4 0 20
|
|
300 inst_CLK_000_D 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
313 SM_AMIGA_5_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_6_ 3 -1 1 3 1 3 7 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
330 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
304 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
329 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
312 cpu_est_d_2_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
303 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 2 0 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 2 0 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 2 0 6 -1 -1 1 0 20
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
318 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 7 1 3 -1 -1 3 1 21
|
|
305 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
317 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
307 inst_CLK_000_DDD 3 -1 6 1 6 -1 -1 1 0 21
|
|
306 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_DDDD 3 -1 6 1 7 -1 -1 1 0 21
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 6 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
10 CLK_000 9 -1 2 1 3 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 11 0 21
|
|
65 E 5 330 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 326 6 0 64 -1 3 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
311 SM_AMIGA_4_ 3 -1 1 4 0 1 3 6 -1 -1 4 0 21
|
|
300 inst_CLK_000_D 3 -1 3 4 0 1 3 6 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 0 3 0 1 3 -1 -1 3 0 21
|
|
313 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
330 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
299 CLK_CNT_1_ 3 -1 1 2 1 6 -1 -1 2 0 20
|
|
312 cpu_est_d_2_ 3 -1 6 2 0 1 -1 -1 1 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
303 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
298 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 7 2 0 1 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 2 0 1 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 1 2 0 1 -1 -1 1 0 20
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
304 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
326 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
315 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
305 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
318 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
317 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
307 inst_CLK_000_DDD 3 -1 1 1 6 -1 -1 1 0 20
|
|
306 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_DDDD 3 -1 6 1 7 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 1 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 1 3 6 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 11 0 21
|
|
65 E 5 330 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 326 6 0 64 -1 3 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
311 SM_AMIGA_4_ 3 -1 1 4 0 1 3 6 -1 -1 4 0 21
|
|
300 inst_CLK_000_D 3 -1 3 4 0 1 3 6 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 0 3 0 1 3 -1 -1 3 0 21
|
|
313 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
330 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
299 CLK_CNT_1_ 3 -1 1 2 1 6 -1 -1 2 0 20
|
|
312 cpu_est_d_2_ 3 -1 6 2 0 1 -1 -1 1 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
303 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
298 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 7 2 0 1 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 2 0 1 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 1 2 0 1 -1 -1 1 0 20
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
304 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
326 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
315 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
305 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
318 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
317 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
307 inst_CLK_000_DDD 3 -1 1 1 6 -1 -1 1 0 20
|
|
306 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_DDDD 3 -1 6 1 7 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 1 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 1 3 6 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 11 0 21
|
|
65 E 5 330 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 3 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
311 SM_AMIGA_4_ 3 -1 6 5 0 1 3 6 7 -1 -1 4 0 20
|
|
300 inst_CLK_000_D 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
313 SM_AMIGA_5_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_6_ 3 -1 1 3 1 3 7 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
330 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
304 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
329 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
312 cpu_est_d_2_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
303 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 2 0 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 2 0 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 2 0 6 -1 -1 1 0 20
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
318 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 7 1 3 -1 -1 3 1 21
|
|
305 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
317 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
307 inst_CLK_000_DDD 3 -1 6 1 6 -1 -1 1 0 21
|
|
306 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_DDDD 3 -1 6 1 7 -1 -1 1 0 21
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 6 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
10 CLK_000 9 -1 2 1 3 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 11 0 21
|
|
65 E 5 330 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 3 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
311 SM_AMIGA_4_ 3 -1 6 5 0 1 3 6 7 -1 -1 4 0 20
|
|
300 inst_CLK_000_D 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
313 SM_AMIGA_5_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_6_ 3 -1 1 3 1 3 7 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
330 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
304 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
329 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
312 cpu_est_d_2_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
303 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 2 0 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 2 0 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 2 0 6 -1 -1 1 0 20
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
318 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 7 1 3 -1 -1 3 1 21
|
|
305 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
317 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
307 inst_CLK_000_DDD 3 -1 6 1 6 -1 -1 1 0 21
|
|
306 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_DDDD 3 -1 6 1 7 -1 -1 1 0 21
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 6 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
10 CLK_000 9 -1 2 1 3 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 5 6 29 -1 1 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 11 0 21
|
|
65 E 5 330 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
311 SM_AMIGA_4_ 3 -1 6 5 0 1 3 5 6 -1 -1 4 0 20
|
|
300 inst_CLK_000_D 3 -1 3 5 0 1 3 5 6 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 0 4 0 3 5 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
313 cpu_est_d_2_ 3 -1 6 3 0 5 6 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 1 3 0 5 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 5 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 6 3 0 5 6 -1 -1 1 0 21
|
|
330 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
304 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
315 SM_AMIGA_3_ 3 -1 5 2 1 5 -1 -1 3 0 21
|
|
308 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
312 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
305 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
317 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
307 inst_CLK_000_DDD 3 -1 1 1 6 -1 -1 1 0 20
|
|
306 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
303 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_DD 3 -1 3 1 1 -1 -1 1 0 20
|
|
301 inst_CLK_000_DDDD 3 -1 6 1 7 -1 -1 1 0 21
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 5 6 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
10 CLK_000 9 -1 2 1 3 10 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 11 0 21
|
|
65 E 5 330 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 3 0 21
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 3 5 0 3 5 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 3 6 7 -1 -1 4 0 21
|
|
311 SM_AMIGA_4_ 3 -1 6 3 3 5 6 -1 -1 4 0 20
|
|
308 SM_AMIGA_6_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 21
|
|
317 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 2 0 21
|
|
316 SM_AMIGA_2_ 3 -1 7 2 6 7 -1 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 CLK_CNT_1_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
312 cpu_est_d_2_ 3 -1 1 2 5 6 -1 -1 1 0 20
|
|
310 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_7_ 3 -1 6 2 0 3 -1 -1 1 0 20
|
|
303 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
298 CLK_CNT_0_ 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 2 5 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 2 5 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 7 2 5 6 -1 -1 1 0 20
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
330 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
304 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 3 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
318 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
307 inst_CLK_000_DDD 3 -1 1 1 1 -1 -1 1 0 20
|
|
306 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_DD 3 -1 3 1 1 -1 -1 1 0 20
|
|
301 inst_CLK_000_DDDD 3 -1 1 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 5 6 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 2 1 3 10 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 5 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
29 DTACK 5 -1 3 2 0 5 29 -1 1 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 4 0 21
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
310 SM_AMIGA_4_ 3 -1 0 5 0 3 5 6 7 -1 -1 4 0 21
|
|
298 inst_CLK_000_D 3 -1 3 5 0 3 5 6 7 -1 -1 1 0 20
|
|
297 inst_VMA_INT 3 -1 6 4 0 3 5 6 -1 -1 3 0 20
|
|
313 SM_AMIGA_5_ 3 -1 3 3 0 3 7 -1 -1 2 0 21
|
|
312 cpu_est_d_2_ 3 -1 6 3 0 5 6 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 3 0 5 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 5 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 6 3 0 5 6 -1 -1 1 0 21
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
315 SM_AMIGA_3_ 3 -1 5 2 5 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_6_ 3 -1 3 2 3 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
309 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
329 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
311 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 7 1 3 -1 -1 3 1 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
317 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
316 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 7 1 3 -1 -1 1 0 21
|
|
306 inst_CLK_000_DDD 3 -1 1 1 1 -1 -1 1 0 20
|
|
305 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
304 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 7 1 1 -1 -1 1 0 20
|
|
299 inst_CLK_000_DDDD 3 -1 1 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 5 6 40 162
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
10 CLK_000 9 -1 2 1 3 10 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 4 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 325 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 20
|
|
311 SM_AMIGA_4_ 3 -1 6 3 0 3 6 -1 -1 4 0 20
|
|
297 inst_VMA_INT 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 6 7 65 -1 3 0 21
|
|
308 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 6 2 5 6 -1 -1 3 1 21
|
|
302 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 3 0 20
|
|
327 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
316 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
312 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 cpu_est_d_2_ 3 -1 5 2 0 6 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 7 2 0 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 7 2 0 6 -1 -1 1 0 20
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
303 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
314 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
325 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
313 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
307 inst_CLK_000_DDD 3 -1 3 1 6 -1 -1 1 0 20
|
|
306 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
305 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 7 1 3 -1 -1 1 0 20
|
|
299 inst_CLK_000_DDDD 3 -1 6 1 7 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 6 40 162
|
|
60 CLK_OSZI 9 -1 5 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
10 CLK_000 1 -1 -1 3 1 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 4 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 325 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 3 4 0 1 3 6 -1 -1 1 0 20
|
|
311 SM_AMIGA_4_ 3 -1 6 3 0 3 6 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_6_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
297 inst_VMA_INT 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
313 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
312 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_7_ 3 -1 6 2 1 3 -1 -1 1 0 20
|
|
302 cpu_est_d_2_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_DDD 3 -1 7 2 3 7 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
304 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
314 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
303 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
325 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
315 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
307 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
306 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
301 inst_CLK_000_DD 3 -1 3 1 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_DDDD 3 -1 3 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 6 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
10 CLK_000 1 -1 -1 3 1 3 6 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 323 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
307 SM_AMIGA_4_ 3 -1 6 3 0 3 6 -1 -1 4 0 20
|
|
296 inst_VMA_INT 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
297 inst_CLK_000_D 3 -1 6 3 0 3 6 -1 -1 1 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 0 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 2 0 6 65 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 2 0 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
324 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
308 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_DDD 3 -1 1 2 6 7 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
313 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
310 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
323 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
311 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 6 1 1 -1 -1 1 0 21
|
|
299 inst_CLK_000_DDDD 3 -1 7 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 6 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 323 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
297 inst_CLK_000_D 3 -1 6 4 0 1 3 6 -1 -1 1 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 3 0 3 6 -1 -1 4 0 20
|
|
296 inst_VMA_INT 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 0 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 2 0 6 65 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 2 0 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
324 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
310 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
323 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_DDDD 3 -1 7 1 7 -1 -1 1 0 20
|
|
298 inst_CLK_000_DDD 3 -1 6 1 7 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 0 6 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 4 0 20
|
|
296 inst_VMA_INT 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
323 RN_E 3 65 6 2 1 6 65 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
322 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
299 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
305 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
310 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
311 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
308 inst_CLK_000_DDD 3 -1 7 1 7 -1 -1 2 0 21
|
|
307 inst_CLK_000_DD 3 -1 7 1 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_DDDD 3 -1 7 1 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 1 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 313 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 315 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 316 3 0 30 -1 4 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 318 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 314 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 312 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 4 0 20
|
|
296 inst_VMA_INT 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
323 RN_E 3 65 6 2 1 6 65 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
322 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
314 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
307 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
305 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
315 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
316 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
318 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
311 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
308 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
309 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
299 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_DD 3 -1 7 1 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 1 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
9 CLK_EXP 5 322 1 0 9 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
307 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 4 0 20
|
|
296 inst_VMA_INT 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
300 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
297 inst_CLK_000_D 3 -1 6 3 1 3 6 -1 -1 1 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 2 1 6 65 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
308 inst_CLK_000_DDDD 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_DD 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
310 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_EXP 3 9 1 1 1 9 -1 2 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
299 inst_CLK_000_DDD 3 -1 7 1 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
9 CLK_EXP 5 322 1 0 9 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
297 inst_CLK_000_D 3 -1 6 3 1 3 6 -1 -1 1 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
300 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_DDDD 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_DD 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
310 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_EXP 3 9 1 1 1 9 -1 2 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
308 inst_CLK_000_DDD 3 -1 1 1 1 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 9 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 323 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
9 CLK_EXP 5 324 1 0 9 -1 2 1 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
313 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
307 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
299 CLK_WATCH_2_ 3 -1 1 2 1 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
298 CLK_WATCH_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_CLK_EXP 3 9 1 2 1 7 9 -1 2 1 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
297 CLK_WATCH_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
323 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 N_61_i 3 -1 3 1 3 -1 -1 2 0 21
|
|
311 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
310 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 9 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
9 CLK_EXP 5 322 1 0 9 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 6 3 1 3 6 -1 -1 1 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
298 CLK_WATCH_1_ 3 -1 1 2 1 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
322 RN_CLK_EXP 3 9 1 2 1 7 9 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
299 CLK_WATCH_2_ 3 -1 1 2 1 7 -1 -1 3 1 21
|
|
297 CLK_WATCH_0_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
308 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
313 N_28_0 3 -1 3 1 3 -1 -1 3 1 21
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
9 CLK_EXP 5 322 1 0 9 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 6 3 1 3 6 -1 -1 1 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
297 CLK_WATCH_1_ 3 -1 1 2 1 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
322 RN_CLK_EXP 3 9 1 2 1 7 9 -1 3 0 21
|
|
309 CLK_WATCH_2_ 3 -1 1 2 1 7 -1 -1 3 1 21
|
|
308 CLK_WATCH_0_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
303 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
9 CLK_EXP 5 322 1 0 9 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 3 1 3 6 -1 -1 1 0 21
|
|
308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
298 CLK_WATCH_1_ 3 -1 1 2 1 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
322 RN_CLK_EXP 3 9 1 2 1 7 9 -1 3 0 21
|
|
309 CLK_WATCH_2_ 3 -1 1 2 1 7 -1 -1 3 1 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
297 CLK_WATCH_0_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 4 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
9 CLK_EXP 5 322 1 0 9 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 6 3 1 3 6 -1 -1 1 0 21
|
|
309 CLK_WATCH_1_ 3 -1 1 2 1 7 -1 -1 4 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
322 RN_CLK_EXP 3 9 1 2 1 7 9 -1 3 0 21
|
|
308 CLK_WATCH_0_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
297 CLK_WATCH_2_ 3 -1 1 2 1 7 -1 -1 3 1 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 3 1 21
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
303 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 9 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
9 CLK_EXP 5 322 1 0 9 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 6 3 1 3 6 -1 -1 1 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
298 CLK_WATCH_1_ 3 -1 1 2 1 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
322 RN_CLK_EXP 3 9 1 2 1 7 9 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
299 CLK_WATCH_2_ 3 -1 1 2 1 7 -1 -1 3 1 21
|
|
297 CLK_WATCH_0_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
308 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 N_62_i 3 -1 3 1 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 9 0 21
|
|
9 CLK_EXP 5 322 1 0 9 -1 4 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 20
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 20
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 20
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 inst_CLK_000_D 3 -1 6 3 1 3 6 -1 -1 1 0 21
|
|
299 CLK_WATCH_2_ 3 -1 1 2 1 7 -1 -1 5 0 21
|
|
322 RN_CLK_EXP 3 9 1 2 1 7 9 -1 4 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
298 CLK_WATCH_1_ 3 -1 1 2 1 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 2 1 6 65 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
312 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 20
|
|
308 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
297 CLK_WATCH_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
310 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 20
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 20
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 20
|
|
313 N_72_i 3 -1 3 1 3 -1 -1 2 0 21
|
|
311 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 9 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 6 3 1 3 6 -1 -1 1 0 21
|
|
299 CLK_WATCH_2_ 3 -1 1 2 1 7 -1 -1 5 0 20
|
|
308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
300 CLK_WATCH_3_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
298 CLK_WATCH_1_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
297 CLK_WATCH_0_ 3 -1 1 2 1 7 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
314 N_36 3 -1 3 1 3 -1 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 9 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 6 3 1 3 6 -1 -1 1 0 21
|
|
299 CLK_WATCH_2_ 3 -1 1 2 1 7 -1 -1 5 0 20
|
|
308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
300 CLK_WATCH_3_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
298 CLK_WATCH_1_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
297 CLK_WATCH_0_ 3 -1 1 2 1 7 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
314 N_73_i 3 -1 3 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 9 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 6 3 1 3 6 -1 -1 1 0 21
|
|
299 CLK_WATCH_2_ 3 -1 1 2 1 7 -1 -1 5 0 20
|
|
308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
300 CLK_WATCH_3_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
298 CLK_WATCH_1_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
297 CLK_WATCH_0_ 3 -1 1 2 1 7 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
314 N_36 3 -1 3 1 3 -1 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 9 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 6 3 1 3 6 -1 -1 1 0 21
|
|
299 CLK_WATCH_2_ 3 -1 1 2 1 7 -1 -1 5 0 20
|
|
308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
300 CLK_WATCH_3_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
298 CLK_WATCH_1_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
297 CLK_WATCH_0_ 3 -1 1 2 1 7 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
314 N_36 3 -1 3 1 3 -1 -1 4 1 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 2 1 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 9 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 326 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
298 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
326 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
322 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
297 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
299 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
300 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
323 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
314 N_69_i 3 -1 3 1 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 9 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 326 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
298 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
326 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
322 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
297 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
299 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
309 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
323 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
314 N_178_i 3 -1 3 1 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 9 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 326 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
308 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
326 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
322 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
306 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
309 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
297 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
323 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
314 N_66_i 3 -1 3 1 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
303 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 9 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 326 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
308 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
326 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
322 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
297 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
305 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
309 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
298 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
323 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
314 N_69_i 3 -1 3 1 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 9 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 326 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
308 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
326 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
322 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
306 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
309 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
297 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
323 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
314 N_66_i 3 -1 3 1 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
303 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 326 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
297 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
326 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
322 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
308 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
307 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
305 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
309 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
298 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
323 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
314 N_70_i 3 -1 3 1 3 -1 -1 1 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 5 0 21
|
|
65 E 5 322 6 0 65 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 321 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 325 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 323 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 4 0 21
|
|
307 SM_AMIGA_3_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
304 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
325 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
321 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
300 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
305 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
310 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
311 SM_AMIGA_4_ 3 -1 6 1 6 -1 -1 4 0 20
|
|
298 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
297 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
322 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
309 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 5 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
299 inst_CLK_000_D 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
322 RN_UDS_000 3 31 3 2 3 6 31 -1 5 0 21
|
|
314 SM_AMIGA_1_ 3 -1 3 2 3 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
303 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
328 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
316 UDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
315 N_41_0 3 -1 6 1 3 -1 -1 7 1 21
|
|
310 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
298 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
297 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
312 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 3 0 20
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
309 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
308 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 1 0 21
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
301 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
68 A_0_ 1 -1 -1 1 6 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 5 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 3 0 20
|
|
328 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
307 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
309 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
316 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
299 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
315 N_188 3 -1 3 1 3 -1 -1 4 0 21
|
|
300 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
298 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
312 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 3 0 20
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
306 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 5 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 3 0 20
|
|
328 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
307 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
309 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
316 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
299 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
315 N_37 3 -1 3 1 3 -1 -1 4 0 21
|
|
300 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
298 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
312 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 3 0 20
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
306 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
303 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 5 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
307 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 3 0 20
|
|
328 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
306 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
316 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
298 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
315 N_37 3 -1 3 1 3 -1 -1 4 0 21
|
|
299 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
297 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
312 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 3 0 20
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
310 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
305 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 5 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_1_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
312 inst_DTACK_SYNC 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
328 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_3_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
308 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
316 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
298 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
315 N_192 3 -1 3 1 3 -1 -1 4 0 21
|
|
307 SM_AMIGA_4_ 3 -1 3 1 3 -1 -1 4 0 21
|
|
299 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
297 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
310 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
306 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 1 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 330 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
307 SM_AMIGA_4_ 3 -1 3 3 3 6 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 3 3 6 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 3 3 3 6 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 3 3 6 7 -1 -1 2 0 21
|
|
300 inst_CLK_000_D 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
322 RN_UDS_000 3 31 3 2 3 6 31 -1 5 0 21
|
|
323 RN_LDS_000 3 30 3 2 3 6 30 -1 3 0 21
|
|
315 N_37_1_i 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_1_ 3 -1 3 2 3 7 -1 -1 3 0 21
|
|
312 inst_DTACK_SYNC 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
330 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
316 N_141 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
318 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
317 UDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
298 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
299 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
297 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
310 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
309 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 7 1 3 -1 -1 1 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
68 A_0_ 1 -1 -1 1 6 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 330 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
307 SM_AMIGA_4_ 3 -1 3 3 3 6 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 3 3 6 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 3 3 3 6 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 3 3 6 7 -1 -1 2 0 21
|
|
300 inst_CLK_000_D 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
322 RN_UDS_000 3 31 3 2 3 6 31 -1 5 0 21
|
|
323 RN_LDS_000 3 30 3 2 3 6 30 -1 3 0 21
|
|
315 N_37_1_i 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_1_ 3 -1 3 2 3 7 -1 -1 3 0 21
|
|
312 inst_DTACK_SYNC 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
330 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
316 N_141 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
318 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
317 UDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
298 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
310 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
299 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
297 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
305 SM_AMIGA_7_ 3 -1 7 1 3 -1 -1 1 0 21
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_VMA_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
68 A_0_ 1 -1 -1 1 6 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 5 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_1_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
312 inst_DTACK_SYNC 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
328 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_3_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
316 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
297 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
315 N_23 3 -1 3 1 3 -1 -1 4 0 21
|
|
310 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 1 3 -1 -1 4 0 21
|
|
298 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
309 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
305 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 1 0 21
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 5 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
34 VMA 0 3 0 34 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_1_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
312 inst_DTACK_SYNC 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
328 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_3_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
296 inst_VMA_INT 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
316 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
297 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
315 N_203_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
310 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 1 3 -1 -1 4 0 21
|
|
298 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
309 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
305 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 1 0 21
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
301 inst_VMA_INT_D 3 -1 6 1 3 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 5 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
304 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
301 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
326 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
324 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
307 CLK_000_CNT_0_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
303 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
305 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
314 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
296 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
313 N_203_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
308 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
297 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
312 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
311 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
310 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 3 0 20
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 3 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 5 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
305 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
326 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
324 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
307 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
304 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
296 CLK_000_CNT_0_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
314 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
297 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
313 N_203_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
308 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
298 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
312 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
311 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
310 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 3 0 20
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
303 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 3 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 5 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 329 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 3 3 3 6 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 6 3 3 6 7 -1 -1 3 0 21
|
|
328 RN_VMA 3 34 3 3 3 6 7 34 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
320 RN_UDS_000 3 31 3 2 3 6 31 -1 5 0 21
|
|
305 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
321 RN_LDS_000 3 30 3 2 3 6 30 -1 3 0 21
|
|
313 N_48_1_i 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
312 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
310 inst_DTACK_SYNC 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
329 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
314 N_112 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_3_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
296 CLK_000_CNT_0_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
316 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
315 UDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
297 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
307 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
298 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
311 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
68 A_0_ 1 -1 -1 1 6 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 5 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 329 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
305 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 20
|
|
327 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
302 SM_AMIGA_6_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 3 3 3 6 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
328 RN_VMA 3 34 3 3 1 3 7 34 -1 2 0 21
|
|
304 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
320 RN_UDS_000 3 31 3 2 1 3 31 -1 5 0 21
|
|
321 RN_LDS_000 3 30 3 2 3 6 30 -1 3 0 21
|
|
313 N_48_1_i 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
312 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
329 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
314 N_112 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
303 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
316 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
315 UDS_000_0 3 -1 1 1 3 -1 -1 10 0 21
|
|
297 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
307 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
298 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
311 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
310 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 3 0 21
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
296 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 1 3 7 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 7 60 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
70 RW 1 -1 -1 4 1 3 4 6 70 -1
|
|
10 CLK_000 1 -1 -1 4 1 3 6 7 10 -1
|
|
97 DS_030 1 -1 -1 3 1 3 6 97 -1
|
|
85 RST 1 -1 -1 3 1 3 7 85 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 1 6 68 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 4 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 3 3 3 6 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
326 RN_VMA 3 34 3 3 3 6 7 34 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
297 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
320 RN_UDS_000 3 31 3 2 3 6 31 -1 4 0 21
|
|
307 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
324 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
304 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
296 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
314 UDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
313 LDS_000_INT_0_sqmuxa_1_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
298 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
310 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
311 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
303 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 3 3 6 7 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 3 3 6 7 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 3 0 3 7 34 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
308 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
298 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
297 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
311 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
306 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
303 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
296 CLK_000_CNT_0_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
315 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
314 N_36 3 -1 3 1 3 -1 -1 4 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 3 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 3 3 6 7 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 3 3 6 7 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 3 0 3 7 34 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
297 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
298 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
296 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
311 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
306 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
303 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 2 0 20
|
|
308 CLK_000_CNT_0_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
315 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
314 N_36 3 -1 3 1 3 -1 -1 4 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 3 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 6 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 3 3 6 7 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
327 RN_VMA 3 34 3 3 3 6 7 34 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
297 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
308 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
298 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
303 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
305 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
296 CLK_000_CNT_0_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
315 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
314 N_162 3 -1 6 1 3 -1 -1 4 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
310 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 3 0 20
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 4 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 5 1 21
|
|
31 UDS_000 5 323 3 0 31 -1 4 0 21
|
|
65 E 5 328 6 0 65 -1 3 0 21
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 330 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 4 3 4 6 7 -1 -1 1 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 3 3 6 7 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 3 3 6 7 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 3 3 4 7 34 -1 2 0 21
|
|
296 CLK_000_CNT_0_ 3 -1 6 3 4 6 7 -1 -1 2 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 3 4 6 7 -1 -1 1 0 20
|
|
324 RN_LDS_000 3 30 3 2 3 6 30 -1 5 1 21
|
|
297 CLK_000_CNT_2_ 3 -1 4 2 4 7 -1 -1 5 0 21
|
|
323 RN_UDS_000 3 31 3 2 3 6 31 -1 4 0 21
|
|
308 CLK_000_CNT_1_ 3 -1 4 2 4 7 -1 -1 4 0 21
|
|
314 N_66_0 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
311 inst_DTACK_SYNC 3 -1 4 2 4 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
303 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
330 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
327 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 N_99 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 2 4 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 4 2 1 7 -1 -1 1 0 21
|
|
317 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
316 UDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
298 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
322 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 4 7 40 162
|
|
60 CLK_OSZI 9 -1 5 1 3 4 6 7 60 -1
|
|
85 RST 1 -1 -1 5 1 3 4 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 3 4 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 4 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
68 A_0_ 1 -1 -1 1 6 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 7 3 3 6 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
327 RN_VMA 3 34 3 3 0 3 7 34 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
297 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
308 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
298 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
311 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
306 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
303 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
296 CLK_000_CNT_0_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
315 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
314 N_42_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 3 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 0 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 7 3 3 6 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
327 RN_VMA 3 34 3 3 0 3 7 34 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
297 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
308 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
298 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
311 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
306 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
303 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
296 CLK_000_CNT_0_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
315 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
314 N_36 3 -1 3 1 3 -1 -1 4 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 3 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 0 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 7 3 3 6 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
327 RN_VMA 3 34 3 3 0 3 7 34 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
296 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
308 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
297 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
311 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
310 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 2 0 20
|
|
307 CLK_000_CNT_0_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
315 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
314 N_165 3 -1 3 1 3 -1 -1 4 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
303 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 3 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 0 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 4 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 329 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 323 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
305 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 3 3 6 7 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 3 3 6 7 -1 -1 3 0 21
|
|
328 RN_VMA 3 34 3 3 3 6 7 34 -1 2 0 21
|
|
308 CLK_000_CNT_0_ 3 -1 6 3 1 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_5_ 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
296 CLK_000_CNT_2_ 3 -1 1 2 1 7 -1 -1 5 0 20
|
|
309 CLK_000_CNT_1_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
306 inst_DSACK_INT_SET 3 -1 7 2 6 7 -1 -1 4 0 21
|
|
297 CLK_000_CNT_3_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
312 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
311 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
329 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
303 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
299 inst_CLK_000_DD 3 -1 3 2 1 6 -1 -1 1 0 20
|
|
316 UDS_000_0 3 -1 3 1 3 -1 -1 10 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
315 N_24_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 1 3 6 10 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 3 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 4 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 329 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 20
|
|
327 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 3 3 6 7 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
298 inst_CLK_000_D 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 2 3 6 31 -1 4 0 21
|
|
312 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
306 inst_DSACK_INT_SET 3 -1 7 2 6 7 -1 -1 4 0 21
|
|
311 inst_DTACK_SYNC 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
303 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
329 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
328 RN_VMA 3 34 3 2 3 7 34 -1 2 0 21
|
|
324 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_3_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
299 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
316 UDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
315 N_194_0 3 -1 6 1 3 -1 -1 7 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
296 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
309 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
297 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
313 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
308 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 2 3 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
68 A_0_ 1 -1 -1 1 6 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 3 3 3 6 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
327 RN_VMA 3 34 3 3 3 6 7 34 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
299 inst_CLK_000_DD 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
321 RN_UDS_000 3 31 3 2 3 6 31 -1 4 0 21
|
|
311 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
307 CLK_000_CNT_0_ 3 -1 3 2 3 7 -1 -1 2 0 20
|
|
304 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
315 UDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
314 N_47_0 3 -1 6 1 3 -1 -1 7 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
296 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
308 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
297 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
310 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
68 A_0_ 1 -1 -1 1 6 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_DD 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
296 CLK_000_CNT_2_ 3 -1 6 3 1 6 7 -1 -1 5 0 21
|
|
308 CLK_000_CNT_1_ 3 -1 1 3 1 6 7 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 3 3 3 6 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
327 RN_VMA 3 34 3 3 1 3 7 34 -1 2 0 21
|
|
307 CLK_000_CNT_0_ 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
320 RN_UDS_000 3 31 3 2 3 6 31 -1 4 0 21
|
|
297 CLK_000_CNT_3_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
311 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
305 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
304 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
315 UDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
314 N_43_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 1 3 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
308 CLK_000_CNT_2_ 3 -1 6 3 1 6 7 -1 -1 5 0 21
|
|
297 CLK_000_CNT_1_ 3 -1 1 3 1 6 7 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 3 3 3 6 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
327 RN_VMA 3 34 3 3 1 3 7 34 -1 2 0 21
|
|
296 CLK_000_CNT_0_ 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
319 RN_UDS_000 3 31 3 2 3 6 31 -1 4 0 21
|
|
298 CLK_000_CNT_3_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
311 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
306 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
303 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
315 UDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
314 N_42_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 1 3 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 7 3 3 6 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
324 RN_VMA 3 34 3 3 3 6 7 34 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
307 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
297 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
310 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
306 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
327 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
322 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
296 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
305 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_3_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
298 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
311 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 3 0 20
|
|
303 SM_AMIGA_6_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 329 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 3 3 6 7 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 3 3 3 6 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 3 0 20
|
|
326 RN_VMA 3 34 3 3 3 6 7 34 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
314 state_machine_uds_000_int_8_1_i_n 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
321 RN_LDS_000 3 30 3 2 3 6 30 -1 3 0 21
|
|
310 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
306 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
303 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
329 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 2 0 21
|
|
324 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 N_122 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
305 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
316 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
307 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
298 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
297 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
311 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 3 0 20
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
296 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 6 1 7 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 325 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
293 cpu_est_0_ 3 -1 1 4 1 3 6 7 -1 -1 3 0 20
|
|
298 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 3 3 6 7 -1 -1 3 1 21
|
|
328 RN_VMA 3 34 3 3 3 6 7 34 -1 2 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
302 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
296 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
307 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
297 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 un1_UDS_000_INT_0_sqmuxa_1_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
325 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
306 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_DD 3 -1 7 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_CLK_000_D 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
300 cpu_est_2_ 3 -1 6 3 3 6 7 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
330 RN_VMA 3 34 3 3 0 3 7 34 -1 2 0 21
|
|
296 CLK_000_CNT_2_ 3 -1 7 2 6 7 -1 -1 5 0 20
|
|
307 CLK_000_CNT_1_ 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
297 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
305 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
303 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
299 inst_CLK_000_DD 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 un1_UDS_000_INT_0_sqmuxa_1_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 3 7 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 325 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 6 3 3 6 7 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
328 RN_VMA 3 34 3 3 0 3 7 34 -1 2 0 21
|
|
297 CLK_000_CNT_2_ 3 -1 7 2 6 7 -1 -1 5 0 20
|
|
307 CLK_000_CNT_1_ 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
298 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
306 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
296 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
305 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 un1_UDS_000_INT_0_sqmuxa_1_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
325 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 3 7 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
302 cpu_est_2_ 3 -1 6 3 3 6 7 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
330 RN_VMA 3 34 3 3 0 3 7 34 -1 2 0 21
|
|
298 CLK_000_CNT_2_ 3 -1 7 2 6 7 -1 -1 5 0 20
|
|
299 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
297 CLK_000_CNT_1_ 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
307 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
296 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
317 un1_UDS_000_INT_0_sqmuxa_3_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 3 7 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
330 RN_VMA 3 34 3 3 3 6 7 34 -1 2 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
316 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
312 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
306 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
305 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 5 0 21
|
|
298 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
317 N_186_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
307 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
299 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
297 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 9 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 325 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
328 RN_VMA 3 34 3 3 3 6 7 34 -1 2 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
317 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
312 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
316 LDS_000_INT_0_sqmuxa 3 -1 3 1 3 -1 -1 5 0 21
|
|
299 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
300 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
298 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
325 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
297 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 9 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 325 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
328 RN_VMA 3 34 3 3 3 6 7 34 -1 2 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
317 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
312 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 9 0 21
|
|
316 LDS_000_INT_0_sqmuxa 3 -1 3 1 3 -1 -1 5 0 21
|
|
299 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
300 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
298 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
325 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
297 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
330 RN_VMA 3 34 3 3 3 6 7 34 -1 2 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
316 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
312 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
306 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
305 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 5 0 21
|
|
298 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
317 N_186_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
307 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
299 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
297 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
330 RN_VMA 3 34 3 3 3 6 7 34 -1 2 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
316 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
312 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
306 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
305 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 5 0 21
|
|
298 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
317 N_186_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
307 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
299 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
297 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
330 RN_VMA 3 34 3 3 3 6 7 34 -1 2 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
316 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
312 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
306 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
305 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 5 0 21
|
|
297 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
317 N_186_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
307 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
298 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
296 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 6 3 3 6 7 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
330 RN_VMA 3 34 3 3 0 3 7 34 -1 2 0 21
|
|
297 CLK_000_CNT_2_ 3 -1 7 2 6 7 -1 -1 5 0 20
|
|
307 CLK_000_CNT_1_ 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
298 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
306 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
296 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
305 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 un1_UDS_000_INT_0_sqmuxa_1_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 3 7 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 325 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 6 3 3 6 7 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
328 RN_VMA 3 34 3 3 0 3 7 34 -1 2 0 21
|
|
297 CLK_000_CNT_2_ 3 -1 7 2 6 7 -1 -1 5 0 20
|
|
307 CLK_000_CNT_1_ 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
298 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
306 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
296 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
305 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 un1_UDS_000_INT_0_sqmuxa_1_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
325 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 3 7 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 323 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
330 RN_VMA 3 34 3 3 3 6 7 34 -1 2 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
316 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
312 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
306 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
301 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
305 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
297 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
307 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
298 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 un1_UDS_000_INT_0_sqmuxa_1_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
296 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 326 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 20
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
295 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
300 inst_CLK_000_DD 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
298 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
307 CLK_000_CNT_1_ 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
306 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 0 3 34 -1 2 0 20
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
297 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
305 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
299 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 un1_UDS_000_INT_0_sqmuxa_1_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
326 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 3 7 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 326 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 20
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
295 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
300 inst_CLK_000_DD 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
298 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
307 CLK_000_CNT_1_ 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
306 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 0 3 34 -1 2 0 20
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
297 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
305 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
302 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
299 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 un1_UDS_000_INT_0_sqmuxa_1_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
326 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 0 3 7 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 5 0 21
|
|
34 VMA 5 330 3 0 34 -1 4 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 327 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
330 RN_VMA 3 34 3 3 3 6 7 34 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_0_ 3 -1 1 3 1 3 7 -1 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
309 SM_AMIGA_5_ 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
301 inst_CLK_000_DD 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
316 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
310 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 5 0 21
|
|
298 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
317 N_189_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
308 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
299 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
327 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
297 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
302 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 1 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 317 3 0 31 -1 11 0 21
|
|
34 VMA 5 324 3 0 34 -1 4 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
302 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 3 0 20
|
|
297 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
324 RN_VMA 3 34 3 3 3 6 7 34 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
300 SM_AMIGA_6_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
312 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
304 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
322 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
301 SM_AMIGA_7_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
303 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
298 inst_CLK_000_DD 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
313 un1_UDS_000_INT_0_sqmuxa_3_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
311 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
309 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
307 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
299 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 317 3 0 31 -1 11 0 21
|
|
34 VMA 5 324 3 0 34 -1 4 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 321 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
302 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 3 0 20
|
|
296 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
324 RN_VMA 3 34 3 3 3 6 7 34 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
300 SM_AMIGA_6_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
312 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
304 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
322 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
301 SM_AMIGA_7_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
303 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
297 inst_CLK_000_DD 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
313 un1_UDS_000_INT_0_sqmuxa_3_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
311 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
309 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
307 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
299 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_SYNC 8 40 4 3 3 6 7 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
34 VMA 5 327 3 0 34 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 7 0 20
|
|
327 RN_VMA 3 34 3 2 3 7 34 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
34 VMA 5 327 3 0 34 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
305 SM_AMIGA_4_ 3 -1 6 4 1 3 6 7 -1 -1 3 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_3_ 3 -1 7 3 1 6 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
309 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 7 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 4 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 1 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 3 6 -1 -1 5 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
309 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 1 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
298 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 1 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 3 6 -1 -1 5 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
309 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 1 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
298 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 1 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
302 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
295 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_3_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
297 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 5 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
307 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
300 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
309 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
306 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
303 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 1 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
301 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
299 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 2 3 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 1 21
|
|
30 LDS_000 5 321 3 0 30 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
302 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
295 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_3_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
297 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 5 0 20
|
|
312 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
307 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
300 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
303 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 1 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
310 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
309 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
301 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
299 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 2 3 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 1 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
302 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
295 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_3_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
297 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 5 0 20
|
|
312 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
307 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
300 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
303 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 1 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
310 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
309 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
301 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
299 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 2 3 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 1 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 3 6 -1 -1 5 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
309 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 1 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
299 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
296 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_2_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
295 inst_VPA_SYNC 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 5 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
307 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
293 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
326 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
298 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
297 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
296 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_2_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
295 inst_VPA_SYNC 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 5 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
307 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
293 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
326 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
298 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
297 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
34 VMA 5 327 3 0 34 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
307 SM_AMIGA_3_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_2_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
298 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
296 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 5 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_DD 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 8 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 2 3 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
34 VMA 5 327 3 0 34 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 20
|
|
307 SM_AMIGA_3_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_2_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
296 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
298 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 8 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
297 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 2 3 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 319 3 0 31 -1 11 0 21
|
|
34 VMA 5 326 3 0 34 -1 5 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 323 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 315 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 3 0 20
|
|
296 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
307 SM_AMIGA_3_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_2_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
298 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
324 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
326 RN_VMA 3 34 3 1 3 34 -1 5 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
297 inst_CLK_000_DD 3 -1 7 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 2 3 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 1 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
34 VMA 5 327 3 0 34 -1 5 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 3 0 20
|
|
297 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
307 SM_AMIGA_2_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_3_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 5 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
298 inst_CLK_000_DD 3 -1 7 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 2 3 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 1 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
34 VMA 5 327 3 0 34 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 3 0 20
|
|
297 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
307 SM_AMIGA_2_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 4 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
298 inst_CLK_000_DD 3 -1 1 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
34 VMA 5 327 3 0 34 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 3 0 20
|
|
297 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
307 SM_AMIGA_2_ 3 -1 6 3 1 3 6 -1 -1 5 0 20
|
|
305 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 4 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_DD 3 -1 1 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
34 VMA 5 327 3 0 34 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 3 0 20
|
|
298 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
309 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 4 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 1 1 3 -1 -1 1 0 21
|
|
299 inst_CLK_000_DD 3 -1 1 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 1 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 1 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 3 6 -1 -1 5 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
309 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 1 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
298 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
34 VMA 5 327 3 0 34 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
305 SM_AMIGA_4_ 3 -1 6 4 1 3 6 7 -1 -1 3 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_3_ 3 -1 7 3 1 6 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
309 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 7 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 4 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 1 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 3 6 -1 -1 5 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
309 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 1 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
298 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
34 VMA 5 327 3 0 34 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
309 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 6 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 4 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
299 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 1 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 3 6 -1 -1 5 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
309 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 1 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
298 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 1 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 3 6 -1 -1 5 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
309 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 1 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
298 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
297 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_2_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
295 inst_VPA_SYNC 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 5 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
307 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
293 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
326 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
298 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
296 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
307 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 5 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_2_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 5 0 20
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 SM_AMIGA_6_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
303 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
302 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
293 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
298 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
297 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
307 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 5 1 20
|
|
304 SM_AMIGA_2_ 3 -1 3 4 1 3 6 7 -1 -1 3 0 21
|
|
296 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_3_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_6_ 3 -1 7 3 1 3 7 -1 -1 3 0 21
|
|
298 cpu_est_0_ 3 -1 7 3 1 6 7 -1 -1 3 0 20
|
|
308 SM_AMIGA_5_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_4_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_DD 3 -1 7 3 1 6 7 -1 -1 1 0 20
|
|
313 inst_DTACK_SYNC 3 -1 6 2 3 6 -1 -1 5 0 20
|
|
309 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 5 0 20
|
|
295 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 5 0 20
|
|
293 cpu_est_1_ 3 -1 1 2 1 6 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 2 1 6 65 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 1 2 1 6 -1 -1 3 1 20
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
312 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_D_0_ 3 -1 7 2 1 7 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
303 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 3 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
34 VMA 5 327 3 0 34 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 7 0 20
|
|
327 RN_VMA 3 34 3 2 3 7 34 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
34 VMA 5 327 3 0 34 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 6 0 20
|
|
307 SM_AMIGA_1_ 3 -1 6 3 1 3 6 -1 -1 5 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
327 RN_VMA 3 34 3 2 3 7 34 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
309 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 20
|
|
302 SM_AMIGA_2_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
295 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
327 RN_VMA 3 34 3 2 3 7 34 -1 3 0 21
|
|
307 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
300 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 inst_VPA_SYNC 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
293 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
297 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
301 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
299 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_000_DD 3 -1 7 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 20
|
|
302 SM_AMIGA_2_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
295 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
300 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
299 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
293 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
326 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
297 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
309 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
301 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
296 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 20
|
|
302 SM_AMIGA_2_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
296 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
300 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
299 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
326 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
309 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
301 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
297 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 20
|
|
302 SM_AMIGA_2_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
296 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
300 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
299 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
294 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
326 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
309 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
301 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
297 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
34 VMA 5 327 3 0 34 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 20
|
|
302 SM_AMIGA_2_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
295 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
300 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
299 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
293 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
326 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
297 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
309 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
301 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
296 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
34 VMA 5 325 3 0 34 -1 3 1 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
302 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 20
|
|
305 SM_AMIGA_3_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
304 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
295 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
307 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
300 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
297 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
303 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
299 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
325 RN_VMA 3 34 3 1 3 34 -1 3 1 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
309 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
301 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
296 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 2 3 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 318 3 0 31 -1 11 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
34 VMA 5 325 3 0 34 -1 3 1 21
|
|
30 LDS_000 5 319 3 0 30 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 322 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
302 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 20
|
|
305 SM_AMIGA_3_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
304 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
295 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
307 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
300 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
298 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
297 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
303 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
299 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
325 RN_VMA 3 34 3 1 3 34 -1 3 1 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
309 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
301 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
296 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 2 3 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
34 VMA 5 327 3 0 34 -1 4 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 324 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
303 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 20
|
|
305 SM_AMIGA_3_ 3 -1 6 3 1 3 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
296 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
304 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_VMA 3 34 3 1 3 34 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
299 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
298 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
324 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
297 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
34 VMA 5 331 3 0 34 -1 4 0 21
|
|
65 E 5 330 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
307 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 20
|
|
297 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_3_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
322 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
313 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
331 RN_VMA 3 34 3 1 3 34 -1 4 0 21
|
|
318 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
301 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
315 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
300 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 cpu_est_d_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
294 cpu_est_d_3_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
293 cpu_est_d_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 1 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 321 3 0 31 -1 11 0 21
|
|
65 E 5 327 6 0 65 -1 4 0 21
|
|
34 VMA 5 328 3 0 34 -1 4 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
64 CLK_DIV_OUT 5 325 6 0 64 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
304 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 20
|
|
297 inst_CLK_000_D 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
306 SM_AMIGA_3_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
327 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
312 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
311 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
300 cpu_est_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
326 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
316 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
298 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
328 RN_VMA 3 34 3 1 3 34 -1 4 0 21
|
|
299 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
325 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
303 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
307 cpu_est_d_0_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
301 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 cpu_est_d_3_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 1 1 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 330 6 0 65 -1 4 0 21
|
|
34 VMA 5 331 3 0 34 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
305 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 20
|
|
307 SM_AMIGA_3_ 3 -1 1 4 1 3 6 7 -1 -1 3 0 21
|
|
299 inst_CLK_000_D 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
317 inst_DTACK_SYNC 3 -1 7 3 1 6 7 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
330 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
301 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
300 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
331 RN_VMA 3 34 3 1 3 34 -1 4 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
316 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
315 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
298 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 cpu_est_d_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
308 cpu_est_d_0_ 3 -1 1 1 6 -1 -1 1 0 20
|
|
297 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 cpu_est_d_3_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
293 cpu_est_d_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 2 6 7 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 2 1 6 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 330 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 328 6 0 64 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
303 cpu_est_2_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
323 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_000_D 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
330 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
311 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 cpu_est_d_2_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
328 RN_CLK_DIV_OUT 3 64 6 1 6 64 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
317 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
316 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
315 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 325 3 0 31 -1 11 0 21
|
|
65 E 5 330 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 326 3 0 30 -1 3 0 21
|
|
28 BG_000 5 327 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 0 21
|
|
32 AS_000 5 324 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
310 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 20
|
|
300 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
297 inst_VPA_SYNC 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
302 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
330 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
314 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
303 cpu_est_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
312 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 7 2 6 7 -1 -1 3 0 20
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
328 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
318 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
319 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
331 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
316 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
315 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
306 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 326 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 325 3 0 31 -1 11 0 21
|
|
65 E 5 330 6 0 65 -1 4 0 21
|
|
28 BG_000 5 327 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
312 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
301 inst_CLK_000_D 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
315 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
309 cpu_est_d_2_ 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
330 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
304 cpu_est_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
313 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 7 2 6 7 -1 -1 3 0 20
|
|
302 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
328 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
318 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
303 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
317 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
316 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
307 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
299 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 4 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 7 3 1 6 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
323 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
314 SM_AMIGA_1_ 3 -1 7 2 1 7 -1 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 7 2 1 7 -1 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 7 2 1 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 3 2 3 7 -1 -1 1 0 20
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
329 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 un1_UDS_000_INT_0_sqmuxa_i 3 -1 6 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
317 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
316 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
315 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 7 1 7 -1 -1 2 0 21
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 7 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 4 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 7 3 1 6 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
323 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
314 SM_AMIGA_1_ 3 -1 7 2 1 7 -1 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 7 2 1 7 -1 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 7 2 1 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 3 2 3 7 -1 -1 1 0 20
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
329 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 un1_UDS_000_INT_0_sqmuxa_i 3 -1 6 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
317 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
316 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
315 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 7 1 7 -1 -1 2 0 21
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 7 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 4 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 7 3 1 6 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
323 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
314 SM_AMIGA_1_ 3 -1 7 2 1 7 -1 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 7 2 1 7 -1 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 7 2 1 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 3 2 3 7 -1 -1 1 0 20
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
329 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 un1_UDS_000_INT_0_sqmuxa_i 3 -1 6 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
317 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
316 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
315 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 7 1 7 -1 -1 2 0 21
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 7 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 4 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 7 3 1 6 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
323 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
314 SM_AMIGA_1_ 3 -1 7 2 1 7 -1 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 7 2 1 7 -1 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 7 2 1 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 3 2 3 7 -1 -1 1 0 20
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
329 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 un1_UDS_000_INT_0_sqmuxa_i 3 -1 6 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
317 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
316 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
315 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 7 1 7 -1 -1 2 0 21
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 7 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 4 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
309 SM_AMIGA_4_ 3 -1 3 4 1 3 6 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 7 3 1 6 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
323 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
314 SM_AMIGA_1_ 3 -1 7 2 1 7 -1 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 7 2 1 7 -1 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 7 2 1 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 3 2 3 7 -1 -1 1 0 20
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
329 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 un1_UDS_000_INT_0_sqmuxa_i 3 -1 6 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
317 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
316 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
315 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 7 1 7 -1 -1 2 0 21
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 7 40 162
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 325 7 1 3 80 -1 6 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 327 3 0 31 -1 11 0 21
|
|
65 E 5 332 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 328 3 0 30 -1 3 0 21
|
|
28 BG_000 5 329 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 333 3 0 34 -1 2 0 21
|
|
32 AS_000 5 326 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 324 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 335 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 334 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
319 SM_AMIGA_0_ 3 -1 0 4 0 1 6 7 -1 -1 4 0 20
|
|
312 CLK_000_CNT_0_ 3 -1 0 4 0 1 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 0 4 0 3 6 7 -1 -1 2 0 20
|
|
314 CLK_000_CNT_2_ 3 -1 6 3 1 6 7 -1 -1 5 0 21
|
|
318 SM_AMIGA_1_ 3 -1 7 3 0 1 7 -1 -1 4 0 21
|
|
313 CLK_000_CNT_1_ 3 -1 1 3 1 6 7 -1 -1 4 0 20
|
|
317 SM_AMIGA_2_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
316 SM_AMIGA_3_ 3 -1 0 3 0 1 6 -1 -1 3 0 20
|
|
326 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 3 0 6 7 -1 -1 2 0 20
|
|
309 cpu_est_d_2_ 3 -1 0 3 0 3 7 -1 -1 1 0 21
|
|
305 inst_CLK_000_DD 3 -1 3 3 0 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 3 0 3 7 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 0 3 0 3 7 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 6 3 0 3 7 -1 -1 1 0 21
|
|
315 CLK_000_CNT_3_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 0 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
331 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
325 RN_DSACK_1_ 3 80 7 1 7 80 -1 6 0 21
|
|
332 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
323 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
335 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
334 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
333 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
324 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
322 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
321 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
301 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 325 7 1 3 80 -1 6 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 327 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 328 3 0 30 -1 3 0 21
|
|
28 BG_000 5 329 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 335 3 0 34 -1 2 0 21
|
|
32 AS_000 5 326 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 324 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
319 SM_AMIGA_0_ 3 -1 0 4 0 1 6 7 -1 -1 4 0 20
|
|
312 CLK_000_CNT_0_ 3 -1 0 4 0 1 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 0 4 0 3 6 7 -1 -1 2 0 20
|
|
314 CLK_000_CNT_2_ 3 -1 6 3 1 6 7 -1 -1 5 0 21
|
|
318 SM_AMIGA_1_ 3 -1 7 3 0 1 7 -1 -1 4 0 21
|
|
313 CLK_000_CNT_1_ 3 -1 1 3 1 6 7 -1 -1 4 0 20
|
|
317 SM_AMIGA_2_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
316 SM_AMIGA_3_ 3 -1 0 3 0 1 6 -1 -1 3 0 20
|
|
326 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 3 0 6 7 -1 -1 2 0 20
|
|
309 cpu_est_d_2_ 3 -1 0 3 0 3 7 -1 -1 1 0 21
|
|
305 inst_CLK_000_DD 3 -1 3 3 0 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 3 0 3 7 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 0 3 0 3 7 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 6 3 0 3 7 -1 -1 1 0 21
|
|
315 CLK_000_CNT_3_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 0 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
331 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
325 RN_DSACK_1_ 3 80 7 1 7 80 -1 6 0 21
|
|
333 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
323 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
335 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
324 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
322 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
321 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
301 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 1 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 325 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 327 3 0 31 -1 11 0 21
|
|
65 E 5 332 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 328 3 0 30 -1 3 0 21
|
|
28 BG_000 5 329 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 333 3 0 34 -1 2 0 21
|
|
32 AS_000 5 326 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 324 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 335 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 334 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 4 0 3 6 7 -1 -1 2 0 20
|
|
309 cpu_est_d_2_ 3 -1 6 4 0 3 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D 3 -1 3 4 0 3 6 7 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 4 0 3 6 7 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 4 0 3 6 7 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 7 4 0 3 6 7 -1 -1 1 0 20
|
|
319 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
318 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
316 SM_AMIGA_3_ 3 -1 0 3 0 1 6 -1 -1 3 0 20
|
|
310 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 3 0 6 7 -1 -1 2 0 20
|
|
314 CLK_000_CNT_2_ 3 -1 0 2 0 7 -1 -1 5 0 21
|
|
315 CLK_000_CNT_3_ 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
317 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
331 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
325 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
332 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
323 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
313 CLK_000_CNT_1_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
335 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
334 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
333 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
324 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
322 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
321 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_000_CNT_0_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
305 inst_CLK_000_DD 3 -1 3 1 0 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 7 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
325 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
301 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 7 0 21
|
|
313 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
331 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
312 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
325 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
301 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
313 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
331 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
312 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
30 LDS_000 5 326 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 325 3 0 31 -1 7 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
28 BG_000 5 327 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 333 3 0 34 -1 2 0 21
|
|
32 AS_000 5 324 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 322 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 3 3 1 3 7 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 6 3 0 6 7 -1 -1 4 0 21
|
|
315 SM_AMIGA_3_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 0 2 0 7 -1 -1 5 0 21
|
|
331 RN_E 3 65 6 2 0 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 3 2 1 3 -1 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 0 2 0 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
328 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 cpu_est_d_2_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
309 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
333 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
306 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
304 CLK_CNT_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
10 CLK_000 9 -1 4 0 3 6 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
70 RW 1 -1 -1 1 4 70 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
31 UDS_000 5 326 3 0 31 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 4 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 1 3 6 7 -1 -1 4 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
331 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 3 2 3 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
313 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 4 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 4 0 21
|
|
322 un1_LDS_000_INT_0_sqmuxa_4_i 3 -1 1 1 3 -1 -1 4 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
312 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
309 SM_AMIGA_4_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 1 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 1 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
301 cpu_est_0_ 3 -1 7 3 1 6 7 -1 -1 1 0 20
|
|
331 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
312 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 1 2 1 6 -1 -1 4 0 20
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
313 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 3 6 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 325 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 327 3 0 31 -1 11 0 21
|
|
65 E 5 332 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 328 3 0 30 -1 4 0 21
|
|
28 BG_000 5 329 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 333 3 0 34 -1 2 0 21
|
|
32 AS_000 5 326 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 324 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 335 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 334 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 4 0 1 3 7 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 4 0 1 6 7 -1 -1 2 0 20
|
|
318 SM_AMIGA_0_ 3 -1 0 3 0 1 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
326 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
313 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
328 RN_LDS_000 3 30 3 2 3 6 30 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 4 0 20
|
|
312 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 3 0 20
|
|
303 cpu_est_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
331 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
309 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 0 2 0 3 -1 -1 1 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
323 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
325 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
332 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
335 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
334 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
333 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
324 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 2 0 6 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 4 0 3 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 8 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
325 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
301 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 8 0 21
|
|
313 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
331 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
312 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 8 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
325 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
301 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 8 0 21
|
|
313 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
331 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
312 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 7 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
325 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
301 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 7 0 21
|
|
313 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
331 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
312 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 6 3 0 6 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 0 2 0 7 -1 -1 5 0 21
|
|
331 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 7 2 0 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 6 1 3 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 3 4 6 7 70 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 9 1 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 6 3 0 6 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 0 2 0 7 -1 -1 5 0 21
|
|
331 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 7 2 0 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 1 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_i 3 -1 6 1 3 -1 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 3 4 6 7 70 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 9 1 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 6 3 0 6 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 0 2 0 7 -1 -1 5 0 21
|
|
331 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 7 2 0 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 1 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 6 1 3 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 3 4 6 7 70 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 12 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 6 3 0 6 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 0 2 0 7 -1 -1 5 0 21
|
|
331 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 7 2 0 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 12 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 6 1 3 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 3 4 6 7 70 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 12 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 6 3 0 6 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 0 2 0 7 -1 -1 5 0 21
|
|
331 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 7 2 0 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 12 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 6 1 3 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 3 4 6 7 70 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 11 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 6 3 0 6 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 0 2 0 7 -1 -1 5 0 21
|
|
331 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 7 2 0 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 11 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 6 1 3 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 3 4 6 7 70 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 11 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
301 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 11 0 21
|
|
313 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
331 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
312 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 7 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
301 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 7 0 21
|
|
313 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
331 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
312 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 8 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
301 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 8 0 21
|
|
313 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
331 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
312 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 10 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
301 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 10 0 21
|
|
313 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
331 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
312 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 6 3 0 6 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 0 2 0 7 -1 -1 5 0 21
|
|
331 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 7 2 0 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_i 3 -1 6 1 3 -1 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 3 4 6 7 70 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 6 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
325 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
301 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
331 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 6 0 21
|
|
313 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
333 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
312 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 6 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 0 4 0 1 6 7 -1 -1 4 0 21
|
|
298 inst_VPA_SYNC 3 -1 0 4 0 3 6 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 6 4 0 3 6 7 -1 -1 1 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
303 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 0 20
|
|
325 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
313 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
333 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 4 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 1 2 1 6 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
332 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 3 2 0 3 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 2 0 3 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 1 2 0 3 -1 -1 1 0 20
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 6 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 7 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 6 3 0 6 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 0 2 0 7 -1 -1 5 0 21
|
|
331 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 7 2 0 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 7 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 6 1 3 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 3 4 6 7 70 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 6 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 6 3 0 6 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 0 2 0 7 -1 -1 5 0 21
|
|
333 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 7 2 0 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 6 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 6 1 3 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 3 4 6 7 70 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 6 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 332 6 0 65 -1 4 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 333 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 6 3 0 6 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 0 2 0 7 -1 -1 5 0 21
|
|
332 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 7 2 0 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 6 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_i 3 -1 6 1 3 -1 -1 3 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 3 4 6 7 70 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 0 4 0 1 6 7 -1 -1 4 0 21
|
|
298 inst_VPA_SYNC 3 -1 0 4 0 3 6 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D 3 -1 6 4 0 3 6 7 -1 -1 1 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
303 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 0 20
|
|
325 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
314 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
333 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 4 0 21
|
|
313 CLK_000_CNT_1_ 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
308 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 1 2 1 6 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
332 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
312 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
309 cpu_est_d_2_ 3 -1 3 2 0 3 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 2 0 3 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 1 2 0 3 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 11 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 6 3 0 6 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 0 2 0 7 -1 -1 5 0 21
|
|
331 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 7 2 0 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 11 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 6 1 3 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 3 4 6 7 70 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 7 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 333 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
312 CLK_000_CNT_0_ 3 -1 6 3 0 6 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
309 cpu_est_d_2_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
314 CLK_000_CNT_2_ 3 -1 0 2 0 7 -1 -1 5 0 21
|
|
331 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
313 CLK_000_CNT_1_ 3 -1 7 2 0 7 -1 -1 4 0 20
|
|
308 CLK_000_CNT_3_ 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 7 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 6 1 3 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 3 4 6 7 70 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
318 SM_AMIGA_0_ 3 -1 0 4 0 1 6 7 -1 -1 4 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 4 0 3 6 7 -1 -1 2 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 0 3 0 1 6 -1 -1 3 0 20
|
|
325 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 3 0 6 7 -1 -1 2 0 20
|
|
314 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
333 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 4 0 20
|
|
308 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
332 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
312 CLK_000_CNT_0_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
309 cpu_est_d_2_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 2 0 3 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 1 1 3 -1 -1 4 0 21
|
|
313 CLK_000_CNT_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 1 6 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 1 3 4 70 -1
|
|
97 DS_030 1 -1 -1 2 1 3 97 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
318 SM_AMIGA_0_ 3 -1 0 4 0 1 6 7 -1 -1 4 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 4 0 3 6 7 -1 -1 2 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 0 3 0 1 6 -1 -1 3 0 20
|
|
325 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 3 0 6 7 -1 -1 2 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
333 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
332 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 2 0 3 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 1 1 3 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 1 6 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 1 3 4 70 -1
|
|
97 DS_030 1 -1 -1 2 1 3 97 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 3 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 7 4 0 1 3 6 -1 -1 1 0 20
|
|
317 SM_AMIGA_1_ 3 -1 0 3 0 1 7 -1 -1 10 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
315 SM_AMIGA_3_ 3 -1 3 3 0 1 3 -1 -1 3 0 21
|
|
325 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 7 3 0 6 7 -1 -1 2 0 20
|
|
298 inst_VPA_SYNC 3 -1 3 3 0 3 7 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 3 3 0 3 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 6 3 0 3 7 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 3 0 3 7 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 7 3 0 3 7 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 6 3 0 3 7 -1 -1 1 0 21
|
|
318 SM_AMIGA_0_ 3 -1 0 2 0 1 -1 -1 6 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 0 2 0 7 -1 -1 5 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 6 2 0 6 -1 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
332 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 6 2 0 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
333 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 3 40 162
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 4 0 1 3 7 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 330 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 331 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 4 0 3 6 7 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 1 4 0 3 6 7 -1 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 4 0 3 6 7 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 1 4 0 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 4 0 3 6 7 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 3 4 0 3 6 7 -1 -1 1 0 20
|
|
317 SM_AMIGA_1_ 3 -1 0 3 0 1 7 -1 -1 5 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 6 3 0 6 7 -1 -1 5 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 7 3 0 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
315 SM_AMIGA_3_ 3 -1 0 3 0 1 6 -1 -1 3 0 20
|
|
310 SM_AMIGA_5_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 6 3 0 6 7 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 3 0 6 7 -1 -1 2 0 20
|
|
301 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 0 2 0 1 -1 -1 6 0 20
|
|
333 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 7 2 0 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 1 2 1 6 -1 -1 3 0 20
|
|
332 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
331 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
320 SM_AMIGA_D_1_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 0 2 0 3 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
330 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
318 SM_AMIGA_0_ 3 -1 0 4 0 1 6 7 -1 -1 4 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 4 0 3 6 7 -1 -1 2 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 0 3 0 1 6 -1 -1 3 0 20
|
|
325 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 3 0 6 7 -1 -1 2 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
333 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
332 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 2 0 3 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 1 1 3 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 1 6 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 1 3 4 70 -1
|
|
97 DS_030 1 -1 -1 2 1 3 97 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
318 SM_AMIGA_0_ 3 -1 0 4 0 1 6 7 -1 -1 4 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 4 0 3 6 7 -1 -1 2 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
310 SM_AMIGA_3_ 3 -1 0 3 0 1 6 -1 -1 3 0 20
|
|
325 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 3 0 6 7 -1 -1 2 0 20
|
|
314 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
333 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 4 0 20
|
|
315 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
332 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
312 CLK_000_CNT_0_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 2 0 3 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 1 1 3 -1 -1 4 0 21
|
|
313 CLK_000_CNT_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 1 6 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 1 3 4 70 -1
|
|
97 DS_030 1 -1 -1 2 1 3 97 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
318 SM_AMIGA_0_ 3 -1 0 4 0 1 6 7 -1 -1 4 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 4 0 3 6 7 -1 -1 2 0 20
|
|
297 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
310 SM_AMIGA_3_ 3 -1 0 3 0 1 6 -1 -1 3 0 20
|
|
325 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
298 inst_DTACK_SYNC 3 -1 0 3 0 6 7 -1 -1 2 0 20
|
|
314 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
317 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 4 0 20
|
|
315 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
303 cpu_est_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
312 CLK_000_CNT_0_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
301 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
308 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
302 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
296 cpu_est_d_3_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
295 cpu_est_d_2_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 2 0 3 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
333 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 1 1 3 -1 -1 4 0 21
|
|
313 CLK_000_CNT_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
305 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 1 6 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 1 3 4 70 -1
|
|
97 DS_030 1 -1 -1 2 1 3 97 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
318 SM_AMIGA_0_ 3 -1 0 4 0 1 6 7 -1 -1 4 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 4 0 3 6 7 -1 -1 2 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 0 3 0 1 6 -1 -1 3 0 20
|
|
325 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 3 0 6 7 -1 -1 2 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
333 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
332 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 2 0 3 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 1 1 3 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 1 6 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 1 3 4 70 -1
|
|
97 DS_030 1 -1 -1 2 1 3 97 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
318 SM_AMIGA_0_ 3 -1 0 4 0 1 6 7 -1 -1 4 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 4 0 3 6 7 -1 -1 2 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 0 3 0 1 6 -1 -1 3 0 20
|
|
325 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 3 0 6 7 -1 -1 2 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
333 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
332 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 2 0 3 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 1 1 3 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 1 6 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 1 3 4 70 -1
|
|
97 DS_030 1 -1 -1 2 1 3 97 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
318 SM_AMIGA_0_ 3 -1 0 4 0 1 6 7 -1 -1 4 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 4 0 3 6 7 -1 -1 2 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 0 3 0 1 6 -1 -1 3 0 20
|
|
325 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 3 0 6 7 -1 -1 2 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
333 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
302 cpu_est_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
332 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
307 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 2 0 3 -1 -1 1 0 20
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 1 1 3 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 1 6 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 3 1 3 4 70 -1
|
|
97 DS_030 1 -1 -1 2 1 3 97 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
325 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
301 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
308 cpu_est_d_2_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
304 CLK_CNT_0_ 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
313 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
333 RN_E 3 65 6 1 6 65 -1 4 0 21
|
|
314 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
312 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 6 40 162
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 11 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 4 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
318 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 6 3 0 6 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
308 cpu_est_d_2_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
313 CLK_000_CNT_2_ 3 -1 0 2 0 7 -1 -1 5 0 21
|
|
331 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
317 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
314 CLK_000_CNT_3_ 3 -1 0 2 0 7 -1 -1 4 0 21
|
|
312 CLK_000_CNT_1_ 3 -1 7 2 0 7 -1 -1 4 0 20
|
|
302 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 11 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_i 3 -1 6 1 3 -1 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
40 VPA 1 -1 4 0 40 -1
|
|
261 inst_VPA_D 8 40 4 1 0 40 162
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 3 4 6 7 70 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
103 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 326 7 1 3 80 -1 11 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 328 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 329 3 0 30 -1 4 0 21
|
|
28 BG_000 5 330 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 331 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 327 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 325 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 336 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 335 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 4 0 3 6 7 -1 -1 2 0 21
|
|
319 SM_AMIGA_0_ 3 -1 0 3 0 1 7 -1 -1 4 0 21
|
|
313 CLK_000_CNT_1_ 3 -1 1 3 1 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 3 1 3 5 -1 -1 3 0 21
|
|
332 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
312 CLK_000_CNT_0_ 3 -1 1 3 1 6 7 -1 -1 2 0 20
|
|
311 SM_AMIGA_5_ 3 -1 3 3 1 3 5 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
314 CLK_000_CNT_2_ 3 -1 7 2 6 7 -1 -1 5 0 20
|
|
333 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
329 RN_LDS_000 3 30 3 2 3 5 30 -1 4 0 21
|
|
318 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 4 0 21
|
|
315 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
323 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 2 3 5 -1 -1 3 0 21
|
|
317 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
331 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
327 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
309 cpu_est_d_2_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 1 2 1 7 -1 -1 1 0 20
|
|
302 cpu_est_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 2 0 3 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
328 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
326 RN_DSACK_1_ 3 80 7 1 7 80 -1 11 0 21
|
|
324 LDS_000_0 3 -1 5 1 3 -1 -1 10 0 21
|
|
303 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
330 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
336 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
335 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
325 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
322 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
321 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
305 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_VPA_D 3 -1 3 1 0 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 4 0 1 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 4 3 4 5 7 70 -1
|
|
97 DS_030 1 -1 -1 2 3 5 97 -1
|
|
68 A_0_ 1 -1 -1 2 3 5 68 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 5 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 5 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 3 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 325 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 328 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 327 3 0 31 -1 11 0 21
|
|
65 E 5 334 6 0 65 -1 4 0 21
|
|
28 BG_000 5 329 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
34 VMA 5 335 3 0 34 -1 2 0 21
|
|
32 AS_000 5 326 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 324 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 333 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
319 SM_AMIGA_0_ 3 -1 6 4 0 1 6 7 -1 -1 4 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
300 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_1_ 3 -1 6 3 0 1 6 -1 -1 4 0 20
|
|
317 SM_AMIGA_2_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
|
|
316 SM_AMIGA_3_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
|
|
331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
334 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
303 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
322 SM_AMIGA_D_2_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
309 cpu_est_d_2_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
302 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
325 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
314 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
315 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
313 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
323 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
335 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
324 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
305 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 1 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 325 7 1 3 80 -1 8 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 328 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 327 3 0 31 -1 11 0 21
|
|
65 E 5 332 6 0 65 -1 4 0 21
|
|
28 BG_000 5 329 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
34 VMA 5 335 3 0 34 -1 2 0 21
|
|
32 AS_000 5 326 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 324 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
319 SM_AMIGA_0_ 3 -1 6 4 0 1 6 7 -1 -1 4 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
300 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_1_ 3 -1 6 3 0 1 6 -1 -1 4 0 20
|
|
317 SM_AMIGA_2_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
|
|
316 SM_AMIGA_3_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
|
|
331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
332 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
303 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
322 SM_AMIGA_D_2_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
309 cpu_est_d_2_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
302 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
325 RN_DSACK_1_ 3 80 7 1 7 80 -1 8 0 21
|
|
314 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
315 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
313 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
323 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
335 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
324 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
305 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 1 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 325 7 1 3 80 -1 6 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 327 3 0 31 -1 11 0 21
|
|
65 E 5 334 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 328 3 0 30 -1 3 0 21
|
|
28 BG_000 5 329 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
34 VMA 5 335 3 0 34 -1 2 0 21
|
|
32 AS_000 5 326 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 324 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 333 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
319 SM_AMIGA_0_ 3 -1 6 4 0 1 6 7 -1 -1 4 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
300 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_1_ 3 -1 6 3 0 1 6 -1 -1 4 0 20
|
|
317 SM_AMIGA_2_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
|
|
316 SM_AMIGA_3_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
|
|
331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
334 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
303 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
322 SM_AMIGA_D_2_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
309 cpu_est_d_2_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
308 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
302 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
325 RN_DSACK_1_ 3 80 7 1 7 80 -1 6 0 21
|
|
314 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
323 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
315 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
313 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
335 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
324 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
305 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 1 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 325 7 1 3 80 -1 6 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 327 3 0 31 -1 11 0 21
|
|
65 E 5 334 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 328 3 0 30 -1 3 0 21
|
|
28 BG_000 5 329 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
34 VMA 5 335 3 0 34 -1 2 0 21
|
|
32 AS_000 5 326 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 324 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 333 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
319 SM_AMIGA_0_ 3 -1 0 4 0 1 6 7 -1 -1 4 0 20
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
314 CLK_000_CNT_2_ 3 -1 6 3 5 6 7 -1 -1 5 0 21
|
|
318 SM_AMIGA_1_ 3 -1 6 3 0 1 6 -1 -1 4 0 20
|
|
313 CLK_000_CNT_1_ 3 -1 7 3 5 6 7 -1 -1 4 0 20
|
|
332 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
312 CLK_000_CNT_0_ 3 -1 7 3 5 6 7 -1 -1 2 0 20
|
|
309 cpu_est_d_2_ 3 -1 6 3 0 3 6 -1 -1 1 0 21
|
|
302 cpu_est_0_ 3 -1 1 3 0 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 3 0 3 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 3 0 3 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
334 RN_E 3 65 6 2 0 6 65 -1 4 0 21
|
|
315 CLK_000_CNT_3_ 3 -1 5 2 5 7 -1 -1 4 0 21
|
|
303 cpu_est_1_ 3 -1 6 2 0 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
317 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
316 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
305 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
325 RN_DSACK_1_ 3 80 7 1 7 80 -1 6 0 21
|
|
323 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
335 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
324 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
322 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
321 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
301 inst_CLK_OUT_PRE 3 -1 6 1 6 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
10 CLK_000 9 -1 5 0 3 5 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 325 7 1 3 80 -1 8 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 327 3 0 31 -1 11 0 21
|
|
65 E 5 332 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 328 3 0 30 -1 3 0 21
|
|
28 BG_000 5 329 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
34 VMA 5 333 3 0 34 -1 2 0 21
|
|
32 AS_000 5 326 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 324 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 335 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 334 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
319 SM_AMIGA_0_ 3 -1 6 4 0 1 6 7 -1 -1 4 0 20
|
|
300 inst_CLK_000_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 20
|
|
331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
332 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
318 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
303 cpu_est_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
317 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
316 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
309 cpu_est_d_2_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
308 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
302 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
325 RN_DSACK_1_ 3 80 7 1 7 80 -1 8 0 21
|
|
314 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
323 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
315 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
313 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
335 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
334 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
333 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
324 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
322 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
321 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
305 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 1 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 325 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 327 3 0 31 -1 11 0 21
|
|
65 E 5 332 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 328 3 0 30 -1 3 0 21
|
|
28 BG_000 5 329 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
34 VMA 5 333 3 0 34 -1 2 0 21
|
|
32 AS_000 5 326 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 324 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 335 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 334 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
319 SM_AMIGA_0_ 3 -1 6 4 0 1 6 7 -1 -1 4 0 20
|
|
300 inst_CLK_000_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 20
|
|
331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
332 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
318 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
303 cpu_est_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
317 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
316 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
309 cpu_est_d_2_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
308 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
302 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
325 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
314 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
323 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
315 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
313 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
335 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
334 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
333 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
324 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
322 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
321 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
305 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 1 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
103 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 326 7 1 3 80 -1 6 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 328 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 329 3 0 30 -1 4 0 21
|
|
28 BG_000 5 330 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 331 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
34 VMA 5 335 3 0 34 -1 2 0 21
|
|
32 AS_000 5 327 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 325 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 336 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 334 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
319 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
303 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 3 0 1 3 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 1 3 1 6 7 -1 -1 3 0 20
|
|
332 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
302 cpu_est_0_ 3 -1 7 3 1 6 7 -1 -1 1 0 20
|
|
333 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
329 RN_LDS_000 3 30 3 2 0 3 30 -1 4 0 21
|
|
318 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
313 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
323 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
317 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
316 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
331 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
327 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
322 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
312 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
310 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
309 cpu_est_d_2_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
308 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
305 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
294 cpu_est_d_1_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
293 cpu_est_d_0_ 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
328 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 LDS_000_0 3 -1 0 1 3 -1 -1 10 0 21
|
|
326 RN_DSACK_1_ 3 80 7 1 7 80 -1 6 0 21
|
|
314 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
315 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
330 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
336 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
335 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
334 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
325 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
301 inst_CLK_OUT_PRE 3 -1 6 1 6 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 2 6 7 10 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
97 DS_030 1 -1 -1 2 0 3 97 -1
|
|
68 A_0_ 1 -1 -1 2 0 3 68 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 0 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 0 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 325 7 1 3 80 -1 8 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 327 3 0 31 -1 11 0 21
|
|
65 E 5 332 6 0 65 -1 4 0 21
|
|
30 LDS_000 5 328 3 0 30 -1 3 0 21
|
|
28 BG_000 5 329 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 0 21
|
|
32 AS_000 5 326 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 324 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 335 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
319 SM_AMIGA_0_ 3 -1 0 4 0 1 6 7 -1 -1 4 0 20
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
314 CLK_000_CNT_2_ 3 -1 6 3 5 6 7 -1 -1 5 0 21
|
|
318 SM_AMIGA_1_ 3 -1 6 3 0 1 6 -1 -1 4 0 20
|
|
313 CLK_000_CNT_1_ 3 -1 7 3 5 6 7 -1 -1 4 0 20
|
|
331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
312 CLK_000_CNT_0_ 3 -1 7 3 5 6 7 -1 -1 2 0 20
|
|
309 cpu_est_d_2_ 3 -1 6 3 0 3 6 -1 -1 1 0 21
|
|
302 cpu_est_0_ 3 -1 1 3 0 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 3 0 3 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 3 0 3 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
332 RN_E 3 65 6 2 0 6 65 -1 4 0 21
|
|
315 CLK_000_CNT_3_ 3 -1 5 2 5 7 -1 -1 4 0 21
|
|
303 cpu_est_1_ 3 -1 6 2 0 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
317 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
316 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
305 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
325 RN_DSACK_1_ 3 80 7 1 7 80 -1 8 0 21
|
|
323 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
335 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
324 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
322 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
321 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
301 inst_CLK_OUT_PRE 3 -1 6 1 6 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
10 CLK_000 9 -1 5 0 3 5 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 325 7 1 3 80 -1 8 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 328 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 327 3 0 31 -1 11 0 21
|
|
65 E 5 334 6 0 65 -1 4 0 21
|
|
34 VMA 5 335 3 0 34 -1 3 0 21
|
|
28 BG_000 5 329 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
32 AS_000 5 326 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 324 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 333 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
319 SM_AMIGA_0_ 3 -1 0 4 0 1 6 7 -1 -1 4 0 20
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
315 CLK_000_CNT_2_ 3 -1 6 3 5 6 7 -1 -1 5 0 21
|
|
318 SM_AMIGA_1_ 3 -1 6 3 0 1 6 -1 -1 4 0 20
|
|
314 CLK_000_CNT_1_ 3 -1 7 3 5 6 7 -1 -1 4 0 20
|
|
331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
313 CLK_000_CNT_0_ 3 -1 7 3 5 6 7 -1 -1 2 0 20
|
|
309 cpu_est_d_2_ 3 -1 6 3 0 3 6 -1 -1 1 0 21
|
|
302 cpu_est_0_ 3 -1 1 3 0 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 3 0 3 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 3 0 3 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
334 RN_E 3 65 6 2 0 6 65 -1 4 0 21
|
|
316 CLK_000_CNT_3_ 3 -1 5 2 5 7 -1 -1 4 0 21
|
|
303 cpu_est_1_ 3 -1 6 2 0 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
317 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
305 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
325 RN_DSACK_1_ 3 80 7 1 7 80 -1 8 0 21
|
|
335 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
323 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
324 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
322 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
321 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
301 inst_CLK_OUT_PRE 3 -1 6 1 6 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
10 CLK_000 9 -1 5 0 3 5 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 325 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 327 3 0 31 -1 11 0 21
|
|
65 E 5 334 6 0 65 -1 4 0 21
|
|
34 VMA 5 335 3 0 34 -1 3 0 21
|
|
30 LDS_000 5 328 3 0 30 -1 3 0 21
|
|
28 BG_000 5 329 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 333 7 0 77 -1 2 0 21
|
|
32 AS_000 5 326 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 324 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 5 0 1 3 6 7 -1 -1 2 0 20
|
|
319 SM_AMIGA_0_ 3 -1 0 4 0 1 6 7 -1 -1 4 0 20
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 1 6 7 -1 -1 2 0 20
|
|
315 CLK_000_CNT_2_ 3 -1 6 3 5 6 7 -1 -1 5 0 21
|
|
318 SM_AMIGA_1_ 3 -1 6 3 0 1 6 -1 -1 4 0 20
|
|
314 CLK_000_CNT_1_ 3 -1 7 3 5 6 7 -1 -1 4 0 20
|
|
333 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
313 CLK_000_CNT_0_ 3 -1 7 3 5 6 7 -1 -1 2 0 20
|
|
309 cpu_est_d_2_ 3 -1 6 3 0 3 6 -1 -1 1 0 21
|
|
302 cpu_est_0_ 3 -1 1 3 0 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 3 0 3 6 -1 -1 1 0 21
|
|
294 cpu_est_d_1_ 3 -1 6 3 0 3 6 -1 -1 1 0 21
|
|
293 cpu_est_d_0_ 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
334 RN_E 3 65 6 2 0 6 65 -1 4 0 21
|
|
316 CLK_000_CNT_3_ 3 -1 5 2 5 7 -1 -1 4 0 21
|
|
303 cpu_est_1_ 3 -1 6 2 0 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
317 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
305 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
325 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
323 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
335 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
324 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
322 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
321 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
301 inst_CLK_OUT_PRE 3 -1 6 1 6 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
10 CLK_000 9 -1 5 0 3 5 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 0 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
103 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 326 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 328 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 3 0 21
|
|
34 VMA 5 334 3 0 34 -1 3 0 21
|
|
30 LDS_000 5 329 3 0 30 -1 3 0 21
|
|
28 BG_000 5 330 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 331 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
32 AS_000 5 327 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 325 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 336 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 335 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 5 0 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
320 SM_AMIGA_0_ 3 -1 0 4 0 1 3 7 -1 -1 4 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 4 0 1 6 7 -1 -1 2 0 20
|
|
319 SM_AMIGA_1_ 3 -1 6 3 0 1 6 -1 -1 4 0 20
|
|
332 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 cpu_est_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
318 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
304 cpu_est_0_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
331 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
327 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
303 cpu_est_d_2_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
302 cpu_est_d_0_ 3 -1 1 2 0 6 -1 -1 1 0 20
|
|
294 cpu_est_d_3_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
293 cpu_est_d_1_ 3 -1 7 2 0 6 -1 -1 1 0 20
|
|
328 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
326 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
316 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
324 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
317 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
315 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
334 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
333 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
330 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
329 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
306 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
336 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
335 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
325 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
323 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
322 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
321 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
309 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 1 6 -1 -1 2 0 21
|
|
307 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 7 1 6 -1 -1 1 0 20
|
|
297 inst_VPA_D 3 -1 1 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 3 0 21
|
|
34 VMA 5 332 3 0 34 -1 3 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
316 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
298 inst_CLK_000_D 3 -1 0 3 3 6 7 -1 -1 1 0 21
|
|
315 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
311 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
310 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
309 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
312 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
320 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
313 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
293 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
331 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
301 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
296 inst_VPA_D 3 -1 1 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 3 0 21
|
|
34 VMA 5 332 3 0 34 -1 3 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
316 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
298 inst_CLK_000_D 3 -1 0 3 3 6 7 -1 -1 1 0 21
|
|
315 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
311 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
310 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
309 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
312 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
320 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
313 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
293 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
331 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
301 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
296 inst_VPA_D 3 -1 1 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 3 0 21
|
|
34 VMA 5 332 3 0 34 -1 3 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
316 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
298 inst_CLK_000_D 3 -1 0 3 3 6 7 -1 -1 1 0 21
|
|
315 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
311 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
310 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
309 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
312 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
320 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
313 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
293 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
331 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
301 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
296 inst_VPA_D 3 -1 1 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
34 VMA 5 326 3 0 34 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
312 SM_AMIGA_0_ 3 -1 6 4 0 1 3 6 -1 -1 4 0 20
|
|
311 SM_AMIGA_1_ 3 -1 7 4 0 1 6 7 -1 -1 4 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
310 SM_AMIGA_2_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
302 cpu_est_2_ 3 -1 7 3 3 6 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
314 SM_AMIGA_D_1_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
326 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
316 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
305 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 1 6 -1 -1 2 0 21
|
|
297 inst_VPA_D 3 -1 1 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 322 3 0 31 -1 11 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
34 VMA 5 328 3 0 34 -1 3 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
311 SM_AMIGA_1_ 3 -1 6 4 0 1 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 7 4 0 3 6 7 -1 -1 4 0 20
|
|
327 RN_E 3 65 6 4 0 3 6 7 65 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 7 4 0 3 6 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 7 4 0 3 6 7 -1 -1 3 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 4 0 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 3 4 0 3 6 7 -1 -1 1 0 20
|
|
312 SM_AMIGA_0_ 3 -1 0 3 0 1 6 -1 -1 4 0 21
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 3 0 6 7 -1 -1 2 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
310 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
301 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
328 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
316 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
297 inst_VPA_D 3 -1 7 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 4 0 3 6 7 10 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 11 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
34 VMA 5 330 3 0 34 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 5 1 3 5 6 7 -1 -1 2 0 20
|
|
315 SM_AMIGA_1_ 3 -1 6 4 1 5 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 4 3 5 6 7 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 4 3 5 6 7 65 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 6 4 3 5 6 7 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 4 3 5 6 7 -1 -1 3 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 4 1 5 6 7 -1 -1 2 0 20
|
|
316 SM_AMIGA_0_ 3 -1 5 3 1 5 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 3 1 3 5 32 -1 2 0 21
|
|
310 CLK_000_CNT_0_ 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
311 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 11 0 21
|
|
312 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
313 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
330 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 1 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 5 6 7 60 -1
|
|
85 RST 1 -1 -1 5 1 3 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 4 0 5 6 7 10 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 3 3 6 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 6 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 6 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 6 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 6 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 6 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 6 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 6 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
34 VMA 5 331 3 0 34 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 3 0 1 3 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 0 3 0 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
315 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
302 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
312 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
313 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
311 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
331 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 323 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
34 VMA 5 331 3 0 34 -1 3 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 3 0 21
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 4 1 3 6 7 -1 -1 4 0 21
|
|
299 inst_CLK_000_D 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
315 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
303 SM_AMIGA_6_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 CLK_000_CNT_0_ 3 -1 6 3 1 6 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
306 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
298 inst_VPA_SYNC 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
311 CLK_000_CNT_2_ 3 -1 7 2 1 7 -1 -1 5 0 20
|
|
314 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
312 CLK_000_CNT_3_ 3 -1 1 2 1 7 -1 -1 4 0 20
|
|
310 CLK_000_CNT_1_ 3 -1 7 2 1 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
307 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
301 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
318 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
316 SM_AMIGA_D_0_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
296 inst_DTACK_SYNC 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
305 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
319 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
331 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
317 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
302 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
297 inst_VPA_D 3 -1 0 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 4 1 3 6 7 10 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
34 VMA 5 331 3 0 34 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 3 0 1 3 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 0 3 0 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
315 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
302 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
312 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
313 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
311 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
331 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 11 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
34 VMA 5 330 3 0 34 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 5 1 3 5 6 7 -1 -1 2 0 20
|
|
315 SM_AMIGA_1_ 3 -1 6 4 1 5 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 4 3 5 6 7 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 4 3 5 6 7 65 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 6 4 3 5 6 7 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 4 3 5 6 7 -1 -1 3 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 4 1 5 6 7 -1 -1 2 0 20
|
|
316 SM_AMIGA_0_ 3 -1 5 3 1 5 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 3 1 3 5 32 -1 2 0 21
|
|
310 CLK_000_CNT_0_ 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
311 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 11 0 21
|
|
312 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
313 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
330 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 1 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 5 6 7 60 -1
|
|
85 RST 1 -1 -1 5 1 3 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 4 0 5 6 7 10 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 3 3 6 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 6 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 6 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 6 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 6 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 6 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 6 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 6 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
34 VMA 5 326 3 0 34 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
312 SM_AMIGA_0_ 3 -1 6 4 0 1 3 6 -1 -1 4 0 20
|
|
311 SM_AMIGA_1_ 3 -1 7 4 0 1 6 7 -1 -1 4 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 4 1 3 6 7 -1 -1 2 0 20
|
|
299 inst_CLK_000_D 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 3 3 6 7 65 -1 3 0 21
|
|
310 SM_AMIGA_2_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
302 cpu_est_2_ 3 -1 7 3 3 6 7 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
314 SM_AMIGA_D_1_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
303 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
326 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
316 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
305 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 1 6 -1 -1 2 0 21
|
|
297 inst_VPA_D 3 -1 1 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
34 VMA 5 331 3 0 34 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 3 0 1 3 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 0 3 0 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
315 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
302 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
312 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
313 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
311 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
331 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 320 3 0 31 -1 11 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
34 VMA 5 326 3 0 34 -1 3 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
311 SM_AMIGA_1_ 3 -1 6 4 0 1 6 7 -1 -1 4 0 20
|
|
297 inst_VPA_SYNC 3 -1 6 4 0 3 6 7 -1 -1 2 0 20
|
|
298 inst_CLK_000_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 20
|
|
312 SM_AMIGA_0_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 7 3 0 6 7 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 3 0 6 7 65 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 7 3 0 6 7 -1 -1 3 1 20
|
|
301 cpu_est_0_ 3 -1 7 3 0 6 7 -1 -1 3 0 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 6 3 0 6 7 -1 -1 2 0 20
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
310 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
299 inst_CLK_000_DD 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
316 un1_UDS_000_INT_0_sqmuxa_2_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
326 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
315 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
305 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
303 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
296 inst_VPA_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 11 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
34 VMA 5 330 3 0 34 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 5 1 3 5 6 7 -1 -1 2 0 20
|
|
315 SM_AMIGA_1_ 3 -1 6 4 1 5 6 7 -1 -1 4 0 20
|
|
294 cpu_est_1_ 3 -1 6 4 3 5 6 7 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 4 3 5 6 7 65 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 6 4 3 5 6 7 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 4 3 5 6 7 -1 -1 3 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 4 1 5 6 7 -1 -1 2 0 20
|
|
316 SM_AMIGA_0_ 3 -1 5 3 1 5 7 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 6 3 3 6 7 -1 -1 4 0 20
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 3 1 3 5 32 -1 2 0 21
|
|
310 CLK_000_CNT_0_ 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
311 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
306 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 11 0 21
|
|
312 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
313 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
330 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_DD 3 -1 6 1 6 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 1 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 5 6 7 60 -1
|
|
85 RST 1 -1 -1 5 1 3 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 4 0 5 6 7 10 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 3 3 6 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 6 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 6 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 6 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 6 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 6 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 6 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 6 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 9 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 3 0 21
|
|
34 VMA 5 332 3 0 34 -1 3 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
316 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
298 inst_CLK_000_D 3 -1 0 3 3 6 7 -1 -1 1 0 21
|
|
315 SM_AMIGA_1_ 3 -1 6 2 1 6 -1 -1 4 0 20
|
|
311 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
310 CLK_000_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
309 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
306 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 9 0 21
|
|
312 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
320 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
313 CLK_000_CNT_3_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
293 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
331 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
301 cpu_est_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
296 inst_VPA_D 3 -1 1 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 328 7 1 3 80 -1 8 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 330 3 0 31 -1 11 0 21
|
|
65 E 5 335 6 0 65 -1 3 0 21
|
|
34 VMA 5 336 3 0 34 -1 3 0 21
|
|
30 LDS_000 5 331 3 0 30 -1 3 0 21
|
|
28 BG_000 5 332 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 333 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 334 7 0 77 -1 2 0 21
|
|
32 AS_000 5 329 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 327 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 338 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 337 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 7 0 1 2 3 5 6 7 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 5 6 0 1 2 5 6 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D 3 -1 3 6 0 1 2 3 5 6 -1 -1 1 0 20
|
|
321 SM_AMIGA_0_ 3 -1 5 4 0 1 3 5 -1 -1 4 0 21
|
|
320 SM_AMIGA_1_ 3 -1 2 4 1 2 5 7 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 4 2 5 6 7 -1 -1 4 0 21
|
|
335 RN_E 3 65 6 4 2 5 6 7 65 -1 3 0 21
|
|
308 cpu_est_2_ 3 -1 6 4 2 5 6 7 -1 -1 3 1 21
|
|
307 cpu_est_0_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21
|
|
317 CLK_000_CNT_2_ 3 -1 6 3 0 6 7 -1 -1 5 0 21
|
|
318 CLK_000_CNT_3_ 3 -1 6 3 0 6 7 -1 -1 4 0 21
|
|
316 CLK_000_CNT_1_ 3 -1 6 3 0 6 7 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 3 1 5 6 -1 -1 3 0 20
|
|
334 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
329 RN_AS_000 3 32 3 3 0 3 5 32 -1 2 0 21
|
|
315 CLK_000_CNT_0_ 3 -1 6 3 0 6 7 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 0 2 0 3 -1 -1 4 0 21
|
|
319 SM_AMIGA_2_ 3 -1 1 2 1 2 -1 -1 3 0 21
|
|
309 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
304 inst_CLK_OUT_PRE 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
333 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
311 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 6 2 5 6 -1 -1 1 0 21
|
|
330 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
328 RN_DSACK_1_ 3 80 7 1 7 80 -1 8 0 21
|
|
326 DSACK_INT_1_sqmuxa 3 -1 0 1 7 -1 -1 4 1 21
|
|
325 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
336 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
332 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
331 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
338 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
337 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
327 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
324 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
323 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
322 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
306 cpu_est_d_2_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
305 cpu_est_d_1_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
303 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
294 cpu_est_d_0_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 1 2 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 5 0 3 5 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 4 2 3 5 6 10 -1
|
|
63 CLK_030 1 -1 -1 3 0 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 0 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 328 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 4 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 330 3 0 31 -1 11 0 21
|
|
65 E 5 335 6 0 65 -1 3 0 21
|
|
34 VMA 5 336 3 0 34 -1 3 0 21
|
|
30 LDS_000 5 331 3 0 30 -1 3 0 21
|
|
28 BG_000 5 332 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 333 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 334 7 0 77 -1 2 0 21
|
|
32 AS_000 5 329 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 327 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 338 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 337 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
302 inst_CLK_000_D 3 -1 1 7 0 1 3 4 5 6 7 -1 -1 1 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 5 0 3 5 6 7 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 4 5 0 4 5 6 7 -1 -1 2 0 21
|
|
320 SM_AMIGA_1_ 3 -1 0 4 0 1 5 7 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 4 0 5 6 7 -1 -1 4 0 21
|
|
335 RN_E 3 65 6 4 0 5 6 7 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 0 4 0 1 4 6 -1 -1 3 0 21
|
|
308 cpu_est_2_ 3 -1 6 4 0 5 6 7 -1 -1 3 1 21
|
|
307 cpu_est_0_ 3 -1 6 4 0 5 6 7 -1 -1 3 0 21
|
|
329 RN_AS_000 3 32 3 4 1 3 5 7 32 -1 2 0 21
|
|
321 SM_AMIGA_0_ 3 -1 5 3 1 5 7 -1 -1 4 0 21
|
|
319 SM_AMIGA_2_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
334 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
312 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
309 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
304 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
333 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 CLK_000_CNT_0_ 3 -1 1 2 1 6 -1 -1 2 0 20
|
|
315 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
311 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
298 inst_VPA_D 3 -1 3 2 4 6 -1 -1 1 0 20
|
|
330 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
328 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
318 CLK_000_CNT_2_ 3 -1 6 1 6 -1 -1 5 0 21
|
|
326 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
317 CLK_000_CNT_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
336 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
332 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
331 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
325 state_machine_un27_clk_out_pre_0_n 3 -1 6 1 7 -1 -1 3 0 21
|
|
338 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
337 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
327 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
324 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
323 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
322 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
306 cpu_est_d_2_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
305 cpu_est_d_1_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
303 inst_CLK_000_DD 3 -1 7 1 6 -1 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
294 cpu_est_d_0_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 7 0 1 3 4 5 6 7 60 -1
|
|
85 RST 1 -1 -1 7 0 1 3 4 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 3 4 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 4 0 1 5 6 10 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 3 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 328 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 327 3 0 31 -1 11 0 21
|
|
65 E 5 332 6 0 65 -1 3 0 21
|
|
34 VMA 5 333 3 0 34 -1 3 0 21
|
|
28 BG_000 5 329 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
32 AS_000 5 326 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 322 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 323 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 6 6 0 2 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_VPA_SYNC 3 -1 2 5 0 2 3 5 6 -1 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 5 4 1 5 6 7 -1 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 0 4 0 1 2 6 -1 -1 3 0 21
|
|
326 RN_AS_000 3 32 3 4 3 5 6 7 32 -1 2 0 21
|
|
293 cpu_est_1_ 3 -1 6 3 2 5 6 -1 -1 4 0 21
|
|
332 RN_E 3 65 6 3 2 5 6 65 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 3 1 5 6 -1 -1 3 0 20
|
|
307 cpu_est_2_ 3 -1 6 3 2 5 6 -1 -1 3 1 21
|
|
306 cpu_est_0_ 3 -1 6 3 2 5 6 -1 -1 3 0 21
|
|
331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
320 inst_DTACK_SYNC 3 -1 0 3 0 5 6 -1 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
316 SM_AMIGA_1_ 3 -1 5 2 1 5 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
310 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 7 2 0 2 -1 -1 1 0 20
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
333 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
321 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
300 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
305 cpu_est_d_2_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
304 cpu_est_d_1_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_DD 3 -1 7 1 6 -1 -1 1 0 20
|
|
299 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
294 cpu_est_d_0_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 6 0 1 2 5 6 7 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 5 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 327 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 329 3 0 30 -1 4 0 21
|
|
65 E 5 333 6 0 65 -1 3 0 21
|
|
34 VMA 5 334 3 0 34 -1 3 0 21
|
|
28 BG_000 5 330 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 331 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 3 5 0 3 5 6 7 -1 -1 1 0 20
|
|
310 SM_AMIGA_1_ 3 -1 5 4 0 1 5 7 -1 -1 4 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 4 0 3 5 6 -1 -1 2 0 20
|
|
311 SM_AMIGA_0_ 3 -1 0 3 0 1 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 3 0 5 6 -1 -1 4 0 21
|
|
333 RN_E 3 65 6 3 0 5 6 65 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 3 1 5 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
307 cpu_est_2_ 3 -1 6 3 0 5 6 -1 -1 3 1 21
|
|
306 cpu_est_0_ 3 -1 6 3 0 5 6 -1 -1 3 0 21
|
|
332 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 3 0 3 7 32 -1 2 0 21
|
|
320 inst_DTACK_SYNC 3 -1 6 3 0 5 6 -1 -1 2 0 20
|
|
315 SM_AMIGA_5_ 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
313 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
329 RN_LDS_000 3 30 3 2 3 6 30 -1 4 0 21
|
|
321 un1_UDS_000_INT_0_sqmuxa_i 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 3 0 20
|
|
331 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
312 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
322 LDS_000_0 3 -1 6 1 3 -1 -1 10 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
330 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
300 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
305 cpu_est_d_2_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
304 cpu_est_d_1_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
299 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
297 inst_VPA_D 3 -1 0 1 6 -1 -1 1 0 20
|
|
295 cpu_est_d_3_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
294 cpu_est_d_0_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 3 3 4 6 70 -1
|
|
10 CLK_000 1 -1 -1 3 0 3 5 10 -1
|
|
97 DS_030 1 -1 -1 2 3 6 97 -1
|
|
68 A_0_ 1 -1 -1 2 3 6 68 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 6 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 6 69 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
104 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 327 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 330 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 329 3 0 31 -1 11 0 21
|
|
65 E 5 335 6 0 65 -1 3 0 21
|
|
34 VMA 5 337 3 0 34 -1 3 0 21
|
|
28 BG_000 5 331 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 332 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 333 7 0 77 -1 2 0 21
|
|
32 AS_000 5 328 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 326 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 336 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 334 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 20
|
|
319 SM_AMIGA_0_ 3 -1 5 4 0 1 5 7 -1 -1 4 0 21
|
|
310 SM_AMIGA_1_ 3 -1 6 4 1 5 6 7 -1 -1 4 0 20
|
|
328 RN_AS_000 3 32 3 4 0 3 5 7 32 -1 2 0 21
|
|
316 CLK_000_CNT_0_ 3 -1 6 4 0 2 5 6 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 4 0 3 5 6 -1 -1 2 0 20
|
|
317 CLK_000_CNT_1_ 3 -1 5 3 0 2 5 -1 -1 4 0 20
|
|
314 SM_AMIGA_3_ 3 -1 0 3 0 1 6 -1 -1 3 0 21
|
|
333 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
324 inst_DTACK_SYNC 3 -1 6 3 0 5 6 -1 -1 2 0 20
|
|
313 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
318 CLK_000_CNT_2_ 3 -1 0 2 0 2 -1 -1 5 0 20
|
|
311 CLK_000_CNT_3_ 3 -1 2 2 2 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 2 5 6 -1 -1 4 0 21
|
|
335 RN_E 3 65 6 2 5 6 65 -1 3 0 21
|
|
320 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
307 cpu_est_2_ 3 -1 6 2 5 6 -1 -1 3 1 21
|
|
306 cpu_est_0_ 3 -1 6 2 5 6 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 3 0 20
|
|
332 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
300 CLK_CNT_1_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
312 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
299 CLK_CNT_0_ 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
330 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
329 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
337 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
331 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
325 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
336 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
334 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
326 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
323 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
322 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
321 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
305 cpu_est_d_2_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
304 cpu_est_d_1_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_DD 3 -1 7 1 6 -1 -1 1 0 20
|
|
297 inst_VPA_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
294 cpu_est_d_0_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 6 0 1 2 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 5 0 2 5 6 7 10 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 328 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 330 3 0 31 -1 11 0 21
|
|
30 LDS_000 5 331 3 0 30 -1 11 0 21
|
|
65 E 5 335 6 0 65 -1 3 0 21
|
|
34 VMA 5 338 3 0 34 -1 3 0 21
|
|
28 BG_000 5 332 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 333 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 334 7 0 77 -1 2 0 21
|
|
32 AS_000 5 329 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 327 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 337 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 336 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
302 inst_CLK_000_D 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 20
|
|
313 SM_AMIGA_3_ 3 -1 5 5 0 1 2 5 6 -1 -1 3 0 21
|
|
299 inst_VPA_SYNC 3 -1 2 5 2 3 5 6 7 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 4 0 5 6 7 -1 -1 2 0 21
|
|
321 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
319 SM_AMIGA_0_ 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 3 2 6 7 -1 -1 4 0 21
|
|
335 RN_E 3 65 6 3 2 6 7 65 -1 3 0 21
|
|
308 cpu_est_2_ 3 -1 6 3 2 6 7 -1 -1 3 1 21
|
|
307 cpu_est_0_ 3 -1 6 3 2 6 7 -1 -1 3 0 21
|
|
334 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 3 1 3 5 -1 -1 2 0 21
|
|
318 CLK_000_CNT_3_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
320 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
309 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
304 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
333 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
329 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
311 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
298 inst_VPA_D 3 -1 0 2 0 2 -1 -1 1 0 20
|
|
331 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
330 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
328 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
317 CLK_000_CNT_2_ 3 -1 6 1 6 -1 -1 5 0 21
|
|
316 CLK_000_CNT_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
338 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
332 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
326 LDS_000_INT_1_sqmuxa 3 -1 3 1 3 -1 -1 3 0 21
|
|
337 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
336 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
327 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
324 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
323 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
322 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
315 CLK_000_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_7_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
325 UDS_000_INT_0_sqmuxa 3 -1 3 1 3 -1 -1 1 0 21
|
|
306 cpu_est_d_2_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
305 cpu_est_d_1_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
303 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
300 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
294 cpu_est_d_0_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 7 0 1 2 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 333 6 0 65 -1 3 0 21
|
|
34 VMA 5 334 3 0 34 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
318 SM_AMIGA_1_ 3 -1 6 4 0 1 6 7 -1 -1 4 0 20
|
|
325 RN_AS_000 3 32 3 4 0 1 3 7 32 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 4 0 3 6 7 -1 -1 2 0 20
|
|
316 SM_AMIGA_0_ 3 -1 0 3 0 1 7 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 3 0 6 7 -1 -1 4 0 21
|
|
333 RN_E 3 65 6 3 0 6 7 65 -1 3 0 21
|
|
306 cpu_est_2_ 3 -1 6 3 0 6 7 -1 -1 3 1 21
|
|
305 cpu_est_0_ 3 -1 6 3 0 6 7 -1 -1 3 0 21
|
|
332 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 3 0 6 7 -1 -1 2 0 20
|
|
315 CLK_000_CNT_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
317 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
314 CLK_000_CNT_0_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
334 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
322 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
319 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
307 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
304 cpu_est_d_2_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
303 cpu_est_d_1_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
294 cpu_est_d_0_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 6 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 325 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 327 3 0 31 -1 11 0 21
|
|
65 E 5 334 6 0 65 -1 3 0 21
|
|
34 VMA 5 335 3 0 34 -1 3 0 21
|
|
30 LDS_000 5 328 3 0 30 -1 3 0 21
|
|
28 BG_000 5 329 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 333 7 0 77 -1 2 0 21
|
|
32 AS_000 5 326 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 324 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 4 0 3 6 7 -1 -1 2 0 20
|
|
300 inst_CLK_000_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 20
|
|
319 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
317 SM_AMIGA_0_ 3 -1 7 3 1 6 7 -1 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 0 3 0 1 6 -1 -1 3 0 21
|
|
333 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 3 0 6 7 -1 -1 2 0 20
|
|
316 CLK_000_CNT_2_ 3 -1 6 2 6 7 -1 -1 5 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
334 RN_E 3 65 6 2 6 7 65 -1 3 0 21
|
|
318 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
306 cpu_est_2_ 3 -1 6 2 6 7 -1 -1 3 1 21
|
|
305 cpu_est_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
330 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
302 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 3 2 1 7 -1 -1 1 0 20
|
|
307 CLK_CNT_0_ 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
325 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
323 un1_UDS_000_INT_0_sqmuxa_2_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
315 CLK_000_CNT_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
335 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
324 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
322 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
321 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
320 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 CLK_000_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 cpu_est_d_2_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
303 cpu_est_d_1_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
294 cpu_est_d_0_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 5 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 3 0 21
|
|
34 VMA 5 332 3 0 34 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 4 0 3 6 7 -1 -1 2 0 20
|
|
300 inst_CLK_000_D 3 -1 6 4 0 3 6 7 -1 -1 1 0 21
|
|
316 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
314 SM_AMIGA_0_ 3 -1 6 3 1 6 7 -1 -1 4 0 20
|
|
312 SM_AMIGA_3_ 3 -1 0 3 0 1 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 3 0 6 7 -1 -1 2 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
293 cpu_est_1_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 6 7 65 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
306 cpu_est_2_ 3 -1 6 2 6 7 -1 -1 3 1 21
|
|
305 cpu_est_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
302 inst_CLK_OUT_PRE 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
310 inst_RISING_CLK_AMIGA 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 5 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 un1_UDS_000_INT_0_sqmuxa_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
307 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
304 cpu_est_d_2_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
303 cpu_est_d_1_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 3 1 6 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 cpu_est_d_3_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
294 cpu_est_d_0_ 3 -1 7 1 3 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
316 SM_AMIGA_2_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
311 SM_AMIGA_0_ 3 -1 7 3 1 6 7 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
301 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
297 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
306 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
312 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
307 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
299 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
320 un1_UDS_000_INT_0_sqmuxa_3_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
300 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
298 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
305 cpu_est_d_2_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
304 cpu_est_d_1_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_DD 3 -1 7 1 6 -1 -1 1 0 20
|
|
296 cpu_est_d_3_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_0_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
316 SM_AMIGA_2_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
315 SM_AMIGA_0_ 3 -1 7 3 1 6 7 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
301 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
297 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
306 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
307 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
299 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
320 un1_UDS_000_INT_0_sqmuxa_3_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
300 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
298 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
305 cpu_est_d_2_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
304 cpu_est_d_1_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_DD 3 -1 7 1 6 -1 -1 1 0 20
|
|
296 cpu_est_d_3_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_0_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 322 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
316 SM_AMIGA_2_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
315 SM_AMIGA_0_ 3 -1 7 3 1 6 7 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 0 3 0 6 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
314 SM_AMIGA_1_ 3 -1 7 2 1 7 -1 -1 4 0 21
|
|
297 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
306 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
310 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
307 CLK_CNT_0_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
299 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
320 un1_UDS_000_INT_0_sqmuxa_3_i 3 -1 3 1 3 -1 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
300 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
298 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
305 cpu_est_d_2_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
304 cpu_est_d_1_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_DD 3 -1 7 1 6 -1 -1 1 0 20
|
|
296 cpu_est_d_3_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_0_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 327 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 326 3 0 31 -1 11 0 21
|
|
65 E 5 331 6 0 65 -1 3 0 21
|
|
28 BG_000 5 328 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 0 21
|
|
32 AS_000 5 325 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
316 SM_AMIGA_2_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
315 SM_AMIGA_0_ 3 -1 7 3 1 6 7 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
301 inst_CLK_000_D 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
297 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
306 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
311 SM_AMIGA_1_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
307 CLK_CNT_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
299 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 un1_UDS_000_INT_0_sqmuxa_1_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
300 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
298 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
305 cpu_est_d_2_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
304 cpu_est_d_1_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_DD 3 -1 7 1 6 -1 -1 1 0 20
|
|
296 cpu_est_d_3_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_0_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 324 3 0 31 -1 11 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 3 0 21
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 7 5 0 3 5 6 7 -1 -1 1 0 20
|
|
314 SM_AMIGA_3_ 3 -1 6 4 0 1 5 6 -1 -1 3 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
306 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
311 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
299 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
297 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
300 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
298 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
320 un1_UDS_000_INT_0_sqmuxa_3_0 3 -1 3 1 3 -1 -1 4 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 1 6 -1 -1 2 0 21
|
|
307 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
305 cpu_est_d_2_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
304 cpu_est_d_1_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_DD 3 -1 7 1 6 -1 -1 1 0 20
|
|
296 cpu_est_d_3_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_0_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 5 0 1 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 326 3 0 30 -1 13 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
31 UDS_000 5 325 3 0 31 -1 11 0 21
|
|
65 E 5 330 6 0 65 -1 3 0 21
|
|
28 BG_000 5 327 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 0 21
|
|
32 AS_000 5 324 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 322 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 7 5 0 3 5 6 7 -1 -1 1 0 20
|
|
314 SM_AMIGA_3_ 3 -1 0 4 0 1 5 6 -1 -1 3 0 21
|
|
294 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
311 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
306 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 2 0 21
|
|
300 inst_VPA_SYNC 3 -1 5 3 0 5 6 -1 -1 2 0 21
|
|
299 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
297 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
328 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
298 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 11 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 un1_UDS_000_INT_0_sqmuxa_1_i 3 -1 3 1 3 -1 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
307 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
305 cpu_est_d_2_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
304 cpu_est_d_1_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_DD 3 -1 7 1 6 -1 -1 1 0 20
|
|
296 cpu_est_d_3_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_0_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 5 0 1 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
31 UDS_000 0 3 0 31 -1 13 0 21
|
|
9 CLK_EXP 0 -1 0 9 -1 13 1 21
|
|
65 E 0 6 0 65 -1 3 0 21
|
|
30 LDS_000 0 3 0 30 -1 3 0 21
|
|
28 BG_000 0 3 0 28 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 322 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 0 21
|
|
32 AS_000 0 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 -1 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 -1 0 47 -1 1 0 21
|
|
46 CIIN 0 -1 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 -1 0 33 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
2 RESET 0 -1 0 2 -1 1 0 21
|
|
301 inst_CLK_000_D 3 -1 -1 3 3 6 7 -1 -1 1 0 21
|
|
294 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
306 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 -1 2 1 7 -1 -1 1 0 21
|
|
302 inst_CLK_000_DD 3 -1 -1 2 3 6 -1 -1 1 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 13 0 21
|
|
297 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 4 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 3 0 21
|
|
320 un1_UDS_000_INT_0_sqmuxa_3_0 3 -1 -1 1 3 -1 -1 3 1 21
|
|
311 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
|
|
308 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
330 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
328 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 -1 1 7 -1 -1 2 0 21
|
|
305 cpu_est_d_2_ 3 -1 -1 1 3 -1 -1 1 0 21
|
|
304 cpu_est_d_1_ 3 -1 -1 1 3 -1 -1 1 0 21
|
|
299 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
296 cpu_est_d_3_ 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_0_ 3 -1 -1 1 3 -1 -1 1 0 21
|
|
316 SM_AMIGA_0_ 3 -1 -1 0 -1 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 -1 0 -1 -1 2 0 21
|
|
318 SM_AMIGA_D_1_ 3 -1 -1 0 -1 -1 2 0 21
|
|
317 SM_AMIGA_D_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
300 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
298 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
307 CLK_CNT_0_ 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 3 1 3 7 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
70 RW 1 -1 -1 1 3 70 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
93 A_21_ 1 -1 -1 0 93 -1
|
|
92 A_20_ 1 -1 -1 0 92 -1
|
|
84 A_22_ 1 -1 -1 0 84 -1
|
|
83 A_23_ 1 -1 -1 0 83 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
18 A_24_ 1 -1 -1 0 18 -1
|
|
17 A_25_ 1 -1 -1 0 17 -1
|
|
16 A_26_ 1 -1 -1 0 16 -1
|
|
15 A_27_ 1 -1 -1 0 15 -1
|
|
14 A_28_ 1 -1 -1 0 14 -1
|
|
10 CLK_000 1 -1 -1 0 10 -1
|
|
5 A_29_ 1 -1 -1 0 5 -1
|
|
4 A_30_ 1 -1 -1 0 4 -1
|
|
3 A_31_ 1 -1 -1 0 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 13 1 21
|
|
30 LDS_000 5 324 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 8 0 21
|
|
65 E 5 328 6 0 65 -1 3 0 21
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 7 5 0 3 5 6 7 -1 -1 1 0 20
|
|
313 SM_AMIGA_3_ 3 -1 6 4 0 1 5 6 -1 -1 3 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
311 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
306 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
299 inst_VPA_D 3 -1 0 3 0 3 5 -1 -1 1 0 20
|
|
297 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
300 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
298 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_DD 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
319 SM_AMIGA_D_2_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
318 SM_AMIGA_D_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
317 SM_AMIGA_D_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
307 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
305 cpu_est_d_2_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
304 cpu_est_d_1_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 cpu_est_d_3_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_0_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 5 0 1 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
|
|
306 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
293 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 2 0 21
|
|
300 inst_VPA_SYNC 3 -1 0 3 0 1 6 -1 -1 2 0 21
|
|
299 inst_VPA_D 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
297 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
311 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
328 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
298 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_DD 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_6_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
307 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
305 cpu_est_d_2_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
304 cpu_est_d_1_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
296 cpu_est_d_3_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
295 cpu_est_d_0_ 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 313 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 316 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 315 3 0 31 -1 8 0 21
|
|
65 E 5 322 6 0 65 -1 3 0 21
|
|
28 BG_000 5 318 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 312 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 321 7 0 77 -1 2 0 21
|
|
34 VMA 5 323 3 0 34 -1 2 0 21
|
|
32 AS_000 5 314 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 5 3 0 3 5 -1 -1 4 0 21
|
|
321 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
322 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
310 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
323 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
314 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
297 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
316 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
315 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
312 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
311 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
313 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
296 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 3 5 6 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 3 5 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
91 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 318 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 319 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
302 inst_CLK_000_DD 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
304 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
303 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 0 20
|
|
293 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
297 inst_VPA_D 3 -1 7 3 0 3 5 -1 -1 1 0 20
|
|
311 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
307 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
324 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
319 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
298 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
300 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
299 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 313 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 316 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 315 3 0 31 -1 8 0 21
|
|
65 E 5 322 6 0 65 -1 3 0 21
|
|
28 BG_000 5 317 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 312 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 318 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 321 7 0 77 -1 2 0 21
|
|
34 VMA 5 323 3 0 34 -1 2 0 21
|
|
32 AS_000 5 314 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 5 3 0 3 5 -1 -1 4 0 21
|
|
321 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
322 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
310 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
323 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
318 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
314 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
297 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
316 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
315 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
312 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
311 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
313 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
296 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 3 5 6 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 3 5 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 313 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 316 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 315 3 0 31 -1 8 0 21
|
|
65 E 5 322 6 0 65 -1 3 0 21
|
|
28 BG_000 5 317 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 312 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 318 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 321 7 0 77 -1 2 0 21
|
|
34 VMA 5 323 3 0 34 -1 2 0 21
|
|
32 AS_000 5 314 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 5 3 0 3 5 -1 -1 4 0 21
|
|
321 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
322 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
310 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
323 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
318 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
314 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
297 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
316 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
315 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
312 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
311 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
313 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
296 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 3 5 6 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 3 5 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 313 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 316 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 315 3 0 31 -1 8 0 21
|
|
65 E 5 322 6 0 65 -1 3 0 21
|
|
28 BG_000 5 317 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 312 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 318 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 321 7 0 77 -1 2 0 21
|
|
34 VMA 5 323 3 0 34 -1 2 0 21
|
|
32 AS_000 5 314 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_DD 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
299 inst_CLK_000_D 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
295 inst_AS_030_000_SYNC 3 -1 5 3 0 3 5 -1 -1 4 0 21
|
|
321 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
322 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
310 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
302 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
323 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
318 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
314 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
297 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
316 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
315 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
312 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
311 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
313 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
296 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
303 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 3 5 6 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 3 5 7 63 -1
|
|
13 CPU_SPACE 1 -1 -1 3 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 318 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 5 3 0 3 5 -1 -1 4 0 21
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
311 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
324 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 3 5 6 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 3 5 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 3 5 7 -1 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 3 5 1 3 5 6 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 0 5 1 3 5 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 4 0 21
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 5 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
324 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
312 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
310 SM_AMIGA_5_ 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
311 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
307 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 0 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
324 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 6 7 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_DD 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
324 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_DD 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 3 0 1 5 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
298 inst_VPA_D 3 -1 7 3 0 3 5 -1 -1 1 0 20
|
|
311 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
324 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
302 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 1 5 -1 -1 2 0 21
|
|
304 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 1 0 20
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
294 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
326 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
298 inst_VPA_D 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
307 CLK_000_CNT_2_ 3 -1 7 1 7 -1 -1 5 0 20
|
|
312 CLK_000_CNT_1_ 3 -1 7 1 7 -1 -1 4 0 20
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 3 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_DD 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
308 CLK_000_CNT_2_ 3 -1 7 2 6 7 -1 -1 5 0 20
|
|
315 SM_AMIGA_0_ 3 -1 6 2 0 6 -1 -1 4 0 20
|
|
312 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 4 0 20
|
|
307 CLK_000_CNT_1_ 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
310 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
313 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
311 CLK_000_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 0 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
310 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
304 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 2 3 7 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
308 inst_CLK_000_D2 3 -1 3 1 6 -1 -1 1 0 20
|
|
305 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D3 3 -1 6 1 7 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 0 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
91 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 7 4 1 5 6 7 -1 -1 2 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 3 0 21
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 2 5 6 -1 -1 3 0 20
|
|
310 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
305 CLK_CNT_0_ 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 2 5 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
313 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
324 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 2 3 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 0 3 0 2 3 -1 -1 3 0 21
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 3 3 5 6 32 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 5 3 0 3 5 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
298 inst_VPA_D 3 -1 6 3 0 3 6 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
327 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 2 5 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
312 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 3 0 20
|
|
307 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
328 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 2 2 2 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
313 inst_CLK_000_D4 3 -1 5 1 6 -1 -1 1 0 20
|
|
311 inst_CLK_000_D3 3 -1 7 1 5 -1 -1 1 0 20
|
|
309 inst_CLK_000_D2 3 -1 3 1 7 -1 -1 1 0 20
|
|
308 inst_CLK_000_D5 3 -1 6 1 7 -1 -1 1 0 21
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 7 0 1 2 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
312 SM_AMIGA_3_ 3 -1 0 4 0 1 2 5 -1 -1 3 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 4 0 20
|
|
327 RN_E 3 65 6 3 2 3 6 65 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 3 0 21
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 5 3 0 3 5 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 2 3 0 1 2 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 3 0 1 5 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 2 3 5 -1 -1 1 0 21
|
|
315 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
328 RN_VMA 3 34 3 2 2 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
302 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 inst_CLK_000_D4 3 -1 6 1 1 -1 -1 1 0 21
|
|
311 inst_CLK_000_D3 3 -1 6 1 6 -1 -1 1 0 21
|
|
309 inst_CLK_000_D2 3 -1 3 1 6 -1 -1 1 0 20
|
|
308 inst_CLK_000_D5 3 -1 1 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 7 0 1 2 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 318 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 5 3 0 3 5 -1 -1 4 0 21
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
311 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
324 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 3 5 6 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 3 5 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 3 5 7 -1 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
324 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
324 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 3 4 7 -1 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
324 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
90 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 314 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 317 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 316 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 313 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 315 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
324 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
317 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
316 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
313 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
309 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
314 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
304 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
91 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 318 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 317 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 319 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 320 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 316 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
302 inst_CLK_000_D0 3 -1 3 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
303 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_6_ 3 -1 0 3 0 3 7 -1 -1 3 0 21
|
|
304 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 3 0 3 6 -1 -1 2 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
308 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 7 2 5 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
318 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
317 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
313 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
310 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
300 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
302 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 3 2 5 6 -1 -1 3 0 20
|
|
303 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 2 3 5 -1 -1 1 0 20
|
|
310 CLK_CNT_1_ 3 -1 1 2 0 1 -1 -1 4 0 20
|
|
315 SM_AMIGA_0_ 3 -1 6 2 0 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
309 CLK_CNT_0_ 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
308 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 0 2 0 7 -1 -1 2 0 20
|
|
307 SM_AMIGA_7_ 3 -1 0 2 0 3 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 2 2 2 6 -1 -1 2 0 21
|
|
305 CLK_REF_1_ 3 -1 3 2 0 1 -1 -1 1 0 20
|
|
304 CLK_REF_0_ 3 -1 7 2 0 1 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
60 CLK_OSZI 9 -1 6 0 1 2 3 6 7 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 5 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 7 3 1 5 7 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 1 3 5 -1 -1 1 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
308 SM_AMIGA_4_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 5 0 1 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 0 3 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 0 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 0 5 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 1 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 3 5 6 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
315 SM_AMIGA_0_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
312 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
311 SM_AMIGA_3_ 3 -1 6 2 5 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 2 3 7 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
305 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 5 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 3 5 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 0 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 5 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 7 3 1 5 7 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 1 3 5 -1 -1 1 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
308 SM_AMIGA_4_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 5 0 1 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 0 3 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 0 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 20
|
|
302 inst_CLK_OUT_PRE 3 -1 1 4 1 2 6 7 -1 -1 4 0 20
|
|
294 cpu_est_0_ 3 -1 7 4 3 5 6 7 -1 -1 3 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 3 2 6 7 -1 -1 3 0 20
|
|
303 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 1 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 0 2 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 0 3 5 -1 -1 1 0 20
|
|
310 CLK_CNT_1_ 3 -1 0 2 0 1 -1 -1 4 0 21
|
|
315 SM_AMIGA_0_ 3 -1 2 2 0 2 -1 -1 3 0 21
|
|
309 CLK_CNT_0_ 3 -1 1 2 0 1 -1 -1 3 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
307 SM_AMIGA_7_ 3 -1 0 2 0 3 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 20
|
|
305 CLK_REF_1_ 3 -1 7 2 0 1 -1 -1 1 0 20
|
|
304 CLK_REF_0_ 3 -1 3 2 0 1 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
60 CLK_OSZI 9 -1 7 0 1 2 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 5 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 7 3 1 5 7 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 1 3 5 -1 -1 1 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
308 SM_AMIGA_4_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 5 0 1 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 0 3 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 0 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 9 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
294 cpu_est_0_ 3 -1 7 4 1 3 6 7 -1 -1 3 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 20
|
|
327 RN_E 3 65 6 3 1 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 7 3 0 1 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 1 20
|
|
304 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
310 inst_CLK_000_D4 3 -1 6 3 0 1 7 -1 -1 1 0 21
|
|
309 inst_CLK_000_D2 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 5 3 0 1 3 -1 -1 1 0 21
|
|
307 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
328 RN_VMA 3 34 3 2 1 3 34 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D5 3 -1 7 2 0 1 -1 -1 1 0 20
|
|
302 inst_CLK_000_D3 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
316 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
314 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
313 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
306 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 5 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 9 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 4 0 1 6 7 -1 -1 3 1 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 3 1 5 6 -1 -1 3 0 20
|
|
304 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 1 3 5 -1 -1 1 0 20
|
|
306 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
325 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
305 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 1 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 9 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 20
|
|
304 inst_CLK_OUT_PRE 3 -1 6 4 0 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 7 4 3 5 6 7 -1 -1 3 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 3 2 5 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 7 3 2 5 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 7 3 1 3 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 6 3 2 3 5 -1 -1 1 0 21
|
|
307 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 1 2 1 3 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
310 SM_AMIGA_1_ 3 -1 7 2 0 7 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 2 2 2 6 -1 -1 2 0 21
|
|
309 inst_CLK_000_D4 3 -1 7 2 2 5 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
306 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 2 5 6 7 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 5 1 2 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 1 3 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 1 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 1 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 1 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 1 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 9 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
294 cpu_est_0_ 3 -1 7 4 3 5 6 7 -1 -1 3 0 20
|
|
302 inst_CLK_000_D2 3 -1 7 4 0 3 5 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
304 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
303 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 1 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
326 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 2 0 5 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 1 3 -1 -1 4 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
312 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
311 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
305 CLK_REF_1_ 3 -1 3 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 9 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 20
|
|
304 inst_CLK_OUT_PRE 3 -1 6 4 0 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 7 4 3 5 6 7 -1 -1 3 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 3 2 5 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 7 3 2 5 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 7 3 1 3 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 6 3 2 3 5 -1 -1 1 0 21
|
|
307 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 1 2 1 3 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
310 SM_AMIGA_1_ 3 -1 7 2 0 7 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 2 2 2 6 -1 -1 2 0 21
|
|
303 inst_CLK_000_D4 3 -1 7 2 2 5 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
306 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 2 5 6 7 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 5 1 2 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 1 3 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 1 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 1 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 1 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 1 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 9 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 3 6 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 4 0 1 5 6 -1 -1 3 0 20
|
|
307 SM_AMIGA_6_ 3 -1 6 3 0 3 6 -1 -1 4 0 20
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
327 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 1 20
|
|
304 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 5 3 1 5 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 3 0 1 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
317 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
328 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
316 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
315 inst_CLK_000_D4 3 -1 7 2 0 6 -1 -1 1 0 20
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
311 inst_CLK_000_D3 3 -1 3 1 7 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
303 inst_CLK_000_D5 3 -1 6 1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 9 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
304 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 0 3 6 -1 -1 1 0 20
|
|
307 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
327 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 2 5 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 3 2 0 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
303 inst_CLK_000_D4 3 -1 7 1 0 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 3 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
294 cpu_est_0_ 3 -1 7 4 3 5 6 7 -1 -1 3 0 20
|
|
295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 0 3 0 1 5 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 5 3 0 1 5 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
308 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 0 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 20
|
|
305 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
302 inst_CLK_000_D4 3 -1 7 1 0 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 9 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 3 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 1 3 0 1 5 -1 -1 3 0 21
|
|
309 SM_AMIGA_1_ 3 -1 1 3 1 6 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
304 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 5 3 0 1 5 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
307 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
310 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 6 2 0 7 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
303 inst_CLK_000_D4 3 -1 7 1 0 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 9 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
304 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 0 3 6 -1 -1 1 0 20
|
|
307 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
327 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 2 5 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 3 2 0 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
303 inst_CLK_000_D4 3 -1 7 1 0 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 9 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 5 1 3 5 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 1 3 5 7 -1 -1 4 0 21
|
|
307 SM_AMIGA_6_ 3 -1 5 3 1 3 5 -1 -1 4 0 21
|
|
304 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 3 0 3 7 32 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 0 3 0 3 5 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 3 1 3 5 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 6 3 2 3 6 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 7 2 0 7 -1 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 2 2 6 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
327 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 2 2 2 6 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 3 2 0 2 -1 -1 1 0 20
|
|
303 inst_CLK_000_D4 3 -1 0 2 2 3 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 7 0 1 2 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 2 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
304 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 0 3 6 -1 -1 1 0 20
|
|
307 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 3 0 20
|
|
310 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
327 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 2 5 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 3 2 0 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
303 inst_CLK_000_D4 3 -1 7 1 0 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
294 cpu_est_0_ 3 -1 7 4 3 5 6 7 -1 -1 3 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 0 3 0 1 5 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 5 3 0 1 5 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 3 2 0 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 20
|
|
305 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
302 inst_CLK_000_D4 3 -1 7 1 0 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 9 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
306 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 1 3 0 1 3 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
308 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
305 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 3 1 3 6 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 325 3 0 33 -1 3 0 20
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 0 5 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 7 3 1 5 7 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
|
|
303 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 1 20
|
|
302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 1 3 5 -1 -1 1 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
324 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
325 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
313 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 0 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 9 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
304 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
303 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 3 0 21
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 1 2 1 3 -1 -1 4 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
308 inst_CLK_000_D2 3 -1 7 2 3 7 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 1 3 -1 -1 4 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
312 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
311 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
305 CLK_REF_1_ 3 -1 3 1 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D3 3 -1 7 1 3 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 3 1 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 5 0 1 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 4 0 5 6 7 10 -1
|
|
63 CLK_030 1 -1 -1 3 1 3 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 1 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 1 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 1 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 1 3 7 -1 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 0 3 6 -1 -1 1 0 20
|
|
314 SM_AMIGA_0_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 4 0 1 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 0 5 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 1 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 3 5 6 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
315 SM_AMIGA_0_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
312 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
311 SM_AMIGA_3_ 3 -1 6 2 5 6 -1 -1 3 0 20
|
|
306 SM_AMIGA_6_ 3 -1 3 2 3 7 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 2 6 7 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
305 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 5 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 3 5 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 0 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 0 3 6 -1 -1 1 0 20
|
|
314 SM_AMIGA_0_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 4 0 1 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 5 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 7 3 1 5 7 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 1 3 5 -1 -1 1 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
308 SM_AMIGA_4_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 5 0 1 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 0 3 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 0 3 7 -1 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 0 3 6 -1 -1 1 0 20
|
|
314 SM_AMIGA_0_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 4 0 1 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
92 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
323 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
303 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
|
|
314 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
313 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
307 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 5 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 325 3 0 33 -1 3 0 20
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
323 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
303 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 0 1 3 -1 -1 1 0 20
|
|
313 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
324 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
325 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
310 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
309 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
304 CLK_REF_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 6 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 325 3 0 33 -1 3 0 20
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
323 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
304 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 0 1 3 -1 -1 1 0 20
|
|
313 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
303 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
324 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
325 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
310 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
309 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
305 CLK_REF_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 6 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 4 0 21
|
|
310 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
327 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 6 2 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_D4 3 -1 3 2 1 3 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 inst_CLK_000_D2 3 -1 1 1 6 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
308 inst_CLK_000_D2 3 -1 3 3 3 6 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 1 3 0 1 3 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
315 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
310 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
306 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 8 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
306 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
304 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 3 0 3 6 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 4 0 21
|
|
310 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
328 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
316 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
303 inst_CLK_000_D5 3 -1 1 2 0 5 -1 -1 1 0 20
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 inst_CLK_000_D4 3 -1 6 1 1 -1 -1 1 0 21
|
|
311 inst_CLK_000_D3 3 -1 6 1 6 -1 -1 1 0 21
|
|
307 CLK_REF_1_ 3 -1 7 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 8 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
304 inst_CLK_OUT_PRE 3 -1 1 5 0 1 5 6 7 -1 -1 3 1 20
|
|
301 inst_CLK_000_D1 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
313 SM_AMIGA_1_ 3 -1 0 3 0 5 7 -1 -1 3 0 21
|
|
294 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 3 1 3 5 32 -1 2 0 21
|
|
303 inst_CLK_000_D5 3 -1 6 3 0 5 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
327 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
318 SM_AMIGA_0_ 3 -1 5 2 1 5 -1 -1 3 0 21
|
|
317 SM_AMIGA_2_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
306 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
328 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
302 inst_CLK_000_D2 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
298 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 inst_CLK_000_D4 3 -1 6 1 6 -1 -1 1 0 21
|
|
310 inst_CLK_000_D3 3 -1 3 1 6 -1 -1 1 0 20
|
|
307 CLK_REF_1_ 3 -1 7 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 1 3 0 1 5 -1 -1 3 0 21
|
|
306 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
304 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
305 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
313 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 1 5 -1 -1 2 0 21
|
|
303 inst_CLK_000_D4 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 inst_CLK_000_D3 3 -1 6 1 6 -1 -1 1 0 21
|
|
307 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 5 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
87 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
|
|
30 LDS_000 5 313 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 312 3 0 31 -1 8 0 21
|
|
65 E 5 317 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 321 3 0 33 -1 3 0 20
|
|
28 BG_000 5 314 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 310 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 315 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 316 7 0 77 -1 2 0 21
|
|
34 VMA 5 318 3 0 34 -1 2 0 21
|
|
32 AS_000 5 311 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
29 DTACK 0 3 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D1 3 -1 3 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
298 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 3 5 7 -1 -1 4 0 21
|
|
302 SM_AMIGA_3_ 3 -1 0 3 0 3 5 -1 -1 4 0 21
|
|
316 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
300 inst_CLK_000_D2 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
317 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
315 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
309 SM_AMIGA_2_ 3 -1 5 2 1 5 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_4_ 3 -1 3 2 0 3 -1 -1 1 0 21
|
|
313 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
312 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
321 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
314 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
310 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_VMA 3 34 3 1 3 34 -1 2 0 21
|
|
311 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
308 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
307 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
304 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
297 inst_VPA_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 5 7 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
294 cpu_est_0_ 3 -1 1 4 0 1 3 6 -1 -1 3 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
306 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
304 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
305 SM_AMIGA_6_ 3 -1 1 2 1 3 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 3 0 20
|
|
310 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
312 CLK_CNT_1_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
311 CLK_CNT_0_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
307 CLK_REF_1_ 3 -1 6 2 1 6 -1 -1 1 0 20
|
|
303 inst_CLK_000_D3 3 -1 3 2 0 6 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 6 2 1 3 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 0 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 1 3 6 7 -1 -1 4 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
305 SM_AMIGA_6_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
306 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
304 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 3 1 3 6 -1 -1 1 0 21
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
317 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
310 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
327 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
303 inst_CLK_000_D4 3 -1 1 2 0 5 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
313 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 inst_CLK_000_D3 3 -1 3 1 1 -1 -1 1 0 20
|
|
307 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 5 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
|
|
311 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 0 3 0 1 6 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 0 3 6 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
310 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
309 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 7 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 4 0 1 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
304 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 1 3 1 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 3 0 3 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
312 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
306 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
326 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
307 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 0 1 3 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 2 0 3 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 7 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 1 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 8 0 21
|
|
65 E 5 328 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
297 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
304 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 inst_CLK_000_D1 3 -1 3 3 1 3 7 -1 -1 1 0 20
|
|
299 inst_VPA_D 3 -1 1 3 0 3 6 -1 -1 1 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 4 0 21
|
|
316 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 3 0 20
|
|
309 cpu_est_2_ 3 -1 6 2 6 7 -1 -1 3 1 21
|
|
307 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 3 0 20
|
|
329 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
317 SM_AMIGA_5_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
311 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
300 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
306 cpu_est_d_2_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
303 inst_CLK_000_D2 3 -1 3 2 1 3 -1 -1 1 0 20
|
|
296 cpu_est_d_3_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
295 cpu_est_d_1_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
294 cpu_est_d_0_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
308 cpu_est_1_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
328 RN_E 3 65 6 1 6 65 -1 3 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
318 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
314 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
298 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
310 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 8 0 21
|
|
65 E 5 328 6 0 65 -1 4 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
297 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
304 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
299 inst_VPA_D 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
328 RN_E 3 65 6 2 6 7 65 -1 4 0 21
|
|
307 cpu_est_1_ 3 -1 7 2 6 7 -1 -1 4 0 20
|
|
305 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
318 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
316 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
312 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
308 cpu_est_2_ 3 -1 7 2 6 7 -1 -1 3 0 20
|
|
329 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
317 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
311 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
310 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
313 cpu_est_d0_2_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
306 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
303 inst_CLK_000_D2 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
296 cpu_est_d0_3_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
295 cpu_est_d0_1_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
294 cpu_est_d0_0_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
314 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
298 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
309 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 2 0 1 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 8 0 21
|
|
65 E 5 328 6 0 65 -1 4 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
297 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_3_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
|
|
313 cpu_est_d0_2_ 3 -1 7 3 0 3 7 -1 -1 3 0 20
|
|
304 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
296 cpu_est_d0_3_ 3 -1 1 3 0 1 3 -1 -1 3 0 20
|
|
295 cpu_est_d0_1_ 3 -1 1 3 0 1 3 -1 -1 3 0 20
|
|
294 cpu_est_d0_0_ 3 -1 7 3 0 3 7 -1 -1 3 0 20
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
299 inst_VPA_D 3 -1 7 3 0 3 6 -1 -1 1 0 20
|
|
328 RN_E 3 65 6 2 1 6 65 -1 4 0 21
|
|
307 cpu_est_1_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
318 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
312 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
308 cpu_est_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
317 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
311 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
310 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
298 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
306 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
303 inst_CLK_000_D2 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
309 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
10 CLK_000 9 -1 3 0 6 7 10 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 8 0 21
|
|
65 E 5 328 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
308 cpu_est_1_ 3 -1 7 3 1 6 7 -1 -1 4 0 20
|
|
297 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
304 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
299 inst_VPA_D 3 -1 1 3 0 1 3 -1 -1 1 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 6 7 65 -1 3 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
309 cpu_est_2_ 3 -1 7 2 6 7 -1 -1 3 1 20
|
|
307 cpu_est_0_ 3 -1 7 2 6 7 -1 -1 3 0 20
|
|
329 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
311 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
300 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
298 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
306 cpu_est_d0_2_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
303 inst_CLK_000_D2 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
296 cpu_est_d0_3_ 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
295 cpu_est_d0_1_ 3 -1 1 2 0 3 -1 -1 1 0 20
|
|
294 cpu_est_d0_0_ 3 -1 7 2 0 3 -1 -1 1 0 20
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
318 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
315 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
314 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 5 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 0 3 1 6 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 3 5 6 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
295 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
313 SM_AMIGA_3_ 3 -1 6 2 5 6 -1 -1 3 0 20
|
|
310 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
312 CLK_CNT_1_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
311 CLK_CNT_0_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
307 CLK_REF_1_ 3 -1 1 1 0 -1 -1 1 0 20
|
|
306 CLK_REF_0_ 3 -1 3 1 0 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 5 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 3 5 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 5 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
318 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
318 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 1 3 6 7 -1 -1 4 0 21
|
|
301 inst_CLK_000_D1 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
304 SM_AMIGA_6_ 3 -1 6 3 1 3 6 -1 -1 4 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
309 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 3 1 3 6 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
306 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
305 inst_FPU_CS_INT 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 2 0 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 2 0 6 -1 -1 2 0 20
|
|
298 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
312 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
307 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
318 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
318 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
323 RN_FPU_CS 3 77 7 2 2 7 77 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 5 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 0 3 1 6 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 3 5 6 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
295 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
313 SM_AMIGA_3_ 3 -1 6 2 5 6 -1 -1 3 0 20
|
|
310 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
312 CLK_CNT_1_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
311 CLK_CNT_0_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
307 CLK_REF_1_ 3 -1 1 1 0 -1 -1 1 0 20
|
|
306 CLK_REF_0_ 3 -1 3 1 0 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 5 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 3 5 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 5 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 8 0 21
|
|
65 E 5 328 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
294 cpu_est_0_ 3 -1 1 4 0 1 3 6 -1 -1 3 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
328 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 0 3 5 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
308 inst_CLK_000_D4 3 -1 1 1 7 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 324 3 0 31 -1 8 0 21
|
|
65 E 5 329 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 3 0 20
|
|
28 BG_000 5 326 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 1 3 0 1 5 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 0 3 0 1 3 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
317 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
330 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
316 SM_AMIGA_5_ 3 -1 6 2 0 6 -1 -1 2 0 20
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 5 2 1 5 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
312 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 inst_CLK_000_D4 3 -1 6 1 1 -1 -1 1 0 21
|
|
310 inst_CLK_000_D3 3 -1 3 1 6 -1 -1 1 0 20
|
|
308 inst_CLK_000_D5 3 -1 1 1 7 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 7 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 5 6 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
294 cpu_est_0_ 3 -1 1 4 0 1 3 6 -1 -1 3 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
306 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 0 3 5 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
307 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
305 inst_CLK_000_D4 3 -1 1 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 8 0 21
|
|
65 E 5 328 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
304 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 3 0 1 3 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
307 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
312 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
308 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
306 inst_CLK_000_D3 3 -1 3 1 7 -1 -1 1 0 20
|
|
303 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 8 0 21
|
|
65 E 5 328 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
302 inst_CLK_000_D3 3 -1 3 4 0 1 3 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
305 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
304 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 1 3 1 3 7 -1 -1 2 0 21
|
|
309 inst_CLK_000_D2 3 -1 6 3 0 3 7 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
306 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
329 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
312 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
307 CLK_REF_1_ 3 -1 6 1 1 -1 -1 1 0 20
|
|
303 inst_CLK_000_D4 3 -1 1 1 3 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 8 0 21
|
|
65 E 5 328 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
304 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 3 0 1 3 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
307 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
312 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
308 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
306 inst_CLK_000_D3 3 -1 3 1 7 -1 -1 1 0 20
|
|
303 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 8 0 21
|
|
65 E 5 328 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
294 cpu_est_0_ 3 -1 1 4 0 1 3 6 -1 -1 3 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
328 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
306 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
304 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 0 3 5 -1 -1 1 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
303 inst_CLK_000_D4 3 -1 1 2 3 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
307 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 8 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
327 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
306 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
304 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
305 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
315 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
313 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
328 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 3 2 3 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
314 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
307 CLK_REF_1_ 3 -1 6 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 0 1 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 9 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
327 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
306 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
304 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 1 3 -1 -1 1 0 20
|
|
305 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 2 3 6 33 -1 3 0 20
|
|
315 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
313 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
328 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 6 2 3 7 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
311 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
307 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 0 1 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 9 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
313 SM_AMIGA_1_ 3 -1 1 3 1 6 7 -1 -1 3 0 21
|
|
306 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
304 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 2 3 6 33 -1 3 0 20
|
|
312 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
328 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
311 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
307 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
305 inst_CLK_000_D3 3 -1 3 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 3 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 9 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
306 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 1 3 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 2 3 6 33 -1 3 0 20
|
|
315 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
313 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
311 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
307 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
305 inst_CLK_000_D3 3 -1 6 1 7 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 0 1 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 8 0 21
|
|
65 E 5 328 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
294 cpu_est_0_ 3 -1 1 4 0 1 3 6 -1 -1 3 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
328 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 0 3 5 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
307 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
308 inst_CLK_000_D4 3 -1 1 1 7 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 8 0 21
|
|
65 E 5 328 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
28 BG_000 5 325 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 5 1 3 5 6 7 -1 -1 1 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 6 4 0 1 6 7 -1 -1 3 1 21
|
|
301 inst_CLK_000_D1 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
328 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
314 SM_AMIGA_1_ 3 -1 1 3 0 1 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 3 1 3 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 7 3 3 5 6 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 4 0 21
|
|
317 SM_AMIGA_0_ 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
313 SM_AMIGA_3_ 3 -1 6 2 5 6 -1 -1 3 0 20
|
|
329 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
315 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
312 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
310 inst_CLK_000_D3 3 -1 7 1 1 -1 -1 1 0 20
|
|
308 inst_CLK_000_D4 3 -1 1 1 7 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 5 0 1 5 6 7 10 -1
|
|
81 AS_030 1 -1 -1 4 3 5 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
|
|
314 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 1 3 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
312 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 inst_CLK_000_D3 3 -1 1 1 6 -1 -1 1 0 20
|
|
308 inst_CLK_000_D4 3 -1 6 1 7 -1 -1 1 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 6 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 5 6 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 325 3 0 33 -1 3 0 20
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 1 3 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
|
|
309 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
324 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
325 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
317 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 6 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 0 1 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 3 1 20
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
313 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
309 inst_CLK_000_D4 3 -1 1 1 7 -1 -1 1 0 20
|
|
307 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 6 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 3 1 20
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
313 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
309 inst_CLK_000_D4 3 -1 1 1 7 -1 -1 1 0 20
|
|
307 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 6 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 3 1 20
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
313 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
309 inst_CLK_000_D4 3 -1 1 1 7 -1 -1 1 0 20
|
|
307 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 6 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
304 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 3 1 3 6 -1 -1 1 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 3 1 20
|
|
327 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 SM_AMIGA_5_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
314 inst_CLK_000_D4 3 -1 1 1 0 -1 -1 1 0 20
|
|
311 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
309 inst_CLK_000_D5 3 -1 0 1 7 -1 -1 1 0 20
|
|
307 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 5 6 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 3 1 20
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
313 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
309 inst_CLK_000_D4 3 -1 1 1 7 -1 -1 1 0 20
|
|
307 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 6 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 3 1 20
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
313 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
309 inst_CLK_000_D4 3 -1 1 1 7 -1 -1 1 0 20
|
|
307 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 6 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 3 1 20
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
313 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
309 inst_CLK_000_D4 3 -1 1 1 7 -1 -1 1 0 20
|
|
307 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 6 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
313 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
309 inst_CLK_000_D4 3 -1 1 1 7 -1 -1 1 0 20
|
|
307 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 6 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
305 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 3 1 20
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
313 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
309 inst_CLK_000_D4 3 -1 1 1 7 -1 -1 1 0 20
|
|
307 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 6 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 9 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 1 4 0 1 3 6 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 4 0 1 3 6 65 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 1 4 0 1 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 4 0 1 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
304 SM_AMIGA_6_ 3 -1 6 3 3 5 6 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 3 1 5 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 1 3 0 1 5 -1 -1 3 0 21
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 3 1 5 6 -1 -1 2 0 20
|
|
310 SM_AMIGA_4_ 3 -1 1 3 1 3 5 -1 -1 2 0 21
|
|
308 SM_AMIGA_1_ 3 -1 6 3 5 6 7 -1 -1 2 0 20
|
|
298 inst_VPA_D 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 2 3 6 33 -1 3 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 5 2 3 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 3 1 6 -1 -1 1 0 20
|
|
309 inst_CLK_000_D4 3 -1 6 1 7 -1 -1 1 0 21
|
|
306 CLK_REF_1_ 3 -1 6 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 6 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 9 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 1 4 0 1 3 6 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 4 0 1 3 6 65 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 1 4 0 1 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 4 0 1 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
306 SM_AMIGA_6_ 3 -1 6 3 3 5 6 -1 -1 4 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 3 1 5 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 1 3 0 1 5 -1 -1 3 0 21
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 3 1 5 6 -1 -1 2 0 20
|
|
310 SM_AMIGA_4_ 3 -1 1 3 1 3 5 -1 -1 2 0 21
|
|
308 SM_AMIGA_1_ 3 -1 6 3 5 6 7 -1 -1 2 0 20
|
|
298 inst_VPA_D 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 2 3 6 33 -1 3 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 5 2 3 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 3 1 6 -1 -1 1 0 20
|
|
309 inst_CLK_000_D4 3 -1 6 1 7 -1 -1 1 0 21
|
|
305 CLK_REF_1_ 3 -1 6 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 6 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 1 3 6 7 -1 -1 4 0 21
|
|
301 inst_CLK_000_D1 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 1 3 0 1 5 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
327 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
310 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 1 5 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 3 1 6 -1 -1 1 0 20
|
|
309 inst_CLK_000_D4 3 -1 6 1 7 -1 -1 1 0 21
|
|
305 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 5 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 8 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 3 6 7 -1 -1 4 0 21
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
304 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
303 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 SM_AMIGA_0_ 3 -1 7 2 6 7 -1 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
302 inst_CLK_000_D2 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
298 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
309 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
305 CLK_REF_1_ 3 -1 6 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 3 0 3 7 -1 -1 1 0 20
|
|
307 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
308 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
303 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
326 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
314 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
312 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
298 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
304 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 8 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
28 BG_000 5 324 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
327 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 0 3 0 1 5 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 3 0 21
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 1 3 1 6 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 3 0 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 5 3 0 1 5 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
|
|
307 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
308 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 3 1 20
|
|
328 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
321 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
316 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
311 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
313 inst_CLK_000_D4 3 -1 6 1 6 -1 -1 1 0 21
|
|
310 inst_CLK_000_D3 3 -1 3 1 6 -1 -1 1 0 20
|
|
306 CLK_REF_1_ 3 -1 7 1 1 -1 -1 1 0 20
|
|
304 inst_CLK_000_D5 3 -1 6 1 7 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 5 6 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 6 3 3 6 7 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 3 0 3 6 -1 -1 1 0 20
|
|
307 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
304 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
327 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 1 2 1 6 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 1 2 1 6 -1 -1 2 0 20
|
|
311 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
306 CLK_REF_1_ 3 -1 7 2 1 6 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
310 inst_CLK_000_D4 3 -1 6 1 7 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
305 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 1 3 1 6 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 3 1 3 6 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 1 3 0 1 3 -1 -1 1 0 20
|
|
307 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
308 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
304 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
316 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
312 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
306 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 6 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 1 4 0 1 3 6 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 4 0 1 3 6 65 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 1 4 0 1 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 4 0 1 3 6 -1 -1 3 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_3_ 3 -1 1 3 0 1 5 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 2 0 20
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
327 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 1 5 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
315 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 3 1 1 -1 -1 1 0 20
|
|
309 inst_CLK_000_D4 3 -1 1 1 7 -1 -1 1 0 20
|
|
305 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 1 3 6 7 -1 -1 4 0 21
|
|
301 inst_CLK_000_D1 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 1 3 0 1 5 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 20
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
306 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
327 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
310 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 1 5 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 3 1 6 -1 -1 1 0 20
|
|
309 inst_CLK_000_D4 3 -1 6 1 7 -1 -1 1 0 21
|
|
305 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 5 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
|
|
310 inst_CLK_000_D3 3 -1 1 4 0 1 3 6 -1 -1 1 0 20
|
|
307 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 4 0 21
|
|
306 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 3 0 1 3 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
303 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
317 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
315 SM_AMIGA_5_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
298 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
312 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
309 inst_CLK_000_D4 3 -1 6 1 7 -1 -1 1 0 21
|
|
305 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 1 3 0 1 5 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
307 SM_AMIGA_1_ 3 -1 1 3 1 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 3 0 20
|
|
302 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
327 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
|
|
309 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 1 5 -1 -1 2 0 21
|
|
310 inst_CLK_000_D2 3 -1 3 2 3 6 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 3 1 1 -1 -1 1 0 20
|
|
308 inst_CLK_000_D4 3 -1 1 1 7 -1 -1 1 0 20
|
|
304 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 0 4 0 3 6 7 -1 -1 4 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 7 3 0 5 7 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
327 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 6 2 6 7 -1 -1 2 0 20
|
|
309 SM_AMIGA_4_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 1 1 7 -1 -1 1 0 20
|
|
310 inst_CLK_000_D2 3 -1 7 1 1 -1 -1 1 0 20
|
|
308 inst_CLK_000_D4 3 -1 7 1 7 -1 -1 1 0 20
|
|
304 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 0 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 3 0 5 7 10 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 0 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 8 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
28 BG_000 5 323 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 0 3 0 3 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 7 3 0 5 7 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
327 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 7 -1 -1 2 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 1 1 6 -1 -1 1 0 20
|
|
310 inst_CLK_000_D2 3 -1 7 1 1 -1 -1 1 0 20
|
|
308 inst_CLK_000_D4 3 -1 6 1 7 -1 -1 1 0 21
|
|
304 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 5 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 0 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 3 0 5 6 10 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 0 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 8 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 7 4 0 3 6 7 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 4 0 3 6 7 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 1 4 0 1 5 6 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 7 4 0 3 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 4 0 3 6 7 -1 -1 3 0 20
|
|
309 SM_AMIGA_4_ 3 -1 6 4 0 1 3 6 -1 -1 2 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
305 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 3 0 21
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
315 SM_AMIGA_5_ 3 -1 7 3 0 6 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_1_ 3 -1 6 3 0 6 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 3 0 1 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 3 1 5 6 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 0 3 5 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 20
|
|
302 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
328 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 0 2 3 7 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 6 1 6 -1 -1 1 0 21
|
|
310 inst_CLK_000_D2 3 -1 3 1 6 -1 -1 1 0 20
|
|
308 inst_CLK_000_D4 3 -1 6 1 7 -1 -1 1 0 21
|
|
304 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 5 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 13 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 9 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
28 BG_000 5 322 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
305 SM_AMIGA_6_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
303 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
307 SM_AMIGA_1_ 3 -1 1 3 1 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 2 1 3 33 -1 3 0 20
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
302 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D2 3 -1 1 2 3 6 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
316 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
315 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
314 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
308 inst_CLK_000_D4 3 -1 1 1 7 -1 -1 1 0 20
|
|
306 SM_AMIGA_7_ 3 -1 6 1 3 -1 -1 1 0 20
|
|
304 CLK_REF_1_ 3 -1 6 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 5 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 7 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
304 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
303 SM_AMIGA_6_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
301 inst_CLK_000_D2 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
297 inst_VPA_D 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
308 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
312 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 6 0 21
|
|
315 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 5 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
318 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
310 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
309 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
305 CLK_REF_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 6 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 11 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 7 0 21
|
|
65 E 5 324 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
|
|
28 BG_000 5 321 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
324 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
304 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
303 SM_AMIGA_6_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
301 inst_CLK_000_D2 3 -1 7 3 3 6 7 -1 -1 1 0 20
|
|
297 inst_VPA_D 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
308 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
325 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
312 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 6 0 21
|
|
315 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 5 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
318 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
|
|
310 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
309 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
|
|
305 CLK_REF_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 6 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 6 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 325 3 0 33 -1 3 0 20
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
323 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 7 3 0 1 7 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
300 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 20
|
|
297 inst_VPA_D 3 -1 7 3 0 1 3 -1 -1 1 0 20
|
|
324 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
312 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 6 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
325 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
317 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
305 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 0 1 3 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 6 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
93 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 6 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 325 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
28 BG_000 5 320 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
299 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
323 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
311 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
307 SM_AMIGA_1_ 3 -1 7 3 1 6 7 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
301 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
297 inst_VPA_D 3 -1 7 3 0 3 6 -1 -1 1 0 20
|
|
312 inst_AS_030_000_SYNC 3 -1 7 2 1 7 -1 -1 7 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 2 3 7 -1 -1 4 0 21
|
|
314 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
324 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
325 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
305 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 1 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 6 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
28 BG_000 5 323 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
294 cpu_est_0_ 3 -1 7 4 3 5 6 7 -1 -1 3 0 20
|
|
295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
306 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
|
|
308 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
310 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 7 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
313 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
311 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 20
|
|
309 inst_CLK_000_D4 3 -1 7 1 7 -1 -1 1 0 20
|
|
307 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
302 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 5 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 6 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
28 BG_000 5 322 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
306 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 7 3 0 1 3 -1 -1 1 0 20
|
|
308 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
305 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 7 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 20
|
|
307 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 3 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 0 1 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 6 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 20
|
|
316 SM_AMIGA_3_ 3 -1 1 4 0 1 2 5 -1 -1 3 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 5 0 20
|
|
295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
307 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 5 3 0 1 5 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 2 3 0 1 2 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 0 3 2 3 5 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 7 0 21
|
|
317 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
304 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
328 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
311 inst_CLK_000_D4 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
310 inst_CLK_000_D3 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
303 inst_CLK_000_D5 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
318 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 4 0 20
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
313 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 7 0 1 2 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 2 5 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 3 6 7 -1 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 6 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
|
|
305 SM_AMIGA_6_ 3 -1 7 4 0 3 6 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
310 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
308 SM_AMIGA_1_ 3 -1 5 3 1 5 7 -1 -1 2 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 7 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
327 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
318 SM_AMIGA_0_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
317 SM_AMIGA_2_ 3 -1 6 2 5 6 -1 -1 3 0 20
|
|
306 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
303 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
|
|
328 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
314 CLK_CNT_1_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
313 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
311 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 20
|
|
307 CLK_REF_1_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 3 2 0 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
315 inst_CLK_000_D4 3 -1 7 1 7 -1 -1 1 0 20
|
|
309 inst_CLK_000_D5 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 4 1 5 6 7 10 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 0 3 7 -1 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 6 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 20
|
|
306 SM_AMIGA_6_ 3 -1 7 4 2 3 6 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_7_ 3 -1 2 3 2 3 7 -1 -1 5 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
327 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
316 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_1_ 3 -1 1 3 0 1 7 -1 -1 3 0 21
|
|
307 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 3 0 2 3 32 -1 2 0 21
|
|
311 inst_CLK_000_D4 3 -1 7 3 0 1 7 -1 -1 1 0 20
|
|
303 inst_CLK_000_D5 3 -1 7 3 0 1 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 2 7 -1 -1 7 0 21
|
|
318 SM_AMIGA_0_ 3 -1 0 2 0 2 -1 -1 4 0 21
|
|
317 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
304 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
328 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 7 2 2 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 7 2 2 7 -1 -1 1 0 20
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
313 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 7 0 1 2 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 4 0 1 5 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 6 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
28 BG_000 5 323 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
|
|
307 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
314 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
304 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
327 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
306 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
303 inst_CLK_000_D4 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 7 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
317 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
|
|
10 CLK_000 1 -1 -1 4 0 1 6 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 321 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 320 3 0 31 -1 6 0 21
|
|
65 E 5 325 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 0 21
|
|
32 AS_000 5 319 3 0 32 -1 2 0 21
|
|
28 BG_000 5 322 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_6_ 3 -1 7 4 0 3 6 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 7 4 0 1 6 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 3 4 0 1 6 7 -1 -1 1 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
313 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
|
|
294 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 7 0 21
|
|
316 SM_AMIGA_0_ 3 -1 1 2 0 1 -1 -1 4 0 21
|
|
295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
|
|
325 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
307 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
|
|
304 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
326 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
312 CLK_CNT_1_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
311 CLK_CNT_0_ 3 -1 7 2 6 7 -1 -1 2 0 20
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
308 CLK_REF_1_ 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
314 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 0 3 7 -1 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 6 0 21
|
|
65 E 5 328 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_6_ 3 -1 7 4 0 3 5 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 4 0 20
|
|
328 RN_E 3 65 6 3 2 3 6 65 -1 3 0 21
|
|
317 SM_AMIGA_3_ 3 -1 6 3 2 5 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_1_ 3 -1 1 3 0 1 7 -1 -1 3 0 21
|
|
307 cpu_est_2_ 3 -1 6 3 2 3 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 2 3 6 -1 -1 3 0 20
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
311 inst_CLK_000_D5 3 -1 6 3 0 1 7 -1 -1 1 0 21
|
|
303 inst_CLK_000_D6 3 -1 7 3 0 1 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 7 3 2 3 5 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 7 0 21
|
|
318 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
304 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
329 RN_VMA 3 34 3 2 2 3 34 -1 2 0 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 2 2 2 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 3 2 0 7 -1 -1 1 0 20
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
319 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
313 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
316 inst_CLK_000_D4 3 -1 7 1 6 -1 -1 1 0 20
|
|
308 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 7 0 1 2 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
10 CLK_000 1 -1 -1 5 0 1 2 5 6 10 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 0 3 7 -1 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 6 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 20
|
|
306 SM_AMIGA_6_ 3 -1 7 4 2 3 6 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_7_ 3 -1 2 3 2 3 7 -1 -1 5 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
327 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
316 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
|
|
315 SM_AMIGA_1_ 3 -1 1 3 0 1 7 -1 -1 3 0 21
|
|
307 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 3 0 2 3 32 -1 2 0 21
|
|
311 inst_CLK_000_D4 3 -1 7 3 0 1 7 -1 -1 1 0 20
|
|
303 inst_CLK_000_D5 3 -1 7 3 0 1 7 -1 -1 1 0 20
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 2 7 -1 -1 7 0 21
|
|
318 SM_AMIGA_0_ 3 -1 0 2 0 2 -1 -1 4 0 21
|
|
317 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
304 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
328 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 7 2 2 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 7 2 2 7 -1 -1 1 0 20
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
313 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 7 0 1 2 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 4 0 1 5 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 2 3 7 -1 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 322 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 321 3 0 31 -1 6 0 21
|
|
65 E 5 326 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 325 7 0 77 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 0 21
|
|
32 AS_000 5 320 3 0 32 -1 2 0 21
|
|
28 BG_000 5 323 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
294 cpu_est_0_ 3 -1 7 4 1 3 6 7 -1 -1 3 0 20
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 20
|
|
326 RN_E 3 65 6 3 1 3 6 65 -1 3 0 21
|
|
307 cpu_est_2_ 3 -1 3 3 1 3 6 -1 -1 3 1 20
|
|
325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 0 3 1 3 6 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
315 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
304 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
327 RN_VMA 3 34 3 2 1 3 34 -1 2 0 21
|
|
324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
322 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 7 0 21
|
|
321 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
317 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
|
|
310 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 20
|
|
308 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
303 inst_CLK_000_D4 3 -1 7 1 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 6 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 20
|
|
316 SM_AMIGA_3_ 3 -1 1 4 0 1 2 5 -1 -1 3 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
|
|
309 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 5 0 20
|
|
295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
307 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 6 3 3 6 7 -1 -1 2 0 20
|
|
299 inst_VPA_SYNC 3 -1 5 3 0 1 5 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 2 3 0 1 2 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 0 3 2 3 5 -1 -1 1 0 20
|
|
296 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 7 0 21
|
|
317 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
|
|
304 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
328 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
311 inst_CLK_000_D4 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
310 inst_CLK_000_D3 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
303 inst_CLK_000_D5 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 7 2 6 7 -1 -1 1 0 20
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
318 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 4 0 20
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
313 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 7 0 1 2 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
10 CLK_000 1 -1 -1 3 2 5 7 10 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 3 6 7 -1 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 323 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 322 3 0 31 -1 5 0 21
|
|
65 E 5 327 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
32 AS_000 5 321 3 0 32 -1 2 0 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 20
|
|
2 RESET 0 1 0 2 -1 1 0 20
|
|
300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 4 0 1 5 6 -1 -1 3 0 21
|
|
301 inst_CLK_000_D1 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
|
|
327 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
|
|
307 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 1 20
|
|
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
299 inst_VPA_SYNC 3 -1 5 3 1 5 6 -1 -1 2 0 21
|
|
297 inst_DTACK_SYNC 3 -1 0 3 0 1 6 -1 -1 2 0 21
|
|
298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
317 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
|
|
316 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
304 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
328 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
303 inst_CLK_000_D5 3 -1 7 2 1 7 -1 -1 1 0 20
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
296 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 7 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
318 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
313 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 20
|
|
308 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
|
|
302 inst_CLK_000_D2 3 -1 6 1 7 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
|
|
85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 5 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 1 4 1 3 6 7 -1 -1 1 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
319 cpu_est_2_ 3 -1 3 3 1 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
315 SM_AMIGA_0_ 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_1_ 3 -1 7 2 1 7 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 inst_CLK_000_D4 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
305 inst_CLK_000_D3 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D5 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
303 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 1 3 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 3 7 63 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 1 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 3 6 7 -1 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 5 0 21
|
|
65 E 5 327 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 1 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
318 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
319 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
328 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
306 inst_CLK_000_D4 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D5 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 7 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 7 1 6 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 3 1 7 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 1 3 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 1 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 7 63 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 5 0 21
|
|
65 E 5 327 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 1 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
319 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
309 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
328 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
306 inst_CLK_000_D4 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D5 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 7 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 3 1 7 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 1 3 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 7 63 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 5 0 21
|
|
65 E 5 327 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 1 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
307 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 5 0 21
|
|
308 inst_CLK_OUT_PRE 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 6 3 3 6 7 -1 -1 2 0 21
|
|
296 inst_VPA_D 3 -1 1 3 1 3 6 -1 -1 1 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 7 0 21
|
|
318 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
319 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
328 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
305 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
304 inst_CLK_000_D3 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
316 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_P_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_N_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 21
|
|
314 CLK_CNT_P_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
312 CLK_CNT_N_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
306 inst_CLK_000_D4 3 -1 7 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D5 3 -1 7 1 7 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 1 3 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 7 63 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 3 6 7 -1 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 324 3 0 31 -1 5 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D0 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
319 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
317 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
320 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
306 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
307 inst_CLK_000_D4 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
302 inst_CLK_000_D5 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 7 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
316 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_P_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_N_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
303 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
314 CLK_CNT_P_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
312 CLK_CNT_N_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
305 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
294 CLK_OUT_INTreg 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 1 3 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 7 63 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 324 3 0 31 -1 5 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D0 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
319 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
317 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
320 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
306 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
307 inst_CLK_000_D4 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
302 inst_CLK_000_D5 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 7 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
316 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_P_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_N_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
303 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
314 CLK_CNT_P_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
312 CLK_CNT_N_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
305 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
294 CLK_OUT_INTreg 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 1 3 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 7 63 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 324 3 0 31 -1 5 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D0 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
319 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
317 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
320 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
306 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
307 inst_CLK_000_D4 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
302 inst_CLK_000_D5 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 7 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
316 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_P_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_N_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
303 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
314 CLK_CNT_P_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
312 CLK_CNT_N_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
305 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
294 CLK_OUT_INTreg 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 1 3 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 7 63 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 326 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 325 3 0 31 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 322 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 333 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
32 AS_000 5 324 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D0 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
308 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 5 0 21
|
|
318 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 4 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
307 inst_CLK_000_D5 3 -1 1 3 1 6 7 -1 -1 1 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 7 0 21
|
|
320 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
316 SM_AMIGA_0_ 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
321 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
319 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
313 CLK_CNT_P_0_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
311 CLK_CNT_N_0_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
314 CLK_CNT_P_1_ 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
312 CLK_CNT_N_1_ 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
305 inst_CLK_000_D3 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
302 inst_CLK_000_D6 3 -1 6 2 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D2 3 -1 3 2 6 7 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
317 inst_CLK_000_D4 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 CLK_OUT_INTreg 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 1 3 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 3 6 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 7 63 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 3 6 7 -1 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 326 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 325 3 0 31 -1 5 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 322 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
32 AS_000 5 324 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
28 BG_000 5 327 3 0 28 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D0 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
320 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
318 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
321 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
319 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
328 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
306 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
307 inst_CLK_000_D5 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
302 inst_CLK_000_D6 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 6 2 1 3 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 7 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
316 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_P_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 CLK_CNT_N_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 1 0 21
|
|
317 inst_CLK_000_D4 3 -1 7 1 7 -1 -1 1 0 21
|
|
314 CLK_CNT_P_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
312 CLK_CNT_N_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
305 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
294 CLK_OUT_INTreg 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 1 3 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 1 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 7 63 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 326 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 325 3 0 31 -1 5 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 322 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
32 AS_000 5 324 3 0 32 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
300 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D0 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
320 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
318 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
321 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
319 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
328 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
306 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
307 inst_CLK_000_D5 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
302 inst_CLK_000_D6 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 6 2 1 3 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 7 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
316 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 CLK_CNT_P_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
311 CLK_CNT_N_0_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
317 inst_CLK_000_D4 3 -1 7 1 7 -1 -1 1 0 21
|
|
314 CLK_CNT_P_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
312 CLK_CNT_N_1_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
305 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
294 CLK_OUT_INTreg 3 -1 6 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 1 3 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 1 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 7 63 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 324 3 0 31 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 333 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 5 0 21
|
|
319 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 7 0 21
|
|
317 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
320 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
314 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
306 inst_CLK_000_D5 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D6 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 3 2 6 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
316 inst_CLK_000_D4 3 -1 7 1 6 -1 -1 1 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 7 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 1 3 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 1 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 7 63 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 3 6 7 -1 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 324 3 0 31 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 333 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 5 0 21
|
|
319 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 7 0 21
|
|
317 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
320 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
314 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
327 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
306 inst_CLK_000_D5 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D6 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 3 2 6 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
316 inst_CLK_000_D4 3 -1 7 1 6 -1 -1 1 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 7 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 1 3 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 1 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 7 63 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
293 nEXP_SPACE 1 -1 -1 3 3 6 7 -1 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 327 3 4 0 3 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 326 3 4 0 3 6 7 31 -1 5 0 21
|
|
32 AS_000 5 325 3 4 0 3 6 7 32 -1 2 0 21
|
|
81 AS_030 5 324 7 2 3 7 81 -1 2 0 21
|
|
97 DS_030 5 -1 0 1 3 97 -1 4 0 21
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
293 A0 5 -1 -1 1 3 -1 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 -1 0 33 -1 8 0 21
|
|
29 DTACK 5 331 3 0 29 -1 4 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 -1 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 4 0 3 6 7 82 -1 2 0 21
|
|
299 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D1 3 -1 -1 3 1 6 7 -1 -1 1 0 21
|
|
320 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
317 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21
|
|
332 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
321 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
319 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
315 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
331 RN_DTACK 3 29 3 1 3 29 -1 4 0 21
|
|
336 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
335 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
309 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
|
|
333 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
330 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
324 RN_AS_030 3 81 7 1 0 81 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
316 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
306 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21
|
|
302 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
334 RN_AMIGA_BUS_ENABLE 3 33 -1 0 33 -1 8 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
|
|
308 SM_AMIGA_0_ 3 -1 -1 0 -1 -1 4 0 21
|
|
318 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
307 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 -1 0 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 -1 0 -1 -1 2 0 21
|
|
314 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
305 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
301 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 3 6 7 63 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 0 3 6 7 13 -1
|
|
70 RW 1 -1 -1 2 0 3 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 326 3 4 0 3 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 325 3 4 0 3 6 7 31 -1 5 0 21
|
|
32 AS_000 5 324 3 4 0 3 6 7 32 -1 2 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 2 0 21
|
|
97 DS_030 5 -1 0 1 3 97 -1 4 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 -1 0 33 -1 8 0 21
|
|
29 DTACK 5 330 3 0 29 -1 4 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 -1 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 4 0 3 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 -1 3 1 6 7 -1 -1 1 0 21
|
|
319 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
320 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
314 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
330 RN_DTACK 3 29 3 1 3 29 -1 4 0 21
|
|
335 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
334 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
308 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
329 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
323 RN_AS_030 3 81 7 1 0 81 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
305 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 -1 0 33 -1 8 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
|
|
307 SM_AMIGA_0_ 3 -1 -1 0 -1 -1 4 0 21
|
|
317 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
306 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 -1 0 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 0 -1 -1 2 0 21
|
|
313 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 3 6 7 63 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 0 3 6 7 13 -1
|
|
70 RW 1 -1 -1 2 0 3 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
106 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 328 3 4 0 3 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 327 3 4 0 3 6 7 31 -1 6 0 21
|
|
32 AS_000 5 325 3 4 0 3 6 7 32 -1 2 0 21
|
|
81 AS_030 5 324 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 326 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 334 6 1 3 69 -1 2 0 21
|
|
68 A0 5 329 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 -1 0 33 -1 7 0 21
|
|
29 DTACK 5 333 3 0 29 -1 5 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 -1 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
331 RN_BGACK_030 3 82 7 4 0 3 6 7 82 -1 2 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 -1 3 1 6 7 -1 -1 1 0 21
|
|
319 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21
|
|
335 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
324 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
320 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
314 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 6 0 21
|
|
333 RN_DTACK 3 29 3 1 3 29 -1 5 0 21
|
|
326 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
308 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 4 0 21
|
|
339 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
338 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
315 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
302 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
336 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
334 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
332 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
330 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
329 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
305 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 8 0 21
|
|
337 RN_AMIGA_BUS_ENABLE 3 33 -1 0 33 -1 7 0 21
|
|
317 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
|
|
306 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
307 SM_AMIGA_0_ 3 -1 -1 0 -1 -1 3 1 21
|
|
303 SM_AMIGA_6_ 3 -1 -1 0 -1 -1 3 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
297 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
313 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 3 6 7 63 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 0 3 6 7 13 -1
|
|
70 RW 1 -1 -1 2 0 3 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 327 3 4 0 3 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 326 3 4 0 3 6 7 31 -1 6 0 21
|
|
32 AS_000 5 324 3 4 0 3 6 7 32 -1 2 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 333 6 1 3 69 -1 2 0 21
|
|
68 A0 5 328 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 -1 0 33 -1 7 0 21
|
|
29 DTACK 5 332 3 0 29 -1 5 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 -1 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
330 RN_BGACK_030 3 82 7 4 0 3 6 7 82 -1 2 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 3 1 6 7 -1 -1 1 0 21
|
|
318 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21
|
|
334 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
323 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
313 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 6 0 21
|
|
332 RN_DTACK 3 29 3 1 3 29 -1 5 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
307 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 4 0 21
|
|
338 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
337 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
314 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
301 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
335 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
333 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
331 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
328 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 8 0 21
|
|
336 RN_AMIGA_BUS_ENABLE 3 33 -1 0 33 -1 7 0 21
|
|
316 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
|
|
305 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
306 SM_AMIGA_0_ 3 -1 -1 0 -1 -1 3 1 21
|
|
302 SM_AMIGA_6_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 3 6 7 63 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 0 3 6 7 13 -1
|
|
70 RW 1 -1 -1 2 0 3 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 3 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 327 3 4 0 3 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 326 3 4 0 3 6 7 31 -1 6 0 21
|
|
32 AS_000 5 324 3 4 0 3 6 7 32 -1 2 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 333 6 1 3 69 -1 2 0 21
|
|
68 A0 5 328 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 -1 0 33 -1 7 0 21
|
|
29 DTACK 5 332 3 0 29 -1 5 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 -1 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
330 RN_BGACK_030 3 82 7 4 0 3 6 7 82 -1 2 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 3 1 6 7 -1 -1 1 0 21
|
|
318 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21
|
|
334 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
323 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
313 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 6 0 21
|
|
332 RN_DTACK 3 29 3 1 3 29 -1 5 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
307 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 4 0 21
|
|
338 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
337 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
314 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
301 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
335 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
333 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
331 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
328 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 8 0 21
|
|
336 RN_AMIGA_BUS_ENABLE 3 33 -1 0 33 -1 7 0 21
|
|
316 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
|
|
305 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
306 SM_AMIGA_0_ 3 -1 -1 0 -1 -1 3 1 21
|
|
302 SM_AMIGA_6_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 3 6 7 63 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 0 3 6 7 13 -1
|
|
70 RW 1 -1 -1 2 0 3 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 3 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 328 3 4 0 3 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 327 3 4 0 3 6 7 31 -1 5 0 21
|
|
32 AS_000 5 325 3 4 0 3 6 7 32 -1 2 0 21
|
|
81 AS_030 5 324 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 326 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21
|
|
68 A0 5 329 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 -1 0 33 -1 10 0 21
|
|
29 DTACK 5 335 3 0 29 -1 5 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 -1 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
331 RN_BGACK_030 3 82 7 4 0 3 6 7 82 -1 2 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 3 1 6 7 -1 -1 1 0 21
|
|
318 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
324 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
335 RN_DTACK 3 29 3 1 3 29 -1 5 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
326 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
313 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
|
|
337 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
334 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
330 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
329 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
314 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
304 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 -1 0 33 -1 10 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
|
|
306 SM_AMIGA_0_ 3 -1 -1 0 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
305 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 -1 0 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 3 6 7 63 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 0 3 6 7 13 -1
|
|
70 RW 1 -1 -1 2 0 3 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 3 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 328 3 4 0 3 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 327 3 4 0 3 6 7 31 -1 5 0 21
|
|
32 AS_000 5 325 3 4 0 3 6 7 32 -1 2 0 21
|
|
81 AS_030 5 324 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 326 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 321 6 1 3 69 -1 2 0 21
|
|
68 A0 5 329 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 -1 0 33 -1 10 0 21
|
|
29 DTACK 5 335 3 0 29 -1 5 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 -1 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
333 RN_BGACK_030 3 82 7 4 0 3 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 3 1 6 7 -1 -1 1 0 21
|
|
318 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
324 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
335 RN_DTACK 3 29 3 1 3 29 -1 5 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
326 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
313 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21
|
|
337 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
334 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
332 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
329 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
321 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
314 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
304 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 -1 0 33 -1 10 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
|
|
306 SM_AMIGA_0_ 3 -1 -1 0 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
305 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 -1 0 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 3 6 7 63 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 0 3 6 7 13 -1
|
|
70 RW 1 -1 -1 2 0 3 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 3 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 328 3 4 0 3 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 327 3 4 0 3 6 7 31 -1 5 0 21
|
|
32 AS_000 5 325 -1 4 0 3 6 7 32 -1 2 0 21
|
|
81 AS_030 5 324 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 326 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 323 -1 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21
|
|
68 A0 5 329 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 7 0 21
|
|
29 DTACK 5 335 3 0 29 -1 5 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 -1 0 82 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 -1 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 -1 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 -1 0 64 -1 1 0 21
|
|
46 CIIN 0 -1 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 -1 0 9 -1 1 0 21
|
|
2 RESET 0 -1 0 2 -1 1 0 21
|
|
331 RN_BGACK_030 3 82 -1 4 0 3 6 7 82 -1 2 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 3 1 3 6 -1 -1 1 0 21
|
|
318 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
324 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 2 1 6 -1 -1 1 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
335 RN_DTACK 3 29 3 1 3 29 -1 5 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
326 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
306 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
337 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
334 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
329 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
325 RN_AS_000 3 32 -1 1 3 32 -1 2 0 21
|
|
322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
314 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
|
|
313 SM_AMIGA_7_ 3 -1 -1 0 -1 -1 5 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 -1 0 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 -1 0 -1 -1 3 0 21
|
|
305 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21
|
|
330 RN_BG_000 3 28 -1 0 28 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 -1 0 80 -1 2 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
304 inst_CLK_000_D5 3 -1 -1 0 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 3 6 7 63 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 0 3 6 7 13 -1
|
|
70 RW 1 -1 -1 2 0 3 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 3 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
93 A_21_ 1 -1 -1 0 93 -1
|
|
92 A_20_ 1 -1 -1 0 92 -1
|
|
84 A_22_ 1 -1 -1 0 84 -1
|
|
83 A_23_ 1 -1 -1 0 83 -1
|
|
20 BG_030 1 -1 -1 0 20 -1
|
|
18 A_24_ 1 -1 -1 0 18 -1
|
|
17 A_25_ 1 -1 -1 0 17 -1
|
|
16 A_26_ 1 -1 -1 0 16 -1
|
|
15 A_27_ 1 -1 -1 0 15 -1
|
|
14 A_28_ 1 -1 -1 0 14 -1
|
|
10 CLK_000 1 -1 -1 0 10 -1
|
|
5 A_29_ 1 -1 -1 0 5 -1
|
|
4 A_30_ 1 -1 -1 0 4 -1
|
|
3 A_31_ 1 -1 -1 0 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 328 3 4 0 3 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 327 3 4 0 3 6 7 31 -1 5 0 21
|
|
32 AS_000 5 325 -1 4 0 3 6 7 32 -1 2 0 21
|
|
81 AS_030 5 324 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 326 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 323 -1 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21
|
|
68 A0 5 329 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 7 0 21
|
|
29 DTACK 5 335 3 0 29 -1 5 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 -1 0 82 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 -1 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 -1 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 -1 0 64 -1 1 0 21
|
|
46 CIIN 0 -1 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 -1 0 9 -1 1 0 21
|
|
2 RESET 0 -1 0 2 -1 1 0 21
|
|
331 RN_BGACK_030 3 82 -1 4 0 3 6 7 82 -1 2 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 3 1 3 6 -1 -1 1 0 21
|
|
318 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
324 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 2 1 6 -1 -1 1 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
335 RN_DTACK 3 29 3 1 3 29 -1 5 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
326 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
306 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
337 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
334 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
329 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
325 RN_AS_000 3 32 -1 1 3 32 -1 2 0 21
|
|
322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
314 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
|
|
313 SM_AMIGA_7_ 3 -1 -1 0 -1 -1 5 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 -1 0 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 -1 0 -1 -1 3 0 21
|
|
305 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21
|
|
330 RN_BG_000 3 28 -1 0 28 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 -1 0 80 -1 2 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
304 inst_CLK_000_D5 3 -1 -1 0 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 3 6 7 63 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 0 3 6 7 13 -1
|
|
70 RW 1 -1 -1 2 0 3 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 3 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
93 A_21_ 1 -1 -1 0 93 -1
|
|
92 A_20_ 1 -1 -1 0 92 -1
|
|
84 A_22_ 1 -1 -1 0 84 -1
|
|
83 A_23_ 1 -1 -1 0 83 -1
|
|
20 BG_030 1 -1 -1 0 20 -1
|
|
18 A_24_ 1 -1 -1 0 18 -1
|
|
17 A_25_ 1 -1 -1 0 17 -1
|
|
16 A_26_ 1 -1 -1 0 16 -1
|
|
15 A_27_ 1 -1 -1 0 15 -1
|
|
14 A_28_ 1 -1 -1 0 14 -1
|
|
10 CLK_000 1 -1 -1 0 10 -1
|
|
5 A_29_ 1 -1 -1 0 5 -1
|
|
4 A_30_ 1 -1 -1 0 4 -1
|
|
3 A_31_ 1 -1 -1 0 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 328 3 4 0 3 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 327 3 4 0 3 6 7 31 -1 5 0 21
|
|
32 AS_000 5 325 -1 4 0 3 6 7 32 -1 2 0 21
|
|
81 AS_030 5 324 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 326 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 323 -1 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21
|
|
68 A0 5 329 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 7 0 21
|
|
29 DTACK 5 335 3 0 29 -1 5 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 -1 0 82 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 -1 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 -1 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 -1 0 64 -1 1 0 21
|
|
46 CIIN 0 -1 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 -1 0 9 -1 1 0 21
|
|
2 RESET 0 -1 0 2 -1 1 0 21
|
|
331 RN_BGACK_030 3 82 -1 4 0 3 6 7 82 -1 2 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 3 1 3 6 -1 -1 1 0 21
|
|
318 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
324 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 2 1 6 -1 -1 1 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
335 RN_DTACK 3 29 3 1 3 29 -1 5 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
326 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
306 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
337 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
334 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
329 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
325 RN_AS_000 3 32 -1 1 3 32 -1 2 0 21
|
|
322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
314 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
|
|
313 SM_AMIGA_7_ 3 -1 -1 0 -1 -1 5 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 -1 0 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 -1 0 -1 -1 3 0 21
|
|
305 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21
|
|
330 RN_BG_000 3 28 -1 0 28 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 -1 0 80 -1 2 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
304 inst_CLK_000_D5 3 -1 -1 0 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 3 6 7 63 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 0 3 6 7 13 -1
|
|
70 RW 1 -1 -1 2 0 3 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 3 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
93 A_21_ 1 -1 -1 0 93 -1
|
|
92 A_20_ 1 -1 -1 0 92 -1
|
|
84 A_22_ 1 -1 -1 0 84 -1
|
|
83 A_23_ 1 -1 -1 0 83 -1
|
|
20 BG_030 1 -1 -1 0 20 -1
|
|
18 A_24_ 1 -1 -1 0 18 -1
|
|
17 A_25_ 1 -1 -1 0 17 -1
|
|
16 A_26_ 1 -1 -1 0 16 -1
|
|
15 A_27_ 1 -1 -1 0 15 -1
|
|
14 A_28_ 1 -1 -1 0 14 -1
|
|
10 CLK_000 1 -1 -1 0 10 -1
|
|
5 A_29_ 1 -1 -1 0 5 -1
|
|
4 A_30_ 1 -1 -1 0 4 -1
|
|
3 A_31_ 1 -1 -1 0 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 328 3 4 0 3 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 327 3 4 0 3 6 7 31 -1 5 0 21
|
|
32 AS_000 5 325 -1 4 0 3 6 7 32 -1 2 0 21
|
|
81 AS_030 5 324 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 326 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 323 -1 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21
|
|
68 A0 5 329 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 7 0 21
|
|
29 DTACK 5 335 3 0 29 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 -1 0 82 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 -1 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 -1 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 -1 0 64 -1 1 0 21
|
|
46 CIIN 0 -1 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 -1 0 9 -1 1 0 21
|
|
2 RESET 0 -1 0 2 -1 1 0 21
|
|
331 RN_BGACK_030 3 82 -1 4 0 3 6 7 82 -1 2 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 3 1 3 6 -1 -1 1 0 21
|
|
318 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
324 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 2 1 6 -1 -1 1 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
335 RN_DTACK 3 29 3 1 3 29 -1 6 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
326 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
306 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
337 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
334 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
329 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
325 RN_AS_000 3 32 -1 1 3 32 -1 2 0 21
|
|
322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
314 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
|
|
313 SM_AMIGA_7_ 3 -1 -1 0 -1 -1 5 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 -1 0 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 -1 0 -1 -1 3 0 21
|
|
305 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21
|
|
330 RN_BG_000 3 28 -1 0 28 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 -1 0 80 -1 2 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
304 inst_CLK_000_D5 3 -1 -1 0 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 3 6 7 63 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 0 3 6 7 13 -1
|
|
70 RW 1 -1 -1 2 0 3 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
79 DSACK_0_ 1 -1 -1 1 3 79 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 3 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
93 A_21_ 1 -1 -1 0 93 -1
|
|
92 A_20_ 1 -1 -1 0 92 -1
|
|
84 A_22_ 1 -1 -1 0 84 -1
|
|
83 A_23_ 1 -1 -1 0 83 -1
|
|
20 BG_030 1 -1 -1 0 20 -1
|
|
18 A_24_ 1 -1 -1 0 18 -1
|
|
17 A_25_ 1 -1 -1 0 17 -1
|
|
16 A_26_ 1 -1 -1 0 16 -1
|
|
15 A_27_ 1 -1 -1 0 15 -1
|
|
14 A_28_ 1 -1 -1 0 14 -1
|
|
10 CLK_000 1 -1 -1 0 10 -1
|
|
5 A_29_ 1 -1 -1 0 5 -1
|
|
4 A_30_ 1 -1 -1 0 4 -1
|
|
3 A_31_ 1 -1 -1 0 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 328 3 4 0 3 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 327 3 4 0 3 6 7 31 -1 5 0 21
|
|
32 AS_000 5 325 -1 4 0 3 6 7 32 -1 2 0 21
|
|
81 AS_030 5 324 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 326 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 323 -1 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21
|
|
68 A0 5 329 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 7 0 21
|
|
29 DTACK 5 335 3 0 29 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 -1 0 82 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 -1 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 -1 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 -1 0 64 -1 1 0 21
|
|
46 CIIN 0 -1 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 -1 0 9 -1 1 0 21
|
|
2 RESET 0 -1 0 2 -1 1 0 21
|
|
331 RN_BGACK_030 3 82 -1 4 0 3 6 7 82 -1 2 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 3 1 3 6 -1 -1 1 0 21
|
|
318 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
324 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 2 1 6 -1 -1 1 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
335 RN_DTACK 3 29 3 1 3 29 -1 6 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
326 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
306 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
337 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
334 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
329 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
325 RN_AS_000 3 32 -1 1 3 32 -1 2 0 21
|
|
322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
314 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
|
|
313 SM_AMIGA_7_ 3 -1 -1 0 -1 -1 5 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 -1 0 -1 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 -1 0 -1 -1 3 0 21
|
|
305 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21
|
|
330 RN_BG_000 3 28 -1 0 28 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 -1 0 80 -1 2 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
304 inst_CLK_000_D5 3 -1 -1 0 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 3 6 7 63 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 0 3 6 7 13 -1
|
|
70 RW 1 -1 -1 2 0 3 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
79 DSACK_0_ 1 -1 -1 1 3 79 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 3 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
93 A_21_ 1 -1 -1 0 93 -1
|
|
92 A_20_ 1 -1 -1 0 92 -1
|
|
84 A_22_ 1 -1 -1 0 84 -1
|
|
83 A_23_ 1 -1 -1 0 83 -1
|
|
20 BG_030 1 -1 -1 0 20 -1
|
|
18 A_24_ 1 -1 -1 0 18 -1
|
|
17 A_25_ 1 -1 -1 0 17 -1
|
|
16 A_26_ 1 -1 -1 0 16 -1
|
|
15 A_27_ 1 -1 -1 0 15 -1
|
|
14 A_28_ 1 -1 -1 0 14 -1
|
|
10 CLK_000 1 -1 -1 0 10 -1
|
|
5 A_29_ 1 -1 -1 0 5 -1
|
|
4 A_30_ 1 -1 -1 0 4 -1
|
|
3 A_31_ 1 -1 -1 0 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 327 3 4 0 3 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 326 3 4 0 3 6 7 31 -1 6 0 21
|
|
32 AS_000 5 324 -1 4 0 3 6 7 32 -1 2 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 331 6 1 3 69 -1 2 0 21
|
|
68 A0 5 328 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
29 DTACK 5 333 3 0 29 -1 6 0 21
|
|
65 E 0 -1 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 -1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 -1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 -1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 -1 0 82 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 -1 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 -1 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 -1 0 64 -1 1 0 21
|
|
46 CIIN 0 -1 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 -1 0 9 -1 1 0 21
|
|
2 RESET 0 -1 0 2 -1 1 0 21
|
|
330 RN_BGACK_030 3 82 -1 4 0 3 6 7 82 -1 2 0 21
|
|
300 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
336 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
333 RN_DTACK 3 29 3 1 3 29 -1 6 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 4 0 21
|
|
334 RN_E 3 65 -1 1 3 65 -1 3 1 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 -1 1 3 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
314 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
306 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 3 1 21
|
|
302 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
301 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
335 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
332 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
331 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
328 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
324 RN_AS_000 3 32 -1 1 3 32 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 -1 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 8 0 21
|
|
313 SM_AMIGA_7_ 3 -1 -1 0 -1 -1 6 0 21
|
|
316 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 -1 0 -1 -1 4 0 21
|
|
305 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
338 RN_IPL_030_0_ 3 7 -1 0 7 -1 3 0 21
|
|
337 RN_IPL_030_1_ 3 6 -1 0 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 -1 0 8 -1 3 0 21
|
|
329 RN_BG_000 3 28 -1 0 28 -1 2 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 4 0 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 3 6 7 63 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 0 3 6 7 13 -1
|
|
70 RW 1 -1 -1 2 0 3 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
79 DSACK_0_ 1 -1 -1 1 3 79 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
35 VPA 1 -1 -1 1 3 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
93 A_21_ 1 -1 -1 0 93 -1
|
|
92 A_20_ 1 -1 -1 0 92 -1
|
|
84 A_22_ 1 -1 -1 0 84 -1
|
|
83 A_23_ 1 -1 -1 0 83 -1
|
|
67 IPL_2_ 1 -1 -1 0 67 -1
|
|
66 IPL_0_ 1 -1 -1 0 66 -1
|
|
55 IPL_1_ 1 -1 -1 0 55 -1
|
|
20 BG_030 1 -1 -1 0 20 -1
|
|
18 A_24_ 1 -1 -1 0 18 -1
|
|
17 A_25_ 1 -1 -1 0 17 -1
|
|
16 A_26_ 1 -1 -1 0 16 -1
|
|
15 A_27_ 1 -1 -1 0 15 -1
|
|
14 A_28_ 1 -1 -1 0 14 -1
|
|
10 CLK_000 1 -1 -1 0 10 -1
|
|
5 A_29_ 1 -1 -1 0 5 -1
|
|
4 A_30_ 1 -1 -1 0 4 -1
|
|
3 A_31_ 1 -1 -1 0 3 -1
|
|
104 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 323 7 5 0 2 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 328 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 327 3 3 0 6 7 31 -1 6 0 21
|
|
32 AS_000 5 325 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 326 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
69 SIZE_0_ 5 324 6 1 3 69 -1 2 0 21
|
|
68 A0 5 329 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 5 337 3 0 33 -1 6 0 21
|
|
65 E 5 335 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 331 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 322 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 333 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 336 3 0 34 -1 2 1 21
|
|
28 BG_000 5 330 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
331 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
300 inst_BGACK_030_INT_D 3 -1 3 4 0 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 0 4 0 1 6 7 -1 -1 1 0 21
|
|
313 SM_AMIGA_7_ 3 -1 1 3 1 3 5 -1 -1 6 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 4 0 21
|
|
335 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
319 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_4_ 3 -1 6 3 2 3 6 -1 -1 3 0 21
|
|
306 SM_AMIGA_0_ 3 -1 2 3 1 2 3 -1 -1 3 1 21
|
|
302 SM_AMIGA_6_ 3 -1 5 3 1 3 5 -1 -1 3 0 21
|
|
301 SM_AMIGA_5_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
333 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 3 1 2 3 32 -1 2 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 4 3 1 4 6 -1 -1 2 0 21
|
|
304 inst_CLK_000_D5 3 -1 4 3 2 5 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D6 3 -1 7 3 2 5 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 1 5 -1 -1 8 0 21
|
|
316 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
305 SM_AMIGA_3_ 3 -1 2 2 0 2 -1 -1 4 0 21
|
|
323 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
336 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
308 CLK_CNT_N_0_ 3 -1 4 2 4 6 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 1 2 4 6 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 5 2 1 5 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 0 2 1 5 -1 -1 1 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
337 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
326 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
330 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
329 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
324 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 5 1 4 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
35 VPA 1 -1 -1 3 0 2 3 35 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 2 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
29 DTACK 1 -1 -1 1 2 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 327 3 4 0 3 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 326 3 4 0 3 6 7 31 -1 6 0 21
|
|
32 AS_000 5 324 -1 4 0 3 6 7 32 -1 2 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 331 6 1 3 69 -1 2 0 21
|
|
68 A0 5 328 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
29 DTACK 5 333 3 0 29 -1 6 0 21
|
|
65 E 0 -1 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 -1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 -1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 -1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 -1 0 82 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 -1 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 -1 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 -1 0 64 -1 1 0 21
|
|
46 CIIN 0 -1 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 -1 0 9 -1 1 0 21
|
|
2 RESET 0 -1 0 2 -1 1 0 21
|
|
330 RN_BGACK_030 3 82 -1 4 0 3 6 7 82 -1 2 0 21
|
|
300 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
336 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
333 RN_DTACK 3 29 3 1 3 29 -1 6 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 4 0 21
|
|
334 RN_E 3 65 -1 1 3 65 -1 3 1 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 -1 1 3 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
314 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
306 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 3 1 21
|
|
302 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
301 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
335 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
332 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
331 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
328 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
324 RN_AS_000 3 32 -1 1 3 32 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 -1 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 8 0 21
|
|
313 SM_AMIGA_7_ 3 -1 -1 0 -1 -1 6 0 21
|
|
316 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 -1 0 -1 -1 4 0 21
|
|
305 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
338 RN_IPL_030_0_ 3 7 -1 0 7 -1 3 0 21
|
|
337 RN_IPL_030_1_ 3 6 -1 0 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 -1 0 8 -1 3 0 21
|
|
329 RN_BG_000 3 28 -1 0 28 -1 2 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 4 0 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 3 6 7 63 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 0 3 6 7 13 -1
|
|
70 RW 1 -1 -1 2 0 3 70 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
79 DSACK_0_ 1 -1 -1 1 3 79 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
35 VPA 1 -1 -1 1 3 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
93 A_21_ 1 -1 -1 0 93 -1
|
|
92 A_20_ 1 -1 -1 0 92 -1
|
|
84 A_22_ 1 -1 -1 0 84 -1
|
|
83 A_23_ 1 -1 -1 0 83 -1
|
|
67 IPL_2_ 1 -1 -1 0 67 -1
|
|
66 IPL_0_ 1 -1 -1 0 66 -1
|
|
55 IPL_1_ 1 -1 -1 0 55 -1
|
|
20 BG_030 1 -1 -1 0 20 -1
|
|
18 A_24_ 1 -1 -1 0 18 -1
|
|
17 A_25_ 1 -1 -1 0 17 -1
|
|
16 A_26_ 1 -1 -1 0 16 -1
|
|
15 A_27_ 1 -1 -1 0 15 -1
|
|
14 A_28_ 1 -1 -1 0 14 -1
|
|
10 CLK_000 1 -1 -1 0 10 -1
|
|
5 A_29_ 1 -1 -1 0 5 -1
|
|
4 A_30_ 1 -1 -1 0 4 -1
|
|
3 A_31_ 1 -1 -1 0 3 -1
|
|
104 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 323 7 4 2 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 328 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 327 3 3 0 6 7 31 -1 6 0 21
|
|
32 AS_000 5 325 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 326 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 324 6 1 3 69 -1 2 0 21
|
|
68 A0 5 329 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 337 3 0 33 -1 6 0 21
|
|
65 E 5 335 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 331 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 333 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 336 3 0 34 -1 2 1 21
|
|
28 BG_000 5 330 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
331 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 0 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
302 SM_AMIGA_6_ 3 -1 6 5 0 2 3 5 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_7_ 3 -1 0 4 0 3 5 6 -1 -1 6 0 21
|
|
300 inst_BGACK_030_INT_D 3 -1 1 4 0 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 7 4 1 5 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 3 0 5 6 -1 -1 8 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 5 3 1 5 7 -1 -1 4 0 21
|
|
335 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_4_ 3 -1 0 3 0 2 3 -1 -1 3 0 21
|
|
306 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 3 1 21
|
|
301 SM_AMIGA_5_ 3 -1 2 3 0 2 3 -1 -1 3 0 21
|
|
333 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
304 inst_CLK_000_D5 3 -1 4 3 1 5 7 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 0 3 0 5 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_D6 3 -1 5 3 1 5 7 -1 -1 1 0 21
|
|
316 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21
|
|
323 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
336 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
310 CLK_CNT_P_0_ 3 -1 4 2 4 5 -1 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 4 2 0 4 -1 -1 2 0 21
|
|
298 inst_CLK_000_D2 3 -1 5 2 0 6 -1 -1 1 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
337 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
326 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
305 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
330 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
329 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
324 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 5 1 4 -1 -1 1 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
35 VPA 1 -1 -1 2 2 3 35 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 326 3 0 30 -1 8 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 7 0 21
|
|
31 UDS_000 5 325 3 0 31 -1 5 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 321 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 4 3 4 5 7 82 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 2 4 0 2 3 5 -1 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 5 4 1 5 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
309 SM_AMIGA_1_ 3 -1 7 3 2 5 7 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 inst_CLK_000_D5 3 -1 7 3 2 5 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 5 3 2 5 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
308 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 4 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_3_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
323 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 1 2 1 4 -1 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
304 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 2 2 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 5 2 2 4 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 5 2 2 5 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 inst_CLK_000_D4 3 -1 4 1 7 -1 -1 1 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
35 VPA 1 -1 -1 2 0 3 35 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A0 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
29 DTACK 1 -1 -1 1 0 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 326 3 0 30 -1 8 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 7 0 21
|
|
31 UDS_000 5 325 3 0 31 -1 5 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 321 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 4 3 4 5 7 82 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 2 4 0 2 3 5 -1 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 5 4 1 5 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
309 SM_AMIGA_1_ 3 -1 7 3 2 5 7 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 inst_CLK_000_D5 3 -1 7 3 2 5 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 5 3 2 5 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
308 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 4 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_3_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
323 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 1 2 1 4 -1 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
304 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 2 2 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 5 2 2 4 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 5 2 2 5 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 inst_CLK_000_D4 3 -1 4 1 7 -1 -1 1 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
35 VPA 1 -1 -1 2 0 3 35 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A0 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
29 DTACK 1 -1 -1 1 0 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
104 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 325 7 4 2 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 327 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 322 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 337 6 1 3 69 -1 2 0 21
|
|
68 A0 5 330 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 336 3 0 33 -1 7 0 21
|
|
65 E 5 334 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 332 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 333 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 335 3 0 34 -1 2 1 21
|
|
28 BG_000 5 331 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
332 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 5 4 0 1 6 7 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 5 4 0 3 6 7 -1 -1 1 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
334 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 1 3 1 5 7 -1 -1 3 0 21
|
|
333 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
314 SM_AMIGA_4_ 3 -1 0 3 0 2 3 -1 -1 2 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 6 3 2 4 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 5 3 0 3 5 -1 -1 2 0 21
|
|
304 inst_CLK_000_D5 3 -1 4 3 1 5 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 7 3 1 5 7 -1 -1 1 0 21
|
|
313 SM_AMIGA_7_ 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 2 2 1 6 -1 -1 4 0 21
|
|
306 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 4 0 21
|
|
325 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
305 SM_AMIGA_3_ 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
335 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
326 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 2 2 0 2 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 4 2 2 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 0 2 4 5 -1 -1 1 0 21
|
|
329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
336 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 7 0 21
|
|
328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
322 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
337 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
330 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 5 1 4 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 4 1 5 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
35 VPA 1 -1 -1 2 2 3 35 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 5 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 3 0 20
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
304 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
319 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
308 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
305 inst_CLK_000_D5 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 3 2 6 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
314 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
307 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
315 inst_CLK_000_D4 3 -1 7 1 6 -1 -1 1 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 7 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 1 3 60 -1
|
|
85 RST 1 -1 -1 4 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 3 1 3 7 81 -1
|
|
13 nEXP_SPACE 1 -1 -1 3 3 6 7 13 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 7 63 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 320 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 319 3 0 31 -1 5 0 21
|
|
65 E 5 324 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 1 21
|
|
33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 2 0 21
|
|
32 AS_000 5 318 3 0 32 -1 2 0 21
|
|
28 BG_000 5 321 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_6_ 3 -1 5 4 2 3 5 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
314 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_1_ 3 -1 2 3 2 5 7 -1 -1 3 0 21
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 2 3 6 32 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 2 3 0 2 3 -1 -1 2 0 21
|
|
306 inst_CLK_000_D5 3 -1 5 3 2 5 7 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 4 3 1 4 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 5 3 2 5 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 5 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 5 6 -1 -1 7 0 21
|
|
311 SM_AMIGA_0_ 3 -1 2 2 2 6 -1 -1 4 0 21
|
|
315 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
310 SM_AMIGA_2_ 3 -1 0 2 0 2 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
305 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
304 inst_CLK_000_D3 3 -1 5 2 5 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 1 2 5 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 4 2 0 3 -1 -1 1 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 2 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 6 1 5 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 3 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 2 3 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
30 LDS_000 5 324 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 5 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 2 0 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 5 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
318 cpu_est_1_ 3 -1 2 4 0 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 4 0 2 3 6 65 -1 3 1 21
|
|
302 SM_AMIGA_6_ 3 -1 2 4 2 3 5 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 6 4 1 2 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
319 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_1_ 3 -1 1 3 1 5 7 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 1 2 3 32 -1 2 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 7 3 0 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_4_ 3 -1 6 3 0 3 6 -1 -1 2 0 21
|
|
305 inst_CLK_000_D5 3 -1 5 3 1 5 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 5 3 1 5 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 1 2 -1 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
326 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 4 2 4 6 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 0 2 6 7 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 4 2 2 5 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 2 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 5 2 0 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
307 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
315 inst_CLK_000_D4 3 -1 5 1 5 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
104 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 325 7 4 2 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 327 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 337 6 1 3 69 -1 2 0 21
|
|
68 A0 5 330 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 336 3 0 33 -1 7 0 21
|
|
65 E 5 334 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 332 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 333 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 335 3 0 34 -1 2 1 21
|
|
28 BG_000 5 331 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 6 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21
|
|
332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 5 5 0 1 4 6 7 -1 -1 1 0 21
|
|
304 inst_CLK_000_D5 3 -1 2 4 0 1 5 7 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
313 SM_AMIGA_7_ 3 -1 5 3 0 3 5 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
334 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 4 3 3 4 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 1 3 1 5 7 -1 -1 3 0 21
|
|
333 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
314 SM_AMIGA_4_ 3 -1 1 3 1 2 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 0 3 0 3 5 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 5 3 1 3 5 -1 -1 2 0 21
|
|
300 inst_CLK_000_D6 3 -1 0 3 1 5 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 0 5 -1 -1 7 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21
|
|
306 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 4 0 21
|
|
325 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 SM_AMIGA_2_ 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
335 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
326 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 4 2 0 4 -1 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 0 2 0 4 -1 -1 2 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 5 2 0 5 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 0 2 0 5 -1 -1 1 0 21
|
|
329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
336 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
305 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
337 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
330 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 5 1 2 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
35 VPA 1 -1 -1 2 2 3 35 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
104 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 323 7 4 2 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 6 0 21
|
|
32 AS_000 5 324 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 329 6 1 3 69 -1 2 0 21
|
|
68 A0 5 328 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 337 3 0 33 -1 6 0 21
|
|
65 E 5 333 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 335 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 334 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 331 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 336 3 0 34 -1 2 1 21
|
|
28 BG_000 5 330 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
331 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
300 inst_BGACK_030_INT_D 3 -1 6 4 0 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 5 4 1 2 6 7 -1 -1 1 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 1 3 1 5 7 -1 -1 4 0 21
|
|
333 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_6_ 3 -1 5 3 0 3 5 -1 -1 3 0 21
|
|
332 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 2 3 1 2 5 -1 -1 2 0 21
|
|
304 inst_CLK_000_D5 3 -1 0 3 1 5 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D6 3 -1 5 3 1 5 7 -1 -1 1 0 21
|
|
313 SM_AMIGA_7_ 3 -1 5 2 3 5 -1 -1 6 0 21
|
|
316 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 4 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
305 SM_AMIGA_3_ 3 -1 0 2 0 2 -1 -1 4 0 21
|
|
323 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
306 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 3 1 21
|
|
301 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
336 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 4 2 1 4 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 2 2 0 2 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 2 2 0 2 -1 -1 2 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 4 2 1 4 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 5 2 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 4 2 4 5 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 2 4 5 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 8 0 21
|
|
337 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
335 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
334 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
330 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
329 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
328 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 4 1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
35 VPA 1 -1 -1 2 2 3 35 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 2 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
104 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 323 7 4 2 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 6 0 21
|
|
32 AS_000 5 324 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 329 6 1 3 69 -1 2 0 21
|
|
68 A0 5 328 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 337 3 0 33 -1 6 0 21
|
|
65 E 5 333 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 335 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 334 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 331 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 336 3 0 34 -1 2 1 21
|
|
28 BG_000 5 330 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
331 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
300 inst_BGACK_030_INT_D 3 -1 6 4 0 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 5 4 1 2 6 7 -1 -1 1 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 1 3 1 5 7 -1 -1 4 0 21
|
|
333 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_6_ 3 -1 5 3 0 3 5 -1 -1 3 0 21
|
|
332 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 2 3 1 2 5 -1 -1 2 0 21
|
|
304 inst_CLK_000_D5 3 -1 0 3 1 5 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D6 3 -1 5 3 1 5 7 -1 -1 1 0 21
|
|
313 SM_AMIGA_7_ 3 -1 5 2 3 5 -1 -1 6 0 21
|
|
316 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 4 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
305 SM_AMIGA_3_ 3 -1 0 2 0 2 -1 -1 4 0 21
|
|
323 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
306 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 3 1 21
|
|
301 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
336 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 4 2 1 4 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 2 2 0 2 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 2 2 0 2 -1 -1 2 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 4 2 1 4 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 5 2 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 4 2 4 5 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 2 4 5 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 8 0 21
|
|
337 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
335 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
334 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
330 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
329 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
328 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 4 1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
35 VPA 1 -1 -1 2 2 3 35 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 2 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 324 3 0 30 -1 10 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 6 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 6 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 321 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 0 4 1 4 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 2 3 2 3 7 -1 -1 6 0 21
|
|
308 SM_AMIGA_0_ 3 -1 5 3 2 3 5 -1 -1 3 1 21
|
|
304 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 3 0 21
|
|
302 SM_AMIGA_6_ 3 -1 2 3 2 3 7 -1 -1 3 0 21
|
|
301 SM_AMIGA_5_ 3 -1 2 3 1 2 3 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 2 3 5 32 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 0 3 0 4 5 -1 -1 2 0 21
|
|
305 inst_CLK_000_D5 3 -1 2 3 2 5 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 2 7 -1 -1 8 0 21
|
|
318 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 5 2 1 6 -1 -1 4 0 21
|
|
315 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 4 0 21
|
|
309 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 4 0 21
|
|
307 SM_AMIGA_3_ 3 -1 0 2 0 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
295 inst_VPA_SYNC 3 -1 6 2 0 6 -1 -1 2 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 4 2 0 5 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 0 2 2 4 -1 -1 1 0 21
|
|
299 inst_CLK_000_D6 3 -1 2 2 5 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 4 2 0 2 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
314 inst_CLK_000_D4 3 -1 4 1 2 -1 -1 1 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
300 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 2 3 4 7 13 -1
|
|
35 VPA 1 -1 -1 3 0 3 6 35 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A0 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
63 CLK_030 1 -1 -1 1 7 63 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
29 DTACK 1 -1 -1 1 0 29 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 324 3 0 30 -1 8 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 7 0 21
|
|
31 UDS_000 5 323 3 0 31 -1 5 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 321 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 4 3 4 5 7 82 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 2 4 2 3 5 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
308 SM_AMIGA_0_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_1_ 3 -1 5 3 5 6 7 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 2 3 6 32 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 0 3 0 1 2 -1 -1 2 0 21
|
|
304 SM_AMIGA_4_ 3 -1 2 3 0 2 3 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 6 3 2 3 6 -1 -1 2 0 21
|
|
305 inst_CLK_000_D5 3 -1 5 3 5 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 5 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 5 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
310 CLK_CNT_N_0_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 2 2 0 1 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 4 2 2 4 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 2 4 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
307 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
315 inst_CLK_000_D4 3 -1 4 1 5 -1 -1 1 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 2 3 4 5 7 13 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
35 VPA 1 -1 -1 2 0 3 35 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A0 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
29 DTACK 1 -1 -1 1 0 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 325 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 324 3 0 31 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 320 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
317 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_0_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_1_ 3 -1 7 3 5 6 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 2 3 6 32 -1 2 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 6 3 2 4 6 -1 -1 2 0 21
|
|
301 SM_AMIGA_6_ 3 -1 5 3 2 3 5 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 2 3 0 2 3 -1 -1 2 0 21
|
|
304 inst_CLK_000_D5 3 -1 4 3 5 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D6 3 -1 5 3 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 5 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 2 2 1 6 -1 -1 4 0 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
309 CLK_CNT_N_0_ 3 -1 2 2 2 4 -1 -1 2 0 21
|
|
303 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 4 2 2 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D3 3 -1 5 2 2 5 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 2 2 5 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
306 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
314 inst_CLK_000_D4 3 -1 5 1 4 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 2 3 4 5 7 13 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
35 VPA 1 -1 -1 2 0 3 35 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 2 3 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A0 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
29 DTACK 1 -1 -1 1 0 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 325 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 324 3 0 31 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 322 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
317 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_0_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_1_ 3 -1 7 3 5 6 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 3 2 3 6 32 -1 2 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 6 3 2 4 6 -1 -1 2 0 21
|
|
301 SM_AMIGA_6_ 3 -1 5 3 2 3 5 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 2 3 0 2 3 -1 -1 2 0 21
|
|
304 inst_CLK_000_D5 3 -1 4 3 5 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D6 3 -1 5 3 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 5 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 2 2 1 6 -1 -1 4 0 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
309 CLK_CNT_N_0_ 3 -1 2 2 2 4 -1 -1 2 0 21
|
|
303 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 4 2 2 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D3 3 -1 5 2 2 5 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 2 2 5 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
306 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
314 inst_CLK_000_D4 3 -1 5 1 4 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
35 VPA 1 -1 -1 2 0 3 35 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 2 3 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A0 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
29 DTACK 1 -1 -1 1 0 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 326 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 325 3 0 31 -1 5 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 323 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
32 AS_000 5 324 3 0 32 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21
|
|
305 inst_CLK_000_D5 3 -1 7 4 2 5 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 5 4 2 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 5 4 1 5 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
328 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 1 3 1 4 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 5 3 1 3 5 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21
|
|
308 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 4 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 6 2 1 4 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
307 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
315 inst_CLK_000_D4 3 -1 2 1 7 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 2 1 2 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 5 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A0 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
29 DTACK 1 -1 -1 1 0 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 325 3 0 30 -1 8 0 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 7 0 21
|
|
31 UDS_000 5 324 3 0 31 -1 5 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 322 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 5 5 0 1 2 6 7 -1 -1 1 0 21
|
|
318 cpu_est_0_ 3 -1 0 4 0 2 3 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 6 4 0 5 6 7 -1 -1 3 0 21
|
|
306 inst_CLK_000_D5 3 -1 6 4 0 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D6 3 -1 5 4 0 5 6 7 -1 -1 1 0 21
|
|
307 SM_AMIGA_7_ 3 -1 0 3 0 3 5 -1 -1 5 0 21
|
|
319 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
320 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 1 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21
|
|
311 CLK_CNT_N_0_ 3 -1 1 3 1 5 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 0 3 0 3 5 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 0 5 -1 -1 7 0 21
|
|
317 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
309 SM_AMIGA_0_ 3 -1 0 2 0 3 -1 -1 4 0 21
|
|
315 SM_AMIGA_2_ 3 -1 2 2 2 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 1 2 1 2 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
323 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
313 CLK_CNT_P_0_ 3 -1 4 2 4 6 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
314 CLK_CNT_P_1_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
312 CLK_CNT_N_1_ 3 -1 5 2 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
316 inst_CLK_000_D4 3 -1 0 1 6 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 7 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 5 7 13 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A0 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
29 DTACK 1 -1 -1 1 2 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 9 0 21
|
|
30 LDS_000 5 325 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 324 3 0 31 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 322 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_1_ 3 -1 6 5 0 3 5 6 7 -1 -1 3 0 21
|
|
299 inst_CLK_000_D1 3 -1 5 5 0 1 2 6 7 -1 -1 1 0 21
|
|
318 cpu_est_0_ 3 -1 0 4 0 2 3 6 -1 -1 3 0 21
|
|
308 inst_CLK_000_D5 3 -1 6 4 0 5 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D6 3 -1 5 4 0 5 6 7 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 3 0 3 5 -1 -1 5 0 21
|
|
319 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
320 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 1 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
327 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21
|
|
311 CLK_CNT_N_0_ 3 -1 1 3 1 5 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 0 3 0 3 5 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 0 5 -1 -1 7 0 21
|
|
317 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 0 2 0 3 -1 -1 4 0 21
|
|
315 SM_AMIGA_2_ 3 -1 2 2 2 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_3_ 3 -1 1 2 1 2 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
323 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
313 CLK_CNT_P_0_ 3 -1 4 2 4 6 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
314 CLK_CNT_P_1_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
312 CLK_CNT_N_1_ 3 -1 5 2 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
316 inst_CLK_000_D4 3 -1 0 1 6 -1 -1 1 0 21
|
|
306 inst_CLK_000_D3 3 -1 7 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 5 7 13 -1
|
|
81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A0 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
29 DTACK 1 -1 -1 1 2 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 326 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 325 3 0 31 -1 5 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 323 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 2 0 21
|
|
32 AS_000 5 324 3 0 32 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
308 SM_AMIGA_1_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21
|
|
305 inst_CLK_000_D5 3 -1 7 4 2 5 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 5 4 2 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 5 4 1 5 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
328 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 1 3 1 4 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 5 3 1 3 5 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 6 2 1 4 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
314 SM_AMIGA_0_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
307 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 2 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
315 inst_CLK_000_D4 3 -1 2 1 7 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 2 1 2 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 5 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A0 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
29 DTACK 1 -1 -1 1 0 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 326 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 325 3 0 31 -1 5 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 322 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 2 0 21
|
|
32 AS_000 5 324 3 0 32 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
301 inst_CLK_000_D0 3 -1 4 6 0 1 2 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 5 5 1 3 5 6 7 -1 -1 1 0 21
|
|
308 SM_AMIGA_1_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21
|
|
305 inst_CLK_000_D5 3 -1 7 4 2 5 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D6 3 -1 5 4 2 5 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
328 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 1 3 1 4 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 5 3 1 3 5 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 6 2 1 4 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 5 2 2 3 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
314 SM_AMIGA_0_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
307 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 2 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
315 inst_CLK_000_D4 3 -1 2 1 7 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 2 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A0 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
29 DTACK 1 -1 -1 1 0 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 326 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 325 3 0 31 -1 5 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 323 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 2 0 21
|
|
32 AS_000 5 324 3 0 32 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 5 5 1 3 5 6 7 -1 -1 1 0 21
|
|
308 SM_AMIGA_1_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21
|
|
305 inst_CLK_000_D5 3 -1 7 4 2 5 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 5 4 2 5 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
328 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 1 3 1 4 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 5 3 1 3 5 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 6 2 1 4 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 5 2 2 3 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
314 SM_AMIGA_0_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
307 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 2 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
315 inst_CLK_000_D4 3 -1 2 1 7 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 2 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A0 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
29 DTACK 1 -1 -1 1 0 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 326 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 325 3 0 31 -1 5 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 321 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
32 AS_000 5 324 3 0 32 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
301 inst_CLK_000_D0 3 -1 4 6 0 1 2 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 5 5 1 3 5 6 7 -1 -1 1 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21
|
|
306 inst_CLK_000_D5 3 -1 7 4 2 5 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D6 3 -1 5 4 2 5 6 7 -1 -1 1 0 21
|
|
307 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
328 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 1 3 1 4 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 5 3 1 3 5 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 4 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 6 2 1 4 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 5 2 2 3 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
315 inst_CLK_000_D4 3 -1 2 1 7 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 2 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A0 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
29 DTACK 1 -1 -1 1 0 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 326 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 325 3 0 31 -1 5 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 321 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
32 AS_000 5 324 3 0 32 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
301 inst_CLK_000_D0 3 -1 4 6 0 1 2 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 5 5 1 3 5 6 7 -1 -1 1 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21
|
|
306 inst_CLK_000_D4 3 -1 2 4 2 5 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D6 3 -1 7 4 2 5 6 7 -1 -1 1 0 21
|
|
307 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
328 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 1 3 1 4 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 5 3 1 3 5 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 4 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 6 2 1 4 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 5 2 2 3 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
315 inst_CLK_000_D5 3 -1 5 1 7 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 2 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A0 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
29 DTACK 1 -1 -1 1 0 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 326 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 325 3 0 31 -1 5 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 4 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 321 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
32 AS_000 5 322 3 0 32 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
301 inst_CLK_000_D0 3 -1 4 6 0 1 2 5 6 7 -1 -1 1 0 21
|
|
302 SM_AMIGA_1_ 3 -1 6 5 2 3 5 6 7 -1 -1 3 0 21
|
|
297 inst_CLK_000_D1 3 -1 5 5 1 3 5 6 7 -1 -1 1 0 21
|
|
307 inst_CLK_000_D5 3 -1 7 4 2 5 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D6 3 -1 5 4 2 5 6 7 -1 -1 1 0 21
|
|
308 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
328 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 1 3 1 4 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 5 3 1 3 5 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 4 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
322 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 6 2 1 4 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 5 2 2 3 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 4 0 21
|
|
324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
315 inst_CLK_000_D4 3 -1 2 1 7 -1 -1 1 0 21
|
|
305 inst_CLK_000_D3 3 -1 2 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 2 3 5 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A0 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
29 DTACK 1 -1 -1 1 0 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 325 3 0 30 -1 8 0 21
|
|
31 UDS_000 5 324 3 0 31 -1 5 0 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 4 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 322 7 0 80 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
32 AS_000 5 323 3 0 32 -1 2 0 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
301 inst_CLK_000_D0 3 -1 2 6 0 1 2 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 5 5 1 2 3 6 7 -1 -1 1 0 21
|
|
318 cpu_est_1_ 3 -1 6 4 0 2 3 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 4 0 2 3 6 65 -1 3 1 21
|
|
302 SM_AMIGA_1_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 5 4 2 3 5 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_7_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
303 SM_AMIGA_0_ 3 -1 2 3 2 3 6 -1 -1 4 0 21
|
|
319 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
329 RN_BGACK_030 3 82 7 3 3 4 7 82 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 3 2 3 6 32 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 2 3 0 2 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D5 3 -1 6 3 2 5 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D6 3 -1 5 3 2 5 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 3 3 5 6 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 5 6 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
312 CLK_CNT_P_0_ 3 -1 4 2 1 4 -1 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 1 2 1 4 -1 -1 2 0 21
|
|
306 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 4 2 1 4 -1 -1 1 0 21
|
|
305 inst_CLK_000_D3 3 -1 5 2 5 6 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 4 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 0 1 0 -1 -1 2 0 21
|
|
320 DSACK_0__0 3 -1 7 1 7 -1 -1 1 0 21
|
|
315 inst_CLK_000_D4 3 -1 5 1 6 -1 -1 1 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
|
|
13 nEXP_SPACE 1 -1 -1 4 3 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 5 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 2 3 10 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A0 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
29 DTACK 1 -1 -1 1 0 29 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
106 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 326 7 4 1 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 331 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 329 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 327 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 328 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 323 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 325 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21
|
|
68 A0 5 333 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 339 3 0 33 -1 9 0 21
|
|
65 E 5 337 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 324 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 335 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 336 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 338 3 0 34 -1 2 1 21
|
|
28 BG_000 5 334 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
335 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
302 inst_CLK_000_D0 3 -1 4 6 0 1 2 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 5 1 3 5 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_1_ 3 -1 2 4 2 3 5 7 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 5 4 0 2 3 5 -1 -1 2 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 5 4 0 3 6 7 -1 -1 1 0 21
|
|
314 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
319 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
337 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
336 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 0 3 0 2 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D5 3 -1 0 3 2 5 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 7 3 2 5 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 5 3 2 3 5 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 4 0 21
|
|
326 RN_AS_030 3 81 7 2 0 7 81 -1 3 0 21
|
|
320 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
317 SM_AMIGA_2_ 3 -1 1 2 1 2 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
338 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
327 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 4 2 0 4 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
306 inst_CLK_000_D3 3 -1 5 2 2 5 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 4 2 1 3 -1 -1 1 0 21
|
|
339 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
331 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
329 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
328 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
324 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
323 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
334 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
333 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
325 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
321 DSACK_0__0 3 -1 5 1 7 -1 -1 1 0 21
|
|
313 inst_CLK_000_D4 3 -1 5 1 0 -1 -1 1 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
106 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 326 7 4 2 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 330 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 329 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 327 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 328 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 322 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 325 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 324 6 1 3 69 -1 2 0 21
|
|
68 A0 5 331 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 339 3 0 33 -1 9 0 21
|
|
65 E 5 337 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 335 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 334 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 336 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 338 3 0 34 -1 2 1 21
|
|
28 BG_000 5 332 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
334 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
302 inst_CLK_000_D0 3 -1 4 6 0 1 2 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 5 5 1 2 3 6 7 -1 -1 1 0 21
|
|
326 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 0 4 0 3 5 7 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 1 4 1 2 3 5 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 4 0 1 3 5 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 1 4 0 3 6 7 -1 -1 1 0 21
|
|
314 SM_AMIGA_7_ 3 -1 5 3 1 3 5 -1 -1 5 0 21
|
|
319 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
337 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
320 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 3 0 21
|
|
336 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 4 3 1 4 6 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 2 3 1 2 4 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 2 3 0 2 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D5 3 -1 5 3 0 5 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 7 3 0 5 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 1 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 4 0 21
|
|
308 SM_AMIGA_3_ 3 -1 0 2 0 2 -1 -1 3 0 21
|
|
338 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
327 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 2 2 0 2 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 2 2 0 2 -1 -1 2 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 6 2 1 4 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 4 2 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_000_D3 3 -1 0 2 1 5 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21
|
|
339 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
330 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
329 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
328 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
335 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
322 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
317 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
332 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
331 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
325 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
324 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
321 DSACK_0__0 3 -1 5 1 7 -1 -1 1 0 21
|
|
313 inst_CLK_000_D4 3 -1 5 1 5 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 325 7 4 2 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 327 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21
|
|
68 A0 5 330 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 338 3 0 33 -1 9 0 21
|
|
65 E 5 336 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 333 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 334 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 335 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 337 3 0 34 -1 2 1 21
|
|
28 BG_000 5 332 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
334 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
302 inst_CLK_000_D0 3 -1 0 6 0 1 2 5 6 7 -1 -1 1 0 21
|
|
325 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 2 4 2 3 5 7 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 5 4 1 2 3 5 -1 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 5 4 0 3 6 7 -1 -1 1 0 21
|
|
313 SM_AMIGA_7_ 3 -1 1 3 1 3 5 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 2 3 1 2 3 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
335 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 3 1 2 3 32 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 2 3 0 2 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D4 3 -1 5 3 2 5 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D5 3 -1 5 3 2 5 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 6 3 1 3 5 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 1 5 -1 -1 7 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 4 2 1 6 -1 -1 4 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 SM_AMIGA_2_ 3 -1 0 2 0 2 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 0 2 0 2 -1 -1 3 0 21
|
|
337 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
314 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 4 2 4 5 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 2 2 0 2 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 2 2 0 2 -1 -1 2 0 21
|
|
306 inst_CLK_000_D3 3 -1 5 2 1 5 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
332 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
330 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 4 1 4 -1 -1 2 0 21
|
|
320 DSACK_0__0 3 -1 7 1 7 -1 -1 1 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
106 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 325 7 5 2 3 4 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 331 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 329 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 327 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 322 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 339 6 1 3 69 -1 2 0 21
|
|
68 A0 5 332 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 338 3 0 33 -1 9 0 21
|
|
65 E 5 336 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 334 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 335 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 337 3 0 34 -1 2 1 21
|
|
28 BG_000 5 333 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
334 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
302 inst_CLK_000_D0 3 -1 1 6 0 1 2 5 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_1_ 3 -1 6 5 0 3 5 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 5 1 2 3 6 7 -1 -1 1 0 21
|
|
325 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 5 4 0 3 6 7 -1 -1 1 0 21
|
|
314 SM_AMIGA_7_ 3 -1 0 3 0 3 5 -1 -1 5 0 21
|
|
319 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
320 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 3 0 21
|
|
335 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 0 3 0 2 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 5 3 0 3 5 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 5 3 0 3 5 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 3 0 3 5 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 0 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
317 SM_AMIGA_2_ 3 -1 2 2 2 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_0_ 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
337 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
326 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 4 2 1 4 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 4 2 1 4 -1 -1 1 0 21
|
|
307 inst_CLK_000_D5 3 -1 5 2 5 7 -1 -1 1 0 21
|
|
306 inst_CLK_000_D3 3 -1 0 2 0 5 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 5 2 5 7 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
331 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
329 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
322 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
339 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
333 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
332 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
321 DSACK_0__0 3 -1 4 1 7 -1 -1 1 0 21
|
|
313 inst_CLK_000_D4 3 -1 5 1 5 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
103 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 324 7 5 2 3 4 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 328 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 327 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 325 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 326 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 319 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 336 6 1 3 69 -1 2 0 21
|
|
68 A0 5 329 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 335 3 0 33 -1 9 0 21
|
|
65 E 5 333 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 323 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 322 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 331 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 334 3 0 34 -1 2 1 21
|
|
28 BG_000 5 330 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
331 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 5 5 1 3 4 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 0 5 1 2 5 6 7 -1 -1 1 0 21
|
|
311 SM_AMIGA_7_ 3 -1 1 4 1 2 3 5 -1 -1 5 0 21
|
|
324 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 2 4 1 2 3 5 -1 -1 2 0 21
|
|
302 SM_AMIGA_1_ 3 -1 5 4 1 3 5 7 -1 -1 2 0 21
|
|
300 inst_CLK_000_D2 3 -1 4 4 1 2 3 4 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 3 1 2 5 -1 -1 7 0 21
|
|
316 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
333 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
332 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 5 3 2 3 5 -1 -1 2 0 21
|
|
313 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21
|
|
317 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 3 0 21
|
|
303 SM_AMIGA_0_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
334 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
325 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
309 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
305 inst_CLK_000_D3 3 -1 4 2 1 2 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 5 2 2 3 -1 -1 1 0 21
|
|
335 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
326 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
323 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
306 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
336 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
330 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
329 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
307 CLK_CNT_N_0_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
318 DSACK_0__0 3 -1 4 1 7 -1 -1 1 0 21
|
|
310 CLK_CNT_P_1_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
308 CLK_CNT_N_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 324 7 4 1 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 330 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 329 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 325 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 327 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 338 6 1 3 69 -1 2 0 21
|
|
68 A0 5 331 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 337 3 0 33 -1 9 0 21
|
|
65 E 5 335 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 322 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 333 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 334 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 336 3 0 34 -1 2 1 21
|
|
28 BG_000 5 332 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 inst_CLK_000_D0 3 -1 4 6 0 1 2 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
333 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
324 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
318 cpu_est_0_ 3 -1 0 4 0 1 3 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 5 4 0 2 3 5 -1 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 4 0 3 6 7 -1 -1 1 0 21
|
|
314 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
319 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
335 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
320 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 1 21
|
|
334 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 0 3 0 2 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D5 3 -1 6 3 0 5 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 5 3 2 3 5 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21
|
|
317 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
304 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
336 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
325 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 4 2 0 4 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 0 2 0 5 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
306 inst_CLK_000_D3 3 -1 5 2 2 5 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 0 2 5 7 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 6 2 1 3 -1 -1 1 0 21
|
|
337 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
330 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
329 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
338 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
332 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
331 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 inst_CLK_000_D4 3 -1 5 1 6 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 325 7 4 2 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 327 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21
|
|
68 A0 5 330 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 338 3 0 33 -1 9 0 21
|
|
65 E 5 336 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 334 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 335 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 337 3 0 34 -1 2 1 21
|
|
28 BG_000 5 333 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 inst_CLK_000_D0 3 -1 5 6 0 1 2 5 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_1_ 3 -1 0 5 0 2 3 5 7 -1 -1 3 0 21
|
|
334 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 5 1 3 4 6 7 -1 -1 1 0 21
|
|
325 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
307 inst_CLK_000_D5 3 -1 4 4 0 2 5 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 5 4 0 2 5 7 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 0 4 0 3 6 7 -1 -1 1 0 21
|
|
314 SM_AMIGA_7_ 3 -1 1 3 1 3 5 -1 -1 5 0 21
|
|
319 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 2 3 1 2 3 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
335 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 3 1 2 3 32 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 5 3 2 3 5 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 4 3 0 4 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 1 3 1 3 5 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 4 3 0 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 1 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21
|
|
320 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
317 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 3 0 21
|
|
337 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
311 CLK_CNT_P_0_ 3 -1 5 2 0 5 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 5 2 0 5 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 6 2 0 4 -1 -1 1 0 21
|
|
306 inst_CLK_000_D3 3 -1 0 2 0 1 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
333 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
330 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
313 inst_CLK_000_D4 3 -1 0 1 4 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21
|
|
81 AS_030 5 325 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 327 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21
|
|
69 SIZE_0_ 5 323 6 1 3 69 -1 2 0 21
|
|
68 A0 5 330 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 9 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 324 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21
|
|
325 RN_AS_030 3 81 7 3 0 6 7 81 -1 3 0 21
|
|
319 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
320 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
314 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
337 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
335 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
330 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
323 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
|
|
317 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
313 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
306 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21
|
|
81 AS_030 5 325 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 327 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21
|
|
69 SIZE_0_ 5 323 6 1 3 69 -1 2 0 21
|
|
68 A0 5 330 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 9 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 324 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21
|
|
325 RN_AS_030 3 81 7 3 0 6 7 81 -1 3 0 21
|
|
319 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
320 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
314 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
337 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
335 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
330 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
323 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
|
|
317 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
313 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
306 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 325 7 4 2 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 327 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 323 6 1 3 69 -1 2 0 21
|
|
68 A0 5 330 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 338 3 0 33 -1 9 0 21
|
|
65 E 5 336 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 322 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 332 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 335 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 337 3 0 34 -1 2 1 21
|
|
28 BG_000 5 331 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 inst_CLK_000_D0 3 -1 5 6 0 1 2 5 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_1_ 3 -1 0 5 0 2 3 5 7 -1 -1 3 0 21
|
|
332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 5 1 3 4 6 7 -1 -1 1 0 21
|
|
325 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
307 inst_CLK_000_D5 3 -1 4 4 0 2 5 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 5 4 0 2 5 7 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 0 4 0 3 6 7 -1 -1 1 0 21
|
|
314 SM_AMIGA_7_ 3 -1 1 3 1 3 5 -1 -1 5 0 21
|
|
319 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 2 3 1 2 3 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
335 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 3 1 2 3 32 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 5 3 2 3 5 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 4 3 0 4 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 1 3 1 3 5 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 4 3 0 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 1 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21
|
|
320 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
317 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 3 0 21
|
|
337 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
311 CLK_CNT_P_0_ 3 -1 5 2 0 5 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 5 2 0 5 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 6 2 0 4 -1 -1 1 0 21
|
|
306 inst_CLK_000_D3 3 -1 0 2 0 1 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
330 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
323 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
313 inst_CLK_000_D4 3 -1 0 1 4 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 325 7 4 2 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 327 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 323 6 1 3 69 -1 2 0 21
|
|
68 A0 5 330 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 338 3 0 33 -1 9 0 21
|
|
65 E 5 336 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 322 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 332 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 335 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 337 3 0 34 -1 2 1 21
|
|
28 BG_000 5 331 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 inst_CLK_000_D0 3 -1 5 6 0 1 2 5 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_1_ 3 -1 0 5 0 2 3 5 7 -1 -1 3 0 21
|
|
332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 5 1 3 4 6 7 -1 -1 1 0 21
|
|
325 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
307 inst_CLK_000_D5 3 -1 4 4 0 2 5 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 5 4 0 2 5 7 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 0 4 0 3 6 7 -1 -1 1 0 21
|
|
314 SM_AMIGA_7_ 3 -1 1 3 1 3 5 -1 -1 5 0 21
|
|
319 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 2 3 1 2 3 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
335 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 3 1 2 3 32 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 5 3 2 3 5 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 4 3 0 4 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 1 3 1 3 5 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 4 3 0 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 1 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21
|
|
320 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
317 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 3 0 21
|
|
337 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
311 CLK_CNT_P_0_ 3 -1 5 2 0 5 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 5 2 0 5 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 6 2 0 4 -1 -1 1 0 21
|
|
306 inst_CLK_000_D3 3 -1 0 2 0 1 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
330 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
323 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
313 inst_CLK_000_D4 3 -1 0 1 4 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21
|
|
81 AS_030 5 325 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 327 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21
|
|
69 SIZE_0_ 5 324 6 1 3 69 -1 2 0 21
|
|
68 A0 5 330 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 9 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 323 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21
|
|
325 RN_AS_030 3 81 7 3 0 6 7 81 -1 3 0 21
|
|
319 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
320 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
314 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
337 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
335 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
330 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
324 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
|
|
317 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
313 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
306 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21
|
|
81 AS_030 5 325 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 327 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21
|
|
69 SIZE_0_ 5 324 6 1 3 69 -1 2 0 21
|
|
68 A0 5 330 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 9 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 323 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21
|
|
325 RN_AS_030 3 81 7 3 0 6 7 81 -1 3 0 21
|
|
319 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
320 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
314 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
337 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
335 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
330 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
324 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
|
|
317 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
313 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
306 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21
|
|
81 AS_030 5 325 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 327 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21
|
|
69 SIZE_0_ 5 324 6 1 3 69 -1 2 0 21
|
|
68 A0 5 330 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 9 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 323 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21
|
|
325 RN_AS_030 3 81 7 3 0 6 7 81 -1 3 0 21
|
|
319 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
320 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
314 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
337 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
335 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
330 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
324 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
|
|
317 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
313 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
306 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21
|
|
81 AS_030 5 325 7 2 3 7 81 -1 3 0 21
|
|
97 DS_030 5 327 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21
|
|
69 SIZE_0_ 5 324 6 1 3 69 -1 2 0 21
|
|
68 A0 5 330 6 1 3 68 -1 2 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 9 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 323 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
332 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0a 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 4 0 3 6 7 -1 -1 1 0 21
|
|
325 RN_AS_030 3 81 7 3 0 6 7 81 -1 3 0 21
|
|
319 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 -1 2 1 6 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
320 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
314 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
337 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
335 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
331 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
330 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
324 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D5 3 -1 -1 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D6 3 -1 -1 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21
|
|
317 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 3 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 -1 0 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 -1 0 -1 -1 2 0 21
|
|
313 inst_CLK_000_D4 3 -1 -1 0 -1 -1 1 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
306 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 325 7 4 2 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 329 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 328 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 326 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 327 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 324 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21
|
|
68 A0 5 330 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 338 3 0 33 -1 9 0 21
|
|
65 E 5 336 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 323 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 334 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 335 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 337 3 0 34 -1 2 1 21
|
|
28 BG_000 5 333 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 inst_CLK_000_D0 3 -1 5 6 0 1 2 5 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_1_ 3 -1 0 5 0 2 3 5 7 -1 -1 3 0 21
|
|
334 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 5 1 3 4 6 7 -1 -1 1 0 21
|
|
325 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
307 inst_CLK_000_D5 3 -1 4 4 0 2 5 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 5 4 0 2 5 7 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 0 4 0 3 6 7 -1 -1 1 0 21
|
|
314 SM_AMIGA_7_ 3 -1 1 3 1 3 5 -1 -1 5 0 21
|
|
319 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 2 3 1 2 3 -1 -1 4 0 21
|
|
336 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
335 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
326 RN_AS_000 3 32 3 3 1 2 3 32 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 5 3 2 3 5 -1 -1 2 0 21
|
|
309 CLK_CNT_N_0_ 3 -1 4 3 0 4 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 1 3 1 3 5 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 4 3 0 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 1 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21
|
|
320 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
317 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 3 0 21
|
|
337 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
311 CLK_CNT_P_0_ 3 -1 5 2 0 5 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
312 CLK_CNT_P_1_ 3 -1 5 2 0 5 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 6 2 0 4 -1 -1 1 0 21
|
|
306 inst_CLK_000_D3 3 -1 0 2 0 1 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21
|
|
338 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
329 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
328 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
327 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
323 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
308 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
333 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
330 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
324 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
313 inst_CLK_000_D4 3 -1 0 1 4 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 325 7 4 1 2 3 7 81 -1 3 0 21
|
|
30 LDS_000 5 330 3 3 0 6 7 30 -1 8 0 21
|
|
31 UDS_000 5 329 3 3 0 6 7 31 -1 5 0 21
|
|
32 AS_000 5 327 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 328 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 338 6 1 3 69 -1 2 0 21
|
|
68 A0 5 331 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 337 3 0 33 -1 9 0 21
|
|
65 E 5 335 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 322 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 333 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 334 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 336 3 0 34 -1 2 0 21
|
|
28 BG_000 5 332 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
333 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 7 5 1 4 5 6 7 -1 -1 1 0 21
|
|
325 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 2 4 2 3 5 7 -1 -1 3 0 21
|
|
306 SM_AMIGA_6_ 3 -1 5 4 0 2 3 5 -1 -1 2 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 0 4 0 3 6 7 -1 -1 1 0 21
|
|
302 SM_AMIGA_7_ 3 -1 5 3 2 3 5 -1 -1 5 0 21
|
|
319 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
318 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
334 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 0 3 0 3 5 -1 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 6 3 0 4 6 -1 -1 2 0 21
|
|
308 inst_CLK_000_D5 3 -1 5 3 2 5 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D6 3 -1 2 3 2 5 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 0 2 1 6 -1 -1 4 0 21
|
|
305 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 4 0 21
|
|
335 RN_E 3 65 6 2 1 6 65 -1 3 1 21
|
|
317 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 5 2 1 5 -1 -1 3 0 21
|
|
336 RN_VMA 3 34 3 2 1 3 34 -1 2 0 21
|
|
327 RN_AS_000 3 32 3 2 3 5 32 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
303 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
296 inst_VPA_SYNC 3 -1 1 2 1 5 -1 -1 2 0 21
|
|
295 inst_DTACK_SYNC 3 -1 1 2 1 5 -1 -1 2 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 4 2 0 6 -1 -1 1 0 21
|
|
307 inst_CLK_000_D3 3 -1 2 2 4 5 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 4 2 2 5 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 2 2 1 3 -1 -1 1 0 21
|
|
337 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 9 0 21
|
|
330 RN_LDS_000 3 30 3 1 3 30 -1 8 0 21
|
|
329 RN_UDS_000 3 31 3 1 3 31 -1 5 0 21
|
|
328 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
320 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
338 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
332 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
331 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 inst_CLK_000_D4 3 -1 4 1 5 -1 -1 1 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 2 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 324 7 4 2 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 328 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 327 3 3 0 6 7 31 -1 6 0 21
|
|
32 AS_000 5 325 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 326 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 332 6 1 3 69 -1 2 0 21
|
|
68 A0 5 329 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 337 3 0 33 -1 6 0 21
|
|
34 VMA 5 335 3 0 34 -1 4 0 21
|
|
65 E 5 334 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 322 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 338 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 336 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 331 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 333 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 330 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
331 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
304 SM_AMIGA_1_ 3 -1 2 5 1 2 3 5 7 -1 -1 4 0 21
|
|
324 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
308 inst_CLK_000_D5 3 -1 4 4 1 2 5 7 -1 -1 1 0 21
|
|
301 inst_BGACK_030_INT_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 5 4 1 2 5 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 5 4 1 5 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_7_ 3 -1 0 3 0 3 5 -1 -1 6 0 21
|
|
319 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
306 SM_AMIGA_6_ 3 -1 0 3 0 3 5 -1 -1 3 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 3 1 21
|
|
302 SM_AMIGA_5_ 3 -1 0 3 0 2 3 -1 -1 3 0 21
|
|
333 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 4 3 1 4 5 -1 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 0 3 0 1 4 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 0 5 -1 -1 7 0 21
|
|
335 RN_VMA 3 34 3 2 2 3 34 -1 4 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
334 RN_E 3 65 6 2 2 6 65 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_4_ 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 5 2 1 4 -1 -1 1 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 4 2 0 1 -1 -1 1 0 21
|
|
307 inst_CLK_000_D3 3 -1 0 2 0 5 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
337 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
326 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
317 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
309 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
338 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
336 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
320 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
332 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
330 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
329 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 2 1 2 -1 -1 2 0 21
|
|
314 inst_CLK_000_D4 3 -1 5 1 4 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 5 1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 321 7 4 1 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 6 0 21
|
|
32 AS_000 5 323 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 318 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21
|
|
68 A0 5 327 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 335 3 0 33 -1 6 0 21
|
|
34 VMA 5 334 3 0 34 -1 4 0 21
|
|
65 E 5 333 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 0 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 4 5 0 1 4 6 7 -1 -1 1 0 21
|
|
316 cpu_est_1_ 3 -1 0 4 0 1 3 6 -1 -1 4 0 21
|
|
306 SM_AMIGA_1_ 3 -1 5 4 2 3 5 7 -1 -1 4 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
308 SM_AMIGA_6_ 3 -1 2 4 2 3 5 6 -1 -1 3 0 21
|
|
302 inst_BGACK_030_INT_D 3 -1 5 4 0 3 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 6 0 21
|
|
333 RN_E 3 65 6 3 0 1 6 65 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_4_ 3 -1 0 3 0 2 3 -1 -1 3 0 21
|
|
304 SM_AMIGA_5_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 5 3 1 5 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D5 3 -1 6 3 2 5 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 5 3 2 5 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
334 RN_VMA 3 34 3 2 1 3 34 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 2 2 1 2 -1 -1 4 0 21
|
|
317 cpu_est_2_ 3 -1 0 2 0 6 -1 -1 3 1 21
|
|
307 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 3 1 21
|
|
323 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 6 2 2 4 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 4 2 2 6 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 4 2 1 3 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
335 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
327 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 4 1 6 -1 -1 1 0 21
|
|
303 CLK_CNT_P_0_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 321 7 4 1 3 5 7 81 -1 3 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 6 0 21
|
|
32 AS_000 5 322 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 317 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 320 6 1 3 69 -1 2 0 21
|
|
68 A0 5 326 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 6 0 21
|
|
34 VMA 5 333 3 0 34 -1 4 0 21
|
|
65 E 5 332 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 4 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_1_ 3 -1 2 4 2 3 5 7 -1 -1 4 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
308 SM_AMIGA_6_ 3 -1 2 4 0 2 3 5 -1 -1 3 0 21
|
|
302 inst_BGACK_030_INT_D 3 -1 5 4 0 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 2 4 1 4 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 6 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 4 3 3 4 6 -1 -1 3 0 21
|
|
331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 inst_CLK_000_D4 3 -1 0 3 2 5 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D5 3 -1 5 3 2 5 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
|
|
333 RN_VMA 3 34 3 2 1 3 34 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 0 2 0 2 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 0 2 0 1 -1 -1 4 0 21
|
|
332 RN_E 3 65 6 2 1 6 65 -1 3 1 21
|
|
312 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
307 SM_AMIGA_0_ 3 -1 2 2 2 3 -1 -1 3 1 21
|
|
304 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
322 RN_AS_000 3 32 3 2 2 3 32 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 5 2 0 2 -1 -1 1 0 21
|
|
303 CLK_CNT_P_0_ 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 4 2 2 5 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 5 2 1 3 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
316 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
326 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
320 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 5 6 7 63 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 321 7 3 1 3 7 81 -1 3 0 21
|
|
32 AS_000 5 322 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 317 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 320 6 1 3 69 -1 2 0 21
|
|
68 A0 5 326 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 6 0 21
|
|
34 VMA 5 333 3 0 34 -1 4 0 21
|
|
65 E 5 332 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_7_ 3 -1 0 4 0 3 6 7 -1 -1 6 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
308 SM_AMIGA_6_ 3 -1 6 4 0 3 6 7 -1 -1 3 0 21
|
|
302 inst_BGACK_030_INT_D 3 -1 3 4 0 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 0 6 7 -1 -1 7 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
306 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 4 0 21
|
|
307 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 3 1 21
|
|
331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 6 3 0 6 7 -1 -1 1 0 21
|
|
333 RN_VMA 3 34 3 2 1 3 34 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
332 RN_E 3 65 6 2 1 6 65 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D4 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
303 CLK_CNT_P_0_ 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D5 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 3 2 0 6 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 0 2 1 3 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
316 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
304 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
326 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
320 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 321 7 3 1 3 7 81 -1 3 0 21
|
|
32 AS_000 5 322 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 317 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 320 6 1 3 69 -1 2 0 21
|
|
68 A0 5 326 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 6 0 21
|
|
34 VMA 5 333 3 0 34 -1 4 0 21
|
|
65 E 5 332 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_7_ 3 -1 0 4 0 3 6 7 -1 -1 6 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
308 SM_AMIGA_6_ 3 -1 6 4 0 3 6 7 -1 -1 3 0 21
|
|
302 inst_BGACK_030_INT_D 3 -1 3 4 0 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 0 6 7 -1 -1 7 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
306 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 4 0 21
|
|
307 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 3 1 21
|
|
331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 6 3 0 6 7 -1 -1 1 0 21
|
|
333 RN_VMA 3 34 3 2 1 3 34 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
332 RN_E 3 65 6 2 1 6 65 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D4 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
303 CLK_CNT_P_0_ 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D5 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 3 2 0 6 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 0 2 1 3 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
316 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
304 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
326 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
320 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 320 7 4 0 1 3 7 81 -1 3 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21
|
|
32 AS_000 5 321 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 317 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 325 6 1 3 69 -1 2 0 21
|
|
68 A0 5 326 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 6 0 21
|
|
34 VMA 5 333 3 0 34 -1 4 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
302 inst_BGACK_030_INT_D 3 -1 3 4 0 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 0 1 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 6 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
309 SM_AMIGA_6_ 3 -1 6 3 3 6 7 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
296 inst_VPA_D 3 -1 1 3 0 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 7 0 21
|
|
333 RN_VMA 3 34 3 2 0 3 34 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 0 6 65 -1 3 1 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
308 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
310 inst_CLK_000_D4 3 -1 3 2 6 7 -1 -1 1 0 21
|
|
305 inst_CLK_000_D3 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
303 CLK_CNT_P_0_ 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D5 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
316 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
304 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
326 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
325 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 320 7 3 1 3 7 81 -1 3 0 21
|
|
32 AS_000 5 321 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 317 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 326 6 1 3 69 -1 2 0 21
|
|
68 A0 5 325 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 6 0 21
|
|
34 VMA 5 332 3 0 34 -1 4 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 333 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 0 4 0 3 6 7 -1 -1 6 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
314 cpu_est_0_ 3 -1 7 4 1 3 6 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_6_ 3 -1 6 4 0 3 6 7 -1 -1 3 0 21
|
|
302 inst_BGACK_030_INT_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 0 6 7 -1 -1 7 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 inst_CLK_000_D4 3 -1 6 3 0 3 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
332 RN_VMA 3 34 3 2 1 3 34 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 2 1 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 1 2 1 6 -1 -1 3 1 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_0_ 3 -1 0 2 0 3 -1 -1 3 1 21
|
|
321 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
303 CLK_CNT_P_0_ 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D5 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 6 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
304 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
326 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
325 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 320 7 3 1 3 7 81 -1 3 0 21
|
|
32 AS_000 5 321 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 317 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21
|
|
68 A0 5 326 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 7 0 21
|
|
34 VMA 5 333 3 0 34 -1 4 0 21
|
|
65 E 5 332 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_1_ 3 -1 1 4 1 3 6 7 -1 -1 4 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
310 inst_CLK_000_D4 3 -1 7 4 1 3 6 7 -1 -1 1 0 21
|
|
302 inst_BGACK_030_INT_D 3 -1 3 4 0 3 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D5 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 6 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
312 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_0_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 7 0 21
|
|
333 RN_VMA 3 34 3 2 1 3 34 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 4 0 21
|
|
332 RN_E 3 65 6 2 1 6 65 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 7 2 1 3 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
316 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
326 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
303 CLK_CNT_P_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 320 7 3 1 3 7 81 -1 3 0 21
|
|
32 AS_000 5 321 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 317 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21
|
|
68 A0 5 326 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 7 0 21
|
|
34 VMA 5 333 3 0 34 -1 4 0 21
|
|
65 E 5 332 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 0 4 0 3 6 7 -1 -1 6 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
314 cpu_est_0_ 3 -1 7 4 1 3 6 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_6_ 3 -1 6 4 0 3 6 7 -1 -1 3 0 21
|
|
302 inst_BGACK_030_INT_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 0 6 7 -1 -1 7 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 inst_CLK_000_D4 3 -1 6 3 0 3 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
333 RN_VMA 3 34 3 2 1 3 34 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
332 RN_E 3 65 6 2 1 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 1 2 1 6 -1 -1 3 1 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_0_ 3 -1 0 2 0 3 -1 -1 3 1 21
|
|
321 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
303 CLK_CNT_P_0_ 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D5 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 6 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
304 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
326 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
104 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 3 1 3 7 81 -1 3 0 21
|
|
32 AS_000 5 324 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 320 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 331 6 1 3 69 -1 2 0 21
|
|
68 A0 5 328 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 336 3 0 33 -1 7 0 21
|
|
34 VMA 5 334 3 0 34 -1 4 0 21
|
|
65 E 5 333 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 337 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 335 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 329 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
330 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
304 SM_AMIGA_7_ 3 -1 0 4 0 3 6 7 -1 -1 6 0 21
|
|
305 SM_AMIGA_1_ 3 -1 6 4 0 3 6 7 -1 -1 4 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
317 cpu_est_0_ 3 -1 7 4 1 3 6 7 -1 -1 3 0 21
|
|
307 SM_AMIGA_6_ 3 -1 6 4 0 3 6 7 -1 -1 3 0 21
|
|
303 inst_CLK_000_D4 3 -1 6 4 0 3 6 7 -1 -1 1 0 21
|
|
301 inst_BGACK_030_INT_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 0 6 7 -1 -1 7 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
332 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
300 inst_CLK_000_D5 3 -1 7 3 0 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
334 RN_VMA 3 34 3 2 1 3 34 -1 4 0 21
|
|
316 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
315 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
333 RN_E 3 65 6 2 1 6 65 -1 3 1 21
|
|
319 cpu_est_2_ 3 -1 1 2 1 6 -1 -1 3 1 21
|
|
314 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
306 SM_AMIGA_0_ 3 -1 0 2 0 3 -1 -1 3 1 21
|
|
324 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 7 2 6 7 -1 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
308 inst_CLK_000_D3 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 6 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
336 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
337 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
335 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
302 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
331 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
328 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
105 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 328 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 327 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 324 7 3 1 3 7 81 -1 3 0 21
|
|
32 AS_000 5 325 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 326 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 321 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 332 6 1 3 69 -1 2 0 21
|
|
68 A0 5 329 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 337 3 0 33 -1 7 0 21
|
|
34 VMA 5 335 3 0 34 -1 4 0 21
|
|
65 E 5 334 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 322 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 338 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 336 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 331 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 333 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 330 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
331 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
324 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
301 inst_BGACK_030_INT_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
304 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 6 0 21
|
|
319 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
305 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
307 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 3 0 21
|
|
306 SM_AMIGA_0_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
333 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 7 0 21
|
|
335 RN_VMA 3 34 3 2 1 3 34 -1 4 0 21
|
|
317 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 4 0 21
|
|
316 inst_CLK_OUT_PRE 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
310 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 4 0 21
|
|
334 RN_E 3 65 6 2 1 6 65 -1 3 1 21
|
|
318 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
313 CLK_CNT_P_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
311 CLK_CNT_N_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
309 inst_CLK_000_D5 3 -1 3 2 6 7 -1 -1 1 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
337 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
326 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
338 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
336 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
320 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
302 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
332 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
330 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
329 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 CLK_CNT_P_1_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
312 CLK_CNT_N_1_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
303 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 320 7 3 1 3 7 81 -1 3 0 21
|
|
32 AS_000 5 321 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 317 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 322 6 1 3 69 -1 2 0 21
|
|
68 A0 5 326 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 7 0 21
|
|
34 VMA 5 333 3 0 34 -1 4 0 21
|
|
65 E 5 332 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 0 4 0 3 6 7 -1 -1 6 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
314 cpu_est_0_ 3 -1 7 4 1 3 6 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_6_ 3 -1 6 4 0 3 6 7 -1 -1 3 0 21
|
|
302 inst_BGACK_030_INT_D 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 0 6 7 -1 -1 7 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 4 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 inst_CLK_000_D4 3 -1 6 3 0 3 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
333 RN_VMA 3 34 3 2 1 3 34 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
332 RN_E 3 65 6 2 1 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 1 2 1 6 -1 -1 3 1 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_0_ 3 -1 0 2 0 3 -1 -1 3 1 21
|
|
321 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
303 CLK_CNT_P_0_ 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D5 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 6 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
304 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
326 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
322 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 320 7 4 0 1 3 7 81 -1 3 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21
|
|
32 AS_000 5 321 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 317 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 328 6 1 3 69 -1 2 0 21
|
|
68 A0 5 325 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 7 0 21
|
|
34 VMA 5 331 3 0 34 -1 4 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
302 inst_BGACK_030_INT_D 3 -1 3 4 0 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 0 1 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 6 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
309 SM_AMIGA_6_ 3 -1 6 3 3 6 7 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
296 inst_VPA_D 3 -1 1 3 0 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 7 0 21
|
|
331 RN_VMA 3 34 3 2 0 3 34 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 2 0 6 65 -1 3 1 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
308 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
310 inst_CLK_000_D4 3 -1 3 2 6 7 -1 -1 1 0 21
|
|
305 inst_CLK_000_D3 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
303 CLK_CNT_P_0_ 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D5 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
316 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
304 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
328 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
325 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 320 7 4 0 1 3 7 81 -1 3 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
32 AS_000 5 321 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 317 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 323 6 1 3 69 -1 2 0 21
|
|
68 A0 5 326 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 7 0 21
|
|
34 VMA 5 333 3 0 34 -1 4 0 21
|
|
65 E 5 332 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
302 inst_BGACK_030_INT_D 3 -1 3 4 0 3 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 6 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
306 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_6_ 3 -1 6 3 3 6 7 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 3 0 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 7 0 21
|
|
333 RN_VMA 3 34 3 2 0 3 34 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 4 0 21
|
|
332 RN_E 3 65 6 2 0 6 65 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
307 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
310 inst_CLK_000_D4 3 -1 3 2 6 7 -1 -1 1 0 21
|
|
309 inst_CLK_000_D3 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
303 CLK_CNT_P_0_ 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D5 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
316 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
304 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
326 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
323 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 320 7 4 0 1 3 7 81 -1 3 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
32 AS_000 5 321 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 317 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 323 6 1 3 69 -1 2 0 21
|
|
68 A0 5 326 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 7 0 21
|
|
34 VMA 5 333 3 0 34 -1 4 0 21
|
|
65 E 5 332 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_7_ 3 -1 0 4 0 3 6 7 -1 -1 6 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
308 SM_AMIGA_6_ 3 -1 6 4 0 3 6 7 -1 -1 3 0 21
|
|
302 inst_BGACK_030_INT_D 3 -1 3 4 0 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 0 6 7 -1 -1 7 0 21
|
|
315 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 4 0 21
|
|
306 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 3 1 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 7 3 0 3 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 3 0 6 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
333 RN_VMA 3 34 3 2 1 3 34 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
332 RN_E 3 65 6 2 1 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 1 21
|
|
312 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
295 inst_VPA_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D4 3 -1 3 2 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D5 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
326 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
323 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
303 CLK_CNT_P_0_ 3 -1 7 1 7 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 322 7 4 0 1 3 7 81 -1 3 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 7 0 21
|
|
32 AS_000 5 323 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 318 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 320 6 1 3 69 -1 2 0 21
|
|
68 A0 5 327 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 335 3 0 33 -1 7 0 21
|
|
34 VMA 5 334 3 0 34 -1 4 0 21
|
|
65 E 5 333 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 332 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_7_ 3 -1 0 4 0 3 6 7 -1 -1 6 0 21
|
|
306 SM_AMIGA_1_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 21
|
|
322 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
308 SM_AMIGA_6_ 3 -1 6 4 0 3 6 7 -1 -1 3 0 21
|
|
302 inst_BGACK_030_INT_D 3 -1 3 4 0 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 0 6 7 -1 -1 7 0 21
|
|
316 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 3 1 21
|
|
332 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
310 inst_CLK_000_D5 3 -1 6 3 1 6 7 -1 -1 1 0 21
|
|
309 inst_CLK_000_D3 3 -1 6 3 0 3 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D6 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 3 0 1 3 -1 -1 1 0 21
|
|
334 RN_VMA 3 34 3 2 0 3 34 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 4 0 21
|
|
333 RN_E 3 65 6 2 0 6 65 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
303 CLK_CNT_P_0_ 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
335 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
317 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
304 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
327 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
320 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
312 inst_CLK_000_D4 3 -1 3 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
102 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 321 7 4 0 1 3 7 81 -1 3 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
32 AS_000 5 322 3 3 0 6 7 32 -1 2 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 5 0 21
|
|
78 SIZE_1_ 5 318 7 1 3 78 -1 3 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
69 SIZE_0_ 5 327 6 1 3 69 -1 2 0 21
|
|
68 A0 5 326 6 1 3 68 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 335 3 0 33 -1 7 0 21
|
|
34 VMA 5 334 3 0 34 -1 4 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 333 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21
|
|
304 inst_BGACK_030_INT_D 3 -1 1 4 0 3 6 7 -1 -1 1 0 21
|
|
307 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 6 0 21
|
|
316 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
308 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
310 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_0_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
306 inst_CLK_000_D4 3 -1 7 3 3 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 7 0 21
|
|
334 RN_VMA 3 34 3 2 1 3 34 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 1 6 65 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
294 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
311 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D5 3 -1 3 2 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
335 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 5 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21
|
|
317 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
305 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
327 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21
|
|
326 RN_A0 3 68 6 1 6 68 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 1 1 1 -1 -1 2 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 320 7 4 0 3 6 7 81 -1 4 0 21
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 6 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
304 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21
|
|
306 SM_AMIGA_0_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
315 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
305 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
309 inst_CLK_000_D4 3 -1 7 3 0 3 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 7 0 21
|
|
311 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
316 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 1 2 1 7 -1 -1 1 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
301 inst_CLK_000_D5 3 -1 3 2 0 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
330 RN_E 3 65 6 1 6 65 -1 3 1 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 21
|
|
300 inst_CLK_000_D2 3 -1 3 1 1 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 3 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 322 7 4 0 3 6 7 81 -1 4 0 21
|
|
32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 6 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 6 0 21
|
|
65 E 5 332 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 333 3 0 34 -1 2 0 21
|
|
28 BG_000 5 329 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
330 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
322 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
302 SM_AMIGA_1_ 3 -1 6 4 0 3 6 7 -1 -1 3 0 21
|
|
306 inst_CLK_000_D4 3 -1 1 4 0 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
301 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21
|
|
303 SM_AMIGA_0_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_000_D5 3 -1 3 3 0 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 7 0 21
|
|
308 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
315 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
317 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
333 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
314 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
312 CLK_CNT_P_0_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
310 CLK_CNT_N_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
313 CLK_CNT_P_1_ 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 3 2 1 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
332 RN_E 3 65 6 1 6 65 -1 3 1 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
307 inst_CLK_000_D3 3 -1 7 1 1 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 320 7 4 0 3 6 7 81 -1 4 0 21
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 6 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
304 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21
|
|
306 SM_AMIGA_0_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
315 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
305 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
309 inst_CLK_000_D4 3 -1 7 3 0 3 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 7 0 21
|
|
311 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
316 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 1 2 1 7 -1 -1 1 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
301 inst_CLK_000_D5 3 -1 3 2 0 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
330 RN_E 3 65 6 1 6 65 -1 3 1 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 21
|
|
300 inst_CLK_000_D2 3 -1 3 1 1 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 3 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 320 7 4 0 3 6 7 81 -1 4 0 21
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 6 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
304 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21
|
|
306 SM_AMIGA_0_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
315 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
305 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
309 inst_CLK_000_D4 3 -1 7 3 0 3 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 8 0 21
|
|
311 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
316 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 1 2 1 7 -1 -1 1 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
301 inst_CLK_000_D5 3 -1 3 2 0 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
330 RN_E 3 65 6 1 6 65 -1 3 1 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 21
|
|
300 inst_CLK_000_D2 3 -1 3 1 1 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 3 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 321 7 4 0 3 6 7 81 -1 4 0 21
|
|
32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 6 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 inst_CLK_000_D4 3 -1 1 4 0 3 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
304 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21
|
|
306 SM_AMIGA_0_ 3 -1 7 3 1 3 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 3 1 3 7 32 -1 2 0 21
|
|
307 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
301 inst_CLK_000_D5 3 -1 3 3 0 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 8 0 21
|
|
316 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
315 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 3 2 1 3 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
311 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
330 RN_E 3 65 6 1 6 65 -1 3 1 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 3 1 1 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 1 1 1 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 320 7 3 1 3 7 81 -1 4 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
305 SM_AMIGA_1_ 3 -1 0 4 0 3 6 7 -1 -1 3 0 21
|
|
309 inst_CLK_000_D4 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
316 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
306 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
|
|
301 inst_CLK_000_D5 3 -1 7 3 0 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
304 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
330 RN_E 3 65 6 2 1 6 65 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 1 3 34 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
295 inst_VPA_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
294 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 8 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
311 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 320 7 3 0 3 7 81 -1 4 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 6 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 0 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
303 SM_AMIGA_1_ 3 -1 7 4 0 1 3 7 -1 -1 3 0 21
|
|
307 inst_CLK_000_D4 3 -1 0 4 0 1 3 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
302 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
299 inst_CLK_000_D5 3 -1 3 3 0 1 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 8 0 21
|
|
309 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
314 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 1 2 1 3 -1 -1 4 0 21
|
|
313 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 1 2 0 1 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 1 6 65 -1 3 1 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
315 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
298 inst_CLK_000_D2 3 -1 3 1 1 -1 -1 1 0 21
|
|
295 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 321 7 3 0 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 0 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
304 SM_AMIGA_1_ 3 -1 7 4 0 1 3 7 -1 -1 3 0 21
|
|
308 inst_CLK_000_D4 3 -1 1 4 0 1 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21
|
|
314 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
299 inst_CLK_000_D5 3 -1 3 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 2 1 3 -1 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 3 2 1 3 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 1 6 65 -1 3 1 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 7 1 1 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
295 inst_CLK_OUT_PRE_50_D 3 -1 3 1 1 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 322 7 3 0 3 7 81 -1 4 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 0 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
304 SM_AMIGA_1_ 3 -1 6 5 0 1 3 6 7 -1 -1 3 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
322 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 inst_CLK_000_D5 3 -1 3 4 0 1 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D6 3 -1 0 4 0 1 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21
|
|
316 cpu_est_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
315 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 8 0 21
|
|
311 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 2 1 3 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 2 6 7 65 -1 3 1 21
|
|
317 cpu_est_2_ 3 -1 7 2 6 7 -1 -1 3 1 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D2 3 -1 3 2 1 6 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
308 inst_CLK_000_D4 3 -1 1 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 6 1 6 -1 -1 1 0 21
|
|
295 inst_CLK_OUT_PRE_50_D 3 -1 0 1 1 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 3 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 6 0 21
|
|
65 E 5 327 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 0 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
304 SM_AMIGA_1_ 3 -1 0 4 0 1 3 7 -1 -1 3 0 21
|
|
306 SM_AMIGA_6_ 3 -1 7 4 0 3 6 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D4 3 -1 7 4 0 1 3 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 4 0 21
|
|
313 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
314 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
328 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_E 3 65 6 1 6 65 -1 3 1 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
315 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 1 1 1 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 7 1 6 -1 -1 1 0 21
|
|
295 inst_CLK_OUT_PRE_50_D 3 -1 1 1 1 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 320 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 6 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
303 SM_AMIGA_1_ 3 -1 1 4 0 1 3 7 -1 -1 3 0 21
|
|
299 inst_CLK_000_D4 3 -1 7 4 0 1 3 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 4 0 1 6 7 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 1 3 1 3 7 -1 -1 5 0 21
|
|
314 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
307 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 1 7 -1 -1 8 0 21
|
|
308 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
295 inst_CLK_OUT_PRE_50_D 3 -1 7 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 6 3 0 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D4 3 -1 7 3 1 3 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
307 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 0 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 6 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
311 SM_AMIGA_7_ 3 -1 7 3 1 3 7 -1 -1 5 0 21
|
|
317 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 3 0 3 7 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 1 3 1 3 7 -1 -1 2 0 21
|
|
305 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D4 3 -1 7 3 0 3 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 1 7 -1 -1 8 0 21
|
|
313 inst_CLK_OUT_PRE_33 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
302 SM_AMIGA_0_ 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
315 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
309 CLK_CNT_P_0_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
307 CLK_CNT_N_0_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
308 CLK_CNT_N_1_ 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 1 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
306 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
310 CLK_CNT_P_1_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 6 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 0 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
306 SM_AMIGA_6_ 3 -1 7 4 1 3 6 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 5 0 21
|
|
317 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
305 SM_AMIGA_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 0 3 0 3 7 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 3 1 3 6 34 -1 2 1 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
307 inst_CLK_000_D3 3 -1 7 3 0 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 3 1 3 6 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 8 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
301 inst_DTACK_D0 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D4 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 inst_CLK_000_D5 3 -1 7 1 3 -1 -1 1 0 21
|
|
309 inst_AS_030_D0 3 -1 7 1 3 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 6 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 320 7 3 0 3 7 81 -1 4 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 6 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 332 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
304 SM_AMIGA_1_ 3 -1 7 4 0 1 3 7 -1 -1 3 0 21
|
|
300 inst_CLK_000_D4 3 -1 7 4 0 1 3 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
310 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21
|
|
315 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D3 3 -1 6 3 0 1 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 8 0 21
|
|
316 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
317 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
312 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
332 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
309 inst_AS_030_D0 3 -1 7 1 3 -1 -1 1 0 21
|
|
301 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 0 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 322 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 321 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
322 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 3 1 6 7 -1 -1 1 0 21
|
|
316 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
317 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
307 inst_CLK_000_D3 3 -1 -1 2 3 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D4 3 -1 -1 2 3 7 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
310 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
308 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
305 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
329 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
309 inst_AS_030_D0 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 8 0 21
|
|
313 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
311 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
301 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 322 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 321 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
322 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 3 1 6 7 -1 -1 1 0 21
|
|
316 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
317 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
300 inst_CLK_000_D4 3 -1 -1 2 3 7 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
311 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
309 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
305 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
329 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
310 inst_AS_030_D0 3 -1 -1 1 3 -1 -1 1 0 21
|
|
308 inst_CLK_000_D3 3 -1 -1 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 8 0 21
|
|
313 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
301 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 322 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
322 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 4 0 1 6 7 -1 -1 1 0 21
|
|
310 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 4 0 21
|
|
304 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
307 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
316 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
317 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
312 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D4 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 0 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
309 inst_CLK_000_D5 3 -1 7 1 3 -1 -1 1 0 21
|
|
301 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 6 3 0 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D4 3 -1 7 3 1 3 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
307 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 0 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 6 3 0 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D4 3 -1 7 3 1 3 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
307 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 0 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 322 7 3 0 3 7 81 -1 4 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
322 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
304 SM_AMIGA_1_ 3 -1 7 4 0 1 3 7 -1 -1 3 0 21
|
|
308 inst_CLK_000_D4 3 -1 0 4 0 1 3 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 4 0 1 6 7 -1 -1 1 0 21
|
|
311 SM_AMIGA_7_ 3 -1 6 3 0 3 6 -1 -1 5 0 21
|
|
316 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 0 3 0 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 6 3 0 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 6 3 0 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_000_D5 3 -1 3 3 0 1 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 2 0 6 -1 -1 8 0 21
|
|
310 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
317 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
309 inst_CLK_000_D3 3 -1 7 2 0 6 -1 -1 1 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 0 2 6 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 1 3 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
313 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 inst_DTACK_D0 3 -1 7 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 0 4 0 1 3 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 6 4 1 3 6 7 -1 -1 3 0 21
|
|
307 inst_CLK_000_D2 3 -1 7 4 0 1 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D3 3 -1 7 4 0 1 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 7 4 0 1 6 7 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 1 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
311 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
308 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
310 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 7 2 1 3 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
306 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 6 1 1 -1 -1 1 0 21
|
|
295 inst_CLK_OUT_PRE_50_D 3 -1 0 1 6 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 0 1 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_1_ 3 -1 0 3 0 3 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
322 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 1 2 0 1 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 1 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 8 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 21
|
|
307 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 0 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 1 4 1 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 0 1 6 7 -1 -1 1 0 21
|
|
311 SM_AMIGA_7_ 3 -1 1 3 1 3 7 -1 -1 5 0 21
|
|
314 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_2_ 3 -1 6 3 0 6 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 0 3 0 1 3 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 1 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
304 SM_AMIGA_0_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
322 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 1 2 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
307 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 7 1 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 6 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 4 0 1 6 7 -1 -1 1 0 21
|
|
311 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
314 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
308 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 1 2 0 6 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 1 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D4 3 -1 6 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 6 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 6 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
312 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
317 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
301 SM_AMIGA_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_1_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
307 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
314 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
313 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
308 CLK_CNT_N_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
306 inst_CLK_000_D3 3 -1 0 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 1 3 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
315 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 CLK_CNT_P_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
309 CLK_CNT_N_1_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
304 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 7 1 1 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 1 4 1 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 0 1 6 7 -1 -1 1 0 21
|
|
311 SM_AMIGA_7_ 3 -1 1 3 1 3 7 -1 -1 5 0 21
|
|
314 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_2_ 3 -1 6 3 0 6 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 0 3 0 1 3 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 1 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
304 SM_AMIGA_0_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
322 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 1 2 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
307 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 7 1 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 6 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 3 0 3 7 81 -1 4 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21
|
|
91 AVEC 5 329 0 0 91 -1 2 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
308 SM_AMIGA_2_ 3 -1 6 4 0 1 6 7 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 4 0 3 6 7 34 -1 2 1 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 0 1 6 7 -1 -1 1 0 21
|
|
311 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21
|
|
314 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_0_ 3 -1 6 3 1 3 6 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 0 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
329 RN_AVEC 3 91 0 1 0 91 -1 2 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
307 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 320 7 3 1 3 7 81 -1 4 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 326 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 325 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
331 RN_VMA 3 34 3 4 0 1 3 7 34 -1 2 1 21
|
|
312 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
316 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
310 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
317 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
308 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
311 inst_AVEC_INT 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 1 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
314 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D4 3 -1 6 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 320 7 3 0 3 7 81 -1 4 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 4 1 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
295 inst_VPA_D 3 -1 7 4 0 1 3 7 -1 -1 1 0 21
|
|
312 SM_AMIGA_7_ 3 -1 6 3 0 3 6 -1 -1 5 0 21
|
|
316 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_2_ 3 -1 1 3 0 1 7 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 3 0 1 3 34 -1 2 1 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 6 3 0 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 2 0 6 -1 -1 8 0 21
|
|
317 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
304 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 1 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 1 21
|
|
314 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
311 inst_AVEC_INT 3 -1 0 1 0 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 1 1 6 -1 -1 1 0 21
|
|
307 inst_CLK_000_D4 3 -1 6 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 1 4 1 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 0 1 6 7 -1 -1 1 0 21
|
|
311 SM_AMIGA_7_ 3 -1 1 3 1 3 7 -1 -1 5 0 21
|
|
314 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_2_ 3 -1 6 3 0 6 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 0 3 0 1 3 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 1 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
304 SM_AMIGA_0_ 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
322 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 1 2 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
307 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 7 1 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 6 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 3 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
303 SM_AMIGA_1_ 3 -1 0 4 0 3 6 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
315 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 3 1 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_2_ 3 -1 1 3 0 1 7 -1 -1 3 0 21
|
|
304 SM_AMIGA_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 9 0 21
|
|
310 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
313 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
307 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 0 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 4 0 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
304 SM_AMIGA_0_ 3 -1 0 3 0 3 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 9 0 21
|
|
309 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
322 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 1 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 2 1 3 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 1 1 0 -1 -1 1 0 21
|
|
307 inst_CLK_000_D4 3 -1 0 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 6 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 4 0 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
304 SM_AMIGA_0_ 3 -1 0 3 0 3 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 9 0 21
|
|
309 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
322 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 1 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 2 1 3 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 1 1 0 -1 -1 1 0 21
|
|
307 inst_CLK_000_D4 3 -1 0 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 6 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 4 0 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
80 DSACK_1_ 5 318 7 0 80 -1 3 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 3 1 6 7 -1 -1 1 0 21
|
|
315 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
303 SM_AMIGA_2_ 3 -1 -1 2 3 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
311 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
305 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
328 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
308 inst_CLK_000_D4 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 9 0 21
|
|
313 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
309 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 4 0 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 1 5 0 1 3 6 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_7_ 3 -1 0 4 0 1 3 7 -1 -1 5 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 0 1 7 -1 -1 9 0 21
|
|
315 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 3 1 3 6 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 1 3 0 1 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
308 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
322 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 2 0 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 1 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
313 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
306 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 0 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 1 5 0 1 3 6 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_7_ 3 -1 0 4 0 1 3 7 -1 -1 5 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 0 1 7 -1 -1 9 0 21
|
|
315 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 3 1 3 6 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 1 3 0 1 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
308 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
322 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_1_ 3 -1 7 2 0 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 1 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
313 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
306 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 0 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 3 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 1 5 0 1 3 6 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_7_ 3 -1 0 4 0 1 3 7 -1 -1 5 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 0 1 7 -1 -1 9 0 21
|
|
315 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 3 1 3 6 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 1 3 0 1 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
307 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
322 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_1_ 3 -1 7 2 0 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 1 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
313 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
306 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 4 0 3 4 7 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 320 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 5 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 331 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 0 1 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_7_ 3 -1 1 3 1 3 7 -1 -1 5 0 21
|
|
314 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_2_ 3 -1 6 3 0 6 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 0 3 0 1 6 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 1 3 0 1 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 1 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
329 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
321 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
312 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
331 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
313 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
306 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 5 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
301 SM_AMIGA_6_ 3 -1 7 4 0 3 6 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
316 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
304 SM_AMIGA_2_ 3 -1 6 3 1 6 7 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
312 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
305 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
306 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
309 CLK_CNT_P_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
307 CLK_CNT_N_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 CLK_CNT_P_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
308 CLK_CNT_N_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
303 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 1 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 5 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
300 SM_AMIGA_7_ 3 -1 0 4 0 1 3 7 -1 -1 5 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
301 SM_AMIGA_6_ 3 -1 1 4 0 1 3 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 0 1 7 -1 -1 8 0 21
|
|
316 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
304 SM_AMIGA_2_ 3 -1 6 3 1 6 7 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
305 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
312 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
315 SM_AMIGA_0_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
311 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
307 CLK_CNT_N_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
306 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
309 CLK_CNT_P_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 CLK_CNT_P_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
308 CLK_CNT_N_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
303 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 3 0 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 5 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
304 SM_AMIGA_2_ 3 -1 6 4 0 1 6 7 -1 -1 3 0 21
|
|
300 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21
|
|
316 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 0 3 0 3 6 -1 -1 2 0 21
|
|
301 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 7 3 1 3 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
312 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
315 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
314 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
306 CLK_CNT_N_0_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
307 CLK_CNT_N_1_ 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
305 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 CLK_CNT_P_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
309 CLK_CNT_P_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 3 0 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 5 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
303 SM_AMIGA_2_ 3 -1 6 4 0 1 6 7 -1 -1 3 0 21
|
|
300 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21
|
|
316 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 0 3 0 3 6 -1 -1 2 0 21
|
|
301 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 3 1 3 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
312 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
315 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
314 SM_AMIGA_1_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
306 CLK_CNT_N_0_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
307 CLK_CNT_N_1_ 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
305 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 CLK_CNT_P_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
309 CLK_CNT_P_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 333 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
300 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
317 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
302 SM_AMIGA_2_ 3 -1 1 3 0 1 7 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 3 1 3 6 34 -1 2 1 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
301 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 3 1 3 6 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 4 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
322 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 7 2 6 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
304 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
309 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 333 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
301 SM_AMIGA_6_ 3 -1 7 4 0 1 3 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D4 3 -1 7 4 1 3 6 7 -1 -1 1 0 21
|
|
300 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
302 SM_AMIGA_2_ 3 -1 6 3 1 6 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
297 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
322 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
308 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
304 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
305 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
306 CLK_CNT_N_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
309 CLK_CNT_P_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
307 CLK_CNT_N_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 7 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 333 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
301 SM_AMIGA_6_ 3 -1 7 4 0 1 3 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 7 4 0 1 6 7 -1 -1 1 0 21
|
|
300 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
302 SM_AMIGA_2_ 3 -1 6 3 1 6 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
304 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
309 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 5 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D1 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
303 inst_CLK_000_D4 3 -1 7 4 1 3 6 7 -1 -1 1 0 21
|
|
300 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
302 SM_AMIGA_2_ 3 -1 6 3 1 6 7 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
301 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
308 CLK_CNT_P_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
304 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
305 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
315 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
306 CLK_CNT_N_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
309 CLK_CNT_P_1_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
307 CLK_CNT_N_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 7 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 325 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 328 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 327 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 324 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 326 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 5 0 21
|
|
65 E 5 332 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 322 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 333 3 0 34 -1 2 1 21
|
|
28 BG_000 5 329 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
330 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D1 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
324 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
300 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
302 SM_AMIGA_2_ 3 -1 6 3 1 6 7 -1 -1 3 0 21
|
|
331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
301 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D5 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
318 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
312 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
332 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
319 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
333 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
325 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
315 SM_AMIGA_1_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
306 CLK_CNT_N_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
310 inst_CLK_000_D4 3 -1 7 2 3 7 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
326 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
305 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
314 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 CLK_CNT_P_0_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
309 CLK_CNT_P_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
307 CLK_CNT_N_1_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 325 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 328 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 327 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 324 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 326 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 5 0 21
|
|
65 E 5 332 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 322 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 333 3 0 34 -1 2 1 21
|
|
28 BG_000 5 329 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
330 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 0 5 0 1 3 6 7 -1 -1 1 0 21
|
|
324 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
301 SM_AMIGA_6_ 3 -1 7 4 1 3 6 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
332 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
302 SM_AMIGA_2_ 3 -1 0 3 0 1 7 -1 -1 3 0 21
|
|
331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
303 inst_CLK_000_D5 3 -1 6 3 0 1 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 3 3 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 8 0 21
|
|
305 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
312 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
319 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
316 SM_AMIGA_0_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
333 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
313 SM_AMIGA_5_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
308 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
306 CLK_CNT_N_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
304 inst_CLK_000_D3 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
326 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
314 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
322 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
315 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 inst_CLK_000_D4 3 -1 7 1 6 -1 -1 1 0 21
|
|
309 CLK_CNT_P_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
307 CLK_CNT_N_1_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 1 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 322 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 5 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D1 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
322 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
301 SM_AMIGA_6_ 3 -1 0 4 0 1 3 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
316 cpu_est_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 3 6 7 65 -1 3 1 21
|
|
317 cpu_est_2_ 3 -1 7 3 3 6 7 -1 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
323 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 3 0 3 6 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
310 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
311 SM_AMIGA_5_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
304 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 322 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 5 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
322 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
301 inst_CLK_000_D2 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 3 4 1 3 6 7 -1 -1 1 0 21
|
|
299 SM_AMIGA_7_ 3 -1 1 3 1 3 7 -1 -1 5 0 21
|
|
315 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_6_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 1 7 -1 -1 8 0 21
|
|
316 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
310 inst_CLK_OUT_PRE_33 3 -1 0 2 1 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
317 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
331 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
323 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 0 2 0 6 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
295 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
303 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
314 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 6 1 6 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 5 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
301 SM_AMIGA_6_ 3 -1 6 4 1 3 6 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 5 0 21
|
|
317 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
324 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
298 inst_CLK_000_D3 3 -1 6 3 0 1 6 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 8 0 21
|
|
304 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
315 SM_AMIGA_0_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
308 CLK_CNT_P_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
306 CLK_CNT_N_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
305 inst_CLK_000_D2 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
309 CLK_CNT_P_1_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
307 CLK_CNT_N_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
302 inst_CLK_000_D4 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 7 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 317 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 320 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 319 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 316 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 318 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 4 0 21
|
|
65 E 5 324 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 1 21
|
|
28 BG_000 5 321 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
322 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D1 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 21
|
|
301 SM_AMIGA_7_ 3 -1 0 4 0 3 6 7 -1 -1 5 0 21
|
|
316 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 6 4 0 3 6 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 0 6 7 -1 -1 8 0 21
|
|
312 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
311 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 6 3 0 1 6 -1 -1 1 0 21
|
|
305 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
313 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
309 SM_AMIGA_2_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
325 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
317 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 3 2 0 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 2 1 3 -1 -1 1 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
318 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 4 0 21
|
|
308 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
310 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 3 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 6 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 317 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 320 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 319 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 316 7 3 0 3 7 81 -1 4 0 21
|
|
97 DS_030 5 318 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 4 0 21
|
|
65 E 5 324 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 1 21
|
|
28 BG_000 5 321 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
322 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
316 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 6 4 0 1 3 6 -1 -1 2 0 21
|
|
301 SM_AMIGA_7_ 3 -1 6 3 0 3 6 -1 -1 5 0 21
|
|
312 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 6 3 0 6 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 2 0 6 -1 -1 8 0 21
|
|
313 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
311 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
309 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
325 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
306 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 7 2 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 1 3 -1 -1 1 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
318 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
305 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 4 0 21
|
|
308 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
310 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 0 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 4 0 21
|
|
65 E 5 327 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 1 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
302 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 5 0 21
|
|
314 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 6 3 1 3 6 -1 -1 3 0 21
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 0 3 0 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 3 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 8 0 21
|
|
312 SM_AMIGA_0_ 3 -1 0 2 0 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_2_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
328 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
309 SM_AMIGA_5_ 3 -1 7 2 0 7 -1 -1 2 0 21
|
|
305 inst_CLK_000_D4 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 3 2 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_D5 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 1 3 -1 -1 1 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
306 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 4 0 21
|
|
310 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
101 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 325 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 328 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 327 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 324 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 326 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 323 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 4 0 21
|
|
65 E 5 332 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 321 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 330 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 331 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 333 3 0 34 -1 2 1 21
|
|
28 BG_000 5 329 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
330 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D1 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
324 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
302 SM_AMIGA_6_ 3 -1 7 4 1 3 6 7 -1 -1 2 0 21
|
|
301 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
332 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
325 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 8 0 21
|
|
305 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
316 SM_AMIGA_0_ 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
312 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
319 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
317 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
315 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
306 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
333 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
309 CLK_CNT_P_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
307 CLK_CNT_N_0_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
308 CLK_CNT_N_1_ 3 -1 0 2 0 1 -1 -1 1 0 21
|
|
304 inst_CLK_000_D4 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D5 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 3 2 6 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 0 3 -1 -1 1 0 21
|
|
328 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
326 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
327 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 4 0 21
|
|
314 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
329 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
323 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 CLK_CNT_P_1_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 7 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 322 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 4 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
322 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 0 3 0 3 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
316 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
317 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
309 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
323 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
307 inst_CLK_000_D4 3 -1 0 2 1 7 -1 -1 1 0 21
|
|
306 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D5 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 8 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 4 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 1 1 1 -1 -1 1 0 21
|
|
301 inst_DTACK_D0 3 -1 6 1 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 3 1 7 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 1 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 6 3 0 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D4 3 -1 7 3 1 3 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
307 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 0 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
94 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
30 LDS_000 5 319 3 0 30 -1 12 0 21
|
|
31 UDS_000 5 318 3 0 31 -1 8 0 21
|
|
65 E 5 323 6 0 65 -1 3 0 21
|
|
33 AMIGA_BUS_ENABLE 5 325 3 0 33 -1 3 0 21
|
|
28 BG_000 5 320 3 0 28 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 321 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 322 7 0 77 -1 2 0 21
|
|
34 VMA 5 324 3 0 34 -1 2 0 21
|
|
32 AS_000 5 317 3 0 32 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
299 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
302 inst_CLK_OUT_PRE 3 -1 7 4 0 1 6 7 -1 -1 3 1 21
|
|
300 inst_CLK_000_D1 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
|
|
293 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 4 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 1 2 1 3 -1 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
323 RN_E 3 65 6 2 3 6 65 -1 3 0 21
|
|
314 SM_AMIGA_0_ 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
311 SM_AMIGA_3_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
308 SM_AMIGA_1_ 3 -1 7 2 0 7 -1 -1 3 0 21
|
|
304 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
324 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
|
|
321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
|
|
312 SM_AMIGA_5_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
298 inst_VPA_SYNC 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
296 inst_DTACK_SYNC 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D2 3 -1 7 2 1 3 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
|
|
319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
|
|
318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
325 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 3 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
309 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
305 CLK_REF_1_ 3 -1 7 1 7 -1 -1 1 0 20
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
81 AS_030 1 -1 -1 4 1 3 6 7 81 -1
|
|
63 CLK_030 1 -1 -1 3 1 3 7 63 -1
|
|
13 nEXP_SPACE 1 -1 -1 3 1 3 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 1 7 94 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 1 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 1 7 27 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 6 3 0 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D4 3 -1 7 3 1 3 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
307 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 0 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D4 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
308 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
314 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 6 3 0 6 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_5_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
305 inst_CLK_000_D3 3 -1 1 3 0 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
310 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
322 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
306 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 7 1 1 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 1 1 1 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
295 inst_CLK_OUT_PRE_50_D 3 -1 1 1 1 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
299 SM_AMIGA_6_ 3 -1 7 4 0 1 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D4 3 -1 1 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
312 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
303 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 318 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 321 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 320 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 317 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 319 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
65 E 5 325 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 1 21
|
|
28 BG_000 5 322 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
323 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 21
|
|
317 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
297 inst_CLK_000_D4 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
313 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
312 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
300 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 1 3 0 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
308 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
304 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
311 SM_AMIGA_0_ 3 -1 6 2 0 6 -1 -1 4 0 21
|
|
314 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
310 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
307 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 6 2 1 3 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
319 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
305 inst_CLK_000_D2 3 -1 7 1 1 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 0 1 1 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
299 SM_AMIGA_6_ 3 -1 7 4 0 1 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D4 3 -1 1 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
312 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
303 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
317 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 3 1 3 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
300 SM_AMIGA_6_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D4 3 -1 7 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 0 2 1 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 1 2 0 7 -1 -1 1 0 21
|
|
299 CLK_CNT_N_0_ 3 -1 1 2 0 1 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
312 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 8 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
304 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
305 inst_CLK_000_D2 3 -1 7 1 1 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
317 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 3 1 3 6 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
300 SM_AMIGA_6_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D4 3 -1 7 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 0 2 1 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 1 2 0 7 -1 -1 1 0 21
|
|
299 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
312 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 8 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
304 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
307 CLK_CNT_N_0_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
308 CLK_CNT_N_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
306 inst_CLK_000_D2 3 -1 7 1 1 -1 -1 1 0 21
|
|
305 CLK_CNT_P_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
299 SM_AMIGA_6_ 3 -1 7 4 0 1 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D4 3 -1 1 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
312 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
303 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
299 SM_AMIGA_6_ 3 -1 7 4 0 1 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D4 3 -1 1 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
312 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
303 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
299 SM_AMIGA_6_ 3 -1 7 4 0 1 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D4 3 -1 1 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
312 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
303 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
299 SM_AMIGA_6_ 3 -1 7 4 0 1 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D4 3 -1 1 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
312 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
303 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
299 SM_AMIGA_6_ 3 -1 7 4 0 1 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D4 3 -1 1 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
312 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
303 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
299 SM_AMIGA_6_ 3 -1 7 4 0 1 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D4 3 -1 1 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
312 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
303 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
299 SM_AMIGA_6_ 3 -1 7 4 0 1 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D4 3 -1 1 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
312 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
303 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
301 SM_AMIGA_6_ 3 -1 7 4 0 1 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
304 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D4 3 -1 1 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
312 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
308 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
307 CLK_CNT_N_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
302 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
305 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
306 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
300 CLK_CNT_P_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
299 CLK_CNT_N_1_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
100 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 324 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 327 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 326 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 323 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 325 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 322 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 331 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 333 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 321 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 332 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
323 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
299 SM_AMIGA_6_ 3 -1 7 4 0 1 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D4 3 -1 1 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
312 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
317 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
331 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
318 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
332 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
324 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 1 7 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
327 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
326 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
325 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
303 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
315 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
333 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
321 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 322 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 4 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 4 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
322 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_7_ 3 -1 7 3 0 3 7 -1 -1 5 0 21
|
|
316 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
331 RN_VMA 3 34 3 3 1 3 6 34 -1 2 1 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
299 SM_AMIGA_6_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 0 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D4 3 -1 1 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 0 3 1 3 6 -1 -1 1 0 21
|
|
311 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
317 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
323 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
303 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 1 0 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 322 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 4 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 4 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
322 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_7_ 3 -1 7 3 0 3 7 -1 -1 5 0 21
|
|
316 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
331 RN_VMA 3 34 3 3 1 3 6 34 -1 2 1 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
299 SM_AMIGA_6_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 0 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D4 3 -1 1 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 0 3 1 3 6 -1 -1 1 0 21
|
|
311 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
317 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
323 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
303 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 1 0 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 322 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 4 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 4 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
322 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_7_ 3 -1 7 3 0 3 7 -1 -1 5 0 21
|
|
316 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
331 RN_VMA 3 34 3 3 1 3 6 34 -1 2 1 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
299 SM_AMIGA_6_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 0 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D4 3 -1 1 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 0 3 1 3 6 -1 -1 1 0 21
|
|
311 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
317 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
323 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
303 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 1 0 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 322 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 4 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 4 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
322 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_7_ 3 -1 7 3 0 3 7 -1 -1 5 0 21
|
|
316 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
331 RN_VMA 3 34 3 3 1 3 6 34 -1 2 1 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
299 SM_AMIGA_6_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 0 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D4 3 -1 1 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 0 3 1 3 6 -1 -1 1 0 21
|
|
311 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
317 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
323 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
303 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 1 0 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 326 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 325 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 322 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 324 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 4 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 4 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 328 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 329 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 327 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
322 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_7_ 3 -1 7 3 0 3 7 -1 -1 5 0 21
|
|
316 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
331 RN_VMA 3 34 3 3 1 3 6 34 -1 2 1 21
|
|
329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
299 SM_AMIGA_6_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D3 3 -1 0 3 0 1 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D4 3 -1 1 3 0 3 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 0 3 1 3 6 -1 -1 1 0 21
|
|
311 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 4 0 21
|
|
317 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
301 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
323 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
307 CLK_CNT_P_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
305 CLK_CNT_N_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
300 SM_AMIGA_5_ 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
308 CLK_CNT_P_1_ 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
306 CLK_CNT_N_1_ 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
326 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
325 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
303 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 4 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 1 0 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D4 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
308 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
314 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 6 3 0 6 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_5_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
305 inst_CLK_000_D3 3 -1 1 3 0 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
310 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
322 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
306 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 7 1 1 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 1 1 1 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
295 inst_CLK_OUT_PRE_50_D 3 -1 1 1 1 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 318 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 321 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 320 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 317 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 319 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
65 E 5 325 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 1 21
|
|
28 BG_000 5 322 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
323 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 21
|
|
317 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
297 inst_CLK_000_D4 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
313 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
312 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
300 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 1 3 0 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
308 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
304 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
311 SM_AMIGA_0_ 3 -1 6 2 0 6 -1 -1 4 0 21
|
|
314 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
310 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
307 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 6 2 1 3 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
319 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
305 inst_CLK_000_D2 3 -1 7 1 1 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 0 1 1 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 317 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 320 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 319 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 316 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 318 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
65 E 5 324 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 314 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 322 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 323 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 325 3 0 34 -1 2 1 21
|
|
28 BG_000 5 321 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
322 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
316 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
300 SM_AMIGA_6_ 3 -1 7 4 0 1 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
312 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
324 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
311 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 6 3 0 6 7 -1 -1 3 0 21
|
|
323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
297 inst_CLK_000_D3 3 -1 3 3 0 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
307 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
304 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
313 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
309 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
325 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
317 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
306 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 0 2 1 3 -1 -1 1 0 21
|
|
320 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
319 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
318 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
310 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
308 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
321 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
298 inst_DTACK_D0 3 -1 6 1 1 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 318 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 321 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 320 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 317 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 319 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
65 E 5 325 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 326 3 0 34 -1 2 1 21
|
|
28 BG_000 5 322 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
323 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
295 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 21
|
|
317 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
297 inst_CLK_000_D4 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
313 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
312 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
|
|
300 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 1 3 0 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
308 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
304 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
311 SM_AMIGA_0_ 3 -1 6 2 0 6 -1 -1 4 0 21
|
|
314 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
310 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
|
|
326 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
307 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
301 SM_AMIGA_5_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 6 2 1 3 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
319 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
309 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
305 inst_CLK_000_D2 3 -1 7 1 1 -1 -1 1 0 21
|
|
298 inst_DTACK_D0 3 -1 0 1 1 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D4 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
308 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
314 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 6 3 0 6 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_5_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
305 inst_CLK_000_D3 3 -1 1 3 0 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
310 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
322 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
|
|
294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
306 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 7 1 1 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 1 1 1 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
295 inst_CLK_OUT_PRE_50_D 3 -1 1 1 1 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
76 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
80 DSACK_1_ 5 304 7 1 3 80 -1 4 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
31 UDS_000 5 306 3 0 31 -1 10 0 21
|
|
30 LDS_000 5 307 3 0 30 -1 7 1 21
|
|
65 E 5 309 6 0 65 -1 4 0 21
|
|
64 CLK_DIV_OUT 5 311 6 0 64 -1 3 0 21
|
|
32 AS_000 5 305 3 0 32 -1 3 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 310 3 0 34 -1 2 1 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
82 BGACK_030 5 308 7 0 82 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
28 BG_000 0 3 0 28 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 1 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 1 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
302 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 21
|
|
303 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 3 0 21
|
|
309 RN_E 3 65 6 2 3 6 65 -1 4 0 21
|
|
294 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
311 RN_CLK_DIV_OUT 3 64 6 2 1 6 64 -1 3 0 21
|
|
305 RN_AS_000 3 32 3 2 3 6 32 -1 3 0 21
|
|
300 inst_AS_AMIGA_ENABLE 3 -1 7 2 3 7 -1 -1 3 0 21
|
|
295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
310 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 1 0 21
|
|
306 RN_UDS_000 3 31 3 1 3 31 -1 10 0 21
|
|
307 RN_LDS_000 3 30 3 1 3 30 -1 7 1 21
|
|
304 RN_DSACK_1_ 3 80 7 1 7 80 -1 4 0 21
|
|
299 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
308 RN_BGACK_030 3 82 7 1 3 82 -1 1 0 21
|
|
301 SM_AMIGA_LAST_1_ 3 -1 3 1 7 -1 -1 1 0 21
|
|
298 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
297 inst_VPA_SYNC 3 -1 7 1 6 -1 -1 1 0 21
|
|
296 SM_AMIGA_LAST_0_ 3 -1 7 1 7 -1 -1 1 0 21
|
|
10 CLK_000 9 -1 1 3 10 -1
|
|
63 CLK_030 9 -1 0 63 -1
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
35 VPA 1 -1 -1 3 3 6 7 35 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
85 RST 1 -1 -1 2 1 6 85 -1
|
|
81 AS_030 1 -1 -1 2 3 7 81 -1
|
|
70 RW 1 -1 -1 2 3 4 70 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
13 CPU_SPACE 1 -1 -1 2 3 7 13 -1
|
|
97 DS_030 1 -1 -1 1 3 97 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
78 SIZE_1_ 1 -1 -1 1 3 78 -1
|
|
69 SIZE_0_ 1 -1 -1 1 3 69 -1
|
|
68 A_0_ 1 -1 -1 1 3 68 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 6 3 0 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D4 3 -1 7 3 1 3 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
307 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 0 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 6 0 21
|
|
65 E 5 327 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 328 3 0 34 -1 2 1 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
313 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
327 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
312 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 0 3 0 3 7 -1 -1 3 0 21
|
|
326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D4 3 -1 7 3 0 3 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
308 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
303 SM_AMIGA_0_ 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
314 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
311 SM_AMIGA_2_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
328 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
320 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
306 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 2 1 3 -1 -1 1 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 8 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
307 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
310 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
300 inst_DTACK_D0 3 -1 0 1 1 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 6 3 0 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D4 3 -1 7 3 1 3 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
307 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 0 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 6 3 0 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D4 3 -1 7 3 1 3 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
307 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 0 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 6 3 0 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_000_D4 3 -1 7 3 1 3 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
307 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
301 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 0 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 320 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 3 1 6 7 -1 -1 1 0 21
|
|
315 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
299 inst_CLK_000_D2 3 -1 -1 2 3 7 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
310 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
308 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
330 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
328 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
309 inst_CLK_000_D4 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 8 0 21
|
|
312 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
307 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 320 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
297 inst_CLK_000_D1 3 -1 -1 3 1 6 7 -1 -1 1 0 21
|
|
315 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
306 inst_CLK_000_D2 3 -1 -1 2 3 7 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
309 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
307 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
303 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
330 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
328 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
308 inst_CLK_000_D4 3 -1 -1 1 3 -1 -1 1 0 21
|
|
298 inst_CLK_000_D3 3 -1 -1 1 7 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
311 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 8 0 21
|
|
312 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
295 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 320 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 3 1 6 7 -1 -1 1 0 21
|
|
315 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
300 inst_CLK_000_D4 3 -1 -1 2 3 7 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
310 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
309 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
305 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
330 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
328 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 -1 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 8 0 21
|
|
312 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
301 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK_1_ 5 320 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 -1 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 3 1 6 7 -1 -1 1 0 21
|
|
315 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
303 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
310 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 5 0 21
|
|
308 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
330 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
328 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
309 inst_CLK_000_D4 3 -1 -1 1 3 -1 -1 1 0 21
|
|
307 inst_CLK_000_D3 3 -1 -1 1 3 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 -1 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 8 0 21
|
|
312 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
313 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
79 DSACK_0_ 0 7 0 79 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 0 1 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_1_ 3 -1 0 3 0 3 7 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
304 SM_AMIGA_0_ 3 -1 7 2 3 7 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
322 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 1 2 0 1 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 1 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 8 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 21
|
|
307 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 0 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
70 RW 1 -1 -1 3 0 3 4 70 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 6 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
294 DSACK1 5 331 7 1 3 -1 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
293 RW_000 5 -1 6 1 0 -1 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 5 0 21
|
|
65 E 5 332 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 329 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 330 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 333 3 0 34 -1 2 1 21
|
|
28 BG_000 5 328 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
329 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
299 inst_CLK_000_D0 3 -1 0 5 0 1 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
317 cpu_est_0_ 3 -1 7 4 1 3 6 7 -1 -1 3 0 21
|
|
301 inst_CLK_000_D2 3 -1 7 4 0 1 6 7 -1 -1 1 0 21
|
|
307 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
318 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
332 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
319 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 1 21
|
|
312 SM_AMIGA_1_ 3 -1 1 3 1 6 7 -1 -1 3 0 21
|
|
330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
308 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
300 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
309 inst_RW_000_INT 3 -1 0 2 0 6 -1 -1 14 0 21
|
|
295 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
306 SM_AMIGA_0_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
304 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
333 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
314 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 3 2 0 3 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
297 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
311 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
315 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
331 RN_DSACK1 3 294 7 1 7 -1 -1 2 0 21
|
|
328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
313 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
303 inst_CLK_OUT_PRE_50 3 -1 1 1 1 -1 -1 1 0 21
|
|
302 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_OUT_PRE_50_D 3 -1 1 1 1 -1 -1 1 0 21
|
|
296 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 6 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 329 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 5 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 325 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 324 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 0 1 6 7 -1 -1 1 0 21
|
|
307 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 14 0 21
|
|
315 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 0 3 0 3 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
316 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
317 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
304 SM_AMIGA_0_ 3 -1 7 2 0 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
306 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_5_ 3 -1 3 2 0 3 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 8 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
329 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
311 inst_CLK_000_D4 3 -1 7 1 3 -1 -1 1 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 1 1 1 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 1 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 319 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 318 7 3 0 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 3 4 6 70 -1 1 0 21
|
|
79 RW_000 5 -1 7 2 0 6 79 -1 1 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
318 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 4 0 1 6 7 -1 -1 1 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
310 SM_AMIGA_1_ 3 -1 6 3 0 6 7 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 0 3 0 3 6 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 3 0 6 7 -1 -1 1 0 21
|
|
307 inst_RW_000_INT 3 -1 6 2 6 7 -1 -1 14 0 21
|
|
309 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
305 SM_AMIGA_7_ 3 -1 0 2 0 3 -1 -1 5 0 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_0_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
311 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 1 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 1 0 -1 -1 8 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 0 1 0 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 319 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 6 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
81 AS_030 5 318 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 4 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
318 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 1 4 0 1 3 7 -1 -1 2 0 21
|
|
306 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 14 0 21
|
|
310 SM_AMIGA_7_ 3 -1 1 3 1 3 7 -1 -1 5 0 21
|
|
303 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 0 3 0 1 6 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 1 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
309 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
311 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 3 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D3 3 -1 7 1 1 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 319 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 6 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
81 AS_030 5 318 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 4 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 322 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
318 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
315 cpu_est_1_ 3 -1 6 4 0 1 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 4 0 1 3 6 65 -1 3 1 21
|
|
303 SM_AMIGA_6_ 3 -1 7 4 0 1 3 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 4 0 1 6 7 -1 -1 1 0 21
|
|
305 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 14 0 21
|
|
316 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_0_ 3 -1 7 3 0 3 7 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_5_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
306 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
307 inst_CLK_000_D2 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D3 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 7 2 1 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
311 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 8 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 1 1 1 -1 -1 1 0 21
|
|
295 inst_CLK_OUT_PRE_50_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 3 0 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 3 4 6 70 -1 1 0 21
|
|
79 RW_000 5 -1 7 2 0 6 79 -1 1 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 4 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
303 SM_AMIGA_6_ 3 -1 7 4 0 3 6 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 7 3 0 3 7 -1 -1 5 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
302 SM_AMIGA_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 inst_CLK_000_D2 3 -1 7 3 0 3 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 6 2 6 7 -1 -1 14 0 21
|
|
311 inst_AS_030_000_SYNC 3 -1 0 2 0 7 -1 -1 8 0 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
308 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
304 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 0 1 1 -1 -1 1 0 21
|
|
295 inst_CLK_OUT_PRE_50_D 3 -1 1 1 1 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
81 AS_030 5 320 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 329 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 4 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 6 5 0 1 3 6 7 -1 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 0 5 0 1 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
297 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 21
|
|
305 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 10 0 21
|
|
309 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 5 0 21
|
|
315 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
306 SM_AMIGA_1_ 3 -1 6 3 0 6 7 -1 -1 3 0 21
|
|
304 SM_AMIGA_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 7 3 0 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D3 3 -1 7 3 0 6 7 -1 -1 1 0 21
|
|
311 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 8 0 21
|
|
316 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
310 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 0 2 1 3 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
308 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
329 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
317 state_machine_un8_bgack_030_int_n 3 -1 7 1 0 -1 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 1 1 1 -1 -1 1 0 21
|
|
295 inst_CLK_OUT_PRE_50_D 3 -1 7 1 6 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
10 CLK_000 1 -1 -1 4 0 1 3 6 10 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 3 0 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 3 4 6 70 -1 1 0 21
|
|
79 RW_000 5 -1 7 2 0 6 79 -1 1 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 4 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
296 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
303 SM_AMIGA_6_ 3 -1 7 4 0 3 6 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 7 3 0 3 7 -1 -1 5 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
302 SM_AMIGA_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 inst_CLK_000_D2 3 -1 7 3 0 3 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 6 2 6 7 -1 -1 14 0 21
|
|
311 inst_AS_030_000_SYNC 3 -1 0 2 0 7 -1 -1 8 0 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
310 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
294 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
308 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
304 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 0 1 1 -1 -1 1 0 21
|
|
295 inst_CLK_OUT_PRE_50_D 3 -1 1 1 1 -1 -1 1 0 21
|
|
293 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
81 AS_030 5 320 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 4 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 0 4 0 3 6 7 -1 -1 2 0 21
|
|
307 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 14 0 21
|
|
310 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
305 SM_AMIGA_0_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 3 0 3 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21
|
|
309 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
313 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
311 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 4 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 6 1 0 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 0 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
81 AS_030 5 320 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 4 0 3 6 7 -1 -1 8 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 4 0 3 6 7 -1 -1 4 0 21
|
|
309 inst_CLK_000_D3 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
308 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 14 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
306 SM_AMIGA_0_ 3 -1 0 3 0 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 1 3 0 1 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
311 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
81 AS_030 5 320 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 5 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 4 0 3 6 7 -1 -1 8 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 4 0 3 6 7 -1 -1 4 0 21
|
|
309 inst_CLK_000_D3 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 4 0 3 6 7 -1 -1 1 0 21
|
|
308 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 14 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
306 SM_AMIGA_0_ 3 -1 0 3 0 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 1 3 0 1 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21
|
|
315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
311 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_6_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 320 7 3 0 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 3 4 6 70 -1 1 0 21
|
|
79 RW_000 5 -1 7 2 0 6 79 -1 1 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 3 1 3 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_2_ 3 -1 1 3 0 1 7 -1 -1 3 0 21
|
|
327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 0 3 0 3 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 3 0 3 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21
|
|
308 inst_RW_000_INT 3 -1 6 2 6 7 -1 -1 14 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
311 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_0_ 3 -1 7 2 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 2 0 21
|
|
300 inst_DTACK_D0 3 -1 0 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 318 7 3 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
21 AVEC_EXP 5 331 2 0 21 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
318 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 2 4 1 2 3 6 -1 -1 3 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 1 2 6 7 -1 -1 1 0 21
|
|
308 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 14 0 21
|
|
315 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 1 3 1 2 3 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 3 1 3 6 -1 -1 3 1 21
|
|
307 SM_AMIGA_2_ 3 -1 6 3 2 6 7 -1 -1 3 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 3 1 2 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 1 2 -1 -1 8 0 21
|
|
310 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
331 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
327 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 7 2 0 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_0_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 2 2 1 2 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
300 inst_DTACK_D0 3 -1 7 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 3 0 2 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 318 7 3 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
21 AVEC_EXP 5 331 2 0 21 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
318 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 2 4 1 2 3 6 -1 -1 3 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 1 2 6 7 -1 -1 1 0 21
|
|
308 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 14 0 21
|
|
315 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 1 3 1 2 3 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 3 1 3 6 -1 -1 3 1 21
|
|
307 SM_AMIGA_2_ 3 -1 6 3 2 6 7 -1 -1 3 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 3 1 2 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 1 2 -1 -1 8 0 21
|
|
310 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
331 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
327 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 7 2 0 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_0_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 2 2 1 2 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
300 inst_DTACK_D0 3 -1 7 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 3 0 2 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 319 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 318 7 3 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
21 AVEC_EXP 5 331 2 0 21 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 321 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 320 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
318 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
314 cpu_est_0_ 3 -1 2 4 1 2 3 6 -1 -1 3 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 1 2 6 7 -1 -1 1 0 21
|
|
308 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 14 0 21
|
|
315 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 1 3 1 2 3 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
316 cpu_est_2_ 3 -1 6 3 1 3 6 -1 -1 3 1 21
|
|
305 SM_AMIGA_2_ 3 -1 6 3 2 6 7 -1 -1 3 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 3 1 2 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 1 2 -1 -1 8 0 21
|
|
310 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
331 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
327 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
313 SM_AMIGA_0_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_6_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 7 2 0 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_5_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
309 inst_CLK_000_D3 3 -1 2 2 1 2 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
321 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
300 inst_DTACK_D0 3 -1 7 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 3 0 2 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 320 7 3 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
21 AVEC_EXP 5 331 2 0 21 -1 3 0 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 2 5 0 1 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 21
|
|
307 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 14 0 21
|
|
315 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
304 SM_AMIGA_7_ 3 -1 1 3 1 2 3 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
308 SM_AMIGA_2_ 3 -1 1 3 1 2 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 7 3 0 6 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 0 3 0 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_000_D3 3 -1 7 3 1 2 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 3 3 1 2 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 1 2 -1 -1 8 0 21
|
|
309 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
331 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 3 0 21
|
|
316 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
327 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
313 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_6_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
312 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
301 inst_DTACK_D0 3 -1 2 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 3 0 2 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 2 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 5 0 1 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 4 0 1 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 324 3 4 0 1 6 7 31 -1 6 0 21
|
|
81 AS_030 5 321 7 3 0 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 3 4 6 70 -1 1 0 21
|
|
79 RW_000 5 -1 7 2 0 6 79 -1 1 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 329 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
21 AVEC_EXP 5 332 2 0 21 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 2 0 21
|
|
321 RN_AS_030 3 81 7 5 0 1 3 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 5 1 2 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 6 5 1 2 3 6 7 -1 -1 1 0 21
|
|
316 cpu_est_1_ 3 -1 2 4 1 2 3 6 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 4 1 2 3 6 65 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 7 4 2 3 6 7 -1 -1 3 0 21
|
|
304 SM_AMIGA_7_ 3 -1 2 3 0 2 3 -1 -1 4 0 21
|
|
317 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 3 1 21
|
|
309 SM_AMIGA_2_ 3 -1 1 3 0 1 7 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 2 3 1 2 6 -1 -1 3 0 21
|
|
308 inst_CLK_000_D3 3 -1 0 3 0 1 2 -1 -1 1 0 21
|
|
307 inst_RW_000_INT 3 -1 6 2 6 7 -1 -1 14 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 0 2 0 2 -1 -1 8 0 21
|
|
310 inst_CLK_030_H 3 -1 1 2 0 1 -1 -1 5 0 21
|
|
332 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 3 0 21
|
|
331 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
328 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
314 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
311 SM_AMIGA_6_ 3 -1 2 2 2 6 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 7 2 2 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D4 3 -1 1 2 0 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 3 2 0 2 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
313 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
329 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
301 inst_DTACK_D0 3 -1 7 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 2 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 2 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 1 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 0 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 0 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 0 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 0 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 0 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 0 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 0 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 6 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
81 AS_030 5 320 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
21 AVEC_EXP 5 331 2 0 21 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 7 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 5 1 2 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 6 4 2 3 6 7 -1 -1 4 0 21
|
|
304 SM_AMIGA_5_ 3 -1 1 4 0 1 3 6 -1 -1 2 0 21
|
|
307 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 14 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 2 6 7 -1 -1 8 0 21
|
|
315 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
306 SM_AMIGA_2_ 3 -1 2 3 0 2 7 -1 -1 3 0 21
|
|
311 SM_AMIGA_4_ 3 -1 6 3 2 3 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 3 0 1 6 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 3 2 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 3 3 2 6 7 -1 -1 1 0 21
|
|
309 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
331 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 3 0 21
|
|
316 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
327 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
310 SM_AMIGA_6_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 2 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
312 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
300 inst_DTACK_D0 3 -1 7 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 2 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 320 7 3 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 3 4 6 70 -1 1 0 21
|
|
79 RW_000 5 -1 7 2 0 6 79 -1 1 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
21 AVEC_EXP 5 331 2 0 21 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 5 0 1 2 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
306 SM_AMIGA_2_ 3 -1 0 4 0 1 2 7 -1 -1 3 0 21
|
|
315 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 1 3 1 2 3 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 2 3 2 3 6 -1 -1 2 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 3 1 2 7 -1 -1 1 0 21
|
|
307 inst_RW_000_INT 3 -1 6 2 6 7 -1 -1 14 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 1 2 -1 -1 8 0 21
|
|
309 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
331 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 3 0 21
|
|
316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
327 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 3 2 0 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 2 1 2 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 0 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
312 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
300 inst_DTACK_D0 3 -1 7 1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 2 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
98 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 323 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 320 7 3 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 3 4 6 70 -1 1 0 21
|
|
79 RW_000 5 -1 7 2 0 6 79 -1 1 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
21 AVEC_EXP 5 331 2 0 21 -1 3 0 21
|
|
8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
315 cpu_est_1_ 3 -1 1 4 0 1 3 6 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 4 0 1 3 6 65 -1 3 1 21
|
|
298 inst_CLK_000_D1 3 -1 3 4 0 1 6 7 -1 -1 1 0 21
|
|
316 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 6 3 1 3 6 -1 -1 3 0 21
|
|
306 SM_AMIGA_2_ 3 -1 0 3 0 2 7 -1 -1 3 0 21
|
|
304 SM_AMIGA_0_ 3 -1 1 3 1 2 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 2 3 2 3 6 -1 -1 2 0 21
|
|
307 inst_RW_000_INT 3 -1 6 2 6 7 -1 -1 14 0 21
|
|
309 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
305 SM_AMIGA_7_ 3 -1 2 2 2 3 -1 -1 4 0 21
|
|
331 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
327 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
313 SM_AMIGA_1_ 3 -1 7 2 1 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 3 2 0 3 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 2 2 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 0 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 1 2 -1 -1 8 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
312 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
308 inst_CLK_000_D3 3 -1 7 1 2 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 2 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 2 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 6 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 327 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
21 AVEC_EXP 5 330 2 0 21 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 7 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 5 1 2 3 6 7 -1 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 5 1 2 3 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 4 1 2 6 7 -1 -1 8 0 21
|
|
319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
307 inst_CLK_000_D2 3 -1 7 4 1 2 6 7 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 14 0 21
|
|
314 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
310 SM_AMIGA_4_ 3 -1 0 3 0 2 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_0_ 3 -1 2 3 0 2 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
308 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
330 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 3 0 21
|
|
315 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_2_ 3 -1 2 2 2 7 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
326 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
312 SM_AMIGA_1_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 2 3 -1 -1 1 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
311 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
99 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 325 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 324 3 3 0 6 7 31 -1 6 0 21
|
|
70 RW 5 -1 6 3 3 4 6 70 -1 1 0 21
|
|
81 AS_030 5 321 7 2 3 7 81 -1 4 0 21
|
|
79 RW_000 5 -1 7 2 0 6 79 -1 1 0 21
|
|
97 DS_030 5 323 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 329 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 330 6 0 65 -1 3 1 21
|
|
21 AVEC_EXP 5 332 2 0 21 -1 3 0 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 327 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 328 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 331 3 0 34 -1 2 1 21
|
|
28 BG_000 5 326 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
327 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
316 cpu_est_1_ 3 -1 3 4 0 2 3 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 6 4 2 3 6 7 -1 -1 4 0 21
|
|
330 RN_E 3 65 6 4 0 2 3 6 65 -1 3 1 21
|
|
305 SM_AMIGA_6_ 3 -1 2 4 1 2 3 6 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 2 6 7 -1 -1 8 0 21
|
|
308 SM_AMIGA_2_ 3 -1 2 3 1 2 7 -1 -1 3 0 21
|
|
331 RN_VMA 3 34 3 3 0 2 3 34 -1 2 1 21
|
|
304 SM_AMIGA_0_ 3 -1 1 3 1 2 6 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 7 3 2 6 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 2 3 0 2 3 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 6 2 6 7 -1 -1 14 0 21
|
|
309 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
313 SM_AMIGA_3_ 3 -1 0 2 0 2 -1 -1 4 0 21
|
|
332 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 3 0 21
|
|
317 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
328 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 1 2 0 2 -1 -1 1 0 21
|
|
325 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
324 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
329 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
314 SM_AMIGA_1_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 inst_CLK_000_D3 3 -1 7 1 0 -1 -1 1 0 21
|
|
299 inst_CLK_000_D4 3 -1 0 1 7 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 2 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 318 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 321 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 320 3 3 0 6 7 31 -1 6 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
81 AS_030 5 317 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 319 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 325 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
65 E 5 326 6 0 65 -1 3 1 21
|
|
21 AVEC_EXP 5 330 2 0 21 -1 3 0 21
|
|
8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 323 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 324 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 1 21
|
|
28 BG_000 5 322 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
323 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 7 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 5 1 2 3 6 7 -1 -1 1 0 21
|
|
317 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 6 4 1 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 4 1 2 3 6 65 -1 3 1 21
|
|
302 SM_AMIGA_6_ 3 -1 2 4 0 2 3 6 -1 -1 2 0 21
|
|
306 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 14 0 21
|
|
304 SM_AMIGA_7_ 3 -1 7 3 2 3 7 -1 -1 4 0 21
|
|
327 RN_VMA 3 34 3 3 1 2 3 34 -1 2 1 21
|
|
303 SM_AMIGA_0_ 3 -1 0 3 0 2 7 -1 -1 2 0 21
|
|
295 inst_VPA_D 3 -1 1 3 1 2 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 2 7 -1 -1 8 0 21
|
|
308 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
311 SM_AMIGA_3_ 3 -1 1 2 1 2 -1 -1 4 0 21
|
|
330 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 3 0 21
|
|
315 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_2_ 3 -1 2 2 2 7 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
324 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
312 SM_AMIGA_1_ 3 -1 2 2 0 2 -1 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 3 2 2 7 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 7 2 1 2 -1 -1 1 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
319 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
325 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 2 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 3 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 6 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 327 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
21 AVEC_EXP 5 330 2 0 21 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 7 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
304 SM_AMIGA_7_ 3 -1 6 5 1 2 3 6 7 -1 -1 4 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 5 1 2 3 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 4 1 2 6 7 -1 -1 8 0 21
|
|
319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
307 inst_CLK_000_D2 3 -1 7 4 1 2 6 7 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 14 0 21
|
|
314 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
310 SM_AMIGA_4_ 3 -1 0 3 0 2 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_0_ 3 -1 2 3 0 2 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
308 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
330 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 3 0 21
|
|
315 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_2_ 3 -1 2 2 2 7 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
326 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
312 SM_AMIGA_1_ 3 -1 7 2 2 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 2 3 -1 -1 1 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
311 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 319 7 3 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 327 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
21 AVEC_EXP 5 330 2 0 21 -1 3 0 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 5 1 2 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
303 SM_AMIGA_6_ 3 -1 1 4 0 1 3 6 -1 -1 2 0 21
|
|
306 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 14 0 21
|
|
314 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
305 SM_AMIGA_7_ 3 -1 2 3 1 2 3 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 0 3 0 1 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_0_ 3 -1 7 3 0 2 7 -1 -1 2 0 21
|
|
302 SM_AMIGA_1_ 3 -1 6 3 2 6 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 1 2 -1 -1 8 0 21
|
|
308 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
330 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 3 0 21
|
|
315 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
312 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
326 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 3 2 1 2 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 1 3 -1 -1 1 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
311 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 2 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 2 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 319 7 3 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 0 3 4 70 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 327 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 7 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
21 AVEC_EXP 5 330 2 0 21 -1 4 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 5 1 2 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
306 inst_RW_000_INT 3 -1 0 3 0 6 7 -1 -1 14 0 21
|
|
303 SM_AMIGA_7_ 3 -1 1 3 1 2 3 -1 -1 4 0 21
|
|
313 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 0 3 0 1 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_0_ 3 -1 2 3 0 1 2 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
|
|
302 SM_AMIGA_1_ 3 -1 0 3 0 2 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 1 2 -1 -1 8 0 21
|
|
308 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
330 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
312 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21
|
|
326 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 3 2 1 2 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 7 2 0 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 7 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 3 0 2 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 5 0 1 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 4 0 1 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 4 0 1 6 7 31 -1 6 0 21
|
|
81 AS_030 5 319 7 3 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 3 4 6 70 -1 1 0 21
|
|
79 RW_000 5 -1 7 2 0 6 79 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 327 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
21 AVEC_EXP 5 330 2 0 21 -1 4 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 5 0 1 3 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 1 3 1 2 3 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 2 3 1 2 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 3 0 3 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_1_ 3 -1 7 3 1 2 7 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 1 3 1 2 7 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 6 2 6 7 -1 -1 14 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 1 2 -1 -1 8 0 21
|
|
308 inst_CLK_030_H 3 -1 1 2 0 1 -1 -1 5 0 21
|
|
330 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 4 0 21
|
|
315 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
312 SM_AMIGA_2_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
326 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 7 2 1 2 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
311 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 7 1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 2 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 5 0 1 2 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 6 0 21
|
|
81 AS_030 5 319 7 3 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 3 4 6 70 -1 1 0 21
|
|
79 RW_000 5 -1 7 2 0 6 79 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 327 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
21 AVEC_EXP 5 330 2 0 21 -1 4 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 5 0 1 2 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
313 cpu_est_0_ 3 -1 7 4 0 3 6 7 -1 -1 3 0 21
|
|
314 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21
|
|
302 SM_AMIGA_7_ 3 -1 1 3 1 2 3 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 3 1 21
|
|
306 SM_AMIGA_2_ 3 -1 0 3 0 2 7 -1 -1 3 0 21
|
|
304 SM_AMIGA_6_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
307 inst_RW_000_INT 3 -1 6 2 6 7 -1 -1 14 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 1 2 -1 -1 8 0 21
|
|
309 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
330 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 4 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
326 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 3 2 0 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
308 inst_CLK_000_D2 3 -1 7 2 1 2 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
312 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 1 1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 2 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 319 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21
|
|
70 RW 5 -1 6 3 3 4 7 70 -1 1 0 21
|
|
79 RW_000 5 320 7 2 0 6 79 -1 5 0 21
|
|
81 AS_030 5 318 7 2 3 7 81 -1 4 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 327 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
21 AVEC_EXP 5 330 2 0 21 -1 4 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 316 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 315 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 0 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 7 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
318 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
313 cpu_est_1_ 3 -1 3 4 0 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 4 0 2 3 6 65 -1 3 1 21
|
|
302 SM_AMIGA_7_ 3 -1 7 3 2 3 7 -1 -1 4 0 21
|
|
305 SM_AMIGA_2_ 3 -1 0 3 0 1 7 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 3 0 2 3 34 -1 2 1 21
|
|
303 SM_AMIGA_1_ 3 -1 1 3 1 2 6 -1 -1 2 0 21
|
|
295 inst_VPA_D 3 -1 1 3 0 2 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 2 7 -1 -1 8 0 21
|
|
330 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 4 0 21
|
|
311 SM_AMIGA_3_ 3 -1 2 2 0 2 -1 -1 4 0 21
|
|
314 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
312 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
326 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
306 SM_AMIGA_0_ 3 -1 6 2 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 7 2 2 7 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 1 2 0 2 -1 -1 1 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
320 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
308 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
315 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
319 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 6 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 2 3 4 6 7 13 -1
|
|
10 CLK_000 1 -1 -1 3 3 6 7 10 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 5 0 1 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 4 0 1 6 7 30 -1 10 0 21
|
|
31 UDS_000 5 322 3 4 0 1 6 7 31 -1 6 0 21
|
|
81 AS_030 5 319 7 3 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 3 4 6 70 -1 1 0 21
|
|
79 RW_000 5 -1 7 2 0 6 79 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 327 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
21 AVEC_EXP 5 330 2 0 21 -1 4 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 5 0 1 3 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 1 3 1 2 3 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 2 3 1 2 6 -1 -1 3 0 21
|
|
310 SM_AMIGA_4_ 3 -1 6 3 0 3 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_1_ 3 -1 7 3 1 2 7 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 1 3 1 2 7 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 6 2 6 7 -1 -1 14 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 1 2 -1 -1 8 0 21
|
|
308 inst_CLK_030_H 3 -1 1 2 0 1 -1 -1 5 0 21
|
|
330 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 4 0 21
|
|
315 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
312 SM_AMIGA_2_ 3 -1 0 2 0 7 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
326 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
305 SM_AMIGA_0_ 3 -1 1 2 1 6 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 7 2 1 2 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21
|
|
311 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 7 1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 2 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 5 0 1 2 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 3 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 3 4 6 70 -1 1 0 21
|
|
79 RW_000 5 -1 7 2 0 6 79 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 327 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
21 AVEC_EXP 5 330 2 0 21 -1 4 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 317 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 316 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 325 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 326 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
28 BG_000 5 324 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 5 0 1 2 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 1 3 1 2 3 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 0 3 0 1 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_0_ 3 -1 7 3 1 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 2 3 2 3 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_1_ 3 -1 1 3 1 2 7 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 7 3 0 3 7 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 6 2 6 7 -1 -1 14 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 1 2 -1 -1 8 0 21
|
|
330 RN_AVEC_EXP 3 21 2 2 2 3 21 -1 4 0 21
|
|
315 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
329 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
326 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 7 2 1 2 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 2 1 3 -1 -1 1 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
308 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
311 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
312 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
310 SM_AMIGA_4_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 7 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 3 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 2 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
63 CLK_030 1 -1 -1 4 0 2 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 5 0 1 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 4 0 1 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 4 0 1 6 7 31 -1 7 0 21
|
|
70 RW 5 -1 6 3 3 4 6 70 -1 1 0 21
|
|
81 AS_030 5 320 7 2 3 7 81 -1 4 0 21
|
|
79 RW_000 5 -1 7 2 0 6 79 -1 1 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
320 RN_AS_030 3 81 7 5 0 1 3 6 7 81 -1 4 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
293 inst_avec_expreg 3 -1 6 3 2 3 6 -1 -1 6 0 21
|
|
315 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
303 SM_AMIGA_1_ 3 -1 1 3 1 6 7 -1 -1 2 0 21
|
|
307 inst_RW_000_INT 3 -1 6 2 6 7 -1 -1 14 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 8 0 21
|
|
309 inst_CLK_030_H 3 -1 1 2 0 1 -1 -1 5 0 21
|
|
316 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
327 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 0 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_0_ 3 -1 7 2 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
308 inst_CLK_000_D2 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
312 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 0 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 1 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 1 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 5 0 1 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 4 0 1 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 4 0 1 6 7 31 -1 7 0 21
|
|
81 AS_030 5 320 7 3 3 6 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 3 4 6 70 -1 1 0 21
|
|
79 RW_000 5 -1 7 2 0 6 79 -1 1 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
320 RN_AS_030 3 81 7 5 0 1 3 6 7 81 -1 4 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
293 inst_avec_expreg 3 -1 6 3 2 3 6 -1 -1 6 0 21
|
|
315 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
303 SM_AMIGA_1_ 3 -1 1 3 1 6 7 -1 -1 2 0 21
|
|
307 inst_RW_000_INT 3 -1 6 2 6 7 -1 -1 14 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 8 0 21
|
|
309 inst_CLK_030_H 3 -1 1 2 0 1 -1 -1 5 0 21
|
|
316 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
327 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 0 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_0_ 3 -1 7 2 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
308 inst_CLK_000_D2 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
312 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 0 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 1 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 1 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
108 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 329 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 332 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 331 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 328 7 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 -1 2 3 4 70 -1 1 0 21
|
|
97 DS_030 5 330 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 -1 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK1 5 338 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
334 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
328 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
325 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
339 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
326 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
324 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
332 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 8 0 21
|
|
331 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
330 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
341 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
310 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
306 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
336 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
335 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
340 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
338 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
337 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
333 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
329 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
320 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 -1 1 2 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
309 inst_RW_000_INT 3 -1 -1 0 -1 -1 14 0 21
|
|
322 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
323 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
321 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 2 0 21
|
|
319 CLK_000_P_SYNC_8_ 3 -1 -1 0 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_7_ 3 -1 -1 0 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_6_ 3 -1 -1 0 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_5_ 3 -1 -1 0 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_4_ 3 -1 -1 0 -1 -1 1 0 21
|
|
314 CLK_000_P_SYNC_3_ 3 -1 -1 0 -1 -1 1 0 21
|
|
313 CLK_000_P_SYNC_2_ 3 -1 -1 0 -1 -1 1 0 21
|
|
312 CLK_000_P_SYNC_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
311 CLK_000_P_SYNC_0_ 3 -1 -1 0 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
108 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 329 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 332 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 331 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 328 7 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 -1 2 3 4 70 -1 1 0 21
|
|
97 DS_030 5 330 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 -1 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK1 5 338 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
334 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
328 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
325 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
339 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
326 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
324 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
332 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 8 0 21
|
|
331 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
330 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
341 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
310 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
306 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
336 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
335 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
340 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
338 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
337 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
333 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
329 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
320 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 -1 1 2 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
309 inst_RW_000_INT 3 -1 -1 0 -1 -1 14 0 21
|
|
322 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
323 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
321 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 2 0 21
|
|
319 CLK_000_P_SYNC_8_ 3 -1 -1 0 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_7_ 3 -1 -1 0 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_6_ 3 -1 -1 0 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_5_ 3 -1 -1 0 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_4_ 3 -1 -1 0 -1 -1 1 0 21
|
|
314 CLK_000_P_SYNC_3_ 3 -1 -1 0 -1 -1 1 0 21
|
|
313 CLK_000_P_SYNC_2_ 3 -1 -1 0 -1 -1 1 0 21
|
|
312 CLK_000_P_SYNC_1_ 3 -1 -1 0 -1 -1 1 0 21
|
|
311 CLK_000_P_SYNC_0_ 3 -1 -1 0 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 -1 0 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 6 0 1 2 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 -1 2 3 4 70 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 -1 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK1 5 327 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 8 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
305 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
329 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 -1 0 -1 -1 14 0 21
|
|
311 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 -1 2 3 4 70 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 -1 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK1 5 327 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
21 AVEC_EXP 0 -1 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 8 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
305 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
329 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 -1 0 -1 -1 14 0 21
|
|
311 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 321 3 5 0 1 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 324 3 4 0 1 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 323 3 4 0 1 6 7 31 -1 7 0 21
|
|
81 AS_030 5 320 7 3 3 6 7 81 -1 4 0 21
|
|
70 RW 5 -1 6 3 3 4 6 70 -1 1 0 21
|
|
79 RW_000 5 -1 7 2 0 6 79 -1 1 0 21
|
|
97 DS_030 5 322 0 1 3 97 -1 7 0 21
|
|
80 DSACK1 5 328 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
65 E 5 329 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
77 FPU_CS 5 327 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 330 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
320 RN_AS_030 3 81 7 5 0 1 3 6 7 81 -1 4 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
293 inst_avec_expreg 3 -1 6 3 2 3 6 -1 -1 6 0 21
|
|
315 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21
|
|
306 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 4 0 21
|
|
329 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21
|
|
303 SM_AMIGA_1_ 3 -1 1 3 1 6 7 -1 -1 2 0 21
|
|
307 inst_RW_000_INT 3 -1 6 2 6 7 -1 -1 14 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 8 0 21
|
|
309 inst_CLK_030_H 3 -1 1 2 0 1 -1 -1 5 0 21
|
|
316 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
314 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
313 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
330 RN_VMA 3 34 3 2 0 3 34 -1 2 1 21
|
|
327 RN_FPU_CS 3 77 7 2 4 7 77 -1 2 0 21
|
|
310 SM_AMIGA_5_ 3 -1 3 2 0 3 -1 -1 2 0 21
|
|
305 SM_AMIGA_0_ 3 -1 7 2 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
308 inst_CLK_000_D2 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21
|
|
324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
312 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 4 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
321 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 0 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 1 1 6 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 4 0 1 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 -1 2 3 4 70 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 -1 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK1 5 327 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 8 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
305 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
329 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 -1 0 -1 -1 14 0 21
|
|
311 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 -1 2 3 4 70 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 -1 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK1 5 327 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 8 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
305 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
329 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 -1 0 -1 -1 14 0 21
|
|
311 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 -1 2 3 4 70 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 -1 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK1 5 327 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 8 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
305 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
329 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 -1 0 -1 -1 14 0 21
|
|
311 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 -1 2 3 4 70 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 -1 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK1 5 327 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 8 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
305 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
329 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 -1 0 -1 -1 14 0 21
|
|
311 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 -1 2 3 4 70 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 -1 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK1 5 327 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 8 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
305 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
329 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 -1 0 -1 -1 14 0 21
|
|
311 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 -1 2 3 4 70 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 -1 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK1 5 327 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 8 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
305 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
329 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 -1 0 -1 -1 14 0 21
|
|
311 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 -1 2 3 4 70 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 -1 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK1 5 327 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 8 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
305 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
329 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 -1 0 -1 -1 14 0 21
|
|
311 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 -1 2 3 4 70 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 -1 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK1 5 327 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 8 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
305 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
329 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 -1 0 -1 -1 14 0 21
|
|
311 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 323 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 319 7 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 -1 2 3 4 70 -1 1 0 21
|
|
97 DS_030 5 321 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 -1 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK1 5 327 7 0 80 -1 2 0 21
|
|
77 FPU_CS 0 7 0 77 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 -1 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
325 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
319 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
323 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 8 0 21
|
|
322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
305 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
329 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
326 RN_FPU_CS 3 77 7 1 7 77 -1 2 0 21
|
|
324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 -1 0 -1 -1 14 0 21
|
|
311 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 318 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 321 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 320 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 317 7 2 3 7 81 -1 4 0 21
|
|
70 RW 5 -1 -1 2 3 4 70 -1 1 0 21
|
|
97 DS_030 5 319 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 -1 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK1 5 324 7 0 80 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
323 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
317 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 8 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
319 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
305 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
324 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 -1 0 -1 -1 14 0 21
|
|
311 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
95 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 318 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 321 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 320 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 317 7 3 3 4 7 81 -1 4 0 21
|
|
70 RW 5 -1 -1 2 3 4 70 -1 1 0 21
|
|
97 DS_030 5 319 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
79 RW_000 5 -1 -1 1 0 79 -1 1 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK1 5 324 7 0 80 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
323 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
317 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
314 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
315 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
313 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
319 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 7 0 21
|
|
327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
308 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
305 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
324 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
318 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
309 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
307 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
306 inst_RW_000_INT 3 -1 -1 0 -1 -1 14 0 21
|
|
311 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
312 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
310 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
96 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 317 3 4 0 4 6 7 32 -1 2 0 21
|
|
30 LDS_000 5 321 3 3 0 6 7 30 -1 11 0 21
|
|
31 UDS_000 5 320 3 3 0 6 7 31 -1 7 0 21
|
|
81 AS_030 5 316 7 3 3 4 7 81 -1 4 0 21
|
|
70 RW 5 327 6 3 3 4 6 70 -1 3 0 21
|
|
79 RW_000 5 318 7 2 0 7 79 -1 4 0 21
|
|
97 DS_030 5 319 0 1 3 97 -1 7 0 21
|
|
78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 3 68 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 0 3 0 33 -1 6 0 21
|
|
65 E 0 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 0 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 0 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 0 1 0 6 -1 3 0 21
|
|
82 BGACK_030 0 7 0 82 -1 2 0 21
|
|
80 DSACK1 5 324 7 0 80 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 0 3 0 34 -1 2 1 21
|
|
28 BG_000 0 3 0 28 -1 2 0 21
|
|
91 AVEC 0 -1 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
29 DTACK 0 -1 0 29 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
323 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 -1 4 1 3 6 7 -1 -1 1 0 21
|
|
316 RN_AS_030 3 81 7 3 0 6 7 81 -1 4 0 21
|
|
313 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21
|
|
325 RN_E 3 65 6 2 3 6 65 -1 3 1 21
|
|
314 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 3 1 21
|
|
312 cpu_est_0_ 3 -1 -1 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 -1 2 1 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_0_ 3 -1 -1 2 3 6 -1 -1 2 0 21
|
|
303 SM_AMIGA_6_ 3 -1 -1 2 3 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_1_ 3 -1 -1 2 3 7 -1 -1 2 0 21
|
|
321 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21
|
|
320 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21
|
|
319 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 7 0 21
|
|
328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
307 inst_CLK_030_H 3 -1 -1 1 0 -1 -1 5 0 21
|
|
318 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
|
|
305 SM_AMIGA_7_ 3 -1 -1 1 3 -1 -1 4 0 21
|
|
330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_RW 3 70 6 1 6 70 -1 3 0 21
|
|
315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 RN_VMA 3 34 3 1 3 34 -1 2 1 21
|
|
324 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
322 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
317 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
308 SM_AMIGA_5_ 3 -1 -1 1 3 -1 -1 2 0 21
|
|
306 inst_CLK_000_D2 3 -1 -1 1 3 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 -1 1 3 -1 -1 1 0 21
|
|
310 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21
|
|
311 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21
|
|
309 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 -1 0 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
35 VPA 1 -1 -1 0 35 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 321 7 6 1 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 330 6 3 2 4 6 70 -1 3 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 323 7 2 0 7 79 -1 4 0 21
|
|
97 DS_030 5 324 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 327 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 6 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
316 cpu_est_1_ 3 -1 0 4 0 2 3 6 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 4 0 2 3 6 65 -1 3 1 21
|
|
305 SM_AMIGA_6_ 3 -1 5 4 2 3 5 6 -1 -1 2 0 21
|
|
304 SM_AMIGA_0_ 3 -1 2 4 2 3 5 6 -1 -1 2 0 21
|
|
317 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 0 3 0 1 6 -1 -1 3 0 21
|
|
302 SM_AMIGA_1_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 6 0 21
|
|
303 SM_AMIGA_7_ 3 -1 5 2 3 5 -1 -1 4 0 21
|
|
309 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
308 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
311 SM_AMIGA_5_ 3 -1 6 2 2 6 -1 -1 2 0 21
|
|
310 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
306 inst_CLK_000_D2 3 -1 7 2 3 5 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 5 2 2 3 -1 -1 1 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
307 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
323 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
330 RN_RW 3 70 6 1 6 70 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 5 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 321 7 6 0 1 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 330 6 3 0 4 6 70 -1 3 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 323 7 2 0 7 79 -1 4 0 21
|
|
97 DS_030 5 324 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 327 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21
|
|
65 E 5 328 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 326 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 329 3 0 34 -1 2 1 21
|
|
28 BG_000 5 325 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
326 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
315 cpu_est_0_ 3 -1 0 4 0 2 3 6 -1 -1 3 0 21
|
|
305 SM_AMIGA_6_ 3 -1 5 4 0 3 5 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_1_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 3 2 3 5 -1 -1 7 0 21
|
|
316 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 4 0 21
|
|
328 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
317 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 1 21
|
|
304 SM_AMIGA_0_ 3 -1 2 3 2 3 6 -1 -1 2 0 21
|
|
306 inst_CLK_000_D2 3 -1 7 3 2 3 5 -1 -1 1 0 21
|
|
314 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 3 0 21
|
|
309 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
308 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
329 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
312 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
310 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 2 2 2 3 -1 -1 1 0 21
|
|
324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
307 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
323 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
330 RN_RW 3 70 6 1 6 70 -1 3 0 21
|
|
320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
327 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
322 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 5 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 319 7 5 1 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 328 6 3 1 4 6 70 -1 3 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 321 7 2 0 7 79 -1 4 0 21
|
|
97 DS_030 5 322 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 325 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 6 0 21
|
|
65 E 5 326 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 1 21
|
|
28 BG_000 5 323 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
324 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
316 cpu_est_1_ 3 -1 0 4 0 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 4 0 2 3 6 65 -1 3 1 21
|
|
305 SM_AMIGA_6_ 3 -1 1 4 0 1 3 6 -1 -1 2 0 21
|
|
302 SM_AMIGA_1_ 3 -1 2 4 2 3 5 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 3 1 3 5 -1 -1 7 0 21
|
|
303 SM_AMIGA_7_ 3 -1 5 3 1 3 5 -1 -1 4 0 21
|
|
317 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
306 inst_CLK_000_D2 3 -1 7 3 1 3 5 -1 -1 1 0 21
|
|
309 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
312 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
310 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
308 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 5 2 2 3 -1 -1 1 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
307 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
321 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
328 RN_RW 3 70 6 1 6 70 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
314 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
325 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 5 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
63 CLK_030 1 -1 -1 2 0 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 2 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 319 7 5 0 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 328 6 3 0 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 321 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 322 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 325 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 6 0 21
|
|
65 E 5 326 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 1 21
|
|
28 BG_000 5 323 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
324 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 5 4 0 3 5 7 -1 -1 2 0 21
|
|
316 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 2 3 1 2 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_0_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
302 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21
|
|
303 SM_AMIGA_7_ 3 -1 5 2 3 5 -1 -1 4 0 21
|
|
317 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
314 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 3 0 21
|
|
309 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
311 SM_AMIGA_5_ 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
310 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
308 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
306 inst_CLK_000_D2 3 -1 5 2 3 5 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 2 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
307 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
328 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
321 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
325 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 2 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 2 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 2 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
97 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 319 7 5 1 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 328 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 321 7 2 0 6 79 -1 5 0 21
|
|
97 DS_030 5 322 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 325 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 6 0 21
|
|
65 E 5 326 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 324 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 327 3 0 34 -1 2 1 21
|
|
28 BG_000 5 323 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
324 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
305 SM_AMIGA_6_ 3 -1 5 5 0 1 3 5 7 -1 -1 2 0 21
|
|
319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
302 SM_AMIGA_1_ 3 -1 6 4 3 5 6 7 -1 -1 2 0 21
|
|
316 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 4 0 21
|
|
326 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
317 cpu_est_2_ 3 -1 6 3 2 3 6 -1 -1 3 1 21
|
|
315 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 3 0 21
|
|
303 SM_AMIGA_0_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21
|
|
304 SM_AMIGA_7_ 3 -1 5 2 3 5 -1 -1 4 0 21
|
|
314 SM_AMIGA_2_ 3 -1 2 2 2 6 -1 -1 3 0 21
|
|
309 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
327 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
312 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
311 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
310 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
308 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
306 inst_CLK_000_D2 3 -1 5 2 3 5 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 1 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
321 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
307 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
328 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
313 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
325 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
323 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
320 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
299 inst_DTACK_D0 3 -1 0 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
10 CLK_000 1 -1 -1 5 0 1 3 5 7 10 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
109 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 330 7 5 0 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 331 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 341 6 3 0 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 333 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 335 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 338 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 342 3 0 33 -1 6 0 21
|
|
65 E 5 339 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 329 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 337 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 340 3 0 34 -1 2 1 21
|
|
28 BG_000 5 336 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
337 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 0 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 4 2 3 5 6 -1 -1 5 0 21
|
|
330 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
327 cpu_est_1_ 3 -1 5 4 2 3 5 6 -1 -1 4 0 21
|
|
308 SM_AMIGA_7_ 3 -1 2 4 2 3 5 6 -1 -1 4 0 21
|
|
339 RN_E 3 65 6 4 2 3 5 6 65 -1 3 1 21
|
|
306 SM_AMIGA_6_ 3 -1 6 4 0 3 6 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 4 2 3 4 6 -1 -1 1 0 21
|
|
328 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 3 1 21
|
|
326 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_0_ 3 -1 3 3 2 3 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
311 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
340 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
323 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
312 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
310 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 1 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21
|
|
335 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
342 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
341 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
324 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
329 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
325 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
338 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
336 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
331 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
322 CLK_000_P_SYNC_8_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_7_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_6_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_5_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_4_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_3_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_2_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_1_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
314 CLK_000_P_SYNC_0_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 4 1 6 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 5 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
109 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 330 7 5 0 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 331 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 341 6 3 0 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 333 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 335 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 338 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 342 3 0 33 -1 6 0 21
|
|
65 E 5 339 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 329 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 332 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 337 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 340 3 0 34 -1 2 1 21
|
|
28 BG_000 5 336 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
337 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 0 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 4 2 3 5 6 -1 -1 5 0 21
|
|
330 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
327 cpu_est_1_ 3 -1 5 4 2 3 5 6 -1 -1 4 0 21
|
|
308 SM_AMIGA_7_ 3 -1 2 4 2 3 5 6 -1 -1 4 0 21
|
|
339 RN_E 3 65 6 4 2 3 5 6 65 -1 3 1 21
|
|
306 SM_AMIGA_6_ 3 -1 6 4 0 3 6 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 4 2 3 4 6 -1 -1 1 0 21
|
|
328 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 3 1 21
|
|
326 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_0_ 3 -1 3 3 2 3 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
311 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
340 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
323 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
312 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
310 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 1 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21
|
|
335 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
342 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
341 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
324 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 4 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
329 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
325 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
338 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
336 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
331 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
313 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
322 CLK_000_P_SYNC_8_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_7_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_6_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_5_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_4_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_3_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_2_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_1_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
314 CLK_000_P_SYNC_0_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 4 1 6 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 5 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
121 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 342 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 343 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 353 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 345 0 2 0 2 97 -1 7 0 21
|
|
79 RW_000 5 344 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 2 68 -1 1 0 21
|
|
80 DSACK1 5 350 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 354 3 0 33 -1 6 0 21
|
|
65 E 5 351 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 341 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 347 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 346 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 352 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 0 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 5 1 3 5 6 7 -1 -1 1 0 21
|
|
342 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
339 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
351 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 2 3 1 2 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_0_ 3 -1 7 3 3 5 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 2 0 21
|
|
310 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
307 SM_AMIGA_7_ 3 -1 5 2 3 5 -1 -1 4 0 21
|
|
340 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
338 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
352 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
314 SM_AMIGA_5_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 2 3 5 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 2 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 5 2 1 3 -1 -1 1 0 21
|
|
345 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
354 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
353 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
336 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
337 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
350 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
343 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
335 SM_AMIGA_4_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
334 CLK_000_N_SYNC_10_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_9_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_8_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_7_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_6_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_5_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_4_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_3_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_2_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_1_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_0_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
306 CLK_000_N_SYNC_11_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 3 1 5 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 2 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 2 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
123 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 342 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 343 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 354 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 345 0 2 1 6 97 -1 7 0 21
|
|
79 RW_000 5 344 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 1 6 68 -1 1 0 21
|
|
80 DSACK1 5 348 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 6 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 6 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 4 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 355 3 0 33 -1 6 0 21
|
|
65 E 5 352 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 341 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 349 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 347 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 353 3 0 34 -1 2 1 21
|
|
28 BG_000 5 346 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 350 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 356 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
347 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
350 RN_AVEC_EXP 3 21 2 6 0 1 2 3 5 7 21 -1 1 0 21
|
|
309 SM_AMIGA_6_ 3 -1 1 5 0 1 2 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D1 3 -1 3 5 1 4 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 5 1 3 5 6 7 -1 -1 1 0 21
|
|
342 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
304 SM_AMIGA_1_ 3 -1 2 4 2 3 5 7 -1 -1 2 0 21
|
|
356 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 4 0 2 3 5 19 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 3 1 3 5 -1 -1 5 0 21
|
|
339 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_7_ 3 -1 5 3 1 3 5 -1 -1 4 0 21
|
|
352 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
338 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_0_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 5 3 1 3 5 -1 -1 1 0 21
|
|
298 inst_CLK_000_D2 3 -1 4 3 1 3 5 -1 -1 1 0 21
|
|
340 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
312 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
353 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
325 SM_AMIGA_5_ 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 2 2 3 -1 -1 1 0 21
|
|
345 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
355 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
327 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
354 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
349 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
348 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
343 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
326 SM_AMIGA_4_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
337 CLK_000_P_SYNC_8_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
336 CLK_000_P_SYNC_7_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_6_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_5_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_4_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_3_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_2_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_1_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_0_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_10_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_9_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_8_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_7_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_6_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_5_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_4_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
317 CLK_000_N_SYNC_3_ 3 -1 5 1 7 -1 -1 1 0 21
|
|
316 CLK_000_N_SYNC_2_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
315 CLK_000_N_SYNC_1_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
314 CLK_000_N_SYNC_0_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
306 CLK_000_N_SYNC_11_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 4 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
123 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 342 7 4 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 343 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 354 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 345 0 2 0 2 97 -1 7 0 21
|
|
79 RW_000 5 344 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 2 68 -1 1 0 21
|
|
80 DSACK1 5 348 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 355 3 0 33 -1 6 0 21
|
|
65 E 5 352 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 341 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 349 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 347 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 353 3 0 34 -1 2 1 21
|
|
28 BG_000 5 346 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 350 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 356 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
347 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 2 5 0 1 3 6 7 -1 -1 1 0 21
|
|
342 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
350 RN_AVEC_EXP 3 21 2 4 2 3 5 7 21 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 4 0 1 3 7 -1 -1 1 0 21
|
|
339 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
|
|
352 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
309 SM_AMIGA_6_ 3 -1 7 3 2 3 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
356 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 3 2 3 5 19 -1 1 0 21
|
|
310 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
307 SM_AMIGA_7_ 3 -1 3 2 3 7 -1 -1 4 0 21
|
|
340 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
338 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
353 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
326 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 3 2 0 1 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21
|
|
345 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
355 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
327 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
354 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
349 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
328 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
348 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
343 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
325 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
337 CLK_000_P_SYNC_8_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
336 CLK_000_P_SYNC_7_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_6_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_5_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_4_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_3_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_2_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_1_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_0_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_10_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_9_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_8_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_7_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_6_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_5_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_4_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
317 CLK_000_N_SYNC_3_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
316 CLK_000_N_SYNC_2_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
315 CLK_000_N_SYNC_1_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
314 CLK_000_N_SYNC_0_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
306 CLK_000_N_SYNC_11_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 2 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
123 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 342 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 343 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 354 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 344 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 345 0 1 6 97 -1 7 0 21
|
|
80 DSACK1 5 348 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 6 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 6 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 6 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 355 3 0 33 -1 6 0 21
|
|
65 E 5 352 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 341 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 349 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 347 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 353 3 0 34 -1 2 1 21
|
|
28 BG_000 5 346 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 350 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 356 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
347 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 1 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
350 RN_AVEC_EXP 3 21 2 5 0 1 2 3 7 21 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 4 0 2 3 5 -1 -1 5 0 21
|
|
342 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
339 cpu_est_1_ 3 -1 2 4 1 2 3 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_7_ 3 -1 2 4 0 2 3 5 -1 -1 4 0 21
|
|
352 RN_E 3 65 6 4 1 2 3 6 65 -1 3 1 21
|
|
309 SM_AMIGA_6_ 3 -1 0 4 0 2 3 7 -1 -1 2 0 21
|
|
356 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 4 1 2 3 7 19 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 4 0 2 3 6 -1 -1 1 0 21
|
|
340 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 1 21
|
|
338 cpu_est_0_ 3 -1 3 3 2 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 5 3 1 5 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_0_ 3 -1 7 3 2 3 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 2 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
353 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
335 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 4 5 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 5 2 1 3 -1 -1 1 0 21
|
|
345 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
355 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
336 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
354 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
349 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
337 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
348 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
343 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
334 CLK_000_N_SYNC_10_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_9_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_8_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_7_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_6_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_5_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_4_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_3_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_2_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_1_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_0_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
306 CLK_000_N_SYNC_11_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 6 1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 5 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 5 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
123 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 342 7 5 1 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 343 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 352 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 344 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 345 0 1 0 97 -1 7 0 21
|
|
80 DSACK1 5 348 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 0 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 353 3 0 33 -1 7 0 21
|
|
65 E 5 350 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 341 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 356 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 354 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 347 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 351 3 0 34 -1 2 1 21
|
|
28 BG_000 5 346 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 349 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 355 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
347 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
349 RN_AVEC_EXP 3 21 2 5 2 3 5 6 7 21 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 5 2 3 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 4 5 1 3 5 6 7 -1 -1 1 0 21
|
|
342 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
306 SM_AMIGA_0_ 3 -1 2 4 2 3 6 7 -1 -1 3 0 21
|
|
308 SM_AMIGA_6_ 3 -1 6 4 2 3 6 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 1 3 1 3 6 -1 -1 5 0 21
|
|
339 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
|
|
350 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
338 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
309 SM_AMIGA_7_ 3 -1 6 3 1 3 6 -1 -1 3 0 21
|
|
307 SM_AMIGA_1_ 3 -1 2 3 2 3 7 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 5 3 1 5 6 -1 -1 3 0 21
|
|
340 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
337 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
351 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
335 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
355 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 2 2 3 19 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 4 2 4 5 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21
|
|
353 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
345 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
336 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
352 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
348 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
343 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
334 CLK_000_N_SYNC_10_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_9_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_7_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_5_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_4_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_3_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_2_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_1_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
305 CLK_000_N_SYNC_11_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
304 CLK_000_P_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 7 1 5 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 5 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 1 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 1 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 1 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 1 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 1 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 1 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 1 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
123 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 342 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 343 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 354 6 3 4 5 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 344 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 345 0 1 0 97 -1 7 0 21
|
|
80 DSACK1 5 348 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 0 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 355 3 0 33 -1 7 0 21
|
|
65 E 5 352 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 341 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 349 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 347 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 353 3 0 34 -1 2 1 21
|
|
28 BG_000 5 346 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 350 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 356 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
347 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
350 RN_AVEC_EXP 3 21 2 6 1 2 3 5 6 7 21 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 2 6 1 3 4 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
356 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 5 1 2 3 5 6 19 -1 1 0 21
|
|
342 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 1 4 1 3 6 7 -1 -1 3 0 21
|
|
306 SM_AMIGA_0_ 3 -1 6 4 1 3 6 7 -1 -1 3 0 21
|
|
308 SM_AMIGA_6_ 3 -1 1 4 1 3 5 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D2 3 -1 4 4 1 3 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D3 3 -1 1 4 1 3 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 3 1 2 3 -1 -1 5 0 21
|
|
339 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
|
|
309 SM_AMIGA_7_ 3 -1 1 3 1 2 3 -1 -1 4 0 21
|
|
352 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
338 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 2 3 1 2 6 -1 -1 3 0 21
|
|
310 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
340 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
337 SM_AMIGA_2_ 3 -1 5 2 1 5 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
|
|
353 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
335 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 4 2 2 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 2 2 3 5 -1 -1 1 0 21
|
|
355 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21
|
|
345 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
336 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
354 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
349 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
348 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
343 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
334 CLK_000_N_SYNC_10_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_9_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_8_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_7_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_6_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_5_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_3_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_2_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_1_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_0_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 7 1 6 -1 -1 1 0 21
|
|
305 CLK_000_N_SYNC_11_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
304 CLK_000_P_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 5 1 5 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 2 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
123 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 342 7 5 1 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 343 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 354 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 345 0 2 2 5 97 -1 7 0 21
|
|
79 RW_000 5 344 7 2 0 6 79 -1 5 0 21
|
|
68 A0 5 -1 6 2 2 5 68 -1 1 0 21
|
|
80 DSACK1 5 350 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 355 3 0 33 -1 5 0 21
|
|
65 E 5 352 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 341 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 349 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 348 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 347 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 353 3 0 34 -1 2 1 21
|
|
28 BG_000 5 346 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 351 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 356 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
347 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 5 5 1 2 3 6 7 -1 -1 1 0 21
|
|
342 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_6_ 3 -1 3 4 1 2 3 7 -1 -1 2 0 21
|
|
351 RN_AVEC_EXP 3 21 2 4 0 1 2 7 21 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 3 0 3 5 -1 -1 5 0 21
|
|
339 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_7_ 3 -1 0 3 0 3 5 -1 -1 4 0 21
|
|
352 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
340 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 1 21
|
|
338 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_0_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 1 3 0 1 7 -1 -1 2 0 21
|
|
356 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 3 0 1 2 19 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 0 3 0 1 3 -1 -1 1 0 21
|
|
310 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
337 SM_AMIGA_2_ 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
353 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
314 SM_AMIGA_5_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
345 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
355 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
344 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
336 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
354 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
348 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
350 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
343 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
335 SM_AMIGA_4_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
334 CLK_000_N_SYNC_10_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_9_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_8_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_7_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_6_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_5_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_4_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_3_ 3 -1 5 1 7 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_2_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_1_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_0_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
306 CLK_000_N_SYNC_11_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 3 1 1 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 7 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
122 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 342 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 343 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 354 6 3 4 5 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 344 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 345 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 350 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 355 3 0 33 -1 6 0 21
|
|
65 E 5 352 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 341 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 349 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 348 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 347 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 353 3 0 34 -1 2 1 21
|
|
28 BG_000 5 346 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 351 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
347 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
342 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_6_ 3 -1 3 4 3 5 6 7 -1 -1 2 0 21
|
|
339 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
352 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
340 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
338 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 0 3 0 1 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 3 2 3 6 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 5 0 21
|
|
307 SM_AMIGA_7_ 3 -1 3 2 2 3 -1 -1 4 0 21
|
|
337 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
|
|
353 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
314 SM_AMIGA_5_ 3 -1 6 2 5 6 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21
|
|
345 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
355 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
336 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
354 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
348 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
350 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
343 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
335 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
351 RN_AVEC_EXP 3 21 2 1 5 21 -1 1 0 21
|
|
334 CLK_000_N_SYNC_10_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_9_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_8_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_7_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_6_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_5_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_4_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_3_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_2_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_1_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_0_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 4 1 7 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
306 CLK_000_N_SYNC_11_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 6 1 2 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 2 3 4 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
122 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 341 7 5 1 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 342 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 353 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 343 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 344 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 349 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 354 3 0 33 -1 6 0 21
|
|
65 E 5 351 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 340 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 348 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 347 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 346 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 352 3 0 34 -1 2 1 21
|
|
28 BG_000 5 345 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 350 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 355 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
346 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 0 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 5 1 3 5 6 7 -1 -1 1 0 21
|
|
341 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
308 SM_AMIGA_6_ 3 -1 6 4 1 3 6 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 3 2 3 6 -1 -1 5 0 21
|
|
338 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
306 SM_AMIGA_7_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
351 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
339 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 3 1 21
|
|
337 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 5 3 1 5 6 -1 -1 3 0 21
|
|
324 SM_AMIGA_5_ 3 -1 7 3 1 5 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_0_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
303 SM_AMIGA_1_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D2 3 -1 7 3 2 3 6 -1 -1 1 0 21
|
|
336 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21
|
|
311 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
352 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
312 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
310 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 4 2 4 5 -1 -1 1 0 21
|
|
344 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
354 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
335 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
353 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
343 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
340 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
349 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
345 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
342 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
334 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
355 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 5 19 -1 1 0 21
|
|
350 RN_AVEC_EXP 3 21 2 1 5 21 -1 1 0 21
|
|
333 CLK_000_P_SYNC_8_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_7_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_6_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_5_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_4_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_3_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_2_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_1_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_0_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_10_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_9_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_8_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_7_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_6_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_5_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
317 CLK_000_N_SYNC_4_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
316 CLK_000_N_SYNC_3_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
315 CLK_000_N_SYNC_2_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
314 CLK_000_N_SYNC_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
313 CLK_000_N_SYNC_0_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
305 CLK_000_N_SYNC_11_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
304 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
302 inst_CLK_000_D3 3 -1 2 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 5 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 2 3 4 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
122 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 342 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 343 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 354 6 3 4 5 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 344 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 345 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 350 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 355 3 0 33 -1 6 0 21
|
|
65 E 5 352 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 341 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 349 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 348 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 347 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 353 3 0 34 -1 2 1 21
|
|
28 BG_000 5 346 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 351 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
347 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
342 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_6_ 3 -1 3 4 3 5 6 7 -1 -1 2 0 21
|
|
339 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
352 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
340 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
338 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 0 3 0 1 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 3 2 3 6 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 5 0 21
|
|
307 SM_AMIGA_7_ 3 -1 3 2 2 3 -1 -1 4 0 21
|
|
337 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
|
|
353 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
314 SM_AMIGA_5_ 3 -1 6 2 5 6 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21
|
|
345 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
355 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
336 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
354 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
348 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
350 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
343 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
335 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
351 RN_AVEC_EXP 3 21 2 1 5 21 -1 1 0 21
|
|
334 CLK_000_N_SYNC_10_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_9_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_8_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_7_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_6_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_5_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_4_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_3_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_2_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_1_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_0_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 4 1 7 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
306 CLK_000_N_SYNC_11_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 6 1 2 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 2 3 4 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
122 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 342 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 343 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 354 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 344 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 345 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 350 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 355 3 0 33 -1 6 0 21
|
|
65 E 5 352 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 341 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 349 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 348 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 347 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 353 3 0 34 -1 2 1 21
|
|
28 BG_000 5 346 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 351 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
347 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 1 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 5 5 1 3 5 6 7 -1 -1 1 0 21
|
|
342 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
339 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
352 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
338 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 0 3 0 1 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_0_ 3 -1 7 3 3 5 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
307 SM_AMIGA_7_ 3 -1 5 2 3 5 -1 -1 4 0 21
|
|
340 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
337 SM_AMIGA_2_ 3 -1 1 2 1 2 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
353 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
335 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
351 RN_AVEC_EXP 3 21 2 2 1 2 21 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 2 3 5 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 2 1 3 -1 -1 1 0 21
|
|
345 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
355 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
336 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
354 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
348 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
350 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
343 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
334 CLK_000_N_SYNC_10_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_9_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_6_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_5_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_4_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_3_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_2_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_1_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_0_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
306 CLK_000_N_SYNC_11_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 3 1 5 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 7 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
123 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 342 7 4 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 343 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 354 6 3 4 5 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 345 0 2 0 1 97 -1 7 0 21
|
|
79 RW_000 5 344 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 1 68 -1 1 0 21
|
|
80 DSACK1 5 348 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 355 3 0 33 -1 6 0 21
|
|
65 E 5 351 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 341 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 352 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 347 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 353 3 0 34 -1 2 1 21
|
|
28 BG_000 5 346 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 349 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 356 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 2 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
347 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
342 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_6_ 3 -1 3 4 3 5 6 7 -1 -1 2 0 21
|
|
339 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
351 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
304 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 3 3 5 6 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 5 0 21
|
|
307 SM_AMIGA_7_ 3 -1 3 2 3 7 -1 -1 4 0 21
|
|
340 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
338 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
337 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
353 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
335 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 6 2 5 6 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 3 2 3 7 -1 -1 2 0 21
|
|
356 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 2 3 5 19 -1 1 0 21
|
|
349 RN_AVEC_EXP 3 21 2 2 2 5 21 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 1 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21
|
|
345 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
355 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
336 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
354 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
352 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
348 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
343 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
334 CLK_000_N_SYNC_10_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_9_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_8_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_7_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_5_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_4_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_3_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_2_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_1_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_0_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
306 CLK_000_N_SYNC_11_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 6 1 5 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 5 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 2 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
122 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 342 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 343 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 354 6 3 4 5 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 344 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 345 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 350 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 355 3 0 33 -1 6 0 21
|
|
65 E 5 352 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 341 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 349 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 348 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 347 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 353 3 0 34 -1 2 1 21
|
|
28 BG_000 5 346 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 351 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
347 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
342 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_6_ 3 -1 3 4 3 5 6 7 -1 -1 2 0 21
|
|
339 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
352 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
340 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
338 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 0 3 0 1 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 3 2 3 6 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 5 0 21
|
|
307 SM_AMIGA_7_ 3 -1 3 2 2 3 -1 -1 4 0 21
|
|
337 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
|
|
353 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
314 SM_AMIGA_5_ 3 -1 6 2 5 6 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21
|
|
345 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
355 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
336 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
354 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
348 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
350 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
343 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
335 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
351 RN_AVEC_EXP 3 21 2 1 5 21 -1 1 0 21
|
|
334 CLK_000_N_SYNC_10_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_9_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_8_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_7_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_6_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_5_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_4_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_3_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_2_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_1_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_0_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 4 1 7 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
306 CLK_000_N_SYNC_11_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 6 1 2 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 2 3 4 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
122 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 342 7 5 1 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 343 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 354 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 345 0 2 1 5 97 -1 7 0 21
|
|
79 RW_000 5 344 7 2 0 6 79 -1 5 0 21
|
|
68 A0 5 -1 6 2 1 5 68 -1 1 0 21
|
|
80 DSACK1 5 349 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 355 3 0 33 -1 6 0 21
|
|
65 E 5 352 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 341 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 350 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 348 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 347 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 353 3 0 34 -1 2 1 21
|
|
28 BG_000 5 346 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 351 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
347 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
342 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
351 RN_AVEC_EXP 3 21 2 4 0 2 5 7 21 -1 1 0 21
|
|
339 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 4 0 21
|
|
352 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
340 cpu_est_2_ 3 -1 6 3 2 3 6 -1 -1 3 1 21
|
|
338 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 3 0 21
|
|
309 SM_AMIGA_6_ 3 -1 3 3 1 3 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 7 3 3 5 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 3 2 3 5 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
307 SM_AMIGA_7_ 3 -1 5 2 3 5 -1 -1 4 0 21
|
|
337 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
353 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
335 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 1 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
345 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
355 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
344 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
336 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
354 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
350 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
348 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
349 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
343 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
334 CLK_000_N_SYNC_10_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_9_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_8_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_7_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_6_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_5_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_4_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_3_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_1_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_0_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 5 1 7 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
306 CLK_000_N_SYNC_11_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 5 1 2 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
122 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 342 7 5 1 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 343 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 354 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 345 0 2 1 5 97 -1 7 0 21
|
|
79 RW_000 5 344 7 2 0 6 79 -1 5 0 21
|
|
68 A0 5 -1 6 2 1 5 68 -1 1 0 21
|
|
80 DSACK1 5 349 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 355 3 0 33 -1 6 0 21
|
|
65 E 5 352 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 341 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 350 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 348 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 347 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 353 3 0 34 -1 2 1 21
|
|
28 BG_000 5 346 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 351 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
347 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21
|
|
342 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
351 RN_AVEC_EXP 3 21 2 4 0 2 5 7 21 -1 1 0 21
|
|
339 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 4 0 21
|
|
352 RN_E 3 65 6 3 2 3 6 65 -1 3 1 21
|
|
340 cpu_est_2_ 3 -1 6 3 2 3 6 -1 -1 3 1 21
|
|
338 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 3 0 21
|
|
309 SM_AMIGA_6_ 3 -1 3 3 1 3 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 7 3 3 5 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 3 2 3 5 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
307 SM_AMIGA_7_ 3 -1 5 2 3 5 -1 -1 4 0 21
|
|
337 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
353 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
335 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 1 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
345 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
355 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
344 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
336 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
354 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
350 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
348 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
349 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
343 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
334 CLK_000_N_SYNC_10_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_9_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_8_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_7_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_6_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_5_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_4_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_3_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_1_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_0_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 5 1 7 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
306 CLK_000_N_SYNC_11_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 5 1 2 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
123 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 343 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 344 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 355 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 345 7 2 0 6 79 -1 5 0 21
|
|
97 DS_030 5 346 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 349 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 356 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 342 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 348 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 347 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 352 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 4 7 0 1 3 4 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 4 6 7 -1 -1 1 0 21
|
|
348 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
343 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_6_ 3 -1 6 4 2 3 6 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 4 4 0 3 5 6 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 3 3 5 6 -1 -1 5 0 21
|
|
340 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_7_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
353 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
339 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 2 3 1 2 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_0_ 3 -1 7 3 3 5 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
352 RN_AVEC_EXP 3 21 2 3 1 5 7 21 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 3 2 4 7 -1 -1 1 0 21
|
|
341 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
338 SM_AMIGA_2_ 3 -1 1 2 0 1 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
314 SM_AMIGA_5_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
295 inst_VPA_D 3 -1 2 2 1 3 -1 -1 1 0 21
|
|
346 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
356 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
345 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
337 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
355 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
342 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
349 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
347 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
344 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
336 SM_AMIGA_4_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
335 CLK_000_N_SYNC_10_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_9_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_6_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_5_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_4_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_3_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_2_ 3 -1 5 1 7 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_1_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_0_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_9_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
306 CLK_000_N_SYNC_11_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_10_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 3 1 0 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 5 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 2 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
124 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 4 5 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 5 0 21
|
|
97 DS_030 5 347 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 350 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 352 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 351 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 7 0 1 3 4 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_6_ 3 -1 6 4 3 5 6 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 4 4 0 1 3 6 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 3 2 3 6 -1 -1 5 0 21
|
|
341 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
307 SM_AMIGA_7_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
354 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 5 3 1 5 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_0_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
353 RN_AVEC_EXP 3 21 2 3 5 6 7 21 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
340 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21
|
|
339 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
314 SM_AMIGA_5_ 3 -1 7 2 5 7 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
303 inst_CLK_000_D3 3 -1 3 2 0 1 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 4 5 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
338 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
352 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
351 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
350 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
337 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
336 CLK_000_N_SYNC_10_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_8_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_7_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_6_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_5_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_4_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_3_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_2_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_1_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_0_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_10_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_9_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 7 1 6 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 4 1 7 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
306 CLK_000_N_SYNC_11_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_11_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 5 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 2 3 4 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 2 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
122 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 342 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 343 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 354 6 3 4 5 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 344 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 345 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 350 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 355 3 0 33 -1 6 0 21
|
|
65 E 5 352 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 341 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 349 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 348 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 347 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 353 3 0 34 -1 2 1 21
|
|
28 BG_000 5 346 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 351 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
347 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
342 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_6_ 3 -1 3 4 3 5 6 7 -1 -1 2 0 21
|
|
339 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
352 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
340 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
|
|
338 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 0 3 0 1 6 -1 -1 3 0 21
|
|
304 SM_AMIGA_1_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 3 2 3 6 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 5 0 21
|
|
307 SM_AMIGA_7_ 3 -1 3 2 2 3 -1 -1 4 0 21
|
|
337 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
|
|
353 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
314 SM_AMIGA_5_ 3 -1 6 2 5 6 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21
|
|
345 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
355 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
336 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
354 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
348 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
350 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
343 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
335 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
351 RN_AVEC_EXP 3 21 2 1 5 21 -1 1 0 21
|
|
334 CLK_000_N_SYNC_10_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_9_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_8_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_7_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_6_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_5_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_4_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_3_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_2_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_1_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_0_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 4 1 7 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
306 CLK_000_N_SYNC_11_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 6 1 2 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 2 3 4 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
121 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 342 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 343 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 353 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 345 0 2 0 2 97 -1 7 0 21
|
|
79 RW_000 5 344 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 2 68 -1 1 0 21
|
|
80 DSACK1 5 350 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 354 3 0 33 -1 6 0 21
|
|
65 E 5 351 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 341 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 347 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 346 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 352 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 0 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 7 5 1 3 5 6 7 -1 -1 1 0 21
|
|
342 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
339 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
351 RN_E 3 65 6 3 1 3 6 65 -1 3 1 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 2 3 1 2 6 -1 -1 3 0 21
|
|
308 SM_AMIGA_0_ 3 -1 7 3 3 5 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 2 0 21
|
|
310 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
307 SM_AMIGA_7_ 3 -1 5 2 3 5 -1 -1 4 0 21
|
|
340 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
338 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
352 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
314 SM_AMIGA_5_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 2 3 5 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 2 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 5 2 1 3 -1 -1 1 0 21
|
|
345 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
354 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
353 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
336 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
337 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
350 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
343 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
335 SM_AMIGA_4_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
334 CLK_000_N_SYNC_10_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_9_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_8_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_7_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_6_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_5_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_4_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_3_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_2_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_1_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_0_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
306 CLK_000_N_SYNC_11_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 3 1 5 -1 -1 1 0 21
|
|
299 inst_DTACK_D0 3 -1 2 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 2 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
110 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 331 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 332 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 342 6 3 4 5 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 333 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 334 0 1 0 97 -1 7 0 21
|
|
80 DSACK1 5 339 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 0 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 6 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 343 3 0 33 -1 6 0 21
|
|
65 E 5 340 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 330 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 336 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 335 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 338 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 341 3 0 34 -1 2 1 21
|
|
28 BG_000 5 337 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
338 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 5 1 2 3 5 7 -1 -1 1 0 21
|
|
328 cpu_est_1_ 3 -1 5 4 1 3 5 6 -1 -1 5 0 21
|
|
340 RN_E 3 65 6 4 1 3 5 6 65 -1 4 0 21
|
|
331 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D0 3 -1 5 4 1 3 5 7 -1 -1 1 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
329 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
309 SM_AMIGA_7_ 3 -1 5 3 2 3 5 -1 -1 4 0 21
|
|
327 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 7 3 3 5 7 -1 -1 2 0 21
|
|
307 SM_AMIGA_6_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D2 3 -1 2 3 3 5 7 -1 -1 1 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
341 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
314 SM_AMIGA_5_ 3 -1 5 2 1 5 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 2 2 2 4 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 0 2 1 3 -1 -1 1 0 21
|
|
293 inst_avec_expreg 3 -1 4 2 5 6 -1 -1 1 0 21
|
|
334 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
343 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
342 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
325 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
336 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
335 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
333 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
330 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
326 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
339 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
337 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
332 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
324 SM_AMIGA_4_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 7 1 5 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 6 1 1 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 4 1 6 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
110 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 331 7 5 0 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 332 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 342 6 3 0 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 334 7 2 0 6 79 -1 5 0 21
|
|
97 DS_030 5 336 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 339 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 343 3 0 33 -1 6 0 21
|
|
65 E 5 340 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 330 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 335 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 338 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 341 3 0 34 -1 2 1 21
|
|
28 BG_000 5 337 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
338 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D0 3 -1 4 6 0 1 2 3 5 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 5 1 2 3 5 7 -1 -1 1 0 21
|
|
293 inst_avec_expreg 3 -1 2 5 0 3 5 6 7 -1 -1 1 0 21
|
|
331 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_6_ 3 -1 5 4 0 3 5 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 2 4 2 3 5 7 -1 -1 2 0 21
|
|
328 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
340 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
307 SM_AMIGA_7_ 3 -1 5 3 2 3 5 -1 -1 4 0 21
|
|
327 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 7 3 2 3 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D2 3 -1 2 3 0 3 5 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 2 3 0 1 2 -1 -1 1 0 21
|
|
329 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
326 SM_AMIGA_2_ 3 -1 5 2 5 7 -1 -1 3 0 21
|
|
312 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
341 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
324 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 2 0 21
|
|
314 SM_AMIGA_5_ 3 -1 7 2 0 7 -1 -1 2 0 21
|
|
313 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
311 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
296 inst_VPA_D 3 -1 2 2 3 5 -1 -1 1 0 21
|
|
336 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
343 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
334 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
342 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
325 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 0 21
|
|
335 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
330 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
339 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
337 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
332 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 0 1 5 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 0 1 1 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
123 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 355 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 347 0 2 0 2 97 -1 7 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 5 0 21
|
|
68 A0 5 -1 6 2 0 2 68 -1 1 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 356 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 349 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 348 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 351 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 350 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
351 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D0 3 -1 1 5 1 2 3 5 7 -1 -1 1 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
299 inst_CLK_000_D1 3 -1 7 4 1 3 5 7 -1 -1 1 0 21
|
|
293 inst_avec_expreg 3 -1 6 4 2 3 6 7 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 3 1 3 6 65 -1 4 0 21
|
|
310 SM_AMIGA_6_ 3 -1 3 3 2 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 7 3 3 5 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 2 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
342 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
312 SM_AMIGA_7_ 3 -1 5 2 3 5 -1 -1 4 0 21
|
|
315 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
316 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
314 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 4 2 2 6 -1 -1 1 0 21
|
|
303 inst_CLK_000_D2 3 -1 7 2 3 5 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
356 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
313 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
355 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
338 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 4 0 21
|
|
349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
348 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
339 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
350 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
336 CLK_000_N_SYNC_10_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_9_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_8_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_7_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_6_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_5_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_4_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_3_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_2_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_1_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_0_ 3 -1 5 1 7 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_8_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_7_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_6_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_5_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_4_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_3_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_2_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_1_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
307 inst_CLK_000_NE 3 -1 0 1 2 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 5 1 5 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 1 1 1 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 4 1 6 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
123 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 355 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 5 0 21
|
|
97 DS_030 5 347 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 4 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 356 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
293 inst_avec_expreg 3 -1 5 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 1 5 1 3 5 6 7 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 2 4 1 2 3 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 4 1 2 3 6 65 -1 4 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
311 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 7 4 1 3 5 7 -1 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 0 3 0 1 6 -1 -1 3 0 21
|
|
340 cpu_est_0_ 3 -1 3 3 2 3 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 5 3 0 4 5 -1 -1 1 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
310 SM_AMIGA_7_ 3 -1 3 2 3 5 -1 -1 4 0 21
|
|
339 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
316 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
314 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 1 2 2 5 -1 -1 1 0 21
|
|
303 inst_CLK_000_D2 3 -1 7 2 3 5 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 2 2 1 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
356 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
338 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
313 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
355 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
336 CLK_000_N_SYNC_10_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_9_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_6_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_5_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_4_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_3_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_1_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_8_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_7_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_6_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_5_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_4_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_3_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_2_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_1_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_0_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
307 inst_CLK_000_NE 3 -1 1 1 2 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 5 1 5 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 4 1 1 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 4 1 0 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
122 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 343 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 344 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 354 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 345 7 2 0 6 79 -1 5 0 21
|
|
97 DS_030 5 346 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 351 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 355 3 0 33 -1 6 0 21
|
|
65 E 5 352 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 342 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 349 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 347 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 350 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 353 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
350 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 5 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
293 inst_avec_expreg 3 -1 2 5 1 2 3 6 7 -1 -1 1 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 5 4 0 2 3 5 -1 -1 5 0 21
|
|
343 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_7_ 3 -1 0 4 0 2 3 5 -1 -1 4 0 21
|
|
310 SM_AMIGA_6_ 3 -1 2 4 1 2 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 4 0 2 3 5 -1 -1 1 0 21
|
|
340 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 5 0 21
|
|
352 RN_E 3 65 6 3 1 3 6 65 -1 4 0 21
|
|
308 SM_AMIGA_0_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 2 0 21
|
|
341 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
338 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
314 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
353 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
339 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
315 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
313 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
346 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
355 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
345 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
337 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
312 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
354 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
342 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
351 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
344 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
336 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
335 CLK_000_P_SYNC_8_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_7_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_6_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_5_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_4_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_3_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_2_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_1_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_10_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_9_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_8_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_7_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_6_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_5_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_4_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_3_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_2_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
317 CLK_000_N_SYNC_1_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
316 CLK_000_N_SYNC_0_ 3 -1 5 1 7 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
306 inst_CLK_000_NE 3 -1 7 1 1 -1 -1 1 0 21
|
|
305 CLK_000_P_SYNC_9_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 3 1 5 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 0 1 6 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 1 3 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
123 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 355 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 347 0 2 0 2 97 -1 7 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 5 0 21
|
|
68 A0 5 -1 6 2 0 2 68 -1 1 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 356 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
293 inst_avec_expreg 3 -1 5 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 5 1 2 3 5 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 4 5 0 1 3 5 7 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 5 4 1 3 5 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 4 1 3 5 6 65 -1 4 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
311 SM_AMIGA_6_ 3 -1 2 4 2 3 6 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D2 3 -1 2 4 2 3 4 5 -1 -1 1 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 5 3 2 3 5 -1 -1 5 0 21
|
|
342 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 3 3 2 3 5 -1 -1 4 0 21
|
|
340 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 2 0 21
|
|
307 inst_CLK_000_NE 3 -1 1 3 1 2 6 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 2 3 0 2 6 -1 -1 1 0 21
|
|
330 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
|
|
315 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
328 SM_AMIGA_5_ 3 -1 6 2 2 6 -1 -1 2 0 21
|
|
316 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
314 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 1 2 2 5 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 5 2 1 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
356 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
329 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
313 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
355 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
339 CLK_000_P_SYNC_8_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
338 CLK_000_P_SYNC_7_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
337 CLK_000_P_SYNC_6_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
336 CLK_000_P_SYNC_5_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_4_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_3_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_2_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_1_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_0_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_8_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_7_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_6_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_5_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_4_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_3_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_2_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_1_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
317 CLK_000_N_SYNC_0_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 4 1 5 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 2 1 1 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 0 1 6 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
123 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 355 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 5 0 21
|
|
97 DS_030 5 347 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 4 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 356 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
293 inst_avec_expreg 3 -1 5 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 1 5 1 3 5 6 7 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 2 4 1 2 3 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 4 1 2 3 6 65 -1 4 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
311 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 7 4 1 3 5 7 -1 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 0 3 0 1 6 -1 -1 3 0 21
|
|
340 cpu_est_0_ 3 -1 3 3 2 3 6 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 5 3 0 4 5 -1 -1 1 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
310 SM_AMIGA_7_ 3 -1 3 2 3 5 -1 -1 4 0 21
|
|
339 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
315 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
316 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
314 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 1 2 2 5 -1 -1 1 0 21
|
|
303 inst_CLK_000_D2 3 -1 7 2 3 5 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 2 2 1 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
356 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
338 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
313 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
355 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
336 CLK_000_N_SYNC_10_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_9_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_6_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_5_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_4_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_3_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_1_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_8_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_7_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_6_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_5_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_4_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_3_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_2_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_1_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_0_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
307 inst_CLK_000_NE 3 -1 1 1 2 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 5 1 5 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 4 1 1 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 4 1 0 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
123 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 355 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 347 0 2 0 2 97 -1 7 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 5 0 21
|
|
68 A0 5 -1 6 2 0 2 68 -1 1 0 21
|
|
80 DSACK1 5 351 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 356 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 352 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 0 7 0 1 2 3 4 5 7 -1 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
293 inst_avec_expreg 3 -1 6 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 4 5 0 1 3 5 7 -1 -1 1 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
311 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
341 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 3 1 3 6 65 -1 4 0 21
|
|
309 SM_AMIGA_0_ 3 -1 3 3 3 5 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D2 3 -1 7 3 0 3 5 -1 -1 1 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
342 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 5 2 3 5 -1 -1 4 0 21
|
|
339 SM_AMIGA_2_ 3 -1 1 2 1 2 -1 -1 3 0 21
|
|
315 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
316 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
314 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 2 2 2 6 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 0 2 1 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
356 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
338 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
313 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
355 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
352 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
351 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
336 CLK_000_N_SYNC_10_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_9_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_8_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_7_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_6_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_5_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_4_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_3_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_2_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_1_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_0_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_8_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_7_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_6_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_5_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_4_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_3_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_2_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_1_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_0_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
307 inst_CLK_000_NE 3 -1 0 1 2 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 3 1 0 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 7 1 1 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 5 1 6 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
123 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 355 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 5 0 21
|
|
97 DS_030 5 347 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 356 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 349 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 350 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
350 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
293 inst_avec_expreg 3 -1 6 6 0 2 3 5 6 7 -1 -1 1 0 21
|
|
311 SM_AMIGA_6_ 3 -1 6 5 0 2 3 6 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 5 1 2 3 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 3 5 0 1 2 3 7 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 5 4 2 3 5 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 4 2 3 5 6 65 -1 4 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
305 SM_AMIGA_1_ 3 -1 1 4 0 1 3 7 -1 -1 2 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 5 3 3 5 6 -1 -1 5 0 21
|
|
342 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
309 SM_AMIGA_7_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
|
|
340 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
306 inst_CLK_000_NE 3 -1 1 3 0 1 3 -1 -1 1 0 21
|
|
303 inst_CLK_000_D2 3 -1 7 3 3 6 7 -1 -1 1 0 21
|
|
339 SM_AMIGA_2_ 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
315 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
316 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
314 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 2 2 2 6 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 4 2 1 4 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 2 2 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
356 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
338 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
313 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
355 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
349 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
336 CLK_000_N_SYNC_10_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_9_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_8_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_7_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_6_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_5_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_4_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_3_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_2_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_1_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_0_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_8_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_7_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_6_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_5_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_4_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_3_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_2_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_1_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_0_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 0 1 2 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 4 1 1 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 0 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
123 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 355 6 3 4 5 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 347 0 1 5 97 -1 7 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 5 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 5 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 356 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 349 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 350 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 inst_avec_expreg 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
350 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
311 SM_AMIGA_6_ 3 -1 5 4 0 3 5 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D2 3 -1 3 4 2 3 5 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 5 4 1 3 6 7 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 3 3 1 3 6 -1 -1 5 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 3 1 3 6 65 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 2 3 2 3 5 -1 -1 4 0 21
|
|
340 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 0 3 0 1 5 -1 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 7 3 2 3 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 2 0 21
|
|
342 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
315 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
316 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
314 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 5 2 1 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
356 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
313 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
355 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
349 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
339 SM_AMIGA_2_ 3 -1 1 1 1 -1 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
336 CLK_000_N_SYNC_10_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_9_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_8_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_7_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_6_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_5_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_4_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_3_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_2_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_0_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_8_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_7_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_6_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_5_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_3_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_2_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_1_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_0_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
307 inst_CLK_000_NE 3 -1 5 1 0 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 3 1 6 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 0 1 1 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 4 1 6 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
123 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 1 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 355 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 5 0 21
|
|
97 DS_030 5 347 0 1 0 97 -1 7 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 0 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 356 3 0 33 -1 5 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 7 5 1 2 3 6 7 -1 -1 1 0 21
|
|
293 inst_avec_expreg 3 -1 4 5 1 2 3 6 7 -1 -1 1 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
311 SM_AMIGA_6_ 3 -1 6 4 1 3 6 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D2 3 -1 2 4 1 2 3 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 5 4 1 2 3 7 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 5 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 5 3 3 5 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 3 2 3 6 65 -1 4 0 21
|
|
309 SM_AMIGA_7_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 5 3 1 5 6 -1 -1 3 0 21
|
|
307 inst_CLK_000_NE 3 -1 0 3 2 6 7 -1 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
315 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 6 2 2 6 -1 -1 2 0 21
|
|
316 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
314 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 2 2 2 7 -1 -1 2 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 0 2 2 4 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 2 2 1 2 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 5 2 4 5 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 4 2 2 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
356 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 5 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
338 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
313 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
355 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
339 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
336 CLK_000_N_SYNC_10_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_9_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_8_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_7_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_6_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_5_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_4_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_3_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_2_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_1_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_0_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_8_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_7_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_6_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_5_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_4_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_3_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_2_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_1_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_0_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 5 1 2 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 4 1 5 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
125 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 346 7 5 0 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 347 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 357 6 3 0 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 348 7 2 0 6 79 -1 5 0 21
|
|
97 DS_030 5 349 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 354 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 358 3 0 33 -1 6 0 21
|
|
65 E 5 355 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 345 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 353 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 352 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 351 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 356 3 0 34 -1 2 1 21
|
|
28 BG_000 5 350 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
293 inst_avec_expreg 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
351 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
298 inst_CLK_000_D0 3 -1 6 5 1 2 3 5 7 -1 -1 1 0 21
|
|
343 cpu_est_1_ 3 -1 3 4 1 3 5 6 -1 -1 5 0 21
|
|
355 RN_E 3 65 6 4 1 3 5 6 65 -1 4 0 21
|
|
346 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
342 cpu_est_0_ 3 -1 0 4 0 3 5 6 -1 -1 2 0 21
|
|
313 SM_AMIGA_6_ 3 -1 5 4 0 3 5 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 5 4 1 3 5 7 -1 -1 1 0 21
|
|
344 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_1_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 3 3 5 7 -1 -1 1 0 21
|
|
315 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
312 SM_AMIGA_7_ 3 -1 3 2 3 5 -1 -1 4 0 21
|
|
341 SM_AMIGA_2_ 3 -1 1 2 1 2 -1 -1 3 0 21
|
|
317 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 2 2 2 5 -1 -1 3 0 21
|
|
356 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
318 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
316 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
314 SM_AMIGA_4_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 4 2 2 4 -1 -1 1 0 21
|
|
300 inst_CLK_000_D3 3 -1 7 2 5 7 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21
|
|
349 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
358 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
348 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
340 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
357 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
345 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
354 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
350 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
347 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
339 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
338 CLK_000_N_SYNC_10_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
337 CLK_000_N_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_8_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_7_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_6_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_5_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_4_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_3_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_2_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_1_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_0_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_8_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_7_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_6_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_5_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_4_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_3_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_2_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_1_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_0_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
309 CLK_000_N_SYNC_11_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
308 inst_CLK_000_NE 3 -1 0 1 0 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 5 1 6 -1 -1 1 0 21
|
|
301 inst_DTACK_D0 3 -1 0 1 1 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 4 1 2 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
126 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 347 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 348 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 358 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 350 0 2 0 6 97 -1 7 0 21
|
|
79 RW_000 5 349 7 2 0 6 79 -1 5 0 21
|
|
68 A0 5 -1 6 2 0 6 68 -1 1 0 21
|
|
80 DSACK1 5 355 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 6 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 6 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 359 3 0 33 -1 6 0 21
|
|
65 E 5 356 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 346 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 354 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 353 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 352 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 357 3 0 34 -1 2 1 21
|
|
28 BG_000 5 351 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
352 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
293 inst_avec_expreg 3 -1 1 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D1 3 -1 7 5 1 2 3 5 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D0 3 -1 4 5 1 2 3 5 7 -1 -1 1 0 21
|
|
347 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
314 SM_AMIGA_6_ 3 -1 3 4 1 2 3 7 -1 -1 2 0 21
|
|
304 inst_CLK_000_D2 3 -1 7 4 1 3 5 7 -1 -1 1 0 21
|
|
344 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 5 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 5 3 1 3 5 -1 -1 5 0 21
|
|
356 RN_E 3 65 6 3 2 3 6 65 -1 4 0 21
|
|
313 SM_AMIGA_7_ 3 -1 1 3 1 3 5 -1 -1 4 0 21
|
|
312 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
|
|
302 inst_CLK_OUT_PRE_50 3 -1 5 3 0 4 5 -1 -1 1 0 21
|
|
316 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
345 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
342 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 3 0 21
|
|
318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
357 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
343 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
340 SM_AMIGA_5_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
319 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
317 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
309 inst_CLK_000_NE 3 -1 0 2 1 2 -1 -1 1 0 21
|
|
308 CLK_000_P_SYNC_9_ 3 -1 2 2 1 2 -1 -1 1 0 21
|
|
307 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_OUT_PRE 3 -1 0 2 0 6 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 2 2 2 3 -1 -1 1 0 21
|
|
350 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
359 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
349 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
341 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
358 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
354 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
353 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
303 inst_CLK_OUT_PRE_25 3 -1 0 1 0 -1 -1 3 0 21
|
|
355 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
348 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
315 SM_AMIGA_4_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
339 CLK_000_N_SYNC_10_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
338 CLK_000_N_SYNC_9_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
337 CLK_000_N_SYNC_8_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_7_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_6_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_5_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_4_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_3_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_2_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_1_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_0_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_8_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_7_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_6_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_5_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_4_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_3_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
310 CLK_000_N_SYNC_11_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_NE 3 -1 6 1 7 -1 -1 1 0 21
|
|
305 inst_CLK_000_D3 3 -1 7 1 5 -1 -1 1 0 21
|
|
301 inst_DTACK_D0 3 -1 0 1 2 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 4 1 0 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
125 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 346 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 347 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 357 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 349 0 2 0 1 97 -1 7 0 21
|
|
79 RW_000 5 348 7 2 0 6 79 -1 5 0 21
|
|
68 A0 5 -1 6 2 0 1 68 -1 1 0 21
|
|
80 DSACK1 5 353 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 358 3 0 33 -1 6 0 21
|
|
65 E 5 355 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 345 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 354 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 352 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 351 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 356 3 0 34 -1 2 1 21
|
|
28 BG_000 5 350 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
351 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 5 1 2 3 5 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 4 5 1 2 3 5 7 -1 -1 1 0 21
|
|
293 inst_avec_expreg 3 -1 2 5 2 3 5 6 7 -1 -1 1 0 21
|
|
346 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
313 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
343 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 5 0 21
|
|
355 RN_E 3 65 6 3 2 3 6 65 -1 4 0 21
|
|
342 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
294 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
344 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
312 SM_AMIGA_7_ 3 -1 3 2 3 5 -1 -1 4 0 21
|
|
317 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 4 -1 -1 3 0 21
|
|
356 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
318 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
316 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
306 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21
|
|
303 inst_CLK_000_D2 3 -1 3 2 3 5 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 4 2 1 4 -1 -1 1 0 21
|
|
296 inst_VPA_D 3 -1 7 2 2 3 -1 -1 1 0 21
|
|
349 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
358 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
348 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
340 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
315 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
357 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
354 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
345 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
341 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
353 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
350 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
347 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
339 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
314 SM_AMIGA_4_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
338 CLK_000_N_SYNC_10_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
337 CLK_000_N_SYNC_9_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_8_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_7_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_4_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_3_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_2_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_1_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_0_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_8_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_7_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_6_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_5_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_4_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_3_ 3 -1 5 1 7 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_2_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_1_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_0_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
310 CLK_000_N_SYNC_11_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
309 inst_CLK_000_NE 3 -1 5 1 2 -1 -1 1 0 21
|
|
308 CLK_000_P_SYNC_9_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
307 inst_CLK_OUT_PRE 3 -1 4 1 5 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 5 1 5 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 7 1 2 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE_50_D 3 -1 4 1 1 -1 -1 1 0 21
|
|
295 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 7 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
125 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 345 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 346 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 357 6 3 4 5 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 347 7 2 0 6 79 -1 5 0 21
|
|
97 DS_030 5 348 0 1 5 97 -1 7 0 21
|
|
80 DSACK1 5 351 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 5 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 5 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 358 3 0 33 -1 6 0 21
|
|
65 E 5 355 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 344 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 354 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 352 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 350 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 356 3 0 34 -1 2 1 21
|
|
28 BG_000 5 349 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
350 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
353 RN_AVEC_EXP 3 21 2 6 0 1 3 5 6 7 21 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 0 5 1 2 3 5 7 -1 -1 1 0 21
|
|
342 cpu_est_1_ 3 -1 6 4 0 1 3 6 -1 -1 5 0 21
|
|
355 RN_E 3 65 6 4 0 1 3 6 65 -1 4 0 21
|
|
345 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
303 inst_CLK_000_D2 3 -1 7 4 0 1 2 3 -1 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 7 4 1 2 3 7 -1 -1 1 0 21
|
|
343 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 4 0 21
|
|
341 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 2 0 21
|
|
312 SM_AMIGA_6_ 3 -1 3 3 3 5 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 3 3 2 3 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
306 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21
|
|
314 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 5 0 21
|
|
311 SM_AMIGA_7_ 3 -1 2 2 2 3 -1 -1 4 0 21
|
|
340 SM_AMIGA_2_ 3 -1 1 2 1 5 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 6 2 2 6 -1 -1 3 0 21
|
|
356 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
317 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 5 2 1 5 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 2 2 2 5 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 1 3 -1 -1 1 0 21
|
|
348 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
358 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
347 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
339 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
357 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
354 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
351 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
346 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
338 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
337 CLK_000_N_SYNC_10_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_9_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_8_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_7_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_6_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_5_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_4_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_3_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_2_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_1_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_0_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_8_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_7_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_4_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_3_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_2_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_1_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_0_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
309 CLK_000_N_SYNC_11_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
308 inst_CLK_000_NE 3 -1 5 1 5 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 0 1 1 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 2 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 2 3 4 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
126 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 345 7 5 1 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 346 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 357 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 347 7 2 0 6 79 -1 5 0 21
|
|
97 DS_030 5 348 0 1 5 97 -1 7 0 21
|
|
80 DSACK1 5 351 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 5 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 5 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 7 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 358 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 344 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 356 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 355 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 350 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 349 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 352 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 359 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
350 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
352 RN_AVEC_EXP 3 21 2 6 0 1 3 5 6 7 21 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 7 5 1 2 3 5 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 5 5 1 2 3 5 7 -1 -1 1 0 21
|
|
345 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
312 SM_AMIGA_6_ 3 -1 3 4 0 1 3 7 -1 -1 2 0 21
|
|
342 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
341 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 2 3 1 2 6 -1 -1 1 0 21
|
|
303 inst_CLK_000_D2 3 -1 7 3 1 2 3 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 5 0 21
|
|
343 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
311 SM_AMIGA_7_ 3 -1 3 2 2 3 -1 -1 4 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 4 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
338 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
317 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 1 2 1 5 -1 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 7 2 3 7 -1 -1 2 0 21
|
|
307 inst_CLK_000_NE 3 -1 0 2 0 1 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 4 2 1 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 2 2 3 5 -1 -1 1 0 21
|
|
348 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
358 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
347 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
339 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
314 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
357 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
340 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
351 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
346 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
359 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 7 19 -1 1 0 21
|
|
337 CLK_000_N_SYNC_10_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_9_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_8_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_7_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_6_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_5_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_4_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_3_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_2_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_1_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_0_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_8_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_7_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_6_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_5_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_4_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_3_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_2_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_1_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_0_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 1 1 2 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 7 1 5 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 4 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 1 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 2 3 4 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
126 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 345 7 5 1 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 346 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 347 7 2 0 6 79 -1 5 0 21
|
|
97 DS_030 5 348 0 1 0 97 -1 7 0 21
|
|
80 DSACK1 5 351 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 0 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 358 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 344 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 357 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 355 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 350 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 349 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 352 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 359 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
350 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
352 RN_AVEC_EXP 3 21 2 6 1 2 3 5 6 7 21 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 4 5 1 2 3 5 7 -1 -1 1 0 21
|
|
345 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
312 SM_AMIGA_6_ 3 -1 6 4 1 3 6 7 -1 -1 2 0 21
|
|
342 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 3 3 5 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 3 2 3 6 65 -1 4 0 21
|
|
311 SM_AMIGA_7_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
341 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 3 3 3 5 7 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21
|
|
303 inst_CLK_000_D2 3 -1 7 3 3 5 6 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 4 3 4 6 7 -1 -1 1 0 21
|
|
314 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
343 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
340 SM_AMIGA_2_ 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
317 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 7 2 2 5 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
348 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
358 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
347 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
339 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
357 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
351 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
346 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
338 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
359 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 7 19 -1 1 0 21
|
|
337 CLK_000_N_SYNC_10_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_9_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_8_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_7_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_6_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_5_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_3_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_2_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_1_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_0_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_8_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_7_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_6_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_5_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_4_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_3_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_2_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_1_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_0_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
307 inst_CLK_000_NE 3 -1 2 1 1 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 3 1 5 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 0 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
126 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 345 7 5 1 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 346 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 357 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 347 7 2 0 6 79 -1 5 0 21
|
|
97 DS_030 5 348 0 1 0 97 -1 7 0 21
|
|
80 DSACK1 5 353 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 0 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 358 3 0 33 -1 6 0 21
|
|
65 E 5 355 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 344 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 352 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 351 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 350 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 356 3 0 34 -1 2 1 21
|
|
28 BG_000 5 349 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 354 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 359 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
350 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
354 RN_AVEC_EXP 3 21 2 6 1 2 3 5 6 7 21 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 4 5 1 2 3 5 7 -1 -1 1 0 21
|
|
345 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
312 SM_AMIGA_6_ 3 -1 6 4 1 3 6 7 -1 -1 2 0 21
|
|
342 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 3 3 5 6 -1 -1 5 0 21
|
|
355 RN_E 3 65 6 3 2 3 6 65 -1 4 0 21
|
|
311 SM_AMIGA_7_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
341 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 3 3 3 5 7 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21
|
|
303 inst_CLK_000_D2 3 -1 7 3 3 5 6 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 4 3 4 6 7 -1 -1 1 0 21
|
|
314 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
343 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
340 SM_AMIGA_2_ 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
356 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
317 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 7 2 2 5 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
348 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
358 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
347 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
339 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
357 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
352 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
351 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
353 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
346 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
338 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
359 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 7 19 -1 1 0 21
|
|
337 CLK_000_N_SYNC_10_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_9_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_8_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_7_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_6_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_5_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_3_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_2_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_1_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_0_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_8_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_7_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_6_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_5_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_4_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_3_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_2_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_1_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_0_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
307 inst_CLK_000_NE 3 -1 2 1 1 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 3 1 5 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 0 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
126 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 345 7 5 1 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 346 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 355 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 347 7 2 0 6 79 -1 5 0 21
|
|
97 DS_030 5 348 0 1 0 97 -1 7 0 21
|
|
80 DSACK1 5 351 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 0 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 0 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 344 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 358 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 356 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 350 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 349 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 352 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 359 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
350 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
352 RN_AVEC_EXP 3 21 2 6 1 2 3 5 6 7 21 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 4 5 1 2 3 5 7 -1 -1 1 0 21
|
|
345 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
312 SM_AMIGA_6_ 3 -1 6 4 1 3 6 7 -1 -1 2 0 21
|
|
342 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 3 3 5 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 3 2 3 6 65 -1 4 0 21
|
|
311 SM_AMIGA_7_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
341 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 3 3 3 5 7 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21
|
|
303 inst_CLK_000_D2 3 -1 7 3 3 5 6 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 4 3 4 6 7 -1 -1 1 0 21
|
|
314 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
343 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
340 SM_AMIGA_2_ 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 6 2 6 7 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
317 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 7 2 2 5 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
348 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
347 RN_RW_000 3 79 7 1 7 79 -1 5 0 21
|
|
339 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
355 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
358 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
356 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
351 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
346 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
338 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
359 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 7 19 -1 1 0 21
|
|
337 CLK_000_N_SYNC_10_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_9_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_8_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_7_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_6_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_5_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_3_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_2_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_1_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_0_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_8_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_7_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_6_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_5_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_4_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_3_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_2_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_1_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_0_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
307 inst_CLK_000_NE 3 -1 2 1 1 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 3 1 5 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 0 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
126 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 345 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 346 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 357 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 347 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 348 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 351 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 358 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 344 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 356 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 355 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 350 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 349 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 352 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 359 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
350 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
352 RN_AVEC_EXP 3 21 2 6 1 2 3 5 6 7 21 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 7 5 0 1 3 5 7 -1 -1 1 0 21
|
|
345 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
312 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D0 3 -1 6 4 0 1 3 7 -1 -1 1 0 21
|
|
342 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 3 1 3 6 65 -1 4 0 21
|
|
341 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 3 3 3 5 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 2 3 2 3 7 -1 -1 2 0 21
|
|
306 inst_CLK_OUT_PRE_D 3 -1 4 3 1 2 6 -1 -1 1 0 21
|
|
303 inst_CLK_000_D2 3 -1 3 3 0 3 5 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 4 3 0 4 5 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
343 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
309 SM_AMIGA_7_ 3 -1 5 2 3 5 -1 -1 4 0 21
|
|
340 SM_AMIGA_2_ 3 -1 1 2 1 2 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 0 2 0 4 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
317 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
305 inst_CLK_000_NE 3 -1 6 2 2 3 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 4 2 2 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 2 2 1 3 -1 -1 1 0 21
|
|
348 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
358 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
339 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
314 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
357 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
347 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
351 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
346 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
338 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
359 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 7 19 -1 1 0 21
|
|
337 CLK_000_N_SYNC_10_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_9_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_8_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_7_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_6_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_5_ 3 -1 5 1 7 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_4_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_3_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_2_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_1_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_0_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_8_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_7_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_6_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_5_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_4_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_3_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_2_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_1_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 0 1 0 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 2 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 5 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
126 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 345 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 346 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 355 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 347 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 348 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 351 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 344 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 358 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 356 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 350 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 349 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 352 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 359 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
352 RN_AVEC_EXP 3 21 2 7 0 1 2 3 5 6 7 21 -1 1 0 21
|
|
350 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 6 5 0 3 5 6 7 -1 -1 4 0 21
|
|
299 inst_CLK_000_D1 3 -1 0 5 0 1 3 6 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 4 0 3 5 6 -1 -1 5 0 21
|
|
345 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
312 SM_AMIGA_6_ 3 -1 0 4 0 2 3 7 -1 -1 2 0 21
|
|
303 inst_CLK_000_D2 3 -1 3 4 0 1 3 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 3 4 0 1 3 7 -1 -1 1 0 21
|
|
342 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 3 1 3 6 65 -1 4 0 21
|
|
311 SM_AMIGA_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
306 inst_CLK_OUT_PRE_D 3 -1 6 3 1 2 6 -1 -1 1 0 21
|
|
305 inst_CLK_000_NE 3 -1 1 3 2 3 5 -1 -1 1 0 21
|
|
343 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
340 SM_AMIGA_2_ 3 -1 1 2 1 5 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
341 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
317 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 7 2 5 7 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 5 2 2 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 2 2 1 3 -1 -1 1 0 21
|
|
348 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
339 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
314 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
355 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
358 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
356 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
347 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 5 1 5 -1 -1 3 0 21
|
|
351 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
346 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
338 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
359 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 7 19 -1 1 0 21
|
|
337 CLK_000_N_SYNC_10_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_9_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_8_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_7_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_6_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_5_ 3 -1 7 1 6 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_4_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_3_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_2_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_1_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_0_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_8_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_6_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_5_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_4_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_3_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_2_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_1_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_0_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 1 1 1 -1 -1 1 0 21
|
|
300 inst_DTACK_D0 3 -1 2 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 5 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 3 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
125 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 4 1 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 347 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 358 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
353 RN_AVEC_EXP 3 21 2 5 1 3 5 6 7 21 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 7 5 1 3 5 6 7 -1 -1 1 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
311 SM_AMIGA_6_ 3 -1 6 4 1 3 6 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 4 3 4 5 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 5 4 1 3 5 7 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 5 0 21
|
|
354 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
308 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 4 0 21
|
|
340 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 2 3 1 2 6 -1 -1 1 0 21
|
|
304 inst_CLK_000_NE 3 -1 0 3 1 3 5 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 3 2 4 7 -1 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
315 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
316 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
314 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 1 2 1 5 -1 -1 2 0 21
|
|
295 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
313 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
339 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
358 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 7 19 -1 1 0 21
|
|
336 CLK_000_P_SYNC_8_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_7_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_6_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_5_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_4_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_3_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_2_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_1_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_0_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_10_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_9_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_8_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_7_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_6_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_5_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_4_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_3_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_2_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_1_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
317 CLK_000_N_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 4 1 5 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 1 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 2 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
125 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 4 1 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 347 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 358 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
353 RN_AVEC_EXP 3 21 2 5 1 3 5 6 7 21 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 7 5 1 3 5 6 7 -1 -1 1 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_6_ 3 -1 6 4 1 3 6 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 4 3 4 5 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 5 4 1 3 5 7 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 5 0 21
|
|
354 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
308 SM_AMIGA_7_ 3 -1 3 3 3 6 7 -1 -1 4 0 21
|
|
340 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 2 3 1 2 6 -1 -1 1 0 21
|
|
304 inst_CLK_000_NE 3 -1 0 3 1 3 5 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 3 2 4 7 -1 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
315 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
316 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
314 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 1 2 1 5 -1 -1 2 0 21
|
|
295 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
313 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
339 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 3 1 3 -1 -1 2 0 21
|
|
358 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 7 19 -1 1 0 21
|
|
336 CLK_000_P_SYNC_8_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_7_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_6_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_5_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_4_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_3_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_2_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_1_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_0_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_10_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_9_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_8_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_7_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_6_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_5_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_4_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_3_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_2_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_1_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
317 CLK_000_N_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 4 1 5 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 1 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 2 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
125 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 347 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 358 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
353 RN_AVEC_EXP 3 21 2 5 0 2 3 6 7 21 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 4 3 5 6 7 -1 -1 5 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
308 SM_AMIGA_7_ 3 -1 6 4 3 5 6 7 -1 -1 4 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 4 1 3 6 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 1 4 1 3 6 7 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
|
|
354 RN_E 3 65 6 3 2 3 6 65 -1 4 0 21
|
|
311 SM_AMIGA_0_ 3 -1 0 3 0 3 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 0 3 0 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_6_ 3 -1 7 3 2 3 7 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21
|
|
304 inst_CLK_000_NE 3 -1 5 3 0 2 3 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 0 3 1 3 7 -1 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
339 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 3 0 21
|
|
315 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 0 2 0 6 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
316 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
314 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 6 2 2 5 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 2 2 2 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
313 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
358 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 7 19 -1 1 0 21
|
|
336 CLK_000_P_SYNC_8_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_7_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_6_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_5_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_3_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_2_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_1_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_0_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_10_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_9_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_8_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_7_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_6_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_5_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_4_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_3_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_2_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_1_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
317 CLK_000_N_SYNC_0_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 7 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
125 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 1 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 347 0 1 0 97 -1 7 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 0 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 358 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
353 RN_AVEC_EXP 3 21 2 6 1 2 3 5 6 7 21 -1 1 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
304 inst_CLK_000_NE 3 -1 1 4 1 2 3 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 4 0 3 5 7 -1 -1 1 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 4 1 3 5 7 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 5 0 21
|
|
354 RN_E 3 65 6 3 2 3 6 65 -1 4 0 21
|
|
308 SM_AMIGA_7_ 3 -1 5 3 3 5 7 -1 -1 4 0 21
|
|
340 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 6 3 3 5 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_6_ 3 -1 3 3 1 3 7 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 4 3 1 3 7 -1 -1 1 0 21
|
|
313 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
342 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
339 SM_AMIGA_2_ 3 -1 2 2 2 6 -1 -1 3 0 21
|
|
315 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
337 SM_AMIGA_5_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
316 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
314 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 2 4 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 1 2 2 5 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 2 2 2 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
358 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 7 19 -1 1 0 21
|
|
336 CLK_000_P_SYNC_8_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_7_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_6_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_5_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_4_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_3_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_2_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_1_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_0_ 3 -1 7 1 6 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_10_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_8_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_7_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_6_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_5_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_4_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_3_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_2_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_1_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
317 CLK_000_N_SYNC_0_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 0 1 7 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 2 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
124 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 347 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
353 RN_AVEC_EXP 3 21 2 7 0 1 2 3 5 6 7 21 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
311 SM_AMIGA_6_ 3 -1 0 5 0 1 2 3 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 5 0 1 3 5 7 -1 -1 1 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 5 4 0 3 5 7 -1 -1 4 0 21
|
|
304 inst_CLK_000_NE 3 -1 2 4 1 2 3 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 4 0 1 3 5 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 3 0 3 5 -1 -1 5 0 21
|
|
354 RN_E 3 65 6 3 1 3 6 65 -1 4 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 6 3 3 5 6 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 5 3 1 3 7 -1 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
339 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
317 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 0 2 2 5 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 2 2 1 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
314 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
336 CLK_000_P_SYNC_8_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_6_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_5_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_4_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_3_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_2_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_1_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_0_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_10_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_8_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_6_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_5_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_3_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_2_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_1_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_0_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
313 CLK_000_N_SYNC_7_ 3 -1 4 1 7 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 5 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
124 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 347 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
353 RN_AVEC_EXP 3 21 2 7 0 1 2 3 5 6 7 21 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
311 SM_AMIGA_6_ 3 -1 0 5 0 1 2 3 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 5 0 1 3 5 7 -1 -1 1 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 5 4 0 3 5 7 -1 -1 4 0 21
|
|
304 inst_CLK_000_NE 3 -1 2 4 1 2 3 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 4 0 1 3 5 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 3 0 3 5 -1 -1 5 0 21
|
|
354 RN_E 3 65 6 3 1 3 6 65 -1 4 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 6 3 3 5 6 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 5 3 1 3 7 -1 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
339 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
317 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 0 2 2 5 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 2 2 1 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
314 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
336 CLK_000_P_SYNC_8_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_6_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_5_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_4_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_3_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_2_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_1_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_0_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_10_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_8_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_7_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_5_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_3_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_2_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_1_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_0_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
313 CLK_000_N_SYNC_6_ 3 -1 4 1 7 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 5 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
124 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 347 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
353 RN_AVEC_EXP 3 21 2 7 0 1 2 3 5 6 7 21 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
311 SM_AMIGA_6_ 3 -1 0 5 0 1 2 3 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 5 0 1 3 5 7 -1 -1 1 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 5 4 0 3 5 7 -1 -1 4 0 21
|
|
304 inst_CLK_000_NE 3 -1 2 4 1 2 3 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 4 0 1 3 5 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 3 0 3 5 -1 -1 5 0 21
|
|
354 RN_E 3 65 6 3 1 3 6 65 -1 4 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 6 3 3 5 6 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 5 3 1 3 7 -1 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
339 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
317 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 0 2 2 5 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 2 2 1 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
314 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
336 CLK_000_P_SYNC_8_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_6_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_5_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_4_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_3_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_2_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_1_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_0_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_10_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_8_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_7_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_6_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_4_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_3_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_2_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_1_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_0_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
313 CLK_000_N_SYNC_5_ 3 -1 4 1 7 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 5 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
124 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 347 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 1 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
353 RN_AVEC_EXP 3 21 2 7 0 1 2 3 5 6 7 21 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
311 SM_AMIGA_6_ 3 -1 0 5 0 1 2 3 7 -1 -1 2 0 21
|
|
299 inst_CLK_000_D1 3 -1 3 5 0 1 3 5 7 -1 -1 1 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 5 4 0 3 5 7 -1 -1 4 0 21
|
|
304 inst_CLK_000_NE 3 -1 2 4 1 2 3 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 4 0 1 3 5 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 3 0 3 5 -1 -1 5 0 21
|
|
354 RN_E 3 65 6 3 1 3 6 65 -1 4 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 6 3 3 5 6 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 5 3 1 3 7 -1 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
339 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 6 2 0 6 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 1 3 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
317 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 0 2 2 5 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 2 2 1 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21
|
|
314 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
336 CLK_000_P_SYNC_8_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_6_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_5_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_4_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_3_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_2_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_1_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_0_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_10_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_8_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_7_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_5_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_3_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_2_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_1_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_0_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
313 CLK_000_N_SYNC_6_ 3 -1 4 1 7 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 5 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 6 1 6 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
124 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 4 5 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 347 0 2 1 5 97 -1 7 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 1 5 68 -1 1 0 21
|
|
80 DSACK1 5 351 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 352 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
353 RN_AVEC_EXP 3 21 2 6 0 1 3 5 6 7 21 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 3 4 1 3 5 6 -1 -1 5 0 21
|
|
354 RN_E 3 65 6 4 1 3 5 6 65 -1 4 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 0 4 0 2 3 7 -1 -1 4 0 21
|
|
311 SM_AMIGA_6_ 3 -1 3 4 0 3 5 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_1_ 3 -1 6 4 0 3 6 7 -1 -1 2 0 21
|
|
304 inst_CLK_000_NE 3 -1 6 4 0 3 5 6 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 7 4 0 1 3 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 1 4 0 1 3 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 3 0 2 3 -1 -1 5 0 21
|
|
342 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
|
|
340 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 6 3 0 1 3 -1 -1 1 0 21
|
|
302 inst_CLK_000_D1 3 -1 0 3 0 1 7 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 1 3 0 1 2 -1 -1 1 0 21
|
|
314 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21
|
|
339 SM_AMIGA_2_ 3 -1 5 2 5 6 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
337 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 2 0 21
|
|
317 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 2 2 2 5 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 4 2 3 5 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
352 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 2 1 2 -1 -1 3 0 21
|
|
351 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
336 CLK_000_P_SYNC_8_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_7_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_6_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_5_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_4_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_3_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_2_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_1_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_0_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_10_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_9_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_8_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_7_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_5_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_3_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_2_ 3 -1 4 1 7 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_1_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_0_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
313 CLK_000_N_SYNC_6_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 0 1 2 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 2 3 4 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 4 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
124 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 0 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 0 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 347 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
353 RN_AVEC_EXP 3 21 2 6 0 1 3 5 6 7 21 -1 1 0 21
|
|
311 SM_AMIGA_6_ 3 -1 1 5 0 1 3 5 7 -1 -1 2 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 3 4 1 2 3 7 -1 -1 4 0 21
|
|
309 SM_AMIGA_1_ 3 -1 5 4 3 5 6 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 5 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 6 4 1 3 5 7 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 3 1 2 3 -1 -1 5 0 21
|
|
354 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 6 3 1 2 6 -1 -1 1 0 21
|
|
304 inst_CLK_000_NE 3 -1 2 3 3 5 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 3 1 4 5 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 0 3 0 5 6 -1 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
317 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
313 CLK_000_N_SYNC_6_ 3 -1 2 2 4 7 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 4 2 1 5 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 5 2 2 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
314 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
339 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 5 1 5 -1 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
336 CLK_000_N_SYNC_10_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_9_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_8_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_7_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_5_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_3_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_2_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_1_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_0_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_8_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_7_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_6_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_5_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_4_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_3_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_2_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_1_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_0_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 6 1 5 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
124 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 1 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 347 0 2 0 1 97 -1 7 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 1 68 -1 1 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
353 RN_AVEC_EXP 3 21 2 6 1 2 3 5 6 7 21 -1 1 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
311 SM_AMIGA_6_ 3 -1 3 4 1 2 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_1_ 3 -1 1 4 1 2 3 7 -1 -1 2 0 21
|
|
304 inst_CLK_000_NE 3 -1 5 4 1 2 3 5 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
|
|
354 RN_E 3 65 6 3 2 3 6 65 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 5 3 3 5 7 -1 -1 3 0 21
|
|
308 SM_AMIGA_0_ 3 -1 2 3 2 3 5 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 0 3 1 2 6 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 4 3 0 4 5 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 6 3 1 3 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
342 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
339 SM_AMIGA_2_ 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
317 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 0 2 0 1 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 1 2 0 2 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
314 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
336 CLK_000_P_SYNC_8_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_7_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_6_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_5_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_4_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_3_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_2_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_1_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_0_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_10_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_9_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_8_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_7_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_5_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_4_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_3_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_1_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_0_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
313 CLK_000_N_SYNC_6_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 0 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 5 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
124 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 2 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 347 0 2 1 6 97 -1 7 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 1 6 68 -1 1 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
353 RN_AVEC_EXP 3 21 2 7 0 1 2 3 5 6 7 21 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
311 SM_AMIGA_6_ 3 -1 6 5 1 2 3 6 7 -1 -1 2 0 21
|
|
304 inst_CLK_000_NE 3 -1 4 5 0 1 2 3 5 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 2 5 0 1 3 6 7 -1 -1 1 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 3 4 3 5 6 7 -1 -1 4 0 21
|
|
309 SM_AMIGA_1_ 3 -1 0 4 0 3 5 7 -1 -1 2 0 21
|
|
341 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 3 3 5 6 -1 -1 5 0 21
|
|
354 RN_E 3 65 6 3 2 3 6 65 -1 4 0 21
|
|
340 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 4 3 1 2 6 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 3 0 1 7 -1 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
339 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
317 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 1 2 1 2 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 0 2 2 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 2 2 2 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
314 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 0 1 0 -1 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
|
|
336 CLK_000_P_SYNC_8_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_7_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_6_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_5_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_4_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_3_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_2_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_1_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_0_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_10_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_8_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_7_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_5_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_4_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_3_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_2_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_1_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_0_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
313 CLK_000_N_SYNC_6_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 0 1 0 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 6 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 3 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
124 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 1 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 347 0 2 0 1 97 -1 7 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 1 68 -1 1 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
353 RN_AVEC_EXP 3 21 2 6 1 2 3 5 6 7 21 -1 1 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
311 SM_AMIGA_6_ 3 -1 3 4 1 2 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_1_ 3 -1 1 4 1 2 3 7 -1 -1 2 0 21
|
|
304 inst_CLK_000_NE 3 -1 5 4 1 2 3 5 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
|
|
354 RN_E 3 65 6 3 2 3 6 65 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 5 3 3 5 7 -1 -1 4 0 21
|
|
308 SM_AMIGA_0_ 3 -1 2 3 2 3 5 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 0 3 1 2 6 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 4 3 0 4 5 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 6 3 1 3 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
342 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
339 SM_AMIGA_2_ 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
317 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 0 2 0 1 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 1 2 0 2 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
314 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
336 CLK_000_P_SYNC_8_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_7_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_6_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_5_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_4_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_3_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_2_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_1_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_0_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_10_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_9_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_8_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_7_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_5_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_4_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_3_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_1_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_0_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
313 CLK_000_N_SYNC_6_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 0 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 5 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
124 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 4 1 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 347 0 2 0 1 97 -1 7 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 1 68 -1 1 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
353 RN_AVEC_EXP 3 21 2 6 1 2 3 5 6 7 21 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
311 SM_AMIGA_6_ 3 -1 5 5 1 2 3 5 7 -1 -1 2 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_1_ 3 -1 2 4 2 3 5 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D0 3 -1 2 4 1 2 3 7 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 5 0 21
|
|
354 RN_E 3 65 6 3 2 3 6 65 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 3 3 3 5 7 -1 -1 4 0 21
|
|
312 SM_AMIGA_4_ 3 -1 5 3 1 2 5 -1 -1 2 0 21
|
|
314 CLK_000_N_SYNC_10_ 3 -1 5 3 3 5 6 -1 -1 1 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 0 3 1 2 6 -1 -1 1 0 21
|
|
304 inst_CLK_000_NE 3 -1 5 3 2 3 5 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 3 1 2 7 -1 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
317 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 0 2 0 4 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
318 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
316 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
313 CLK_000_N_SYNC_6_ 3 -1 0 2 5 7 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 2 1 2 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 4 2 0 2 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 2 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
315 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
339 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
336 CLK_000_P_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_6_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_5_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_4_ 3 -1 5 1 7 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_3_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_2_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_0_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_9_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_8_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_7_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_4_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_3_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_2_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_1_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_0_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 1 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 0 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 2 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
124 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 1 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 347 0 2 0 1 97 -1 7 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 1 68 -1 1 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
353 RN_AVEC_EXP 3 21 2 6 1 2 3 5 6 7 21 -1 1 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
311 SM_AMIGA_6_ 3 -1 3 4 1 2 3 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_1_ 3 -1 1 4 1 2 3 7 -1 -1 2 0 21
|
|
304 inst_CLK_000_NE 3 -1 5 4 1 2 3 5 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
|
|
354 RN_E 3 65 6 3 2 3 6 65 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 5 3 3 5 7 -1 -1 3 0 21
|
|
308 SM_AMIGA_0_ 3 -1 2 3 2 3 5 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 0 3 1 2 6 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 3 0 1 7 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 4 3 0 4 5 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 6 3 1 3 7 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 5 0 21
|
|
342 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
339 SM_AMIGA_2_ 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 0 2 0 1 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
317 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 0 2 0 1 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 1 2 0 2 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
|
314 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
336 CLK_000_P_SYNC_8_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
335 CLK_000_P_SYNC_7_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
334 CLK_000_P_SYNC_6_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
333 CLK_000_P_SYNC_5_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
332 CLK_000_P_SYNC_4_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
331 CLK_000_P_SYNC_3_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_2_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_1_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_0_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_10_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_9_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
325 CLK_000_N_SYNC_8_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
324 CLK_000_N_SYNC_7_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
323 CLK_000_N_SYNC_5_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
322 CLK_000_N_SYNC_4_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
321 CLK_000_N_SYNC_3_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
320 CLK_000_N_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
319 CLK_000_N_SYNC_1_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
318 CLK_000_N_SYNC_0_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
313 CLK_000_N_SYNC_6_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 0 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 5 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 4 5 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 0 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
124 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 344 7 5 0 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 345 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 356 6 3 0 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 346 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 347 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 352 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 357 3 0 33 -1 6 0 21
|
|
65 E 5 354 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 343 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 351 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 350 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 349 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 355 3 0 34 -1 2 1 21
|
|
28 BG_000 5 348 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
40 BERR 0 4 0 40 -1 1 0 21
|
|
21 AVEC_EXP 5 353 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
349 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
353 RN_AVEC_EXP 3 21 2 6 0 1 3 5 6 7 21 -1 1 0 21
|
|
311 SM_AMIGA_6_ 3 -1 1 5 0 1 3 5 7 -1 -1 2 0 21
|
|
344 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_7_ 3 -1 3 4 1 2 3 7 -1 -1 4 0 21
|
|
309 SM_AMIGA_1_ 3 -1 5 4 3 5 6 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 5 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 6 4 1 3 5 7 -1 -1 1 0 21
|
|
341 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 3 1 2 3 -1 -1 5 0 21
|
|
354 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 6 3 1 2 6 -1 -1 1 0 21
|
|
304 inst_CLK_000_NE 3 -1 2 3 3 5 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 7 3 1 4 5 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 0 3 0 5 6 -1 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21
|
|
355 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
317 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
313 CLK_000_N_SYNC_6_ 3 -1 2 2 4 7 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 4 2 1 5 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 5 2 2 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21
|
|
347 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
357 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
314 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
356 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
339 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 5 1 5 -1 -1 3 0 21
|
|
352 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
345 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
336 CLK_000_N_SYNC_10_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_9_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_8_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_7_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_5_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_3_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_2_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_1_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_0_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_8_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_7_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_6_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_5_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_4_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_3_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_2_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_1_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_0_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 6 1 5 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1
|
|
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 3 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 6 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
125 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
40 BERR 5 -1 4 5 0 2 3 5 7 40 -1 1 0 21
|
|
81 AS_030 5 345 7 4 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 346 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 355 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 347 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 348 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 351 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 356 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
82 BGACK_030 5 350 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 349 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 344 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 358 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 357 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 352 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
352 RN_AVEC_EXP 3 21 2 7 0 1 2 3 5 6 7 21 -1 1 0 21
|
|
350 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
311 SM_AMIGA_6_ 3 -1 0 5 0 2 3 5 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 4 0 3 5 7 -1 -1 6 0 21
|
|
345 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
298 inst_CLK_000_D0 3 -1 7 4 0 3 4 5 -1 -1 1 0 21
|
|
310 SM_AMIGA_7_ 3 -1 5 3 0 3 7 -1 -1 13 0 21
|
|
341 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
340 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 2 3 1 2 6 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 4 3 0 3 5 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 5 3 0 2 5 -1 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 2 2 0 2 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
317 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 3 2 3 5 -1 -1 2 0 21
|
|
313 CLK_000_N_SYNC_6_ 3 -1 1 2 4 7 -1 -1 1 0 21
|
|
304 inst_CLK_000_NE 3 -1 2 2 3 5 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21
|
|
348 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
356 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
314 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
355 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
343 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
347 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
339 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
358 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
357 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
351 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
346 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
336 CLK_000_N_SYNC_10_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_9_ 3 -1 7 1 6 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_8_ 3 -1 4 1 7 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_7_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_5_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_4_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_3_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_2_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_1_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_0_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_8_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_7_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_6_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_5_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_4_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_3_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_2_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_1_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_0_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 0 1 0 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 1 0 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 0 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 0 1 2 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 7 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 1 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
125 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 345 7 4 1 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 346 3 4 0 4 6 7 32 -1 2 0 21
|
|
40 BERR 5 -1 4 4 1 3 5 7 40 -1 1 0 21
|
|
70 RW 5 355 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 347 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 348 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 351 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 356 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
82 BGACK_030 5 350 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 349 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 344 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 358 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 357 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 352 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
350 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
352 RN_AVEC_EXP 3 21 2 5 1 3 5 6 7 21 -1 1 0 21
|
|
345 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
311 SM_AMIGA_6_ 3 -1 5 4 1 3 5 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_1_ 3 -1 1 4 1 3 5 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_7_ 3 -1 5 3 3 5 7 -1 -1 13 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 6 0 21
|
|
341 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 7 3 1 2 6 -1 -1 1 0 21
|
|
304 inst_CLK_000_NE 3 -1 4 3 1 3 5 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 3 2 3 5 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 0 3 2 3 5 -1 -1 1 0 21
|
|
314 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
342 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
339 SM_AMIGA_2_ 3 -1 5 2 1 5 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 0 2 0 2 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
317 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 5 2 1 5 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 0 2 4 5 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 2 2 2 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21
|
|
348 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
356 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
355 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
343 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
347 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
358 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
357 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
351 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
346 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
336 CLK_000_N_SYNC_10_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_9_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_8_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_7_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_5_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_4_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_3_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_2_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_1_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_0_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_8_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_7_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_6_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_5_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_4_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_3_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_2_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_1_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_0_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
313 CLK_000_N_SYNC_6_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 2 1 2 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 5 1 2 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 0 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 4 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 6 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
125 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 345 7 4 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 346 3 4 0 4 6 7 32 -1 2 0 21
|
|
40 BERR 5 -1 4 4 2 3 5 7 40 -1 1 0 21
|
|
70 RW 5 355 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 348 0 2 1 2 97 -1 7 0 21
|
|
79 RW_000 5 347 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 1 2 68 -1 1 0 21
|
|
80 DSACK1 5 351 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 356 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
82 BGACK_030 5 350 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 349 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 344 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 358 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 357 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 352 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
352 RN_AVEC_EXP 3 21 2 6 1 2 3 5 6 7 21 -1 1 0 21
|
|
350 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
341 cpu_est_1_ 3 -1 1 4 1 3 5 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 4 1 3 5 6 65 -1 4 0 21
|
|
345 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
340 cpu_est_0_ 3 -1 7 4 1 3 6 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_6_ 3 -1 3 4 2 3 5 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D0 3 -1 0 4 1 3 5 6 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 6 0 21
|
|
342 cpu_est_2_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
309 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 6 3 1 2 6 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 6 3 1 3 5 -1 -1 1 0 21
|
|
310 SM_AMIGA_7_ 3 -1 5 2 3 7 -1 -1 13 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
317 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
313 CLK_000_N_SYNC_6_ 3 -1 2 2 4 7 -1 -1 1 0 21
|
|
304 inst_CLK_000_NE 3 -1 6 2 3 5 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 2 0 1 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 4 2 2 4 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 2 2 2 6 -1 -1 1 0 21
|
|
348 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
356 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
314 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
355 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
343 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
347 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
339 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 2 1 2 -1 -1 3 0 21
|
|
358 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
357 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
351 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
346 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
336 CLK_000_N_SYNC_10_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_9_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_8_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_7_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_5_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_4_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_3_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_2_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_1_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_0_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_8_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_7_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_6_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_5_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_4_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_3_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_2_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_1_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_0_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 0 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 2 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 4 7 56 -1
|
|
35 VPA 1 -1 -1 2 5 6 35 -1
|
|
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
126 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 347 7 4 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 348 3 4 0 4 6 7 32 -1 2 0 21
|
|
40 BERR 5 -1 4 4 2 3 5 7 40 -1 1 0 21
|
|
70 RW 5 357 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 349 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 350 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 353 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 358 3 0 33 -1 6 0 21
|
|
65 E 5 355 6 0 65 -1 4 0 21
|
|
82 BGACK_030 5 352 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 356 3 0 34 -1 2 1 21
|
|
28 BG_000 5 351 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 346 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 345 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 359 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 354 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
354 RN_AVEC_EXP 3 21 2 6 1 2 3 5 6 7 21 -1 1 0 21
|
|
352 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 6 5 0 2 3 4 5 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 2 5 0 2 3 5 6 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 4 2 3 5 7 -1 -1 6 0 21
|
|
347 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
311 SM_AMIGA_6_ 3 -1 2 4 2 3 5 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_7_ 3 -1 5 3 2 3 7 -1 -1 13 0 21
|
|
342 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
355 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
343 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
341 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
309 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 4 3 1 2 6 -1 -1 1 0 21
|
|
317 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
356 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
318 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
316 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 3 2 3 5 -1 -1 2 0 21
|
|
304 inst_CLK_000_NE 3 -1 7 2 3 5 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 4 2 0 1 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 0 2 2 4 -1 -1 1 0 21
|
|
350 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
358 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
339 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
315 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
357 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
344 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
349 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
340 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 0 1 0 -1 -1 3 0 21
|
|
359 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
353 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
348 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
345 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
338 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
337 CLK_000_N_SYNC_10_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_9_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_7_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_5_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_4_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_3_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_2_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_0_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_8_ 3 -1 7 1 6 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_7_ 3 -1 4 1 7 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_6_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_5_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_4_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_3_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_2_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_1_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_0_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
314 inst_CLK_000_NE_D 3 -1 3 1 5 -1 -1 1 0 21
|
|
313 CLK_000_N_SYNC_6_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 1 1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 0 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 4 7 56 -1
|
|
35 VPA 1 -1 -1 2 5 6 35 -1
|
|
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 2 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
125 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 345 7 4 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 346 3 4 0 4 6 7 32 -1 2 0 21
|
|
40 BERR 5 -1 4 4 2 3 5 7 40 -1 1 0 21
|
|
70 RW 5 355 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 348 0 2 1 2 97 -1 7 0 21
|
|
79 RW_000 5 347 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 1 2 68 -1 1 0 21
|
|
80 DSACK1 5 351 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 356 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
82 BGACK_030 5 350 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 349 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 344 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 358 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 357 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 352 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
352 RN_AVEC_EXP 3 21 2 6 1 2 3 5 6 7 21 -1 1 0 21
|
|
350 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
341 cpu_est_1_ 3 -1 1 4 1 3 5 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 4 1 3 5 6 65 -1 4 0 21
|
|
345 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
340 cpu_est_0_ 3 -1 7 4 1 3 6 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_6_ 3 -1 3 4 2 3 5 7 -1 -1 2 0 21
|
|
298 inst_CLK_000_D0 3 -1 0 4 1 3 5 6 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 6 0 21
|
|
342 cpu_est_2_ 3 -1 3 3 1 3 6 -1 -1 4 0 21
|
|
309 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 6 3 1 2 6 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 6 3 1 3 5 -1 -1 1 0 21
|
|
310 SM_AMIGA_7_ 3 -1 5 2 3 7 -1 -1 13 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
317 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
313 CLK_000_N_SYNC_6_ 3 -1 2 2 4 7 -1 -1 1 0 21
|
|
304 inst_CLK_000_NE 3 -1 6 2 3 5 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 2 0 1 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 4 2 2 4 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 2 2 2 6 -1 -1 1 0 21
|
|
348 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
356 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
314 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
355 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
343 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
347 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
339 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 2 1 2 -1 -1 3 0 21
|
|
358 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
357 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
351 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
346 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
336 CLK_000_N_SYNC_10_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_9_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_8_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_7_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_5_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_4_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_3_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_2_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_1_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_0_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_8_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_7_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_6_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_5_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_4_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_3_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_2_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_1_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_0_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 0 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 2 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 4 7 56 -1
|
|
35 VPA 1 -1 -1 2 5 6 35 -1
|
|
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
125 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 346 3 4 0 4 6 7 32 -1 2 0 21
|
|
81 AS_030 5 345 7 3 1 3 7 81 -1 4 0 21
|
|
70 RW 5 355 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 347 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 348 0 1 0 97 -1 7 0 21
|
|
80 DSACK1 5 351 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 0 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 356 3 0 33 -1 6 0 21
|
|
65 E 5 353 6 0 65 -1 4 0 21
|
|
82 BGACK_030 5 350 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 354 3 0 34 -1 2 1 21
|
|
28 BG_000 5 349 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 344 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 358 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 357 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 352 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
352 RN_AVEC_EXP 3 21 2 6 1 2 3 5 6 7 21 -1 1 0 21
|
|
350 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
311 SM_AMIGA_6_ 3 -1 2 5 1 2 3 5 7 -1 -1 2 0 21
|
|
345 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_1_ 3 -1 2 4 2 3 5 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_7_ 3 -1 5 3 2 3 7 -1 -1 13 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 2 3 7 -1 -1 6 0 21
|
|
341 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
353 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
312 SM_AMIGA_4_ 3 -1 5 3 1 2 5 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 5 3 2 3 5 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 4 3 1 2 6 -1 -1 1 0 21
|
|
304 inst_CLK_000_NE 3 -1 5 3 2 3 5 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 2 3 2 3 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D0 3 -1 0 3 2 3 6 -1 -1 1 0 21
|
|
338 SM_AMIGA_3_ 3 -1 5 2 2 5 -1 -1 6 0 21
|
|
314 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
342 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
339 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 1 2 1 2 -1 -1 3 0 21
|
|
354 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
317 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 2 5 6 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 4 2 1 4 -1 -1 1 0 21
|
|
297 inst_CLK_OUT_PRE 3 -1 2 2 2 4 -1 -1 1 0 21
|
|
348 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
356 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
355 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
343 SM_AMIGA_7__0 3 -1 2 1 5 -1 -1 4 0 21
|
|
347 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
358 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
357 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
351 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
346 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
336 CLK_000_N_SYNC_10_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_9_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_8_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_7_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_4_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_3_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_2_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_1_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_0_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_8_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_7_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_6_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_5_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_4_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_3_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_2_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_1_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_0_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
313 CLK_000_N_SYNC_6_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
307 CLK_000_N_SYNC_11_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 5 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 1 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 5 1 2 3 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
131 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 351 3 4 0 4 6 7 32 -1 2 0 21
|
|
81 AS_030 5 350 7 3 1 3 7 81 -1 4 0 21
|
|
70 RW 5 362 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 355 0 2 0 2 97 -1 7 0 21
|
|
79 RW_000 5 353 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 2 68 -1 1 0 21
|
|
80 DSACK1 5 358 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 363 3 0 33 -1 6 0 21
|
|
65 E 5 360 6 0 65 -1 4 0 21
|
|
82 BGACK_030 5 357 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 361 3 0 34 -1 2 1 21
|
|
28 BG_000 5 356 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 349 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 354 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 352 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 359 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 364 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
357 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
359 RN_AVEC_EXP 3 21 2 5 1 3 5 6 7 21 -1 1 0 21
|
|
350 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
312 SM_AMIGA_6_ 3 -1 5 4 1 3 5 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 4 5 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 5 3 3 5 7 -1 -1 13 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 6 0 21
|
|
345 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 5 0 21
|
|
360 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
346 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
344 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 4 3 1 3 5 -1 -1 1 0 21
|
|
320 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
361 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
321 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
319 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
318 CLK_CNT_P_0_ 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 5 2 1 5 -1 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 3 2 3 5 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 2 2 1 6 -1 -1 1 0 21
|
|
304 inst_CLK_000_NE 3 -1 0 2 3 5 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 4 2 1 6 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 7 2 2 7 -1 -1 1 0 21
|
|
355 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
363 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
342 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
317 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
362 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
348 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
353 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
358 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
356 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
354 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
351 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
347 AMIGA_BUS_ENABLE_LOW_0 3 -1 0 1 2 -1 -1 2 0 21
|
|
341 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
298 CLK_CNT_N_0_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
364 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
340 CLK_000_N_SYNC_10_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
339 CLK_000_N_SYNC_9_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
338 CLK_000_N_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
337 CLK_000_N_SYNC_7_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_5_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_4_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_3_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_2_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_1_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_0_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_8_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_7_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_6_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_5_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_4_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_3_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_1_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_0_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
316 CLK_CNT_N_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
315 CLK_CNT_P_1_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
314 CLK_000_N_SYNC_6_ 3 -1 4 1 7 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 1 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 2 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 4 1 3 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
35 VPA 1 -1 -1 2 4 5 35 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
126 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 348 3 4 0 4 6 7 32 -1 2 0 21
|
|
81 AS_030 5 347 7 3 2 3 7 81 -1 4 0 21
|
|
70 RW 5 357 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 349 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 350 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 353 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 358 3 0 33 -1 6 0 21
|
|
65 E 5 355 6 0 65 -1 4 0 21
|
|
82 BGACK_030 5 352 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 356 3 0 34 -1 2 1 21
|
|
28 BG_000 5 351 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 346 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 345 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 344 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 5 359 6 0 64 -1 1 0 20
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 354 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
354 RN_AVEC_EXP 3 21 2 7 1 2 3 4 5 6 7 21 -1 1 0 21
|
|
352 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
340 cpu_est_1_ 3 -1 4 4 3 4 5 6 -1 -1 5 0 21
|
|
355 RN_E 3 65 6 4 3 4 5 6 65 -1 4 0 21
|
|
347 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
305 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
304 SM_AMIGA_7_ 3 -1 5 3 3 5 7 -1 -1 13 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 6 0 21
|
|
341 cpu_est_2_ 3 -1 4 3 3 4 6 -1 -1 4 0 21
|
|
339 cpu_est_0_ 3 -1 4 3 3 4 6 -1 -1 2 0 21
|
|
313 CLK_CNT_P_0_ 3 -1 2 3 0 2 5 -1 -1 2 0 21
|
|
306 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
359 RN_CLK_DIV_OUT 3 64 6 3 1 2 6 64 -1 1 0 20
|
|
301 inst_CLK_000_NE 3 -1 7 3 2 3 5 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 3 3 4 5 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 2 3 3 4 5 -1 -1 1 0 21
|
|
312 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
315 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
356 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
336 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 2 0 21
|
|
316 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
314 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
308 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
307 SM_AMIGA_0_ 3 -1 3 2 3 5 -1 -1 2 0 21
|
|
310 CLK_CNT_P_1_ 3 -1 5 2 0 2 -1 -1 1 0 21
|
|
350 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
358 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
337 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
357 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
343 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
349 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
338 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
353 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
348 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
345 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
344 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
342 CLK_DIV_OUT_0 3 -1 0 1 6 -1 -1 2 0 21
|
|
297 CLK_CNT_N_0_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
335 CLK_000_N_SYNC_10_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_9_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_8_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_7_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_4_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_3_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
328 CLK_000_N_SYNC_2_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
327 CLK_000_N_SYNC_1_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
326 CLK_000_N_SYNC_0_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_7_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_6_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_5_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_4_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_3_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_1_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
311 CLK_CNT_N_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
309 CLK_000_N_SYNC_6_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
303 CLK_000_N_SYNC_11_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
302 CLK_000_P_SYNC_9_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
300 inst_CLK_000_D3 3 -1 4 1 4 -1 -1 1 0 21
|
|
299 inst_CLK_000_D2 3 -1 3 1 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 4 2 3 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
35 VPA 1 -1 -1 2 4 5 35 -1
|
|
10 CLK_000 1 -1 -1 2 2 3 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
131 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 351 3 4 0 4 6 7 32 -1 2 0 21
|
|
81 AS_030 5 350 7 3 1 3 7 81 -1 4 0 21
|
|
70 RW 5 362 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 355 0 2 0 2 97 -1 7 0 21
|
|
79 RW_000 5 353 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 2 68 -1 1 0 21
|
|
80 DSACK1 5 358 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 363 3 0 33 -1 6 0 21
|
|
65 E 5 360 6 0 65 -1 4 0 21
|
|
82 BGACK_030 5 357 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 361 3 0 34 -1 2 1 21
|
|
28 BG_000 5 356 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 349 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 354 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 352 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 359 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 364 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
357 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
359 RN_AVEC_EXP 3 21 2 5 1 3 5 6 7 21 -1 1 0 21
|
|
350 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
312 SM_AMIGA_6_ 3 -1 5 4 1 3 5 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 1 3 4 5 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 5 3 3 5 7 -1 -1 13 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 6 0 21
|
|
345 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 5 0 21
|
|
360 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
346 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
344 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 2 0 21
|
|
310 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 4 3 1 3 5 -1 -1 1 0 21
|
|
320 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 2 2 1 2 -1 -1 3 0 21
|
|
361 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
321 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
319 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
318 CLK_CNT_P_0_ 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 5 2 1 5 -1 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 3 2 3 5 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 2 2 1 6 -1 -1 1 0 21
|
|
304 inst_CLK_000_NE 3 -1 0 2 3 5 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 4 2 1 6 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 7 2 2 7 -1 -1 1 0 21
|
|
355 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
363 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
342 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
317 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
362 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
348 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
353 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
358 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
356 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
354 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
351 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
347 AMIGA_BUS_ENABLE_LOW_0 3 -1 0 1 2 -1 -1 2 0 21
|
|
341 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
298 CLK_CNT_N_0_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
364 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
340 CLK_000_N_SYNC_10_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
339 CLK_000_N_SYNC_9_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
338 CLK_000_N_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
337 CLK_000_N_SYNC_7_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_5_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_4_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_3_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_2_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_1_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_0_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_8_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_7_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_6_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_5_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_4_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_3_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_1_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_0_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
316 CLK_CNT_N_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
315 CLK_CNT_P_1_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
314 CLK_000_N_SYNC_6_ 3 -1 4 1 7 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 1 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 2 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 4 1 3 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
35 VPA 1 -1 -1 2 4 5 35 -1
|
|
10 CLK_000 1 -1 -1 2 3 4 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
131 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 351 3 4 0 4 6 7 32 -1 2 0 21
|
|
81 AS_030 5 350 7 3 1 3 7 81 -1 4 0 21
|
|
70 RW 5 362 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 352 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 353 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 356 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 363 3 0 33 -1 6 0 21
|
|
65 E 5 360 6 0 65 -1 4 0 21
|
|
46 CIIN 0 4 0 46 -1 4 0 21
|
|
82 BGACK_030 5 355 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 361 3 0 34 -1 2 1 21
|
|
28 BG_000 5 354 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 349 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 359 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 357 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
21 AVEC_EXP 5 358 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 364 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
358 RN_AVEC_EXP 3 21 2 6 0 1 3 5 6 7 21 -1 1 0 21
|
|
355 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
312 SM_AMIGA_6_ 3 -1 0 5 0 1 3 5 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 4 0 3 5 7 -1 -1 6 0 21
|
|
350 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_7_ 3 -1 5 3 0 3 7 -1 -1 13 0 21
|
|
345 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
360 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
310 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 3 0 3 5 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 1 3 0 3 5 -1 -1 1 0 21
|
|
346 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
320 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 2 2 2 4 -1 -1 3 0 21
|
|
361 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
344 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
321 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
319 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 5 2 1 5 -1 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 7 2 1 6 -1 -1 1 0 21
|
|
304 inst_CLK_000_NE 3 -1 0 2 3 5 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 7 2 2 7 -1 -1 1 0 21
|
|
353 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
363 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
342 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
317 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
362 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
348 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
352 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
359 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
357 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
356 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
354 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
351 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
347 CLK_PRE_66_0 3 -1 4 1 2 -1 -1 2 0 21
|
|
341 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
318 CLK_CNT_P_0_ 3 -1 4 1 4 -1 -1 2 0 21
|
|
298 CLK_CNT_N_0_ 3 -1 4 1 4 -1 -1 2 0 21
|
|
364 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
340 CLK_000_N_SYNC_10_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
339 CLK_000_N_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
338 CLK_000_N_SYNC_8_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
337 CLK_000_N_SYNC_7_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_5_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_4_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_3_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_2_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_1_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_0_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_8_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_7_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_6_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_5_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_4_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_3_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_1_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_0_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
316 CLK_CNT_N_1_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
315 CLK_CNT_P_1_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
314 CLK_000_N_SYNC_6_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 4 1 7 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 0 1 0 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 5 1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 2 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 5 0 1 3 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
35 VPA 1 -1 -1 2 5 6 35 -1
|
|
10 CLK_000 1 -1 -1 2 1 3 10 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
119 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 350 7 4 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 351 3 4 0 4 6 7 32 -1 2 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
70 RW 5 360 6 2 4 7 70 -1 4 0 21
|
|
79 RW_000 5 352 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 353 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 356 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 361 3 0 33 -1 6 0 21
|
|
65 E 5 358 6 0 65 -1 4 0 21
|
|
82 BGACK_030 5 355 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 359 3 0 34 -1 2 1 21
|
|
28 BG_000 5 354 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 349 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 364 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 363 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 357 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 362 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
355 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
357 RN_AVEC_EXP 3 21 2 6 1 3 4 5 6 7 21 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 5 5 1 2 3 4 5 -1 -1 1 0 21
|
|
350 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
312 SM_AMIGA_6_ 3 -1 3 4 3 4 5 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 1 4 2 3 4 5 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 5 3 2 3 7 -1 -1 13 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 6 0 21
|
|
345 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 5 0 21
|
|
358 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
310 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
298 CLK_CNT_N_0_ 3 -1 1 3 0 1 6 -1 -1 2 0 21
|
|
346 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
320 inst_DS_000_ENABLE 3 -1 4 2 3 4 -1 -1 3 0 21
|
|
359 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
344 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
321 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
319 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 5 2 4 5 -1 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
316 CLK_CNT_N_1_ 3 -1 6 2 0 1 -1 -1 1 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 7 2 1 6 -1 -1 1 0 21
|
|
304 inst_CLK_000_NE 3 -1 6 2 3 5 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 4 2 2 4 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 5 2 2 4 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 2 2 1 2 -1 -1 1 0 21
|
|
353 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
361 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
342 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
317 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
360 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
348 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
352 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 1 1 1 -1 -1 3 0 21
|
|
364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
356 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
354 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
351 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
347 AMIGA_BUS_ENABLE_LOW_0 3 -1 0 1 2 -1 -1 2 0 21
|
|
341 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
318 CLK_CNT_P_0_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
362 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
340 CLK_000_N_SYNC_10_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
339 CLK_000_N_SYNC_9_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
338 CLK_000_N_SYNC_8_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
337 CLK_000_N_SYNC_7_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_5_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_4_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_3_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_2_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_1_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_0_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_8_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_7_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_6_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_5_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_4_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_3_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_2_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_1_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_0_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
315 CLK_CNT_P_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
314 CLK_000_N_SYNC_6_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 1 1 7 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 2 1 1 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 0 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 5 2 3 4 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
35 VPA 1 -1 -1 2 0 5 35 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
10 CLK_000 1 -1 -1 2 3 5 10 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
119 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 351 3 4 0 4 6 7 32 -1 2 0 21
|
|
81 AS_030 5 350 7 3 2 3 7 81 -1 4 0 21
|
|
70 RW 5 360 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 353 0 2 0 6 97 -1 7 0 21
|
|
79 RW_000 5 352 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 6 68 -1 1 0 21
|
|
80 DSACK1 5 356 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 361 3 0 33 -1 6 0 21
|
|
65 E 5 358 6 0 65 -1 4 0 21
|
|
82 BGACK_030 5 355 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 359 3 0 34 -1 2 1 21
|
|
28 BG_000 5 354 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 349 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 364 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 363 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 357 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 362 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
357 RN_AVEC_EXP 3 21 2 7 1 2 3 4 5 6 7 21 -1 1 0 21
|
|
355 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
312 SM_AMIGA_6_ 3 -1 1 5 1 2 3 5 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 4 1 3 5 7 -1 -1 6 0 21
|
|
350 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_1_ 3 -1 5 4 3 4 5 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_7_ 3 -1 5 3 1 3 7 -1 -1 13 0 21
|
|
345 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
358 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
309 SM_AMIGA_0_ 3 -1 4 3 3 4 5 -1 -1 2 0 21
|
|
304 inst_CLK_000_NE 3 -1 7 3 3 4 5 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 5 3 1 3 5 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 6 3 1 4 6 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 0 3 1 3 5 -1 -1 1 0 21
|
|
315 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
346 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
320 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 4 2 0 4 -1 -1 3 0 21
|
|
359 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
344 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
321 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
319 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
318 CLK_CNT_P_0_ 3 -1 2 2 0 2 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 2 0 21
|
|
298 CLK_CNT_N_0_ 3 -1 2 2 2 7 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
353 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
361 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
342 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
360 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
348 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
352 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
356 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
354 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
351 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
347 AMIGA_BUS_ENABLE_LOW_0 3 -1 2 1 2 -1 -1 2 0 21
|
|
341 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
362 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
340 CLK_000_N_SYNC_10_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
339 CLK_000_N_SYNC_9_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
338 CLK_000_N_SYNC_8_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
337 CLK_000_N_SYNC_7_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_5_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_4_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_3_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_2_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_1_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_0_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_8_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_7_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_6_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_5_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_4_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_3_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_2_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_1_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_0_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
317 CLK_CNT_N_1_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
316 CLK_CNT_P_1_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
314 CLK_000_N_SYNC_6_ 3 -1 5 1 7 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 4 1 7 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 0 1 1 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 1 1 1 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 3 1 1 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 1 1 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 6 1 2 3 4 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
35 VPA 1 -1 -1 2 5 6 35 -1
|
|
10 CLK_000 1 -1 -1 2 0 3 10 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
131 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
32 AS_000 5 351 3 4 0 4 6 7 32 -1 2 0 21
|
|
81 AS_030 5 350 7 3 1 3 7 81 -1 4 0 21
|
|
70 RW 5 362 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 352 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 353 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 358 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 363 3 0 33 -1 6 0 21
|
|
65 E 5 360 6 0 65 -1 4 0 21
|
|
82 BGACK_030 5 355 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 361 3 0 34 -1 2 1 21
|
|
28 BG_000 5 354 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 349 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 357 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 356 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
21 AVEC_EXP 5 359 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 364 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
359 RN_AVEC_EXP 3 21 2 6 1 2 3 5 6 7 21 -1 1 0 21
|
|
355 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
312 SM_AMIGA_6_ 3 -1 5 5 1 2 3 5 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 4 5 0 2 3 5 6 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 0 5 0 2 3 4 5 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 4 2 3 5 7 -1 -1 6 0 21
|
|
350 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_1_ 3 -1 2 4 2 3 5 7 -1 -1 2 0 21
|
|
311 SM_AMIGA_7_ 3 -1 2 3 3 5 7 -1 -1 13 0 21
|
|
345 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
|
|
360 RN_E 3 65 6 3 2 3 6 65 -1 4 0 21
|
|
318 CLK_CNT_P_0_ 3 -1 0 3 0 5 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 5 3 2 3 5 -1 -1 2 0 21
|
|
304 inst_CLK_000_NE 3 -1 1 3 2 3 5 -1 -1 1 0 21
|
|
346 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
320 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 6 2 2 6 -1 -1 3 0 21
|
|
361 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
344 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
321 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
319 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 2 0 21
|
|
298 CLK_CNT_N_0_ 3 -1 5 2 4 5 -1 -1 2 0 21
|
|
316 CLK_CNT_P_1_ 3 -1 7 2 0 5 -1 -1 1 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 0 6 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
353 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
363 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
342 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 6 0 21
|
|
315 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
362 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
348 SM_AMIGA_7__0 3 -1 2 1 2 -1 -1 4 0 21
|
|
352 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
358 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
357 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
356 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
354 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
351 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
347 AMIGA_BUS_ENABLE_LOW_0 3 -1 5 1 2 -1 -1 2 0 21
|
|
341 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
364 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
340 CLK_000_N_SYNC_10_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
339 CLK_000_N_SYNC_9_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
338 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
337 CLK_000_N_SYNC_7_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_5_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_4_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_3_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_2_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_1_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_0_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_7_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_6_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_5_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_4_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_3_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_2_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_1_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_0_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
317 CLK_CNT_N_1_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
314 CLK_000_N_SYNC_6_ 3 -1 6 1 7 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 2 1 4 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 6 1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 5 1 2 3 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
35 VPA 1 -1 -1 2 2 5 35 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 0 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
131 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 350 7 4 1 2 3 7 81 -1 4 0 21
|
|
32 AS_000 5 351 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 362 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 352 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 353 0 1 0 97 -1 7 0 21
|
|
80 DSACK1 5 358 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 0 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 363 3 0 33 -1 6 0 21
|
|
65 E 5 360 6 0 65 -1 4 0 21
|
|
82 BGACK_030 5 357 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
46 CIIN 0 4 0 46 -1 2 0 21
|
|
34 VMA 5 361 3 0 34 -1 2 1 21
|
|
28 BG_000 5 356 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 349 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 355 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 354 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
21 AVEC_EXP 5 359 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 364 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
357 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
359 RN_AVEC_EXP 3 21 2 5 1 3 5 6 7 21 -1 1 0 21
|
|
350 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_6_ 3 -1 3 4 1 3 5 7 -1 -1 2 0 21
|
|
309 SM_AMIGA_7_ 3 -1 5 3 2 3 7 -1 -1 13 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 6 0 21
|
|
345 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
360 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
311 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
298 CLK_CNT_N_0_ 3 -1 2 3 1 2 7 -1 -1 2 0 21
|
|
304 inst_CLK_000_NE 3 -1 5 3 1 3 5 -1 -1 1 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 3 0 3 5 -1 -1 1 0 21
|
|
346 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
320 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 6 2 2 6 -1 -1 3 0 21
|
|
361 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
344 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
341 SM_AMIGA_5_ 3 -1 1 2 1 5 -1 -1 2 0 21
|
|
321 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
319 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
318 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 5 2 1 5 -1 -1 2 0 21
|
|
312 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
317 CLK_CNT_N_1_ 3 -1 7 2 1 2 -1 -1 1 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 0 2 2 5 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 6 2 4 6 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 7 2 3 5 -1 -1 1 0 21
|
|
353 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
363 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
342 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
315 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
362 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
348 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
352 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
358 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
356 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
351 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
347 AMIGA_BUS_ENABLE_LOW_0 3 -1 1 1 2 -1 -1 2 0 21
|
|
364 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
340 CLK_000_N_SYNC_10_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
339 CLK_000_N_SYNC_9_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
338 CLK_000_N_SYNC_8_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
337 CLK_000_N_SYNC_7_ 3 -1 7 1 6 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_5_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_4_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_3_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_1_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_8_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_7_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_6_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_5_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_4_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_3_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_1_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_0_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
316 CLK_CNT_P_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
314 CLK_000_N_SYNC_6_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 2 1 0 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 2 1 5 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 5 1 2 3 5 7 40 -1
|
|
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
35 VPA 1 -1 -1 2 5 7 35 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 7 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
132 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 351 7 5 1 3 4 5 7 81 -1 4 0 21
|
|
32 AS_000 5 352 3 4 0 4 6 7 32 -1 2 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
70 RW 5 363 6 2 4 7 70 -1 4 0 21
|
|
79 RW_000 5 353 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 354 0 1 0 97 -1 7 0 21
|
|
80 DSACK1 5 359 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 0 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 2 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 364 3 0 33 -1 6 0 21
|
|
65 E 5 361 6 0 65 -1 4 0 21
|
|
82 BGACK_030 5 358 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 362 3 0 34 -1 2 1 21
|
|
28 BG_000 5 357 3 0 28 -1 2 0 21
|
|
8 IPL_030_2_ 5 350 1 0 8 -1 2 0 21
|
|
7 IPL_030_0_ 5 356 1 0 7 -1 2 0 21
|
|
6 IPL_030_1_ 5 355 1 0 6 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 360 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 365 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
360 RN_AVEC_EXP 3 21 2 7 1 2 3 4 5 6 7 21 -1 1 0 21
|
|
358 RN_BGACK_030 3 82 7 6 0 3 4 5 6 7 82 -1 2 0 21
|
|
310 SM_AMIGA_6_ 3 -1 3 5 1 2 3 4 7 -1 -1 2 0 21
|
|
304 inst_CLK_000_NE 3 -1 1 5 1 2 3 5 6 -1 -1 1 0 21
|
|
351 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
311 SM_AMIGA_1_ 3 -1 2 4 2 3 6 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 3 4 2 3 4 6 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 2 3 3 5 7 -1 -1 13 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 5 3 2 3 5 -1 -1 6 0 21
|
|
345 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 5 0 21
|
|
361 RN_E 3 65 6 3 2 3 6 65 -1 4 0 21
|
|
346 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21
|
|
344 cpu_est_0_ 3 -1 3 3 2 3 6 -1 -1 2 0 21
|
|
341 SM_AMIGA_5_ 3 -1 1 3 1 2 5 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 5 3 2 4 5 -1 -1 2 0 21
|
|
312 SM_AMIGA_0_ 3 -1 6 3 2 3 6 -1 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 6 3 2 3 4 -1 -1 1 0 21
|
|
320 inst_DS_000_ENABLE 3 -1 4 2 3 4 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 6 2 2 6 -1 -1 3 0 21
|
|
362 RN_VMA 3 34 3 2 2 3 34 -1 2 1 21
|
|
321 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
319 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
318 CLK_CNT_P_0_ 3 -1 5 2 1 5 -1 -1 2 0 21
|
|
298 CLK_CNT_N_0_ 3 -1 5 2 0 5 -1 -1 2 0 21
|
|
314 CLK_000_N_SYNC_6_ 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 6 2 1 4 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
354 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
364 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
342 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 6 0 21
|
|
315 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
363 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
349 SM_AMIGA_7__0 3 -1 2 1 2 -1 -1 4 0 21
|
|
353 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
343 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 3 0 21
|
|
359 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
357 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
|
|
355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
|
|
352 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
350 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
|
|
348 AMIGA_BUS_ENABLE_LOW_0 3 -1 5 1 2 -1 -1 2 0 21
|
|
347 CIIN_0 3 -1 1 1 4 -1 -1 2 0 21
|
|
365 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
340 CLK_000_N_SYNC_10_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
339 CLK_000_N_SYNC_9_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
338 CLK_000_N_SYNC_8_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
337 CLK_000_N_SYNC_7_ 3 -1 6 1 5 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_5_ 3 -1 4 1 7 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_4_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_3_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_2_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_1_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_0_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_8_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_7_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_6_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_5_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_4_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_3_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_2_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_1_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
317 CLK_CNT_N_1_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
316 CLK_CNT_P_1_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 2 1 5 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 1 1 4 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 2 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
40 BERR 1 -1 -1 7 1 2 3 4 5 6 7 40 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 5 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 5 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 5 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 5 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 5 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 5 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 5 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 2 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 1 18 -1
|
|
17 A_25_ 1 -1 -1 1 1 17 -1
|
|
16 A_26_ 1 -1 -1 1 1 16 -1
|
|
15 A_27_ 1 -1 -1 1 1 15 -1
|
|
14 A_28_ 1 -1 -1 1 1 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 1 5 -1
|
|
4 A_30_ 1 -1 -1 1 1 4 -1
|
|
3 A_31_ 1 -1 -1 1 1 3 -1
|
|
132 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 352 7 5 0 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 354 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 363 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 355 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 356 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 359 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 364 3 0 33 -1 6 0 21
|
|
65 E 5 361 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 350 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 353 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 351 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 358 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 362 3 0 34 -1 2 1 21
|
|
28 BG_000 5 357 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 360 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 365 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
358 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
360 RN_AVEC_EXP 3 21 2 5 2 3 5 6 7 21 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 1 5 0 1 3 4 5 -1 -1 1 0 21
|
|
352 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_6_ 3 -1 3 4 2 3 5 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 0 4 1 3 4 5 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 6 0 21
|
|
346 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 5 0 21
|
|
361 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
345 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
311 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
304 inst_CLK_000_NE 3 -1 2 3 2 3 5 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 5 2 3 7 -1 -1 13 0 21
|
|
347 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
320 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 2 2 2 4 -1 -1 3 0 21
|
|
362 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
342 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 2 0 21
|
|
321 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
319 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
318 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
312 SM_AMIGA_0_ 3 -1 3 2 3 5 -1 -1 2 0 21
|
|
316 CLK_CNT_P_1_ 3 -1 0 2 0 1 -1 -1 1 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 5 2 4 7 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 6 2 2 6 -1 -1 1 0 21
|
|
356 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
364 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
343 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
315 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
363 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
349 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
355 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
351 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
350 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
344 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
359 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
357 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
354 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
348 AMIGA_BUS_ENABLE_LOW_0 3 -1 0 1 2 -1 -1 2 0 21
|
|
341 un8_ciin 3 -1 0 1 4 -1 -1 2 0 21
|
|
298 CLK_CNT_N_0_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
365 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
340 CLK_000_N_SYNC_10_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
339 CLK_000_N_SYNC_9_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
338 CLK_000_N_SYNC_8_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
337 CLK_000_N_SYNC_7_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_5_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_4_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_3_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_2_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_1_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_7_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_6_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_5_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_4_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_3_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_2_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_1_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_0_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
317 CLK_CNT_N_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
314 CLK_000_N_SYNC_6_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 4 1 5 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 7 1 4 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 2 1 2 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 4 2 3 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
35 VPA 1 -1 -1 2 4 5 35 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 0 18 -1
|
|
17 A_25_ 1 -1 -1 1 0 17 -1
|
|
16 A_26_ 1 -1 -1 1 0 16 -1
|
|
15 A_27_ 1 -1 -1 1 0 15 -1
|
|
14 A_28_ 1 -1 -1 1 0 14 -1
|
|
10 CLK_000 1 -1 -1 1 1 10 -1
|
|
5 A_29_ 1 -1 -1 1 0 5 -1
|
|
4 A_30_ 1 -1 -1 1 0 4 -1
|
|
3 A_31_ 1 -1 -1 1 0 3 -1
|
|
132 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 351 7 5 1 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 352 3 4 0 4 6 7 32 -1 2 0 21
|
|
40 BERR 5 -1 4 4 2 3 5 7 40 -1 1 0 21
|
|
70 RW 5 363 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 354 0 2 0 6 97 -1 7 0 21
|
|
79 RW_000 5 353 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 6 68 -1 1 0 21
|
|
80 DSACK1 5 359 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 6 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 6 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 364 3 0 33 -1 6 0 21
|
|
65 E 5 361 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 350 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 356 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 355 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 358 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 362 3 0 34 -1 2 1 21
|
|
28 BG_000 5 357 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 360 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 365 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
358 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
360 RN_AVEC_EXP 3 21 2 5 2 3 5 6 7 21 -1 1 0 21
|
|
351 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
311 SM_AMIGA_1_ 3 -1 2 4 2 3 5 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_6_ 3 -1 3 4 2 3 5 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 1 4 1 3 4 5 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 0 4 1 3 4 5 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 6 0 21
|
|
346 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
361 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
318 CLK_CNT_P_0_ 3 -1 2 3 0 2 5 -1 -1 2 0 21
|
|
304 inst_CLK_000_NE 3 -1 0 3 2 3 5 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 5 2 3 7 -1 -1 13 0 21
|
|
315 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
347 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
344 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 3 0 21
|
|
320 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 0 2 0 4 -1 -1 3 0 21
|
|
362 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
345 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
342 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
321 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
319 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
312 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
298 CLK_CNT_N_0_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
316 CLK_CNT_P_1_ 3 -1 5 2 0 2 -1 -1 1 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 4 2 4 5 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 5 2 4 5 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 2 2 0 2 -1 -1 1 0 21
|
|
354 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
364 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
343 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
363 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
349 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
353 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
350 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
359 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
357 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
352 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
348 CLK_PRE_66_0 3 -1 0 1 2 -1 -1 2 0 21
|
|
341 un8_ciin 3 -1 1 1 4 -1 -1 2 0 21
|
|
365 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
340 CLK_000_N_SYNC_10_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
339 CLK_000_N_SYNC_9_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
338 CLK_000_N_SYNC_8_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
337 CLK_000_N_SYNC_7_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_5_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_4_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_3_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_2_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_8_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_7_ 3 -1 7 1 6 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_6_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_5_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_4_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_3_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_2_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_1_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_0_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
317 CLK_CNT_N_1_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
314 CLK_000_N_SYNC_6_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 4 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 2 1 0 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 4 7 56 -1
|
|
35 VPA 1 -1 -1 2 4 5 35 -1
|
|
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 1 18 -1
|
|
17 A_25_ 1 -1 -1 1 1 17 -1
|
|
16 A_26_ 1 -1 -1 1 1 16 -1
|
|
15 A_27_ 1 -1 -1 1 1 15 -1
|
|
14 A_28_ 1 -1 -1 1 1 14 -1
|
|
10 CLK_000 1 -1 -1 1 0 10 -1
|
|
5 A_29_ 1 -1 -1 1 1 5 -1
|
|
4 A_30_ 1 -1 -1 1 1 4 -1
|
|
3 A_31_ 1 -1 -1 1 1 3 -1
|
|
132 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 352 7 5 0 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 354 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 363 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 355 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 356 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 359 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 364 3 0 33 -1 6 0 21
|
|
65 E 5 361 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 350 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 353 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 351 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 358 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 362 3 0 34 -1 2 1 21
|
|
28 BG_000 5 357 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 360 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 365 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
358 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
360 RN_AVEC_EXP 3 21 2 5 2 3 5 6 7 21 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 1 5 0 1 3 4 5 -1 -1 1 0 21
|
|
352 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_6_ 3 -1 3 4 2 3 5 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 0 4 1 3 4 5 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 6 0 21
|
|
346 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 5 0 21
|
|
361 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
345 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
311 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
304 inst_CLK_000_NE 3 -1 2 3 2 3 5 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 5 2 3 7 -1 -1 13 0 21
|
|
347 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
320 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 2 2 2 4 -1 -1 3 0 21
|
|
362 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
342 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 2 0 21
|
|
321 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
319 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
318 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
312 SM_AMIGA_0_ 3 -1 3 2 3 5 -1 -1 2 0 21
|
|
316 CLK_CNT_P_1_ 3 -1 0 2 0 1 -1 -1 1 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 5 2 4 7 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 6 2 2 6 -1 -1 1 0 21
|
|
356 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
364 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
343 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
315 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
363 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
349 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
355 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
351 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
350 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
344 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
359 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
357 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
354 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
348 AMIGA_BUS_ENABLE_LOW_0 3 -1 0 1 2 -1 -1 2 0 21
|
|
341 un8_ciin 3 -1 0 1 4 -1 -1 2 0 21
|
|
298 CLK_CNT_N_0_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
365 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
340 CLK_000_N_SYNC_10_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
339 CLK_000_N_SYNC_9_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
338 CLK_000_N_SYNC_8_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
337 CLK_000_N_SYNC_7_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_5_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_4_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_3_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_2_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_1_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_7_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_6_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_5_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_4_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_3_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_2_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_1_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_0_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
317 CLK_CNT_N_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
314 CLK_000_N_SYNC_6_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 4 1 5 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 7 1 4 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 2 1 2 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 4 2 3 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
35 VPA 1 -1 -1 2 4 5 35 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 0 18 -1
|
|
17 A_25_ 1 -1 -1 1 0 17 -1
|
|
16 A_26_ 1 -1 -1 1 0 16 -1
|
|
15 A_27_ 1 -1 -1 1 0 15 -1
|
|
14 A_28_ 1 -1 -1 1 0 14 -1
|
|
10 CLK_000 1 -1 -1 1 1 10 -1
|
|
5 A_29_ 1 -1 -1 1 0 5 -1
|
|
4 A_30_ 1 -1 -1 1 0 4 -1
|
|
3 A_31_ 1 -1 -1 1 0 3 -1
|
|
132 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 351 7 5 1 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 352 3 4 0 4 6 7 32 -1 2 0 21
|
|
40 BERR 5 -1 4 4 2 3 5 7 40 -1 1 0 21
|
|
70 RW 5 363 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 354 0 2 0 6 97 -1 7 0 21
|
|
79 RW_000 5 353 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 6 68 -1 1 0 21
|
|
80 DSACK1 5 359 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 6 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 6 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 364 3 0 33 -1 6 0 21
|
|
65 E 5 361 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 350 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 356 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 355 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 358 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 362 3 0 34 -1 2 1 21
|
|
28 BG_000 5 357 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 360 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 365 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
358 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
360 RN_AVEC_EXP 3 21 2 5 2 3 5 6 7 21 -1 1 0 21
|
|
351 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
311 SM_AMIGA_1_ 3 -1 2 4 2 3 5 7 -1 -1 2 0 21
|
|
310 SM_AMIGA_6_ 3 -1 3 4 2 3 5 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 1 4 1 3 4 5 -1 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 0 4 1 3 4 5 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 6 0 21
|
|
346 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 5 0 21
|
|
361 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
318 CLK_CNT_P_0_ 3 -1 2 3 0 2 5 -1 -1 2 0 21
|
|
304 inst_CLK_000_NE 3 -1 0 3 2 3 5 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 5 2 3 7 -1 -1 13 0 21
|
|
315 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
347 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 4 0 21
|
|
344 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 3 0 21
|
|
320 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 0 2 0 4 -1 -1 3 0 21
|
|
362 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
345 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 2 0 21
|
|
342 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
321 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
319 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
312 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
298 CLK_CNT_N_0_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
316 CLK_CNT_P_1_ 3 -1 5 2 0 2 -1 -1 1 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 4 2 4 5 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 5 2 4 5 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 2 2 0 2 -1 -1 1 0 21
|
|
354 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
364 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
343 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
363 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
349 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
353 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
350 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
359 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
357 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
352 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
348 CLK_PRE_66_0 3 -1 0 1 2 -1 -1 2 0 21
|
|
341 un8_ciin 3 -1 1 1 4 -1 -1 2 0 21
|
|
365 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
340 CLK_000_N_SYNC_10_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
339 CLK_000_N_SYNC_9_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
338 CLK_000_N_SYNC_8_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
337 CLK_000_N_SYNC_7_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_5_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_4_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_3_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_2_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_8_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_7_ 3 -1 7 1 6 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_6_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_5_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_4_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_3_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_2_ 3 -1 7 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_1_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_0_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
317 CLK_CNT_N_1_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
314 CLK_000_N_SYNC_6_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 4 1 6 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 2 1 0 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 4 7 56 -1
|
|
35 VPA 1 -1 -1 2 4 5 35 -1
|
|
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 1 18 -1
|
|
17 A_25_ 1 -1 -1 1 1 17 -1
|
|
16 A_26_ 1 -1 -1 1 1 16 -1
|
|
15 A_27_ 1 -1 -1 1 1 15 -1
|
|
14 A_28_ 1 -1 -1 1 1 14 -1
|
|
10 CLK_000 1 -1 -1 1 0 10 -1
|
|
5 A_29_ 1 -1 -1 1 1 5 -1
|
|
4 A_30_ 1 -1 -1 1 1 4 -1
|
|
3 A_31_ 1 -1 -1 1 1 3 -1
|
|
132 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 352 7 5 0 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 354 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 363 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 355 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 356 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 359 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 364 3 0 33 -1 6 0 21
|
|
65 E 5 361 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 350 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 353 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 351 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 358 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 362 3 0 34 -1 2 1 21
|
|
28 BG_000 5 357 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 360 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 365 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
358 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
360 RN_AVEC_EXP 3 21 2 5 2 3 5 6 7 21 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 1 5 0 1 3 4 5 -1 -1 1 0 21
|
|
352 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_6_ 3 -1 3 4 2 3 5 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 0 4 1 3 4 5 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 6 0 21
|
|
346 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 5 0 21
|
|
361 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
345 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
|
|
311 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
304 inst_CLK_000_NE 3 -1 2 3 2 3 5 -1 -1 1 0 21
|
|
309 SM_AMIGA_7_ 3 -1 5 2 3 7 -1 -1 13 0 21
|
|
347 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
320 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 2 2 2 4 -1 -1 3 0 21
|
|
362 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
342 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 2 0 21
|
|
321 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
319 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
318 CLK_CNT_P_0_ 3 -1 1 2 0 1 -1 -1 2 0 21
|
|
313 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
312 SM_AMIGA_0_ 3 -1 3 2 3 5 -1 -1 2 0 21
|
|
316 CLK_CNT_P_1_ 3 -1 0 2 0 1 -1 -1 1 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 5 2 4 7 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 6 2 2 6 -1 -1 1 0 21
|
|
356 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
364 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
343 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 6 0 21
|
|
315 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
363 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
349 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 4 0 21
|
|
355 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
351 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
350 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
344 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
359 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
357 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
354 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
348 AMIGA_BUS_ENABLE_LOW_0 3 -1 0 1 2 -1 -1 2 0 21
|
|
341 un8_ciin 3 -1 0 1 4 -1 -1 2 0 21
|
|
298 CLK_CNT_N_0_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
365 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
340 CLK_000_N_SYNC_10_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
339 CLK_000_N_SYNC_9_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
338 CLK_000_N_SYNC_8_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
337 CLK_000_N_SYNC_7_ 3 -1 7 1 2 -1 -1 1 0 21
|
|
336 CLK_000_N_SYNC_5_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
335 CLK_000_N_SYNC_4_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_3_ 3 -1 7 1 4 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_2_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_1_ 3 -1 1 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
330 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
329 CLK_000_P_SYNC_7_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_6_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_5_ 3 -1 5 1 6 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_4_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_3_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_2_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_1_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_0_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
317 CLK_CNT_N_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
314 CLK_000_N_SYNC_6_ 3 -1 2 1 7 -1 -1 1 0 21
|
|
308 CLK_000_N_SYNC_11_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 4 1 5 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 7 1 4 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 2 1 2 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 4 2 3 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
35 VPA 1 -1 -1 2 4 5 35 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 0 18 -1
|
|
17 A_25_ 1 -1 -1 1 0 17 -1
|
|
16 A_26_ 1 -1 -1 1 0 16 -1
|
|
15 A_27_ 1 -1 -1 1 0 15 -1
|
|
14 A_28_ 1 -1 -1 1 0 14 -1
|
|
10 CLK_000 1 -1 -1 1 1 10 -1
|
|
5 A_29_ 1 -1 -1 1 0 5 -1
|
|
4 A_30_ 1 -1 -1 1 0 4 -1
|
|
3 A_31_ 1 -1 -1 1 0 3 -1
|
|
126 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 346 7 5 1 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 348 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 357 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 349 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 350 0 1 2 97 -1 7 0 21
|
|
80 DSACK1 5 353 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 2 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 358 3 0 33 -1 6 0 21
|
|
65 E 5 355 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 344 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 347 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 345 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 352 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 356 3 0 34 -1 2 1 21
|
|
28 BG_000 5 351 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 354 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 359 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 2 6 1 2 3 4 5 7 -1 -1 1 0 21
|
|
352 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
346 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_6_ 3 -1 3 4 2 3 5 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 7 4 1 3 4 5 -1 -1 1 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 6 0 21
|
|
340 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 5 0 21
|
|
355 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
308 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
354 RN_AVEC_EXP 3 21 2 3 3 6 7 21 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 2 3 0 2 6 -1 -1 1 0 21
|
|
307 SM_AMIGA_7_ 3 -1 5 2 3 7 -1 -1 11 0 21
|
|
341 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
356 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
339 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
317 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
316 CLK_CNT_P_0_ 3 -1 2 2 2 4 -1 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
298 CLK_CNT_N_0_ 3 -1 4 2 0 4 -1 -1 2 0 21
|
|
314 CLK_CNT_P_1_ 3 -1 2 2 2 4 -1 -1 1 0 21
|
|
304 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21
|
|
350 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
358 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
337 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
313 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
357 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
349 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
345 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
343 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 3 1 21
|
|
338 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 0 1 0 -1 -1 3 0 21
|
|
353 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
348 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
342 AMIGA_BUS_ENABLE_LOW_0 3 -1 4 1 2 -1 -1 2 0 21
|
|
336 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
335 un8_ciin 3 -1 1 1 4 -1 -1 2 0 21
|
|
359 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
334 CLK_000_N_SYNC_5_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_4_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_3_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_2_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_1_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_7_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_6_ 3 -1 1 1 6 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_5_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_4_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_3_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_2_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_1_ 3 -1 4 1 5 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_0_ 3 -1 4 1 4 -1 -1 1 0 21
|
|
315 CLK_CNT_N_1_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
312 CLK_000_N_SYNC_6_ 3 -1 5 1 7 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
305 inst_CLK_OUT_PRE 3 -1 0 1 0 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 4 1 4 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 4 1 4 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 6 1 0 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 4 2 3 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
35 VPA 1 -1 -1 2 4 5 35 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 1 18 -1
|
|
17 A_25_ 1 -1 -1 1 1 17 -1
|
|
16 A_26_ 1 -1 -1 1 1 16 -1
|
|
15 A_27_ 1 -1 -1 1 1 15 -1
|
|
14 A_28_ 1 -1 -1 1 1 14 -1
|
|
10 CLK_000 1 -1 -1 1 2 10 -1
|
|
5 A_29_ 1 -1 -1 1 1 5 -1
|
|
4 A_30_ 1 -1 -1 1 1 4 -1
|
|
3 A_31_ 1 -1 -1 1 1 3 -1
|
|
127 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 348 7 5 1 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 349 3 4 0 4 6 7 32 -1 2 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
70 RW 5 358 6 2 4 7 70 -1 4 0 21
|
|
79 RW_000 5 350 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 351 0 1 4 97 -1 7 0 21
|
|
80 DSACK1 5 354 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 4 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 4 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 4 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 359 3 0 33 -1 6 0 21
|
|
65 E 5 356 6 0 65 -1 4 0 21
|
|
8 IPL_030_2_ 5 345 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 347 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 346 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 353 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 357 3 0 34 -1 2 1 21
|
|
28 BG_000 5 352 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 355 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 360 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
353 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 4 6 0 1 3 4 5 7 -1 -1 1 0 21
|
|
348 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
310 SM_AMIGA_6_ 3 -1 3 4 3 4 5 7 -1 -1 2 0 21
|
|
301 inst_CLK_000_D1 3 -1 4 4 0 1 3 5 -1 -1 1 0 21
|
|
307 SM_AMIGA_7_ 3 -1 5 3 2 3 7 -1 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 6 0 21
|
|
341 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 5 0 21
|
|
356 RN_E 3 65 6 3 3 5 6 65 -1 4 0 21
|
|
316 CLK_CNT_P_0_ 3 -1 0 3 0 1 6 -1 -1 2 0 21
|
|
308 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
355 RN_AVEC_EXP 3 21 2 3 3 6 7 21 -1 1 0 21
|
|
342 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 4 0 21
|
|
318 inst_DS_000_ENABLE 3 -1 4 2 3 4 -1 -1 3 0 21
|
|
300 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21
|
|
357 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
340 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 2 0 21
|
|
337 SM_AMIGA_5_ 3 -1 4 2 4 5 -1 -1 2 0 21
|
|
319 inst_UDS_000_INT 3 -1 4 2 3 4 -1 -1 2 0 21
|
|
317 inst_LDS_000_INT 3 -1 4 2 3 4 -1 -1 2 0 21
|
|
311 SM_AMIGA_4_ 3 -1 4 2 4 5 -1 -1 2 0 21
|
|
309 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
298 CLK_CNT_N_0_ 3 -1 2 2 2 6 -1 -1 2 0 21
|
|
315 CLK_CNT_N_1_ 3 -1 6 2 2 6 -1 -1 1 0 21
|
|
314 CLK_CNT_P_1_ 3 -1 1 2 0 6 -1 -1 1 0 21
|
|
304 inst_CLK_OUT_PRE_D 3 -1 2 2 1 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D2 3 -1 5 2 0 2 -1 -1 1 0 21
|
|
299 inst_CLK_OUT_PRE_50 3 -1 7 2 6 7 -1 -1 1 0 21
|
|
351 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
359 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
338 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
313 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
358 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
350 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
345 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
344 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 3 1 21
|
|
339 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
354 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
352 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
349 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
343 AMIGA_BUS_ENABLE_LOW_0 3 -1 6 1 2 -1 -1 2 0 21
|
|
336 un8_ciin 3 -1 1 1 4 -1 -1 2 0 21
|
|
360 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
335 CLK_000_N_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
334 CLK_000_N_SYNC_5_ 3 -1 5 1 0 -1 -1 1 0 21
|
|
333 CLK_000_N_SYNC_4_ 3 -1 7 1 5 -1 -1 1 0 21
|
|
332 CLK_000_N_SYNC_3_ 3 -1 0 1 7 -1 -1 1 0 21
|
|
331 CLK_000_N_SYNC_2_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
330 CLK_000_N_SYNC_1_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
329 CLK_000_N_SYNC_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
328 CLK_000_P_SYNC_8_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_7_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_6_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_5_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_4_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_2_ 3 -1 5 1 1 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_1_ 3 -1 0 1 5 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
312 CLK_000_N_SYNC_7_ 3 -1 1 1 7 -1 -1 1 0 21
|
|
306 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
305 inst_CLK_OUT_PRE 3 -1 1 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_000_D3 3 -1 2 1 0 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 7 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 2 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 5 2 3 4 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
35 VPA 1 -1 -1 2 2 5 35 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 1 18 -1
|
|
17 A_25_ 1 -1 -1 1 1 17 -1
|
|
16 A_26_ 1 -1 -1 1 1 16 -1
|
|
15 A_27_ 1 -1 -1 1 1 15 -1
|
|
14 A_28_ 1 -1 -1 1 1 14 -1
|
|
10 CLK_000 1 -1 -1 1 4 10 -1
|
|
5 A_29_ 1 -1 -1 1 1 5 -1
|
|
4 A_30_ 1 -1 -1 1 1 4 -1
|
|
3 A_31_ 1 -1 -1 1 1 3 -1
|
|
120 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 341 7 4 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 342 3 4 0 4 6 7 32 -1 2 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
70 RW 5 351 6 2 4 7 70 -1 4 0 21
|
|
79 RW_000 5 343 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 344 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 347 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 352 3 0 33 -1 6 0 21
|
|
65 E 5 349 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 340 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 339 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 338 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 346 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 350 3 0 34 -1 2 1 21
|
|
28 BG_000 5 345 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 5 348 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 353 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D0 3 -1 6 7 0 1 3 4 5 6 7 -1 -1 1 0 21
|
|
311 SM_AMIGA_6_ 3 -1 1 6 0 1 3 4 5 7 -1 -1 2 0 21
|
|
346 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 4 1 3 5 7 -1 -1 6 0 21
|
|
341 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
309 SM_AMIGA_1_ 3 -1 0 4 0 3 5 7 -1 -1 2 0 21
|
|
302 inst_CLK_000_D1 3 -1 4 4 1 3 5 6 -1 -1 1 0 21
|
|
308 SM_AMIGA_7_ 3 -1 5 3 1 3 7 -1 -1 11 0 21
|
|
334 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
|
|
349 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
333 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21
|
|
312 SM_AMIGA_4_ 3 -1 0 3 0 4 5 -1 -1 2 0 21
|
|
335 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
332 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21
|
|
318 inst_DS_000_ENABLE 3 -1 4 2 3 4 -1 -1 3 0 21
|
|
301 inst_CLK_OUT_PRE_25 3 -1 4 2 4 5 -1 -1 3 0 21
|
|
350 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
330 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 2 0 21
|
|
319 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
317 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
316 CLK_CNT_P_0_ 3 -1 2 2 2 4 -1 -1 2 0 21
|
|
310 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
348 RN_AVEC_EXP 3 21 2 2 3 7 21 -1 1 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21
|
|
304 inst_CLK_000_D3 3 -1 6 2 6 7 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 2 2 2 4 -1 -1 1 0 21
|
|
344 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
352 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
331 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
313 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
351 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
343 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
340 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
339 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
338 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
337 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 3 1 21
|
|
347 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
345 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
342 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
336 AMIGA_BUS_ENABLE_LOW_0 3 -1 2 1 2 -1 -1 2 0 21
|
|
329 un8_ciin 3 -1 2 1 4 -1 -1 2 0 21
|
|
299 CLK_CNT_N_0_ 3 -1 2 1 2 -1 -1 2 0 21
|
|
353 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
328 CLK_000_P_SYNC_8_ 3 -1 2 1 1 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_7_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_6_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_5_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_4_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_3_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_2_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_1_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_0_ 3 -1 6 1 4 -1 -1 1 0 21
|
|
315 CLK_CNT_N_1_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
314 CLK_CNT_P_1_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 5 1 5 -1 -1 1 0 21
|
|
303 inst_CLK_000_D2 3 -1 5 1 6 -1 -1 1 0 21
|
|
298 inst_CLK_000_D4 3 -1 7 1 7 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 4 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 6 0 1 3 4 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 1 7 94 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
58 A_17_ 1 -1 -1 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 1 7 56 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
27 BGACK_000 1 -1 -1 1 7 27 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 2 18 -1
|
|
17 A_25_ 1 -1 -1 1 2 17 -1
|
|
16 A_26_ 1 -1 -1 1 2 16 -1
|
|
15 A_27_ 1 -1 -1 1 2 15 -1
|
|
14 A_28_ 1 -1 -1 1 2 14 -1
|
|
10 CLK_000 1 -1 -1 1 6 10 -1
|
|
5 A_29_ 1 -1 -1 1 2 5 -1
|
|
4 A_30_ 1 -1 -1 1 2 4 -1
|
|
3 A_31_ 1 -1 -1 1 2 3 -1
|
|
114 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 334 7 5 0 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 335 3 4 0 4 6 7 32 -1 2 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
70 RW 5 343 6 2 4 7 70 -1 4 0 21
|
|
79 RW_000 5 336 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 337 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 340 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 344 3 0 33 -1 6 0 21
|
|
65 E 5 341 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 333 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 346 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 345 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 339 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 342 3 0 34 -1 2 1 21
|
|
28 BG_000 5 338 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 5 347 6 0 64 -1 1 0 20
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
339 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D1 3 -1 7 6 1 3 4 5 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 5 6 1 3 4 5 6 7 -1 -1 1 0 21
|
|
303 SM_AMIGA_7_ 3 -1 5 4 2 3 5 7 -1 -1 11 0 21
|
|
334 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
304 SM_AMIGA_6_ 3 -1 5 4 3 4 5 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 6 0 21
|
|
329 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
341 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
328 cpu_est_0_ 3 -1 4 3 3 4 6 -1 -1 3 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 0 3 0 1 2 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
347 RN_CLK_DIV_OUT 3 64 6 3 1 2 6 64 -1 1 0 20
|
|
308 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
330 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 21
|
|
313 inst_DS_000_ENABLE 3 -1 4 2 3 4 -1 -1 3 0 21
|
|
342 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
325 SM_AMIGA_5_ 3 -1 4 2 4 5 -1 -1 2 0 21
|
|
314 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
307 SM_AMIGA_4_ 3 -1 4 2 4 5 -1 -1 2 0 21
|
|
306 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
299 CLK_CNT_N_0_ 3 -1 0 2 0 1 -1 -1 2 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 0 2 0 1 -1 -1 1 0 21
|
|
309 CLK_CNT_P_1_ 3 -1 2 2 0 1 -1 -1 1 0 21
|
|
301 inst_CLK_000_D3 3 -1 6 2 4 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
337 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
344 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
326 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
343 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
346 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
345 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
336 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
333 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
332 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 3 1 21
|
|
327 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
340 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
338 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
335 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
331 CLK_DIV_OUT_0 3 -1 1 1 6 -1 -1 2 0 21
|
|
324 un8_ciin 3 -1 0 1 4 -1 -1 2 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21
|
|
302 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
298 inst_CLK_000_D4 3 -1 7 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 6 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 5 2 3 4 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
35 VPA 1 -1 -1 2 5 6 35 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 0 18 -1
|
|
17 A_25_ 1 -1 -1 1 0 17 -1
|
|
16 A_26_ 1 -1 -1 1 0 16 -1
|
|
15 A_27_ 1 -1 -1 1 0 15 -1
|
|
14 A_28_ 1 -1 -1 1 0 14 -1
|
|
10 CLK_000 1 -1 -1 1 5 10 -1
|
|
5 A_29_ 1 -1 -1 1 0 5 -1
|
|
4 A_30_ 1 -1 -1 1 0 4 -1
|
|
3 A_31_ 1 -1 -1 1 0 3 -1
|
|
114 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 336 7 5 1 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 337 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 345 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 339 0 2 0 1 97 -1 7 0 21
|
|
79 RW_000 5 338 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 1 68 -1 1 0 21
|
|
80 DSACK1 5 342 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 346 3 0 33 -1 6 0 21
|
|
65 E 5 343 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 335 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 341 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 344 3 0 34 -1 2 1 21
|
|
28 BG_000 5 340 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 5 347 6 0 64 -1 1 0 20
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
341 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 2 5 1 2 3 5 7 -1 -1 2 0 21
|
|
336 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 5 3 2 3 7 -1 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 6 0 21
|
|
329 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
343 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
307 SM_AMIGA_4_ 3 -1 2 3 1 2 5 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
347 RN_CLK_DIV_OUT 3 64 6 3 1 2 6 64 -1 1 0 20
|
|
330 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
328 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
344 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
325 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
314 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 4 2 0 4 -1 -1 2 0 21
|
|
306 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
299 CLK_CNT_N_0_ 3 -1 0 2 0 4 -1 -1 2 0 21
|
|
309 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
301 inst_CLK_000_D3 3 -1 2 2 0 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 4 2 0 2 -1 -1 1 0 21
|
|
339 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
346 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
326 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
308 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
345 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
338 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
335 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
332 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 3 1 21
|
|
327 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
324 un16_ciin 3 -1 4 1 4 -1 -1 3 0 21
|
|
342 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
337 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
331 CLK_DIV_OUT_0 3 -1 0 1 6 -1 -1 2 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
302 CLK_000_P_SYNC_9_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
298 inst_CLK_000_D4 3 -1 7 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 5 1 2 3 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 1 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
119 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 339 7 5 1 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 340 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 350 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 343 0 2 0 2 97 -1 7 0 21
|
|
79 RW_000 5 341 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 2 68 -1 1 0 21
|
|
80 DSACK1 5 347 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 351 3 0 33 -1 6 0 21
|
|
65 E 5 348 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 338 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 344 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 342 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 346 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 349 3 0 34 -1 2 1 21
|
|
28 BG_000 5 345 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 352 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
346 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 2 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 5 1 3 5 6 7 -1 -1 1 0 21
|
|
308 SM_AMIGA_7_ 3 -1 5 4 1 3 5 7 -1 -1 11 0 21
|
|
339 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
333 cpu_est_0_ 3 -1 7 4 3 5 6 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 1 3 1 3 5 -1 -1 6 0 21
|
|
334 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
348 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
335 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 1 21
|
|
310 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
304 inst_CLK_000_D3 3 -1 2 3 4 6 7 -1 -1 1 0 21
|
|
318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 6 2 4 6 -1 -1 3 0 21
|
|
349 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
330 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
319 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
317 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
303 inst_CLK_000_D2 3 -1 7 2 2 6 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
343 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
351 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
331 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
313 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
350 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
344 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
342 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
341 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
337 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 3 1 21
|
|
332 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
329 un16_ciin 3 -1 4 1 4 -1 -1 3 0 21
|
|
347 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
345 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
340 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
336 AMIGA_BUS_ENABLE_LOW_0 3 -1 0 1 2 -1 -1 2 0 21
|
|
316 CLK_CNT_P_0_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
300 CLK_CNT_N_0_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
352 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
328 CLK_000_P_SYNC_8_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_7_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_6_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_5_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_4_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_3_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_2_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_1_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_0_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
315 CLK_CNT_N_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
314 CLK_CNT_P_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 4 1 1 -1 -1 1 0 21
|
|
299 inst_CLK_000_D4 3 -1 4 1 7 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 5 1 2 3 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 1 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 1 7 56 -1
|
|
35 VPA 1 -1 -1 2 1 5 35 -1
|
|
27 BGACK_000 1 -1 -1 2 1 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 2 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
114 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 336 7 5 1 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 337 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 345 6 3 1 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 339 0 2 0 1 97 -1 7 0 21
|
|
79 RW_000 5 338 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 1 68 -1 1 0 21
|
|
80 DSACK1 5 342 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 346 3 0 33 -1 6 0 21
|
|
65 E 5 343 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 335 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 334 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 333 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 341 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 344 3 0 34 -1 2 1 21
|
|
28 BG_000 5 340 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 5 347 6 0 64 -1 1 0 20
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
341 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
304 SM_AMIGA_6_ 3 -1 2 5 1 2 3 5 7 -1 -1 2 0 21
|
|
336 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
303 SM_AMIGA_7_ 3 -1 5 3 2 3 7 -1 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 6 0 21
|
|
329 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
343 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
307 SM_AMIGA_4_ 3 -1 2 3 1 2 5 -1 -1 2 0 21
|
|
305 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
347 RN_CLK_DIV_OUT 3 64 6 3 1 2 6 64 -1 1 0 20
|
|
330 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
328 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
313 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21
|
|
344 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
325 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
314 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
311 CLK_CNT_P_0_ 3 -1 4 2 0 4 -1 -1 2 0 21
|
|
306 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
299 CLK_CNT_N_0_ 3 -1 0 2 0 4 -1 -1 2 0 21
|
|
309 CLK_CNT_P_1_ 3 -1 4 2 0 4 -1 -1 1 0 21
|
|
301 inst_CLK_000_D3 3 -1 2 2 0 7 -1 -1 1 0 21
|
|
300 inst_CLK_000_D2 3 -1 4 2 0 2 -1 -1 1 0 21
|
|
339 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
346 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
326 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
308 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
345 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
338 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
335 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
332 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 3 1 21
|
|
327 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
324 un16_ciin 3 -1 4 1 4 -1 -1 3 0 21
|
|
342 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
337 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
331 CLK_DIV_OUT_0 3 -1 0 1 6 -1 -1 2 0 21
|
|
323 CLK_000_P_SYNC_8_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_7_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_6_ 3 -1 5 1 4 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_5_ 3 -1 5 1 5 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_4_ 3 -1 1 1 5 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_3_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
317 CLK_000_P_SYNC_2_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
316 CLK_000_P_SYNC_1_ 3 -1 0 1 4 -1 -1 1 0 21
|
|
315 CLK_000_P_SYNC_0_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
310 CLK_CNT_N_1_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
302 CLK_000_P_SYNC_9_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
298 inst_CLK_000_D4 3 -1 7 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 5 1 2 3 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 1 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
118 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 340 7 4 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 341 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 349 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 342 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 343 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 346 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 350 3 0 33 -1 6 0 21
|
|
65 E 5 347 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 337 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 339 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 338 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 345 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 348 3 0 34 -1 2 1 21
|
|
28 BG_000 5 344 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 351 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
345 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D1 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 4 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
306 SM_AMIGA_6_ 3 -1 5 5 2 3 5 6 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 5 4 2 3 5 7 -1 -1 11 0 21
|
|
340 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 6 0 21
|
|
331 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
|
|
347 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
330 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 3 0 21
|
|
327 SM_AMIGA_5_ 3 -1 6 3 2 5 6 -1 -1 2 0 21
|
|
307 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
310 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21
|
|
332 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
316 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
348 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
317 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
314 CLK_CNT_P_0_ 3 -1 0 2 0 4 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
308 SM_AMIGA_0_ 3 -1 3 2 3 5 -1 -1 2 0 21
|
|
299 CLK_CNT_N_0_ 3 -1 0 2 0 4 -1 -1 2 0 21
|
|
313 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D3 3 -1 5 2 4 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D2 3 -1 3 2 5 7 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 2 4 5 -1 -1 1 0 21
|
|
343 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
350 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
328 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
349 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
342 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
339 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
338 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
337 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
336 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 3 1 21
|
|
329 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
346 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
344 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
341 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
335 AMIGA_BUS_ENABLE_LOW_0 3 -1 0 1 2 -1 -1 2 0 21
|
|
334 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
|
|
333 un14_ciin_0 3 -1 4 1 4 -1 -1 2 0 21
|
|
351 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
326 CLK_000_P_SYNC_8_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_7_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_6_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_5_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_4_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_3_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_2_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_1_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_0_ 3 -1 7 1 1 -1 -1 1 0 21
|
|
312 CLK_CNT_N_1_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 4 1 0 -1 -1 1 0 21
|
|
304 CLK_000_P_SYNC_9_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 5 1 0 -1 -1 1 0 21
|
|
298 inst_CLK_000_D4 3 -1 4 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 5 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 2 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 5 2 3 5 6 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 2 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 2 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 2 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 2 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 2 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 2 7 56 -1
|
|
27 BGACK_000 1 -1 -1 2 2 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
35 VPA 1 -1 -1 1 5 35 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 4 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
117 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 337 7 4 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 338 3 4 0 4 6 7 32 -1 2 0 21
|
|
40 BERR 5 -1 4 4 2 3 5 7 40 -1 1 0 21
|
|
70 RW 5 348 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
79 RW_000 5 339 7 2 0 6 79 -1 3 0 21
|
|
97 DS_030 5 340 0 1 1 97 -1 7 0 21
|
|
80 DSACK1 5 345 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 1 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
|
|
68 A0 5 -1 6 1 1 68 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 349 3 0 33 -1 6 0 21
|
|
65 E 5 346 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 336 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 342 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 341 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 344 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 347 3 0 34 -1 2 1 21
|
|
28 BG_000 5 343 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 350 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
296 inst_CLK_000_D0 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
|
297 inst_CLK_000_D1 3 -1 3 6 0 1 3 5 6 7 -1 -1 1 0 21
|
|
344 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21
|
|
337 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
307 SM_AMIGA_1_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
306 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
305 SM_AMIGA_7_ 3 -1 5 3 3 5 7 -1 -1 11 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 6 0 21
|
|
332 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
|
|
346 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
308 SM_AMIGA_0_ 3 -1 2 3 2 3 5 -1 -1 2 0 21
|
|
333 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
|
|
331 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
|
|
316 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
347 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
317 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
315 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21
|
|
314 CLK_CNT_P_0_ 3 -1 0 2 0 2 -1 -1 2 0 21
|
|
309 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 2 0 21
|
|
313 inst_CLK_OUT_PRE_D 3 -1 6 2 1 6 -1 -1 1 0 21
|
|
302 inst_CLK_000_D3 3 -1 1 2 0 7 -1 -1 1 0 21
|
|
301 inst_CLK_000_D2 3 -1 7 2 0 1 -1 -1 1 0 21
|
|
340 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
349 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
329 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
348 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
342 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
341 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
339 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
336 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
335 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 3 1 21
|
|
330 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
327 un16_ciin 3 -1 4 1 4 -1 -1 3 0 21
|
|
345 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
343 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
338 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
334 AMIGA_BUS_ENABLE_LOW_0 3 -1 0 1 2 -1 -1 2 0 21
|
|
328 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21
|
|
299 CLK_CNT_N_0_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
350 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
326 CLK_000_P_SYNC_8_ 3 -1 2 1 5 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_7_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_6_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_5_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_4_ 3 -1 2 1 2 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_3_ 3 -1 6 1 2 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21
|
|
319 CLK_000_P_SYNC_1_ 3 -1 1 1 2 -1 -1 1 0 21
|
|
318 CLK_000_P_SYNC_0_ 3 -1 0 1 1 -1 -1 1 0 21
|
|
312 CLK_CNT_N_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
311 CLK_CNT_P_1_ 3 -1 2 1 0 -1 -1 1 0 21
|
|
304 CLK_000_P_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21
|
|
303 inst_CLK_OUT_PRE 3 -1 4 1 6 -1 -1 1 0 21
|
|
300 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
|
|
298 inst_CLK_000_D4 3 -1 7 1 7 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 4 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 6 0 3 4 5 6 7 13 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 4 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 4 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 4 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 4 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 4 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 4 7 56 -1
|
|
35 VPA 1 -1 -1 2 4 5 35 -1
|
|
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 5 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1
|
|
119 "number of signals after reading design file"
|
|
|
|
"sig sig sig pair blk fan PT xor sync"
|
|
"num name type sig num out pin node cnt PT type"
|
|
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
|
|
|
81 AS_030 5 339 7 5 1 2 3 4 7 81 -1 4 0 21
|
|
32 AS_000 5 340 3 4 0 4 6 7 32 -1 2 0 21
|
|
70 RW 5 350 6 3 2 4 7 70 -1 4 0 21
|
|
31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21
|
|
30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21
|
|
97 DS_030 5 343 0 2 0 2 97 -1 7 0 21
|
|
79 RW_000 5 341 7 2 0 6 79 -1 3 0 21
|
|
68 A0 5 -1 6 2 0 2 68 -1 1 0 21
|
|
80 DSACK1 5 347 7 1 3 80 -1 2 0 21
|
|
78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21
|
|
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
|
|
29 DTACK 5 -1 3 1 5 29 -1 1 0 21
|
|
33 AMIGA_BUS_ENABLE 5 351 3 0 33 -1 6 0 21
|
|
65 E 5 348 6 0 65 -1 3 1 21
|
|
8 IPL_030_2_ 5 338 1 0 8 -1 3 0 21
|
|
7 IPL_030_0_ 5 344 1 0 7 -1 3 0 21
|
|
6 IPL_030_1_ 5 342 1 0 6 -1 3 0 21
|
|
82 BGACK_030 5 346 7 0 82 -1 2 0 21
|
|
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
|
34 VMA 5 349 3 0 34 -1 2 1 21
|
|
28 BG_000 5 345 3 0 28 -1 2 0 21
|
|
91 AVEC 0 0 0 91 -1 1 0 21
|
|
77 FPU_CS 0 7 0 77 -1 1 0 21
|
|
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
|
46 CIIN 0 4 0 46 -1 1 0 21
|
|
21 AVEC_EXP 0 2 0 21 -1 1 0 21
|
|
19 AMIGA_BUS_ENABLE_LOW 5 352 2 0 19 -1 1 0 20
|
|
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
|
2 RESET 0 1 0 2 -1 1 0 21
|
|
346 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21
|
|
297 inst_CLK_000_D0 3 -1 2 6 1 2 3 5 6 7 -1 -1 1 0 21
|
|
298 inst_CLK_000_D1 3 -1 3 5 1 3 5 6 7 -1 -1 1 0 21
|
|
308 SM_AMIGA_7_ 3 -1 5 4 1 3 5 7 -1 -1 11 0 21
|
|
339 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21
|
|
333 cpu_est_0_ 3 -1 7 4 3 5 6 7 -1 -1 3 0 21
|
|
309 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 2 0 21
|
|
293 inst_AS_030_000_SYNC 3 -1 1 3 1 3 5 -1 -1 6 0 21
|
|
334 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
|
|
348 RN_E 3 65 6 3 3 5 6 65 -1 3 1 21
|
|
335 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 1 21
|
|
310 SM_AMIGA_1_ 3 -1 5 3 3 5 7 -1 -1 2 0 21
|
|
304 inst_CLK_000_D3 3 -1 2 3 4 6 7 -1 -1 1 0 21
|
|
318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
|
|
302 inst_CLK_OUT_PRE_25 3 -1 6 2 4 6 -1 -1 3 0 21
|
|
349 RN_VMA 3 34 3 2 3 5 34 -1 2 1 21
|
|
330 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 2 0 21
|
|
319 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21
|
|
317 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21
|
|
312 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 2 0 21
|
|
311 SM_AMIGA_0_ 3 -1 5 2 3 5 -1 -1 2 0 21
|
|
305 inst_CLK_OUT_PRE_D 3 -1 1 2 1 6 -1 -1 1 0 21
|
|
303 inst_CLK_000_D2 3 -1 7 2 2 6 -1 -1 1 0 21
|
|
301 inst_CLK_OUT_PRE_50 3 -1 4 2 4 6 -1 -1 1 0 21
|
|
343 RN_DS_030 3 97 0 1 0 97 -1 7 0 21
|
|
351 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21
|
|
331 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
|
|
313 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21
|
|
350 RN_RW 3 70 6 1 6 70 -1 4 0 21
|
|
344 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
|
|
342 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
|
|
341 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
|
|
338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
|
|
337 SM_AMIGA_7__0 3 -1 5 1 5 -1 -1 3 1 21
|
|
332 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21
|
|
329 un16_ciin 3 -1 4 1 4 -1 -1 3 0 21
|
|
347 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21
|
|
345 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
|
340 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
|
|
336 AMIGA_BUS_ENABLE_LOW_0 3 -1 0 1 2 -1 -1 2 0 21
|
|
316 CLK_CNT_P_0_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
300 CLK_CNT_N_0_ 3 -1 0 1 0 -1 -1 2 0 21
|
|
352 RN_AMIGA_BUS_ENABLE_LOW 3 19 2 1 2 19 -1 1 0 20
|
|
328 CLK_000_P_SYNC_8_ 3 -1 6 1 0 -1 -1 1 0 21
|
|
327 CLK_000_P_SYNC_7_ 3 -1 6 1 6 -1 -1 1 0 21
|
|
326 CLK_000_P_SYNC_6_ 3 -1 4 1 6 -1 -1 1 0 21
|
|
325 CLK_000_P_SYNC_5_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
324 CLK_000_P_SYNC_4_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
323 CLK_000_P_SYNC_3_ 3 -1 2 1 4 -1 -1 1 0 21
|
|
322 CLK_000_P_SYNC_2_ 3 -1 4 1 2 -1 -1 1 0 21
|
|
321 CLK_000_P_SYNC_1_ 3 -1 1 1 4 -1 -1 1 0 21
|
|
320 CLK_000_P_SYNC_0_ 3 -1 6 1 1 -1 -1 1 0 21
|
|
315 CLK_CNT_N_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
314 CLK_CNT_P_1_ 3 -1 0 1 0 -1 -1 1 0 21
|
|
307 CLK_000_P_SYNC_9_ 3 -1 0 1 2 -1 -1 1 0 21
|
|
306 inst_CLK_OUT_PRE 3 -1 4 1 1 -1 -1 1 0 21
|
|
299 inst_CLK_000_D4 3 -1 4 1 7 -1 -1 1 0 21
|
|
296 inst_CLK_OUT_PRE_50_D 3 -1 4 1 6 -1 -1 1 0 21
|
|
295 inst_VPA_D 3 -1 1 1 3 -1 -1 1 0 21
|
|
294 inst_BGACK_030_INT_D 3 -1 7 1 3 -1 -1 1 0 21
|
|
60 CLK_OSZI 9 -1 0 60 -1
|
|
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
|
13 nEXP_SPACE 1 -1 -1 7 0 1 3 4 5 6 7 13 -1
|
|
40 BERR 1 -1 -1 5 1 2 3 5 7 40 -1
|
|
63 CLK_030 1 -1 -1 3 0 6 7 63 -1
|
|
96 A_19_ 1 -1 -1 2 1 7 96 -1
|
|
95 A_16_ 1 -1 -1 2 1 7 95 -1
|
|
94 A_18_ 1 -1 -1 2 1 7 94 -1
|
|
58 A_17_ 1 -1 -1 2 1 7 58 -1
|
|
57 FC_1_ 1 -1 -1 2 1 7 57 -1
|
|
56 FC_0_ 1 -1 -1 2 1 7 56 -1
|
|
35 VPA 1 -1 -1 2 1 5 35 -1
|
|
27 BGACK_000 1 -1 -1 2 1 7 27 -1
|
|
93 A_21_ 1 -1 -1 1 4 93 -1
|
|
92 A_20_ 1 -1 -1 1 4 92 -1
|
|
84 A_22_ 1 -1 -1 1 4 84 -1
|
|
83 A_23_ 1 -1 -1 1 4 83 -1
|
|
67 IPL_2_ 1 -1 -1 1 1 67 -1
|
|
66 IPL_0_ 1 -1 -1 1 1 66 -1
|
|
55 IPL_1_ 1 -1 -1 1 1 55 -1
|
|
20 BG_030 1 -1 -1 1 3 20 -1
|
|
18 A_24_ 1 -1 -1 1 4 18 -1
|
|
17 A_25_ 1 -1 -1 1 4 17 -1
|
|
16 A_26_ 1 -1 -1 1 4 16 -1
|
|
15 A_27_ 1 -1 -1 1 4 15 -1
|
|
14 A_28_ 1 -1 -1 1 4 14 -1
|
|
10 CLK_000 1 -1 -1 1 2 10 -1
|
|
5 A_29_ 1 -1 -1 1 4 5 -1
|
|
4 A_30_ 1 -1 -1 1 4 4 -1
|
|
3 A_31_ 1 -1 -1 1 4 3 -1 |