mirror of https://github.com/kr239/68030tk.git
35 lines
747 B
Plaintext
35 lines
747 B
Plaintext
#-- Lattice Semiconductor Corporation Ltd.
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#-- Synplify OEM project file c:/users/matze/amiga/hardwarehacks/68030-tk/logic\BUS68030.prj
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#-- Written on Thu May 15 19:20:46 2014
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#device options
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set_option -technology mach
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set_option -part M4A5-128
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#compilation/mapping options
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#map options
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#simulation options
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set_option -write_verilog false
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set_option -write_vhdl false
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#timing analysis options
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set_option -synthesis_onoff_pragma false
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#-- add_file options
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add_file -vhdl -lib work "68030-68000-bus.vhd"
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#-- top module name
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set_option -top_module BUS68030
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#-- set result format/file last
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project -result_file "BUS68030.edi"
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#-- error message log file
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project -log_file bus68030.srf
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#-- run Synplify with 'arrange VHDL file'
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project -run
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