mirror of https://github.com/kr239/68030tk.git
10 lines
1.0 KiB
Plaintext
10 lines
1.0 KiB
Plaintext
@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":127:7:127:17|Signal clk_out_pre is undriven
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@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":130:38:130:40|Pruning register DS_030_D0_3
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@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":130:38:130:40|Pruning register nEXP_SPACE_D0_3
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@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":129:34:129:36|Pruning register CLK_OUT_EXP_INT_1
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@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":125:36:125:38|Pruning register CLK_OUT_PRE_25_3
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@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":153:2:153:3|Pruning register CLK_030_D0_2
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@W: CL189 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":130:38:130:40|Register bit BGACK_030_INT_PRE is always 1, optimizing ...
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@W: CL246 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":24:1:24:8|Input port bits 15 to 2 of a_decode(23 downto 2) are unused
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