68030tk/Logic/68030_tk.tte

#$ TOOL  ispLEVER Classic 1.7.00.05.28.13
#$ DATE  Sun Jun 01 01:03:24 2014
#$ MODULE  BUS68030
#$ PINS 59 A_26_ A_25_ A_24_ A_23_ A_31_ A_22_ A_21_ A_20_ A_19_ IPL_2_ A_18_
 A_17_ FC_1_ A_16_ RW_000 IPL_1_ IPL_0_ FC_0_ nEXP_SPACE BERR BG_030 BGACK_000
 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT DTACK AVEC AVEC_EXP VPA RST RW
 AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN A_30_ A_29_ A_28_
 A_27_ SIZE_1_ IPL_030_2_ AS_030 IPL_030_1_ AS_000 IPL_030_0_ DS_030 UDS_000
 LDS_000 A0 BG_000 BGACK_030 CLK_EXP FPU_CS DSACK1 E VMA RESET SIZE_0_
#$ NODES 24 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_VPA_D
 inst_CLK_OUT_PRE_50_D inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2
 inst_DTACK_D0 inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_25 SM_AMIGA_7_ SM_AMIGA_6_
 SM_AMIGA_0_ SM_AMIGA_5_ SM_AMIGA_2_ inst_RW_000_INT inst_CLK_000_D3
 inst_CLK_030_H SM_AMIGA_4_ SM_AMIGA_3_ SM_AMIGA_1_ cpu_est_0_ cpu_est_1_
 cpu_est_2_
.type f
.i 80
.o 160
.ilb A_31_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA
 RST A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_
 A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BG_000.Q BGACK_030.Q FPU_CS.Q VMA.Q
 inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q AS_030.Q inst_VPA_D.Q
 inst_CLK_OUT_PRE_50_D.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q
 inst_DTACK_D0.Q IPL_030_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_25.Q
 IPL_030_1_.Q SM_AMIGA_7_.Q IPL_030_2_.Q AS_000.Q SM_AMIGA_6_.Q SM_AMIGA_0_.Q
 SM_AMIGA_5_.Q SM_AMIGA_2_.Q inst_RW_000_INT.Q UDS_000.Q LDS_000.Q DSACK1.Q
 inst_CLK_000_D3.Q inst_CLK_030_H.Q DS_030.Q SM_AMIGA_4_.Q SM_AMIGA_3_.Q
 SM_AMIGA_1_.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q E.Q AS_030.PIN AS_000.PIN
 RW_000.PIN DS_030.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN A0.PIN
 DSACK1.PIN DTACK.PIN RW.PIN AVEC_EXP
.ob RW_000 RW_000.OE BERR BERR.OE CLK_DIV_OUT.D CLK_DIV_OUT.C CLK_DIV_OUT.AR
 DTACK DTACK.OE AVEC AVEC_EXP.D- AVEC_EXP.C AVEC_EXP.AP RW RW.OE AMIGA_BUS_ENABLE
 AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN CIIN.OE SIZE_1_.D- SIZE_1_.C
 SIZE_1_.AP SIZE_1_.OE IPL_030_2_.D IPL_030_2_.C IPL_030_2_.AP AS_030.D AS_030.C
 AS_030.AP AS_030.OE IPL_030_1_.D IPL_030_1_.C IPL_030_1_.AP AS_000.D- AS_000.C
 AS_000.AP AS_000.OE IPL_030_0_.D IPL_030_0_.C IPL_030_0_.AP DS_030.D DS_030.C
 DS_030.AP DS_030.OE UDS_000.D- UDS_000.C UDS_000.AP UDS_000.OE LDS_000.D-
 LDS_000.C LDS_000.AP LDS_000.OE A0.D A0.C A0.AP A0.OE BG_000.D- BG_000.C
 BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_EXP.D CLK_EXP.C CLK_EXP.AR
 FPU_CS.D- FPU_CS.C FPU_CS.AP DSACK1.D- DSACK1.C DSACK1.AP DSACK1.OE E.D.X1
 E.D.X2 E.C E.AR VMA.D.X1 VMA.D.X2 VMA.C VMA.AP RESET.D RESET.C RESET.AR
 SIZE_0_.D- SIZE_0_.C SIZE_0_.AP SIZE_0_.OE inst_AS_030_000_SYNC.D
 inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_BGACK_030_INT_D.D
 inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP inst_VPA_D.D inst_VPA_D.C
 inst_VPA_D.AP inst_CLK_OUT_PRE_50_D.D inst_CLK_OUT_PRE_50_D.C
 inst_CLK_OUT_PRE_50_D.AR inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D0.AP
 inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D1.AP inst_CLK_000_D2.D
 inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_DTACK_D0.D inst_DTACK_D0.C
 inst_DTACK_D0.AP inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C
 inst_CLK_OUT_PRE_50.AR inst_CLK_OUT_PRE_25.D inst_CLK_OUT_PRE_25.C
 inst_CLK_OUT_PRE_25.AR SM_AMIGA_7_.D- SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.D
 SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR
 SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C
 SM_AMIGA_2_.AR inst_RW_000_INT.D- inst_RW_000_INT.C inst_RW_000_INT.AP
 inst_CLK_000_D3.D inst_CLK_000_D3.C inst_CLK_000_D3.AP inst_CLK_030_H.D
 inst_CLK_030_H.C SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D-
 SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR
 cpu_est_0_.D cpu_est_0_.C cpu_est_0_.AR cpu_est_1_.T cpu_est_1_.C cpu_est_1_.AR
 cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C cpu_est_2_.AR
.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111
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.end