Macintosh-HW/68030tk
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8a57db1209
68030tk/Logic/synlog/report
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MHeinrichs 8a57db1209 New PCB and start for RW-Signal-Optimization
2014-06-01 22:50:01 +02:00
..
BUS68030_compiler_errors.txt New PCB and start for RW-Signal-Optimization 2014-06-01 22:50:01 +02:00
BUS68030_compiler_notes.txt New PCB and start for RW-Signal-Optimization 2014-06-01 22:50:01 +02:00
BUS68030_compiler_runstatus.xml New PCB and start for RW-Signal-Optimization 2014-06-01 22:50:01 +02:00
BUS68030_compiler_warnings.txt New PCB and start for RW-Signal-Optimization 2014-06-01 22:50:01 +02:00
BUS68030_fpga_mapper_errors.txt Initial push 2014-05-15 21:16:29 +02:00
BUS68030_fpga_mapper_notes.txt 33MHz @100MHz basis working 2014-05-24 16:03:26 +02:00
BUS68030_fpga_mapper_runstatus.xml New PCB and start for RW-Signal-Optimization 2014-06-01 22:50:01 +02:00
BUS68030_fpga_mapper_warnings.txt DMA-(potentially) working version but only 25Mhz 2014-05-25 21:00:40 +02:00