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9643ce8642
68030tk/Logic/BUS68030.bl0
MHeinrichs 9643ce8642 50Mhz Clock working
2014-05-19 07:35:45 +02:00

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#$ DATE Sun May 18 21:01:47 2014
#$ TOOL EDIF2BLIF version IspLever 1.0
#$ MODULE bus68030
#$ PINS 74 SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 DS_030 UDS_000 SIZE_0_ LDS_000 A_30_ nEXP_SPACE A_29_ BERR A_28_ BG_030 A_27_ BG_000 A_26_ BGACK_030 A_25_ BGACK_000 A_24_ CLK_030 A_23_ CLK_000 A_22_ CLK_OSZI A_21_ CLK_DIV_OUT A_20_ CLK_EXP A_19_ FPU_CS A_18_ DTACK A_17_ AVEC A_16_ AVEC_EXP A_15_ E A_14_ VPA A_13_ VMA A_12_ RST A_11_ RESET A_10_ RW A_9_ AMIGA_BUS_ENABLE A_8_ AMIGA_BUS_DATA_DIR A_7_ AMIGA_BUS_ENABLE_LOW A_6_ CIIN A_5_ A_4_ A_3_ A_2_ A_1_ A_0_ IPL_030_1_ IPL_030_0_ IPL_1_ IPL_0_ DSACK_0_ FC_0_
#$ NODES 369 BGACK_000_c CLK_030_c CLK_000_c CLK_OSZI_c inst_BGACK_030_INTreg inst_FPU_CS_INTreg cpu_est_3_reg CLK_OUT_INTreg inst_VMA_INTreg cpu_est_0_ \
# cpu_est_1_ IPL_030DFFSH_0_reg inst_AS_000_INTreg inst_AS_030_000_SYNC IPL_030DFFSH_1_reg inst_DTACK_SYNC inst_VPA_D IPL_030DFFSH_2_reg inst_VPA_SYNC inst_CLK_000_D0 \
# ipl_c_0__n inst_CLK_000_D1 inst_CLK_000_D2 ipl_c_1__n inst_CLK_OUT_PRE SM_AMIGA_6_ ipl_c_2__n vcc_n_n gnd_n_n cpu_est_2_ \
# dsack_c_1__n CLK_REF_1_ SM_AMIGA_7_ DTACK_c inst_UDS_000_INTreg inst_LDS_000_INTreg DSACK_INT_1_ clk_un4_clk_000_d1_n SM_AMIGA_4_ SM_AMIGA_1_ \
# inst_DTACK_DMA clk_clk_cnt_n RST_c CLK_CNT_0_ CLK_CNT_1_ RESETDFFreg state_machine_un14_as_000_int_n SM_AMIGA_3_ RW_c fc_c_0__n \
# un1_as_030_4 SM_AMIGA_5_ fc_c_1__n SM_AMIGA_2_ SM_AMIGA_0_ AMIGA_BUS_ENABLEDFFreg state_machine_lds_000_int_7_n state_machine_uds_000_int_7_n N_101_i N_102_i \
# N_103_i N_90_0 N_91_0 N_127_i N_128_i CLK_OUT_PRE_0 N_118_i N_125_i cpu_est_0_0_ N_123_i \
# N_124_i N_126_i clk_cpu_est_11_0_1__n N_131_i clk_cpu_est_11_0_3__n N_130_i N_129_i N_122_i N_121_i N_108_i \
# G_86 sm_amiga_ns_0_7__n state_machine_un30_clk_000_d1_n state_machine_un8_clk_000_d0_i_n N_147 state_machine_un13_clk_000_d0_i_n N_96 state_machine_un15_clk_000_d0_0_n state_machine_un44_clk_000_d1_n state_machine_un23_clk_000_d0_i_n \
# G_90 N_100_i N_89 sm_amiga_ns_0_2__n N_97 BG_030_c_i N_90 state_machine_un1_clk_030_0_n N_98 clk_un4_clk_000_d1_i_n \
# N_99 state_machine_un6_bgack_000_0_n UDS_000_INT_0_sqmuxa state_machine_un17_clk_030_0_n UDS_000_INT_0_sqmuxa_1 un1_as_030_3_0 N_167 N_89_i N_170 AMIGA_BUS_ENABLE_i_m_i \
# N_105 nEXP_SPACE_m_i N_92 state_machine_amiga_bus_enable_2_iv_i_n N_106 state_machine_as_030_000_sync_3_2_n N_107 N_94_i N_104 un1_bg_030_0 \
# state_machine_un42_clk_030_n N_105_i un1_bg_030 N_104_i N_94 sm_amiga_ns_0_5__n state_machine_as_030_000_sync_3_n N_106_i AMIGA_BUS_ENABLE_i_m N_107_i \
# nEXP_SPACE_m N_95 CLK_OUT_PRE_i un1_as_030_3 N_92_0 state_machine_un17_clk_030_n state_machine_un44_clk_000_d1_i_n state_machine_un6_bgack_000_n a_c_i_0__n state_machine_un1_clk_030_n \
# size_c_i_1__n AS_000_INT_1_sqmuxa N_98_i DSACK_INT_1_sqmuxa N_99_i N_100 sm_amiga_ns_0_1__n state_machine_un23_clk_000_d0_n N_97_i DTACK_SYNC_1_sqmuxa \
# DTACK_SYNC_1_sqmuxa_1 N_147_i VPA_SYNC_1_sqmuxa state_machine_lds_000_int_7_0_n VPA_SYNC_1_sqmuxa_1 state_machine_uds_000_int_7_0_n state_machine_un15_clk_000_d0_n un1_bg_030_0_1 clk_cpu_est_11_3__n un1_bg_030_0_2 \
# state_machine_un2_clk_000_n state_machine_as_030_000_sync_3_2_1_n state_machine_un13_clk_000_d0_n clk_cpu_est_11_0_1_1__n state_machine_un8_clk_000_d0_n clk_cpu_est_11_0_2_1__n N_108 N_167_1 state_machine_un13_clk_000_d0_1_n N_167_2 \
# N_124 N_167_3 N_126 N_167_4 state_machine_un13_clk_000_d0_2_n N_167_5 N_129 N_167_6 N_122 N_170_1 \
# N_130 N_170_2 N_121 UDS_000_INT_0_sqmuxa_1_1 N_131 UDS_000_INT_0_sqmuxa_1_2 N_127 UDS_000_INT_0_sqmuxa_1_3 clk_cpu_est_11_1__n UDS_000_INT_0_sqmuxa_1_0 \
# N_128 state_machine_un44_clk_000_d1_i_1_n N_123 state_machine_un42_clk_030_1_n N_125 state_machine_un42_clk_030_2_n N_91 state_machine_un42_clk_030_3_n N_102 state_machine_un42_clk_030_4_n \
# N_103 state_machine_un42_clk_030_5_n N_101 N_96_1 RW_i AMIGA_BUS_ENABLE_i_m_1 AS_000_INT_i N_131_1 dsack_i_1__n clk_cpu_est_11_0_1_3__n \
# sm_amiga_i_4__n N_105_1 sm_amiga_i_5__n VPA_SYNC_1_sqmuxa_1_0 CLK_000_D0_i VPA_SYNC_1_sqmuxa_2 sm_amiga_i_3__n VPA_SYNC_1_sqmuxa_3 cpu_est_i_0__n VPA_SYNC_1_sqmuxa_4 \
# cpu_est_i_2__n VPA_SYNC_1_sqmuxa_5 state_machine_un13_clk_000_d0_2_i_n VPA_SYNC_1_sqmuxa_6 cpu_est_i_3__n DTACK_SYNC_1_sqmuxa_1_0 VPA_D_i DTACK_SYNC_1_sqmuxa_2 cpu_est_i_1__n state_machine_un8_clk_000_d0_1_n \
# DTACK_i state_machine_un8_clk_000_d0_2_n VMA_INT_i state_machine_un8_clk_000_d0_3_n state_machine_un13_clk_000_d0_1_i_n state_machine_un8_clk_000_d0_4_n AS_030_i state_machine_un13_clk_000_d0_1_0_n DTACK_SYNC_1_sqmuxa_i state_machine_un13_clk_000_d0_2_0_n \
# VPA_SYNC_1_sqmuxa_i N_127_1 CLK_000_D1_i N_128_1 N_95_i ipl_030_0_2__un3_n N_96_i ipl_030_0_2__un1_n a_i_18__n ipl_030_0_2__un0_n \
# a_i_16__n ipl_030_0_1__un3_n a_i_19__n ipl_030_0_1__un1_n CLK_030_i ipl_030_0_1__un0_n CLK_000_D2_i ipl_030_0_0__un3_n state_machine_un42_clk_030_i_n ipl_030_0_0__un1_n \
# sm_amiga_i_6__n ipl_030_0_0__un0_n sm_amiga_i_7__n cpu_est_0_2__un3_n AMIGA_BUS_ENABLE_i cpu_est_0_2__un1_n nEXP_SPACE_i cpu_est_0_2__un0_n sm_amiga_i_2__n cpu_est_0_1__un3_n \
# sm_amiga_i_1__n cpu_est_0_1__un1_n DS_030_i cpu_est_0_1__un0_n AS_030_000_SYNC_i vpa_sync_0_un3_n UDS_000_INT_0_sqmuxa_1_i vpa_sync_0_un1_n UDS_000_INT_0_sqmuxa_i vpa_sync_0_un0_n \
# clk_clk_cnt_i_n vma_int_0_un3_n clk_cnt_i_0__n vma_int_0_un1_n a_i_30__n vma_int_0_un0_n a_i_31__n cpu_est_0_3__un3_n a_i_28__n cpu_est_0_3__un1_n \
# a_i_29__n cpu_est_0_3__un0_n a_i_26__n bgack_030_int_0_un3_n a_i_27__n bgack_030_int_0_un1_n a_i_24__n bgack_030_int_0_un0_n a_i_25__n bg_000_0_un3_n \
# N_132_i bg_000_0_un1_n bg_000_0_un0_n RST_i amiga_bus_enable_0_un3_n FPU_CS_INT_i amiga_bus_enable_0_un1_n BGACK_030_INT_i amiga_bus_enable_0_un0_n AS_030_c \
# as_030_000_sync_0_un3_n as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n DS_030_c fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n fpu_cs_int_0_un0_n as_000_int_0_un3_n size_c_0__n as_000_int_0_un1_n \
# as_000_int_0_un0_n size_c_1__n dsack_int_0_1__un3_n dsack_int_0_1__un1_n a_c_0__n dsack_int_0_1__un0_n dtack_sync_0_un3_n dtack_sync_0_un1_n dtack_sync_0_un0_n uds_000_int_0_un3_n \
# uds_000_int_0_un1_n uds_000_int_0_un0_n lds_000_int_0_un3_n lds_000_int_0_un1_n lds_000_int_0_un0_n a_15__n a_14__n a_13__n a_12__n a_c_16__n \
# a_11__n a_c_17__n a_10__n a_c_18__n a_9__n a_c_19__n a_8__n a_c_20__n a_7__n a_c_21__n \
# a_6__n a_c_22__n a_5__n a_c_23__n a_4__n a_c_24__n a_3__n a_c_25__n a_2__n a_c_26__n \
# a_1__n a_c_27__n a_c_28__n a_c_29__n a_c_30__n a_c_31__n nEXP_SPACE_c BG_030_c BG_000DFFSHreg
.model bus68030
.inputs SIZE_1_.BLIF A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF AS_030.BLIF DS_030.BLIF nEXP_SPACE.BLIF BG_030.BLIF BGACK_000.BLIF \
CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF VPA.BLIF RST.BLIF RW.BLIF SIZE_0_.BLIF A_30_.BLIF A_29_.BLIF \
A_28_.BLIF A_27_.BLIF A_26_.BLIF A_25_.BLIF A_24_.BLIF A_23_.BLIF A_22_.BLIF A_21_.BLIF A_20_.BLIF \
A_19_.BLIF A_18_.BLIF A_17_.BLIF A_16_.BLIF A_15_.BLIF A_14_.BLIF A_13_.BLIF A_12_.BLIF A_11_.BLIF \
A_10_.BLIF A_9_.BLIF A_8_.BLIF A_7_.BLIF A_6_.BLIF A_5_.BLIF A_4_.BLIF A_3_.BLIF A_2_.BLIF \
A_1_.BLIF A_0_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF DSACK_1_.BLIF DTACK.BLIF DSACK_0_.BLIF BGACK_000_c.BLIF CLK_030_c.BLIF CLK_000_c.BLIF CLK_OSZI_c.BLIF \
inst_BGACK_030_INTreg.BLIF inst_FPU_CS_INTreg.BLIF cpu_est_3_reg.BLIF CLK_OUT_INTreg.BLIF inst_VMA_INTreg.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF IPL_030DFFSH_0_reg.BLIF inst_AS_000_INTreg.BLIF \
inst_AS_030_000_SYNC.BLIF IPL_030DFFSH_1_reg.BLIF inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF IPL_030DFFSH_2_reg.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF ipl_c_0__n.BLIF inst_CLK_000_D1.BLIF \
inst_CLK_000_D2.BLIF ipl_c_1__n.BLIF inst_CLK_OUT_PRE.BLIF SM_AMIGA_6_.BLIF ipl_c_2__n.BLIF vcc_n_n.BLIF gnd_n_n.BLIF cpu_est_2_.BLIF dsack_c_1__n.BLIF \
CLK_REF_1_.BLIF SM_AMIGA_7_.BLIF DTACK_c.BLIF inst_UDS_000_INTreg.BLIF inst_LDS_000_INTreg.BLIF DSACK_INT_1_.BLIF clk_un4_clk_000_d1_n.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_1_.BLIF \
inst_DTACK_DMA.BLIF clk_clk_cnt_n.BLIF RST_c.BLIF CLK_CNT_0_.BLIF CLK_CNT_1_.BLIF RESETDFFreg.BLIF state_machine_un14_as_000_int_n.BLIF SM_AMIGA_3_.BLIF RW_c.BLIF \
fc_c_0__n.BLIF un1_as_030_4.BLIF SM_AMIGA_5_.BLIF fc_c_1__n.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_0_.BLIF AMIGA_BUS_ENABLEDFFreg.BLIF state_machine_lds_000_int_7_n.BLIF state_machine_uds_000_int_7_n.BLIF \
N_101_i.BLIF N_102_i.BLIF N_103_i.BLIF N_90_0.BLIF N_91_0.BLIF N_127_i.BLIF N_128_i.BLIF CLK_OUT_PRE_0.BLIF N_118_i.BLIF \
N_125_i.BLIF cpu_est_0_0_.BLIF N_123_i.BLIF N_124_i.BLIF N_126_i.BLIF clk_cpu_est_11_0_1__n.BLIF N_131_i.BLIF clk_cpu_est_11_0_3__n.BLIF N_130_i.BLIF \
N_129_i.BLIF N_122_i.BLIF N_121_i.BLIF N_108_i.BLIF G_86.BLIF sm_amiga_ns_0_7__n.BLIF state_machine_un30_clk_000_d1_n.BLIF state_machine_un8_clk_000_d0_i_n.BLIF N_147.BLIF \
state_machine_un13_clk_000_d0_i_n.BLIF N_96.BLIF state_machine_un15_clk_000_d0_0_n.BLIF state_machine_un44_clk_000_d1_n.BLIF state_machine_un23_clk_000_d0_i_n.BLIF G_90.BLIF N_100_i.BLIF N_89.BLIF sm_amiga_ns_0_2__n.BLIF \
N_97.BLIF BG_030_c_i.BLIF N_90.BLIF state_machine_un1_clk_030_0_n.BLIF N_98.BLIF clk_un4_clk_000_d1_i_n.BLIF N_99.BLIF state_machine_un6_bgack_000_0_n.BLIF UDS_000_INT_0_sqmuxa.BLIF \
state_machine_un17_clk_030_0_n.BLIF UDS_000_INT_0_sqmuxa_1.BLIF un1_as_030_3_0.BLIF N_167.BLIF N_89_i.BLIF N_170.BLIF AMIGA_BUS_ENABLE_i_m_i.BLIF N_105.BLIF nEXP_SPACE_m_i.BLIF \
N_92.BLIF state_machine_amiga_bus_enable_2_iv_i_n.BLIF N_106.BLIF state_machine_as_030_000_sync_3_2_n.BLIF N_107.BLIF N_94_i.BLIF N_104.BLIF un1_bg_030_0.BLIF state_machine_un42_clk_030_n.BLIF \
N_105_i.BLIF un1_bg_030.BLIF N_104_i.BLIF N_94.BLIF sm_amiga_ns_0_5__n.BLIF state_machine_as_030_000_sync_3_n.BLIF N_106_i.BLIF AMIGA_BUS_ENABLE_i_m.BLIF N_107_i.BLIF \
nEXP_SPACE_m.BLIF N_95.BLIF CLK_OUT_PRE_i.BLIF un1_as_030_3.BLIF N_92_0.BLIF state_machine_un17_clk_030_n.BLIF state_machine_un44_clk_000_d1_i_n.BLIF state_machine_un6_bgack_000_n.BLIF a_c_i_0__n.BLIF \
state_machine_un1_clk_030_n.BLIF size_c_i_1__n.BLIF AS_000_INT_1_sqmuxa.BLIF N_98_i.BLIF DSACK_INT_1_sqmuxa.BLIF N_99_i.BLIF N_100.BLIF sm_amiga_ns_0_1__n.BLIF state_machine_un23_clk_000_d0_n.BLIF \
N_97_i.BLIF DTACK_SYNC_1_sqmuxa.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF N_147_i.BLIF VPA_SYNC_1_sqmuxa.BLIF state_machine_lds_000_int_7_0_n.BLIF VPA_SYNC_1_sqmuxa_1.BLIF state_machine_uds_000_int_7_0_n.BLIF state_machine_un15_clk_000_d0_n.BLIF \
un1_bg_030_0_1.BLIF clk_cpu_est_11_3__n.BLIF un1_bg_030_0_2.BLIF state_machine_un2_clk_000_n.BLIF state_machine_as_030_000_sync_3_2_1_n.BLIF state_machine_un13_clk_000_d0_n.BLIF clk_cpu_est_11_0_1_1__n.BLIF state_machine_un8_clk_000_d0_n.BLIF clk_cpu_est_11_0_2_1__n.BLIF \
N_108.BLIF N_167_1.BLIF state_machine_un13_clk_000_d0_1_n.BLIF N_167_2.BLIF N_124.BLIF N_167_3.BLIF N_126.BLIF N_167_4.BLIF state_machine_un13_clk_000_d0_2_n.BLIF \
N_167_5.BLIF N_129.BLIF N_167_6.BLIF N_122.BLIF N_170_1.BLIF N_130.BLIF N_170_2.BLIF N_121.BLIF UDS_000_INT_0_sqmuxa_1_1.BLIF \
N_131.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF N_127.BLIF UDS_000_INT_0_sqmuxa_1_3.BLIF clk_cpu_est_11_1__n.BLIF UDS_000_INT_0_sqmuxa_1_0.BLIF N_128.BLIF state_machine_un44_clk_000_d1_i_1_n.BLIF N_123.BLIF \
state_machine_un42_clk_030_1_n.BLIF N_125.BLIF state_machine_un42_clk_030_2_n.BLIF N_91.BLIF state_machine_un42_clk_030_3_n.BLIF N_102.BLIF state_machine_un42_clk_030_4_n.BLIF N_103.BLIF state_machine_un42_clk_030_5_n.BLIF \
N_101.BLIF N_96_1.BLIF RW_i.BLIF AMIGA_BUS_ENABLE_i_m_1.BLIF AS_000_INT_i.BLIF N_131_1.BLIF dsack_i_1__n.BLIF clk_cpu_est_11_0_1_3__n.BLIF sm_amiga_i_4__n.BLIF \
N_105_1.BLIF sm_amiga_i_5__n.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF CLK_000_D0_i.BLIF VPA_SYNC_1_sqmuxa_2.BLIF sm_amiga_i_3__n.BLIF VPA_SYNC_1_sqmuxa_3.BLIF cpu_est_i_0__n.BLIF VPA_SYNC_1_sqmuxa_4.BLIF \
cpu_est_i_2__n.BLIF VPA_SYNC_1_sqmuxa_5.BLIF state_machine_un13_clk_000_d0_2_i_n.BLIF VPA_SYNC_1_sqmuxa_6.BLIF cpu_est_i_3__n.BLIF DTACK_SYNC_1_sqmuxa_1_0.BLIF VPA_D_i.BLIF DTACK_SYNC_1_sqmuxa_2.BLIF cpu_est_i_1__n.BLIF \
state_machine_un8_clk_000_d0_1_n.BLIF DTACK_i.BLIF state_machine_un8_clk_000_d0_2_n.BLIF VMA_INT_i.BLIF state_machine_un8_clk_000_d0_3_n.BLIF state_machine_un13_clk_000_d0_1_i_n.BLIF state_machine_un8_clk_000_d0_4_n.BLIF AS_030_i.BLIF state_machine_un13_clk_000_d0_1_0_n.BLIF \
DTACK_SYNC_1_sqmuxa_i.BLIF state_machine_un13_clk_000_d0_2_0_n.BLIF VPA_SYNC_1_sqmuxa_i.BLIF N_127_1.BLIF CLK_000_D1_i.BLIF N_128_1.BLIF N_95_i.BLIF ipl_030_0_2__un3_n.BLIF N_96_i.BLIF \
ipl_030_0_2__un1_n.BLIF a_i_18__n.BLIF ipl_030_0_2__un0_n.BLIF a_i_16__n.BLIF ipl_030_0_1__un3_n.BLIF a_i_19__n.BLIF ipl_030_0_1__un1_n.BLIF CLK_030_i.BLIF ipl_030_0_1__un0_n.BLIF \
CLK_000_D2_i.BLIF ipl_030_0_0__un3_n.BLIF state_machine_un42_clk_030_i_n.BLIF ipl_030_0_0__un1_n.BLIF sm_amiga_i_6__n.BLIF ipl_030_0_0__un0_n.BLIF sm_amiga_i_7__n.BLIF cpu_est_0_2__un3_n.BLIF AMIGA_BUS_ENABLE_i.BLIF \
cpu_est_0_2__un1_n.BLIF nEXP_SPACE_i.BLIF cpu_est_0_2__un0_n.BLIF sm_amiga_i_2__n.BLIF cpu_est_0_1__un3_n.BLIF sm_amiga_i_1__n.BLIF cpu_est_0_1__un1_n.BLIF DS_030_i.BLIF cpu_est_0_1__un0_n.BLIF \
AS_030_000_SYNC_i.BLIF vpa_sync_0_un3_n.BLIF UDS_000_INT_0_sqmuxa_1_i.BLIF vpa_sync_0_un1_n.BLIF UDS_000_INT_0_sqmuxa_i.BLIF vpa_sync_0_un0_n.BLIF clk_clk_cnt_i_n.BLIF vma_int_0_un3_n.BLIF clk_cnt_i_0__n.BLIF \
vma_int_0_un1_n.BLIF a_i_30__n.BLIF vma_int_0_un0_n.BLIF a_i_31__n.BLIF cpu_est_0_3__un3_n.BLIF a_i_28__n.BLIF cpu_est_0_3__un1_n.BLIF a_i_29__n.BLIF cpu_est_0_3__un0_n.BLIF \
a_i_26__n.BLIF bgack_030_int_0_un3_n.BLIF a_i_27__n.BLIF bgack_030_int_0_un1_n.BLIF a_i_24__n.BLIF bgack_030_int_0_un0_n.BLIF a_i_25__n.BLIF bg_000_0_un3_n.BLIF N_132_i.BLIF \
bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF RST_i.BLIF amiga_bus_enable_0_un3_n.BLIF FPU_CS_INT_i.BLIF amiga_bus_enable_0_un1_n.BLIF BGACK_030_INT_i.BLIF amiga_bus_enable_0_un0_n.BLIF AS_030_c.BLIF \
as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF DS_030_c.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF as_000_int_0_un3_n.BLIF size_c_0__n.BLIF \
as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF size_c_1__n.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un1_n.BLIF a_c_0__n.BLIF dsack_int_0_1__un0_n.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un1_n.BLIF \
dtack_sync_0_un0_n.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF a_15__n.BLIF a_14__n.BLIF \
a_13__n.BLIF a_12__n.BLIF a_c_16__n.BLIF a_11__n.BLIF a_c_17__n.BLIF a_10__n.BLIF a_c_18__n.BLIF a_9__n.BLIF a_c_19__n.BLIF \
a_8__n.BLIF a_c_20__n.BLIF a_7__n.BLIF a_c_21__n.BLIF a_6__n.BLIF a_c_22__n.BLIF a_5__n.BLIF a_c_23__n.BLIF a_4__n.BLIF \
a_c_24__n.BLIF a_3__n.BLIF a_c_25__n.BLIF a_2__n.BLIF a_c_26__n.BLIF a_1__n.BLIF a_c_27__n.BLIF a_c_28__n.BLIF a_c_29__n.BLIF \
a_c_30__n.BLIF a_c_31__n.BLIF nEXP_SPACE_c.BLIF BG_030_c.BLIF BG_000DFFSHreg.BLIF DSACK_1_.PIN DTACK.PIN
.outputs IPL_030_2_ AS_000 UDS_000 LDS_000 BERR BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS AVEC \
AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_5_.D \
SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR \
SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR cpu_est_2_.D cpu_est_2_.C cpu_est_3_reg.D cpu_est_3_reg.C IPL_030DFFSH_0_reg.D \
IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP \
SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP CLK_CNT_0_.D CLK_CNT_0_.C CLK_CNT_1_.D \
CLK_CNT_1_.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_FPU_CS_INTreg.D inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP \
inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_AS_000_INTreg.D inst_AS_000_INTreg.C inst_AS_000_INTreg.AP AMIGA_BUS_ENABLEDFFreg.D AMIGA_BUS_ENABLEDFFreg.C BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP \
DSACK_INT_1_.D DSACK_INT_1_.C DSACK_INT_1_.AP inst_VMA_INTreg.D inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_UDS_000_INTreg.D inst_UDS_000_INTreg.C inst_UDS_000_INTreg.AP inst_LDS_000_INTreg.D inst_LDS_000_INTreg.C \
inst_LDS_000_INTreg.AP inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_DTACK_DMA.D inst_DTACK_DMA.C inst_DTACK_DMA.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_000_D2.D inst_CLK_000_D2.C \
inst_VPA_D.D inst_VPA_D.C inst_CLK_000_D0.D inst_CLK_000_D0.C RESETDFFreg.D RESETDFFreg.C inst_CLK_000_D1.D inst_CLK_000_D1.C CLK_REF_1_.D CLK_REF_1_.LH CLK_REF_1_.AR \
cpu_est_0_0_.X1 cpu_est_0_0_.X2 G_90.X1 G_90.X2 G_86.X1 G_86.X2 CLK_OUT_PRE_0.X1 CLK_OUT_PRE_0.X2 DSACK_1_ DTACK DSACK_0_ BGACK_000_c CLK_030_c CLK_000_c \
CLK_OSZI_c ipl_c_0__n ipl_c_1__n ipl_c_2__n vcc_n_n gnd_n_n dsack_c_1__n DTACK_c clk_un4_clk_000_d1_n clk_clk_cnt_n RST_c \
state_machine_un14_as_000_int_n RW_c fc_c_0__n un1_as_030_4 fc_c_1__n state_machine_lds_000_int_7_n state_machine_uds_000_int_7_n N_101_i N_102_i N_103_i N_90_0 \
N_91_0 N_127_i N_128_i N_118_i N_125_i N_123_i N_124_i N_126_i clk_cpu_est_11_0_1__n N_131_i clk_cpu_est_11_0_3__n \
N_130_i N_129_i N_122_i N_121_i N_108_i sm_amiga_ns_0_7__n state_machine_un30_clk_000_d1_n state_machine_un8_clk_000_d0_i_n N_147 state_machine_un13_clk_000_d0_i_n N_96 \
state_machine_un15_clk_000_d0_0_n state_machine_un44_clk_000_d1_n state_machine_un23_clk_000_d0_i_n N_100_i N_89 sm_amiga_ns_0_2__n N_97 BG_030_c_i N_90 state_machine_un1_clk_030_0_n N_98 \
clk_un4_clk_000_d1_i_n N_99 state_machine_un6_bgack_000_0_n UDS_000_INT_0_sqmuxa state_machine_un17_clk_030_0_n UDS_000_INT_0_sqmuxa_1 un1_as_030_3_0 N_167 N_89_i N_170 AMIGA_BUS_ENABLE_i_m_i \
N_105 nEXP_SPACE_m_i N_92 state_machine_amiga_bus_enable_2_iv_i_n N_106 state_machine_as_030_000_sync_3_2_n N_107 N_94_i N_104 un1_bg_030_0 state_machine_un42_clk_030_n \
N_105_i un1_bg_030 N_104_i N_94 sm_amiga_ns_0_5__n state_machine_as_030_000_sync_3_n N_106_i AMIGA_BUS_ENABLE_i_m N_107_i nEXP_SPACE_m N_95 \
CLK_OUT_PRE_i un1_as_030_3 N_92_0 state_machine_un17_clk_030_n state_machine_un44_clk_000_d1_i_n state_machine_un6_bgack_000_n a_c_i_0__n state_machine_un1_clk_030_n size_c_i_1__n AS_000_INT_1_sqmuxa N_98_i \
DSACK_INT_1_sqmuxa N_99_i N_100 sm_amiga_ns_0_1__n state_machine_un23_clk_000_d0_n N_97_i DTACK_SYNC_1_sqmuxa DTACK_SYNC_1_sqmuxa_1 N_147_i VPA_SYNC_1_sqmuxa state_machine_lds_000_int_7_0_n \
VPA_SYNC_1_sqmuxa_1 state_machine_uds_000_int_7_0_n state_machine_un15_clk_000_d0_n un1_bg_030_0_1 clk_cpu_est_11_3__n un1_bg_030_0_2 state_machine_un2_clk_000_n state_machine_as_030_000_sync_3_2_1_n state_machine_un13_clk_000_d0_n clk_cpu_est_11_0_1_1__n state_machine_un8_clk_000_d0_n \
clk_cpu_est_11_0_2_1__n N_108 N_167_1 state_machine_un13_clk_000_d0_1_n N_167_2 N_124 N_167_3 N_126 N_167_4 state_machine_un13_clk_000_d0_2_n N_167_5 \
N_129 N_167_6 N_122 N_170_1 N_130 N_170_2 N_121 UDS_000_INT_0_sqmuxa_1_1 N_131 UDS_000_INT_0_sqmuxa_1_2 N_127 \
UDS_000_INT_0_sqmuxa_1_3 clk_cpu_est_11_1__n UDS_000_INT_0_sqmuxa_1_0 N_128 state_machine_un44_clk_000_d1_i_1_n N_123 state_machine_un42_clk_030_1_n N_125 state_machine_un42_clk_030_2_n N_91 state_machine_un42_clk_030_3_n \
N_102 state_machine_un42_clk_030_4_n N_103 state_machine_un42_clk_030_5_n N_101 N_96_1 RW_i AMIGA_BUS_ENABLE_i_m_1 AS_000_INT_i N_131_1 dsack_i_1__n \
clk_cpu_est_11_0_1_3__n sm_amiga_i_4__n N_105_1 sm_amiga_i_5__n VPA_SYNC_1_sqmuxa_1_0 CLK_000_D0_i VPA_SYNC_1_sqmuxa_2 sm_amiga_i_3__n VPA_SYNC_1_sqmuxa_3 cpu_est_i_0__n VPA_SYNC_1_sqmuxa_4 \
cpu_est_i_2__n VPA_SYNC_1_sqmuxa_5 state_machine_un13_clk_000_d0_2_i_n VPA_SYNC_1_sqmuxa_6 cpu_est_i_3__n DTACK_SYNC_1_sqmuxa_1_0 VPA_D_i DTACK_SYNC_1_sqmuxa_2 cpu_est_i_1__n state_machine_un8_clk_000_d0_1_n DTACK_i \
state_machine_un8_clk_000_d0_2_n VMA_INT_i state_machine_un8_clk_000_d0_3_n state_machine_un13_clk_000_d0_1_i_n state_machine_un8_clk_000_d0_4_n AS_030_i state_machine_un13_clk_000_d0_1_0_n DTACK_SYNC_1_sqmuxa_i state_machine_un13_clk_000_d0_2_0_n VPA_SYNC_1_sqmuxa_i N_127_1 \
CLK_000_D1_i N_128_1 N_95_i ipl_030_0_2__un3_n N_96_i ipl_030_0_2__un1_n a_i_18__n ipl_030_0_2__un0_n a_i_16__n ipl_030_0_1__un3_n a_i_19__n \
ipl_030_0_1__un1_n CLK_030_i ipl_030_0_1__un0_n CLK_000_D2_i ipl_030_0_0__un3_n state_machine_un42_clk_030_i_n ipl_030_0_0__un1_n sm_amiga_i_6__n ipl_030_0_0__un0_n sm_amiga_i_7__n cpu_est_0_2__un3_n \
AMIGA_BUS_ENABLE_i cpu_est_0_2__un1_n nEXP_SPACE_i cpu_est_0_2__un0_n sm_amiga_i_2__n cpu_est_0_1__un3_n sm_amiga_i_1__n cpu_est_0_1__un1_n DS_030_i cpu_est_0_1__un0_n AS_030_000_SYNC_i \
vpa_sync_0_un3_n UDS_000_INT_0_sqmuxa_1_i vpa_sync_0_un1_n UDS_000_INT_0_sqmuxa_i vpa_sync_0_un0_n clk_clk_cnt_i_n vma_int_0_un3_n clk_cnt_i_0__n vma_int_0_un1_n a_i_30__n vma_int_0_un0_n \
a_i_31__n cpu_est_0_3__un3_n a_i_28__n cpu_est_0_3__un1_n a_i_29__n cpu_est_0_3__un0_n a_i_26__n bgack_030_int_0_un3_n a_i_27__n bgack_030_int_0_un1_n a_i_24__n \
bgack_030_int_0_un0_n a_i_25__n bg_000_0_un3_n N_132_i bg_000_0_un1_n bg_000_0_un0_n RST_i amiga_bus_enable_0_un3_n FPU_CS_INT_i amiga_bus_enable_0_un1_n BGACK_030_INT_i \
amiga_bus_enable_0_un0_n AS_030_c as_030_000_sync_0_un3_n as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n DS_030_c fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n fpu_cs_int_0_un0_n as_000_int_0_un3_n size_c_0__n \
as_000_int_0_un1_n as_000_int_0_un0_n size_c_1__n dsack_int_0_1__un3_n dsack_int_0_1__un1_n a_c_0__n dsack_int_0_1__un0_n dtack_sync_0_un3_n dtack_sync_0_un1_n dtack_sync_0_un0_n uds_000_int_0_un3_n \
uds_000_int_0_un1_n uds_000_int_0_un0_n lds_000_int_0_un3_n lds_000_int_0_un1_n lds_000_int_0_un0_n a_15__n a_14__n a_13__n a_12__n a_c_16__n a_11__n \
a_c_17__n a_10__n a_c_18__n a_9__n a_c_19__n a_8__n a_c_20__n a_7__n a_c_21__n a_6__n a_c_22__n \
a_5__n a_c_23__n a_4__n a_c_24__n a_3__n a_c_25__n a_2__n a_c_26__n a_1__n a_c_27__n a_c_28__n \
a_c_29__n a_c_30__n a_c_31__n nEXP_SPACE_c BG_030_c DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE \
LDS_000.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE
.names DSACK_INT_1_.BLIF DSACK_1_
1 1
.names DSACK_1_.PIN dsack_c_1__n
1 1
.names nEXP_SPACE_c.BLIF DSACK_1_.OE
1 1
.names inst_DTACK_DMA.BLIF DTACK
1 1
.names DTACK.PIN DTACK_c
1 1
.names BGACK_030_INT_i.BLIF DTACK.OE
1 1
.names inst_AS_000_INTreg.BLIF AS_000
1 1
.names inst_BGACK_030_INTreg.BLIF AS_000.OE
1 1
.names inst_UDS_000_INTreg.BLIF UDS_000
1 1
.names inst_BGACK_030_INTreg.BLIF UDS_000.OE
1 1
.names inst_LDS_000_INTreg.BLIF LDS_000
1 1
.names inst_BGACK_030_INTreg.BLIF LDS_000.OE
1 1
.names gnd_n_n.BLIF BERR
1 1
.names FPU_CS_INT_i.BLIF BERR.OE
1 1
.names vcc_n_n.BLIF DSACK_0_
1 1
.names nEXP_SPACE_c.BLIF DSACK_0_.OE
1 1
.names gnd_n_n.BLIF AVEC_EXP
1 1
.names FPU_CS_INT_i.BLIF AVEC_EXP.OE
1 1
.names N_170.BLIF CIIN
1 1
.names N_167.BLIF CIIN.OE
1 1
.names N_91_0.BLIF N_91
0 1
.names N_127.BLIF N_127_i
0 1
.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_101
11 1
.names inst_AS_000_INTreg.BLIF AS_000_INT_i
0 1
.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C
1 1
.names dsack_c_1__n.BLIF dsack_i_1__n
0 1
.names AS_000_INT_i.BLIF dsack_i_1__n.BLIF state_machine_un14_as_000_int_n
11 1
.names RST_i.BLIF SM_AMIGA_3_.AR
1 1
.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_2__un3_n
0 1
.names ipl_c_2__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_2__un1_n
11 1
.names IPL_030DFFSH_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n
11 1
.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF IPL_030DFFSH_2_reg.D
1- 1
-1 1
.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C
1 1
.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_1__un3_n
0 1
.names ipl_c_1__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_1__un1_n
11 1
.names RST_i.BLIF SM_AMIGA_2_.AR
1 1
.names IPL_030DFFSH_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n
11 1
.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF IPL_030DFFSH_1_reg.D
1- 1
-1 1
.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_0__un3_n
0 1
.names ipl_c_0__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_0__un1_n
11 1
.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C
1 1
.names IPL_030DFFSH_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n
11 1
.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF IPL_030DFFSH_0_reg.D
1- 1
-1 1
.names RST_i.BLIF SM_AMIGA_1_.AR
1 1
.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_2__un3_n
0 1
.names N_118_i.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_2__un1_n
11 1
.names cpu_est_2_.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n
11 1
.names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D
1- 1
-1 1
.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C
1 1
.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_1__un3_n
0 1
.names clk_cpu_est_11_1__n.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_1__un1_n
11 1
.names RST_i.BLIF SM_AMIGA_0_.AR
1 1
.names cpu_est_1_.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n
11 1
.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D
1- 1
-1 1
.names RW_c.BLIF RW_i
0 1
.names cpu_est_2_.BLIF cpu_est_i_2__n
0 1
.names CLK_OSZI_c.BLIF cpu_est_2_.C
1 1
.names N_127_i.BLIF N_128_i.BLIF N_118_i
11 1
.names N_121_i.BLIF cpu_est_0_.BLIF N_125
11 1
.names cpu_est_0_.BLIF cpu_est_i_0__n
0 1
.names N_121.BLIF cpu_est_i_0__n.BLIF N_123
11 1
.names CLK_OSZI_c.BLIF cpu_est_3_reg.C
1 1
.names SM_AMIGA_3_.BLIF state_machine_un23_clk_000_d0_i_n.BLIF N_91_0
11 1
.names inst_AS_000_INTreg.BLIF SM_AMIGA_0_.BLIF N_90_0
11 1
.names N_102_i.BLIF N_103_i.BLIF SM_AMIGA_3_.D
11 1
.names CLK_000_D0_i.BLIF N_101_i.BLIF SM_AMIGA_4_.D
11 1
.names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C
1 1
.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n
0 1
.names sm_amiga_i_3__n.BLIF sm_amiga_i_4__n.BLIF N_103
11 1
.names RST_i.BLIF IPL_030DFFSH_0_reg.AP
1 1
.names inst_CLK_000_D0.BLIF CLK_000_D0_i
0 1
.names CLK_000_D0_i.BLIF N_91.BLIF N_102
11 1
.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n
0 1
.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n
0 1
.names CLK_OSZI_c.BLIF IPL_030DFFSH_1_reg.C
1 1
.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_124
11 1
.names cpu_est_3_reg.BLIF state_machine_un13_clk_000_d0_2_n.BLIF N_126
11 1
.names RST_i.BLIF IPL_030DFFSH_1_reg.AP
1 1
.names N_122.BLIF cpu_est_3_reg.BLIF N_129
11 1
.names N_122_i.BLIF cpu_est_i_2__n.BLIF N_130
11 1
.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_121_i
11 1
.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_122_i
11 1
.names CLK_OSZI_c.BLIF IPL_030DFFSH_2_reg.C
1 1
.names inst_VMA_INTreg.BLIF VMA_INT_i
0 1
.names DTACK_c.BLIF DTACK_i
0 1
.names RST_i.BLIF IPL_030DFFSH_2_reg.AP
1 1
.names cpu_est_1_.BLIF cpu_est_i_1__n
0 1
.names inst_VPA_D.BLIF VPA_D_i
0 1
.names inst_AS_000_INTreg.BLIF inst_CLK_000_D0.BLIF state_machine_un13_clk_000_d0_1_n
11 1
.names cpu_est_1_.BLIF cpu_est_2_.BLIF state_machine_un13_clk_000_d0_2_n
11 1
.names CLK_OSZI_c.BLIF SM_AMIGA_7_.C
1 1
.names cpu_est_3_reg.BLIF cpu_est_i_3__n
0 1
.names RST_i.BLIF SM_AMIGA_7_.AP
1 1
.names state_machine_un13_clk_000_d0_2_n.BLIF state_machine_un13_clk_000_d0_2_i_n
0 1
.names VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un3_n
0 1
.names inst_VPA_SYNC.BLIF VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un1_n
11 1
.names VPA_SYNC_1_sqmuxa_i.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n
11 1
.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C
1 1
.names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D
1- 1
-1 1
.names state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un3_n
0 1
.names RST_i.BLIF SM_AMIGA_6_.AR
1 1
.names N_121.BLIF state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un1_n
11 1
.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n
11 1
.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF inst_VMA_INTreg.D
1- 1
-1 1
.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_3__un3_n
0 1
.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C
1 1
.names clk_cpu_est_11_3__n.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_3__un1_n
11 1
.names cpu_est_3_reg.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n
11 1
.names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_reg.D
1- 1
-1 1
.names inst_CLK_000_D0.BLIF CLK_000_c.BLIF state_machine_un2_clk_000_n
11 1
.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C
1 1
.names inst_CLK_000_D1.BLIF CLK_000_D1_i
0 1
.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF clk_un4_clk_000_d1_n
11 1
.names RST_i.BLIF inst_BGACK_030_INTreg.AP
1 1
.names state_machine_un8_clk_000_d0_i_n.BLIF state_machine_un13_clk_000_d0_i_n.BLIF state_machine_un15_clk_000_d0_0_n
11 1
.names VPA_SYNC_1_sqmuxa.BLIF VPA_SYNC_1_sqmuxa_i
0 1
.names AS_030_i.BLIF VPA_SYNC_1_sqmuxa_i.BLIF VPA_SYNC_1_sqmuxa_1
11 1
.names AS_030_c.BLIF AS_030_i
0 1
.names CLK_OSZI_c.BLIF CLK_CNT_0_.C
1 1
.names DTACK_SYNC_1_sqmuxa.BLIF DTACK_SYNC_1_sqmuxa_i
0 1
.names AS_030_i.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF DTACK_SYNC_1_sqmuxa_1
11 1
.names state_machine_un13_clk_000_d0_1_n.BLIF state_machine_un13_clk_000_d0_1_i_n
0 1
.names SM_AMIGA_0_.BLIF state_machine_un13_clk_000_d0_1_i_n.BLIF N_108
11 1
.names CLK_OSZI_c.BLIF CLK_CNT_1_.C
1 1
.names AS_030.BLIF AS_030_c
1 1
.names N_96_i.BLIF N_108_i.BLIF sm_amiga_ns_0_7__n
11 1
.names state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n
0 1
.names DS_030.BLIF DS_030_c
1 1
.names BGACK_000_c.BLIF state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n
11 1
.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un0_n
11 1
.names CLK_OSZI_c.BLIF cpu_est_0_.C
1 1
.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF inst_BGACK_030_INTreg.D
1- 1
-1 1
.names SIZE_0_.BLIF size_c_0__n
1 1
.names state_machine_un1_clk_030_n.BLIF bg_000_0_un3_n
0 1
.names SIZE_1_.BLIF size_c_1__n
1 1
.names un1_bg_030.BLIF state_machine_un1_clk_030_n.BLIF bg_000_0_un1_n
11 1
.names A_0_.BLIF a_c_0__n
1 1
.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n
11 1
.names CLK_OSZI_c.BLIF cpu_est_1_.C
1 1
.names A_16_.BLIF a_c_16__n
1 1
.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF BG_000DFFSHreg.D
1- 1
-1 1
.names A_17_.BLIF a_c_17__n
1 1
.names RST_c.BLIF amiga_bus_enable_0_un3_n
0 1
.names A_18_.BLIF a_c_18__n
1 1
.names state_machine_amiga_bus_enable_2_iv_i_n.BLIF RST_c.BLIF amiga_bus_enable_0_un1_n
11 1
.names A_19_.BLIF a_c_19__n
1 1
.names AMIGA_BUS_ENABLEDFFreg.BLIF amiga_bus_enable_0_un3_n.BLIF amiga_bus_enable_0_un0_n
11 1
.names CLK_OSZI_c.BLIF inst_VPA_SYNC.C
1 1
.names A_20_.BLIF a_c_20__n
1 1
.names amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF AMIGA_BUS_ENABLEDFFreg.D
1- 1
-1 1
.names A_21_.BLIF a_c_21__n
1 1
.names state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un3_n
0 1
.names RST_i.BLIF inst_VPA_SYNC.AP
1 1
.names A_22_.BLIF a_c_22__n
1 1
.names state_machine_as_030_000_sync_3_n.BLIF state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un1_n
11 1
.names A_23_.BLIF a_c_23__n
1 1
.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n
11 1
.names A_24_.BLIF a_c_24__n
1 1
.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF inst_AS_030_000_SYNC.D
1- 1
-1 1
.names A_25_.BLIF a_c_25__n
1 1
.names state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un3_n
0 1
.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C
1 1
.names A_26_.BLIF a_c_26__n
1 1
.names un1_as_030_3.BLIF state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un1_n
11 1
.names A_27_.BLIF a_c_27__n
1 1
.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n
11 1
.names RST_i.BLIF inst_FPU_CS_INTreg.AP
1 1
.names A_28_.BLIF a_c_28__n
1 1
.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D
1- 1
-1 1
.names A_29_.BLIF a_c_29__n
1 1
.names AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un3_n
0 1
.names A_30_.BLIF a_c_30__n
1 1
.names inst_AS_000_INTreg.BLIF AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un1_n
11 1
.names A_31_.BLIF a_c_31__n
1 1
.names N_95_i.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n
11 1
.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C
1 1
.names nEXP_SPACE.BLIF nEXP_SPACE_c
1 1
.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INTreg.D
1- 1
-1 1
.names DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un3_n
0 1
.names RST_i.BLIF inst_AS_030_000_SYNC.AP
1 1
.names BG_030.BLIF BG_030_c
1 1
.names DSACK_INT_1_.BLIF DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un1_n
11 1
.names BG_000DFFSHreg.BLIF BG_000
1 1
.names N_96_i.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un0_n
11 1
.names inst_BGACK_030_INTreg.BLIF BGACK_030
1 1
.names dsack_int_0_1__un1_n.BLIF dsack_int_0_1__un0_n.BLIF DSACK_INT_1_.D
1- 1
-1 1
.names BGACK_000.BLIF BGACK_000_c
1 1
.names N_96.BLIF N_96_i
0 1
.names CLK_OSZI_c.BLIF inst_AS_000_INTreg.C
1 1
.names CLK_030.BLIF CLK_030_c
1 1
.names AS_030_i.BLIF N_96_i.BLIF DSACK_INT_1_sqmuxa
11 1
.names CLK_000.BLIF CLK_000_c
1 1
.names N_95.BLIF N_95_i
0 1
.names RST_i.BLIF inst_AS_000_INTreg.AP
1 1
.names CLK_OSZI.BLIF CLK_OSZI_c
1 1
.names AS_030_i.BLIF N_95_i.BLIF AS_000_INT_1_sqmuxa
11 1
.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT
1 1
.names inst_CLK_000_D0.BLIF SM_AMIGA_5_.BLIF N_100
11 1
.names CLK_OUT_INTreg.BLIF CLK_EXP
1 1
.names N_95_i.BLIF N_100_i.BLIF sm_amiga_ns_0_2__n
11 1
.names inst_FPU_CS_INTreg.BLIF FPU_CS
1 1
.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF state_machine_un23_clk_000_d0_i_n
11 1
.names CLK_OSZI_c.BLIF AMIGA_BUS_ENABLEDFFreg.C
1 1
.names IPL_030DFFSH_0_reg.BLIF IPL_030_0_
1 1
.names DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un3_n
0 1
.names IPL_030DFFSH_1_reg.BLIF IPL_030_1_
1 1
.names inst_DTACK_SYNC.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un1_n
11 1
.names IPL_030DFFSH_2_reg.BLIF IPL_030_2_
1 1
.names DTACK_SYNC_1_sqmuxa_i.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n
11 1
.names IPL_0_.BLIF ipl_c_0__n
1 1
.names dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.D
1- 1
-1 1
.names CLK_OSZI_c.BLIF BG_000DFFSHreg.C
1 1
.names IPL_1_.BLIF ipl_c_1__n
1 1
.names N_89_i.BLIF SM_AMIGA_6_.BLIF N_95
11 1
.names IPL_2_.BLIF ipl_c_2__n
1 1
.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n
0 1
.names RST_i.BLIF BG_000DFFSHreg.AP
1 1
.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n
0 1
.names sm_amiga_i_6__n.BLIF sm_amiga_i_7__n.BLIF N_94
11 1
.names state_machine_un42_clk_030_n.BLIF state_machine_un42_clk_030_i_n
0 1
.names vcc_n_n.BLIF AVEC
1 1
.names AS_030_i.BLIF state_machine_un42_clk_030_n.BLIF un1_as_030_3_0
11 1
.names CLK_OSZI_c.BLIF DSACK_INT_1_.C
1 1
.names AS_030_i.BLIF CLK_030_i.BLIF state_machine_un17_clk_030_0_n
11 1
.names cpu_est_3_reg.BLIF E
1 1
.names BGACK_000_c.BLIF clk_un4_clk_000_d1_i_n.BLIF state_machine_un6_bgack_000_0_n
11 1
.names RST_i.BLIF DSACK_INT_1_.AP
1 1
.names VPA.BLIF inst_VPA_D.D
1 1
.names inst_CLK_000_D2.BLIF CLK_000_D2_i
0 1
.names inst_VMA_INTreg.BLIF VMA
1 1
.names inst_CLK_000_D1.BLIF CLK_000_D2_i.BLIF state_machine_un30_clk_000_d1_n
11 1
.names RST.BLIF RST_c
1 1
.names CLK_030_c.BLIF CLK_030_i
0 1
.names RESETDFFreg.BLIF RESET
1 1
.names BG_030_c_i.BLIF CLK_030_c.BLIF state_machine_un1_clk_030_0_n
11 1
.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C
1 1
.names RW.BLIF RW_c
1 1
.names a_c_19__n.BLIF a_i_19__n
0 1
.names FC_0_.BLIF fc_c_0__n
1 1
.names a_c_18__n.BLIF a_i_18__n
0 1
.names RST_i.BLIF inst_VMA_INTreg.AP
1 1
.names FC_1_.BLIF fc_c_1__n
1 1
.names a_c_16__n.BLIF a_i_16__n
0 1
.names AMIGA_BUS_ENABLEDFFreg.BLIF AMIGA_BUS_ENABLE
1 1
.names RW_i.BLIF AMIGA_BUS_DATA_DIR
1 1
.names vcc_n_n.BLIF AMIGA_BUS_ENABLE_LOW
1 1
.names CLK_OUT_PRE_i.BLIF sm_amiga_i_2__n.BLIF N_92_0
11 1
.names CLK_OSZI_c.BLIF inst_UDS_000_INTreg.C
1 1
.names N_106_i.BLIF N_107_i.BLIF SM_AMIGA_1_.D
11 1
.names state_machine_un8_clk_000_d0_4_n.BLIF state_machine_un8_clk_000_d0_3_n.BLIF state_machine_un8_clk_000_d0_n
11 1
.names N_104_i.BLIF N_105_i.BLIF sm_amiga_ns_0_5__n
11 1
.names RST_i.BLIF inst_UDS_000_INTreg.AP
1 1
.names cpu_est_i_0__n.BLIF cpu_est_i_3__n.BLIF state_machine_un13_clk_000_d0_1_0_n
11 1
.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n
0 1
.names state_machine_un13_clk_000_d0_1_n.BLIF state_machine_un13_clk_000_d0_2_n.BLIF state_machine_un13_clk_000_d0_2_0_n
11 1
.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n
0 1
.names state_machine_un13_clk_000_d0_1_0_n.BLIF state_machine_un13_clk_000_d0_2_0_n.BLIF state_machine_un13_clk_000_d0_n
11 1
.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_107
11 1
.names cpu_est_0_.BLIF cpu_est_i_3__n.BLIF N_127_1
11 1
.names CLK_000_D0_i.BLIF N_92.BLIF N_106
11 1
.names CLK_OSZI_c.BLIF inst_LDS_000_INTreg.C
1 1
.names N_127_1.BLIF state_machine_un13_clk_000_d0_2_i_n.BLIF N_127
11 1
.names CLK_000_D0_i.BLIF SM_AMIGA_2_.BLIF N_104
11 1
.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_128_1
11 1
.names nEXP_SPACE_c.BLIF nEXP_SPACE_i
0 1
.names RST_i.BLIF inst_LDS_000_INTreg.AP
1 1
.names N_128_1.BLIF cpu_est_i_2__n.BLIF N_128
11 1
.names AMIGA_BUS_ENABLEDFFreg.BLIF AMIGA_BUS_ENABLE_i
0 1
.names N_105_1.BLIF state_machine_un23_clk_000_d0_n.BLIF N_105
11 1
.names AMIGA_BUS_ENABLE_i_m_i.BLIF nEXP_SPACE_m_i.BLIF state_machine_amiga_bus_enable_2_iv_i_n
11 1
.names SM_AMIGA_3_.BLIF VMA_INT_i.BLIF VPA_SYNC_1_sqmuxa_1_0
11 1
.names SM_AMIGA_6_.BLIF nEXP_SPACE_c.BLIF nEXP_SPACE_m
11 1
.names VPA_D_i.BLIF cpu_est_2_.BLIF VPA_SYNC_1_sqmuxa_2
11 1
.names AS_030_000_SYNC_i.BLIF state_machine_un30_clk_000_d1_n.BLIF N_89_i
11 1
.names CLK_OSZI_c.BLIF inst_DTACK_SYNC.C
1 1
.names cpu_est_3_reg.BLIF cpu_est_i_0__n.BLIF VPA_SYNC_1_sqmuxa_3
11 1
.names CLK_CNT_0_.BLIF clk_cnt_i_0__n
0 1
.names cpu_est_i_1__n.BLIF state_machine_un2_clk_000_n.BLIF VPA_SYNC_1_sqmuxa_4
11 1
.names clk_cnt_i_0__n.BLIF clk_clk_cnt_i_n.BLIF CLK_CNT_0_.D
11 1
.names RST_i.BLIF inst_DTACK_SYNC.AP
1 1
.names VPA_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_2.BLIF VPA_SYNC_1_sqmuxa_5
11 1
.names clk_clk_cnt_n.BLIF clk_clk_cnt_i_n
0 1
.names VPA_SYNC_1_sqmuxa_3.BLIF VPA_SYNC_1_sqmuxa_4.BLIF VPA_SYNC_1_sqmuxa_6
11 1
.names clk_clk_cnt_i_n.BLIF G_90.BLIF CLK_CNT_1_.D
11 1
.names VPA_SYNC_1_sqmuxa_5.BLIF VPA_SYNC_1_sqmuxa_6.BLIF VPA_SYNC_1_sqmuxa
11 1
.names N_90.BLIF sm_amiga_i_7__n.BLIF N_97
11 1
.names DTACK_i.BLIF SM_AMIGA_3_.BLIF DTACK_SYNC_1_sqmuxa_1_0
11 1
.names N_89.BLIF SM_AMIGA_6_.BLIF N_98
11 1
.names CLK_OSZI_c.BLIF inst_DTACK_DMA.C
1 1
.names inst_VPA_D.BLIF state_machine_un2_clk_000_n.BLIF DTACK_SYNC_1_sqmuxa_2
11 1
.names CLK_000_D0_i.BLIF SM_AMIGA_7_.BLIF N_99
11 1
.names DTACK_SYNC_1_sqmuxa_1_0.BLIF DTACK_SYNC_1_sqmuxa_2.BLIF DTACK_SYNC_1_sqmuxa
11 1
.names inst_CLK_000_D0.BLIF N_97_i.BLIF SM_AMIGA_7_.D
11 1
.names RST_i.BLIF inst_DTACK_DMA.AP
1 1
.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF state_machine_un8_clk_000_d0_1_n
11 1
.names N_98_i.BLIF N_99_i.BLIF sm_amiga_ns_0_1__n
11 1
.names CLK_000_D0_i.BLIF VPA_D_i.BLIF state_machine_un8_clk_000_d0_2_n
11 1
.names UDS_000_INT_0_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_1_i
0 1
.names cpu_est_0_.BLIF cpu_est_2_.BLIF state_machine_un8_clk_000_d0_3_n
11 1
.names UDS_000_INT_0_sqmuxa.BLIF UDS_000_INT_0_sqmuxa_i
0 1
.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D
1 1
.names state_machine_un8_clk_000_d0_1_n.BLIF state_machine_un8_clk_000_d0_2_n.BLIF state_machine_un8_clk_000_d0_4_n
11 1
.names UDS_000_INT_0_sqmuxa_1_i.BLIF UDS_000_INT_0_sqmuxa_i.BLIF N_147
11 1
.names a_c_17__n.BLIF a_i_16__n.BLIF state_machine_un42_clk_030_1_n
11 1
.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i
0 1
.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C
1 1
.names a_i_18__n.BLIF a_i_19__n.BLIF state_machine_un42_clk_030_2_n
11 1
.names DS_030_c.BLIF DS_030_i
0 1
.names fc_c_1__n.BLIF BGACK_000_c.BLIF state_machine_un42_clk_030_3_n
11 1
.names state_machine_un42_clk_030_1_n.BLIF state_machine_un42_clk_030_2_n.BLIF state_machine_un42_clk_030_4_n
11 1
.names G_86.BLIF N_132_i
0 1
.names inst_CLK_000_D1.BLIF inst_CLK_000_D2.D
1 1
.names state_machine_un42_clk_030_3_n.BLIF fc_c_0__n.BLIF state_machine_un42_clk_030_5_n
11 1
.names clk_cnt_i_0__n.BLIF N_132_i.BLIF clk_clk_cnt_n
11 1
.names state_machine_un42_clk_030_4_n.BLIF state_machine_un42_clk_030_5_n.BLIF state_machine_un42_clk_030_n
11 1
.names a_c_24__n.BLIF a_i_24__n
0 1
.names CLK_OSZI_c.BLIF inst_CLK_000_D2.C
1 1
.names CLK_000_D0_i.BLIF inst_CLK_OUT_PRE.BLIF N_96_1
11 1
.names a_c_25__n.BLIF a_i_25__n
0 1
.names N_96_1.BLIF SM_AMIGA_1_.BLIF N_96
11 1
.names a_c_26__n.BLIF a_i_26__n
0 1
.names AMIGA_BUS_ENABLE_i.BLIF AS_030_i.BLIF AMIGA_BUS_ENABLE_i_m_1
11 1
.names a_c_27__n.BLIF a_i_27__n
0 1
.names AMIGA_BUS_ENABLE_i_m_1.BLIF sm_amiga_i_6__n.BLIF AMIGA_BUS_ENABLE_i_m
11 1
.names a_c_28__n.BLIF a_i_28__n
0 1
.names CLK_OSZI_c.BLIF inst_VPA_D.C
1 1
.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_131_1
11 1
.names a_c_29__n.BLIF a_i_29__n
0 1
.names N_131_1.BLIF cpu_est_i_2__n.BLIF N_131
11 1
.names a_c_30__n.BLIF a_i_30__n
0 1
.names N_131_i.BLIF N_129_i.BLIF clk_cpu_est_11_0_1_3__n
11 1
.names a_c_31__n.BLIF a_i_31__n
0 1
.names CLK_000_c.BLIF inst_CLK_000_D0.D
1 1
.names clk_cpu_est_11_0_1_3__n.BLIF N_130_i.BLIF clk_cpu_est_11_0_3__n
11 1
.names AS_030_i.BLIF N_147.BLIF un1_as_030_4
11 1
.names CLK_000_D0_i.BLIF SM_AMIGA_3_.BLIF N_105_1
11 1
.names a_c_i_0__n.BLIF N_147_i.BLIF state_machine_uds_000_int_7_0_n
11 1
.names CLK_OSZI_c.BLIF inst_CLK_000_D0.C
1 1
.names a_i_30__n.BLIF a_i_31__n.BLIF N_167_4
11 1
.names N_147_i.BLIF state_machine_un44_clk_000_d1_n.BLIF state_machine_lds_000_int_7_0_n
11 1
.names N_167_1.BLIF N_167_2.BLIF N_167_5
11 1
.names state_machine_un14_as_000_int_n.BLIF inst_DTACK_DMA.D
0 1
.names N_167_3.BLIF N_167_4.BLIF N_167_6
11 1
.names RST_c.BLIF RST_i
0 1
.names RST_c.BLIF RESETDFFreg.D
1 1
.names N_167_5.BLIF N_167_6.BLIF N_167
11 1
.names a_c_20__n.BLIF a_c_21__n.BLIF N_170_1
11 1
.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i
0 1
.names CLK_OSZI_c.BLIF RESETDFFreg.C
1 1
.names a_c_22__n.BLIF a_c_23__n.BLIF N_170_2
11 1
.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i
0 1
.names N_170_1.BLIF N_170_2.BLIF N_170
11 1
.names un1_as_030_4.BLIF uds_000_int_0_un3_n
0 1
.names AS_030_000_SYNC_i.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_1
11 1
.names inst_UDS_000_INTreg.BLIF un1_as_030_4.BLIF uds_000_int_0_un1_n
11 1
.names inst_CLK_000_D0.BLIF inst_CLK_000_D1.D
1 1
.names RW_c.BLIF SM_AMIGA_6_.BLIF UDS_000_INT_0_sqmuxa_1_2
11 1
.names state_machine_uds_000_int_7_n.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n
11 1
.names UDS_000_INT_0_sqmuxa_1_1.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF UDS_000_INT_0_sqmuxa_1_3
11 1
.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF inst_UDS_000_INTreg.D
1- 1
-1 1
.names CLK_OSZI_c.BLIF inst_CLK_000_D1.C
1 1
.names UDS_000_INT_0_sqmuxa_1_3.BLIF state_machine_un30_clk_000_d1_n.BLIF UDS_000_INT_0_sqmuxa_1
11 1
.names un1_as_030_4.BLIF lds_000_int_0_un3_n
0 1
.names SM_AMIGA_4_.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_0
11 1
.names inst_LDS_000_INTreg.BLIF un1_as_030_4.BLIF lds_000_int_0_un1_n
11 1
.names UDS_000_INT_0_sqmuxa_1_0.BLIF RW_i.BLIF UDS_000_INT_0_sqmuxa
11 1
.names state_machine_lds_000_int_7_n.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n
11 1
.names gnd_n_n.BLIF CLK_REF_1_.D
1 1
.names size_c_i_1__n.BLIF a_c_i_0__n.BLIF state_machine_un44_clk_000_d1_i_1_n
11 1
.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INTreg.D
1- 1
-1 1
.names state_machine_un44_clk_000_d1_i_1_n.BLIF size_c_0__n.BLIF state_machine_un44_clk_000_d1_i_n
11 1
.names vcc_n_n
1
.names gnd_n_n.BLIF CLK_REF_1_.LH
1 1
.names N_97.BLIF N_97_i
0 1
.names gnd_n_n
.names N_147.BLIF N_147_i
0 1
.names A_15_.BLIF a_15__n
1 1
.names RST_i.BLIF CLK_REF_1_.AR
1 1
.names state_machine_lds_000_int_7_0_n.BLIF state_machine_lds_000_int_7_n
0 1
.names A_14_.BLIF a_14__n
1 1
.names state_machine_uds_000_int_7_0_n.BLIF state_machine_uds_000_int_7_n
0 1
.names A_13_.BLIF a_13__n
1 1
.names BG_030_c_i.BLIF N_94_i.BLIF un1_bg_030_0_1
11 1
.names A_12_.BLIF a_12__n
1 1
.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_0_.X1
1 1
.names AS_030_c.BLIF nEXP_SPACE_i.BLIF un1_bg_030_0_2
11 1
.names A_11_.BLIF a_11__n
1 1
.names un1_bg_030_0_1.BLIF un1_bg_030_0_2.BLIF un1_bg_030_0
11 1
.names A_10_.BLIF a_10__n
1 1
.names cpu_est_0_.BLIF cpu_est_0_0_.X2
1 1
.names AS_030_i.BLIF nEXP_SPACE_c.BLIF state_machine_as_030_000_sync_3_2_1_n
11 1
.names A_9_.BLIF a_9__n
1 1
.names state_machine_as_030_000_sync_3_2_1_n.BLIF state_machine_un42_clk_030_i_n.BLIF state_machine_as_030_000_sync_3_2_n
11 1
.names A_8_.BLIF a_8__n
1 1
.names N_126_i.BLIF N_124_i.BLIF clk_cpu_est_11_0_1_1__n
11 1
.names A_7_.BLIF a_7__n
1 1
.names CLK_CNT_0_.BLIF G_90.X1
1 1
.names N_123_i.BLIF N_125_i.BLIF clk_cpu_est_11_0_2_1__n
11 1
.names A_6_.BLIF a_6__n
1 1
.names clk_cpu_est_11_0_1_1__n.BLIF clk_cpu_est_11_0_2_1__n.BLIF clk_cpu_est_11_0_1__n
11 1
.names A_5_.BLIF a_5__n
1 1
.names CLK_CNT_1_.BLIF G_90.X2
1 1
.names a_i_24__n.BLIF a_i_25__n.BLIF N_167_1
11 1
.names A_4_.BLIF a_4__n
1 1
.names a_i_26__n.BLIF a_i_27__n.BLIF N_167_2
11 1
.names A_3_.BLIF a_3__n
1 1
.names a_i_28__n.BLIF a_i_29__n.BLIF N_167_3
11 1
.names A_2_.BLIF a_2__n
1 1
.names CLK_CNT_1_.BLIF G_86.X1
1 1
.names N_94.BLIF N_94_i
0 1
.names A_1_.BLIF a_1__n
1 1
.names un1_bg_030_0.BLIF un1_bg_030
0 1
.names CLK_REF_1_.BLIF G_86.X2
1 1
.names N_105.BLIF N_105_i
0 1
.names N_104.BLIF N_104_i
0 1
.names sm_amiga_ns_0_5__n.BLIF SM_AMIGA_2_.D
0 1
.names inst_CLK_OUT_PRE.BLIF CLK_OUT_PRE_0.X1
1 1
.names N_106.BLIF N_106_i
0 1
.names N_107.BLIF N_107_i
0 1
.names clk_clk_cnt_n.BLIF CLK_OUT_PRE_0.X2
1 1
.names inst_CLK_OUT_PRE.BLIF CLK_OUT_PRE_i
0 1
.names N_92_0.BLIF N_92
0 1
.names state_machine_un44_clk_000_d1_i_n.BLIF state_machine_un44_clk_000_d1_n
0 1
.names CLK_OUT_PRE_0.BLIF inst_CLK_OUT_PRE.D
1 1
.names a_c_0__n.BLIF a_c_i_0__n
0 1
.names cpu_est_0_0_.BLIF cpu_est_0_.D
1 1
.names size_c_1__n.BLIF size_c_i_1__n
0 1
.names N_98.BLIF N_98_i
0 1
.names N_99.BLIF N_99_i
0 1
.names sm_amiga_ns_0_1__n.BLIF SM_AMIGA_6_.D
0 1
.names state_machine_un13_clk_000_d0_n.BLIF state_machine_un13_clk_000_d0_i_n
0 1
.names state_machine_un15_clk_000_d0_0_n.BLIF state_machine_un15_clk_000_d0_n
0 1
.names state_machine_un23_clk_000_d0_i_n.BLIF state_machine_un23_clk_000_d0_n
0 1
.names N_100.BLIF N_100_i
0 1
.names sm_amiga_ns_0_2__n.BLIF SM_AMIGA_5_.D
0 1
.names BG_030_c.BLIF BG_030_c_i
0 1
.names state_machine_un1_clk_030_0_n.BLIF state_machine_un1_clk_030_n
0 1
.names clk_un4_clk_000_d1_n.BLIF clk_un4_clk_000_d1_i_n
0 1
.names state_machine_un6_bgack_000_0_n.BLIF state_machine_un6_bgack_000_n
0 1
.names state_machine_un17_clk_030_0_n.BLIF state_machine_un17_clk_030_n
0 1
.names un1_as_030_3_0.BLIF un1_as_030_3
0 1
.names N_89_i.BLIF N_89
0 1
.names AMIGA_BUS_ENABLE_i_m.BLIF AMIGA_BUS_ENABLE_i_m_i
0 1
.names nEXP_SPACE_m.BLIF nEXP_SPACE_m_i
0 1
.names state_machine_as_030_000_sync_3_2_n.BLIF state_machine_as_030_000_sync_3_n
0 1
.names N_128.BLIF N_128_i
0 1
.names N_125.BLIF N_125_i
0 1
.names N_123.BLIF N_123_i
0 1
.names N_124.BLIF N_124_i
0 1
.names N_126.BLIF N_126_i
0 1
.names clk_cpu_est_11_0_1__n.BLIF clk_cpu_est_11_1__n
0 1
.names N_131.BLIF N_131_i
0 1
.names clk_cpu_est_11_0_3__n.BLIF clk_cpu_est_11_3__n
0 1
.names N_130.BLIF N_130_i
0 1
.names N_129.BLIF N_129_i
0 1
.names N_122_i.BLIF N_122
0 1
.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C
1 1
.names N_121_i.BLIF N_121
0 1
.names N_108.BLIF N_108_i
0 1
.names RST_i.BLIF SM_AMIGA_5_.AR
1 1
.names sm_amiga_ns_0_7__n.BLIF SM_AMIGA_0_.D
0 1
.names state_machine_un8_clk_000_d0_n.BLIF state_machine_un8_clk_000_d0_i_n
0 1
.names N_101.BLIF N_101_i
0 1
.names N_102.BLIF N_102_i
0 1
.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C
1 1
.names N_103.BLIF N_103_i
0 1
.names N_90_0.BLIF N_90
0 1
.names RST_i.BLIF SM_AMIGA_4_.AR
1 1
.end
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