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8 lines
768 B
Plaintext
8 lines
768 B
Plaintext
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":233:2:233:3|Pruning register CLK_REF(1 downto 0)
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@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":124:34:124:36|Pruning register CLK_000_D6
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@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":123:34:123:36|Pruning register CLK_000_D5
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@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":114:38:114:40|Pruning register CLK_OUT_PRE_33
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@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":146:2:146:3|Pruning register CLK_CNT_P(1 downto 0)
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@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":133:2:133:3|Pruning register CLK_CNT_N(1 downto 0)
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