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68030tk/Logic/68030_tk.out

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135 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21
79 RW_000 5 358 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 366 6 2 2 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
68 A0 5 359 6 1 0 68 -1 3 0 21
97 DS_030 5 -1 0 1 3 97 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
65 E 5 363 6 0 65 -1 5 0 21
80 DSACK1 5 362 7 0 80 -1 4 0 21
34 VMA 5 364 3 0 34 -1 3 0 21
82 BGACK_030 5 361 7 0 82 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 360 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 355 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 357 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 356 1 0 6 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 5 365 1 0 2 -1 1 0 21
361 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 2 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 1 7 0 1 3 4 5 6 7 -1 -1 1 0 21
298 inst_AS_030_D0 3 -1 7 6 1 2 3 4 5 7 -1 -1 1 0 21
365 RN_RESET 3 2 1 5 0 3 4 6 7 2 -1 1 0 21
319 inst_CLK_000_NE 3 -1 1 5 1 2 3 5 7 -1 -1 1 0 21
317 inst_CLK_000_PE 3 -1 0 5 0 2 3 5 7 -1 -1 1 0 21
352 SM_AMIGA_i_7_ 3 -1 5 4 1 3 5 7 -1 -1 15 0 21
323 inst_CLK_000_NE_D0 3 -1 7 4 2 3 5 6 -1 -1 1 0 21
363 RN_E 3 65 6 3 2 3 6 65 -1 5 0 21
294 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
321 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21
348 SM_AMIGA_1_ 3 -1 2 3 2 5 7 -1 -1 3 0 21
296 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
293 cpu_est_0_ 3 -1 3 3 2 3 6 -1 -1 2 0 21
312 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21
309 inst_VPA_D 3 -1 6 3 2 3 5 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
301 inst_AS_030_000_SYNC 3 -1 1 2 1 5 -1 -1 7 0 21
322 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 5 0 21
350 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21
311 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 4 0 21
364 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21
351 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
349 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21
326 SM_AMIGA_6_ 3 -1 5 2 0 5 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
325 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
324 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
345 CLK_000_N_SYNC_9_ 3 -1 6 2 1 7 -1 -1 1 0 21
316 inst_CLK_000_D0 3 -1 1 2 3 5 -1 -1 1 0 21
315 inst_CLK_000_D1 3 -1 5 2 3 5 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 2 2 2 5 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 7 2 1 6 -1 -1 1 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
347 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
362 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
359 RN_A0 3 68 6 1 6 68 -1 3 0 21
358 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
366 RN_RW 3 70 6 1 6 70 -1 2 0 21
360 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
357 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
356 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
355 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
354 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
353 N_302 3 -1 2 1 5 -1 -1 1 0 21
346 CLK_000_N_SYNC_10_ 3 -1 1 1 7 -1 -1 1 0 21
344 CLK_000_N_SYNC_8_ 3 -1 1 1 6 -1 -1 1 0 21
343 CLK_000_N_SYNC_7_ 3 -1 5 1 1 -1 -1 1 0 21
342 CLK_000_N_SYNC_6_ 3 -1 2 1 5 -1 -1 1 0 21
341 CLK_000_N_SYNC_5_ 3 -1 2 1 2 -1 -1 1 0 21
340 CLK_000_N_SYNC_4_ 3 -1 5 1 2 -1 -1 1 0 21
339 CLK_000_N_SYNC_3_ 3 -1 5 1 5 -1 -1 1 0 21
338 CLK_000_N_SYNC_2_ 3 -1 1 1 5 -1 -1 1 0 21
337 CLK_000_N_SYNC_1_ 3 -1 5 1 1 -1 -1 1 0 21
336 CLK_000_N_SYNC_0_ 3 -1 3 1 5 -1 -1 1 0 21
335 CLK_000_P_SYNC_8_ 3 -1 3 1 3 -1 -1 1 0 21
334 CLK_000_P_SYNC_7_ 3 -1 4 1 3 -1 -1 1 0 21
333 CLK_000_P_SYNC_6_ 3 -1 1 1 4 -1 -1 1 0 21
332 CLK_000_P_SYNC_5_ 3 -1 2 1 1 -1 -1 1 0 21
331 CLK_000_P_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
330 CLK_000_P_SYNC_3_ 3 -1 6 1 0 -1 -1 1 0 21
329 CLK_000_P_SYNC_2_ 3 -1 0 1 6 -1 -1 1 0 21
328 CLK_000_P_SYNC_1_ 3 -1 6 1 0 -1 -1 1 0 21
327 CLK_000_P_SYNC_0_ 3 -1 3 1 6 -1 -1 1 0 21
320 CLK_000_N_SYNC_11_ 3 -1 7 1 1 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 3 1 0 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 3 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 1 4 7 96 -1
95 A_16_ 1 -1 -1 3 1 4 7 95 -1
94 A_18_ 1 -1 -1 3 1 4 7 94 -1
58 A_17_ 1 -1 -1 3 1 4 7 58 -1
57 FC_1_ 1 -1 -1 3 1 4 7 57 -1
56 FC_0_ 1 -1 -1 3 1 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
63 CLK_030 1 -1 -1 2 0 7 63 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_21_ 1 -1 -1 1 4 93 -1
92 A_20_ 1 -1 -1 1 4 92 -1
84 A_23_ 1 -1 -1 1 4 84 -1
83 A_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A1 1 -1 -1 1 6 59 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
35 VPA 1 -1 -1 1 6 35 -1
29 DTACK 1 -1 -1 1 2 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 1 13 -1
10 CLK_000 1 -1 -1 1 1 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
135 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21
79 RW_000 5 358 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 366 6 2 2 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
68 A0 5 359 6 1 0 68 -1 3 0 21
97 DS_030 5 -1 0 1 3 97 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
65 E 5 363 6 0 65 -1 5 0 21
80 DSACK1 5 362 7 0 80 -1 4 0 21
34 VMA 5 364 3 0 34 -1 3 0 21
82 BGACK_030 5 361 7 0 82 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 360 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 355 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 357 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 356 1 0 6 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 5 365 1 0 2 -1 1 0 21
361 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 2 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 1 7 0 1 3 4 5 6 7 -1 -1 1 0 21
298 inst_AS_030_D0 3 -1 7 6 1 2 3 4 5 7 -1 -1 1 0 21
365 RN_RESET 3 2 1 5 0 3 4 6 7 2 -1 1 0 21
319 inst_CLK_000_NE 3 -1 1 5 1 2 3 5 7 -1 -1 1 0 21
317 inst_CLK_000_PE 3 -1 0 5 0 2 3 5 7 -1 -1 1 0 21
352 SM_AMIGA_i_7_ 3 -1 5 4 1 3 5 7 -1 -1 15 0 21
323 inst_CLK_000_NE_D0 3 -1 7 4 2 3 5 6 -1 -1 1 0 21
363 RN_E 3 65 6 3 2 3 6 65 -1 5 0 21
294 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
321 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21
348 SM_AMIGA_1_ 3 -1 2 3 2 5 7 -1 -1 3 0 21
296 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
293 cpu_est_0_ 3 -1 3 3 2 3 6 -1 -1 2 0 21
312 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21
309 inst_VPA_D 3 -1 6 3 2 3 5 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
301 inst_AS_030_000_SYNC 3 -1 1 2 1 5 -1 -1 7 0 21
322 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 5 0 21
350 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21
311 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 4 0 21
364 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21
351 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
349 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21
326 SM_AMIGA_6_ 3 -1 5 2 0 5 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
325 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
324 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
345 CLK_000_N_SYNC_9_ 3 -1 6 2 1 7 -1 -1 1 0 21
316 inst_CLK_000_D0 3 -1 1 2 3 5 -1 -1 1 0 21
315 inst_CLK_000_D1 3 -1 5 2 3 5 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 2 2 2 5 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 7 2 1 6 -1 -1 1 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
347 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
362 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
359 RN_A0 3 68 6 1 6 68 -1 3 0 21
358 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
366 RN_RW 3 70 6 1 6 70 -1 2 0 21
360 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
357 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
356 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
355 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
354 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
353 N_302 3 -1 2 1 5 -1 -1 1 0 21
346 CLK_000_N_SYNC_10_ 3 -1 1 1 7 -1 -1 1 0 21
344 CLK_000_N_SYNC_8_ 3 -1 1 1 6 -1 -1 1 0 21
343 CLK_000_N_SYNC_7_ 3 -1 5 1 1 -1 -1 1 0 21
342 CLK_000_N_SYNC_6_ 3 -1 2 1 5 -1 -1 1 0 21
341 CLK_000_N_SYNC_5_ 3 -1 2 1 2 -1 -1 1 0 21
340 CLK_000_N_SYNC_4_ 3 -1 5 1 2 -1 -1 1 0 21
339 CLK_000_N_SYNC_3_ 3 -1 5 1 5 -1 -1 1 0 21
338 CLK_000_N_SYNC_2_ 3 -1 1 1 5 -1 -1 1 0 21
337 CLK_000_N_SYNC_1_ 3 -1 5 1 1 -1 -1 1 0 21
336 CLK_000_N_SYNC_0_ 3 -1 3 1 5 -1 -1 1 0 21
335 CLK_000_P_SYNC_8_ 3 -1 3 1 3 -1 -1 1 0 21
334 CLK_000_P_SYNC_7_ 3 -1 4 1 3 -1 -1 1 0 21
333 CLK_000_P_SYNC_6_ 3 -1 1 1 4 -1 -1 1 0 21
332 CLK_000_P_SYNC_5_ 3 -1 2 1 1 -1 -1 1 0 21
331 CLK_000_P_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
330 CLK_000_P_SYNC_3_ 3 -1 6 1 0 -1 -1 1 0 21
329 CLK_000_P_SYNC_2_ 3 -1 0 1 6 -1 -1 1 0 21
328 CLK_000_P_SYNC_1_ 3 -1 6 1 0 -1 -1 1 0 21
327 CLK_000_P_SYNC_0_ 3 -1 3 1 6 -1 -1 1 0 21
320 CLK_000_N_SYNC_11_ 3 -1 7 1 1 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 3 1 0 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 3 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 1 4 7 96 -1
95 A_16_ 1 -1 -1 3 1 4 7 95 -1
94 A_18_ 1 -1 -1 3 1 4 7 94 -1
58 A_17_ 1 -1 -1 3 1 4 7 58 -1
57 FC_1_ 1 -1 -1 3 1 4 7 57 -1
56 FC_0_ 1 -1 -1 3 1 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
63 CLK_030 1 -1 -1 2 0 7 63 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_21_ 1 -1 -1 1 4 93 -1
92 A_20_ 1 -1 -1 1 4 92 -1
84 A_23_ 1 -1 -1 1 4 84 -1
83 A_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A1 1 -1 -1 1 6 59 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
35 VPA 1 -1 -1 1 6 35 -1
29 DTACK 1 -1 -1 1 2 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 1 13 -1
10 CLK_000 1 -1 -1 1 1 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
135 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21
79 RW_000 5 358 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
68 A0 5 359 6 2 2 6 68 -1 3 0 21
70 RW 5 366 6 2 2 7 70 -1 2 0 21
97 DS_030 5 -1 0 2 0 3 97 -1 1 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 6 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 6 69 -1 1 0 21
65 E 5 363 6 0 65 -1 5 0 21
80 DSACK1 5 362 7 0 80 -1 4 0 21
34 VMA 5 364 3 0 34 -1 3 0 21
82 BGACK_030 5 361 7 0 82 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 360 3 0 28 -1 2 0 21
8 IPL_030_2_ 5 357 1 0 8 -1 2 0 21
7 IPL_030_0_ 5 356 1 0 7 -1 2 0 21
6 IPL_030_1_ 5 355 1 0 6 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
2 RESET 5 365 1 0 2 -1 1 0 21
361 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 2 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 3 7 0 1 3 4 5 6 7 -1 -1 1 0 21
365 RN_RESET 3 2 1 5 0 3 4 6 7 2 -1 1 0 21
317 inst_CLK_000_PE 3 -1 3 5 0 1 2 3 7 -1 -1 1 0 21
298 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21
353 SM_AMIGA_i_7_ 3 -1 2 4 1 3 5 7 -1 -1 8 0 21
296 SM_AMIGA_5_ 3 -1 1 4 1 2 5 7 -1 -1 3 0 21
319 inst_CLK_000_NE 3 -1 3 4 0 1 3 5 -1 -1 1 0 21
363 RN_E 3 65 6 3 2 3 6 65 -1 5 0 21
294 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
351 SM_AMIGA_2_ 3 -1 2 3 0 1 2 -1 -1 4 0 21
321 cpu_est_2_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
348 SM_AMIGA_1_ 3 -1 0 3 0 1 7 -1 -1 3 0 21
326 SM_AMIGA_6_ 3 -1 1 3 1 2 6 -1 -1 3 0 21
324 SM_AMIGA_0_ 3 -1 1 3 1 2 7 -1 -1 2 0 21
293 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 2 0 21
323 inst_CLK_000_NE_D0 3 -1 5 3 2 3 6 -1 -1 1 0 21
312 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
301 inst_AS_030_000_SYNC 3 -1 5 2 1 5 -1 -1 7 0 21
322 SM_AMIGA_3_ 3 -1 2 2 1 2 -1 -1 5 0 21
311 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 4 0 21
364 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21
352 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
349 SM_AMIGA_4_ 3 -1 1 2 1 2 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
325 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
316 inst_CLK_000_D0 3 -1 5 2 1 3 -1 -1 1 0 21
309 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 7 2 5 6 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 0 2 2 6 -1 -1 1 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
347 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
350 N_125_i_2 3 -1 1 1 2 -1 -1 6 0 21
362 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
359 RN_A0 3 68 6 1 6 68 -1 3 0 21
358 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
366 RN_RW 3 70 6 1 6 70 -1 2 0 21
360 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
357 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21
356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21
355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21
354 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
346 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
345 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21
344 CLK_000_N_SYNC_8_ 3 -1 1 1 0 -1 -1 1 0 21
343 CLK_000_N_SYNC_7_ 3 -1 0 1 1 -1 -1 1 0 21
342 CLK_000_N_SYNC_6_ 3 -1 5 1 0 -1 -1 1 0 21
341 CLK_000_N_SYNC_5_ 3 -1 5 1 5 -1 -1 1 0 21
340 CLK_000_N_SYNC_4_ 3 -1 0 1 5 -1 -1 1 0 21
339 CLK_000_N_SYNC_3_ 3 -1 5 1 0 -1 -1 1 0 21
338 CLK_000_N_SYNC_2_ 3 -1 1 1 5 -1 -1 1 0 21
337 CLK_000_N_SYNC_1_ 3 -1 1 1 1 -1 -1 1 0 21
336 CLK_000_N_SYNC_0_ 3 -1 1 1 1 -1 -1 1 0 21
335 CLK_000_P_SYNC_8_ 3 -1 6 1 0 -1 -1 1 0 21
334 CLK_000_P_SYNC_7_ 3 -1 4 1 6 -1 -1 1 0 21
333 CLK_000_P_SYNC_6_ 3 -1 5 1 4 -1 -1 1 0 21
332 CLK_000_P_SYNC_5_ 3 -1 3 1 5 -1 -1 1 0 21
331 CLK_000_P_SYNC_4_ 3 -1 3 1 3 -1 -1 1 0 21
330 CLK_000_P_SYNC_3_ 3 -1 2 1 3 -1 -1 1 0 21
329 CLK_000_P_SYNC_2_ 3 -1 6 1 2 -1 -1 1 0 21
328 CLK_000_P_SYNC_1_ 3 -1 6 1 6 -1 -1 1 0 21
327 CLK_000_P_SYNC_0_ 3 -1 1 1 6 -1 -1 1 0 21
320 CLK_000_N_SYNC_11_ 3 -1 7 1 3 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 0 1 3 -1 -1 1 0 21
315 inst_CLK_000_D1 3 -1 3 1 1 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
63 CLK_030 1 -1 -1 2 0 7 63 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_21_ 1 -1 -1 1 4 93 -1
92 A_20_ 1 -1 -1 1 4 92 -1
84 A_23_ 1 -1 -1 1 4 84 -1
83 A_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A1 1 -1 -1 1 5 59 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
35 VPA 1 -1 -1 1 0 35 -1
29 DTACK 1 -1 -1 1 6 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 3 13 -1
10 CLK_000 1 -1 -1 1 5 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
146 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 6 1 2 3 5 6 7 40 -1 1 0 21
79 RW_000 5 367 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 377 6 2 3 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
68 A0 5 368 6 1 0 68 -1 3 0 21
97 DS_030 5 -1 0 1 3 97 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
8 IPL_030_2_ 5 366 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 372 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 370 1 0 6 -1 10 0 21
65 E 5 374 6 0 65 -1 5 0 21
80 DSACK1 5 373 7 0 80 -1 4 0 21
34 VMA 5 375 3 0 34 -1 3 0 21
82 BGACK_030 5 371 7 0 82 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 369 3 0 28 -1 2 0 21
2 RESET 5 376 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
371 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 2 0 21
376 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
317 inst_CLK_000_PE 3 -1 2 6 0 1 2 3 5 7 -1 -1 1 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 1 6 0 3 4 5 6 7 -1 -1 1 0 21
296 SM_AMIGA_5_ 3 -1 1 5 1 3 5 6 7 -1 -1 3 0 21
298 inst_AS_030_D0 3 -1 7 5 3 4 5 6 7 -1 -1 1 0 21
319 inst_CLK_000_NE 3 -1 0 4 1 2 3 5 -1 -1 1 0 21
364 SM_AMIGA_i_7_ 3 -1 5 3 3 5 7 -1 -1 13 0 21
374 RN_E 3 65 6 3 2 3 6 65 -1 5 0 21
325 SM_AMIGA_3_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
294 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
321 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 4 0 21
361 SM_AMIGA_4_ 3 -1 3 3 2 3 5 -1 -1 3 0 21
329 SM_AMIGA_6_ 3 -1 5 3 0 1 5 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 0 3 0 6 7 -1 -1 3 0 21
293 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 2 0 21
326 inst_CLK_000_NE_D0 3 -1 5 3 2 3 6 -1 -1 1 0 21
316 inst_CLK_000_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21
312 inst_CLK_OUT_PRE_D 3 -1 1 3 1 6 7 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 7 3 0 5 6 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
334 RST_DLY_3_ 3 -1 1 2 1 2 -1 -1 6 0 21
333 RST_DLY_2_ 3 -1 2 2 1 2 -1 -1 5 0 21
362 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21
336 RST_DLY_5_ 3 -1 2 2 1 2 -1 -1 4 0 21
332 RST_DLY_1_ 3 -1 2 2 1 2 -1 -1 4 0 21
311 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 4 0 21
375 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21
360 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
337 RST_DLY_6_ 3 -1 2 2 1 2 -1 -1 3 0 21
331 RST_DLY_0_ 3 -1 2 2 1 2 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
338 RST_DLY_7_ 3 -1 2 2 1 2 -1 -1 2 0 21
335 RST_DLY_4_ 3 -1 1 2 1 2 -1 -1 2 1 21
328 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21
327 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21
309 inst_VPA_D 3 -1 6 2 2 3 -1 -1 1 0 21
372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
359 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
301 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 7 0 21
373 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
368 RN_A0 3 68 6 1 6 68 -1 3 0 21
367 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
363 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
377 RN_RW 3 70 6 1 6 70 -1 2 0 21
369 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
365 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
330 N_180_i 3 -1 2 1 5 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
358 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
357 CLK_000_N_SYNC_9_ 3 -1 4 1 7 -1 -1 1 0 21
356 CLK_000_N_SYNC_8_ 3 -1 3 1 4 -1 -1 1 0 21
355 CLK_000_N_SYNC_7_ 3 -1 6 1 3 -1 -1 1 0 21
354 CLK_000_N_SYNC_6_ 3 -1 0 1 6 -1 -1 1 0 21
353 CLK_000_N_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21
352 CLK_000_N_SYNC_4_ 3 -1 2 1 6 -1 -1 1 0 21
351 CLK_000_N_SYNC_3_ 3 -1 1 1 2 -1 -1 1 0 21
350 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21
349 CLK_000_N_SYNC_1_ 3 -1 2 1 1 -1 -1 1 0 21
348 CLK_000_N_SYNC_0_ 3 -1 5 1 2 -1 -1 1 0 21
347 CLK_000_P_SYNC_8_ 3 -1 5 1 2 -1 -1 1 0 21
346 CLK_000_P_SYNC_7_ 3 -1 3 1 5 -1 -1 1 0 21
345 CLK_000_P_SYNC_6_ 3 -1 5 1 3 -1 -1 1 0 21
344 CLK_000_P_SYNC_5_ 3 -1 6 1 5 -1 -1 1 0 21
343 CLK_000_P_SYNC_4_ 3 -1 1 1 6 -1 -1 1 0 21
342 CLK_000_P_SYNC_3_ 3 -1 6 1 1 -1 -1 1 0 21
341 CLK_000_P_SYNC_2_ 3 -1 6 1 6 -1 -1 1 0 21
340 CLK_000_P_SYNC_1_ 3 -1 6 1 6 -1 -1 1 0 21
339 CLK_000_P_SYNC_0_ 3 -1 5 1 6 -1 -1 1 0 21
324 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21
323 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21
322 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
320 CLK_000_N_SYNC_11_ 3 -1 7 1 0 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
315 inst_CLK_000_D1 3 -1 4 1 5 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 1 1 1 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 2 1 2 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 3 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 3 67 -1
63 CLK_030 1 -1 -1 2 0 7 63 -1
55 IPL_1_ 1 -1 -1 2 1 5 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_21_ 1 -1 -1 1 4 93 -1
92 A_20_ 1 -1 -1 1 4 92 -1
84 A_23_ 1 -1 -1 1 4 84 -1
83 A_22_ 1 -1 -1 1 4 83 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A1 1 -1 -1 1 0 59 -1
35 VPA 1 -1 -1 1 6 35 -1
29 DTACK 1 -1 -1 1 2 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 1 13 -1
10 CLK_000 1 -1 -1 1 4 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
146 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21
79 RW_000 5 367 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 377 6 2 5 7 70 -1 2 0 21
97 DS_030 5 -1 0 2 0 3 97 -1 1 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
68 A0 5 368 6 1 2 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
8 IPL_030_2_ 5 366 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 372 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 371 1 0 6 -1 10 0 21
65 E 5 374 6 0 65 -1 5 0 21
80 DSACK1 5 373 7 0 80 -1 4 0 21
34 VMA 5 375 3 0 34 -1 3 0 21
82 BGACK_030 5 370 7 0 82 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 369 3 0 28 -1 2 0 21
2 RESET 5 376 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 6 7 0 2 3 4 5 6 7 -1 -1 1 0 21
376 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
370 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
317 inst_CLK_000_PE 3 -1 5 5 0 1 3 5 7 -1 -1 1 0 21
298 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21
364 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21
319 inst_CLK_000_NE 3 -1 4 4 0 1 3 5 -1 -1 1 0 21
374 RN_E 3 65 6 3 3 5 6 65 -1 5 0 21
294 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 5 0 21
322 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
360 SM_AMIGA_1_ 3 -1 5 3 1 5 7 -1 -1 3 0 21
296 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
328 SM_AMIGA_0_ 3 -1 1 3 1 5 7 -1 -1 2 0 21
293 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
327 inst_CLK_000_NE_D0 3 -1 3 3 3 5 6 -1 -1 1 0 21
316 inst_CLK_000_D0 3 -1 3 3 3 5 6 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
301 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21
334 RST_DLY_3_ 3 -1 0 2 0 1 -1 -1 6 0 21
333 RST_DLY_2_ 3 -1 1 2 0 1 -1 -1 5 0 21
336 RST_DLY_5_ 3 -1 1 2 0 1 -1 -1 4 0 21
332 RST_DLY_1_ 3 -1 0 2 0 1 -1 -1 4 0 21
311 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 4 0 21
375 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
363 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
337 RST_DLY_6_ 3 -1 1 2 0 1 -1 -1 3 0 21
331 RST_DLY_0_ 3 -1 1 2 0 1 -1 -1 3 0 21
330 SM_AMIGA_6_ 3 -1 5 2 2 5 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
338 RST_DLY_7_ 3 -1 1 2 0 1 -1 -1 2 0 21
335 RST_DLY_4_ 3 -1 0 2 0 1 -1 -1 2 1 21
329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
315 inst_CLK_000_D1 3 -1 6 2 3 5 -1 -1 1 0 21
309 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21
372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
371 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
359 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
326 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
373 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
362 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
320 N_96_i 3 -1 5 1 5 -1 -1 4 0 21
368 RN_A0 3 68 6 1 6 68 -1 3 0 21
367 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
361 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
377 RN_RW 3 70 6 1 6 70 -1 2 0 21
369 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
365 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
358 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
357 CLK_000_N_SYNC_9_ 3 -1 6 1 7 -1 -1 1 0 21
356 CLK_000_N_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21
355 CLK_000_N_SYNC_7_ 3 -1 3 1 0 -1 -1 1 0 21
354 CLK_000_N_SYNC_6_ 3 -1 3 1 3 -1 -1 1 0 21
353 CLK_000_N_SYNC_5_ 3 -1 2 1 3 -1 -1 1 0 21
352 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
351 CLK_000_N_SYNC_3_ 3 -1 3 1 0 -1 -1 1 0 21
350 CLK_000_N_SYNC_2_ 3 -1 3 1 3 -1 -1 1 0 21
349 CLK_000_N_SYNC_1_ 3 -1 1 1 3 -1 -1 1 0 21
348 CLK_000_N_SYNC_0_ 3 -1 3 1 1 -1 -1 1 0 21
347 CLK_000_P_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21
346 CLK_000_P_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21
345 CLK_000_P_SYNC_6_ 3 -1 6 1 0 -1 -1 1 0 21
344 CLK_000_P_SYNC_5_ 3 -1 6 1 6 -1 -1 1 0 21
343 CLK_000_P_SYNC_4_ 3 -1 1 1 6 -1 -1 1 0 21
342 CLK_000_P_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21
341 CLK_000_P_SYNC_2_ 3 -1 6 1 1 -1 -1 1 0 21
340 CLK_000_P_SYNC_1_ 3 -1 6 1 6 -1 -1 1 0 21
339 CLK_000_P_SYNC_0_ 3 -1 3 1 6 -1 -1 1 0 21
325 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21
324 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21
323 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
321 CLK_000_N_SYNC_11_ 3 -1 7 1 4 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 0 1 5 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21
312 inst_CLK_OUT_PRE_D 3 -1 4 1 7 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 0 1 2 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
63 CLK_030 1 -1 -1 3 0 1 7 63 -1
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 6 67 -1
55 IPL_1_ 1 -1 -1 2 1 6 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_21_ 1 -1 -1 1 4 93 -1
92 A_20_ 1 -1 -1 1 4 92 -1
84 A_23_ 1 -1 -1 1 4 84 -1
83 A_22_ 1 -1 -1 1 4 83 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A1 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 1 35 -1
29 DTACK 1 -1 -1 1 2 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 6 13 -1
10 CLK_000 1 -1 -1 1 3 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
148 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
81 AS_030 5 -1 7 3 4 6 7 81 -1 1 0 21
79 RW_000 5 371 7 2 4 6 79 -1 3 0 21
70 RW 5 379 6 2 0 7 70 -1 2 0 21
68 A0 5 372 6 1 0 68 -1 3 0 21
97 DS_030 5 -1 0 1 3 97 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
31 UDS_000 5 -1 3 1 6 31 -1 1 0 21
30 LDS_000 5 -1 3 1 6 30 -1 1 0 21
8 IPL_030_2_ 5 368 1 0 8 -1 9 0 21
7 IPL_030_0_ 5 370 1 0 7 -1 9 0 21
6 IPL_030_1_ 5 369 1 0 6 -1 9 0 21
65 E 5 376 6 0 65 -1 5 0 21
80 DSACK1 5 375 7 0 80 -1 4 0 21
34 VMA 5 377 3 0 34 -1 3 0 21
82 BGACK_030 5 374 7 0 82 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 373 3 0 28 -1 2 0 21
2 RESET 5 378 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
378 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
374 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
318 inst_CLK_000_PE 3 -1 2 6 0 2 3 5 6 7 -1 -1 1 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 3 6 0 3 4 5 6 7 -1 -1 1 0 21
376 RN_E 3 65 6 5 1 2 3 5 6 65 -1 5 0 21
294 cpu_est_1_ 3 -1 1 5 1 2 3 5 6 -1 -1 5 0 21
323 cpu_est_2_ 3 -1 5 5 1 2 3 5 6 -1 -1 4 0 21
293 cpu_est_0_ 3 -1 1 5 1 2 3 5 6 -1 -1 2 0 21
325 inst_CLK_000_NE_D0 3 -1 4 4 1 2 5 6 -1 -1 1 0 21
317 inst_CLK_000_D0 3 -1 3 4 0 1 3 5 -1 -1 1 0 21
298 inst_AS_030_D0 3 -1 6 4 0 3 4 7 -1 -1 1 0 21
366 SM_AMIGA_i_7_ 3 -1 5 3 0 3 7 -1 -1 15 0 21
336 RST_DLY_4_ 3 -1 2 3 1 2 5 -1 -1 15 0 21
335 RST_DLY_3_ 3 -1 5 3 1 2 5 -1 -1 14 0 21
334 RST_DLY_2_ 3 -1 5 3 1 2 5 -1 -1 13 0 21
333 RST_DLY_1_ 3 -1 2 3 1 2 5 -1 -1 12 0 21
339 RST_DLY_7_ 3 -1 1 3 1 2 5 -1 -1 10 0 21
337 RST_DLY_5_ 3 -1 2 3 1 2 5 -1 -1 10 1 21
332 RST_DLY_0_ 3 -1 2 3 1 2 5 -1 -1 10 0 21
301 inst_AS_030_000_SYNC 3 -1 7 3 0 5 7 -1 -1 7 0 21
324 SM_AMIGA_3_ 3 -1 2 3 0 2 5 -1 -1 5 0 21
338 RST_DLY_6_ 3 -1 2 3 1 2 5 -1 -1 3 0 21
296 SM_AMIGA_5_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
322 inst_RST_D0 3 -1 7 3 1 2 5 -1 -1 1 0 21
320 inst_CLK_000_NE 3 -1 0 3 3 4 5 -1 -1 1 0 21
316 inst_CLK_000_D1 3 -1 5 3 0 1 5 -1 -1 1 0 21
309 inst_VPA_D 3 -1 6 3 2 3 5 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 6 3 3 6 7 -1 -1 1 0 21
304 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 9 0 21
303 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 7 0 21
364 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21
311 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 4 0 21
377 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21
365 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21
363 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21
362 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
331 SM_AMIGA_6_ 3 -1 0 2 0 5 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
326 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 2 0 6 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 3 2 2 3 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21
315 inst_CLK_OUT_PRE_50 3 -1 3 2 0 3 -1 -1 1 0 21
314 inst_DTACK_D0 3 -1 1 2 2 5 -1 -1 1 0 21
370 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21
369 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21
368 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21
361 inst_CLK_030_H 3 -1 6 1 6 -1 -1 8 0 21
375 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
372 RN_A0 3 68 6 1 6 68 -1 3 0 21
371 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
330 IPL_D0_2_ 3 -1 1 1 1 -1 -1 3 0 21
329 IPL_D0_1_ 3 -1 1 1 1 -1 -1 3 0 21
328 IPL_D0_0_ 3 -1 1 1 1 -1 -1 3 0 21
312 RESET_OUT_1_sqmuxa 3 -1 2 1 2 -1 -1 3 1 21
306 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21
379 RN_RW 3 70 6 1 6 70 -1 2 0 21
373 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
367 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
327 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21
360 pos_clk_un27_clk_000_ne_d0_i_n 3 -1 2 1 5 -1 -1 1 0 21
359 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
358 CLK_000_N_SYNC_9_ 3 -1 3 1 7 -1 -1 1 0 21
357 CLK_000_N_SYNC_8_ 3 -1 3 1 3 -1 -1 1 0 21
356 CLK_000_N_SYNC_7_ 3 -1 2 1 3 -1 -1 1 0 21
355 CLK_000_N_SYNC_6_ 3 -1 4 1 2 -1 -1 1 0 21
354 CLK_000_N_SYNC_5_ 3 -1 2 1 4 -1 -1 1 0 21
353 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
352 CLK_000_N_SYNC_3_ 3 -1 1 1 0 -1 -1 1 0 21
351 CLK_000_N_SYNC_2_ 3 -1 6 1 1 -1 -1 1 0 21
350 CLK_000_N_SYNC_1_ 3 -1 4 1 6 -1 -1 1 0 21
349 CLK_000_N_SYNC_0_ 3 -1 1 1 4 -1 -1 1 0 21
348 CLK_000_P_SYNC_8_ 3 -1 6 1 1 -1 -1 1 0 21
347 CLK_000_P_SYNC_7_ 3 -1 4 1 6 -1 -1 1 0 21
346 CLK_000_P_SYNC_6_ 3 -1 2 1 4 -1 -1 1 0 21
345 CLK_000_P_SYNC_5_ 3 -1 5 1 2 -1 -1 1 0 21
344 CLK_000_P_SYNC_4_ 3 -1 2 1 5 -1 -1 1 0 21
343 CLK_000_P_SYNC_3_ 3 -1 0 1 2 -1 -1 1 0 21
342 CLK_000_P_SYNC_2_ 3 -1 3 1 0 -1 -1 1 0 21
341 CLK_000_P_SYNC_1_ 3 -1 2 1 3 -1 -1 1 0 21
340 CLK_000_P_SYNC_0_ 3 -1 5 1 2 -1 -1 1 0 21
321 CLK_000_N_SYNC_11_ 3 -1 7 1 0 -1 -1 1 0 21
319 CLK_000_P_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21
313 inst_CLK_OUT_PRE_D 3 -1 0 1 7 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 3 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
63 CLK_030 1 -1 -1 3 1 6 7 63 -1
96 A_19_ 1 -1 -1 2 4 7 96 -1
95 A_16_ 1 -1 -1 2 4 7 95 -1
94 A_18_ 1 -1 -1 2 4 7 94 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
58 A_17_ 1 -1 -1 2 4 7 58 -1
57 FC_1_ 1 -1 -1 2 4 7 57 -1
56 FC_0_ 1 -1 -1 2 4 7 56 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_21_ 1 -1 -1 1 4 93 -1
92 A_20_ 1 -1 -1 1 4 92 -1
84 A_23_ 1 -1 -1 1 4 84 -1
83 A_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A1 1 -1 -1 1 3 59 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
35 VPA 1 -1 -1 1 6 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 3 13 -1
10 CLK_000 1 -1 -1 1 3 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
147 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 2 5 6 7 40 -1 1 0 21
79 RW_000 5 368 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 376 6 2 2 7 70 -1 2 0 21
97 DS_030 5 -1 0 2 0 3 97 -1 1 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
68 A0 5 369 6 1 0 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
8 IPL_030_2_ 5 367 1 0 8 -1 9 0 21
7 IPL_030_0_ 5 378 1 0 7 -1 9 0 21
6 IPL_030_1_ 5 377 1 0 6 -1 9 0 21
65 E 5 373 6 0 65 -1 5 0 21
80 DSACK1 5 372 7 0 80 -1 4 0 21
34 VMA 5 374 3 0 34 -1 3 0 21
82 BGACK_030 5 371 7 0 82 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 370 3 0 28 -1 2 0 21
2 RESET 5 375 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
371 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 2 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21
375 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
298 inst_AS_030_D0 3 -1 7 6 2 3 4 5 6 7 -1 -1 1 0 21
317 inst_CLK_000_PE 3 -1 6 5 0 2 3 5 7 -1 -1 1 0 21
365 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21
296 SM_AMIGA_5_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21
324 inst_CLK_000_NE_D0 3 -1 5 4 1 2 5 6 -1 -1 1 0 21
316 inst_CLK_000_D0 3 -1 3 4 1 2 3 6 -1 -1 1 0 21
373 RN_E 3 65 6 3 3 5 6 65 -1 5 0 21
294 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 5 0 21
322 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
360 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
330 SM_AMIGA_6_ 3 -1 2 3 0 2 5 -1 -1 3 0 21
325 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21
293 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
315 inst_CLK_000_D1 3 -1 6 3 1 2 3 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 3 3 0 5 6 -1 -1 1 0 21
335 RST_DLY_4_ 3 -1 1 2 1 2 -1 -1 9 0 21
334 RST_DLY_3_ 3 -1 2 2 1 2 -1 -1 8 0 21
336 RST_DLY_5_ 3 -1 2 2 1 2 -1 -1 7 1 21
333 RST_DLY_2_ 3 -1 2 2 1 2 -1 -1 7 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
301 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21
332 RST_DLY_1_ 3 -1 1 2 1 2 -1 -1 6 0 21
338 RST_DLY_7_ 3 -1 1 2 1 2 -1 -1 5 0 21
331 RST_DLY_0_ 3 -1 1 2 1 2 -1 -1 5 0 21
323 SM_AMIGA_3_ 3 -1 5 2 2 5 -1 -1 5 0 21
362 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 4 0 21
337 RST_DLY_6_ 3 -1 2 2 1 2 -1 -1 4 1 21
311 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 4 0 21
374 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
363 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
361 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
326 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21
321 inst_RST_D0 3 -1 7 2 1 2 -1 -1 1 0 21
319 inst_CLK_000_NE 3 -1 3 2 3 5 -1 -1 1 0 21
309 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21
378 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21
377 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21
367 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
359 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
372 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
364 N_292_i 3 -1 2 1 5 -1 -1 4 0 21
369 RN_A0 3 68 6 1 6 68 -1 3 0 21
368 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
329 IPL_D0_2_ 3 -1 1 1 1 -1 -1 3 0 21
328 IPL_D0_1_ 3 -1 1 1 1 -1 -1 3 0 21
327 IPL_D0_0_ 3 -1 1 1 1 -1 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
376 RN_RW 3 70 6 1 6 70 -1 2 0 21
370 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
366 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
358 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
357 CLK_000_N_SYNC_9_ 3 -1 6 1 7 -1 -1 1 0 21
356 CLK_000_N_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21
355 CLK_000_N_SYNC_7_ 3 -1 3 1 6 -1 -1 1 0 21
354 CLK_000_N_SYNC_6_ 3 -1 3 1 3 -1 -1 1 0 21
353 CLK_000_N_SYNC_5_ 3 -1 0 1 3 -1 -1 1 0 21
352 CLK_000_N_SYNC_4_ 3 -1 6 1 0 -1 -1 1 0 21
351 CLK_000_N_SYNC_3_ 3 -1 6 1 6 -1 -1 1 0 21
350 CLK_000_N_SYNC_2_ 3 -1 4 1 6 -1 -1 1 0 21
349 CLK_000_N_SYNC_1_ 3 -1 3 1 4 -1 -1 1 0 21
348 CLK_000_N_SYNC_0_ 3 -1 3 1 3 -1 -1 1 0 21
347 CLK_000_P_SYNC_8_ 3 -1 1 1 3 -1 -1 1 0 21
346 CLK_000_P_SYNC_7_ 3 -1 0 1 1 -1 -1 1 0 21
345 CLK_000_P_SYNC_6_ 3 -1 4 1 0 -1 -1 1 0 21
344 CLK_000_P_SYNC_5_ 3 -1 1 1 4 -1 -1 1 0 21
343 CLK_000_P_SYNC_4_ 3 -1 6 1 1 -1 -1 1 0 21
342 CLK_000_P_SYNC_3_ 3 -1 1 1 6 -1 -1 1 0 21
341 CLK_000_P_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21
340 CLK_000_P_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21
339 CLK_000_P_SYNC_0_ 3 -1 3 1 0 -1 -1 1 0 21
320 CLK_000_N_SYNC_11_ 3 -1 7 1 3 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 3 1 6 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21
312 inst_CLK_OUT_PRE_D 3 -1 4 1 7 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 0 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
63 CLK_030 1 -1 -1 3 0 1 7 63 -1
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
59 A1 1 -1 -1 2 0 6 59 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_21_ 1 -1 -1 1 4 93 -1
92 A_20_ 1 -1 -1 1 4 92 -1
84 A_23_ 1 -1 -1 1 4 84 -1
83 A_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 0 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 0 13 -1
10 CLK_000 1 -1 -1 1 3 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
146 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
79 RW_000 5 367 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21
68 A0 5 368 6 2 3 5 68 -1 3 0 21
70 RW 5 377 6 2 2 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
97 DS_030 5 -1 0 1 3 97 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21
30 LDS_000 5 -1 3 1 0 30 -1 1 0 21
8 IPL_030_2_ 5 366 1 0 8 -1 9 0 21
7 IPL_030_0_ 5 375 1 0 7 -1 9 0 21
6 IPL_030_1_ 5 373 1 0 6 -1 9 0 21
65 E 5 372 6 0 65 -1 5 0 21
80 DSACK1 5 371 7 0 80 -1 4 0 21
34 VMA 5 374 3 0 34 -1 3 0 21
82 BGACK_030 5 370 7 0 82 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 369 3 0 28 -1 2 0 21
2 RESET 5 376 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
376 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
370 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 0 6 0 2 3 4 6 7 -1 -1 1 0 21
317 inst_CLK_000_PE 3 -1 5 5 0 2 3 5 7 -1 -1 1 0 21
298 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21
323 inst_CLK_000_NE_D0 3 -1 3 4 1 3 5 6 -1 -1 1 0 21
364 SM_AMIGA_i_7_ 3 -1 5 3 2 3 7 -1 -1 14 0 21
372 RN_E 3 65 6 3 3 5 6 65 -1 5 0 21
294 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 5 0 21
321 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21
360 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
329 SM_AMIGA_6_ 3 -1 2 3 2 3 5 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 0 3 0 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 0 3 0 6 7 -1 -1 3 0 21
296 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
324 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21
293 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 2 0 21
319 inst_CLK_000_NE 3 -1 4 3 2 3 5 -1 -1 1 0 21
316 inst_CLK_000_D0 3 -1 1 3 1 2 3 -1 -1 1 0 21
315 inst_CLK_000_D1 3 -1 3 3 1 2 3 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 7 3 0 2 6 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
334 RST_DLY_3_ 3 -1 6 2 1 6 -1 -1 6 0 21
333 RST_DLY_2_ 3 -1 6 2 1 6 -1 -1 5 0 21
322 SM_AMIGA_3_ 3 -1 5 2 2 5 -1 -1 5 0 21
362 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 4 0 21
336 RST_DLY_5_ 3 -1 6 2 1 6 -1 -1 4 0 21
332 RST_DLY_1_ 3 -1 1 2 1 6 -1 -1 4 0 21
311 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 4 0 21
374 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
363 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
361 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21
337 RST_DLY_6_ 3 -1 6 2 1 6 -1 -1 3 0 21
331 RST_DLY_0_ 3 -1 1 2 1 6 -1 -1 3 0 21
338 RST_DLY_7_ 3 -1 6 2 1 6 -1 -1 2 0 21
335 RST_DLY_4_ 3 -1 6 2 1 6 -1 -1 2 1 21
325 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21
314 inst_CLK_OUT_PRE_50 3 -1 1 2 0 1 -1 -1 1 0 21
309 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 3 2 3 5 -1 -1 1 0 21
375 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21
373 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21
366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
359 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
301 inst_AS_030_000_SYNC 3 -1 2 1 2 -1 -1 7 0 21
371 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
330 N_168_i 3 -1 2 1 5 -1 -1 4 0 21
368 RN_A0 3 68 6 1 6 68 -1 3 0 21
367 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
328 IPL_D0_2_ 3 -1 1 1 1 -1 -1 3 0 21
327 IPL_D0_1_ 3 -1 1 1 1 -1 -1 3 0 21
326 IPL_D0_0_ 3 -1 1 1 1 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
377 RN_RW 3 70 6 1 6 70 -1 2 0 21
369 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
365 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
358 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
357 CLK_000_N_SYNC_9_ 3 -1 2 1 7 -1 -1 1 0 21
356 CLK_000_N_SYNC_8_ 3 -1 3 1 2 -1 -1 1 0 21
355 CLK_000_N_SYNC_7_ 3 -1 1 1 3 -1 -1 1 0 21
354 CLK_000_N_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21
353 CLK_000_N_SYNC_5_ 3 -1 4 1 0 -1 -1 1 0 21
352 CLK_000_N_SYNC_4_ 3 -1 6 1 4 -1 -1 1 0 21
351 CLK_000_N_SYNC_3_ 3 -1 1 1 6 -1 -1 1 0 21
350 CLK_000_N_SYNC_2_ 3 -1 6 1 1 -1 -1 1 0 21
349 CLK_000_N_SYNC_1_ 3 -1 4 1 6 -1 -1 1 0 21
348 CLK_000_N_SYNC_0_ 3 -1 3 1 4 -1 -1 1 0 21
347 CLK_000_P_SYNC_8_ 3 -1 6 1 2 -1 -1 1 0 21
346 CLK_000_P_SYNC_7_ 3 -1 5 1 6 -1 -1 1 0 21
345 CLK_000_P_SYNC_6_ 3 -1 0 1 5 -1 -1 1 0 21
344 CLK_000_P_SYNC_5_ 3 -1 3 1 0 -1 -1 1 0 21
343 CLK_000_P_SYNC_4_ 3 -1 1 1 3 -1 -1 1 0 21
342 CLK_000_P_SYNC_3_ 3 -1 0 1 1 -1 -1 1 0 21
341 CLK_000_P_SYNC_2_ 3 -1 1 1 0 -1 -1 1 0 21
340 CLK_000_P_SYNC_1_ 3 -1 6 1 1 -1 -1 1 0 21
339 CLK_000_P_SYNC_0_ 3 -1 3 1 6 -1 -1 1 0 21
320 CLK_000_N_SYNC_11_ 3 -1 7 1 4 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 2 1 5 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 5 1 5 -1 -1 1 0 21
312 inst_CLK_OUT_PRE_D 3 -1 0 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
63 CLK_030 1 -1 -1 3 0 1 7 63 -1
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_21_ 1 -1 -1 1 4 93 -1
92 A_20_ 1 -1 -1 1 4 92 -1
84 A_23_ 1 -1 -1 1 4 84 -1
83 A_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A1 1 -1 -1 1 0 59 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
35 VPA 1 -1 -1 1 6 35 -1
29 DTACK 1 -1 -1 1 5 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 0 13 -1
10 CLK_000 1 -1 -1 1 1 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
146 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 2 5 6 7 40 -1 1 0 21
79 RW_000 5 367 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 377 6 2 6 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
68 A0 5 368 6 1 3 68 -1 3 0 21
97 DS_030 5 -1 0 1 3 97 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21
30 LDS_000 5 -1 3 1 0 30 -1 1 0 21
8 IPL_030_2_ 5 366 1 0 8 -1 9 0 21
7 IPL_030_0_ 5 375 1 0 7 -1 9 0 21
6 IPL_030_1_ 5 373 1 0 6 -1 9 0 21
65 E 5 372 6 0 65 -1 5 0 21
80 DSACK1 5 371 7 0 80 -1 4 0 21
34 VMA 5 374 3 0 34 -1 3 0 21
82 BGACK_030 5 370 7 0 82 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 369 3 0 28 -1 2 0 21
2 RESET 5 376 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
370 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 2 0 21
376 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 2 6 0 3 4 5 6 7 -1 -1 1 0 21
319 inst_CLK_000_NE 3 -1 6 5 0 1 2 3 5 -1 -1 1 0 21
317 inst_CLK_000_PE 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21
298 inst_AS_030_D0 3 -1 7 5 3 4 5 6 7 -1 -1 1 0 21
296 SM_AMIGA_5_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21
364 SM_AMIGA_i_7_ 3 -1 5 3 3 5 7 -1 -1 13 0 21
333 RST_DLY_3_ 3 -1 2 3 0 1 2 -1 -1 6 0 21
372 RN_E 3 65 6 3 2 3 6 65 -1 5 0 21
332 RST_DLY_2_ 3 -1 0 3 0 1 2 -1 -1 5 0 21
322 SM_AMIGA_3_ 3 -1 2 3 2 5 6 -1 -1 5 0 21
294 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 5 0 21
335 RST_DLY_5_ 3 -1 2 3 0 1 2 -1 -1 4 0 21
331 RST_DLY_1_ 3 -1 0 3 0 1 2 -1 -1 4 0 21
321 cpu_est_2_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
336 RST_DLY_6_ 3 -1 2 3 0 1 2 -1 -1 3 0 21
330 RST_DLY_0_ 3 -1 0 3 0 1 2 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 0 3 0 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 0 3 0 6 7 -1 -1 3 0 21
337 RST_DLY_7_ 3 -1 0 3 0 1 2 -1 -1 2 0 21
334 RST_DLY_4_ 3 -1 0 3 0 1 2 -1 -1 2 1 21
293 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 2 0 21
316 inst_CLK_000_D0 3 -1 5 3 1 3 5 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 7 3 0 5 6 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
362 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21
374 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21
363 inst_DS_000_ENABLE 3 -1 6 2 3 6 -1 -1 3 0 21
361 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21
360 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
329 SM_AMIGA_6_ 3 -1 5 2 3 5 -1 -1 3 0 21
325 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21
324 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21
323 inst_CLK_000_NE_D0 3 -1 5 2 2 6 -1 -1 1 0 21
315 inst_CLK_000_D1 3 -1 3 2 1 5 -1 -1 1 0 21
309 inst_VPA_D 3 -1 1 2 2 3 -1 -1 1 0 21
375 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21
373 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21
366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
359 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
301 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 7 0 21
371 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
311 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 4 0 21
368 RN_A0 3 68 6 1 6 68 -1 3 0 21
367 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
328 IPL_D0_2_ 3 -1 1 1 1 -1 -1 3 0 21
327 IPL_D0_1_ 3 -1 1 1 1 -1 -1 3 0 21
326 IPL_D0_0_ 3 -1 1 1 1 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
377 RN_RW 3 70 6 1 6 70 -1 2 0 21
369 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
365 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
341 N_125_i 3 -1 2 1 5 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
358 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
357 CLK_000_N_SYNC_9_ 3 -1 6 1 7 -1 -1 1 0 21
356 CLK_000_N_SYNC_8_ 3 -1 2 1 6 -1 -1 1 0 21
355 CLK_000_N_SYNC_7_ 3 -1 1 1 2 -1 -1 1 0 21
354 CLK_000_N_SYNC_6_ 3 -1 4 1 1 -1 -1 1 0 21
353 CLK_000_N_SYNC_5_ 3 -1 1 1 4 -1 -1 1 0 21
352 CLK_000_N_SYNC_4_ 3 -1 6 1 1 -1 -1 1 0 21
351 CLK_000_N_SYNC_3_ 3 -1 6 1 6 -1 -1 1 0 21
350 CLK_000_N_SYNC_2_ 3 -1 0 1 6 -1 -1 1 0 21
349 CLK_000_N_SYNC_1_ 3 -1 0 1 0 -1 -1 1 0 21
348 CLK_000_N_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21
347 CLK_000_P_SYNC_8_ 3 -1 1 1 3 -1 -1 1 0 21
346 CLK_000_P_SYNC_7_ 3 -1 6 1 1 -1 -1 1 0 21
345 CLK_000_P_SYNC_6_ 3 -1 2 1 6 -1 -1 1 0 21
344 CLK_000_P_SYNC_5_ 3 -1 1 1 2 -1 -1 1 0 21
343 CLK_000_P_SYNC_4_ 3 -1 2 1 1 -1 -1 1 0 21
342 CLK_000_P_SYNC_3_ 3 -1 3 1 2 -1 -1 1 0 21
340 CLK_000_P_SYNC_2_ 3 -1 3 1 3 -1 -1 1 0 21
339 CLK_000_P_SYNC_1_ 3 -1 6 1 3 -1 -1 1 0 21
338 CLK_000_P_SYNC_0_ 3 -1 1 1 6 -1 -1 1 0 21
320 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 3 1 3 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 1 1 2 -1 -1 1 0 21
312 inst_CLK_OUT_PRE_D 3 -1 4 1 7 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 3 1 3 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
63 CLK_030 1 -1 -1 3 0 1 7 63 -1
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_21_ 1 -1 -1 1 4 93 -1
92 A_20_ 1 -1 -1 1 4 92 -1
84 A_23_ 1 -1 -1 1 4 84 -1
83 A_22_ 1 -1 -1 1 4 83 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A1 1 -1 -1 1 5 59 -1
55 IPL_1_ 1 -1 -1 1 1 55 -1
35 VPA 1 -1 -1 1 1 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 2 13 -1
10 CLK_000 1 -1 -1 1 5 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
146 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21
79 RW_000 5 367 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 377 6 2 5 7 70 -1 2 0 21
97 DS_030 5 -1 0 2 0 3 97 -1 1 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
68 A0 5 368 6 1 2 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
8 IPL_030_2_ 5 366 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 372 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 371 1 0 6 -1 10 0 21
65 E 5 374 6 0 65 -1 5 0 21
80 DSACK1 5 373 7 0 80 -1 4 0 21
34 VMA 5 375 3 0 34 -1 3 0 21
82 BGACK_030 5 370 7 0 82 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 369 3 0 28 -1 2 0 21
2 RESET 5 376 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 6 7 0 2 3 4 5 6 7 -1 -1 1 0 21
376 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
370 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
317 inst_CLK_000_PE 3 -1 5 5 0 1 3 5 7 -1 -1 1 0 21
298 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21
364 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21
319 inst_CLK_000_NE 3 -1 4 4 0 1 3 5 -1 -1 1 0 21
374 RN_E 3 65 6 3 3 5 6 65 -1 5 0 21
294 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 5 0 21
322 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
360 SM_AMIGA_1_ 3 -1 5 3 1 5 7 -1 -1 3 0 21
296 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
328 SM_AMIGA_0_ 3 -1 1 3 1 5 7 -1 -1 2 0 21
293 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
327 inst_CLK_000_NE_D0 3 -1 3 3 3 5 6 -1 -1 1 0 21
316 inst_CLK_000_D0 3 -1 3 3 3 5 6 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
301 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21
334 RST_DLY_3_ 3 -1 0 2 0 1 -1 -1 6 0 21
333 RST_DLY_2_ 3 -1 1 2 0 1 -1 -1 5 0 21
336 RST_DLY_5_ 3 -1 1 2 0 1 -1 -1 4 0 21
332 RST_DLY_1_ 3 -1 0 2 0 1 -1 -1 4 0 21
311 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 4 0 21
375 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
363 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
337 RST_DLY_6_ 3 -1 1 2 0 1 -1 -1 3 0 21
331 RST_DLY_0_ 3 -1 1 2 0 1 -1 -1 3 0 21
330 SM_AMIGA_6_ 3 -1 5 2 2 5 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
338 RST_DLY_7_ 3 -1 1 2 0 1 -1 -1 2 0 21
335 RST_DLY_4_ 3 -1 0 2 0 1 -1 -1 2 1 21
329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
315 inst_CLK_000_D1 3 -1 6 2 3 5 -1 -1 1 0 21
309 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21
372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
371 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
359 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
326 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
373 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
362 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
320 N_96_i 3 -1 5 1 5 -1 -1 4 0 21
368 RN_A0 3 68 6 1 6 68 -1 3 0 21
367 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
361 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
377 RN_RW 3 70 6 1 6 70 -1 2 0 21
369 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
365 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
358 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
357 CLK_000_N_SYNC_9_ 3 -1 6 1 7 -1 -1 1 0 21
356 CLK_000_N_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21
355 CLK_000_N_SYNC_7_ 3 -1 3 1 0 -1 -1 1 0 21
354 CLK_000_N_SYNC_6_ 3 -1 3 1 3 -1 -1 1 0 21
353 CLK_000_N_SYNC_5_ 3 -1 2 1 3 -1 -1 1 0 21
352 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
351 CLK_000_N_SYNC_3_ 3 -1 3 1 0 -1 -1 1 0 21
350 CLK_000_N_SYNC_2_ 3 -1 3 1 3 -1 -1 1 0 21
349 CLK_000_N_SYNC_1_ 3 -1 1 1 3 -1 -1 1 0 21
348 CLK_000_N_SYNC_0_ 3 -1 3 1 1 -1 -1 1 0 21
347 CLK_000_P_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21
346 CLK_000_P_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21
345 CLK_000_P_SYNC_6_ 3 -1 6 1 0 -1 -1 1 0 21
344 CLK_000_P_SYNC_5_ 3 -1 6 1 6 -1 -1 1 0 21
343 CLK_000_P_SYNC_4_ 3 -1 1 1 6 -1 -1 1 0 21
342 CLK_000_P_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21
341 CLK_000_P_SYNC_2_ 3 -1 6 1 1 -1 -1 1 0 21
340 CLK_000_P_SYNC_1_ 3 -1 6 1 6 -1 -1 1 0 21
339 CLK_000_P_SYNC_0_ 3 -1 3 1 6 -1 -1 1 0 21
325 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21
324 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21
323 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
321 CLK_000_N_SYNC_11_ 3 -1 7 1 4 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 0 1 5 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21
312 inst_CLK_OUT_PRE_D 3 -1 4 1 7 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 0 1 2 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
63 CLK_030 1 -1 -1 3 0 1 7 63 -1
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 6 67 -1
55 IPL_1_ 1 -1 -1 2 1 6 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_21_ 1 -1 -1 1 4 93 -1
92 A_20_ 1 -1 -1 1 4 92 -1
84 A_23_ 1 -1 -1 1 4 84 -1
83 A_22_ 1 -1 -1 1 4 83 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A1 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 1 35 -1
29 DTACK 1 -1 -1 1 2 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 6 13 -1
10 CLK_000 1 -1 -1 1 3 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
146 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21
79 RW_000 5 367 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 377 6 2 5 7 70 -1 2 0 21
97 DS_030 5 -1 0 2 0 3 97 -1 1 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
68 A0 5 368 6 1 2 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
8 IPL_030_2_ 5 366 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 372 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 371 1 0 6 -1 10 0 21
65 E 5 374 6 0 65 -1 5 0 21
80 DSACK1 5 373 7 0 80 -1 4 0 21
34 VMA 5 375 3 0 34 -1 3 0 21
82 BGACK_030 5 370 7 0 82 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 369 3 0 28 -1 2 0 21
2 RESET 5 376 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 6 7 0 2 3 4 5 6 7 -1 -1 1 0 21
376 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
370 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
317 inst_CLK_000_PE 3 -1 5 5 0 1 3 5 7 -1 -1 1 0 21
298 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21
364 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21
319 inst_CLK_000_NE 3 -1 4 4 0 1 3 5 -1 -1 1 0 21
374 RN_E 3 65 6 3 3 5 6 65 -1 5 0 21
294 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 5 0 21
322 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
360 SM_AMIGA_1_ 3 -1 5 3 1 5 7 -1 -1 3 0 21
296 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
328 SM_AMIGA_0_ 3 -1 1 3 1 5 7 -1 -1 2 0 21
293 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
327 inst_CLK_000_NE_D0 3 -1 3 3 3 5 6 -1 -1 1 0 21
316 inst_CLK_000_D0 3 -1 3 3 3 5 6 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
301 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21
334 RST_DLY_3_ 3 -1 0 2 0 1 -1 -1 6 0 21
333 RST_DLY_2_ 3 -1 1 2 0 1 -1 -1 5 0 21
336 RST_DLY_5_ 3 -1 1 2 0 1 -1 -1 4 0 21
332 RST_DLY_1_ 3 -1 0 2 0 1 -1 -1 4 0 21
311 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 4 0 21
375 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
363 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
337 RST_DLY_6_ 3 -1 1 2 0 1 -1 -1 3 0 21
331 RST_DLY_0_ 3 -1 1 2 0 1 -1 -1 3 0 21
330 SM_AMIGA_6_ 3 -1 5 2 2 5 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
338 RST_DLY_7_ 3 -1 1 2 0 1 -1 -1 2 0 21
335 RST_DLY_4_ 3 -1 0 2 0 1 -1 -1 2 1 21
329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
315 inst_CLK_000_D1 3 -1 6 2 3 5 -1 -1 1 0 21
309 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21
372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
371 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
359 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
326 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
373 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
362 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
320 N_96_i 3 -1 5 1 5 -1 -1 4 0 21
368 RN_A0 3 68 6 1 6 68 -1 3 0 21
367 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
361 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
377 RN_RW 3 70 6 1 6 70 -1 2 0 21
369 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
365 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
358 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
357 CLK_000_N_SYNC_9_ 3 -1 6 1 7 -1 -1 1 0 21
356 CLK_000_N_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21
355 CLK_000_N_SYNC_7_ 3 -1 3 1 0 -1 -1 1 0 21
354 CLK_000_N_SYNC_6_ 3 -1 3 1 3 -1 -1 1 0 21
353 CLK_000_N_SYNC_5_ 3 -1 2 1 3 -1 -1 1 0 21
352 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
351 CLK_000_N_SYNC_3_ 3 -1 3 1 0 -1 -1 1 0 21
350 CLK_000_N_SYNC_2_ 3 -1 3 1 3 -1 -1 1 0 21
349 CLK_000_N_SYNC_1_ 3 -1 1 1 3 -1 -1 1 0 21
348 CLK_000_N_SYNC_0_ 3 -1 3 1 1 -1 -1 1 0 21
347 CLK_000_P_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21
346 CLK_000_P_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21
345 CLK_000_P_SYNC_6_ 3 -1 6 1 0 -1 -1 1 0 21
344 CLK_000_P_SYNC_5_ 3 -1 6 1 6 -1 -1 1 0 21
343 CLK_000_P_SYNC_4_ 3 -1 1 1 6 -1 -1 1 0 21
342 CLK_000_P_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21
341 CLK_000_P_SYNC_2_ 3 -1 6 1 1 -1 -1 1 0 21
340 CLK_000_P_SYNC_1_ 3 -1 6 1 6 -1 -1 1 0 21
339 CLK_000_P_SYNC_0_ 3 -1 3 1 6 -1 -1 1 0 21
325 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21
324 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21
323 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
321 CLK_000_N_SYNC_11_ 3 -1 7 1 4 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 0 1 5 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21
312 inst_CLK_OUT_PRE_D 3 -1 4 1 7 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 0 1 2 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
63 CLK_030 1 -1 -1 3 0 1 7 63 -1
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 6 67 -1
55 IPL_1_ 1 -1 -1 2 1 6 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_21_ 1 -1 -1 1 4 93 -1
92 A_20_ 1 -1 -1 1 4 92 -1
84 A_23_ 1 -1 -1 1 4 84 -1
83 A_22_ 1 -1 -1 1 4 83 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A1 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 1 35 -1
29 DTACK 1 -1 -1 1 2 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 6 13 -1
10 CLK_000 1 -1 -1 1 3 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
146 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21
79 RW_000 5 367 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 377 6 2 5 7 70 -1 2 0 21
97 DS_030 5 -1 0 2 0 3 97 -1 1 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
68 A0 5 368 6 1 2 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
8 IPL_030_2_ 5 366 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 372 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 371 1 0 6 -1 10 0 21
65 E 5 374 6 0 65 -1 5 0 21
80 DSACK1 5 373 7 0 80 -1 4 0 21
34 VMA 5 375 3 0 34 -1 3 0 21
82 BGACK_030 5 370 7 0 82 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 369 3 0 28 -1 2 0 21
2 RESET 5 376 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 6 7 0 2 3 4 5 6 7 -1 -1 1 0 21
376 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
370 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
317 inst_CLK_000_PE 3 -1 5 5 0 1 3 5 7 -1 -1 1 0 21
298 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21
364 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21
319 inst_CLK_000_NE 3 -1 4 4 0 1 3 5 -1 -1 1 0 21
374 RN_E 3 65 6 3 3 5 6 65 -1 5 0 21
294 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 5 0 21
322 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
360 SM_AMIGA_1_ 3 -1 5 3 1 5 7 -1 -1 3 0 21
296 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
328 SM_AMIGA_0_ 3 -1 1 3 1 5 7 -1 -1 2 0 21
293 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
327 inst_CLK_000_NE_D0 3 -1 3 3 3 5 6 -1 -1 1 0 21
316 inst_CLK_000_D0 3 -1 3 3 3 5 6 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
301 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21
334 RST_DLY_3_ 3 -1 0 2 0 1 -1 -1 6 0 21
333 RST_DLY_2_ 3 -1 1 2 0 1 -1 -1 5 0 21
336 RST_DLY_5_ 3 -1 1 2 0 1 -1 -1 4 0 21
332 RST_DLY_1_ 3 -1 0 2 0 1 -1 -1 4 0 21
311 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 4 0 21
375 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
363 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
337 RST_DLY_6_ 3 -1 1 2 0 1 -1 -1 3 0 21
331 RST_DLY_0_ 3 -1 1 2 0 1 -1 -1 3 0 21
330 SM_AMIGA_6_ 3 -1 5 2 2 5 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
338 RST_DLY_7_ 3 -1 1 2 0 1 -1 -1 2 0 21
335 RST_DLY_4_ 3 -1 0 2 0 1 -1 -1 2 1 21
329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
315 inst_CLK_000_D1 3 -1 6 2 3 5 -1 -1 1 0 21
309 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21
372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
371 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
359 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
326 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
373 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
362 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
320 N_96_i 3 -1 5 1 5 -1 -1 4 0 21
368 RN_A0 3 68 6 1 6 68 -1 3 0 21
367 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
361 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
377 RN_RW 3 70 6 1 6 70 -1 2 0 21
369 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
365 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
358 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
357 CLK_000_N_SYNC_9_ 3 -1 6 1 7 -1 -1 1 0 21
356 CLK_000_N_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21
355 CLK_000_N_SYNC_7_ 3 -1 3 1 0 -1 -1 1 0 21
354 CLK_000_N_SYNC_6_ 3 -1 3 1 3 -1 -1 1 0 21
353 CLK_000_N_SYNC_5_ 3 -1 2 1 3 -1 -1 1 0 21
352 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
351 CLK_000_N_SYNC_3_ 3 -1 3 1 0 -1 -1 1 0 21
350 CLK_000_N_SYNC_2_ 3 -1 3 1 3 -1 -1 1 0 21
349 CLK_000_N_SYNC_1_ 3 -1 1 1 3 -1 -1 1 0 21
348 CLK_000_N_SYNC_0_ 3 -1 3 1 1 -1 -1 1 0 21
347 CLK_000_P_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21
346 CLK_000_P_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21
345 CLK_000_P_SYNC_6_ 3 -1 6 1 0 -1 -1 1 0 21
344 CLK_000_P_SYNC_5_ 3 -1 6 1 6 -1 -1 1 0 21
343 CLK_000_P_SYNC_4_ 3 -1 1 1 6 -1 -1 1 0 21
342 CLK_000_P_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21
341 CLK_000_P_SYNC_2_ 3 -1 6 1 1 -1 -1 1 0 21
340 CLK_000_P_SYNC_1_ 3 -1 6 1 6 -1 -1 1 0 21
339 CLK_000_P_SYNC_0_ 3 -1 3 1 6 -1 -1 1 0 21
325 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21
324 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21
323 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
321 CLK_000_N_SYNC_11_ 3 -1 7 1 4 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 0 1 5 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21
312 inst_CLK_OUT_PRE_D 3 -1 4 1 7 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 0 1 2 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
63 CLK_030 1 -1 -1 3 0 1 7 63 -1
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 6 67 -1
55 IPL_1_ 1 -1 -1 2 1 6 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_21_ 1 -1 -1 1 4 93 -1
92 A_20_ 1 -1 -1 1 4 92 -1
84 A_23_ 1 -1 -1 1 4 84 -1
83 A_22_ 1 -1 -1 1 4 83 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A1 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 1 35 -1
29 DTACK 1 -1 -1 1 2 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 6 13 -1
10 CLK_000 1 -1 -1 1 3 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
146 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21
79 RW_000 5 367 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 377 6 2 5 7 70 -1 2 0 21
97 DS_030 5 -1 0 2 0 3 97 -1 1 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
68 A0 5 368 6 1 2 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
8 IPL_030_2_ 5 366 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 372 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 371 1 0 6 -1 10 0 21
65 E 5 374 6 0 65 -1 5 0 21
80 DSACK1 5 373 7 0 80 -1 4 0 21
34 VMA 5 375 3 0 34 -1 3 0 21
82 BGACK_030 5 370 7 0 82 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 369 3 0 28 -1 2 0 21
2 RESET 5 376 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 6 7 0 2 3 4 5 6 7 -1 -1 1 0 21
376 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
370 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
317 inst_CLK_000_PE 3 -1 5 5 0 1 3 5 7 -1 -1 1 0 21
298 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21
364 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21
319 inst_CLK_000_NE 3 -1 4 4 0 1 3 5 -1 -1 1 0 21
374 RN_E 3 65 6 3 3 5 6 65 -1 5 0 21
294 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 5 0 21
322 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
360 SM_AMIGA_1_ 3 -1 5 3 1 5 7 -1 -1 3 0 21
296 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
328 SM_AMIGA_0_ 3 -1 1 3 1 5 7 -1 -1 2 0 21
293 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
327 inst_CLK_000_NE_D0 3 -1 3 3 3 5 6 -1 -1 1 0 21
316 inst_CLK_000_D0 3 -1 3 3 3 5 6 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
301 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21
334 RST_DLY_3_ 3 -1 0 2 0 1 -1 -1 6 0 21
333 RST_DLY_2_ 3 -1 1 2 0 1 -1 -1 5 0 21
336 RST_DLY_5_ 3 -1 1 2 0 1 -1 -1 4 0 21
332 RST_DLY_1_ 3 -1 0 2 0 1 -1 -1 4 0 21
311 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 4 0 21
375 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
363 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
337 RST_DLY_6_ 3 -1 1 2 0 1 -1 -1 3 0 21
331 RST_DLY_0_ 3 -1 1 2 0 1 -1 -1 3 0 21
330 SM_AMIGA_6_ 3 -1 5 2 2 5 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
338 RST_DLY_7_ 3 -1 1 2 0 1 -1 -1 2 0 21
335 RST_DLY_4_ 3 -1 0 2 0 1 -1 -1 2 1 21
329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
315 inst_CLK_000_D1 3 -1 6 2 3 5 -1 -1 1 0 21
309 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21
372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
371 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
359 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
326 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
373 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
362 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
320 N_96_i 3 -1 5 1 5 -1 -1 4 0 21
368 RN_A0 3 68 6 1 6 68 -1 3 0 21
367 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
361 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
377 RN_RW 3 70 6 1 6 70 -1 2 0 21
369 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
365 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
358 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
357 CLK_000_N_SYNC_9_ 3 -1 6 1 7 -1 -1 1 0 21
356 CLK_000_N_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21
355 CLK_000_N_SYNC_7_ 3 -1 3 1 0 -1 -1 1 0 21
354 CLK_000_N_SYNC_6_ 3 -1 3 1 3 -1 -1 1 0 21
353 CLK_000_N_SYNC_5_ 3 -1 2 1 3 -1 -1 1 0 21
352 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
351 CLK_000_N_SYNC_3_ 3 -1 3 1 0 -1 -1 1 0 21
350 CLK_000_N_SYNC_2_ 3 -1 3 1 3 -1 -1 1 0 21
349 CLK_000_N_SYNC_1_ 3 -1 1 1 3 -1 -1 1 0 21
348 CLK_000_N_SYNC_0_ 3 -1 3 1 1 -1 -1 1 0 21
347 CLK_000_P_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21
346 CLK_000_P_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21
345 CLK_000_P_SYNC_6_ 3 -1 6 1 0 -1 -1 1 0 21
344 CLK_000_P_SYNC_5_ 3 -1 6 1 6 -1 -1 1 0 21
343 CLK_000_P_SYNC_4_ 3 -1 1 1 6 -1 -1 1 0 21
342 CLK_000_P_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21
341 CLK_000_P_SYNC_2_ 3 -1 6 1 1 -1 -1 1 0 21
340 CLK_000_P_SYNC_1_ 3 -1 6 1 6 -1 -1 1 0 21
339 CLK_000_P_SYNC_0_ 3 -1 3 1 6 -1 -1 1 0 21
325 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21
324 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21
323 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
321 CLK_000_N_SYNC_11_ 3 -1 7 1 4 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 0 1 5 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21
312 inst_CLK_OUT_PRE_D 3 -1 4 1 7 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 0 1 2 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
63 CLK_030 1 -1 -1 3 0 1 7 63 -1
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 6 67 -1
55 IPL_1_ 1 -1 -1 2 1 6 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_21_ 1 -1 -1 1 4 93 -1
92 A_20_ 1 -1 -1 1 4 92 -1
84 A_23_ 1 -1 -1 1 4 84 -1
83 A_22_ 1 -1 -1 1 4 83 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A1 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 1 35 -1
29 DTACK 1 -1 -1 1 2 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 6 13 -1
10 CLK_000 1 -1 -1 1 3 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
146 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21
79 RW_000 5 367 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 377 6 2 5 7 70 -1 2 0 21
97 DS_030 5 -1 0 2 0 3 97 -1 1 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
68 A0 5 368 6 1 2 68 -1 3 0 21
78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21
8 IPL_030_2_ 5 366 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 372 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 371 1 0 6 -1 10 0 21
65 E 5 374 6 0 65 -1 5 0 21
80 DSACK1 5 373 7 0 80 -1 4 0 21
34 VMA 5 375 3 0 34 -1 3 0 21
82 BGACK_030 5 370 7 0 82 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 369 3 0 28 -1 2 0 21
2 RESET 5 376 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 6 7 0 2 3 4 5 6 7 -1 -1 1 0 21
376 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
370 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
317 inst_CLK_000_PE 3 -1 5 5 0 1 3 5 7 -1 -1 1 0 21
298 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21
364 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21
319 inst_CLK_000_NE 3 -1 4 4 0 1 3 5 -1 -1 1 0 21
374 RN_E 3 65 6 3 3 5 6 65 -1 5 0 21
294 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 5 0 21
322 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
360 SM_AMIGA_1_ 3 -1 5 3 1 5 7 -1 -1 3 0 21
296 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
328 SM_AMIGA_0_ 3 -1 1 3 1 5 7 -1 -1 2 0 21
293 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
327 inst_CLK_000_NE_D0 3 -1 3 3 3 5 6 -1 -1 1 0 21
316 inst_CLK_000_D0 3 -1 3 3 3 5 6 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
301 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21
334 RST_DLY_3_ 3 -1 0 2 0 1 -1 -1 6 0 21
333 RST_DLY_2_ 3 -1 1 2 0 1 -1 -1 5 0 21
336 RST_DLY_5_ 3 -1 1 2 0 1 -1 -1 4 0 21
332 RST_DLY_1_ 3 -1 0 2 0 1 -1 -1 4 0 21
311 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 4 0 21
375 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
363 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21
337 RST_DLY_6_ 3 -1 1 2 0 1 -1 -1 3 0 21
331 RST_DLY_0_ 3 -1 1 2 0 1 -1 -1 3 0 21
330 SM_AMIGA_6_ 3 -1 5 2 2 5 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
338 RST_DLY_7_ 3 -1 1 2 0 1 -1 -1 2 0 21
335 RST_DLY_4_ 3 -1 0 2 0 1 -1 -1 2 1 21
329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
315 inst_CLK_000_D1 3 -1 6 2 3 5 -1 -1 1 0 21
309 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21
372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
371 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
359 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
326 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21
373 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
362 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
320 N_96_i 3 -1 5 1 5 -1 -1 4 0 21
368 RN_A0 3 68 6 1 6 68 -1 3 0 21
367 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
361 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
377 RN_RW 3 70 6 1 6 70 -1 2 0 21
369 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
365 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
358 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
357 CLK_000_N_SYNC_9_ 3 -1 6 1 7 -1 -1 1 0 21
356 CLK_000_N_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21
355 CLK_000_N_SYNC_7_ 3 -1 3 1 0 -1 -1 1 0 21
354 CLK_000_N_SYNC_6_ 3 -1 3 1 3 -1 -1 1 0 21
353 CLK_000_N_SYNC_5_ 3 -1 2 1 3 -1 -1 1 0 21
352 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21
351 CLK_000_N_SYNC_3_ 3 -1 3 1 0 -1 -1 1 0 21
350 CLK_000_N_SYNC_2_ 3 -1 3 1 3 -1 -1 1 0 21
349 CLK_000_N_SYNC_1_ 3 -1 1 1 3 -1 -1 1 0 21
348 CLK_000_N_SYNC_0_ 3 -1 3 1 1 -1 -1 1 0 21
347 CLK_000_P_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21
346 CLK_000_P_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21
345 CLK_000_P_SYNC_6_ 3 -1 6 1 0 -1 -1 1 0 21
344 CLK_000_P_SYNC_5_ 3 -1 6 1 6 -1 -1 1 0 21
343 CLK_000_P_SYNC_4_ 3 -1 1 1 6 -1 -1 1 0 21
342 CLK_000_P_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21
341 CLK_000_P_SYNC_2_ 3 -1 6 1 1 -1 -1 1 0 21
340 CLK_000_P_SYNC_1_ 3 -1 6 1 6 -1 -1 1 0 21
339 CLK_000_P_SYNC_0_ 3 -1 3 1 6 -1 -1 1 0 21
325 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21
324 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21
323 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
321 CLK_000_N_SYNC_11_ 3 -1 7 1 4 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 0 1 5 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21
312 inst_CLK_OUT_PRE_D 3 -1 4 1 7 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 0 1 2 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
63 CLK_030 1 -1 -1 3 0 1 7 63 -1
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 6 67 -1
55 IPL_1_ 1 -1 -1 2 1 6 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_21_ 1 -1 -1 1 4 93 -1
92 A_20_ 1 -1 -1 1 4 92 -1
84 A_23_ 1 -1 -1 1 4 84 -1
83 A_22_ 1 -1 -1 1 4 83 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A1 1 -1 -1 1 2 59 -1
35 VPA 1 -1 -1 1 1 35 -1
29 DTACK 1 -1 -1 1 2 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 6 13 -1
10 CLK_000 1 -1 -1 1 3 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
141 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
79 RW_000 5 366 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 376 6 2 0 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
68 A0 5 367 6 1 6 68 -1 3 0 21
97 DS_030 5 -1 0 1 3 97 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 6 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 6 69 -1 1 0 21
8 IPL_030_2_ 5 365 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 371 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 370 1 0 6 -1 10 0 21
65 E 5 373 6 0 65 -1 5 0 21
80 DSACK1 5 372 7 0 80 -1 4 0 21
34 VMA 5 374 3 0 34 -1 3 0 21
82 BGACK_030 5 369 7 0 82 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 368 3 0 28 -1 2 0 21
2 RESET 5 375 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
369 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 2 0 21
375 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 5 6 0 3 4 5 6 7 -1 -1 1 0 21
319 inst_CLK_000_NE 3 -1 2 5 0 1 2 3 5 -1 -1 1 0 21
317 inst_CLK_000_PE 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21
298 inst_AS_030_D0 3 -1 7 5 0 3 4 5 7 -1 -1 1 0 21
326 inst_CLK_000_NE_D0 3 -1 1 4 2 3 5 6 -1 -1 1 0 21
364 SM_AMIGA_i_7_ 3 -1 5 3 3 5 7 -1 -1 14 0 21
373 RN_E 3 65 6 3 2 3 6 65 -1 5 0 21
325 SM_AMIGA_3_ 3 -1 2 3 0 2 5 -1 -1 5 0 21
294 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
321 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 4 0 21
359 SM_AMIGA_1_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
296 SM_AMIGA_5_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
327 SM_AMIGA_0_ 3 -1 0 3 0 5 7 -1 -1 2 0 21
293 cpu_est_0_ 3 -1 3 3 2 3 6 -1 -1 2 0 21
302 inst_BGACK_030_INT_D 3 -1 7 3 0 5 6 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
333 RST_DLY_3_ 3 -1 2 2 1 2 -1 -1 6 0 21
332 RST_DLY_2_ 3 -1 2 2 1 2 -1 -1 5 0 21
361 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21
335 RST_DLY_5_ 3 -1 1 2 1 2 -1 -1 4 0 21
331 RST_DLY_1_ 3 -1 2 2 1 2 -1 -1 4 0 21
311 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 4 0 21
374 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21
362 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21
360 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21
336 RST_DLY_6_ 3 -1 2 2 1 2 -1 -1 3 0 21
330 RST_DLY_0_ 3 -1 2 2 1 2 -1 -1 3 0 21
329 SM_AMIGA_6_ 3 -1 5 2 5 6 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
337 RST_DLY_7_ 3 -1 1 2 1 2 -1 -1 2 0 21
334 RST_DLY_4_ 3 -1 2 2 1 2 -1 -1 2 1 21
328 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21
316 inst_CLK_000_D0 3 -1 6 2 3 5 -1 -1 1 0 21
309 inst_VPA_D 3 -1 1 2 2 3 -1 -1 1 0 21
371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
365 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
358 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
301 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 7 0 21
372 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
367 RN_A0 3 68 6 1 6 68 -1 3 0 21
366 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
376 RN_RW 3 70 6 1 6 70 -1 2 0 21
368 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
363 N_271_0 3 -1 2 1 5 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
357 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
356 CLK_000_N_SYNC_9_ 3 -1 5 1 7 -1 -1 1 0 21
355 CLK_000_N_SYNC_8_ 3 -1 2 1 5 -1 -1 1 0 21
354 CLK_000_N_SYNC_7_ 3 -1 4 1 2 -1 -1 1 0 21
353 CLK_000_N_SYNC_6_ 3 -1 1 1 4 -1 -1 1 0 21
352 CLK_000_N_SYNC_5_ 3 -1 4 1 1 -1 -1 1 0 21
351 CLK_000_N_SYNC_4_ 3 -1 3 1 4 -1 -1 1 0 21
350 CLK_000_N_SYNC_3_ 3 -1 1 1 3 -1 -1 1 0 21
349 CLK_000_N_SYNC_2_ 3 -1 3 1 1 -1 -1 1 0 21
348 CLK_000_N_SYNC_1_ 3 -1 4 1 3 -1 -1 1 0 21
347 CLK_000_N_SYNC_0_ 3 -1 5 1 4 -1 -1 1 0 21
346 CLK_000_P_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21
345 CLK_000_P_SYNC_7_ 3 -1 1 1 0 -1 -1 1 0 21
344 CLK_000_P_SYNC_6_ 3 -1 3 1 1 -1 -1 1 0 21
343 CLK_000_P_SYNC_5_ 3 -1 1 1 3 -1 -1 1 0 21
342 CLK_000_P_SYNC_4_ 3 -1 2 1 1 -1 -1 1 0 21
341 CLK_000_P_SYNC_3_ 3 -1 1 1 2 -1 -1 1 0 21
340 CLK_000_P_SYNC_2_ 3 -1 2 1 1 -1 -1 1 0 21
339 CLK_000_P_SYNC_1_ 3 -1 0 1 2 -1 -1 1 0 21
338 CLK_000_P_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21
324 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21
323 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21
322 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
320 CLK_000_N_SYNC_11_ 3 -1 7 1 2 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 6 1 3 -1 -1 1 0 21
315 inst_CLK_000_D1 3 -1 5 1 5 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 6 1 6 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 3 1 2 -1 -1 1 0 21
312 inst_CLK_OUT_PRE_D 3 -1 6 1 7 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 3 1 6 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
63 CLK_030 1 -1 -1 3 0 1 7 63 -1
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
59 A1 1 -1 -1 2 0 6 59 -1
55 IPL_1_ 1 -1 -1 2 1 3 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
35 VPA 1 -1 -1 1 1 35 -1
29 DTACK 1 -1 -1 1 3 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 5 13 -1
10 CLK_000 1 -1 -1 1 6 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
141 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
79 RW_000 5 366 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21
68 A0 5 367 6 2 1 5 68 -1 3 0 21
70 RW 5 376 6 2 2 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
97 DS_030 5 -1 0 1 3 97 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21
8 IPL_030_2_ 5 365 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 371 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 370 1 0 6 -1 10 0 21
65 E 5 373 6 0 65 -1 5 0 21
80 DSACK1 5 372 7 0 80 -1 4 0 21
34 VMA 5 374 3 0 34 -1 3 0 21
82 BGACK_030 5 369 7 0 82 -1 2 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 368 3 0 28 -1 2 0 21
2 RESET 5 375 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
300 inst_nEXP_SPACE_D0reg 3 -1 6 7 0 2 3 4 5 6 7 -1 -1 1 0 21
375 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
369 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 2 0 21
318 inst_CLK_000_PE 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21
320 inst_CLK_000_NE 3 -1 6 4 0 1 3 5 -1 -1 1 0 21
299 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21
364 SM_AMIGA_i_7_ 3 -1 5 3 2 3 7 -1 -1 14 0 21
373 RN_E 3 65 6 3 3 5 6 65 -1 5 0 21
295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 5 0 21
322 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21
330 SM_AMIGA_6_ 3 -1 2 3 1 2 5 -1 -1 3 0 21
297 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21
294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 2 0 21
327 inst_CLK_000_NE_D0 3 -1 1 3 3 5 6 -1 -1 1 0 21
317 inst_CLK_000_D0 3 -1 6 3 2 3 5 -1 -1 1 0 21
316 inst_CLK_000_D1 3 -1 5 3 2 3 5 -1 -1 1 0 21
304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
302 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21
334 RST_DLY_3_ 3 -1 1 2 0 1 -1 -1 6 0 21
333 RST_DLY_2_ 3 -1 1 2 0 1 -1 -1 5 0 21
326 SM_AMIGA_3_ 3 -1 5 2 2 5 -1 -1 5 0 21
336 RST_DLY_5_ 3 -1 0 2 0 1 -1 -1 4 0 21
332 RST_DLY_1_ 3 -1 0 2 0 1 -1 -1 4 0 21
312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 4 0 21
374 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21
363 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21
360 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
337 RST_DLY_6_ 3 -1 1 2 0 1 -1 -1 3 0 21
331 RST_DLY_0_ 3 -1 1 2 0 1 -1 -1 3 0 21
311 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21
309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
338 RST_DLY_7_ 3 -1 0 2 0 1 -1 -1 2 0 21
335 RST_DLY_4_ 3 -1 1 2 0 1 -1 -1 2 1 21
329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
328 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 2 0 21
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
296 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
315 inst_CLK_OUT_PRE_50 3 -1 0 2 0 6 -1 -1 1 0 21
310 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21
303 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21
301 inst_DS_030_D0 3 -1 3 2 1 5 -1 -1 1 0 21
371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
365 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
359 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
372 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
362 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21
293 N_165 3 -1 5 1 5 -1 -1 4 0 21
367 RN_A0 3 68 6 1 6 68 -1 3 0 21
366 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
361 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21
307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
376 RN_RW 3 70 6 1 6 70 -1 2 0 21
368 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
358 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
357 CLK_000_N_SYNC_9_ 3 -1 6 1 7 -1 -1 1 0 21
356 CLK_000_N_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21
355 CLK_000_N_SYNC_7_ 3 -1 4 1 0 -1 -1 1 0 21
354 CLK_000_N_SYNC_6_ 3 -1 3 1 4 -1 -1 1 0 21
353 CLK_000_N_SYNC_5_ 3 -1 0 1 3 -1 -1 1 0 21
352 CLK_000_N_SYNC_4_ 3 -1 3 1 0 -1 -1 1 0 21
351 CLK_000_N_SYNC_3_ 3 -1 0 1 3 -1 -1 1 0 21
350 CLK_000_N_SYNC_2_ 3 -1 0 1 0 -1 -1 1 0 21
349 CLK_000_N_SYNC_1_ 3 -1 0 1 0 -1 -1 1 0 21
348 CLK_000_N_SYNC_0_ 3 -1 3 1 0 -1 -1 1 0 21
347 CLK_000_P_SYNC_8_ 3 -1 2 1 2 -1 -1 1 0 21
346 CLK_000_P_SYNC_7_ 3 -1 6 1 2 -1 -1 1 0 21
345 CLK_000_P_SYNC_6_ 3 -1 4 1 6 -1 -1 1 0 21
344 CLK_000_P_SYNC_5_ 3 -1 4 1 4 -1 -1 1 0 21
343 CLK_000_P_SYNC_4_ 3 -1 1 1 4 -1 -1 1 0 21
342 CLK_000_P_SYNC_3_ 3 -1 2 1 1 -1 -1 1 0 21
341 CLK_000_P_SYNC_2_ 3 -1 1 1 2 -1 -1 1 0 21
340 CLK_000_P_SYNC_1_ 3 -1 6 1 1 -1 -1 1 0 21
339 CLK_000_P_SYNC_0_ 3 -1 3 1 6 -1 -1 1 0 21
325 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21
324 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21
323 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
321 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21
319 CLK_000_P_SYNC_9_ 3 -1 2 1 3 -1 -1 1 0 21
314 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21
313 inst_CLK_OUT_PRE_D 3 -1 6 1 7 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 2 4 7 96 -1
95 A_16_ 1 -1 -1 3 2 4 7 95 -1
94 A_18_ 1 -1 -1 3 2 4 7 94 -1
63 CLK_030 1 -1 -1 3 0 1 7 63 -1
58 A_17_ 1 -1 -1 3 2 4 7 58 -1
57 FC_1_ 1 -1 -1 3 2 4 7 57 -1
56 FC_0_ 1 -1 -1 3 2 4 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
55 IPL_1_ 1 -1 -1 2 1 2 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A1 1 -1 -1 1 6 59 -1
35 VPA 1 -1 -1 1 5 35 -1
29 DTACK 1 -1 -1 1 3 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 6 13 -1
10 CLK_000 1 -1 -1 1 6 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
141 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
79 RW_000 5 366 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 376 6 2 0 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
68 A0 5 367 6 1 6 68 -1 3 0 21
97 DS_030 5 -1 0 1 3 97 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 6 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 6 69 -1 1 0 21
8 IPL_030_2_ 5 365 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 371 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 370 1 0 6 -1 10 0 21
65 E 5 373 6 0 65 -1 5 0 21
80 DSACK1 5 372 7 0 80 -1 4 0 21
82 BGACK_030 5 369 7 0 82 -1 3 0 21
34 VMA 5 374 3 0 34 -1 3 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 368 3 0 28 -1 2 0 21
2 RESET 5 375 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
369 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21
375 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 5 6 0 3 4 5 6 7 -1 -1 1 0 21
319 inst_CLK_000_NE 3 -1 2 5 0 1 2 3 5 -1 -1 1 0 21
317 inst_CLK_000_PE 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21
298 inst_AS_030_D0 3 -1 7 5 0 3 4 5 7 -1 -1 1 0 21
326 inst_CLK_000_NE_D0 3 -1 1 4 2 3 5 6 -1 -1 1 0 21
364 SM_AMIGA_i_7_ 3 -1 5 3 3 5 7 -1 -1 14 0 21
373 RN_E 3 65 6 3 2 3 6 65 -1 5 0 21
325 SM_AMIGA_3_ 3 -1 2 3 0 2 5 -1 -1 5 0 21
294 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
321 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 4 0 21
359 SM_AMIGA_1_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
296 SM_AMIGA_5_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
327 SM_AMIGA_0_ 3 -1 0 3 0 5 7 -1 -1 2 0 21
293 cpu_est_0_ 3 -1 3 3 2 3 6 -1 -1 2 0 21
302 inst_BGACK_030_INT_D 3 -1 7 3 0 5 6 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
333 RST_DLY_3_ 3 -1 2 2 1 2 -1 -1 6 0 21
332 RST_DLY_2_ 3 -1 2 2 1 2 -1 -1 5 0 21
361 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21
335 RST_DLY_5_ 3 -1 1 2 1 2 -1 -1 4 0 21
331 RST_DLY_1_ 3 -1 2 2 1 2 -1 -1 4 0 21
311 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 4 0 21
374 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21
362 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21
360 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21
336 RST_DLY_6_ 3 -1 2 2 1 2 -1 -1 3 0 21
330 RST_DLY_0_ 3 -1 2 2 1 2 -1 -1 3 0 21
329 SM_AMIGA_6_ 3 -1 5 2 5 6 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
337 RST_DLY_7_ 3 -1 1 2 1 2 -1 -1 2 0 21
334 RST_DLY_4_ 3 -1 2 2 1 2 -1 -1 2 1 21
328 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21
316 inst_CLK_000_D0 3 -1 6 2 3 5 -1 -1 1 0 21
309 inst_VPA_D 3 -1 1 2 2 3 -1 -1 1 0 21
371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
365 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
358 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
301 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 7 0 21
372 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
367 RN_A0 3 68 6 1 6 68 -1 3 0 21
366 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
376 RN_RW 3 70 6 1 6 70 -1 2 0 21
368 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
363 pos_clk_un23_clk_000_ne_d0_0_n 3 -1 2 1 5 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
357 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
356 CLK_000_N_SYNC_9_ 3 -1 5 1 7 -1 -1 1 0 21
355 CLK_000_N_SYNC_8_ 3 -1 2 1 5 -1 -1 1 0 21
354 CLK_000_N_SYNC_7_ 3 -1 4 1 2 -1 -1 1 0 21
353 CLK_000_N_SYNC_6_ 3 -1 1 1 4 -1 -1 1 0 21
352 CLK_000_N_SYNC_5_ 3 -1 4 1 1 -1 -1 1 0 21
351 CLK_000_N_SYNC_4_ 3 -1 3 1 4 -1 -1 1 0 21
350 CLK_000_N_SYNC_3_ 3 -1 1 1 3 -1 -1 1 0 21
349 CLK_000_N_SYNC_2_ 3 -1 3 1 1 -1 -1 1 0 21
348 CLK_000_N_SYNC_1_ 3 -1 4 1 3 -1 -1 1 0 21
347 CLK_000_N_SYNC_0_ 3 -1 5 1 4 -1 -1 1 0 21
346 CLK_000_P_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21
345 CLK_000_P_SYNC_7_ 3 -1 1 1 0 -1 -1 1 0 21
344 CLK_000_P_SYNC_6_ 3 -1 3 1 1 -1 -1 1 0 21
343 CLK_000_P_SYNC_5_ 3 -1 1 1 3 -1 -1 1 0 21
342 CLK_000_P_SYNC_4_ 3 -1 2 1 1 -1 -1 1 0 21
341 CLK_000_P_SYNC_3_ 3 -1 1 1 2 -1 -1 1 0 21
340 CLK_000_P_SYNC_2_ 3 -1 2 1 1 -1 -1 1 0 21
339 CLK_000_P_SYNC_1_ 3 -1 0 1 2 -1 -1 1 0 21
338 CLK_000_P_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21
324 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21
323 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21
322 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
320 CLK_000_N_SYNC_11_ 3 -1 7 1 2 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 6 1 3 -1 -1 1 0 21
315 inst_CLK_000_D1 3 -1 5 1 5 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 6 1 6 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 3 1 2 -1 -1 1 0 21
312 inst_CLK_OUT_PRE_D 3 -1 6 1 7 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 3 1 6 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
63 CLK_030 1 -1 -1 3 0 1 7 63 -1
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
59 A1 1 -1 -1 2 0 6 59 -1
55 IPL_1_ 1 -1 -1 2 1 3 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
67 IPL_2_ 1 -1 -1 1 1 67 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
35 VPA 1 -1 -1 1 1 35 -1
29 DTACK 1 -1 -1 1 3 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 5 13 -1
10 CLK_000 1 -1 -1 1 6 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
141 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 2 5 6 7 40 -1 1 0 21
79 RW_000 5 366 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 376 6 2 6 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
68 A0 5 367 6 1 0 68 -1 3 0 21
97 DS_030 5 -1 0 1 3 97 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
8 IPL_030_2_ 5 365 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 371 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 370 1 0 6 -1 10 0 21
65 E 5 373 6 0 65 -1 5 0 21
80 DSACK1 5 372 7 0 80 -1 4 0 21
82 BGACK_030 5 369 7 0 82 -1 3 0 21
34 VMA 5 374 3 0 34 -1 3 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 368 3 0 28 -1 2 0 21
2 RESET 5 375 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
369 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21
375 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 5 6 0 3 4 5 6 7 -1 -1 1 0 21
317 inst_CLK_000_PE 3 -1 0 5 0 2 3 5 7 -1 -1 1 0 21
298 inst_AS_030_D0 3 -1 7 5 3 4 5 6 7 -1 -1 1 0 21
319 inst_CLK_000_NE 3 -1 1 4 1 2 3 5 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 7 4 0 3 5 6 -1 -1 1 0 21
364 SM_AMIGA_i_7_ 3 -1 5 3 3 5 7 -1 -1 13 0 21
373 RN_E 3 65 6 3 2 3 6 65 -1 5 0 21
325 SM_AMIGA_3_ 3 -1 2 3 2 5 6 -1 -1 5 0 21
294 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 5 0 21
321 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21
296 SM_AMIGA_5_ 3 -1 5 3 5 6 7 -1 -1 3 0 21
293 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 2 0 21
312 inst_CLK_OUT_PRE_D 3 -1 6 3 1 6 7 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
334 RST_DLY_3_ 3 -1 2 2 1 2 -1 -1 6 0 21
333 RST_DLY_2_ 3 -1 2 2 1 2 -1 -1 5 0 21
362 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21
336 RST_DLY_5_ 3 -1 1 2 1 2 -1 -1 4 0 21
332 RST_DLY_1_ 3 -1 2 2 1 2 -1 -1 4 0 21
311 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 4 0 21
374 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21
363 inst_DS_000_ENABLE 3 -1 6 2 3 6 -1 -1 3 0 21
361 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21
360 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
337 RST_DLY_6_ 3 -1 1 2 1 2 -1 -1 3 0 21
330 RST_DLY_0_ 3 -1 2 2 1 2 -1 -1 3 0 21
329 SM_AMIGA_6_ 3 -1 5 2 0 5 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
338 RST_DLY_7_ 3 -1 2 2 1 2 -1 -1 2 0 21
335 RST_DLY_4_ 3 -1 2 2 1 2 -1 -1 2 1 21
327 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21
326 inst_CLK_000_NE_D0 3 -1 2 2 2 6 -1 -1 1 0 21
316 inst_CLK_000_D0 3 -1 1 2 3 5 -1 -1 1 0 21
309 inst_VPA_D 3 -1 5 2 2 3 -1 -1 1 0 21
371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
365 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
359 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
301 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 7 0 21
372 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
367 RN_A0 3 68 6 1 6 68 -1 3 0 21
366 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
376 RN_RW 3 70 6 1 6 70 -1 2 0 21
368 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
331 N_264_i 3 -1 2 1 5 -1 -1 2 0 21
328 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
358 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
357 CLK_000_N_SYNC_9_ 3 -1 1 1 7 -1 -1 1 0 21
356 CLK_000_N_SYNC_8_ 3 -1 0 1 1 -1 -1 1 0 21
355 CLK_000_N_SYNC_7_ 3 -1 3 1 0 -1 -1 1 0 21
354 CLK_000_N_SYNC_6_ 3 -1 4 1 3 -1 -1 1 0 21
353 CLK_000_N_SYNC_5_ 3 -1 1 1 4 -1 -1 1 0 21
352 CLK_000_N_SYNC_4_ 3 -1 4 1 1 -1 -1 1 0 21
351 CLK_000_N_SYNC_3_ 3 -1 1 1 4 -1 -1 1 0 21
350 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21
349 CLK_000_N_SYNC_1_ 3 -1 2 1 1 -1 -1 1 0 21
348 CLK_000_N_SYNC_0_ 3 -1 5 1 2 -1 -1 1 0 21
347 CLK_000_P_SYNC_8_ 3 -1 6 1 4 -1 -1 1 0 21
346 CLK_000_P_SYNC_7_ 3 -1 1 1 6 -1 -1 1 0 21
345 CLK_000_P_SYNC_6_ 3 -1 2 1 1 -1 -1 1 0 21
344 CLK_000_P_SYNC_5_ 3 -1 3 1 2 -1 -1 1 0 21
343 CLK_000_P_SYNC_4_ 3 -1 4 1 3 -1 -1 1 0 21
342 CLK_000_P_SYNC_3_ 3 -1 3 1 4 -1 -1 1 0 21
341 CLK_000_P_SYNC_2_ 3 -1 6 1 3 -1 -1 1 0 21
340 CLK_000_P_SYNC_1_ 3 -1 1 1 6 -1 -1 1 0 21
339 CLK_000_P_SYNC_0_ 3 -1 5 1 1 -1 -1 1 0 21
324 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21
323 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21
322 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21
320 CLK_000_N_SYNC_11_ 3 -1 7 1 1 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 4 1 0 -1 -1 1 0 21
315 inst_CLK_000_D1 3 -1 3 1 5 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 6 1 6 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 0 1 2 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 3 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 0 1 67 -1
66 IPL_0_ 1 -1 -1 2 1 3 66 -1
63 CLK_030 1 -1 -1 2 0 7 63 -1
59 A1 1 -1 -1 2 0 3 59 -1
55 IPL_1_ 1 -1 -1 2 1 2 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
35 VPA 1 -1 -1 1 5 35 -1
29 DTACK 1 -1 -1 1 0 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 5 13 -1
10 CLK_000 1 -1 -1 1 1 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
146 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 6 1 2 3 5 6 7 40 -1 1 0 21
79 RW_000 5 367 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 377 6 2 3 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
68 A0 5 368 6 1 0 68 -1 3 0 21
97 DS_030 5 -1 0 1 3 97 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21
8 IPL_030_2_ 5 366 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 372 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 371 1 0 6 -1 10 0 21
65 E 5 374 6 0 65 -1 5 0 21
80 DSACK1 5 373 7 0 80 -1 4 0 21
82 BGACK_030 5 370 7 0 82 -1 3 0 21
34 VMA 5 375 3 0 34 -1 3 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 369 3 0 28 -1 2 0 21
2 RESET 5 376 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
370 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21
376 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
317 inst_CLK_000_PE 3 -1 2 6 0 1 2 3 5 7 -1 -1 1 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 1 6 0 3 4 5 6 7 -1 -1 1 0 21
296 SM_AMIGA_5_ 3 -1 1 5 1 3 5 6 7 -1 -1 3 0 21
298 inst_AS_030_D0 3 -1 7 5 3 4 5 6 7 -1 -1 1 0 21
319 inst_CLK_000_NE 3 -1 0 4 1 2 3 5 -1 -1 1 0 21
364 SM_AMIGA_i_7_ 3 -1 5 3 3 5 7 -1 -1 13 0 21
374 RN_E 3 65 6 3 2 3 6 65 -1 5 0 21
325 SM_AMIGA_3_ 3 -1 2 3 2 3 5 -1 -1 5 0 21
294 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21
321 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 4 0 21
361 SM_AMIGA_4_ 3 -1 3 3 2 3 5 -1 -1 3 0 21
329 SM_AMIGA_6_ 3 -1 5 3 0 1 5 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 0 3 0 6 7 -1 -1 3 0 21
293 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 2 0 21
326 inst_CLK_000_NE_D0 3 -1 5 3 2 3 6 -1 -1 1 0 21
316 inst_CLK_000_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21
312 inst_CLK_OUT_PRE_D 3 -1 1 3 1 6 7 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 7 3 0 5 6 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
333 RST_DLY_3_ 3 -1 1 2 1 2 -1 -1 6 0 21
332 RST_DLY_2_ 3 -1 2 2 1 2 -1 -1 5 0 21
362 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21
335 RST_DLY_5_ 3 -1 2 2 1 2 -1 -1 4 0 21
331 RST_DLY_1_ 3 -1 2 2 1 2 -1 -1 4 0 21
311 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 4 0 21
375 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21
360 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21
336 RST_DLY_6_ 3 -1 2 2 1 2 -1 -1 3 0 21
330 RST_DLY_0_ 3 -1 2 2 1 2 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
337 RST_DLY_7_ 3 -1 2 2 1 2 -1 -1 2 0 21
334 RST_DLY_4_ 3 -1 1 2 1 2 -1 -1 2 1 21
328 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21
327 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21
309 inst_VPA_D 3 -1 6 2 2 3 -1 -1 1 0 21
372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
371 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
359 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
301 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 7 0 21
373 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
368 RN_A0 3 68 6 1 6 68 -1 3 0 21
367 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
363 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
377 RN_RW 3 70 6 1 6 70 -1 2 0 21
369 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
365 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
338 N_203_i 3 -1 2 1 5 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
358 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
357 CLK_000_N_SYNC_9_ 3 -1 4 1 7 -1 -1 1 0 21
356 CLK_000_N_SYNC_8_ 3 -1 3 1 4 -1 -1 1 0 21
355 CLK_000_N_SYNC_7_ 3 -1 6 1 3 -1 -1 1 0 21
354 CLK_000_N_SYNC_6_ 3 -1 0 1 6 -1 -1 1 0 21
353 CLK_000_N_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21
352 CLK_000_N_SYNC_4_ 3 -1 2 1 6 -1 -1 1 0 21
351 CLK_000_N_SYNC_3_ 3 -1 1 1 2 -1 -1 1 0 21
350 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21
349 CLK_000_N_SYNC_1_ 3 -1 2 1 1 -1 -1 1 0 21
348 CLK_000_N_SYNC_0_ 3 -1 5 1 2 -1 -1 1 0 21
347 CLK_000_P_SYNC_8_ 3 -1 5 1 2 -1 -1 1 0 21
346 CLK_000_P_SYNC_7_ 3 -1 3 1 5 -1 -1 1 0 21
345 CLK_000_P_SYNC_6_ 3 -1 5 1 3 -1 -1 1 0 21
344 CLK_000_P_SYNC_5_ 3 -1 6 1 5 -1 -1 1 0 21
343 CLK_000_P_SYNC_4_ 3 -1 1 1 6 -1 -1 1 0 21
342 CLK_000_P_SYNC_3_ 3 -1 6 1 1 -1 -1 1 0 21
341 CLK_000_P_SYNC_2_ 3 -1 6 1 6 -1 -1 1 0 21
340 CLK_000_P_SYNC_1_ 3 -1 6 1 6 -1 -1 1 0 21
339 CLK_000_P_SYNC_0_ 3 -1 5 1 6 -1 -1 1 0 21
324 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21
323 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21
322 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21
320 CLK_000_N_SYNC_11_ 3 -1 7 1 0 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21
315 inst_CLK_000_D1 3 -1 4 1 5 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 1 1 1 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 2 1 2 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 3 1 0 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 3 67 -1
63 CLK_030 1 -1 -1 2 0 7 63 -1
55 IPL_1_ 1 -1 -1 2 1 5 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_21_ 1 -1 -1 1 4 93 -1
92 A_20_ 1 -1 -1 1 4 92 -1
84 A_23_ 1 -1 -1 1 4 84 -1
83 A_22_ 1 -1 -1 1 4 83 -1
66 IPL_0_ 1 -1 -1 1 1 66 -1
59 A1 1 -1 -1 1 0 59 -1
35 VPA 1 -1 -1 1 6 35 -1
29 DTACK 1 -1 -1 1 2 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 1 13 -1
10 CLK_000 1 -1 -1 1 4 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
146 "number of signals after reading design file"
"sig sig sig pair blk fan PT xor sync"
"num name type sig num out pin node cnt PT type"
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21
79 RW_000 5 367 7 3 0 4 6 79 -1 3 0 21
41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21
70 RW 5 377 6 2 0 7 70 -1 2 0 21
81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21
31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21
30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21
68 A0 5 368 6 1 6 68 -1 3 0 21
97 DS_030 5 -1 0 1 3 97 -1 1 0 21
78 SIZE_1_ 5 -1 7 1 6 78 -1 1 0 21
69 SIZE_0_ 5 -1 6 1 6 69 -1 1 0 21
8 IPL_030_2_ 5 366 1 0 8 -1 10 0 21
7 IPL_030_0_ 5 372 1 0 7 -1 10 0 21
6 IPL_030_1_ 5 371 1 0 6 -1 10 0 21
65 E 5 374 6 0 65 -1 5 0 21
80 DSACK1 5 373 7 0 80 -1 4 0 21
82 BGACK_030 5 370 7 0 82 -1 3 0 21
34 VMA 5 375 3 0 34 -1 3 0 21
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
28 BG_000 5 369 3 0 28 -1 2 0 21
2 RESET 5 376 1 0 2 -1 2 0 21
91 AVEC 0 0 0 91 -1 1 0 21
77 FPU_CS 0 7 0 77 -1 1 0 21
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
46 CIIN 0 4 0 46 -1 1 0 21
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
9 CLK_EXP 0 1 0 9 -1 1 0 21
370 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21
376 RN_RESET 3 2 1 6 0 1 3 4 6 7 2 -1 2 0 21
299 inst_nEXP_SPACE_D0reg 3 -1 5 6 0 3 4 5 6 7 -1 -1 1 0 21
319 inst_CLK_000_NE 3 -1 5 5 1 2 3 4 5 -1 -1 1 0 21
317 inst_CLK_000_PE 3 -1 2 5 0 2 3 5 7 -1 -1 1 0 21
298 inst_AS_030_D0 3 -1 7 5 0 3 4 5 7 -1 -1 1 0 21
364 SM_AMIGA_i_7_ 3 -1 5 3 3 5 7 -1 -1 13 0 21
374 RN_E 3 65 6 3 2 3 6 65 -1 5 0 21
325 SM_AMIGA_3_ 3 -1 2 3 0 2 5 -1 -1 5 0 21
294 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 5 0 21
321 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21
360 SM_AMIGA_1_ 3 -1 2 3 2 5 7 -1 -1 3 0 21
296 SM_AMIGA_5_ 3 -1 5 3 0 5 7 -1 -1 3 0 21
293 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 2 0 21
326 inst_CLK_000_NE_D0 3 -1 4 3 2 3 6 -1 -1 1 0 21
302 inst_BGACK_030_INT_D 3 -1 7 3 2 5 6 -1 -1 1 0 21
303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21
333 RST_DLY_3_ 3 -1 2 2 1 2 -1 -1 6 0 21
332 RST_DLY_2_ 3 -1 1 2 1 2 -1 -1 5 0 21
362 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21
335 RST_DLY_5_ 3 -1 1 2 1 2 -1 -1 4 0 21
331 RST_DLY_1_ 3 -1 1 2 1 2 -1 -1 4 0 21
311 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 4 0 21
375 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21
363 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21
361 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21
336 RST_DLY_6_ 3 -1 2 2 1 2 -1 -1 3 0 21
330 RST_DLY_0_ 3 -1 2 2 1 2 -1 -1 3 0 21
329 SM_AMIGA_6_ 3 -1 5 2 5 6 -1 -1 3 0 21
310 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 3 0 21
308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21
307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21
337 RST_DLY_7_ 3 -1 2 2 1 2 -1 -1 2 0 21
334 RST_DLY_4_ 3 -1 2 2 1 2 -1 -1 2 1 21
328 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21
327 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 2 0 21
295 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21
316 inst_CLK_000_D0 3 -1 1 2 3 5 -1 -1 1 0 21
315 inst_CLK_000_D1 3 -1 3 2 3 5 -1 -1 1 0 21
313 inst_DTACK_D0 3 -1 1 2 2 3 -1 -1 1 0 21
309 inst_VPA_D 3 -1 3 2 2 3 -1 -1 1 0 21
372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
371 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21
359 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21
301 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 7 0 21
373 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21
368 RN_A0 3 68 6 1 6 68 -1 3 0 21
367 RN_RW_000 3 79 7 1 7 79 -1 3 0 21
306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21
377 RN_RW 3 70 6 1 6 70 -1 2 0 21
369 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
365 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21
352 pos_clk_un29_clk_000_ne_d0_i_n 3 -1 3 1 5 -1 -1 2 0 21
305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21
297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21
358 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21
357 CLK_000_N_SYNC_9_ 3 -1 5 1 7 -1 -1 1 0 21
356 CLK_000_N_SYNC_8_ 3 -1 6 1 5 -1 -1 1 0 21
355 CLK_000_N_SYNC_7_ 3 -1 1 1 6 -1 -1 1 0 21
354 CLK_000_N_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21
353 CLK_000_N_SYNC_5_ 3 -1 1 1 0 -1 -1 1 0 21
351 CLK_000_N_SYNC_4_ 3 -1 1 1 1 -1 -1 1 0 21
350 CLK_000_N_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21
349 CLK_000_N_SYNC_2_ 3 -1 6 1 1 -1 -1 1 0 21
348 CLK_000_N_SYNC_1_ 3 -1 6 1 6 -1 -1 1 0 21
347 CLK_000_N_SYNC_0_ 3 -1 5 1 6 -1 -1 1 0 21
346 CLK_000_P_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21
345 CLK_000_P_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21
344 CLK_000_P_SYNC_6_ 3 -1 0 1 0 -1 -1 1 0 21
343 CLK_000_P_SYNC_5_ 3 -1 5 1 0 -1 -1 1 0 21
342 CLK_000_P_SYNC_4_ 3 -1 3 1 5 -1 -1 1 0 21
341 CLK_000_P_SYNC_3_ 3 -1 2 1 3 -1 -1 1 0 21
340 CLK_000_P_SYNC_2_ 3 -1 1 1 2 -1 -1 1 0 21
339 CLK_000_P_SYNC_1_ 3 -1 2 1 1 -1 -1 1 0 21
338 CLK_000_P_SYNC_0_ 3 -1 3 1 2 -1 -1 1 0 21
324 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21
323 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21
322 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21
320 CLK_000_N_SYNC_11_ 3 -1 7 1 5 -1 -1 1 0 21
318 CLK_000_P_SYNC_9_ 3 -1 0 1 2 -1 -1 1 0 21
314 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21
312 inst_CLK_OUT_PRE_D 3 -1 4 1 7 -1 -1 1 0 21
300 inst_DS_030_D0 3 -1 3 1 6 -1 -1 1 0 21
60 CLK_OSZI 9 -1 0 60 -1
85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
96 A_19_ 1 -1 -1 3 4 5 7 96 -1
95 A_16_ 1 -1 -1 3 4 5 7 95 -1
94 A_18_ 1 -1 -1 3 4 5 7 94 -1
63 CLK_030 1 -1 -1 3 0 1 7 63 -1
58 A_17_ 1 -1 -1 3 4 5 7 58 -1
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
67 IPL_2_ 1 -1 -1 2 1 6 67 -1
66 IPL_0_ 1 -1 -1 2 1 3 66 -1
59 A1 1 -1 -1 2 2 6 59 -1
55 IPL_1_ 1 -1 -1 2 1 3 55 -1
27 BGACK_000 1 -1 -1 2 4 7 27 -1
93 A_21_ 1 -1 -1 1 4 93 -1
92 A_20_ 1 -1 -1 1 4 92 -1
84 A_23_ 1 -1 -1 1 4 84 -1
83 A_22_ 1 -1 -1 1 4 83 -1
35 VPA 1 -1 -1 1 3 35 -1
29 DTACK 1 -1 -1 1 1 29 -1
20 BG_030 1 -1 -1 1 3 20 -1
18 A_24_ 1 -1 -1 1 4 18 -1
17 A_25_ 1 -1 -1 1 4 17 -1
16 A_26_ 1 -1 -1 1 4 16 -1
15 A_27_ 1 -1 -1 1 4 15 -1
14 A_28_ 1 -1 -1 1 4 14 -1
13 nEXP_SPACE 1 -1 -1 1 5 13 -1
10 CLK_000 1 -1 -1 1 1 10 -1
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
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