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68030tk/Logic/syntmp/BUS68030_srr.htm

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<!@TC:1514591009>
#Build: Synplify Pro I-2014.03LC , Build 063R, May 27 2014
#install: E:\ispLEVER_Classic2_0\synpbase
#OS: Windows 7 6.2
#Hostname: DEEPTHOUGHT
#Implementation: logic
<a name=compilerReport1>$ Start of Compile</a>
#Sat Dec 30 00:43:29 2017
Synopsys VHDL Compiler, version comp201403rcp1, Build 060R, built May 27 2014
@N: : <!@TM:1514591009> | Running in 64-bit mode
Copyright (C) 1994-2014 Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, or distribution of this software is strictly prohibited.
@N:<a href="@N:CD720:@XP_HELP">CD720</a> : <a href="E:\ispLEVER_Classic2_0\synpbase\lib\vhd\std.vhd:123:18:123:22:@N:CD720:@XP_MSG">std.vhd(123)</a><!@TM:1514591009> | Setting time resolution to ns
@N: : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:13:7:13:15:@N::@XP_MSG">68030-68000-bus.vhd(13)</a><!@TM:1514591009> | Top entity is set to BUS68030.
File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd changed - recompiling
VHDL syntax check successful!
File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd changed - recompiling
@N:<a href="@N:CD630:@XP_HELP">CD630</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:13:7:13:15:@N:CD630:@XP_MSG">68030-68000-bus.vhd(13)</a><!@TM:1514591009> | Synthesizing work.bus68030.behavioral
@N:<a href="@N:CD233:@XP_HELP">CD233</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:70:10:70:12:@N:CD233:@XP_MSG">68030-68000-bus.vhd(70)</a><!@TM:1514591009> | Using sequential encoding for type sm_e
@N:<a href="@N:CD233:@XP_HELP">CD233</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:87:14:87:16:@N:CD233:@XP_MSG">68030-68000-bus.vhd(87)</a><!@TM:1514591009> | Using sequential encoding for type sm_68000
<font color=#A52A2A>@W:<a href="@W:CD638:@XP_HELP">CD638</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:130:7:130:18:@W:CD638:@XP_MSG">68030-68000-bus.vhd(130)</a><!@TM:1514591009> | Signal clk_out_pre is undriven </font>
<font color=#A52A2A>@W:<a href="@W:CD638:@XP_HELP">CD638</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:134:7:134:16:@W:CD638:@XP_MSG">68030-68000-bus.vhd(134)</a><!@TM:1514591009> | Signal clk_030_h is undriven </font>
Post processing for work.bus68030.behavioral
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning register DTACK_DMA_4 </font>
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning register CLK_030_PE_2(1 downto 0) </font>
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning register AS_000_D0_3 </font>
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning register RESET_OUT_4 </font>
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning register RST_DLY_6(2 downto 0) </font>
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning register DS_030_D0_3 </font>
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning register nEXP_SPACE_D0_3 </font>
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning register BGACK_030_INT_PRE_2 </font>
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:132:34:132:37:@W:CL169:@XP_MSG">68030-68000-bus.vhd(132)</a><!@TM:1514591009> | Pruning register CLK_OUT_EXP_INT_1 </font>
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:128:36:128:39:@W:CL169:@XP_MSG">68030-68000-bus.vhd(128)</a><!@TM:1514591009> | Pruning register CLK_OUT_PRE_25_3 </font>
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:158:2:158:4:@W:CL169:@XP_MSG">68030-68000-bus.vhd(158)</a><!@TM:1514591009> | Pruning register CLK_030_D0_2 </font>
<font color=#A52A2A>@W:<a href="@W:CL271:@XP_HELP">CL271</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL271:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... </font>
@N:<a href="@N:CL201:@XP_HELP">CL201</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@N:CL201:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Trying to extract state machine for register SM_AMIGA
Extracted state machine for register SM_AMIGA
State machine has 8 reachable states with original encodings of:
000
001
010
011
100
101
110
111
@N:<a href="@N:CL201:@XP_HELP">CL201</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@N:CL201:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Trying to extract state machine for register cpu_est
<font color=#A52A2A>@W:<a href="@W:CL246:@XP_HELP">CL246</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:24:1:24:9:@W:CL246:@XP_MSG">68030-68000-bus.vhd(24)</a><!@TM:1514591009> | Input port bits 15 to 2 of a_decode(23 downto 2) are unused </font>
<font color=#A52A2A>@W:<a href="@W:CL159:@XP_HELP">CL159</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:34:1:34:8:@W:CL159:@XP_MSG">68030-68000-bus.vhd(34)</a><!@TM:1514591009> | Input CLK_030 is unused</font>
<font color=#A52A2A>@W:<a href="@W:CL158:@XP_HELP">CL158</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:50:1:50:6:@W:CL158:@XP_MSG">68030-68000-bus.vhd(50)</a><!@TM:1514591009> | Inout RESET is unused</font>
@END
At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 70MB peak: 71MB)
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Sat Dec 30 00:43:29 2017
###########################################################]
Synopsys Netlist Linker, version comp201403rcp1, Build 060R, built May 27 2014
@N: : <!@TM:1514591011> | Running in 64-bit mode
File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\synwork\BUS68030_comp.srs changed - recompiling
At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Sat Dec 30 00:43:31 2017
###########################################################]
Map & Optimize Report
<a name=mapperReport2>Synopsys CPLD Technology Mapper, Version maplat, Build 923R, Built May 6 2014</a>
Copyright (C) 1994-2013, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use or distribution of the software is strictly prohibited.
Product Version I-2014.03LC
@N:<a href="@N:MF248:@XP_HELP">MF248</a> : <!@TM:1514591011> | Running in 64-bit mode.
Encoding state machine SM_AMIGA[0:7] (view:work.BUS68030(behavioral))
original code -> new code
000 -> 00000000
001 -> 00000011
010 -> 00000101
011 -> 00001001
100 -> 00010001
101 -> 00100001
110 -> 01000001
111 -> 10000001
---------------------------------------
<a name=resourceUsage3>Resource Usage Report</a>
Simple gate primitives:
DFF 52 uses
BI_DIR 18 uses
BUFTH 4 uses
IBUF 39 uses
OBUF 14 uses
AND2 221 uses
INV 203 uses
OR2 17 uses
XOR2 4 uses
@N:<a href="@N:FC100:@XP_HELP">FC100</a> : <!@TM:1514591011> | Timing Report not generated for this device, please use place and route tools for timing analysis.
I-2014.03LC
Mapper successful!
At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 39MB peak: 105MB)
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Sat Dec 30 00:43:31 2017
###########################################################]
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