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cf62aa3b3f
68030tk/Logic/68030_tk.eq3
MHeinrichs cf62aa3b3f timing enhanced?
2014-05-25 21:20:36 +02:00

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ispLEVER Classic 1.7.00.05.28.13 Linked Equations File
Copyright(C), 1992-2013, Lattice Semiconductor Corp.
All Rights Reserved.
Design bus68030 created Sun May 25 21:18:50 2014
P-Terms Fan-in Fan-out Type Name (attributes)
--------- ------ ------- ---- -----------------
0 0 1 Pin BERR
1 1 1 Pin BERR.OE
1 1 1 Pin CLK_DIV_OUT.AR
1 1 1 Pin CLK_DIV_OUT.D
1 1 1 Pin CLK_DIV_OUT.C
1 1 1 Pin DTACK
1 3 1 Pin DTACK.OE
1 0 1 Pin AVEC
0 0 1 Pin AVEC_EXP
1 1 1 Pin AVEC_EXP.OE
1 0 1 Pin DSACK_0_
1 1 1 Pin DSACK_0_.OE
2 3 1 Pin AMIGA_BUS_DATA_DIR
1 0 1 Pin AMIGA_BUS_ENABLE_LOW
1 4 1 Pin CIIN
1 8 1 Pin CIIN.OE
1 3 1 Pin SIZE_1_.OE
3 7 1 Pin SIZE_1_.D-
1 1 1 Pin SIZE_1_.AP
1 1 1 Pin SIZE_1_.C
3 4 1 Pin IPL_030_2_.D
1 1 1 Pin IPL_030_2_.AP
1 1 1 Pin IPL_030_2_.C
1 1 1 Pin DSACK_1_.OE
2 6 1 Pin DSACK_1_.D-
1 1 1 Pin DSACK_1_.AP
1 1 1 Pin DSACK_1_.C
1 3 1 Pin AS_030.OE
3 7 1 Pin AS_030.D-
1 1 1 Pin AS_030.AP
1 1 1 Pin AS_030.C
1 1 1 Pin AS_000.OE
2 5 1 Pin AS_000.D-
1 1 1 Pin AS_000.AP
1 1 1 Pin AS_000.C
1 3 1 Pin SIZE_0_.OE
2 7 1 Pin SIZE_0_.D-
1 1 1 Pin SIZE_0_.AP
1 1 1 Pin SIZE_0_.C
1 3 1 Pin DS_030.OE
5 9 1 Pin DS_030.D-
1 1 1 Pin DS_030.AP
1 1 1 Pin DS_030.C
1 1 1 Pin UDS_000.OE
7 9 1 Pin UDS_000.D-
1 1 1 Pin UDS_000.AP
1 1 1 Pin UDS_000.C
1 1 1 Pin LDS_000.OE
11 11 1 Pin LDS_000.D-
1 1 1 Pin LDS_000.AP
1 1 1 Pin LDS_000.C
1 3 1 Pin A0.OE
2 7 1 Pin A0.D
1 1 1 Pin A0.AP
1 1 1 Pin A0.C
2 6 1 Pin BG_000.D-
1 1 1 Pin BG_000.AP
1 1 1 Pin BG_000.C
2 4 1 Pin BGACK_030.D
1 1 1 Pin BGACK_030.AP
1 1 1 Pin BGACK_030.C
1 1 1 Pin CLK_EXP.AR
1 1 1 Pin CLK_EXP.D
1 1 1 Pin CLK_EXP.C
2 10 1 Pin FPU_CS.D-
1 1 1 Pin FPU_CS.AP
1 1 1 Pin FPU_CS.C
3 4 1 Pin IPL_030_1_.D
1 1 1 Pin IPL_030_1_.AP
1 1 1 Pin IPL_030_1_.C
3 4 1 Pin IPL_030_0_.D
1 1 1 Pin IPL_030_0_.AP
1 1 1 Pin IPL_030_0_.C
3 6 1 PinX1 E.D.X1
1 1 1 PinX2 E.D.X2
1 1 1 Pin E.AR
1 1 1 Pin E.C
4 7 1 Pin VMA.D-
1 1 1 Pin VMA.AP
1 1 1 Pin VMA.C
1 1 1 Pin RESET.AR
1 0 1 Pin RESET.D
1 1 1 Pin RESET.C
7 9 1 Pin AMIGA_BUS_ENABLE.D-
1 1 1 Pin AMIGA_BUS_ENABLE.AP
1 1 1 Pin AMIGA_BUS_ENABLE.C
7 17 1 Node inst_AS_030_000_SYNC.D
1 1 1 Node inst_AS_030_000_SYNC.AP
1 1 1 Node inst_AS_030_000_SYNC.C
2 7 1 Node inst_DTACK_SYNC.D-
1 1 1 Node inst_DTACK_SYNC.AP
1 1 1 Node inst_DTACK_SYNC.C
2 9 1 Node inst_VPA_SYNC.D-
1 1 1 Node inst_VPA_SYNC.AP
1 1 1 Node inst_VPA_SYNC.C
1 1 1 Node inst_VPA_D.D
1 1 1 Node inst_VPA_D.AP
1 1 1 Node inst_VPA_D.C
1 1 1 Node inst_CLK_000_D0.D
1 1 1 Node inst_CLK_000_D0.AP
1 1 1 Node inst_CLK_000_D0.C
1 1 1 Node inst_CLK_000_D1.D
1 1 1 Node inst_CLK_000_D1.AP
1 1 1 Node inst_CLK_000_D1.C
1 1 1 Node inst_CLK_000_D2.D
1 1 1 Node inst_CLK_000_D2.AP
1 1 1 Node inst_CLK_000_D2.C
1 1 1 Node inst_CLK_000_D5.D
1 1 1 Node inst_CLK_000_D5.AP
1 1 1 Node inst_CLK_000_D5.C
1 1 1 Node inst_CLK_OUT_PRE.AR
2 2 1 Node inst_CLK_OUT_PRE.D
1 1 1 Node inst_CLK_OUT_PRE.C
1 1 1 Node inst_BGACK_030_INT_D.D
1 1 1 Node inst_BGACK_030_INT_D.AP
1 1 1 Node inst_BGACK_030_INT_D.C
1 1 1 Node CLK_CNT_P_0_.AR
1 1 1 Node CLK_CNT_P_0_.D
1 1 1 Node CLK_CNT_P_0_.C
1 1 1 Node SM_AMIGA_5_.AR
3 4 1 Node SM_AMIGA_5_.D
1 1 1 Node SM_AMIGA_5_.C
1 1 1 Node inst_CLK_000_D4.D
1 1 1 Node inst_CLK_000_D4.AP
1 1 1 Node inst_CLK_000_D4.C
6 10 1 Node SM_AMIGA_7_.D
1 1 1 Node SM_AMIGA_7_.AP
1 1 1 Node SM_AMIGA_7_.C
1 1 1 Node SM_AMIGA_1_.AR
4 6 1 Node SM_AMIGA_1_.D
1 1 1 Node SM_AMIGA_1_.C
3 6 1 NodeX1 SM_AMIGA_0_.D.X1
1 4 1 NodeX2 SM_AMIGA_0_.D.X2
1 1 1 Node SM_AMIGA_0_.AR
1 1 1 Node SM_AMIGA_0_.C
1 1 1 Node SM_AMIGA_6_.AR
3 8 1 Node SM_AMIGA_6_.D
1 1 1 Node SM_AMIGA_6_.C
1 1 1 Node inst_CLK_000_D3.D
1 1 1 Node inst_CLK_000_D3.AP
1 1 1 Node inst_CLK_000_D3.C
1 1 1 Node SM_AMIGA_3_.AR
4 6 1 Node SM_AMIGA_3_.D
1 1 1 Node SM_AMIGA_3_.C
1 1 1 Node SM_AMIGA_4_.AR
3 4 1 Node SM_AMIGA_4_.D
1 1 1 Node SM_AMIGA_4_.C
1 1 1 Node SM_AMIGA_2_.AR
4 6 1 Node SM_AMIGA_2_.D
1 1 1 Node SM_AMIGA_2_.C
1 1 1 Node cpu_est_0_.AR
3 3 1 Node cpu_est_0_.D
1 1 1 Node cpu_est_0_.C
1 1 1 Node cpu_est_1_.AR
4 6 1 Node cpu_est_1_.T
1 1 1 Node cpu_est_1_.C
3 6 1 NodeX1 cpu_est_2_.D.X1
1 1 1 NodeX2 cpu_est_2_.D.X2
1 1 1 Node cpu_est_2_.AR
1 1 1 Node cpu_est_2_.C
=========
245 P-Term Total: 245
Total Pins: 59
Total Nodes: 24
Average P-Term/Output: 2
Equations:
BERR = (0);
BERR.OE = (!FPU_CS.Q);
CLK_DIV_OUT.AR = (!RST);
CLK_DIV_OUT.D = (inst_CLK_OUT_PRE.Q);
CLK_DIV_OUT.C = (CLK_OSZI);
DTACK = (DSACK_1_.PIN);
DTACK.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q);
AVEC = (1);
AVEC_EXP = (0);
AVEC_EXP.OE = (!FPU_CS.Q);
DSACK_0_ = (1);
DSACK_0_.OE = (nEXP_SPACE);
AMIGA_BUS_DATA_DIR = (!RW & BGACK_030.Q
# !nEXP_SPACE & RW & !BGACK_030.Q);
AMIGA_BUS_ENABLE_LOW = (1);
CIIN = (A_23_ & A_22_ & A_21_ & A_20_);
CIIN.OE = (!A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_);
SIZE_1_.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q);
!SIZE_1_.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !SIZE_1_.Q
# !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & LDS_000.PIN
# !CLK_030 & !BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN);
SIZE_1_.AP = (!RST);
SIZE_1_.C = (CLK_OSZI);
IPL_030_2_.D = (!inst_CLK_000_D0.Q & IPL_030_2_.Q
# inst_CLK_000_D1.Q & IPL_030_2_.Q
# IPL_2_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
IPL_030_2_.AP = (!RST);
IPL_030_2_.C = (CLK_OSZI);
DSACK_1_.OE = (nEXP_SPACE);
!DSACK_1_.D = (!DSACK_1_.Q & !AS_030.PIN
# BGACK_030.Q & !inst_CLK_000_D5.Q & inst_CLK_000_D4.Q & SM_AMIGA_1_.Q);
DSACK_1_.AP = (!RST);
DSACK_1_.C = (CLK_OSZI);
AS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q);
!AS_030.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !AS_030.Q
# !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN
# !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !LDS_000.PIN);
AS_030.AP = (!RST);
AS_030.C = (CLK_OSZI);
AS_000.OE = (BGACK_030.Q);
!AS_000.D = (!AS_000.Q & !AS_030.PIN
# BGACK_030.Q & SM_AMIGA_5_.Q & inst_CLK_000_D4.Q);
AS_000.AP = (!RST);
AS_000.C = (CLK_OSZI);
SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q);
!SIZE_0_.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !SIZE_0_.Q
# !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & !LDS_000.PIN);
SIZE_0_.AP = (!RST);
SIZE_0_.C = (CLK_OSZI);
DS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q);
!DS_030.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !DS_030.Q
# !CLK_030 & RW & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN
# !CLK_030 & !BGACK_030.Q & !AS_030.Q & !AS_000.PIN & !UDS_000.PIN
# !CLK_030 & RW & !BGACK_030.Q & !AS_000.PIN & !LDS_000.PIN
# !CLK_030 & !BGACK_030.Q & !AS_030.Q & !AS_000.PIN & !LDS_000.PIN);
DS_030.AP = (!RST);
DS_030.C = (CLK_OSZI);
UDS_000.OE = (BGACK_030.Q);
!UDS_000.D = (!BGACK_030.Q & !UDS_000.Q & !AS_030.PIN
# !UDS_000.Q & !AS_030.PIN & DS_030.PIN
# RW & !SM_AMIGA_5_.Q & !UDS_000.Q & !AS_030.PIN
# RW & !inst_CLK_000_D4.Q & !UDS_000.Q & !AS_030.PIN
# !RW & !UDS_000.Q & !SM_AMIGA_4_.Q & !AS_030.PIN
# !RW & BGACK_030.Q & SM_AMIGA_4_.Q & !DS_030.PIN & !A0.PIN
# RW & BGACK_030.Q & SM_AMIGA_5_.Q & inst_CLK_000_D4.Q & !DS_030.PIN & !A0.PIN);
UDS_000.AP = (!RST);
UDS_000.C = (CLK_OSZI);
LDS_000.OE = (BGACK_030.Q);
!LDS_000.D = (!BGACK_030.Q & !LDS_000.Q & !AS_030.PIN
# !LDS_000.Q & !AS_030.PIN & DS_030.PIN
# RW & !SM_AMIGA_5_.Q & !LDS_000.Q & !AS_030.PIN
# RW & !inst_CLK_000_D4.Q & !LDS_000.Q & !AS_030.PIN
# !RW & !LDS_000.Q & !SM_AMIGA_4_.Q & !AS_030.PIN
# !RW & BGACK_030.Q & SM_AMIGA_4_.Q & !DS_030.PIN & !SIZE_0_.PIN
# !RW & BGACK_030.Q & SM_AMIGA_4_.Q & !DS_030.PIN & SIZE_1_.PIN
# !RW & BGACK_030.Q & SM_AMIGA_4_.Q & !DS_030.PIN & A0.PIN
# RW & BGACK_030.Q & SM_AMIGA_5_.Q & inst_CLK_000_D4.Q & !DS_030.PIN & !SIZE_0_.PIN
# RW & BGACK_030.Q & SM_AMIGA_5_.Q & inst_CLK_000_D4.Q & !DS_030.PIN & SIZE_1_.PIN
# RW & BGACK_030.Q & SM_AMIGA_5_.Q & inst_CLK_000_D4.Q & !DS_030.PIN & A0.PIN);
LDS_000.AP = (!RST);
LDS_000.C = (CLK_OSZI);
A0.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q);
A0.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & A0.Q
# !CLK_030 & !BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN);
A0.AP = (!RST);
A0.C = (CLK_OSZI);
!BG_000.D = (!BG_030 & !BG_000.Q
# nEXP_SPACE & !BG_030 & CLK_000 & SM_AMIGA_7_.Q & AS_030.PIN);
BG_000.AP = (!RST);
BG_000.C = (CLK_OSZI);
BGACK_030.D = (BGACK_000 & BGACK_030.Q
# BGACK_000 & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
BGACK_030.AP = (!RST);
BGACK_030.C = (CLK_OSZI);
CLK_EXP.AR = (!RST);
CLK_EXP.D = (inst_CLK_OUT_PRE.Q);
CLK_EXP.C = (CLK_OSZI);
!FPU_CS.D = (!FPU_CS.Q & !AS_030.PIN
# FC_1_ & BGACK_000 & CLK_030 & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & !AS_030.PIN);
FPU_CS.AP = (!RST);
FPU_CS.C = (CLK_OSZI);
IPL_030_1_.D = (!inst_CLK_000_D0.Q & IPL_030_1_.Q
# inst_CLK_000_D1.Q & IPL_030_1_.Q
# IPL_1_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
IPL_030_1_.AP = (!RST);
IPL_030_1_.C = (CLK_OSZI);
IPL_030_0_.D = (!inst_CLK_000_D0.Q & IPL_030_0_.Q
# inst_CLK_000_D1.Q & IPL_030_0_.Q
# IPL_0_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
IPL_030_0_.AP = (!RST);
IPL_030_0_.C = (CLK_OSZI);
E.D.X1 = (inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & cpu_est_1_.Q & cpu_est_2_.Q & E.Q
# inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & cpu_est_0_.Q & !cpu_est_2_.Q & !E.Q
# inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !E.Q);
E.D.X2 = (E.Q);
E.AR = (!RST);
E.C = (CLK_OSZI);
!VMA.D = (!BGACK_030.Q & !VMA.Q
# !VMA.Q & !SM_AMIGA_7_.Q
# !BGACK_030.Q & !inst_VPA_D.Q & !inst_CLK_000_D0.Q & cpu_est_0_.Q & !cpu_est_1_.Q
# !inst_VPA_D.Q & !inst_CLK_000_D0.Q & !SM_AMIGA_7_.Q & cpu_est_0_.Q & !cpu_est_1_.Q);
VMA.AP = (!RST);
VMA.C = (CLK_OSZI);
RESET.AR = (!RST);
RESET.D = (1);
RESET.C = (CLK_OSZI);
!AMIGA_BUS_ENABLE.D = (!BGACK_030.Q & inst_BGACK_030_INT_D.Q
# !BGACK_030.Q & !AMIGA_BUS_ENABLE.Q
# nEXP_SPACE & BGACK_030.Q & !inst_CLK_000_D4.Q & SM_AMIGA_6_.Q
# !nEXP_SPACE & inst_BGACK_030_INT_D.Q & !AMIGA_BUS_ENABLE.Q & !AS_030.PIN
# inst_BGACK_030_INT_D.Q & !SM_AMIGA_6_.Q & !AMIGA_BUS_ENABLE.Q & !AS_030.PIN
# !nEXP_SPACE & inst_BGACK_030_INT_D.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q & !AMIGA_BUS_ENABLE.Q
# inst_BGACK_030_INT_D.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_6_.Q & !AMIGA_BUS_ENABLE.Q);
AMIGA_BUS_ENABLE.AP = (!RST);
AMIGA_BUS_ENABLE.C = (CLK_OSZI);
inst_AS_030_000_SYNC.D = (AS_030.PIN
# !nEXP_SPACE & inst_AS_030_000_SYNC.Q
# !CLK_030 & inst_AS_030_000_SYNC.Q
# inst_AS_030_000_SYNC.Q & !SM_AMIGA_7_.Q
# !nEXP_SPACE & BGACK_030.Q & SM_AMIGA_6_.Q
# BGACK_030.Q & !inst_CLK_000_D5.Q & inst_CLK_000_D4.Q & SM_AMIGA_1_.Q
# FC_1_ & BGACK_000 & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & inst_AS_030_000_SYNC.Q);
inst_AS_030_000_SYNC.AP = (!RST);
inst_AS_030_000_SYNC.C = (CLK_OSZI);
!inst_DTACK_SYNC.D = (!inst_DTACK_SYNC.Q & !AS_030.PIN
# BGACK_030.Q & inst_VPA_D.Q & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !DTACK.PIN);
inst_DTACK_SYNC.AP = (!RST);
inst_DTACK_SYNC.C = (CLK_OSZI);
!inst_VPA_SYNC.D = (!inst_VPA_SYNC.Q & !AS_030.PIN
# BGACK_030.Q & !VMA.Q & !inst_VPA_D.Q & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !cpu_est_1_.Q & E.Q);
inst_VPA_SYNC.AP = (!RST);
inst_VPA_SYNC.C = (CLK_OSZI);
inst_VPA_D.D = (VPA);
inst_VPA_D.AP = (!RST);
inst_VPA_D.C = (CLK_OSZI);
inst_CLK_000_D0.D = (CLK_000);
inst_CLK_000_D0.AP = (!RST);
inst_CLK_000_D0.C = (CLK_OSZI);
inst_CLK_000_D1.D = (inst_CLK_000_D0.Q);
inst_CLK_000_D1.AP = (!RST);
inst_CLK_000_D1.C = (CLK_OSZI);
inst_CLK_000_D2.D = (inst_CLK_000_D1.Q);
inst_CLK_000_D2.AP = (!RST);
inst_CLK_000_D2.C = (CLK_OSZI);
inst_CLK_000_D5.D = (inst_CLK_000_D4.Q);
inst_CLK_000_D5.AP = (!RST);
inst_CLK_000_D5.C = (CLK_OSZI);
inst_CLK_OUT_PRE.AR = (!RST);
inst_CLK_OUT_PRE.D = (!inst_CLK_OUT_PRE.Q & CLK_CNT_P_0_.Q
# inst_CLK_OUT_PRE.Q & !CLK_CNT_P_0_.Q);
inst_CLK_OUT_PRE.C = (CLK_OSZI);
inst_BGACK_030_INT_D.D = (BGACK_030.Q);
inst_BGACK_030_INT_D.AP = (!RST);
inst_BGACK_030_INT_D.C = (CLK_OSZI);
CLK_CNT_P_0_.AR = (!RST);
CLK_CNT_P_0_.D = (!CLK_CNT_P_0_.Q);
CLK_CNT_P_0_.C = (CLK_OSZI);
SM_AMIGA_5_.AR = (!RST);
SM_AMIGA_5_.D = (!BGACK_030.Q & SM_AMIGA_5_.Q
# inst_CLK_000_D0.Q & SM_AMIGA_5_.Q
# BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_6_.Q);
SM_AMIGA_5_.C = (CLK_OSZI);
inst_CLK_000_D4.D = (inst_CLK_000_D3.Q);
inst_CLK_000_D4.AP = (!RST);
inst_CLK_000_D4.C = (CLK_OSZI);
SM_AMIGA_7_.D = (!BGACK_030.Q & SM_AMIGA_7_.Q
# inst_AS_030_000_SYNC.Q & SM_AMIGA_7_.Q
# inst_CLK_000_D2.Q & SM_AMIGA_7_.Q
# SM_AMIGA_7_.Q & !inst_CLK_000_D3.Q
# !nEXP_SPACE & BGACK_030.Q & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q
# BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_0_.Q & AS_000.Q);
SM_AMIGA_7_.AP = (!RST);
SM_AMIGA_7_.C = (CLK_OSZI);
SM_AMIGA_1_.AR = (!RST);
SM_AMIGA_1_.D = (!BGACK_030.Q & SM_AMIGA_1_.Q
# inst_CLK_000_D0.Q & SM_AMIGA_1_.Q
# !inst_CLK_000_D5.Q & inst_CLK_000_D4.Q & SM_AMIGA_1_.Q
# BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_2_.Q);
SM_AMIGA_1_.C = (CLK_OSZI);
SM_AMIGA_0_.D.X1 = (SM_AMIGA_0_.Q
# BGACK_030.Q & !inst_CLK_000_D0.Q & inst_CLK_000_D5.Q & SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q
# BGACK_030.Q & !inst_CLK_000_D0.Q & !inst_CLK_000_D4.Q & SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q);
SM_AMIGA_0_.D.X2 = (BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_0_.Q & AS_000.Q);
SM_AMIGA_0_.AR = (!RST);
SM_AMIGA_0_.C = (CLK_OSZI);
SM_AMIGA_6_.AR = (!RST);
SM_AMIGA_6_.D = (!BGACK_030.Q & SM_AMIGA_6_.Q
# nEXP_SPACE & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q
# BGACK_030.Q & !inst_AS_030_000_SYNC.Q & !inst_CLK_000_D2.Q & SM_AMIGA_7_.Q & inst_CLK_000_D3.Q);
SM_AMIGA_6_.C = (CLK_OSZI);
inst_CLK_000_D3.D = (inst_CLK_000_D2.Q);
inst_CLK_000_D3.AP = (!RST);
inst_CLK_000_D3.C = (CLK_OSZI);
SM_AMIGA_3_.AR = (!RST);
SM_AMIGA_3_.D = (!BGACK_030.Q & SM_AMIGA_3_.Q
# inst_CLK_000_D0.Q & SM_AMIGA_3_.Q
# inst_DTACK_SYNC.Q & inst_VPA_SYNC.Q & SM_AMIGA_3_.Q
# BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q);
SM_AMIGA_3_.C = (CLK_OSZI);
SM_AMIGA_4_.AR = (!RST);
SM_AMIGA_4_.D = (!BGACK_030.Q & SM_AMIGA_4_.Q
# !inst_CLK_000_D0.Q & SM_AMIGA_4_.Q
# BGACK_030.Q & !inst_CLK_000_D0.Q & SM_AMIGA_5_.Q);
SM_AMIGA_4_.C = (CLK_OSZI);
SM_AMIGA_2_.AR = (!RST);
SM_AMIGA_2_.D = (!BGACK_030.Q & SM_AMIGA_2_.Q
# !inst_CLK_000_D0.Q & SM_AMIGA_2_.Q
# BGACK_030.Q & !inst_DTACK_SYNC.Q & !inst_CLK_000_D0.Q & SM_AMIGA_3_.Q
# BGACK_030.Q & !inst_VPA_SYNC.Q & !inst_CLK_000_D0.Q & SM_AMIGA_3_.Q);
SM_AMIGA_2_.C = (CLK_OSZI);
cpu_est_0_.AR = (!RST);
cpu_est_0_.D = (!inst_CLK_000_D0.Q & cpu_est_0_.Q
# inst_CLK_000_D1.Q & cpu_est_0_.Q
# inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & !cpu_est_0_.Q);
cpu_est_0_.C = (CLK_OSZI);
cpu_est_1_.AR = (!RST);
cpu_est_1_.T = (inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & !cpu_est_1_.Q & cpu_est_2_.Q & E.Q
# inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & cpu_est_0_.Q & !cpu_est_2_.Q & E.Q
# inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & cpu_est_0_.Q & cpu_est_2_.Q & !E.Q
# inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !E.Q);
cpu_est_1_.C = (CLK_OSZI);
cpu_est_2_.D.X1 = (inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_2_.Q
# inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & cpu_est_0_.Q & !cpu_est_2_.Q & E.Q
# inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & cpu_est_0_.Q & !cpu_est_1_.Q & cpu_est_2_.Q & !E.Q);
cpu_est_2_.D.X2 = (cpu_est_2_.Q);
cpu_est_2_.AR = (!RST);
cpu_est_2_.C = (CLK_OSZI);
Reverse-Polarity Equations:
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