68030tk/Logic/synwork/BUS68030_compiler.tlg
2014-05-25 21:20:36 +02:00

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@N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral
Post processing for work.bus68030.behavioral
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":221:2:221:3|Pruning register CLK_REF(1 downto 0)
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":122:34:122:36|Pruning register CLK_000_D6
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:2:131:3|Pruning register CLK_CNT_N(1 downto 0)
@W: CL190 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":144:2:144:3|Optimizing register bit CLK_CNT_P(1) to a constant 0
@W: CL260 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":144:2:144:3|Pruning register bit 1 of CLK_CNT_P(1 downto 0)
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":221:2:221:3|Trying to extract state machine for register SM_AMIGA
Extracted state machine for register SM_AMIGA
State machine has 8 reachable states with original encodings of:
000
001
010
011
100
101
110
111
@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":116:34:116:36|Trying to extract state machine for register cpu_est
Extracted state machine for register cpu_est
State machine has 11 reachable states with original encodings of:
0000
0010
0011
0100
0101
0110
0111
1010
1011
1100
1111