mirror of https://github.com/kr239/68030tk.git
678 lines
8.4 KiB
Plaintext
678 lines
8.4 KiB
Plaintext
MODELDATA
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MODELDATA_VERSION "1.0";
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DESIGN "68030_tk";
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DATE "Sun Feb 01 21:13:56 2015";
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VENDOR "Lattice Semiconductor Corporation";
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PROGRAM "STAMP Model Generator";
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/* port drive, max transition and max capacitance */
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PORTDATA
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A1: MAXTRANS(0.0);
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A_16: MAXTRANS(0.0);
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A_17: MAXTRANS(0.0);
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A_18: MAXTRANS(0.0);
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A_19: MAXTRANS(0.0);
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A_20: MAXTRANS(0.0);
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A_21: MAXTRANS(0.0);
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A_22: MAXTRANS(0.0);
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A_23: MAXTRANS(0.0);
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A_24: MAXTRANS(0.0);
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A_25: MAXTRANS(0.0);
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A_26: MAXTRANS(0.0);
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A_27: MAXTRANS(0.0);
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A_28: MAXTRANS(0.0);
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A_29: MAXTRANS(0.0);
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A_30: MAXTRANS(0.0);
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A_31: MAXTRANS(0.0);
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BGACK_000: MAXTRANS(0.0);
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BG_030: MAXTRANS(0.0);
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CLK_000: MAXTRANS(0.0);
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CLK_030: MAXTRANS(0.0);
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CLK_OSZI: MAXTRANS(0.0);
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DTACK: MAXTRANS(0.0);
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FC_0: MAXTRANS(0.0);
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FC_1: MAXTRANS(0.0);
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FPU_SENSE: MAXTRANS(0.0);
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IPL_0: MAXTRANS(0.0);
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IPL_1: MAXTRANS(0.0);
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IPL_2: MAXTRANS(0.0);
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RST: MAXTRANS(0.0);
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VPA: MAXTRANS(0.0);
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nEXP_SPACE: MAXTRANS(0.0);
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AMIGA_ADDR_ENABLE: MAXTRANS(0.0);
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AMIGA_BUS_DATA_DIR: MAXTRANS(0.0);
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AMIGA_BUS_ENABLE_HIGH: MAXTRANS(0.0);
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AMIGA_BUS_ENABLE_LOW: MAXTRANS(0.0);
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AVEC: MAXTRANS(0.0);
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BGACK_030: MAXTRANS(0.0);
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BG_000: MAXTRANS(0.0);
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CIIN: MAXTRANS(0.0);
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CLK_DIV_OUT: MAXTRANS(0.0);
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CLK_EXP: MAXTRANS(0.0);
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DSACK1: MAXTRANS(0.0);
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E: MAXTRANS(0.0);
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FPU_CS: MAXTRANS(0.0);
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IPL_030_0: MAXTRANS(0.0);
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IPL_030_1: MAXTRANS(0.0);
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IPL_030_2: MAXTRANS(0.0);
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RESET: MAXTRANS(0.0);
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VMA: MAXTRANS(0.0);
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A0: MAXTRANS(0.0);
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AS_000: MAXTRANS(0.0);
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AS_030: MAXTRANS(0.0);
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BERR: MAXTRANS(0.0);
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DS_030: MAXTRANS(0.0);
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LDS_000: MAXTRANS(0.0);
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RW: MAXTRANS(0.0);
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RW_000: MAXTRANS(0.0);
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SIZE_0: MAXTRANS(0.0);
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SIZE_1: MAXTRANS(0.0);
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UDS_000: MAXTRANS(0.0);
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ENDPORTDATA
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/* timing arc data */
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TIMINGDATA
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ARCDATA
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AS_030_AS_000_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_20_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_21_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_22_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_23_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_24_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_25_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_26_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_27_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_28_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_29_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_30_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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A_31_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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DS_030_LDS_000_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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DS_030_UDS_000_delay:
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CELL_RISE(scalar) {
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VALUES(15.0);
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}
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CELL_FALL(scalar) {
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VALUES(15.0);
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}
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ENDARCDATA
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ARCDATA
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AS_000_AMIGA_BUS_DATA_DIR_delay:
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CELL_RISE(scalar) {
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VALUES(12.5);
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}
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CELL_FALL(scalar) {
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VALUES(12.5);
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}
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ENDARCDATA
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ARCDATA
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AS_030_FPU_CS_delay:
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CELL_RISE(scalar) {
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VALUES(12.5);
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}
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CELL_FALL(scalar) {
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VALUES(12.5);
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}
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ENDARCDATA
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ARCDATA
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A_16_FPU_CS_delay:
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CELL_RISE(scalar) {
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VALUES(12.5);
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}
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CELL_FALL(scalar) {
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VALUES(12.5);
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}
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ENDARCDATA
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ARCDATA
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A_17_FPU_CS_delay:
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CELL_RISE(scalar) {
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VALUES(12.5);
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}
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CELL_FALL(scalar) {
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VALUES(12.5);
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}
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ENDARCDATA
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ARCDATA
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A_18_FPU_CS_delay:
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CELL_RISE(scalar) {
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VALUES(12.5);
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}
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CELL_FALL(scalar) {
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VALUES(12.5);
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}
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ENDARCDATA
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ARCDATA
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A_19_FPU_CS_delay:
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CELL_RISE(scalar) {
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VALUES(12.5);
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}
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CELL_FALL(scalar) {
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VALUES(12.5);
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}
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ENDARCDATA
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ARCDATA
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BGACK_000_FPU_CS_delay:
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CELL_RISE(scalar) {
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VALUES(12.5);
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}
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CELL_FALL(scalar) {
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VALUES(12.5);
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}
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ENDARCDATA
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ARCDATA
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FC_0_FPU_CS_delay:
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CELL_RISE(scalar) {
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VALUES(12.5);
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}
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CELL_FALL(scalar) {
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VALUES(12.5);
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}
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ENDARCDATA
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ARCDATA
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FC_1_FPU_CS_delay:
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CELL_RISE(scalar) {
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VALUES(12.5);
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}
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CELL_FALL(scalar) {
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VALUES(12.5);
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}
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ENDARCDATA
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ARCDATA
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FPU_SENSE_FPU_CS_delay:
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CELL_RISE(scalar) {
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VALUES(12.5);
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}
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CELL_FALL(scalar) {
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VALUES(12.5);
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}
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ENDARCDATA
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ARCDATA
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RW_000_AMIGA_BUS_DATA_DIR_delay:
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CELL_RISE(scalar) {
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VALUES(12.5);
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}
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CELL_FALL(scalar) {
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VALUES(12.5);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_AS_000_delay:
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CELL_RISE(scalar) {
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VALUES(18.0);
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}
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CELL_FALL(scalar) {
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VALUES(18.0);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_CIIN_delay:
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CELL_RISE(scalar) {
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VALUES(18.0);
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}
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CELL_FALL(scalar) {
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VALUES(18.0);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_LDS_000_delay:
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CELL_RISE(scalar) {
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VALUES(18.0);
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}
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CELL_FALL(scalar) {
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VALUES(18.0);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_LDS_000_delay:
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CELL_RISE(scalar) {
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VALUES(18.0);
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}
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CELL_FALL(scalar) {
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VALUES(18.0);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_SIZE_0_delay:
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CELL_RISE(scalar) {
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VALUES(18.0);
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}
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CELL_FALL(scalar) {
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VALUES(18.0);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_SIZE_0_delay:
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CELL_RISE(scalar) {
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VALUES(18.0);
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}
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CELL_FALL(scalar) {
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VALUES(18.0);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_SIZE_1_delay:
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CELL_RISE(scalar) {
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VALUES(18.0);
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}
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CELL_FALL(scalar) {
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VALUES(18.0);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_SIZE_1_delay:
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CELL_RISE(scalar) {
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VALUES(18.0);
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}
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CELL_FALL(scalar) {
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VALUES(18.0);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_UDS_000_delay:
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CELL_RISE(scalar) {
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VALUES(18.0);
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}
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CELL_FALL(scalar) {
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VALUES(18.0);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_UDS_000_delay:
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CELL_RISE(scalar) {
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VALUES(18.0);
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}
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CELL_FALL(scalar) {
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VALUES(18.0);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_AMIGA_BUS_DATA_DIR_delay:
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CELL_RISE(scalar) {
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VALUES(15.5);
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}
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CELL_FALL(scalar) {
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VALUES(15.5);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_AMIGA_BUS_DATA_DIR_delay:
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CELL_RISE(scalar) {
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VALUES(15.5);
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}
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CELL_FALL(scalar) {
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VALUES(15.5);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_AMIGA_BUS_ENABLE_HIGH_delay:
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CELL_RISE(scalar) {
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VALUES(15.5);
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}
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CELL_FALL(scalar) {
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VALUES(15.5);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_AMIGA_BUS_ENABLE_HIGH_delay:
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CELL_RISE(scalar) {
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VALUES(15.5);
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}
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CELL_FALL(scalar) {
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VALUES(15.5);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_AMIGA_BUS_ENABLE_HIGH_delay:
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CELL_RISE(scalar) {
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VALUES(15.5);
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}
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CELL_FALL(scalar) {
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VALUES(15.5);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_AMIGA_BUS_ENABLE_LOW_delay:
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CELL_RISE(scalar) {
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VALUES(15.5);
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}
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CELL_FALL(scalar) {
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VALUES(15.5);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_AMIGA_BUS_ENABLE_LOW_delay:
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CELL_RISE(scalar) {
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VALUES(15.5);
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}
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CELL_FALL(scalar) {
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VALUES(15.5);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_CLK_DIV_OUT_delay:
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CELL_RISE(scalar) {
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VALUES(15.5);
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}
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CELL_FALL(scalar) {
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VALUES(15.5);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_CLK_EXP_delay:
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CELL_RISE(scalar) {
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VALUES(15.5);
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}
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CELL_FALL(scalar) {
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VALUES(15.5);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_A0_delay:
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CELL_RISE(scalar) {
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VALUES(8.5);
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}
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CELL_FALL(scalar) {
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VALUES(8.5);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_AS_030_delay:
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CELL_RISE(scalar) {
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VALUES(8.5);
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}
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CELL_FALL(scalar) {
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VALUES(8.5);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_BGACK_030_delay:
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CELL_RISE(scalar) {
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VALUES(8.5);
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}
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CELL_FALL(scalar) {
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VALUES(8.5);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_BG_000_delay:
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CELL_RISE(scalar) {
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VALUES(8.5);
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}
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CELL_FALL(scalar) {
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VALUES(8.5);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_DSACK1_delay:
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CELL_RISE(scalar) {
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VALUES(8.5);
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}
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CELL_FALL(scalar) {
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VALUES(8.5);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_DS_030_delay:
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CELL_RISE(scalar) {
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VALUES(8.5);
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}
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CELL_FALL(scalar) {
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VALUES(8.5);
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}
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ENDARCDATA
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ARCDATA
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CLK_OSZI_E_delay:
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CELL_RISE(scalar) {
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VALUES(8.5);
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}
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CELL_FALL(scalar) {
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VALUES(8.5);
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}
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ENDARCDATA
|
|
|
|
ARCDATA
|
|
CLK_OSZI_IPL_030_0_delay:
|
|
CELL_RISE(scalar) {
|
|
VALUES(8.5);
|
|
}
|
|
CELL_FALL(scalar) {
|
|
VALUES(8.5);
|
|
}
|
|
ENDARCDATA
|
|
|
|
ARCDATA
|
|
CLK_OSZI_IPL_030_1_delay:
|
|
CELL_RISE(scalar) {
|
|
VALUES(8.5);
|
|
}
|
|
CELL_FALL(scalar) {
|
|
VALUES(8.5);
|
|
}
|
|
ENDARCDATA
|
|
|
|
ARCDATA
|
|
CLK_OSZI_IPL_030_2_delay:
|
|
CELL_RISE(scalar) {
|
|
VALUES(8.5);
|
|
}
|
|
CELL_FALL(scalar) {
|
|
VALUES(8.5);
|
|
}
|
|
ENDARCDATA
|
|
|
|
ARCDATA
|
|
CLK_OSZI_RESET_delay:
|
|
CELL_RISE(scalar) {
|
|
VALUES(8.5);
|
|
}
|
|
CELL_FALL(scalar) {
|
|
VALUES(8.5);
|
|
}
|
|
ENDARCDATA
|
|
|
|
ARCDATA
|
|
CLK_OSZI_RW_delay:
|
|
CELL_RISE(scalar) {
|
|
VALUES(8.5);
|
|
}
|
|
CELL_FALL(scalar) {
|
|
VALUES(8.5);
|
|
}
|
|
ENDARCDATA
|
|
|
|
ARCDATA
|
|
CLK_OSZI_RW_000_delay:
|
|
CELL_RISE(scalar) {
|
|
VALUES(8.5);
|
|
}
|
|
CELL_FALL(scalar) {
|
|
VALUES(8.5);
|
|
}
|
|
ENDARCDATA
|
|
|
|
ARCDATA
|
|
CLK_OSZI_VMA_delay:
|
|
CELL_RISE(scalar) {
|
|
VALUES(8.5);
|
|
}
|
|
CELL_FALL(scalar) {
|
|
VALUES(8.5);
|
|
}
|
|
ENDARCDATA
|
|
|
|
ARCDATA
|
|
CLK_OSZI_AMIGA_ADDR_ENABLE_delay:
|
|
CELL_RISE(scalar) {
|
|
VALUES(6.0);
|
|
}
|
|
CELL_FALL(scalar) {
|
|
VALUES(6.0);
|
|
}
|
|
ENDARCDATA
|
|
|
|
ENDTIMINGDATA
|
|
ENDMODELDATA
|