mirror of
https://github.com/garrettsworkshop/GW28R8128.git
synced 2024-11-21 06:30:48 +00:00
Finished but no jumper for WE/OE
This commit is contained in:
Zane Kaminski
parent
b644a333a0
commit
f6bf64086e
27
.gitignore
vendored
Normal file
27
.gitignore
vendored
Normal file
@ -0,0 +1,27 @@
|
||||
# For PCBs designed using KiCad: http://www.kicad-pcb.org/
|
||||
|
||||
# Temporary files
|
||||
*.000
|
||||
*.bak
|
||||
*.bck
|
||||
*.kicad_pcb-bak
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||||
*~
|
||||
_autosave-*
|
||||
*.tmp
|
||||
*-rescue.lib
|
||||
*-save.pro
|
||||
*-save.kicad_pcb
|
||||
fp-info-cache
|
||||
|
||||
# Netlist files (exported from Eeschema)
|
||||
*.net
|
||||
|
||||
# Autorouter files (exported from Pcbnew)
|
||||
*.dsn
|
||||
*.ses
|
||||
|
||||
# Exported BOM files
|
||||
*.xml
|
||||
*.csv
|
||||
|
||||
*.DS_Store
|
||||
258
28SF8128.pro
Normal file
258
28SF8128.pro
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@ -0,0 +1,258 @@
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||||
update=Sunday, June 23, 2019 at 10:47:41 PM
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[schematic_editor]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
PlotDirectoryName=
|
||||
SubpartIdSeparator=0
|
||||
SubpartFirstId=65
|
||||
NetFmtName=
|
||||
SpiceAjustPassiveValues=0
|
||||
LabSize=50
|
||||
ERC_TestSimilarLabels=1
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=28SF8128.net
|
||||
CopperLayerCount=4
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.1524
|
||||
MinViaDiameter=0.4
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.1524
|
||||
TrackWidth2=0.2
|
||||
TrackWidth3=0.254
|
||||
TrackWidth4=0.508
|
||||
TrackWidth5=0.762
|
||||
TrackWidth6=1.27
|
||||
TrackWidth7=1.524
|
||||
ViaDiameter1=0.6
|
||||
ViaDrill1=0.3
|
||||
ViaDiameter2=0.8
|
||||
ViaDrill2=0.4
|
||||
ViaDiameter3=1.524
|
||||
ViaDrill3=0.762
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.15
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.1524
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.15
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.07619999999999999
|
||||
SolderMaskMinWidth=0.1524
|
||||
SolderPasteClearance=-0.05
|
||||
SolderPasteRatio=0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.1524
|
||||
TrackWidth=0.1524
|
||||
ViaDiameter=0.6
|
||||
ViaDrill=0.3
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
314
28SF8128.sch
Normal file
314
28SF8128.sch
Normal file
@ -0,0 +1,314 @@
|
||||
EESchema Schematic File Version 4
|
||||
EELAYER 29 0
|
||||
EELAYER END
|
||||
$Descr USLetter 11000 8500
|
||||
encoding utf-8
|
||||
Sheet 1 1
|
||||
Title ""
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp ""
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Comp
|
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L power:+5V #PWR0120
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F 0 "#PWR0120" H 2900 3900 50 0001 C CNN
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F 1 "+5V" H 2900 4200 50 0000 C CNN
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|
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Wire Wire Line
|
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$Comp
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|
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L Connector:Conn_01x14_Male J1
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||||
~OE~
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||||
Wire Wire Line
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|
||||
F 1 "GND" H 3200 3400 50 0000 C CNN
|
||||
F 2 "" H 3200 3550 50 0001 C CNN
|
||||
F 3 "" H 3200 3550 50 0001 C CNN
|
||||
1 3200 3550
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Connection ~ 3200 3350
|
||||
Text Label 1800 1950 0 50 ~ 0
|
||||
A15
|
||||
Text Label 1800 2050 0 50 ~ 0
|
||||
A12
|
||||
Text Label 1800 2150 0 50 ~ 0
|
||||
A7
|
||||
Text Label 1800 2250 0 50 ~ 0
|
||||
A6
|
||||
Text Label 1800 2350 0 50 ~ 0
|
||||
A5
|
||||
Text Label 1800 2450 0 50 ~ 0
|
||||
A4
|
||||
Text Label 1800 2550 0 50 ~ 0
|
||||
A3
|
||||
Text Label 1800 2650 0 50 ~ 0
|
||||
A2
|
||||
Text Label 1800 2850 0 50 ~ 0
|
||||
A0
|
||||
Text Label 1800 2750 0 50 ~ 0
|
||||
A1
|
||||
Text Label 2200 1550 2 50 ~ 0
|
||||
A0
|
||||
Text Label 2200 1650 2 50 ~ 0
|
||||
A1
|
||||
Text Label 1800 2950 0 50 ~ 0
|
||||
D0
|
||||
Text Label 1800 3050 0 50 ~ 0
|
||||
D1
|
||||
Wire Wire Line
|
||||
2200 3250 2200 3350
|
||||
Wire Wire Line
|
||||
3200 3550 3200 3350
|
||||
Wire Wire Line
|
||||
2200 3350 2200 3550
|
||||
Connection ~ 2200 3350
|
||||
Wire Wire Line
|
||||
2200 3550 3200 3550
|
||||
Connection ~ 3200 3550
|
||||
Text Label 1800 3150 0 50 ~ 0
|
||||
D2
|
||||
$Comp
|
||||
L power:GND #PWR0104
|
||||
U 1 1 5D15888C
|
||||
P 1800 3250
|
||||
F 0 "#PWR0104" H 1800 3000 50 0001 C CNN
|
||||
F 1 "GND" H 1800 3100 50 0000 C CNN
|
||||
F 2 "" H 1800 3250 50 0001 C CNN
|
||||
F 3 "" H 1800 3250 50 0001 C CNN
|
||||
1 1800 3250
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L Connector:Conn_01x14_Male J2
|
||||
U 1 1 5D162C4F
|
||||
P 3900 2550
|
||||
F 0 "J2" H 3872 2524 50 0000 R CNN
|
||||
F 1 "Right" H 3872 2433 50 0000 R CNN
|
||||
F 2 "Connector_PinHeader_2.54mm:PinHeader_1x14_P2.54mm_Vertical" H 3900 2550 50 0001 C CNN
|
||||
F 3 "~" H 3900 2550 50 0001 C CNN
|
||||
1 3900 2550
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:+5V #PWR0105
|
||||
U 1 1 5D1632D7
|
||||
P 3700 1950
|
||||
F 0 "#PWR0105" H 3700 1800 50 0001 C CNN
|
||||
F 1 "+5V" H 3700 2100 50 0000 C CNN
|
||||
F 2 "" H 3700 1950 50 0001 C CNN
|
||||
F 3 "" H 3700 1950 50 0001 C CNN
|
||||
1 3700 1950
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Text Label 3700 2050 2 50 ~ 0
|
||||
A14
|
||||
Text Label 3700 2150 2 50 ~ 0
|
||||
A13
|
||||
Text Label 3700 2250 2 50 ~ 0
|
||||
A8
|
||||
Text Label 3700 2350 2 50 ~ 0
|
||||
A9
|
||||
Text Label 3700 2450 2 50 ~ 0
|
||||
A11
|
||||
Text Label 3700 2550 2 50 ~ 0
|
||||
A16
|
||||
Text Label 3700 2650 2 50 ~ 0
|
||||
A10
|
||||
Text Label 3700 2750 2 50 ~ 0
|
||||
~OE~
|
||||
Text Label 3700 2850 2 50 ~ 0
|
||||
D7
|
||||
Text Label 3700 2950 2 50 ~ 0
|
||||
D6
|
||||
Text Label 3700 3050 2 50 ~ 0
|
||||
D5
|
||||
Text Label 3700 3150 2 50 ~ 0
|
||||
D4
|
||||
Text Label 3700 3250 2 50 ~ 0
|
||||
D3
|
||||
Connection ~ 2350 4250
|
||||
$EndSCHEMATC
|
||||
1519
28SF8148.kicad_pcb
Normal file
1519
28SF8148.kicad_pcb
Normal file
File diff suppressed because it is too large
Load Diff
248
28SF8148.pro
Normal file
248
28SF8148.pro
Normal file
@ -0,0 +1,248 @@
|
||||
update=Tuesday, June 25, 2019 at 11:22:05 PM
|
||||
version=1
|
||||
last_client=pcbnew
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=28SF8128.net
|
||||
CopperLayerCount=4
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.1524
|
||||
MinViaDiameter=0.4
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.1524
|
||||
TrackWidth2=0.2
|
||||
TrackWidth3=0.254
|
||||
TrackWidth4=0.508
|
||||
TrackWidth5=0.762
|
||||
TrackWidth6=1.27
|
||||
TrackWidth7=1.524
|
||||
ViaDiameter1=0.6
|
||||
ViaDrill1=0.3
|
||||
ViaDiameter2=0.8
|
||||
ViaDrill2=0.4
|
||||
ViaDiameter3=1.524
|
||||
ViaDrill3=0.762
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.15
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.1524
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.15
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.07619999999999999
|
||||
SolderMaskMinWidth=0.1524
|
||||
SolderPasteClearance=-0.05
|
||||
SolderPasteRatio=0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=1
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.1524
|
||||
TrackWidth=0.1524
|
||||
ViaDiameter=0.6
|
||||
ViaDrill=0.3
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
BIN
GW4291A.zip
Normal file
BIN
GW4291A.zip
Normal file
Binary file not shown.
3
fp-lib-table
Normal file
3
fp-lib-table
Normal file
@ -0,0 +1,3 @@
|
||||
(fp_lib_table
|
||||
(lib (name stdpads)(type KiCad)(uri "$(KIPRJMOD)/../stdpads.pretty")(options "")(descr ""))
|
||||
)
|
||||
2888
gerber/28SF8148-B_Cu.gbl
Normal file
2888
gerber/28SF8148-B_Cu.gbl
Normal file
File diff suppressed because it is too large
Load Diff
1138
gerber/28SF8148-B_Mask.gbs
Normal file
1138
gerber/28SF8148-B_Mask.gbs
Normal file
File diff suppressed because it is too large
Load Diff
79
gerber/28SF8148-B_SilkS.gbo
Normal file
79
gerber/28SF8148-B_SilkS.gbo
Normal file
@ -0,0 +1,79 @@
|
||||
G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.2-1)-1*
|
||||
G04 #@! TF.CreationDate,2019-06-26T00:08:28-04:00*
|
||||
G04 #@! TF.ProjectId,28SF8148,32385346-3831-4343-982e-6b696361645f,rev?*
|
||||
G04 #@! TF.SameCoordinates,Original*
|
||||
G04 #@! TF.FileFunction,Legend,Bot*
|
||||
G04 #@! TF.FilePolarity,Positive*
|
||||
%FSLAX46Y46*%
|
||||
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
|
||||
G04 Created by KiCad (PCBNEW (5.1.2-1)-1) date 2019-06-26 00:08:28*
|
||||
%MOMM*%
|
||||
%LPD*%
|
||||
G04 APERTURE LIST*
|
||||
%ADD10C,0.120000*%
|
||||
%ADD11R,1.852400X1.852400*%
|
||||
%ADD12O,1.852400X1.852400*%
|
||||
%ADD13C,2.152400*%
|
||||
G04 APERTURE END LIST*
|
||||
D10*
|
||||
X57210000Y-54670000D02*
|
||||
X54550000Y-54670000D01*
|
||||
X57210000Y-18990000D02*
|
||||
X57210000Y-54670000D01*
|
||||
X54550000Y-18990000D02*
|
||||
X54550000Y-54670000D01*
|
||||
X57210000Y-18990000D02*
|
||||
X54550000Y-18990000D01*
|
||||
X57210000Y-20320000D02*
|
||||
X57210000Y-18990000D01*
|
||||
X57210000Y-18990000D02*
|
||||
X55880000Y-18990000D01*
|
||||
X41970000Y-54670000D02*
|
||||
X39310000Y-54670000D01*
|
||||
X41970000Y-21590000D02*
|
||||
X41970000Y-54670000D01*
|
||||
X39310000Y-21590000D02*
|
||||
X39310000Y-54670000D01*
|
||||
X41970000Y-21590000D02*
|
||||
X39310000Y-21590000D01*
|
||||
X41970000Y-20320000D02*
|
||||
X41970000Y-18990000D01*
|
||||
X41970000Y-18990000D02*
|
||||
X40640000Y-18990000D01*
|
||||
%LPC*%
|
||||
D11*
|
||||
X55880000Y-20320000D03*
|
||||
D12*
|
||||
X55880000Y-22860000D03*
|
||||
X55880000Y-25400000D03*
|
||||
X55880000Y-27940000D03*
|
||||
X55880000Y-30480000D03*
|
||||
X55880000Y-33020000D03*
|
||||
X55880000Y-35560000D03*
|
||||
X55880000Y-38100000D03*
|
||||
X55880000Y-40640000D03*
|
||||
X55880000Y-43180000D03*
|
||||
X55880000Y-45720000D03*
|
||||
X55880000Y-48260000D03*
|
||||
X55880000Y-50800000D03*
|
||||
X55880000Y-53340000D03*
|
||||
D13*
|
||||
X52070000Y-20320000D03*
|
||||
X43180000Y-53340000D03*
|
||||
D11*
|
||||
X40640000Y-20320000D03*
|
||||
D12*
|
||||
X40640000Y-22860000D03*
|
||||
X40640000Y-25400000D03*
|
||||
X40640000Y-27940000D03*
|
||||
X40640000Y-30480000D03*
|
||||
X40640000Y-33020000D03*
|
||||
X40640000Y-35560000D03*
|
||||
X40640000Y-38100000D03*
|
||||
X40640000Y-40640000D03*
|
||||
X40640000Y-43180000D03*
|
||||
X40640000Y-45720000D03*
|
||||
X40640000Y-48260000D03*
|
||||
X40640000Y-50800000D03*
|
||||
X40640000Y-53340000D03*
|
||||
M02*
|
||||
23
gerber/28SF8148-Edge_Cuts.gko
Normal file
23
gerber/28SF8148-Edge_Cuts.gko
Normal file
@ -0,0 +1,23 @@
|
||||
G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.2-1)-1*
|
||||
G04 #@! TF.CreationDate,2019-06-26T00:08:29-04:00*
|
||||
G04 #@! TF.ProjectId,28SF8148,32385346-3831-4343-982e-6b696361645f,rev?*
|
||||
G04 #@! TF.SameCoordinates,Original*
|
||||
G04 #@! TF.FileFunction,Profile,NP*
|
||||
%FSLAX46Y46*%
|
||||
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
|
||||
G04 Created by KiCad (PCBNEW (5.1.2-1)-1) date 2019-06-26 00:08:29*
|
||||
%MOMM*%
|
||||
%LPD*%
|
||||
G04 APERTURE LIST*
|
||||
%ADD10C,0.150000*%
|
||||
G04 APERTURE END LIST*
|
||||
D10*
|
||||
X39116000Y-54864000D02*
|
||||
X39116000Y-18796000D01*
|
||||
X57404000Y-54864000D02*
|
||||
X39116000Y-54864000D01*
|
||||
X57404000Y-18796000D02*
|
||||
X57404000Y-54864000D01*
|
||||
X39116000Y-18796000D02*
|
||||
X57404000Y-18796000D01*
|
||||
M02*
|
||||
8340
gerber/28SF8148-F_Cu.gtl
Normal file
8340
gerber/28SF8148-F_Cu.gtl
Normal file
File diff suppressed because it is too large
Load Diff
2608
gerber/28SF8148-F_Mask.gts
Normal file
2608
gerber/28SF8148-F_Mask.gts
Normal file
File diff suppressed because it is too large
Load Diff
2601
gerber/28SF8148-F_Paste.gtp
Normal file
2601
gerber/28SF8148-F_Paste.gtp
Normal file
File diff suppressed because it is too large
Load Diff
2687
gerber/28SF8148-F_SilkS.gto
Normal file
2687
gerber/28SF8148-F_SilkS.gto
Normal file
File diff suppressed because it is too large
Load Diff
72
gerber/28SF8148-In1_Cu.g2
Normal file
72
gerber/28SF8148-In1_Cu.g2
Normal file
@ -0,0 +1,72 @@
|
||||
G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.2-1)-1*
|
||||
G04 #@! TF.CreationDate,2019-06-26T00:08:28-04:00*
|
||||
G04 #@! TF.ProjectId,28SF8148,32385346-3831-4343-982e-6b696361645f,rev?*
|
||||
G04 #@! TF.SameCoordinates,Original*
|
||||
G04 #@! TF.FileFunction,Copper,L2,Inr*
|
||||
G04 #@! TF.FilePolarity,Positive*
|
||||
%FSLAX46Y46*%
|
||||
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
|
||||
G04 Created by KiCad (PCBNEW (5.1.2-1)-1) date 2019-06-26 00:08:28*
|
||||
%MOMM*%
|
||||
%LPD*%
|
||||
G04 APERTURE LIST*
|
||||
%ADD10R,1.700000X1.700000*%
|
||||
%ADD11O,1.700000X1.700000*%
|
||||
%ADD12C,2.000000*%
|
||||
%ADD13C,0.800000*%
|
||||
%ADD14C,0.600000*%
|
||||
G04 APERTURE END LIST*
|
||||
D10*
|
||||
X55880000Y-20320000D03*
|
||||
D11*
|
||||
X55880000Y-22860000D03*
|
||||
X55880000Y-25400000D03*
|
||||
X55880000Y-27940000D03*
|
||||
X55880000Y-30480000D03*
|
||||
X55880000Y-33020000D03*
|
||||
X55880000Y-35560000D03*
|
||||
X55880000Y-38100000D03*
|
||||
X55880000Y-40640000D03*
|
||||
X55880000Y-43180000D03*
|
||||
X55880000Y-45720000D03*
|
||||
X55880000Y-48260000D03*
|
||||
X55880000Y-50800000D03*
|
||||
X55880000Y-53340000D03*
|
||||
D12*
|
||||
X52070000Y-20320000D03*
|
||||
X43180000Y-53340000D03*
|
||||
D10*
|
||||
X40640000Y-20320000D03*
|
||||
D11*
|
||||
X40640000Y-22860000D03*
|
||||
X40640000Y-25400000D03*
|
||||
X40640000Y-27940000D03*
|
||||
X40640000Y-30480000D03*
|
||||
X40640000Y-33020000D03*
|
||||
X40640000Y-35560000D03*
|
||||
X40640000Y-38100000D03*
|
||||
X40640000Y-40640000D03*
|
||||
X40640000Y-43180000D03*
|
||||
X40640000Y-45720000D03*
|
||||
X40640000Y-48260000D03*
|
||||
X40640000Y-50800000D03*
|
||||
X40640000Y-53340000D03*
|
||||
D13*
|
||||
X47879000Y-25400000D03*
|
||||
X46736000Y-26670000D03*
|
||||
X47879000Y-27940000D03*
|
||||
D14*
|
||||
X46990000Y-42418000D03*
|
||||
X46990000Y-44958000D03*
|
||||
X48260000Y-31242000D03*
|
||||
X52070000Y-31242000D03*
|
||||
X52070000Y-28702000D03*
|
||||
X43942000Y-35560000D03*
|
||||
X52578000Y-34290000D03*
|
||||
X43942000Y-33020000D03*
|
||||
X43942000Y-34290000D03*
|
||||
X43942000Y-40640000D03*
|
||||
X52578000Y-35560000D03*
|
||||
X52578000Y-33020000D03*
|
||||
X49784000Y-36449000D03*
|
||||
M02*
|
||||
72
gerber/28SF8148-In2_Cu.g3
Normal file
72
gerber/28SF8148-In2_Cu.g3
Normal file
@ -0,0 +1,72 @@
|
||||
G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,(5.1.2-1)-1*
|
||||
G04 #@! TF.CreationDate,2019-06-26T00:08:28-04:00*
|
||||
G04 #@! TF.ProjectId,28SF8148,32385346-3831-4343-982e-6b696361645f,rev?*
|
||||
G04 #@! TF.SameCoordinates,Original*
|
||||
G04 #@! TF.FileFunction,Copper,L3,Inr*
|
||||
G04 #@! TF.FilePolarity,Positive*
|
||||
%FSLAX46Y46*%
|
||||
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
|
||||
G04 Created by KiCad (PCBNEW (5.1.2-1)-1) date 2019-06-26 00:08:28*
|
||||
%MOMM*%
|
||||
%LPD*%
|
||||
G04 APERTURE LIST*
|
||||
%ADD10R,1.700000X1.700000*%
|
||||
%ADD11O,1.700000X1.700000*%
|
||||
%ADD12C,2.000000*%
|
||||
%ADD13C,0.800000*%
|
||||
%ADD14C,0.600000*%
|
||||
G04 APERTURE END LIST*
|
||||
D10*
|
||||
X55880000Y-20320000D03*
|
||||
D11*
|
||||
X55880000Y-22860000D03*
|
||||
X55880000Y-25400000D03*
|
||||
X55880000Y-27940000D03*
|
||||
X55880000Y-30480000D03*
|
||||
X55880000Y-33020000D03*
|
||||
X55880000Y-35560000D03*
|
||||
X55880000Y-38100000D03*
|
||||
X55880000Y-40640000D03*
|
||||
X55880000Y-43180000D03*
|
||||
X55880000Y-45720000D03*
|
||||
X55880000Y-48260000D03*
|
||||
X55880000Y-50800000D03*
|
||||
X55880000Y-53340000D03*
|
||||
D12*
|
||||
X52070000Y-20320000D03*
|
||||
X43180000Y-53340000D03*
|
||||
D10*
|
||||
X40640000Y-20320000D03*
|
||||
D11*
|
||||
X40640000Y-22860000D03*
|
||||
X40640000Y-25400000D03*
|
||||
X40640000Y-27940000D03*
|
||||
X40640000Y-30480000D03*
|
||||
X40640000Y-33020000D03*
|
||||
X40640000Y-35560000D03*
|
||||
X40640000Y-38100000D03*
|
||||
X40640000Y-40640000D03*
|
||||
X40640000Y-43180000D03*
|
||||
X40640000Y-45720000D03*
|
||||
X40640000Y-48260000D03*
|
||||
X40640000Y-50800000D03*
|
||||
X40640000Y-53340000D03*
|
||||
D13*
|
||||
X47879000Y-25400000D03*
|
||||
X46736000Y-26670000D03*
|
||||
X47879000Y-27940000D03*
|
||||
D14*
|
||||
X46990000Y-42418000D03*
|
||||
X46990000Y-44958000D03*
|
||||
X48260000Y-31242000D03*
|
||||
X52070000Y-31242000D03*
|
||||
X52070000Y-28702000D03*
|
||||
X43942000Y-35560000D03*
|
||||
X52578000Y-34290000D03*
|
||||
X43942000Y-33020000D03*
|
||||
X43942000Y-34290000D03*
|
||||
X43942000Y-40640000D03*
|
||||
X52578000Y-35560000D03*
|
||||
X52578000Y-33020000D03*
|
||||
X49784000Y-36449000D03*
|
||||
M02*
|
||||
66
gerber/28SF8148.drl
Normal file
66
gerber/28SF8148.drl
Normal file
@ -0,0 +1,66 @@
|
||||
M48
|
||||
; DRILL file {KiCad (5.1.2-1)-1} date Wednesday, June 26, 2019 at 12:08:30 AM
|
||||
; FORMAT={-:-/ absolute / inch / decimal}
|
||||
; #@! TF.CreationDate,2019-06-26T00:08:30-04:00
|
||||
; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.1.2-1)-1
|
||||
FMAT,2
|
||||
INCH
|
||||
T1C0.0118
|
||||
T2C0.0157
|
||||
T3C0.0394
|
||||
T4C0.0433
|
||||
%
|
||||
G90
|
||||
G05
|
||||
T1
|
||||
X1.73Y-1.3
|
||||
X1.73Y-1.35
|
||||
X1.73Y-1.4
|
||||
X1.73Y-1.6
|
||||
X1.85Y-1.67
|
||||
X1.85Y-1.77
|
||||
X1.9Y-1.23
|
||||
X1.96Y-1.435
|
||||
X2.05Y-1.13
|
||||
X2.05Y-1.23
|
||||
X2.07Y-1.3
|
||||
X2.07Y-1.35
|
||||
X2.07Y-1.4
|
||||
T2
|
||||
X1.84Y-1.05
|
||||
X1.885Y-1.0
|
||||
X1.885Y-1.1
|
||||
T3
|
||||
X2.2Y-0.8
|
||||
X2.2Y-0.9
|
||||
X2.2Y-1.0
|
||||
X2.2Y-1.1
|
||||
X2.2Y-1.2
|
||||
X2.2Y-1.3
|
||||
X2.2Y-1.4
|
||||
X2.2Y-1.5
|
||||
X2.2Y-1.6
|
||||
X2.2Y-1.7
|
||||
X2.2Y-1.8
|
||||
X2.2Y-1.9
|
||||
X2.2Y-2.0
|
||||
X2.2Y-2.1
|
||||
X1.6Y-0.8
|
||||
X1.6Y-0.9
|
||||
X1.6Y-1.0
|
||||
X1.6Y-1.1
|
||||
X1.6Y-1.2
|
||||
X1.6Y-1.3
|
||||
X1.6Y-1.4
|
||||
X1.6Y-1.5
|
||||
X1.6Y-1.6
|
||||
X1.6Y-1.7
|
||||
X1.6Y-1.8
|
||||
X1.6Y-1.9
|
||||
X1.6Y-2.0
|
||||
X1.6Y-2.1
|
||||
T4
|
||||
X2.05Y-0.8
|
||||
X1.7Y-2.1
|
||||
T0
|
||||
M30
|
||||
3
sym-lib-table
Normal file
3
sym-lib-table
Normal file
@ -0,0 +1,3 @@
|
||||
(sym_lib_table
|
||||
(lib (name stdparts)(type Legacy)(uri "$(KIPRJMOD)/../stdparts/stdparts.lib")(options "")(descr ""))
|
||||
)
|
||||
Loading…
Reference in New Issue
Block a user