From 54a09f4bb4cb6c6cc41ba92f0034c1d6ccdc795a Mon Sep 17 00:00:00 2001 From: Zane Kaminski Date: Sun, 5 Jul 2020 23:17:59 -0400 Subject: [PATCH] 8MB SIMM as sent to JLCPCB July 2020 --- ROMSIMM2MB.4401A/ROMSIMM-cache.lib | 237 + .../Documentation/BackIsom.png | Bin .../Documentation/Description | 0 .../Documentation/FrontIsom.png | Bin ROMSIMM8MB.4402A/Documentation/Placement.pdf | Bin 0 -> 39899 bytes .../ROMSIMM-cache.lib | 0 .../ROMSIMM.kicad_pcb | 12261 ++--- .../ROMSIMM.pro | 0 .../ROMSIMM.sch | 66 +- ROMSIMM8MB.4402A/ROMSIMM8MB.4402A-gerber.zip | Bin 0 -> 816497 bytes .../fp-lib-table | 0 .../gerber/ROMSIMM-B_Cu.gbl | 8467 ++-- .../gerber/ROMSIMM-B_Mask.gbs | 4 +- .../gerber/ROMSIMM-B_SilkS.gbo | 4 +- .../gerber/ROMSIMM-Edge_Cuts.gm1 | 4 +- .../gerber/ROMSIMM-F_Cu.gtl | 41701 ++++++++-------- ROMSIMM8MB.4402A/gerber/ROMSIMM-F_Fab.gbr | 3033 ++ .../gerber/ROMSIMM-F_Mask.gts | 16966 +++---- .../gerber/ROMSIMM-F_Paste.gtp | 36109 ++++++------- .../gerber/ROMSIMM-F_SilkS.gto | 36360 +++++++------- .../gerber/ROMSIMM-In1_Cu.g2 | 5705 ++- .../gerber/ROMSIMM-In2_Cu.g3 | 5675 ++- .../gerber/ROMSIMM-bottom-pos.csv | 0 .../gerber/ROMSIMM-bottom.pos | 2 +- .../gerber/ROMSIMM-drl_map.ps | 550 +- .../gerber/ROMSIMM-top-pos.csv | 6 +- ROMSIMM8MB.4402A/gerber/ROMSIMM-top.pos | 40 + .../gerber/ROMSIMM.drl | 96 +- .../sym-lib-table | 0 SIMM8MB.4402A/ROMSIMM8MB.4402A-gerber.zip | Bin 777867 -> 0 bytes SIMM8MB.4402A/gerber/ROMSIMM-top.pos | 38 - 31 files changed, 86885 insertions(+), 80439 deletions(-) create mode 100644 ROMSIMM2MB.4401A/ROMSIMM-cache.lib rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/Documentation/BackIsom.png (100%) rename SIMM8MB.4402A/Documentation/Ad Copy => ROMSIMM8MB.4402A/Documentation/Description (100%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/Documentation/FrontIsom.png (100%) create mode 100644 ROMSIMM8MB.4402A/Documentation/Placement.pdf rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/ROMSIMM-cache.lib (100%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/ROMSIMM.kicad_pcb (54%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/ROMSIMM.pro (100%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/ROMSIMM.sch (97%) create mode 100644 ROMSIMM8MB.4402A/ROMSIMM8MB.4402A-gerber.zip rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/fp-lib-table (100%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/gerber/ROMSIMM-B_Cu.gbl (88%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/gerber/ROMSIMM-B_Mask.gbs (99%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/gerber/ROMSIMM-B_SilkS.gbo (99%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/gerber/ROMSIMM-Edge_Cuts.gm1 (91%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/gerber/ROMSIMM-F_Cu.gtl (92%) create mode 100644 ROMSIMM8MB.4402A/gerber/ROMSIMM-F_Fab.gbr rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/gerber/ROMSIMM-F_Mask.gts (75%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/gerber/ROMSIMM-F_Paste.gtp (67%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/gerber/ROMSIMM-F_SilkS.gto (73%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/gerber/ROMSIMM-In1_Cu.g2 (87%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/gerber/ROMSIMM-In2_Cu.g3 (86%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/gerber/ROMSIMM-bottom-pos.csv (100%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/gerber/ROMSIMM-bottom.pos (70%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/gerber/ROMSIMM-drl_map.ps (94%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/gerber/ROMSIMM-top-pos.csv (89%) create mode 100644 ROMSIMM8MB.4402A/gerber/ROMSIMM-top.pos rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/gerber/ROMSIMM.drl (87%) rename {SIMM8MB.4402A => ROMSIMM8MB.4402A}/sym-lib-table (100%) delete mode 100644 SIMM8MB.4402A/ROMSIMM8MB.4402A-gerber.zip delete mode 100644 SIMM8MB.4402A/gerber/ROMSIMM-top.pos diff --git a/ROMSIMM2MB.4401A/ROMSIMM-cache.lib b/ROMSIMM2MB.4401A/ROMSIMM-cache.lib new file mode 100644 index 0000000..f28fe9b --- /dev/null +++ b/ROMSIMM2MB.4401A/ROMSIMM-cache.lib @@ -0,0 +1,237 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# Connector_Generic_Conn_02x32_Counter_Clockwise +# +DEF Connector_Generic_Conn_02x32_Counter_Clockwise J 0 40 Y N 1 F N +F0 "J" 50 1600 50 H V C CNN +F1 "Connector_Generic_Conn_02x32_Counter_Clockwise" 50 -1700 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Connector*:*_2x??_* +$ENDFPLIST +DRAW +S -50 -1595 0 -1605 1 1 6 N +S -50 -1495 0 -1505 1 1 6 N +S -50 -1395 0 -1405 1 1 6 N +S -50 -1295 0 -1305 1 1 6 N +S -50 -1195 0 -1205 1 1 6 N +S -50 -1095 0 -1105 1 1 6 N +S -50 -995 0 -1005 1 1 6 N +S -50 -895 0 -905 1 1 6 N +S -50 -795 0 -805 1 1 6 N +S -50 -695 0 -705 1 1 6 N +S -50 -595 0 -605 1 1 6 N +S -50 -495 0 -505 1 1 6 N +S -50 -395 0 -405 1 1 6 N +S -50 -295 0 -305 1 1 6 N +S -50 -195 0 -205 1 1 6 N +S -50 -95 0 -105 1 1 6 N +S -50 5 0 -5 1 1 6 N +S -50 105 0 95 1 1 6 N +S -50 205 0 195 1 1 6 N +S -50 305 0 295 1 1 6 N +S -50 405 0 395 1 1 6 N +S -50 505 0 495 1 1 6 N +S -50 605 0 595 1 1 6 N +S -50 705 0 695 1 1 6 N +S -50 805 0 795 1 1 6 N +S -50 905 0 895 1 1 6 N +S -50 1005 0 995 1 1 6 N +S -50 1105 0 1095 1 1 6 N +S -50 1205 0 1195 1 1 6 N +S -50 1305 0 1295 1 1 6 N +S -50 1405 0 1395 1 1 6 N +S -50 1505 0 1495 1 1 6 N +S -50 1550 150 -1650 1 1 10 f +S 150 -1595 100 -1605 1 1 6 N +S 150 -1495 100 -1505 1 1 6 N +S 150 -1395 100 -1405 1 1 6 N +S 150 -1295 100 -1305 1 1 6 N +S 150 -1195 100 -1205 1 1 6 N +S 150 -1095 100 -1105 1 1 6 N +S 150 -995 100 -1005 1 1 6 N +S 150 -895 100 -905 1 1 6 N +S 150 -795 100 -805 1 1 6 N +S 150 -695 100 -705 1 1 6 N +S 150 -595 100 -605 1 1 6 N +S 150 -495 100 -505 1 1 6 N +S 150 -395 100 -405 1 1 6 N +S 150 -295 100 -305 1 1 6 N +S 150 -195 100 -205 1 1 6 N +S 150 -95 100 -105 1 1 6 N +S 150 5 100 -5 1 1 6 N +S 150 105 100 95 1 1 6 N +S 150 205 100 195 1 1 6 N +S 150 305 100 295 1 1 6 N +S 150 405 100 395 1 1 6 N +S 150 505 100 495 1 1 6 N +S 150 605 100 595 1 1 6 N +S 150 705 100 695 1 1 6 N +S 150 805 100 795 1 1 6 N +S 150 905 100 895 1 1 6 N +S 150 1005 100 995 1 1 6 N +S 150 1105 100 1095 1 1 6 N +S 150 1205 100 1195 1 1 6 N +S 150 1305 100 1295 1 1 6 N +S 150 1405 100 1395 1 1 6 N +S 150 1505 100 1495 1 1 6 N +X Pin_1 1 -200 1500 150 R 50 50 1 1 P +X Pin_10 10 -200 600 150 R 50 50 1 1 P +X Pin_11 11 -200 500 150 R 50 50 1 1 P +X Pin_12 12 -200 400 150 R 50 50 1 1 P +X Pin_13 13 -200 300 150 R 50 50 1 1 P +X Pin_14 14 -200 200 150 R 50 50 1 1 P +X Pin_15 15 -200 100 150 R 50 50 1 1 P +X Pin_16 16 -200 0 150 R 50 50 1 1 P +X Pin_17 17 -200 -100 150 R 50 50 1 1 P +X Pin_18 18 -200 -200 150 R 50 50 1 1 P +X Pin_19 19 -200 -300 150 R 50 50 1 1 P +X Pin_2 2 -200 1400 150 R 50 50 1 1 P +X Pin_20 20 -200 -400 150 R 50 50 1 1 P +X Pin_21 21 -200 -500 150 R 50 50 1 1 P +X Pin_22 22 -200 -600 150 R 50 50 1 1 P +X Pin_23 23 -200 -700 150 R 50 50 1 1 P +X Pin_24 24 -200 -800 150 R 50 50 1 1 P +X Pin_25 25 -200 -900 150 R 50 50 1 1 P +X Pin_26 26 -200 -1000 150 R 50 50 1 1 P +X Pin_27 27 -200 -1100 150 R 50 50 1 1 P +X Pin_28 28 -200 -1200 150 R 50 50 1 1 P +X Pin_29 29 -200 -1300 150 R 50 50 1 1 P +X Pin_3 3 -200 1300 150 R 50 50 1 1 P +X Pin_30 30 -200 -1400 150 R 50 50 1 1 P +X Pin_31 31 -200 -1500 150 R 50 50 1 1 P +X Pin_32 32 -200 -1600 150 R 50 50 1 1 P +X Pin_33 33 300 -1600 150 L 50 50 1 1 P +X Pin_34 34 300 -1500 150 L 50 50 1 1 P +X Pin_35 35 300 -1400 150 L 50 50 1 1 P +X Pin_36 36 300 -1300 150 L 50 50 1 1 P +X Pin_37 37 300 -1200 150 L 50 50 1 1 P +X Pin_38 38 300 -1100 150 L 50 50 1 1 P +X Pin_39 39 300 -1000 150 L 50 50 1 1 P +X Pin_4 4 -200 1200 150 R 50 50 1 1 P +X Pin_40 40 300 -900 150 L 50 50 1 1 P +X Pin_41 41 300 -800 150 L 50 50 1 1 P +X Pin_42 42 300 -700 150 L 50 50 1 1 P +X Pin_43 43 300 -600 150 L 50 50 1 1 P +X Pin_44 44 300 -500 150 L 50 50 1 1 P +X Pin_45 45 300 -400 150 L 50 50 1 1 P +X Pin_46 46 300 -300 150 L 50 50 1 1 P +X Pin_47 47 300 -200 150 L 50 50 1 1 P +X Pin_48 48 300 -100 150 L 50 50 1 1 P +X Pin_49 49 300 0 150 L 50 50 1 1 P +X Pin_5 5 -200 1100 150 R 50 50 1 1 P +X Pin_50 50 300 100 150 L 50 50 1 1 P +X Pin_51 51 300 200 150 L 50 50 1 1 P +X Pin_52 52 300 300 150 L 50 50 1 1 P +X Pin_53 53 300 400 150 L 50 50 1 1 P +X Pin_54 54 300 500 150 L 50 50 1 1 P +X Pin_55 55 300 600 150 L 50 50 1 1 P +X Pin_56 56 300 700 150 L 50 50 1 1 P +X Pin_57 57 300 800 150 L 50 50 1 1 P +X Pin_58 58 300 900 150 L 50 50 1 1 P +X Pin_59 59 300 1000 150 L 50 50 1 1 P +X Pin_6 6 -200 1000 150 R 50 50 1 1 P +X Pin_60 60 300 1100 150 L 50 50 1 1 P +X Pin_61 61 300 1200 150 L 50 50 1 1 P +X Pin_62 62 300 1300 150 L 50 50 1 1 P +X Pin_63 63 300 1400 150 L 50 50 1 1 P +X Pin_64 64 300 1500 150 L 50 50 1 1 P +X Pin_7 7 -200 900 150 R 50 50 1 1 P +X Pin_8 8 -200 800 150 R 50 50 1 1 P +X Pin_9 9 -200 700 150 R 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Device_C_Small +# +DEF Device_C_Small C 0 10 N N 1 F N +F0 "C" 10 70 50 H V L CNN +F1 "Device_C_Small" 10 -80 50 H V L CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 13 -60 -20 60 -20 N +P 2 0 1 12 -60 20 60 20 N +X ~ 1 0 100 80 D 50 50 1 1 P +X ~ 2 0 -100 80 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GW_RAM_Flash-512Kx8-PLCC-32 +# +DEF GW_RAM_Flash-512Kx8-PLCC-32 U 0 20 Y Y 1 F N +F0 "U" 0 1050 50 H V C CNN +F1 "GW_RAM_Flash-512Kx8-PLCC-32" 0 0 50 V V C CNN +F2 "stdpads:PLCC-32_SMDSocket" 0 -1050 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +S -300 1000 300 -1000 0 1 10 f +X GND 16 400 -900 100 L 50 50 0 0 W +X VCC 32 400 900 100 L 50 50 0 0 W +X A18 1 -400 -900 100 R 50 50 1 1 I +X A2 10 -400 700 100 R 50 50 1 1 I +X A1 11 -400 800 100 R 50 50 1 1 I +X A0 12 -400 900 100 R 50 50 1 1 I +X D0 13 400 700 100 L 50 50 1 1 B +X D1 14 400 600 100 L 50 50 1 1 B +X D2 15 400 500 100 L 50 50 1 1 B +X D3 17 400 400 100 L 50 50 1 1 B +X D4 18 400 300 100 L 50 50 1 1 B +X D5 19 400 200 100 L 50 50 1 1 B +X A16 2 -400 -700 100 R 50 50 1 1 I +X D6 20 400 100 100 L 50 50 1 1 B +X D7 21 400 0 100 L 50 50 1 1 B +X ~CS~ 22 400 -400 100 L 50 50 1 1 I +X A10 23 -400 -100 100 R 50 50 1 1 I +X ~OE~ 24 400 -600 100 L 50 50 1 1 I +X A11 25 -400 -200 100 R 50 50 1 1 I +X A9 26 -400 0 100 R 50 50 1 1 I +X A8 27 -400 100 100 R 50 50 1 1 I +X A13 28 -400 -400 100 R 50 50 1 1 I +X A14 29 -400 -500 100 R 50 50 1 1 I +X A15 3 -400 -600 100 R 50 50 1 1 I +X A17 30 -400 -800 100 R 50 50 1 1 I +X ~WE~ 31 400 -500 100 L 50 50 1 1 I +X A12 4 -400 -300 100 R 50 50 1 1 I +X A7 5 -400 200 100 R 50 50 1 1 I +X A6 6 -400 300 100 R 50 50 1 1 I +X A5 7 -400 400 100 R 50 50 1 1 I +X A4 8 -400 500 100 R 50 50 1 1 I +X A3 9 -400 600 100 R 50 50 1 1 I +ENDDRAW +ENDDEF +# +# power_+5V +# +DEF power_+5V #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "power_+5V" 0 140 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X +5V 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# power_GND +# +DEF power_GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "power_GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +#End Library diff --git a/SIMM8MB.4402A/Documentation/BackIsom.png b/ROMSIMM8MB.4402A/Documentation/BackIsom.png similarity index 100% rename from SIMM8MB.4402A/Documentation/BackIsom.png rename to ROMSIMM8MB.4402A/Documentation/BackIsom.png diff --git a/SIMM8MB.4402A/Documentation/Ad Copy b/ROMSIMM8MB.4402A/Documentation/Description similarity index 100% rename from SIMM8MB.4402A/Documentation/Ad Copy rename to ROMSIMM8MB.4402A/Documentation/Description diff --git a/SIMM8MB.4402A/Documentation/FrontIsom.png b/ROMSIMM8MB.4402A/Documentation/FrontIsom.png similarity index 100% rename from SIMM8MB.4402A/Documentation/FrontIsom.png rename to ROMSIMM8MB.4402A/Documentation/FrontIsom.png diff --git a/ROMSIMM8MB.4402A/Documentation/Placement.pdf b/ROMSIMM8MB.4402A/Documentation/Placement.pdf new file mode 100644 index 0000000000000000000000000000000000000000..ef8599e550306807cf64748ec0de852c4b66c2ad GIT binary patch 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