Merge branch 'dev-4402C' into dev-4402B

2024-11-22 10:31:20 +00:00 · 2024-05-19 01:35:18 -04:00 · 2024-05-19 01:35:18 -04:00 · f3d90fc7a1
commit f3d90fc7a1
parent b42b8dd9fb d815725645
48 changed files with 144796 additions and 215556 deletions
--- a/.gitignore
+++ b/.gitignore
@ -14,6 +14,7 @@ _autosave-*
 *-save.pro
 *-save.kicad_pcb
 fp-info-cache
+MacIIROMSIMM-backups/*

 # Netlist files (exported from Eeschema)
 *.net
@ -26,11 +27,5 @@ fp-info-cache
 *.xml

 *.DS_Store
-Documentation/~$M SIMM Manual.docx
-ROMSIMM8MB.4402B/Documentation/Thumbs.db
-ROMSIMM2MB.4401A/Documentation/Thumbs.db
-ROMSIMM8MB.4402A/Documentation/Thumbs.db
 Documentation/Thumbs.db
-*.kicad_prl
-ROMSIMM-backups/*
-Documentation/~$4402AManual.docx
+MacIIROMSIMM.kicad_prl
--- a/Documentation/BackIsom.png
+++ b/Documentation/BackIsom.png
--- a/Documentation/FrontIsom.png
+++ b/Documentation/FrontIsom.png
--- a/Documentation/MacIIROMSIMM.4402C-Placement.pdf
+++ b/Documentation/MacIIROMSIMM.4402C-Placement.pdf
--- a/Documentation/MacIIROMSIMM.4402C-Schematic.pdf
+++ b/Documentation/MacIIROMSIMM.4402C-Schematic.pdf
--- a/Documentation/Placement.pdf
+++ b/Documentation/Placement.pdf
--- a/Documentation/Schematic.pdf
+++ b/Documentation/Schematic.pdf
--- a/20
+++ b/20
@ -0,0 +1,20 @@
+Copyright (c) Garrett's Workshop
+
+Rationale
+----------------------------------------
+We at Garrett's Workshop create our products and release their source in
+hopes of encouraging others to contribute and build their own "clones,"
+even selling them and competing with us. One day, GW will be defunct,
+and it would be a shame if our hardware and software die along with GW.
+At the same time, however, we seek to protect our trademark and ensure
+that clones and derivative products do not masquerade as genuine
+Garrett's Workshop products.
+
+License Terms
+----------------------------------------
+This project may be licensed under one of two licenses:
+
+1. You may elect to license this project under CC BY-NC-SA 4.0.
+
+2. You may elect to license this project under CC BY-SA 4.0 ONLY IF
+   you remove all "Garrett's Workshop" trademarks from the project.
--- a/MacIIROMSIMM.kicad_pcb
+++ b/MacIIROMSIMM.kicad_pcb
--- a/MacIIROMSIMM.kicad_pro
+++ b/MacIIROMSIMM.kicad_pro
@ -0,0 +1,538 @@
+{
+  "board": {
+    "3dviewports": [],
+    "design_settings": {
+      "defaults": {
+        "board_outline_line_width": 0.15,
+        "copper_line_width": 0.15239999999999998,
+        "copper_text_italic": false,
+        "copper_text_size_h": 1.5,
+        "copper_text_size_v": 1.5,
+        "copper_text_thickness": 0.3,
+        "copper_text_upright": false,
+        "courtyard_line_width": 0.049999999999999996,
+        "dimension_precision": 4,
+        "dimension_units": 3,
+        "dimensions": {
+          "arrow_length": 1270000,
+          "extension_offset": 500000,
+          "keep_text_aligned": true,
+          "suppress_zeroes": false,
+          "text_position": 0,
+          "units_format": 1
+        },
+        "fab_line_width": 0.09999999999999999,
+        "fab_text_italic": false,
+        "fab_text_size_h": 1.0,
+        "fab_text_size_v": 1.0,
+        "fab_text_thickness": 0.15,
+        "fab_text_upright": false,
+        "other_line_width": 0.09999999999999999,
+        "other_text_italic": false,
+        "other_text_size_h": 1.0,
+        "other_text_size_v": 1.0,
+        "other_text_thickness": 0.15,
+        "other_text_upright": false,
+        "pads": {
+          "drill": 0.0,
+          "height": 1.12,
+          "width": 2.44
+        },
+        "silk_line_width": 0.15,
+        "silk_text_italic": false,
+        "silk_text_size_h": 1.0,
+        "silk_text_size_v": 1.0,
+        "silk_text_thickness": 0.15,
+        "silk_text_upright": false,
+        "zones": {
+          "45_degree_only": false,
+          "min_clearance": 0.154
+        }
+      },
+      "diff_pair_dimensions": [
+        {
+          "gap": 0.0,
+          "via_gap": 0.0,
+          "width": 0.0
+        }
+      ],
+      "drc_exclusions": [],
+      "meta": {
+        "filename": "board_design_settings.json",
+        "version": 2
+      },
+      "rule_severities": {
+        "annular_width": "error",
+        "clearance": "error",
+        "connection_width": "warning",
+        "copper_edge_clearance": "ignore",
+        "copper_sliver": "error",
+        "courtyards_overlap": "ignore",
+        "diff_pair_gap_out_of_range": "error",
+        "diff_pair_uncoupled_length_too_long": "error",
+        "drill_out_of_range": "error",
+        "duplicate_footprints": "error",
+        "extra_footprint": "error",
+        "footprint": "error",
+        "footprint_type_mismatch": "error",
+        "hole_clearance": "error",
+        "hole_near_hole": "error",
+        "invalid_outline": "error",
+        "isolated_copper": "warning",
+        "item_on_disabled_layer": "error",
+        "items_not_allowed": "error",
+        "length_out_of_range": "error",
+        "lib_footprint_issues": "ignore",
+        "lib_footprint_mismatch": "warning",
+        "malformed_courtyard": "error",
+        "microvia_drill_out_of_range": "error",
+        "missing_courtyard": "ignore",
+        "missing_footprint": "error",
+        "net_conflict": "error",
+        "npth_inside_courtyard": "ignore",
+        "padstack": "error",
+        "pth_inside_courtyard": "ignore",
+        "shorting_items": "error",
+        "silk_edge_clearance": "warning",
+        "silk_over_copper": "warning",
+        "silk_overlap": "warning",
+        "skew_out_of_range": "error",
+        "solder_mask_bridge": "ignore",
+        "starved_thermal": "error",
+        "text_height": "warning",
+        "text_thickness": "warning",
+        "through_hole_pad_without_hole": "error",
+        "too_many_vias": "error",
+        "track_dangling": "warning",
+        "track_width": "error",
+        "tracks_crossing": "error",
+        "unconnected_items": "error",
+        "unresolved_variable": "error",
+        "via_dangling": "ignore",
+        "zones_intersect": "error"
+      },
+      "rule_severitieslegacy_courtyards_overlap": true,
+      "rule_severitieslegacy_no_courtyard_defined": false,
+      "rules": {
+        "allow_blind_buried_vias": false,
+        "allow_microvias": false,
+        "max_error": 0.005,
+        "min_clearance": 0.15,
+        "min_connection": 0.12,
+        "min_copper_edge_clearance": 0.4064,
+        "min_hole_clearance": 0.25,
+        "min_hole_to_hole": 0.5,
+        "min_microvia_diameter": 0.19999999999999998,
+        "min_microvia_drill": 0.09999999999999999,
+        "min_resolved_spokes": 2,
+        "min_silk_clearance": 0.0,
+        "min_text_height": 0.7999999999999999,
+        "min_text_thickness": 0.08,
+        "min_through_hole_diameter": 0.3,
+        "min_track_width": 0.15,
+        "min_via_annular_width": 0.09999999999999999,
+        "min_via_diameter": 0.5,
+        "solder_mask_to_copper_clearance": 0.0,
+        "use_height_for_length_calcs": true
+      },
+      "teardrop_options": [
+        {
+          "td_allow_use_two_tracks": true,
+          "td_curve_segcount": 5,
+          "td_on_pad_in_zone": false,
+          "td_onpadsmd": true,
+          "td_onroundshapesonly": false,
+          "td_ontrackend": false,
+          "td_onviapad": true
+        }
+      ],
+      "teardrop_parameters": [
+        {
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_target_name": "td_round_shape",
+          "td_width_to_size_filter_ratio": 0.9
+        },
+        {
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_target_name": "td_rect_shape",
+          "td_width_to_size_filter_ratio": 0.9
+        },
+        {
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_target_name": "td_track_end",
+          "td_width_to_size_filter_ratio": 0.9
+        }
+      ],
+      "track_widths": [
+        0.0,
+        0.15,
+        0.2,
+        0.25,
+        0.3,
+        0.35,
+        0.4,
+        0.45,
+        0.5,
+        0.6,
+        0.8,
+        1.0,
+        1.27,
+        1.524
+      ],
+      "via_dimensions": [
+        {
+          "diameter": 0.0,
+          "drill": 0.0
+        },
+        {
+          "diameter": 0.5,
+          "drill": 0.3
+        },
+        {
+          "diameter": 0.6,
+          "drill": 0.3
+        },
+        {
+          "diameter": 0.8,
+          "drill": 0.4
+        },
+        {
+          "diameter": 1.0,
+          "drill": 0.5
+        },
+        {
+          "diameter": 1.524,
+          "drill": 0.762
+        }
+      ],
+      "zones_allow_external_fillets": false,
+      "zones_use_no_outline": true
+    },
+    "layer_presets": [],
+    "viewports": []
+  },
+  "boards": [],
+  "cvpcb": {
+    "equivalence_files": []
+  },
+  "erc": {
+    "erc_exclusions": [],
+    "meta": {
+      "version": 0
+    },
+    "pin_map": [
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        2,
+        2,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        1,
+        0,
+        1,
+        2
+      ],
+      [
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        1,
+        1,
+        2,
+        1,
+        1,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        1,
+        1,
+        1,
+        1,
+        1,
+        0,
+        1,
+        1,
+        1,
+        1,
+        1,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        1,
+        2,
+        0,
+        0,
+        1,
+        0,
+        2,
+        2,
+        2,
+        2
+      ],
+      [
+        0,
+        2,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        1,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        0,
+        0,
+        2
+      ],
+      [
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2
+      ]
+    ],
+    "rule_severities": {
+      "bus_definition_conflict": "error",
+      "bus_entry_needed": "error",
+      "bus_to_bus_conflict": "error",
+      "bus_to_net_conflict": "error",
+      "conflicting_netclasses": "error",
+      "different_unit_footprint": "error",
+      "different_unit_net": "error",
+      "duplicate_reference": "error",
+      "duplicate_sheet_names": "error",
+      "endpoint_off_grid": "warning",
+      "extra_units": "error",
+      "global_label_dangling": "warning",
+      "hier_label_mismatch": "error",
+      "label_dangling": "error",
+      "lib_symbol_issues": "warning",
+      "missing_bidi_pin": "warning",
+      "missing_input_pin": "warning",
+      "missing_power_pin": "error",
+      "missing_unit": "warning",
+      "multiple_net_names": "warning",
+      "net_not_bus_member": "warning",
+      "no_connect_connected": "warning",
+      "no_connect_dangling": "warning",
+      "pin_not_connected": "error",
+      "pin_not_driven": "error",
+      "pin_to_pin": "warning",
+      "power_pin_not_driven": "error",
+      "similar_labels": "warning",
+      "simulation_model_issue": "ignore",
+      "unannotated": "error",
+      "unit_value_mismatch": "error",
+      "unresolved_variable": "error",
+      "wire_dangling": "error"
+    }
+  },
+  "libraries": {
+    "pinned_footprint_libs": [],
+    "pinned_symbol_libs": []
+  },
+  "meta": {
+    "filename": "MacIIROMSIMM.kicad_pro",
+    "version": 1
+  },
+  "net_settings": {
+    "classes": [
+      {
+        "bus_width": 12,
+        "clearance": 0.15,
+        "diff_pair_gap": 0.25,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.2,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "Default",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.15,
+        "via_diameter": 0.5,
+        "via_drill": 0.3,
+        "wire_width": 6
+      }
+    ],
+    "meta": {
+      "version": 3
+    },
+    "net_colors": null,
+    "netclass_assignments": null,
+    "netclass_patterns": []
+  },
+  "pcbnew": {
+    "last_paths": {
+      "gencad": "",
+      "idf": "",
+      "netlist": "ROMSIMM.net",
+      "specctra_dsn": "",
+      "step": "",
+      "vrml": ""
+    },
+    "page_layout_descr_file": ""
+  },
+  "schematic": {
+    "annotate_start_num": 0,
+    "drawing": {
+      "dashed_lines_dash_length_ratio": 12.0,
+      "dashed_lines_gap_length_ratio": 3.0,
+      "default_line_thickness": 6.0,
+      "default_text_size": 50.0,
+      "field_names": [],
+      "intersheets_ref_own_page": false,
+      "intersheets_ref_prefix": "",
+      "intersheets_ref_short": false,
+      "intersheets_ref_show": false,
+      "intersheets_ref_suffix": "",
+      "junction_size_choice": 3,
+      "label_size_ratio": 0.25,
+      "pin_symbol_size": 0.0,
+      "text_offset_ratio": 0.08
+    },
+    "legacy_lib_dir": "",
+    "legacy_lib_list": [],
+    "meta": {
+      "version": 1
+    },
+    "net_format_name": "Pcbnew",
+    "ngspice": {
+      "fix_include_paths": true,
+      "fix_passive_vals": false,
+      "meta": {
+        "version": 0
+      },
+      "model_mode": 0,
+      "workbook_filename": ""
+    },
+    "page_layout_descr_file": "",
+    "plot_directory": "",
+    "spice_adjust_passive_values": false,
+    "spice_current_sheet_as_root": false,
+    "spice_external_command": "spice \"%I\"",
+    "spice_model_current_sheet_as_root": true,
+    "spice_save_all_currents": false,
+    "spice_save_all_voltages": false,
+    "subpart_first_id": 65,
+    "subpart_id_separator": 0
+  },
+  "sheets": [
+    [
+      "0e8f7fc0-2ef2-4b90-9c15-8a3a601ee459",
+      ""
+    ]
+  ],
+  "text_variables": {}
+}
--- a/MacIIROMSIMM.kicad_sch
+++ b/MacIIROMSIMM.kicad_sch
--- a/43
+++ b/43
@ -0,0 +1,43 @@
+KICAD = /Applications/KiCad/KiCad.app/Contents/MacOS/kicad-cli
+LAYERS = F.Cu,In1.Cu,In2.Cu,B.Cu,F.Paste,F.SilkS,B.SilkS,F.Mask,B.Mask,Edge.Cuts
+
+F_PCB = $@/../MacIIROMSIMM.kicad_pcb
+F_SCH = $@/../MacIIROMSIMM.kicad_sch
+F_POS = $@/MacIIROMSIMM-top-pos.csv
+F_ZIP = $@/MacIIROMSIMM.4402C-gerber.zip
+F_SCHPDF = $@/MacIIROMSIMM.4402C-Schematic.pdf
+F_PCBPDF = $@/MacIIROMSIMM.4402C-Placement.pdf
+
+
+OPT_GERBER = -l $(LAYERS) --subtract-soldermask --no-netlist --no-x2
+CMD_GERBER = pcb export gerbers $(OPT_GERBER) -o $@/ $(F_PCB)
+
+CMD_DRILL = pcb export drill -o $@/ $(F_PCB)
+
+OPT_POS = --smd-only --units mm --side front --format csv
+CMD_POS = pcb export pos $(OPT_POS) -o $(F_POS) $(F_PCB)
+
+CMD_SCHPDF = sch export pdf --black-and-white --no-background-color -o $(F_SCHPDF) $(F_SCH)
+CMD_PCBPDF = pcb export pdf --black-and-white -l F.Fab,Edge.Cuts -o $(F_PCBPDF) $(F_PCB)
+
+
+.PHONY: all clean gerber Documentation
+all: gerber Documentation
+clean:
+	rm -fr gerber/
+	rm -f  Documentation/MacIIROMSIMM.4402C-Schematic.pdf
+	rm -f  Documentation/MacIIROMSIMM.4402C-Placement.pdf
+
+gerber:
+	mkdir -p $@
+	$(KICAD) $(CMD_GERBER)
+	$(KICAD) $(CMD_DRILL)
+	$(KICAD) $(CMD_POS)
+	sed -i '' 's/PosX/MidX/g' $(F_POS)
+	sed -i '' 's/PosY/MidY/g' $(F_POS)
+	sed -i '' 's/Rot/Rotation/g' $(F_POS)
+	zip -r $(F_ZIP) $@/
+Documentation:
+	mkdir -p $@
+	$(KICAD) $(CMD_SCHPDF)
+	$(KICAD) $(CMD_PCBPDF)
--- a/ROMSIMM-cache.lib
+++ b/ROMSIMM-cache.lib
@ -1,410 +0,0 @@
-EESchema-LIBRARY Version 2.4
-#encoding utf-8
-#
-# Connector_Generic_Conn_02x32_Counter_Clockwise
-#
-DEF Connector_Generic_Conn_02x32_Counter_Clockwise J 0 40 Y N 1 F N
-F0 "J" 50 1600 50 H V C CNN
-F1 "Connector_Generic_Conn_02x32_Counter_Clockwise" 50 -1700 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-$FPLIST
- Connector*:*_2x??_*
-$ENDFPLIST
-DRAW
-S -50 -1595 0 -1605 1 1 6 N
-S -50 -1495 0 -1505 1 1 6 N
-S -50 -1395 0 -1405 1 1 6 N
-S -50 -1295 0 -1305 1 1 6 N
-S -50 -1195 0 -1205 1 1 6 N
-S -50 -1095 0 -1105 1 1 6 N
-S -50 -995 0 -1005 1 1 6 N
-S -50 -895 0 -905 1 1 6 N
-S -50 -795 0 -805 1 1 6 N
-S -50 -695 0 -705 1 1 6 N
-S -50 -595 0 -605 1 1 6 N
-S -50 -495 0 -505 1 1 6 N
-S -50 -395 0 -405 1 1 6 N
-S -50 -295 0 -305 1 1 6 N
-S -50 -195 0 -205 1 1 6 N
-S -50 -95 0 -105 1 1 6 N
-S -50 5 0 -5 1 1 6 N
-S -50 105 0 95 1 1 6 N
-S -50 205 0 195 1 1 6 N
-S -50 305 0 295 1 1 6 N
-S -50 405 0 395 1 1 6 N
-S -50 505 0 495 1 1 6 N
-S -50 605 0 595 1 1 6 N
-S -50 705 0 695 1 1 6 N
-S -50 805 0 795 1 1 6 N
-S -50 905 0 895 1 1 6 N
-S -50 1005 0 995 1 1 6 N
-S -50 1105 0 1095 1 1 6 N
-S -50 1205 0 1195 1 1 6 N
-S -50 1305 0 1295 1 1 6 N
-S -50 1405 0 1395 1 1 6 N
-S -50 1505 0 1495 1 1 6 N
-S -50 1550 150 -1650 1 1 10 f
-S 150 -1595 100 -1605 1 1 6 N
-S 150 -1495 100 -1505 1 1 6 N
-S 150 -1395 100 -1405 1 1 6 N
-S 150 -1295 100 -1305 1 1 6 N
-S 150 -1195 100 -1205 1 1 6 N
-S 150 -1095 100 -1105 1 1 6 N
-S 150 -995 100 -1005 1 1 6 N
-S 150 -895 100 -905 1 1 6 N
-S 150 -795 100 -805 1 1 6 N
-S 150 -695 100 -705 1 1 6 N
-S 150 -595 100 -605 1 1 6 N
-S 150 -495 100 -505 1 1 6 N
-S 150 -395 100 -405 1 1 6 N
-S 150 -295 100 -305 1 1 6 N
-S 150 -195 100 -205 1 1 6 N
-S 150 -95 100 -105 1 1 6 N
-S 150 5 100 -5 1 1 6 N
-S 150 105 100 95 1 1 6 N
-S 150 205 100 195 1 1 6 N
-S 150 305 100 295 1 1 6 N
-S 150 405 100 395 1 1 6 N
-S 150 505 100 495 1 1 6 N
-S 150 605 100 595 1 1 6 N
-S 150 705 100 695 1 1 6 N
-S 150 805 100 795 1 1 6 N
-S 150 905 100 895 1 1 6 N
-S 150 1005 100 995 1 1 6 N
-S 150 1105 100 1095 1 1 6 N
-S 150 1205 100 1195 1 1 6 N
-S 150 1305 100 1295 1 1 6 N
-S 150 1405 100 1395 1 1 6 N
-S 150 1505 100 1495 1 1 6 N
-X Pin_1 1 -200 1500 150 R 50 50 1 1 P
-X Pin_10 10 -200 600 150 R 50 50 1 1 P
-X Pin_11 11 -200 500 150 R 50 50 1 1 P
-X Pin_12 12 -200 400 150 R 50 50 1 1 P
-X Pin_13 13 -200 300 150 R 50 50 1 1 P
-X Pin_14 14 -200 200 150 R 50 50 1 1 P
-X Pin_15 15 -200 100 150 R 50 50 1 1 P
-X Pin_16 16 -200 0 150 R 50 50 1 1 P
-X Pin_17 17 -200 -100 150 R 50 50 1 1 P
-X Pin_18 18 -200 -200 150 R 50 50 1 1 P
-X Pin_19 19 -200 -300 150 R 50 50 1 1 P
-X Pin_2 2 -200 1400 150 R 50 50 1 1 P
-X Pin_20 20 -200 -400 150 R 50 50 1 1 P
-X Pin_21 21 -200 -500 150 R 50 50 1 1 P
-X Pin_22 22 -200 -600 150 R 50 50 1 1 P
-X Pin_23 23 -200 -700 150 R 50 50 1 1 P
-X Pin_24 24 -200 -800 150 R 50 50 1 1 P
-X Pin_25 25 -200 -900 150 R 50 50 1 1 P
-X Pin_26 26 -200 -1000 150 R 50 50 1 1 P
-X Pin_27 27 -200 -1100 150 R 50 50 1 1 P
-X Pin_28 28 -200 -1200 150 R 50 50 1 1 P
-X Pin_29 29 -200 -1300 150 R 50 50 1 1 P
-X Pin_3 3 -200 1300 150 R 50 50 1 1 P
-X Pin_30 30 -200 -1400 150 R 50 50 1 1 P
-X Pin_31 31 -200 -1500 150 R 50 50 1 1 P
-X Pin_32 32 -200 -1600 150 R 50 50 1 1 P
-X Pin_33 33 300 -1600 150 L 50 50 1 1 P
-X Pin_34 34 300 -1500 150 L 50 50 1 1 P
-X Pin_35 35 300 -1400 150 L 50 50 1 1 P
-X Pin_36 36 300 -1300 150 L 50 50 1 1 P
-X Pin_37 37 300 -1200 150 L 50 50 1 1 P
-X Pin_38 38 300 -1100 150 L 50 50 1 1 P
-X Pin_39 39 300 -1000 150 L 50 50 1 1 P
-X Pin_4 4 -200 1200 150 R 50 50 1 1 P
-X Pin_40 40 300 -900 150 L 50 50 1 1 P
-X Pin_41 41 300 -800 150 L 50 50 1 1 P
-X Pin_42 42 300 -700 150 L 50 50 1 1 P
-X Pin_43 43 300 -600 150 L 50 50 1 1 P
-X Pin_44 44 300 -500 150 L 50 50 1 1 P
-X Pin_45 45 300 -400 150 L 50 50 1 1 P
-X Pin_46 46 300 -300 150 L 50 50 1 1 P
-X Pin_47 47 300 -200 150 L 50 50 1 1 P
-X Pin_48 48 300 -100 150 L 50 50 1 1 P
-X Pin_49 49 300 0 150 L 50 50 1 1 P
-X Pin_5 5 -200 1100 150 R 50 50 1 1 P
-X Pin_50 50 300 100 150 L 50 50 1 1 P
-X Pin_51 51 300 200 150 L 50 50 1 1 P
-X Pin_52 52 300 300 150 L 50 50 1 1 P
-X Pin_53 53 300 400 150 L 50 50 1 1 P
-X Pin_54 54 300 500 150 L 50 50 1 1 P
-X Pin_55 55 300 600 150 L 50 50 1 1 P
-X Pin_56 56 300 700 150 L 50 50 1 1 P
-X Pin_57 57 300 800 150 L 50 50 1 1 P
-X Pin_58 58 300 900 150 L 50 50 1 1 P
-X Pin_59 59 300 1000 150 L 50 50 1 1 P
-X Pin_6 6 -200 1000 150 R 50 50 1 1 P
-X Pin_60 60 300 1100 150 L 50 50 1 1 P
-X Pin_61 61 300 1200 150 L 50 50 1 1 P
-X Pin_62 62 300 1300 150 L 50 50 1 1 P
-X Pin_63 63 300 1400 150 L 50 50 1 1 P
-X Pin_64 64 300 1500 150 L 50 50 1 1 P
-X Pin_7 7 -200 900 150 R 50 50 1 1 P
-X Pin_8 8 -200 800 150 R 50 50 1 1 P
-X Pin_9 9 -200 700 150 R 50 50 1 1 P
-ENDDRAW
-ENDDEF
-#
-# Device_C_Small
-#
-DEF Device_C_Small C 0 10 N N 1 F N
-F0 "C" 10 70 50 H V L CNN
-F1 "Device_C_Small" 10 -80 50 H V L CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-$FPLIST
- C_*
-$ENDFPLIST
-DRAW
-P 2 0 1 13 -60 -20 60 -20 N
-P 2 0 1 12 -60 20 60 20 N
-X ~ 1 0 100 80 D 50 50 1 1 P
-X ~ 2 0 -100 80 U 50 50 1 1 P
-ENDDRAW
-ENDDEF
-#
-# Device_R_Small
-#
-DEF Device_R_Small R 0 10 N N 1 F N
-F0 "R" 30 20 50 H V L CNN
-F1 "Device_R_Small" 30 -40 50 H V L CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-$FPLIST
- R_*
-$ENDFPLIST
-DRAW
-S -30 70 30 -70 0 1 8 N
-X ~ 1 0 100 30 D 50 50 1 1 P
-X ~ 2 0 -100 30 U 50 50 1 1 P
-ENDDRAW
-ENDDEF
-#
-# GW_Logic_741G02GW
-#
-DEF GW_Logic_741G02GW U 0 40 Y Y 1 F N
-F0 "U" 0 250 50 H V C CNN
-F1 "GW_Logic_741G02GW" 0 -250 50 H V C CNN
-F2 "stdpads:SOT-353" 0 -300 50 H I C TNN
-F3 "" 0 -200 60 H I C CNN
-DRAW
-S 200 -200 -200 200 0 1 10 f
-X B 1 -400 100 200 R 50 50 1 1 I
-X A 2 -400 0 200 R 50 50 1 1 I
-X GND 3 -400 -100 200 R 50 50 1 1 W
-X Y 4 400 -100 200 L 50 50 1 1 O
-X Vcc 5 400 100 200 L 50 50 1 1 W
-ENDDRAW
-ENDDEF
-#
-# GW_Logic_74245
-#
-DEF GW_Logic_74245 U 0 40 Y Y 1 F N
-F0 "U" 0 600 50 H V C CNN
-F1 "GW_Logic_74245" 0 -600 50 H V C CNN
-F2 "" 0 -650 50 H I C TNN
-F3 "" 0 100 60 H I C CNN
-DRAW
-S -200 550 200 -550 0 1 10 f
-X AtoB 1 -400 450 200 R 50 50 1 1 I
-X GND 10 -400 -450 200 R 50 50 1 1 W
-X B7 11 400 -450 200 L 50 50 1 1 B
-X B6 12 400 -350 200 L 50 50 1 1 B
-X B5 13 400 -250 200 L 50 50 1 1 B
-X B4 14 400 -150 200 L 50 50 1 1 B
-X B3 15 400 -50 200 L 50 50 1 1 B
-X B2 16 400 50 200 L 50 50 1 1 B
-X B1 17 400 150 200 L 50 50 1 1 B
-X B0 18 400 250 200 L 50 50 1 1 B
-X ~OE~ 19 400 350 200 L 50 50 1 1 I
-X A0 2 -400 350 200 R 50 50 1 1 B
-X Vcc 20 400 450 200 L 50 50 1 1 W
-X A1 3 -400 250 200 R 50 50 1 1 B
-X A2 4 -400 150 200 R 50 50 1 1 B
-X A3 5 -400 50 200 R 50 50 1 1 B
-X A4 6 -400 -50 200 R 50 50 1 1 B
-X A5 7 -400 -150 200 R 50 50 1 1 B
-X A6 8 -400 -250 200 R 50 50 1 1 B
-X A7 9 -400 -350 200 R 50 50 1 1 B
-ENDDRAW
-ENDDEF
-#
-# GW_RAM_Flash-4Mx16-TSOP1-48
-#
-DEF GW_RAM_Flash-4Mx16-TSOP1-48 U 0 20 Y Y 1 F N
-F0 "U" 0 1050 50 H V C CNN
-F1 "GW_RAM_Flash-4Mx16-TSOP1-48" 0 0 50 V V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-DRAW
-S -300 1000 300 -1700 0 1 10 f
-X GND 27 -500 -1600 200 R 50 50 0 0 W
-X VCC 37 -500 900 200 R 50 50 0 0 W
-X A15 1 -500 -800 200 R 50 50 1 1 I
-X A20 10 -500 -1300 200 R 50 50 1 1 I
-X ~WE~ 11 500 -1500 200 L 50 50 1 1 I L
-X ~RESET~ 12 500 -800 200 L 50 50 1 1 I L
-X A21 13 -500 -1400 200 R 50 50 1 1 I
-X ~WP~ 14 500 -1100 200 L 50 50 1 1 I L
-X ~BY~ 15 500 -1200 200 L 50 50 1 1 I L
-X A18 16 -500 -1100 200 R 50 50 1 1 I
-X A17 17 -500 -1000 200 R 50 50 1 1 I
-X A7 18 -500 0 200 R 50 50 1 1 I
-X A6 19 -500 100 200 R 50 50 1 1 I
-X A14 2 -500 -700 200 R 50 50 1 1 I
-X A5 20 -500 200 200 R 50 50 1 1 I
-X A4 21 -500 300 200 R 50 50 1 1 I
-X A3 22 -500 400 200 R 50 50 1 1 I
-X A2 23 -500 500 200 R 50 50 1 1 I
-X A1 24 -500 600 200 R 50 50 1 1 I
-X A0 25 -500 700 200 R 50 50 1 1 I
-X ~CS~ 26 500 -1400 200 L 50 50 1 1 I L
-X ~OE~ 28 500 -1600 200 L 50 50 1 1 I L
-X D0 29 500 900 200 L 50 50 1 1 B
-X A13 3 -500 -600 200 R 50 50 1 1 I
-X D8 30 500 100 200 L 50 50 1 1 B
-X D1 31 500 800 200 L 50 50 1 1 B
-X D9 32 500 0 200 L 50 50 1 1 B
-X D2 33 500 700 200 L 50 50 1 1 B
-X D10 34 500 -100 200 L 50 50 1 1 B
-X D3 35 500 600 200 L 50 50 1 1 B
-X D11 36 500 -200 200 L 50 50 1 1 B
-X D4 38 500 500 200 L 50 50 1 1 B
-X D12 39 500 -300 200 L 50 50 1 1 B
-X A12 4 -500 -500 200 R 50 50 1 1 I
-X D5 40 500 400 200 L 50 50 1 1 B
-X D13 41 500 -400 200 L 50 50 1 1 B
-X D6 42 500 300 200 L 50 50 1 1 B
-X D14 43 500 -500 200 L 50 50 1 1 B
-X D7 44 500 200 200 L 50 50 1 1 B
-X D15/A22 45 500 -600 200 L 50 50 1 1 B
-X GND 46 -500 -1600 200 R 50 50 1 1 W
-X ~BYTE~ 47 500 -900 200 L 50 50 1 1 I L
-X A16 48 -500 -900 200 R 50 50 1 1 I
-X A11 5 -500 -400 200 R 50 50 1 1 I
-X A10 6 -500 -300 200 R 50 50 1 1 I
-X A9 7 -500 -200 200 R 50 50 1 1 I
-X A8 8 -500 -100 200 R 50 50 1 1 I
-X A19 9 -500 -1200 200 R 50 50 1 1 I
-ENDDRAW
-ENDDEF
-#
-# Mechanical_Fiducial
-#
-DEF Mechanical_Fiducial FID 0 20 Y Y 1 F N
-F0 "FID" 0 200 50 H V C CNN
-F1 "Mechanical_Fiducial" 0 125 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-$FPLIST
- Fiducial*
-$ENDFPLIST
-DRAW
-C 0 0 50 0 1 20 f
-ENDDRAW
-ENDDEF
-#
-# Mechanical_MountingHole_Pad
-#
-DEF Mechanical_MountingHole_Pad H 0 40 N N 1 F N
-F0 "H" 0 250 50 H V C CNN
-F1 "Mechanical_MountingHole_Pad" 0 175 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-$FPLIST
- MountingHole*Pad*
-$ENDFPLIST
-DRAW
-C 0 50 50 0 1 50 N
-X 1 1 0 -100 100 U 50 50 1 1 I
-ENDDRAW
-ENDDEF
-#
-# Regulator_Linear_XC6206PxxxMR
-#
-DEF Regulator_Linear_XC6206PxxxMR U 0 10 Y Y 1 F N
-F0 "U" -150 125 50 H V C CNN
-F1 "Regulator_Linear_XC6206PxxxMR" 0 125 50 H V L CNN
-F2 "Package_TO_SOT_SMD:SOT-23" 0 225 50 H I C CIN
-F3 "" 0 0 50 H I C CNN
-ALIAS APE8865N-15-HF-3 APE8865N-16-HF-3 APE8865N-17-HF-3 APE8865N-18-HF-3 APE8865N-19-HF-3 APE8865N-20-HF-3 APE8865N-21-HF-3 APE8865N-22-HF-3 APE8865N-23-HF-3 APE8865N-24-HF-3 APE8865N-25-HF-3 APE8865N-26-HF-3 APE8865N-27-HF-3 APE8865N-28-HF-3 APE8865N-29-HF-3 APE8865N-30-HF-3 APE8865N-31-HF-3 APE8865N-32-HF-3 APE8865N-33-HF-3 AP2127N-1.0 AP2127N-1.2 AP2127N-1.5 AP2127N-1.8 AP2127N-2.5 AP2127N-2.8 AP2127N-3.0 AP2127N-3.3 XC6206PxxxMR
-$FPLIST
- SOT?23*
-$ENDFPLIST
-DRAW
-S -200 75 200 -200 0 1 10 f
-X GND 1 0 -300 100 U 50 50 1 1 W
-X VO 2 300 0 100 L 50 50 1 1 w
-X VI 3 -300 0 100 R 50 50 1 1 W
-ENDDRAW
-ENDDEF
-#
-# Switch_SW_DIP_x02
-#
-DEF Switch_SW_DIP_x02 SW 0 0 Y N 1 F N
-F0 "SW" 0 250 50 H V C CNN
-F1 "Switch_SW_DIP_x02" 0 -150 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-$FPLIST
- SW?DIP?x2*
-$ENDFPLIST
-DRAW
-C -80 0 20 0 0 0 N
-C -80 100 20 0 0 0 N
-C 80 0 20 0 0 0 N
-C 80 100 20 0 0 0 N
-S -150 200 150 -100 0 1 10 f
-P 2 0 0 0 -60 5 93 46 N
-P 2 0 0 0 -60 105 93 146 N
-X ~ 1 -300 100 200 R 50 50 1 1 P
-X ~ 2 -300 0 200 R 50 50 1 1 P
-X ~ 3 300 0 200 L 50 50 1 1 P
-X ~ 4 300 100 200 L 50 50 1 1 P
-ENDDRAW
-ENDDEF
-#
-# power_+3V3
-#
-DEF power_+3V3 #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 -150 50 H I C CNN
-F1 "power_+3V3" 0 140 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-ALIAS +3.3V
-DRAW
-P 2 0 1 0 -30 50 0 100 N
-P 2 0 1 0 0 0 0 100 N
-P 2 0 1 0 0 100 30 50 N
-X +3V3 1 0 0 0 U 50 50 1 1 W N
-ENDDRAW
-ENDDEF
-#
-# power_+5V
-#
-DEF power_+5V #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 -150 50 H I C CNN
-F1 "power_+5V" 0 140 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-DRAW
-P 2 0 1 0 -30 50 0 100 N
-P 2 0 1 0 0 0 0 100 N
-P 2 0 1 0 0 100 30 50 N
-X +5V 1 0 0 0 U 50 50 1 1 W N
-ENDDRAW
-ENDDEF
-#
-# power_GND
-#
-DEF power_GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 -250 50 H I C CNN
-F1 "power_GND" 0 -150 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-DRAW
-P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
-X GND 1 0 0 0 D 50 50 1 1 W N
-ENDDRAW
-ENDDEF
-#
-#End Library
--- a/ROMSIMM.kicad_pcb
+++ b/ROMSIMM.kicad_pcb
--- a/ROMSIMM.pro
+++ b/ROMSIMM.pro
@ -1,264 +0,0 @@
-update=Saturday, April 03, 2021 at 03:29:41 AM
-version=1
-last_client=kicad
-[general]
-version=1
-RootSch=
-BoardNm=
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=
-[eeschema/libraries]
-[pcbnew]
-version=1
-PageLayoutDescrFile=
-LastNetListRead=ROMSIMM.net
-CopperLayerCount=4
-BoardThickness=1.6
-AllowMicroVias=0
-AllowBlindVias=0
-RequireCourtyardDefinitions=0
-ProhibitOverlappingCourtyards=1
-MinTrackWidth=0.15
-MinViaDiameter=0.5
-MinViaDrill=0.2
-MinMicroViaDiameter=0.2
-MinMicroViaDrill=0.09999999999999999
-MinHoleToHole=0.25
-TrackWidth1=0.15
-TrackWidth2=0.2
-TrackWidth3=0.25
-TrackWidth4=0.3
-TrackWidth5=0.35
-TrackWidth6=0.4
-TrackWidth7=0.45
-TrackWidth8=0.5
-TrackWidth9=0.6
-TrackWidth10=0.8
-TrackWidth11=1
-ViaDiameter1=0.5
-ViaDrill1=0.2
-ViaDiameter2=0.6
-ViaDrill2=0.3
-ViaDiameter3=0.8
-ViaDrill3=0.4
-ViaDiameter4=1
-ViaDrill4=0.5
-dPairWidth1=0.2
-dPairGap1=0.25
-dPairViaGap1=0.25
-SilkLineWidth=0.15
-SilkTextSizeV=1
-SilkTextSizeH=1
-SilkTextSizeThickness=0.15
-SilkTextItalic=0
-SilkTextUpright=1
-CopperLineWidth=0.2
-CopperTextSizeV=1.5
-CopperTextSizeH=1.5
-CopperTextThickness=0.3
-CopperTextItalic=0
-CopperTextUpright=1
-EdgeCutLineWidth=0.15
-CourtyardLineWidth=0.05
-OthersLineWidth=0.15
-OthersTextSizeV=1
-OthersTextSizeH=1
-OthersTextSizeThickness=0.15
-OthersTextItalic=0
-OthersTextUpright=1
-SolderMaskClearance=0.075
-SolderMaskMinWidth=0.09999999999999999
-SolderPasteClearance=-0.03809999999999999
-SolderPasteRatio=-0
-[pcbnew/Layer.F.Cu]
-Name=F.Cu
-Type=0
-Enabled=1
-[pcbnew/Layer.In1.Cu]
-Name=In1.Cu
-Type=1
-Enabled=1
-[pcbnew/Layer.In2.Cu]
-Name=In2.Cu
-Type=0
-Enabled=1
-[pcbnew/Layer.In3.Cu]
-Name=In3.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In4.Cu]
-Name=In4.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In5.Cu]
-Name=In5.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In6.Cu]
-Name=In6.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In7.Cu]
-Name=In7.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In8.Cu]
-Name=In8.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In9.Cu]
-Name=In9.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In10.Cu]
-Name=In10.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In11.Cu]
-Name=In11.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In12.Cu]
-Name=In12.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In13.Cu]
-Name=In13.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In14.Cu]
-Name=In14.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In15.Cu]
-Name=In15.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In16.Cu]
-Name=In16.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In17.Cu]
-Name=In17.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In18.Cu]
-Name=In18.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In19.Cu]
-Name=In19.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In20.Cu]
-Name=In20.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In21.Cu]
-Name=In21.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In22.Cu]
-Name=In22.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In23.Cu]
-Name=In23.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In24.Cu]
-Name=In24.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In25.Cu]
-Name=In25.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In26.Cu]
-Name=In26.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In27.Cu]
-Name=In27.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In28.Cu]
-Name=In28.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In29.Cu]
-Name=In29.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.In30.Cu]
-Name=In30.Cu
-Type=0
-Enabled=0
-[pcbnew/Layer.B.Cu]
-Name=B.Cu
-Type=1
-Enabled=1
-[pcbnew/Layer.B.Adhes]
-Enabled=1
-[pcbnew/Layer.F.Adhes]
-Enabled=1
-[pcbnew/Layer.B.Paste]
-Enabled=1
-[pcbnew/Layer.F.Paste]
-Enabled=1
-[pcbnew/Layer.B.SilkS]
-Enabled=1
-[pcbnew/Layer.F.SilkS]
-Enabled=1
-[pcbnew/Layer.B.Mask]
-Enabled=1
-[pcbnew/Layer.F.Mask]
-Enabled=1
-[pcbnew/Layer.Dwgs.User]
-Enabled=1
-[pcbnew/Layer.Cmts.User]
-Enabled=1
-[pcbnew/Layer.Eco1.User]
-Enabled=1
-[pcbnew/Layer.Eco2.User]
-Enabled=1
-[pcbnew/Layer.Edge.Cuts]
-Enabled=1
-[pcbnew/Layer.Margin]
-Enabled=1
-[pcbnew/Layer.B.CrtYd]
-Enabled=1
-[pcbnew/Layer.F.CrtYd]
-Enabled=1
-[pcbnew/Layer.B.Fab]
-Enabled=1
-[pcbnew/Layer.F.Fab]
-Enabled=1
-[pcbnew/Layer.Rescue]
-Enabled=0
-[pcbnew/Netclasses]
-[pcbnew/Netclasses/Default]
-Name=Default
-Clearance=0.15
-TrackWidth=0.15
-ViaDiameter=0.5
-ViaDrill=0.2
-uViaDiameter=0.3
-uViaDrill=0.1
-dPairWidth=0.2
-dPairGap=0.25
-dPairViaGap=0.25
-[schematic_editor]
-version=1
-PageLayoutDescrFile=
-PlotDirectoryName=
-SubpartIdSeparator=0
-SubpartFirstId=65
-NetFmtName=Pcbnew
-SpiceAjustPassiveValues=0
-LabSize=50
-ERC_TestSimilarLabels=1
--- a/ROMSIMM.sch
+++ b/ROMSIMM.sch
--- a/ROMSIMM8MB.4402B-gerber.zip
+++ b/ROMSIMM8MB.4402B-gerber.zip
--- a/gerber/MacIIROMSIMM-B_Cu.gbl
+++ b/gerber/MacIIROMSIMM-B_Cu.gbl
--- a/gerber/MacIIROMSIMM-B_Mask.gbs
+++ b/gerber/MacIIROMSIMM-B_Mask.gbs
--- a/gerber/MacIIROMSIMM-B_Silkscreen.gbo
+++ b/gerber/MacIIROMSIMM-B_Silkscreen.gbo
--- a/gerber/MacIIROMSIMM-Edge_Cuts.gm1
+++ b/gerber/MacIIROMSIMM-Edge_Cuts.gm1
@ -0,0 +1,77 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,7.0.10*
+G04 #@! TF.CreationDate,2024-05-18T05:47:17-04:00*
+G04 #@! TF.ProjectId,MacIIROMSIMM,4d616349-4952-44f4-9d53-494d4d2e6b69,1.0*
+G04 #@! TF.SameCoordinates,Original*
+G04 #@! TF.FileFunction,Profile,NP*
+%FSLAX46Y46*%
+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
+G04 Created by KiCad (PCBNEW 7.0.10) date 2024-05-18 05:47:17*
+%MOMM*%
+%LPD*%
+G01*
+G04 APERTURE LIST*
+G04 #@! TA.AperFunction,Profile*
+%ADD10C,0.150000*%
+G04 #@! TD*
+G04 APERTURE END LIST*
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--- a/gerber/MacIIROMSIMM-F_Cu.gtl
+++ b/gerber/MacIIROMSIMM-F_Cu.gtl
--- a/gerber/MacIIROMSIMM-F_Mask.gts
+++ b/gerber/MacIIROMSIMM-F_Mask.gts
--- a/gerber/MacIIROMSIMM-F_Paste.gtp
+++ b/gerber/MacIIROMSIMM-F_Paste.gtp
@ -0,0 +1,353 @@
+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,7.0.10*
+G04 #@! TF.CreationDate,2024-05-18T05:47:17-04:00*
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+G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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+0 Add a 4 corners polygon primitive as box body*
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--- a/gerber/MacIIROMSIMM-F_Silkscreen.gto
+++ b/gerber/MacIIROMSIMM-F_Silkscreen.gto
--- a/gerber/MacIIROMSIMM-In1_Cu.g2
+++ b/gerber/MacIIROMSIMM-In1_Cu.g2
--- a/gerber/MacIIROMSIMM-In2_Cu.g3
+++ b/gerber/MacIIROMSIMM-In2_Cu.g3
--- a/gerber/MacIIROMSIMM-job.gbrjob
+++ b/gerber/MacIIROMSIMM-job.gbrjob
@ -0,0 +1,156 @@
+{
+  "Header": {
+    "GenerationSoftware": {
+      "Vendor": "KiCad",
+      "Application": "Pcbnew",
+      "Version": "7.0.10"
+    },
+    "CreationDate": "2024-05-18T05:47:17-04:00"
+  },
+  "GeneralSpecs": {
+    "ProjectId": {
+      "Name": "MacIIROMSIMM",
+      "GUID": "4d616349-4952-44f4-9d53-494d4d2e6b69",
+      "Revision": "1.0"
+    },
+    "Size": {
+      "X": 97.94,
+      "Y": 25.169
+    },
+    "LayerNumber": 4,
+    "BoardThickness": 1.6,
+    "Finish": "None"
+  },
+  "DesignRules": [
+    {
+      "Layers": "Outer",
+      "PadToPad": 0.15,
+      "PadToTrack": 0.15,
+      "TrackToTrack": 0.15,
+      "MinLineWidth": 0.15,
+      "TrackToRegion": 0.154,
+      "RegionToRegion": 0.154
+    },
+    {
+      "Layers": "Inner",
+      "PadToPad": 0.15,
+      "PadToTrack": 0.15,
+      "TrackToTrack": 0.15,
+      "MinLineWidth": 0.15,
+      "TrackToRegion": 0.154,
+      "RegionToRegion": 0.154
+    }
+  ],
+  "FilesAttributes": [
+    {
+      "Path": "MacIIROMSIMM-F_Cu.gtl",
+      "FileFunction": "Copper,L1,Top",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "MacIIROMSIMM-In1_Cu.g2",
+      "FileFunction": "Copper,L2,Inr",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "MacIIROMSIMM-In2_Cu.g3",
+      "FileFunction": "Copper,L3,Inr",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "MacIIROMSIMM-B_Cu.gbl",
+      "FileFunction": "Copper,L4,Bot",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "MacIIROMSIMM-F_Paste.gtp",
+      "FileFunction": "SolderPaste,Top",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "MacIIROMSIMM-F_Silkscreen.gto",
+      "FileFunction": "Legend,Top",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "MacIIROMSIMM-B_Silkscreen.gbo",
+      "FileFunction": "Legend,Bot",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "MacIIROMSIMM-F_Mask.gts",
+      "FileFunction": "SolderMask,Top",
+      "FilePolarity": "Negative"
+    },
+    {
+      "Path": "MacIIROMSIMM-B_Mask.gbs",
+      "FileFunction": "SolderMask,Bot",
+      "FilePolarity": "Negative"
+    },
+    {
+      "Path": "MacIIROMSIMM-Edge_Cuts.gm1",
+      "FileFunction": "Profile",
+      "FilePolarity": "Positive"
+    }
+  ],
+  "MaterialStackup": [
+    {
+      "Type": "Legend",
+      "Name": "Top Silk Screen"
+    },
+    {
+      "Type": "SolderPaste",
+      "Name": "Top Solder Paste"
+    },
+    {
+      "Type": "SolderMask",
+      "Name": "Top Solder Mask"
+    },
+    {
+      "Type": "Copper",
+      "Name": "F.Cu"
+    },
+    {
+      "Type": "Dielectric",
+      "Material": "FR4",
+      "Name": "F.Cu/In1.Cu",
+      "Notes": "Type: dielectric layer 1 (from F.Cu to In1.Cu)"
+    },
+    {
+      "Type": "Copper",
+      "Name": "In1.Cu"
+    },
+    {
+      "Type": "Dielectric",
+      "Material": "FR4",
+      "Name": "In1.Cu/In2.Cu",
+      "Notes": "Type: dielectric layer 2 (from In1.Cu to In2.Cu)"
+    },
+    {
+      "Type": "Copper",
+      "Name": "In2.Cu"
+    },
+    {
+      "Type": "Dielectric",
+      "Material": "FR4",
+      "Name": "In2.Cu/B.Cu",
+      "Notes": "Type: dielectric layer 3 (from In2.Cu to B.Cu)"
+    },
+    {
+      "Type": "Copper",
+      "Name": "B.Cu"
+    },
+    {
+      "Type": "SolderMask",
+      "Name": "Bottom Solder Mask"
+    },
+    {
+      "Type": "SolderPaste",
+      "Name": "Bottom Solder Paste"
+    },
+    {
+      "Type": "Legend",
+      "Name": "Bottom Silk Screen"
+    }
+  ]
+}
--- a/gerber/MacIIROMSIMM-top-pos.csv
+++ b/gerber/MacIIROMSIMM-top-pos.csv
@ -1,9 +1,9 @@
-Ref,Val,Package,MidX,MidY,Rot,Side
+Ref,Val,Package,MidX,MidY,Rotation,Side
 "C1","2u2","C_0603",77.600000,-121.123000,90.000000,top
 "C2","2u2","C_0603",141.500000,-122.350000,90.000000,top
 "C3","2u2","C_0603",78.350000,-113.750000,0.000000,top
 "C4","2u2","C_0603",111.750000,-109.450000,0.000000,top
-"C5","2u2","C_0603",154.550000,-109.450000,0.000000,top
+"C5","2u2","C_0603",154.350000,-109.450000,0.000000,top
 "C6","2u2","C_0603",86.350000,-122.350000,90.000000,top
 "C7","2u2","C_0603",96.500000,-122.350000,90.000000,top
 "C8","2u2","C_0603",106.713500,-122.350000,90.000000,top
@ -17,20 +17,20 @@ Ref,Val,Package,MidX,MidY,Rot,Side
 "FID1","Fiducial","Fiducial",75.946000,-104.267000,0.000000,top
 "FID2","Fiducial","Fiducial",75.438000,-123.444000,0.000000,top
 "FID3","Fiducial","Fiducial",167.894000,-123.444000,0.000000,top
-"FID4","Fiducial","Fiducial",165.354000,-104.267000,0.000000,top
-"R1","3k3","R_0603",155.450000,-104.350000,180.000000,top
-"R2","3k3","R_0603",155.450000,-105.800000,180.000000,top
+"FID4","Fiducial","Fiducial",162.433000,-104.267000,0.000000,top
+"R1","3k3","R_0603",156.850000,-104.400000,180.000000,top
+"R2","3k3","R_0603",159.700000,-104.400000,0.000000,top
 "R3","100","R_0603",118.750000,-119.700000,180.000000,top
-"SW1","ROM Sel.","SW_DIP_SPSTx02_Slide_DSHP02TS_P1.27mm",159.512000,-110.871000,0.000000,top
-"U1","MX29LV640","TSOP-I-48_18.4x12mm_P0.5mm",99.450000,-109.700000,270.000000,top
-"U2","MX29LV640","TSOP-I-48_18.4x12mm_P0.5mm",142.240000,-109.700000,270.000000,top
+"R4","3k3","R_0603",154.750000,-105.100000,90.000000,top
+"SW1","ROM Sel.","SW_DIP_SPSTx03_Slide_DSHP03TS_P1.27mm",158.623000,-110.871000,0.000000,top
+"U1","MX29LV640","TSOP-I-48_18.4x12mm_P0.5mm",99.450000,-109.700000,-90.000000,top
+"U2","MX29LV640","TSOP-I-48_18.4x12mm_P0.5mm",142.240000,-109.700000,-90.000000,top
 "U3","74AHC245","TSSOP-20_4.4x6.5mm_P0.65mm",102.175000,-120.150000,180.000000,top
 "U4","74AHC245","TSSOP-20_4.4x6.5mm_P0.65mm",112.375000,-120.150000,180.000000,top
 "U5","74AHC245","TSSOP-20_4.4x6.5mm_P0.65mm",146.575000,-120.150000,180.000000,top
 "U6","74AHC245","TSSOP-20_4.4x6.5mm_P0.65mm",155.525000,-120.150000,180.000000,top
 "U7","74AHC245","TSSOP-20_4.4x6.5mm_P0.65mm",81.875000,-120.150000,180.000000,top
-"U8","74AHC245","TSSOP-20_4.4x6.5mm_P0.65mm",92.025000,-120.150000,180.000000,top
 "U9","74AHC245","TSSOP-20_4.4x6.5mm_P0.65mm",125.075000,-120.150000,180.000000,top
 "U10","74AHC245","TSSOP-20_4.4x6.5mm_P0.65mm",135.225000,-120.150000,180.000000,top
 "U11","XC6206P332MR","SOT-23",78.350000,-111.150000,0.000000,top
-"U12","74LVC1G02GW","SOT-353",97.100000,-118.950000,90.000000,top
+"U12","74LVC1G02GW","SOT-353",97.100000,-118.950000,0.000000,top
--- a/gerber/MacIIROMSIMM.4402C-gerber.zip
+++ b/gerber/MacIIROMSIMM.4402C-gerber.zip
--- a/gerber/MacIIROMSIMM.drl
+++ b/gerber/MacIIROMSIMM.drl
@ -0,0 +1,445 @@
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+M30
--- a/gerber/ROMSIMM-BOM.csv
+++ b/gerber/ROMSIMM-BOM.csv
@ -1,12 +0,0 @@
-Reference, Quantity, Value, Footprint, Datasheet, LCSC Part
-C5 C6 C12 C13 C7 C8 C9 C1 C2 C3 C11 C10 C4 C14 C15 ,15,"2u2","stdpads:C_0603","~","C23630"
-FID1 FID2 FID3 FID4 ,4,"Fiducial","stdpads:Fiducial","~"
-H3 H4 H2 H1 ,4," ","stdpads:PasteHole_1.152mm_NPTH","~"
-J1 ,1,"ROM","stdpads:MacIIROMSIMM_Edge","~"
-R1 R2 ,2,"3k3","stdpads:R_0603","~","C22978"
-R3 ,1,"100","stdpads:R_0603","~","C22775"
-SW1 ,1,"SW_DIP_x02","stdpads:SW_DIP_SPSTx02_Slide_DSHP02TS_P1.27mm","~","C319052"
-U11 ,1,"XC6206P332MR","stdpads:SOT-23","https://www.torexsemi.com/file/xc6206/XC6206.pdf","C5446"
-U12 ,1,"74LVC1G02GW","stdpads:SOT-353","","C353856"
-U2 U1 ,2,"MX29LV640","stdpads:TSOP-I-48_18.4x12mm_P0.5mm","http://ww1.microchip.com/downloads/en/DeviceDoc/25022B.pdf","C117907"
-U6 U5 U4 U3 U10 U8 U7 U9 ,8,"74AHC245","stdpads:TSSOP-20_4.4x6.5mm_P0.65mm","","C132987"
--- a/gerber/ROMSIMM-B_Cu.gbl
+++ b/gerber/ROMSIMM-B_Cu.gbl
--- a/gerber/ROMSIMM-B_Mask.gbs
+++ b/gerber/ROMSIMM-B_Mask.gbs
--- a/gerber/ROMSIMM-B_SilkS.gbo
+++ b/gerber/ROMSIMM-B_SilkS.gbo
--- a/gerber/ROMSIMM-Edge_Cuts.gm1
+++ b/gerber/ROMSIMM-Edge_Cuts.gm1
@ -1,57 +0,0 @@
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-G04 #@! TF.CreationDate,2021-04-13T03:25:21-04:00*
-G04 #@! TF.ProjectId,ROMSIMM,524f4d53-494d-44d2-9e6b-696361645f70,1.0*
-G04 #@! TF.SameCoordinates,Original*
-G04 #@! TF.FileFunction,Profile,NP*
-%FSLAX46Y46*%
-G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW (5.1.5-0-10_14)) date 2021-04-13 03:25:21*
-%MOMM*%
-%LPD*%
-G04 APERTURE LIST*
-%ADD10C,0.150000*%
-G04 APERTURE END LIST*
-D10*
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-G03X76733200Y-117475000I-1600000J0D01*
-G01*
-X72136000Y-121285000D02*
-X72199500Y-121285000D01*
-X71755000Y-104140000D02*
-G75*
-G02X73279000Y-102616000I1524000J0D01*
-G01*
-X168021000Y-102616000D02*
-G75*
-G02X169545000Y-104140000I0J-1524000D01*
-G01*
-X73787000Y-122872500D02*
-X73787000Y-127635000D01*
-X73787000Y-127635000D02*
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-X122237500Y-127635000D02*
-X169545000Y-127635000D01*
-X169545000Y-127635000D02*
-X169545000Y-104140000D01*
-X71755000Y-120904000D02*
-X71755000Y-104140000D01*
-X72199500Y-121285000D02*
-G75*
-G02X73787000Y-122872500I0J-1587500D01*
-G01*
-X119062500Y-127635000D02*
-G75*
-G02X122237500Y-127635000I1587500J0D01*
-G01*
-X73279000Y-102616000D02*
-X168021000Y-102616000D01*
-M02*
--- a/gerber/ROMSIMM-F_Cu.gtl
+++ b/gerber/ROMSIMM-F_Cu.gtl
--- a/gerber/ROMSIMM-F_Fab.gbr
+++ b/gerber/ROMSIMM-F_Fab.gbr
--- a/gerber/ROMSIMM-F_Mask.gts
+++ b/gerber/ROMSIMM-F_Mask.gts
--- a/gerber/ROMSIMM-F_Paste.gtp
+++ b/gerber/ROMSIMM-F_Paste.gtp
--- a/gerber/ROMSIMM-F_SilkS.gto
+++ b/gerber/ROMSIMM-F_SilkS.gto
--- a/gerber/ROMSIMM-In1_Cu.g2
+++ b/gerber/ROMSIMM-In1_Cu.g2
--- a/gerber/ROMSIMM-In2_Cu.g3
+++ b/gerber/ROMSIMM-In2_Cu.g3
--- a/gerber/ROMSIMM-bottom-pos.csv
+++ b/gerber/ROMSIMM-bottom-pos.csv
@ -1 +0,0 @@
-Ref,Val,Package,MidX,MidY,Rot,Side
--- a/gerber/ROMSIMM-bottom.pos
+++ b/gerber/ROMSIMM-bottom.pos
@ -1,6 +0,0 @@
-### Module positions - created on Tuesday, April 13, 2021 at 03:25:24 AM ###
-### Printed by Pcbnew version kicad (5.1.5-0-10_14)
-## Unit = mm, Angle = deg.
-## Side : bottom
-# Ref     Val       Package                PosX       PosY       Rot  Side
-## End
--- a/gerber/ROMSIMM-drl_map.ps
+++ b/gerber/ROMSIMM-drl_map.ps
--- a/gerber/ROMSIMM-top.pos
+++ b/gerber/ROMSIMM-top.pos
@ -1,41 +0,0 @@
-### Module positions - created on Tuesday, April 13, 2021 at 03:25:24 AM ###
-### Printed by Pcbnew version kicad (5.1.5-0-10_14)
-## Unit = mm, Angle = deg.
-## Side : top
-# Ref     Val           Package                                     PosX       PosY       Rot  Side
-C1        2u2           C_0603                                   77.6000  -121.1230   90.0000  top
-C2        2u2           C_0603                                  141.5000  -122.3500   90.0000  top
-C3        2u2           C_0603                                   78.3500  -113.7500    0.0000  top
-C4        2u2           C_0603                                  111.7500  -109.4500    0.0000  top
-C5        2u2           C_0603                                  154.5500  -109.4500    0.0000  top
-C6        2u2           C_0603                                   86.3500  -122.3500   90.0000  top
-C7        2u2           C_0603                                   96.5000  -122.3500   90.0000  top
-C8        2u2           C_0603                                  106.7135  -122.3500   90.0000  top
-C9        2u2           C_0603                                  116.8500  -122.3500   90.0000  top
-C10       2u2           C_0603                                  129.5500  -122.3500   90.0000  top
-C11       2u2           C_0603                                  139.7000  -122.3500   90.0000  top
-C12       2u2           C_0603                                  151.0500  -122.3500   90.0000  top
-C13       2u2           C_0603                                  160.0000  -122.3500   90.0000  top
-C14       2u2           C_0603                                   86.6000  -108.7000   90.0000  top
-C15       2u2           C_0603                                  126.8500  -109.4000    0.0000  top
-FID1      Fiducial      Fiducial                                 75.9460  -104.2670    0.0000  top
-FID2      Fiducial      Fiducial                                 75.4380  -123.4440    0.0000  top
-FID3      Fiducial      Fiducial                                167.8940  -123.4440    0.0000  top
-FID4      Fiducial      Fiducial                                165.3540  -104.2670    0.0000  top
-R1        3k3           R_0603                                  155.4500  -104.3500  180.0000  top
-R2        3k3           R_0603                                  155.4500  -105.8000  180.0000  top
-R3        100           R_0603                                  118.7500  -119.7000  180.0000  top
-SW1       ROM_Sel.      SW_DIP_SPSTx02_Slide_DSHP02TS_P1.27mm   159.5120  -110.8710    0.0000  top
-U1        MX29LV640     TSOP-I-48_18.4x12mm_P0.5mm               99.4500  -109.7000  270.0000  top
-U2        MX29LV640     TSOP-I-48_18.4x12mm_P0.5mm              142.2400  -109.7000  270.0000  top
-U3        74AHC245      TSSOP-20_4.4x6.5mm_P0.65mm              102.1750  -120.1500  180.0000  top
-U4        74AHC245      TSSOP-20_4.4x6.5mm_P0.65mm              112.3750  -120.1500  180.0000  top
-U5        74AHC245      TSSOP-20_4.4x6.5mm_P0.65mm              146.5750  -120.1500  180.0000  top
-U6        74AHC245      TSSOP-20_4.4x6.5mm_P0.65mm              155.5250  -120.1500  180.0000  top
-U7        74AHC245      TSSOP-20_4.4x6.5mm_P0.65mm               81.8750  -120.1500  180.0000  top
-U8        74AHC245      TSSOP-20_4.4x6.5mm_P0.65mm               92.0250  -120.1500  180.0000  top
-U9        74AHC245      TSSOP-20_4.4x6.5mm_P0.65mm              125.0750  -120.1500  180.0000  top
-U10       74AHC245      TSSOP-20_4.4x6.5mm_P0.65mm              135.2250  -120.1500  180.0000  top
-U11       XC6206P332MR  SOT-23                                   78.3500  -111.1500    0.0000  top
-U12       74LVC1G02GW   SOT-353                                  97.1000  -118.9500   90.0000  top
-## End
--- a/gerber/ROMSIMM.drl
+++ b/gerber/ROMSIMM.drl
@ -1,453 +0,0 @@
-M48
-; DRILL file {KiCad (5.1.5-0-10_14)} date Tuesday, April 13, 2021 at 03:25:18 AM
-; FORMAT={-:-/ absolute / inch / decimal}
-; #@! TF.CreationDate,2021-04-13T03:25:18-04:00
-; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.1.5-0-10_14)
-FMAT,2
-INCH
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-T2C0.0118
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-T4C0.0200
-T5C0.0454
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