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18 lines
928 B
Markdown
18 lines
928 B
Markdown
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# fx68k
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FX68K 68000 cycle accurate SystemVerilog core
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Copyright (c) 2018 by Jorge Cwik
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fx68k@fxatari.com
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FX68K is a 68000 cycle exact compatible core. At least in theory, it should be impossible to distinguish functionally from a real 68K processor.
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On Cyclone families it uses just over 5,100 LEs and about 5KB internal ram, reaching a max effective clock frequency close to 40MHz. Some optimizations are still possible to implement and increase the performance.
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The core is fully synchronous. Considerable effort was made to avoid any asynchronous logic.
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Written in SystemVerilog.
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The timing of the external bus signals is exactly as the original processor. The only feature that is not implemented yet is bus retry using the external HALT input signal.
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It was designed to replace an actual chip on a real board. This wasn't yet tested however and not all necessary output enable control signals are fully implemented.
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