mirror of
https://github.com/MiSTer-devel/MacPlus_MiSTer.git
synced 2024-05-28 22:41:28 +00:00
more fixes, reboot, video modes
This commit is contained in:
parent
5676ebe168
commit
182ebfb2f5
15
MacPlus.sv
15
MacPlus.sv
|
@ -407,7 +407,7 @@ hps_io #(.STRLEN($size(CONF_STR)>>3),.PS2DIV(1000), .VDNUM(2),.PS2WE(0)) hps_io
|
|||
|
||||
// interconnects
|
||||
// CPU
|
||||
wire clk8, _cpuReset, _cpuUDS, _cpuLDS, _cpuRW, _cpuAS;
|
||||
wire clk8, _cpuReset, _cpuReset_o, _cpuUDS, _cpuLDS, _cpuRW, _cpuAS;
|
||||
wire clk8_en_p, clk8_en_n;
|
||||
wire clk16_en_p, clk16_en_n;
|
||||
wire _cpuVMA, _cpuVPA, _cpuDTACK;
|
||||
|
@ -430,7 +430,7 @@ hps_io #(.STRLEN($size(CONF_STR)>>3),.PS2DIV(1000), .VDNUM(2),.PS2WE(0)) hps_io
|
|||
wire memoryLatch;
|
||||
|
||||
// peripherals
|
||||
wire loadPixels, pixelOut, _hblank, _vblank, hsync, vsync;
|
||||
wire vid_alt, loadPixels, pixelOut, _hblank, _vblank, hsync, vsync;
|
||||
wire memoryOverlayOn, selectSCSI, selectSCC, selectIWM, selectVIA, selectRAM, selectROM;
|
||||
wire [15:0] dataControllerDataOut;
|
||||
|
||||
|
@ -464,6 +464,7 @@ hps_io #(.STRLEN($size(CONF_STR)>>3),.PS2DIV(1000), .VDNUM(2),.PS2WE(0)) hps_io
|
|||
wire cpu_en_n = status_turbo ? clk16_en_n : clk8_en_n;
|
||||
|
||||
wire is68000 = status_cpu == 0;
|
||||
assign _cpuReset_o = is68000 ? fx68_reset_n : tg68_reset_n;
|
||||
assign _cpuRW = is68000 ? fx68_rw : tg68_rw;
|
||||
assign _cpuAS = is68000 ? fx68_as_n : tg68_as_n;
|
||||
assign _cpuUDS = is68000 ? fx68_uds_n : tg68_uds_n;
|
||||
|
@ -489,6 +490,7 @@ hps_io #(.STRLEN($size(CONF_STR)>>3),.PS2DIV(1000), .VDNUM(2),.PS2WE(0)) hps_io
|
|||
wire fx68_fc2;
|
||||
wire [15:0] fx68_dout;
|
||||
wire [23:1] fx68_a;
|
||||
wire fx68_reset_n;
|
||||
|
||||
fx68k fx68k (
|
||||
.clk ( clk32 ),
|
||||
|
@ -510,7 +512,7 @@ hps_io #(.STRLEN($size(CONF_STR)>>3),.PS2DIV(1000), .VDNUM(2),.PS2WE(0)) hps_io
|
|||
.FC1 ( fx68_fc1 ),
|
||||
.FC2 ( fx68_fc2 ),
|
||||
.BGn ( ),
|
||||
.oRESETn ( ),
|
||||
.oRESETn ( fx68_reset_n ),
|
||||
.oHALTEDn ( ),
|
||||
.DTACKn ( _cpuDTACK ),
|
||||
.VPAn ( _cpuVPA ),
|
||||
|
@ -538,6 +540,7 @@ hps_io #(.STRLEN($size(CONF_STR)>>3),.PS2DIV(1000), .VDNUM(2),.PS2WE(0)) hps_io
|
|||
wire tg68_fc2;
|
||||
wire [15:0] tg68_dout;
|
||||
wire [31:0] tg68_a;
|
||||
wire tg68_reset_n;
|
||||
|
||||
tg68k tg68k (
|
||||
.clk ( clk32 ),
|
||||
|
@ -552,7 +555,7 @@ hps_io #(.STRLEN($size(CONF_STR)>>3),.PS2DIV(1000), .VDNUM(2),.PS2WE(0)) hps_io
|
|||
.uds_n ( tg68_uds_n ),
|
||||
.lds_n ( tg68_lds_n ),
|
||||
.fc ( { tg68_fc2, tg68_fc1, tg68_fc0 } ),
|
||||
.reset_n ( ),
|
||||
.reset_n ( tg68_reset_n ),
|
||||
|
||||
.E ( ),
|
||||
.E_div ( status_turbo ),
|
||||
|
@ -608,6 +611,7 @@ hps_io #(.STRLEN($size(CONF_STR)>>3),.PS2DIV(1000), .VDNUM(2),.PS2WE(0)) hps_io
|
|||
._hblank(_hblank),
|
||||
._vblank(_vblank),
|
||||
.loadPixels(loadPixels),
|
||||
.vid_alt(vid_alt),
|
||||
.memoryOverlayOn(memoryOverlayOn),
|
||||
|
||||
.snd_alt(snd_alt),
|
||||
|
@ -635,7 +639,7 @@ hps_io #(.STRLEN($size(CONF_STR)>>3),.PS2DIV(1000), .VDNUM(2),.PS2WE(0)) hps_io
|
|||
|
||||
// various sources can reset the mac
|
||||
if(!pll_locked || status_reset || buttons[1] ||
|
||||
rom_download || (last_mem_config != status_mem) || (last_cpu_config != status_cpu))
|
||||
rom_download || (last_mem_config != status_mem) || (last_cpu_config != status_cpu) || !_cpuReset_o)
|
||||
rst_cnt <= 16'd65535;
|
||||
else if(rst_cnt != 0)
|
||||
rst_cnt <= rst_cnt - 16'd1;
|
||||
|
@ -684,6 +688,7 @@ hps_io #(.STRLEN($size(CONF_STR)>>3),.PS2DIV(1000), .VDNUM(2),.PS2WE(0)) hps_io
|
|||
._vblank(_vblank),
|
||||
.pixelOut(pixelOut),
|
||||
.loadPixels(loadPixels),
|
||||
.vid_alt(vid_alt),
|
||||
|
||||
.memoryOverlayOn(memoryOverlayOn),
|
||||
|
||||
|
|
|
@ -45,6 +45,7 @@ module addrController_top(
|
|||
output _hblank,
|
||||
output _vblank,
|
||||
output loadPixels,
|
||||
input vid_alt,
|
||||
|
||||
input snd_alt,
|
||||
output loadSound,
|
||||
|
@ -202,6 +203,7 @@ module addrController_top(
|
|||
.clk(clk),
|
||||
.clk_en(clk8_en_p),
|
||||
.busCycle(busCycle),
|
||||
.vid_alt(vid_alt),
|
||||
.videoAddr(videoAddr),
|
||||
.hsync(hsync),
|
||||
.vsync(vsync),
|
||||
|
|
|
@ -57,6 +57,7 @@ module dataController_top(
|
|||
input _hblank,
|
||||
input _vblank,
|
||||
input loadPixels,
|
||||
output vid_alt,
|
||||
|
||||
// audio
|
||||
output [10:0] audioOut, // 8 bit audio + 3 bit volume
|
||||
|
@ -224,6 +225,7 @@ module dataController_top(
|
|||
assign snd_alt = ~(~via_pa_oe[3] | via_pa_o[3]);
|
||||
assign memoryOverlayOn = ~via_pa_oe[4] | via_pa_o[4];
|
||||
assign SEL = ~via_pa_oe[5] | via_pa_o[5];
|
||||
assign vid_alt = ~via_pa_oe[6] | via_pa_o[6];
|
||||
|
||||
//port B
|
||||
assign via_pb_i = {1'b1, _hblank, mouseY2, mouseX2, mouseButton, 2'b11, rtcdat_o};
|
||||
|
@ -298,7 +300,7 @@ module dataController_top(
|
|||
if (clk8_en_p) begin
|
||||
if ((kbd_transmitting && !kbd_wait_receiving) || kbd_receiving) begin
|
||||
kbdclk_count <= kbdclk_count + 1'd1;
|
||||
if (kbdclk_count == 12'd1600) begin
|
||||
if (kbdclk_count == 12'd1300) begin // ~165usec
|
||||
kbdclk <= ~kbdclk;
|
||||
kbdclk_count <= 0;
|
||||
if (kbdclk) begin
|
||||
|
@ -395,18 +397,18 @@ module dataController_top(
|
|||
// SCC
|
||||
scc s(
|
||||
.clk(clk32),
|
||||
.cep(clk8_en_p),
|
||||
.cep(clk8_en_p),
|
||||
.cen(clk8_en_n),
|
||||
.reset_hw(~_cpuReset),
|
||||
.reset_hw(~_cpuReset),
|
||||
.cs(selectSCC && (_cpuLDS == 1'b0 || _cpuUDS == 1'b0)),
|
||||
// .cs(selectSCC && (_cpuLDS == 1'b0 || _cpuUDS == 1'b0) && cpuBusControl),
|
||||
// .we(!_cpuRW),
|
||||
// .cs(selectSCC && (_cpuLDS == 1'b0 || _cpuUDS == 1'b0) && cpuBusControl),
|
||||
// .we(!_cpuRW),
|
||||
.we(!_cpuLDS),
|
||||
.rs(cpuAddrRegLo),
|
||||
.wdata(cpuDataIn[15:8]),
|
||||
.rdata(sccDataOut),
|
||||
._irq(_sccIrq),
|
||||
.dcd_a(mouseX1),
|
||||
.rs(cpuAddrRegLo),
|
||||
.wdata(cpuDataIn[15:8]),
|
||||
.rdata(sccDataOut),
|
||||
._irq(_sccIrq),
|
||||
.dcd_a(mouseX1),
|
||||
.dcd_b(mouseY1),
|
||||
.wreq(sccWReq));
|
||||
|
||||
|
@ -421,15 +423,15 @@ module dataController_top(
|
|||
// Mouse
|
||||
ps2_mouse mouse(
|
||||
.sysclk(clk32),
|
||||
.clk_en(clk8_en_p),
|
||||
.reset(~_cpuReset),
|
||||
.clk_en(clk8_en_p),
|
||||
.reset(~_cpuReset),
|
||||
.ps2dat(mouseData),
|
||||
.ps2clk(mouseClk),
|
||||
.x1(mouseX1),
|
||||
.y1(mouseY1),
|
||||
.x2(mouseX2),
|
||||
.y2(mouseY2),
|
||||
.button(mouseButton));
|
||||
.ps2clk(mouseClk),
|
||||
.x1(mouseX1),
|
||||
.y1(mouseY1),
|
||||
.x2(mouseX2),
|
||||
.y2(mouseY2),
|
||||
.button(mouseButton));
|
||||
|
||||
wire [7:0] kbd_in_data;
|
||||
wire kbd_in_strobe;
|
||||
|
|
|
@ -19,7 +19,7 @@ module ps2_kbd( input sysclk,
|
|||
|
||||
reg [8:0] keymac;
|
||||
reg key_pending;
|
||||
reg [21:0] pacetimer;
|
||||
reg [19:0] pacetimer;
|
||||
reg inquiry_active;
|
||||
reg extended;
|
||||
reg keybreak;
|
||||
|
@ -227,8 +227,8 @@ module ps2_kbd( input sysclk,
|
|||
else if (!tick_long)
|
||||
pacetimer <= pacetimer + 1'd1;
|
||||
end
|
||||
assign tick_long = pacetimer == 22'h3fffff;
|
||||
assign tick_short = pacetimer == 22'h000fff;
|
||||
assign tick_long = pacetimer == 20'hfffff;
|
||||
assign tick_short = pacetimer == 20'h00fff;
|
||||
|
||||
/* Delay inquiry responses to after tick_short */
|
||||
always@(posedge sysclk or posedge reset)
|
||||
|
@ -241,7 +241,7 @@ module ps2_kbd( input sysclk,
|
|||
inquiry_active <= cmd_inquiry;
|
||||
end
|
||||
|
||||
/* Key answer to the mac XXX FIXME: keypad */
|
||||
/* Key answer to the mac */
|
||||
assign pop_key = (cmd_instant & tick_short) |
|
||||
(inquiry_active & tick_long) |
|
||||
(inquiry_active & key_pending);
|
||||
|
@ -260,7 +260,7 @@ module ps2_kbd( input sysclk,
|
|||
if (cmd_model | cmd_test)
|
||||
key_pending <= 0;
|
||||
else if (pop_key) begin
|
||||
if (keymac[8] & !keypad_byte2)
|
||||
if (key_pending & keymac[8] & !keypad_byte2)
|
||||
keypad_byte2 <= 1;
|
||||
else begin
|
||||
key_pending <= 0;
|
||||
|
|
|
@ -3,6 +3,7 @@ module videoTimer(
|
|||
input clk,
|
||||
input clk_en,
|
||||
input [1:0] busCycle,
|
||||
input vid_alt,
|
||||
output [21:0] videoAddr,
|
||||
output reg hsync,
|
||||
output reg vsync,
|
||||
|
@ -10,7 +11,8 @@ module videoTimer(
|
|||
output _vblank,
|
||||
output loadPixels
|
||||
);
|
||||
|
||||
/*
|
||||
//mist version
|
||||
// timing data from http://tinyvga.com/vga-timing/1024x768@60Hz
|
||||
localparam kVisibleWidth = 128, // (1024/2)/4
|
||||
kTotalWidth = 168, // (1344/2)/4
|
||||
|
@ -22,6 +24,17 @@ module videoTimer(
|
|||
kVsyncStart = 771,
|
||||
kVsyncEnd = 776,
|
||||
kPixelLatency = 1; // number of clk8 cycles from xpos==0 to when pixel data actually exits the video shift register
|
||||
*/
|
||||
localparam kVisibleWidth = 128,
|
||||
kTotalWidth = 176,
|
||||
kVisibleHeightStart = 21,
|
||||
kVisibleHeightEnd = 362,
|
||||
kTotalHeight = 370,
|
||||
kHsyncStart = 135,
|
||||
kHsyncEnd = 152,
|
||||
kVsyncStart = 365,
|
||||
kVsyncEnd = 369,
|
||||
kPixelLatency = 1; // number of clk8 cycles from xpos==0 to when pixel data actually exits the video shift register
|
||||
|
||||
// use screen buffer address for a 4MB RAM layout-- it will wrap
|
||||
// around to the proper address for 1MB, 512K, and 128K layouts
|
||||
|
@ -70,9 +83,9 @@ module videoTimer(
|
|||
// kVisibleHeightStart divided by 2 to account for vertical pixel doubling.
|
||||
// kVisibleWidth divided by 2 because it's the 8MHz visible width times 4 to get actual number of pixels,
|
||||
// then divided by 8 bits per byte
|
||||
assign videoAddr = kScreenBufferBase -
|
||||
(kVisibleHeightStart/2 * kVisibleWidth/2) +
|
||||
{ ypos[9:1], xpos[6:2], 1'b0 };
|
||||
assign videoAddr = kScreenBufferBase - (vid_alt ? 16'h0 : 16'h8000) -
|
||||
(kVisibleHeightStart * kVisibleWidth/2) +
|
||||
{ ypos[8:0], xpos[6:2], 1'b0 };
|
||||
|
||||
assign loadPixels = _vblank == 1'b1 && _hblank == 1'b1 && busCycle == 2'b00;
|
||||
|
||||
|
|
Loading…
Reference in New Issue
Block a user