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Update TG68K.

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sorgelig 2020-05-11 01:57:31 +08:00
parent bc370736d3
commit 1b5314cc30
4 changed files with 3921 additions and 2859 deletions
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4
MacPlus.sv
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@ -291,7 +291,7 @@ wire cpu_clkena = cep && (cpuBusControl || (cpu_busstate == 2'b01));
reg [15:0] cpuDataIn; reg [15:0] cpuDataIn;
always @(posedge clk_sys) if(cel && cpuBusControl && ~cpu_busstate[0] && _cpuRW) cpuDataIn <= dataControllerDataOut; always @(posedge clk_sys) if(cel && cpuBusControl && ~cpu_busstate[0] && _cpuRW) cpuDataIn <= dataControllerDataOut;
TG68KdotC_Kernel #(0,0,0,0,0,0) m68k TG68KdotC_Kernel #(0,0,0,0,0,0, 0,1) m68k
( (
.clk ( clk_sys ), .clk ( clk_sys ),
.nReset ( _cpuReset ), .nReset ( _cpuReset ),
@ -302,7 +302,7 @@ TG68KdotC_Kernel #(0,0,0,0,0,0) m68k
.berr ( 1'b0 ), .berr ( 1'b0 ),
.clr_berr ( 1'b0 ), .clr_berr ( 1'b0 ),
.CPU ( 2'b00 ), // 00=68000 .CPU ( 2'b00 ), // 00=68000
.addr ( {cpuAddrHi, cpuAddr} ), .addr_out ( {cpuAddrHi, cpuAddr} ),
.data_write ( cpuDataOut ), .data_write ( cpuDataOut ),
.nUDS ( _cpuUDS ), .nUDS ( _cpuUDS ),
.nLDS ( _cpuLDS ), .nLDS ( _cpuLDS ),

2211
src/tg68k/TG68K_ALU.vhd
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430
src/tg68k/TG68K_Pack.vhd
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@ -1,250 +1,180 @@
------------------------------------------------------------------------------ ------------------------------------------------------------------------------
------------------------------------------------------------------------------ ------------------------------------------------------------------------------
-- -- -- --
-- Copyright (c) 2009-2013 Tobias Gubener -- -- Copyright (c) 2009-2020 Tobias Gubener --
-- Subdesign fAMpIGA by TobiFlex -- -- Patches by MikeJ, Till Harbaum, Rok Krajnk, ... --
-- -- -- Subdesign fAMpIGA by TobiFlex --
-- This source file is free software: you can redistribute it and/or modify -- -- --
-- it under the terms of the GNU General Public License as published -- -- This source file is free software: you can redistribute it and/or modify --
-- by the Free Software Foundation, either version 3 of the License, or -- -- it under the terms of the GNU Lesser General Public License as published --
-- (at your option) any later version. -- -- by the Free Software Foundation, either version 3 of the License, or --
-- -- -- (at your option) any later version. --
-- This source file is distributed in the hope that it will be useful, -- -- --
-- but WITHOUT ANY WARRANTY; without even the implied warranty of -- -- This source file is distributed in the hope that it will be useful, --
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- -- but WITHOUT ANY WARRANTY; without even the implied warranty of --
-- GNU General Public License for more details. -- -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --
-- -- -- GNU General Public License for more details. --
-- You should have received a copy of the GNU General Public License -- -- --
-- along with this program. If not, see <http://www.gnu.org/licenses/>. -- -- You should have received a copy of the GNU General Public License --
-- -- -- along with this program. If not, see <http://www.gnu.org/licenses/>. --
------------------------------------------------------------------------------ -- --
------------------------------------------------------------------------------ ------------------------------------------------------------------------------
library IEEE; ------------------------------------------------------------------------------
use IEEE.std_logic_1164.all; library IEEE;
use IEEE.std_logic_1164.all;
package TG68K_Pack is
package TG68K_Pack is
type micro_states is (idle, nop, ld_nn, st_nn, ld_dAn1, ld_AnXn1, ld_AnXn2, st_dAn1, ld_AnXnbd1, ld_AnXnbd2, ld_AnXnbd3,
ld_229_1, ld_229_2, ld_229_3, ld_229_4, st_229_1, st_229_2, st_229_3, st_229_4, type micro_states is (idle, nop, ld_nn, st_nn, ld_dAn1, ld_AnXn1, ld_AnXn2, st_dAn1, ld_AnXnbd1, ld_AnXnbd2, ld_AnXnbd3,
st_AnXn1, st_AnXn2, bra1, bsr1, bsr2, nopnop, dbcc1, movem1, movem2, movem3, ld_229_1, ld_229_2, ld_229_3, ld_229_4, st_229_1, st_229_2, st_229_3, st_229_4,
andi, op_AxAy, cmpm, link1, link2, unlink1, unlink2, int1, int2, int3, int4, rte1, rte2, rte3, trap0, trap1, trap2, trap3, st_AnXn1, st_AnXn2, bra1, bsr1, bsr2, nopnop, dbcc1, movem1, movem2, movem3,
trap4, trap5, trap6, movec1, movep1, movep2, movep3, movep4, movep5, rota1, bf1, andi, pack1, pack2, pack3, op_AxAy, cmpm, link1, link2, unlink1, unlink2, int1, int2, int3, int4, rte1, rte2, rte3,
mul1, mul2, mul_end1, mul_end2, div1, div2, div3, div4, div_end1, div_end2, pack1, pack2, pack3); rte4, rte5, rtd1, rtd2, trap00, trap0, trap1, trap2, trap3, cas1, cas2, cas21, cas22, cas23, cas24,
cas25, cas26, cas27, cas28, chk20, chk21, chk22, chk23, chk24,
constant opcMOVE : integer := 0; -- trap4, trap5, trap6, movec1, movep1, movep2, movep3, movep4, movep5, rota1, bf1,
constant opcMOVEQ : integer := 1; -- mul1, mul2, mul_end1, mul_end2, div1, div2, div3, div4, div_end1, div_end2);
constant opcMOVESR : integer := 2; --
constant opcADD : integer := 3; -- constant opcMOVE : integer := 0; --
constant opcADDQ : integer := 4; -- constant opcMOVEQ : integer := 1; --
constant opcOR : integer := 5; -- constant opcMOVESR : integer := 2; --
constant opcAND : integer := 6; -- constant opcADD : integer := 3; --
constant opcEOR : integer := 7; -- constant opcADDQ : integer := 4; --
constant opcCMP : integer := 8; -- constant opcOR : integer := 5; --
constant opcROT : integer := 9; -- constant opcAND : integer := 6; --
constant opcCPMAW : integer := 10; constant opcEOR : integer := 7; --
constant opcEXT : integer := 11; -- constant opcCMP : integer := 8; --
constant opcABCD : integer := 12; -- constant opcROT : integer := 9; --
constant opcSBCD : integer := 13; -- constant opcCPMAW : integer := 10;
constant opcBITS : integer := 14; -- constant opcEXT : integer := 11; --
constant opcSWAP : integer := 15; -- constant opcABCD : integer := 12; --
constant opcScc : integer := 16; -- constant opcSBCD : integer := 13; --
constant andiSR : integer := 17; -- constant opcBITS : integer := 14; --
constant eoriSR : integer := 18; -- constant opcSWAP : integer := 15; --
constant oriSR : integer := 19; -- constant opcScc : integer := 16; --
constant opcMULU : integer := 20; -- constant andiSR : integer := 17; --
constant opcDIVU : integer := 21; -- constant eoriSR : integer := 18; --
constant dispouter : integer := 22; -- constant oriSR : integer := 19; --
constant rot_nop : integer := 23; -- constant opcMULU : integer := 20; --
constant ld_rot_cnt : integer := 24; -- constant opcDIVU : integer := 21; --
constant writePC_add : integer := 25; -- constant dispouter : integer := 22; --
constant ea_data_OP1 : integer := 26; -- constant rot_nop : integer := 23; --
constant ea_data_OP2 : integer := 27; -- constant ld_rot_cnt : integer := 24; --
constant use_XZFlag : integer := 28; -- constant writePC_add : integer := 25; --
constant get_bfoffset : integer := 29; -- constant ea_data_OP1 : integer := 26; --
constant save_memaddr : integer := 30; -- constant ea_data_OP2 : integer := 27; --
constant opcCHK : integer := 31; -- constant use_XZFlag : integer := 28; --
constant movec_rd : integer := 32; -- constant get_bfoffset : integer := 29; --
constant movec_wr : integer := 33; -- constant save_memaddr : integer := 30; --
constant Regwrena : integer := 34; -- constant opcCHK : integer := 31; --
constant update_FC : integer := 35; -- constant movec_rd : integer := 32; --
constant linksp : integer := 36; -- constant movec_wr : integer := 33; --
constant movepl : integer := 37; -- constant Regwrena : integer := 34; --
constant update_ld : integer := 38; -- constant update_FC : integer := 35; --
constant OP1addr : integer := 39; -- constant linksp : integer := 36; --
constant write_reg : integer := 40; -- constant movepl : integer := 37; --
constant changeMode : integer := 41; -- constant update_ld : integer := 38; --
constant ea_build : integer := 42; -- constant OP1addr : integer := 39; --
constant trap_chk : integer := 43; -- constant write_reg : integer := 40; --
constant store_ea_data : integer := 44; -- constant changeMode : integer := 41; --
constant addrlong : integer := 45; -- constant ea_build : integer := 42; --
constant postadd : integer := 46; -- constant trap_chk : integer := 43; --
constant presub : integer := 47; -- constant store_ea_data : integer := 44; --
constant subidx : integer := 48; -- constant addrlong : integer := 45; --
constant no_Flags : integer := 49; -- constant postadd : integer := 46; --
constant use_SP : integer := 50; -- constant presub : integer := 47; --
constant to_CCR : integer := 51; -- constant subidx : integer := 48; --
constant to_SR : integer := 52; -- constant no_Flags : integer := 49; --
constant OP2out_one : integer := 53; -- constant use_SP : integer := 50; --
constant OP1out_zero : integer := 54; -- constant to_CCR : integer := 51; --
constant mem_addsub : integer := 55; -- constant to_SR : integer := 52; --
constant addsub : integer := 56; -- constant OP2out_one : integer := 53; --
constant directPC : integer := 57; -- constant OP1out_zero : integer := 54; --
constant direct_delta : integer := 58; -- constant mem_addsub : integer := 55; --
constant directSR : integer := 59; -- constant addsub : integer := 56; --
constant directCCR : integer := 60; -- constant directPC : integer := 57; --
constant exg : integer := 61; -- constant direct_delta : integer := 58; --
constant get_ea_now : integer := 62; -- constant directSR : integer := 59; --
constant ea_to_pc : integer := 63; -- constant directCCR : integer := 60; --
constant hold_dwr : integer := 64; -- constant exg : integer := 61; --
constant to_USP : integer := 65; -- constant get_ea_now : integer := 62; --
constant from_USP : integer := 66; -- constant ea_to_pc : integer := 63; --
constant write_lowlong : integer := 67; -- constant hold_dwr : integer := 64; --
constant write_reminder : integer := 68; -- constant to_USP : integer := 65; --
constant movem_action : integer := 69; -- constant from_USP : integer := 66; --
constant briefext : integer := 70; -- constant write_lowlong : integer := 67; --
constant get_2ndOPC : integer := 71; -- constant write_reminder : integer := 68; --
constant mem_byte : integer := 72; -- constant movem_action : integer := 69; --
constant longaktion : integer := 73; -- constant briefext : integer := 70; --
constant opcRESET : integer := 74; -- constant get_2ndOPC : integer := 71; --
constant opcBF : integer := 75; -- constant mem_byte : integer := 72; --
constant opcBFwb : integer := 76; -- constant longaktion : integer := 73; --
constant s2nd_hbits : integer := 77; -- constant opcRESET : integer := 74; --
constant opcPACK : integer := 77; -- constant opcBF : integer := 75; --
-- constant s2nd_hbits : integer := 77; -- constant opcBFwb : integer := 76; --
constant opcPACK : integer := 77; --
constant opcUNPACK : integer := 78; --
-- constant : integer := 75; -- constant hold_ea_data : integer := 79; --
-- constant : integer := 76; -- constant store_ea_packdata : integer := 80; --
-- constant : integer := 7; -- constant exec_BS : integer := 81; --
-- constant : integer := 7; -- constant hold_OP2 : integer := 82; --
-- constant : integer := 7; -- constant restore_ADDR : integer := 83; --
constant alu_exec : integer := 84; --
constant lastOpcBit : integer := 77; constant alu_move : integer := 85; --
constant alu_setFlags : integer := 86; --
type rTG68K_opc is record constant opcCHK2 : integer := 87; --
opcMOVE : bit; constant opcEXTB : integer := 88; --
opcMOVEQ : bit;
opcMOVESR : bit; constant lastOpcBit : integer := 88;
opcADD : bit;
opcADDQ : bit; component TG68K_ALU
opcOR : bit; generic(
opcAND : bit; MUL_Mode :integer; --0=>16Bit, 1=>32Bit, 2=>switchable with CPU(1), 3=>no MUL,
opcEOR : bit; MUL_Hardware :integer; --0=>no, 1=>yes,
opcCMP : bit; DIV_Mode :integer; --0=>16Bit, 1=>32Bit, 2=>switchable with CPU(1), 3=>no DIV,
opcROT : bit; BarrelShifter :integer --0=>no, 1=>yes, 2=>switchable with CPU(1)
opcCPMAW : bit; );
opcEXT : bit; port(
opcABCD : bit; clk : in std_logic;
opcSBCD : bit; Reset : in std_logic;
opcBITS : bit; CPU : in std_logic_vector(1 downto 0):="00"; -- 00->68000 01->68010 11->68020(only some parts - yet)
opcSWAP : bit; clkena_lw : in std_logic:='1';
opcScc : bit; execOPC : in bit;
andiSR : bit; decodeOPC : in bit;
eoriSR : bit; exe_condition : in std_logic;
oriSR : bit; exec_tas : in std_logic;
opcMULU : bit; long_start : in bit;
opcDIVU : bit; non_aligned : in std_logic;
dispouter : bit; movem_presub : in bit;
rot_nop : bit; set_stop : in bit;
ld_rot_cnt : bit; Z_error : in bit;
writePC_add : bit; rot_bits : in std_logic_vector(1 downto 0);
ea_data_OP1 : bit; exec : in bit_vector(lastOpcBit downto 0);
ea_data_OP2 : bit; OP1out : in std_logic_vector(31 downto 0);
use_XZFlag : bit; OP2out : in std_logic_vector(31 downto 0);
get_bfoffset : bit; reg_QA : in std_logic_vector(31 downto 0);
save_memaddr : bit; reg_QB : in std_logic_vector(31 downto 0);
opcCHK : bit; opcode : in std_logic_vector(15 downto 0);
movec_rd : bit; -- datatype : in std_logic_vector(1 downto 0);
movec_wr : bit; exe_opcode : in std_logic_vector(15 downto 0);
Regwrena : bit; exe_datatype : in std_logic_vector(1 downto 0);
update_FC : bit; sndOPC : in std_logic_vector(15 downto 0);
linksp : bit; last_data_read : in std_logic_vector(15 downto 0);
movepl : bit; data_read : in std_logic_vector(15 downto 0);
update_ld : bit; FlagsSR : in std_logic_vector(7 downto 0);
OP1addr : bit; micro_state : in micro_states;
write_reg : bit; bf_ext_in : in std_logic_vector(7 downto 0);
changeMode : bit; bf_ext_out : out std_logic_vector(7 downto 0);
ea_build : bit; bf_shift : in std_logic_vector(5 downto 0);
trap_chk : bit; bf_width : in std_logic_vector(5 downto 0);
store_ea_data : bit; bf_ffo_offset : in std_logic_vector(31 downto 0);
addrlong : bit; bf_loffset : in std_logic_vector(4 downto 0);
postadd : bit;
presub : bit; set_V_Flag : buffer bit;
subidx : bit; Flags : buffer std_logic_vector(7 downto 0);
no_Flags : bit; c_out : buffer std_logic_vector(2 downto 0);
use_SP : bit; addsub_q : buffer std_logic_vector(31 downto 0);
to_CCR : bit; ALUout : out std_logic_vector(31 downto 0)
to_SR : bit; );
OP2out_one : bit; end component;
OP1out_zero : bit;
mem_addsub : bit; end;
addsub : bit;
directPC : bit;
direct_delta : bit;
directSR : bit;
directCCR : bit;
exg : bit;
get_ea_now : bit;
ea_to_pc : bit;
hold_dwr : bit;
to_USP : bit;
from_USP : bit;
write_lowlong : bit;
write_reminder : bit;
movem_action : bit;
briefext : bit;
get_2ndOPC : bit;
mem_byte : bit;
longaktion : bit;
opcRESET : bit;
opcBF : bit;
opcBFwb : bit;
s2nd_hbits : bit;
end record;
component TG68K_ALU
generic(
MUL_Mode : integer := 0; --0=>16Bit, 1=>32Bit, 2=>switchable with CPU(1), 3=>no MUL,
DIV_Mode : integer := 0 --0=>16Bit, 1=>32Bit, 2=>switchable with CPU(1), 3=>no DIV,
);
port(
clk : in std_logic;
Reset : in std_logic;
clkena_lw : in std_logic:='1';
execOPC : in bit;
exe_condition : in std_logic;
exec_tas : in std_logic;
long_start : in bit;
movem_presub : in bit;
set_stop : in bit;
Z_error : in bit;
rot_bits : in std_logic_vector(1 downto 0);
exec : in bit_vector(lastOpcBit downto 0);
OP1out : in std_logic_vector(31 downto 0);
OP2out : in std_logic_vector(31 downto 0);
reg_QA : in std_logic_vector(31 downto 0);
reg_QB : in std_logic_vector(31 downto 0);
opcode : in std_logic_vector(15 downto 0);
datatype : in std_logic_vector(1 downto 0);
exe_opcode : in std_logic_vector(15 downto 0);
exe_datatype : in std_logic_vector(1 downto 0);
sndOPC : in std_logic_vector(15 downto 0);
last_data_read : in std_logic_vector(15 downto 0);
data_read : in std_logic_vector(15 downto 0);
FlagsSR : in std_logic_vector(7 downto 0);
micro_state : in micro_states;
bf_ext_in : in std_logic_vector(7 downto 0);
bf_ext_out : out std_logic_vector(7 downto 0);
bf_shift : in std_logic_vector(5 downto 0);
bf_width : in std_logic_vector(5 downto 0);
bf_loffset : in std_logic_vector(4 downto 0);
set_V_Flag : buffer bit;
Flags : buffer std_logic_vector(7 downto 0);
c_out : buffer std_logic_vector(2 downto 0);
addsub_q : buffer std_logic_vector(31 downto 0);
ALUout : out std_logic_vector(31 downto 0)
);
end component;
end;

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src/tg68k/TG68KdotC_Kernel.vhd
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