82 lines
2.4 KiB
Verilog
82 lines
2.4 KiB
Verilog
// generates 1024x768 (actually 512x768) @ 60Hz, from a 32.5MHz input clock
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module videoTimer(
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input clk,
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input clk_en,
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input [1:0] busCycle,
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input vid_alt,
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output [21:0] videoAddr,
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output reg hsync,
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output reg vsync,
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output _hblank,
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output _vblank,
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output loadPixels
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);
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// timing data from http://tinyvga.com/vga-timing/1024x768@60Hz
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localparam kVisibleWidth = 128, // (1024/2)/4
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kTotalWidth = 168, // (1344/2)/4
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kVisibleHeightStart = 42,
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kVisibleHeightEnd = 725,
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kTotalHeight = 806,
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kHsyncStart = 131, // (1048/2)/4
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kHsyncEnd = 147, // (1184/2)/4-1
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kVsyncStart = 771,
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kVsyncEnd = 776,
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kPixelLatency = 1; // number of clk8 cycles from xpos==0 to when pixel data actually exits the video shift register
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// use screen buffer address for a 4MB RAM layout-- it will wrap
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// around to the proper address for 1MB, 512K, and 128K layouts
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localparam kScreenBufferBase = 22'h3FA700;
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localparam startAddr = kVisibleHeightStart/2 * kVisibleWidth/2;
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reg [7:0] xpos;
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reg [9:0] ypos;
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wire endline = (xpos == kTotalWidth-1);
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always @(posedge clk) begin
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if (clk_en) begin
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if (endline)
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xpos <= 0;
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else if (xpos == 0 && busCycle != 0)
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// hold xpos at 0, until xpos and busCycle are in phase
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xpos <= 0;
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else
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xpos <= xpos + 1'b1;
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end
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end
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always @(posedge clk) begin
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if (clk_en) begin
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if (endline) begin
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if (ypos == kTotalHeight-1)
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ypos <= 0;
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else
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ypos <= ypos + 1'b1;
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end
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end
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end
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always @(posedge clk) begin
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if (clk_en) begin
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hsync <= ~(xpos >= kHsyncStart+kPixelLatency && xpos <= kHsyncEnd+kPixelLatency);
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vsync <= ~(ypos >= kVsyncStart && ypos <= kVsyncEnd);
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end
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end
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assign _hblank = ~(xpos >= kVisibleWidth+kPixelLatency);
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assign _vblank = ~(ypos < kVisibleHeightStart || ypos > kVisibleHeightEnd);
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// The 0,0 address actually starts below kScreenBufferBase, because the Mac screen buffer is
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// not displayed beginning at 0,0, but at 0,kVisibleHeightStart.
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// kVisibleHeightStart divided by 2 to account for vertical pixel doubling.
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// kVisibleWidth divided by 2 because it's the 8MHz visible width times 4 to get actual number of pixels,
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// then divided by 8 bits per byte
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assign videoAddr = kScreenBufferBase - (vid_alt ? 16'h0 : 16'h8000) -
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startAddr[21:0] +
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{ ypos[9:1], xpos[6:2], 1'b0 };
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assign loadPixels = _vblank == 1'b1 && _hblank == 1'b1 && busCycle == 2'b00;
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endmodule
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