87 lines
2.2 KiB
Systemverilog
87 lines
2.2 KiB
Systemverilog
//============================================================================
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//
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// Framebuffer Palette support for MiSTer
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// (c)2019 Sorgelig
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//
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// This program is free software; you can redistribute it and/or modify it
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// under the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 of the License, or (at your option)
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// any later version.
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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// more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program; if not, write to the Free Software Foundation, Inc.,
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// 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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//
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//============================================================================
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module fbpal
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(
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input reset,
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input en_in,
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output reg en_out,
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input ram_clk,
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output reg [28:0] ram_address,
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output reg [7:0] ram_burstcount,
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input ram_waitrequest,
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input [63:0] ram_readdata,
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input ram_readdatavalid,
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output reg ram_read,
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input [31:0] fb_address,
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input pal_en,
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output reg [7:0] pal_a,
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output reg [23:0] pal_d,
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output reg pal_wr
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);
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reg [31:0] base_addr;
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always @(posedge ram_clk) base_addr <= fb_address - 4096;
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reg [6:0] buf_rptr = 0;
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always @(posedge ram_clk) begin
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reg [23:0] odd_d;
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if(~pal_a[0] & pal_wr) {pal_a[0], pal_d} <= {1'b1, odd_d};
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else pal_wr <= 0;
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if(~ram_waitrequest) ram_read <= 0;
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if(pal_en & ~reset) begin
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if(ram_burstcount) begin
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if(ram_readdatavalid) begin
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ram_burstcount <= 0;
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odd_d <= ram_readdata[55:32];
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pal_d <= ram_readdata[23:0];
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pal_a <= {buf_rptr, 1'b0};
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pal_wr <= 1;
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en_out <= en_in;
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buf_rptr <= buf_rptr + 1'd1;
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end
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end
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else begin
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if(~ram_waitrequest && en_out != en_in) begin
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ram_address <= base_addr[31:3] + buf_rptr;
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ram_burstcount <= 1;
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ram_read <= 1;
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end
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end
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end
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else begin
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en_out <= en_in;
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buf_rptr <= 0;
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ram_burstcount <= 0;
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end
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end
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endmodule
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