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https://github.com/garrettsworkshop/NuBus-ESP32.git
synced 2024-12-11 13:52:20 +00:00
Migrate to KiCAD 6
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parent
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2
.gitignore
vendored
2
.gitignore
vendored
@ -14,6 +14,7 @@ _autosave-*
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||||
*-save.pro
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*-save.kicad_pcb
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fp-info-cache
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NuBus-ESP32-backups/*
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# Netlist files (exported from Eeschema)
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*.net
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||||
@ -27,3 +28,4 @@ cpld/db/GR8RAM.db_info
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cpld/db/GR8RAM.tmw_info
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cpld/GR8RAM.qws
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||||
Documentation/~$4205AManual.docx
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||||
NuBus-ESP32.kicad_prl
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||||
|
1489
AddrLatch.kicad_sch
Normal file
1489
AddrLatch.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
558
AddrLatch.sch
558
AddrLatch.sch
@ -1,558 +0,0 @@
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||||
EESchema Schematic File Version 4
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$Descr A4 11693 8268
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encoding utf-8
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Title "NuBus-ESP32"
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Date "2021-11-18"
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||||
Rev "0.1"
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||||
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|
||||
F 2 "" H 4800 2750 50 0001 C CNN
|
||||
F 3 "" H 4800 2750 50 0001 C CNN
|
||||
1 4800 2750
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:+3V3 #PWR0197
|
||||
U 1 1 62241E08
|
||||
P 4800 3950
|
||||
F 0 "#PWR0197" H 4800 3800 50 0001 C CNN
|
||||
F 1 "+3V3" H 4800 4100 50 0000 C CNN
|
||||
F 2 "" H 4800 3950 50 0001 C CNN
|
||||
F 3 "" H 4800 3950 50 0001 C CNN
|
||||
1 4800 3950
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:GND #PWR?
|
||||
U 1 1 61C95773
|
||||
P 4000 4850
|
||||
AR Path="/61C95773" Ref="#PWR?" Part="1"
|
||||
AR Path="/61C8B24A/61C95773" Ref="#PWR0124" Part="1"
|
||||
F 0 "#PWR0124" H 4000 4600 50 0001 C CNN
|
||||
F 1 "GND" H 4000 4700 50 0000 C CNN
|
||||
F 2 "" H 4000 4850 50 0001 C CNN
|
||||
F 3 "" H 4000 4850 50 0001 C CNN
|
||||
1 4000 4850
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Bus Line
|
||||
3700 4650 3700 4550
|
||||
Text Label 4000 4750 2 50 ~ 0
|
||||
~TM~0
|
||||
Entry Wire Line
|
||||
3700 4650 3800 4750
|
||||
Wire Wire Line
|
||||
4000 4750 3800 4750
|
||||
Entry Wire Line
|
||||
3700 4550 3800 4650
|
||||
Text Label 4000 4550 2 50 ~ 0
|
||||
~AD~0
|
||||
Entry Wire Line
|
||||
3700 4450 3800 4550
|
||||
Wire Wire Line
|
||||
4000 4550 3800 4550
|
||||
Text Label 4800 4550 0 50 ~ 0
|
||||
L~A~0
|
||||
Wire Wire Line
|
||||
4800 4550 5000 4550
|
||||
Entry Wire Line
|
||||
5100 4450 5000 4550
|
||||
Text HLabel 5300 4550 2 50 Output ~ 0
|
||||
L~TM~[1..0]
|
||||
Text Label 4800 4750 0 50 ~ 0
|
||||
L~TM~0
|
||||
Entry Wire Line
|
||||
5100 4650 5000 4750
|
||||
Wire Wire Line
|
||||
4800 4750 5000 4750
|
||||
Wire Bus Line
|
||||
5100 4650 5100 4550
|
||||
Wire Bus Line
|
||||
5100 4550 5300 4550
|
||||
Wire Wire Line
|
||||
4800 4650 5000 4650
|
||||
Entry Wire Line
|
||||
5100 4550 5000 4650
|
||||
Text Label 4800 4650 0 50 ~ 0
|
||||
L~TM~1
|
||||
Text Label 4000 4450 2 50 ~ 0
|
||||
~AD~1
|
||||
Wire Wire Line
|
||||
4000 4450 3800 4450
|
||||
Entry Wire Line
|
||||
3700 4350 3800 4450
|
||||
Text Label 4800 4450 0 50 ~ 0
|
||||
L~A~1
|
||||
Wire Wire Line
|
||||
4800 4450 5000 4450
|
||||
Entry Wire Line
|
||||
5100 4350 5000 4450
|
||||
Wire Bus Line
|
||||
5100 1550 5100 4450
|
||||
Wire Bus Line
|
||||
3700 1550 3700 4450
|
||||
$EndSCHEMATC
|
4584
BusControl.kicad_sch
Normal file
4584
BusControl.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
1535
BusControl.sch
1535
BusControl.sch
File diff suppressed because it is too large
Load Diff
1981
CtrlStatReg.kicad_sch
Normal file
1981
CtrlStatReg.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
663
CtrlStatReg.sch
663
CtrlStatReg.sch
@ -1,663 +0,0 @@
|
||||
EESchema Schematic File Version 4
|
||||
EELAYER 30 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 2 8
|
||||
Title "NuBus-ESP32"
|
||||
Date "2021-11-18"
|
||||
Rev "0.1"
|
||||
Comp "Garrett's Workshop"
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
Wire Notes Line
|
||||
1000 5400 1900 5400
|
||||
$Comp
|
||||
L power:+3V3 #PWR?
|
||||
U 1 1 61A765AC
|
||||
P 9150 5000
|
||||
AR Path="/61A765AC" Ref="#PWR?" Part="1"
|
||||
AR Path="/64084316/61A765AC" Ref="#PWR?" Part="1"
|
||||
AR Path="/61CA157A/61A765AC" Ref="#PWR0213" Part="1"
|
||||
F 0 "#PWR0213" H 9150 4850 50 0001 C CNN
|
||||
F 1 "+3V3" H 9150 5150 50 0000 C CNN
|
||||
F 2 "" H 9150 5000 50 0001 C CNN
|
||||
F 3 "" H 9150 5000 50 0001 C CNN
|
||||
1 9150 5000
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L Device:C_Small C?
|
||||
U 1 1 61A765B2
|
||||
P 9150 5100
|
||||
AR Path="/61A765B2" Ref="C?" Part="1"
|
||||
AR Path="/64084316/61A765B2" Ref="C?" Part="1"
|
||||
AR Path="/61CA157A/61A765B2" Ref="C43" Part="1"
|
||||
F 0 "C43" H 9058 5146 50 0000 R CNN
|
||||
F 1 "10u" H 9058 5055 50 0000 R CNN
|
||||
F 2 "stdpads:C_0805" H 9150 5100 50 0001 C CNN
|
||||
F 3 "~" H 9150 5100 50 0001 C CNN
|
||||
F 4 "C15850" H 9150 5100 50 0001 C CNN "LCSC Part"
|
||||
1 9150 5100
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L Device:C_Small C?
|
||||
U 1 1 61A765B8
|
||||
P 9550 5100
|
||||
AR Path="/61A765B8" Ref="C?" Part="1"
|
||||
AR Path="/64084316/61A765B8" Ref="C?" Part="1"
|
||||
AR Path="/61CA157A/61A765B8" Ref="C44" Part="1"
|
||||
F 0 "C44" H 9458 5146 50 0000 R CNN
|
||||
F 1 "10u" H 9458 5055 50 0000 R CNN
|
||||
F 2 "stdpads:C_0805" H 9550 5100 50 0001 C CNN
|
||||
F 3 "~" H 9550 5100 50 0001 C CNN
|
||||
F 4 "C15850" H 9550 5100 50 0001 C CNN "LCSC Part"
|
||||
1 9550 5100
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L Device:C_Small C?
|
||||
U 1 1 61A765BE
|
||||
P 9950 5100
|
||||
AR Path="/61A765BE" Ref="C?" Part="1"
|
||||
AR Path="/64084316/61A765BE" Ref="C?" Part="1"
|
||||
AR Path="/61CA157A/61A765BE" Ref="C45" Part="1"
|
||||
F 0 "C45" H 9858 5146 50 0000 R CNN
|
||||
F 1 "10u" H 9858 5055 50 0000 R CNN
|
||||
F 2 "stdpads:C_0805" H 9950 5100 50 0001 C CNN
|
||||
F 3 "~" H 9950 5100 50 0001 C CNN
|
||||
F 4 "C15850" H 9950 5100 50 0001 C CNN "LCSC Part"
|
||||
1 9950 5100
|
||||
-1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:GND #PWR?
|
||||
U 1 1 61A765C4
|
||||
P 9950 5200
|
||||
AR Path="/64084316/61A765C4" Ref="#PWR?" Part="1"
|
||||
AR Path="/61CA157A/61A765C4" Ref="#PWR0214" Part="1"
|
||||
F 0 "#PWR0214" H 9950 4950 50 0001 C CNN
|
||||
F 1 "GND" H 9950 5050 50 0000 C CNN
|
||||
F 2 "" H 9950 5200 50 0001 C CNN
|
||||
F 3 "" H 9950 5200 50 0001 C CNN
|
||||
1 9950 5200
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
9550 5000 9150 5000
|
||||
Wire Wire Line
|
||||
9550 5000 9950 5000
|
||||
Connection ~ 9550 5000
|
||||
Wire Wire Line
|
||||
9950 5200 9550 5200
|
||||
Connection ~ 9950 5200
|
||||
Connection ~ 9550 5200
|
||||
Wire Wire Line
|
||||
9550 5200 9150 5200
|
||||
Connection ~ 9150 5000
|
||||
Wire Wire Line
|
||||
4050 5100 4150 5100
|
||||
Wire Wire Line
|
||||
4150 3300 4050 3300
|
||||
Wire Wire Line
|
||||
4450 3050 4650 3050
|
||||
Wire Wire Line
|
||||
3850 3050 3550 3050
|
||||
Wire Wire Line
|
||||
3750 2350 4850 2350
|
||||
Wire Wire Line
|
||||
4850 1450 3550 1450
|
||||
Text HLabel 2550 4050 0 50 Input ~ 0
|
||||
RDCLK
|
||||
Wire Wire Line
|
||||
2550 4050 2950 4050
|
||||
Wire Wire Line
|
||||
2950 3750 2950 3950
|
||||
Wire Wire Line
|
||||
3250 3750 2950 3750
|
||||
$Comp
|
||||
L power:+3V3 #PWR?
|
||||
U 1 1 682B83B0
|
||||
P 3250 3750
|
||||
AR Path="/61C6168C/682B83B0" Ref="#PWR?" Part="1"
|
||||
AR Path="/61CA157A/682B83B0" Ref="#PWR0212" Part="1"
|
||||
F 0 "#PWR0212" H 3250 3600 50 0001 C CNN
|
||||
F 1 "+3V3" H 3250 3900 50 0000 C CNN
|
||||
F 2 "" H 3250 3750 50 0001 C CNN
|
||||
F 3 "" H 3250 3750 50 0001 C CNN
|
||||
1 3250 3750
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Text Notes 1050 2300 0 50 ~ 0
|
||||
Write request\nfrom Mac to ESP32
|
||||
Wire Notes Line
|
||||
1000 3600 1900 3600
|
||||
Text Notes 1050 3200 0 50 ~ 0
|
||||
Pending bit registered\nfor readback by Mac
|
||||
Wire Notes Line
|
||||
1000 2700 1900 2700
|
||||
Text Notes 1050 5000 0 50 ~ 0
|
||||
Pending bit registered\nfor readback by Mac
|
||||
Wire Notes Line
|
||||
1000 4500 1900 4500
|
||||
Text Notes 1050 4100 0 50 ~ 0
|
||||
Read request\nfrom ESP32 to Mac
|
||||
Wire Notes Line
|
||||
1000 1800 1900 1800
|
||||
Text Notes 1050 1400 0 50 ~ 0
|
||||
ESP32 reset bit
|
||||
Wire Notes Line
|
||||
1000 900 1900 900
|
||||
Wire Wire Line
|
||||
2950 2000 2950 2150
|
||||
Wire Wire Line
|
||||
2850 2000 2950 2000
|
||||
Wire Wire Line
|
||||
4850 4150 3750 4150
|
||||
Connection ~ 3750 4150
|
||||
Text Label 3850 4850 2 50 ~ 0
|
||||
~RDREQ~N
|
||||
$Comp
|
||||
L power:GND #PWR0210
|
||||
U 1 1 679639EB
|
||||
P 2850 2000
|
||||
F 0 "#PWR0210" H 2850 1750 50 0001 C CNN
|
||||
F 1 "GND" H 2850 1850 50 0000 C CNN
|
||||
F 2 "" H 2850 2000 50 0001 C CNN
|
||||
F 3 "" H 2850 2000 50 0001 C CNN
|
||||
1 2850 2000
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
2550 1950 3250 1950
|
||||
Text HLabel 4050 3300 0 50 Input ~ 0
|
||||
ROM~OE~
|
||||
$Comp
|
||||
L power:+3V3 #PWR?
|
||||
U 1 1 679639E3
|
||||
P 2950 3450
|
||||
AR Path="/61C6168C/679639E3" Ref="#PWR?" Part="1"
|
||||
AR Path="/61CA157A/679639E3" Ref="#PWR0209" Part="1"
|
||||
F 0 "#PWR0209" H 2950 3300 50 0001 C CNN
|
||||
F 1 "+3V3" H 2950 3600 50 0000 C CNN
|
||||
F 2 "" H 2950 3450 50 0001 C CNN
|
||||
F 3 "" H 2950 3450 50 0001 C CNN
|
||||
1 2950 3450
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:+3V3 #PWR?
|
||||
U 1 1 679639DD
|
||||
P 3250 2850
|
||||
AR Path="/61C6168C/679639DD" Ref="#PWR?" Part="1"
|
||||
AR Path="/61CA157A/679639DD" Ref="#PWR0208" Part="1"
|
||||
F 0 "#PWR0208" H 3250 2700 50 0001 C CNN
|
||||
F 1 "+3V3" H 3250 3000 50 0000 C CNN
|
||||
F 2 "" H 3250 2850 50 0001 C CNN
|
||||
F 3 "" H 3250 2850 50 0001 C CNN
|
||||
1 3250 2850
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
2950 3150 2550 3150
|
||||
Wire Bus Line
|
||||
4850 3150 4750 3150
|
||||
Entry Wire Line
|
||||
4650 3050 4750 3150
|
||||
Text HLabel 4850 3150 2 50 BiDi ~ 0
|
||||
~AD~[31..0]
|
||||
Text Label 4450 3050 0 50 ~ 0
|
||||
~AD~22
|
||||
Text Label 3850 3050 2 50 ~ 0
|
||||
~WRREQ~N
|
||||
NoConn ~ 3550 3250
|
||||
Wire Wire Line
|
||||
2950 3450 3250 3450
|
||||
Wire Wire Line
|
||||
2850 2650 2850 3050
|
||||
Wire Wire Line
|
||||
2850 3050 2950 3050
|
||||
Wire Wire Line
|
||||
3750 2350 3550 2350
|
||||
Connection ~ 3750 2350
|
||||
Wire Wire Line
|
||||
3750 2650 2850 2650
|
||||
Wire Wire Line
|
||||
3750 2350 3750 2650
|
||||
Text HLabel 2550 3150 0 50 Input ~ 0
|
||||
CLK
|
||||
Text HLabel 2550 1950 0 50 Input ~ 0
|
||||
REG~WE~
|
||||
Wire Wire Line
|
||||
2550 4350 3250 4350
|
||||
Text HLabel 4050 5100 0 50 Input ~ 0
|
||||
ROM~OE~
|
||||
$Comp
|
||||
L power:+3V3 #PWR?
|
||||
U 1 1 6219742A
|
||||
P 3250 1050
|
||||
AR Path="/61C6168C/6219742A" Ref="#PWR?" Part="1"
|
||||
AR Path="/61CA157A/6219742A" Ref="#PWR0170" Part="1"
|
||||
F 0 "#PWR0170" H 3250 900 50 0001 C CNN
|
||||
F 1 "+3V3" H 3250 1200 50 0000 C CNN
|
||||
F 2 "" H 3250 1050 50 0001 C CNN
|
||||
F 3 "" H 3250 1050 50 0001 C CNN
|
||||
1 3250 1050
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:+3V3 #PWR?
|
||||
U 1 1 61C5EF4C
|
||||
P 2950 5250
|
||||
AR Path="/61C6168C/61C5EF4C" Ref="#PWR?" Part="1"
|
||||
AR Path="/61CA157A/61C5EF4C" Ref="#PWR0105" Part="1"
|
||||
F 0 "#PWR0105" H 2950 5100 50 0001 C CNN
|
||||
F 1 "+3V3" H 2950 5400 50 0000 C CNN
|
||||
F 2 "" H 2950 5250 50 0001 C CNN
|
||||
F 3 "" H 2950 5250 50 0001 C CNN
|
||||
1 2950 5250
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:+3V3 #PWR?
|
||||
U 1 1 61C5E88E
|
||||
P 3250 4650
|
||||
AR Path="/61C6168C/61C5E88E" Ref="#PWR?" Part="1"
|
||||
AR Path="/61CA157A/61C5E88E" Ref="#PWR0104" Part="1"
|
||||
F 0 "#PWR0104" H 3250 4500 50 0001 C CNN
|
||||
F 1 "+3V3" H 3250 4800 50 0000 C CNN
|
||||
F 2 "" H 3250 4650 50 0001 C CNN
|
||||
F 3 "" H 3250 4650 50 0001 C CNN
|
||||
1 3250 4650
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
2550 1650 3250 1650
|
||||
Wire Wire Line
|
||||
2550 1350 2950 1350
|
||||
Wire Wire Line
|
||||
2950 4950 2550 4950
|
||||
Entry Wire Line
|
||||
4650 4850 4750 4950
|
||||
Wire Wire Line
|
||||
4450 4850 4650 4850
|
||||
Text Label 4450 4850 0 50 ~ 0
|
||||
~AD~23
|
||||
Wire Wire Line
|
||||
3850 4850 3550 4850
|
||||
NoConn ~ 3550 5050
|
||||
Wire Wire Line
|
||||
2950 5250 3250 5250
|
||||
Wire Wire Line
|
||||
2850 4450 2850 4850
|
||||
Wire Wire Line
|
||||
2850 4850 2950 4850
|
||||
Wire Wire Line
|
||||
3750 4150 3550 4150
|
||||
Wire Wire Line
|
||||
3750 4450 2850 4450
|
||||
Wire Wire Line
|
||||
3750 4150 3750 4450
|
||||
$Comp
|
||||
L 74xx:74LS74 U?
|
||||
U 2 1 61CB05D3
|
||||
P 10550 1500
|
||||
AR Path="/61CB05D3" Ref="U?" Part="1"
|
||||
AR Path="/61CA157A/61CB05D3" Ref="U18" Part="2"
|
||||
AR Path="/61CD3565/61CB05D3" Ref="U?" Part="1"
|
||||
F 0 "U18" H 10550 1500 50 0000 C CNN
|
||||
F 1 "74LVC74AD" H 10800 1250 50 0000 C CNN
|
||||
F 2 "stdpads:SOIC-14_3.9mm" H 10550 1500 50 0001 C CNN
|
||||
F 3 "74xx/74hc_hct74.pdf" H 10550 1500 50 0001 C CNN
|
||||
F 4 "C7864" H 10550 1500 50 0001 C CNN "LCSC Part"
|
||||
2 10550 1500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Text HLabel 2550 4950 0 50 Input ~ 0
|
||||
CLK
|
||||
Text HLabel 2550 4350 0 50 Input ~ 0
|
||||
REG~OE~
|
||||
Text HLabel 2550 1650 0 50 Input ~ 0
|
||||
~RES~
|
||||
Text HLabel 2550 1350 0 50 Input ~ 0
|
||||
ROM~WE~
|
||||
Text HLabel 4850 1450 2 50 Output ~ 0
|
||||
ESP_~EN~
|
||||
Text Label 2950 1250 2 50 ~ 0
|
||||
~AD~0
|
||||
Wire Bus Line
|
||||
4750 3150 4750 4950
|
||||
Wire Wire Line
|
||||
2550 6750 2950 6750
|
||||
Text Notes 1050 6800 0 50 ~ 0
|
||||
Read data available\ninterrupt mask
|
||||
Wire Notes Line
|
||||
1000 7200 1900 7200
|
||||
Wire Notes Line
|
||||
1000 6300 1900 6300
|
||||
$Comp
|
||||
L 74xx:74LS74 U?
|
||||
U 2 1 61F17BC2
|
||||
P 3250 6750
|
||||
AR Path="/61F17BC2" Ref="U?" Part="1"
|
||||
AR Path="/61CA157A/61F17BC2" Ref="U36" Part="2"
|
||||
AR Path="/61CD3565/61F17BC2" Ref="U?" Part="1"
|
||||
F 0 "U36" H 3250 6750 50 0000 C CNN
|
||||
F 1 "74LVC74AD" H 3500 6500 50 0000 C CNN
|
||||
F 2 "stdpads:SOIC-14_3.9mm" H 3250 6750 50 0001 C CNN
|
||||
F 3 "74xx/74hc_hct74.pdf" H 3250 6750 50 0001 C CNN
|
||||
F 4 "C7864" H 3250 6750 50 0001 C CNN "LCSC Part"
|
||||
2 3250 6750
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:+3V3 #PWR?
|
||||
U 1 1 61F17BC8
|
||||
P 3250 5550
|
||||
AR Path="/61C6168C/61F17BC8" Ref="#PWR?" Part="1"
|
||||
AR Path="/61CA157A/61F17BC8" Ref="#PWR0108" Part="1"
|
||||
F 0 "#PWR0108" H 3250 5400 50 0001 C CNN
|
||||
F 1 "+3V3" H 3250 5700 50 0000 C CNN
|
||||
F 2 "" H 3250 5550 50 0001 C CNN
|
||||
F 3 "" H 3250 5550 50 0001 C CNN
|
||||
1 3250 5550
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
3550 1250 3750 1250
|
||||
Wire Wire Line
|
||||
3750 1250 3750 1800
|
||||
Wire Wire Line
|
||||
3750 1800 2650 1800
|
||||
Wire Wire Line
|
||||
2650 1800 2650 2550
|
||||
Wire Wire Line
|
||||
2650 2550 3250 2550
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
U 1 1 62022ED5
|
||||
P 3250 6450
|
||||
AR Path="/61C6168C/62022ED5" Ref="#PWR?" Part="1"
|
||||
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|
||||
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|
||||
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|
||||
F 2 "" H 3250 6450 50 0001 C CNN
|
||||
F 3 "" H 3250 6450 50 0001 C CNN
|
||||
1 3250 6450
|
||||
1 0 0 -1
|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
F 3 "~" H 5550 6250 50 0001 C CNN
|
||||
F 4 "C17513" H 5550 6250 50 0001 C CNN "LCSC Part"
|
||||
1 5550 6250
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
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|
||||
6050 6250 5950 6250
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||||
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|
||||
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|
||||
U 1 1 62031DF9
|
||||
P 5950 6650
|
||||
AR Path="/64084316/62031DF9" Ref="#PWR?" Part="1"
|
||||
AR Path="/61CA157A/62031DF9" Ref="#PWR0189" Part="1"
|
||||
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|
||||
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|
||||
F 2 "" H 5950 6650 50 0001 C CNN
|
||||
F 3 "" H 5950 6650 50 0001 C CNN
|
||||
1 5950 6650
|
||||
1 0 0 -1
|
||||
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|
||||
Text HLabel 6050 6250 2 50 Output ~ 0
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||||
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|
||||
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|
||||
3550 6850 3750 6850
|
||||
$Comp
|
||||
L 74xx:74LS02 U22
|
||||
U 3 2 62038458
|
||||
P 5150 6650
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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|
||||
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||||
WRREQ
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||||
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|
||||
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||||
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||||
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|
||||
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||||
~RDREQ~
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
4550 6550 4850 6550
|
||||
Wire Wire Line
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||||
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||||
Text Label 4550 6550 0 50 ~ 0
|
||||
WRREQ
|
||||
Text Label 4550 6750 0 50 ~ 0
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||||
WR~IE~
|
||||
Wire Wire Line
|
||||
5650 6450 5650 6650
|
||||
$Comp
|
||||
L Transistor_BJT:MMBT3904 Q?
|
||||
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|
||||
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|
||||
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|
||||
AR Path="/61CA157A/62031DF3" Ref="Q5" Part="1"
|
||||
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|
||||
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|
||||
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|
||||
F 3 "~" H 5850 6450 50 0001 C CNN
|
||||
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|
||||
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||||
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||||
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|
||||
Connection ~ 5650 6450
|
||||
Wire Wire Line
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||||
5650 6250 5650 6450
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||||
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|
||||
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||||
U 1 1 620548CA
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||||
P 5550 6650
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||||
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|
||||
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|
||||
F 0 "R32" V 5400 6650 50 0000 C CNN
|
||||
F 1 "1k" V 5500 6650 50 0000 C BNN
|
||||
F 2 "stdpads:R_0805" H 5550 6650 50 0001 C CNN
|
||||
F 3 "~" H 5550 6650 50 0001 C CNN
|
||||
F 4 "C17513" H 5550 6650 50 0001 C CNN "LCSC Part"
|
||||
1 5550 6650
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||||
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||||
Text Label 4550 6350 0 50 ~ 0
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||||
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|
||||
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||||
write buffer\nempty
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||||
Text Notes 4450 6300 2 50 ~ 0
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||||
read data\navailable
|
||||
$Comp
|
||||
L 74xx:74LS74 U?
|
||||
U 1 1 679639AF
|
||||
P 3250 1350
|
||||
AR Path="/679639AF" Ref="U?" Part="1"
|
||||
AR Path="/61CA157A/679639AF" Ref="U35" Part="1"
|
||||
AR Path="/61CD3565/679639AF" Ref="U?" Part="1"
|
||||
F 0 "U35" H 3250 1350 50 0000 C CNN
|
||||
F 1 "74LVC74AD" H 3500 1100 50 0000 C CNN
|
||||
F 2 "stdpads:SOIC-14_3.9mm" H 3250 1350 50 0001 C CNN
|
||||
F 3 "74xx/74hc_hct74.pdf" H 3250 1350 50 0001 C CNN
|
||||
F 4 "C7864" H 3250 1350 50 0001 C CNN "LCSC Part"
|
||||
1 3250 1350
|
||||
1 0 0 -1
|
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|
||||
$Comp
|
||||
L 74xx:74LS74 U?
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||||
U 2 1 61CA9D3D
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||||
P 3250 4050
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||||
AR Path="/61CA9D3D" Ref="U?" Part="1"
|
||||
AR Path="/61CA157A/61CA9D3D" Ref="U19" Part="2"
|
||||
AR Path="/61CD3565/61CA9D3D" Ref="U?" Part="1"
|
||||
F 0 "U19" H 3250 4050 50 0000 C CNN
|
||||
F 1 "74LVC74AD" H 3500 3800 50 0000 C CNN
|
||||
F 2 "stdpads:SOIC-14_3.9mm" H 3250 4050 50 0001 C CNN
|
||||
F 3 "74xx/74hc_hct74.pdf" H 3250 4050 50 0001 C CNN
|
||||
F 4 "C7864" H 3250 4050 50 0001 C CNN "LCSC Part"
|
||||
2 3250 4050
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L 74xx:74LS74 U?
|
||||
U 1 1 61CA9D2C
|
||||
P 3250 2250
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||||
AR Path="/61CA9D2C" Ref="U?" Part="1"
|
||||
AR Path="/61CA157A/61CA9D2C" Ref="U19" Part="1"
|
||||
AR Path="/61CD3565/61CA9D2C" Ref="U?" Part="1"
|
||||
F 0 "U19" H 3250 2250 50 0000 C CNN
|
||||
F 1 "74LVC74AD" H 3500 2000 50 0000 C CNN
|
||||
F 2 "stdpads:SOIC-14_3.9mm" H 3250 2250 50 0001 C CNN
|
||||
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|
||||
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|
||||
1 3250 2250
|
||||
1 0 0 -1
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$EndComp
|
||||
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$Comp
|
||||
L 74xx:74LS74 U?
|
||||
U 1 1 61986FF7
|
||||
P 3250 3150
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AR Path="/61986FF7" Ref="U?" Part="1"
|
||||
AR Path="/61CA157A/61986FF7" Ref="U37" Part="1"
|
||||
AR Path="/61CD3565/61986FF7" Ref="U?" Part="1"
|
||||
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|
||||
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|
||||
F 2 "stdpads:SOIC-14_3.9mm" H 3250 3150 50 0001 C CNN
|
||||
F 3 "74xx/74hc_hct74.pdf" H 3250 3150 50 0001 C CNN
|
||||
F 4 "C7864" H 3250 3150 50 0001 C CNN "LCSC Part"
|
||||
1 3250 3150
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1 0 0 -1
|
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$EndComp
|
||||
$Comp
|
||||
L 74xx:74LS74 U?
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||||
U 2 1 619879D7
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||||
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||||
AR Path="/619879D7" Ref="U?" Part="1"
|
||||
AR Path="/61CA157A/619879D7" Ref="U37" Part="2"
|
||||
AR Path="/61CD3565/619879D7" Ref="U?" Part="1"
|
||||
F 0 "U37" H 3250 4950 50 0000 C CNN
|
||||
F 1 "74LVC74AD" H 3500 4700 50 0000 C CNN
|
||||
F 2 "stdpads:SOIC-14_3.9mm" H 3250 4950 50 0001 C CNN
|
||||
F 3 "74xx/74hc_hct74.pdf" H 3250 4950 50 0001 C CNN
|
||||
F 4 "C7864" H 3250 4950 50 0001 C CNN "LCSC Part"
|
||||
2 3250 4950
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
NoConn ~ 3550 3950
|
||||
Wire Wire Line
|
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4550 6350 4850 6350
|
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Wire Wire Line
|
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4550 6150 4850 6150
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$Comp
|
||||
L 74xx:74LS02 U22
|
||||
U 4 2 6204FC23
|
||||
P 5150 6250
|
||||
F 0 "U22" H 5150 6250 50 0000 C CNN
|
||||
F 1 "74LVC02AD" H 5150 6450 50 0000 C CNN
|
||||
F 2 "stdpads:SOIC-14_3.9mm" H 5150 6250 50 0001 C CNN
|
||||
F 3 "http://www.ti.com/lit/gpn/sn74LS02" H 5150 6250 50 0001 C CNN
|
||||
F 4 "C7804" H 5150 6250 50 0001 C CNN "LCSC Part"
|
||||
4 5150 6250
|
||||
1 0 0 -1
|
||||
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|
||||
$Comp
|
||||
L 74xx:74LS125 U24
|
||||
U 3 1 62013970
|
||||
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|
||||
F 0 "U24" H 4100 4850 50 0000 C CNN
|
||||
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|
||||
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|
||||
F 3 "http://www.ti.com/lit/gpn/sn74LS125" H 4150 4850 50 0001 C CNN
|
||||
F 4 "C7661" H 4150 4850 50 0001 C CNN "LCSC Part"
|
||||
3 4150 4850
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L 74xx:74LS125 U24
|
||||
U 4 1 679639CB
|
||||
P 4150 3050
|
||||
F 0 "U24" H 4100 3050 50 0000 C CNN
|
||||
F 1 "74LVC125AD" H 4150 3250 50 0000 C CNN
|
||||
F 2 "stdpads:SOIC-14_3.9mm" H 4150 3050 50 0001 C CNN
|
||||
F 3 "http://www.ti.com/lit/gpn/sn74LS125" H 4150 3050 50 0001 C CNN
|
||||
F 4 "C7661" H 4150 3050 50 0001 C CNN "LCSC Part"
|
||||
4 4150 3050
|
||||
1 0 0 -1
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$EndComp
|
||||
$EndSCHEMATC
|
5530
DataReg.kicad_sch
Normal file
5530
DataReg.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
2360
DataReg.sch
2360
DataReg.sch
File diff suppressed because it is too large
Load Diff
2695
ESP32.kicad_sch
Normal file
2695
ESP32.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
199671
NuBus-ESP32.kicad_pcb
199671
NuBus-ESP32.kicad_pcb
File diff suppressed because it is too large
Load Diff
479
NuBus-ESP32.kicad_pro
Normal file
479
NuBus-ESP32.kicad_pro
Normal file
@ -0,0 +1,479 @@
|
||||
{
|
||||
"board": {
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.049999999999999996,
|
||||
"copper_line_width": 0.19999999999999998,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.049999999999999996,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.09999999999999999,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.09999999999999999,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 0.0,
|
||||
"height": 1.4,
|
||||
"width": 1.05
|
||||
},
|
||||
"silk_line_width": 0.12,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.15,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"45_degree_only": false,
|
||||
"min_clearance": 0.15
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"filename": "board_design_settings.json",
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"copper_edge_clearance": "error",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"footprint_type_mismatch": "error",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "error",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_over_copper": "warning",
|
||||
"silk_overlap": "warning",
|
||||
"skew_out_of_range": "error",
|
||||
"through_hole_pad_without_hole": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rule_severitieslegacy_courtyards_overlap": true,
|
||||
"rule_severitieslegacy_no_courtyard_defined": false,
|
||||
"rules": {
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_copper_edge_clearance": 0.075,
|
||||
"min_hole_clearance": 0.25,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_through_hole_diameter": 0.19999999999999998,
|
||||
"min_track_width": 0.15,
|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_diameter": 0.5,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"track_widths": [
|
||||
0.0,
|
||||
0.2,
|
||||
0.25,
|
||||
0.3,
|
||||
0.35,
|
||||
0.4,
|
||||
0.45,
|
||||
0.5,
|
||||
0.6,
|
||||
0.7,
|
||||
0.8,
|
||||
1.0
|
||||
],
|
||||
"via_dimensions": [
|
||||
{
|
||||
"diameter": 0.0,
|
||||
"drill": 0.0
|
||||
},
|
||||
{
|
||||
"diameter": 0.6,
|
||||
"drill": 0.3
|
||||
},
|
||||
{
|
||||
"diameter": 0.8,
|
||||
"drill": 0.4
|
||||
},
|
||||
{
|
||||
"diameter": 1.0,
|
||||
"drill": 0.5
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"pin_map": [
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
2,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_label_syntax": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [],
|
||||
"pinned_symbol_libs": []
|
||||
},
|
||||
"meta": {
|
||||
"filename": "NuBus-ESP32.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.15,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.15,
|
||||
"via_diameter": 0.5,
|
||||
"via_drill": 0.2,
|
||||
"wire_width": 6.0
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"net_colors": null
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "NuBus-ESP32.net",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"drawing": {
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 50.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"label_size_ratio": 0.25,
|
||||
"pin_symbol_size": 0.0,
|
||||
"text_offset_ratio": 0.08
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_format_name": "Pcbnew",
|
||||
"ngspice": {
|
||||
"fix_include_paths": true,
|
||||
"fix_passive_vals": false,
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
"model_mode": 0,
|
||||
"workbook_filename": ""
|
||||
},
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "",
|
||||
"spice_adjust_passive_values": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"3a83a06c-b9a3-440b-8fa5-278e4d065348",
|
||||
""
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-00006400a649",
|
||||
"NuBus"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-000061c6168c",
|
||||
"DataReg"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-000061ca157a",
|
||||
"CtrlStatReg"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-000061c8b24a",
|
||||
"AddrLatch"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-000062454aa9",
|
||||
"ROM"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-000061d1084d",
|
||||
"BusControl"
|
||||
],
|
||||
[
|
||||
"00000000-0000-0000-0000-000064084316",
|
||||
"ESP32"
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
3184
NuBus-ESP32.kicad_sch
Normal file
3184
NuBus-ESP32.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
265
NuBus-ESP32.pro
265
NuBus-ESP32.pro
@ -1,265 +0,0 @@
|
||||
update=Thursday, November 18, 2021 at 10:58:12 PM
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=NuBus-ESP32.net
|
||||
CopperLayerCount=4
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.15
|
||||
MinViaDiameter=0.5
|
||||
MinViaDrill=0.2
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.15
|
||||
TrackWidth2=0.2
|
||||
TrackWidth3=0.25
|
||||
TrackWidth4=0.3
|
||||
TrackWidth5=0.35
|
||||
TrackWidth6=0.4
|
||||
TrackWidth7=0.45
|
||||
TrackWidth8=0.5
|
||||
TrackWidth9=0.6
|
||||
TrackWidth10=0.7
|
||||
TrackWidth11=0.8
|
||||
TrackWidth12=1
|
||||
ViaDiameter1=0.5
|
||||
ViaDrill1=0.2
|
||||
ViaDiameter2=0.6
|
||||
ViaDrill2=0.3
|
||||
ViaDiameter3=0.8
|
||||
ViaDrill3=0.4
|
||||
ViaDiameter4=1
|
||||
ViaDrill4=0.5
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||