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update ioRange; it doesn't actually affect the cache, only the MMU which we don't use...

This commit is contained in:
Romain Dolbeau 2022-06-12 13:46:58 +02:00
parent 972f628e80
commit 2d2cbdbafe
2 changed files with 6 additions and 3 deletions
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5
nubus-to-ztex-gateware/GenGoblinAccel.scala
View File

@ -60,7 +60,10 @@ object GenGoblinAccel { // extends App {
),
new StaticMemoryTranslatorPlugin(
// only cache the sdram memory
ioRange = addr => addr(31 downto 28) =/= 0x8
ioRange = addr => ((addr(31 downto 28) =/= 0x8) & // SDRAM
(addr(31 downto 12) =/= 0xF0902) & // SRAM
(addr(31 downto 16) =/= 0xF091) // ROM
)
),
new DecoderSimplePlugin(
catchIllegalInstruction = false

4
nubus-to-ztex-gateware/VexRiscv_FbAccel.v
View File

@ -3493,7 +3493,7 @@ module VexRiscv (
assign IBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1;
assign IBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1;
assign IBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1;
assign IBusCachedPlugin_mmuBus_rsp_isIoAccess = (IBusCachedPlugin_mmuBus_rsp_physicalAddress[31 : 28] != 4'b1000);
assign IBusCachedPlugin_mmuBus_rsp_isIoAccess = (((IBusCachedPlugin_mmuBus_rsp_physicalAddress[31 : 28] != 4'b1000) && (IBusCachedPlugin_mmuBus_rsp_physicalAddress[31 : 12] != 20'hf0902)) && (IBusCachedPlugin_mmuBus_rsp_physicalAddress[31 : 16] != 16'hf091));
assign IBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0;
assign IBusCachedPlugin_mmuBus_rsp_exception = 1'b0;
assign IBusCachedPlugin_mmuBus_rsp_refilling = 1'b0;
@ -3502,7 +3502,7 @@ module VexRiscv (
assign DBusCachedPlugin_mmuBus_rsp_allowRead = 1'b1;
assign DBusCachedPlugin_mmuBus_rsp_allowWrite = 1'b1;
assign DBusCachedPlugin_mmuBus_rsp_allowExecute = 1'b1;
assign DBusCachedPlugin_mmuBus_rsp_isIoAccess = (DBusCachedPlugin_mmuBus_rsp_physicalAddress[31 : 28] != 4'b1000);
assign DBusCachedPlugin_mmuBus_rsp_isIoAccess = (((DBusCachedPlugin_mmuBus_rsp_physicalAddress[31 : 28] != 4'b1000) && (DBusCachedPlugin_mmuBus_rsp_physicalAddress[31 : 12] != 20'hf0902)) && (DBusCachedPlugin_mmuBus_rsp_physicalAddress[31 : 16] != 16'hf091));
assign DBusCachedPlugin_mmuBus_rsp_isPaging = 1'b0;
assign DBusCachedPlugin_mmuBus_rsp_exception = 1'b0;
assign DBusCachedPlugin_mmuBus_rsp_refilling = 1'b0;