This commit is contained in:
Romain Dolbeau 2022-10-06 23:34:54 +02:00
parent c9e752218b
commit 3281c10e72
3 changed files with 8 additions and 13 deletions

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@ -1,5 +0,0 @@
.byte sExec2 /* Code revision (Primary init) */
.byte sCPU68020 /* CPU type is 68020 */
.short 0 /* Reserved */
.long Primary-. /* Offset to code. */

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@ -1,5 +0,0 @@
.byte sExec2 /* Code revision (Primary init) */
.byte sCPU68020 /* CPU type is 68020 */
.short 0 /* Reserved */
.long Secondary-. /* Offset to code. */

View File

@ -46,7 +46,10 @@ _BoardName:
/* _sPInitRec: */
/* .long _EndsPInitRec-_sPInitRec */ /* physical block size */
.long size_sPInitRec
.include "NuBusFPGAPrimaryInit.s" /* the header/code */
.byte sExec2 /* Code revision (Primary init) */
.byte sCPU68020 /* CPU type is 68020 */
.short 0 /* Reserved */
.long Primary-. /* Offset to C code. */
ALIGN 2
/* _EndsPInitRec: */
@ -54,11 +57,13 @@ _BoardName:
/* _sSInitRec: */
/* .long _EndsSInitRec-_sSInitRec */ /* physical block size */
.long size_sSInitRec
.include "NuBusFPGASecondaryInit.s" /* the header/code */
.byte sExec2 /* Code revision (Primary init) */
.byte sCPU68020 /* CPU type is 68020 */
.short 0 /* Reserved */
.long Secondary-. /* Offset to C code. */
ALIGN 2
/* _EndsSInitRec: */
.section .text.begin
ALIGN 2
_VendorInfo: