start factorizing Mac stuff

This commit is contained in:
Romain Dolbeau 2023-11-18 11:10:46 +01:00
parent 57f08b1025
commit 3f96879194
2 changed files with 28 additions and 125 deletions

@ -1 +1 @@
Subproject commit 0de12910a247bd96f3e90db971de137c6e5ffa43
Subproject commit 06c4327335c34b0adaac18f9a3dc9c1badc19953

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@ -38,6 +38,7 @@ from VintageBusFPGA_Common.goblin_accel import *
from VintageBusFPGA_Common.cdc_wb import WishboneDomainCrossingMaster
from VintageBusFPGA_Common.fpga_blk_dma import *
from VintageBusFPGA_Common.fpga_sd_dma import *
from VintageBusFPGA_Common.MacPeriphSoC import *
from nubus_mem_wb import NuBus2Wishbone
from nubus_memfifo_wb import NuBus2WishboneFIFO
@ -182,35 +183,10 @@ class _CRG(Module):
class NuBusFPGA(SoCCore): # Add SDCard -----------------------------------------------------------------------------------
# WiP
def add_sdcard_custom(self, name="sdcard", mode="read+write"):
# Imports.
from litesdcard.phy import SDPHY
from litesdcard.core import SDCore
# Checks.
assert mode in ["read", "write", "read+write"]
# Pads.
sdcard_pads = self.platform.request(name)
# Core.
self.check_if_exists("sdphy")
self.check_if_exists("sdcore")
self.sdphy = SDPHY(sdcard_pads, self.platform.device, self.clk_freq, cmd_timeout=10e-1, data_timeout=10e-1)
self.sdcore = SDCore(self.sdphy)
class NuBusFPGA(MacPeriphSoC):
def __init__(self, variant, version, sys_clk_freq, goblin, hdmi, goblin_res, sdcard, flash, config_flash, ethernet, **kwargs):
print(f"Building NuBusFPGA for board version {version}")
kwargs["cpu_type"] = "None"
kwargs["integrated_sram_size"] = 0
kwargs["with_uart"] = False
kwargs["with_timer"] = False
self.sys_clk_freq = sys_clk_freq
self.platform = platform = ztex213_nubus.Platform(variant = variant, version = version)
if (flash and (version == "V1.2")):
@ -220,69 +196,20 @@ class NuBusFPGA(SoCCore): # Add SDCard --------------------------------------
platform.add_extension(ztex213_nubus._rmii_eth_extpmod_io_v1_2)
use_goblin_alt = True
if ((not use_goblin_alt) or (not hdmi)):
from VintageBusFPGA_Common.goblin_fb import goblin_rounded_size, Goblin
else:
from VintageBusFPGA_Common.goblin_alt_fb import goblin_rounded_size, GoblinAlt
if (goblin):
hres = int(goblin_res.split("@")[0].split("x")[0])
vres = int(goblin_res.split("@")[0].split("x")[1])
goblin_fb_size = goblin_rounded_size(hres, vres)
print(f"Reserving {goblin_fb_size} bytes ({goblin_fb_size//1048576} MiB) for the goblin")
else:
hres = 0
vres = 0
goblin_fb_size = 0
# litex.soc.cores.video.video_timings.update(goblin_timings)
SoCCore.__init__(self,
platform=platform,
sys_clk_freq=sys_clk_freq,
clk_freq=sys_clk_freq,
csr_paging=0x800, # default is 0x800
bus_interconnect = "crossbar",
**kwargs)
MacPeriphSoC.__init__(self,
platform=platform,
sys_clk_freq=sys_clk_freq,
csr_paging=0x800, # default is 0x800
bus_interconnect = "crossbar",
goblin = goblin,
hdmi = hdmi,
goblin_res = goblin_res,
use_goblin_alt = use_goblin_alt,
**kwargs)
# Quoting the doc:
# * Separate address spaces are reserved for processor access to cards in NuBus slots. For a
# * device in NuBus slot number s, the address space in 32-bit mode begins at address
# * $Fs00 0000 and continues through the highest address, $FsFF FFFF (where s is a constant in
# * the range $9 through $E for the Macintosh II, the Macintosh IIx, and the Macintosh IIfx;
# * $A through $E for the Macintosh Quadra 900; $9 through $B for the Macintosh IIcx;
# * $C through $E for the Macintosh IIci; $D and $E for the Macintosh Quadra 700; and
# * $9 for the Macintosh IIsi).
# the Q650 is $C through $E like the IIci, $E is the one with the PDS.
# So at best we get 16 MiB in 32-bits mode, unless using "super slot space"
# in 24 bits it's only one megabyte, $s0 0000 through $sF FFFF
# they are translated: '$s0 0000-$sF FFFF' to '$Fs00 0000-$Fs0F FFFF' (for s in range $9 through $E)
# let's assume we have 32-bits mode, this can be requested in the DeclROM apparently
self.wb_mem_map = wb_mem_map = {
# master to map the NuBus access to RAM
"master": 0x00000000, # to 0x3FFFFFFF
"main_ram": 0x80000000, # not directly reachable from NuBus
"video_framebuffer": 0x80000000 + 0x10000000 - goblin_fb_size, # Updated later
# map everything in slot 0, remapped from the real slot in NuBus2Wishbone
"goblin_mem": 0xF0000000, # up to 8 MiB of FB memory
#"END OF FIRST MB" : 0xF00FFFFF,
#"END OF 8 MB": 0xF07FFFFF,
"goblin_bt" : 0xF0900000, # BT for goblin (regs)
"goblin_accel" : 0xF0901000, # accel for goblin (regs)
"goblin_accel_ram" : 0xF0902000, # accel for goblin (scratch ram)
"stat" : 0xF0903000, # stat
"goblin_accel_rom" : 0xF0910000, # accel for goblin (rom)
"goblin_audio_ram" : 0xF0920000, # audio for goblin (RAM buffers)
"csr" : 0xF0A00000, # CSR
"pingmaster": 0xF0B00000,
"ethmac": 0xF0C00000,
#"spiflash": 0xF0D00000, # testing
#"config_spiflash": 0xF0D00000, # testing
"rom": 0xF0FF8000, # ROM at the end (32 KiB of it ATM)
"spiflash": 0xF0FF8000, # FIXME currently the flash is in the ROM spot, limited to 32 KiB
"config_spiflash": 0xF0FF8000, # FIXME currently the flash is in the ROM spot, limited to 32 KiB
#"END OF SLOT SPACE": 0xF0FFFFFF,
}
self.mem_map.update(wb_mem_map)
self.mem_map.update(self.wb_mem_map)
self.submodules.crg = _CRG(platform=platform, version=version, sys_clk_freq=sys_clk_freq, goblin=goblin, hdmi=hdmi, pix_clk=litex.soc.cores.video.video_timings[goblin_res]["pix_clk"], ethernet=ethernet)
## add our custom timings after the clocks have been defined
@ -302,40 +229,7 @@ class NuBusFPGA(SoCCore): # Add SDCard --------------------------------------
#print(fix_line)
platform.add_platform_command(fix_line)
if ((not flash) and (not config_flash)): # so ROM is builtin
rom_file = "rom_{}.bin".format(version.replace(".", "_"))
rom_data = soc_core.get_mem_data(filename_or_regions=rom_file, endianness="little") # "big"
# rom = Array(rom_data)
#print("\n****************************************\n")
#for i in range(len(rom)):
# print(hex(rom[i]))
#print("\n****************************************\n")
self.add_ram("rom", origin=self.mem_map["rom"], size=2**15, contents=rom_data, mode="r") ## 32 KiB, must match mmap
print("$$$$$ ROM must be pre-existing for integration in the bitstream, double-check the ROM file is current for this configuration $$$$$\n");
if (flash):
from litespi.modules.generated_modules import W25Q128JV
from litespi.opcodes import SpiNorFlashOpCodes as Codes
self.add_spi_flash(mode="4x",
clk_freq = sys_clk_freq/4, # Fixme; PHY freq ?
module=W25Q128JV(Codes.READ_1_1_4),
region_size = 0x00008000, # 32 KiB
with_mmap=True, with_master=False)
print("$$$$$ ROM must be put in the external Flash NOR $$$$$\n");
if (config_flash):
sector = 40
from litespi.modules.generated_modules import S25FL128S
from litespi.opcodes import SpiNorFlashOpCodes as Codes
self.add_spi_flash(name="config_spiflash",
mode="1x",
clk_freq = sys_clk_freq/4, # Fixme; PHY freq ?
module=S25FL128S(Codes.READ_1_1_1),
region_size = 0x00008000, # 32 KiB,
region_offset = (sector * 65536),
with_mmap=True, with_master=False)
print(f"$$$$$ ROM must be put in the config Flash at sector {sector} $$$$$\n");
MacPeriphSoC.add_rom(self, version = version, flash = flash, config_flash = config_flash)
#from wb_test import WA2D
#self.submodules.wa2d = WA2D(self.platform)
@ -371,8 +265,8 @@ class NuBusFPGA(SoCCore): # Add SDCard --------------------------------------
base_fb = self.wb_mem_map["main_ram"] + avail_sdram - 1048576 # placeholder
if (goblin):
if (avail_sdram >= goblin_fb_size):
avail_sdram = avail_sdram - goblin_fb_size
if (avail_sdram >= self.goblin_fb_size):
avail_sdram = avail_sdram - self.goblin_fb_size
base_fb = self.wb_mem_map["main_ram"] + avail_sdram
self.wb_mem_map["video_framebuffer"] = base_fb
print(f"FrameBuffer base_fb @ {base_fb:x}")
@ -530,6 +424,11 @@ class NuBusFPGA(SoCCore): # Add SDCard --------------------------------------
self.bus.add_slave("Stat", self.stat.bus_slv, SoCRegion(origin=self.mem_map.get("stat", None), size=0x1000, cached=False))
if (goblin):
if ((not use_goblin_alt) or (not hdmi)):
from VintageBusFPGA_Common.goblin_fb import goblin_rounded_size, Goblin
else:
from VintageBusFPGA_Common.goblin_alt_fb import goblin_rounded_size, GoblinAlt
if (not hdmi):
self.submodules.videophy = VideoVGAPHY(platform.request("vga"), clock_domain="vga")
self.submodules.goblin = Goblin(soc=self, phy=self.videophy, timings=goblin_res, clock_domain="vga", irq_line=fb_irq, endian="little", hwcursor=False, truecolor=True) # clock_domain for the VGA side, goblin is running in cd_sys
@ -568,7 +467,7 @@ class NuBusFPGA(SoCCore): # Add SDCard --------------------------------------
self.add_sdcard()
# irq?
if (ethernet):
if (ethernet): ### WIP WIP WIP WIP
# we need the CRG to provide the cd_eth clock: "use refclk_cd as RMII reference clock (provided by user design) (no external clock).
self.ethphy = LiteEthPHYRMII(
clock_pads = self.platform.request("eth_clocks"),
@ -576,6 +475,10 @@ class NuBusFPGA(SoCCore): # Add SDCard --------------------------------------
self.add_ethernet(phy=self.ethphy, data_width = 32)
print(f"%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% {self.ethmac.interface.sram.ev.irq}") # FIXME HANDLEME
from mdio import MDIOCtrl
self.submodules.mdio_ctrl = MDIOCtrl(platform=platform)
# for testing
if (False):
from nubus_master_tst import PingMaster