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2026-10-22 04:02:23 +00:00 · 2022-01-29 11:03:47 +01:00
1 parent 2d50954892
commit 68e63497af
@@ -4,10 +4,7 @@ export LD_LIBRARY_PATH=/opt/Xilinx/Vivado/2020.1/lib/lnx64.o/SuSE

 python3 nubus_to_fpga_soc.py --build --csr-csv csr.csv --csr-json csr.json --variant=ztex2.13a --version=V1.0 --sys-clk-freq 100e6 
 ) 2>&1 | tee build_V1_0.log
-# --trng
-# --sdram 
-# --sdcard
-# --usb
-# --cg3 --cg3-res 1280x1024@60Hz 
+# --toby --toby-res 1280x1024@60Hz
+# --hdmi

 grep -A10 'Design Timing Summary' build/ztex213_nubus_V1_0/gateware/ztex213_nubus_V1_0_timing.rpt
@@ -4,7 +4,7 @@ from migen.genlib.fifo import *
 import litex

 class NuBus(Module):
-    def __init__(self, platform, cd_nubus="nubus"):
+    def __init__(self, platform, cd_nubus="nubus", cd_nubus90="nubus90"):
        # unused & unconnected
        # self.nubus_pwf_n = Signal(reset = 1)
        # self.nubus_sp_n = Signal(reset = 1)
@@ -86,7 +86,11 @@ class NuBus(Module):
                                  #o_cpu_errors = self.cpu_errors,
                                  o_mem_stdslot = self.mem_stdslot,
                                  o_mem_super = self.mem_super,
-                                  o_mem_local = self.mem_local)
+                                  o_mem_local = self.mem_local,
+
+                                  i_nub_clk2xn = ClockSignal(cd_nubus90),
+                                  io_nub_tm2n = platform.request("tm2_3v3_n"),
+        )
                
    def get_netlist_name(self):
        return "nubus"
@@ -62,7 +62,11 @@ module nubus
    // Access to superslot area ($sXXXXXXX where <s> is card id)
    output 		  mem_super,
    // Access to local memory on the card
-    output 		  mem_local
+    output 		  mem_local,
+
+	// NuBus90 (unimplemented)
+	input         nub_clk2xn,
+ 	inout         nub_tm2n  
  );

  `include "nubus.svh"
@@ -0,0 +1,62 @@
+/*
+ * Nubus Arbitration logic
+ *
+ * ARB is responsible for doing the NuBus arbitration logic. Upon
+ * detecting any higher priority ARB<3:0> value, it will defer its
+ * generation of lower ARB<3:0> bits.
+ * The GRANT signal must be timed externally to determine proper
+ * NuBus constraints.
+ * This version uses a new technique to minimize skews .
+ */
+
+module nubus_arbiter 
+   (
+    input [3:0] idn,    // ID of this card
+    input [3:0] arbn,   // NuBus arbiter's lines (input)
+    output [3:0] arbon,   // NuBus arbiter's lines (control)
+    input       arbcyn, // enable arbitter
+    output      grant   // Grant access
+    );
+
+   wire          arb2oen, arb1oen, arb0oen;
+   wire          arb3, arb2, arb1, arb0;
+   wire          grantn;
+
+   assign arbon[3] = ~arb3;
+   assign arbon[2] = ~arb2;
+   assign arbon[1] = ~arb1;
+   assign arbon[0] = ~arb0;
+
+   // ------------------------------------------
+
+   assign arb3 = ~arbcyn & ~idn[3];
+
+   assign arb2oen = idn[3] & ~arbn[3];
+
+   // ------------------------------------------
+
+   assign arb2 = ~arbcyn & ~arb2oen & ~idn[2];
+
+   assign arb1oen = idn[3] & ~arbn[3] |
+                    idn[2] & ~arbn[2];
+
+   // ------------------------------------------
+
+   assign arb1 = ~arbcyn & ~arb1oen & ~idn[1];
+
+   assign arb0oen = idn[3] & ~arbn[3] |
+                    idn[2] & ~arbn[2] |
+                    idn[1] & ~arbn[1];
+
+   // ------------------------------------------
+
+   assign arb0 = ~arbcyn & ~arb0oen & ~idn[0];
+
+   assign grantn = idn[3] & ~arbn[3] |
+                   idn[2] & ~arbn[2] |
+                   idn[1] & ~arbn[1] |
+                   idn[0] & ~arbn[0];
+
+   assign grant = ~arbcyn &  ~grantn;
+
+endmodule
@@ -0,0 +1,124 @@
+import os
+import json
+import inspect
+from shutil import which
+from sysconfig import get_platform
+
+from migen import *
+
+from litex.soc.interconnect.csr import CSRStatus
+
+from litex.build.tools import generated_banner
+
+from litex.soc.doc.rst import reflow
+from litex.soc.doc.module import gather_submodules, ModuleNotDocumented, DocumentedModule, DocumentedInterrupts
+from litex.soc.doc.csr import DocumentedCSRRegion
+from litex.soc.interconnect.csr import _CompoundCSR
+
+from litex.soc.integration.export import _get_rw_functions_c
+
+# for generating a timestamp in the description field, if none is otherwise given
+import datetime
+import time
+
+
+### _get_rw_functions_c(          reg_name, reg_base,            nwords, busword, alignment, read_only, with_access_functions):
+def _get_rw_functions_c_DIS(name, csr_name, reg_base, area_base, nwords, busword, alignment, read_only, with_access_functions):
+    reg_name = name + "_" + csr_name
+    r = ""
+
+    addr_str = "CSR_{}_ADDR".format(reg_name.upper())
+    size_str = "CSR_{}_SIZE".format(reg_name.upper())
+    r += "#define {} (CSR_{}_BASE + {}L)\n".format(addr_str, name.upper(), hex(reg_base - area_base))
+    r += "#define {} {}\n".format(size_str, nwords)
+
+    size = nwords*busword//8
+    if size > 8:
+        # downstream should select appropriate `csr_[rd|wr]_buf_uintX()` pair!
+        return r
+    elif size > 4:
+        ctype = "uint64_t"
+    elif size > 2:
+        ctype = "uint32_t"
+    elif size > 1:
+        ctype = "uint16_t"
+    else:
+        ctype = "uint8_t"
+
+    stride = alignment//8;
+    if with_access_functions:
+        r += "static inline {} {}_read(struct nubusfpga_{}_softc *sc) {{\n".format(ctype, reg_name, name)
+        if nwords > 1:
+            r += "\t{} r = bus_space_read_4(sc->slotid, {}L);\n".format(ctype, hex(reg_base - area_base))
+            for sub in range(1, nwords):
+                r += "\tr <<= {};\n".format(busword)
+                r += "\tr |= bus_space_read_4(sc->slotid, {}L);\n".format(hex(reg_base - area_base + sub*stride))
+            r += "\treturn r;\n}\n"
+        else:
+            r += "\treturn bus_space_read_4(sc->slotid, {}L);\n}}\n".format(hex(reg_base - area_base))
+
+        if not read_only:
+            r += "static inline void {}_write(struct nubusfpga_{}_softc *sc, {} v) {{\n".format(reg_name, name, ctype)
+            for sub in range(nwords):
+                shift = (nwords-sub-1)*busword
+                if shift:
+                    v_shift = "v >> {}".format(shift)
+                else:
+                    v_shift = "v"
+                r += "\tbus_space_write_4(sc->slotid, {}L, {});\n".format(hex(reg_base - area_base + sub*stride), v_shift)
+            r += "}\n"
+    return r
+
+def get_csr_header_split(regions, constants, csr_base=None, with_access_functions=True):
+    alignment = constants.get("CONFIG_CSR_ALIGNMENT", 32)
+    ar = dict()
+    for name, region in regions.items():
+        r = generated_banner("//")
+    
+        r += "#ifndef __GENERATED_{}_CSR_H\n#define __GENERATED_{}_CSR_H\n".format(name.upper(), name.upper())
+        csr_base = csr_base if csr_base is not None else regions[next(iter(regions))].origin
+        
+        origin = region.origin - csr_base
+        r += "\n/* "+name+" */\n"
+        r += "#ifndef CSR_BASE\n"
+        r += "#define CSR_BASE {}L\n".format(hex(csr_base))
+        r += "#endif\n"
+        r += "#ifndef CSR_"+name.upper()+"_BASE\n"
+        r += "#define CSR_"+name.upper()+"_BASE (CSR_BASE + "+hex(origin)+"L)\n"
+        if not isinstance(region.obj, Memory):
+            for csr in region.obj:
+                nr = (csr.size + region.busword - 1)//region.busword
+                r += _get_rw_functions_c(csr.name, origin, nr, region.busword, alignment,
+                    getattr(csr, "read_only", False), with_access_functions)
+                origin += alignment//8*nr
+                if hasattr(csr, "fields"):
+                    for field in csr.fields.fields:
+                        offset = str(field.offset)
+                        size = str(field.size)
+                        r += "#define CSR_"+name.upper()+"_"+csr.name.upper()+"_"+field.name.upper()+"_OFFSET "+offset+"\n"
+                        r += "#define CSR_"+name.upper()+"_"+csr.name.upper()+"_"+field.name.upper()+"_SIZE "+size+"\n"
+                        if with_access_functions and csr.size <= 32: # FIXME: Implement extract/read functions for csr.size > 32-bit.
+                            reg_name = name + "_" + csr.name.lower()
+                            field_name = reg_name + "_" + field.name.lower()
+                            r += "static inline uint32_t " + field_name + "_extract(struct nubusfpga_" + name + "_softc *sc, uint32_t oldword) {\n"
+                            r += "\tuint32_t mask = ((1 << " + size + ")-1);\n"
+                            r += "\treturn ( (oldword >> " + offset + ") & mask );\n}\n"
+                            r += "static inline uint32_t " + field_name + "_read(struct nubusfpga_" + name + "_softc *sc) {\n"
+                            r += "\tuint32_t word = " + reg_name + "_read(sc);\n"
+                            r += "\treturn " + field_name + "_extract(sc, word);\n"
+                            r += "}\n"
+                            if not getattr(csr, "read_only", False):
+                                r += "static inline uint32_t " + field_name + "_replace(struct nubusfpga_" + name + "_softc *sc, uint32_t oldword, uint32_t plain_value) {\n"
+                                r += "\tuint32_t mask = ((1 << " + size + ")-1);\n"
+                                r += "\treturn (oldword & (~(mask << " + offset + "))) | (mask & plain_value)<< " + offset + " ;\n}\n"
+                                r += "static inline void " + field_name + "_write(struct nubusfpga_" + name + "_softc *sc, uint32_t plain_value) {\n"
+                                r += "\tuint32_t oldword = " + reg_name + "_read(sc);\n"
+                                r += "\tuint32_t newword = " + field_name + "_replace(sc, oldword, plain_value);\n"
+                                r += "\t" + reg_name + "_write(sc, newword);\n"
+                                r += "}\n"
+
+        r += "#endif // CSR_"+name.upper()+"_BASE\n"
+        r += "\n#endif\n"
+        ar[name] = r
+            
+    return ar
@@ -14,6 +14,7 @@ from litex.soc.interconnect import wishbone
 from litex.soc.cores.clock import *
 from litex.soc.cores.led import LedChaser
 import ztex213_nubus
+import nubus_to_fpga_export

 import nubus

@@ -77,13 +78,13 @@ class _CRG(Module):
        self.comb += self.cd_nubus.rst.eq(~rst_nubus_n)
        platform.add_platform_command("create_clock -name nubus_clk -period 100.0 -waveform {{0.0 75.0}} [get_ports clk_3v3_n]")
        
-        #clk2x_nubus = platform.request("nubus_clk2x_n")
-        #if (clk2x_nubus is None):
-        #    print(" ***** ERROR ***** Can't find the NuBus90 Clock !!!!\n");
-        #    assert(false)
-        #self.cd_nubus90.clk = clk2x_nubus
-        #self.comb += self.cd_nubus90.rst.eq(~rst_nubus_n)
-        #platform.add_platform_command("create_clock -name nubus90_clk -period 50.0  -waveform {{0.0 37.5}} [get_ports nubus_clk2x_n]")
+        clk2x_nubus = platform.request("clk2x_3v3_n")
+        if (clk2x_nubus is None):
+            print(" ***** ERROR ***** Can't find the NuBus90 Clock !!!!\n");
+            assert(false)
+        self.cd_nubus90.clk = clk2x_nubus
+        self.comb += self.cd_nubus90.rst.eq(~rst_nubus_n)
+        platform.add_platform_command("create_clock -name nubus90_clk -period 50.0  -waveform {{0.0 37.5}} [get_ports clk2x_3v3_n]")

        num_adv = 0
        num_clk = 0
@@ -336,12 +337,12 @@ def main():
    # should be split per-device (and without base) to still work if we have identical devices in different configurations on multiple boards
    # now it is split

-    #csr_contents_dict = nubus_to_fpga_export.get_csr_header_split(
-    #    regions   = soc.csr_regions,
-    #    constants = soc.constants,
-    #    csr_base  = soc.mem_regions['csr'].origin)
-    #for name in csr_contents_dict.keys():
-    #    write_to_file(os.path.join("nubusfpga_csr_{}.h".format(name)), csr_contents_dict[name])
+    csr_contents_dict = nubus_to_fpga_export.get_csr_header_split(
+        regions   = soc.csr_regions,
+        constants = soc.constants,
+        csr_base  = soc.mem_regions['csr'].origin)
+    for name in csr_contents_dict.keys():
+        write_to_file(os.path.join("nubusfpga_csr_{}.h".format(name)), csr_contents_dict[name])
    
    
 if __name__ == "__main__":
@@ -19,7 +19,7 @@ module nubus_slave_tb ();
   // Clock (rising is driving edge, faling is sampling) 
   tri1                nub_clkn; 
   // Clock 90 (rising is driving edge, faling is sampling) 
-   //tri1                nub_clk2xn; 
+   tri1                nub_clk2xn; 
   // Reset [Open Collector]
   tri1                nub_resetn; 
   // Power Fail Warning [Control]
@@ -29,7 +29,7 @@ module nubus_slave_tb ();
   // Transfer Mode [Control]
   tri1                nub_tm0n;
   tri1                nub_tm1n;
-   //tri1                nub_tm2n;
+   tri1                nub_tm2n;
   // Start [Control]
   tri1                nub_startn;
   // Request [Open Collector]
@@ -50,7 +50,7 @@ module nubus_slave_tb ();
   tri 			   unused0, tmoen, unused1, unused2;
   tri 			   arb, grant;
   tri 			   nubus_oe, nubus_master_dir, nubus_ad_dir;
-   tri			   reset_n_3v3, clk_n_3v3, tm0_n_3v3, tm1_n_3v3, start_n_3v3, ack_n_3v3;
+   tri			   reset_n_3v3, clk_n_3v3, tm0_n_3v3, tm1_n_3v3, start_n_3v3, ack_n_3v3, rqst_n_3v3;
   tri1 [3:0] 		   id_n_3v3;
   tri [31:0] 		   ad_n_3v3;
   tri [3:0] 		   arb_o_n;
@@ -60,8 +60,8 @@ module nubus_slave_tb ();
   tri 				   rqst_o_n;
   
   
-   tri 				   nub_clk2xn, clk2x_n_3v3;
-   tri 				   tm2_n_3v3, nub_tm2n, tm2_o_n, tm2_oe_n;
+   tri 				   clk2x_n_3v3;
+   tri 				   tm2_n_3v3, tm2_o_n, tm2_oe_n;
   
  

@@ -187,8 +187,6 @@ module nubus_slave_tb ();
 							  // .nubus_clk2x_n(nub_clk2xn),
 							  .user_led0(leds[0]),
 							  .user_led1(leds[1]),
-							  .user_led2(leds[2]),
-							  .user_led3(leds[3]),
 							  //.nubus_tm2_n(nub_tm2n),
 							  .id_3v3_n(id_n_3v3),
 							  .ad_3v3_n(ad_n_3v3),
@@ -203,12 +201,15 @@ module nubus_slave_tb ();
 							  .tmoen(tmoen),
 							  .nubus_ad_dir(nubus_ad_dir),
 							  .nmrq_3v3_n(nmrq_3v3_n),
-							  .nubus_oe(nubus_oe)
+							  .nubus_oe(nubus_oe),
+							  .clk2x_3v3_n(clk2x_n_3v3),
+							  .tm2_3v3_n(tm2_n_3v3)
 							  );
   

   // State machine of test bench
   reg         tst_clkn;
+   reg         tst_clk2xn;
   reg         tst_clk48;
   reg         tst_resetn;
   reg         tst_startn;
@@ -221,6 +222,7 @@ module nubus_slave_tb ();

   // Drive NuBus signals
   assign nub_clkn     = tst_clkn;
+   assign nub_clk2xn   = tst_clk2xn;
   assign bd_clk48     = tst_clk48;
   assign nub_resetn   = tst_resetn;
   assign nub_startn   = tst_startn;   
@@ -445,6 +447,12 @@ module nubus_slave_tb ();
      end
      #25;
   end
+   always begin
+      tst_clk2xn <= 0;
+      #25;
+      tst_clk2xn <= 1;
+      #25;
+   end

   always begin
      tst_clk48 <= 0;
@@ -0,0 +1,12 @@
+module sn74lvt145_quarter
+  (
+   input 	   oe_n,
+   input 	   in,
+   output      out
+   );
+
+   assign out = oe_n ? 'bZ : in;
+   
+endmodule // sn74lvt145_quarter
+
+
@@ -60,8 +60,6 @@ _nubus_io_v1_0 = [
    ## leds on the NuBus board
    ("user_led", 0, Pins("V5"),  IOStandard("lvcmos33")), #LED0
    ("user_led", 1, Pins("V4"),  IOStandard("lvcmos33")), #LED1
-    ("user_led", 2, Pins("T5"),  IOStandard("lvcmos33")), #LED2
-    ("user_led", 3, Pins("T4"),  IOStandard("lvcmos33")), #LED3
    ## serial header for console
    ("serial", 0,
     Subsignal("tx", Pins("V9")), # FIXME: might be the other way round
@@ -94,7 +92,7 @@ _nubus_io_v1_0 = [
        Subsignal("data1_n", Pins("V2"), IOStandard("TMDS_33")),
        Subsignal("data2_p", Pins("R3"), IOStandard("TMDS_33")),
        Subsignal("data2_n", Pins("T3"), IOStandard("TMDS_33")),
-        Subsignal("hdp",     Pins("T8"), IOStandard("LVCMOS33")),
+        Subsignal("hpd",     Pins("T8"), IOStandard("LVCMOS33")),
        Subsignal("sda",     Pins("R8"), IOStandard("LVCMOS33")),
        Subsignal("scl",     Pins("R7"), IOStandard("LVCMOS33")),
        Subsignal("cec",     Pins("T6"), IOStandard("LVCMOS33")),
@@ -103,7 +101,7 @@ _nubus_io_v1_0 = [

 _nubus_nubus_v1_0 = [
    ("clk_3v3_n",          0, Pins("H16"), IOStandard("lvttl")),
-    # ("nubus_clk2x_n",      0, Pins(""), IOStandard("lvttl")),
+    ("clk2x_3v3_n",        0, Pins("T5"),  IOStandard("lvttl")),
    ("ack_3v3_n",          0, Pins("K13"), IOStandard("lvttl")),
    ("nmrq_3v3_n",         0, Pins("J18"), IOStandard("lvttl")),
    ("reset_3v3_n",        0, Pins("G17"), IOStandard("lvttl")),
@@ -113,11 +111,11 @@ _nubus_nubus_v1_0 = [
                                   "D12 D13 D14 C14 B16 B17 D15 C15 "
                                   "B18 A18 C16 C17 E15 E16 F14 F13 "
                                   "D17 D18 E17 E18 F15 F18 F16 G18 "), IOStandard("lvttl")),
-    # ("nubus_arb_n",        0, Pins(""), IOStandard("lvttl")),
+    # ("nubus_arb_n",        0, Pins(""), IOStandard("lvttl")), # CPLD only, we have 'arb'/'grant' instead
    ("id_3v3_n",           0, Pins("U7 V6 V7 U8"), IOStandard("lvttl")),
    ("tm0_3v3_n",          0, Pins("K15"), IOStandard("lvttl")),
    ("tm1_3v3_n",          0, Pins("J17"), IOStandard("lvttl")),
-    # ("nubus_tm2_n",         0, Pins(""), IOStandard("lvttl")),
+    ("tm2_3v3_n",          0, Pins("T4"),  IOStandard("lvttl")),
    
    ("nubus_oe",           0, Pins("G13"), IOStandard("lvttl")),
    ("nubus_ad_dir",       0, Pins("G16"), IOStandard("lvttl")),
@@ -125,7 +123,7 @@ _nubus_nubus_v1_0 = [
    ("grant",              0, Pins("H15"), IOStandard("lvttl")),
    ("arb",                0, Pins("J13"), IOStandard("lvttl")),
    ("fpga_to_cpld_clk",   0, Pins("H14"), IOStandard("lvttl")),
-    ("tmoen",              0, Pins("U6"), IOStandard("lvttl")),
+    ("tmoen",              0, Pins("U6"),  IOStandard("lvttl")),
    ("fpga_to_cpld_signal",0, Pins("J14"), IOStandard("lvttl")),
    ("fpga_to_cpld_signal_2",0, Pins("G14"), IOStandard("lvttl")),
 ]
@@ -0,0 +1,121 @@
+(module TQFP-64_10x10mm_P0.5mm_Xlinx (layer F.Cu) (tedit 5B56F227)
+  (descr "TQFP, 64 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_qfp_generator.py")
+  (tags "TQFP QFP")
+  (attr smd)
+  (fp_text reference U1 (at 0 -7.35) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value XC9572XL-VQ64 (at 0 7.35) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start -4.16 -5.11) (end -5.11 -5.11) (layer F.SilkS) (width 0.12))
+  (fp_line (start -5.11 -5.11) (end -5.11 -4.16) (layer F.SilkS) (width 0.12))
+  (fp_line (start 4.16 -5.11) (end 5.11 -5.11) (layer F.SilkS) (width 0.12))
+  (fp_line (start 5.11 -5.11) (end 5.11 -4.16) (layer F.SilkS) (width 0.12))
+  (fp_line (start -4.16 5.11) (end -5.11 5.11) (layer F.SilkS) (width 0.12))
+  (fp_line (start -5.11 5.11) (end -5.11 4.16) (layer F.SilkS) (width 0.12))
+  (fp_line (start 4.16 5.11) (end 5.11 5.11) (layer F.SilkS) (width 0.12))
+  (fp_line (start 5.11 5.11) (end 5.11 4.16) (layer F.SilkS) (width 0.12))
+  (fp_line (start -5.11 -4.16) (end -6.4 -4.16) (layer F.SilkS) (width 0.12))
+  (fp_line (start -4 -5) (end 5 -5) (layer F.Fab) (width 0.1))
+  (fp_line (start 5 -5) (end 5 5) (layer F.Fab) (width 0.1))
+  (fp_line (start 5 5) (end -5 5) (layer F.Fab) (width 0.1))
+  (fp_line (start -5 5) (end -5 -4) (layer F.Fab) (width 0.1))
+  (fp_line (start -5 -4) (end -4 -5) (layer F.Fab) (width 0.1))
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+  (fp_line (start 5.25 -4.15) (end 6.65 -4.15) (layer F.CrtYd) (width 0.05))
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+  (fp_line (start -4.15 6.65) (end -4.15 5.25) (layer F.CrtYd) (width 0.05))
+  (fp_line (start -4.15 5.25) (end -5.25 5.25) (layer F.CrtYd) (width 0.05))
+  (fp_line (start -5.25 5.25) (end -5.25 4.15) (layer F.CrtYd) (width 0.05))
+  (fp_line (start -5.25 4.15) (end -6.65 4.15) (layer F.CrtYd) (width 0.05))
+  (fp_line (start -6.65 4.15) (end -6.65 0) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 0 6.65) (end 4.15 6.65) (layer F.CrtYd) (width 0.05))
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+  (fp_line (start 4.15 5.25) (end 5.25 5.25) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 5.25 5.25) (end 5.25 4.15) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 5.25 4.15) (end 6.65 4.15) (layer F.CrtYd) (width 0.05))
+  (fp_line (start 6.65 4.15) (end 6.65 0) (layer F.CrtYd) (width 0.05))
+  (fp_text user %R (at 0 0) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad 1 smd roundrect (at -5.7 -3.75) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 2 smd roundrect (at -5.7 -3.25) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 3 smd roundrect (at -5.7 -2.75) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 4 smd roundrect (at -5.7 -2.25) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 5 smd roundrect (at -5.7 -1.75) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
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+  (pad 14 smd roundrect (at -5.7 2.75) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 15 smd roundrect (at -5.7 3.25) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 16 smd roundrect (at -5.7 3.75) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 17 smd roundrect (at -3.75 5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 18 smd roundrect (at -3.25 5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 19 smd roundrect (at -2.75 5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 20 smd roundrect (at -2.25 5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
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+  (pad 24 smd roundrect (at -0.25 5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 25 smd roundrect (at 0.25 5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 26 smd roundrect (at 0.75 5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 27 smd roundrect (at 1.25 5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 28 smd roundrect (at 1.75 5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 29 smd roundrect (at 2.25 5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 30 smd roundrect (at 2.75 5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 31 smd roundrect (at 3.25 5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 32 smd roundrect (at 3.75 5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 33 smd roundrect (at 5.7 3.75) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 34 smd roundrect (at 5.7 3.25) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 35 smd roundrect (at 5.7 2.75) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 36 smd roundrect (at 5.7 2.25) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 37 smd roundrect (at 5.7 1.75) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 38 smd roundrect (at 5.7 1.25) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 39 smd roundrect (at 5.7 0.75) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 40 smd roundrect (at 5.7 0.25) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 41 smd roundrect (at 5.7 -0.25) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 42 smd roundrect (at 5.7 -0.75) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 43 smd roundrect (at 5.7 -1.25) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 44 smd roundrect (at 5.7 -1.75) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 45 smd roundrect (at 5.7 -2.25) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 46 smd roundrect (at 5.7 -2.75) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 47 smd roundrect (at 5.7 -3.25) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 48 smd roundrect (at 5.7 -3.75) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 49 smd roundrect (at 3.75 -5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 50 smd roundrect (at 3.25 -5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 51 smd roundrect (at 2.75 -5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 52 smd roundrect (at 2.25 -5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 53 smd roundrect (at 1.75 -5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 54 smd roundrect (at 1.25 -5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 55 smd roundrect (at 0.75 -5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 56 smd roundrect (at 0.25 -5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 57 smd roundrect (at -0.25 -5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 58 smd roundrect (at -0.75 -5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 59 smd roundrect (at -1.25 -5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 60 smd roundrect (at -1.75 -5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 61 smd roundrect (at -2.25 -5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 62 smd roundrect (at -2.75 -5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 63 smd roundrect (at -3.25 -5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (pad 64 smd roundrect (at -3.75 -5.7) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
+  (model ${KISYS3DMOD}/Package_QFP.3dshapes/TQFP-64_10x10mm_P0.5mm.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz 0 0 0))
+  )
+)
@@ -1,12 +1,12 @@
 G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.0.2+dfsg1-1~bpo9+1*
-G04 #@! TF.CreationDate,2022-01-15T11:36:52+01:00*
+G04 #@! TF.CreationDate,2022-01-29T10:57:36+01:00*
 G04 #@! TF.ProjectId,nubus-to-ztex,6e756275-732d-4746-9f2d-7a7465782e6b,rev?*
 G04 #@! TF.SameCoordinates,Original*
 G04 #@! TF.FileFunction,Copper,L4,Bot*
 G04 #@! TF.FilePolarity,Positive*
 %FSLAX46Y46*%
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-G04 Created by KiCad (PCBNEW 5.0.2+dfsg1-1~bpo9+1) date Sat Jan 15 11:36:52 2022*
+G04 Created by KiCad (PCBNEW 5.0.2+dfsg1-1~bpo9+1) date Sat Jan 29 10:57:36 2022*
 %MOMM*%
 %LPD*%
 G01*
@@ -69,7 +69,7 @@ G04 #@! TA.AperFunction,Conductor*
 %ADD28C,1.500000*%
 G04 #@! TD*
 G04 #@! TA.AperFunction,Conductor*
-%ADD29C,0.600000*%
+%ADD29C,0.500000*%
 G04 #@! TD*
 G04 #@! TA.AperFunction,Conductor*
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@@ -1100,7 +1100,7 @@ D25*
 G04 #@! TO.N,GND*
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+G04 Created by KiCad (PCBNEW 5.0.2+dfsg1-1~bpo9+1) date Sat Jan 29 10:57:36 2022*
 %MOMM*%
 %LPD*%
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@@ -1,12 +1,12 @@
 G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.0.2+dfsg1-1~bpo9+1*
-G04 #@! TF.CreationDate,2022-01-15T11:36:52+01:00*
+G04 #@! TF.CreationDate,2022-01-29T10:57:36+01:00*
 G04 #@! TF.ProjectId,nubus-to-ztex,6e756275-732d-4746-9f2d-7a7465782e6b,rev?*
 G04 #@! TF.SameCoordinates,Original*
 G04 #@! TF.FileFunction,Copper,L2,Inr*
 G04 #@! TF.FilePolarity,Positive*
 %FSLAX46Y46*%
 G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
-G04 Created by KiCad (PCBNEW 5.0.2+dfsg1-1~bpo9+1) date Sat Jan 15 11:36:52 2022*
+G04 Created by KiCad (PCBNEW 5.0.2+dfsg1-1~bpo9+1) date Sat Jan 29 10:57:36 2022*
 %MOMM*%
 %LPD*%
 G01*
@@ -63,19 +63,22 @@ G04 #@! TA.AperFunction,Conductor*
 %ADD26C,0.500000*%
 G04 #@! TD*
 G04 #@! TA.AperFunction,Conductor*
-%ADD27C,1.000000*%
+%ADD27C,1.500000*%
 G04 #@! TD*
 G04 #@! TA.AperFunction,Conductor*
 %ADD28C,0.152400*%
 G04 #@! TD*
 G04 #@! TA.AperFunction,Conductor*
-%ADD29C,0.800000*%
+%ADD29C,1.000000*%
 G04 #@! TD*
 G04 #@! TA.AperFunction,Conductor*
-%ADD30C,0.250000*%
+%ADD30C,0.800000*%
 G04 #@! TD*
 G04 #@! TA.AperFunction,Conductor*
-%ADD31C,0.254000*%
+%ADD31C,0.250000*%
+G04 #@! TD*
+G04 #@! TA.AperFunction,Conductor*
+%ADD32C,0.254000*%
 G04 #@! TD*
 G04 APERTURE END LIST*
 D10*
@@ -814,7 +817,7 @@ D25*
 G04 #@! TO.N,GND*
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 G04 #@! TO.N,+5V*
 X253850000Y-87660000D03*
 X246230000Y-61872500D03*
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 D28*
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 X207500000Y-71000000D01*
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 D28*
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 D28*
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 D28*
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 D26*
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 D28*
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 X116600000Y-69800000D01*
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 X123800000Y-97460000D02*
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 D28*
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 X145400000Y-88100000D01*
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 D28*
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 D28*
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 D28*
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 D28*
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 D28*
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 D27*
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 D28*
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 D28*
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 X267920000Y-46130000D01*
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 X270730000Y-43320000D01*
 G04 #@! TD*
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 G04 #@! TO.N,GND*
 G36*
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 M48
-;DRILL file {KiCad 5.0.2+dfsg1-1~bpo9+1} date Sat Jan 15 11:36:48 2022
+;DRILL file {KiCad 5.0.2+dfsg1-1~bpo9+1} date Sat Jan 29 10:57:31 2022
 ;FORMAT={-:-/ absolute / inch / decimal}
 FMAT,2
 INCH,TZ
@@ -22,12 +22,14 @@ T1
 X4.5354Y-3.4441
 X4.5354Y-3.5209
 X4.5354Y-3.572
+X4.5595Y-3.248
 X4.5787Y-0.4414
 X4.5787Y-0.6471
 X4.6142Y-3.3378
 X4.6261Y-2.0618
 X4.6261Y-2.2571
 X4.6261Y-2.3654
+X4.6575Y-3.1417
 X4.6719Y-1.5551
 X4.6719Y-1.7913
 X4.7717Y-3.3378
@@ -39,10 +41,11 @@ X4.9508Y-2.0608
 X4.9508Y-2.8937
 X4.9606Y-2.2571
 X4.9606Y-2.3654
+X4.9719Y-3.2323
 X5.0039Y-2.7643
 X5.0098Y-2.8263
 X5.0432Y-3.4646
-X5.0787Y-3.1083
+X5.078Y-3.1205
 X5.1141Y-3.4646
 X5.185Y-3.4646
 X5.1929Y-3.128
@@ -65,10 +68,12 @@ X5.4508Y-3.1063
 X5.4843Y-3.4429
 X5.502Y-3.0315
 X5.5162Y-2.5591
+X5.5271Y-3.2953
 X5.5315Y-3.0709
 X5.5335Y-2.9902
 X5.5768Y-0.5651
 X5.6496Y-3.0689
+X5.6609Y-3.3898
 X5.687Y-2.9449
 X5.687Y-2.9843
 X5.687Y-3.0236
@@ -96,6 +101,7 @@ X6.8701Y-2.7953
 X7.0787Y-3.315
 X7.081Y-3.1398
 X7.1358Y-2.9011
+X7.1693Y-3.4291
 X7.187Y-3.1398
 X7.2126Y-3.2638
 X7.2283Y-2.7953
@@ -285,14 +291,14 @@ X7.874Y-3.737
 X7.874Y-3.837
 X7.874Y-3.937
 T7
-X7.9854Y-3.1134
-X8.0854Y-3.1134
 X4.7992Y-0.8189
 X4.7992Y-0.9189
 X4.7992Y-1.0189
 X4.7992Y-1.1189
 X4.7992Y-1.2189
 X4.7992Y-1.3189
+X7.9854Y-3.1134
+X8.0854Y-3.1134
 T8
 X5.1181Y-2.3311
 X5.1181Y-2.4311
@@ -1,4 +1,4 @@
-### Module positions - created on Sat Jan 15 11:37:08 2022 ###
+### Module positions - created on Sat Jan 29 10:58:25 2022 ###
 ### Printed by Pcbnew version kicad 5.0.2+dfsg1-1~bpo9+1
 ## Unit = mm, Angle = deg.
 ## Side : bottom
@@ -1,5 +1,5 @@
 Drill report for /home/dolbeau/MAC/NuBusFPGA/nubus-to-ztex/nubus-to-ztex.kicad_pcb
-Created on Sat Jan 15 11:36:50 2022
+Created on Sat Jan 29 10:57:34 2022

 Copper Layer Stackup:
    =============================================================
@@ -12,7 +12,7 @@ Copper Layer Stackup:
 Drill file 'nubus-to-ztex-PTH.drl' contains
    plated through holes:
    =============================================================
-    T1  0.40mm  0.016"  (133 holes)
+    T1  0.40mm  0.016"  (139 holes)
    T2  0.60mm  0.024"  (2 holes)  (with 2 slots)
    T3  0.80mm  0.031"  (2 holes)
    T4  0.85mm  0.033"  (2 holes)
@@ -25,7 +25,7 @@ Drill file 'nubus-to-ztex-PTH.drl' contains
    T11  1.30mm  0.051"  (4 holes)
    T12  3.05mm  0.120"  (2 holes)

-    Total plated holes count 423
+    Total plated holes count 429


 Drill file 'nubus-to-ztex-NPTH.drl' contains
@@ -1,4 +1,4 @@
-### Module positions - created on Sat Jan 15 11:37:08 2022 ###
+### Module positions - created on Sat Jan 29 10:58:25 2022 ###
 ### Printed by Pcbnew version kicad 5.0.2+dfsg1-1~bpo9+1
 ## Unit = mm, Angle = deg.
 ## Side : top
@@ -95,6 +95,16 @@ R32       75                  R_0603_1608Metric                           252.00
 R33       1M                  R_1210_3225Metric                           246.8200   -14.7700  270.0000  top
 R34       100                 R_0603_1608Metric                           253.9200   -35.1000    0.0000  top
 R35       100                 R_0603_1608Metric                           253.9100   -36.9000    0.0000  top
+R36       10k                 R_0603_1608Metric                           114.4000   -83.7000  180.0000  top
+R37       10k                 R_0603_1608Metric                           120.3000   -79.8000    0.0000  top
+R38       10k                 R_0603_1608Metric                           125.5000   -83.3000  180.0000  top
+R39       10k                 R_0603_1608Metric                           121.4000   -82.7000    0.0000  top
+R40       10k                 R_0603_1608Metric                           182.1000   -85.1000   90.0000  top
+R41       10k                 R_0603_1608Metric                           186.1000   -71.3000  180.0000  top
+R42       10k                 R_0603_1608Metric                           143.0000   -84.9000  180.0000  top
+R43       10k                 R_0603_1608Metric                           144.6000   -83.2000    0.0000  top
+R44       10k                 R_0603_1608Metric                           135.9000   -89.6000   90.0000  top
+R45       10k                 R_0603_1608Metric                           139.6000   -84.9000  180.0000  top
 U1        74LVT125            TSSOP-14_4.4x5mm_P0.65mm                    116.7000   -88.7800    0.0000  top
 U2        74LVT125            TSSOP-14_4.4x5mm_P0.65mm                    184.5000   -78.5000   90.0000  top
 U3        74LVT125            TSSOP-14_4.4x5mm_P0.65mm                    143.7500   -88.7500  180.0000  top
@@ -1,7 +1,7 @@
 Part/Designator,Manufacture Part Number/Seeed SKU,Quantity,URL
 "R34,R35",0603WAF1000T5E,2,https://lcsc.com/product-detail/Chip-Resistor-Surface-Mount_Uniroyal-Elec-0603WAF1000T5E_C22775.html
 R29,0603WAF1001T5E,1,https://lcsc.com/product-detail/Chip-Resistor-Surface-Mount_UNI-ROYAL-Uniroyal-Elec-0603WAF1001T5E_C21190.html
-"R4,R5,R6,R7,R8,R26,R27",0603WAF1002T5E,7,https://lcsc.com/product-detail/Chip-Resistor-Surface-Mount_UNI-ROYAL-Uniroyal-Elec-0603WAF1002T5E_C25804.html
+"R4,R5,R6,R7,R8,R26,R27,R36,R37,R38,R39,R40,R41,R42,R43,R44,R45",0603WAF1002T5E,17,https://lcsc.com/product-detail/Chip-Resistor-Surface-Mount_UNI-ROYAL-Uniroyal-Elec-0603WAF1002T5E_C25804.html
 "R24,R25",0603WAF1502T5E,2,https://lcsc.com/product-detail/Chip-Resistor-Surface-Mount_UNI-ROYAL-Uniroyal-Elec-0603WAF1502T5E_C22809.html
 "R22,R23",0603WAF270JT5E,2,https://lcsc.com/product-detail/Chip-Resistor-Surface-Mount_UNI-ROYAL-Uniroyal-Elec-0603WAF270JT5E_C25190.html
 R28,0603WAF5360T5E,1,https://lcsc.com/product-detail/Chip-Resistor-Surface-Mount_UNI-ROYAL-Uniroyal-Elec-0603WAF5360T5E_C23201.html
@@ -33,7 +33,7 @@ D3,LTST-C170TBKT,1,https://www.lcsc.com/product-detail/Light-Emitting-Diodes-LED
 J8,PM254V-11-02-H85,1,https://www.lcsc.com/product-detail/Pin-Header-Female-Header_XFCN-PM254V-11-02-H85_C541849.html
 FB1,PZ2012U221-2R0TF,1,https://lcsc.com/product-detail/Ferrite-Beads_Sunlord-PZ2012U221-2R0TF_C44361.html
 J3,PZ254R-11-06P,1,https://lcsc.com/product-detail/Pin-Header-Female-Header_XFCN-PZ254R-11-06P_C492414.html
-U10,SN65220DBVR,1,https://lcsc.com/product-detail/TVS_Texas-Instruments-SN65220DBVR_C21787.html
+U10,SN65220DBVT,1,https://www.lcsc.com/product-detail/Others_Texas-Instruments-TI-SN65220DBVT_C350555.html
 U9,TPD12S016PWR,1,https://lcsc.com/product-detail/Interface-Specialized_Texas-Instruments-TPD12S016PWR_C201665.html
 U11,TPS2051CDBVR,1,https://lcsc.com/product-detail/Power-Distribution-Switches_Texas-Instruments-TPS2051CDBVR_C129581.html
 U4,XC9572XL-5VQ64C,1,https://eu.mouser.com/ProductDetail/Xilinx/XC9572XL-5VQ64C?qs=rrS6PyfT74eW60XLpVlI8A%3D%3D
@@ -3,7 +3,7 @@ P  UNITS CUST 0
 P  DIM   N
 317GND              VIA        MD0157PA00X+054134Y-035162X0315Y0000R000S3
 317GND              VIA        MD0157PA00X+100874Y-024360X0315Y0000R000S3
-317GND              VIA        MD0157PA00X+050787Y-031083X0315Y0000R000S3
+317GND              VIA        MD0157PA00X+050780Y-031205X0315Y0000R000S3
 317GND              VIA        MD0157PA00X+096949Y-008760X0315Y0000R000S3
 317GND              VIA        MD0157PA00X+099567Y-032571X0315Y0000R000S3
 317GND              VIA        MD0157PA00X+100787Y-012402X0315Y0000R000S3
@@ -84,6 +84,12 @@ P  DIM   N
 317+3V3             VIA        MD0157PA00X+047717Y-033378X0315Y0000R000S3
 317+3V3             VIA        MD0157PA00X+071358Y-029011X0315Y0000R000S3
 317+3V3             VIA        MD0157PA00X+045787Y-004414X0315Y0000R000S3
+317+3V3             VIA        MD0157PA00X+071693Y-034291X0315Y0000R000S3
+317+3V3             VIA        MD0157PA00X+046575Y-031417X0315Y0000R000S3
+317+3V3             VIA        MD0157PA00X+045595Y-032480X0315Y0000R000S3
+317+3V3             VIA        MD0157PA00X+049719Y-032323X0315Y0000R000S3
+317+3V3             VIA        MD0157PA00X+056609Y-033898X0315Y0000R000S3
+317+3V3             VIA        MD0157PA00X+055271Y-032953X0315Y0000R000S3
 317+5V              VIA        MD0157PA00X+099941Y-034512X0315Y0000R000S3
 317+5V              VIA        MD0157PA00X+096941Y-024359X0315Y0000R000S3
 317+5V              VIA        MD0157PA00X+051850Y-034646X0315Y0000R000S3
@@ -134,6 +140,26 @@ P  DIM   N
 317TM2_OE_N         VIA        MD0157PA00X+053654Y-031638X0315Y0000R000S3
 317TM2_OE_N         VIA        MD0157PA00X+072717Y-029055X0315Y0000R000S3
 317TM2_OE_N         VIA        MD0157PA00X+058425Y-028504X0315Y0000R000S3
+327~NMRQ_3V3        R36   -2          A01X+044729Y-032953X0344Y0374R180S2
+327+3V3             R36   -1          A01X+045349Y-032953X0344Y0374R180S2
+327+3V3             R37   -1          A01X+047052Y-031417X0344Y0374R000S2
+327RQST_O_N         R37   -2          A01X+047672Y-031417X0344Y0374R000S2
+327START_OE_N       R38   -2          A01X+049099Y-032795X0344Y0374R180S2
+327+3V3             R38   -1          A01X+049719Y-032795X0344Y0374R180S2
+327+3V3             R39   -1          A01X+047485Y-032559X0344Y0374R000S2
+327ACK_OE_N         R39   -2          A01X+048105Y-032559X0344Y0374R000S2
+327TMX_OE_N         R40   -2          A01X+071693Y-033194X0344Y0374R270S2
+327+3V3             R40   -1          A01X+071693Y-033814X0344Y0374R270S2
+327+3V3             R41   -1          A01X+073578Y-028071X0344Y0374R180S2
+327TM2_OE_N         R41   -2          A01X+072958Y-028071X0344Y0374R180S2
+327ARB0_O_N         R42   -2          A01X+055989Y-033425X0344Y0374R180S2
+327+3V3             R42   -1          A01X+056609Y-033425X0344Y0374R180S2
+327+3V3             R43   -1          A01X+056619Y-032756X0344Y0374R000S2
+327ARB1_O_N         R43   -2          A01X+057239Y-032756X0344Y0374R000S2
+327ARB2_O_N         R44   -2          A01X+053504Y-034966X0344Y0374R270S2
+327+3V3             R44   -1          A01X+053504Y-035586X0344Y0374R270S2
+327+3V3             R45   -1          A01X+055271Y-033425X0344Y0374R180S2
+327ARB3_O_N         R45   -2          A01X+054651Y-033425X0344Y0374R180S2
 327+5V              C3    -1          A01X+051324Y-022087X0384Y0551R000S2
 327GND              C3    -2          A01X+052062Y-022087X0384Y0551R000S2
 327GND              D3    -1          A01X+045197Y-006471X0384Y0551R270S2
@@ -1,4 +1,4 @@
-## Footprint report - date Sat Jan 15 11:37:13 2022
+## Footprint report - date Sat Jan 29 10:58:30 2022
 ## Created by Pcbnew version kicad 5.0.2+dfsg1-1~bpo9+1
 ## Unit = mm, Angle = deg.

@@ -9,6 +9,216 @@ upper_left_corner -50.005001 -35.064286
 lower_right_corner 400.005001 148.435001
 $EndBOARD

+$MODULE "R36"
+reference "R36"
+value "10k"
+footprint "Resistor_SMD:R_0603_1608Metric"
+attribut smd
+position 114.400000 83.700000  orientation 180.00
+layer front
+$PAD "2"
+Shape Roundrect Layer front
+position  0.787500  0.000000  size  0.875000  0.950000  orientation 0.00
+drill  0.000000
+shape_offset  0.000000  0.000000
+$EndPAD
+$PAD "1"
+Shape Roundrect Layer front
+position -0.787500  0.000000  size  0.875000  0.950000  orientation 0.00
+drill  0.000000
+shape_offset  0.000000  0.000000
+$EndPAD
+$EndMODULE  R36
+
+$MODULE "R37"
+reference "R37"
+value "10k"
+footprint "Resistor_SMD:R_0603_1608Metric"
+attribut smd
+position 120.300000 79.800000  orientation 0.00
+layer front
+$PAD "1"
+Shape Roundrect Layer front
+position -0.787500  0.000000  size  0.875000  0.950000  orientation 0.00
+drill  0.000000
+shape_offset  0.000000  0.000000
+$EndPAD
+$PAD "2"
+Shape Roundrect Layer front
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+drill  0.000000
+shape_offset  0.000000  0.000000
+$EndPAD
+$EndMODULE  R37
+
+$MODULE "R38"
+reference "R38"
+value "10k"
+footprint "Resistor_SMD:R_0603_1608Metric"
+attribut smd
+position 125.500000 83.300000  orientation 180.00
+layer front
+$PAD "2"
+Shape Roundrect Layer front
+position  0.787500  0.000000  size  0.875000  0.950000  orientation 0.00
+drill  0.000000
+shape_offset  0.000000  0.000000
+$EndPAD
+$PAD "1"
+Shape Roundrect Layer front
+position -0.787500  0.000000  size  0.875000  0.950000  orientation 0.00
+drill  0.000000
+shape_offset  0.000000  0.000000
+$EndPAD
+$EndMODULE  R38
+
+$MODULE "R39"
+reference "R39"
+value "10k"
+footprint "Resistor_SMD:R_0603_1608Metric"
+attribut smd
+position 121.400000 82.700000  orientation 0.00
+layer front
+$PAD "1"
+Shape Roundrect Layer front
+position -0.787500  0.000000  size  0.875000  0.950000  orientation 0.00
+drill  0.000000
+shape_offset  0.000000  0.000000
+$EndPAD
+$PAD "2"
+Shape Roundrect Layer front
+position  0.787500  0.000000  size  0.875000  0.950000  orientation 0.00
+drill  0.000000
+shape_offset  0.000000  0.000000
+$EndPAD
+$EndMODULE  R39
+
+$MODULE "R40"
+reference "R40"
+value "10k"
+footprint "Resistor_SMD:R_0603_1608Metric"
+attribut smd
+position 182.100000 85.100000  orientation 90.00
+layer front
+$PAD "2"
+Shape Roundrect Layer front
+position  0.787500  0.000000  size  0.875000  0.950000  orientation 0.00
+drill  0.000000
+shape_offset  0.000000  0.000000
+$EndPAD
+$PAD "1"
+Shape Roundrect Layer front
+position -0.787500  0.000000  size  0.875000  0.950000  orientation 0.00
+drill  0.000000
+shape_offset  0.000000  0.000000
+$EndPAD
+$EndMODULE  R40
+
+$MODULE "R41"
+reference "R41"
+value "10k"
+footprint "Resistor_SMD:R_0603_1608Metric"
+attribut smd
+position 186.100000 71.300000  orientation 180.00
+layer front
+$PAD "1"
+Shape Roundrect Layer front
+position -0.787500  0.000000  size  0.875000  0.950000  orientation 0.00
+drill  0.000000
+shape_offset  0.000000  0.000000
+$EndPAD
+$PAD "2"
+Shape Roundrect Layer front
+position  0.787500  0.000000  size  0.875000  0.950000  orientation 0.00
+drill  0.000000
+shape_offset  0.000000  0.000000
+$EndPAD
+$EndMODULE  R41
+
+$MODULE "R42"
+reference "R42"
+value "10k"
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+drill  0.000000
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+$EndPAD
+$EndMODULE  R42
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+$EndPAD
+$EndMODULE  R43
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+drill  0.000000
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+$EndPAD
+$EndMODULE  R44
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+$EndPAD
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+drill  0.000000
+shape_offset  0.000000  0.000000
+$EndPAD
+$EndMODULE  R45
+
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 reference "C3"
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 $Comp
 L Device:R R?
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 AR Path="/618F532C/5F93CF72" Ref="R4"  Part="1" 
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@@ -903,7 +901,7 @@ F 11 "https://lcsc.com/product-detail/Multilayer-Ceramic-Capacitors-MLCC-SMD-SMT
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 Wire Wire Line
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 Text GLabel 3950 11050 2    50   Input ~ 0
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+$Comp
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+F 0 "R42" V 7530 5550 50  0000 C CNN
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+AR Path="/618F532C/621DAD00" Ref="R44"  Part="1" 
+F 0 "R44" V 7530 5850 50  0000 C CNN
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+L power:+3.3V #PWR0141
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+	1    7600 6000
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+$Comp
+L Device:R R?
+U 1 1 621DDFFF
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+AR Path="/5F6B165A/621DDFFF" Ref="R?"  Part="1" 
+AR Path="/5F679B53/621DDFFF" Ref="R?"  Part="1" 
+AR Path="/618F532C/621DDFFF" Ref="R45"  Part="1" 
+F 0 "R45" V 7530 6000 50  0000 C CNN
+F 1 "10k" V 7450 6000 50  0000 C CNN
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+F 3 "" H 7450 6000 50  0000 C CNN
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+	1    7450 6000
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+Text Notes 6700 4500 0    50   ~ 0
+Pull-ups on OE signals for drivers
+Wire Notes Line
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 $EndSCHEMATC
@@ -151,9 +151,10 @@ F 0 "U10" V 4296 2937 50  0000 L CNN
 F 1 "SN65220" V 4205 2937 50  0000 L CNN
 F 2 "Package_TO_SOT_SMD:SOT-23-6" H 4600 2700 50  0001 L CNN
 F 3 "http://www.ti.com/lit/ds/symlink/sn65220.pdf" H 4250 3000 50  0001 C CNN
-F 4 "SN65220DBVR" V 4250 2850 50  0001 C CNN "MPN"
+F 4 "SN65220DBVT" V 4250 2850 50  0001 C CNN "MPN"
 F 5 "https://www2.mouser.com/ProductDetail/Texas-Instruments/SN65220DBVR?qs=5nGYs9Do7G0gEpYxbYqyeA%3D%3D" V 4250 2850 50  0001 C CNN "URL-ALT"
-F 6 "https://lcsc.com/product-detail/TVS_Texas-Instruments-SN65220DBVR_C21787.html" V 4250 2850 50  0001 C CNN "URL"
+F 6 "https://www.lcsc.com/product-detail/Others_Texas-Instruments-TI-SN65220DBVT_C350555.html" V 4250 2850 50  0001 C CNN "URL"
+F 7 "SN65220DBVT or SN65220DBVR (Tape or Reel...)" V 4250 2850 50  0001 C CNN "Notes"
 	1    4250 2850
 	0    1    -1   0   
 $EndComp