mirror of
https://github.com/rdolbeau/NuBusFPGA.git
synced 2024-12-10 23:51:57 +00:00
update, including support for ROM-in-builtin-flash
This commit is contained in:
Romain Dolbeau
parent
b90dfb229e
commit
d9535db3be
3
.gitmodules
vendored
3
.gitmodules
vendored
@ -5,9 +5,6 @@
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[submodule "nubus-to-ztex-gateware/VintageBusFPGA_Common"]
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path = nubus-to-ztex-gateware/VintageBusFPGA_Common
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url = git@github.com:rdolbeau/VintageBusFPGA_Common.git
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[submodule "nubus-to-ztex-gateware/DeclROM/ns816-declrom"]
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path = nubus-to-ztex-gateware/DeclROM/ns816-declrom
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url = https://github.com/jaoswald/ns816-declrom
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[submodule "nubus-to-ztex-gateware/hdl-util_hdmi"]
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path = nubus-to-ztex-gateware/hdl-util_hdmi
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url = https://github.com/hdl-util/hdmi
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@ -22,7 +22,9 @@ Directory 'nubus-to-ztex'
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The (now obsolete) V1.0 custom board is a NuBus-compliant (I hope...) board, designed to receive a [ZTex USB-FPGA Module 2.13](https://www.ztex.de/usb-fpga-2/usb-fpga-2.13.e.html) as a daughterboard. The ZTex module contains the actual FPGA (Artix-7), some RAM, programming hardware, etc. The NuBus board contains level-shifters & drivers ICs to interface between the NuBus signals and the FPGA, a CPLD handling some level-shifting & the bus mastering arbitration, a serial header, two user Leds, 14 debug Leds tied to specific NuBus or CPLD/FPGA signals, a JTAG header, a USB micro-B connector, a VGA chip & connector, and a HDMI chip & connector. It supports every NuBus feature except the optional parity (i.e. it can do both slave and master modes). The V1.0 board is in commit 3f3371a. The CPLD solution works but is annoying as it requires older Xilinx software (ISE 14.7) and dedicated JTAG programmer to use.
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The current board is V1.2. It drops the CPLD and VGA port. Bus arbitration is now done inside the FPGA. It gains a micro-sd slot, and a custom expansion connector that is based (and compatible with, with more signals) PMod. It supports the same accelerated HDMI framebuffer and RAM Disk. Optionally, The Declaration Rom can be stored in a Flash NOR chip connected ot the PMOd expansion connector (easier for working on embedded driver in the DeclRom).
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The current board is V1.2. It drops the CPLD and VGA port. Bus arbitration is now done inside the FPGA. It gains a micro-sd slot, and a custom expansion connector that is based (and compatible with, with more signals) PMod. It supports the same accelerated HDMI framebuffer and RAM Disk. Optionally, The Declaration Rom can be stored in a Flash NOR chip connected ot the PMOd expansion connector (easier for working on embedded driver in the DeclRom). The ROM can alternately be stored in a sector of the config flash from the ZTex board.
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The new (July 2023) [ZTex USB-FPGA Module 2.12](https://www.ztex.de/usb-fpga-2/usb-fpga-2.12.e.html) should be compatible with all *FPGA, but has not yet been tested.
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The PCBs were designed with Kicad 5.1
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1
nubus-to-ztex-gateware/.gitignore
vendored
1
nubus-to-ztex-gateware/.gitignore
vendored
@ -11,3 +11,4 @@ blit.raw
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blit.s
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*.patch
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OLD
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nubusfpga_csr_*.h
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11
nubus-to-ztex-gateware/DeclROM/.gitignore
vendored
11
nubus-to-ztex-gateware/DeclROM/.gitignore
vendored
@ -1,11 +0,0 @@
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vid_decl_rom.bin
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vid_decl_rom.dir
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vid_decl_rom.l
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vid_decl_rom.o
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vid_decl_rom.raw
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vid_decl_rom.srec
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*.bin
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VidRom*
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NuBusFPGADrvr*.s
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NuBusFPGARAMDskDrvr*.s
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*.o
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@ -1,56 +0,0 @@
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.include "res.inc"
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NuBusFPGAID = 0xC0
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defMinorBase = 0 /* beginning */
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defMinorLength = 0x800000 /* 8192 KiB */
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Pages8s = 1
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Pages4s = 1
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Pages2s = 1
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Pages1s = 1
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Pages15s = 1
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Pages24s = 1
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defmBounds_Ls = 0
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defmBounds_Ts = 0
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defmBounds_Rs = HRES
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defmBounds_Bs = VRES
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defScrnRow = HRES
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/* row bytes */
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RB8s = HRES
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RB4s = HRES/2
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RB2s = HRES/4
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RB1s = HRES/8
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RB15s = HRES*2
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RB24s = HRES*4
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DrHwNuBusFPGA = 0xBEEF /* placeholder for GoboFB */
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DrHwNuBusFPGADsk = 0xBEEE /* placeholder for RAM Dsk */
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DrHwNuBusFPGAAudio = 0xBEED /* placeholder for Audio */
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DrHwNuBusFPGASDCard = 0xBEEC /* placeholder for SD Card */
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typeDrive = 0x1000 /* placeholder for RAM Dsk*/
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typeAudio = 0x1001 /* placeholder for Audio*/
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defmBaseOffset = 0 /* beginning, placeholder */
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devVersion = 0 /* placeholder */
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defmHRes = 0x480000 /* Horizontal Pixels/inch */
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defmVRes = 0x480000 /* Vertical pixels/inch */
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clutType = 0
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directType = 2
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defmPlaneBytes = 0 /* Offset from one plane to the next. */
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SGammaResID = 0
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ChunkyIndexed = 0
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ChunkyDirect = 16
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defVersion = 0 /* Version = 0 */
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@ -1,74 +0,0 @@
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AS=/home/dolbeau/Retro68/build/toolchain/bin/m68k-apple-macos-as
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CC=/home/dolbeau/Retro68/build/toolchain/bin/m68k-apple-macos-gcc
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LD=/home/dolbeau/Retro68/build/toolchain/bin/m68k-apple-macos-ld
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STRIP=/home/dolbeau/Retro68/build/toolchain/bin/m68k-apple-macos-strip
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OBJCOPY=/home/dolbeau/Retro68/build/toolchain/bin/m68k-apple-macos-objcopy
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HOSTCC=gcc
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HOSTCFLAGS=-O2
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ARCHFLAGS=-march=68020 -mcpu=68020
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CFLAGS=-O2 -mpcrel
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NS816DECLROMDIR=./ns816-declrom
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NUBUS_CHECKSUM=${NS816DECLROMDIR}/nubus_checksum
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PROCESS_ROM=${NS816DECLROMDIR}/process_rom
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APPLEINCS=${NS816DECLROMDIR}/atrap.inc ${NS816DECLROMDIR}/declrom.inc ${NS816DECLROMDIR}/globals.inc
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HRES=1920
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VRES=1080
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QEMU=no
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ifeq ($(QEMU),yes)
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CFLAGS+=-DQEMU
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endif
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CSRC_VIDEO=NuBusFPGADrvr_OpenClose.c NuBusFPGADrvr_Ctrl.c NuBusFPGADrvr_Status.c NuBusFPGAPrimaryInit_Primary.c NuBusFPGAPrimaryInit_RamInit.c NuBusFPGASecondaryInit_Secondary.c
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CSRC_RAMDSK=NuBusFPGARAMDskDrvr_OpenClose.c NuBusFPGARAMDskDrvr_Ctrl.c NuBusFPGARAMDskDrvr_Prime.c NuBusFPGARAMDskDrvr_Status.c myrle.c
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CSRC_SDCARD=NuBusFPGASDCardDrvr_OpenClose.c NuBusFPGASDCardDrvr_Ctrl.c NuBusFPGASDCardDrvr_Prime.c NuBusFPGASDCardDrvr_Status.c
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CSRC=${CSRC_VIDEO} ${CSRC_RAMDSK} ${CSRC_SDCARD}
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CSRC_ASM=${CSRC:.c=.s}
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GEN_ASM=VidRomDef.s VidRomDir.s VidRomName.s VidRomRes.s VidRomRsrcDir.s
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all: vid_decl_rom.bin
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gen_mode: gen_mode.c
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$(HOSTCC) -Wall ${HOSTCFLAGS} $^ -o $@
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${GEN_ASM}: gen_mode
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./gen_mode ${HRES} ${VRES}
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$(NUBUS_CHECKSUM): ${NS816DECLROMDIR}/nubus_checksum.cc ${NS816DECLROMDIR}/nubus_crc.cc
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g++ -std=c++11 $^ -lglog -lgflags -labsl_strings -o $@
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vid_decl_rom.o: vid_decl_rom.s NuBusFPGADrvr.s NuBusFPGARAMDskDrvr.s ${APPLEINCS} DepVideo.inc ${GEN_ASM}
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rm -f res.inc
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echo -e "HRES=${HRES}\nVRES=${VRES}\n" | tee res.inc
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${AS} ${ARCHFLAGS} -I${NS816DECLROMDIR} $< -o $@ -a > vid_decl_rom.l
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myrle.o: myrle.c
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${CC} ${ARCHFLAGS} ${CFLAGS} $< -c -o $@ -DSKIP_MAIN
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dump_cpr.s: dump_cpr.c
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${CC} ${ARCHFLAGS} ${CFLAGS} $< -S -o $@ -DSKIP_MAIN
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sed -i -e 's/^\([^a-zA-Z0-9_]*\.globl.*\)/# --- \1/' $@
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sed -i -e 's/\.\(L[0-9][0-9]*\)/.dump_cpr_\1/g' $@
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%.o: %.c NuBusFPGADrvr.h
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${CC} ${CFLAGS} $< -c -o $@ -DHRES=${HRES} -DVRES=${VRES}
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vid_decl_rom.elf: linker.ld vid_decl_rom.o ${CSRC:.c=.o} # linker script must be first
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${LD} -o $@ -T $^
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vid_decl_rom.raw: vid_decl_rom.elf
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${OBJCOPY} $^ $@ --input-target=elf32-m68k --output-target=binary
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vid_decl_rom.bin: vid_decl_rom.raw $(NUBUS_CHECKSUM)
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${NUBUS_CHECKSUM} --input_file $< --output_file $@ --output_size 32768
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dd if=dump.cpr of=vid_decl_rom.bin bs=1 conv=notrunc
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clean:
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rm -f res.inc ${CSRC_ASM} *.o vid_decl_rom.srec vid_decl_rom.raw vid_decl_rom.dir vid_decl_rom.l VidRom*.s
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append_romdir: append_romdir.c
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${HOSTCC} $< -o $@
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@ -1,157 +0,0 @@
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#ifndef __NUBUSFPGADRVR_H__
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#define __NUBUSFPGADRVR_H__
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#include <Files.h>
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#include <Devices.h>
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#include <Slots.h>
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#include <MacErrors.h>
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#include <MacMemory.h>
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#include <Video.h>
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#define GOBOFB_BASE 0x00900000
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#define GOBOFB_ACCEL 0x00901000
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#define GOBOFB_ACCEL_LE 0x00901800
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//#define GOBOFB_REG_BASE 0x00900000
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//#define GOBOFB_MEM_BASE 0x00000000 /* remapped to 0x8f800000 by HW */
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#define GOBOFB_MODE 0x0
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#define GOBOFB_VBL_MASK 0x4
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#define GOBOFB_VIDEOCTRL 0x8
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#define GOBOFB_INTR_CLEAR 0xc
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#define GOBOFB_RESET 0x10
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#define GOBOFB_LUT_ADDR 0x14
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#define GOBOFB_LUT 0x18
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#define GOBOFB_DEBUG 0x1c
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//#define GOBOFB_CURSOR_LUT 0x20
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//#define GOBOFB_CURSOR_XY 0x24
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#define GOBOFB_HRES 0x40
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#define GOBOFB_VRES 0x44
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#define GOBOFB_HRES_START 0x48
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#define GOBOFB_VRES_START 0x4C
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#define GOBOFB_HRES_END 0x50
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#define GOBOFB_VRES_END 0x54
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//#define GOBOFB_MASK_BASE 0x80
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//#define GOBOFB_BITS_BASE 0x100
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#define GOBOFB_INTR_VBL 0x1
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// for GOBOFB_MODE
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#define GOBOFB_MODE_1BIT 0x0
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#define GOBOFB_MODE_2BIT 0x1
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#define GOBOFB_MODE_4BIT 0x2
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#define GOBOFB_MODE_8BIT 0x3
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#define GOBOFB_MODE_24BIT 0x10
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#define GOBOFB_MODE_15BIT 0x11
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#define u_int32_t volatile unsigned long
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struct goblin_accel_regs {
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u_int32_t reg_status; // 0
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u_int32_t reg_cmd;
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u_int32_t reg_r5_cmd;
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u_int32_t resv0;
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u_int32_t reg_width; // 4
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u_int32_t reg_height;
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u_int32_t reg_fgcolor;
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u_int32_t resv2;
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u_int32_t reg_bitblt_src_x; // 8
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u_int32_t reg_bitblt_src_y;
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u_int32_t reg_bitblt_dst_x;
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u_int32_t reg_bitblt_dst_y;
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u_int32_t reg_src_stride; // 12
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u_int32_t reg_dst_stride;
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u_int32_t reg_src_ptr; // 14
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u_int32_t reg_dst_ptr;
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};
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// status
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#define WORK_IN_PROGRESS_BIT 0
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// cmd
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#define DO_BLIT_BIT 0 // hardwired in goblin_accel.py
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#define DO_FILL_BIT 1 // hardwired in goblin_accel.py
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#define DO_TEST_BIT 3 // hardwired in goblin_accel.py
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struct MyGammaTbl {
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short gVersion; /*gamma version number*/
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short gType; /*gamma data type*/
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short gFormulaSize; /*Formula data size*/
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short gChanCnt; /*number of channels of data*/
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short gDataCnt; /*number of values/channel*/
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short gDataWidth; /*bits/corrected value (data packed to next larger byte size)*/
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char gFormulaData[3][256]; /*data for formulas followed by gamma values*/
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};
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#define nativeVidMode ((unsigned char)0x80)
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/* alternate resolution in 0x81...0x8f */
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#define diskResource ((unsigned char)0x90)
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struct NuBusFPGADriverGlobals {
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AuxDCEPtr dce; // unused
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SlotIntQElement *siqel;
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//unsigned char shadowClut[768];
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unsigned short hres[16]; /* HW max in 0 */
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unsigned short vres[16]; /* HW max in 0 */
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unsigned short curPage;
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unsigned char maxMode;
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unsigned char curMode; /* mode ; this is resolution (which can't be changed in 7.1 except via reboot ?) */
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unsigned char curDepth; /* depth */
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char gray;
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char irqen;
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char slot;
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struct MyGammaTbl gamma;
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};
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typedef struct NuBusFPGADriverGlobals NuBusFPGADriverGlobals;
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typedef struct NuBusFPGADriverGlobals *NuBusFPGADriverGlobalsPtr;
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typedef struct NuBusFPGADriverGlobals **NuBusFPGADriverGlobalsHdl;
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typedef struct NuBusFPGAPramRecord { /* slot parameter RAM record, derived from SPRAMRecord */
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short boardID; /* Apple-defined card ID */
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char vendorUse1; /* reserved for vendor use */ /* DCDMF3 p210 says reserved for system ... */
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unsigned char mode; /* vendorUse2 */
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unsigned char depth; /* vendorUse3 */
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unsigned char page; /* vendorUse4 */
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char vendorUse5; /* reserved for vendor use */
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char vendorUse6; /* reserved for vendor use */
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} NuBusFPGAPramRecord;
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typedef struct NuBusFPGAPramRecord *NuBusFPGAPramRecordPtr;
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static inline void write_reg(AuxDCEPtr dce, unsigned int reg, unsigned int val) {
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*((volatile unsigned int*)(dce->dCtlDevBase+GOBOFB_BASE+reg)) = val;
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}
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static inline unsigned int read_reg(AuxDCEPtr dce, unsigned int reg) {
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return *((volatile unsigned int*)(dce->dCtlDevBase+GOBOFB_BASE+reg));;
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}
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/* ASM */
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extern SlotIntServiceProcPtr interruptRoutine;
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/* ctrl */
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void linearGamma(NuBusFPGADriverGlobalsPtr dStore) __attribute__ ((section (".text.fbdriver")));
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OSErr changeIRQ(AuxDCEPtr dce, char en, OSErr err) __attribute__ ((section (".text.fbdriver")));
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OSErr cNuBusFPGACtl(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) __attribute__ ((section (".text.fbdriver")));
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OSErr reconfHW(AuxDCEPtr dce, unsigned char mode, unsigned char depth, unsigned short page) __attribute__ ((section (".text.fbdriver")));
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OSErr updatePRAM(AuxDCEPtr dce, unsigned char mode, unsigned char depth, unsigned short page) __attribute__ ((section (".text.fbdriver")));
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/* status */
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OSErr cNuBusFPGAStatus(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) __attribute__ ((section (".text.fbdriver")));
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/* open close */
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OSErr cNuBusFPGAOpen(IOParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) __attribute__ ((section (".text.fbdriver")));
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OSErr cNuBusFPGAClose(IOParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) __attribute__ ((section (".text.fbdriver")));
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/* primary init */
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||||
UInt32 Primary(SEBlock* block) __attribute__ ((section (".text.primary")));
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||||
int sdram_init(uint32_t a32) __attribute__ ((section (".text.primary")));
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||||
/* secondary init */
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||||
UInt32 Secondary(SEBlock* seblock) __attribute__ ((section (".text.secondary")));
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||||
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||||
#define Check32QDTrap 0xAB03
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||||
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||||
#if 0
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||||
static inline UInt32 revb(UInt32 d) {
|
||||
return ((d&0xFFul)<<24) | ((d&0xFF00ul)<<8) | ((d&0xFF0000ul)>>8) | ((d&0xFF000000ul)>>24);
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||||
}
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||||
#else
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||||
#define revb(a) __builtin_bswap32(a)
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||||
#endif
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||||
#endif
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@ -1,23 +0,0 @@
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NuBusFPGADrvr:
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.word 0x4c00 /* 0x4c00: ctl, status, needsLock [Devices.a] */
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||||
.word 0
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||||
.word 0
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||||
.word 0
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||||
/* Entry point offset table */
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||||
/* we can directly call the C version if it has the right calling convention */
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.word cNuBusFPGAOpen-NuBusFPGADrvr /* open routine */
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.word NuBusFPGADrvr-NuBusFPGADrvr /* no prime */
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.word cNuBusFPGACtl-NuBusFPGADrvr /* control */
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.word cNuBusFPGAStatus-NuBusFPGADrvr /* status */
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.word cNuBusFPGAClose-NuBusFPGADrvr /* close */
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_NuBusFPGATitle:
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.byte _NuBusFPGATitle_StringEnd-.-1 /* pascal string length */
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.ascii ".NuBusFPGA_Drvr"
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||||
_NuBusFPGATitle_StringEnd:
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||||
.word 0 /* version number */
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||||
|
||||
/* for entry points: */
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||||
/* A0 pointer to driver parameter block */
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||||
/* A1 pointer to driver device control entry */
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||||
ALIGN 2
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||||
@ -1,513 +0,0 @@
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#include "NuBusFPGADrvr.h"
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||||
void linearGamma(NuBusFPGADriverGlobalsPtr dStore) {
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||||
int i;
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||||
dStore->gamma.gVersion = 0;
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||||
dStore->gamma.gType = 0;
|
||||
dStore->gamma.gFormulaSize = 0;
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||||
dStore->gamma.gChanCnt = 3;
|
||||
dStore->gamma.gDataCnt = 256;
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||||
dStore->gamma.gDataWidth = 8;
|
||||
for (i = 0 ; i < 256 ; i++) {
|
||||
dStore->gamma.gFormulaData[0][i] = i;
|
||||
dStore->gamma.gFormulaData[1][i] = i;
|
||||
dStore->gamma.gFormulaData[2][i] = i;
|
||||
}
|
||||
}
|
||||
|
||||
OSErr changeIRQ(AuxDCEPtr dce, char en, OSErr err) {
|
||||
NuBusFPGADriverGlobalsHdl dStoreHdl = (NuBusFPGADriverGlobalsHdl)dce->dCtlStorage;
|
||||
NuBusFPGADriverGlobalsPtr dStore = *dStoreHdl;
|
||||
char busMode = 1;
|
||||
if (en != dStore->irqen) {
|
||||
/* write_reg(dce, GOBOFB_DEBUG, 0xBEEF0005); */
|
||||
/* write_reg(dce, GOBOFB_DEBUG, en); */
|
||||
|
||||
if (en) {
|
||||
if (SIntInstall(dStore->siqel, dce->dCtlSlot)) {
|
||||
return err;
|
||||
}
|
||||
write_reg(dce, GOBOFB_DEBUG, 0x88888888);
|
||||
write_reg(dce, GOBOFB_DEBUG, dStore->siqel);
|
||||
write_reg(dce, GOBOFB_DEBUG, dStore->siqel->sqLink);
|
||||
} else {
|
||||
if (SIntRemove(dStore->siqel, dce->dCtlSlot)) {
|
||||
return err;
|
||||
}
|
||||
}
|
||||
|
||||
SwapMMUMode ( &busMode );
|
||||
write_reg(dce, GOBOFB_VBL_MASK, en ? GOBOFB_INTR_VBL : 0);
|
||||
SwapMMUMode ( &busMode );
|
||||
dStore->irqen = en;
|
||||
}
|
||||
return noErr;
|
||||
}
|
||||
|
||||
/*
|
||||
7.1.1:
|
||||
11 Debug: 0x00000003
|
||||
2 Debug: 0x00000004
|
||||
1 Debug: 0x00000005
|
||||
4 Debug: 0x00000006
|
||||
1 <EFBFBD>Debug: 0x00000002
|
||||
|
||||
7.5.3:
|
||||
4 Debug: 0x00000002
|
||||
12 Debug: 0x00000003
|
||||
3 Debug: 0x00000004
|
||||
5 Debug: 0x00000005
|
||||
5 Debug: 0x00000006
|
||||
5 Debug: 0x00000009
|
||||
4 Debug: 0x0000000a
|
||||
5 Debug: 0x00000010
|
||||
1 <EFBFBD>Debug: 0x00000002
|
||||
|
||||
8.1:
|
||||
5 Debug: 0x00000002
|
||||
9 Debug: 0x00000003
|
||||
1 Debug: 0x00000004
|
||||
6 Debug: 0x00000005
|
||||
6 Debug: 0x00000006
|
||||
4 Debug: 0x00000009
|
||||
5 Debug: 0x0000000a
|
||||
4 Debug: 0x00000010
|
||||
1 <EFBFBD>Debug: 0x00000002
|
||||
*/
|
||||
|
||||
#pragma parameter __D0 cNuBusFPGACtl(__A0, __A1)
|
||||
OSErr cNuBusFPGACtl(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce)
|
||||
{
|
||||
NuBusFPGADriverGlobalsHdl dStoreHdl = (NuBusFPGADriverGlobalsHdl)dce->dCtlStorage;
|
||||
NuBusFPGADriverGlobalsPtr dStore = *dStoreHdl;
|
||||
|
||||
short ret = -1;
|
||||
char busMode = 1;
|
||||
|
||||
/* write_reg(dce, GOBOFB_DEBUG, 0xBEEF0001); */
|
||||
/* write_reg(dce, GOBOFB_DEBUG, pb->csCode); */
|
||||
|
||||
switch (pb->csCode)
|
||||
{
|
||||
case -1:
|
||||
asm volatile(".word 0xfe16\n");
|
||||
break;
|
||||
case cscReset: /* 0x0 */
|
||||
{
|
||||
VDPageInfo *vPInfo = (VDPageInfo *)*(long *)pb->csParam;
|
||||
dStore->curMode = nativeVidMode;
|
||||
dStore->curDepth = kDepthMode1; /* 8-bit */
|
||||
vPInfo->csMode = nativeVidMode;
|
||||
vPInfo->csPage = 0;
|
||||
vPInfo->csBaseAddr = 0;
|
||||
ret = noErr;
|
||||
}
|
||||
break;
|
||||
case cscKillIO: /* 0x1 */
|
||||
asm volatile(".word 0xfe16\n");
|
||||
ret = noErr;
|
||||
break;
|
||||
case cscSetMode: /* 0x2 */
|
||||
{
|
||||
VDPageInfo *vPInfo = (VDPageInfo *)*(long *)pb->csParam;
|
||||
|
||||
ret = reconfHW(dce, dStore->curMode, vPInfo->csMode, vPInfo->csPage);
|
||||
|
||||
if (ret == noErr)
|
||||
vPInfo->csBaseAddr = (void*)(vPInfo->csPage * 1024 * 1024 * 4);
|
||||
}
|
||||
break;
|
||||
case cscSetEntries: /* 0x3 */
|
||||
if (1) {
|
||||
VDSetEntryRecord **vdentry = (VDSetEntryRecord **)(long *)pb->csParam;
|
||||
int csCount = (*vdentry)->csCount;
|
||||
int csStart = (*vdentry)->csStart;
|
||||
int i;
|
||||
if (csCount <= 0) {
|
||||
ret = noErr;
|
||||
goto cscSetMode_done;
|
||||
}
|
||||
SwapMMUMode ( &busMode );
|
||||
if (csStart < 0) {
|
||||
for (i = 0 ; i <= csCount ; i++) {
|
||||
unsigned char idx = ((*vdentry)->csTable[i].value & 0x0FF);
|
||||
/* dStore->shadowClut[idx*3+0] = (*vdentry)->csTable[i].rgb.red; */
|
||||
/* dStore->shadowClut[idx*3+1] = (*vdentry)->csTable[i].rgb.green; */
|
||||
/* dStore->shadowClut[idx*3+2] = (*vdentry)->csTable[i].rgb.blue; */
|
||||
|
||||
write_reg(dce, GOBOFB_LUT_ADDR, 3 * idx);
|
||||
write_reg(dce, GOBOFB_LUT, dStore->gamma.gFormulaData[0][(*vdentry)->csTable[i].rgb.red>>8 & 0xFF]);
|
||||
write_reg(dce, GOBOFB_LUT, dStore->gamma.gFormulaData[1][(*vdentry)->csTable[i].rgb.green>>8 & 0xFF]);
|
||||
write_reg(dce, GOBOFB_LUT, dStore->gamma.gFormulaData[2][(*vdentry)->csTable[i].rgb.blue>>8 & 0xFF]);
|
||||
/* write_reg(dce, GOBOFB_LUT, (*vdentry)->csTable[i].rgb.red); */
|
||||
/* write_reg(dce, GOBOFB_LUT, (*vdentry)->csTable[i].rgb.green); */
|
||||
/* write_reg(dce, GOBOFB_LUT, (*vdentry)->csTable[i].rgb.blue); */
|
||||
}
|
||||
} else {
|
||||
write_reg(dce, GOBOFB_LUT_ADDR, 3 * (csStart & 0xFF));
|
||||
for (i = 0 ; i <= csCount ; i++) {
|
||||
/* dStore->shadowClut[(i+csStart)*3+0] = (*vdentry)->csTable[i].rgb.red; */
|
||||
/* dStore->shadowClut[(i+csStart)*3+1] = (*vdentry)->csTable[i].rgb.green; */
|
||||
/* dStore->shadowClut[(i+csStart)*3+2] = (*vdentry)->csTable[i].rgb.blue; */
|
||||
|
||||
write_reg(dce, GOBOFB_LUT, dStore->gamma.gFormulaData[0][(*vdentry)->csTable[i].rgb.red>>8 & 0xFF]);
|
||||
write_reg(dce, GOBOFB_LUT, dStore->gamma.gFormulaData[1][(*vdentry)->csTable[i].rgb.green>>8 & 0xFF]);
|
||||
write_reg(dce, GOBOFB_LUT, dStore->gamma.gFormulaData[2][(*vdentry)->csTable[i].rgb.blue>>8 & 0xFF]);
|
||||
/* write_reg(dce, GOBOFB_LUT, (*vdentry)->csTable[i].rgb.red); */
|
||||
/* write_reg(dce, GOBOFB_LUT, (*vdentry)->csTable[i].rgb.green); */
|
||||
/* write_reg(dce, GOBOFB_LUT, (*vdentry)->csTable[i].rgb.blue); */
|
||||
}
|
||||
}
|
||||
SwapMMUMode ( &busMode );
|
||||
ret = noErr;
|
||||
} else {
|
||||
ret = noErr;
|
||||
}
|
||||
cscSetMode_done:
|
||||
break;
|
||||
case cscSetGamma: /* 0x4 */
|
||||
{
|
||||
VDGammaRecord *vdgamma = (VDGammaRecord *)*(long *)pb->csParam;
|
||||
GammaTbl *gammaTbl = (GammaTbl*)vdgamma->csGTable;
|
||||
int i;
|
||||
if (gammaTbl == NULL) {
|
||||
linearGamma(dStore);
|
||||
} else {
|
||||
ret = noErr;
|
||||
if (gammaTbl->gDataWidth != 8)
|
||||
ret = paramErr;
|
||||
if (gammaTbl->gDataCnt != 256) // 8-bits
|
||||
ret = paramErr;
|
||||
if ((gammaTbl->gChanCnt != 1) && (gammaTbl->gChanCnt != 3))
|
||||
ret = paramErr;
|
||||
if ((gammaTbl->gType != 0) && (gammaTbl->gType != 0xFFFFBEEF))
|
||||
ret = paramErr;
|
||||
if (gammaTbl->gFormulaSize != 0)
|
||||
ret = paramErr;
|
||||
if (ret != noErr)
|
||||
goto done;
|
||||
|
||||
dStore->gamma.gVersion = gammaTbl->gVersion;
|
||||
dStore->gamma.gType = gammaTbl->gType;
|
||||
dStore->gamma.gFormulaSize = gammaTbl->gFormulaSize;
|
||||
dStore->gamma.gChanCnt = gammaTbl->gChanCnt;
|
||||
dStore->gamma.gDataCnt = gammaTbl->gDataCnt;
|
||||
dStore->gamma.gDataWidth = gammaTbl->gDataWidth;
|
||||
|
||||
int og, ob;
|
||||
if (gammaTbl->gChanCnt == 1)
|
||||
og = ob = 0;
|
||||
else {
|
||||
og = 256;
|
||||
ob = 512;
|
||||
}
|
||||
for (i = 0 ; i < gammaTbl->gDataCnt ; i++) {
|
||||
dStore->gamma.gFormulaData[0][i] = ((unsigned char*)gammaTbl->gFormulaData)[i + 0];
|
||||
dStore->gamma.gFormulaData[1][i] = ((unsigned char*)gammaTbl->gFormulaData)[i + og];
|
||||
dStore->gamma.gFormulaData[2][i] = ((unsigned char*)gammaTbl->gFormulaData)[i + ob];
|
||||
}
|
||||
}
|
||||
ret = noErr;
|
||||
}
|
||||
break;
|
||||
case cscGrayPage: /* 0x5 == cscGrayScreen */
|
||||
{
|
||||
VDPageInfo *vPInfo = (VDPageInfo *)*(long *)pb->csParam;
|
||||
const uint8_t idx = dStore->curMode % 4; // checkme
|
||||
UInt32 a32 = dce->dCtlDevBase;
|
||||
UInt32 a32_l0, a32_l1;
|
||||
UInt32 a32_4p0, a32_4p1;
|
||||
const uint32_t wb = dStore->hres[0] >> idx;
|
||||
unsigned short j, i;
|
||||
short npage = (vPInfo->csMode == kDepthMode5) ? 1 : 2;
|
||||
if (vPInfo->csPage >= npage) {
|
||||
return paramErr;
|
||||
goto done;
|
||||
}
|
||||
|
||||
a32 += vPInfo->csPage * 1024 * 1024 * 4; /* fixme */
|
||||
|
||||
SwapMMUMode ( &busMode );
|
||||
#if 0
|
||||
if ((dStore->curMode != kDepthMode5) && (dStore->curMode != kDepthMode6)) {
|
||||
/* grey the screen */
|
||||
a32_l0 = a32;
|
||||
a32_l1 = a32 + wb;
|
||||
for (j = 0 ; j < dStore->vres[0] ; j+= 2) {
|
||||
a32_4p0 = a32_l0;
|
||||
a32_4p1 = a32_l1;
|
||||
for (i = 0 ; i < wb ; i += 4) {
|
||||
*((UInt32*)a32_4p0) = 0xFF00FF00;
|
||||
*((UInt32*)a32_4p1) = 0x00FF00FF;
|
||||
a32_4p0 += 4;
|
||||
a32_4p1 += 4;
|
||||
}
|
||||
a32_l0 += 2*wb;
|
||||
a32_l1 += 2*wb;
|
||||
}
|
||||
} else {
|
||||
/* testing */
|
||||
a32_l0 = a32;
|
||||
a32_l1 = a32 + dStore->hres[0]*4;
|
||||
for (j = 0 ; j < dStore->vres[0] ; j+= 2) {
|
||||
a32_4p0 = a32_l0;
|
||||
a32_4p1 = a32_l1;
|
||||
for (i = 0 ; i < dStore->hres[0] ; i ++ ) {
|
||||
*((UInt32*)a32_4p0) = (i&0xFF);//(i&0xFF) | (i&0xFF)<<8 | (i&0xff)<<24;
|
||||
*((UInt32*)a32_4p1) = (i&0xFF)<<16;//(i&0xFF) | (i&0xFF)<<8 | (i&0xff)<<24;
|
||||
a32_4p0 += 4;
|
||||
a32_4p1 += 4;
|
||||
}
|
||||
a32_l0 += 2*dStore->hres[0]*4;
|
||||
a32_l1 += 2*dStore->hres[0]*4;
|
||||
}
|
||||
}
|
||||
#else
|
||||
|
||||
#define WAIT_FOR_HW_LE(accel_le) \
|
||||
while (accel_le->reg_status & (1<<WORK_IN_PROGRESS_BIT))
|
||||
|
||||
const UInt32 fgcolor = 0; // FIXME: per-depth?
|
||||
struct goblin_accel_regs* accel_le = (struct goblin_accel_regs*)(dce->dCtlDevBase+GOBOFB_ACCEL_LE);
|
||||
WAIT_FOR_HW_LE(accel_le);
|
||||
accel_le->reg_width = dStore->hres[dStore->curMode - nativeVidMode]; // pixels
|
||||
accel_le->reg_height = dStore->vres[dStore->curMode - nativeVidMode];
|
||||
accel_le->reg_bitblt_dst_x = 0; // pixels
|
||||
accel_le->reg_bitblt_dst_y = 0;
|
||||
accel_le->reg_dst_ptr = 0;
|
||||
accel_le->reg_fgcolor = fgcolor;
|
||||
accel_le->reg_cmd = (1<<DO_FILL_BIT);
|
||||
WAIT_FOR_HW_LE(accel_le);
|
||||
|
||||
#undef WAIT_FOR_HW_LE
|
||||
|
||||
#endif
|
||||
SwapMMUMode ( &busMode );
|
||||
|
||||
ret = noErr;
|
||||
}
|
||||
break;
|
||||
case cscSetGray: /* 0x6 */
|
||||
{
|
||||
VDGrayRecord *vGInfo = (VDGrayRecord *)*(long *)pb->csParam;
|
||||
dStore->gray = vGInfo->csMode;
|
||||
ret = noErr;
|
||||
}
|
||||
break;
|
||||
|
||||
case cscSetInterrupt: /* 0x7 */
|
||||
{
|
||||
VDFlagRecord *vdflag = (VDFlagRecord *)*(long *)pb->csParam;
|
||||
ret = changeIRQ(dce, 1 - vdflag->csMode, controlErr);
|
||||
}
|
||||
break;
|
||||
|
||||
case cscDirectSetEntries: /* 0x8 */
|
||||
asm volatile(".word 0xfe16\n");
|
||||
ret = controlErr;
|
||||
break;
|
||||
|
||||
case cscSetDefaultMode: /* 0x9 */
|
||||
{
|
||||
VDDefMode *vddefm = (VDDefMode *)*(long *)pb->csParam;
|
||||
|
||||
ret = updatePRAM(dce, vddefm->csID, dStore->curDepth, 0);
|
||||
}
|
||||
break;
|
||||
|
||||
case cscSwitchMode: /* 0xa */
|
||||
{
|
||||
VDSwitchInfoRec *vdswitch = *(VDSwitchInfoRec **)(long *)pb->csParam;
|
||||
|
||||
ret = reconfHW(dce, vdswitch->csData, vdswitch->csMode, vdswitch->csPage);
|
||||
|
||||
if (ret == noErr)
|
||||
vdswitch->csBaseAddr = (void*)(vdswitch->csPage * 1024 * 1024 * 4);
|
||||
}
|
||||
break;
|
||||
|
||||
/* cscSetSync */ /* 0xb */
|
||||
/* 0xc ... 0xf : undefined */
|
||||
|
||||
case cscSavePreferredConfiguration: /* 0x10 */
|
||||
{
|
||||
VDSwitchInfoRec *vdswitch = *(VDSwitchInfoRec **)(long *)pb->csParam;
|
||||
|
||||
ret = updatePRAM(dce, vdswitch->csData, vdswitch->csMode, 0);
|
||||
}
|
||||
break;
|
||||
|
||||
/* 0x11 .. 0x15 : undefined */
|
||||
|
||||
/* cscSetHardwareCursor */ /* 0x16 */
|
||||
/* cscDrawHardwareCursor */ /* 0x17 */
|
||||
/* cscSetConvolution */ /* 0x18 */
|
||||
/* cscSetPowerState */ /* 0x19 */
|
||||
/* cscPrivateControlCall */ /* 0x1a */
|
||||
/* 0x1b : undefined */
|
||||
/* cscSetMultiConnect */ /* 0x1c */
|
||||
/* cscSetClutBehavior */ /* 0x1d */
|
||||
/* 0x1e : undefined */
|
||||
/* cscSetDetailedTiming */ /* 0x1f */
|
||||
/* 0x20 : undefined */
|
||||
/* cscDoCommunication */ /* 0x21 */
|
||||
/* cscProbeConnection */ /* 0x22 */
|
||||
|
||||
default: /* always return controlErr for unknown csCode */
|
||||
asm volatile(".word 0xfe16\n");
|
||||
ret = controlErr;
|
||||
break;
|
||||
}
|
||||
|
||||
done:
|
||||
if (!(pb->ioTrap & (1<<noQueueBit)))
|
||||
IODone((DCtlPtr)dce, ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
OSErr reconfHW(AuxDCEPtr dce, unsigned char mode, unsigned char depth, unsigned short page) {
|
||||
NuBusFPGADriverGlobalsHdl dStoreHdl = (NuBusFPGADriverGlobalsHdl)dce->dCtlStorage;
|
||||
NuBusFPGADriverGlobalsPtr dStore = *dStoreHdl;
|
||||
const short npage = (depth == kDepthMode5) ? 1 : 2;
|
||||
OSErr err = noErr;
|
||||
char busMode = 1;
|
||||
|
||||
/* write_reg(dce, GOBOFB_DEBUG, 0xBEEF0031); */
|
||||
/* write_reg(dce, GOBOFB_DEBUG, mode); */
|
||||
/* write_reg(dce, GOBOFB_DEBUG, depth); */
|
||||
/* write_reg(dce, GOBOFB_DEBUG, page); */
|
||||
|
||||
if ((mode == dStore->curMode) &&
|
||||
(depth == dStore->curDepth) &&
|
||||
(page == dStore->curPage)) {
|
||||
return noErr;
|
||||
}
|
||||
|
||||
if (page >= npage)
|
||||
return paramErr;
|
||||
|
||||
if ((mode < nativeVidMode) ||
|
||||
(mode > dStore->maxMode))
|
||||
return paramErr;
|
||||
|
||||
switch (depth) {
|
||||
case kDepthMode1:
|
||||
break;
|
||||
case kDepthMode2:
|
||||
break;
|
||||
case kDepthMode3:
|
||||
break;
|
||||
case kDepthMode4:
|
||||
break;
|
||||
case kDepthMode5:
|
||||
break;
|
||||
case kDepthMode6:
|
||||
break;
|
||||
default:
|
||||
return paramErr;
|
||||
}
|
||||
|
||||
SwapMMUMode ( &busMode );
|
||||
if (mode != dStore->curMode) {
|
||||
unsigned short i;
|
||||
for (i = nativeVidMode ; i <= dStore->maxMode ; i++) {
|
||||
// disable spurious resources, enable only the right one
|
||||
SpBlock spb;
|
||||
spb.spParamData = (i != mode ? 1 : 0); /* disable/enable */
|
||||
spb.spSlot = dStore->slot;
|
||||
spb.spID = i;
|
||||
spb.spExtDev = 0;
|
||||
SetSRsrcState(&spb);
|
||||
}
|
||||
dce->dCtlSlotId = mode; // where is that explained ? cscSwitchMode is not in DCDMF3, and you should'nt do that anymore says PDCD...
|
||||
|
||||
UInt8 id = mode - nativeVidMode;
|
||||
unsigned int ho = ((dStore->hres[0] - dStore->hres[id]) / 2);
|
||||
unsigned int vo = ((dStore->vres[0] - dStore->vres[id]) / 2);
|
||||
/* write_reg(dce, GOBOFB_VIDEOCTRL, 0); */
|
||||
write_reg(dce, GOBOFB_HRES_START, __builtin_bswap32(ho));
|
||||
write_reg(dce, GOBOFB_VRES_START, __builtin_bswap32(vo));
|
||||
write_reg(dce, GOBOFB_HRES_END, __builtin_bswap32(ho + dStore->hres[id]));
|
||||
write_reg(dce, GOBOFB_VRES_END, __builtin_bswap32(vo + dStore->vres[id]));
|
||||
/* write_reg(dce, GOBOFB_VIDEOCTRL, 1); */
|
||||
}
|
||||
if (depth != dStore->curDepth) {
|
||||
switch (depth) {
|
||||
case kDepthMode1:
|
||||
write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_8BIT);
|
||||
break;
|
||||
case kDepthMode2:
|
||||
write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_4BIT);
|
||||
break;
|
||||
case kDepthMode3:
|
||||
write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_2BIT);
|
||||
break;
|
||||
case kDepthMode4:
|
||||
write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_1BIT);
|
||||
break;
|
||||
case kDepthMode5:
|
||||
write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_24BIT);
|
||||
break;
|
||||
case kDepthMode6:
|
||||
write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_15BIT);
|
||||
break;
|
||||
default:
|
||||
SwapMMUMode ( &busMode );
|
||||
return paramErr;
|
||||
}
|
||||
}
|
||||
dStore->curMode = mode;
|
||||
dStore->curDepth = depth;
|
||||
dStore->curPage = page; /* FIXME: HW */
|
||||
|
||||
SwapMMUMode ( &busMode );
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
OSErr updatePRAM(AuxDCEPtr dce, unsigned char mode, unsigned char depth, unsigned short page) {
|
||||
NuBusFPGADriverGlobalsHdl dStoreHdl = (NuBusFPGADriverGlobalsHdl)dce->dCtlStorage;
|
||||
NuBusFPGADriverGlobalsPtr dStore = *dStoreHdl;
|
||||
const short npage = (depth == kDepthMode5) ? 1 : 2;
|
||||
SpBlock spb;
|
||||
NuBusFPGAPramRecord pram;
|
||||
OSErr err;
|
||||
|
||||
if (page >= npage)
|
||||
return paramErr;
|
||||
|
||||
if ((mode < nativeVidMode) ||
|
||||
(mode > dStore->maxMode))
|
||||
return paramErr;
|
||||
|
||||
switch (depth) {
|
||||
case kDepthMode1:
|
||||
break;
|
||||
case kDepthMode2:
|
||||
break;
|
||||
case kDepthMode3:
|
||||
break;
|
||||
case kDepthMode4:
|
||||
break;
|
||||
case kDepthMode5:
|
||||
break;
|
||||
case kDepthMode6:
|
||||
break;
|
||||
default:
|
||||
return paramErr;
|
||||
}
|
||||
|
||||
spb.spSlot = dce->dCtlSlot;
|
||||
spb.spResult = (UInt32)&pram;
|
||||
err = SReadPRAMRec(&spb);
|
||||
if (err == noErr) {
|
||||
pram.mode = mode;
|
||||
pram.depth = depth;
|
||||
pram.page = page;
|
||||
spb.spSlot = dce->dCtlSlot;
|
||||
spb.spsPointer = &pram;
|
||||
err = SPutPRAMRec(&spb);
|
||||
}
|
||||
return err;
|
||||
}
|
||||
@ -1,208 +0,0 @@
|
||||
#include "NuBusFPGADrvr.h"
|
||||
|
||||
#include "ROMDefs.h"
|
||||
|
||||
typedef void(*vblproto)(short);
|
||||
|
||||
/* how do I tell it to only modify D0 & A1 ? */
|
||||
/* the ABI allows to modify D0-D2 & A0-A1 (caller save) */
|
||||
/* currently this is clobbering A0 yet seems to work ... */
|
||||
/* 'Devices' p1-37 says of interrupt handler "preserving all registers other than D0 through D3 and A0 through A3"
|
||||
* but that for NuBus you see SIntInstall which says (2-70)
|
||||
* "routine must preserve the contents of all registers except A1 and D0"
|
||||
* yet the interrupt handler for the video card driver example in DCDMF3 p589 clobbers A0
|
||||
*/
|
||||
#pragma parameter __D0 fbIrq(__A1)
|
||||
__attribute__ ((section (".text.fbdriver"))) short fbIrq(const long sqParameter) {
|
||||
register unsigned long p_D1 asm("d1"), p_D2 asm("d2");
|
||||
unsigned int irq;
|
||||
short ret;
|
||||
asm volatile("" : "+d" (p_D1), "+d" (p_D2));
|
||||
ret = 0;
|
||||
irq = (*((volatile unsigned int*)(sqParameter+GOBOFB_BASE+GOBOFB_INTR_CLEAR)));
|
||||
if (irq & 1) {
|
||||
vblproto myVbl = *(vblproto**)0x0d28;
|
||||
*((volatile unsigned int*)(sqParameter+GOBOFB_BASE+GOBOFB_INTR_CLEAR)) = 0;
|
||||
myVbl((sqParameter>>24)&0xf); // cleaner to use dStore->slot ? but require more code...
|
||||
ret = 1;
|
||||
}
|
||||
asm volatile("" : : "d" (p_D1), "d" (p_D2));
|
||||
return ret;
|
||||
}
|
||||
|
||||
#pragma parameter __D0 cNuBusFPGAOpen(__A0, __A1)
|
||||
OSErr cNuBusFPGAOpen(IOParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce)
|
||||
{
|
||||
OSErr ret = noErr;
|
||||
/* write_reg(dce, GOBOFB_DEBUG, 0xBEEF0000); */
|
||||
/* write_reg(dce, GOBOFB_DEBUG, (unsigned long)dce->dCtlDevBase); */
|
||||
|
||||
if (dce->dCtlStorage == nil)
|
||||
{
|
||||
int i;
|
||||
/* set up flags in the device control entry */
|
||||
/* dce->dCtlFlags |= (dCtlEnableMask | dStatEnableMask | dWritEnableMask |
|
||||
dReadEnableMask | dNeedLockMask | dRAMBasedMask ); */
|
||||
|
||||
/* initialize dCtlStorage */
|
||||
ReserveMemSys(sizeof(NuBusFPGADriverGlobals));
|
||||
dce->dCtlStorage = NewHandleSysClear(sizeof(NuBusFPGADriverGlobals));
|
||||
if (dce->dCtlStorage == nil)
|
||||
return(openErr);
|
||||
HLock(dce->dCtlStorage);
|
||||
NuBusFPGADriverGlobalsHdl dStoreHdl = (NuBusFPGADriverGlobalsHdl)dce->dCtlStorage;
|
||||
NuBusFPGADriverGlobalsPtr dStore = *dStoreHdl;
|
||||
/* (*dStore)->dce = dce; */
|
||||
|
||||
/* for (i = 0 ; i < 256 ; i++) { */
|
||||
/* dStore->shadowClut[i*3+0] = i; */
|
||||
/* dStore->shadowClut[i*3+1] = i; */
|
||||
/* dStore->shadowClut[i*3+2] = i; */
|
||||
/* } */
|
||||
|
||||
dStore->gray = 0;
|
||||
dStore->irqen = 0;
|
||||
dStore->slot = dce->dCtlSlot;
|
||||
|
||||
/* initialize DRAM controller */
|
||||
//sdram_init(0xF0000000 | (((unsigned long)dStore->slot) << 24));
|
||||
|
||||
/* Get the HW setting for native resolution */
|
||||
dStore->hres[0] = __builtin_bswap32((unsigned int)read_reg(dce, GOBOFB_HRES)); // fixme: endianness
|
||||
dStore->vres[0] = __builtin_bswap32((unsigned int)read_reg(dce, GOBOFB_VRES)); // fixme: endianness
|
||||
|
||||
SlotIntQElement *siqel = (SlotIntQElement *)NewPtrSysClear(sizeof(SlotIntQElement));
|
||||
if (siqel == NULL) {
|
||||
return openErr;
|
||||
}
|
||||
siqel->sqType = sIQType;
|
||||
siqel->sqPrio = 8;
|
||||
//siqel->sqAddr = interruptRoutine;
|
||||
/* not sure how to get the proper result in C... */
|
||||
/* SlotIntServiceProcPtr sqAddr; */
|
||||
/* asm("lea %%pc@(interruptRoutine),%0\n" : "=a"(sqAddr)); */
|
||||
/* siqel->sqAddr = sqAddr; */
|
||||
/* siqel->sqParm = (long)dce->dCtlDevBase; */
|
||||
|
||||
/* not sure how to get the proper result in C... */
|
||||
/* ... from ~mac68k, you need option "-mpcrel", and it works */
|
||||
/* SlotIntServiceProcPtr sqAddr; */
|
||||
/* asm("lea %%pc@(fbIrq),%0\n" : "=a"(sqAddr)); */
|
||||
siqel->sqAddr = fbIrq;
|
||||
/* siqel->sqParm = (long)dce; */
|
||||
siqel->sqParm = (long)dce->dCtlDevBase;
|
||||
dStore->siqel = siqel;
|
||||
|
||||
dStore->curPage = 0;
|
||||
dStore->curMode = nativeVidMode;
|
||||
dStore->curDepth = kDepthMode1;
|
||||
|
||||
{
|
||||
OSErr err = noErr;
|
||||
SpBlock spb;
|
||||
UInt8 max = nativeVidMode;
|
||||
|
||||
spb.spParamData = 1<<fall|1<<foneslot;
|
||||
spb.spCategory = catDisplay;
|
||||
spb.spCType = typeVideo;
|
||||
spb.spDrvrSW = drSwApple;
|
||||
spb.spDrvrHW = 0xBEEF;
|
||||
spb.spTBMask = 0; /* match everything above */
|
||||
spb.spSlot = dce->dCtlSlot;
|
||||
spb.spID = nativeVidMode;
|
||||
spb.spExtDev = 0;
|
||||
err = SGetTypeSRsrc(&spb);
|
||||
while ((err == noErr) &&
|
||||
(spb.spSlot == dce->dCtlSlot) &&
|
||||
(((UInt8)spb.spID) > (UInt8)0x80) &&
|
||||
(((UInt8)spb.spID) < (UInt8)0x90)) {
|
||||
/* write_reg(dce, GOBOFB_DEBUG, 0xBEEF0020); */
|
||||
/* write_reg(dce, GOBOFB_DEBUG, spb.spID); */
|
||||
/* write_reg(dce, GOBOFB_DEBUG, err); */
|
||||
|
||||
if (((UInt8)spb.spID) == max) // should not happen
|
||||
err = smNoMoresRsrcs;
|
||||
if (((UInt8)spb.spID) > max)
|
||||
max = spb.spID;
|
||||
err = SGetTypeSRsrc(&spb);
|
||||
}
|
||||
dStore->maxMode = max;
|
||||
}
|
||||
/* write_reg(dce, GOBOFB_DEBUG, 0xBEEF0000); */
|
||||
/* write_reg(dce, GOBOFB_DEBUG, dStore->maxMode); */
|
||||
{
|
||||
OSErr err = noErr;
|
||||
SpBlock spb;
|
||||
/* check for resolution */
|
||||
UInt8 id;
|
||||
for (id = nativeVidMode; id <= dStore->maxMode ; id ++) {
|
||||
/* try every resource, enabled or not */
|
||||
spb.spParamData = 1<<fall; /* wants disabled */
|
||||
spb.spCategory = catDisplay;
|
||||
spb.spCType = typeVideo;
|
||||
spb.spDrvrSW = drSwApple;
|
||||
spb.spDrvrHW = 0xBEEF;
|
||||
spb.spTBMask = 0;
|
||||
spb.spSlot = dce->dCtlSlot;
|
||||
spb.spID = id;
|
||||
spb.spExtDev = 0;
|
||||
err = SGetSRsrc(&spb);
|
||||
|
||||
if (err == noErr) {
|
||||
spb.spID = kDepthMode1;
|
||||
err = SFindStruct(&spb); /* that will give us the Parms block ... */
|
||||
|
||||
if (err == noErr) {
|
||||
/* take the Parms pointer, add the offset to the Modes block and then skip the block size at the beginning to get the structure pointer ... */
|
||||
const unsigned long offset = *(unsigned long*)spb.spsPointer & 0x00FFFFFF;
|
||||
VPBlockPtr vpblock = (VPBlockPtr)(spb.spsPointer + offset + sizeof(long));
|
||||
UInt8 idx = id - nativeVidMode;
|
||||
dStore->hres[idx] = vpblock->vpBounds.right;
|
||||
dStore->vres[idx] = vpblock->vpBounds.bottom;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
linearGamma(dStore);
|
||||
|
||||
/* now check the content of PRAM */
|
||||
if (0) {
|
||||
SpBlock spb;
|
||||
NuBusFPGAPramRecord pram;
|
||||
OSErr err;
|
||||
spb.spSlot = dce->dCtlSlot;
|
||||
spb.spResult = (UInt32)&pram;
|
||||
err = SReadPRAMRec(&spb);
|
||||
if (err == noErr) {
|
||||
err = reconfHW(dce, pram.mode, pram.depth, pram.page);
|
||||
}
|
||||
}
|
||||
|
||||
write_reg(dce, GOBOFB_VIDEOCTRL, 1);
|
||||
|
||||
ret = changeIRQ(dce, 1, openErr);
|
||||
}
|
||||
|
||||
return noErr;
|
||||
}
|
||||
|
||||
#pragma parameter __D0 cNuBusFPGAClose(__A0, __A1)
|
||||
OSErr cNuBusFPGAClose(IOParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce)
|
||||
{
|
||||
OSErr ret = noErr;
|
||||
/* write_reg(dce, GOBOFB_DEBUG, 0xBEEF0003); */
|
||||
/* write_reg(dce, GOBOFB_DEBUG, 0x0000DEAD); */
|
||||
asm(".word 0xfe16\n");
|
||||
if (dce->dCtlStorage != nil)
|
||||
{
|
||||
ret = changeIRQ(dce, 0, openErr);
|
||||
write_reg(dce, GOBOFB_VIDEOCTRL, 0);
|
||||
DisposePtr((Ptr)(*(NuBusFPGADriverGlobalsHdl)dce->dCtlStorage)->siqel);
|
||||
DisposeHandle(dce->dCtlStorage);
|
||||
dce->dCtlStorage = nil;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1,406 +0,0 @@
|
||||
#include "NuBusFPGADrvr.h"
|
||||
|
||||
/*
|
||||
7.1:
|
||||
2 Debug: 0x00000009
|
||||
1 <EFBFBD>Debug: 0x00000009
|
||||
|
||||
|
||||
7.5.3:
|
||||
6 Debug: 0x00000008
|
||||
112 Debug: 0x0000000a
|
||||
32 Debug: 0x0000000c
|
||||
14 Debug: 0x0000000d
|
||||
3 Debug: 0x0000000e
|
||||
4 Debug: 0x00000010
|
||||
2 Debug: 0x00000011
|
||||
78 Debug: 0x00000012
|
||||
1 Debug: 0x00000014
|
||||
1 <EFBFBD>Debug: 0x0000000a
|
||||
|
||||
8.1:
|
||||
9 Debug: 0x00000008
|
||||
273 Debug: 0x0000000a
|
||||
156 Debug: 0x0000000c
|
||||
16 Debug: 0x0000000d
|
||||
3 Debug: 0x00000010
|
||||
3 Debug: 0x00000011
|
||||
157 Debug: 0x00000012
|
||||
1 Debug: 0x00000014
|
||||
2 Debug: 0x00000018
|
||||
10 Debug: 0x0000001c
|
||||
1 <EFBFBD>Debug: 0x0000000c
|
||||
*/
|
||||
|
||||
#pragma parameter __D0 cNuBusFPGAStatus(__A0, __A1)
|
||||
OSErr cNuBusFPGAStatus(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce)
|
||||
{
|
||||
NuBusFPGADriverGlobalsHdl dStoreHdl = (NuBusFPGADriverGlobalsHdl)dce->dCtlStorage;
|
||||
NuBusFPGADriverGlobalsPtr dStore = *dStoreHdl;
|
||||
short ret = -1;
|
||||
|
||||
/* write_reg(dce, GOBOFB_DEBUG, 0xBEEF0002); */
|
||||
/* write_reg(dce, GOBOFB_DEBUG, pb->csCode); */
|
||||
|
||||
#if 1
|
||||
switch (pb->csCode)
|
||||
{
|
||||
case -1:
|
||||
asm volatile(".word 0xfe16\n");
|
||||
break;
|
||||
case 0:
|
||||
ret = statusErr;
|
||||
break;
|
||||
/* case 1: */
|
||||
/* break; */
|
||||
case cscGetMode: /* 2 */
|
||||
{
|
||||
VDPageInfo *vPInfo = (VDPageInfo *)*(long *)pb->csParam;
|
||||
vPInfo->csMode = dStore->curDepth; /* checkme: PCI says depth, 7.5+ doesn't call anyway? */
|
||||
vPInfo->csPage = dStore->curPage;
|
||||
vPInfo->csBaseAddr = (Ptr)(dStore->curPage * 1024 * 1024 * 4); /* fixme */
|
||||
ret = noErr;
|
||||
}
|
||||
break;
|
||||
case cscGetEntries: /* 3 */
|
||||
/* FIXME: TODO */
|
||||
/* never called in >= 7.1 ? */
|
||||
asm volatile(".word 0xfe16\n");
|
||||
ret = noErr;
|
||||
break;
|
||||
case cscGetPageCnt: /* 4 == cscGetPages */
|
||||
{
|
||||
VDPageInfo *vPInfo = (VDPageInfo *)*(long *)pb->csParam;
|
||||
if ((vPInfo->csMode != kDepthMode1) &&
|
||||
(vPInfo->csMode != kDepthMode2) &&
|
||||
(vPInfo->csMode != kDepthMode3) &&
|
||||
(vPInfo->csMode != kDepthMode4) &&
|
||||
(vPInfo->csMode != kDepthMode5) &&
|
||||
(vPInfo->csMode != kDepthMode6)) {
|
||||
ret = paramErr;
|
||||
goto done;
|
||||
}
|
||||
vPInfo->csPage = (vPInfo->csMode == kDepthMode5) ? 1 : 2;
|
||||
ret = noErr;
|
||||
}
|
||||
break;
|
||||
case cscGetPageBase: /* 5 == cscGetBaseAddr */
|
||||
{
|
||||
VDPageInfo *vPInfo = (VDPageInfo *)*(long *)pb->csParam;
|
||||
if ((vPInfo->csMode != kDepthMode1) &&
|
||||
(vPInfo->csMode != kDepthMode2) &&
|
||||
(vPInfo->csMode != kDepthMode3) &&
|
||||
(vPInfo->csMode != kDepthMode4) &&
|
||||
(vPInfo->csMode != kDepthMode5) &&
|
||||
(vPInfo->csMode != kDepthMode6)) {
|
||||
ret = paramErr;
|
||||
goto done;
|
||||
}
|
||||
short npage = (vPInfo->csMode == kDepthMode5) ? 1 : 2;
|
||||
if (vPInfo->csPage >= npage) {
|
||||
ret = paramErr;
|
||||
goto done;
|
||||
}
|
||||
vPInfo->csBaseAddr = (Ptr)(vPInfo->csPage * 1024 * 1024 * 4); /* fixme for > 2 pages ? */
|
||||
ret = noErr;
|
||||
}
|
||||
asm volatile(".word 0xfe16\n");
|
||||
ret = noErr;
|
||||
break;
|
||||
case cscGetGray: /* 6 */
|
||||
{
|
||||
VDGrayRecord *vGInfo = (VDGrayRecord *)*(long *)pb->csParam;
|
||||
vGInfo->csMode = dStore->gray;
|
||||
ret = noErr;
|
||||
}
|
||||
asm volatile(".word 0xfe16\n");
|
||||
break;
|
||||
case cscGetInterrupt: /* 7 */
|
||||
asm volatile(".word 0xfe16\n");
|
||||
{
|
||||
VDFlagRecord *vdflag = (VDFlagRecord *)*(long *)pb->csParam;
|
||||
vdflag->csMode = 1 - dStore->irqen;
|
||||
ret = noErr;
|
||||
}
|
||||
break;
|
||||
case cscGetGamma: /* 8 */
|
||||
{
|
||||
VDGammaRecord *vdgamma = (VDGammaRecord *)*(long *)pb->csParam;
|
||||
vdgamma->csGTable = (Ptr)&dStore->gamma;
|
||||
ret = noErr;
|
||||
}
|
||||
break;
|
||||
case cscGetDefaultMode: /* 9 */
|
||||
{ /* obsolete in PCI, not called >= 7.5 */
|
||||
VDDefMode *vddefm = (VDDefMode *)*(long *)pb->csParam;
|
||||
SpBlock spb;
|
||||
NuBusFPGAPramRecord pram;
|
||||
OSErr err;
|
||||
spb.spSlot = dce->dCtlSlot;
|
||||
spb.spResult = (UInt32)&pram;
|
||||
ret = SReadPRAMRec(&spb);
|
||||
if (ret == noErr) {
|
||||
vddefm->csID = pram.mode;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case cscGetCurMode: /* 0xa */
|
||||
{
|
||||
VDSwitchInfoRec *vdswitch = *(VDSwitchInfoRec **)(long *)pb->csParam;
|
||||
/* write_reg(dce, GOBOFB_DEBUG, 0xBEEF0022); */
|
||||
/* write_reg(dce, GOBOFB_DEBUG, (unsigned int)dStore->curDepth); */
|
||||
/* write_reg(dce, GOBOFB_DEBUG, (unsigned int)dStore->curMode); */
|
||||
vdswitch->csMode = dStore->curDepth;
|
||||
vdswitch->csData = dStore->curMode;
|
||||
vdswitch->csPage = dStore->curPage;
|
||||
vdswitch->csBaseAddr = (Ptr)(dStore->curPage * 1024 * 1024 * 4); /* fixme */
|
||||
ret = noErr;
|
||||
}
|
||||
break;
|
||||
|
||||
case cscGetSync: /* 0xb */
|
||||
asm volatile(".word 0xfe16\n");
|
||||
ret = statusErr;
|
||||
break;
|
||||
|
||||
case cscGetConnection: /* 0xc */
|
||||
{
|
||||
VDDisplayConnectInfoRec *vdconn = *(VDDisplayConnectInfoRec **)(long *)pb->csParam;
|
||||
vdconn->csDisplayType = kGenericLCD;
|
||||
vdconn->csConnectTaggedType = 0;
|
||||
vdconn->csConnectTaggedData = 0;
|
||||
vdconn->csConnectFlags = (1<<kTaggingInfoNonStandard) | (1<<kAllModesSafe) | (1<<kAllModesValid);
|
||||
vdconn->csDisplayComponent = 0;
|
||||
ret = noErr;
|
||||
}
|
||||
break;
|
||||
|
||||
case cscGetModeTiming: /* 0xd */
|
||||
{
|
||||
VDTimingInfoRec *vdtim = *(VDTimingInfoRec **)(long *)pb->csParam;
|
||||
if (((((UInt8)vdtim->csTimingMode) < nativeVidMode) ||
|
||||
(((UInt8)vdtim->csTimingMode) > dStore->maxMode)) &&
|
||||
(vdtim->csTimingMode != kDisplayModeIDFindFirstResolution) &&
|
||||
(vdtim->csTimingMode != kDisplayModeIDCurrent)) {
|
||||
ret = paramErr;
|
||||
goto done;
|
||||
}
|
||||
unsigned int mode = vdtim->csTimingMode;
|
||||
if (mode == kDisplayModeIDFindFirstResolution)
|
||||
mode = nativeVidMode;
|
||||
if (mode == kDisplayModeIDCurrent)
|
||||
mode = dStore->curMode;
|
||||
|
||||
switch (mode) {
|
||||
case nativeVidMode:
|
||||
vdtim->csTimingFormat = kDeclROMtables;
|
||||
vdtim->csTimingData = 0;
|
||||
vdtim->csTimingFlags = 1<<kModeValid | 1<<kModeSafe | 1<<kModeDefault;
|
||||
break;
|
||||
default:
|
||||
vdtim->csTimingFormat = kDeclROMtables;//kDetailedTimingFormat;
|
||||
vdtim->csTimingData = 0;
|
||||
vdtim->csTimingFlags = 1<<kModeValid | 1<<kModeSafe;
|
||||
break;
|
||||
}
|
||||
ret = noErr;
|
||||
}
|
||||
break;
|
||||
|
||||
case cscGetModeBaseAddress: /* 0xe */
|
||||
/* undocumented ??? */
|
||||
{
|
||||
VDBaseAddressInfoRec *vdbase = *(VDBaseAddressInfoRec **)(long *)pb->csParam;
|
||||
vdbase->csDevBase = 0;
|
||||
ret = noErr;
|
||||
}
|
||||
ret = noErr;
|
||||
break;
|
||||
|
||||
/* cscGetScanProc */ /* 0xf*/ /* undocumented ? could be called according to #mac68k */
|
||||
|
||||
case cscGetPreferredConfiguration: /* 0x10 */
|
||||
{ /* fixme: NVRAM */
|
||||
VDSwitchInfoRec *vdswitch = *(VDSwitchInfoRec **)(long *)pb->csParam;
|
||||
vdswitch->csMode = kDepthMode1; //dStore->curDepth; /* fixme: prefered not current / default */
|
||||
vdswitch->csData = nativeVidMode; //dStore->curMode;
|
||||
ret = noErr;
|
||||
SpBlock spb;
|
||||
NuBusFPGAPramRecord pram;
|
||||
OSErr err;
|
||||
spb.spSlot = dce->dCtlSlot;
|
||||
spb.spResult = (UInt32)&pram;
|
||||
ret = SReadPRAMRec(&spb);
|
||||
if (ret == noErr) {
|
||||
vdswitch->csMode = pram.depth;
|
||||
vdswitch->csData = pram.mode;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case cscGetNextResolution: /* 0x11 */
|
||||
{
|
||||
VDResolutionInfoRec *vdres = *(VDResolutionInfoRec **)(long *)pb->csParam;
|
||||
switch (vdres->csPreviousDisplayModeID)
|
||||
{
|
||||
default:
|
||||
if ((((UInt8)vdres->csPreviousDisplayModeID) < nativeVidMode) ||
|
||||
(((UInt8)vdres->csPreviousDisplayModeID) > dStore->maxMode)) {
|
||||
ret = paramErr;
|
||||
goto done;
|
||||
}
|
||||
if (((UInt8)vdres->csPreviousDisplayModeID) == dStore->maxMode)
|
||||
vdres->csDisplayModeID = kDisplayModeIDNoMoreResolutions;
|
||||
else
|
||||
vdres->csDisplayModeID = ((UInt8)vdres->csPreviousDisplayModeID) + 1;
|
||||
vdres->csHorizontalPixels = dStore->hres[((UInt8)vdres->csDisplayModeID) - nativeVidMode];
|
||||
vdres->csVerticalLines = dStore->vres[((UInt8)vdres->csDisplayModeID) - nativeVidMode];
|
||||
vdres->csRefreshRate = 60 << 16; /* Fixed(Point) 16+16 */
|
||||
vdres->csMaxDepthMode = kDepthMode6;
|
||||
break;
|
||||
case kDisplayModeIDFindFirstResolution:
|
||||
vdres->csDisplayModeID = nativeVidMode;
|
||||
vdres->csHorizontalPixels = dStore->hres[0];
|
||||
vdres->csVerticalLines = dStore->vres[0];
|
||||
vdres->csRefreshRate = 60 << 16; /* Fixed(Point) 16+16 */
|
||||
vdres->csMaxDepthMode = kDepthMode6;
|
||||
break;
|
||||
case kDisplayModeIDCurrent:
|
||||
vdres->csDisplayModeID = dStore->curMode;
|
||||
vdres->csHorizontalPixels = dStore->hres[dStore->curMode - nativeVidMode];
|
||||
vdres->csVerticalLines = dStore->vres[dStore->curMode - nativeVidMode];
|
||||
vdres->csRefreshRate = 60 << 16; /* Fixed(Point) 16+16 */
|
||||
vdres->csMaxDepthMode = kDepthMode6;
|
||||
break;
|
||||
}
|
||||
ret = noErr;
|
||||
}
|
||||
break;
|
||||
|
||||
case cscGetVideoParameters: /* 0x12 */
|
||||
{
|
||||
VDVideoParametersInfoRec *vdparam = *(VDVideoParametersInfoRec **)(long *)pb->csParam;
|
||||
if (((((UInt8)vdparam->csDisplayModeID) < nativeVidMode) ||
|
||||
(((UInt8)vdparam->csDisplayModeID) > dStore->maxMode)) &&
|
||||
(vdparam->csDisplayModeID != kDisplayModeIDFindFirstResolution) &&
|
||||
(vdparam->csDisplayModeID != kDisplayModeIDCurrent)) {
|
||||
ret = paramErr;
|
||||
goto done;
|
||||
}
|
||||
if ((vdparam->csDepthMode != kDepthMode1) &&
|
||||
(vdparam->csDepthMode != kDepthMode2) &&
|
||||
(vdparam->csDepthMode != kDepthMode3) &&
|
||||
(vdparam->csDepthMode != kDepthMode4) &&
|
||||
(vdparam->csDepthMode != kDepthMode5) &&
|
||||
(vdparam->csDepthMode != kDepthMode6)) {
|
||||
ret = paramErr;
|
||||
goto done;
|
||||
}
|
||||
/* write_reg(dce, GOBOFB_DEBUG, 0xBEEF0022); */
|
||||
/* write_reg(dce, GOBOFB_DEBUG, (unsigned int)vdparam->csDisplayModeID); */
|
||||
/* write_reg(dce, GOBOFB_DEBUG, (unsigned int)vdparam->csDepthMode); */
|
||||
VPBlock* vpblock = vdparam->csVPBlockPtr;
|
||||
unsigned char mode = vdparam->csDisplayModeID;
|
||||
if (mode == kDisplayModeIDFindFirstResolution)
|
||||
mode = nativeVidMode;
|
||||
if (mode == kDisplayModeIDCurrent)
|
||||
mode = dStore->curMode;
|
||||
/* basically the same as the EBVParms ? */
|
||||
vdparam->csPageCount = (vdparam->csDepthMode == kDepthMode5) ? 1 : 2;
|
||||
vpblock->vpBaseOffset = 0;
|
||||
vpblock->vpBounds.left = 0;
|
||||
vpblock->vpBounds.top = 0;
|
||||
vpblock->vpBounds.right = dStore->hres[mode - nativeVidMode];
|
||||
vpblock->vpBounds.bottom = dStore->vres[mode - nativeVidMode];
|
||||
vpblock->vpVersion = 0;
|
||||
vpblock->vpPackType = 0;
|
||||
vpblock->vpPackSize = 0;
|
||||
vpblock->vpHRes = 0x480000;
|
||||
vpblock->vpVRes = 0x480000;
|
||||
vpblock->vpPixelType = chunky; // checkme?
|
||||
if (vdparam->csDepthMode == kDepthMode1) {
|
||||
vpblock->vpRowBytes = vpblock->vpBounds.right;
|
||||
vdparam->csDeviceType = clutType;
|
||||
vpblock->vpPixelSize = 8;
|
||||
vpblock->vpCmpCount = 1;
|
||||
vpblock->vpCmpSize = 8;
|
||||
} else if (vdparam->csDepthMode == kDepthMode2) {
|
||||
vpblock->vpRowBytes = vpblock->vpBounds.right/2;
|
||||
vdparam->csDeviceType = clutType;
|
||||
vpblock->vpPixelSize = 4;
|
||||
vpblock->vpCmpCount = 1;
|
||||
vpblock->vpCmpSize = 4;
|
||||
} else if (vdparam->csDepthMode == kDepthMode3) {
|
||||
vpblock->vpRowBytes = vpblock->vpBounds.right/4;
|
||||
vdparam->csDeviceType = clutType;
|
||||
vpblock->vpPixelSize = 2;
|
||||
vpblock->vpCmpCount = 1;
|
||||
vpblock->vpCmpSize = 2;
|
||||
} else if (vdparam->csDepthMode == kDepthMode4) {
|
||||
vpblock->vpRowBytes = vpblock->vpBounds.right/8;
|
||||
vdparam->csDeviceType = clutType;
|
||||
vpblock->vpPixelSize = 1;
|
||||
vpblock->vpCmpCount = 1;
|
||||
vpblock->vpCmpSize = 1;
|
||||
} else if (vdparam->csDepthMode == kDepthMode5) {
|
||||
vpblock->vpRowBytes = vpblock->vpBounds.right*4;
|
||||
vdparam->csDeviceType = directType;
|
||||
vpblock->vpPixelSize = 32;
|
||||
vpblock->vpCmpCount = 3;
|
||||
vpblock->vpCmpSize = 8;
|
||||