1/2/4/8 bit support

This commit is contained in:
Romain Dolbeau 2022-04-18 14:10:17 +02:00
parent 8a3e58a75c
commit e2994879bc
5 changed files with 116 additions and 56 deletions

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@ -6,6 +6,8 @@ defMinorBase = 0 /* beginning */
defMinorLength = 0x200000 /* 2048 KiB */ defMinorLength = 0x200000 /* 2048 KiB */
Pages8s = 1 Pages8s = 1
Pages4s = 1
Pages2s = 1
Pages1s = 1 Pages1s = 1
defmBounds_Ls = 0 defmBounds_Ls = 0
@ -17,6 +19,8 @@ defScrnRow = HRES
/* row bytes */ /* row bytes */
RB8s = HRES RB8s = HRES
RB4s = HRES/2
RB2s = HRES/4
RB1s = HRES/8 RB1s = HRES/8
DrHwNuBusFPGA = 0xBEEF /* placeholder */ DrHwNuBusFPGA = 0xBEEF /* placeholder */

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@ -116,7 +116,7 @@ OSErr cNuBusFPGACtl(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce)
{ {
VDPageInfo *vPInfo = (VDPageInfo *)*(long *)pb->csParam; VDPageInfo *vPInfo = (VDPageInfo *)*(long *)pb->csParam;
dStore->curMode = firstVidMode; dStore->curMode = firstVidMode;
dStore->curDepth = kDepthMode1; dStore->curDepth = kDepthMode1; /* 8-bit */
vPInfo->csMode = firstVidMode; vPInfo->csMode = firstVidMode;
vPInfo->csPage = 0; vPInfo->csPage = 0;
vPInfo->csBaseAddr = 0; vPInfo->csBaseAddr = 0;
@ -140,6 +140,18 @@ OSErr cNuBusFPGACtl(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce)
SwapMMUMode ( &busMode ); SwapMMUMode ( &busMode );
break; break;
case secondVidMode: case secondVidMode:
dStore->curMode = secondVidMode;
SwapMMUMode ( &busMode );
write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_4BIT);
SwapMMUMode ( &busMode );
break;
case thirdVidMode:
dStore->curMode = secondVidMode;
SwapMMUMode ( &busMode );
write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_2BIT);
SwapMMUMode ( &busMode );
break;
case fourthVidMode:
dStore->curMode = secondVidMode; dStore->curMode = secondVidMode;
SwapMMUMode ( &busMode ); SwapMMUMode ( &busMode );
write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_1BIT); write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_1BIT);
@ -244,60 +256,32 @@ OSErr cNuBusFPGACtl(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce)
break; break;
case cscGrayPage: /* 5 == cscGrayScreen */ case cscGrayPage: /* 5 == cscGrayScreen */
{ {
/* FIXME: TODO */
VDPageInfo *vPInfo = (VDPageInfo *)*(long *)pb->csParam; VDPageInfo *vPInfo = (VDPageInfo *)*(long *)pb->csParam;
const uint8_t idx = dStore->curMode % 4; // checkme
const UInt32 a32 = dce->dCtlDevBase;
UInt32 a32_l0, a32_l1;
UInt32 a32_4p0, a32_4p1;
const uint32_t wb = HRES >> idx;
unsigned short j, i;
if (vPInfo->csPage != 0) if (vPInfo->csPage != 0)
return paramErr; return paramErr;
SwapMMUMode ( &busMode ); SwapMMUMode ( &busMode );
/* grey the screen */
switch (dStore->curMode) { a32_l0 = a32;
case firstVidMode: // 8bpp a32_l1 = a32 + wb;
{ for (j = 0 ; j < VRES ; j+= 2) {
/* grey the screen */ a32_4p0 = a32_l0;
UInt32 a32 = dce->dCtlDevBase; a32_4p1 = a32_l1;
UInt32 a32_l0, a32_l1; for (i = 0 ; i < wb ; i += 4) {
UInt32 a32_4p0, a32_4p1; *((UInt32*)a32_4p0) = 0xFF00FF00;
short j, i; *((UInt32*)a32_4p1) = 0x00FF00FF;
a32_l0 = a32; a32_4p0 += 4;
a32_l1 = a32 + HRES; a32_4p1 += 4;
for (j = 0 ; j < VRES ; j+= 2) { }
a32_4p0 = a32_l0; a32_l0 += 2*wb;
a32_4p1 = a32_l1; a32_l1 += 2*wb;
for (i = 0 ; i < HRES ; i += 4) {
*((UInt32*)a32_4p0) = 0xFF00FF00;
*((UInt32*)a32_4p1) = 0x00FF00FF;
a32_4p0 += 4;
a32_4p1 += 4;
}
a32_l0 += 2*HRES;
a32_l1 += 2*HRES;
}
} break;
case secondVidMode: // 1bpp
{
/* grey the screen */
UInt32 a32 = dce->dCtlDevBase;
UInt32 a32_l0, a32_l1;
UInt32 a32_4p0, a32_4p1;
short j, i;
a32_l0 = a32;
a32_l1 = a32 + HRES/8;
for (j = 0 ; j < VRES ; j+= 2) {
a32_4p0 = a32_l0;
a32_4p1 = a32_l1;
for (i = 0 ; i < HRES/8 ; i += 4) {
*((UInt32*)a32_4p0) = 0xAAAAAAAA;
*((UInt32*)a32_4p1) = 0x55555555;
a32_4p0 += 4;
a32_4p1 += 4;
}
a32_l0 += 2*HRES/8;
a32_l1 += 2*HRES/8;
}
} break;
} }
SwapMMUMode ( &busMode ); SwapMMUMode ( &busMode );
ret = noErr; ret = noErr;
@ -350,6 +334,16 @@ OSErr cNuBusFPGACtl(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce)
SwapMMUMode ( &busMode ); SwapMMUMode ( &busMode );
break; break;
case kDepthMode2: case kDepthMode2:
SwapMMUMode ( &busMode );
write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_4BIT);
SwapMMUMode ( &busMode );
break;
case kDepthMode3:
SwapMMUMode ( &busMode );
write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_2BIT);
SwapMMUMode ( &busMode );
break;
case kDepthMode4:
SwapMMUMode ( &busMode ); SwapMMUMode ( &busMode );
write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_1BIT); write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_1BIT);
SwapMMUMode ( &busMode ); SwapMMUMode ( &busMode );

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@ -73,6 +73,10 @@ OSErr cNuBusFPGAStatus(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce)
break; break;
case secondVidMode: case secondVidMode:
break; break;
case thirdVidMode:
break;
case fourthVidMode:
break;
default: default:
return paramErr; return paramErr;
} }
@ -198,11 +202,11 @@ OSErr cNuBusFPGAStatus(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce)
break; break;
case kDisplayModeIDFindFirstResolution: case kDisplayModeIDFindFirstResolution:
vdres->csDisplayModeID = firstVidMode; vdres->csDisplayModeID = firstVidMode;
vdres->csMaxDepthMode = kDepthMode2; vdres->csMaxDepthMode = kDepthMode4;
break; break;
case kDisplayModeIDCurrent: case kDisplayModeIDCurrent:
vdres->csDisplayModeID = firstVidMode; vdres->csDisplayModeID = firstVidMode;
vdres->csMaxDepthMode = kDepthMode2; vdres->csMaxDepthMode = kDepthMode4;
break; break;
default: default:
return paramErr; return paramErr;
@ -219,7 +223,9 @@ OSErr cNuBusFPGAStatus(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce)
(vdparam->csDisplayModeID != kDisplayModeIDCurrent)) (vdparam->csDisplayModeID != kDisplayModeIDCurrent))
return paramErr; return paramErr;
if ((vdparam->csDepthMode != kDepthMode1) && if ((vdparam->csDepthMode != kDepthMode1) &&
(vdparam->csDepthMode != kDepthMode2)) (vdparam->csDepthMode != kDepthMode2) &&
(vdparam->csDepthMode != kDepthMode3) &&
(vdparam->csDepthMode != kDepthMode4))
return paramErr; return paramErr;
VPBlock* vpblock = vdparam->csVPBlockPtr; VPBlock* vpblock = vdparam->csVPBlockPtr;
/* basically the same as the EBVParms ? */ /* basically the same as the EBVParms ? */
@ -242,6 +248,14 @@ OSErr cNuBusFPGAStatus(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce)
vpblock->vpCmpCount = 1; vpblock->vpCmpCount = 1;
vpblock->vpCmpSize = 8; vpblock->vpCmpSize = 8;
} else if (vdparam->csDepthMode == kDepthMode2) { } else if (vdparam->csDepthMode == kDepthMode2) {
vpblock->vpPixelSize = 4;
vpblock->vpCmpCount = 1;
vpblock->vpCmpSize = 4;
} else if (vdparam->csDepthMode == kDepthMode3) {
vpblock->vpPixelSize = 2;
vpblock->vpCmpCount = 1;
vpblock->vpCmpSize = 2;
} else if (vdparam->csDepthMode == kDepthMode4) {
vpblock->vpPixelSize = 1; vpblock->vpPixelSize = 1;
vpblock->vpCmpCount = 1; vpblock->vpCmpCount = 1;
vpblock->vpCmpSize = 1; vpblock->vpCmpSize = 1;

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@ -96,7 +96,9 @@ _sRsrc_VidHiRes:
/* OSLstEntry sGammaDir,_GammaDirS /* directory for 640x480 monitor */ /* OSLstEntry sGammaDir,_GammaDirS /* directory for 640x480 monitor */
/* Parameters */ /* Parameters */
OSLstEntry firstVidMode,_HiRes8Modes /* offset to 8 Bit Mode parms */ OSLstEntry firstVidMode,_HiRes8Modes /* offset to 8 Bit Mode parms */
OSLstEntry secondVidMode,_HiRes1Modes /* offset to 1 Bit Mode parms */ OSLstEntry secondVidMode,_HiRes4Modes /* offset to 4 Bit Mode parms */
OSLstEntry thirdVidMode,_HiRes2Modes /* offset to 2 Bit Mode parms */
OSLstEntry fourthVidMode,_HiRes1Modes /* offset to 1 Bit Mode parms */
.long EndOfList /* end of list */ .long EndOfList /* end of list */
ALIGN 2 ALIGN 2
@ -181,6 +183,50 @@ _HRV8Parms:
.long defmPlaneBytes /* bmPlaneBytes */ .long defmPlaneBytes /* bmPlaneBytes */
_EndHRV8Parms: _EndHRV8Parms:
ALIGN 2 ALIGN 2
_HiRes4Modes:
OSLstEntry mVidParams,_HRV4Parms /* offset to vid parameters */
DatLstEntry mPageCnt,Pages4s /* number of video pages */
DatLstEntry mDevType,defmDevType /* device type */
.long EndOfList /* end of list */
_HRV4Parms:
.long _EndHRV4Parms-_HRV4Parms /* physical block size */
.long defmBaseOffset /* QuickDraw base offset ; vpBaseOffset */
.word RB4s /* physRowBytes ; vpRowBytes */
.word defmBounds_Ts,defmBounds_Ls,defmBounds_Bs,defmBounds_Rs /* vpBounds */
.word defVersion /* bmVersion ; vpVersion */
.word 0 /* packType not used ; vpPackType */
.long 0 /* packSize not used ; vpPackSize */
.long defmHRes /* bmHRes */
.long defmVRes /* bmVRes */
.word ChunkyIndexed /* bmPixelType */
.word 4 /* bmPixelSize */
.word 1 /* bmCmpCount */
.word 4 /* bmCmpSize */
.long defmPlaneBytes /* bmPlaneBytes */
_EndHRV4Parms:
ALIGN 2
_HiRes2Modes:
OSLstEntry mVidParams,_HRV2Parms /* offset to vid parameters */
DatLstEntry mPageCnt,Pages2s /* number of video pages */
DatLstEntry mDevType,defmDevType /* device type */
.long EndOfList /* end of list */
_HRV2Parms:
.long _EndHRV2Parms-_HRV2Parms /* physical block size */
.long defmBaseOffset /* QuickDraw base offset ; vpBaseOffset */
.word RB2s /* physRowBytes ; vpRowBytes */
.word defmBounds_Ts,defmBounds_Ls,defmBounds_Bs,defmBounds_Rs /* vpBounds */
.word defVersion /* bmVersion ; vpVersion */
.word 0 /* packType not used ; vpPackType */
.long 0 /* packSize not used ; vpPackSize */
.long defmHRes /* bmHRes */
.long defmVRes /* bmVRes */
.word ChunkyIndexed /* bmPixelType */
.word 2 /* bmPixelSize */
.word 1 /* bmCmpCount */
.word 2 /* bmCmpSize */
.long defmPlaneBytes /* bmPlaneBytes */
_EndHRV2Parms:
ALIGN 2
_HiRes1Modes: _HiRes1Modes:
OSLstEntry mVidParams,_HRV1Parms /* offset to vid parameters */ OSLstEntry mVidParams,_HRV1Parms /* offset to vid parameters */
DatLstEntry mPageCnt,Pages1s /* number of video pages */ DatLstEntry mPageCnt,Pages1s /* number of video pages */

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@ -200,8 +200,10 @@ class VideoFrameBufferMultiDepth(Module, AutoCSR):
If(self.use_indexed, If(self.use_indexed,
Case(self.indexed_mode, { Case(self.indexed_mode, {
0x3: [ self.cdc.source.connect(self.conv8.sink), ], 0x3: [ self.cdc.source.connect(self.conv8.sink), ],
0x2: [ self.cdc.source.connect(self.conv4.sink), ], 0x2: [ self.cdc.source.connect(self.conv4.sink, omit={"data"}),
0x1: [ self.cdc.source.connect(self.conv2.sink), ], *[ self.conv4.sink.data[xbyte*8 + xbit*4:xbyte*8 + xbit*4+4].eq(self.cdc.source.data[xbyte*8 + 4-xbit*4:xbyte*8 + 4-xbit*2+4]) for xbit in range(0,2) for xbyte in range(0, dram_port.data_width//8) ], ],
0x1: [ self.cdc.source.connect(self.conv2.sink, omit={"data"}),
*[ self.conv2.sink.data[xbyte*8 + xbit*2:xbyte*8 + xbit*2+2].eq(self.cdc.source.data[xbyte*8 + 6-xbit*2:xbyte*8 + 6-xbit*2+2]) for xbit in range(0,4) for xbyte in range(0, dram_port.data_width//8) ], ],
0x0: [ self.cdc.source.connect(self.conv1.sink, omit={"data"}), 0x0: [ self.cdc.source.connect(self.conv1.sink, omit={"data"}),
*[ self.conv1.sink.data[xbyte*8 + xbit].eq(self.cdc.source.data[xbyte*8 + 7-xbit]) for xbit in range(0,8) for xbyte in range(0, dram_port.data_width//8) ], *[ self.conv1.sink.data[xbyte*8 + xbit].eq(self.cdc.source.data[xbyte*8 + 7-xbit]) for xbit in range(0,8) for xbyte in range(0, dram_port.data_width//8) ],
], ],