mirror of
https://github.com/rdolbeau/NuBusFPGA.git
synced 2024-06-26 01:29:32 +00:00
131 lines
4.1 KiB
C
131 lines
4.1 KiB
C
#ifndef __NUBUSFPGADRVR_H__
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#define __NUBUSFPGADRVR_H__
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#include <Files.h>
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#include <Devices.h>
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#include <Slots.h>
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#include <MacErrors.h>
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#include <MacMemory.h>
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#include <Video.h>
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#define GOBOFB_BASE 0x00900000
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#define GOBOFB_ACCEL 0x00901000
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#define GOBOFB_ACCEL_LE 0x00901800
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//#define GOBOFB_REG_BASE 0x00900000
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//#define GOBOFB_MEM_BASE 0x00000000 /* remapped to 0x8f800000 by HW */
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#define GOBOFB_MODE 0x0
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#define GOBOFB_VBL_MASK 0x4
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#define GOBOFB_VIDEOCTRL 0x8
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#define GOBOFB_INTR_CLEAR 0xc
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#define GOBOFB_RESET 0x10
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#define GOBOFB_LUT_ADDR 0x14
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#define GOBOFB_LUT 0x18
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#define GOBOFB_DEBUG 0x1c
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//#define GOBOFB_CURSOR_LUT 0x20
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//#define GOBOFB_CURSOR_XY 0x24
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#define GOBOFB_HRES 0x40
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#define GOBOFB_VRES 0x44
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#define GOBOFB_HRES_START 0x48
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#define GOBOFB_VRES_START 0x4C
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#define GOBOFB_HRES_END 0x50
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#define GOBOFB_VRES_END 0x54
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//#define GOBOFB_MASK_BASE 0x80
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//#define GOBOFB_BITS_BASE 0x100
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#define GOBOFB_INTR_VBL 0x1
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// for GOBOFB_MODE
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#define GOBOFB_MODE_1BIT 0x0
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#define GOBOFB_MODE_2BIT 0x1
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#define GOBOFB_MODE_4BIT 0x2
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#define GOBOFB_MODE_8BIT 0x3
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#define GOBOFB_MODE_24BIT 0x10
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#define GOBOFB_MODE_15BIT 0x11
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#define u_int32_t volatile unsigned long
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struct goblin_accel_regs {
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u_int32_t reg_status; // 0
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u_int32_t reg_cmd;
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u_int32_t reg_r5_cmd;
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u_int32_t resv0;
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u_int32_t reg_width; // 4
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u_int32_t reg_height;
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u_int32_t reg_fgcolor;
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u_int32_t resv2;
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u_int32_t reg_bitblt_src_x; // 8
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u_int32_t reg_bitblt_src_y;
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u_int32_t reg_bitblt_dst_x;
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u_int32_t reg_bitblt_dst_y;
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u_int32_t reg_src_stride; // 12
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u_int32_t reg_dst_stride;
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u_int32_t reg_src_ptr; // 14
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u_int32_t reg_dst_ptr;
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};
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// status
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#define WORK_IN_PROGRESS_BIT 0
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// cmd
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#define DO_BLIT_BIT 0 // hardwired in goblin_accel.py
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#define DO_FILL_BIT 1 // hardwired in goblin_accel.py
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#define DO_TEST_BIT 3 // hardwired in goblin_accel.py
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struct MyGammaTbl {
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short gVersion; /*gamma version number*/
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short gType; /*gamma data type*/
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short gFormulaSize; /*Formula data size*/
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short gChanCnt; /*number of channels of data*/
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short gDataCnt; /*number of values/channel*/
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short gDataWidth; /*bits/corrected value (data packed to next larger byte size)*/
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char gFormulaData[3][256]; /*data for formulas followed by gamma values*/
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};
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struct NuBusFPGADriverGlobals {
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AuxDCEPtr dce; // unused
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SlotIntQElement *siqel;
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//unsigned char shadowClut[768];
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unsigned short curMode; /* mode include depth in <= 7.1 ROM-based mode */
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unsigned short curDepth; /* depth separate from mode in >= 7.5 driver-based mode */
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unsigned short hres; /* HW max */
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unsigned short vres; /* HW max */
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char gray;
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char irqen;
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char slot;
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struct MyGammaTbl gamma;
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};
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typedef struct NuBusFPGADriverGlobals NuBusFPGADriverGlobals;
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typedef struct NuBusFPGADriverGlobals *NuBusFPGADriverGlobalsPtr;
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typedef struct NuBusFPGADriverGlobals **NuBusFPGADriverGlobalsHdl;
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static inline void write_reg(AuxDCEPtr dce, unsigned int reg, unsigned int val) {
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*((volatile unsigned int*)(dce->dCtlDevBase+GOBOFB_BASE+reg)) = val;
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}
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static inline unsigned int read_reg(AuxDCEPtr dce, unsigned int reg) {
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return *((volatile unsigned int*)(dce->dCtlDevBase+GOBOFB_BASE+reg));;
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}
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/* ASM */
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extern SlotIntServiceProcPtr interruptRoutine;
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/* ctrl */
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void linearGamma(NuBusFPGADriverGlobalsPtr dStore);
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OSErr changeIRQ(AuxDCEPtr dce, char en, OSErr err);
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OSErr cNuBusFPGACtl(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce);
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/* status */
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OSErr cNuBusFPGAStatus(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce);
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/* open close */
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OSErr cNuBusFPGAOpen(IOParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce);
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OSErr cNuBusFPGAClose(IOParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce);
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/* primary init */
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UInt32 Primary(SEBlock* block);
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#define Check32QDTrap 0xAB03
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static inline UInt32 revb(UInt32 d) {
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return ((d&0xFFul)<<24) | ((d&0xFF00ul)<<8) | ((d&0xFF0000ul)>>8) | ((d&0xFF000000ul)>>24);
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}
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#endif
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