Update to KiCAD 6

This commit is contained in:
Zane Kaminski 2023-01-09 14:42:53 -05:00
parent 6a9afb9724
commit 4c8b1cb12a
57 changed files with 218789 additions and 56716 deletions

9
.gitignore vendored
View File

@ -24,3 +24,12 @@ fp-info-cache
*.DS_Store
Documentation/~$MSIMM30SelectionGuide.docx
GW4190-4MB-SOJ/GW4190-SOJ-backups/*
GW4190-4MB-SOP/GW4190-SOP-backups/*
GW4191-4MB-parity-SOJ/GW4191-SOJ-backups/*
GW4191-4MB-parity-SOP/GW4191-SOP-backups/*
GW4192-16MB-SOJ/GW4192-SOJ-backups/*
GW4192-16MB-SOP/GW4192-SOP-backups/*
GW4194-4MB-CBRFIX-SOJ/GW4194-SOJ-backups/*
GW4194-4MB-CBRFIX-SOP/GW4194-SOP-backups/*
*.kicad_prl

View File

@ -1,182 +0,0 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Connector_Generic_Conn_01x30
#
DEF Connector_Generic_Conn_01x30 J 0 40 Y N 1 F N
F0 "J" 0 1500 50 H V C CNN
F1 "Connector_Generic_Conn_01x30" 0 -1600 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S -50 -1495 0 -1505 1 1 6 N
S -50 -1395 0 -1405 1 1 6 N
S -50 -1295 0 -1305 1 1 6 N
S -50 -1195 0 -1205 1 1 6 N
S -50 -1095 0 -1105 1 1 6 N
S -50 -995 0 -1005 1 1 6 N
S -50 -895 0 -905 1 1 6 N
S -50 -795 0 -805 1 1 6 N
S -50 -695 0 -705 1 1 6 N
S -50 -595 0 -605 1 1 6 N
S -50 -495 0 -505 1 1 6 N
S -50 -395 0 -405 1 1 6 N
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 405 0 395 1 1 6 N
S -50 505 0 495 1 1 6 N
S -50 605 0 595 1 1 6 N
S -50 705 0 695 1 1 6 N
S -50 805 0 795 1 1 6 N
S -50 905 0 895 1 1 6 N
S -50 1005 0 995 1 1 6 N
S -50 1105 0 1095 1 1 6 N
S -50 1205 0 1195 1 1 6 N
S -50 1305 0 1295 1 1 6 N
S -50 1405 0 1395 1 1 6 N
S -50 1450 50 -1550 1 1 10 f
X Pin_1 1 -200 1400 150 R 50 50 1 1 P
X Pin_10 10 -200 500 150 R 50 50 1 1 P
X Pin_11 11 -200 400 150 R 50 50 1 1 P
X Pin_12 12 -200 300 150 R 50 50 1 1 P
X Pin_13 13 -200 200 150 R 50 50 1 1 P
X Pin_14 14 -200 100 150 R 50 50 1 1 P
X Pin_15 15 -200 0 150 R 50 50 1 1 P
X Pin_16 16 -200 -100 150 R 50 50 1 1 P
X Pin_17 17 -200 -200 150 R 50 50 1 1 P
X Pin_18 18 -200 -300 150 R 50 50 1 1 P
X Pin_19 19 -200 -400 150 R 50 50 1 1 P
X Pin_2 2 -200 1300 150 R 50 50 1 1 P
X Pin_20 20 -200 -500 150 R 50 50 1 1 P
X Pin_21 21 -200 -600 150 R 50 50 1 1 P
X Pin_22 22 -200 -700 150 R 50 50 1 1 P
X Pin_23 23 -200 -800 150 R 50 50 1 1 P
X Pin_24 24 -200 -900 150 R 50 50 1 1 P
X Pin_25 25 -200 -1000 150 R 50 50 1 1 P
X Pin_26 26 -200 -1100 150 R 50 50 1 1 P
X Pin_27 27 -200 -1200 150 R 50 50 1 1 P
X Pin_28 28 -200 -1300 150 R 50 50 1 1 P
X Pin_29 29 -200 -1400 150 R 50 50 1 1 P
X Pin_3 3 -200 1200 150 R 50 50 1 1 P
X Pin_30 30 -200 -1500 150 R 50 50 1 1 P
X Pin_4 4 -200 1100 150 R 50 50 1 1 P
X Pin_5 5 -200 1000 150 R 50 50 1 1 P
X Pin_6 6 -200 900 150 R 50 50 1 1 P
X Pin_7 7 -200 800 150 R 50 50 1 1 P
X Pin_8 8 -200 700 150 R 50 50 1 1 P
X Pin_9 9 -200 600 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_C_Small
#
DEF Device_C_Small C 0 10 N N 1 F N
F0 "C" 10 70 50 H V L CNN
F1 "Device_C_Small" 10 -80 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 13 -60 -20 60 -20 N
P 2 0 1 12 -60 20 60 20 N
X ~ 1 0 100 80 D 50 50 1 1 P
X ~ 2 0 -100 80 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R_Small
#
DEF Device_R_Small R 0 10 N N 1 F N
F0 "R" 30 20 50 H V L CNN
F1 "Device_R_Small" 30 -40 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
$ENDFPLIST
DRAW
S -30 70 30 -70 0 1 8 N
X ~ 1 0 100 30 D 50 50 1 1 P
X ~ 2 0 -100 30 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# GW_RAM_DRAM-4Mx4-SOP-24
#
DEF GW_RAM_DRAM-4Mx4-SOP-24 U 0 20 Y Y 1 F N
F0 "U" 0 650 50 H V C CNN
F1 "GW_RAM_DRAM-4Mx4-SOP-24" 0 0 50 V V C CNN
F2 "stdpads:SOP-24-26-300mil" 0 -650 50 H I C CNN
F3 "" 0 -600 50 H I C CNN
$FPLIST
SOJ*10.16x23.49mm*P1.27mm*
$ENDFPLIST
DRAW
S -300 600 300 -600 0 1 10 f
X VDD 1 400 500 100 L 50 50 1 1 W
X A1 10 -400 400 100 R 50 50 1 1 I
X A2 11 -400 300 100 R 50 50 1 1 I
X A3 12 -400 200 100 R 50 50 1 1 I
X VDD 13 400 500 100 L 50 50 1 1 W N
X GND 14 400 -500 100 L 50 50 1 1 W N
X A4 15 -400 100 100 R 50 50 1 1 I
X A5 16 -400 0 100 R 50 50 1 1 I
X A6 17 -400 -100 100 R 50 50 1 1 I
X A7 18 -400 -200 100 R 50 50 1 1 I
X A8 19 -400 -300 100 R 50 50 1 1 I
X D0 2 400 400 100 L 50 50 1 1 B
X NC 20 400 0 100 L 50 50 1 1 N N
X A9 21 -400 -400 100 R 50 50 1 1 I
X ~OE~ 22 400 -400 100 L 50 50 1 1 I
X ~CAS~ 23 400 -100 100 L 50 50 1 1 I
X D2 24 400 200 100 L 50 50 1 1 B
X D3 25 400 100 100 L 50 50 1 1 B
X GND 26 400 -500 100 L 50 50 1 1 W
X D1 3 400 300 100 L 50 50 1 1 B
X ~WE~ 4 400 -300 100 L 50 50 1 1 I
X ~RAS~ 5 400 -200 100 L 50 50 1 1 I
X NC 7 400 0 100 L 50 50 1 1 N N
X A10 8 -400 -500 100 R 50 50 1 1 I
X A0 9 -400 500 100 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# power_+5V
#
DEF power_+5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,452 @@
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.15,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.762,
"height": 1.524,
"width": 1.524
},
"silk_line_width": 0.15,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.15239999999999998
}
},
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [],
"meta": {
"filename": "board_design_settings.json",
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rule_severitieslegacy_courtyards_overlap": true,
"rule_severitieslegacy_no_courtyard_defined": false,
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_copper_edge_clearance": 0.25,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.19999999999999998,
"min_track_width": 0.15,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.508,
"use_height_for_length_calcs": true
},
"track_widths": [
0.0,
0.1524,
0.254,
0.4,
0.45,
0.508,
0.6,
0.762,
0.8,
1.27,
1.524
],
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
},
{
"diameter": 0.6,
"drill": 0.3
},
{
"diameter": 0.8,
"drill": 0.4
}
],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
1,
0,
1,
2
],
[
0,
1,
0,
0,
0,
0,
1,
1,
2,
1,
1,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
2
],
[
1,
1,
1,
1,
1,
0,
1,
1,
1,
1,
1,
2
],
[
0,
0,
0,
1,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
1,
2,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
0,
2,
1,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "GW4190-SOJ.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.1524,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.1524,
"via_diameter": 0.508,
"via_drill": 0.2,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "GW4190-SOJ.net",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.25,
"pin_symbol_size": 0.0,
"text_offset_ratio": 0.08
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "Pcbnew",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"a8759505-9307-441a-9eca-5ba29ec2ea18",
""
]
],
"text_variables": {}
}

File diff suppressed because it is too large Load Diff

View File

@ -1,262 +0,0 @@
update=Thursday, July 01, 2021 at 06:06:56 AM
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=GW4190-SOJ.net
CopperLayerCount=4
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.127
MinViaDiameter=0.508
MinViaDrill=0.2
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.1524
TrackWidth2=0.1524
TrackWidth3=0.254
TrackWidth4=0.4
TrackWidth5=0.45
TrackWidth6=0.508
TrackWidth7=0.6
TrackWidth8=0.762
TrackWidth9=0.8
TrackWidth10=1.27
TrackWidth11=1.524
ViaDiameter1=0.508
ViaDrill1=0.2
ViaDiameter2=0.6
ViaDrill2=0.3
ViaDiameter3=0.8
ViaDrill3=0.4
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.15
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.15
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.07619999999999999
SolderMaskMinWidth=0.127
SolderPasteClearance=-0.03809999999999999
SolderPasteRatio=0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=1
Enabled=1
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=1
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=1
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.1524
TrackWidth=0.1524
ViaDiameter=0.508
ViaDrill=0.2
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1

View File

@ -1,594 +0,0 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr USLetter 11000 8500
encoding utf-8
Sheet 1 1
Title "GW4190A"
Date "2021-06-19"
Rev "2.0"
Comp "Garrett's Workshop"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L Connector_Generic:Conn_01x30 J1
U 1 1 5C2E1E12
P 4450 3450
F 0 "J1" V 4574 3396 50 0000 C CNN
F 1 "DRAM-SIMM-30" V 4665 3396 50 0000 C CNN
F 2 "stdpads:SIMM-30_Edge" H 4450 3450 50 0001 C CNN
F 3 "~" H 4450 3450 50 0001 C CNN
1 4450 3450
0 -1 1 0
$EndComp
$Comp
L power:+5V #PWR0101
U 1 1 5C2E1ED2
P 5950 3250
F 0 "#PWR0101" H 5950 3100 50 0001 C CNN
F 1 "+5V" H 5950 3400 50 0000 C CNN
F 2 "" H 5950 3250 50 0001 C CNN
F 3 "" H 5950 3250 50 0001 C CNN
1 5950 3250
1 0 0 -1
$EndComp
$Comp
L power:+5V #PWR0102
U 1 1 5C2E1F89
P 3050 3250
F 0 "#PWR0102" H 3050 3100 50 0001 C CNN
F 1 "+5V" H 3050 3400 50 0000 C CNN
F 2 "" H 3050 3250 50 0001 C CNN
F 3 "" H 3050 3250 50 0001 C CNN
1 3050 3250
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0103
U 1 1 5C2E2010
P 5150 3250
F 0 "#PWR0103" H 5150 3000 50 0001 C CNN
F 1 "GND" H 5150 3100 50 0000 C CNN
F 2 "" H 5150 3250 50 0001 C CNN
F 3 "" H 5150 3250 50 0001 C CNN
1 5150 3250
-1 0 0 1
$EndComp
$Comp
L power:GND #PWR0104
U 1 1 5C2E2033
P 3850 3250
F 0 "#PWR0104" H 3850 3000 50 0001 C CNN
F 1 "GND" H 3850 3100 50 0000 C CNN
F 2 "" H 3850 3250 50 0001 C CNN
F 3 "" H 3850 3250 50 0001 C CNN
1 3850 3250
-1 0 0 1
$EndComp
Text Label 3150 3250 1 50 ~ 0
~CAS~
Text Label 3250 3250 1 50 ~ 0
D0
Text Label 3350 3250 1 50 ~ 0
A0
Text Label 3450 3250 1 50 ~ 0
A1
Text Label 3550 3250 1 50 ~ 0
D1
Text Label 3650 3250 1 50 ~ 0
A2
Text Label 3750 3250 1 50 ~ 0
A3
Text Label 3950 3250 1 50 ~ 0
D2
Text Label 4050 3250 1 50 ~ 0
A4
Text Label 4150 3250 1 50 ~ 0
A5
Text Label 4250 3250 1 50 ~ 0
D3
Text Label 4350 3250 1 50 ~ 0
A6
Text Label 4450 3250 1 50 ~ 0
A7
Text Label 4550 3250 1 50 ~ 0
D4
Text Label 4650 3250 1 50 ~ 0
A8
Text Label 4750 3250 1 50 ~ 0
A9
Text Label 4850 3250 1 50 ~ 0
A10
Text Label 4950 3250 1 50 ~ 0
D5
Text Label 5050 3250 1 50 ~ 0
~WE~
Text Label 5250 3250 1 50 ~ 0
D6
Text Label 5350 3250 1 50 ~ 0
A11
Text Label 5450 3250 1 50 ~ 0
D7
Text Label 5550 3250 1 50 ~ 0
QP
Text Label 5650 3250 1 50 ~ 0
~RAS~
Text Label 5750 3250 1 50 ~ 0
~CASP~
Text Label 5850 3250 1 50 ~ 0
DP
Text Label 4200 7100 0 50 ~ 0
~OE~
Text Label 3400 7000 2 50 ~ 0
1A8
Text Label 3400 6900 2 50 ~ 0
1A7
Text Label 3400 6800 2 50 ~ 0
1A6
Text Label 3400 6700 2 50 ~ 0
1A5
Text Label 3400 6600 2 50 ~ 0
1A4
Text Label 3400 6500 2 50 ~ 0
1A3
Text Label 3400 6400 2 50 ~ 0
1A2
Text Label 3400 6300 2 50 ~ 0
1A1
Text Label 3400 6200 2 50 ~ 0
1A0
Text Label 3400 7200 2 50 ~ 0
1A10
Wire Wire Line
1850 7400 1850 7350
Wire Wire Line
1850 7400 1850 7450
Connection ~ 1850 7400
Wire Wire Line
1850 7450 1950 7450
Wire Wire Line
1850 7350 1950 7350
Wire Wire Line
1750 7400 1850 7400
Wire Wire Line
1850 5400 1850 5350
Wire Wire Line
1850 5400 1850 5450
Connection ~ 1850 5400
Wire Wire Line
1850 5450 1950 5450
Wire Wire Line
1850 5350 1950 5350
Wire Wire Line
1750 5400 1850 5400
Wire Wire Line
1850 5600 1850 5550
Wire Wire Line
1850 5600 1850 5650
Connection ~ 1850 5600
Wire Wire Line
1850 5650 1950 5650
Wire Wire Line
1850 5550 1950 5550
Wire Wire Line
1750 5600 1850 5600
Wire Wire Line
1850 5800 1850 5750
Wire Wire Line
1850 5800 1850 5850
Connection ~ 1850 5800
Wire Wire Line
1850 5850 1950 5850
Wire Wire Line
1850 5750 1950 5750
Wire Wire Line
1750 5800 1850 5800
Wire Wire Line
1850 6000 1850 5950
Wire Wire Line
1850 6000 1850 6050
Connection ~ 1850 6000
Wire Wire Line
1850 6050 1950 6050
Wire Wire Line
1850 5950 1950 5950
Wire Wire Line
1750 6000 1850 6000
Wire Wire Line
1850 7000 1850 7050
Wire Wire Line
1850 7000 1850 6950
Connection ~ 1850 7000
Wire Wire Line
1850 6950 1950 6950
Wire Wire Line
1850 7050 1950 7050
Wire Wire Line
1750 7000 1850 7000
Wire Wire Line
1850 6800 1850 6850
Wire Wire Line
1850 6800 1850 6750
Connection ~ 1850 6800
Wire Wire Line
1850 6750 1950 6750
Wire Wire Line
1850 6850 1950 6850
Wire Wire Line
1750 6800 1850 6800
Wire Wire Line
1850 6600 1850 6650
Wire Wire Line
1850 6600 1850 6550
Connection ~ 1850 6600
Wire Wire Line
1850 6550 1950 6550
Wire Wire Line
1850 6650 1950 6650
Wire Wire Line
1750 6600 1850 6600
Wire Wire Line
1850 6400 1850 6450
Wire Wire Line
1850 6400 1850 6350
Connection ~ 1850 6400
Wire Wire Line
1850 6350 1950 6350
Wire Wire Line
1850 6450 1950 6450
Wire Wire Line
1750 6400 1850 6400
Wire Wire Line
1850 6200 1850 6250
Wire Wire Line
1850 6200 1850 6150
Connection ~ 1850 6200
Wire Wire Line
1850 6150 1950 6150
Wire Wire Line
1850 6250 1950 6250
Wire Wire Line
1750 6200 1850 6200
Wire Wire Line
1850 7200 1850 7150
Wire Wire Line
1850 7200 1850 7250
Connection ~ 1850 7200
Wire Wire Line
1850 7250 1950 7250
Wire Wire Line
1850 7150 1950 7150
Wire Wire Line
1750 7200 1850 7200
$Comp
L Device:C_Small C1
U 1 1 5C2E290A
P 2400 4200
F 0 "C1" H 2492 4246 50 0000 L CNN
F 1 "2u2" H 2492 4155 50 0000 L CNN
F 2 "stdpads:C_0805" H 2400 4200 50 0001 C CNN
F 3 "~" H 2400 4200 50 0001 C CNN
1 2400 4200
1 0 0 -1
$EndComp
$Comp
L Device:C_Small C2
U 1 1 5C2E296A
P 2800 4200
F 0 "C2" H 2892 4246 50 0000 L CNN
F 1 "2u2" H 2892 4155 50 0000 L CNN
F 2 "stdpads:C_0805" H 2800 4200 50 0001 C CNN
F 3 "~" H 2800 4200 50 0001 C CNN
1 2800 4200
1 0 0 -1
$EndComp
Wire Wire Line
2800 4300 2400 4300
$Comp
L power:+5V #PWR0113
U 1 1 5C2E299D
P 2400 4100
F 0 "#PWR0113" H 2400 3950 50 0001 C CNN
F 1 "+5V" H 2400 4250 50 0000 C CNN
F 2 "" H 2400 4100 50 0001 C CNN
F 3 "" H 2400 4100 50 0001 C CNN
1 2400 4100
1 0 0 -1
$EndComp
Connection ~ 2400 4100
Wire Wire Line
2400 4100 2800 4100
$Comp
L Device:C_Small C3
U 1 1 5C2EDC35
P 3200 4200
F 0 "C3" H 3292 4246 50 0000 L CNN
F 1 "2u2" H 3292 4155 50 0000 L CNN
F 2 "stdpads:C_0805" H 3200 4200 50 0001 C CNN
F 3 "~" H 3200 4200 50 0001 C CNN
1 3200 4200
1 0 0 -1
$EndComp
Wire Wire Line
3200 4100 2800 4100
Connection ~ 2800 4100
Wire Wire Line
2800 4300 3200 4300
Connection ~ 2800 4300
Connection ~ 3200 4300
Wire Wire Line
3200 4300 3600 4300
Connection ~ 3600 4300
Wire Wire Line
3600 4100 3200 4100
Connection ~ 3200 4100
$Comp
L Device:C_Small C4
U 1 1 5D1301A9
P 3600 4200
F 0 "C4" H 3692 4246 50 0000 L CNN
F 1 "2u2" H 3692 4155 50 0000 L CNN
F 2 "stdpads:C_0805" H 3600 4200 50 0001 C CNN
F 3 "~" H 3600 4200 50 0001 C CNN
1 3600 4200
1 0 0 -1
$EndComp
Text Label 1950 5650 0 50 ~ 0
2A10
Text Label 1950 5450 0 50 ~ 0
2A9
Text Label 1950 5850 0 50 ~ 0
2A8
Text Label 1950 6050 0 50 ~ 0
2A0
Text Label 1950 6250 0 50 ~ 0
2A7
Text Label 1950 6450 0 50 ~ 0
2A1
Text Label 1950 6850 0 50 ~ 0
2A2
Text Label 1950 7050 0 50 ~ 0
2A5
Text Label 1950 6650 0 50 ~ 0
2A6
Text Label 1950 7250 0 50 ~ 0
2A3
Text Label 1950 7450 0 50 ~ 0
2A4
Text Label 1750 6000 2 50 ~ 0
A3
Text Label 1750 5800 2 50 ~ 0
A2
Text Label 1750 5600 2 50 ~ 0
A1
Text Label 1750 5400 2 50 ~ 0
A0
Text Label 1750 7000 2 50 ~ 0
A8
Text Label 1750 6800 2 50 ~ 0
A7
Text Label 1750 6600 2 50 ~ 0
A6
Text Label 1750 6400 2 50 ~ 0
A5
Text Label 1750 6200 2 50 ~ 0
A4
Text Label 1750 7200 2 50 ~ 0
A9
Text Label 1750 7400 2 50 ~ 0
A10
Text Label 1950 5350 0 50 ~ 0
1A4
Text Label 1950 5550 0 50 ~ 0
1A3
Text Label 1950 5750 0 50 ~ 0
1A5
Text Label 1950 5950 0 50 ~ 0
1A2
Text Label 1950 6150 0 50 ~ 0
1A6
Text Label 1950 6350 0 50 ~ 0
1A1
Text Label 1950 6550 0 50 ~ 0
1A7
Text Label 1950 6750 0 50 ~ 0
1A0
Text Label 1950 6950 0 50 ~ 0
1A8
Text Label 1950 7150 0 50 ~ 0
1A10
Text Label 1950 7350 0 50 ~ 0
1A9
$Comp
L GW_RAM:DRAM-4Mx4-SOP-24 U1
U 1 1 5D38F422
P 3800 6700
F 0 "U1" H 3800 7350 50 0000 C CNN
F 1 "4C4M4" H 3800 6050 50 0000 C CNN
F 2 "stdpads:SOJ-24-26_300mil" H 3800 6000 50 0001 C CNN
F 3 "https://www.alliancememory.com/wp-content/uploads/pdf/AS6C8008.pdf" H 3800 6200 50 0001 C CNN
1 3800 6700
1 0 0 -1
$EndComp
Text Label 3400 7100 2 50 ~ 0
1A9
$Comp
L power:GND #PWR0105
U 1 1 5D395DE3
P 4200 7200
F 0 "#PWR0105" H 4200 6950 50 0001 C CNN
F 1 "GND" H 4200 7050 50 0000 C CNN
F 2 "" H 4200 7200 50 0001 C CNN
F 3 "" H 4200 7200 50 0001 C CNN
1 4200 7200
1 0 0 -1
$EndComp
Text Label 4200 6800 0 50 ~ 0
~CAS~
Text Label 4200 6900 0 50 ~ 0
~RAS~
Text Label 4200 7000 0 50 ~ 0
~WE~
Text Label 4200 6300 0 50 ~ 0
D5
Text Label 4200 6600 0 50 ~ 0
D4
Text Label 4200 6400 0 50 ~ 0
D7
Text Label 4200 6500 0 50 ~ 0
D6
$Comp
L power:+5V #PWR0106
U 1 1 5D396692
P 4200 6200
F 0 "#PWR0106" H 4200 6050 50 0001 C CNN
F 1 "+5V" H 4200 6350 50 0000 C CNN
F 2 "" H 4200 6200 50 0001 C CNN
F 3 "" H 4200 6200 50 0001 C CNN
1 4200 6200
1 0 0 -1
$EndComp
Text Label 5800 7100 0 50 ~ 0
~OE~
Text Label 5000 7000 2 50 ~ 0
2A8
Text Label 5000 6900 2 50 ~ 0
2A7
Text Label 5000 6800 2 50 ~ 0
2A6
Text Label 5000 6700 2 50 ~ 0
2A5
Text Label 5000 6600 2 50 ~ 0
2A4
Text Label 5000 6500 2 50 ~ 0
2A3
Text Label 5000 6400 2 50 ~ 0
2A2
Text Label 5000 6300 2 50 ~ 0
2A1
Text Label 5000 6200 2 50 ~ 0
2A0
Text Label 5000 7200 2 50 ~ 0
2A10
Text Label 5000 7100 2 50 ~ 0
2A9
$Comp
L power:GND #PWR0108
U 1 1 5D3999DD
P 5800 7200
F 0 "#PWR0108" H 5800 6950 50 0001 C CNN
F 1 "GND" H 5800 7050 50 0000 C CNN
F 2 "" H 5800 7200 50 0001 C CNN
F 3 "" H 5800 7200 50 0001 C CNN
1 5800 7200
1 0 0 -1
$EndComp
Text Label 5800 6800 0 50 ~ 0
~CAS~
Text Label 5800 6900 0 50 ~ 0
~RAS~
Text Label 5800 7000 0 50 ~ 0
~WE~
$Comp
L power:+5V #PWR0109
U 1 1 5D3999EA
P 5800 6200
F 0 "#PWR0109" H 5800 6050 50 0001 C CNN
F 1 "+5V" H 5800 6350 50 0000 C CNN
F 2 "" H 5800 6200 50 0001 C CNN
F 3 "" H 5800 6200 50 0001 C CNN
1 5800 6200
1 0 0 -1
$EndComp
Text Label 5800 6600 0 50 ~ 0
D0
Text Label 5800 6500 0 50 ~ 0
D2
Text Label 5800 6400 0 50 ~ 0
D3
Text Label 5800 6300 0 50 ~ 0
D1
$Comp
L power:GND #PWR0110
U 1 1 5D3FC319
P 4000 4300
F 0 "#PWR0110" H 4000 4050 50 0001 C CNN
F 1 "GND" H 4000 4150 50 0000 C CNN
F 2 "" H 4000 4300 50 0001 C CNN
F 3 "" H 4000 4300 50 0001 C CNN
1 4000 4300
1 0 0 -1
$EndComp
Wire Wire Line
3600 4300 4000 4300
Connection ~ 4000 4300
Wire Wire Line
4000 4100 3600 4100
$Comp
L Device:C_Small C5
U 1 1 5D3FC322
P 4000 4200
F 0 "C5" H 4092 4246 50 0000 L CNN
F 1 "2u2" H 4092 4155 50 0000 L CNN
F 2 "stdpads:C_0805" H 4000 4200 50 0001 C CNN
F 3 "~" H 4000 4200 50 0001 C CNN
1 4000 4200
1 0 0 -1
$EndComp
$Comp
L GW_RAM:DRAM-4Mx4-SOP-24 U2
U 1 1 5D3999D6
P 5400 6700
F 0 "U2" H 5400 7350 50 0000 C CNN
F 1 "4C4M4" H 5400 6050 50 0000 C CNN
F 2 "stdpads:SOJ-24-26_300mil" H 5400 6000 50 0001 C CNN
F 3 "https://www.alliancememory.com/wp-content/uploads/pdf/AS6C8008.pdf" H 5400 6200 50 0001 C CNN
1 5400 6700
1 0 0 -1
$EndComp
$Comp
L Device:R_Small R2
U 1 1 60C54176
P 9100 5900
F 0 "R2" H 9159 5946 50 0000 L CNN
F 1 "FPM" H 9159 5855 50 0000 L CNN
F 2 "stdpads:R_0805" H 9100 5900 50 0001 C CNN
F 3 "~" H 9100 5900 50 0001 C CNN
1 9100 5900
1 0 0 -1
$EndComp
$Comp
L Device:R_Small R1
U 1 1 60C5420A
P 9100 5700
F 0 "R1" H 9159 5746 50 0000 L CNN
F 1 "EDO" H 9159 5655 50 0000 L CNN
F 2 "stdpads:R_0805" H 9100 5700 50 0001 C CNN
F 3 "~" H 9100 5700 50 0001 C CNN
1 9100 5700
1 0 0 -1
$EndComp
Text Label 8900 5800 0 50 ~ 0
~OE~
Wire Wire Line
9100 5800 8900 5800
Connection ~ 9100 5800
Text Label 8900 5600 0 50 ~ 0
~CAS~
Wire Wire Line
8900 5600 9100 5600
$Comp
L power:GND #PWR0115
U 1 1 60C57F90
P 9100 6000
F 0 "#PWR0115" H 9100 5750 50 0001 C CNN
F 1 "GND" H 9100 5850 50 0000 C CNN
F 2 "" H 9100 6000 50 0001 C CNN
F 3 "" H 9100 6000 50 0001 C CNN
1 9100 6000
1 0 0 -1
$EndComp
$EndSCHEMATC

View File

@ -1,4 +1,4 @@
(sym_lib_table
(lib (name GW_RAM)(type Legacy)(uri "$(KIPRJMOD)/../../GW_Parts/GW_RAM.lib")(options "")(descr ""))
(lib (name GW_Logic)(type Legacy)(uri "$(KIPRJMOD)/../../GW_Parts/GW_Logic.lib")(options "")(descr ""))
(lib (name "GW_RAM")(type "KiCad")(uri "$(KIPRJMOD)/../../GW_Parts/GW_RAM.kicad_sym")(options "")(descr ""))
(lib (name "GW_Logic")(type "KiCad")(uri "$(KIPRJMOD)/../../GW_Parts/GW_Logic.kicad_sym")(options "")(descr ""))
)

View File

@ -1,182 +0,0 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Connector_Generic_Conn_01x30
#
DEF Connector_Generic_Conn_01x30 J 0 40 Y N 1 F N
F0 "J" 0 1500 50 H V C CNN
F1 "Connector_Generic_Conn_01x30" 0 -1600 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S -50 -1495 0 -1505 1 1 6 N
S -50 -1395 0 -1405 1 1 6 N
S -50 -1295 0 -1305 1 1 6 N
S -50 -1195 0 -1205 1 1 6 N
S -50 -1095 0 -1105 1 1 6 N
S -50 -995 0 -1005 1 1 6 N
S -50 -895 0 -905 1 1 6 N
S -50 -795 0 -805 1 1 6 N
S -50 -695 0 -705 1 1 6 N
S -50 -595 0 -605 1 1 6 N
S -50 -495 0 -505 1 1 6 N
S -50 -395 0 -405 1 1 6 N
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 405 0 395 1 1 6 N
S -50 505 0 495 1 1 6 N
S -50 605 0 595 1 1 6 N
S -50 705 0 695 1 1 6 N
S -50 805 0 795 1 1 6 N
S -50 905 0 895 1 1 6 N
S -50 1005 0 995 1 1 6 N
S -50 1105 0 1095 1 1 6 N
S -50 1205 0 1195 1 1 6 N
S -50 1305 0 1295 1 1 6 N
S -50 1405 0 1395 1 1 6 N
S -50 1450 50 -1550 1 1 10 f
X Pin_1 1 -200 1400 150 R 50 50 1 1 P
X Pin_10 10 -200 500 150 R 50 50 1 1 P
X Pin_11 11 -200 400 150 R 50 50 1 1 P
X Pin_12 12 -200 300 150 R 50 50 1 1 P
X Pin_13 13 -200 200 150 R 50 50 1 1 P
X Pin_14 14 -200 100 150 R 50 50 1 1 P
X Pin_15 15 -200 0 150 R 50 50 1 1 P
X Pin_16 16 -200 -100 150 R 50 50 1 1 P
X Pin_17 17 -200 -200 150 R 50 50 1 1 P
X Pin_18 18 -200 -300 150 R 50 50 1 1 P
X Pin_19 19 -200 -400 150 R 50 50 1 1 P
X Pin_2 2 -200 1300 150 R 50 50 1 1 P
X Pin_20 20 -200 -500 150 R 50 50 1 1 P
X Pin_21 21 -200 -600 150 R 50 50 1 1 P
X Pin_22 22 -200 -700 150 R 50 50 1 1 P
X Pin_23 23 -200 -800 150 R 50 50 1 1 P
X Pin_24 24 -200 -900 150 R 50 50 1 1 P
X Pin_25 25 -200 -1000 150 R 50 50 1 1 P
X Pin_26 26 -200 -1100 150 R 50 50 1 1 P
X Pin_27 27 -200 -1200 150 R 50 50 1 1 P
X Pin_28 28 -200 -1300 150 R 50 50 1 1 P
X Pin_29 29 -200 -1400 150 R 50 50 1 1 P
X Pin_3 3 -200 1200 150 R 50 50 1 1 P
X Pin_30 30 -200 -1500 150 R 50 50 1 1 P
X Pin_4 4 -200 1100 150 R 50 50 1 1 P
X Pin_5 5 -200 1000 150 R 50 50 1 1 P
X Pin_6 6 -200 900 150 R 50 50 1 1 P
X Pin_7 7 -200 800 150 R 50 50 1 1 P
X Pin_8 8 -200 700 150 R 50 50 1 1 P
X Pin_9 9 -200 600 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_C_Small
#
DEF Device_C_Small C 0 10 N N 1 F N
F0 "C" 10 70 50 H V L CNN
F1 "Device_C_Small" 10 -80 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 13 -60 -20 60 -20 N
P 2 0 1 12 -60 20 60 20 N
X ~ 1 0 100 80 D 50 50 1 1 P
X ~ 2 0 -100 80 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R_Small
#
DEF Device_R_Small R 0 10 N N 1 F N
F0 "R" 30 20 50 H V L CNN
F1 "Device_R_Small" 30 -40 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
$ENDFPLIST
DRAW
S -30 70 30 -70 0 1 8 N
X ~ 1 0 100 30 D 50 50 1 1 P
X ~ 2 0 -100 30 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# GW_RAM_DRAM-4Mx4-SOP-24
#
DEF GW_RAM_DRAM-4Mx4-SOP-24 U 0 20 Y Y 1 F N
F0 "U" 0 650 50 H V C CNN
F1 "GW_RAM_DRAM-4Mx4-SOP-24" 0 0 50 V V C CNN
F2 "stdpads:SOP-24-26-300mil" 0 -650 50 H I C CNN
F3 "" 0 -600 50 H I C CNN
$FPLIST
SOJ*10.16x23.49mm*P1.27mm*
$ENDFPLIST
DRAW
S -300 600 300 -600 0 1 10 f
X VDD 1 400 500 100 L 50 50 1 1 W
X A1 10 -400 400 100 R 50 50 1 1 I
X A2 11 -400 300 100 R 50 50 1 1 I
X A3 12 -400 200 100 R 50 50 1 1 I
X VDD 13 400 500 100 L 50 50 1 1 W N
X GND 14 400 -500 100 L 50 50 1 1 W N
X A4 15 -400 100 100 R 50 50 1 1 I
X A5 16 -400 0 100 R 50 50 1 1 I
X A6 17 -400 -100 100 R 50 50 1 1 I
X A7 18 -400 -200 100 R 50 50 1 1 I
X A8 19 -400 -300 100 R 50 50 1 1 I
X D0 2 400 400 100 L 50 50 1 1 B
X NC 20 400 0 100 L 50 50 1 1 N N
X A9 21 -400 -400 100 R 50 50 1 1 I
X ~OE~ 22 400 -400 100 L 50 50 1 1 I
X ~CAS~ 23 400 -100 100 L 50 50 1 1 I
X D2 24 400 200 100 L 50 50 1 1 B
X D3 25 400 100 100 L 50 50 1 1 B
X GND 26 400 -500 100 L 50 50 1 1 W
X D1 3 400 300 100 L 50 50 1 1 B
X ~WE~ 4 400 -300 100 L 50 50 1 1 I
X ~RAS~ 5 400 -200 100 L 50 50 1 1 I
X NC 7 400 0 100 L 50 50 1 1 N N
X A10 8 -400 -500 100 R 50 50 1 1 I
X A0 9 -400 500 100 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# power_+5V
#
DEF power_+5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,452 @@
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.15,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.762,
"height": 1.524,
"width": 1.524
},
"silk_line_width": 0.15,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.15239999999999998
}
},
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [],
"meta": {