mirror of
https://github.com/akuker/RASCSI.git
synced 2024-11-29 01:49:19 +00:00
296 lines
9.3 KiB
C
296 lines
9.3 KiB
C
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//---------------------------------------------------------------------------
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//
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// SCSI Target Emulator RaSCSI Reloaded
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// for Raspberry Pi
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//
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// Powered by XM6 TypeG Technology.
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// Copyright (C) 2016-2020 GIMONS
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// [ GPIO-SCSI bus ]
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//
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//---------------------------------------------------------------------------
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#pragma once
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#include "hal/data_sample_raspberry.h"
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#include "hal/gpiobus.h"
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#include "shared/log.h"
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#include "shared/scsi.h"
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#include <map>
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//---------------------------------------------------------------------------
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//
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// SCSI signal pin assignment setting
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// GPIO pin mapping table for SCSI signals.
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// PIN_DT0～PIN_SEL
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//
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//---------------------------------------------------------------------------
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#define ALL_SCSI_PINS \
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((1 << PIN_DT0) | (1 << PIN_DT1) | (1 << PIN_DT2) | (1 << PIN_DT3) | (1 << PIN_DT4) | (1 << PIN_DT5) | \
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(1 << PIN_DT6) | (1 << PIN_DT7) | (1 << PIN_DP) | (1 << PIN_ATN) | (1 << PIN_RST) | (1 << PIN_ACK) | \
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(1 << PIN_REQ) | (1 << PIN_MSG) | (1 << PIN_CD) | (1 << PIN_IO) | (1 << PIN_BSY) | (1 << PIN_SEL))
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#define GPIO_INEDGE ((1 << PIN_BSY) | (1 << PIN_SEL) | (1 << PIN_ATN) | (1 << PIN_ACK) | (1 << PIN_RST))
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#define GPIO_MCI ((1 << PIN_MSG) | (1 << PIN_CD) | (1 << PIN_IO))
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//---------------------------------------------------------------------------
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//
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// Constant declarations (GIC)
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//
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//---------------------------------------------------------------------------
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const static uint32_t ARM_GICD_BASE = 0xFF841000;
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const static uint32_t ARM_GICC_BASE = 0xFF842000;
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const static uint32_t ARM_GIC_END = 0xFF847FFF;
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const static int GICD_CTLR = 0x000;
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const static int GICD_IGROUPR0 = 0x020;
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const static int GICD_ISENABLER0 = 0x040;
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const static int GICD_ICENABLER0 = 0x060;
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const static int GICD_ISPENDR0 = 0x080;
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const static int GICD_ICPENDR0 = 0x0A0;
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const static int GICD_ISACTIVER0 = 0x0C0;
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const static int GICD_ICACTIVER0 = 0x0E0;
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const static int GICD_IPRIORITYR0 = 0x100;
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const static int GICD_ITARGETSR0 = 0x200;
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const static int GICD_ICFGR0 = 0x300;
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const static int GICD_SGIR = 0x3C0;
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const static int GICC_CTLR = 0x000;
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const static int GICC_PMR = 0x001;
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const static int GICC_IAR = 0x003;
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const static int GICC_EOIR = 0x004;
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//---------------------------------------------------------------------------
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//
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// Constant declarations (GIC IRQ)
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//
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//---------------------------------------------------------------------------
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const static int GIC_IRQLOCAL0 = (16 + 14);
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const static int GIC_GPIO_IRQ = (32 + 116); // GPIO3
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//---------------------------------------------------------------------------
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//
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// Class definition
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//
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//---------------------------------------------------------------------------
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class GPIOBUS_Raspberry : public GPIOBUS
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{
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public:
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GPIOBUS_Raspberry() = default;
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~GPIOBUS_Raspberry() override = default;
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bool Init(mode_e mode = mode_e::TARGET) override;
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void Reset() override;
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void Cleanup() override;
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// Bus signal acquisition
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uint32_t Acquire() override;
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// Set ENB signal
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void SetENB(bool ast) override;
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// Get BSY signal
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bool GetBSY() const override;
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// Set BSY signal
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void SetBSY(bool ast) override;
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// Get SEL signal
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bool GetSEL() const override;
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// Set SEL signal
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void SetSEL(bool ast) override;
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// Get ATN signal
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bool GetATN() const override;
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// Set ATN signal
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void SetATN(bool ast) override;
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// Get ACK signal
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bool GetACK() const override;
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// Set ACK signal
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void SetACK(bool ast) override;
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// Get ACT signal
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bool GetACT() const override;
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// Set ACT signal
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void SetACT(bool ast) override;
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// Get RST signal
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bool GetRST() const override;
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// Set RST signal
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void SetRST(bool ast) override;
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// Get MSG signal
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bool GetMSG() const override;
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// Set MSG signal
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void SetMSG(bool ast) override;
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// Get CD signal
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bool GetCD() const override;
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// Set CD signal
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void SetCD(bool ast) override;
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// Get IO signal
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bool GetIO() override;
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// Set IO signal
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void SetIO(bool ast) override;
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// Get REQ signal
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bool GetREQ() const override;
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// Set REQ signal
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void SetREQ(bool ast) override;
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bool GetDP() const override;
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// Get DAT signal
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uint8_t GetDAT() override;
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// Set DAT signal
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void SetDAT(uint8_t dat) override;
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bool WaitREQ(bool ast) override
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{
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return WaitSignal(PIN_REQ, ast);
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}
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bool WaitACK(bool ast) override
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{
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return WaitSignal(PIN_ACK, ast);
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}
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static uint32_t bcm_host_get_peripheral_address();
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unique_ptr<DataSample> GetSample(uint64_t timestamp) override
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{
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Acquire();
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return make_unique<DataSample_Raspberry>(signals, timestamp);
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}
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protected:
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// All bus signals
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uint32_t signals = 0; // NOSONAR: Must be protected (not private) for testability
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// GPIO input level
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volatile uint32_t *level = nullptr; // NOSONAR: Must be protected (not private) for testability
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private:
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// SCSI I/O signal control
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void MakeTable() override;
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// Create work data
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void SetControl(int pin, bool ast) override;
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// Set Control Signal
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void SetMode(int pin, int mode) override;
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// Set SCSI I/O mode
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int GetMode(int pin) override
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{
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// Not implemented (or needed for thist gpio bus type)
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(void)pin;
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return -1;
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}
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bool GetSignal(int pin) const override;
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// Get SCSI input signal value
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void SetSignal(int pin, bool ast) override;
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// Set SCSI output signal value
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// Interrupt control
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void DisableIRQ() override;
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// IRQ Disabled
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void EnableIRQ() override;
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// IRQ Enabled
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// GPIO pin functionality settings
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void PinConfig(int pin, int mode) override;
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// GPIO pin direction setting
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void PullConfig(int pin, int mode) override;
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// GPIO pin pull up/down resistor setting
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void PinSetSignal(int pin, bool ast) override;
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// Set GPIO output signal
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void DrvConfig(uint32_t drive) override;
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// Set GPIO drive strength
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static uint32_t get_dt_ranges(const char *filename, uint32_t offset);
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uint32_t baseaddr = 0; // Base address
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int rpitype = 0; // Type of Raspberry Pi
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// GPIO register
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volatile uint32_t *gpio = nullptr; // NOSONAR: volatile needed for register access
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// PADS register
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volatile uint32_t *pads = nullptr; // NOSONAR: volatile needed for register access
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// Interrupt control register
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volatile uint32_t *irpctl = nullptr;
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// Interrupt enabled state
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volatile uint32_t irptenb; // NOSONAR: volatile needed for register access
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// QA7 register
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volatile uint32_t *qa7regs = nullptr;
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// Interupt control target CPU.
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volatile int tintcore; // NOSONAR: volatile needed for register access
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// Interupt control
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volatile uint32_t tintctl; // NOSONAR: volatile needed for register access
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// GICC priority setting
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volatile uint32_t giccpmr; // NOSONAR: volatile needed for register access
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#if !defined(__x86_64__) && !defined(__X86__)
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// GIC Interrupt distributor register
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volatile uint32_t *gicd = nullptr;
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#endif
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// GIC CPU interface register
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volatile uint32_t *gicc = nullptr;
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// RAM copy of GPFSEL0-4 values (GPIO Function Select)
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array<uint32_t, 4> gpfsel;
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#if SIGNAL_CONTROL_MODE == 0
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// Data mask table
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array<array<uint32_t, 256>, 3> tblDatMsk;
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// Data setting table
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array<array<uint32_t, 256>, 3> tblDatSet;
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#else
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// Data mask table
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array<uint32_t, 256> tblDatMsk = {};
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// Table setting table
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array<uint32_t, 256> tblDatSet = {};
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#endif
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static const array<int, 19> SignalTable;
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const static int GPIO_FSEL_0 = 0;
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const static int GPIO_FSEL_1 = 1;
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const static int GPIO_FSEL_2 = 2;
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const static int GPIO_FSEL_3 = 3;
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const static int GPIO_SET_0 = 7;
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const static int GPIO_CLR_0 = 10;
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const static int GPIO_LEV_0 = 13;
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const static int GPIO_EDS_0 = 16;
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const static int GPIO_REN_0 = 19;
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const static int GPIO_FEN_0 = 22;
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const static int GPIO_HEN_0 = 25;
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const static int GPIO_LEN_0 = 28;
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const static int GPIO_AREN_0 = 31;
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const static int GPIO_AFEN_0 = 34;
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const static int GPIO_PUD = 37;
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const static int GPIO_CLK_0 = 38;
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const static int GPIO_GPPINMUXSD = 52;
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const static int GPIO_PUPPDN0 = 57;
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const static int GPIO_PUPPDN1 = 58;
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const static int GPIO_PUPPDN3 = 59;
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const static int GPIO_PUPPDN4 = 60;
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const static int PAD_0_27 = 11;
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const static int IRPT_PND_IRQ_B = 0;
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const static int IRPT_PND_IRQ_1 = 1;
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const static int IRPT_PND_IRQ_2 = 2;
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const static int IRPT_FIQ_CNTL = 3;
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const static int IRPT_ENB_IRQ_1 = 4;
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const static int IRPT_ENB_IRQ_2 = 5;
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const static int IRPT_ENB_IRQ_B = 6;
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const static int IRPT_DIS_IRQ_1 = 7;
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const static int IRPT_DIS_IRQ_2 = 8;
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const static int IRPT_DIS_IRQ_B = 9;
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const static int QA7_CORE0_TINTC = 16;
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const static int GPIO_IRQ = (32 + 20); // GPIO3
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const static uint32_t IRPT_OFFSET = 0x0000B200;
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const static uint32_t PADS_OFFSET = 0x00100000;
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const static uint32_t GPIO_OFFSET = 0x00200000;
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const static uint32_t QA7_OFFSET = 0x01000000;
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};
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